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charset="us-ascii" Content-Transfer-Encoding: quoted-printable Reviewed-by: Eric Dong -----Original Message----- From: Ni, Ray =20 Sent: Thursday, June 15, 2023 6:51 PM To: devel@edk2.groups.io Cc: Dong, Eric ; Kumar, Rahul R ; Gerd Hoffmann Subject: [PATCH 2/3] UefiCpuPkg/ResetVector: Add guidance of how to guarant= ee 16B align ResetVector assembly implementation puts "ALIGN 16" in the end to guarantee= the final executable file size is multiple of 16 bytes. Because the module uses a special GUID which guarantees it's put in the ver= y end of a FV, which should be also the end of the FD. Then to make sure the reset vector "JMP" code is at FFFF_FFF0h, the ResetVe= ctor has to be aligned at 16-byte boundary. The patch updates INF file and ReadMe.txt to add guidance how to make sure = the module is aligned on 16-byte boundary. Signed-off-by: Ray Ni Cc: Eric Dong Cc: Rahul Kumar Cc: Gerd Hoffmann --- UefiCpuPkg/ResetVector/Vtf0/ReadMe.txt | 27 +++++++------------------- UefiCpuPkg/ResetVector/Vtf0/Vtf0.inf | 19 +++++++++++++++++- 2 files changed, 25 insertions(+), 21 deletions(-) diff --git a/UefiCpuPkg/ResetVector/Vtf0/ReadMe.txt b/UefiCpuPkg/ResetVecto= r/Vtf0/ReadMe.txt index 97f4600968..edeb2d6d3e 100644 --- a/UefiCpuPkg/ResetVector/Vtf0/ReadMe.txt +++ b/UefiCpuPkg/ResetVector/Vtf0/ReadMe.txt @@ -1,15 +1,16 @@ =3D=3D=3D HOW TO USE VTF0 =3D=3D=3D+Add this line to your DSC [Components= .IA32] or [Components.X64] section:+ UefiCpuPkg/ResetVector/Vtf0/ResetVect= or.inf Add this line to your FDF FV section:-INF RuleOverride=3DRESET_VEC= TOR USE =3D IA32 UefiCpuPkg/ResetVector/Vtf0/Bin/ResetVector.inf-(For X64 S= EC/PEI change IA32 to X64 =3D> 'USE =3D X64')+ INF RuleOverride=3DRESET_V= ECTOR UefiCpuPkg/ResetVector/Vtf0/ResetVector.inf In your FDF FFS file rul= es sections add:-[Rule.Common.SEC.RESET_VECTOR]- FILE RAW =3D $(NAMED_GUID= ) {- RAW RAW |.raw- }+ [Rule.Common.SEC.RESET_VECTOR]+ = FILE RAW =3D $(NAMED_GUID) {+ RAW BIN Align =3D 16 |.bin+ } = =3D=3D=3D VTF0 Boot Flow =3D=3D=3D @@ -25,17 +26,3 @@ All inputs to SEC im= age are register based: EAX/RAX - Initial value of the EAX register (BIST: Built-in Self Test) DI = - 'BP': boot-strap processor, or 'AP': application processor EBP/RBP -= Pointer to the start of the Boot Firmware Volume--=3D=3D=3D HOW TO BUILD V= TF0 =3D=3D=3D--Dependencies:-* Python 3 or newer-* Nasm 2.03 or newer--To r= ebuild the VTF0 binaries:-1. Change to VTF0 source dir: UefiCpuPkg/ResetVec= tor/Vtf0-2. nasm and python should be in executable path-3. Run this comman= d:- python Build.py-4. Binaries output will be in UefiCpuPkg/ResetVector/= Vtf0/Bin-diff --git a/UefiCpuPkg/ResetVector/Vtf0/Vtf0.inf b/UefiCpuPkg/Res= etVector/Vtf0/Vtf0.inf index 9922cb2755..28185a6e60 100644 --- a/UefiCpuPkg/ResetVector/Vtf0/Vtf0.inf +++ b/UefiCpuPkg/ResetVector/Vtf0/Vtf0.inf @@ -1,7 +1,24 @@ ## @file # Reset Vector #-# Copyright (c) 2006 - 2014, Intel Corporation= . All rights reserved.
+# Note:+# The platform FDF file MUST guarant= ee the ResetVector is aligned+# on 16-byte boundary. Otherwise, the CPU = reset vector will NOT be+# at FFFF_FFF0h.+#+# A sample FDF build rule= could be as follows:+#+# [Rule.Common.SEC.RESET_VECTOR]+# = FILE RAW =3D $(NAMED_GUID) {+# RAW BIN Align =3D 16 |.= bin+# }+#+# Following line in FDF forces to use the above bui= ld rule for the ResetVector:+#+# INF RuleOverride=3DRESET_VECTOR Uefi= CpuPkg/ResetVector/Vtf0/Vtf0.inf+#+#+# Copyright (c) 2006 - 2023, Intel Co= rporation. All rights reserved.
# # SPDX-License-Identifier: BSD-2-Cla= use-Patent #--=20 2.39.1.windows.1