Accessing memory above 0xFFFFFFFF limit.

Accessing memory above 0xFFFFFFFF limit.

[Amit kumar]

Hi.
I am trying to allocate a mem buffer above 4Gb address but the allocation
since i am unable to locate EdkiiIoMmuProtocol.

Status = gBS->LocateProtocol (&gEdkiiIoMmuProtocolGuid, NULL, (VOID **)&mIoMmuProtocol);
      Status = mIoMmuProtocol->AllocateBuffer (
                   mIoMmuProtocol,
                   MaxAllocateType,
                   EfiBootServicesData,
                   1,
                  HostAddress,
                  EDKII_IOMMU_ATTRIBUTE_DUAL_ADDRESS_CYCLE
                  );

Best Regards
Amit Kumar

Re: Accessing memory above 0xFFFFFFFF limit.

[Laszlo Ersek]

On 11/27/17 13:20, Amit kumar wrote:
> 
> Hi.
> I am trying to allocate a mem buffer above 4Gb address but the allocation
> since i am unable to locate EdkiiIoMmuProtocol.
> 
> Status = gBS->LocateProtocol (&gEdkiiIoMmuProtocolGuid, NULL, (VOID **)&mIoMmuProtocol);
>       Status = mIoMmuProtocol->AllocateBuffer (
>                    mIoMmuProtocol,
>                    MaxAllocateType,
>                    EfiBootServicesData,
>                    1,
>                   HostAddress,
>                   EDKII_IOMMU_ATTRIBUTE_DUAL_ADDRESS_CYCLE
>                   );

PciHostBridgeDxe can perfectly well allocate >4GB memory for DMA
purposes even in the absence of the IOMMU protocol. For that, your PCI
device driver has to advertize the PCI device as 64-bit capable. In your
Driver Binding Start() function, call PciIo->Attributes() with the
EfiPciIoAttributeOperationEnable operation, and set
EFI_PCI_IO_ATTRIBUTE_DUAL_ADDRESS_CYCLE. From the v2.7 UEFI spec (14.4
EFI PCI I/O Protocol):

    If this bit is set, then the PCI controller is capable of producing
    PCI Dual Address Cycles, so it is able to access a 64-bit address
    space. If this bit is not set, then the PCI controller is not
    capable of producing PCI Dual Address Cycles, so it is only able to
    access a 32-bit address space.

PciHostBridgeDxe will ignore the bit if the root bridge that the device
belongs to is generally uncapable of 64-bit access. Please see
"DmaAbove4G" in the PciHostBridgeLib interface:

  MdeModulePkg/Include/Library/PciHostBridgeLib.h

(You might notice that the PciHostBridgeDxe source code uses
EFI_PCI_ATTRIBUTE_DUAL_ADDRESS_CYCLE, but above I wrote
EFI_PCI_IO_ATTRIBUTE_DUAL_ADDRESS_CYCLE. The PciBusDxe driver maps the
latter to the former, in the PciIoAllocateBuffer() function.)

Laszlo