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From: "Kuo, Ted" <ted.kuo@intel.com>
To: "devel@edk2.groups.io" <devel@edk2.groups.io>,
	"Chiu, Chasel" <chasel.chiu@intel.com>,
	"Duggapu, Chinni B" <chinni.b.duggapu@intel.com>
Cc: "Desimone, Nathaniel L" <nathaniel.l.desimone@intel.com>,
	"Zeng, Star" <star.zeng@intel.com>,
	"S, Ashraf Ali" <ashraf.ali.s@intel.com>
Subject: Re: [edk2-devel] [PATCH v5 2/2] IntelFsp2WrapperPkg: FSP_TEMP_RAM_INIT call must follow X64 Calling Convention
Date: Wed, 18 May 2022 02:41:11 +0000	[thread overview]
Message-ID: <DM5PR11MB19298BE6B09D74A0F0AD110EE5D19@DM5PR11MB1929.namprd11.prod.outlook.com> (raw)
In-Reply-To: <BN9PR11MB54831E1923CC5722E93CD577E6D19@BN9PR11MB5483.namprd11.prod.outlook.com>

Looks good to me except one typo. Please see my inline comment.

Thanks,
Ted

-----Original Message-----
From: devel@edk2.groups.io <devel@edk2.groups.io> On Behalf Of Chiu, Chasel
Sent: Wednesday, May 18, 2022 9:41 AM
To: Duggapu, Chinni B <chinni.b.duggapu@intel.com>; devel@edk2.groups.io
Cc: Desimone, Nathaniel L <nathaniel.l.desimone@intel.com>; Zeng, Star <star.zeng@intel.com>; S, Ashraf Ali <ashraf.ali.s@intel.com>
Subject: Re: [edk2-devel] [PATCH v5 2/2] IntelFsp2WrapperPkg: FSP_TEMP_RAM_INIT call must follow X64 Calling Convention


Thanks Chinni!
Reviewed-by: Chasel Chiu <chasel.chiu@intel.com>


> -----Original Message-----
> From: Duggapu, Chinni B <chinni.b.duggapu@intel.com>
> Sent: Tuesday, May 17, 2022 4:44 PM
> To: devel@edk2.groups.io
> Cc: Chiu, Chasel <chasel.chiu@intel.com>; Desimone, Nathaniel L 
> <nathaniel.l.desimone@intel.com>; Zeng, Star <star.zeng@intel.com>; S, 
> Ashraf Ali <ashraf.ali.s@intel.com>
> Subject: [PATCH v5 2/2] IntelFsp2WrapperPkg: FSP_TEMP_RAM_INIT call 
> must follow X64 Calling Convention
> 
> REF:https://bugzilla.tianocore.org/show_bug.cgi?id=3926
> Pass Input parameters using RCX.
> 
> Cc: Chasel Chiu <chasel.chiu@intel.com>
> Cc: Nate DeSimone <nathaniel.l.desimone@intel.com>
> Cc: Star Zeng <star.zeng@intel.com>
> Cc: Ashraf Ali S <ashraf.ali.s@intel.com>
> Signed-off-by: cbduggap <chinni.b.duggapu@intel.com>
> ---
>  .../SecFspWrapperPlatformSecLibSample/X64/SecEntry.nasm       | 4 +++-
>  1 file changed, 3 insertions(+), 1 deletion(-)
> 
> diff --git
> a/IntelFsp2WrapperPkg/Library/SecFspWrapperPlatformSecLibSample/X64
> /SecEntry.nasm
> b/IntelFsp2WrapperPkg/Library/SecFspWrapperPlatformSecLibSample/X64
> /SecEntry.nasm
> index dbbf63336e..065d80d0e2 100644
> ---
> a/IntelFsp2WrapperPkg/Library/SecFspWrapperPlatformSecLibSample/X64
> /SecEntry.nasm
> +++
> b/IntelFsp2WrapperPkg/Library/SecFspWrapperPlatformSecLibSample/X64
> /SecEntry.nasm
> @@ -130,6 +130,9 @@ FspHeaderFound:
>    mov     eax, dword [edi + FSP_HEADER_IMAGEBASE_OFFSET]
> 
>    add     eax, dword [edi + FSP_HEADER_TEMPRAMINIT_OFFSET]
> 
> 
> 
> +  ; Pass Fsp T Udp pointer as Input parameter
[Ted]: It should be Upd not Udp.
> 
> +  mov     rcx, ASM_PFX(FsptUpdDataPtr)
> 
> +
> 
>    ; Setup the hardcode stack
> 
>    mov     rsp, TempRamInitStack
> 
> 
> 
> @@ -167,5 +170,4 @@ FspApiFailed:
>  align 10h
> 
>  TempRamInitStack:
> 
>      DQ  TempRamInitDone
> 
> -    DQ  ASM_PFX(FsptUpdDataPtr)         ; TempRamInitParams
> 
> 
> 
> --
> 2.36.0.windows.1







      reply	other threads:[~2022-05-18  2:41 UTC|newest]

Thread overview: 6+ messages / expand[flat|nested]  mbox.gz  Atom feed  top
2022-05-17  8:43 [PATCH v5 0/2] FSP_TEMP_RAM_INIT call must follow X64 Calling Convention cbduggap
2022-05-17  8:44 ` [PATCH v5 1/2] IntelFsp2Pkg: " cbduggap
2022-05-18  1:40   ` Chiu, Chasel
2022-05-17  8:44 ` [PATCH v5 2/2] IntelFsp2WrapperPkg: " cbduggap
2022-05-18  1:41   ` Chiu, Chasel
2022-05-18  2:41     ` Kuo, Ted [this message]

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