From mboxrd@z Thu Jan 1 00:00:00 1970 Return-Path: Received: from NAM03-CO1-obe.outbound.protection.outlook.com (mail-co1nam03on0611.outbound.protection.outlook.com [IPv6:2a01:111:f400:fe48::611]) (using TLSv1.2 with cipher ECDHE-RSA-AES256-SHA384 (256/256 bits)) (No client certificate requested) by ml01.01.org (Postfix) with ESMTPS id 55C1C21BC6A7F for ; Mon, 27 Mar 2017 12:50:33 -0700 (PDT) DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=amdcloud.onmicrosoft.com; s=selector1-amd-com; h=From:Date:Subject:Message-ID:Content-Type:MIME-Version; bh=bZvWs6nXjaPfSnWRF0jLehxO3PMwMt0SDTOOunkcce4=; b=lxHBujqT93H3Wnhrkc5o9sYzPeobVrJ3AyYmLmqtui0lsyhyChwQcP23a9Tt1DeyLEF1wIR8ed/wmzIHU9imMV3hAZn7ctm9JmUaQCNzObNwwmuePTYAHKdkRqr3gxMnEESVXsbEaHTadkdAXKQrj+TUm+BgkEaqjakqqNQ0hL8= Received: from DM5PR12MB1243.namprd12.prod.outlook.com (10.168.237.22) by BN6PR1201MB0131.namprd12.prod.outlook.com (10.174.114.144) with Microsoft SMTP Server (version=TLS1_2, cipher=TLS_ECDHE_RSA_WITH_AES_128_CBC_SHA256_P256) id 15.1.991.14; Mon, 27 Mar 2017 19:50:32 +0000 Received: from DM5PR12MB1243.namprd12.prod.outlook.com ([10.168.237.22]) by DM5PR12MB1243.namprd12.prod.outlook.com ([10.168.237.22]) with mapi id 15.01.0991.020; Mon, 27 Mar 2017 19:50:30 +0000 From: "Duran, Leo" To: 'Jiewen Yao' , "edk2-devel@lists.01.org" CC: Ruiyu Ni , "Singh, Brijesh" Thread-Topic: [RFC] [PATCH 0/3] Add IOMMU support. Thread-Index: AQHSpUo4+oUl3MZXzEaigyKRKXuptKGpBKeA Date: Mon, 27 Mar 2017 19:50:30 +0000 Message-ID: References: <1490434122-16200-1-git-send-email-jiewen.yao@intel.com> In-Reply-To: <1490434122-16200-1-git-send-email-jiewen.yao@intel.com> Accept-Language: en-US X-MS-Has-Attach: X-MS-TNEF-Correlator: authentication-results: intel.com; dkim=none (message not signed) header.d=none;intel.com; dmarc=none action=none header.from=amd.com; x-originating-ip: [165.204.77.1] x-microsoft-exchange-diagnostics: 1; BN6PR1201MB0131; 7:TVATKNuVj/MFQViLevpDb4FfGESnJgWj8xE2V1Rj3H0yK80MW2Wj/643Z+0hnDSpr0CMIUAeyvMaDHexb+r49bd2Acdq7bvW6G1Bebrl9ttbea3sMgwqK1thw6+KOq7aBxrniHKpjiJGPqwi3hmlkF23U0r/7pNQfejvlnLo9hmyFEliPedB9zwOc8WpgLH6KPeyEsqJ/C8apzrmYCAQ8ipgZyqlu9tpso0YCXWtbknmoU002s3BUberwA7vo1Q2CGcCdZMK1RUlWCKpATT/7HwWwMxKk8TY86BeSb1DFVrK9RquKEUqfr6NWvlc4zfwxy5u8TcM/8dNQCpNFb7fmA==; 20:mxaJgKQzK6TfMGJ93+juxaKLa3hUfBG2Mx8ABp3WYczOIrG+iaLyZG/etomKJIHj30yF/KyiFi2uX8W5velqgKElc7h+v4vaWJ8hnlRX2IVd8kPmE2JRbuQ2u/ATZHanjMHcd7bnuFz05cOdGzHZdjVwX9lvRTHXm8BX8P/YBH1POKoObcJco9Wak+rvAWBHY0l/PExFSFW/ygtBXwfqNkxs0h2jgygtTW7zqr+h87I73yef9P03ITNVC8Of9/Wb x-forefront-antispam-report: SFV:SKI; SCL:-1SFV:NSPM; SFS:(10009020)(6009001)(39860400002)(39840400002)(39410400002)(39450400003)(39850400002)(13464003)(377454003)(86362001)(6436002)(50986999)(54356999)(33656002)(6246003)(229853002)(76176999)(77096006)(6506006)(38730400002)(7736002)(3846002)(102836003)(6116002)(122556002)(5660300001)(74316002)(305945005)(2950100002)(189998001)(66066001)(7696004)(3660700001)(2900100001)(4326008)(3280700002)(55016002)(9686003)(99286003)(54906002)(53936002)(8936002)(81166006)(6306002)(2501003)(2906002)(25786009)(53546009)(8676002); DIR:OUT; SFP:1101; SCL:1; SRVR:BN6PR1201MB0131; H:DM5PR12MB1243.namprd12.prod.outlook.com; FPR:; SPF:None; MLV:sfv; LANG:en; x-ms-office365-filtering-correlation-id: 89f69b5c-708c-44cf-7b73-08d4754a866b x-ms-office365-filtering-ht: Tenant x-microsoft-antispam: UriScan:; BCL:0; PCL:0; RULEID:(22001)(2017030254075)(48565401081); SRVR:BN6PR1201MB0131; x-microsoft-antispam-prvs: x-exchange-antispam-report-test: UriScan:(767451399110)(162533806227266)(228905959029699); x-exchange-antispam-report-cfa-test: BCL:0; PCL:0; RULEID:(6040375)(601004)(2401047)(5005006)(8121501046)(10201501046)(3002001)(6055026)(6041248)(20161123560025)(20161123562025)(20161123558025)(20161123555025)(20161123564025)(6072148); SRVR:BN6PR1201MB0131; BCL:0; PCL:0; RULEID:; SRVR:BN6PR1201MB0131; x-forefront-prvs: 02596AB7DA spamdiagnosticoutput: 1:99 spamdiagnosticmetadata: NSPM MIME-Version: 1.0 X-OriginatorOrg: amd.com X-MS-Exchange-CrossTenant-originalarrivaltime: 27 Mar 2017 19:50:30.6200 (UTC) X-MS-Exchange-CrossTenant-fromentityheader: Hosted X-MS-Exchange-CrossTenant-id: 3dd8961f-e488-4e60-8e11-a82d994e183d X-MS-Exchange-Transport-CrossTenantHeadersStamped: BN6PR1201MB0131 Subject: Re: [RFC] [PATCH 0/3] Add IOMMU support. X-BeenThere: edk2-devel@lists.01.org X-Mailman-Version: 2.1.22 Precedence: list List-Id: EDK II Development List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , X-List-Received-Date: Mon, 27 Mar 2017 19:50:33 -0000 Content-Language: en-US Content-Type: text/plain; charset="us-ascii" Content-Transfer-Encoding: quoted-printable Hi Yao, This patch-set, in its current form, does not address all of the required S= EV functionality for PcIHostBridgeIo. Basically, we need to intercept all 4 I/O Operations: - IoMap() - IoUnmap() - IoAllocateBuffer() - IoFreeBuffer() SEV I/O intercepts would do this: 1) IoMap() - Allocate an accessible bounce buffer (AllocateType depends on consumer's = capabilities). - Clear SEV mask on retuned mapped DMA buffer - On DMA Read: CopyMem() from consumer buffer to mapped buffer (bounce oper= ation) 2) IoUnmap() - On DMA Write: CopyMem() from mapped buffer to consumer buffer (bounce ope= ration) - Restore SEV mask on mapped DMA buffer 3) IoAllocateBuffer() - Allocate an accessible buffer (AllocateType depends on consumer's capabil= ities). - Clear SEV mask on allocated buffer - return allocated buffer 4) IoFreeBuffer() - Restore SEV mask on allocated buffer - Free allocated buffer For an sample on how we've intercepted BmDmaLib operations, please refer to= the patch-sets posted by Brijesh: https://lists.01.org/pipermail/edk2-devel/2017-March/008838.html https://lists.01.org/pipermail/edk2-devel/2017-March/008840.html Thanks, Leo > -----Original Message----- > From: Jiewen Yao [mailto:jiewen.yao@intel.com] > Sent: Saturday, March 25, 2017 4:29 AM > To: edk2-devel@lists.01.org > Cc: Ruiyu Ni ; Duran, Leo ; > Singh, Brijesh > Subject: [RFC] [PATCH 0/3] Add IOMMU support. >=20 > This patch series adds IOMMU protocol and updates the consumer to > support IOMMU based DMA access in UEFI. >=20 > This patch series can support the BmDmaLib request for AMD SEV. > submitted by Duran, Leo and Brijesh Singh > . > https://lists.01.org/pipermail/edk2-devel/2017-March/008109.html, and > https://lists.01.org/pipermail/edk2-devel/2017-March/008820.html. > We can have an AMD SEV specific IOMMU driver to produce IOMMU > protocol, and clear SEV in IOMMU->SetAttribute(). >=20 > This patch series can also support Intel VTd based DMA protection, > requested by Jiewen Yao , discussed in > https://lists.01.org/pipermail/edk2-devel/2017-March/008157.html. > We can have an Intel VTd specific IOMMU driver to produce IOMMU > protocol, and update VTd engine to grant or deny access in IOMMU- > >SetAttribute(). >=20 > This patch series does not provide a full Intel VTd driver, which will be > provide in other patch in the future. >=20 > The purpose of this patch series to review if this IOMMU protocol design = can > meet all DMA access and management requirement. >=20 > Cc: Ruiyu Ni > Cc: Leo Duran > Cc: Brijesh Singh > Contributed-under: TianoCore Contribution Agreement 1.0 > Signed-off-by: Jiewen Yao >=20 >=20 > Jiewen Yao (3): > MdeModulePkg/Include: Add IOMMU protocol definition. > MdeModulePkg/PciHostBridge: Add IOMMU support. > MdeModulePkg/PciBus: Add IOMMU support. >=20 > MdeModulePkg/Bus/Pci/PciBusDxe/PciBus.c | 12 ++ > MdeModulePkg/Bus/Pci/PciBusDxe/PciBus.h | 10 ++ > MdeModulePkg/Bus/Pci/PciBusDxe/PciBusDxe.inf | 1 + > MdeModulePkg/Bus/Pci/PciBusDxe/PciIo.c | 100 +++++++= +++++ > MdeModulePkg/Bus/Pci/PciHostBridgeDxe/PciHostBridge.c | 3 + > MdeModulePkg/Bus/Pci/PciHostBridgeDxe/PciHostBridgeDxe.inf | 1 + > MdeModulePkg/Bus/Pci/PciHostBridgeDxe/PciRootBridge.h | 7 + > MdeModulePkg/Bus/Pci/PciHostBridgeDxe/PciRootBridgeIo.c | 172 > +++++++++++++++++++- > MdeModulePkg/Include/Protocol/IoMmu.h | 132 > +++++++++++++++ > MdeModulePkg/MdeModulePkg.dec | 3 + > 10 files changed, 436 insertions(+), 5 deletions(-) create mode 100644 > MdeModulePkg/Include/Protocol/IoMmu.h >=20 > -- > 2.7.4.windows.1