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Thread-Index: AQHSMKG5YOazKiBaQ0WjkKuXfWfvCaC8aK2AgACdj/CAAANXQIAAKCZg Date: Fri, 28 Oct 2016 03:19:35 +0000 Message-ID: References: <1477607390-8225-1-git-send-email-leo.duran@amd.com> <1477607390-8225-2-git-send-email-leo.duran@amd.com> <542CF652F8836A4AB8DBFAAD40ED192A4A2B909A@shsmsx102.ccr.corp.intel.com> In-Reply-To: <542CF652F8836A4AB8DBFAAD40ED192A4A2B909A@shsmsx102.ccr.corp.intel.com> Accept-Language: en-US X-MS-Has-Attach: X-MS-TNEF-Correlator: authentication-results: spf=none (sender IP is ) smtp.mailfrom=leo.duran@amd.com; x-originating-ip: [2605:6000:e7c4:2000:71a9:a501:8820:fdb1] x-ms-office365-filtering-correlation-id: b5ab1a1b-b2f1-4d94-6a8d-08d3fee13e7f x-microsoft-exchange-diagnostics: 1; DM5PR12MB1244; 7:VhG7DK+6AxasxclUSrQRPaZkz0oIa9Z+THLH7e/e4RkIVPiubHbQQ/KynkYIzwv47BNe1cMs0wKolWZyw6pdynj38y0i0FJDo+tgZyYFVfrHjKlOA1VcbNqa+ZnBtyDlIvZATuJpaLQyuQeOk48o9woMUndAzyB9SVS26vqpp7EglArjFpBeCtI43ZvLKXyFW6LxodEdhwn28lohLCJP/LA5wRCXbENmWlBbwy+bf1nKQVxBLqcqueTE3Wzk+sGZ0SIX7x91JvjJIL1zQ+ixn1CKVO80521//foq684q9ZwcFYpi32SQ2kk4OoOOTJYdie2sbJX5Vfk4kCy6Rq16w2r/GHTrbdMIVedLzDFDzcc=; 20:GR2Imi+GwApEekgcQPECT9s/EPH9qZKko1xhjpWwWUqYTlK+EEGNy6APlwTRwOnhFe248lXPcpRdukAC31ZHyBZiSp15SVrauN+WIMXFss+ilxn5vq00GB7V0c43vAbGUbZgdpytE9tk4slS0tEniVGH7plVCsaZZ9jcr1SdUIpdV0AKygpHU0ouIro662ZHSO6QjiThX9vQvUowOkz6oWIEFj0GhxUpjO79BPCfbIjlJKLWTqPrq+5uKwUl+K12 x-microsoft-antispam: UriScan:;BCL:0;PCL:0;RULEID:;SRVR:DM5PR12MB1244; x-microsoft-antispam-prvs: x-exchange-antispam-report-test: UriScan:(767451399110)(162533806227266)(228905959029699); x-exchange-antispam-report-cfa-test: BCL:0; PCL:0; RULEID:(6040176)(601004)(2401047)(8121501046)(5005006)(10201501046)(3002001)(6055026); SRVR:DM5PR12MB1244; BCL:0; PCL:0; RULEID:; SRVR:DM5PR12MB1244; x-forefront-prvs: 0109D382B0 x-forefront-antispam-report: SFV:NSPM; SFS:(10009020)(6009001)(7916002)(199003)(377454003)(189002)(13464003)(7736002)(74316002)(5002640100001)(87936001)(2950100002)(10400500002)(7846002)(92566002)(5660300001)(86362001)(305945005)(76576001)(7696004)(2501003)(2900100001)(8676002)(15975445007)(93886004)(19580395003)(106116001)(3900700001)(99286002)(106356001)(561944003)(105586002)(33656002)(54356999)(19580405001)(77096005)(81166006)(81156014)(76176999)(101416001)(5001770100001)(97736004)(189998001)(4326007)(122556002)(11100500001)(3280700002)(8936002)(102836003)(3660700001)(9686002)(6116002)(2906002)(586003)(50986999)(68736007); DIR:OUT; SFP:1101; SCL:1; SRVR:DM5PR12MB1244; H:DM5PR12MB1243.namprd12.prod.outlook.com; FPR:; SPF:None; PTR:InfoNoRecords; A:1; MX:1; LANG:en; received-spf: None (protection.outlook.com: amd.com does not designate permitted sender hosts) spamdiagnosticoutput: 1:99 spamdiagnosticmetadata: NSPM MIME-Version: 1.0 X-OriginatorOrg: amd.com X-MS-Exchange-CrossTenant-originalarrivaltime: 28 Oct 2016 03:19:35.7134 (UTC) X-MS-Exchange-CrossTenant-fromentityheader: Hosted X-MS-Exchange-CrossTenant-id: 3dd8961f-e488-4e60-8e11-a82d994e183d X-MS-Exchange-Transport-CrossTenantHeadersStamped: DM5PR12MB1244 Subject: Re: [PATCH] UefiCpuPkg: Move GetProcessorLocation() to SmmCpuFeaturesLib library. X-BeenThere: edk2-devel@lists.01.org X-Mailman-Version: 2.1.21 Precedence: list List-Id: EDK II Development List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , X-List-Received-Date: Fri, 28 Oct 2016 03:19:38 -0000 Content-Language: en-US Content-Type: text/plain; charset="us-ascii" Content-Transfer-Encoding: quoted-printable Please see my reply below. Thanks, Leo > -----Original Message----- > From: Fan, Jeff [mailto:jeff.fan@intel.com] > Sent: Thursday, October 27, 2016 8:00 PM > To: Kinney, Michael D ; Duran, Leo > ; edk2-devel@lists.01.org > Cc: Gao, Liming > Subject: RE: [edk2] [PATCH] UefiCpuPkg: Move GetProcessorLocation() to > SmmCpuFeaturesLib library. >=20 > Because the CPU location information are gotten from Initial APIC ID, it > makes more sense to be added into Local APIC Lib. >=20 > The following is my proposal on its definition. > /** > Get CPU Package/Core/Thread location information. >=20 > @param[in] InitialApicId CPU APIC ID > @param[out] Package Pointer to Package ID > @param[out] Core Pointer to Core ID > @param[out] Thread Pointer to Thread ID > **/ > VOID > ExtractProcessorLocation ( > IN UINT32 InitialApicId, > OUT UINT32 *Package, > OUT UINT32 *Core, > OUT UINT32 *Thread > ); >=20 > Leo, is it OK to meet your requirement? >=20 > Thanks! > Jeff [Duran, Leo]=20 Sure thing. The main point is to get the vendor-specific CPUID code out of the driver, = and into a library. >=20 > -----Original Message----- > From: Fan, Jeff > Sent: Friday, October 28, 2016 8:45 AM > To: Kinney, Michael D; Leo Duran; edk2-devel@lists.01.org > Cc: Gao, Liming > Subject: RE: [edk2] [PATCH] UefiCpuPkg: Move GetProcessorLocation() to > SmmCpuFeaturesLib library. >=20 > Leo and Mike, >=20 > GetProcessorLocation() are not only used by PiSmmCpuDxeSmm driver, it is > also duplicated in UefiCpuPkg\Library\MpInitLib\MpLib.c. >=20 > I suggest that we could add this API into UefiCpuPkg/Include/UefiCpuLib o= r > UefiCpuPkg/Include/ LocalApicLib.h. > Thus, it could be consumed by modules across PEI/DXE/SMM modules. >=20 > Thanks! > Jeff >=20 > -----Original Message----- > From: Kinney, Michael D > Sent: Friday, October 28, 2016 7:16 AM > To: Leo Duran; edk2-devel@lists.01.org; Kinney, Michael D > Cc: Gao, Liming; Fan, Jeff > Subject: RE: [edk2] [PATCH] UefiCpuPkg: Move GetProcessorLocation() to > SmmCpuFeaturesLib library. >=20 > Leo, >=20 > This looks like a good proposed change to the SmmFeaturesLib and > PiSmmCpuDxeSmm module. >=20 > Adding UefiCpuPkg maintainer Jeff Fan to the Cc list. >=20 > There are 3 implementations of the SmmFeaturesLib in edk2/master. > This patch needs to update all 3, or some of the platforms in edk2/master= will > no longer build: >=20 > * OvmfPkg\Library\SmmCpuFeaturesLib > * QuarkSocPkg\QuarkNorthCluster\Library\SmmCpuFeaturesLib > * UefiCpuPkg\Library\SmmCpuFeaturesLib >=20 > Thanks, >=20 > Mike >=20 > > -----Original Message----- > > From: edk2-devel [mailto:edk2-devel-bounces@lists.01.org] On Behalf Of > > Leo Duran > > Sent: Thursday, October 27, 2016 3:30 PM > > To: edk2-devel@lists.01.org > > Cc: Leo Duran ; Gao, Liming > > > Subject: [edk2] [PATCH] UefiCpuPkg: Move GetProcessorLocation() to > > SmmCpuFeaturesLib library. > > > > 1) Remove SmmGetProcessorLocation() from PiSmmCpuDxeSmm driver > > 2) Add SmmCpuFeaturesGetProcessorLocation() to SmmCpuFeaturesLib > > library > > > > Contributed-under: TianoCore Contribution Agreement 1.0 > > Signed-off-by: Leo Duran > > --- > > UefiCpuPkg/Include/Library/SmmCpuFeaturesLib.h | 17 +++ > > .../Library/SmmCpuFeaturesLib/SmmCpuFeaturesLib.c | 118 > ++++++++++++++++++++ > > UefiCpuPkg/PiSmmCpuDxeSmm/CpuService.c | 121 +------------= ------ > -- > > 3 files changed, 136 insertions(+), 120 deletions(-) > > > > diff --git a/UefiCpuPkg/Include/Library/SmmCpuFeaturesLib.h > > b/UefiCpuPkg/Include/Library/SmmCpuFeaturesLib.h > > index 4478003..dd14ec5 100644 > > --- a/UefiCpuPkg/Include/Library/SmmCpuFeaturesLib.h > > +++ b/UefiCpuPkg/Include/Library/SmmCpuFeaturesLib.h > > @@ -398,4 +398,21 @@ SmmCpuFeaturesAllocatePageTableMemory ( > > IN UINTN Pages > > ); > > > > +/** > > + Get Package ID/Core ID/Thread ID of a processor. > > + > > + APIC ID must be an initial APIC ID. > > + > > + The algorithm assumes the target system has symmetry across > > + physical package > > boundaries > > + with respect to the number of logical processors per package, > > + number of cores per > > package. > > + > > + @param ApicId APIC ID of the target logical processor. > > + @param Location Returns the processor location information. > > +**/ > > +VOID > > +SmmCpuFeaturesGetProcessorLocation ( > > + IN UINT32 ApicId, > > + OUT EFI_CPU_PHYSICAL_LOCATION *Location > > + ); > > + > > #endif > > diff --git a/UefiCpuPkg/Library/SmmCpuFeaturesLib/SmmCpuFeaturesLib.c > > b/UefiCpuPkg/Library/SmmCpuFeaturesLib/SmmCpuFeaturesLib.c > > index 1754f2d..1e300f3 100644 > > --- a/UefiCpuPkg/Library/SmmCpuFeaturesLib/SmmCpuFeaturesLib.c > > +++ b/UefiCpuPkg/Library/SmmCpuFeaturesLib/SmmCpuFeaturesLib.c > > @@ -673,3 +673,121 @@ SmmCpuFeaturesAllocatePageTableMemory ( > > return NULL; > > } > > > > +/** > > + Get Package ID/Core ID/Thread ID of a processor. > > + > > + APIC ID must be an initial APIC ID. > > + > > + The algorithm below assumes the target system has symmetry across > > + physical package > > boundaries > > + with respect to the number of logical processors per package, > > + number of cores per > > package. > > + > > + @param ApicId APIC ID of the target logical processor. > > + @param Location Returns the processor location information. > > +**/ > > +VOID > > +SmmCpuFeaturesGetProcessorLocation ( > > + IN UINT32 ApicId, > > + OUT EFI_CPU_PHYSICAL_LOCATION *Location > > + ) > > +{ > > + UINTN ThreadBits; > > + UINTN CoreBits; > > + UINT32 RegEax; > > + UINT32 RegEbx; > > + UINT32 RegEcx; > > + UINT32 RegEdx; > > + UINT32 MaxCpuIdIndex; > > + UINT32 SubIndex; > > + UINTN LevelType; > > + UINT32 MaxLogicProcessorsPerPackage; > > + UINT32 MaxCoresPerPackage; > > + BOOLEAN TopologyLeafSupported; > > + > > + ASSERT (Location !=3D NULL); > > + > > + ThreadBits =3D 0; > > + CoreBits =3D 0; > > + TopologyLeafSupported =3D FALSE; > > + > > + // > > + // Check if the processor is capable of supporting more than one log= ical > processor. > > + // > > + AsmCpuid (CPUID_VERSION_INFO, NULL, NULL, NULL, &RegEdx); > ASSERT > > + ((RegEdx & BIT28) !=3D 0); > > + > > + // > > + // Assume three-level mapping of APIC ID: Package:Core:SMT. > > + // > > + > > + // > > + // Get the max index of basic CPUID // AsmCpuid (CPUID_SIGNATURE, > > + &MaxCpuIdIndex, NULL, NULL, NULL); > > + > > + // > > + // If the extended topology enumeration leaf is available, it // > > + is the preferred mechanism for enumerating topology. > > + // > > + if (MaxCpuIdIndex >=3D CPUID_EXTENDED_TOPOLOGY) { > > + AsmCpuidEx (CPUID_EXTENDED_TOPOLOGY, 0, &RegEax, &RegEbx, > &RegEcx, NULL); > > + // > > + // If CPUID.(EAX=3D0BH, ECX=3D0H):EBX returns zero and maximum inp= ut > value for > > + // basic CPUID information is greater than 0BH, then CPUID.0BH lea= f is > not > > + // supported on that processor. > > + // > > + if ((RegEbx & 0xffff) !=3D 0) { > > + TopologyLeafSupported =3D TRUE; > > + > > + // > > + // Sub-leaf index 0 (ECX=3D 0 as input) provides enumeration par= ameters > to extract > > + // the SMT sub-field of x2APIC ID. > > + // > > + LevelType =3D (RegEcx >> 8) & 0xff; > > + ASSERT (LevelType =3D=3D > CPUID_EXTENDED_TOPOLOGY_LEVEL_TYPE_SMT); > > + if ((RegEbx & 0xffff) > 1 ) { > > + ThreadBits =3D RegEax & 0x1f; > > + } else { > > + // > > + // HT is not supported > > + // > > + ThreadBits =3D 0; > > + } > > + > > + // > > + // Software must not assume any "level type" encoding > > + // value to be related to any sub-leaf index, except sub-leaf 0. > > + // > > + SubIndex =3D 1; > > + do { > > + AsmCpuidEx (CPUID_EXTENDED_TOPOLOGY, SubIndex, &RegEax, > NULL, &RegEcx, NULL); > > + LevelType =3D (RegEcx >> 8) & 0xff; > > + if (LevelType =3D=3D CPUID_EXTENDED_TOPOLOGY_LEVEL_TYPE_CORE) = { > > + CoreBits =3D (RegEax & 0x1f) - ThreadBits; > > + break; > > + } > > + SubIndex++; > > + } while (LevelType !=3D > CPUID_EXTENDED_TOPOLOGY_LEVEL_TYPE_INVALID); > > + } > > + } > > + > > + if (!TopologyLeafSupported) { > > + AsmCpuid (CPUID_VERSION_INFO, NULL, &RegEbx, NULL, NULL); > > + MaxLogicProcessorsPerPackage =3D (RegEbx >> 16) & 0xff; > > + if (MaxCpuIdIndex >=3D CPUID_CACHE_PARAMS) { > > + AsmCpuidEx (CPUID_CACHE_PARAMS, 0, &RegEax, NULL, NULL, > NULL); > > + MaxCoresPerPackage =3D (RegEax >> 26) + 1; > > + } else { > > + // > > + // Must be a single-core processor. > > + // > > + MaxCoresPerPackage =3D 1; > > + } > > + > > + ThreadBits =3D (UINTN) (HighBitSet32 (MaxLogicProcessorsPerPackage > > + / > > MaxCoresPerPackage - 1) + 1); > > + CoreBits =3D (UINTN) (HighBitSet32 (MaxCoresPerPackage - 1) + 1); = } > > + > > + Location->Thread =3D ApicId & ~((-1) << ThreadBits); Location->Core > > + =3D (ApicId >> ThreadBits) & ~((-1) << CoreBits); Location->Package = =3D > > + (ApicId >> (ThreadBits+ CoreBits)); } > > diff --git a/UefiCpuPkg/PiSmmCpuDxeSmm/CpuService.c > > b/UefiCpuPkg/PiSmmCpuDxeSmm/CpuService.c > > index 40f2a17..2bfb1e8 100644 > > --- a/UefiCpuPkg/PiSmmCpuDxeSmm/CpuService.c > > +++ b/UefiCpuPkg/PiSmmCpuDxeSmm/CpuService.c > > @@ -27,125 +27,6 @@ EFI_SMM_CPU_SERVICE_PROTOCOL > mSmmCpuService =3D { > > }; > > > > /** > > - Get Package ID/Core ID/Thread ID of a processor. > > - > > - APIC ID must be an initial APIC ID. > > - > > - The algorithm below assumes the target system has symmetry across > > physical package boundaries > > - with respect to the number of logical processors per package, > > number of cores per package. > > - > > - @param ApicId APIC ID of the target logical processor. > > - @param Location Returns the processor location information. > > -**/ > > -VOID > > -SmmGetProcessorLocation ( > > - IN UINT32 ApicId, > > - OUT EFI_CPU_PHYSICAL_LOCATION *Location > > - ) > > -{ > > - UINTN ThreadBits; > > - UINTN CoreBits; > > - UINT32 RegEax; > > - UINT32 RegEbx; > > - UINT32 RegEcx; > > - UINT32 RegEdx; > > - UINT32 MaxCpuIdIndex; > > - UINT32 SubIndex; > > - UINTN LevelType; > > - UINT32 MaxLogicProcessorsPerPackage; > > - UINT32 MaxCoresPerPackage; > > - BOOLEAN TopologyLeafSupported; > > - > > - ASSERT (Location !=3D NULL); > > - > > - ThreadBits =3D 0; > > - CoreBits =3D 0; > > - TopologyLeafSupported =3D FALSE; > > - > > - // > > - // Check if the processor is capable of supporting more than one log= ical > processor. > > - // > > - AsmCpuid (CPUID_VERSION_INFO, NULL, NULL, NULL, &RegEdx); > > - ASSERT ((RegEdx & BIT28) !=3D 0); > > - > > - // > > - // Assume three-level mapping of APIC ID: Package:Core:SMT. > > - // > > - > > - // > > - // Get the max index of basic CPUID > > - // > > - AsmCpuid (CPUID_SIGNATURE, &MaxCpuIdIndex, NULL, NULL, NULL); > > - > > - // > > - // If the extended topology enumeration leaf is available, it > > - // is the preferred mechanism for enumerating topology. > > - // > > - if (MaxCpuIdIndex >=3D CPUID_EXTENDED_TOPOLOGY) { > > - AsmCpuidEx (CPUID_EXTENDED_TOPOLOGY, 0, &RegEax, &RegEbx, > &RegEcx, NULL); > > - // > > - // If CPUID.(EAX=3D0BH, ECX=3D0H):EBX returns zero and maximum inp= ut > value for > > - // basic CPUID information is greater than 0BH, then CPUID.0BH lea= f is > not > > - // supported on that processor. > > - // > > - if ((RegEbx & 0xffff) !=3D 0) { > > - TopologyLeafSupported =3D TRUE; > > - > > - // > > - // Sub-leaf index 0 (ECX=3D 0 as input) provides enumeration par= ameters > to extract > > - // the SMT sub-field of x2APIC ID. > > - // > > - LevelType =3D (RegEcx >> 8) & 0xff; > > - ASSERT (LevelType =3D=3D > CPUID_EXTENDED_TOPOLOGY_LEVEL_TYPE_SMT); > > - if ((RegEbx & 0xffff) > 1 ) { > > - ThreadBits =3D RegEax & 0x1f; > > - } else { > > - // > > - // HT is not supported > > - // > > - ThreadBits =3D 0; > > - } > > - > > - // > > - // Software must not assume any "level type" encoding > > - // value to be related to any sub-leaf index, except sub-leaf 0. > > - // > > - SubIndex =3D 1; > > - do { > > - AsmCpuidEx (CPUID_EXTENDED_TOPOLOGY, SubIndex, &RegEax, > NULL, &RegEcx, NULL); > > - LevelType =3D (RegEcx >> 8) & 0xff; > > - if (LevelType =3D=3D CPUID_EXTENDED_TOPOLOGY_LEVEL_TYPE_CORE) = { > > - CoreBits =3D (RegEax & 0x1f) - ThreadBits; > > - break; > > - } > > - SubIndex++; > > - } while (LevelType !=3D > CPUID_EXTENDED_TOPOLOGY_LEVEL_TYPE_INVALID); > > - } > > - } > > - > > - if (!TopologyLeafSupported) { > > - AsmCpuid (CPUID_VERSION_INFO, NULL, &RegEbx, NULL, NULL); > > - MaxLogicProcessorsPerPackage =3D (RegEbx >> 16) & 0xff; > > - if (MaxCpuIdIndex >=3D CPUID_CACHE_PARAMS) { > > - AsmCpuidEx (CPUID_CACHE_PARAMS, 0, &RegEax, NULL, NULL, NULL); > > - MaxCoresPerPackage =3D (RegEax >> 26) + 1; > > - } else { > > - // > > - // Must be a single-core processor. > > - // > > - MaxCoresPerPackage =3D 1; > > - } > > - > > - ThreadBits =3D (UINTN) (HighBitSet32 (MaxLogicProcessorsPerPackage= / > > MaxCoresPerPackage - 1) + 1); > > - CoreBits =3D (UINTN) (HighBitSet32 (MaxCoresPerPackage - 1) + 1); > > - } > > - > > - Location->Thread =3D ApicId & ~((-1) << ThreadBits); > > - Location->Core =3D (ApicId >> ThreadBits) & ~((-1) << CoreBits); > > - Location->Package =3D (ApicId >> (ThreadBits+ CoreBits)); -} > > - > > -/** > > Gets processor information on the requested processor at the > > instant this call is made. > > > > @param[in] This A pointer to the > EFI_SMM_CPU_SERVICE_PROTOCOL > > instance. > > @@ -280,7 +161,7 @@ SmmAddProcessor ( > > gSmmCpuPrivate->ProcessorInfo[Index].ProcessorId =3D=3D > INVALID_APIC_ID) { > > gSmmCpuPrivate->ProcessorInfo[Index].ProcessorId =3D ProcessorId= ; > > gSmmCpuPrivate->ProcessorInfo[Index].StatusFlag =3D 0; > > - SmmGetProcessorLocation ((UINT32)ProcessorId, &gSmmCpuPrivate- > > >ProcessorInfo[Index].Location); > > + SmmCpuFeaturesGetProcessorLocation ((UINT32)ProcessorId, > > + &gSmmCpuPrivate- > > >ProcessorInfo[Index].Location); > > > > *ProcessorNumber =3D Index; > > gSmmCpuPrivate->Operation[Index] =3D SmmCpuAdd; > > -- > > 1.9.1 > > > > _______________________________________________ > > edk2-devel mailing list > > edk2-devel@lists.01.org > > https://lists.01.org/mailman/listinfo/edk2-devel