Re: [PATCH V2 2/2] UefiPayloadPkg/Pci: Use the PCIE Base Addr stored in AcpiBoardInfo HOB

["Ma, Maurice" <maurice.ma@intel.com>]

Hi, Ray,

I noticed in this V2 patch, you removed the following line from the DSC file.
    gEfiMdePkgTokenSpaceGuid.PcdPciExpressBaseAddress|$(PCIE_BASE)
It will make the PcdPciExpressBaseAddress become PcdsFixedAtBuild type instead of PcdsDynamicDefault.   Is this your intention ?

Also this V2 patch forced PcdLib class instance to be BasePciLibCf8.  It means all PCI configuration space access will use I/O port access.  We prefer using BasePciSegmentLibPci.   I think we should keep the original code for this so that it is configurable.

Also can we sync up DSC changes into UefiPayloadPkgIa32.dsc as well ?

Thanks
Maurice
> -----Original Message-----
> From: Ni, Ray <ray.ni@intel.com>
> Sent: Wednesday, June 3, 2020 20:27
> To: devel@edk2.groups.io
> Cc: Ma, Maurice <maurice.ma@intel.com>; Dong, Guo <guo.dong@intel.com>;
> You, Benjamin <benjamin.you@intel.com>
> Subject: [PATCH V2 2/2] UefiPayloadPkg/Pci: Use the PCIE Base Addr stored in
> AcpiBoardInfo HOB
> 
> Today's UefiPayloadPkg always uses 0xE0000000 as the PCIE base address and
> ignores the value set in AcpiBoardInfo HOB created by the boot loader. This
> makes the payload binary cannot work in environment where the PCIE base
> address set by boot loader doesn't equal to 0xE0000000.
> 
> The patch enhances UefiPayloadPkg so that the PCIE base address set by boot
> loader in the AcpiBoardInfo HOB is used.
> 
> Signed-off-by: Ray Ni <ray.ni@intel.com>
> Cc: Maurice Ma <maurice.ma@intel.com>
> Cc: Guo Dong <guo.dong@intel.com>
> Cc: Benjamin You <benjamin.you@intel.com>
> ---
>  .../PciSegmentInfoLibAcpiBoardInfo.c          | 59 +++++++++++++++++++
>  .../PciSegmentInfoLibAcpiBoardInfo.inf        | 36 +++++++++++
>  UefiPayloadPkg/UefiPayloadPkgIa32X64.dsc      | 16 +----
>  3 files changed, 98 insertions(+), 13 deletions(-)  create mode 100644
> UefiPayloadPkg/Library/PciSegmentInfoLibAcpiBoardInfo/PciSegmentInfoLibAc
> piBoardInfo.c
>  create mode 100644
> UefiPayloadPkg/Library/PciSegmentInfoLibAcpiBoardInfo/PciSegmentInfoLibAc
> piBoardInfo.inf
> 
> diff --git
> a/UefiPayloadPkg/Library/PciSegmentInfoLibAcpiBoardInfo/PciSegmentInfoLib
> AcpiBoardInfo.c
> b/UefiPayloadPkg/Library/PciSegmentInfoLibAcpiBoardInfo/PciSegmentInfoLib
> AcpiBoardInfo.c
> new file mode 100644
> index 0000000000..d37c91cc9f
> --- /dev/null
> +++ b/UefiPayloadPkg/Library/PciSegmentInfoLibAcpiBoardInfo/PciSegmentIn
> +++ foLibAcpiBoardInfo.c
> @@ -0,0 +1,59 @@
> +/** @file+  PCI Segment Information Library that returns one segment
> whose+  segment base address is retrieved from AcpiBoardInfo HOB.++
> Copyright (c) 2020, Intel Corporation. All rights reserved.<BR>+  SPDX-License-
> Identifier: BSD-2-Clause-Patent++**/++#include <PiDxe.h>+#include
> <Guid/AcpiBoardInfoGuid.h>++#include <Library/HobLib.h>+#include
> <Library/PciSegmentInfoLib.h>+#include <Library/DebugLib.h>++STATIC
> PCI_SEGMENT_INFO mPciSegment0 = {+  0,  // Segment number+  0,  // To be
> fixed later+  0,  // Start bus number+  255 // End bus number+};++/**+  Return
> an array of PCI_SEGMENT_INFO holding the segment information.++  Note: The
> returned array/buffer is owned by callee.++  @param  Count  Return the count
> of segments.++  @retval A callee owned array holding the segment
> information.+**/+PCI_SEGMENT_INFO *+EFIAPI+GetPciSegmentInfo (+  UINTN
> *Count+  )+{+  EFI_HOB_GUID_TYPE  *GuidHob;+  ACPI_BOARD_INFO
> *AcpiBoardInfo;++  ASSERT (Count != NULL);+  if (Count == NULL) {+    return
> NULL;+  }++  if (mPciSegment0.BaseAddress == 0) {+    //+    // Find the acpi
> board information guid hob+    //+    GuidHob = GetFirstGuidHob
> (&gUefiAcpiBoardInfoGuid);+    ASSERT (GuidHob != NULL);++    AcpiBoardInfo =
> (ACPI_BOARD_INFO *) GET_GUID_HOB_DATA (GuidHob);+
> mPciSegment0.BaseAddress = AcpiBoardInfo->PcieBaseAddress;+  }+  *Count =
> 1;+  return &mPciSegment0;+}diff --git
> a/UefiPayloadPkg/Library/PciSegmentInfoLibAcpiBoardInfo/PciSegmentInfoLib
> AcpiBoardInfo.inf
> b/UefiPayloadPkg/Library/PciSegmentInfoLibAcpiBoardInfo/PciSegmentInfoLib
> AcpiBoardInfo.inf
> new file mode 100644
> index 0000000000..ec4dbaaa55
> --- /dev/null
> +++ b/UefiPayloadPkg/Library/PciSegmentInfoLibAcpiBoardInfo/PciSegmentIn
> +++ foLibAcpiBoardInfo.inf
> @@ -0,0 +1,36 @@
> +## @file+#   PCI Segment Information Library that returns one segment
> whose+#   segment base address is retrieved from AcpiBoardInfo HOB.+#+#
> Copyright (c) 2020, Intel Corporation. All rights reserved.<BR>+#+#  SPDX-
> License-Identifier: BSD-2-Clause-Patent+#+#+##++[Defines]+  INF_VERSION
> = 0x00010005+  BASE_NAME                      = PciSegmentInfoLibAcpiBoardInfo+
> FILE_GUID                      = 0EA82AA2-6C36-4FD5-BC90-FFA3ECB5E0CE+
> MODULE_TYPE                    = BASE+  VERSION_STRING                 = 1.0+
> LIBRARY_CLASS                  = PciSegmentInfoLib | DXE_DRIVER++#+# The
> following information is for reference only and not required by the build
> tools.+#+#  VALID_ARCHITECTURES           = IA32 X64 EBC+#++[Sources]+
> PciSegmentInfoLibAcpiBoardInfo.c++[Packages]+  MdePkg/MdePkg.dec+
> UefiPayloadPkg/UefiPayloadPkg.dec++[LibraryClasses]+  PcdLib+  HobLib+
> DebugLibdiff --git a/UefiPayloadPkg/UefiPayloadPkgIa32X64.dsc
> b/UefiPayloadPkg/UefiPayloadPkgIa32X64.dsc
> index 0736cd9954..62d680eb79 100644
> --- a/UefiPayloadPkg/UefiPayloadPkgIa32X64.dsc
> +++ b/UefiPayloadPkg/UefiPayloadPkgIa32X64.dsc
> @@ -3,7 +3,7 @@
>  # # Provides drivers and definitions to create uefi payload for bootloaders. #-#
> Copyright (c) 2014 - 2019, Intel Corporation. All rights reserved.<BR>+#
> Copyright (c) 2014 - 2020, Intel Corporation. All rights reserved.<BR> # SPDX-
> License-Identifier: BSD-2-Clause-Patent # ##@@ -38,11 +38,6 @@ [Defines]
>    #   DEFINE MAX_LOGICAL_PROCESSORS       = 64 -  #-  # PCI options-  #-
> DEFINE PCIE_BASE                    = 0xE0000000-   #   # Serial port set up   #@@ -
> 122,14 +117,10 @@ [LibraryClasses]
>    PrintLib|MdePkg/Library/BasePrintLib/BasePrintLib.inf
> CpuLib|MdePkg/Library/BaseCpuLib/BaseCpuLib.inf
> IoLib|MdePkg/Library/BaseIoLibIntrinsic/BaseIoLibIntrinsic.inf-!if $(PCIE_BASE)
> == 0   PciLib|MdePkg/Library/BasePciLibCf8/BasePciLibCf8.inf
> PciCf8Lib|MdePkg/Library/BasePciCf8Lib/BasePciCf8Lib.inf-!else-
> PciLib|MdePkg/Library/BasePciLibPciExpress/BasePciLibPciExpress.inf-
> PciExpressLib|MdePkg/Library/BasePciExpressLib/BasePciExpressLib.inf-!endif-
> PciSegmentLib|MdePkg/Library/BasePciSegmentLibPci/BasePciSegmentLibPci.i
> nf+
> PciSegmentLib|MdePkg/Library/PciSegmentLibSegmentInfo/BasePciSegmentLi
> bSegmentInfo.inf+
> PciSegmentInfoLib|UefiPayloadPkg/Library/PciSegmentInfoLibAcpiBoardInfo/Pc
> iSegmentInfoLibAcpiBoardInfo.inf
> PeCoffLib|MdePkg/Library/BasePeCoffLib/BasePeCoffLib.inf
> PeCoffGetEntryPointLib|MdePkg/Library/BasePeCoffGetEntryPointLib/BasePeC
> offGetEntryPointLib.inf
> CacheMaintenanceLib|MdePkg/Library/BaseCacheMaintenanceLib/BaseCache
> MaintenanceLib.inf@@ -288,7 +279,6 @@ [PcdsFixedAtBuild]
>    gEfiMdeModulePkgTokenSpaceGuid.PcdUse1GPageTable|TRUE
> gEfiMdeModulePkgTokenSpaceGuid.PcdBootManagerMenuFile|{ 0x21, 0xaa,
> 0x2c, 0x46, 0x14, 0x76, 0x03, 0x45, 0x83, 0x6e, 0x8a, 0xb6, 0xf4, 0x66, 0x23,
> 0x31 } -
> gEfiMdePkgTokenSpaceGuid.PcdPciExpressBaseAddress|$(PCIE_BASE)  !if
> $(SOURCE_DEBUG_ENABLE)
> gEfiSourceLevelDebugPkgTokenSpaceGuid.PcdDebugLoadImageMethod|0x2--
> 2.26.2.windows.1