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charset="us-ascii" Content-Transfer-Encoding: quoted-printable Hi, Guo, Thank for making this changes to simplify the UEFI payload flow. Below are some of my comments: UefiPayloadPkg\Library\HobLib\Hob.c - Please add function comment block for HobConstructor(), CreateHob() and = BuildFvHobs(). UefiPayloadPkg\UefiPayloadPkg.fdf - Please update copyright year to 2020 UefiPayloadPkg\UefiPayloadEntry\Ia32\DxeLoadFunc.c - Line #304 and #305, please fix line indentation. - Line #360, please add code to halt the execution flow in release build s= ince ASSERT() will be removed in release build. UefiPayloadPkg\UefiPayloadEntry\LoadDxeCore.c - Please add function comment block for AllocateCodePages() and LoadPeCoff= Image(). - In function LoadPeCoffImage(), please enhance error handling. ASSERT() a= lone is not sufficient to handle error condition. UefiPayloadEntry\UefiPayloadEntry.c - Please add function comment block for MemInfoCallback(). Thanks Maurice > -----Original Message----- > From: devel@edk2.groups.io On Behalf Of Guo Dong > Sent: Tuesday, November 10, 2020 11:39 AM > To: devel@edk2.groups.io > Cc: Ma, Maurice ; You, Benjamin > > Subject: [edk2-devel] [PATCH] UefiPayloadPkg: Remove PEI phase from Payl= oad >=20 > It is not necessary to have a PEI phase in the UEFI payload since no > specific PEI task is required. This patch adds a UefiPayloadEntry > driver to get UEFI Payload required information from the bootloaders, > convert them into a HOB list, load DXE core and transfer control to it. >=20 > Here is the change details: > 1) Removed PEI phase, including Peicore, BlSupportPei, SecCore, etc. > 2) Added UefiPayloadEntry driver. this is the only driver before DXE cor= e. > 3) Added Pure X64 support, dropped Pure IA32 (Could add later if require= d) > 64bit payload with 32bit entry point is still supported. > 4) Use one DSC file UefiPayloadPkg.dsc to support X64 and IA32X64 build. > Removed UefiPayloadIa32.dsc and UefiPayloadIa32X64.dsc >=20 > Tested with SBL and coreboot on QEMU. >=20 > Signed-off-by: Guo Dong > --- > UefiPayloadPkg/BlSupportPei/BlSupportPei.h = | 39 -------- > ------------------------------- > UefiPayloadPkg/BlSupportPei/BlSupportPei.inf = | 73 -------- > ----------------------------------------------------------------- > UefiPayloadPkg/BuildAndIntegrationInstructions.txt = | 32 > +++++++++++++++----------------- > UefiPayloadPkg/Include/Library/BlParseLib.h = | 4 ++-- > UefiPayloadPkg/Library/HobLib/Hob.c = | 680 > +++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++ > +++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++ > +++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++ > +++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++ > +++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++ > +++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++ > +++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++ > +++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++ > +++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++ > +++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++ > +++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++ > +++++++++ > UefiPayloadPkg/Library/HobLib/HobLib.inf = | 39 > +++++++++++++++++++++++++++++++++++++++ > UefiPayloadPkg/SecCore/FindPeiCore.c = | 193 ----------- > ------------------------------------------------------------------------= ------------------------------ > ------------------------------------------------------------------------= -------- > UefiPayloadPkg/SecCore/Ia32/SecEntry.nasm = | 78 ------- > ----------------------------------------------------------------------- > UefiPayloadPkg/SecCore/Ia32/Stack.nasm = | 72 --------- > --------------------------------------------------------------- > UefiPayloadPkg/SecCore/SecCore.inf = | 58 -------------- > -------------------------------------------- > UefiPayloadPkg/SecCore/SecMain.c = | 288 ------------- > ------------------------------------------------------------------------= ------------------------------ > ------------------------------------------------------------------------= ------------------------------ > ----------------------------------------------------------------------- > UefiPayloadPkg/SecCore/SecMain.h = | 131 ------------ > ------------------------------------------------------------------------= ------------------------------ > ----------------- > UefiPayloadPkg/UefiPayloadEntry/Ia32/DxeLoadFunc.c = | 364 > +++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++ > +++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++ > +++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++ > +++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++ > +++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++ > +++++++++++++++++++++++++++++++++++++++++++++++++++++++++++ > UefiPayloadPkg/UefiPayloadEntry/Ia32/IdtVectorAsm.nasm = | > 71 > +++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++ > ++++++++++ > UefiPayloadPkg/UefiPayloadEntry/Ia32/SecEntry.nasm = | 46 > ++++++++++++++++++++++++++++++++++++++++++++++ > UefiPayloadPkg/UefiPayloadEntry/LoadDxeCore.c = | 280 > +++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++ > +++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++ > +++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++ > +++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++ > ++++++++++++++++++++++++++++++++++++ > UefiPayloadPkg/UefiPayloadEntry/MemoryAllocation.c = | 201 > +++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++ > +++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++ > +++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++ > ++++++++++++++++++ > UefiPayloadPkg/{BlSupportPei/BlSupportPei.c =3D> > UefiPayloadEntry/UefiPayloadEntry.c} | 446 > +++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++ > +++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++ > ++++++++++++++++++++++--------------------------------------------------= --------------- > ------------------------------------------------------------------------= ------------------------------ > ------------------------------------------------------------------------= ------------------------------ > --------------------------------- > UefiPayloadPkg/UefiPayloadEntry/UefiPayloadEntry.h = | 85 > +++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++ > ++++++++++++++++++++++++ > UefiPayloadPkg/UefiPayloadEntry/UefiPayloadEntry.inf = | 91 > +++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++ > ++++++++++++++++++++++++++++++ > UefiPayloadPkg/UefiPayloadEntry/X64/DxeLoadFunc.c = | 98 > +++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++ > +++++++++++++++++++++++++++++++++++++ > UefiPayloadPkg/UefiPayloadEntry/X64/SecEntry.nasm = | 47 > +++++++++++++++++++++++++++++++++++++++++++++++ > UefiPayloadPkg/UefiPayloadEntry/X64/VirtualMemory.c = | > 904 > +++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++ > +++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++ > +++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++ > +++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++ > +++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++ > +++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++ > +++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++ > +++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++ > +++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++ > +++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++ > +++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++ > +++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++ > +++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++ > +++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++ > ++++++++++++++++++++++++++++++++++++++++++++++++++ > UefiPayloadPkg/UefiPayloadEntry/X64/VirtualMemory.h = | > 322 > +++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++ > +++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++ > +++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++ > +++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++ > +++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++ > +++++++++++++++++ > UefiPayloadPkg/UefiPayloadPkg.dec = | 5 +++-- > UefiPayloadPkg/{UefiPayloadPkgIa32X64.dsc =3D> UefiPayloadPkg.dsc} > | 57 +++++++++++++++------------------------------------------ > UefiPayloadPkg/UefiPayloadPkg.fdf = | 30 ++++++++- > --------------------- > UefiPayloadPkg/UefiPayloadPkgIa32.dsc = | 585 ---------- > ------------------------------------------------------------------------= ------------------------------ > ------------------------------------------------------------------------= ------------------------------ > ------------------------------------------------------------------------= ------------------------------ > ------------------------------------------------------------------------= ------------------------------ > ------------------------------------------------------------------------= ------------------------------ > ----------------------------------------------------------------- > 28 files changed, 3415 insertions(+), 1904 deletions(-) >=20 > diff --git a/UefiPayloadPkg/BlSupportPei/BlSupportPei.h > b/UefiPayloadPkg/BlSupportPei/BlSupportPei.h > deleted file mode 100644 > index d11a3570a1..0000000000 > --- a/UefiPayloadPkg/BlSupportPei/BlSupportPei.h > +++ /dev/null > @@ -1,39 +0,0 @@ > -/** @file > - The header file of bootloader support PEIM. > - > -Copyright (c) 2014 - 2019, Intel Corporation. All rights reserved.
> -SPDX-License-Identifier: BSD-2-Clause-Patent > - > -**/ > - > - > -#ifndef __PEI_BOOTLOADER_SUPPORT_H__ > -#define __PEI_BOOTLOADER_SUPPORT_H__ > - > -#include > -#include > -#include > -#include > -#include > -#include > -#include > -#include > -#include > -#include > -#include > -#include > -#include > -#include > -#include > -#include > -#include > -#include > -#include > -#include > - > -typedef struct { > - UINT32 UsableLowMemTop; > - UINT32 SystemLowMemTop; > -} PAYLOAD_MEM_INFO; > - > -#endif > diff --git a/UefiPayloadPkg/BlSupportPei/BlSupportPei.inf > b/UefiPayloadPkg/BlSupportPei/BlSupportPei.inf > deleted file mode 100644 > index 711fe63fe6..0000000000 > --- a/UefiPayloadPkg/BlSupportPei/BlSupportPei.inf > +++ /dev/null > @@ -1,73 +0,0 @@ > -## @file > -# Bootloader Support PEI Module > -# > -# Parses bootloader information and report resource information into pe= i core. > It will install > -# the memory as required. > -# > -# Copyright (c) 2014 - 2019, Intel Corporation. All rights reserved. > -# > -# SPDX-License-Identifier: BSD-2-Clause-Patent > -# > -## > - > -[Defines] > - INF_VERSION =3D 0x00010005 > - BASE_NAME =3D BlSupportPeim > - FILE_GUID =3D 352C6AF8-315B-4bd6-B04F-31D4ED1EBE= 57 > - MODULE_TYPE =3D PEIM > - VERSION_STRING =3D 1.0 > - ENTRY_POINT =3D BlPeiEntryPoint > - > -# > -# The following information is for reference only and not required by t= he build > tools. > -# > -# VALID_ARCHITECTURES =3D IA32 X64 > -# > - > -[Sources] > - BlSupportPei.c > - BlSupportPei.h > - > -[Packages] > - MdePkg/MdePkg.dec > - MdeModulePkg/MdeModulePkg.dec > - IntelFsp2Pkg/IntelFsp2Pkg.dec > - IntelFsp2WrapperPkg/IntelFsp2WrapperPkg.dec > - UefiPayloadPkg/UefiPayloadPkg.dec > - UefiCpuPkg/UefiCpuPkg.dec > - > -[LibraryClasses] > - PeimEntryPoint > - PeiServicesLib > - BaseLib > - BaseMemoryLib > - DebugLib > - HobLib > - PcdLib > - BlParseLib > - MtrrLib > - IoLib > - PlatformSupportLib > - > -[Guids] > - gEfiMemoryTypeInformationGuid > - gEfiFirmwareFileSystem2Guid > - gUefiSystemTableInfoGuid > - gEfiGraphicsInfoHobGuid > - gEfiGraphicsDeviceInfoHobGuid > - gUefiAcpiBoardInfoGuid > - > -[Ppis] > - gEfiPeiMasterBootModePpiGuid > - > -[Pcd] > - gUefiPayloadPkgTokenSpaceGuid.PcdPayloadFdMemBase > - gUefiPayloadPkgTokenSpaceGuid.PcdPayloadFdMemSize > - gUefiPayloadPkgTokenSpaceGuid.PcdMemoryTypeEfiACPIReclaimMemory > - gUefiPayloadPkgTokenSpaceGuid.PcdMemoryTypeEfiACPIMemoryNVS > - gUefiPayloadPkgTokenSpaceGuid.PcdMemoryTypeEfiReservedMemoryType > - gUefiPayloadPkgTokenSpaceGuid.PcdMemoryTypeEfiRuntimeServicesData > - gUefiPayloadPkgTokenSpaceGuid.PcdMemoryTypeEfiRuntimeServicesCode > - > -[Depex] > - TRUE > diff --git a/UefiPayloadPkg/BuildAndIntegrationInstructions.txt > b/UefiPayloadPkg/BuildAndIntegrationInstructions.txt > index 2cacd48904..7512486590 100644 > --- a/UefiPayloadPkg/BuildAndIntegrationInstructions.txt > +++ b/UefiPayloadPkg/BuildAndIntegrationInstructions.txt > @@ -1,6 +1,6 @@ >=20 > =3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D= = =3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D= =3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D > =3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D > Build And Integration Instructions > -2019 March 27th > +2020 Aug 1st >=20 > =3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D= = =3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D= =3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D > =3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D >=20 >=20 > =3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D= = =3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D= =3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D > =3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D > @@ -35,27 +35,25 @@ integrate it into coreboot or Slim Bootloader firmwa= re. > B. HOW TO BUILD >=20 > =3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D= = =3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D= =3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D > =3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D > 1. Run the below two commands in windows command prompt window: > - edksetup.bat > + > edksetup.bat >=20 > - For debug ia32 build: > - build -a IA32 -p UefiPayloadPkg\UefiPayloadPkgIa32.dsc -b DEBUG -t > -D BOOTLOADER=3D > + For pure X64 build: > + > build -a x64 -p UefiPayloadPkg\UefiPayloadPkg.dsc -b -= t > > + -D BOOTLOADER=3D >=20 > - For release ia32 build: > - build -a IA32 -p UefiPayloadPkg\UefiPayloadPkgIa32.dsc -b RELEASE -t > -D BOOTLOADER=3D > + For X64 build with IA32 entry point: > + > build -a IA32 -a X64 -p UefiPayloadPkg\UefiPayloadPkg.dsc -b > -t > + -D BOOTLOADER=3D >=20 > - For debug X64 build: > - build -a IA32 -a X64 -p UefiPayloadPkg\UefiPayloadPkgIa32X64.dsc -b = DEBUG > -t -D BOOTLOADER=3D > - > - For release X64 build: > - build -a IA32 -a X64 -p UefiPayloadPkg\UefiPayloadPkgIa32X64.dsc -b > RELEASE -t -D BOOTLOADER=3D > - > - is the EDK II build environment on your host. Currently = it was > tested > - with VS2015x86 toolchain. > + support 'DEBUG', 'RELEASE' and 'NOOPT'. > + is the EDK II build environment on your host. Tested wit= h > VS2015x86 toolchain. > could be "SBL" for Slim Bootloader and "COREBOOT" for > coreboot. >=20 > Refer to https://github.com/tianocore/tianocore.github.io/wiki/UDK20= 18- > How-to-Build for > details about EDK II build steps. >=20 > + NOTE: Pure 32bit UEFI payload support could be added if required lat= er. > + > 2. If build is successfully, the payload image (UEFIPAYLOAD.fd) will be > generated inside the > folder of Build\UefiPayloadPkg. >=20 > @@ -65,9 +63,9 @@ C. HOW TO INTEGRATE INTO COREBOOT > 1. Copy the payload image (UEFIPAYLOAD.fd) into the top-level directory= of > Coreboot source tree. > 2. Run "make menuconfig" in linux console to start Coreboot configurati= on > surface. > 3. In the Payload section, > - 1) Choose "An ELF executable payload" for the option of "Add a paylo= ad". > - 2) Type the path of payload image for the option of "Payload path an= d > filename". > - 3) Select the option of "Use LZMA compression for payloads". > + 1) Choose "Tianocore Payload" for the option of "Add a payload". > + 2) Update the path of payload image for the option of "Tianocore bin= ary". > + 3) Choose "UEFIPayload" for the option of "Tianocore Payload". > 4. If the graphics console is required in UEFI payload, enable framebuf= fer > initialization in coreboot. > This could be done by enabling native graphics or using VGA BIOS opt= ion rom. > 5. Build the coreboot firmware image. > diff --git a/UefiPayloadPkg/Include/Library/BlParseLib.h > b/UefiPayloadPkg/Include/Library/BlParseLib.h > index 3f9e591ede..20a526d15c 100644 > --- a/UefiPayloadPkg/Include/Library/BlParseLib.h > +++ b/UefiPayloadPkg/Include/Library/BlParseLib.h > @@ -2,7 +2,7 @@ > This library will parse the coreboot table in memory and extract thos= e required > information. >=20 > - Copyright (c) 2014 - 2019, Intel Corporation. All rights reserved. > + Copyright (c) 2014 - 2020, Intel Corporation. All rights reserved. > SPDX-License-Identifier: BSD-2-Clause-Patent >=20 > **/ > @@ -16,7 +16,7 @@ > #ifndef __BOOTLOADER_PARSE_LIB__ > #define __BOOTLOADER_PARSE_LIB__ >=20 > -#define GET_BOOTLOADER_PARAMETER() (*(UINT32 > *)(UINTN)(PcdGet32(PcdPayloadStackTop) - sizeof(UINT32))) > +#define GET_BOOTLOADER_PARAMETER() (*(UINTN > *)(UINTN)(PcdGet32(PcdPayloadStackTop) - sizeof(UINT64))) > #define SET_BOOTLOADER_PARAMETER(Value) > GET_BOOTLOADER_PARAMETER()=3DValue >=20 > typedef RETURN_STATUS \ > diff --git a/UefiPayloadPkg/Library/HobLib/Hob.c > b/UefiPayloadPkg/Library/HobLib/Hob.c > new file mode 100644 > index 0000000000..308fca5c23 > --- /dev/null > +++ b/UefiPayloadPkg/Library/HobLib/Hob.c > @@ -0,0 +1,680 @@ > +/** @file > + > + Copyright (c) 2010, Apple Inc. All rights reserved.
> + Copyright (c) 2017 - 2020, Intel Corporation. All rights reserved. > + > + SPDX-License-Identifier: BSD-2-Clause-Patent > + > +**/ > + > +#include > + > +#include > +#include > +#include > +#include > +#include > + > +VOID *mHobList; > + > +/** > + Returns the pointer to the HOB list. > + > + This function returns the pointer to first HOB in the list. > + > + @return The pointer to the HOB list. > + > +**/ > +VOID * > +EFIAPI > +GetHobList ( > + VOID > + ) > +{ > + ASSERT (mHobList !=3D NULL); > + return mHobList; > +} > + > +EFI_HOB_HANDOFF_INFO_TABLE* > +EFIAPI > +HobConstructor ( > + IN VOID *EfiMemoryBegin, > + IN UINTN EfiMemoryLength, > + IN VOID *EfiFreeMemoryBottom, > + IN VOID *EfiFreeMemoryTop > + ) > +{ > + EFI_HOB_HANDOFF_INFO_TABLE *Hob; > + EFI_HOB_GENERIC_HEADER *HobEnd; > + > + Hob =3D EfiFreeMemoryBottom; > + HobEnd =3D (EFI_HOB_GENERIC_HEADER *)(Hob+1); > + > + Hob->Header.HobType =3D EFI_HOB_TYPE_HANDOFF; > + Hob->Header.HobLength =3D sizeof(EFI_HOB_HANDOFF_INFO_TABLE); > + Hob->Header.Reserved =3D 0; > + > + HobEnd->HobType =3D EFI_HOB_TYPE_END_OF_HOB_LIST; > + HobEnd->HobLength =3D sizeof(EFI_HOB_GENERIC_HEADER); > + HobEnd->Reserved =3D 0; > + > + Hob->Version =3D EFI_HOB_HANDOFF_TABLE_VERSION; > + Hob->BootMode =3D BOOT_WITH_FULL_CONFIGURATION; > + > + Hob->EfiMemoryTop =3D (UINTN)EfiMemoryBegin + EfiMemoryLength; > + Hob->EfiMemoryBottom =3D (UINTN)EfiMemoryBegin; > + Hob->EfiFreeMemoryTop =3D (UINTN)EfiFreeMemoryTop; > + Hob->EfiFreeMemoryBottom =3D > (EFI_PHYSICAL_ADDRESS)(UINTN)(HobEnd+1); > + Hob->EfiEndOfHobList =3D (EFI_PHYSICAL_ADDRESS)(UINTN)HobEnd; > + > + mHobList =3D Hob; > + return Hob; > +} > + > +VOID * > +EFIAPI > +CreateHob ( > + IN UINT16 HobType, > + IN UINT16 HobLength > + ) > +{ > + EFI_HOB_HANDOFF_INFO_TABLE *HandOffHob; > + EFI_HOB_GENERIC_HEADER *HobEnd; > + EFI_PHYSICAL_ADDRESS FreeMemory; > + VOID *Hob; > + > + HandOffHob =3D GetHobList (); > + > + HobLength =3D (UINT16)((HobLength + 0x7) & (~0x7)); > + > + FreeMemory =3D HandOffHob->EfiFreeMemoryTop - HandOffHob- > >EfiFreeMemoryBottom; > + > + if (FreeMemory < HobLength) { > + return NULL; > + } > + > + Hob =3D (VOID*) (UINTN) HandOffHob->EfiEndOfHobList; > + ((EFI_HOB_GENERIC_HEADER*) Hob)->HobType =3D HobType; > + ((EFI_HOB_GENERIC_HEADER*) Hob)->HobLength =3D HobLength; > + ((EFI_HOB_GENERIC_HEADER*) Hob)->Reserved =3D 0; > + > + HobEnd =3D (EFI_HOB_GENERIC_HEADER*) ((UINTN)Hob + HobLength); > + HandOffHob->EfiEndOfHobList =3D (EFI_PHYSICAL_ADDRESS) (UINTN) HobEnd= ; > + > + HobEnd->HobType =3D EFI_HOB_TYPE_END_OF_HOB_LIST; > + HobEnd->HobLength =3D sizeof(EFI_HOB_GENERIC_HEADER); > + HobEnd->Reserved =3D 0; > + HobEnd++; > + HandOffHob->EfiFreeMemoryBottom =3D (EFI_PHYSICAL_ADDRESS) (UINTN) > HobEnd; > + > + return Hob; > +} > + > +/** > + Builds a HOB that describes a chunk of system memory. > + > + This function builds a HOB that describes a chunk of system memory. > + If there is no additional space for HOB creation, then ASSERT(). > + > + @param ResourceType The type of resource described by this HO= B. > + @param ResourceAttribute The resource attributes of the memory > described by this HOB. > + @param PhysicalStart The 64 bit physical address of memory des= cribed > by this HOB. > + @param NumberOfBytes The length of the memory described by thi= s > HOB in bytes. > + > +**/ > +VOID > +EFIAPI > +BuildResourceDescriptorHob ( > + IN EFI_RESOURCE_TYPE ResourceType, > + IN EFI_RESOURCE_ATTRIBUTE_TYPE ResourceAttribute, > + IN EFI_PHYSICAL_ADDRESS PhysicalStart, > + IN UINT64 NumberOfBytes > + ) > +{ > + EFI_HOB_RESOURCE_DESCRIPTOR *Hob; > + > + Hob =3D CreateHob (EFI_HOB_TYPE_RESOURCE_DESCRIPTOR, sizeof > (EFI_HOB_RESOURCE_DESCRIPTOR)); > + ASSERT(Hob !=3D NULL); > + > + Hob->ResourceType =3D ResourceType; > + Hob->ResourceAttribute =3D ResourceAttribute; > + Hob->PhysicalStart =3D PhysicalStart; > + Hob->ResourceLength =3D NumberOfBytes; > +} > + > +VOID > +EFIAPI > +BuildFvHobs ( > + IN EFI_PHYSICAL_ADDRESS PhysicalStart, > + IN UINT64 NumberOfBytes, > + IN EFI_RESOURCE_ATTRIBUTE_TYPE *ResourceAttribute > + ) > +{ > + > + EFI_RESOURCE_ATTRIBUTE_TYPE Resource; > + > + BuildFvHob (PhysicalStart, NumberOfBytes); > + > + if (ResourceAttribute =3D=3D NULL) { > + Resource =3D (EFI_RESOURCE_ATTRIBUTE_PRESENT | > + EFI_RESOURCE_ATTRIBUTE_INITIALIZED | > + EFI_RESOURCE_ATTRIBUTE_TESTED | > + EFI_RESOURCE_ATTRIBUTE_WRITE_BACK_CACHEABLE); > + } else { > + Resource =3D *ResourceAttribute; > + } > + > + BuildResourceDescriptorHob (EFI_RESOURCE_FIRMWARE_DEVICE, Resource, > PhysicalStart, NumberOfBytes); > +} > + > +/** > + Returns the next instance of a HOB type from the starting HOB. > + > + This function searches the first instance of a HOB type from the star= ting HOB > pointer. > + If there does not exist such HOB type from the starting HOB pointer, = it will > return NULL. > + In contrast with macro GET_NEXT_HOB(), this function does not skip th= e > starting HOB pointer > + unconditionally: it returns HobStart back if HobStart itself meets th= e > requirement; > + caller is required to use GET_NEXT_HOB() if it wishes to skip current= HobStart. > + If HobStart is NULL, then ASSERT(). > + > + @param Type The HOB type to return. > + @param HobStart The starting HOB pointer to search from. > + > + @return The next instance of a HOB type from the starting HOB. > + > +**/ > +VOID * > +EFIAPI > +GetNextHob ( > + IN UINT16 Type, > + IN CONST VOID *HobStart > + ) > +{ > + EFI_PEI_HOB_POINTERS Hob; > + > + ASSERT (HobStart !=3D NULL); > + > + Hob.Raw =3D (UINT8 *) HobStart; > + // > + // Parse the HOB list until end of list or matching type is found. > + // > + while (!END_OF_HOB_LIST (Hob)) { > + if (Hob.Header->HobType =3D=3D Type) { > + return Hob.Raw; > + } > + Hob.Raw =3D GET_NEXT_HOB (Hob); > + } > + return NULL; > +} > + > + > + > +/** > + Returns the first instance of a HOB type among the whole HOB list. > + > + This function searches the first instance of a HOB type among the who= le HOB > list. > + If there does not exist such HOB type in the HOB list, it will return= NULL. > + > + @param Type The HOB type to return. > + > + @return The next instance of a HOB type from the starting HOB. > + > +**/ > +VOID * > +EFIAPI > +GetFirstHob ( > + IN UINT16 Type > + ) > +{ > + VOID *HobList; > + > + HobList =3D GetHobList (); > + return GetNextHob (Type, HobList); > +} > + > + > +/** > + This function searches the first instance of a HOB from the starting = HOB > pointer. > + Such HOB should satisfy two conditions: > + its HOB type is EFI_HOB_TYPE_GUID_EXTENSION and its GUID Name equals > to the input Guid. > + If there does not exist such HOB from the starting HOB pointer, it wi= ll return > NULL. > + Caller is required to apply GET_GUID_HOB_DATA () and > GET_GUID_HOB_DATA_SIZE () > + to extract the data section and its size info respectively. > + In contrast with macro GET_NEXT_HOB(), this function does not skip th= e > starting HOB pointer > + unconditionally: it returns HobStart back if HobStart itself meets th= e > requirement; > + caller is required to use GET_NEXT_HOB() if it wishes to skip current= HobStart. > + If Guid is NULL, then ASSERT(). > + If HobStart is NULL, then ASSERT(). > + > + @param Guid The GUID to match with in the HOB list. > + @param HobStart A pointer to a Guid. > + > + @return The next instance of the matched GUID HOB from the starting H= OB. > + > +**/ > +VOID * > +EFIAPI > +GetNextGuidHob ( > + IN CONST EFI_GUID *Guid, > + IN CONST VOID *HobStart > + ){ > + EFI_PEI_HOB_POINTERS GuidHob; > + > + GuidHob.Raw =3D (UINT8 *) HobStart; > + while ((GuidHob.Raw =3D GetNextHob (EFI_HOB_TYPE_GUID_EXTENSION, > GuidHob.Raw)) !=3D NULL) { > + if (CompareGuid (Guid, &GuidHob.Guid->Name)) { > + break; > + } > + GuidHob.Raw =3D GET_NEXT_HOB (GuidHob); > + } > + return GuidHob.Raw; > +} > + > + > +/** > + This function searches the first instance of a HOB among the whole HO= B list. > + Such HOB should satisfy two conditions: > + its HOB type is EFI_HOB_TYPE_GUID_EXTENSION and its GUID Name equals > to the input Guid. > + If there does not exist such HOB from the starting HOB pointer, it wi= ll return > NULL. > + Caller is required to apply GET_GUID_HOB_DATA () and > GET_GUID_HOB_DATA_SIZE () > + to extract the data section and its size info respectively. > + If Guid is NULL, then ASSERT(). > + > + @param Guid The GUID to match with in the HOB list. > + > + @return The first instance of the matched GUID HOB among the whole HO= B > list. > + > +**/ > +VOID * > +EFIAPI > +GetFirstGuidHob ( > + IN CONST EFI_GUID *Guid > + ) > +{ > + VOID *HobList; > + > + HobList =3D GetHobList (); > + return GetNextGuidHob (Guid, HobList); > +} > + > + > + > + > +/** > + Builds a HOB for a loaded PE32 module. > + > + This function builds a HOB for a loaded PE32 module. > + It can only be invoked during PEI phase; > + for DXE phase, it will ASSERT() since PEI HOB is read-only for DXE ph= ase. > + If ModuleName is NULL, then ASSERT(). > + If there is no additional space for HOB creation, then ASSERT(). > + > + @param ModuleName The GUID File Name of the module. > + @param MemoryAllocationModule The 64 bit physical address of the > module. > + @param ModuleLength The length of the module in bytes. > + @param EntryPoint The 64 bit physical address of the mo= dule entry > point. > + > +**/ > +VOID > +EFIAPI > +BuildModuleHob ( > + IN CONST EFI_GUID *ModuleName, > + IN EFI_PHYSICAL_ADDRESS MemoryAllocationModule, > + IN UINT64 ModuleLength, > + IN EFI_PHYSICAL_ADDRESS EntryPoint > + ) > +{ > + EFI_HOB_MEMORY_ALLOCATION_MODULE *Hob; > + > + ASSERT (((MemoryAllocationModule & (EFI_PAGE_SIZE - 1)) =3D=3D 0) && > + ((ModuleLength & (EFI_PAGE_SIZE - 1)) =3D=3D 0)); > + > + Hob =3D CreateHob (EFI_HOB_TYPE_MEMORY_ALLOCATION, sizeof > (EFI_HOB_MEMORY_ALLOCATION_MODULE)); > + > + CopyGuid (&(Hob->MemoryAllocationHeader.Name), > &gEfiHobMemoryAllocModuleGuid); > + Hob->MemoryAllocationHeader.MemoryBaseAddress =3D > MemoryAllocationModule; > + Hob->MemoryAllocationHeader.MemoryLength =3D ModuleLength; > + Hob->MemoryAllocationHeader.MemoryType =3D EfiBootServicesCode= ; > + > + // > + // Zero the reserved space to match HOB spec > + // > + ZeroMem (Hob->MemoryAllocationHeader.Reserved, sizeof (Hob- > >MemoryAllocationHeader.Reserved)); > + > + CopyGuid (&Hob->ModuleName, ModuleName); > + Hob->EntryPoint =3D EntryPoint; > +} > + > +/** > + Builds a GUID HOB with a certain data length. > + > + This function builds a customized HOB tagged with a GUID for identifi= cation > + and returns the start address of GUID HOB data so that caller can fil= l the > customized data. > + The HOB Header and Name field is already stripped. > + It can only be invoked during PEI phase; > + for DXE phase, it will ASSERT() since PEI HOB is read-only for DXE ph= ase. > + If Guid is NULL, then ASSERT(). > + If there is no additional space for HOB creation, then ASSERT(). > + If DataLength >=3D (0x10000 - sizeof (EFI_HOB_GUID_TYPE)), then ASSER= T(). > + > + @param Guid The GUID to tag the customized HOB. > + @param DataLength The size of the data payload for the GUID HOB. > + > + @return The start address of GUID HOB data. > + > +**/ > +VOID * > +EFIAPI > +BuildGuidHob ( > + IN CONST EFI_GUID *Guid, > + IN UINTN DataLength > + ) > +{ > + EFI_HOB_GUID_TYPE *Hob; > + > + // > + // Make sure that data length is not too long. > + // > + ASSERT (DataLength <=3D (0xffff - sizeof (EFI_HOB_GUID_TYPE))); > + > + Hob =3D CreateHob (EFI_HOB_TYPE_GUID_EXTENSION, (UINT16) (sizeof > (EFI_HOB_GUID_TYPE) + DataLength)); > + CopyGuid (&Hob->Name, Guid); > + return Hob + 1; > +} > + > + > +/** > + Copies a data buffer to a newly-built HOB. > + > + This function builds a customized HOB tagged with a GUID for identifi= cation, > + copies the input data to the HOB data field and returns the start add= ress of > the GUID HOB data. > + The HOB Header and Name field is already stripped. > + It can only be invoked during PEI phase; > + for DXE phase, it will ASSERT() since PEI HOB is read-only for DXE ph= ase. > + If Guid is NULL, then ASSERT(). > + If Data is NULL and DataLength > 0, then ASSERT(). > + If there is no additional space for HOB creation, then ASSERT(). > + If DataLength >=3D (0x10000 - sizeof (EFI_HOB_GUID_TYPE)), then ASSER= T(). > + > + @param Guid The GUID to tag the customized HOB. > + @param Data The data to be copied into the data field of th= e GUID HOB. > + @param DataLength The size of the data payload for the GUID HOB. > + > + @return The start address of GUID HOB data. > + > +**/ > +VOID * > +EFIAPI > +BuildGuidDataHob ( > + IN CONST EFI_GUID *Guid, > + IN VOID *Data, > + IN UINTN DataLength > + ) > +{ > + VOID *HobData; > + > + ASSERT (Data !=3D NULL || DataLength =3D=3D 0); > + > + HobData =3D BuildGuidHob (Guid, DataLength); > + > + return CopyMem (HobData, Data, DataLength); > +} > + > + > +/** > + Builds a Firmware Volume HOB. > + > + This function builds a Firmware Volume HOB. > + It can only be invoked during PEI phase; > + for DXE phase, it will ASSERT() since PEI HOB is read-only for DXE ph= ase. > + If there is no additional space for HOB creation, then ASSERT(). > + > + @param BaseAddress The base address of the Firmware Volume. > + @param Length The size of the Firmware Volume in bytes. > + > +**/ > +VOID > +EFIAPI > +BuildFvHob ( > + IN EFI_PHYSICAL_ADDRESS BaseAddress, > + IN UINT64 Length > + ) > +{ > + EFI_HOB_FIRMWARE_VOLUME *Hob; > + > + Hob =3D CreateHob (EFI_HOB_TYPE_FV, sizeof > (EFI_HOB_FIRMWARE_VOLUME)); > + > + Hob->BaseAddress =3D BaseAddress; > + Hob->Length =3D Length; > +} > + > + > +/** > + Builds a EFI_HOB_TYPE_FV2 HOB. > + > + This function builds a EFI_HOB_TYPE_FV2 HOB. > + It can only be invoked during PEI phase; > + for DXE phase, it will ASSERT() since PEI HOB is read-only for DXE ph= ase. > + If there is no additional space for HOB creation, then ASSERT(). > + > + @param BaseAddress The base address of the Firmware Volume. > + @param Length The size of the Firmware Volume in bytes. > + @param FvName The name of the Firmware Volume. > + @param FileName The name of the file. > + > +**/ > +VOID > +EFIAPI > +BuildFv2Hob ( > + IN EFI_PHYSICAL_ADDRESS BaseAddress, > + IN UINT64 Length, > + IN CONST EFI_GUID *FvName, > + IN CONST EFI_GUID *FileName > + ) > +{ > + EFI_HOB_FIRMWARE_VOLUME2 *Hob; > + > + Hob =3D CreateHob (EFI_HOB_TYPE_FV2, sizeof > (EFI_HOB_FIRMWARE_VOLUME2)); > + > + Hob->BaseAddress =3D BaseAddress; > + Hob->Length =3D Length; > + CopyGuid (&Hob->FvName, FvName); > + CopyGuid (&Hob->FileName, FileName); > +} > + > +/** > + Builds a EFI_HOB_TYPE_FV3 HOB. > + > + This function builds a EFI_HOB_TYPE_FV3 HOB. > + It can only be invoked during PEI phase; > + for DXE phase, it will ASSERT() since PEI HOB is read-only for DXE ph= ase. > + > + If there is no additional space for HOB creation, then ASSERT(). > + > + @param BaseAddress The base address of the Firmware Volume= . > + @param Length The size of the Firmware Volume in byte= s. > + @param AuthenticationStatus The authentication status. > + @param ExtractedFv TRUE if the FV was extracted as a file = within > + another firmware volume. FALSE otherwis= e. > + @param FvName The name of the Firmware Volume. > + Valid only if IsExtractedFv is TRUE. > + @param FileName The name of the file. > + Valid only if IsExtractedFv is TRUE. > + > +**/ > +VOID > +EFIAPI > +BuildFv3Hob ( > + IN EFI_PHYSICAL_ADDRESS BaseAddress, > + IN UINT64 Length, > + IN UINT32 AuthenticationStatus, > + IN BOOLEAN ExtractedFv, > + IN CONST EFI_GUID *FvName, OPTIONAL > + IN CONST EFI_GUID *FileName OPTIONAL > + ) > +{ > + EFI_HOB_FIRMWARE_VOLUME3 *Hob; > + > + Hob =3D CreateHob (EFI_HOB_TYPE_FV3, sizeof > (EFI_HOB_FIRMWARE_VOLUME3)); > + > + Hob->BaseAddress =3D BaseAddress; > + Hob->Length =3D Length; > + Hob->AuthenticationStatus =3D AuthenticationStatus; > + Hob->ExtractedFv =3D ExtractedFv; > + if (ExtractedFv) { > + CopyGuid (&Hob->FvName, FvName); > + CopyGuid (&Hob->FileName, FileName); > + } > +} > + > + > +/** > + Builds a HOB for the CPU. > + > + This function builds a HOB for the CPU. > + It can only be invoked during PEI phase; > + for DXE phase, it will ASSERT() since PEI HOB is read-only for DXE ph= ase. > + If there is no additional space for HOB creation, then ASSERT(). > + > + @param SizeOfMemorySpace The maximum physical memory > addressability of the processor. > + @param SizeOfIoSpace The maximum physical I/O addressability o= f the > processor. > + > +**/ > +VOID > +EFIAPI > +BuildCpuHob ( > + IN UINT8 SizeOfMemorySpace, > + IN UINT8 SizeOfIoSpace > + ) > +{ > + EFI_HOB_CPU *Hob; > + > + Hob =3D CreateHob (EFI_HOB_TYPE_CPU, sizeof (EFI_HOB_CPU)); > + > + Hob->SizeOfMemorySpace =3D SizeOfMemorySpace; > + Hob->SizeOfIoSpace =3D SizeOfIoSpace; > + > + // > + // Zero the reserved space to match HOB spec > + // > + ZeroMem (Hob->Reserved, sizeof (Hob->Reserved)); > +} > + > + > +/** > + Builds a HOB for the Stack. > + > + This function builds a HOB for the stack. > + It can only be invoked during PEI phase; > + for DXE phase, it will ASSERT() since PEI HOB is read-only for DXE ph= ase. > + If there is no additional space for HOB creation, then ASSERT(). > + > + @param BaseAddress The 64 bit physical address of the Stack. > + @param Length The length of the stack in bytes. > + > +**/ > +VOID > +EFIAPI > +BuildStackHob ( > + IN EFI_PHYSICAL_ADDRESS BaseAddress, > + IN UINT64 Length > + ) > +{ > + EFI_HOB_MEMORY_ALLOCATION_STACK *Hob; > + > + ASSERT (((BaseAddress & (EFI_PAGE_SIZE - 1)) =3D=3D 0) && > + ((Length & (EFI_PAGE_SIZE - 1)) =3D=3D 0)); > + > + Hob =3D CreateHob (EFI_HOB_TYPE_MEMORY_ALLOCATION, sizeof > (EFI_HOB_MEMORY_ALLOCATION_STACK)); > + > + CopyGuid (&(Hob->AllocDescriptor.Name), &gEfiHobMemoryAllocStackGuid)= ; > + Hob->AllocDescriptor.MemoryBaseAddress =3D BaseAddress; > + Hob->AllocDescriptor.MemoryLength =3D Length; > + Hob->AllocDescriptor.MemoryType =3D EfiBootServicesData; > + > + // > + // Zero the reserved space to match HOB spec > + // > + ZeroMem (Hob->AllocDescriptor.Reserved, sizeof (Hob- > >AllocDescriptor.Reserved)); > +} > + > + > +/** > + Update the Stack Hob if the stack has been moved > + > + @param BaseAddress The 64 bit physical address of the Stack. > + @param Length The length of the stack in bytes. > + > +**/ > +VOID > +EFIAPI > +UpdateStackHob ( > + IN EFI_PHYSICAL_ADDRESS BaseAddress, > + IN UINT64 Length > + ) > +{ > + EFI_PEI_HOB_POINTERS Hob; > + > + Hob.Raw =3D GetHobList (); > + while ((Hob.Raw =3D GetNextHob (EFI_HOB_TYPE_MEMORY_ALLOCATION, > Hob.Raw)) !=3D NULL) { > + if (CompareGuid (&gEfiHobMemoryAllocStackGuid, > &(Hob.MemoryAllocationStack->AllocDescriptor.Name))) { > + // > + // Build a new memory allocation HOB with old stack info with > EfiConventionalMemory type > + // to be reclaimed by DXE core. > + // > + BuildMemoryAllocationHob ( > + Hob.MemoryAllocationStack->AllocDescriptor.MemoryBaseAddress, > + Hob.MemoryAllocationStack->AllocDescriptor.MemoryLength, > + EfiConventionalMemory > + ); > + // > + // Update the BSP Stack Hob to reflect the new stack info. > + // > + Hob.MemoryAllocationStack->AllocDescriptor.MemoryBaseAddress =3D > BaseAddress; > + Hob.MemoryAllocationStack->AllocDescriptor.MemoryLength =3D Lengt= h; > + break; > + } > + Hob.Raw =3D GET_NEXT_HOB (Hob); > + } > +} > + > + > + > +/** > + Builds a HOB for the memory allocation. > + > + This function builds a HOB for the memory allocation. > + It can only be invoked during PEI phase; > + for DXE phase, it will ASSERT() since PEI HOB is read-only for DXE ph= ase. > + If there is no additional space for HOB creation, then ASSERT(). > + > + @param BaseAddress The 64 bit physical address of the memory. > + @param Length The length of the memory allocation in bytes. > + @param MemoryType Type of memory allocated by this HOB. > + > +**/ > +VOID > +EFIAPI > +BuildMemoryAllocationHob ( > + IN EFI_PHYSICAL_ADDRESS BaseAddress, > + IN UINT64 Length, > + IN EFI_MEMORY_TYPE MemoryType > + ) > +{ > + EFI_HOB_MEMORY_ALLOCATION *Hob; > + > + ASSERT (((BaseAddress & (EFI_PAGE_SIZE - 1)) =3D=3D 0) && > + ((Length & (EFI_PAGE_SIZE - 1)) =3D=3D 0)); > + > + Hob =3D CreateHob (EFI_HOB_TYPE_MEMORY_ALLOCATION, sizeof > (EFI_HOB_MEMORY_ALLOCATION)); > + > + ZeroMem (&(Hob->AllocDescriptor.Name), sizeof (EFI_GUID)); > + Hob->AllocDescriptor.MemoryBaseAddress =3D BaseAddress; > + Hob->AllocDescriptor.MemoryLength =3D Length; > + Hob->AllocDescriptor.MemoryType =3D MemoryType; > + // > + // Zero the reserved space to match HOB spec > + // > + ZeroMem (Hob->AllocDescriptor.Reserved, sizeof (Hob- > >AllocDescriptor.Reserved)); > +} > + > diff --git a/UefiPayloadPkg/Library/HobLib/HobLib.inf > b/UefiPayloadPkg/Library/HobLib/HobLib.inf > new file mode 100644 > index 0000000000..030e22a810 > --- /dev/null > +++ b/UefiPayloadPkg/Library/HobLib/HobLib.inf > @@ -0,0 +1,39 @@ > +#/** @file > +# > +# Copyright (c) 2018 - 2020, Intel Corporation. All rights reserved. > +# Copyright (c) 2008 - 2010, Apple Inc. All rights reserved.
> +# > +# SPDX-License-Identifier: BSD-2-Clause-Patent > +# > +# > +#**/ > + > +[Defines] > + INF_VERSION =3D 0x00010005 > + BASE_NAME =3D HobLib > + FILE_GUID =3D AD6B4D55-8DBE-48C8-88E3-CFDBB6E9D1= 93 > + MODULE_TYPE =3D BASE > + VERSION_STRING =3D 1.0 > + LIBRARY_CLASS =3D HobLib > + > +# > +# VALID_ARCHITECTURES =3D IA32 X64 EBC > +# > + > +[Sources.common] > + Hob.c > + > +[Packages] > + MdePkg/MdePkg.dec > + MdeModulePkg/MdeModulePkg.dec > + UefiPayloadPkg/UefiPayloadPkg.dec > + > +[LibraryClasses] > + BaseLib > + BaseMemoryLib > + DebugLib > + > +[Guids] > + gEfiHobMemoryAllocModuleGuid > + gEfiHobMemoryAllocStackGuid > + > diff --git a/UefiPayloadPkg/SecCore/FindPeiCore.c > b/UefiPayloadPkg/SecCore/FindPeiCore.c > deleted file mode 100644 > index f67d1afb96..0000000000 > --- a/UefiPayloadPkg/SecCore/FindPeiCore.c > +++ /dev/null > @@ -1,193 +0,0 @@ > -/** @file > - Locate the entry point for the PEI Core > - > -Copyright (c) 2013, Intel Corporation. All rights reserved.
> -SPDX-License-Identifier: BSD-2-Clause-Patent > - > -**/ > - > -#include > -#include > -#include > - > -#include "SecMain.h" > - > -/** > - Find core image base. > - > - @param BootFirmwareVolumePtr Point to the boot firmware volume. > - @param SecCoreImageBase The base address of the SEC core im= age. > - @param PeiCoreImageBase The base address of the PEI core im= age. > - > -**/ > -EFI_STATUS > -EFIAPI > -FindImageBase ( > - IN EFI_FIRMWARE_VOLUME_HEADER *BootFirmwareVolumePtr, > - OUT EFI_PHYSICAL_ADDRESS *SecCoreImageBase, > - OUT EFI_PHYSICAL_ADDRESS *PeiCoreImageBase > - ) > -{ > - EFI_PHYSICAL_ADDRESS CurrentAddress; > - EFI_PHYSICAL_ADDRESS EndOfFirmwareVolume; > - EFI_FFS_FILE_HEADER *File; > - UINT32 Size; > - EFI_PHYSICAL_ADDRESS EndOfFile; > - EFI_COMMON_SECTION_HEADER *Section; > - EFI_PHYSICAL_ADDRESS EndOfSection; > - > - *SecCoreImageBase =3D 0; > - *PeiCoreImageBase =3D 0; > - > - CurrentAddress =3D (EFI_PHYSICAL_ADDRESS)(UINTN) BootFirmwareVolumePt= r; > - EndOfFirmwareVolume =3D CurrentAddress + BootFirmwareVolumePtr- > >FvLength; > - > - // > - // Loop through the FFS files in the Boot Firmware Volume > - // > - for (EndOfFile =3D CurrentAddress + BootFirmwareVolumePtr->HeaderLeng= th; ; ) > { > - > - CurrentAddress =3D (EndOfFile + 7) & 0xfffffffffffffff8ULL; > - if (CurrentAddress > EndOfFirmwareVolume) { > - return EFI_NOT_FOUND; > - } > - > - File =3D (EFI_FFS_FILE_HEADER*)(UINTN) CurrentAddress; > - if (IS_FFS_FILE2 (File)) { > - Size =3D FFS_FILE2_SIZE (File); > - if (Size <=3D 0x00FFFFFF) { > - return EFI_NOT_FOUND; > - } > - } else { > - Size =3D FFS_FILE_SIZE (File); > - if (Size < sizeof (EFI_FFS_FILE_HEADER)) { > - return EFI_NOT_FOUND; > - } > - } > - > - EndOfFile =3D CurrentAddress + Size; > - if (EndOfFile > EndOfFirmwareVolume) { > - return EFI_NOT_FOUND; > - } > - > - // > - // Look for SEC Core / PEI Core files > - // > - if (File->Type !=3D EFI_FV_FILETYPE_SECURITY_CORE && > - File->Type !=3D EFI_FV_FILETYPE_PEI_CORE) { > - continue; > - } > - > - // > - // Loop through the FFS file sections within the FFS file > - // > - if (IS_FFS_FILE2 (File)) { > - EndOfSection =3D (EFI_PHYSICAL_ADDRESS) (UINTN) ((UINT8 *) File += sizeof > (EFI_FFS_FILE_HEADER2)); > - } else { > - EndOfSection =3D (EFI_PHYSICAL_ADDRESS) (UINTN) ((UINT8 *) File += sizeof > (EFI_FFS_FILE_HEADER)); > - } > - for (;;) { > - CurrentAddress =3D (EndOfSection + 3) & 0xfffffffffffffffcULL; > - Section =3D (EFI_COMMON_SECTION_HEADER*)(UINTN) CurrentAddress; > - > - if (IS_SECTION2 (Section)) { > - Size =3D SECTION2_SIZE (Section); > - if (Size <=3D 0x00FFFFFF) { > - return EFI_NOT_FOUND; > - } > - } else { > - Size =3D SECTION_SIZE (Section); > - if (Size < sizeof (EFI_COMMON_SECTION_HEADER)) { > - return EFI_NOT_FOUND; > - } > - } > - > - EndOfSection =3D CurrentAddress + Size; > - if (EndOfSection > EndOfFile) { > - return EFI_NOT_FOUND; > - } > - > - // > - // Look for executable sections > - // > - if (Section->Type =3D=3D EFI_SECTION_PE32 || Section->Type =3D=3D > EFI_SECTION_TE) { > - if (File->Type =3D=3D EFI_FV_FILETYPE_SECURITY_CORE) { > - if (IS_SECTION2 (Section)) { > - *SecCoreImageBase =3D (PHYSICAL_ADDRESS) (UINTN) ((UINT8 *)= Section > + sizeof (EFI_COMMON_SECTION_HEADER2)); > - } else { > - *SecCoreImageBase =3D (PHYSICAL_ADDRESS) (UINTN) ((UINT8 *)= Section > + sizeof (EFI_COMMON_SECTION_HEADER)); > - } > - } else { > - if (IS_SECTION2 (Section)) { > - *PeiCoreImageBase =3D (PHYSICAL_ADDRESS) (UINTN) ((UINT8 *)= Section > + sizeof (EFI_COMMON_SECTION_HEADER2)); > - } else { > - *PeiCoreImageBase =3D (PHYSICAL_ADDRESS) (UINTN) ((UINT8 *)= Section > + sizeof (EFI_COMMON_SECTION_HEADER)); > - } > - } > - break; > - } > - } > - > - // > - // Both SEC Core and PEI Core images found > - // > - if (*SecCoreImageBase !=3D 0 && *PeiCoreImageBase !=3D 0) { > - return EFI_SUCCESS; > - } > - } > -} > - > -/** > - Find and return Pei Core entry point. > - > - It also find SEC and PEI Core file debug information. It will report = them if > - remote debug is enabled. > - > - @param BootFirmwareVolumePtr Point to the boot firmware volume. > - @param PeiCoreEntryPoint The entry point of the PEI core. > - > -**/ > -VOID > -EFIAPI > -FindAndReportEntryPoints ( > - IN EFI_FIRMWARE_VOLUME_HEADER *BootFirmwareVolumePtr, > - OUT EFI_PEI_CORE_ENTRY_POINT *PeiCoreEntryPoint > - ) > -{ > - EFI_STATUS Status; > - EFI_PHYSICAL_ADDRESS SecCoreImageBase; > - EFI_PHYSICAL_ADDRESS PeiCoreImageBase; > - PE_COFF_LOADER_IMAGE_CONTEXT ImageContext; > - > - // > - // Find SEC Core and PEI Core image base > - // > - Status =3D FindImageBase (BootFirmwareVolumePtr, &SecCoreImageBase, > &PeiCoreImageBase); > - ASSERT_EFI_ERROR (Status); > - > - ZeroMem ((VOID *) &ImageContext, sizeof > (PE_COFF_LOADER_IMAGE_CONTEXT)); > - // > - // Report SEC Core debug information when remote debug is enabled > - // > - ImageContext.ImageAddress =3D SecCoreImageBase; > - ImageContext.PdbPointer =3D PeCoffLoaderGetPdbPointer ((VOID*) (UINTN= ) > ImageContext.ImageAddress); > - PeCoffLoaderRelocateImageExtraAction (&ImageContext); > - > - // > - // Report PEI Core debug information when remote debug is enabled > - // > - ImageContext.ImageAddress =3D PeiCoreImageBase; > - ImageContext.PdbPointer =3D PeCoffLoaderGetPdbPointer ((VOID*) (UINTN= ) > ImageContext.ImageAddress); > - PeCoffLoaderRelocateImageExtraAction (&ImageContext); > - > - // > - // Find PEI Core entry point > - // > - Status =3D PeCoffLoaderGetEntryPoint ((VOID *) (UINTN) PeiCoreImageBa= se, > (VOID**) PeiCoreEntryPoint); > - if (EFI_ERROR (Status)) { > - *PeiCoreEntryPoint =3D 0; > - } > - > - return; > -} > - > diff --git a/UefiPayloadPkg/SecCore/Ia32/SecEntry.nasm > b/UefiPayloadPkg/SecCore/Ia32/SecEntry.nasm > deleted file mode 100644 > index 877fc61ef0..0000000000 > --- a/UefiPayloadPkg/SecCore/Ia32/SecEntry.nasm > +++ /dev/null > @@ -1,78 +0,0 @@ > -;----------------------------------------------------------------------= -------- > -; > -; Copyright (c) 2015 - 2016, Intel Corporation. All rights reserved. > -; SPDX-License-Identifier: BSD-2-Clause-Patent > -; > -; Abstract: > -; > -; Entry point for the coreboot UEFI payload. > -; > -;----------------------------------------------------------------------= -------- > - > -SECTION .text > - > -; C Functions > -extern ASM_PFX(SecStartup) > - > -; Pcds > -extern ASM_PFX(PcdGet32 (PcdPayloadFdMemBase)) > -extern ASM_PFX(PcdGet32 (PcdPayloadStackTop)) > - > -; > -; SecCore Entry Point > -; > -; Processor is in flat protected mode > -; > -; @param[in] EAX Initial value of the EAX register (BIST: Built-in S= elf Test) > -; @param[in] DI 'BP': boot-strap processor, or 'AP': application pr= ocessor > -; @param[in] EBP Pointer to the start of the Boot Firmware Volume > -; > -; @return None This routine does not return > -; > -global ASM_PFX(_ModuleEntryPoint) > -ASM_PFX(_ModuleEntryPoint): > - ; > - ; Disable all the interrupts > - ; > - cli > - > - ; > - ; Save the Payload HOB base address before switching the stack > - ; > - mov eax, [esp + 4] > - > - ; > - ; Construct the temporary memory at 0x80000, length 0x10000 > - ; > - mov esp, DWORD [ASM_PFX(PcdGet32 (PcdPayloadStackTop))] > - > - ; > - ; Push the Payload HOB base address onto new stack > - ; > - push eax > - > - ; > - ; Pass BFV into the PEI Core > - ; > - push DWORD [ASM_PFX(PcdGet32 (PcdPayloadFdMemBase))] > - > - ; > - ; Pass stack base into the PEI Core > - ; > - push BASE_512KB > - > - ; > - ; Pass stack size into the PEI Core > - ; > - push SIZE_64KB > - > - ; > - ; Pass Control into the PEI Core > - ; > - call ASM_PFX(SecStartup) > - > - ; > - ; Should never return > - ; > - jmp $ > - > diff --git a/UefiPayloadPkg/SecCore/Ia32/Stack.nasm > b/UefiPayloadPkg/SecCore/Ia32/Stack.nasm > deleted file mode 100644 > index 55fd2243c8..0000000000 > --- a/UefiPayloadPkg/SecCore/Ia32/Stack.nasm > +++ /dev/null > @@ -1,72 +0,0 @@ > -;----------------------------------------------------------------------= -------- > -; > -; Copyright (c) 2015 - 2016, Intel Corporation. All rights reserved. > -; SPDX-License-Identifier: BSD-2-Clause-Patent > -; > -; Abstract: > -; > -; Switch the stack from temporary memory to permanent memory. > -; > -;----------------------------------------------------------------------= -------- > - > -SECTION .text > - > -;----------------------------------------------------------------------= -------- > -; VOID > -; EFIAPI > -; SecSwitchStack ( > -; UINT32 TemporaryMemoryBase, > -; UINT32 PermenentMemoryBase > -; ); > -;----------------------------------------------------------------------= -------- > -global ASM_PFX(SecSwitchStack) > -ASM_PFX(SecSwitchStack): > - ; > - ; Save three register: eax, ebx, ecx > - ; > - push eax > - push ebx > - push ecx > - push edx > - > - ; > - ; !!CAUTION!! this function address's is pushed into stack after > - ; migration of whole temporary memory, so need save it to permanent > - ; memory at first! > - ; > - > - mov ebx, [esp + 20] ; Save the first parameter > - mov ecx, [esp + 24] ; Save the second parameter > - > - ; > - ; Save this function's return address into permanent memory at firs= t. > - ; Then, Fixup the esp point to permanent memory > - ; > - mov eax, esp > - sub eax, ebx > - add eax, ecx > - mov edx, [esp] ; copy pushed register's value to p= ermanent memory > - mov [eax], edx > - mov edx, [esp + 4] > - mov [eax + 4], edx > - mov edx, [esp + 8] > - mov [eax + 8], edx > - mov edx, [esp + 12] > - mov [eax + 12], edx > - mov edx, [esp + 16] ; Update return address into perman= ent memory > - mov [eax + 16], edx > - mov esp, eax ; From now, esp is pointed to perma= nent memory > - > - ; > - ; Fixup the ebp point to permanent memory > - ; > - mov eax, ebp > - sub eax, ebx > - add eax, ecx > - mov ebp, eax ; From now, ebp is pointed to perma= nent memory > - > - pop edx > - pop ecx > - pop ebx > - pop eax > - ret > diff --git a/UefiPayloadPkg/SecCore/SecCore.inf > b/UefiPayloadPkg/SecCore/SecCore.inf > deleted file mode 100644 > index 82ca7f567f..0000000000 > --- a/UefiPayloadPkg/SecCore/SecCore.inf > +++ /dev/null > @@ -1,58 +0,0 @@ > -## @file > -# This is the first module taking control from the coreboot. > -# > -# Copyright (c) 2013 - 2019, Intel Corporation. All rights reserved. > -# > -# SPDX-License-Identifier: BSD-2-Clause-Patent > -# > -# > -## > - > -[Defines] > - INF_VERSION =3D 0x00010005 > - BASE_NAME =3D SecCore > - FILE_GUID =3D BA7BE337-6CFB-4dbb-B26C-21EC2FC160= 73 > - MODULE_TYPE =3D SEC > - VERSION_STRING =3D 1.0 > - > - > -# > -# The following information is for reference only and not required by t= he build > tools. > -# > -# VALID_ARCHITECTURES =3D IA32 X64 EBC > -# > - > -[Sources] > - SecMain.c > - SecMain.h > - FindPeiCore.c > - > -[Sources.IA32] > - Ia32/Stack.nasm > - Ia32/SecEntry.nasm > - > -[Packages] > - MdePkg/MdePkg.dec > - MdeModulePkg/MdeModulePkg.dec > - UefiCpuPkg/UefiCpuPkg.dec > - UefiPayloadPkg/UefiPayloadPkg.dec > - > -[LibraryClasses] > - BaseMemoryLib > - DebugLib > - BaseLib > - PcdLib > - DebugAgentLib > - UefiCpuLib > - PeCoffGetEntryPointLib > - PeCoffExtraActionLib > - > -[Ppis] > - gEfiSecPlatformInformationPpiGuid # PPI ALWAYS_PRODUCED > - gEfiTemporaryRamSupportPpiGuid # PPI ALWAYS_PRODUCED > - gEfiPayLoadHobBasePpiGuid # PPI ALWAYS_PRODUCED > - > -[Pcd] > - gUefiPayloadPkgTokenSpaceGuid.PcdPayloadFdMemBase > - gUefiPayloadPkgTokenSpaceGuid.PcdPayloadFdMemSize > - gUefiPayloadPkgTokenSpaceGuid.PcdPayloadStackTop > diff --git a/UefiPayloadPkg/SecCore/SecMain.c > b/UefiPayloadPkg/SecCore/SecMain.c > deleted file mode 100644 > index c0ca0e7d40..0000000000 > --- a/UefiPayloadPkg/SecCore/SecMain.c > +++ /dev/null > @@ -1,288 +0,0 @@ > -/** @file > - C functions in SEC > - > -Copyright (c) 2013, Intel Corporation. All rights reserved.
> -SPDX-License-Identifier: BSD-2-Clause-Patent > - > -**/ > - > - > -#include "SecMain.h" > - > -EFI_PEI_TEMPORARY_RAM_SUPPORT_PPI gSecTemporaryRamSupportPpi =3D { > - SecTemporaryRamSupport > -}; > - > -EFI_PEI_PPI_DESCRIPTOR mPeiSecPlatformInformationPpi[] =3D { > - { > - (EFI_PEI_PPI_DESCRIPTOR_PPI | > EFI_PEI_PPI_DESCRIPTOR_TERMINATE_LIST), > - &gEfiTemporaryRamSupportPpiGuid, > - &gSecTemporaryRamSupportPpi > - } > -}; > - > -// > -// These are IDT entries pointing to 10:FFFFFFE4h. > -// > -UINT64 mIdtEntryTemplate =3D 0xffff8e000010ffe4ULL; > - > -/** > - Caller provided function to be invoked at the end of InitializeDebugA= gent(). > - > - Entry point to the C language phase of SEC. After the SEC assembly > - code has initialized some temporary memory and set up the stack, > - the control is transferred to this function. > - > - @param[in] Context The first input parameter of InitializeDebugAge= nt(). > - > -**/ > -VOID > -EFIAPI > -SecStartupPhase2( > - IN VOID *Context > - ); > - > - > -/** > - > - Entry point to the C language phase of SEC. After the SEC assembly > - code has initialized some temporary memory and set up the stack, > - the control is transferred to this function. > - > - > - @param SizeOfRam Size of the temporary memory available for= use. > - @param TempRamBase Base address of temporary ram > - @param BootFirmwareVolume Base address of the Boot Firmware Volume. > - @param BootloaderParameter A parameter from bootloader, e.g. HobList > from SlimBootloader > - > -**/ > -VOID > -EFIAPI > -SecStartup ( > - IN UINT32 SizeOfRam, > - IN UINT32 TempRamBase, > - IN VOID *BootFirmwareVolume, > - IN UINT32 BootloaderParameter > - ) > -{ > - EFI_SEC_PEI_HAND_OFF SecCoreData; > - IA32_DESCRIPTOR IdtDescriptor; > - SEC_IDT_TABLE IdtTableInStack; > - UINT32 Index; > - UINT32 PeiStackSize; > - > - PeiStackSize =3D (SizeOfRam >> 1); > - > - ASSERT (PeiStackSize < SizeOfRam); > - > - // > - // Process all libraries constructor function linked to SecCore. > - // > - ProcessLibraryConstructorList (); > - > - // > - // Initialize floating point operating environment > - // to be compliant with UEFI spec. > - // > - InitializeFloatingPointUnits (); > - > - > - // |-------------------|----> > - // |Idt Table | > - // |-------------------| > - // |PeiService Pointer | PeiStackSize > - // |-------------------| > - // | | > - // | Stack | > - // |-------------------|----> > - // | | > - // | | > - // | Heap | PeiTemporaryRamSize > - // | | > - // | | > - // |-------------------|----> TempRamBase > - > - IdtTableInStack.PeiService =3D 0; > - for (Index =3D 0; Index < SEC_IDT_ENTRY_COUNT; Index ++) { > - CopyMem ((VOID*)&IdtTableInStack.IdtTable[Index], > (VOID*)&mIdtEntryTemplate, sizeof (UINT64)); > - } > - > - IdtDescriptor.Base =3D (UINTN) &IdtTableInStack.IdtTable; > - IdtDescriptor.Limit =3D (UINT16)(sizeof (IdtTableInStack.IdtTable) - = 1); > - > - AsmWriteIdtr (&IdtDescriptor); > - > - // > - // Update the base address and length of Pei temporary memory > - // > - SecCoreData.DataSize =3D (UINT16) sizeof (EFI_SEC_PEI_H= AND_OFF); > - SecCoreData.BootFirmwareVolumeBase =3D BootFirmwareVolume; > - SecCoreData.BootFirmwareVolumeSize =3D (UINTN)(0x100000000ULL - (UINT= N) > BootFirmwareVolume); > - SecCoreData.TemporaryRamBase =3D (VOID*)(UINTN) TempRamBase; > - SecCoreData.TemporaryRamSize =3D SizeOfRam; > - SecCoreData.PeiTemporaryRamBase =3D SecCoreData.TemporaryRamBase; > - SecCoreData.PeiTemporaryRamSize =3D SizeOfRam - PeiStackSize; > - SecCoreData.StackBase =3D (VOID*)(UINTN)(TempRamBase + > SecCoreData.PeiTemporaryRamSize); > - SecCoreData.StackSize =3D PeiStackSize; > - > - // > - // Initialize Debug Agent to support source level debug in SEC/PEI ph= ases > before memory ready. > - // > - InitializeDebugAgent (DEBUG_AGENT_INIT_PREMEM_SEC, &SecCoreData, > SecStartupPhase2); > - > -} > - > -/** > - Caller provided function to be invoked at the end of InitializeDebugA= gent(). > - > - Entry point to the C language phase of SEC. After the SEC assembly > - code has initialized some temporary memory and set up the stack, > - the control is transferred to this function. > - > - @param[in] Context The first input parameter of InitializeDebugAge= nt(). > - > -**/ > -VOID > -EFIAPI > -SecStartupPhase2( > - IN VOID *Context > - ) > -{ > - EFI_SEC_PEI_HAND_OFF *SecCoreData; > - EFI_PEI_CORE_ENTRY_POINT PeiCoreEntryPoint; > - > - SecCoreData =3D (EFI_SEC_PEI_HAND_OFF *) Context; > - // > - // Find Pei Core entry point. It will report SEC and Pei Core debug i= nformation > if remote debug > - // is enabled. > - // > - FindAndReportEntryPoints ((EFI_FIRMWARE_VOLUME_HEADER *) > SecCoreData->BootFirmwareVolumeBase, &PeiCoreEntryPoint); > - if (PeiCoreEntryPoint =3D=3D NULL) > - { > - CpuDeadLoop (); > - } > - > - // > - // Transfer the control to the PEI core > - // > - ASSERT (PeiCoreEntryPoint !=3D NULL); > - (*PeiCoreEntryPoint) (SecCoreData, (EFI_PEI_PPI_DESCRIPTOR > *)&mPeiSecPlatformInformationPpi); > - > - // > - // Should not come here. > - // > - return ; > -} > - > -/** > - This service of the TEMPORARY_RAM_SUPPORT_PPI that migrates temporary > RAM into > - permanent memory. > - > - @param PeiServices Pointer to the PEI Services Table. > - @param TemporaryMemoryBase Source Address in temporary memory > from which the SEC or PEIM will copy the > - Temporary RAM contents. > - @param PermanentMemoryBase Destination Address in permanent > memory into which the SEC or PEIM will copy the > - Temporary RAM contents. > - @param CopySize Amount of memory to migrate from tempor= ary to > permanent memory. > - > - @retval EFI_SUCCESS The data was successfully returned. > - @retval EFI_INVALID_PARAMETER PermanentMemoryBase + CopySize > > TemporaryMemoryBase when > - TemporaryMemoryBase > PermanentMemoryBa= se. > - > -**/ > -EFI_STATUS > -EFIAPI > -SecTemporaryRamSupport ( > - IN CONST EFI_PEI_SERVICES **PeiServices, > - IN EFI_PHYSICAL_ADDRESS TemporaryMemoryBase, > - IN EFI_PHYSICAL_ADDRESS PermanentMemoryBase, > - IN UINTN CopySize > - ) > -{ > - IA32_DESCRIPTOR IdtDescriptor; > - VOID* OldHeap; > - VOID* NewHeap; > - VOID* OldStack; > - VOID* NewStack; > - DEBUG_AGENT_CONTEXT_POSTMEM_SEC DebugAgentContext; > - BOOLEAN OldStatus; > - UINTN PeiStackSize; > - > - PeiStackSize =3D (CopySize >> 1); > - > - ASSERT (PeiStackSize < CopySize); > - > - // > - // |-------------------|----> > - // | Stack | PeiStackSize > - // |-------------------|----> > - // | Heap | PeiTemporaryRamSize > - // |-------------------|----> TempRamBase > - // > - // |-------------------|----> > - // | Heap | PeiTemporaryRamSize > - // |-------------------|----> > - // | Stack | PeiStackSize > - // |-------------------|----> PermanentMemoryBase > - // > - > - OldHeap =3D (VOID*)(UINTN)TemporaryMemoryBase; > - NewHeap =3D (VOID*)((UINTN)PermanentMemoryBase + PeiStackSize); > - > - OldStack =3D (VOID*)((UINTN)TemporaryMemoryBase + CopySize - > PeiStackSize); > - NewStack =3D (VOID*)(UINTN)PermanentMemoryBase; > - > - DebugAgentContext.HeapMigrateOffset =3D (UINTN)NewHeap - > (UINTN)OldHeap; > - DebugAgentContext.StackMigrateOffset =3D (UINTN)NewStack - > (UINTN)OldStack; > - > - OldStatus =3D SaveAndSetDebugTimerInterrupt (FALSE); > - // > - // Initialize Debug Agent to support source level debug in PEI phase = after > memory ready. > - // It will build HOB and fix up the pointer in IDT table. > - // > - InitializeDebugAgent (DEBUG_AGENT_INIT_POSTMEM_SEC, (VOID *) > &DebugAgentContext, NULL); > - > - // > - // Migrate Heap > - // > - CopyMem (NewHeap, OldHeap, CopySize - PeiStackSize); > - > - // > - // Migrate Stack > - // > - CopyMem (NewStack, OldStack, PeiStackSize); > - > - > - // > - // We need *not* fix the return address because currently, > - // The PeiCore is executed in flash. > - // > - > - // > - // Rebase IDT table in permanent memory > - // > - AsmReadIdtr (&IdtDescriptor); > - IdtDescriptor.Base =3D IdtDescriptor.Base - (UINTN)OldStack + > (UINTN)NewStack; > - > - AsmWriteIdtr (&IdtDescriptor); > - > - > - // > - // Program MTRR > - // > - > - // > - // SecSwitchStack function must be invoked after the memory migration > - // immediately, also we need fixup the stack change caused by new cal= l into > - // permanent memory. > - // > - SecSwitchStack ( > - (UINT32) (UINTN) OldStack, > - (UINT32) (UINTN) NewStack > - ); > - > - SaveAndSetDebugTimerInterrupt (OldStatus); > - > - return EFI_SUCCESS; > -} > - > diff --git a/UefiPayloadPkg/SecCore/SecMain.h > b/UefiPayloadPkg/SecCore/SecMain.h > deleted file mode 100644 > index ca0a95d03e..0000000000 > --- a/UefiPayloadPkg/SecCore/SecMain.h > +++ /dev/null > @@ -1,131 +0,0 @@ > -/** @file > - Master header file for SecCore. > - > -Copyright (c) 2013, Intel Corporation. All rights reserved.
> -SPDX-License-Identifier: BSD-2-Clause-Patent > - > -**/ > - > -#ifndef _SEC_CORE_H_ > -#define _SEC_CORE_H_ > - > - > -#include > - > -#include > -#include > - > -#include > -#include > -#include > -#include > -#include > -#include > -#include > -#include > - > - > -#define SEC_IDT_ENTRY_COUNT 34 > - > -typedef struct _SEC_IDT_TABLE { > - // > - // Reserved 8 bytes preceding IDT to store EFI_PEI_SERVICES**, since = IDT > base > - // address should be 8-byte alignment. > - // Note: For IA32, only the 4 bytes immediately preceding IDT is used= to store > - // EFI_PEI_SERVICES** > - // > - UINT64 PeiService; > - UINT64 IdtTable[SEC_IDT_ENTRY_COUNT]; > -} SEC_IDT_TABLE; > - > -/** > - Switch the stack in the temporary memory to the one in the permanent > memory. > - > - This function must be invoked after the memory migration immediately.= The > relative > - position of the stack in the temporary and permanent memory is same. > - > - @param TemporaryMemoryBase Base address of the temporary memory. > - @param PermenentMemoryBase Base address of the permanent memory. > -**/ > -VOID > -EFIAPI > -SecSwitchStack ( > - UINT32 TemporaryMemoryBase, > - UINT32 PermenentMemoryBase > - ); > - > -/** > - This service of the TEMPORARY_RAM_SUPPORT_PPI that migrates temporary > RAM into > - permanent memory. > - > - @param PeiServices Pointer to the PEI Services Table. > - @param TemporaryMemoryBase Source Address in temporary memory > from which the SEC or PEIM will copy the > - Temporary RAM contents. > - @param PermanentMemoryBase Destination Address in permanent > memory into which the SEC or PEIM will copy the > - Temporary RAM contents. > - @param CopySize Amount of memory to migrate from tempor= ary to > permanent memory. > - > - @retval EFI_SUCCESS The data was successfully returned. > - @retval EFI_INVALID_PARAMETER PermanentMemoryBase + CopySize > > TemporaryMemoryBase when > - TemporaryMemoryBase > PermanentMemoryBa= se. > - > -**/ > -EFI_STATUS > -EFIAPI > -SecTemporaryRamSupport ( > - IN CONST EFI_PEI_SERVICES **PeiServices, > - IN EFI_PHYSICAL_ADDRESS TemporaryMemoryBase, > - IN EFI_PHYSICAL_ADDRESS PermanentMemoryBase, > - IN UINTN CopySize > - ); > - > -/** > - Entry point to the C language phase of SEC. After the SEC assembly > - code has initialized some temporary memory and set up the stack, > - the control is transferred to this function. > - > - @param SizeOfRam Size of the temporary memory available for= use. > - @param TempRamBase Base address of temporary ram > - @param BootFirmwareVolume Base address of the Boot Firmware Volume. > - @param BootloaderParameter A parameter from bootloader, e.g. HobList > from SlimBootloader > - > -**/ > -VOID > -EFIAPI > -SecStartup ( > - IN UINT32 SizeOfRam, > - IN UINT32 TempRamBase, > - IN VOID *BootFirmwareVolume, > - IN UINT32 BootloaderParameter > - ); > - > -/** > - Find and return Pei Core entry point. > - > - It also find SEC and PEI Core file debug information. It will report = them if > - remote debug is enabled. > - > - @param BootFirmwareVolumePtr Point to the boot firmware volume. > - @param PeiCoreEntryPoint Point to the PEI core entry point. > - > -**/ > -VOID > -EFIAPI > -FindAndReportEntryPoints ( > - IN EFI_FIRMWARE_VOLUME_HEADER *BootFirmwareVolumePtr, > - OUT EFI_PEI_CORE_ENTRY_POINT *PeiCoreEntryPoint > - ); > - > -/** > - Autogenerated function that calls the library constructors for all of= the > module's > - dependent libraries. This function must be called by the SEC Core on= ce a stack > has > - been established. > - > -**/ > -VOID > -EFIAPI > -ProcessLibraryConstructorList ( > - VOID > - ); > - > -#endif > diff --git a/UefiPayloadPkg/UefiPayloadEntry/Ia32/DxeLoadFunc.c > b/UefiPayloadPkg/UefiPayloadEntry/Ia32/DxeLoadFunc.c > new file mode 100644 > index 0000000000..73abe56982 > --- /dev/null > +++ b/UefiPayloadPkg/UefiPayloadEntry/Ia32/DxeLoadFunc.c > @@ -0,0 +1,364 @@ > +/** @file > + Ia32-specific functionality for DxeLoad. > + > +Copyright (c) 2006 - 2020, Intel Corporation. All rights reserved.
> +Copyright (c) 2017, AMD Incorporated. All rights reserved.
> + > +SPDX-License-Identifier: BSD-2-Clause-Patent > + > +**/ > + > +#include > +#include > +#include > +#include > +#include > +#include > +#include > +#include "VirtualMemory.h" > +#include "UefiPayloadEntry.h" > + > +#define STACK_SIZE 0x20000 > +#define IDT_ENTRY_COUNT 32 > + > +typedef struct _X64_IDT_TABLE { > + // > + // Reserved 4 bytes preceding PeiService and IdtTable, > + // since IDT base address should be 8-byte alignment. > + // > + UINT32 Reserved; > + CONST EFI_PEI_SERVICES **PeiService; > + X64_IDT_GATE_DESCRIPTOR IdtTable[IDT_ENTRY_COUNT]; > +} X64_IDT_TABLE; > + > +// > +// Global Descriptor Table (GDT) > +// > +GLOBAL_REMOVE_IF_UNREFERENCED IA32_GDT gGdtEntries[] =3D { > +/* selector { Global Segment Descriptor } = */ > +/* 0x00 */ {{0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0}= }, //null descriptor > +/* 0x08 */ {{0xffff, 0, 0, 0x2, 1, 0, 1, 0xf, 0, 0, 1, 1, 0}= }, //linear data > segment descriptor > +/* 0x10 */ {{0xffff, 0, 0, 0xf, 1, 0, 1, 0xf, 0, 0, 1, 1, 0}= }, //linear code > segment descriptor > +/* 0x18 */ {{0xffff, 0, 0, 0x3, 1, 0, 1, 0xf, 0, 0, 1, 1, 0}= }, //system data > segment descriptor > +/* 0x20 */ {{0xffff, 0, 0, 0xa, 1, 0, 1, 0xf, 0, 0, 1, 1, 0}= }, //system code > segment descriptor > +/* 0x28 */ {{0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0}= }, //spare segment > descriptor > +/* 0x30 */ {{0xffff, 0, 0, 0x2, 1, 0, 1, 0xf, 0, 0, 1, 1, 0}= }, //system data > segment descriptor > +/* 0x38 */ {{0xffff, 0, 0, 0xa, 1, 0, 1, 0xf, 0, 1, 0, 1, 0}= }, //system code > segment descriptor > +/* 0x40 */ {{0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0}= }, //spare segment > descriptor > +}; > + > +// > +// IA32 Gdt register > +// > +GLOBAL_REMOVE_IF_UNREFERENCED CONST IA32_DESCRIPTOR gGdt =3D { > + sizeof (gGdtEntries) - 1, > + (UINTN) gGdtEntries > + }; > + > +GLOBAL_REMOVE_IF_UNREFERENCED IA32_DESCRIPTOR gLidtDescriptor =3D { > + sizeof (X64_IDT_GATE_DESCRIPTOR) * IDT_ENTRY_COUNT - 1, > + 0 > +}; > + > +/** > + Allocates and fills in the Page Directory and Page Table Entries to > + establish a 4G page table. > + > + @param[in] StackBase Stack base address. > + @param[in] StackSize Stack size. > + > + @return The address of page table. > + > +**/ > +UINTN > +Create4GPageTablesIa32Pae ( > + IN EFI_PHYSICAL_ADDRESS StackBase, > + IN UINTN StackSize > + ) > +{ > + UINT8 PhysicalAddressBits; > + EFI_PHYSICAL_ADDRESS PhysicalAddress; > + UINTN IndexOfPdpEntries; > + UINTN IndexOfPageDirectoryEnt= ries; > + UINT32 NumberOfPdpEntriesNeede= d; > + PAGE_MAP_AND_DIRECTORY_POINTER *PageMap; > + PAGE_MAP_AND_DIRECTORY_POINTER *PageDirectoryPointerEn= try; > + PAGE_TABLE_ENTRY *PageDirectoryEntry; > + UINTN TotalPagesNum; > + UINTN PageAddress; > + UINT64 AddressEncMask; > + > + // > + // Make sure AddressEncMask is contained to smallest supported addres= s field > + // > + AddressEncMask =3D PcdGet64 (PcdPteMemoryEncryptionAddressOrMask) & > PAGING_1G_ADDRESS_MASK_64; > + > + PhysicalAddressBits =3D 32; > + > + // > + // Calculate the table entries needed. > + // > + NumberOfPdpEntriesNeeded =3D (UINT32) LShiftU64 (1, (PhysicalAddressB= its - > 30)); > + > + TotalPagesNum =3D NumberOfPdpEntriesNeeded + 1; > + PageAddress =3D (UINTN) AllocatePageTableMemory (TotalPagesNum); > + ASSERT (PageAddress !=3D 0); > + > + PageMap =3D (VOID *) PageAddress; > + PageAddress +=3D SIZE_4KB; > + > + PageDirectoryPointerEntry =3D PageMap; > + PhysicalAddress =3D 0; > + > + for (IndexOfPdpEntries =3D 0; IndexOfPdpEntries < > NumberOfPdpEntriesNeeded; IndexOfPdpEntries++, > PageDirectoryPointerEntry++) { > + // > + // Each Directory Pointer entries points to a page of Page Director= y entires. > + // So allocate space for them and fill them in in the > IndexOfPageDirectoryEntries loop. > + // > + PageDirectoryEntry =3D (VOID *) PageAddress; > + PageAddress +=3D SIZE_4KB; > + > + // > + // Fill in a Page Directory Pointer Entries > + // > + PageDirectoryPointerEntry->Uint64 =3D (UINT64) (UINTN) PageDirector= yEntry > | AddressEncMask; > + PageDirectoryPointerEntry->Bits.Present =3D 1; > + > + for (IndexOfPageDirectoryEntries =3D 0; IndexOfPageDirectoryEntries= < 512; > IndexOfPageDirectoryEntries++, PageDirectoryEntry++, PhysicalAddress += =3D > SIZE_2MB) { > + if ((IsNullDetectionEnabled () && PhysicalAddress =3D=3D 0) > + || ((PhysicalAddress < StackBase + StackSize) > + && ((PhysicalAddress + SIZE_2MB) > StackBase))) { > + // > + // Need to split this 2M page that covers stack range. > + // > + Split2MPageTo4K (PhysicalAddress, (UINT64 *) PageDirectoryEntry= , > StackBase, StackSize); > + } else { > + // > + // Fill in the Page Directory entries > + // > + PageDirectoryEntry->Uint64 =3D (UINT64) PhysicalAddress | > AddressEncMask; > + PageDirectoryEntry->Bits.ReadWrite =3D 1; > + PageDirectoryEntry->Bits.Present =3D 1; > + PageDirectoryEntry->Bits.MustBe1 =3D 1; > + } > + } > + } > + > + for (; IndexOfPdpEntries < 512; IndexOfPdpEntries++, > PageDirectoryPointerEntry++) { > + ZeroMem ( > + PageDirectoryPointerEntry, > + sizeof (PAGE_MAP_AND_DIRECTORY_POINTER) > + ); > + } > + > + // > + // Protect the page table by marking the memory used for page table t= o be > + // read-only. > + // > + EnablePageTableProtection ((UINTN)PageMap, FALSE); > + > + return (UINTN) PageMap; > +} > + > +/** > + The function will check if IA32 PAE is supported. > + > + @retval TRUE IA32 PAE is supported. > + @retval FALSE IA32 PAE is not supported. > + > +**/ > +BOOLEAN > +IsIa32PaeSupport ( > + VOID > + ) > +{ > + UINT32 RegEax; > + UINT32 RegEdx; > + BOOLEAN Ia32PaeSupport; > + > + Ia32PaeSupport =3D FALSE; > + AsmCpuid (0x0, &RegEax, NULL, NULL, NULL); > + if (RegEax >=3D 0x1) { > + AsmCpuid (0x1, NULL, NULL, NULL, &RegEdx); > + if ((RegEdx & BIT6) !=3D 0) { > + Ia32PaeSupport =3D TRUE; > + } > + } > + > + return Ia32PaeSupport; > +} > + > +/** > + The function will check if page table should be setup or not. > + > + @retval TRUE Page table should be created. > + @retval FALSE Page table should not be created. > + > +**/ > +BOOLEAN > +ToBuildPageTable ( > + VOID > + ) > +{ > + if (!IsIa32PaeSupport ()) { > + return FALSE; > + } > + > + if (IsNullDetectionEnabled ()) { > + return TRUE; > + } > + > + if (PcdGet8 (PcdHeapGuardPropertyMask) !=3D 0) { > + return TRUE; > + } > + > + if (PcdGetBool (PcdCpuStackGuard)) { > + return TRUE; > + } > + > + if (IsEnableNonExecNeeded ()) { > + return TRUE; > + } > + > + return FALSE; > +} > + > +/** > + Transfers control to DxeCore. > + > + This function performs a CPU architecture specific operations to exe= cute > + the entry point of DxeCore with the parameters of HobList. > + > + @param DxeCoreEntryPoint The entry point of DxeCore. > + @param HobList The start of HobList passed to DxeC= ore. > + > +**/ > +VOID > +HandOffToDxeCore ( > + IN EFI_PHYSICAL_ADDRESS DxeCoreEntryPoint, > + IN EFI_PEI_HOB_POINTERS HobList > + ) > +{ > + EFI_PHYSICAL_ADDRESS BaseOfStack; > + EFI_PHYSICAL_ADDRESS TopOfStack; > + UINTN PageTables; > + X64_IDT_GATE_DESCRIPTOR *IdtTable; > + UINTN SizeOfTemplate; > + VOID *TemplateBase; > + EFI_PHYSICAL_ADDRESS VectorAddress; > + UINT32 Index; > + X64_IDT_TABLE *IdtTableForX64; > + > + // > + // Clear page 0 and mark it as allocated if NULL pointer detection is= enabled. > + // > + if (IsNullDetectionEnabled ()) { > + ClearFirst4KPage (HobList.Raw); > + BuildMemoryAllocationHob (0, EFI_PAGES_TO_SIZE (1), > EfiBootServicesData); > + } > + > + BaseOfStack =3D (EFI_PHYSICAL_ADDRESS) (UINTN) AllocatePages > (EFI_SIZE_TO_PAGES (STACK_SIZE)); > + ASSERT (BaseOfStack !=3D 0); > + > + if (FeaturePcdGet(PcdDxeIplSwitchToLongMode)) { > + // > + // Compute the top of the stack we were allocated, which is used to= load X64 > dxe core. > + // Pre-allocate a 32 bytes which confroms to x64 calling convention= . > + // > + // The first four parameters to a function are passed in rcx, rdx, = r8 and r9. > + // Any further parameters are pushed on the stack. Furthermore, spa= ce (4 * > 8bytes) for the > + // register parameters is reserved on the stack, in case the called= function > + // wants to spill them; this is important if the function is variad= ic. > + // > + TopOfStack =3D BaseOfStack + EFI_SIZE_TO_PAGES (STACK_SIZE) * > EFI_PAGE_SIZE - 32; > + > + // > + // x64 Calling Conventions requires that the stack must be aligned= to 16 > bytes > + // > + TopOfStack =3D (EFI_PHYSICAL_ADDRESS) (UINTN) ALIGN_POINTER > (TopOfStack, 16); > + > + // > + // Load the GDT of Go64. Since the GDT of 32-bit Tiano locates in t= he > BS_DATA > + // memory, it may be corrupted when copying FV to high-end memory > + // > + AsmWriteGdtr (&gGdt); > + // > + // Create page table and save PageMapLevel4 to CR3 > + // > + PageTables =3D CreateIdentityMappingPageTables (BaseOfStack, STACK_= SIZE); > + > + // > + // Paging might be already enabled. To avoid conflict configuration= , > + // disable paging first anyway. > + // > + AsmWriteCr0 (AsmReadCr0 () & (~BIT31)); > + AsmWriteCr3 (PageTables); > + > + // > + // Update the contents of BSP stack HOB to reflect the real stack i= nfo passed > to DxeCore. > + // > + UpdateStackHob (BaseOfStack, STACK_SIZE); > + > + SizeOfTemplate =3D AsmGetVectorTemplatInfo (&TemplateBase); > + > + VectorAddress =3D (EFI_PHYSICAL_ADDRESS) (UINTN) AllocatePages > (EFI_SIZE_TO_PAGES(sizeof (X64_IDT_TABLE) + SizeOfTemplate * > IDT_ENTRY_COUNT)); > + ASSERT (VectorAddress !=3D 0); > + > + // > + // Store EFI_PEI_SERVICES** in the 4 bytes immediately preceding ID= T to > avoid that > + // it may not be gotten correctly after IDT register is re-written. > + // > + IdtTableForX64 =3D (X64_IDT_TABLE *) (UINTN) VectorAddress; > + IdtTableForX64->PeiService =3D NULL; > + > + VectorAddress =3D (EFI_PHYSICAL_ADDRESS) (UINTN) (IdtTableForX64 + = 1); > + IdtTable =3D IdtTableForX64->IdtTable; > + for (Index =3D 0; Index < IDT_ENTRY_COUNT; Index++) { > + IdtTable[Index].Ia32IdtEntry.Bits.GateType =3D 0x8e; > + IdtTable[Index].Ia32IdtEntry.Bits.Reserved_0 =3D 0; > + IdtTable[Index].Ia32IdtEntry.Bits.Selector =3D SYS_CODE64_SEL= ; > + > + IdtTable[Index].Ia32IdtEntry.Bits.OffsetLow =3D (UINT16) Vector= Address; > + IdtTable[Index].Ia32IdtEntry.Bits.OffsetHigh =3D (UINT16) (RShif= tU64 > (VectorAddress, 16)); > + IdtTable[Index].Offset32To63 =3D (UINT32) (RShif= tU64 > (VectorAddress, 32)); > + IdtTable[Index].Reserved =3D 0; > + > + CopyMem ((VOID *) (UINTN) VectorAddress, TemplateBase, > SizeOfTemplate); > + AsmVectorFixup ((VOID *) (UINTN) VectorAddress, (UINT8) Index); > + > + VectorAddress +=3D SizeOfTemplate; > + } > + > + gLidtDescriptor.Base =3D (UINTN) IdtTable; > + > + > + AsmWriteIdtr (&gLidtDescriptor); > + > + DEBUG (( > + DEBUG_INFO, > + "%a() Stack Base: 0x%lx, Stack Size: 0x%x\n", > + __FUNCTION__, > + BaseOfStack, > + STACK_SIZE > + )); > + > + // > + // Go to Long Mode and transfer control to DxeCore. > + // Interrupts will not get turned on until the CPU AP is loaded. > + // Call x64 drivers passing in single argument, a pointer to the HO= Bs. > + // > + AsmEnablePaging64 ( > + SYS_CODE64_SEL, > + DxeCoreEntryPoint, > + (EFI_PHYSICAL_ADDRESS)(UINTN)(HobList.Raw), > + 0, > + TopOfStack > + ); > + } else { > + // 32bit UEFI payload could be supported if required later. > + DEBUG ((DEBUG_ERROR, "NOT support 32bit UEFI payload\n")); > + ASSERT (FALSE); > + } > + > +} > + > diff --git a/UefiPayloadPkg/UefiPayloadEntry/Ia32/IdtVectorAsm.nasm > b/UefiPayloadPkg/UefiPayloadEntry/Ia32/IdtVectorAsm.nasm > new file mode 100644 > index 0000000000..4f9b98f18b > --- /dev/null > +++ b/UefiPayloadPkg/UefiPayloadEntry/Ia32/IdtVectorAsm.nasm > @@ -0,0 +1,71 @@ > +;/** @file > +; > +; IDT vector entry. > +; > +; Copyright (c) 2007 - 2016, Intel Corporation. All rights reserved. > +; SPDX-License-Identifier: BSD-2-Clause-Patent > +; > +;**/ > + > + SECTION .text > + > +; > +;----------------------------------------------------------------------= -------- > +; Generic IDT Vector Handlers for the Host. > +; > +;----------------------------------------------------------------------= -------- > + > +ALIGN 8 > +global ASM_PFX(AsmGetVectorTemplatInfo) > +global ASM_PFX(AsmVectorFixup) > + > +@VectorTemplateBase: > + push eax > + db 0x6a ; push #VectorNumber > +@VectorNum: > + db 0 > + mov eax, CommonInterruptEntry > + jmp eax > +@VectorTemplateEnd: > + > +global ASM_PFX(AsmGetVectorTemplatInfo) > +ASM_PFX(AsmGetVectorTemplatInfo): > + mov ecx, [esp + 4] > + mov dword [ecx], @VectorTemplateBase > + mov eax, (@VectorTemplateEnd - @VectorTemplateBase) > + ret > + > +global ASM_PFX(AsmVectorFixup) > +ASM_PFX(AsmVectorFixup): > + mov eax, dword [esp + 8] > + mov ecx, [esp + 4] > + mov [ecx + (@VectorNum - @VectorTemplateBase)], al > + ret > + > +;---------------------------------------; > +; CommonInterruptEntry ; > +;---------------------------------------; > +; The follow algorithm is used for the common interrupt routine. > + > +; > +; +---------------------+ <-- 16-byte aligned ensured by processor > +; + Old SS + > +; +---------------------+ > +; + Old RSP + > +; +---------------------+ > +; + RFlags + > +; +---------------------+ > +; + CS + > +; +---------------------+ > +; + RIP + > +; +---------------------+ > +; + Error Code + > +; +---------------------+ > +; + Vector Number + > +; +---------------------+ > + > +CommonInterruptEntry: > + cli > + > + jmp $ > + > diff --git a/UefiPayloadPkg/UefiPayloadEntry/Ia32/SecEntry.nasm > b/UefiPayloadPkg/UefiPayloadEntry/Ia32/SecEntry.nasm > new file mode 100644 > index 0000000000..fa5ed159c6 > --- /dev/null > +++ b/UefiPayloadPkg/UefiPayloadEntry/Ia32/SecEntry.nasm > @@ -0,0 +1,46 @@ > +;----------------------------------------------------------------------= -------- > +;* > +;* Copyright (c) 2006 - 2020, Intel Corporation. All rights reserved.=
> +;* SPDX-License-Identifier: BSD-2-Clause-Patent > + > +;----------------------------------------------------------------------= -------- > + > +#include > + > +SECTION .text > + > +extern ASM_PFX(PayloadEntry) > +extern ASM_PFX(PcdGet32 (PcdPayloadStackTop)) > + > +; > +; SecCore Entry Point > +; > +; Processor is in flat protected mode > + > +global ASM_PFX(_ModuleEntryPoint) > +ASM_PFX(_ModuleEntryPoint): > + > + ; > + ; Disable all the interrupts > + ; > + cli > + > + ; > + ; Save the bootloader parameter base address > + ; > + mov eax, [esp + 4] > + > + mov esp, FixedPcdGet32 (PcdPayloadStackTop) > + > + ; > + ; Push the bootloader parameter address onto new stack > + ; > + push 0 > + push eax > + > + ; > + ; Call into C code > + ; > + call ASM_PFX(PayloadEntry) > + jmp $ > + > diff --git a/UefiPayloadPkg/UefiPayloadEntry/LoadDxeCore.c > b/UefiPayloadPkg/UefiPayloadEntry/LoadDxeCore.c > new file mode 100644 > index 0000000000..d1c9cecd93 > --- /dev/null > +++ b/UefiPayloadPkg/UefiPayloadEntry/LoadDxeCore.c > @@ -0,0 +1,280 @@ > +/** @file > + > + Copyright (c) 2020, Intel Corporation. All rights reserved.
> + > + SPDX-License-Identifier: BSD-2-Clause-Patent > + > +**/ > + > +#include "UefiPayloadEntry.h" > + > +VOID* > +AllocateCodePages ( > + IN UINTN Pages > + ) > +{ > + VOID *Alloc; > + EFI_PEI_HOB_POINTERS Hob; > + > + Alloc =3D AllocatePages (Pages); > + if (Alloc =3D=3D NULL) { > + return NULL; > + } > + > + // find the HOB we just created, and change the type to EfiBootServic= esCode > + Hob.Raw =3D GetFirstHob (EFI_HOB_TYPE_MEMORY_ALLOCATION); > + while (Hob.Raw !=3D NULL) { > + if (Hob.MemoryAllocation->AllocDescriptor.MemoryBaseAddress =3D=3D > (UINTN)Alloc) { > + Hob.MemoryAllocation->AllocDescriptor.MemoryType =3D > EfiBootServicesCode; > + return Alloc; > + } > + Hob.Raw =3D GetNextHob (EFI_HOB_TYPE_MEMORY_ALLOCATION, > GET_NEXT_HOB (Hob)); > + } > + > + ASSERT (FALSE); > + > + FreePages (Alloc, Pages); > + return NULL; > +} > + > + > +EFI_STATUS > +LoadPeCoffImage ( > + IN VOID *PeCoffImage, > + OUT EFI_PHYSICAL_ADDRESS *ImageAddress, > + OUT UINT64 *ImageSize, > + OUT EFI_PHYSICAL_ADDRESS *EntryPoint > + ) > +{ > + RETURN_STATUS Status; > + PE_COFF_LOADER_IMAGE_CONTEXT ImageContext; > + VOID *Buffer; > + > + ZeroMem (&ImageContext, sizeof (ImageContext)); > + > + ImageContext.Handle =3D PeCoffImage; > + ImageContext.ImageRead =3D PeCoffLoaderImageReadFromMemory; > + > + Status =3D PeCoffLoaderGetImageInfo (&ImageContext); > + ASSERT_EFI_ERROR (Status); > + > + // > + // Allocate Memory for the image > + // > + Buffer =3D AllocateCodePages > (EFI_SIZE_TO_PAGES((UINT32)ImageContext.ImageSize)); > + ASSERT (Buffer !=3D 0); > + > + ImageContext.ImageAddress =3D (EFI_PHYSICAL_ADDRESS)(UINTN)Buffer; > + > + // > + // Load the image to our new buffer > + // > + Status =3D PeCoffLoaderLoadImage (&ImageContext); > + ASSERT_EFI_ERROR (Status); > + > + // > + // Relocate the image in our new buffer > + // > + Status =3D PeCoffLoaderRelocateImage (&ImageContext); > + ASSERT_EFI_ERROR (Status); > + > + > + *ImageAddress =3D ImageContext.ImageAddress; > + *ImageSize =3D ImageContext.ImageSize; > + *EntryPoint =3D ImageContext.EntryPoint; > + > + return Status; > +} > + > +/** > + This function searchs a given file type within a valid FV. > + > + @param FvHeader A pointer to firmware volume header that conta= ins the > set of files > + to be searched. > + @param FileType File type to be searched. > + @param FileHeader A pointer to the discovered file, if successfu= l. > + > + @retval EFI_SUCCESS Successfully found FileType > + @retval EFI_NOT_FOUND File type can't be found. > +**/ > +EFI_STATUS > +FvFindFile ( > + IN EFI_FIRMWARE_VOLUME_HEADER *FvHeader, > + IN EFI_FV_FILETYPE FileType, > + OUT EFI_FFS_FILE_HEADER **FileHeader > + ) > +{ > + EFI_PHYSICAL_ADDRESS CurrentAddress; > + EFI_PHYSICAL_ADDRESS EndOfFirmwareVolume; > + EFI_FFS_FILE_HEADER *File; > + UINT32 Size; > + EFI_PHYSICAL_ADDRESS EndOfFile; > + > + CurrentAddress =3D (EFI_PHYSICAL_ADDRESS)(UINTN) FvHeader; > + EndOfFirmwareVolume =3D CurrentAddress + FvHeader->FvLength; > + > + // > + // Loop through the FFS files > + // > + for (EndOfFile =3D CurrentAddress + FvHeader->HeaderLength; ; ) { > + CurrentAddress =3D (EndOfFile + 7) & 0xfffffffffffffff8ULL; > + if (CurrentAddress > EndOfFirmwareVolume) { > + break; > + } > + > + File =3D (EFI_FFS_FILE_HEADER*)(UINTN) CurrentAddress; > + if (IS_FFS_FILE2 (File)) { > + Size =3D FFS_FILE2_SIZE (File); > + if (Size <=3D 0x00FFFFFF) { > + break; > + } > + } else { > + Size =3D FFS_FILE_SIZE (File); > + if (Size < sizeof (EFI_FFS_FILE_HEADER)) { > + break; > + } > + } > + > + EndOfFile =3D CurrentAddress + Size; > + if (EndOfFile > EndOfFirmwareVolume) { > + break; > + } > + > + // > + // Look for file type > + // > + if (File->Type =3D=3D FileType) { > + *FileHeader =3D File; > + return EFI_SUCCESS; > + } > + } > + > + return EFI_NOT_FOUND; > +} > + > + > +/** > + This function searchs a given section type within a valid FFS file. > + > + @param FileHeader A pointer to the file header that conta= ins the set of > sections to > + be searched. > + @param SearchType The value of the section type to search= . > + @param SectionData A pointer to the discovered section, if= successful. > + > + @retval EFI_SUCCESS The section was found. > + @retval EFI_NOT_FOUND The section was not found. > + > +**/ > +EFI_STATUS > +FileFindSection ( > + IN EFI_FFS_FILE_HEADER *FileHeader, > + IN EFI_SECTION_TYPE SectionType, > + OUT VOID **SectionData > + ) > +{ > + UINT32 FileSize; > + EFI_COMMON_SECTION_HEADER *Section; > + UINT32 SectionSize; > + UINT32 Index; > + > + if (IS_FFS_FILE2 (FileHeader)) { > + FileSize =3D FFS_FILE2_SIZE (FileHeader); > + } else { > + FileSize =3D FFS_FILE_SIZE (FileHeader); > + } > + FileSize -=3D sizeof (EFI_FFS_FILE_HEADER); > + > + Section =3D (EFI_COMMON_SECTION_HEADER *)(FileHeader + 1); > + Index =3D 0; > + while (Index < FileSize) { > + if (Section->Type =3D=3D SectionType) { > + if (IS_SECTION2 (Section)) { > + *SectionData =3D (VOID *)((UINT8 *) Section + sizeof > (EFI_COMMON_SECTION_HEADER2)); > + } else { > + *SectionData =3D (VOID *)((UINT8 *) Section + sizeof > (EFI_COMMON_SECTION_HEADER)); > + } > + return EFI_SUCCESS; > + } > + > + if (IS_SECTION2 (Section)) { > + SectionSize =3D SECTION2_SIZE (Section); > + } else { > + SectionSize =3D SECTION_SIZE (Section); > + } > + > + SectionSize =3D GET_OCCUPIED_SIZE (SectionSize, 4); > + ASSERT (SectionSize !=3D 0); > + Index +=3D SectionSize; > + > + Section =3D (EFI_COMMON_SECTION_HEADER *)((UINT8 *)Section + > SectionSize); > + } > + > + return EFI_NOT_FOUND; > +} > + > + > +/** > + Find DXE core from FV and build DXE core HOBs. > + > + @param[out] DxeCoreEntryPoint DXE core entry point > + > + @retval EFI_SUCCESS If it completed successfully. > + @retval EFI_NOT_FOUND If it failed to load DXE FV. > +**/ > +EFI_STATUS > +LoadDxeCore ( > + OUT PHYSICAL_ADDRESS *DxeCoreEntryPoint > + ) > +{ > + EFI_STATUS Status; > + EFI_FIRMWARE_VOLUME_HEADER *PayloadFv; > + EFI_FIRMWARE_VOLUME_HEADER *DxeCoreFv; > + EFI_FFS_FILE_HEADER *FileHeader; > + VOID *PeCoffImage; > + EFI_PHYSICAL_ADDRESS ImageAddress; > + UINT64 ImageSize; > + > + PayloadFv =3D (EFI_FIRMWARE_VOLUME_HEADER *)(UINTN)PcdGet32 > (PcdPayloadFdMemBase); > + > + // > + // DXE FV is inside Payload FV. Here find DXE FV from Payload FV > + // > + Status =3D FvFindFile (PayloadFv, > EFI_FV_FILETYPE_FIRMWARE_VOLUME_IMAGE, &FileHeader); > + if (EFI_ERROR (Status)) { > + return Status; > + } > + Status =3D FileFindSection (FileHeader, > EFI_SECTION_FIRMWARE_VOLUME_IMAGE, (VOID **)&DxeCoreFv); > + if (EFI_ERROR (Status)) { > + return Status; > + } > + > + // > + // Report DXE FV to DXE core > + // > + BuildFvHob ((EFI_PHYSICAL_ADDRESS) (UINTN) DxeCoreFv, DxeCoreFv- > >FvLength); > + > + // > + // Find DXE core file from DXE FV > + // > + Status =3D FvFindFile (DxeCoreFv, EFI_FV_FILETYPE_DXE_CORE, &FileHead= er); > + if (EFI_ERROR (Status)) { > + return Status; > + } > + > + Status =3D FileFindSection (FileHeader, EFI_SECTION_PE32, (VOID > **)&PeCoffImage); > + if (EFI_ERROR (Status)) { > + return Status; > + } > + > + // > + // Get DXE core info > + // > + Status =3D LoadPeCoffImage (PeCoffImage, &ImageAddress, &ImageSize, > DxeCoreEntryPoint); > + if (EFI_ERROR (Status)) { > + return Status; > + } > + > + BuildModuleHob (&FileHeader->Name, ImageAddress, EFI_SIZE_TO_PAGES > ((UINT32) ImageSize) * EFI_PAGE_SIZE, *DxeCoreEntryPoint); > + > + return EFI_SUCCESS; > +} > diff --git a/UefiPayloadPkg/UefiPayloadEntry/MemoryAllocation.c > b/UefiPayloadPkg/UefiPayloadEntry/MemoryAllocation.c > new file mode 100644 > index 0000000000..1204573b3e > --- /dev/null > +++ b/UefiPayloadPkg/UefiPayloadEntry/MemoryAllocation.c > @@ -0,0 +1,201 @@ > +/** @file > + > + > + Copyright (c) 2008 - 2009, Apple Inc. All rights reserved.
> + Copyright (c) 2020, Intel Corporation. All rights reserved.
> + > + SPDX-License-Identifier: BSD-2-Clause-Patent > + > +**/ > + > +#include "UefiPayloadEntry.h" > + > +/** > + Allocates one or more pages of type EfiBootServicesData. > + > + Allocates the number of pages of MemoryType and returns a pointer to = the > + allocated buffer. The buffer returned is aligned on a 4KB boundary. > + If Pages is 0, then NULL is returned. > + If there is not enough memory availble to satisfy the request, then N= ULL > + is returned. > + > + @param Pages The number of 4 KB pages to allocate. > + @return A pointer to the allocated buffer or NULL if allocation fail= s. > +**/ > +VOID * > +EFIAPI > +AllocatePages ( > + IN UINTN Pages > + ) > +{ > + EFI_PEI_HOB_POINTERS Hob; > + EFI_PHYSICAL_ADDRESS Offset; > + EFI_HOB_HANDOFF_INFO_TABLE *HobTable; > + > + Hob.Raw =3D GetHobList (); > + HobTable =3D Hob.HandoffInformationTable; > + > + if (Pages =3D=3D 0) { > + return NULL; > + } > + > + // Make sure allocation address is page alligned. > + Offset =3D HobTable->EfiFreeMemoryTop & EFI_PAGE_MASK; > + if (Offset !=3D 0) { > + HobTable->EfiFreeMemoryTop -=3D Offset; > + } > + > + // > + // Check available memory for the allocation > + // > + if (HobTable->EfiFreeMemoryTop - ((Pages * EFI_PAGE_SIZE) + sizeof > (EFI_HOB_MEMORY_ALLOCATION)) < HobTable->EfiFreeMemoryBottom) { > + return NULL; > + } > + > + HobTable->EfiFreeMemoryTop -=3D Pages * EFI_PAGE_SIZE; > + BuildMemoryAllocationHob (HobTable->EfiFreeMemoryTop, Pages * > EFI_PAGE_SIZE, EfiBootServicesData); > + > + return (VOID *)(UINTN)HobTable->EfiFreeMemoryTop; > +} > + > +/** > + Frees one or more 4KB pages that were previously allocated with one o= f the > page allocation > + functions in the Memory Allocation Library. > + > + Frees the number of 4KB pages specified by Pages from the buffer spec= ified > by Buffer. Buffer > + must have been allocated on a previous call to the page allocation se= rvices of > the Memory > + Allocation Library. If it is not possible to free allocated pages, t= hen this > function will > + perform no actions. > + > + If Buffer was not allocated with a page allocation function in the Me= mory > Allocation Library, > + then ASSERT(). > + If Pages is zero, then ASSERT(). > + > + @param Buffer Pointer to the buffer of pages to free. > + @param Pages The number of 4 KB pages to free. > + > +**/ > +VOID > +EFIAPI > +FreePages ( > + IN VOID *Buffer, > + IN UINTN Pages > + ) > +{ > +} > + > +/** > + Allocates one or more pages of type EfiBootServicesData at a specifie= d > alignment. > + > + Allocates the number of pages specified by Pages of type EfiBootServi= cesData > with an > + alignment specified by Alignment. > + If Pages is 0, then NULL is returned. > + If Alignment is not a power of two and Alignment is not zero, then AS= SERT(). > + If there is no enough memory at the specified alignment available to = satisfy > the > + request, then NULL is returned. > + > + @param Pages The number of 4 KB pages to allocate. > + @param Alignment The requested alignment of the allocation. > + > + @return A pointer to the allocated buffer or NULL if allocation fails= . > +**/ > +VOID * > +EFIAPI > +AllocateAlignedPages ( > + IN UINTN Pages, > + IN UINTN Alignment > + ) > +{ > + VOID *Memory; > + UINTN AlignmentMask; > + > + // > + // Alignment must be a power of two or zero. > + // > + ASSERT ((Alignment & (Alignment - 1)) =3D=3D 0); > + > + if (Pages =3D=3D 0) { > + return NULL; > + } > + > + // > + // Check overflow. > + // > + ASSERT (Pages <=3D (MAX_ADDRESS - EFI_SIZE_TO_PAGES (Alignment))); > + > + Memory =3D (VOID *)(UINTN)AllocatePages (Pages + EFI_SIZE_TO_PAGES > (Alignment)); > + if (Memory =3D=3D NULL) { > + return NULL; > + } > + > + if (Alignment =3D=3D 0) { > + AlignmentMask =3D Alignment; > + } else { > + AlignmentMask =3D Alignment - 1; > + } > + > + return (VOID *) (UINTN) (((UINTN) Memory + AlignmentMask) & > ~AlignmentMask); > +} > + > + > +/** > + Allocates a buffer of type EfiBootServicesData. > + > + Allocates the number bytes specified by AllocationSize of type > EfiBootServicesData and returns a > + pointer to the allocated buffer. If AllocationSize is 0, then a vali= d buffer of 0 > size is > + returned. If there is not enough memory remaining to satisfy the req= uest, > then NULL is returned. > + > + @param AllocationSize The number of bytes to allocate. > + > + @return A pointer to the allocated buffer or NULL if allocation fails= . > + > +**/ > +VOID * > +EFIAPI > +AllocatePool ( > + IN UINTN AllocationSize > + ) > +{ > + EFI_HOB_MEMORY_POOL *Hob; > + > + if (AllocationSize > 0x4000) { > + // Please use AllocatePages for big allocations > + return NULL; > + } > + > + Hob =3D (EFI_HOB_MEMORY_POOL *)CreateHob > (EFI_HOB_TYPE_MEMORY_POOL, (UINT16)(sizeof > (EFI_HOB_TYPE_MEMORY_POOL) + AllocationSize)); > + return (VOID *)(Hob + 1); > +} > + > +/** > + Allocates and zeros a buffer of type EfiBootServicesData. > + > + Allocates the number bytes specified by AllocationSize of type > EfiBootServicesData, clears the > + buffer with zeros, and returns a pointer to the allocated buffer. If > AllocationSize is 0, then a > + valid buffer of 0 size is returned. If there is not enough memory re= maining to > satisfy the > + request, then NULL is returned. > + > + @param AllocationSize The number of bytes to allocate and zer= o. > + > + @return A pointer to the allocated buffer or NULL if allocation fails= . > + > +**/ > +VOID * > +EFIAPI > +AllocateZeroPool ( > + IN UINTN AllocationSize > + ) > +{ > + VOID *Buffer; > + > + Buffer =3D AllocatePool (AllocationSize); > + if (Buffer =3D=3D NULL) { > + return NULL; > + } > + > + ZeroMem (Buffer, AllocationSize); > + > + return Buffer; > +} > + > + > diff --git a/UefiPayloadPkg/BlSupportPei/BlSupportPei.c > b/UefiPayloadPkg/UefiPayloadEntry/UefiPayloadEntry.c > similarity index 52% > rename from UefiPayloadPkg/BlSupportPei/BlSupportPei.c > rename to UefiPayloadPkg/UefiPayloadEntry/UefiPayloadEntry.c > index a7e99f9ec6..4be2122a4f 100644 > --- a/UefiPayloadPkg/BlSupportPei/BlSupportPei.c > +++ b/UefiPayloadPkg/UefiPayloadEntry/UefiPayloadEntry.c > @@ -1,144 +1,66 @@ > /** @file > - This PEIM will parse bootloader information and report resource infor= mation > into pei core. > - This file contains the main entrypoint of the PEIM. >=20 > -Copyright (c) 2014 - 2019, Intel Corporation. All rights reserved.
> -SPDX-License-Identifier: BSD-2-Clause-Patent > + Copyright (c) 2014 - 2020, Intel Corporation. All rights reserved. > + SPDX-License-Identifier: BSD-2-Clause-Patent >=20 > **/ > -#include "BlSupportPei.h" > - > -#define LEGACY_8259_MASK_REGISTER_MASTER 0x21 > -#define LEGACY_8259_MASK_REGISTER_SLAVE 0xA1 > - > -EFI_MEMORY_TYPE_INFORMATION mDefaultMemoryTypeInformation[] =3D { > - { EfiACPIReclaimMemory, FixedPcdGet32 > (PcdMemoryTypeEfiACPIReclaimMemory) }, > - { EfiACPIMemoryNVS, FixedPcdGet32 > (PcdMemoryTypeEfiACPIMemoryNVS) }, > - { EfiReservedMemoryType, FixedPcdGet32 > (PcdMemoryTypeEfiReservedMemoryType) }, > - { EfiRuntimeServicesData, FixedPcdGet32 > (PcdMemoryTypeEfiRuntimeServicesData) }, > - { EfiRuntimeServicesCode, FixedPcdGet32 > (PcdMemoryTypeEfiRuntimeServicesCode) }, > - { EfiMaxMemoryType, 0 } > -}; > - > -EFI_PEI_PPI_DESCRIPTOR mPpiBootMode[] =3D { > - { > - EFI_PEI_PPI_DESCRIPTOR_PPI | > EFI_PEI_PPI_DESCRIPTOR_TERMINATE_LIST, > - &gEfiPeiMasterBootModePpiGuid, > - NULL > - } > -}; >=20 > -EFI_PEI_GRAPHICS_DEVICE_INFO_HOB mDefaultGraphicsDeviceInfo =3D { > - MAX_UINT16, MAX_UINT16, MAX_UINT16, MAX_UINT16, MAX_UINT8, > MAX_UINT8 > -}; > +#include "UefiPayloadEntry.h" > + >=20 > /** > - Create memory mapped io resource hob. > + Transfers control to DxeCore. > + > + This function performs a CPU architecture specific operations to exe= cute > + the entry point of DxeCore with the parameters of HobList. >=20 > - @param MmioBase Base address of the memory mapped io range > - @param MmioSize Length of the memory mapped io range > + @param DxeCoreEntryPoint The entry point of DxeCore. > + @param HobList The start of HobList passed to DxeC= ore. >=20 > **/ > VOID > -BuildMemoryMappedIoRangeHob ( > - EFI_PHYSICAL_ADDRESS MmioBase, > - UINT64 MmioSize > - ) > -{ > - BuildResourceDescriptorHob ( > - EFI_RESOURCE_MEMORY_MAPPED_IO, > - (EFI_RESOURCE_ATTRIBUTE_PRESENT | > - EFI_RESOURCE_ATTRIBUTE_INITIALIZED | > - EFI_RESOURCE_ATTRIBUTE_UNCACHEABLE | > - EFI_RESOURCE_ATTRIBUTE_TESTED), > - MmioBase, > - MmioSize > - ); > - > - BuildMemoryAllocationHob ( > - MmioBase, > - MmioSize, > - EfiMemoryMappedIO > - ); > -} > +HandOffToDxeCore ( > + IN EFI_PHYSICAL_ADDRESS DxeCoreEntryPoint, > + IN EFI_PEI_HOB_POINTERS HobList > + ); >=20 > -/** > - Check the integrity of firmware volume header > - > - @param[in] FwVolHeader A pointer to a firmware volume header > - > - @retval TRUE The firmware volume is consistent > - @retval FALSE The firmware volume has corrupted. >=20 > -**/ > -STATIC > -BOOLEAN > -IsFvHeaderValid ( > - IN EFI_FIRMWARE_VOLUME_HEADER *FwVolHeader > +EFI_STATUS > +MemInfoCallback ( > + IN MEMROY_MAP_ENTRY *MemoryMapEntry, > + IN VOID *Params > ) > { > - UINT16 Checksum; > + EFI_PHYSICAL_ADDRESS Base; > + EFI_RESOURCE_TYPE Type; > + UINT64 Size; > + EFI_RESOURCE_ATTRIBUTE_TYPE Attribue; >=20 > - // Skip nv storage fv > - if (CompareMem (&FwVolHeader->FileSystemGuid, > &gEfiFirmwareFileSystem2Guid, sizeof(EFI_GUID)) !=3D 0 ) { > - return FALSE; > - } > + Type =3D (MemoryMapEntry->Type =3D=3D 1) ? > EFI_RESOURCE_SYSTEM_MEMORY : EFI_RESOURCE_MEMORY_RESERVED; > + Base =3D MemoryMapEntry->Base; > + Size =3D MemoryMapEntry->Size; >=20 > - if ( (FwVolHeader->Revision !=3D EFI_FVH_REVISION) || > - (FwVolHeader->Signature !=3D EFI_FVH_SIGNATURE) || > - (FwVolHeader->FvLength =3D=3D ((UINTN) -1)) || > - ((FwVolHeader->HeaderLength & 0x01 ) !=3D0) ) { > - return FALSE; > - } > + Attribue =3D EFI_RESOURCE_ATTRIBUTE_PRESENT | > + EFI_RESOURCE_ATTRIBUTE_INITIALIZED | > + EFI_RESOURCE_ATTRIBUTE_TESTED | > + EFI_RESOURCE_ATTRIBUTE_UNCACHEABLE | > + EFI_RESOURCE_ATTRIBUTE_WRITE_COMBINEABLE | > + EFI_RESOURCE_ATTRIBUTE_WRITE_THROUGH_CACHEABLE | > + EFI_RESOURCE_ATTRIBUTE_WRITE_BACK_CACHEABLE; >=20 > - Checksum =3D CalculateCheckSum16 ((UINT16 *) FwVolHeader, FwVolHeader= - > >HeaderLength); > - if (Checksum !=3D 0) { > - DEBUG (( DEBUG_ERROR, > - "ERROR - Invalid Firmware Volume Header Checksum, change = 0x%04x > to 0x%04x\r\n", > - FwVolHeader->Checksum, > - (UINT16)( Checksum + FwVolHeader->Checksum ))); > - return TRUE; //FALSE; Need update UEFI build tool when patching ent= rypoin > @start of fd. > + if (Base >=3D BASE_4GB ) { > + // Remove tested attribute to avoid DXE core to dispatch driver to = memory > above 4GB > + Attribue &=3D ~EFI_RESOURCE_ATTRIBUTE_TESTED; > } >=20 > - return TRUE; > -} > - > -/** > - Install FvInfo PPI and create fv hobs for remained fvs > + BuildResourceDescriptorHob (Type, Attribue, (EFI_PHYSICAL_ADDRESS)Bas= e, > Size); > + DEBUG ((DEBUG_INFO , "buildhob: base =3D 0x%lx, size =3D 0x%lx, type = = =3D > 0x%x\n", Base, Size, Type)); >=20 > -**/ > -VOID > -PeiReportRemainedFvs ( > - VOID > - ) > -{ > - UINT8* TempPtr; > - UINT8* EndPtr; > - > - TempPtr =3D (UINT8* )(UINTN) PcdGet32 (PcdPayloadFdMemBase); > - EndPtr =3D (UINT8* )(UINTN) (PcdGet32 (PcdPayloadFdMemBase) + PcdGet3= 2 > (PcdPayloadFdMemSize)); > - > - for (;TempPtr < EndPtr;) { > - if (IsFvHeaderValid ((EFI_FIRMWARE_VOLUME_HEADER* )TempPtr)) { > - if (TempPtr !=3D (UINT8* )(UINTN) PcdGet32 (PcdPayloadFdMemBase))= { > - // Skip the PEI FV > - DEBUG((DEBUG_INFO, "Found one valid fv : 0x%lx.\n", TempPtr, > ((EFI_FIRMWARE_VOLUME_HEADER* )TempPtr)->FvLength)); > - > - PeiServicesInstallFvInfoPpi ( > - NULL, > - (VOID *) (UINTN) TempPtr, > - (UINT32) (UINTN) ((EFI_FIRMWARE_VOLUME_HEADER* )TempPtr)- > >FvLength, > - NULL, > - NULL > - ); > - BuildFvHob ((EFI_PHYSICAL_ADDRESS)(UINTN) TempPtr, > ((EFI_FIRMWARE_VOLUME_HEADER* )TempPtr)->FvLength); > - } > - } > - TempPtr +=3D ((EFI_FIRMWARE_VOLUME_HEADER* )TempPtr)->FvLength; > - } > + return EFI_SUCCESS; > } >=20 >=20 > + > /** > Find the board related info from ACPI table >=20 > @@ -299,91 +221,19 @@ Done: > return RETURN_SUCCESS; > } >=20 > -EFI_STATUS > -MemInfoCallback ( > - IN MEMROY_MAP_ENTRY *MemoryMapEntry, > - IN VOID *Params > - ) > -{ > - PAYLOAD_MEM_INFO *MemInfo; > - UINTN Attribue; > - EFI_PHYSICAL_ADDRESS Base; > - EFI_RESOURCE_TYPE Type; > - UINT64 Size; > - UINT32 SystemLowMemTop; > - > - Attribue =3D EFI_RESOURCE_ATTRIBUTE_PRESENT | > - EFI_RESOURCE_ATTRIBUTE_INITIALIZED | > - EFI_RESOURCE_ATTRIBUTE_TESTED | > - EFI_RESOURCE_ATTRIBUTE_UNCACHEABLE | > - EFI_RESOURCE_ATTRIBUTE_WRITE_COMBINEABLE | > - EFI_RESOURCE_ATTRIBUTE_WRITE_THROUGH_CACHEABLE | > - EFI_RESOURCE_ATTRIBUTE_WRITE_BACK_CACHEABLE; > - > - MemInfo =3D (PAYLOAD_MEM_INFO *)Params; > - Type =3D (MemoryMapEntry->Type =3D=3D 1) ? > EFI_RESOURCE_SYSTEM_MEMORY : EFI_RESOURCE_MEMORY_RESERVED; > - Base =3D MemoryMapEntry->Base; > - Size =3D MemoryMapEntry->Size; > - > - if ((Base < 0x100000) && ((Base + Size) > 0x100000)) { > - Size -=3D (0x100000 - Base); > - Base =3D 0x100000; > - } > - > - if (Base >=3D 0x100000) { > - if (Type =3D=3D EFI_RESOURCE_SYSTEM_MEMORY) { > - if (Base < 0x100000000ULL) { > - MemInfo->UsableLowMemTop =3D (UINT32)(Base + Size); > - } else { > - Attribue &=3D ~EFI_RESOURCE_ATTRIBUTE_TESTED; > - } > - BuildResourceDescriptorHob ( > - EFI_RESOURCE_SYSTEM_MEMORY, > - Attribue, > - (EFI_PHYSICAL_ADDRESS)Base, > - Size > - ); > - } else if (Type =3D=3D EFI_RESOURCE_MEMORY_RESERVED) { > - BuildResourceDescriptorHob ( > - EFI_RESOURCE_MEMORY_RESERVED, > - Attribue, > - (EFI_PHYSICAL_ADDRESS)Base, > - Size > - ); > - if (Base < 0x100000000ULL) { > - SystemLowMemTop =3D ((UINT32)(Base + Size) + 0x0FFFFFFF) & > 0xF0000000; > - if (SystemLowMemTop > MemInfo->SystemLowMemTop) { > - MemInfo->SystemLowMemTop =3D SystemLowMemTop; > - } > - } > - } > - } > - > - return EFI_SUCCESS; > -} >=20 > /** > - This is the entrypoint of PEIM > - > - @param FileHandle Handle of the file being invoked. > - @param PeiServices Describes the list of possible PEI Services. > + It will build HOBs based on information from bootloaders. >=20 > - @retval EFI_SUCCESS if it completed successfully. > + @retval EFI_SUCCESS If it completed successfully. > + @retval Others If it failed to build required HOBs. > **/ > EFI_STATUS > -EFIAPI > -BlPeiEntryPoint ( > - IN EFI_PEI_FILE_HANDLE FileHandle, > - IN CONST EFI_PEI_SERVICES **PeiServices > +BuildHobFromBl ( > + VOID > ) > { > EFI_STATUS Status; > - UINT64 LowMemorySize; > - UINT64 PeiMemSize =3D SIZE_64MB; > - EFI_PHYSICAL_ADDRESS PeiMemBase =3D 0; > - UINT32 RegEax; > - UINT8 PhysicalAddressBits; > - PAYLOAD_MEM_INFO PldMemInfo; > SYSTEM_TABLE_INFO SysTableInfo; > SYSTEM_TABLE_INFO *NewSysTableInfo; > ACPI_BOARD_INFO AcpiBoardInfo; > @@ -393,119 +243,14 @@ BlPeiEntryPoint ( > EFI_PEI_GRAPHICS_DEVICE_INFO_HOB GfxDeviceInfo; > EFI_PEI_GRAPHICS_DEVICE_INFO_HOB *NewGfxDeviceInfo; >=20 > - > - // > - // Report lower 640KB of RAM. Attribute EFI_RESOURCE_ATTRIBUTE_TESTED > - // is intentionally omitted to prevent erasing of the coreboot header > - // record before it is processed by ParseMemoryInfo. > - // > - BuildResourceDescriptorHob ( > - EFI_RESOURCE_SYSTEM_MEMORY, > - ( > - EFI_RESOURCE_ATTRIBUTE_PRESENT | > - EFI_RESOURCE_ATTRIBUTE_INITIALIZED | > - EFI_RESOURCE_ATTRIBUTE_UNCACHEABLE | > - EFI_RESOURCE_ATTRIBUTE_WRITE_COMBINEABLE | > - EFI_RESOURCE_ATTRIBUTE_WRITE_THROUGH_CACHEABLE | > - EFI_RESOURCE_ATTRIBUTE_WRITE_BACK_CACHEABLE > - ), > - (EFI_PHYSICAL_ADDRESS)(0), > - (UINT64)(0xA0000) > - ); > - > - BuildResourceDescriptorHob ( > - EFI_RESOURCE_MEMORY_RESERVED, > - ( > - EFI_RESOURCE_ATTRIBUTE_PRESENT | > - EFI_RESOURCE_ATTRIBUTE_INITIALIZED | > - EFI_RESOURCE_ATTRIBUTE_TESTED | > - EFI_RESOURCE_ATTRIBUTE_UNCACHEABLE | > - EFI_RESOURCE_ATTRIBUTE_WRITE_COMBINEABLE | > - EFI_RESOURCE_ATTRIBUTE_WRITE_THROUGH_CACHEABLE | > - EFI_RESOURCE_ATTRIBUTE_WRITE_BACK_CACHEABLE > - ), > - (EFI_PHYSICAL_ADDRESS)(0xA0000), > - (UINT64)(0x60000) > - ); > - > - > // > - // Parse memory info > + // Parse memory info and build memory HOBs > // > - ZeroMem (&PldMemInfo, sizeof(PldMemInfo)); > - Status =3D ParseMemoryInfo (MemInfoCallback, &PldMemInfo); > + Status =3D ParseMemoryInfo (MemInfoCallback, NULL); > if (EFI_ERROR(Status)) { > return Status; > } >=20 > - // > - // Install memory > - // > - LowMemorySize =3D PldMemInfo.UsableLowMemTop; > - PeiMemBase =3D (LowMemorySize - PeiMemSize) & (~(BASE_64KB - 1)); > - DEBUG ((DEBUG_INFO, "Low memory 0x%lx\n", LowMemorySize)); > - DEBUG ((DEBUG_INFO, "SystemLowMemTop 0x%x\n", > PldMemInfo.SystemLowMemTop)); > - DEBUG ((DEBUG_INFO, "PeiMemBase: 0x%lx.\n", PeiMemBase)); > - DEBUG ((DEBUG_INFO, "PeiMemSize: 0x%lx.\n", PeiMemSize)); > - Status =3D PeiServicesInstallPeiMemory (PeiMemBase, PeiMemSize); > - ASSERT_EFI_ERROR (Status); > - > - // > - // Set cache on the physical memory > - // > - MtrrSetMemoryAttribute (BASE_1MB, LowMemorySize - BASE_1MB, > CacheWriteBack); > - MtrrSetMemoryAttribute (0, 0xA0000, CacheWriteBack); > - > - // > - // Create Memory Type Information HOB > - // > - BuildGuidDataHob ( > - &gEfiMemoryTypeInformationGuid, > - mDefaultMemoryTypeInformation, > - sizeof(mDefaultMemoryTypeInformation) > - ); > - > - // > - // Create Fv hob > - // > - PeiReportRemainedFvs (); > - > - BuildMemoryAllocationHob ( > - PcdGet32 (PcdPayloadFdMemBase), > - PcdGet32 (PcdPayloadFdMemSize), > - EfiBootServicesData > - ); > - > - // > - // Build CPU memory space and IO space hob > - // > - AsmCpuid (0x80000000, &RegEax, NULL, NULL, NULL); > - if (RegEax >=3D 0x80000008) { > - AsmCpuid (0x80000008, &RegEax, NULL, NULL, NULL); > - PhysicalAddressBits =3D (UINT8) RegEax; > - } else { > - PhysicalAddressBits =3D 36; > - } > - > - // > - // Create a CPU hand-off information > - // > - BuildCpuHob (PhysicalAddressBits, 16); > - > - // > - // Report Local APIC range > - // > - BuildMemoryMappedIoRangeHob (0xFEC80000, SIZE_512KB); > - > - // > - // Boot mode > - // > - Status =3D PeiServicesSetBootMode (BOOT_WITH_FULL_CONFIGURATION); > - ASSERT_EFI_ERROR (Status); > - > - Status =3D PeiServicesInstallPpi (mPpiBootMode); > - ASSERT_EFI_ERROR (Status); > - > // > // Create guid hob for frame buffer information > // > @@ -561,12 +306,109 @@ BlPeiEntryPoint ( > return Status; > } >=20 > + return EFI_SUCCESS; > +} > + > + > +/** > + This function will build some generic HOBs that doesn't depend on > information from bootloaders. > + > +**/ > +VOID > +BuildGenericHob ( > + VOID > + ) > +{ > + UINT32 RegEax; > + UINT8 PhysicalAddressBits; > + EFI_RESOURCE_ATTRIBUTE_TYPE ResourceAttribute; > + > + // The UEFI payload FV > + BuildMemoryAllocationHob (PcdGet32 (PcdPayloadFdMemBase), PcdGet32 > (PcdPayloadFdMemSize), EfiBootServicesData); > + > + // > + // Build CPU memory space and IO space hob > + // > + AsmCpuid (0x80000000, &RegEax, NULL, NULL, NULL); > + if (RegEax >=3D 0x80000008) { > + AsmCpuid (0x80000008, &RegEax, NULL, NULL, NULL); > + PhysicalAddressBits =3D (UINT8) RegEax; > + } else { > + PhysicalAddressBits =3D 36; > + } > + > + BuildCpuHob (PhysicalAddressBits, 16); > + > + // > + // Report Local APIC range, cause sbl HOB to be NULL, comment now > + // > + ResourceAttribute =3D ( > + EFI_RESOURCE_ATTRIBUTE_PRESENT | > + EFI_RESOURCE_ATTRIBUTE_INITIALIZED | > + EFI_RESOURCE_ATTRIBUTE_UNCACHEABLE | > + EFI_RESOURCE_ATTRIBUTE_TESTED > + ); > + BuildResourceDescriptorHob (EFI_RESOURCE_MEMORY_MAPPED_IO, > ResourceAttribute, 0xFEC80000, SIZE_512KB); > + BuildMemoryAllocationHob ( 0xFEC80000, SIZE_512KB, > EfiMemoryMappedIO); > + > +} > + > + > +/** > + Entry point to the C language phase of UEFI payload. > + > + @retval It will not return if SUCCESS, and return error when pas= sing > bootloader parameter. > +**/ > +EFI_STATUS > +EFIAPI > +PayloadEntry ( > + IN UINTN BootloaderParameter > + ) > +{ > + EFI_STATUS Status; > + PHYSICAL_ADDRESS DxeCoreEntryPoint; > + EFI_HOB_HANDOFF_INFO_TABLE *HandoffHobTable; > + UINTN HobMemBase; > + UINTN HobMemSize; > + EFI_PEI_HOB_POINTERS Hob; > + > + DEBUG ((DEBUG_INFO, "GET_BOOTLOADER_PARAMETER() =3D 0x%lx\n", > GET_BOOTLOADER_PARAMETER())); > + DEBUG ((DEBUG_INFO, "sizeof(UINTN) =3D 0x%x\n", sizeof(UINTN))); > + > + // Initialize floating point operating environment to be compliant wi= th UEFI > spec. > + InitializeFloatingPointUnits (); > + > + // Init the region for HOB and memory allocation for this module > + HobMemBase =3D ALIGN_VALUE (PcdGet32 (PcdPayloadFdMemBase) + > PcdGet32 (PcdPayloadFdMemSize), SIZE_1MB); > + HobMemSize =3D FixedPcdGet32 (PcdSystemMemoryUefiRegionSize); > + HandoffHobTable =3D HobConstructor ((VOID *)HobMemBase, HobMemSize, > (VOID *)HobMemBase, (VOID *)(HobMemBase + HobMemSize)); > + > + // Build HOB based on information from Bootloader > + Status =3D BuildHobFromBl (); > + if (EFI_ERROR (Status)) { > + DEBUG ((DEBUG_ERROR, "BuildHobFromBl Status =3D %r\n", Status)); > + return Status; > + } > + > + // Build other HOBs required by DXE > + BuildGenericHob (); > + > + // Load the DXE Core > + Status =3D LoadDxeCore (&DxeCoreEntryPoint); > + ASSERT_EFI_ERROR (Status); > + > + DEBUG ((DEBUG_INFO, "DxeCoreEntryPoint =3D 0x%lx\n", DxeCoreEntryPoin= t)); > + > // > // Mask off all legacy 8259 interrupt sources > // > IoWrite8 (LEGACY_8259_MASK_REGISTER_MASTER, 0xFF); > IoWrite8 (LEGACY_8259_MASK_REGISTER_SLAVE, 0xFF); >=20 > + Hob.HandoffInformationTable =3D HandoffHobTable; > + HandOffToDxeCore (DxeCoreEntryPoint, Hob); > + > + // Should not get here > + CpuDeadLoop (); > return EFI_SUCCESS; > } > - > diff --git a/UefiPayloadPkg/UefiPayloadEntry/UefiPayloadEntry.h > b/UefiPayloadPkg/UefiPayloadEntry/UefiPayloadEntry.h > new file mode 100644 > index 0000000000..6ae111fa00 > --- /dev/null > +++ b/UefiPayloadPkg/UefiPayloadEntry/UefiPayloadEntry.h > @@ -0,0 +1,85 @@ > +/** @file > +* > +* Copyright (c) 2020, Intel Corporation. All rights reserved.
> +* > +* SPDX-License-Identifier: BSD-2-Clause-Patent > +* > +**/ > + > +#ifndef __UEFI_PAYLOAD_ENTRY_H__ > +#define __UEFI_PAYLOAD_ENTRY_H__ > + > +#include > + > +#include > +#include > +#include > +#include > +#include > +#include > +#include > +#include > +#include > +#include > +#include > +#include > +#include > +#include > +#include > > +#include > +#include > +#include > +#include > +#include > + > + > +#define LEGACY_8259_MASK_REGISTER_MASTER 0x21 > +#define LEGACY_8259_MASK_REGISTER_SLAVE 0xA1 > +#define GET_OCCUPIED_SIZE(ActualSize, Alignment) \ > + ((ActualSize) + (((Alignment) - ((ActualSize) & ((Alignment) - 1))) & > ((Alignment) - 1))) > + > +VOID * > +EFIAPI > +CreateHob ( > + IN UINT16 HobType, > + IN UINT16 HobLength > + ); > + > +/** > + Update the Stack Hob if the stack has been moved > + > + @param BaseAddress The 64 bit physical address of the Stack. > + @param Length The length of the stack in bytes. > + > +**/ > +VOID > +EFIAPI > +UpdateStackHob ( > + IN EFI_PHYSICAL_ADDRESS BaseAddress, > + IN UINT64 Length > + ); > + > +EFI_HOB_HANDOFF_INFO_TABLE* > +EFIAPI > +HobConstructor ( > + IN VOID *EfiMemoryBegin, > + IN UINTN EfiMemoryLength, > + IN VOID *EfiFreeMemoryBottom, > + IN VOID *EfiFreeMemoryTop > + ); > + > +/** > + Find DXE core from FV and build DXE core HOBs. > + > + @param[out] DxeCoreEntryPoint DXE core entry point > + > + @retval EFI_SUCCESS If it completed successfully. > + @retval EFI_NOT_FOUND If it failed to load DXE FV. > +**/ > +EFI_STATUS > +LoadDxeCore ( > + OUT PHYSICAL_ADDRESS *DxeCoreEntryPoint > + ); > + > + > +#endif > diff --git a/UefiPayloadPkg/UefiPayloadEntry/UefiPayloadEntry.inf > b/UefiPayloadPkg/UefiPayloadEntry/UefiPayloadEntry.inf > new file mode 100644 > index 0000000000..6718d53b68 > --- /dev/null > +++ b/UefiPayloadPkg/UefiPayloadEntry/UefiPayloadEntry.inf > @@ -0,0 +1,91 @@ > +## @file > +# This is the first module for UEFI payload. > +# > +# Copyright (c) 2006 - 2020, Intel Corporation. All rights reserved. > +# Copyright (c) 2017, AMD Incorporated. All rights reserved.
> +# > +# SPDX-License-Identifier: BSD-2-Clause-Patent > +# > +## > + > +[Defines] > + INF_VERSION =3D 0x00010005 > + BASE_NAME =3D PayloadEntry > + FILE_GUID =3D 2119BBD7-9432-4f47-B5E2-5C4EA31B6B= DC > + MODULE_TYPE =3D SEC > + VERSION_STRING =3D 1.0 > + > +# > +# The following information is for reference only and not required by t= he build > tools. > +# > +# VALID_ARCHITECTURES =3D IA32 X64 > +# > + > +[Sources] > + UefiPayloadEntry.c > + LoadDxeCore.c > + MemoryAllocation.c > + > +[Sources.Ia32] > + X64/VirtualMemory.h > + X64/VirtualMemory.c > + Ia32/DxeLoadFunc.c > + Ia32/IdtVectorAsm.nasm > + Ia32/SecEntry.nasm > + > +[Sources.X64] > + X64/VirtualMemory.h > + X64/VirtualMemory.c > + X64/DxeLoadFunc.c > + X64/SecEntry.nasm > + > +[Packages] > + MdePkg/MdePkg.dec > + MdeModulePkg/MdeModulePkg.dec > + UefiCpuPkg/UefiCpuPkg.dec > + UefiPayloadPkg/UefiPayloadPkg.dec > + > +[LibraryClasses] > + BaseMemoryLib > + DebugLib > + BaseLib > + SerialPortLib > + IoLib > + BlParseLib > + HobLib > + PeCoffLib > + PlatformSupportLib > + UefiCpuLib > + > +[Guids] > + gEfiMemoryTypeInformationGuid > + gEfiFirmwareFileSystem2Guid > + gUefiSystemTableInfoGuid > + gEfiGraphicsInfoHobGuid > + gEfiGraphicsDeviceInfoHobGuid > + gUefiAcpiBoardInfoGuid > + > +[FeaturePcd.IA32] > + gEfiMdeModulePkgTokenSpaceGuid.PcdDxeIplSwitchToLongMode ## > CONSUMES > + > +[FeaturePcd.X64] > + gEfiMdeModulePkgTokenSpaceGuid.PcdDxeIplBuildPageTables ## > CONSUMES > + > + > +[Pcd.IA32,Pcd.X64] > + gEfiMdeModulePkgTokenSpaceGuid.PcdUse1GPageTable = ## > SOMETIMES_CONSUMES > + > gEfiMdeModulePkgTokenSpaceGuid.PcdPteMemoryEncryptionAddressOrMask > ## CONSUMES > + gEfiMdeModulePkgTokenSpaceGuid.PcdNullPointerDetectionPropertyMask > ## CONSUMES > + gEfiMdeModulePkgTokenSpaceGuid.PcdHeapGuardPropertyMask = ## > CONSUMES > + gEfiMdeModulePkgTokenSpaceGuid.PcdCpuStackGuard = ## > CONSUMES > + gEfiMdeModulePkgTokenSpaceGuid.PcdUse5LevelPageTable = ## > SOMETIMES_CONSUMES > + > + gUefiPayloadPkgTokenSpaceGuid.PcdPayloadFdMemBase > + gUefiPayloadPkgTokenSpaceGuid.PcdPayloadFdMemSize > + gUefiPayloadPkgTokenSpaceGuid.PcdPayloadStackTop > + gUefiPayloadPkgTokenSpaceGuid.PcdSystemMemoryUefiRegionSize > + > + gEfiMdeModulePkgTokenSpaceGuid.PcdSetNxForStack ## > SOMETIMES_CONSUMES > + gEfiMdeModulePkgTokenSpaceGuid.PcdDxeNxMemoryProtectionPolicy ## > SOMETIMES_CONSUMES > + gEfiMdeModulePkgTokenSpaceGuid.PcdImageProtectionPolicy ## > SOMETIMES_CONSUMES > + > diff --git a/UefiPayloadPkg/UefiPayloadEntry/X64/DxeLoadFunc.c > b/UefiPayloadPkg/UefiPayloadEntry/X64/DxeLoadFunc.c > new file mode 100644 > index 0000000000..d2d339d514 > --- /dev/null > +++ b/UefiPayloadPkg/UefiPayloadEntry/X64/DxeLoadFunc.c > @@ -0,0 +1,98 @@ > +/** @file > + x64-specifc functionality for DxeLoad. > + > +Copyright (c) 2006 - 2020, Intel Corporation. All rights reserved.
> +SPDX-License-Identifier: BSD-2-Clause-Patent > + > +**/ > + > +#include > +#include > +#include > +#include > +#include > +#include > +#include > +#include "X64/VirtualMemory.h" > +#include "UefiPayloadEntry.h" > +#define STACK_SIZE 0x20000 > + > + > +/** > + Transfers control to DxeCore. > + > + This function performs a CPU architecture specific operations to exe= cute > + the entry point of DxeCore with the parameters of HobList. > + It also installs EFI_END_OF_PEI_PPI to signal the end of PEI phase. > + > + @param DxeCoreEntryPoint The entry point of DxeCore. > + @param HobList The start of HobList passed to DxeC= ore. > + > +**/ > +VOID > +HandOffToDxeCore ( > + IN EFI_PHYSICAL_ADDRESS DxeCoreEntryPoint, > + IN EFI_PEI_HOB_POINTERS HobList > + ) > +{ > + VOID *BaseOfStack; > + VOID *TopOfStack; > + UINTN PageTables; > + > + // > + // Clear page 0 and mark it as allocated if NULL pointer detection is= enabled. > + // > + if (IsNullDetectionEnabled ()) { > + ClearFirst4KPage (HobList.Raw); > + BuildMemoryAllocationHob (0, EFI_PAGES_TO_SIZE (1), > EfiBootServicesData); > + } > + > + > + // > + // Allocate 128KB for the Stack > + // > + BaseOfStack =3D AllocatePages (EFI_SIZE_TO_PAGES (STACK_SIZE)); > + ASSERT (BaseOfStack !=3D NULL); > + > + // > + // Compute the top of the stack we were allocated. Pre-allocate a UIN= TN > + // for safety. > + // > + TopOfStack =3D (VOID *) ((UINTN) BaseOfStack + EFI_SIZE_TO_PAGES > (STACK_SIZE) * EFI_PAGE_SIZE - CPU_STACK_ALIGNMENT); > + TopOfStack =3D ALIGN_POINTER (TopOfStack, CPU_STACK_ALIGNMENT); > + > + PageTables =3D 0; > + if (FeaturePcdGet (PcdDxeIplBuildPageTables)) { > + // > + // Create page table and save PageMapLevel4 to CR3 > + // > + PageTables =3D CreateIdentityMappingPageTables ((EFI_PHYSICAL_ADDRE= SS) > (UINTN) BaseOfStack, STACK_SIZE); > + } else { > + // > + // Set NX for stack feature also require PcdDxeIplBuildPageTables b= e TRUE > + // for the DxeIpl and the DxeCore are both X64. > + // > + ASSERT (PcdGetBool (PcdSetNxForStack) =3D=3D FALSE); > + ASSERT (PcdGetBool (PcdCpuStackGuard) =3D=3D FALSE); > + } > + > + > + if (FeaturePcdGet (PcdDxeIplBuildPageTables)) { > + AsmWriteCr3 (PageTables); > + } > + > + // > + // Update the contents of BSP stack HOB to reflect the real stack inf= o passed > to DxeCore. > + // > + UpdateStackHob ((EFI_PHYSICAL_ADDRESS)(UINTN) BaseOfStack, > STACK_SIZE); > + > + // > + // Transfer the control to the entry point of DxeCore. > + // > + SwitchStack ( > + (SWITCH_STACK_ENTRY_POINT)(UINTN)DxeCoreEntryPoint, > + HobList.Raw, > + NULL, > + TopOfStack > + ); > +} > diff --git a/UefiPayloadPkg/UefiPayloadEntry/X64/SecEntry.nasm > b/UefiPayloadPkg/UefiPayloadEntry/X64/SecEntry.nasm > new file mode 100644 > index 0000000000..974cf77771 > --- /dev/null > +++ b/UefiPayloadPkg/UefiPayloadEntry/X64/SecEntry.nasm > @@ -0,0 +1,47 @@ > +;----------------------------------------------------------------------= -------- > +;* > +;* Copyright (c) 2006 - 2020, Intel Corporation. All rights reserved.=
> +;* SPDX-License-Identifier: BSD-2-Clause-Patent > + > +;----------------------------------------------------------------------= -------- > + > +#include > + > +DEFAULT REL > +SECTION .text > + > +extern ASM_PFX(PayloadEntry) > +extern ASM_PFX(PcdGet32 (PcdPayloadStackTop)) > + > +; > +; SecCore Entry Point > +; > +; Processor is in flat protected mode > + > +global ASM_PFX(_ModuleEntryPoint) > +ASM_PFX(_ModuleEntryPoint): > + > + ; > + ; Disable all the interrupts > + ; > + cli > + > + > + mov rsp, FixedPcdGet32 (PcdPayloadStackTop) > + > + ; > + ; Push the bootloader parameter address onto new stack > + ; > + push rcx > + mov rax, 0 > + push rax ; shadow space > + push rax > + push rax > + push rax > + > + ; > + ; Call into C code > + ; > + call ASM_PFX(PayloadEntry) > + jmp $ > + > diff --git a/UefiPayloadPkg/UefiPayloadEntry/X64/VirtualMemory.c > b/UefiPayloadPkg/UefiPayloadEntry/X64/VirtualMemory.c > new file mode 100644 > index 0000000000..329274b1b6 > --- /dev/null > +++ b/UefiPayloadPkg/UefiPayloadEntry/X64/VirtualMemory.c > @@ -0,0 +1,904 @@ > +/** @file > + x64 Virtual Memory Management Services in the form of an IA-32 driver= . > + Used to establish a 1:1 Virtual to Physical Mapping that is required = to > + enter Long Mode (x64 64-bit mode). > + > + While we make a 1:1 mapping (identity mapping) for all physical pages > + we still need to use the MTRR's to ensure that the cachability attrib= utes > + for all memory regions is correct. > + > + The basic idea is to use 2MB page table entries where ever possible. = If > + more granularity of cachability is required then 4K page tables are u= sed. > + > + References: > + 1) IA-32 Intel(R) Architecture Software Developer's Manual Volume 1= :Basic > Architecture, Intel > + 2) IA-32 Intel(R) Architecture Software Developer's Manual Volume > 2:Instruction Set Reference, Intel > + 3) IA-32 Intel(R) Architecture Software Developer's Manual Volume > 3:System Programmer's Guide, Intel > + > +Copyright (c) 2006 - 2020, Intel Corporation. All rights reserved.
> +Copyright (c) 2017, AMD Incorporated. All rights reserved.
> + > +SPDX-License-Identifier: BSD-2-Clause-Patent > + > +**/ > + > +#include > +#include > +#include > +#include > +#include > +#include > +#include > +#include > +#include "VirtualMemory.h" > + > +// > +// Global variable to keep track current available memory used as page = table. > +// > +PAGE_TABLE_POOL *mPageTablePool =3D NULL; > + > +/** > + Clear legacy memory located at the first 4K-page, if available. > + > + This function traverses the whole HOB list to check if memory from 0 = to 4095 > + exists and has not been allocated, and then clear it if so. > + > + @param HobStart The start of HobList passed to DxeCo= re. > + > +**/ > +VOID > +ClearFirst4KPage ( > + IN VOID *HobStart > + ) > +{ > + EFI_PEI_HOB_POINTERS RscHob; > + EFI_PEI_HOB_POINTERS MemHob; > + BOOLEAN DoClear; > + > + RscHob.Raw =3D HobStart; > + MemHob.Raw =3D HobStart; > + DoClear =3D FALSE; > + > + // > + // Check if page 0 exists and free > + // > + while ((RscHob.Raw =3D GetNextHob (EFI_HOB_TYPE_RESOURCE_DESCRIPTOR, > + RscHob.Raw)) !=3D NULL) { > + if (RscHob.ResourceDescriptor->ResourceType =3D=3D > EFI_RESOURCE_SYSTEM_MEMORY && > + RscHob.ResourceDescriptor->PhysicalStart =3D=3D 0) { > + DoClear =3D TRUE; > + // > + // Make sure memory at 0-4095 has not been allocated. > + // > + while ((MemHob.Raw =3D GetNextHob > (EFI_HOB_TYPE_MEMORY_ALLOCATION, > + MemHob.Raw)) !=3D NULL) { > + if (MemHob.MemoryAllocation->AllocDescriptor.MemoryBaseAddress > + < EFI_PAGE_SIZE) { > + DoClear =3D FALSE; > + break; > + } > + MemHob.Raw =3D GET_NEXT_HOB (MemHob); > + } > + break; > + } > + RscHob.Raw =3D GET_NEXT_HOB (RscHob); > + } > + > + if (DoClear) { > + DEBUG ((DEBUG_INFO, "Clearing first 4K-page!\r\n")); > + SetMem (NULL, EFI_PAGE_SIZE, 0); > + } > + > + return; > +} > + > +/** > + Return configure status of NULL pointer detection feature. > + > + @return TRUE NULL pointer detection feature is enabled > + @return FALSE NULL pointer detection feature is disabled > + > +**/ > +BOOLEAN > +IsNullDetectionEnabled ( > + VOID > + ) > +{ > + return ((PcdGet8 (PcdNullPointerDetectionPropertyMask) & BIT0) !=3D 0= ); > +} > + > +/** > + The function will check if Execute Disable Bit is available. > + > + @retval TRUE Execute Disable Bit is available. > + @retval FALSE Execute Disable Bit is not available. > + > +**/ > +BOOLEAN > +IsExecuteDisableBitAvailable ( > + VOID > + ) > +{ > + UINT32 RegEax; > + UINT32 RegEdx; > + BOOLEAN Available; > + > + Available =3D FALSE; > + AsmCpuid (0x80000000, &RegEax, NULL, NULL, NULL); > + if (RegEax >=3D 0x80000001) { > + AsmCpuid (0x80000001, NULL, NULL, NULL, &RegEdx); > + if ((RegEdx & BIT20) !=3D 0) { > + // > + // Bit 20: Execute Disable Bit available. > + // > + Available =3D TRUE; > + } > + } > + > + return Available; > +} > + > +/** > + Check if Execute Disable Bit (IA32_EFER.NXE) should be enabled or not= . > + > + @retval TRUE IA32_EFER.NXE should be enabled. > + @retval FALSE IA32_EFER.NXE should not be enabled. > + > +**/ > +BOOLEAN > +IsEnableNonExecNeeded ( > + VOID > + ) > +{ > + if (!IsExecuteDisableBitAvailable ()) { > + return FALSE; > + } > + > + // > + // XD flag (BIT63) in page table entry is only valid if IA32_EFER.NXE= is set. > + // Features controlled by Following PCDs need this feature to be enab= led. > + // > + return (PcdGetBool (PcdSetNxForStack) || > + PcdGet64 (PcdDxeNxMemoryProtectionPolicy) !=3D 0 || > + PcdGet32 (PcdImageProtectionPolicy) !=3D 0); > +} > + > +/** > + Enable Execute Disable Bit. > + > +**/ > +VOID > +EnableExecuteDisableBit ( > + VOID > + ) > +{ > + UINT64 MsrRegisters; > + > + MsrRegisters =3D AsmReadMsr64 (0xC0000080); > + MsrRegisters |=3D BIT11; > + AsmWriteMsr64 (0xC0000080, MsrRegisters); > +} > + > +/** > + The function will check if page table entry should be splitted to sma= ller > + granularity. > + > + @param Address Physical memory address. > + @param Size Size of the given physical memory. > + @param StackBase Base address of stack. > + @param StackSize Size of stack. > + > + @retval TRUE Page table should be split. > + @retval FALSE Page table should not be split. > +**/ > +BOOLEAN > +ToSplitPageTable ( > + IN EFI_PHYSICAL_ADDRESS Address, > + IN UINTN Size, > + IN EFI_PHYSICAL_ADDRESS StackBase, > + IN UINTN StackSize > + ) > +{ > + if (IsNullDetectionEnabled () && Address =3D=3D 0) { > + return TRUE; > + } > + > + if (PcdGetBool (PcdCpuStackGuard)) { > + if (StackBase >=3D Address && StackBase < (Address + Size)) { > + return TRUE; > + } > + } > + > + if (PcdGetBool (PcdSetNxForStack)) { > + if ((Address < StackBase + StackSize) && ((Address + Size) > StackB= ase)) { > + return TRUE; > + } > + } > + > + return FALSE; > +} > +/** > + Initialize a buffer pool for page table use only. > + > + To reduce the potential split operation on page table, the pages rese= rved for > + page table should be allocated in the times of > PAGE_TABLE_POOL_UNIT_PAGES and > + at the boundary of PAGE_TABLE_POOL_ALIGNMENT. So the page pool is > always > + initialized with number of pages greater than or equal to the given P= oolPages. > + > + Once the pages in the pool are used up, this method should be called = again to > + reserve at least another PAGE_TABLE_POOL_UNIT_PAGES. But usually this > won't > + happen in practice. > + > + @param PoolPages The least page number of the pool to be created. > + > + @retval TRUE The pool is initialized successfully. > + @retval FALSE The memory is out of resource. > +**/ > +BOOLEAN > +InitializePageTablePool ( > + IN UINTN PoolPages > + ) > +{ > + VOID *Buffer; > + > + // > + // Always reserve at least PAGE_TABLE_POOL_UNIT_PAGES, including one > page for > + // header. > + // > + PoolPages +=3D 1; // Add one page for header. > + PoolPages =3D ((PoolPages - 1) / PAGE_TABLE_POOL_UNIT_PAGES + 1) * > + PAGE_TABLE_POOL_UNIT_PAGES; > + Buffer =3D AllocateAlignedPages (PoolPages, PAGE_TABLE_POOL_ALIGNMENT= ); > + if (Buffer =3D=3D NULL) { > + DEBUG ((DEBUG_ERROR, "ERROR: Out of aligned pages\r\n")); > + return FALSE; > + } > + > + // > + // Link all pools into a list for easier track later. > + // > + if (mPageTablePool =3D=3D NULL) { > + mPageTablePool =3D Buffer; > + mPageTablePool->NextPool =3D mPageTablePool; > + } else { > + ((PAGE_TABLE_POOL *)Buffer)->NextPool =3D mPageTablePool->NextPool; > + mPageTablePool->NextPool =3D Buffer; > + mPageTablePool =3D Buffer; > + } > + > + // > + // Reserve one page for pool header. > + // > + mPageTablePool->FreePages =3D PoolPages - 1; > + mPageTablePool->Offset =3D EFI_PAGES_TO_SIZE (1); > + > + return TRUE; > +} > + > +/** > + This API provides a way to allocate memory for page table. > + > + This API can be called more than once to allocate memory for page tab= les. > + > + Allocates the number of 4KB pages and returns a pointer to the alloca= ted > + buffer. The buffer returned is aligned on a 4KB boundary. > + > + If Pages is 0, then NULL is returned. > + If there is not enough memory remaining to satisfy the request, then = NULL is > + returned. > + > + @param Pages The number of 4 KB pages to allocate. > + > + @return A pointer to the allocated buffer or NULL if allocation fails= . > + > +**/ > +VOID * > +AllocatePageTableMemory ( > + IN UINTN Pages > + ) > +{ > + VOID *Buffer; > + > + if (Pages =3D=3D 0) { > + return NULL; > + } > + > + // > + // Renew the pool if necessary. > + // > + if (mPageTablePool =3D=3D NULL || > + Pages > mPageTablePool->FreePages) { > + if (!InitializePageTablePool (Pages)) { > + return NULL; > + } > + } > + > + Buffer =3D (UINT8 *)mPageTablePool + mPageTablePool->Offset; > + > + mPageTablePool->Offset +=3D EFI_PAGES_TO_SIZE (Pages); > + mPageTablePool->FreePages -=3D Pages; > + > + return Buffer; > +} > + > +/** > + Split 2M page to 4K. > + > + @param[in] PhysicalAddress Start physical address the 2M p= age > covered. > + @param[in, out] PageEntry2M Pointer to 2M page entry. > + @param[in] StackBase Stack base address. > + @param[in] StackSize Stack size. > + > +**/ > +VOID > +Split2MPageTo4K ( > + IN EFI_PHYSICAL_ADDRESS PhysicalAddress, > + IN OUT UINT64 *PageEntry2M, > + IN EFI_PHYSICAL_ADDRESS StackBase, > + IN UINTN StackSize > + ) > +{ > + EFI_PHYSICAL_ADDRESS PhysicalAddress4K; > + UINTN IndexOfPageTableEntries; > + PAGE_TABLE_4K_ENTRY *PageTableEntry; > + UINT64 AddressEncMask; > + > + // > + // Make sure AddressEncMask is contained to smallest supported addres= s field > + // > + AddressEncMask =3D PcdGet64 (PcdPteMemoryEncryptionAddressOrMask) & > PAGING_1G_ADDRESS_MASK_64; > + > + PageTableEntry =3D AllocatePageTableMemory (1); > + ASSERT (PageTableEntry !=3D NULL); > + > + // > + // Fill in 2M page entry. > + // > + *PageEntry2M =3D (UINT64) (UINTN) PageTableEntry | AddressEncMask | > IA32_PG_P | IA32_PG_RW; > + > + PhysicalAddress4K =3D PhysicalAddress; > + for (IndexOfPageTableEntries =3D 0; IndexOfPageTableEntries < 512; > IndexOfPageTableEntries++, PageTableEntry++, PhysicalAddress4K +=3D SIZE= _4KB) > { > + // > + // Fill in the Page Table entries > + // > + PageTableEntry->Uint64 =3D (UINT64) PhysicalAddress4K | AddressEncM= ask; > + PageTableEntry->Bits.ReadWrite =3D 1; > + > + if ((IsNullDetectionEnabled () && PhysicalAddress4K =3D=3D 0) || > + (PcdGetBool (PcdCpuStackGuard) && PhysicalAddress4K =3D=3D Stac= kBase)) { > + PageTableEntry->Bits.Present =3D 0; > + } else { > + PageTableEntry->Bits.Present =3D 1; > + } > + > + if (PcdGetBool (PcdSetNxForStack) > + && (PhysicalAddress4K >=3D StackBase) > + && (PhysicalAddress4K < StackBase + StackSize)) { > + // > + // Set Nx bit for stack. > + // > + PageTableEntry->Bits.Nx =3D 1; > + } > + } > +} > + > +/** > + Split 1G page to 2M. > + > + @param[in] PhysicalAddress Start physical address the 1G p= age covered. > + @param[in, out] PageEntry1G Pointer to 1G page entry. > + @param[in] StackBase Stack base address. > + @param[in] StackSize Stack size. > + > +**/ > +VOID > +Split1GPageTo2M ( > + IN EFI_PHYSICAL_ADDRESS PhysicalAddress, > + IN OUT UINT64 *PageEntry1G, > + IN EFI_PHYSICAL_ADDRESS StackBase, > + IN UINTN StackSize > + ) > +{ > + EFI_PHYSICAL_ADDRESS PhysicalAddress2M; > + UINTN IndexOfPageDirectoryEntries; > + PAGE_TABLE_ENTRY *PageDirectoryEntry; > + UINT64 AddressEncMask; > + > + // > + // Make sure AddressEncMask is contained to smallest supported addres= s field > + // > + AddressEncMask =3D PcdGet64 (PcdPteMemoryEncryptionAddressOrMask) & > PAGING_1G_ADDRESS_MASK_64; > + > + PageDirectoryEntry =3D AllocatePageTableMemory (1); > + ASSERT (PageDirectoryEntry !=3D NULL); > + > + // > + // Fill in 1G page entry. > + // > + *PageEntry1G =3D (UINT64) (UINTN) PageDirectoryEntry | AddressEncMask= | > IA32_PG_P | IA32_PG_RW; > + > + PhysicalAddress2M =3D PhysicalAddress; > + for (IndexOfPageDirectoryEntries =3D 0; IndexOfPageDirectoryEntries <= 512; > IndexOfPageDirectoryEntries++, PageDirectoryEntry++, PhysicalAddress2M += = =3D > SIZE_2MB) { > + if (ToSplitPageTable (PhysicalAddress2M, SIZE_2MB, StackBase, Stack= Size)) { > + // > + // Need to split this 2M page that covers NULL or stack range. > + // > + Split2MPageTo4K (PhysicalAddress2M, (UINT64 *) PageDirectoryEntry= , > StackBase, StackSize); > + } else { > + // > + // Fill in the Page Directory entries > + // > + PageDirectoryEntry->Uint64 =3D (UINT64) PhysicalAddress2M | > AddressEncMask; > + PageDirectoryEntry->Bits.ReadWrite =3D 1; > + PageDirectoryEntry->Bits.Present =3D 1; > + PageDirectoryEntry->Bits.MustBe1 =3D 1; > + } > + } > +} > + > +/** > + Set one page of page table pool memory to be read-only. > + > + @param[in] PageTableBase Base address of page table (CR3). > + @param[in] Address Start address of a page to be set as read= -only. > + @param[in] Level4Paging Level 4 paging flag. > + > +**/ > +VOID > +SetPageTablePoolReadOnly ( > + IN UINTN PageTableBase, > + IN EFI_PHYSICAL_ADDRESS Address, > + IN BOOLEAN Level4Paging > + ) > +{ > + UINTN Index; > + UINTN EntryIndex; > + UINT64 AddressEncMask; > + EFI_PHYSICAL_ADDRESS PhysicalAddress; > + UINT64 *PageTable; > + UINT64 *NewPageTable; > + UINT64 PageAttr; > + UINT64 LevelSize[5]; > + UINT64 LevelMask[5]; > + UINTN LevelShift[5]; > + UINTN Level; > + UINT64 PoolUnitSize; > + > + ASSERT (PageTableBase !=3D 0); > + > + // > + // Since the page table is always from page table pool, which is alwa= ys > + // located at the boundary of PcdPageTablePoolAlignment, we just need= to > + // set the whole pool unit to be read-only. > + // > + Address =3D Address & PAGE_TABLE_POOL_ALIGN_MASK; > + > + LevelShift[1] =3D PAGING_L1_ADDRESS_SHIFT; > + LevelShift[2] =3D PAGING_L2_ADDRESS_SHIFT; > + LevelShift[3] =3D PAGING_L3_ADDRESS_SHIFT; > + LevelShift[4] =3D PAGING_L4_ADDRESS_SHIFT; > + > + LevelMask[1] =3D PAGING_4K_ADDRESS_MASK_64; > + LevelMask[2] =3D PAGING_2M_ADDRESS_MASK_64; > + LevelMask[3] =3D PAGING_1G_ADDRESS_MASK_64; > + LevelMask[4] =3D PAGING_1G_ADDRESS_MASK_64; > + > + LevelSize[1] =3D SIZE_4KB; > + LevelSize[2] =3D SIZE_2MB; > + LevelSize[3] =3D SIZE_1GB; > + LevelSize[4] =3D SIZE_512GB; > + > + AddressEncMask =3D PcdGet64 (PcdPteMemoryEncryptionAddressOrMask) & > + PAGING_1G_ADDRESS_MASK_64; > + PageTable =3D (UINT64 *)(UINTN)PageTableBase; > + PoolUnitSize =3D PAGE_TABLE_POOL_UNIT_SIZE; > + > + for (Level =3D (Level4Paging) ? 4 : 3; Level > 0; --Level) { > + Index =3D ((UINTN)RShiftU64 (Address, LevelShift[Level])); > + Index &=3D PAGING_PAE_INDEX_MASK; > + > + PageAttr =3D PageTable[Index]; > + if ((PageAttr & IA32_PG_PS) =3D=3D 0) { > + // > + // Go to next level of table. > + // > + PageTable =3D (UINT64 *)(UINTN)(PageAttr & ~AddressEncMask & > + PAGING_4K_ADDRESS_MASK_64); > + continue; > + } > + > + if (PoolUnitSize >=3D LevelSize[Level]) { > + // > + // Clear R/W bit if current page granularity is not larger than p= ool unit > + // size. > + // > + if ((PageAttr & IA32_PG_RW) !=3D 0) { > + while (PoolUnitSize > 0) { > + // > + // PAGE_TABLE_POOL_UNIT_SIZE and PAGE_TABLE_POOL_ALIGNMENT > are fit in > + // one page (2MB). Then we don't need to update attributes fo= r pages > + // crossing page directory. ASSERT below is for that purpose. > + // > + ASSERT (Index < EFI_PAGE_SIZE/sizeof (UINT64)); > + > + PageTable[Index] &=3D ~(UINT64)IA32_PG_RW; > + PoolUnitSize -=3D LevelSize[Level]; > + > + ++Index; > + } > + } > + > + break; > + > + } else { > + // > + // The smaller granularity of page must be needed. > + // > + ASSERT (Level > 1); > + > + NewPageTable =3D AllocatePageTableMemory (1); > + ASSERT (NewPageTable !=3D NULL); > + > + PhysicalAddress =3D PageAttr & LevelMask[Level]; > + for (EntryIndex =3D 0; > + EntryIndex < EFI_PAGE_SIZE/sizeof (UINT64); > + ++EntryIndex) { > + NewPageTable[EntryIndex] =3D PhysicalAddress | AddressEncMask = | > + IA32_PG_P | IA32_PG_RW; > + if (Level > 2) { > + NewPageTable[EntryIndex] |=3D IA32_PG_PS; > + } > + PhysicalAddress +=3D LevelSize[Level - 1]; > + } > + > + PageTable[Index] =3D (UINT64)(UINTN)NewPageTable | AddressEncMask= | > + IA32_PG_P | IA32_PG_RW; > + PageTable =3D NewPageTable; > + } > + } > +} > + > +/** > + Prevent the memory pages used for page table from been overwritten. > + > + @param[in] PageTableBase Base address of page table (CR3). > + @param[in] Level4Paging Level 4 paging flag. > + > +**/ > +VOID > +EnablePageTableProtection ( > + IN UINTN PageTableBase, > + IN BOOLEAN Level4Paging > + ) > +{ > + PAGE_TABLE_POOL *HeadPool; > + PAGE_TABLE_POOL *Pool; > + UINT64 PoolSize; > + EFI_PHYSICAL_ADDRESS Address; > + > + if (mPageTablePool =3D=3D NULL) { > + return; > + } > + > + // > + // Disable write protection, because we need to mark page table to be= write > + // protected. > + // > + AsmWriteCr0 (AsmReadCr0() & ~CR0_WP); > + > + // > + // SetPageTablePoolReadOnly might update mPageTablePool. It's safer t= o > + // remember original one in advance. > + // > + HeadPool =3D mPageTablePool; > + Pool =3D HeadPool; > + do { > + Address =3D (EFI_PHYSICAL_ADDRESS)(UINTN)Pool; > + PoolSize =3D Pool->Offset + EFI_PAGES_TO_SIZE (Pool->FreePages); > + > + // > + // The size of one pool must be multiple of PAGE_TABLE_POOL_UNIT_SI= ZE, > which > + // is one of page size of the processor (2MB by default). Let's app= ly the > + // protection to them one by one. > + // > + while (PoolSize > 0) { > + SetPageTablePoolReadOnly(PageTableBase, Address, Level4Paging); > + Address +=3D PAGE_TABLE_POOL_UNIT_SIZE; > + PoolSize -=3D PAGE_TABLE_POOL_UNIT_SIZE; > + } > + > + Pool =3D Pool->NextPool; > + } while (Pool !=3D HeadPool); > + > + // > + // Enable write protection, after page table attribute updated. > + // > + AsmWriteCr0 (AsmReadCr0() | CR0_WP); > +} > + > +/** > + Allocates and fills in the Page Directory and Page Table Entries to > + establish a 1:1 Virtual to Physical mapping. > + > + @param[in] StackBase Stack base address. > + @param[in] StackSize Stack size. > + > + @return The address of 4 level page map. > + > +**/ > +UINTN > +CreateIdentityMappingPageTables ( > + IN EFI_PHYSICAL_ADDRESS StackBase, > + IN UINTN StackSize > + ) > +{ > + UINT32 RegEax; > + CPUID_STRUCTURED_EXTENDED_FEATURE_FLAGS_ECX EcxFlags; > + UINT32 RegEdx; > + UINT8 PhysicalAddressBits; > + EFI_PHYSICAL_ADDRESS PageAddress; > + UINTN IndexOfPml5Entries; > + UINTN IndexOfPml4Entries; > + UINTN IndexOfPdpEntries; > + UINTN IndexOfPageDirectoryEnt= ries; > + UINT32 NumberOfPml5EntriesNeed= ed; > + UINT32 NumberOfPml4EntriesNeed= ed; > + UINT32 NumberOfPdpEntriesNeede= d; > + PAGE_MAP_AND_DIRECTORY_POINTER *PageMapLevel5Entry; > + PAGE_MAP_AND_DIRECTORY_POINTER *PageMapLevel4Entry; > + PAGE_MAP_AND_DIRECTORY_POINTER *PageMap; > + PAGE_MAP_AND_DIRECTORY_POINTER *PageDirectoryPointerEn= try; > + PAGE_TABLE_ENTRY *PageDirectoryEntry; > + UINTN TotalPagesNum; > + UINTN BigPageAddress; > + VOID *Hob; > + BOOLEAN Page5LevelSupport; > + BOOLEAN Page1GSupport; > + PAGE_TABLE_1G_ENTRY *PageDirectory1GEntry; > + UINT64 AddressEncMask; > + IA32_CR4 Cr4; > + > + // > + // Set PageMapLevel5Entry to suppress incorrect compiler/analyzer war= nings > + // > + PageMapLevel5Entry =3D NULL; > + > + // > + // Make sure AddressEncMask is contained to smallest supported addres= s field > + // > + AddressEncMask =3D PcdGet64 (PcdPteMemoryEncryptionAddressOrMask) & > PAGING_1G_ADDRESS_MASK_64; > + > + Page1GSupport =3D FALSE; > + if (PcdGetBool(PcdUse1GPageTable)) { > + AsmCpuid (0x80000000, &RegEax, NULL, NULL, NULL); > + if (RegEax >=3D 0x80000001) { > + AsmCpuid (0x80000001, NULL, NULL, NULL, &RegEdx); > + if ((RegEdx & BIT26) !=3D 0) { > + Page1GSupport =3D TRUE; > + } > + } > + } > + > + // > + // Get physical address bits supported. > + // > + Hob =3D GetFirstHob (EFI_HOB_TYPE_CPU); > + if (Hob !=3D NULL) { > + PhysicalAddressBits =3D ((EFI_HOB_CPU *) Hob)->SizeOfMemorySpace; > + } else { > + AsmCpuid (0x80000000, &RegEax, NULL, NULL, NULL); > + if (RegEax >=3D 0x80000008) { > + AsmCpuid (0x80000008, &RegEax, NULL, NULL, NULL); > + PhysicalAddressBits =3D (UINT8) RegEax; > + } else { > + PhysicalAddressBits =3D 36; > + } > + } > + > + Page5LevelSupport =3D FALSE; > + if (PcdGetBool (PcdUse5LevelPageTable)) { > + AsmCpuidEx ( > + CPUID_STRUCTURED_EXTENDED_FEATURE_FLAGS, > CPUID_STRUCTURED_EXTENDED_FEATURE_FLAGS_SUB_LEAF_INFO, NULL, > + &EcxFlags.Uint32, NULL, NULL > + ); > + if (EcxFlags.Bits.FiveLevelPage !=3D 0) { > + Page5LevelSupport =3D TRUE; > + } > + } > + > + DEBUG ((DEBUG_INFO, "AddressBits=3D%u 5LevelPaging=3D%u 1GPage=3D%u\n= ", > PhysicalAddressBits, Page5LevelSupport, Page1GSupport)); > + > + // > + // IA-32e paging translates 48-bit linear addresses to 52-bit physica= l addresses > + // when 5-Level Paging is disabled, > + // due to either unsupported by HW, or disabled by PCD. > + // > + ASSERT (PhysicalAddressBits <=3D 52); > + if (!Page5LevelSupport && PhysicalAddressBits > 48) { > + PhysicalAddressBits =3D 48; > + } > + > + // > + // Calculate the table entries needed. > + // > + NumberOfPml5EntriesNeeded =3D 1; > + if (PhysicalAddressBits > 48) { > + NumberOfPml5EntriesNeeded =3D (UINT32) LShiftU64 (1, PhysicalAddres= sBits > - 48); > + PhysicalAddressBits =3D 48; > + } > + > + NumberOfPml4EntriesNeeded =3D 1; > + if (PhysicalAddressBits > 39) { > + NumberOfPml4EntriesNeeded =3D (UINT32) LShiftU64 (1, PhysicalAddres= sBits > - 39); > + PhysicalAddressBits =3D 39; > + } > + > + NumberOfPdpEntriesNeeded =3D 1; > + ASSERT (PhysicalAddressBits > 30); > + NumberOfPdpEntriesNeeded =3D (UINT32) LShiftU64 (1, PhysicalAddressBi= ts - > 30); > + > + // > + // Pre-allocate big pages to avoid later allocations. > + // > + if (!Page1GSupport) { > + TotalPagesNum =3D ((NumberOfPdpEntriesNeeded + 1) * > NumberOfPml4EntriesNeeded + 1) * NumberOfPml5EntriesNeeded + 1; > + } else { > + TotalPagesNum =3D (NumberOfPml4EntriesNeeded + 1) * > NumberOfPml5EntriesNeeded + 1; > + } > + > + // > + // Substract the one page occupied by PML5 entries if 5-Level Paging = is > disabled. > + // > + if (!Page5LevelSupport) { > + TotalPagesNum--; > + } > + > + DEBUG ((DEBUG_INFO, "Pml5=3D%u Pml4=3D%u Pdp=3D%u TotalPage=3D%Lu\n", > + NumberOfPml5EntriesNeeded, NumberOfPml4EntriesNeeded, > + NumberOfPdpEntriesNeeded, (UINT64)TotalPagesNum)); > + > + BigPageAddress =3D (UINTN) AllocatePageTableMemory (TotalPagesNum); > + ASSERT (BigPageAddress !=3D 0); > + > + // > + // By architecture only one PageMapLevel4 exists - so lets allocate s= torage for > it. > + // > + PageMap =3D (VOID *) BigPageAddress; > + if (Page5LevelSupport) { > + // > + // By architecture only one PageMapLevel5 exists - so lets allocate= storage for > it. > + // > + PageMapLevel5Entry =3D PageMap; > + BigPageAddress +=3D SIZE_4KB; > + } > + PageAddress =3D 0; > + > + for ( IndexOfPml5Entries =3D 0 > + ; IndexOfPml5Entries < NumberOfPml5EntriesNeeded > + ; IndexOfPml5Entries++) { > + // > + // Each PML5 entry points to a page of PML4 entires. > + // So lets allocate space for them and fill them in in the IndexOfP= ml4Entries > loop. > + // When 5-Level Paging is disabled, below allocation happens only o= nce. > + // > + PageMapLevel4Entry =3D (VOID *) BigPageAddress; > + BigPageAddress +=3D SIZE_4KB; > + > + if (Page5LevelSupport) { > + // > + // Make a PML5 Entry > + // > + PageMapLevel5Entry->Uint64 =3D (UINT64) (UINTN) PageMapLevel4Entr= y | > AddressEncMask; > + PageMapLevel5Entry->Bits.ReadWrite =3D 1; > + PageMapLevel5Entry->Bits.Present =3D 1; > + PageMapLevel5Entry++; > + } > + > + for ( IndexOfPml4Entries =3D 0 > + ; IndexOfPml4Entries < (NumberOfPml5EntriesNeeded =3D=3D 1 ? > NumberOfPml4EntriesNeeded : 512) > + ; IndexOfPml4Entries++, PageMapLevel4Entry++) { > + // > + // Each PML4 entry points to a page of Page Directory Pointer ent= ires. > + // So lets allocate space for them and fill them in in the IndexO= fPdpEntries > loop. > + // > + PageDirectoryPointerEntry =3D (VOID *) BigPageAddress; > + BigPageAddress +=3D SIZE_4KB; > + > + // > + // Make a PML4 Entry > + // > + PageMapLevel4Entry->Uint64 =3D > (UINT64)(UINTN)PageDirectoryPointerEntry | AddressEncMask; > + PageMapLevel4Entry->Bits.ReadWrite =3D 1; > + PageMapLevel4Entry->Bits.Present =3D 1; > + > + if (Page1GSupport) { > + PageDirectory1GEntry =3D (VOID *) PageDirectoryPointerEntry; > + > + for (IndexOfPageDirectoryEntries =3D 0; IndexOfPageDirectoryEnt= ries < 512; > IndexOfPageDirectoryEntries++, PageDirectory1GEntry++, PageAddress +=3D > SIZE_1GB) { > + if (ToSplitPageTable (PageAddress, SIZE_1GB, StackBase, Stack= Size)) { > + Split1GPageTo2M (PageAddress, (UINT64 *) PageDirectory1GEnt= ry, > StackBase, StackSize); > + } else { > + // > + // Fill in the Page Directory entries > + // > + PageDirectory1GEntry->Uint64 =3D (UINT64)PageAddress | > AddressEncMask; > + PageDirectory1GEntry->Bits.ReadWrite =3D 1; > + PageDirectory1GEntry->Bits.Present =3D 1; > + PageDirectory1GEntry->Bits.MustBe1 =3D 1; > + } > + } > + } else { > + for ( IndexOfPdpEntries =3D 0 > + ; IndexOfPdpEntries < (NumberOfPml4EntriesNeeded =3D=3D 1 ? > NumberOfPdpEntriesNeeded : 512) > + ; IndexOfPdpEntries++, PageDirectoryPointerEntry++) { > + // > + // Each Directory Pointer entries points to a page of Page Di= rectory > entires. > + // So allocate space for them and fill them in in the > IndexOfPageDirectoryEntries loop. > + // > + PageDirectoryEntry =3D (VOID *) BigPageAddress; > + BigPageAddress +=3D SIZE_4KB; > + > + // > + // Fill in a Page Directory Pointer Entries > + // > + PageDirectoryPointerEntry->Uint64 =3D > (UINT64)(UINTN)PageDirectoryEntry | AddressEncMask; > + PageDirectoryPointerEntry->Bits.ReadWrite =3D 1; > + PageDirectoryPointerEntry->Bits.Present =3D 1; > + > + for (IndexOfPageDirectoryEntries =3D 0; IndexOfPageDirectoryE= ntries < 512; > IndexOfPageDirectoryEntries++, PageDirectoryEntry++, PageAddress +=3D > SIZE_2MB) { > + if (ToSplitPageTable (PageAddress, SIZE_2MB, StackBase, Sta= ckSize)) { > + // > + // Need to split this 2M page that covers NULL or stack r= ange. > + // > + Split2MPageTo4K (PageAddress, (UINT64 *) PageDirectoryEnt= ry, > StackBase, StackSize); > + } else { > + // > + // Fill in the Page Directory entries > + // > + PageDirectoryEntry->Uint64 =3D (UINT64)PageAddress | > AddressEncMask; > + PageDirectoryEntry->Bits.ReadWrite =3D 1; > + PageDirectoryEntry->Bits.Present =3D 1; > + PageDirectoryEntry->Bits.MustBe1 =3D 1; > + } > + } > + } > + > + // > + // Fill with null entry for unused PDPTE > + // > + ZeroMem (PageDirectoryPointerEntry, (512 - IndexOfPdpEntries) * > sizeof(PAGE_MAP_AND_DIRECTORY_POINTER)); > + } > + } > + > + // > + // For the PML4 entries we are not using fill in a null entry. > + // > + ZeroMem (PageMapLevel4Entry, (512 - IndexOfPml4Entries) * sizeof > (PAGE_MAP_AND_DIRECTORY_POINTER)); > + } > + > + if (Page5LevelSupport) { > + Cr4.UintN =3D AsmReadCr4 (); > + Cr4.Bits.LA57 =3D 1; > + AsmWriteCr4 (Cr4.UintN); > + // > + // For the PML5 entries we are not using fill in a null entry. > + // > + ZeroMem (PageMapLevel5Entry, (512 - IndexOfPml5Entries) * sizeof > (PAGE_MAP_AND_DIRECTORY_POINTER)); > + } > + > + // > + // Protect the page table by marking the memory used for page table t= o be > + // read-only. > + // > + EnablePageTableProtection ((UINTN)PageMap, TRUE); > + > + // > + // Set IA32_EFER.NXE if necessary. > + // > + if (IsEnableNonExecNeeded ()) { > + EnableExecuteDisableBit (); > + } > + > + return (UINTN)PageMap; > +} > + > diff --git a/UefiPayloadPkg/UefiPayloadEntry/X64/VirtualMemory.h > b/UefiPayloadPkg/UefiPayloadEntry/X64/VirtualMemory.h > new file mode 100644 > index 0000000000..2d0493f109 > --- /dev/null > +++ b/UefiPayloadPkg/UefiPayloadEntry/X64/VirtualMemory.h > @@ -0,0 +1,322 @@ > +/** @file > + x64 Long Mode Virtual Memory Management Definitions > + > + References: > + 1) IA-32 Intel(R) Architecture Software Developer's Manual Volume 1= :Basic > Architecture, Intel > + 2) IA-32 Intel(R) Architecture Software Developer's Manual Volume > 2:Instruction Set Reference, Intel > + 3) IA-32 Intel(R) Architecture Software Developer's Manual Volume > 3:System Programmer's Guide, Intel > + 4) AMD64 Architecture Programmer's Manual Volume 2: System > Programming > + > +Copyright (c) 2006 - 2018, Intel Corporation. All rights reserved.
> +Copyright (c) 2017, AMD Incorporated. All rights reserved.
> + > +SPDX-License-Identifier: BSD-2-Clause-Patent > + > +**/ > +#ifndef _VIRTUAL_MEMORY_H_ > +#define _VIRTUAL_MEMORY_H_ > + > + > +#define SYS_CODE64_SEL 0x38 > + > + > +#pragma pack(1) > + > +typedef union { > + struct { > + UINT32 LimitLow : 16; > + UINT32 BaseLow : 16; > + UINT32 BaseMid : 8; > + UINT32 Type : 4; > + UINT32 System : 1; > + UINT32 Dpl : 2; > + UINT32 Present : 1; > + UINT32 LimitHigh : 4; > + UINT32 Software : 1; > + UINT32 Reserved : 1; > + UINT32 DefaultSize : 1; > + UINT32 Granularity : 1; > + UINT32 BaseHigh : 8; > + } Bits; > + UINT64 Uint64; > +} IA32_GDT; > + > +typedef struct { > + IA32_IDT_GATE_DESCRIPTOR Ia32IdtEntry; > + UINT32 Offset32To63; > + UINT32 Reserved; > +} X64_IDT_GATE_DESCRIPTOR; > + > +// > +// Page-Map Level-4 Offset (PML4) and > +// Page-Directory-Pointer Offset (PDPE) entries 4K & 2MB > +// > + > +typedef union { > + struct { > + UINT64 Present:1; // 0 =3D Not present in memory, 1= =3D Present in > memory > + UINT64 ReadWrite:1; // 0 =3D Read-Only, 1=3D Read/Wri= te > + UINT64 UserSupervisor:1; // 0 =3D Supervisor, 1=3DUser > + UINT64 WriteThrough:1; // 0 =3D Write-Back caching, 1=3D= Write-Through > caching > + UINT64 CacheDisabled:1; // 0 =3D Cached, 1=3DNon-Cached > + UINT64 Accessed:1; // 0 =3D Not accessed, 1 =3D Acce= ssed (set by CPU) > + UINT64 Reserved:1; // Reserved > + UINT64 MustBeZero:2; // Must Be Zero > + UINT64 Available:3; // Available for use by system so= ftware > + UINT64 PageTableBaseAddress:40; // Page Table Base Address > + UINT64 AvabilableHigh:11; // Available for use by system so= ftware > + UINT64 Nx:1; // No Execute bit > + } Bits; > + UINT64 Uint64; > +} PAGE_MAP_AND_DIRECTORY_POINTER; > + > +// > +// Page Table Entry 4KB > +// > +typedef union { > + struct { > + UINT64 Present:1; // 0 =3D Not present in memory, 1= =3D Present in > memory > + UINT64 ReadWrite:1; // 0 =3D Read-Only, 1=3D Read/Wri= te > + UINT64 UserSupervisor:1; // 0 =3D Supervisor, 1=3DUser > + UINT64 WriteThrough:1; // 0 =3D Write-Back caching, 1=3D= Write-Through > caching > + UINT64 CacheDisabled:1; // 0 =3D Cached, 1=3DNon-Cached > + UINT64 Accessed:1; // 0 =3D Not accessed, 1 =3D Acce= ssed (set by CPU) > + UINT64 Dirty:1; // 0 =3D Not Dirty, 1 =3D written= by processor on access > to page > + UINT64 PAT:1; // > + UINT64 Global:1; // 0 =3D Not global page, 1 =3D g= lobal page TLB not > cleared on CR3 write > + UINT64 Available:3; // Available for use by system so= ftware > + UINT64 PageTableBaseAddress:40; // Page Table Base Address > + UINT64 AvabilableHigh:11; // Available for use by system so= ftware > + UINT64 Nx:1; // 0 =3D Execute Code, 1 =3D No C= ode Execution > + } Bits; > + UINT64 Uint64; > +} PAGE_TABLE_4K_ENTRY; > + > +// > +// Page Table Entry 2MB > +// > +typedef union { > + struct { > + UINT64 Present:1; // 0 =3D Not present in memory, 1= =3D Present in > memory > + UINT64 ReadWrite:1; // 0 =3D Read-Only, 1=3D Read/Wri= te > + UINT64 UserSupervisor:1; // 0 =3D Supervisor, 1=3DUser > + UINT64 WriteThrough:1; // 0 =3D Write-Back caching, 1=3D= Write-Through > caching > + UINT64 CacheDisabled:1; // 0 =3D Cached, 1=3DNon-Cached > + UINT64 Accessed:1; // 0 =3D Not accessed, 1 =3D Acce= ssed (set by CPU) > + UINT64 Dirty:1; // 0 =3D Not Dirty, 1 =3D written= by processor on access > to page > + UINT64 MustBe1:1; // Must be 1 > + UINT64 Global:1; // 0 =3D Not global page, 1 =3D g= lobal page TLB not > cleared on CR3 write > + UINT64 Available:3; // Available for use by system so= ftware > + UINT64 PAT:1; // > + UINT64 MustBeZero:8; // Must be zero; > + UINT64 PageTableBaseAddress:31; // Page Table Base Address > + UINT64 AvabilableHigh:11; // Available for use by system so= ftware > + UINT64 Nx:1; // 0 =3D Execute Code, 1 =3D No C= ode Execution > + } Bits; > + UINT64 Uint64; > +} PAGE_TABLE_ENTRY; > + > +// > +// Page Table Entry 1GB > +// > +typedef union { > + struct { > + UINT64 Present:1; // 0 =3D Not present in memory, 1= =3D Present in > memory > + UINT64 ReadWrite:1; // 0 =3D Read-Only, 1=3D Read/Wri= te > + UINT64 UserSupervisor:1; // 0 =3D Supervisor, 1=3DUser > + UINT64 WriteThrough:1; // 0 =3D Write-Back caching, 1=3D= Write-Through > caching > + UINT64 CacheDisabled:1; // 0 =3D Cached, 1=3DNon-Cached > + UINT64 Accessed:1; // 0 =3D Not accessed, 1 =3D Acce= ssed (set by CPU) > + UINT64 Dirty:1; // 0 =3D Not Dirty, 1 =3D written= by processor on access > to page > + UINT64 MustBe1:1; // Must be 1 > + UINT64 Global:1; // 0 =3D Not global page, 1 =3D g= lobal page TLB not > cleared on CR3 write > + UINT64 Available:3; // Available for use by system so= ftware > + UINT64 PAT:1; // > + UINT64 MustBeZero:17; // Must be zero; > + UINT64 PageTableBaseAddress:22; // Page Table Base Address > + UINT64 AvabilableHigh:11; // Available for use by system so= ftware > + UINT64 Nx:1; // 0 =3D Execute Code, 1 =3D No C= ode Execution > + } Bits; > + UINT64 Uint64; > +} PAGE_TABLE_1G_ENTRY; > + > +#pragma pack() > + > +#define CR0_WP BIT16 > + > +#define IA32_PG_P BIT0 > +#define IA32_PG_RW BIT1 > +#define IA32_PG_PS BIT7 > + > +#define PAGING_PAE_INDEX_MASK 0x1FF > + > +#define PAGING_4K_ADDRESS_MASK_64 0x000FFFFFFFFFF000ull > +#define PAGING_2M_ADDRESS_MASK_64 0x000FFFFFFFE00000ull > +#define PAGING_1G_ADDRESS_MASK_64 0x000FFFFFC0000000ull > + > +#define PAGING_L1_ADDRESS_SHIFT 12 > +#define PAGING_L2_ADDRESS_SHIFT 21 > +#define PAGING_L3_ADDRESS_SHIFT 30 > +#define PAGING_L4_ADDRESS_SHIFT 39 > + > +#define PAGING_PML4E_NUMBER 4 > + > +#define PAGE_TABLE_POOL_ALIGNMENT BASE_2MB > +#define PAGE_TABLE_POOL_UNIT_SIZE SIZE_2MB > +#define PAGE_TABLE_POOL_UNIT_PAGES EFI_SIZE_TO_PAGES > (PAGE_TABLE_POOL_UNIT_SIZE) > +#define PAGE_TABLE_POOL_ALIGN_MASK \ > + (~(EFI_PHYSICAL_ADDRESS)(PAGE_TABLE_POOL_ALIGNMENT - 1)) > + > +typedef struct { > + VOID *NextPool; > + UINTN Offset; > + UINTN FreePages; > +} PAGE_TABLE_POOL; > + > +/** > + Check if Execute Disable Bit (IA32_EFER.NXE) should be enabled or not= . > + > + @retval TRUE IA32_EFER.NXE should be enabled. > + @retval FALSE IA32_EFER.NXE should not be enabled. > + > +**/ > +BOOLEAN > +IsEnableNonExecNeeded ( > + VOID > + ); > + > +/** > + Enable Execute Disable Bit. > + > +**/ > +VOID > +EnableExecuteDisableBit ( > + VOID > + ); > + > +/** > + Split 2M page to 4K. > + > + @param[in] PhysicalAddress Start physical address the 2M p= age > covered. > + @param[in, out] PageEntry2M Pointer to 2M page entry. > + @param[in] StackBase Stack base address. > + @param[in] StackSize Stack size. > + > +**/ > +VOID > +Split2MPageTo4K ( > + IN EFI_PHYSICAL_ADDRESS PhysicalAddress, > + IN OUT UINT64 *PageEntry2M, > + IN EFI_PHYSICAL_ADDRESS StackBase, > + IN UINTN StackSize > + ); > + > +/** > + Allocates and fills in the Page Directory and Page Table Entries to > + establish a 1:1 Virtual to Physical mapping. > + > + @param[in] StackBase Stack base address. > + @param[in] StackSize Stack size. > + > + @return The address of 4 level page map. > + > +**/ > +UINTN > +CreateIdentityMappingPageTables ( > + IN EFI_PHYSICAL_ADDRESS StackBase, > + IN UINTN StackSize > + ); > + > + > +/** > + > + Fix up the vector number in the vector code. > + > + @param VectorBase Base address of the vector handler. > + @param VectorNum Index of vector. > + > +**/ > +VOID > +EFIAPI > +AsmVectorFixup ( > + VOID *VectorBase, > + UINT8 VectorNum > + ); > + > + > +/** > + > + Get the information of vector template. > + > + @param TemplateBase Base address of the template code. > + > + @return Size of the Template code. > + > +**/ > +UINTN > +EFIAPI > +AsmGetVectorTemplatInfo ( > + OUT VOID **TemplateBase > + ); > + > +/** > + Clear legacy memory located at the first 4K-page. > + > + This function traverses the whole HOB list to check if memory from 0 = to 4095 > + exists and has not been allocated, and then clear it if so. > + > + @param HobStart The start of HobList passed to DxeCore. > + > +**/ > +VOID > +ClearFirst4KPage ( > + IN VOID *HobStart > + ); > + > +/** > + Return configure status of NULL pointer detection feature. > + > + @return TRUE NULL pointer detection feature is enabled > + @return FALSE NULL pointer detection feature is disabled > +**/ > +BOOLEAN > +IsNullDetectionEnabled ( > + VOID > + ); > + > +/** > + Prevent the memory pages used for page table from been overwritten. > + > + @param[in] PageTableBase Base address of page table (CR3). > + @param[in] Level4Paging Level 4 paging flag. > + > +**/ > +VOID > +EnablePageTableProtection ( > + IN UINTN PageTableBase, > + IN BOOLEAN Level4Paging > + ); > + > +/** > + This API provides a way to allocate memory for page table. > + > + This API can be called more than once to allocate memory for page tab= les. > + > + Allocates the number of 4KB pages and returns a pointer to the alloca= ted > + buffer. The buffer returned is aligned on a 4KB boundary. > + > + If Pages is 0, then NULL is returned. > + If there is not enough memory remaining to satisfy the request, then = NULL is > + returned. > + > + @param Pages The number of 4 KB pages to allocate. > + > + @return A pointer to the allocated buffer or NULL if allocation fails= . > + > +**/ > +VOID * > +AllocatePageTableMemory ( > + IN UINTN Pages > + ); > + > +#endif > diff --git a/UefiPayloadPkg/UefiPayloadPkg.dec > b/UefiPayloadPkg/UefiPayloadPkg.dec > index 1559735db2..99cb3311a6 100644 > --- a/UefiPayloadPkg/UefiPayloadPkg.dec > +++ b/UefiPayloadPkg/UefiPayloadPkg.dec > @@ -3,7 +3,7 @@ > # > # Provides drivers and definitions to create uefi payload for bootloade= rs. > # > -# Copyright (c) 2014 - 2019, Intel Corporation. All rights reserved. > +# Copyright (c) 2014 - 2020, Intel Corporation. All rights reserved. > # SPDX-License-Identifier: BSD-2-Clause-Patent > # > ## > @@ -68,4 +68,5 @@ > gUefiPayloadPkgTokenSpaceGuid.PcdMemoryTypeEfiReservedMemoryType|0x > 04|UINT32|0x0 >=20 > gUefiPayloadPkgTokenSpaceGuid.PcdMemoryTypeEfiRuntimeServicesData|0xC > 0|UINT32|0x00000015 >=20 > gUefiPayloadPkgTokenSpaceGuid.PcdMemoryTypeEfiRuntimeServicesCode|0x > 80|UINT32|0x00000016 >=20 > - > +# Size of the region used by UEFI in permanent memory > +gUefiPayloadPkgTokenSpaceGuid.PcdSystemMemoryUefiRegionSize|0x02000 > 000|UINT32|0x00000017 > diff --git a/UefiPayloadPkg/UefiPayloadPkgIa32X64.dsc > b/UefiPayloadPkg/UefiPayloadPkg.dsc > similarity index 90% > rename from UefiPayloadPkg/UefiPayloadPkgIa32X64.dsc > rename to UefiPayloadPkg/UefiPayloadPkg.dsc > index e18c4678e8..b772c8456e 100644 > --- a/UefiPayloadPkg/UefiPayloadPkgIa32X64.dsc > +++ b/UefiPayloadPkg/UefiPayloadPkg.dsc > @@ -92,6 +92,12 @@ > INTEL:RELEASE_*_*_CC_FLAGS =3D /D MDEPKG_NDEBUG > MSFT:RELEASE_*_*_CC_FLAGS =3D /D MDEPKG_NDEBUG >=20 > +[BuildOptions.common.EDKII.DXE_RUNTIME_DRIVER] > + GCC:*_*_*_DLINK_FLAGS =3D -z common-page-size=3D0x1000 > + XCODE:*_*_*_DLINK_FLAGS =3D -seg1addr 0x1000 -segalign 0x1000 > + XCODE:*_*_*_MTOC_FLAGS =3D -align 0x1000 > + CLANGPDB:*_*_*_DLINK_FLAGS =3D /ALIGN:4096 > + MSFT:*_*_*_DLINK_FLAGS =3D /ALIGN:4096 >=20 >=20 > ############################################################# > ################### > # > @@ -110,8 +116,6 @@ > # > # Entry point > # > - PeiCoreEntryPoint|MdePkg/Library/PeiCoreEntryPoint/PeiCoreEntryPoint.= inf > - PeimEntryPoint|MdePkg/Library/PeimEntryPoint/PeimEntryPoint.inf >=20 > DxeCoreEntryPoint|MdePkg/Library/DxeCoreEntryPoint/DxeCoreEntryPoint.inf >=20 > UefiDriverEntryPoint|MdePkg/Library/UefiDriverEntryPoint/UefiDriverEntry= Poi > nt.inf >=20 > UefiApplicationEntryPoint|MdePkg/Library/UefiApplicationEntryPoint/UefiA= ppl > icationEntryPoint.inf > @@ -149,8 +153,6 @@ > HiiLib|MdeModulePkg/Library/UefiHiiLib/UefiHiiLib.inf > DevicePathLib|MdePkg/Library/UefiDevicePathLib/UefiDevicePathLib.inf >=20 > UefiDecompressLib|MdePkg/Library/BaseUefiDecompressLib/BaseUefiDecomp > ressLib.inf > - > PeiServicesTablePointerLib|MdePkg/Library/PeiServicesTablePointerLibIdt/= PeiS > ervicesTablePointerLibIdt.inf > - PeiServicesLib|MdePkg/Library/PeiServicesLib/PeiServicesLib.inf > DxeServicesLib|MdePkg/Library/DxeServicesLib/DxeServicesLib.inf >=20 > DxeServicesTableLib|MdePkg/Library/DxeServicesTableLib/DxeServicesTableL= ib > .inf > UefiCpuLib|UefiCpuPkg/Library/BaseUefiCpuLib/BaseUefiCpuLib.inf > @@ -210,23 +212,9 @@ >=20 > TpmMeasurementLib|MdeModulePkg/Library/TpmMeasurementLibNull/TpmM > easurementLibNull.inf > VarCheckLib|MdeModulePkg/Library/VarCheckLib/VarCheckLib.inf >=20 > -[LibraryClasses.IA32.SEC] > - DebugLib|MdePkg/Library/BaseDebugLibNull/BaseDebugLibNull.inf > +[LibraryClasses.common.SEC] > + HobLib|UefiPayloadPkg/Library/HobLib/HobLib.inf > PcdLib|MdePkg/Library/BasePcdLibNull/BasePcdLibNull.inf > - HobLib|MdePkg/Library/PeiHobLib/PeiHobLib.inf > - > MemoryAllocationLib|MdePkg/Library/PeiMemoryAllocationLib/PeiMemoryAll > ocationLib.inf > - > DebugAgentLib|MdeModulePkg/Library/DebugAgentLibNull/DebugAgentLibNu > ll.inf > - > ReportStatusCodeLib|MdePkg/Library/BaseReportStatusCodeLibNull/BaseRepo > rtStatusCodeLibNull.inf > - > -[LibraryClasses.IA32.PEI_CORE, LibraryClasses.IA32.PEIM] > - PcdLib|MdePkg/Library/PeiPcdLib/PeiPcdLib.inf > - HobLib|MdePkg/Library/PeiHobLib/PeiHobLib.inf > - > MemoryAllocationLib|MdePkg/Library/PeiMemoryAllocationLib/PeiMemoryAll > ocationLib.inf > - > ReportStatusCodeLib|MdeModulePkg/Library/PeiReportStatusCodeLib/PeiRepo > rtStatusCodeLib.inf > - > ExtractGuidedSectionLib|MdePkg/Library/PeiExtractGuidedSectionLib/PeiExt= rac > tGuidedSectionLib.inf > -!if $(SOURCE_DEBUG_ENABLE) > - > DebugAgentLib|SourceLevelDebugPkg/Library/DebugAgent/SecPeiDebugAgent > Lib.inf > -!endif >=20 > [LibraryClasses.common.DXE_CORE] > PcdLib|MdePkg/Library/BasePcdLibNull/BasePcdLibNull.inf > @@ -372,29 +360,14 @@ > # Components Section - list of all EDK II Modules needed by this Platfo= rm. > # >=20 > ############################################################# > ################### > -[Components.IA32] > - # > - # SEC Core > - # > - UefiPayloadPkg/SecCore/SecCore.inf > - > - # > - # PEI Core > - # > - MdeModulePkg/Core/Pei/PeiMain.inf >=20 > - # > - # PEIM > - # > - MdeModulePkg/Universal/PCD/Pei/Pcd.inf { > - > - PcdLib|MdePkg/Library/BasePcdLibNull/BasePcdLibNull.inf > - } > - > MdeModulePkg/Universal/ReportStatusCodeRouter/Pei/ReportStatusCodeRout > erPei.inf > - MdeModulePkg/Universal/StatusCodeHandler/Pei/StatusCodeHandlerPei.inf > - > - UefiPayloadPkg/BlSupportPei/BlSupportPei.inf > - MdeModulePkg/Core/DxeIplPeim/DxeIpl.inf > +!if "IA32" in $(ARCH) > + [Components.IA32] > + UefiPayloadPkg/UefiPayloadEntry/UefiPayloadEntry.inf > +!else > + [Components.X64] > + UefiPayloadPkg/UefiPayloadEntry/UefiPayloadEntry.inf > +!endif >=20 > [Components.X64] > # > diff --git a/UefiPayloadPkg/UefiPayloadPkg.fdf > b/UefiPayloadPkg/UefiPayloadPkg.fdf > index 570a8ee7fd..c81b405c6e 100644 > --- a/UefiPayloadPkg/UefiPayloadPkg.fdf > +++ b/UefiPayloadPkg/UefiPayloadPkg.fdf > @@ -13,13 +13,10 @@ DEFINE FD_BASE =3D 0x00800000 > DEFINE FD_BLOCK_SIZE =3D 0x00001000 >=20 > !if $(TARGET) =3D=3D "NOOPT" > -DEFINE PEI_FV_SIZE =3D 0x00050000 > -DEFINE DXE_FV_SIZE =3D 0x00800000 > DEFINE FD_SIZE =3D 0x00850000 > DEFINE NUM_BLOCKS =3D 0x850 > !else > -DEFINE PEI_FV_SIZE =3D 0x30000 > -DEFINE DXE_FV_SIZE =3D 0x3E0000 > + > DEFINE FD_SIZE =3D 0x00410000 > DEFINE NUM_BLOCKS =3D 0x410 > !endif > @@ -32,14 +29,11 @@ ErasePolarity =3D 1 > BlockSize =3D $(FD_BLOCK_SIZE) > NumBlocks =3D $(NUM_BLOCKS) >=20 > -0x00000000|$(PEI_FV_SIZE) > -FV =3D PEIFV > - > -$(PEI_FV_SIZE)|$(DXE_FV_SIZE) > -FV =3D DXEFV > +0x00000000|$(FD_SIZE) > +FV =3D PLDFV >=20 >=20 > ############################################################# > ################### > -[FV.PEIFV] > +[FV.PLDFV] > BlockSize =3D $(FD_BLOCK_SIZE) > FvAlignment =3D 16 > ERASE_POLARITY =3D 1 > @@ -58,14 +52,11 @@ READ_STATUS =3D TRUE > READ_LOCK_CAP =3D TRUE > READ_LOCK_STATUS =3D TRUE >=20 > -INF UefiPayloadPkg/SecCore/SecCore.inf > +INF UefiPayloadPkg/UefiPayloadEntry/UefiPayloadEntry.inf >=20 > -INF MdeModulePkg/Core/Pei/PeiMain.inf > -INF MdeModulePkg/Universal/PCD/Pei/Pcd.inf > -INF > MdeModulePkg/Universal/ReportStatusCodeRouter/Pei/ReportStatusCodeRout > erPei.inf > -INF > MdeModulePkg/Universal/StatusCodeHandler/Pei/StatusCodeHandlerPei.inf > -INF UefiPayloadPkg/BlSupportPei/BlSupportPei.inf > -INF MdeModulePkg/Core/DxeIplPeim/DxeIpl.inf > +FILE FV_IMAGE =3D 4E35FD93-9C72-4c15-8C4B-E77F1DB2D793 { > + SECTION FV_IMAGE =3D DXEFV > +} >=20 >=20 > ############################################################# > ################### >=20 > @@ -89,11 +80,6 @@ READ_STATUS =3D TRUE > READ_LOCK_CAP =3D TRUE > READ_LOCK_STATUS =3D TRUE >=20 > -APRIORI DXE { > - INF MdeModulePkg/Universal/PCD/Dxe/Pcd.inf > - INF > MdeModulePkg/Universal/ReportStatusCodeRouter/RuntimeDxe/ReportStatus > CodeRouterRuntimeDxe.inf > - INF > MdeModulePkg/Universal/StatusCodeHandler/RuntimeDxe/StatusCodeHandler > RuntimeDxe.inf > -} >=20 > # > # DXE Phase modules > diff --git a/UefiPayloadPkg/UefiPayloadPkgIa32.dsc > b/UefiPayloadPkg/UefiPayloadPkgIa32.dsc > deleted file mode 100644 > index 12d7ffe814..0000000000 > --- a/UefiPayloadPkg/UefiPayloadPkgIa32.dsc > +++ /dev/null > @@ -1,585 +0,0 @@ > -## @file > -# Bootloader Payload Package > -# > -# Provides drivers and definitions to create uefi payload for bootloade= rs. > -# > -# Copyright (c) 2014 - 2020, Intel Corporation. All rights reserved. > -# SPDX-License-Identifier: BSD-2-Clause-Patent > -# > -## > - > - > ############################################################# > ################### > -# > -# Defines Section - statements that will be processed to create a Makef= ile. > -# > - > ############################################################# > ################### > -[Defines] > - PLATFORM_NAME =3D UefiPayloadPkg > - PLATFORM_GUID =3D F71608AB-D63D-4491-B744-A9999= 8C8CD96 > - PLATFORM_VERSION =3D 0.1 > - DSC_SPECIFICATION =3D 0x00010005 > - SUPPORTED_ARCHITECTURES =3D IA32 > - BUILD_TARGETS =3D DEBUG|RELEASE|NOOPT > - SKUID_IDENTIFIER =3D DEFAULT > - OUTPUT_DIRECTORY =3D Build/UefiPayloadPkgIA32 > - FLASH_DEFINITION =3D UefiPayloadPkg/UefiPayloadPkg= .fdf > - > - DEFINE SOURCE_DEBUG_ENABLE =3D FALSE > - > - # > - # SBL: UEFI payload for Slim Bootloader > - # COREBOOT: UEFI payload for coreboot > - # > - DEFINE BOOTLOADER =3D SBL > - > - # > - # CPU options > - # > - DEFINE MAX_LOGICAL_PROCESSORS =3D 64 > - > - # > - # PCI options > - # > - DEFINE PCIE_BASE_SUPPORT =3D TRUE > - > - # > - # Serial port set up > - # > - DEFINE BAUD_RATE =3D 115200 > - DEFINE SERIAL_CLOCK_RATE =3D 1843200 > - DEFINE SERIAL_LINE_CONTROL =3D 3 # 8-bits, no parity > - DEFINE SERIAL_HARDWARE_FLOW_CONTROL =3D FALSE > - DEFINE SERIAL_DETECT_CABLE =3D FALSE > - DEFINE SERIAL_FIFO_CONTROL =3D 7 # Enable FIFO > - DEFINE SERIAL_EXTENDED_TX_FIFO_SIZE =3D 16 > - DEFINE UART_DEFAULT_BAUD_RATE =3D $(BAUD_RATE) > - DEFINE UART_DEFAULT_DATA_BITS =3D 8 > - DEFINE UART_DEFAULT_PARITY =3D 1 > - DEFINE UART_DEFAULT_STOP_BITS =3D 1 > - DEFINE DEFAULT_TERMINAL_TYPE =3D 0 > - > - # Enabling the serial terminal will slow down the boot menu redering! > - DEFINE DISABLE_SERIAL_TERMINAL =3D FALSE > - > - # > - # typedef struct { > - # UINT16 VendorId; ///< Vendor ID to match the PCI devic= e. The value > 0xFFFF terminates the list of entries. > - # UINT16 DeviceId; ///< Device ID to match the PCI devic= e > - # UINT32 ClockRate; ///< UART clock rate. Set to 0 for d= efault clock rate > of 1843200 Hz > - # UINT64 Offset; ///< The byte offset into to the BAR > - # UINT8 BarIndex; ///< Which BAR to get the UART base a= ddress > - # UINT8 RegisterStride; ///< UART register stride in bytes. = Set to 0 for > default register stride of 1 byte. > - # UINT16 ReceiveFifoDepth; ///< UART receive FIFO depth in bytes= . Set to 0 > for a default FIFO depth of 16 bytes. > - # UINT16 TransmitFifoDepth; ///< UART transmit FIFO depth in byte= s. Set to > 0 for a default FIFO depth of 16 bytes. > - # UINT8 Reserved[2]; > - # } PCI_SERIAL_PARAMETER; > - # > - # Vendor FFFF Device 0000 Prog Interface 1, BAR #0, Offset 0, Stride = = =3D 1, > Clock 1843200 (0x1c2000) > - # > - # [Vendor] [Device] [----Clo= ckRate---] [------------Offset--- > --------] [Bar] [Stride] [RxFifo] [TxFifo] [Rsvd] [Vendor] > - DEFINE PCI_SERIAL_PARAMETERS =3D {0xff,0xff, 0x00,0x00, > 0x0,0x20,0x1c,0x00, 0x0,0x0,0x0,0x0,0x0,0x0,0x0,0x0, 0x00, 0x01, 0x0,= 0x0, > 0x0,0x0, 0x0,0x0, 0xff,0xff} > - > - # > - # Shell options: [BUILD_SHELL, MIN_BIN, NONE, UEFI_BIN] > - # > - DEFINE SHELL_TYPE =3D BUILD_SHELL > - > -[BuildOptions] > - *_*_*_CC_FLAGS =3D -D DISABLE_NEW_DEPRECATED_INTERFAC= ES > - GCC:*_UNIXGCC_*_CC_FLAGS =3D -DMDEPKG_NDEBUG > - GCC:RELEASE_*_*_CC_FLAGS =3D -DMDEPKG_NDEBUG > - INTEL:RELEASE_*_*_CC_FLAGS =3D /D MDEPKG_NDEBUG > - MSFT:RELEASE_*_*_CC_FLAGS =3D /D MDEPKG_NDEBUG > - > - > - > ############################################################# > ################### > -# > -# SKU Identification section - list of all SKU IDs supported by this Pl= atform. > -# > - > ############################################################# > ################### > -[SkuIds] > - 0|DEFAULT > - > - > ############################################################# > ################### > -# > -# Library Class section - list of all Library Classes needed by this Pl= atform. > -# > - > ############################################################# > ################### > -[LibraryClasses] > - # > - # Entry point > - # > - PeiCoreEntryPoint|MdePkg/Library/PeiCoreEntryPoint/PeiCoreEntryPoint.= inf > - PeimEntryPoint|MdePkg/Library/PeimEntryPoint/PeimEntryPoint.inf > - > DxeCoreEntryPoint|MdePkg/Library/DxeCoreEntryPoint/DxeCoreEntryPoint.inf > - > UefiDriverEntryPoint|MdePkg/Library/UefiDriverEntryPoint/UefiDriverEntry= Poi > nt.inf > - > UefiApplicationEntryPoint|MdePkg/Library/UefiApplicationEntryPoint/UefiA= ppl > icationEntryPoint.inf > - > - # > - # Basic > - # > - BaseLib|MdePkg/Library/BaseLib/BaseLib.inf > - > BaseMemoryLib|MdePkg/Library/BaseMemoryLibRepStr/BaseMemoryLibRepSt > r.inf > - > SynchronizationLib|MdePkg/Library/BaseSynchronizationLib/BaseSynchroniza= t > ionLib.inf > - PrintLib|MdePkg/Library/BasePrintLib/BasePrintLib.inf > - CpuLib|MdePkg/Library/BaseCpuLib/BaseCpuLib.inf > - IoLib|MdePkg/Library/BaseIoLibIntrinsic/BaseIoLibIntrinsic.inf > -!if $(PCIE_BASE_SUPPORT) =3D=3D FALSE > - PciLib|MdePkg/Library/BasePciLibCf8/BasePciLibCf8.inf > - PciCf8Lib|MdePkg/Library/BasePciCf8Lib/BasePciCf8Lib.inf > -!else > - PciLib|MdePkg/Library/BasePciLibPciExpress/BasePciLibPciExpress.inf > - PciExpressLib|MdePkg/Library/BasePciExpressLib/BasePciExpressLib.inf > -!endif > - > PciSegmentLib|MdePkg/Library/PciSegmentLibSegmentInfo/BasePciSegmentLi > bSegmentInfo.inf > - > PciSegmentInfoLib|UefiPayloadPkg/Library/PciSegmentInfoLibAcpiBoardInfo/= P > ciSegmentInfoLibAcpiBoardInfo.inf > - PeCoffLib|MdePkg/Library/BasePeCoffLib/BasePeCoffLib.inf > - > PeCoffGetEntryPointLib|MdePkg/Library/BasePeCoffGetEntryPointLib/BasePeC > offGetEntryPointLib.inf > - > CacheMaintenanceLib|MdePkg/Library/BaseCacheMaintenanceLib/BaseCache > MaintenanceLib.inf > - > - # > - # UEFI & PI > - # > - > UefiBootServicesTableLib|MdePkg/Library/UefiBootServicesTableLib/UefiBoo= tS > ervicesTableLib.inf > - > UefiRuntimeServicesTableLib|MdePkg/Library/UefiRuntimeServicesTableLib/U= e > fiRuntimeServicesTableLib.inf > - UefiRuntimeLib|MdePkg/Library/UefiRuntimeLib/UefiRuntimeLib.inf > - UefiLib|MdePkg/Library/UefiLib/UefiLib.inf > - > UefiHiiServicesLib|MdeModulePkg/Library/UefiHiiServicesLib/UefiHiiServic= esLib > .inf > - HiiLib|MdeModulePkg/Library/UefiHiiLib/UefiHiiLib.inf > - DevicePathLib|MdePkg/Library/UefiDevicePathLib/UefiDevicePathLib.inf > - > UefiDecompressLib|MdePkg/Library/BaseUefiDecompressLib/BaseUefiDecomp > ressLib.inf > - > PeiServicesTablePointerLib|MdePkg/Library/PeiServicesTablePointerLibIdt/= PeiS > ervicesTablePointerLibIdt.inf > - PeiServicesLib|MdePkg/Library/PeiServicesLib/PeiServicesLib.inf > - DxeServicesLib|MdePkg/Library/DxeServicesLib/DxeServicesLib.inf > - > DxeServicesTableLib|MdePkg/Library/DxeServicesTableLib/DxeServicesTableL= ib > .inf > - UefiCpuLib|UefiCpuPkg/Library/BaseUefiCpuLib/BaseUefiCpuLib.inf > - SortLib|MdeModulePkg/Library/UefiSortLib/UefiSortLib.inf > - > - # > - # Generic Modules > - # > - UefiUsbLib|MdePkg/Library/UefiUsbLib/UefiUsbLib.inf > - UefiScsiLib|MdePkg/Library/UefiScsiLib/UefiScsiLib.inf > - > OemHookStatusCodeLib|MdeModulePkg/Library/OemHookStatusCodeLibNull/ > OemHookStatusCodeLibNull.inf > - CapsuleLib|MdeModulePkg/Library/DxeCapsuleLibNull/DxeCapsuleLibNull.i= nf > - > SecurityManagementLib|MdeModulePkg/Library/DxeSecurityManagementLib/ > DxeSecurityManagementLib.inf > - > UefiBootManagerLib|MdeModulePkg/Library/UefiBootManagerLib/UefiBootM > anagerLib.inf > - > CustomizedDisplayLib|MdeModulePkg/Library/CustomizedDisplayLib/Customiz > edDisplayLib.inf > - > FrameBufferBltLib|MdeModulePkg/Library/FrameBufferBltLib/FrameBufferBltL > ib.inf > - > - # > - # CPU > - # > - MtrrLib|UefiCpuPkg/Library/MtrrLib/MtrrLib.inf > - LocalApicLib|UefiCpuPkg/Library/BaseXApicX2ApicLib/BaseXApicX2ApicLib= .inf > - > - # > - # Platform > - # > - TimerLib|UefiPayloadPkg/Library/AcpiTimerLib/AcpiTimerLib.inf > - ResetSystemLib|UefiPayloadPkg/Library/ResetSystemLib/ResetSystemLib.i= nf > - > SerialPortLib|MdeModulePkg/Library/BaseSerialPortLib16550/BaseSerialPort= Li > b16550.inf > - > PlatformHookLib|UefiPayloadPkg/Library/PlatformHookLib/PlatformHookLib.i > nf > - > PlatformBootManagerLib|UefiPayloadPkg/Library/PlatformBootManagerLib/Pl > atformBootManagerLib.inf > - IoApicLib|PcAtChipsetPkg/Library/BaseIoApicLib/BaseIoApicLib.inf > - > - # > - # Misc > - # > - > DebugPrintErrorLevelLib|MdePkg/Library/BaseDebugPrintErrorLevelLib/BaseD > ebugPrintErrorLevelLib.inf > - > PerformanceLib|MdePkg/Library/BasePerformanceLibNull/BasePerformanceLi > bNull.inf > -!if $(SOURCE_DEBUG_ENABLE) =3D=3D TRUE > - > PeCoffExtraActionLib|SourceLevelDebugPkg/Library/PeCoffExtraActionLibDeb= u > g/PeCoffExtraActionLibDebug.inf > - > DebugCommunicationLib|SourceLevelDebugPkg/Library/DebugCommunication > LibSerialPort/DebugCommunicationLibSerialPort.inf > -!else > - > PeCoffExtraActionLib|MdePkg/Library/BasePeCoffExtraActionLibNull/BasePeC= o > ffExtraActionLibNull.inf > - > DebugAgentLib|MdeModulePkg/Library/DebugAgentLibNull/DebugAgentLibNu > ll.inf > -!endif > - > PlatformSupportLib|UefiPayloadPkg/Library/PlatformSupportLibNull/Platfor= mS > upportLibNull.inf > -!if $(BOOTLOADER) =3D=3D "COREBOOT" > - BlParseLib|UefiPayloadPkg/Library/CbParseLib/CbParseLib.inf > -!else > - BlParseLib|UefiPayloadPkg/Library/SblParseLib/SblParseLib.inf > -!endif > - > - > DebugLib|MdePkg/Library/BaseDebugLibSerialPort/BaseDebugLibSerialPort.in= f > - LockBoxLib|MdeModulePkg/Library/LockBoxNullLib/LockBoxNullLib.inf > - FileExplorerLib|MdeModulePkg/Library/FileExplorerLib/FileExplorerLib.= inf > - > AuthVariableLib|MdeModulePkg/Library/AuthVariableLibNull/AuthVariableLib > Null.inf > - > TpmMeasurementLib|MdeModulePkg/Library/TpmMeasurementLibNull/TpmM > easurementLibNull.inf > - VarCheckLib|MdeModulePkg/Library/VarCheckLib/VarCheckLib.inf > - > -[LibraryClasses.IA32.SEC] > - DebugLib|MdePkg/Library/BaseDebugLibNull/BaseDebugLibNull.inf > - PcdLib|MdePkg/Library/BasePcdLibNull/BasePcdLibNull.inf > - HobLib|MdePkg/Library/PeiHobLib/PeiHobLib.inf > - > MemoryAllocationLib|MdePkg/Library/PeiMemoryAllocationLib/PeiMemoryAll > ocationLib.inf > - > DebugAgentLib|MdeModulePkg/Library/DebugAgentLibNull/DebugAgentLibNu > ll.inf > - > ReportStatusCodeLib|MdePkg/Library/BaseReportStatusCodeLibNull/BaseRepo > rtStatusCodeLibNull.inf > - > -[LibraryClasses.IA32.PEI_CORE, LibraryClasses.IA32.PEIM] > - PcdLib|MdePkg/Library/PeiPcdLib/PeiPcdLib.inf > - HobLib|MdePkg/Library/PeiHobLib/PeiHobLib.inf > - > MemoryAllocationLib|MdePkg/Library/PeiMemoryAllocationLib/PeiMemoryAll > ocationLib.inf > - > ReportStatusCodeLib|MdeModulePkg/Library/PeiReportStatusCodeLib/PeiRepo > rtStatusCodeLib.inf > - > ExtractGuidedSectionLib|MdePkg/Library/PeiExtractGuidedSectionLib/PeiExt= rac > tGuidedSectionLib.inf > -!if $(SOURCE_DEBUG_ENABLE) > - > DebugAgentLib|SourceLevelDebugPkg/Library/DebugAgent/SecPeiDebugAgent > Lib.inf > -!endif > - > -[LibraryClasses.common.DXE_CORE] > - PcdLib|MdePkg/Library/BasePcdLibNull/BasePcdLibNull.inf > - HobLib|MdePkg/Library/DxeCoreHobLib/DxeCoreHobLib.inf > - > MemoryAllocationLib|MdeModulePkg/Library/DxeCoreMemoryAllocationLib/D > xeCoreMemoryAllocationLib.inf > - > ExtractGuidedSectionLib|MdePkg/Library/DxeExtractGuidedSectionLib/DxeExt= r > actGuidedSectionLib.inf > - > ReportStatusCodeLib|MdeModulePkg/Library/DxeReportStatusCodeLib/DxeRe > portStatusCodeLib.inf > -!if $(SOURCE_DEBUG_ENABLE) > - > DebugAgentLib|SourceLevelDebugPkg/Library/DebugAgent/DxeDebugAgentLib > .inf > -!endif > - > CpuExceptionHandlerLib|UefiCpuPkg/Library/CpuExceptionHandlerLib/DxeCpu > ExceptionHandlerLib.inf > - VmgExitLib|UefiCpuPkg/Library/VmgExitLibNull/VmgExitLibNull.inf > - > -[LibraryClasses.common.DXE_DRIVER] > - PcdLib|MdePkg/Library/DxePcdLib/DxePcdLib.inf > - HobLib|MdePkg/Library/DxeHobLib/DxeHobLib.inf > - > MemoryAllocationLib|MdePkg/Library/UefiMemoryAllocationLib/UefiMemory > AllocationLib.inf > - > ExtractGuidedSectionLib|MdePkg/Library/DxeExtractGuidedSectionLib/DxeExt= r > actGuidedSectionLib.inf > - > ReportStatusCodeLib|MdeModulePkg/Library/DxeReportStatusCodeLib/DxeRe > portStatusCodeLib.inf > -!if $(SOURCE_DEBUG_ENABLE) > - > DebugAgentLib|SourceLevelDebugPkg/Library/DebugAgent/DxeDebugAgentLib > .inf > -!endif > - > CpuExceptionHandlerLib|UefiCpuPkg/Library/CpuExceptionHandlerLib/DxeCpu > ExceptionHandlerLib.inf > - MpInitLib|UefiCpuPkg/Library/MpInitLib/DxeMpInitLib.inf > - VmgExitLib|UefiCpuPkg/Library/VmgExitLibNull/VmgExitLibNull.inf > - > -[LibraryClasses.common.DXE_RUNTIME_DRIVER] > - PcdLib|MdePkg/Library/DxePcdLib/DxePcdLib.inf > - HobLib|MdePkg/Library/DxeHobLib/DxeHobLib.inf > - > MemoryAllocationLib|MdePkg/Library/UefiMemoryAllocationLib/UefiMemory > AllocationLib.inf > - > ReportStatusCodeLib|MdeModulePkg/Library/RuntimeDxeReportStatusCodeLib > /RuntimeDxeReportStatusCodeLib.inf > - > - > [LibraryClasses.common.UEFI_DRIVER,LibraryClasses.common.UEFI_APPLICATI > ON] > - PcdLib|MdePkg/Library/DxePcdLib/DxePcdLib.inf > - > MemoryAllocationLib|MdePkg/Library/UefiMemoryAllocationLib/UefiMemory > AllocationLib.inf > - > ReportStatusCodeLib|MdeModulePkg/Library/DxeReportStatusCodeLib/DxeRe > portStatusCodeLib.inf > - HobLib|MdePkg/Library/DxeHobLib/DxeHobLib.inf > - > - > ############################################################# > ################### > -# > -# Pcd Section - list of all EDK II PCD Entries defined by this Platform= . > -# > - > ############################################################# > ################### > -[PcdsFeatureFlag] > - gEfiMdeModulePkgTokenSpaceGuid.PcdDxeIplSwitchToLongMode|FALSE > - gEfiMdeModulePkgTokenSpaceGuid.PcdConOutGopSupport|TRUE > - gEfiMdeModulePkgTokenSpaceGuid.PcdConOutUgaSupport|FALSE > - > -[PcdsFixedAtBuild] > - gEfiMdeModulePkgTokenSpaceGuid.PcdMaxVariableSize|0x10000 > - > gEfiMdeModulePkgTokenSpaceGuid.PcdMaxHardwareErrorVariableSize|0x800 > 0 > - gEfiMdeModulePkgTokenSpaceGuid.PcdVariableStoreSize|0x10000 > - # > - # Make VariableRuntimeDxe work at emulated non-volatile variable mode= . > - # > - gEfiMdeModulePkgTokenSpaceGuid.PcdEmuVariableNvModeEnable|TRUE > - > - gEfiMdeModulePkgTokenSpaceGuid.PcdVpdBaseAddress|0x0 > -!if $(TARGET) =3D=3D DEBUG > - gEfiMdeModulePkgTokenSpaceGuid.PcdStatusCodeUseSerial|TRUE > -!else > - gEfiMdeModulePkgTokenSpaceGuid.PcdStatusCodeUseSerial|FALSE > -!endif > - gEfiMdeModulePkgTokenSpaceGuid.PcdStatusCodeUseMemory|FALSE > - gEfiMdeModulePkgTokenSpaceGuid.PcdBootManagerMenuFile|{ 0x21, 0xaa, > 0x2c, 0x46, 0x14, 0x76, 0x03, 0x45, 0x83, 0x6e, 0x8a, 0xb6, 0xf4, 0x66, = 0x23, > 0x31 } > - > - gEfiMdePkgTokenSpaceGuid.PcdPciExpressBaseAddress|$(PCIE_BASE) > - > -!if $(SOURCE_DEBUG_ENABLE) > - gEfiSourceLevelDebugPkgTokenSpaceGuid.PcdDebugLoadImageMethod|0x2 > -!endif > - > -[PcdsPatchableInModule.common] > - gEfiMdePkgTokenSpaceGuid.PcdReportStatusCodePropertyMask|0x7 > - gEfiMdePkgTokenSpaceGuid.PcdDebugPrintErrorLevel|0x8000004F > -!if $(SOURCE_DEBUG_ENABLE) > - gEfiMdePkgTokenSpaceGuid.PcdDebugPropertyMask|0x17 > -!else > - gEfiMdePkgTokenSpaceGuid.PcdDebugPropertyMask|0x2F > -!endif > - > - # > - # The following parameters are set by Library/PlatformHookLib > - # > - gEfiMdeModulePkgTokenSpaceGuid.PcdSerialUseMmio|FALSE > - gEfiMdeModulePkgTokenSpaceGuid.PcdSerialRegisterBase|0 > - gEfiMdeModulePkgTokenSpaceGuid.PcdSerialBaudRate|$(BAUD_RATE) > - gEfiMdeModulePkgTokenSpaceGuid.PcdSerialRegisterStride|1 > - > - # > - # Enable these parameters to be set on the command line > - # > - > gEfiMdeModulePkgTokenSpaceGuid.PcdSerialClockRate|$(SERIAL_CLOCK_RAT > E) > - > gEfiMdeModulePkgTokenSpaceGuid.PcdSerialLineControl|$(SERIAL_LINE_CON > TROL) > - > gEfiMdeModulePkgTokenSpaceGuid.PcdSerialUseHardwareFlowControl|$(SERI > AL_HARDWARE_FLOW_CONTROL) > - > gEfiMdeModulePkgTokenSpaceGuid.PcdSerialDetectCable|$(SERIAL_DETECT_C > ABLE) > - > gEfiMdeModulePkgTokenSpaceGuid.PcdSerialFifoControl|$(SERIAL_FIFO_CON > TROL) > - > gEfiMdeModulePkgTokenSpaceGuid.PcdSerialExtendedTxFifoSize|$(SERIAL_EX > TENDED_TX_FIFO_SIZE) > - > - gEfiMdeModulePkgTokenSpaceGuid.PcdPciDisableBusEnumeration|TRUE > - > gEfiMdePkgTokenSpaceGuid.PcdUartDefaultBaudRate|$(UART_DEFAULT_BAU > D_RATE) > - > gEfiMdePkgTokenSpaceGuid.PcdUartDefaultDataBits|$(UART_DEFAULT_DATA > _BITS) > - gEfiMdePkgTokenSpaceGuid.PcdUartDefaultParity|$(UART_DEFAULT_PARITY) > - > gEfiMdePkgTokenSpaceGuid.PcdUartDefaultStopBits|$(UART_DEFAULT_STOP_ > BITS) > - > gEfiMdePkgTokenSpaceGuid.PcdDefaultTerminalType|$(DEFAULT_TERMINAL_ > TYPE) > - > gEfiMdeModulePkgTokenSpaceGuid.PcdPciSerialParameters|$(PCI_SERIAL_PA > RAMETERS) > - > - > gUefiCpuPkgTokenSpaceGuid.PcdCpuMaxLogicalProcessorNumber|$(MAX_LO > GICAL_PROCESSORS) > - > - > - > ############################################################# > ################### > -# > -# Pcd Dynamic Section - list of all EDK II PCD Entries defined by this = Platform > -# > - > ############################################################# > ################### > - > -[PcdsDynamicDefault] > - gEfiMdeModulePkgTokenSpaceGuid.PcdEmuVariableNvStoreReserved|0 > - gEfiMdeModulePkgTokenSpaceGuid.PcdFlashNvStorageVariableBase64|0 > - gEfiMdeModulePkgTokenSpaceGuid.PcdFlashNvStorageFtwWorkingBase|0 > - gEfiMdeModulePkgTokenSpaceGuid.PcdFlashNvStorageFtwSpareBase|0 > - gEfiMdePkgTokenSpaceGuid.PcdPlatformBootTimeOut|3 > - > - ## This PCD defines the video horizontal resolution. > - # This PCD could be set to 0 then video resolution could be at highe= st > resolution. > - gEfiMdeModulePkgTokenSpaceGuid.PcdVideoHorizontalResolution|0 > - ## This PCD defines the video vertical resolution. > - # This PCD could be set to 0 then video resolution could be at highe= st > resolution. > - gEfiMdeModulePkgTokenSpaceGuid.PcdVideoVerticalResolution|0 > - > - ## The PCD is used to specify the video horizontal resolution of text= setup. > - gEfiMdeModulePkgTokenSpaceGuid.PcdSetupVideoHorizontalResolution|0 > - ## The PCD is used to specify the video vertical resolution of text s= etup. > - gEfiMdeModulePkgTokenSpaceGuid.PcdSetupVideoVerticalResolution|0 > - > - gEfiMdeModulePkgTokenSpaceGuid.PcdConOutRow|31 > - gEfiMdeModulePkgTokenSpaceGuid.PcdConOutColumn|100 > - gEfiMdePkgTokenSpaceGuid.PcdPciExpressBaseAddress|0 > - > - > ############################################################# > ################### > -# > -# Components Section - list of all EDK II Modules needed by this Platfo= rm. > -# > - > ############################################################# > ################### > -[Components.IA32] > - # > - # SEC Core > - # > - UefiPayloadPkg/SecCore/SecCore.inf > - > - # > - # PEI Core > - # > - MdeModulePkg/Core/Pei/PeiMain.inf > - > - # > - # PEIM > - # > - MdeModulePkg/Universal/PCD/Pei/Pcd.inf { > - > - PcdLib|MdePkg/Library/BasePcdLibNull/BasePcdLibNull.inf > - } > - > MdeModulePkg/Universal/ReportStatusCodeRouter/Pei/ReportStatusCodeRout > erPei.inf > - MdeModulePkg/Universal/StatusCodeHandler/Pei/StatusCodeHandlerPei.inf > - > - UefiPayloadPkg/BlSupportPei/BlSupportPei.inf > - MdeModulePkg/Core/DxeIplPeim/DxeIpl.inf > - > -[Components.IA32] > - # > - # DXE Core > - # > - MdeModulePkg/Core/Dxe/DxeMain.inf { > - > - > NULL|MdeModulePkg/Library/LzmaCustomDecompressLib/LzmaCustomDecom > pressLib.inf > - } > - > - # > - # Components that produce the architectural protocols > - # > - MdeModulePkg/Universal/SecurityStubDxe/SecurityStubDxe.inf > - UefiCpuPkg/CpuDxe/CpuDxe.inf > - MdeModulePkg/Universal/BdsDxe/BdsDxe.inf > - MdeModulePkg/Application/UiApp/UiApp.inf { > - > - > NULL|MdeModulePkg/Library/DeviceManagerUiLib/DeviceManagerUiLib.inf > - NULL|MdeModulePkg/Library/BootManagerUiLib/BootManagerUiLib.inf > - > NULL|MdeModulePkg/Library/BootMaintenanceManagerUiLib/BootMaintenan > ceManagerUiLib.inf > - } > - > - PcAtChipsetPkg/HpetTimerDxe/HpetTimerDxe.inf > - MdeModulePkg/Universal/Metronome/Metronome.inf > - MdeModulePkg/Universal/WatchdogTimerDxe/WatchdogTimer.inf > - MdeModulePkg/Core/RuntimeDxe/RuntimeDxe.inf > - MdeModulePkg/Universal/CapsuleRuntimeDxe/CapsuleRuntimeDxe.inf > - > MdeModulePkg/Universal/MonotonicCounterRuntimeDxe/MonotonicCounterR > untimeDxe.inf > - > MdeModulePkg/Universal/ResetSystemRuntimeDxe/ResetSystemRuntimeDxe.in > f > - > PcAtChipsetPkg/PcatRealTimeClockRuntimeDxe/PcatRealTimeClockRuntimeDxe. > inf > - MdeModulePkg/Universal/Variable/RuntimeDxe/VariableRuntimeDxe.inf > - > - # > - # Following are the DXE drivers > - # > - MdeModulePkg/Universal/PCD/Dxe/Pcd.inf { > - > - PcdLib|MdePkg/Library/BasePcdLibNull/BasePcdLibNull.inf > - } > - > - > MdeModulePkg/Universal/ReportStatusCodeRouter/RuntimeDxe/ReportStatus > CodeRouterRuntimeDxe.inf > - > MdeModulePkg/Universal/StatusCodeHandler/RuntimeDxe/StatusCodeHandler > RuntimeDxe.inf > - UefiCpuPkg/CpuIo2Dxe/CpuIo2Dxe.inf > - MdeModulePkg/Universal/DevicePathDxe/DevicePathDxe.inf > - > MdeModulePkg/Universal/MemoryTest/NullMemoryTestDxe/NullMemoryTest > Dxe.inf > - MdeModulePkg/Universal/HiiDatabaseDxe/HiiDatabaseDxe.inf > - MdeModulePkg/Universal/SetupBrowserDxe/SetupBrowserDxe.inf > - MdeModulePkg/Universal/DisplayEngineDxe/DisplayEngineDxe.inf > - > - UefiPayloadPkg/BlSupportDxe/BlSupportDxe.inf > - > - # > - # SMBIOS Support > - # > - MdeModulePkg/Universal/SmbiosDxe/SmbiosDxe.inf > - > - # > - # ACPI Support > - # > - MdeModulePkg/Universal/Acpi/AcpiTableDxe/AcpiTableDxe.inf > - > - # > - # PCI Support > - # > - MdeModulePkg/Bus/Pci/PciBusDxe/PciBusDxe.inf > - MdeModulePkg/Bus/Pci/PciHostBridgeDxe/PciHostBridgeDxe.inf { > - > - > PciHostBridgeLib|UefiPayloadPkg/Library/PciHostBridgeLib/PciHostBridgeLi= b.in > f > - } > - > - # > - # SCSI/ATA/IDE/DISK Support > - # > - MdeModulePkg/Universal/Disk/DiskIoDxe/DiskIoDxe.inf > - MdeModulePkg/Universal/Disk/PartitionDxe/PartitionDxe.inf > - MdeModulePkg/Universal/Disk/UnicodeCollation/EnglishDxe/EnglishDxe.in= f > - FatPkg/EnhancedFatDxe/Fat.inf > - MdeModulePkg/Bus/Pci/SataControllerDxe/SataControllerDxe.inf > - MdeModulePkg/Bus/Ata/AtaBusDxe/AtaBusDxe.inf > - MdeModulePkg/Bus/Ata/AtaAtapiPassThru/AtaAtapiPassThru.inf > - MdeModulePkg/Bus/Scsi/ScsiBusDxe/ScsiBusDxe.inf > - MdeModulePkg/Bus/Scsi/ScsiDiskDxe/ScsiDiskDxe.inf > - > - # > - # SD/eMMC Support > - # > - MdeModulePkg/Bus/Pci/SdMmcPciHcDxe/SdMmcPciHcDxe.inf > - MdeModulePkg/Bus/Sd/EmmcDxe/EmmcDxe.inf > - MdeModulePkg/Bus/Sd/SdDxe/SdDxe.inf > - > - # > - # Usb Support > - # > - MdeModulePkg/Bus/Pci/UhciDxe/UhciDxe.inf > - MdeModulePkg/Bus/Pci/EhciDxe/EhciDxe.inf > - MdeModulePkg/Bus/Pci/XhciDxe/XhciDxe.inf > - MdeModulePkg/Bus/Usb/UsbBusDxe/UsbBusDxe.inf > - MdeModulePkg/Bus/Usb/UsbKbDxe/UsbKbDxe.inf > - MdeModulePkg/Bus/Usb/UsbMassStorageDxe/UsbMassStorageDxe.inf > - > - # > - # ISA Support > - # > - MdeModulePkg/Universal/SerialDxe/SerialDxe.inf > -!if $(PS2_KEYBOARD_ENABLE) =3D=3D TRUE > - OvmfPkg/SioBusDxe/SioBusDxe.inf > - MdeModulePkg/Bus/Isa/Ps2KeyboardDxe/Ps2KeyboardDxe.inf > -!endif > - > - # > - # Console Support > - # > - MdeModulePkg/Universal/Console/ConPlatformDxe/ConPlatformDxe.inf > - MdeModulePkg/Universal/Console/ConSplitterDxe/ConSplitterDxe.inf > - > MdeModulePkg/Universal/Console/GraphicsConsoleDxe/GraphicsConsoleDxe.in > f > -!if $(DISABLE_SERIAL_TERMINAL) =3D=3D FALSE > - MdeModulePkg/Universal/Console/TerminalDxe/TerminalDxe.inf > -!endif > - UefiPayloadPkg/GraphicsOutputDxe/GraphicsOutputDxe.inf > - > - #------------------------------ > - # Build the shell > - #------------------------------ > - > -!if $(SHELL_TYPE) =3D=3D BUILD_SHELL > - > - # > - # Shell Lib > - # > -[LibraryClasses] > - > BcfgCommandLib|ShellPkg/Library/UefiShellBcfgCommandLib/UefiShellBcfgCo > mmandLib.inf > - DevicePathLib|MdePkg/Library/UefiDevicePathLib/UefiDevicePathLib.inf > - FileHandleLib|MdePkg/Library/UefiFileHandleLib/UefiFileHandleLib.inf > - ShellLib|ShellPkg/Library/UefiShellLib/UefiShellLib.inf > - !include NetworkPkg/NetworkLibs.dsc.inc > - > -[Components.IA32] > - > ShellPkg/DynamicCommand/TftpDynamicCommand/TftpDynamicCommand.inf > { > - > - ## This flag is used to control initialization of the shell libra= ry > - # This should be FALSE for compiling the dynamic command. > - gEfiShellPkgTokenSpaceGuid.PcdShellLibAutoInitialize|FALSE > - } > - ShellPkg/DynamicCommand/DpDynamicCommand/DpDynamicCommand.inf > { > - > - ## This flag is used to control initialization of the shell libra= ry > - # This should be FALSE for compiling the dynamic command. > - gEfiShellPkgTokenSpaceGuid.PcdShellLibAutoInitialize|FALSE > - } > - ShellPkg/Application/Shell/Shell.inf { > - > - ## This flag is used to control initialization of the shell libra= ry > - # This should be FALSE for compiling the shell application itsel= f only. > - gEfiShellPkgTokenSpaceGuid.PcdShellLibAutoInitialize|FALSE > - > - #------------------------------ > - # Basic commands > - #------------------------------ > - > - > - > NULL|ShellPkg/Library/UefiShellLevel1CommandsLib/UefiShellLevel1Command > sLib.inf > - > NULL|ShellPkg/Library/UefiShellLevel2CommandsLib/UefiShellLevel2Command > sLib.inf > - > NULL|ShellPkg/Library/UefiShellLevel3CommandsLib/UefiShellLevel3Command > sLib.inf > - > NULL|ShellPkg/Library/UefiShellDriver1CommandsLib/UefiShellDriver1Comma > ndsLib.inf > - > NULL|ShellPkg/Library/UefiShellInstall1CommandsLib/UefiShellInstall1Comm= an > dsLib.inf > - > NULL|ShellPkg/Library/UefiShellDebug1CommandsLib/UefiShellDebug1Comma > ndsLib.inf > - > - #------------------------------ > - # Networking commands > - #------------------------------ > - > - > - > NULL|ShellPkg/Library/UefiShellNetwork1CommandsLib/UefiShellNetwork1Co > mmandsLib.inf > - > - #------------------------------ > - # Support libraries > - #------------------------------ > - > - > - DebugLib|MdePkg/Library/UefiDebugLibConOut/UefiDebugLibConOut.inf > - DevicePathLib|MdePkg/Library/UefiDevicePathLib/UefiDevicePathLib.= inf > - > HandleParsingLib|ShellPkg/Library/UefiHandleParsingLib/UefiHandleParsing= Lib. > inf > - PcdLib|MdePkg/Library/DxePcdLib/DxePcdLib.inf > - ShellCEntryLib|ShellPkg/Library/UefiShellCEntryLib/UefiShellCEntr= yLib.inf > - > ShellCommandLib|ShellPkg/Library/UefiShellCommandLib/UefiShellCommandLi > b.inf > - SortLib|MdeModulePkg/Library/UefiSortLib/UefiSortLib.inf > - } > - > -!endif > -- > 2.16.2.windows.1 >=20 >=20 >=20 >=20 >=20