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Fri, 19 Jun 2020 01:00:51 +0000 From: "Dong, Eric" To: Garrett Kirkendall , "devel@edk2.groups.io" CC: "Ni, Ray" , Laszlo Ersek Subject: Re: [PATCH v2 0/2] AMD procesor MSR_IA32_MISC_ENABLE Thread-Topic: [PATCH v2 0/2] AMD procesor MSR_IA32_MISC_ENABLE Thread-Index: AQHWRYRocMyTLvpfs02tOvEENUxcRajfHGJw Date: Fri, 19 Jun 2020 01:00:51 +0000 Message-ID: References: <20200618152245.6483-1-Garrett.Kirkendall@amd.com> In-Reply-To: <20200618152245.6483-1-Garrett.Kirkendall@amd.com> Accept-Language: en-US X-MS-Has-Attach: X-MS-TNEF-Correlator: authentication-results: amd.com; dkim=none (message not signed) header.d=none;amd.com; dmarc=none action=none header.from=intel.com; x-originating-ip: [192.55.46.36] x-ms-publictraffictype: Email x-ms-office365-filtering-correlation-id: fcba7670-5807-4b48-a934-08d813ec3626 x-ms-traffictypediagnostic: DM5PR11MB1817: x-ld-processed: 46c98d88-e344-4ed4-8496-4ed7712e255d,ExtAddr x-ms-exchange-transport-forked: True x-microsoft-antispam-prvs: x-ms-oob-tlc-oobclassifiers: OLM:10000; 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charset="us-ascii" Content-Transfer-Encoding: quoted-printable Hi Garrett, I create a pull request to verify your changes and it reports some errors f= or your changes.=20 https://github.com/tianocore/edk2/pull/710 please help to resolve these errors before sending your new version changes= , also you can create your PR to verify your new changes. Thanks, Eric > -----Original Message----- > From: Garrett Kirkendall > Sent: Thursday, June 18, 2020 11:23 PM > To: devel@edk2.groups.io > Cc: Dong, Eric ; Ni, Ray ; Laszlo > Ersek > Subject: [PATCH v2 0/2] AMD procesor MSR_IA32_MISC_ENABLE >=20 > AMD processor does not support MSR_IA32_MISC_ENABLE register. > Accessing this register on AMD causes an unhandled exception in > SmmEntry.nasm and a subsequent failure to boot since this is too early in > SMM path for the exception handler to be loaded. >=20 > First, to distinguish between AMD and other processors, refactor > StandardSignatureIsAuthenticAMD into BaseUefiCpuLib. So there is only on= e > copy in the source. All changed modules already include UefiCpuLib either > directly or indirectly so could not easly split first patch. >=20 > Second, Skip manipulation of MSR_IA32_MISC_ENABLE register if running on > an AMD processor. >=20 > Tested on AMD X64 hardware. > OvmfIa32 and OvmfIa32X64 on Intel hardware. >=20 > Garrett Kirkendall (2): > UefiCpuPkg: Move StandardSignatureIsAuthenticAMD to BaseUefiCpuLib > UefiCpuPkg: PiSmmCpuDxeSmm skip MSR_IA32_MISC_ENABLE > manipulation on > AMD >=20 > UefiCpuPkg/Library/BaseUefiCpuLib/BaseUefiCpuLib.inf | 7 ++++ > UefiCpuPkg/Library/BaseXApicLib/BaseXApicLib.inf | 2 ++ > UefiCpuPkg/Library/BaseXApicX2ApicLib/BaseXApicX2ApicLib.inf | 2 ++ > UefiCpuPkg/Include/Library/UefiCpuLib.h | 14 ++++++= ++ > UefiCpuPkg/PiSmmCpuDxeSmm/SmmProfileInternal.h | 3 ++ > UefiCpuPkg/Library/BaseUefiCpuLib/BaseUefiCpuLib.c | 38 > ++++++++++++++++++++ > UefiCpuPkg/Library/BaseXApicLib/BaseXApicLib.c | 25 ++----= ------- > UefiCpuPkg/Library/BaseXApicX2ApicLib/BaseXApicX2ApicLib.c | 25 ++----= -- > ----- > UefiCpuPkg/Library/MpInitLib/MpLib.c | 23 ------= ------ > UefiCpuPkg/PiSmmCpuDxeSmm/SmmProfile.c | 9 ++++- > UefiCpuPkg/PiSmmCpuDxeSmm/Ia32/SmiEntry.nasm | 19 > ++++++++-- > UefiCpuPkg/PiSmmCpuDxeSmm/X64/SmiEntry.nasm | 20 > +++++++++-- > 12 files changed, 113 insertions(+), 74 deletions(-) create mode 100644 > UefiCpuPkg/Library/BaseUefiCpuLib/BaseUefiCpuLib.c >=20 > Changes at: > https://github.com/gkirkendall- > amd/edk2/tree/smmentry_nasm_skip_msr_xd_bit_on_amd_v2 >=20 > Cc: Eric Dong > Cc: Ray Ni > Cc: Laszlo Ersek > Signed-off-by: Garrett Kirkendall >=20 > -- > 2.27.0