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Fri, 31 Jul 2020 18:05:04 +0000 From: "Agyeman, Prince" To: "Zhang, Shenglei" , "devel@edk2.groups.io" Subject: Re: [PATCH] SimicsOpenBoardPkg: Update usage of functions to be removed Thread-Topic: [PATCH] SimicsOpenBoardPkg: Update usage of functions to be removed Thread-Index: AQHWZVkoyfqs98lQaUGSpD8Yclko+qkh/zwA Date: Fri, 31 Jul 2020 18:05:04 +0000 Message-ID: References: <20200729033407.2120-1-shenglei.zhang@intel.com> In-Reply-To: <20200729033407.2120-1-shenglei.zhang@intel.com> Accept-Language: en-US X-MS-Has-Attach: X-MS-TNEF-Correlator: authentication-results: intel.com; dkim=none (message not signed) header.d=none;intel.com; dmarc=none action=none header.from=intel.com; x-originating-ip: [50.39.172.95] x-ms-publictraffictype: Email x-ms-office365-filtering-correlation-id: f4af266e-26ef-4791-a35f-08d8357c40a9 x-ms-traffictypediagnostic: DM6PR11MB4609: x-ms-exchange-transport-forked: True x-microsoft-antispam-prvs: x-ms-oob-tlc-oobclassifiers: OLM:9508; x-ms-exchange-senderadcheck: 1 x-microsoft-antispam: BCL:0; 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charset="us-ascii" Content-Transfer-Encoding: quoted-printable Reviewed-by: Prince Agyeman -----Original Message----- From: Zhang, Shenglei =20 Sent: Tuesday, July 28, 2020 8:34 PM To: devel@edk2.groups.io Cc: Agyeman, Prince Subject: [PATCH] SimicsOpenBoardPkg: Update usage of functions to be remove= d REF:https://bugzilla.tianocore.org/show_bug.cgi?id=3D2777 With some functions to be deprecated, their usage in platforms should also = be updated. Cc: Agyeman Prince Signed-off-by: Shenglei Zhang --- .../Library/BoardBdsHookLib/BoardBdsHookLib.c | 2 +- .../Intel/SimicsOpenBoardPkg/SimicsDxe/Platform.c | 4 ++-- .../Intel/SimicsOpenBoardPkg/SimicsPei/MemDetect.c | 6 +++--- .../Intel/SimicsOpenBoardPkg/SimicsPei/Platform.c | 12 ++++++------ 4 files changed, 12 insertions(+), 12 deletions(-) diff --git a/Platform/Intel/SimicsOpenBoardPkg/Library/BoardBdsHookLib/Boar= dBdsHookLib.c b/Platform/Intel/SimicsOpenBoardPkg/Library/BoardBdsHookLib/B= oardBdsHookLib.c index 1058dbf3..ba4d2b02 100644 --- a/Platform/Intel/SimicsOpenBoardPkg/Library/BoardBdsHookLib/BoardBdsHoo= kLib.c +++ b/Platform/Intel/SimicsOpenBoardPkg/Library/BoardBdsHookLib/BoardBds +++ HookLib.c @@ -1206,7 +1206,7 @@ VisitingFileSystemInstance ( NULL, &mEmuVariableEventReg ); - PcdSet64 (PcdEmuVariableEvent, (UINT64)(UINTN) mEmuVariableEvent); + PcdSet64S (PcdEmuVariableEvent, (UINT64)(UINTN) mEmuVariableEvent); =20 return EFI_SUCCESS; } diff --git a/Platform/Intel/SimicsOpenBoardPkg/SimicsDxe/Platform.c b/Platf= orm/Intel/SimicsOpenBoardPkg/SimicsDxe/Platform.c index b7fd4d1f..c856ff44 100644 --- a/Platform/Intel/SimicsOpenBoardPkg/SimicsDxe/Platform.c +++ b/Platform/Intel/SimicsOpenBoardPkg/SimicsDxe/Platform.c @@ -669,9 +669,9 @@ ExecutePlatformConfig ( // // Pass the preferred resolution to GraphicsConsoleDxe via dynamic PCD= s. // - PcdSet32 (PcdVideoHorizontalResolution, + PcdSet32S (PcdVideoHorizontalResolution, PlatformConfig.HorizontalResolution); - PcdSet32 (PcdVideoVerticalResolution, + PcdSet32S (PcdVideoVerticalResolution, PlatformConfig.VerticalResolution); } =20 diff --git a/Platform/Intel/SimicsOpenBoardPkg/SimicsPei/MemDetect.c b/Plat= form/Intel/SimicsOpenBoardPkg/SimicsPei/MemDetect.c index 60aa54be..127afffc 100644 --- a/Platform/Intel/SimicsOpenBoardPkg/SimicsPei/MemDetect.c +++ b/Platform/Intel/SimicsOpenBoardPkg/SimicsPei/MemDetect.c @@ -155,7 +155,7 @@ GetFirstNonAddress ( if (mBootMode !=3D BOOT_ON_S3_RESUME) { DEBUG ((EFI_D_INFO, "%a: disabling 64-bit PCI host aperture\n", __FUNCTION__)); - PcdSet64 (PcdPciMmio64Size, 0); + PcdSet64S (PcdPciMmio64Size, 0); } =20 // @@ -187,8 +187,8 @@ GetFirstNonAddress ( // the GCD memory space map through our PciHostBridgeLib instance; her= e we // only need to set the PCDs. // - PcdSet64 (PcdPciMmio64Base, Pci64Base); - PcdSet64 (PcdPciMmio64Size, Pci64Size); + PcdSet64S (PcdPciMmio64Base, Pci64Base); + PcdSet64S (PcdPciMmio64Size, Pci64Size); DEBUG ((EFI_D_INFO, "%a: Pci64Base=3D0x%Lx Pci64Size=3D0x%Lx\n", __FUNCTION__, Pci64Base, Pci64Size)); } diff --git a/Platform/Intel/SimicsOpenBoardPkg/SimicsPei/Platform.c b/Platf= orm/Intel/SimicsOpenBoardPkg/SimicsPei/Platform.c index 0bec76e4..6963f39a 100644 --- a/Platform/Intel/SimicsOpenBoardPkg/SimicsPei/Platform.c +++ b/Platform/Intel/SimicsOpenBoardPkg/SimicsPei/Platform.c @@ -257,8 +257,8 @@ MemMapInitialization ( // PciSize =3D 0xFC000000 - PciBase; AddIoMemoryBaseSizeHob (PciBase, PciSize); - PcdSet64 (PcdPciMmio32Base, PciBase); - PcdSet64 (PcdPciMmio32Size, PciSize); + PcdSet64S (PcdPciMmio32Base, PciBase); PcdSet64S (PcdPciMmio32Size,=20 + PciSize); AddIoMemoryBaseSizeHob (0xFEC00000, SIZE_4KB); AddIoMemoryBaseSizeHob (0xFED00000, SIZE_1KB); if (mHostBridgeDevId =3D=3D INTEL_ICH10_DEVICE_ID) { @@ -300,8 +300,8 @@= MemMapInitialization ( PciIoBase, PciIoSize ); - PcdSet64 (PcdPciIoBase, PciIoBase); - PcdSet64 (PcdPciIoSize, PciIoSize); + PcdSet64S (PcdPciIoBase, PciIoBase); + PcdSet64S (PcdPciIoSize, PciIoSize); =20 // // Add flash range. @@ -367,7 +367,7 @@ MiscInitialization ( ASSERT (FALSE); return; } - PcdSet16 (PcdSimicsX58HostBridgePciDevId, mHostBridgeDevId); + PcdSet16S (PcdSimicsX58HostBridgePciDevId, mHostBridgeDevId); =20 // // If the appropriate IOspace enable bit is set, assume the ACPI PMBA @@= -483,7 +483,7 @@ ReserveEmuVariableNvStore ( VariableStore, (2 * PcdGet32 (PcdFlashNvStorageFtwSpareSize)) / 1024 )); - PcdSet64 (PcdEmuVariableNvStoreReserved, VariableStore); + PcdSet64S (PcdEmuVariableNvStoreReserved, VariableStore); } =20 =20 -- 2.18.0.windows.1