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charset="us-ascii" Content-Transfer-Encoding: quoted-printable Hi Ray, I know this patch, and the thread 2 and 3 are added by my request for a rea= son on that time. I will re-sent the code patch. Thank you. Jack -----Original Message----- From: Ni, Ray =20 Sent: Wednesday, August 10, 2022 11:48 AM To: Lin, JackX ; Sinha, Ankit Cc: Chiu, Chasel ; Dong, Eric ;= Yao, Jiewen ; Chaganty, Rangasai V ; devel@edk2.groups.io; Kuo, Donald ; K= umar, Chandana C ; Palakshareddy, Lavanya C ; Palakshareddy, Lavanya C Subject: RE: [edk2-platforms: PATCH] Modify processor _UID ordering by CPU = default fused in MADT Jack, Your patch cannot be merged to trunk because Ankit just did some change in = the same C file, in below commit. * MinPlatformPkg/AcpiTables: Add additional thread mapping in MADT Ankit, It seems your patch is to add support for thread #2 and #3. Jack's patch is= to remove the additional sorting that put secondary threads after first th= reads. Do you see an issue that we remove the thread sorting logic? Thanks, Ray > -----Original Message----- > From: Lin, JackX > Sent: Monday, August 8, 2022 4:21 PM > To: devel@edk2.groups.io > Cc: Lin, JackX ; Lin, JackX=20 > ; Chiu, Chasel ; Dong,=20 > Eric ; Yao, Jiewen ; Ni,=20 > Ray ; Chaganty, Rangasai V=20 > ; Kuo, Donald ;=20 > Kumar, Chandana C ; Palakshareddy;=20 > Palakshareddy, Lavanya C > Subject: [edk2-platforms: PATCH] Modify processor _UID ordering by CPU=20 > default fused in MADT >=20 > BIOS should not reordering cpu processor_uid >=20 > Signed-off-by: JackX Lin > Cc: Chasel Chiu > Cc: Dong Eric > Cc: Jiewen Yao > Cc: Ray Ni > Cc: Rangasai V Chaganty > Cc: Donald Kuo > Cc: Chandana C Kumar > Cc: Palakshareddy, Lavanya C > Cc: JackX Lin > --- > Platform/Intel/MinPlatformPkg/Acpi/AcpiTables/AcpiPlatform.c | 174 > +++++++++++++++++++++++++++++++++++++++------------------------------- > ---------------------------------------------------------------------- > ------------------------ > ---------- > 1 file changed, 39 insertions(+), 135 deletions(-) >=20 > diff --git=20 > a/Platform/Intel/MinPlatformPkg/Acpi/AcpiTables/AcpiPlatform.c > b/Platform/Intel/MinPlatformPkg/Acpi/AcpiTables/AcpiPlatform.c > index c7e87cbd7d..176e422e81 100644 > --- a/Platform/Intel/MinPlatformPkg/Acpi/AcpiTables/AcpiPlatform.c > +++ b/Platform/Intel/MinPlatformPkg/Acpi/AcpiTables/AcpiPlatform.c > @@ -57,38 +57,9 @@ BOOLEAN mForceX2ApicId; > BOOLEAN mX2ApicEnabled; >=20 > EFI_MP_SERVICES_PROTOCOL *mMpService; > -BOOLEAN mCpuOrderSorted; > -EFI_CPU_ID_ORDER_MAP *mCpuApicIdOrderTable =3D NULL; > UINTN mNumberOfCpus =3D 0; > UINTN mNumberOfEnabledCPUs =3D 0; >=20 > - > -/** > - The function is called by PerformQuickSort to compare int values. > - > - @param[in] Left The pointer to first buffer. > - @param[in] Right The pointer to second buffer. > - > - @return -1 Buffer1 is less than Buffer2. > - @return 1 Buffer1 is greater than Buffer2. > - > -**/ > -INTN > -EFIAPI > -ApicIdCompareFunction ( > - IN CONST VOID *Left, > - IN CONST VOID *Right > - ) > -{ > - UINT32 LeftApicId; > - UINT32 RightApicId; > - > - LeftApicId =3D ((EFI_CPU_ID_ORDER_MAP *) Left)->ApicId; > - RightApicId =3D ((EFI_CPU_ID_ORDER_MAP *) Right)->ApicId; > - > - return (LeftApicId > RightApicId)? 1 : (-1); -} > - > /** > Print Cpu Apic ID Table >=20 > @@ -116,7 +87,8 @@ DebugDisplayReOrderTable ( EFI_STATUS =20 > AppendCpuMapTableEntry ( > IN VOID *ApicPtr, > - IN UINT32 LocalApicCounter > + IN UINT32 LocalApicCounter, > + IN EFI_CPU_ID_ORDER_MAP *CpuApicIdOrderTable > ) > { > EFI_STATUS Status; > @@ -131,9 +103,9 @@ AppendCpuMapTableEntry ( >=20 > if(Type =3D=3D EFI_ACPI_6_3_PROCESSOR_LOCAL_APIC) { > if(!mX2ApicEnabled) { > - LocalApicPtr->Flags =3D > (UINT8)mCpuApicIdOrderTable[LocalApicCounter].Flags; > - LocalApicPtr->ApicId =3D > (UINT8)mCpuApicIdOrderTable[LocalApicCounter].ApicId; > - LocalApicPtr->AcpiProcessorUid =3D > (UINT8)mCpuApicIdOrderTable[LocalApicCounter].AcpiProcessorUid; > + LocalApicPtr->Flags =3D > (UINT8)CpuApicIdOrderTable[LocalApicCounter].Flags; > + LocalApicPtr->ApicId =3D > (UINT8)CpuApicIdOrderTable[LocalApicCounter].ApicId; > + LocalApicPtr->AcpiProcessorUid =3D > (UINT8)CpuApicIdOrderTable[LocalApicCounter].AcpiProcessorUid; > } else { > LocalApicPtr->Flags =3D 0; > LocalApicPtr->ApicId =3D 0xFF; > @@ -142,9 +114,9 @@ AppendCpuMapTableEntry ( > } > } else if(Type =3D=3D EFI_ACPI_6_3_PROCESSOR_LOCAL_X2APIC) { > if(mX2ApicEnabled) { > - LocalX2ApicPtr->Flags =3D > (UINT8)mCpuApicIdOrderTable[LocalApicCounter].Flags; > - LocalX2ApicPtr->X2ApicId =3D > mCpuApicIdOrderTable[LocalApicCounter].ApicId; > - LocalX2ApicPtr->AcpiProcessorUid =3D > mCpuApicIdOrderTable[LocalApicCounter].AcpiProcessorUid; > + LocalX2ApicPtr->Flags =3D > (UINT8)CpuApicIdOrderTable[LocalApicCounter].Flags; > + LocalX2ApicPtr->X2ApicId =3D > CpuApicIdOrderTable[LocalApicCounter].ApicId; > + LocalX2ApicPtr->AcpiProcessorUid =3D > CpuApicIdOrderTable[LocalApicCounter].AcpiProcessorUid; > } else { > LocalX2ApicPtr->Flags =3D 0; > LocalX2ApicPtr->X2ApicId =3D (UINT32)-1; > @@ -159,32 +131,25 @@ AppendCpuMapTableEntry ( >=20 > } >=20 > +/** > + Collect all processors information and create a Cpu Apic Id table. > + > + @param[in] CpuApicIdOrderTable Buffer to store information of C= pu. > +**/ > EFI_STATUS > -SortCpuLocalApicInTable ( > - VOID > +CreateCpuLocalApicInTable ( > + IN EFI_CPU_ID_ORDER_MAP *CpuApicIdOrderTable > ) > { > EFI_STATUS Status; > EFI_PROCESSOR_INFORMATION ProcessorInfoBuffer; > UINT32 Index; > UINT32 CurrProcessor; > - UINT32 BspApicId; > - EFI_CPU_ID_ORDER_MAP TempVal; > EFI_CPU_ID_ORDER_MAP *CpuIdMapPtr; > - UINT32 CoreThreadMask; > - EFI_CPU_ID_ORDER_MAP *TempCpuApicIdOrderTable; > UINT32 Socket; >=20 > - Index =3D 0; > Status =3D EFI_SUCCESS; >=20 > - if (mCpuOrderSorted) { > - return Status; > - } > - > - TempCpuApicIdOrderTable =3D AllocateZeroPool (mNumberOfCpus * sizeof=20 > (EFI_CPU_ID_ORDER_MAP)); > - CoreThreadMask =3D (UINT32) ((1 << mNumOfBitShift) - 1); > - > for (CurrProcessor =3D 0, Index =3D 0; CurrProcessor < mNumberOfCpus; > CurrProcessor++, Index++) { > Status =3D mMpService->GetProcessorInfo ( > mMpService, @@ -192,7 +157,7 @@=20 > SortCpuLocalApicInTable ( > &ProcessorInfoBuffer > ); >=20 > - CpuIdMapPtr =3D (EFI_CPU_ID_ORDER_MAP *) > &TempCpuApicIdOrderTable[Index]; > + CpuIdMapPtr =3D (EFI_CPU_ID_ORDER_MAP *) > &CpuApicIdOrderTable[Index]; > if ((ProcessorInfoBuffer.StatusFlag & PROCESSOR_ENABLED_BIT) !=3D 0)= { > CpuIdMapPtr->ApicId =3D (UINT32)ProcessorInfoBuffer.ProcessorId; > CpuIdMapPtr->Thread =3D ProcessorInfoBuffer.Location.Thread; > @@ -214,89 +179,26 @@ SortCpuLocalApicInTable ( > } //end if PROC ENABLE > } //end for CurrentProcessor >=20 > - //keep for debug purpose > - DEBUG ((DEBUG_INFO, "::ACPI:: APIC ID Order Table Init. > CoreThreadMask =3D %x, mNumOfBitShift =3D %x\n", CoreThreadMask,=20 > mNumOfBitShift)); > - DebugDisplayReOrderTable (TempCpuApicIdOrderTable); > - > // > // Get Bsp Apic Id > // > - BspApicId =3D GetApicId (); > - DEBUG ((DEBUG_INFO, "BspApicId - 0x%x\n", BspApicId)); > - > - // > - //check to see if 1st entry is BSP, if not swap it > - // > - if (TempCpuApicIdOrderTable[0].ApicId !=3D BspApicId) { > - for (Index =3D 0; Index < mNumberOfCpus; Index++) { > - if ((TempCpuApicIdOrderTable[Index].Flags =3D=3D 1) && > (TempCpuApicIdOrderTable[Index].ApicId =3D=3D BspApicId)) { > - CopyMem (&TempVal, &TempCpuApicIdOrderTable[Index], sizeof > (EFI_CPU_ID_ORDER_MAP)); > - CopyMem (&TempCpuApicIdOrderTable[Index], > &TempCpuApicIdOrderTable[0], sizeof (EFI_CPU_ID_ORDER_MAP)); > - CopyMem (&TempCpuApicIdOrderTable[0], &TempVal, sizeof > (EFI_CPU_ID_ORDER_MAP)); > - break; > - } > - } > - > - if (mNumberOfCpus <=3D Index) { > - DEBUG ((DEBUG_ERROR, "Asserting the SortCpuLocalApicInTable Index > Bufferflow\n")); > - return EFI_INVALID_PARAMETER; > - } > - } > - > - // > - // 1. Sort TempCpuApicIdOrderTable, > - // sort it by using ApicId from minimum to maximum (Socket0 to Sock= etN), > and the BSP must in the fist location of the table. > - // So, start sorting the table from the second element and total el= ements > are mNumberOfCpus-1. > - // > - PerformQuickSort ((TempCpuApicIdOrderTable + 1), (mNumberOfCpus -=20 > 1), sizeof (EFI_CPU_ID_ORDER_MAP), (SORT_COMPARE)=20 > ApicIdCompareFunction); > - > - // > - // 2. Sort and map the primary threads to the front of the=20 > CpuApicIdOrderTable > - // > - for (CurrProcessor =3D 0, Index =3D 0; Index < mNumberOfCpus; Index++)= { > - if ((TempCpuApicIdOrderTable[Index].Thread) =3D=3D 0) { // primary t= hread > - CopyMem (&mCpuApicIdOrderTable[CurrProcessor], > &TempCpuApicIdOrderTable[Index], sizeof (EFI_CPU_ID_ORDER_MAP)); > - CurrProcessor++; > - } > - } > + DEBUG ((DEBUG_INFO, "BspApicId - 0x%x\n", GetApicId ())); >=20 > - // > - // 3. Sort and map the second threads to the middle of the=20 > CpuApicIdOrderTable > - // > - for (Index =3D 0; Index < mNumberOfCpus; Index++) { > - if ((TempCpuApicIdOrderTable[Index].Thread) =3D=3D 1) { //second thr= ead > - CopyMem (&mCpuApicIdOrderTable[CurrProcessor], > &TempCpuApicIdOrderTable[Index], sizeof (EFI_CPU_ID_ORDER_MAP)); > - CurrProcessor++; > - } > - } >=20 > // > - // 4. Sort and map the not enabled threads to the bottom of the=20 > CpuApicIdOrderTable > - // > - for (Index =3D 0; Index < mNumberOfCpus; Index++) { > - if (TempCpuApicIdOrderTable[Index].Flags =3D=3D 0) { // not enabled > - CopyMem (&mCpuApicIdOrderTable[CurrProcessor], > &TempCpuApicIdOrderTable[Index], sizeof (EFI_CPU_ID_ORDER_MAP)); > - CurrProcessor++; > - } > - } > - > - // > - // 5. Re-assign AcpiProcessorId for AcpiProcessorUid uses purpose. > + // Fill in AcpiProcessorUid. > // > for (Socket =3D 0; Socket < FixedPcdGet32 (PcdMaxCpuSocketCount); > Socket++) { > for (CurrProcessor =3D 0, Index =3D 0; CurrProcessor < mNumberOfCpus= ; > CurrProcessor++) { > - if (mCpuApicIdOrderTable[CurrProcessor].Flags && > (mCpuApicIdOrderTable[CurrProcessor].SocketNum =3D=3D Socket)) { > - mCpuApicIdOrderTable[CurrProcessor].AcpiProcessorUid =3D > (mCpuApicIdOrderTable[CurrProcessor].SocketNum << mNumOfBitShift) +=20 > Index; > + if (CpuApicIdOrderTable[CurrProcessor].Flags && > (CpuApicIdOrderTable[CurrProcessor].SocketNum =3D=3D Socket)) { > + CpuApicIdOrderTable[CurrProcessor].AcpiProcessorUid =3D > (CpuApicIdOrderTable[CurrProcessor].SocketNum << mNumOfBitShift) +=20 > Index; > Index++; > } > } > } >=20 > - //keep for debug purpose > - DEBUG ((DEBUG_INFO, "APIC ID Order Table ReOrdered\n")); > - DebugDisplayReOrderTable (mCpuApicIdOrderTable); > - > - mCpuOrderSorted =3D TRUE; > + DEBUG ((DEBUG_INFO, "::ACPI:: APIC ID Order Table Init. > mNumOfBitShift =3D %x\n", mNumOfBitShift)); > + DebugDisplayReOrderTable (CpuApicIdOrderTable); >=20 > return Status; > } > @@ -750,6 +652,7 @@ InstallMadtFromScratch ( > EFI_ACPI_6_3_LOCAL_APIC_NMI_STRUCTURE LocalApciNmiStruct= ; > EFI_ACPI_6_3_PROCESSOR_LOCAL_X2APIC_STRUCTURE > ProcLocalX2ApicStruct; > EFI_ACPI_6_3_LOCAL_X2APIC_NMI_STRUCTURE > LocalX2ApicNmiStruct; > + EFI_CPU_ID_ORDER_MAP *CpuApicIdOrderTab= le; > STRUCTURE_HEADER **MadtStructs; > UINTN MaxMadtStructCount= ; > UINTN MadtStructsIndex; > @@ -760,18 +663,19 @@ InstallMadtFromScratch ( >=20 > MadtStructs =3D NULL; > NewMadtTable =3D NULL; > + CpuApicIdOrderTable =3D NULL; > MaxMadtStructCount =3D 0; >=20 > - mCpuApicIdOrderTable =3D AllocateZeroPool (mNumberOfCpus * sizeof=20 > (EFI_CPU_ID_ORDER_MAP)); > - if (mCpuApicIdOrderTable =3D=3D NULL) { > - DEBUG ((DEBUG_ERROR, "Could not allocate mCpuApicIdOrderTable > structure pointer array\n")); > + CpuApicIdOrderTable =3D AllocateZeroPool (mNumberOfCpus * sizeof > (EFI_CPU_ID_ORDER_MAP)); > + if (CpuApicIdOrderTable =3D=3D NULL) { > + DEBUG ((DEBUG_ERROR, "Could not allocate CpuApicIdOrderTable > structure pointer array\n")); > return EFI_OUT_OF_RESOURCES; > } >=20 > // Call for Local APIC ID Reorder > - Status =3D SortCpuLocalApicInTable (); > + Status =3D CreateCpuLocalApicInTable (CpuApicIdOrderTable); > if (EFI_ERROR (Status)) { > - DEBUG ((DEBUG_ERROR, "SortCpuLocalApicInTable failed: %r\n", Status)= ); > + DEBUG ((DEBUG_ERROR, "CreateCpuLocalApicInTable failed: %r\n", > Status)); > goto Done; > } >=20 > @@ -824,10 +728,10 @@ InstallMadtFromScratch ( > // APIC ID as a UINT8, use a processor local APIC structure. Otherwi= se, > // use a processor local x2APIC structure. > // > - if (!mX2ApicEnabled && mCpuApicIdOrderTable[Index].ApicId < > MAX_UINT8) { > - ProcLocalApicStruct.Flags =3D (UINT8) > mCpuApicIdOrderTable[Index].Flags; > - ProcLocalApicStruct.ApicId =3D (UINT8) > mCpuApicIdOrderTable[Index].ApicId; > - ProcLocalApicStruct.AcpiProcessorUid =3D (UINT8) > mCpuApicIdOrderTable[Index].AcpiProcessorUid; > + if (!mX2ApicEnabled && CpuApicIdOrderTable[Index].ApicId < > MAX_UINT8) { > + ProcLocalApicStruct.Flags =3D (UINT8) > CpuApicIdOrderTable[Index].Flags; > + ProcLocalApicStruct.ApicId =3D (UINT8) > CpuApicIdOrderTable[Index].ApicId; > + ProcLocalApicStruct.AcpiProcessorUid =3D (UINT8) > CpuApicIdOrderTable[Index].AcpiProcessorUid; >=20 > ASSERT (MadtStructsIndex < MaxMadtStructCount); > Status =3D CopyStructure ( > @@ -835,10 +739,10 @@ InstallMadtFromScratch ( > (STRUCTURE_HEADER *) &ProcLocalApicStruct, > &MadtStructs[MadtStructsIndex++] > ); > - } else if (mCpuApicIdOrderTable[Index].ApicId !=3D 0xFFFFFFFF) { > - ProcLocalX2ApicStruct.Flags =3D (UINT8) > mCpuApicIdOrderTable[Index].Flags; > - ProcLocalX2ApicStruct.X2ApicId =3D > mCpuApicIdOrderTable[Index].ApicId; > - ProcLocalX2ApicStruct.AcpiProcessorUid =3D > mCpuApicIdOrderTable[Index].AcpiProcessorUid; > + } else if (CpuApicIdOrderTable[Index].ApicId !=3D 0xFFFFFFFF) { > + ProcLocalX2ApicStruct.Flags =3D (UINT8) > CpuApicIdOrderTable[Index].Flags; > + ProcLocalX2ApicStruct.X2ApicId =3D > CpuApicIdOrderTable[Index].ApicId; > + ProcLocalX2ApicStruct.AcpiProcessorUid =3D > CpuApicIdOrderTable[Index].AcpiProcessorUid; >=20 > ASSERT (MadtStructsIndex < MaxMadtStructCount); > Status =3D CopyStructure ( > @@ -1033,8 +937,8 @@ Done: > FreePool (NewMadtTable); > } >=20 > - if (mCpuApicIdOrderTable !=3D NULL) { > - FreePool (mCpuApicIdOrderTable); > + if (CpuApicIdOrderTable !=3D NULL) { > + FreePool (CpuApicIdOrderTable); > } >=20 > return Status; > -- > 2.32.0.windows.2