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From: "Kubacki, Michael A" <michael.a.kubacki@intel.com>
To: "Desimone, Nathaniel L" <nathaniel.l.desimone@intel.com>,
	"devel@edk2.groups.io" <devel@edk2.groups.io>
Cc: "Chiu, Chasel" <chasel.chiu@intel.com>,
	"Chaganty, Rangasai V" <rangasai.v.chaganty@intel.com>
Subject: Re: [edk2-platforms] [PATCH V1] KabylakeSiliconPkg: Logic Error in EISS bit ASSERT
Date: Thu, 3 Oct 2019 01:23:04 +0000	[thread overview]
Message-ID: <DM6PR11MB3834FB4539F736A0A62EDBE3B59F0@DM6PR11MB3834.namprd11.prod.outlook.com> (raw)
In-Reply-To: <20191002073621.3355-1-nathaniel.l.desimone@intel.com>

Please change MmioRead8 () to PciSegmentRead8 () since the address is derived from PCI_SEGMENT_LIB_ADDRESS ().

> -----Original Message-----
> From: Desimone, Nathaniel L <nathaniel.l.desimone@intel.com>
> Sent: Wednesday, October 2, 2019 12:36 AM
> To: devel@edk2.groups.io
> Cc: Chiu, Chasel <chasel.chiu@intel.com>; Kubacki, Michael A
> <michael.a.kubacki@intel.com>; Chaganty, Rangasai V
> <rangasai.v.chaganty@intel.com>
> Subject: [edk2-platforms] [PATCH V1] KabylakeSiliconPkg: Logic Error in EISS
> bit ASSERT
> 
> Current ASSERT logic checks that the EISS bit is still set after we clear it. This is
> incorrect, it should be checking that that the EISS bit is clear after we clear it.
> 
> Cc: Chasel Chiu <chasel.chiu@intel.com>
> Cc: Michael Kubacki <michael.a.kubacki@intel.com>
> Cc: Sai Chaganty <rangasai.v.chaganty@intel.com>
> Signed-off-by: Nate DeSimone <nathaniel.l.desimone@intel.com>
> ---
>  .../Intel/KabylakeSiliconPkg/Pch/Library/PeiSpiLib/PeiSpiLib.c  | 2 +-
>  1 file changed, 1 insertion(+), 1 deletion(-)
> 
> diff --git a/Silicon/Intel/KabylakeSiliconPkg/Pch/Library/PeiSpiLib/PeiSpiLib.c
> b/Silicon/Intel/KabylakeSiliconPkg/Pch/Library/PeiSpiLib/PeiSpiLib.c
> index aadc367a9f..5fb667dc4a 100644
> --- a/Silicon/Intel/KabylakeSiliconPkg/Pch/Library/PeiSpiLib/PeiSpiLib.c
> +++ b/Silicon/Intel/KabylakeSiliconPkg/Pch/Library/PeiSpiLib/PeiSpiLib.c
> @@ -184,7 +184,7 @@ DisableBiosWriteProtect (
>      B_PCH_SPI_BC_WPD     ); -  ASSERT ((PciSegmentRead8 (SpiBaseAddress +
> R_PCH_SPI_BC) & B_PCH_SPI_BC_EISS) != 0);+  ASSERT ((MmioRead8
> (SpiBaseAddress + R_PCH_SPI_BC) & B_PCH_SPI_BC_EISS) == 0);    return
> EFI_SUCCESS; }--
> 2.23.0.windows.1


      parent reply	other threads:[~2019-10-03  1:23 UTC|newest]

Thread overview: 3+ messages / expand[flat|nested]  mbox.gz  Atom feed  top
2019-10-02  7:36 [edk2-platforms] [PATCH V1] KabylakeSiliconPkg: Logic Error in EISS bit ASSERT Nate DeSimone
2019-10-02 18:41 ` Chaganty, Rangasai V
2019-10-03  1:23 ` Kubacki, Michael A [this message]

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