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charset="us-ascii" Content-Transfer-Encoding: quoted-printable Reviewed-by: Hao A Wu Best Regards, Hao Wu > -----Original Message----- > From: Sean Rhodes > Sent: Friday, December 16, 2022 4:58 PM > To: devel@edk2.groups.io > Cc: Matt DeVillier ; Wu, Hao A > ; Ni, Ray ; Rhodes, Sean > > Subject: [PATCH 2/3] MdeModulePkg/XhciDxe/Xhci: Don't check for invalid > PSIV >=20 > From: Matt DeVillier >=20 > PSID matching relies on comparing the PSIV against the PortSpeed > value. This patch stops edk2 from checking for a PSIV of 0, as it > is not valid; this reduces the number of register access by > approximately 6 per second. >=20 > Cc: Hao A Wu > Cc: Ray Ni > Reviewed-by: Sean Rhodes > Signed-off-by: Matt DeVillier > Change-Id: If15c55ab66d2e7faa832ce8576d2e5b47157cc9a > --- > MdeModulePkg/Bus/Pci/XhciDxe/Xhci.c | 44 ++++++++++++++++------------- > 1 file changed, 25 insertions(+), 19 deletions(-) >=20 > diff --git a/MdeModulePkg/Bus/Pci/XhciDxe/Xhci.c > b/MdeModulePkg/Bus/Pci/XhciDxe/Xhci.c > index 15fb49f28f..8dd7a8fbb7 100644 > --- a/MdeModulePkg/Bus/Pci/XhciDxe/Xhci.c > +++ b/MdeModulePkg/Bus/Pci/XhciDxe/Xhci.c > @@ -371,6 +371,7 @@ XhcGetRootHubPortStatus ( > UINT32 TotalPort; >=20 > UINTN Index; >=20 > UINTN MapSize; >=20 > + UINT8 PortSpeed; >=20 > EFI_STATUS Status; >=20 > USB_DEV_ROUTE ParentRouteChart; >=20 > EFI_TPL OldTpl; >=20 > @@ -397,32 +398,37 @@ XhcGetRootHubPortStatus ( >=20 >=20 > State =3D XhcReadOpReg (Xhc, Offset); >=20 >=20 >=20 > + PortSpeed =3D (State & XHC_PORTSC_PS) >> 10; >=20 > + >=20 > // >=20 > // According to XHCI 1.1 spec November 2017, >=20 > // Section 7.2 xHCI Support Protocol Capability >=20 > // >=20 > - PortStatus->PortStatus =3D XhcCheckUsbPortSpeedUsedPsic (Xhc, ((State = & > XHC_PORTSC_PS) >> 10)); >=20 > - if (PortStatus->PortStatus =3D=3D 0) { >=20 > - // >=20 > - // According to XHCI 1.1 spec November 2017, >=20 > - // bit 10~13 of the root port status register identifies the speed o= f the > attached device. >=20 > - // >=20 > - switch ((State & XHC_PORTSC_PS) >> 10) { >=20 > - case 2: >=20 > - PortStatus->PortStatus |=3D USB_PORT_STAT_LOW_SPEED; >=20 > - break; >=20 > + if (PortSpeed > 0) { >=20 > + PortStatus->PortStatus =3D XhcCheckUsbPortSpeedUsedPsic (Xhc, > PortSpeed); >=20 > + // If no match found in ext cap reg, fall back to PORTSC >=20 > + if (PortStatus->PortStatus =3D=3D 0) { >=20 > + // >=20 > + // According to XHCI 1.1 spec November 2017, >=20 > + // bit 10~13 of the root port status register identifies the speed= of the > attached device. >=20 > + // >=20 > + switch (PortSpeed) { >=20 > + case 2: >=20 > + PortStatus->PortStatus |=3D USB_PORT_STAT_LOW_SPEED; >=20 > + break; >=20 >=20 >=20 > - case 3: >=20 > - PortStatus->PortStatus |=3D USB_PORT_STAT_HIGH_SPEED; >=20 > - break; >=20 > + case 3: >=20 > + PortStatus->PortStatus |=3D USB_PORT_STAT_HIGH_SPEED; >=20 > + break; >=20 >=20 >=20 > - case 4: >=20 > - case 5: >=20 > - PortStatus->PortStatus |=3D USB_PORT_STAT_SUPER_SPEED; >=20 > - break; >=20 > + case 4: >=20 > + case 5: >=20 > + PortStatus->PortStatus |=3D USB_PORT_STAT_SUPER_SPEED; >=20 > + break; >=20 >=20 >=20 > - default: >=20 > - break; >=20 > + default: >=20 > + break; >=20 > + } >=20 > } >=20 > } >=20 >=20 >=20 > -- > 2.37.2