From: "Wu, Hao A" <hao.a.wu@intel.com>
To: "devel@edk2.groups.io" <devel@edk2.groups.io>,
"zhoucheng@phytium.com.cn" <zhoucheng@phytium.com.cn>
Subject: Re: [edk2-devel] [PATCH v1 1/1] MdeModulePkg:Add Warm Reset for Xhc
Date: Thu, 17 Nov 2022 01:48:20 +0000 [thread overview]
Message-ID: <DM6PR11MB40255075E08C4EE7EEE5C767CA069@DM6PR11MB4025.namprd11.prod.outlook.com> (raw)
In-Reply-To: <32014.1668598601004178780@groups.io>
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Thanks for the information.
For checking “port supports USB3 protocol”, my take is that having the XHC register interface does not mean it is USB3.
It is possible for xHC implementation to have ports that only support USB2 protocol.
I am referring to the “Port Routing and Control” and “xHCI Supported Protocol Capability” sections within the xHCI specification:
[cid:image003.png@01D8FA68.E99F1790]
Also, could you help to check if below code (issue the Warm Reset only instead of Hot Reset + Warm Reset when the port is in inactive state) can address your issue?
case EfiUsbPortReset:
DEBUG ((DEBUG_INFO, "XhcUsbPortReset!\n"));
//
// Make sure Host Controller not halt before reset it
//
if (XhcIsHalt (Xhc)) {
Status = XhcRunHC (Xhc, XHC_GENERIC_TIMEOUT);
if (EFI_ERROR (Status)) {
DEBUG ((DEBUG_INFO, "XhcSetRootHubPortFeature :failed to start HC - %r\n", Status));
break;
}
}
if ((((State & 0x1e0) >> 5) == 6) && ((State & 3) == 0)) {
//
// Usb 3.2 spec 7.5.2
// When the USB state machine is Inactive state, the device is abnormal.
// eSS.Inactive is a state where a link has failed Enhanced SuperSpeed operation.Software
// is required for warm reset intervention.This flag only applies to USB3 protocol ports.
//
State |= 0x80000000;
XhcWriteOpReg (Xhc, Offset, State);
XhcWaitOpRegBit (Xhc, Offset, XHC_PORTSC_PRC, TRUE, XHC_GENERIC_TIMEOUT);
DEBUG ((DEBUG_INFO, "Warm Reset Successful! \n"));
} else {
//
// 4.3.1 Resetting a Root Hub Port
// 1) Write the PORTSC register with the Port Reset (PR) bit set to '1'.
//
State |= XHC_PORTSC_RESET;
XhcWriteOpReg (Xhc, Offset, State);
XhcWaitOpRegBit (Xhc, Offset, XHC_PORTSC_PRC, TRUE, XHC_GENERIC_TIMEOUT);
}
break;
Best Regards,
Hao Wu
From: devel@edk2.groups.io <devel@edk2.groups.io> On Behalf Of zhoucheng
Sent: Wednesday, November 16, 2022 7:37 PM
To: Wu; Wu, Hao A <hao.a.wu@intel.com>; devel@edk2.groups.io
Subject: Re: [edk2-devel] [PATCH v1 1/1] MdeModulePkg:Add Warm Reset for Xhc
HI:
The printing test is added here. When the USB disk device is inserted, the repeated mass restart test will be carried out.There
will be a probability of disk loss. When the disk is dropped, the PORTSC register is read. The USB state machine is abnormal.
Its PLS field is 6. Check the protocol document, so warm reset it. The test is normal and no disk loss occurs again.
The left is normal, and the right is abnormal.
After XhcUsbPortReset.The normal PORTSC register status is 0x1203, EXCEPTION PORTSC register status is 0x2202c0.
The USB device has been disconnected.
[cid:image001.png@01D8FA68.339FC0C0]
After hot reset, the device can be connected normally.
In the source code, it is confirmed that Usb3.0 is used. Do you need to judge again?
[cid:image002.png@01D8FA68.339FC0C0]
Thanks!
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next prev parent reply other threads:[~2022-11-17 1:48 UTC|newest]
Thread overview: 8+ messages / expand[flat|nested] mbox.gz Atom feed top
2022-11-03 15:53 [PATCH v1 0/1] MdeModulePkg:Add Warm Reset for Xhc zhoucheng
2022-11-03 15:53 ` [PATCH v1 1/1] " zhoucheng
2022-11-03 18:28 ` [edk2-devel] " Pedro Falcato
2022-11-04 3:15 ` zhoucheng
2022-11-16 6:55 ` Wu, Hao A
2022-11-16 11:36 ` zhoucheng
2022-11-17 1:48 ` Wu, Hao A [this message]
2022-11-17 10:23 ` zhoucheng
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