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charset="us-ascii" Content-Transfer-Encoding: quoted-printable Please refer to the inline comments below: > -----Original Message----- > From: Chiu, Ian > Sent: Monday, April 25, 2022 9:45 PM > To: devel@edk2.groups.io > Cc: Chiu, Ian ; Huang, Jenny ; > Shih, More ; Wu, Hao A ; Ni, Ray > > Subject: [PATCH v2] MdeModulePkg/XhciDxe: Add access xHCI Extended > Capabilities Pointer >=20 > From: Ian Chiu >=20 > Add support process Port Speed field value of PORTSC according to Support= ed > Protocol Capability > (new design in xHCI spec 1.2 2019) Please help to remove the above line. My take is that 'Supported Protocol C= apability' contents already exist in the XHCI Spec 1.1 version. >=20 > REF:https://bugzilla.tianocore.org/show_bug.cgi?id=3D3914 >=20 > The value of Port Speed field in PORTSC bit[10:13] (xHCI spec 1.2 2019 se= ction > 5.4.8) > should be change to use this value to query thru Protocol Speed ID (PSI) > (xHCI spec 1.2 2019 section 7.2.1) in xHCI Supported Protocol Capability = and > return the value according the Protocol Speed ID (PSIV) Dword. Could you help to add a brief summary on the PSI check when mapping to diff= erent port speeds (how the checks are mapping to low speed, high speed and = super speed) in the log message? >=20 > Cc: Jenny Huang > Cc: More Shih > Cc: Hao A Wu > Cc: Ray Ni > Signed-off-by: Ian Chiu > --- > MdeModulePkg/Bus/Pci/XhciDxe/Xhci.c | 41 ++++-- > MdeModulePkg/Bus/Pci/XhciDxe/Xhci.h | 2 + > MdeModulePkg/Bus/Pci/XhciDxe/XhciReg.c | 147 ++++++++++++++++++++ > MdeModulePkg/Bus/Pci/XhciDxe/XhciReg.h | 87 ++++++++++++ > 4 files changed, 262 insertions(+), 15 deletions(-) >=20 > diff --git a/MdeModulePkg/Bus/Pci/XhciDxe/Xhci.c > b/MdeModulePkg/Bus/Pci/XhciDxe/Xhci.c > index b79499e225..f5b99210c9 100644 > --- a/MdeModulePkg/Bus/Pci/XhciDxe/Xhci.c > +++ b/MdeModulePkg/Bus/Pci/XhciDxe/Xhci.c > @@ -398,25 +398,32 @@ XhcGetRootHubPortStatus ( > State =3D XhcReadOpReg (Xhc, Offset); >=20 >=20 >=20 > // >=20 > - // According to XHCI 1.1 spec November 2017, >=20 > - // bit 10~13 of the root port status register identifies the speed of = the > attached device. >=20 > + // According to XHCI 1.2 spec November 2019, I think you can still use the reference information from the XHCI 1.1 spec. The Support Protocol Capability related content already exists in this vers= ion of spec. >=20 > + // Section 7.2 xHCI Support Protocol Capability >=20 > // >=20 > - switch ((State & XHC_PORTSC_PS) >> 10) { >=20 > - case 2: >=20 > - PortStatus->PortStatus |=3D USB_PORT_STAT_LOW_SPEED; >=20 > - break; >=20 > + PortStatus->PortStatus =3D XhcCheckUsbPortSpeedUsedPsic (Xhc, ((State = & > XHC_PORTSC_PS) >> 10)); >=20 > + if (PortStatus->PortStatus =3D=3D 0) { >=20 > + // >=20 > + // According to XHCI 1.1 spec November 2017, >=20 > + // bit 10~13 of the root port status register identifies the speed o= f the > attached device. >=20 > + // >=20 > + switch ((State & XHC_PORTSC_PS) >> 10) { >=20 > + case 2: >=20 > + PortStatus->PortStatus |=3D USB_PORT_STAT_LOW_SPEED; >=20 > + break; >=20 >=20 >=20 > - case 3: >=20 > - PortStatus->PortStatus |=3D USB_PORT_STAT_HIGH_SPEED; >=20 > - break; >=20 > + case 3: >=20 > + PortStatus->PortStatus |=3D USB_PORT_STAT_HIGH_SPEED; >=20 > + break; >=20 >=20 >=20 > - case 4: >=20 > - case 5: >=20 > - PortStatus->PortStatus |=3D USB_PORT_STAT_SUPER_SPEED; >=20 > - break; >=20 > + case 4: >=20 > + case 5: >=20 > + PortStatus->PortStatus |=3D USB_PORT_STAT_SUPER_SPEED; >=20 > + break; >=20 >=20 >=20 > - default: >=20 > - break; >=20 > + default: >=20 > + break; >=20 > + } >=20 > } >=20 >=20 >=20 > // >=20 > @@ -1820,6 +1827,8 @@ XhcCreateUsbHc ( > Xhc->ExtCapRegBase =3D ExtCapReg << 2; >=20 > Xhc->UsbLegSupOffset =3D XhcGetCapabilityAddr (Xhc, XHC_CAP_USB_LEGA= CY); >=20 > Xhc->DebugCapSupOffset =3D XhcGetCapabilityAddr (Xhc, > XHC_CAP_USB_DEBUG); >=20 > + Xhc->Usb2SupOffset =3D XhcGetUsbSupportedCapabilityAddr (Xhc, > USB_SUPPORT_PROTOCOL_USB2_MAJOR_VER); >=20 > + Xhc->UsbSsSupOffset =3D XhcGetUsbSupportedCapabilityAddr (Xhc, > USB_SUPPORT_PROTOCOL_USB3_MAJOR_VER); >=20 >=20 >=20 > DEBUG ((DEBUG_INFO, "XhcCreateUsb3Hc: Capability length 0x%x\n", Xhc- > >CapLength)); >=20 > DEBUG ((DEBUG_INFO, "XhcCreateUsb3Hc: HcSParams1 0x%x\n", Xhc- > >HcSParams1)); >=20 > @@ -1829,6 +1838,8 @@ XhcCreateUsbHc ( > DEBUG ((DEBUG_INFO, "XhcCreateUsb3Hc: RTSOff 0x%x\n", Xhc->RTSOff)); >=20 > DEBUG ((DEBUG_INFO, "XhcCreateUsb3Hc: UsbLegSupOffset 0x%x\n", Xhc- > >UsbLegSupOffset)); >=20 > DEBUG ((DEBUG_INFO, "XhcCreateUsb3Hc: DebugCapSupOffset 0x%x\n", Xhc- > >DebugCapSupOffset)); >=20 > + DEBUG ((DEBUG_INFO, "XhcCreateUsb3Hc: Usb2SupOffset 0x%x\n", Xhc- > >Usb2SupOffset)); >=20 > + DEBUG ((DEBUG_INFO, "XhcCreateUsb3Hc: UsbSsSupOffset 0x%x\n", Xhc- > >UsbSsSupOffset)); >=20 >=20 >=20 > // >=20 > // Create AsyncRequest Polling Timer >=20 > diff --git a/MdeModulePkg/Bus/Pci/XhciDxe/Xhci.h > b/MdeModulePkg/Bus/Pci/XhciDxe/Xhci.h > index 5054d796b1..7eed7bd15e 100644 > --- a/MdeModulePkg/Bus/Pci/XhciDxe/Xhci.h > +++ b/MdeModulePkg/Bus/Pci/XhciDxe/Xhci.h > @@ -227,6 +227,8 @@ struct _USB_XHCI_INSTANCE { > UINT32 ExtCapRegBase; >=20 > UINT32 UsbLegSupOffset; >=20 > UINT32 DebugCapSupOffset; >=20 > + UINT32 Usb2SupOffset; >=20 > + UINT32 UsbSsSupOffset; How about renaming to the above field to 'Usb3SupOffset'? >=20 > UINT64 *DCBAA; >=20 > VOID *DCBAAMap; >=20 > UINT32 MaxSlotsEn; >=20 > diff --git a/MdeModulePkg/Bus/Pci/XhciDxe/XhciReg.c > b/MdeModulePkg/Bus/Pci/XhciDxe/XhciReg.c > index 80be3311d4..5bff698edb 100644 > --- a/MdeModulePkg/Bus/Pci/XhciDxe/XhciReg.c > +++ b/MdeModulePkg/Bus/Pci/XhciDxe/XhciReg.c > @@ -564,7 +564,57 @@ XhcGetCapabilityAddr ( > if ((Data & 0xFF) =3D=3D CapId) { >=20 > return ExtCapOffset; >=20 > } >=20 > + // >=20 > + // If not, then traverse all of the ext capability registers till fi= nding out it. >=20 > + // >=20 > + NextExtCapReg =3D (UINT8)((Data >> 8) & 0xFF); >=20 > + ExtCapOffset +=3D (NextExtCapReg << 2); >=20 > + } while (NextExtCapReg !=3D 0); >=20 > + >=20 > + return 0xFFFFFFFF; >=20 > +} >=20 >=20 >=20 > +/** >=20 > + Calculate the offset of the xHCI Supported Protocol Capability. >=20 > + >=20 > + @param Xhc The XHCI Instance. >=20 > + @param MajorVersion The USB Major Version in xHCI Support Protocol > Capability Field >=20 > + >=20 > + @return The offset of xHCI Supported Protocol capability register. >=20 > + >=20 > +**/ >=20 > +UINT32 >=20 > +XhcGetUsbSupportedCapabilityAddr ( Could you help to rename the function to XhcGetSupportedProtocolCapabilityA= ddr()? >=20 > + IN USB_XHCI_INSTANCE *Xhc, >=20 > + IN UINT8 MajorVersion >=20 > + ) >=20 > +{ >=20 > + UINT32 ExtCapOffset; >=20 > + UINT8 NextExtCapReg; >=20 > + UINT32 Data; >=20 > + UINT32 NameString; >=20 > + XHC_SUPPORTED_PROTOCOL_DW0 UsbSupportDw0; >=20 > + >=20 > + if (Xhc =3D=3D NULL) { >=20 > + return 0; >=20 > + } >=20 > + >=20 > + ExtCapOffset =3D 0; >=20 > + >=20 > + do { >=20 > + // >=20 > + // Check if the extended capability register's capability id is USB = Legacy > Support. >=20 > + // >=20 > + Data =3D XhcReadExtCapReg (Xhc, ExtCapOffset); >=20 > + UsbSupportDw0.Dword =3D Data; >=20 > + if ((Data & 0xFF) =3D=3D XHC_CAP_USB_SUPPORTED) { >=20 > + if (UsbSupportDw0.Data.RevMajor =3D=3D MajorVersion) { >=20 > + NameString =3D XhcReadExtCapReg (Xhc, ExtCapOffset + > USB_SUPPORTED_NAME_STRING_OFFSET); >=20 > + if (NameString =3D=3D USB_SUPPORTED_PROTOCOL_NAME_STRING) { >=20 > + return ExtCapOffset; >=20 > + } >=20 > + } >=20 > + } >=20 > // >=20 > // If not, then traverse all of the ext capability registers till fi= nding out it. >=20 > // >=20 > @@ -575,6 +625,103 @@ XhcGetCapabilityAddr ( > return 0xFFFFFFFF; >=20 > } >=20 >=20 >=20 > +/** >=20 > + Find SpeedField value match with Port Speed ID value. >=20 > + >=20 > + @param Xhc The XHCI Instance. >=20 > + @param ExtCapOffset The USB Major Version in xHCI Support Protocol > Capability Field >=20 > + @param SpeedField The Port Speed filed in USB PortSc register >=20 > + >=20 > + @return The Protocol Speed ID xHCI Supported Protocol capability regis= ter. >=20 > + >=20 > +**/ >=20 > +UINT32 >=20 > +XhciPsivGetPsid ( >=20 > + IN USB_XHCI_INSTANCE *Xhc, >=20 > + IN UINT32 ExtCapOffset, >=20 > + IN UINT8 SpeedField >=20 > + ) >=20 > +{ >=20 > + XHC_SUPPORTED_PROTOCOL_DW2 PortId; >=20 > + XHC_SUPPORTED_PROTOCOL_FIELD Reg; >=20 > + UINT32 Count; >=20 > + >=20 > + if ((Xhc =3D=3D NULL) || (ExtCapOffset =3D=3D 0xFFFFFFFF)) { >=20 > + return 0; >=20 > + } >=20 > + >=20 > + // >=20 > + // According to XHCI 1.2 spec November 2019, >=20 > + // Section 7.2 xHCI Supported Protocol Capability >=20 > + // 1. Get the PSIC(Protocol Speed ID Count) Value. >=20 > + // 2. The PSID register boundary should be Base address + PSIC * 0x04 >=20 > + // >=20 > + PortId.Dword =3D XhcReadExtCapReg (Xhc, ExtCapOffset + > USB_SUPPORTED_PORT_ID_OFFSET); >=20 > + >=20 > + for (Count =3D 0; Count < PortId.Data.Psic; Count++) { >=20 > + Reg.Dword =3D XhcReadExtCapReg (Xhc, ExtCapOffset + > USB_SUPPORT_SPEED_ID_OFFSET + (Count << 2)); >=20 > + if (Reg.Data.Psiv =3D=3D SpeedField) { >=20 > + return Reg.Dword; >=20 > + } >=20 > + } >=20 > + return 0; >=20 > +} >=20 > + >=20 > +/** >=20 > + Find SpeedField value match with Port Speed ID value. >=20 > + >=20 > + @param Xhc The XHCI Instance. >=20 > + @param Speed The Port Speed filed in USB PortSc register >=20 > + >=20 > + @return The USB Port Speed. >=20 > + >=20 > +**/ >=20 > +UINT16 >=20 > +XhcCheckUsbPortSpeedUsedPsic ( >=20 > + IN USB_XHCI_INSTANCE *Xhc, >=20 > + IN UINT8 Speed >=20 > + ) >=20 > +{ >=20 > + XHC_SUPPORTED_PROTOCOL_FIELD SpField; >=20 > + UINT16 ReturnSpeed; >=20 > + >=20 > + if (Xhc =3D=3D NULL) { >=20 > + return 0; >=20 > + } >=20 > + >=20 > + SpField.Dword =3D 0; >=20 > + ReturnSpeed =3D 0; >=20 > + // >=20 > + // Check USB3 Protocol Speed ID if ReturnSpeed didn't get match speed. >=20 > + // >=20 > + if ((ReturnSpeed =3D=3D 0) && (Xhc->UsbSsSupOffset !=3D 0xFFFFFFFF)) { >=20 > + SpField.Dword =3D XhciPsivGetPsid (Xhc, Xhc->UsbSsSupOffset, Speed); >=20 > + if (SpField.Dword !=3D 0) { >=20 > + // Super Speed >=20 > + ReturnSpeed =3D USB_PORT_STAT_SUPER_SPEED; >=20 > + } >=20 > + } >=20 > + >=20 > + // >=20 > + // Check USB2 Protocol Speed ID if ReturnSpeed didn't get match speed. >=20 > + // >=20 > + if ((ReturnSpeed =3D=3D 0) && (Xhc->Usb2SupOffset !=3D 0xFFFFFFFF)) { >=20 > + SpField.Dword =3D XhciPsivGetPsid (Xhc, Xhc->Usb2SupOffset, Speed); >=20 > + if (SpField.Dword !=3D 0) { >=20 > + if (SpField.Data.Psie =3D=3D 2) { >=20 > + if (SpField.Data.Mantissa =3D=3D > USB_SUPPORT_PROTOCOL_USB2_HIGH_SPEED_PSIM) { >=20 > + // High Speed >=20 > + ReturnSpeed =3D USB_PORT_STAT_HIGH_SPEED; >=20 > + } >=20 > + } else if (SpField.Data.Psie =3D=3D 1) { >=20 > + // Low speed >=20 > + ReturnSpeed =3D USB_PORT_STAT_LOW_SPEED; I suggest to add a similar Psim field check (whether equals to 1500) as the= high speed check above. >=20 > + } >=20 > + } >=20 > + } >=20 > + return ReturnSpeed; >=20 > +} >=20 > + >=20 > /** >=20 > Whether the XHCI host controller is halted. >=20 >=20 >=20 > diff --git a/MdeModulePkg/Bus/Pci/XhciDxe/XhciReg.h > b/MdeModulePkg/Bus/Pci/XhciDxe/XhciReg.h > index 4950eed272..4f83b49027 100644 > --- a/MdeModulePkg/Bus/Pci/XhciDxe/XhciReg.h > +++ b/MdeModulePkg/Bus/Pci/XhciDxe/XhciReg.h > @@ -27,6 +27,7 @@ SPDX-License-Identifier: BSD-2-Clause-Patent >=20 >=20 > #define XHC_CAP_USB_LEGACY 0x01 >=20 > #define XHC_CAP_USB_DEBUG 0x0A >=20 > +#define XHC_CAP_USB_SUPPORTED 0x02 Could you help to rename the above macro to XHC_CAP_USB_SUPPORTED_PROTOCOL? >=20 >=20 >=20 > // =3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D= =3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D// >=20 > // XHCI register offset // >=20 > @@ -74,6 +75,17 @@ SPDX-License-Identifier: BSD-2-Clause-Patent > #define USBLEGSP_BIOS_SEMAPHORE BIT16 // HC BIOS Owned > Semaphore >=20 > #define USBLEGSP_OS_SEMAPHORE BIT24 // HC OS Owned Semaphor= e >=20 >=20 >=20 > +// >=20 > +// xHCI Supported Protocol Capability >=20 > +// >=20 > +#define USB_SUPPORTED_PROTOCOL_NAME_STRING 0x20425355 >=20 > +#define USB_SUPPORTED_NAME_STRING_OFFSET 0x04 >=20 > +#define USB_SUPPORTED_PORT_ID_OFFSET 0x08 >=20 > +#define USB_SUPPORT_SPEED_ID_OFFSET 0x10 >=20 > +#define USB_SUPPORT_PROTOCOL_USB2_MAJOR_VER 0x02 >=20 > +#define USB_SUPPORT_PROTOCOL_USB3_MAJOR_VER 0x03 >=20 > +#define USB_SUPPORT_PROTOCOL_USB2_HIGH_SPEED_PSIM 480 Could you please help to update the above macro definitions to: #define XHC_SUPPORTED_PROTOCOL_DW0_MAJOR_REVISION_USB2 0x02 #define XHC_SUPPORTED_PROTOCOL_DW0_MAJOR_REVISION_USB3 0x03 #define XHC_SUPPORTED_PROTOCOL_NAME_STRING_OFFSET 0x04 #define XHC_SUPPORTED_PROTOCOL_NAME_STRING_VALUE 0x20425355 #define XHC_SUPPORTED_PROTOCOL_DW2_OFFSET 0x08 #define XHC_SUPPORTED_PROTOCOL_PSI_OFFSET 0x10 #define XHC_SUPPORTED_PROTOCOL_USB2_HIGH_SPEED_PSIM 480 >=20 > + >=20 > #pragma pack (1) >=20 > typedef struct { >=20 > UINT8 MaxSlots; // Number of Device Slots >=20 > @@ -130,6 +142,52 @@ typedef union { > HCCPARAMS Data; >=20 > } XHC_HCCPARAMS; >=20 >=20 >=20 > +// >=20 > +// xHCI Supported Protocol Cabability >=20 > +// >=20 > +typedef struct { >=20 > + UINT8 CapId; >=20 > + UINT8 NextExtCapReg; >=20 > + UINT8 RevMinor; >=20 > + UINT8 RevMajor; >=20 > +} SUPP_PROTOCOL_DW0; Could you help to rename the above structure name to SUPPORTED_PROTOCOL_DW0= ? >=20 > + >=20 > +typedef union { >=20 > + UINT32 Dword; >=20 > + SUPP_PROTOCOL_DW0 Data; >=20 > +} XHC_SUPPORTED_PROTOCOL_DW0; >=20 > + >=20 > +typedef struct { >=20 > + UINT32 NameString; >=20 > +} XHC_SUPPORTED_PROTOCOL_DW1; >=20 > + >=20 > +typedef struct { >=20 > + UINT8 CompPortOffset : 8; >=20 > + UINT8 CompPortCount : 8; >=20 > + UINT16 ProtocolDef :12; >=20 > + UINT16 Psic : 4; >=20 > +} SUPP_PROTOCOL_DW2; Could you help to refine the above structure definition to: typedef struct { UINT8 CompPortOffset; UINT8 CompPortCount; UINT16 ProtocolDef :12; UINT16 Psic : 4; } SUPPORTED_PROTOCOL_DW2; >=20 > + >=20 > +typedef union { >=20 > + UINT32 Dword; >=20 > + SUPP_PROTOCOL_DW2 Data; >=20 > +} XHC_SUPPORTED_PROTOCOL_DW2; >=20 > + >=20 > +typedef struct { >=20 > + UINT16 Psiv : 4; >=20 > + UINT16 Psie : 2; >=20 > + UINT16 Plt : 2; >=20 > + UINT16 Pfd : 1; >=20 > + UINT16 RsvdP : 5; >=20 > + UINT16 Lp : 2; >=20 > + UINT16 Mantissa :16; >=20 > +} XHCI_PROTOCOL_FIELD; Could you help to refine the above structure definition to: typedef struct { UINT16 Psiv : 4; UINT16 Psie : 2; UINT16 Plt : 2; UINT16 Pfd : 1; UINT16 RsvdP : 5; UINT16 Lp : 2; UINT16 Psim; } SUPPORTED_PROTOCOL_PROTOCOL_SPEED_ID; >=20 > + >=20 > +typedef union { >=20 > + UINT32 Dword; >=20 > + XHCI_PROTOCOL_FIELD Data; >=20 > +} XHC_SUPPORTED_PROTOCOL_FIELD; Could you help to refine the above structure definition to: typedef union { UINT32 Dword; SUPPORTED_PROTOCOL_PROTOCOL_SPEED_ID Data; } XHC_SUPPORTED_PROTOCOL_PROTOCOL_SPEED_ID; Best Regards, Hao Wu >=20 > + >=20 > #pragma pack () >=20 >=20 >=20 > // >=20 > @@ -546,4 +604,33 @@ XhcGetCapabilityAddr ( > IN UINT8 CapId >=20 > ); >=20 >=20 >=20 > +/** >=20 > + Calculate the offset of the xHCI Supported Protocol Capability. >=20 > + >=20 > + @param Xhc The XHCI Instance. >=20 > + @param MajorVersion The USB Major Version in xHCI Support Protocol > Capability Field >=20 > + >=20 > + @return The offset of xHCI Supported Protocol capability register. >=20 > + >=20 > +**/ >=20 > +UINT32 >=20 > +XhcGetUsbSupportedCapabilityAddr ( >=20 > + IN USB_XHCI_INSTANCE *Xhc, >=20 > + IN UINT8 MajorVersion >=20 > + ); >=20 > + >=20 > +/** >=20 > + Find SpeedField value match with Port Speed ID value. >=20 > + >=20 > + @param Xhc The XHCI Instance. >=20 > + @param Speed The Port Speed filed in USB PortSc register >=20 > + >=20 > + @return The USB Port Speed. >=20 > + >=20 > +**/ >=20 > +UINT16 >=20 > +XhcCheckUsbPortSpeedUsedPsic ( >=20 > + IN USB_XHCI_INSTANCE *Xhc, >=20 > + IN UINT8 Speed >=20 > + ); >=20 > #endif >=20 > -- > 2.26.2.windows.1