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boundary="_000_DM6PR11MB4025996ABF1A29BADBF3629FCAB09DM6PR11MB4025namp_" --_000_DM6PR11MB4025996ABF1A29BADBF3629FCAB09DM6PR11MB4025namp_ Content-Type: text/plain; charset="us-ascii" Content-Transfer-Encoding: quoted-printable Hello Hamel, Lee M Could you help to resend the patch? I found that I cannot extract the patch= from your mail. Please help to check if you follow the instructions in ste= p 12 to generate the patch in the below link: https://github.com/tianocore/tianocore.github.io/wiki/EDK-II-Development-Pr= ocess#the-developer-process-for-the-edk-ii-project Thanks in advance. Also, I would like to get more information on the problematic XHC. Do all the XHCI operational registers & capability registers (i.e. register= s in MMIO space) return a value of all 1s after read or the issue just happ= ens to the Page Size register? If the issue occurs to all the MMIO registers, my guess is that the MMIO re= source allocation/configuration might not be done properly for the XHC. One more inline comment below marked as "[Hao]:" From: Hamel, Lee M Sent: Saturday, June 18, 2022 10:38 AM To: devel@edk2.groups.io Cc: Wu, Hao A ; Ni, Ray Subject: [PATCH] Edk2/MdeModulePkg/Bus/Pci/XhciDxe/Xhci.c:XhcCreateUsbHc: c= heck return value of XHC_PAGESIZE_OFFSET REF: https://bugzilla.tianocore.org/show_bug.cgi?id=3D3954 --- C:\Edk2\MdeModulePkg\Bus\Pci\XhciDxe\Xhci.c Tue Jun 14 21:29:21= 2022 UTC +++ C:\myEdk2\MdeModulePkg\Bus\Pci\XhciDxe\Xhci.c Tue Jun 14 21:26:57 2022 = UTC @@ -1,7 +1,7 @@ /** @file The XHCI controller driver. -Copyright (c) 2011 - 2018, Intel Corporation. All rights reserved.
+Copyright (c) 2011 - 2022, Intel Corporation. All rights reserved.
SPDX-License-Identifier: BSD-2-Clause-Patent **/ @@ -1813,7 +1813,12 @@ // This xHC supports a page size of 2^(n+12) if bit n is Set. For exampl= e, // if bit 0 is Set, the xHC supports 4k byte page sizes. // - PageSize =3D XhcReadOpReg (Xhc, XHC_PAGESIZE_OFFSET) & XHC_PAGESIZE= _MASK; + PageSize =3D XhcReadOpReg (Xhc, XHC_PAGESIZE_OFFSET); + if(PageSize =3D=3D 0xFFFFFFFF) { + DEBUG ((DEBUG_INFO, "XhcCreateUsb3Hc: error reading XHC_PAGESIZE_OFFSET\= n")); [Hao]: Please use DEBUG_ERROR for error handling. Best Regards, Hao Wu + goto ON_ERROR; + } + PageSize &=3D XHC_PAGESIZE_MASK; Xhc->PageSize =3D 1 << (HighBitSet32 (PageSize) + 12); ExtCapReg =3D (UINT16)(Xhc->HcCParams.Data.ExtCapReg); --_000_DM6PR11MB4025996ABF1A29BADBF3629FCAB09DM6PR11MB4025namp_ Content-Type: text/html; charset="us-ascii" Content-Transfer-Encoding: quoted-printable

Hello Hamel, Lee M

 

Could you help to resend the patch? I found that I c= annot extract the patch from your mail. Please help to check if you follow = the instructions in step 12 to generate the patch in the below link:

https://github.com/tianocore/tianocore.github.io/wiki/EDK-II-Dev= elopment-Process#the-developer-process-for-the-edk-ii-project

Thanks in advance.

 

Also, I would like to get more information on the pr= oblematic XHC.

Do all the XHCI operational registers & capabili= ty registers (i.e. registers in MMIO space) return a value of all 1s after = read or the issue just happens to the Page Size register?

If the issue occurs to all the MMIO registers, my gu= ess is that the MMIO resource allocation/configuration might not be done pr= operly for the XHC.

 

One more inline comment below marked as “[Hao]= :”

 

 

From: Hamel, Lee M <lee.m.hamel@intel.com&= gt;
Sent: Saturday, June 18, 2022 10:38 AM
To: devel@edk2.groups.io
Cc: Wu, Hao A <hao.a.wu@intel.com>; Ni, Ray <ray.ni@intel.c= om>
Subject: [PATCH] Edk2/MdeModulePkg/Bus/Pci/XhciDxe/Xhci.c:XhcCreateU= sbHc: check return value of XHC_PAGESIZE_OFFSET

 

REF: https://bugzilla.tianocore.org/show_bug.cgi?id=3D3954

 

--- C:\Edk2\MdeModulePkg\Bus\Pci\XhciDxe\Xhci.c = ;        Tue Jun 14 21:29:21 2022 UTC

+++ C:\myEdk2\MdeModulePkg\Bus\Pci\XhciDxe\Xhci.c Tu= e Jun 14 21:26:57 2022 UTC

@@ -1,7 +1,7 @@

/** @file

   The XHCI controller driver.<= /p>

 

-Copyright (c) 2011 - 2018, Intel Corporation. All r= ights reserved.<BR>

+Copyright (c) 2011 - 2022, Intel Corporation. All r= ights reserved.<BR>

SPDX-License-Identifier: BSD-2-Clause-Patent

 

 **/

@@ -1813,7 +1813,12 @@

   // This xHC supports a page size of 2^(= n+12) if bit n is Set. For example,

   // if bit 0 is Set, the xHC supports 4k= byte page sizes.

   //

-  PageSize      =3D X= hcReadOpReg (Xhc, XHC_PAGESIZE_OFFSET) & XHC_PAGESIZE_MASK;<= /p>

+  PageSize      =3D X= hcReadOpReg (Xhc, XHC_PAGESIZE_OFFSET);

+  if(PageSize =3D=3D 0xFFFFFFFF) {<= /p>

+  DEBUG ((DEBUG_INFO, "XhcCreateUsb3Hc: e= rror reading XHC_PAGESIZE_OFFSET\n"));

 

 

[Hao]: Please use DEBUG_ERROR for error handling.

 

Best Regards,

Hao Wu

 

 

+    goto ON_ERROR;

+  }

+  PageSize      &= =3D XHC_PAGESIZE_MASK;

   Xhc->PageSize =3D 1 << (HighBi= tSet32 (PageSize) + 12);

 

   ExtCapReg    &= nbsp;         =3D (UINT16)(Xhc->= HcCParams.Data.ExtCapReg);

 

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