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=?us-ascii?Q?=3D=3D?= MIME-Version: 1.0 X-MS-Exchange-CrossTenant-AuthAs: Internal X-MS-Exchange-CrossTenant-AuthSource: DM6PR11MB4025.namprd11.prod.outlook.com X-MS-Exchange-CrossTenant-Network-Message-Id: 1e59e4b1-aca8-4dbe-2ad9-08dbb99be827 X-MS-Exchange-CrossTenant-originalarrivaltime: 20 Sep 2023 05:39:06.8813 (UTC) X-MS-Exchange-CrossTenant-fromentityheader: Hosted X-MS-Exchange-CrossTenant-id: 46c98d88-e344-4ed4-8496-4ed7712e255d X-MS-Exchange-CrossTenant-mailboxtype: HOSTED X-MS-Exchange-CrossTenant-userprincipalname: RphQYmGSYRa34N0lAi3wEUiQxPbd2cRKm0p3OY3R49Hjmt5qmf5sUefcTasGHnzEA1gjk6TUpqxywkdTzLnKpQ== X-MS-Exchange-Transport-CrossTenantHeadersStamped: MN2PR11MB4645 X-OriginatorOrg: intel.com Precedence: Bulk List-Subscribe: List-Help: Sender: devel@edk2.groups.io List-Id: Mailing-List: list devel@edk2.groups.io; contact devel+owner@edk2.groups.io Reply-To: devel@edk2.groups.io,hao.a.wu@intel.com List-Unsubscribe-Post: List-Unsubscribe=One-Click List-Unsubscribe: X-Gm-Message-State: P7OfOfxiuIT7APpHIhNXeVwOx7686176AA= Content-Language: en-US Content-Type: text/plain; charset="us-ascii" Content-Transfer-Encoding: quoted-printable X-GND-Status: LEGIT Authentication-Results: spool.mail.gandi.net; dkim=pass header.d=groups.io header.s=20140610 header.b=uGCgmlxa; spf=pass (spool.mail.gandi.net: domain of bounce@groups.io designates 66.175.222.108 as permitted sender) smtp.mailfrom=bounce@groups.io; dmarc=fail reason="SPF not aligned (relaxed), DKIM not aligned (relaxed)" header.from=intel.com (policy=none); arc=reject ("signature check failed: fail, {[1] = sig:microsoft.com:reject}") Reviewed-by: Hao A Wu Best Regards, Hao Wu > -----Original Message----- > From: Ranbir Singh > Sent: Wednesday, August 16, 2023 1:38 PM > To: devel@edk2.groups.io; rsingh@ventanamicro.com > Cc: Wu, Hao A ; Ni, Ray ; Veeresh > Sangolli > Subject: [PATCH v2 1/2] MdeModulePkg/Bus/Pci/UhciDxe: Fix BAD_SHIFT > Coverity issue >=20 > From: Ranbir Singh >=20 > The function UhciConvertPollRate has a check >=20 > ASSERT (Interval !=3D 0); >=20 > but this comes into play only in DEBUG mode. In Release mode, there is > no handling if the Interval parameter value is ZERO. To avoid shifting > by a negative amount later in the code flow in this undesirable case, > it is better to handle it as well by treating it same as if 1 is sent. >=20 > REF: https://bugzilla.tianocore.org/show_bug.cgi?id=3D4211 >=20 > Cc: Hao A Wu > Cc: Ray Ni > Co-authored-by: Veeresh Sangolli > Signed-off-by: Ranbir Singh > Signed-off-by: Ranbir Singh > --- > MdeModulePkg/Bus/Pci/UhciDxe/UhciSched.c | 10 +++++++++- > 1 file changed, 9 insertions(+), 1 deletion(-) >=20 > diff --git a/MdeModulePkg/Bus/Pci/UhciDxe/UhciSched.c > b/MdeModulePkg/Bus/Pci/UhciDxe/UhciSched.c > index c08f9496969b..408e7d5ab7f3 100644 > --- a/MdeModulePkg/Bus/Pci/UhciDxe/UhciSched.c > +++ b/MdeModulePkg/Bus/Pci/UhciDxe/UhciSched.c > @@ -197,7 +197,7 @@ UhciDestoryFrameList ( > } >=20 >=20 >=20 > /** >=20 > - Convert the poll rate to the maxium 2^n that is smaller >=20 > + Convert the poll rate to the maximum 2^n that is smaller >=20 > than Interval. >=20 >=20 >=20 > @param Interval The poll rate to convert. >=20 > @@ -214,6 +214,14 @@ UhciConvertPollRate ( >=20 >=20 > ASSERT (Interval !=3D 0); >=20 >=20 >=20 > + // >=20 > + // To safeguard RELEASE mode wherein ASSERT is effectively not there, >=20 > + // if inadvertently Interval is still 0 here, treat it the same as 1. >=20 > + // >=20 > + if (Interval =3D=3D 0) { >=20 > + Interval =3D 1; >=20 > + } >=20 > + >=20 > // >=20 > // Find the index (1 based) of the highest non-zero bit >=20 > // >=20 > -- > 2.34.1 -=3D-=3D-=3D-=3D-=3D-=3D-=3D-=3D-=3D-=3D-=3D- Groups.io Links: You receive all messages sent to this group. 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