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Thu, 15 Apr 2021 09:20:43 +0000 From: "Zeng, Star" To: "Chiu, Chasel" , "Lou, Yun" , "devel@edk2.groups.io" CC: "Desimone, Nathaniel L" , "Ni, Ray" , "Zeng, Star" Subject: Re: [PATCH v2] IntelFsp2WrapperPkg: Remove microcode related PCDs Thread-Topic: [PATCH v2] IntelFsp2WrapperPkg: Remove microcode related PCDs Thread-Index: AQHXMcNpUOqznUdnWkScDKl/Xd4p+qq1LaCAgAAfmbA= Date: Thu, 15 Apr 2021 09:20:42 +0000 Message-ID: References: <20210415064847.15537-1-yun.lou@intel.com> In-Reply-To: Accept-Language: zh-CN, en-US X-MS-Has-Attach: X-MS-TNEF-Correlator: authentication-results: intel.com; dkim=none (message not signed) header.d=none;intel.com; dmarc=none action=none header.from=intel.com; x-originating-ip: [192.55.46.54] x-ms-publictraffictype: Email x-ms-office365-filtering-correlation-id: fd89f7b5-a2ff-4145-62d7-08d8ffefbe72 x-ms-traffictypediagnostic: DM6PR11MB4579: x-ms-exchange-transport-forked: True x-microsoft-antispam-prvs: x-ms-oob-tlc-oobclassifiers: OLM:8882; x-ms-exchange-senderadcheck: 1 x-microsoft-antispam: BCL:0; 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charset="us-ascii" Content-Transfer-Encoding: quoted-printable Agree with you Chasel. Deprecating them step by step, it will benefit further code sync for platfo= rms consuming the PCDs. Thanks, Star -----Original Message----- From: Chiu, Chasel =20 Sent: Thursday, April 15, 2021 3:26 PM To: Lou, Yun ; devel@edk2.groups.io Cc: Desimone, Nathaniel L ; Zeng, Star ; Ni, Ray Subject: RE: [PATCH v2] IntelFsp2WrapperPkg: Remove microcode related PCDs Hi Yun, I would recommend that we split this patch and remove PCD from DEC as last = step after all involved platforms not consuming them, what do you think? Thanks, Chasel > -----Original Message----- > From: Lou, Yun > Sent: Thursday, April 15, 2021 2:49 PM > To: devel@edk2.groups.io > Cc: Lou, Yun ; Chiu, Chasel=20 > ; Desimone, Nathaniel L=20 > ; Zeng, Star ;=20 > Ni, Ray > Subject: [PATCH v2] IntelFsp2WrapperPkg: Remove microcode related PCDs >=20 > REF: https://bugzilla.tianocore.org/show_bug.cgi?id=3D3334 >=20 > IntelFsp2WrapperPkg defines following PCDs: > PcdCpuMicrocodePatchAddress > PcdCpuMicrocodePatchRegionSize > PcdFlashMicrocodeOffset >=20 > But the PCD name caused confusion because UefiCpuPkg defines: > PcdCpuMicrocodePatchAddress > PcdCpuMicrocodePatchRegionSize >=20 > PcdCpuMicrocodePatchAddress in IntelFsp2WrapperPkg means the base=20 > address of the FV that holds the microcode. > PcdCpuMicrocodePatchAddress in UefiCpuPkg means the address of the=20 > microcode. >=20 > The relationship between the PCDs is: > IntelFsp2WrapperPkg.PcdCpuMicrocodePatchAddress > + IntelFsp2WrapperPkg.PcdFlashMicrocodeOffset > =3D=3D UefiCpuPkg.PcdCpuMicrocodePatchAddress >=20 > IntelFsp2WrapperPkg.PcdCpuMicrocodePatchRegionSize > - IntelFsp2WrapperPkg.PcdFlashMicrocodeOffset > =3D=3D UefiCpuPkg.PcdCpuMicrocodePatchRegionSize >=20 > To avoid confusion and actually the PCDs in IntelFsp2WrapperPkg are=20 > only used by a sample FSP-T wrapper, this patch removes the 3 PCDs=20 > defined in IntelFsp2WrapperPkg. >=20 > The FSP-T wrapper is updated to directly use the ones in UefiCpuPkg. >=20 > Signed-off-by: Jason Lou > Cc: Chasel Chiu > Cc: Nate DeSimone > Cc: Star Zeng > Cc: Ray Ni > --- >=20 > IntelFsp2WrapperPkg/Library/SecFspWrapperPlatformSecLibSample/SecRamInit > Data.c | 6 +++--- > IntelFsp2WrapperPkg/IntelFsp2WrapperPkg.dec > | 8 +------- >=20 > IntelFsp2WrapperPkg/Library/SecFspWrapperPlatformSecLibSample/SecFspWr > a pperPlatformSecLibSample.inf | 7 +++---- > 3 files changed, 7 insertions(+), 14 deletions(-) >=20 > diff --git > a/IntelFsp2WrapperPkg/Library/SecFspWrapperPlatformSecLibSample/SecRam > I > nitData.c > b/IntelFsp2WrapperPkg/Library/SecFspWrapperPlatformSecLibSample/SecRam > I > nitData.c > index 96b47e23da..e57b5b57be 100644 > --- > a/IntelFsp2WrapperPkg/Library/SecFspWrapperPlatformSecLibSample/SecRam > I > nitData.c > +++ b/IntelFsp2WrapperPkg/Library/SecFspWrapperPlatformSecLibSample/Se > +++ cR > +++ amInitData.c > @@ -1,7 +1,7 @@ > /** @file Sample to provide TempRamInitParams data. - Copyright (c) 2= 014 - > 2020, Intel Corporation. All rights reserved.
+ Copyright (c) 2014 - = 2021, > Intel Corporation. All rights reserved.
SPDX-License-Identifier: BS= D-2- > Clause-Patent **/@@ -52,8 +52,8 @@ GLOBAL_REMOVE_IF_UNREFERENCED=20 > CONST FSPT_UPD_CORE_DATA FsptUpdDataPtr =3D { > } }, {- ((UINT32)FixedPcdGet64 (PcdCpuMicrocodePatchAddress) = + > FixedPcdGet32 (PcdFlashMicrocodeOffset)),- ((UINT32)FixedPcdGet64 > (PcdCpuMicrocodePatchRegionSize) - FixedPcdGet32 > (PcdFlashMicrocodeOffset)),+ FixedPcdGet32 > (PcdCpuMicrocodePatchAddress),+ FixedPcdGet32 > (PcdCpuMicrocodePatchRegionSize), FixedPcdGet32 > (PcdFlashCodeCacheAddress), FixedPcdGet32 (PcdFlashCodeCacheSize), = }diff > --git a/IntelFsp2WrapperPkg/IntelFsp2WrapperPkg.dec > b/IntelFsp2WrapperPkg/IntelFsp2WrapperPkg.dec > index 6852bf1271..a3b9363779 100644 > --- a/IntelFsp2WrapperPkg/IntelFsp2WrapperPkg.dec > +++ b/IntelFsp2WrapperPkg/IntelFsp2WrapperPkg.dec > @@ -1,7 +1,7 @@ > ## @file # Provides drivers and definitions to support fsp in EDKII=20 > bios. #-# Copyright (c) 2014 - 2020, Intel Corporation. All rights=20 > reserved.
+# Copyright (c) 2014 - 2021, Intel Corporation. All=20 > rights reserved.
# SPDX- > License-Identifier: BSD-2-Clause-Patent # ##@@ -56,12 +56,6 @@ > ## Provides the size of the BIOS Flash Device. > gIntelFsp2WrapperTokenSpaceGuid.PcdFlashCodeCacheSize|0x00200000|UINT > 32|0x10000002 - ## Indicates the base address of the first Microcode=20 > 32|Patch in > the Microcode Region- > gIntelFsp2WrapperTokenSpaceGuid.PcdCpuMicrocodePatchAddress|0x0|UINT6 > 4|0x10000005- > gIntelFsp2WrapperTokenSpaceGuid.PcdCpuMicrocodePatchRegionSize|0x0|UI > NT64|0x10000006- ## Indicates the offset of the Cpu Microcode.- > gIntelFsp2WrapperTokenSpaceGuid.PcdFlashMicrocodeOffset|0x90|UINT32|0x > 10000007- ## Indicate the PEI memory size platform want to report > gIntelFsp2WrapperTokenSpaceGuid.PcdPeiMinMemSize|0x1800000|UINT32|0x > 40000004 ## Indicate the PEI memory size platform want to reportdiff --= git > a/IntelFsp2WrapperPkg/Library/SecFspWrapperPlatformSecLibSample/SecFsp > W > rapperPlatformSecLibSample.inf > b/IntelFsp2WrapperPkg/Library/SecFspWrapperPlatformSecLibSample/SecFsp > W > rapperPlatformSecLibSample.inf > index d7f8301bef..027b127724 100644 > --- > a/IntelFsp2WrapperPkg/Library/SecFspWrapperPlatformSecLibSample/SecFsp > W > rapperPlatformSecLibSample.inf > +++ b/IntelFsp2WrapperPkg/Library/SecFspWrapperPlatformSecLibSample/Se > +++ cF > +++ spWrapperPlatformSecLibSample.inf > @@ -1,7 +1,7 @@ > ## @file # Sample to provide FSP wrapper platform sec related=20 > function. #-# Copyright (c) 2014 - 2016, Intel Corporation. All rights=20 > reserved.
+# Copyright (c) 2014 - 2021, Intel Corporation. All=20 > rights reserved.
# # SPDX- > License-Identifier: BSD-2-Clause-Patent #@@ -76,8 +76,7 @@ > gIntelFsp2WrapperTokenSpaceGuid.PcdFspmBaseAddress ## > CONSUMES [FixedPcd]- > gIntelFsp2WrapperTokenSpaceGuid.PcdCpuMicrocodePatchAddress ## > CONSUMES- > gIntelFsp2WrapperTokenSpaceGuid.PcdCpuMicrocodePatchRegionSize ## > CONSUMES- gIntelFsp2WrapperTokenSpaceGuid.PcdFlashMicrocodeOffset > ## CONSUMES+ gUefiCpuPkgTokenSpaceGuid.PcdCpuMicrocodePatchAddress > ## CONSUMES+ > gUefiCpuPkgTokenSpaceGuid.PcdCpuMicrocodePatchRegionSize ## > CONSUMES gIntelFsp2WrapperTokenSpaceGuid.PcdFlashCodeCacheAddress > ## CONSUMES gIntelFsp2WrapperTokenSpaceGuid.PcdFlashCodeCacheSize > ## CONSUMES-- > 2.28.0.windows.1