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charset="us-ascii" Content-Transfer-Encoding: quoted-printable Reviewed-by: Sai Chaganty -----Original Message----- From: Luo, Heng =20 Sent: Tuesday, February 09, 2021 12:46 AM To: devel@edk2.groups.io Cc: Chaganty, Rangasai V ; Desimone, Nathani= el L Subject: [Patch V2 5/8] TigerlakeOpenBoardPkg: Add modules REF: https://bugzilla.tianocore.org/show_bug.cgi?id=3D3175 Adds the following modules: * BiosInfo Cc: Sai Chaganty Cc: Nate DeSimone Signed-off-by: Heng Luo --- Platform/Intel/TigerlakeOpenBoardPkg/BiosInfo/BiosInfo.c | 200 +++++++++= +++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++= +++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++= +++++++++++++++++++++++++++++++++++++++++ Platform/Intel/TigerlakeOpenBoardPkg/BiosInfo/BiosInfo.inf | 83 +++++++++= ++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++ 2 files changed, 283 insertions(+) diff --git a/Platform/Intel/TigerlakeOpenBoardPkg/BiosInfo/BiosInfo.c b/Pla= tform/Intel/TigerlakeOpenBoardPkg/BiosInfo/BiosInfo.c new file mode 100644 index 0000000000..46c3d439c2 --- /dev/null +++ b/Platform/Intel/TigerlakeOpenBoardPkg/BiosInfo/BiosInfo.c @@ -0,0 +1,200 @@ +/** @file + Driver for BIOS Info support. + + Copyright (c) 2021, Intel Corporation. All rights reserved.
+ SPDX-License-Identifier: BSD-2-Clause-Patent +**/ + +#include +#include +#include +#include +#include +#include +#include +#include +#include +#include + +#define BASE_FV_SIZE 10 + +#define FSP_WRAPPER_FV_SIZE 3 + +#define TSN_MAC_ADDRESS_FV_SIZE 0 + +#define BIOS_INFO_STRUCT_SIZE (BASE_FV_SIZE + FSP_WRAPPER_FV_SIZE + TSN_MA= C_ADDRESS_FV_SIZE) + + +/* + BIOS_INFO structure is the base of the firmware volume layout for Intel = platform BIOS implementation + so security checker module can run based on the structure and throw warn= ings, error or deadloop + when any unexpected firmware volumes are detected. + + BIOS_INFO is recommended to support full entries of firmware volumes pre= sent in a flash + with right type, attribute, version, flash map base address and size, + all associated information which is defined by BIOS_INFO_STRUCT structur= e. + - IBB firmware volumes, which are expected to be measured or/and verifie= d + by hardware base security solution to meet SecureBoot chain of trust + (Intel BootGuard for example), have attribute 0x0. + - Post IBB firmware volumes, which are expected to be measured or/and ve= rified + by BIOS (TCG code for measurement, RSA2048SHA256Sign algorithm for ver= ification for example), + have attribute BIOS_INFO_STRUCT_ATTRIBUTE_BIOS_POST_IBB. + - Else, follows Firmware Interface Table specification. +*/ +#pragma pack (1) +typedef struct { + BIOS_INFO_HEADER Header; + BIOS_INFO_STRUCT Entry[BIOS_INFO_STRUCT_SIZE]; +} BIOS_INFO; +#pragma pack () + +GLOBAL_REMOVE_IF_UNREFERENCED BIOS_INFO mBiosInfo =3D { + { + BIOS_INFO_SIGNATURE, + BIOS_INFO_STRUCT_SIZE, + 0, + }, + { + { + FIT_TYPE_07_BIOS_STARTUP_MODULE, + BIOS_INFO_STRUCT_ATTRIBUTE_GENERAL_EXCLUDE_FROM_FIT, + 0x0100, + FixedPcdGet32 (PcdFlashNvStorageVariableSize) + FixedPcdGet32 (PcdFl= ashNvStorageFtwWorkingSize) + FixedPcdGet32 (PcdFlashNvStorageFtwSpareSize)= , + FixedPcdGet32 (PcdFlashNvStorageVariableBase) + }, + { + FIT_TYPE_07_BIOS_STARTUP_MODULE, + BIOS_INFO_STRUCT_ATTRIBUTE_BIOS_POST_IBB, + 0x0100, + FixedPcdGet32 (PcdFlashFvAdvancedSize), + FixedPcdGet32 (PcdFlashFvAdvancedBase) + }, + { + FIT_TYPE_07_BIOS_STARTUP_MODULE, + BIOS_INFO_STRUCT_ATTRIBUTE_BIOS_POST_IBB, + 0x0100, + FixedPcdGet32 (PcdFlashFvOptionalSize), + FixedPcdGet32 (PcdFlashFvOptionalBase) + }, + { + FIT_TYPE_07_BIOS_STARTUP_MODULE, + BIOS_INFO_STRUCT_ATTRIBUTE_BIOS_POST_IBB, + 0x0100, + FixedPcdGet32 (PcdFlashFvOsBootSize), + FixedPcdGet32 (PcdFlashFvOsBootBase) + }, + { + FIT_TYPE_07_BIOS_STARTUP_MODULE, + BIOS_INFO_STRUCT_ATTRIBUTE_BIOS_POST_IBB, + 0x0100, + FixedPcdGet32 (PcdFlashFvUefiBootSize), + FixedPcdGet32 (PcdFlashFvUefiBootBase) + }, + { + FIT_TYPE_07_BIOS_STARTUP_MODULE, + BIOS_INFO_STRUCT_ATTRIBUTE_BIOS_POST_IBB, + 0x0100, + FixedPcdGet32 (PcdFlashFvPostMemorySize), + FixedPcdGet32 (PcdFlashFvPostMemoryBase) + }, + { + /* + Note : + Startup ACM is one of the binaries in FvFirmwareBinaries, + so put type 07 but not type 02. + FIT table will contain a type 02 entry with actual address + of ACM binary (it is passed as an input to FitGen tool). + */ + FIT_TYPE_07_BIOS_STARTUP_MODULE, + BIOS_INFO_STRUCT_ATTRIBUTE_GENERAL_EXCLUDE_FROM_FIT, + 0x0100, + FixedPcdGet32 (PcdFlashFvFirmwareBinariesSize), + FixedPcdGet32 (PcdFlashFvFirmwareBinariesBase) + }, + { + FIT_TYPE_07_BIOS_STARTUP_MODULE, + BIOS_INFO_STRUCT_ATTRIBUTE_BIOS_POST_IBB, + 0x0100, + FixedPcdGet32 (PcdFlashFvFspSSize), + FixedPcdGet32 (PcdFlashFvFspSBase) + }, + { + FIT_TYPE_07_BIOS_STARTUP_MODULE, + 0x00, // IBB FV + 0x0100, + FixedPcdGet32 (PcdFlashFvFspMSize), + FixedPcdGet32 (PcdFlashFvFspMBase) + }, + { + FIT_TYPE_07_BIOS_STARTUP_MODULE, + 0x00, // IBB FV + 0x0100, + FixedPcdGet32 (PcdFlashFvFspTSize), + FixedPcdGet32 (PcdFlashFvFspTBase) + }, + { + FIT_TYPE_07_BIOS_STARTUP_MODULE, + 0x00, // IBB FV + 0x0100, + FixedPcdGet32 (PcdFlashFvSecuritySize), + FixedPcdGet32 (PcdFlashFvSecurityBase) + }, + { + FIT_TYPE_07_BIOS_STARTUP_MODULE, + 0x00, // IBB FV + 0x0100, + FixedPcdGet32 (PcdFlashFvPreMemorySize), + FixedPcdGet32 (PcdFlashFvPreMemoryBase) + }, + { + FIT_TYPE_01_MICROCODE, + BIOS_INFO_STRUCT_ATTRIBUTE_MICROCODE_WHOLE_REGION, + 0x0100, + FixedPcdGet32 (PcdFlashMicrocodeFvSize), + FixedPcdGet32 (PcdFlashMicrocodeFvBase) + }, + } +}; + +GLOBAL_REMOVE_IF_UNREFERENCED EFI_PEI_PPI_DESCRIPTOR mBiosInfoPpiList =3D= { + EFI_PEI_PPI_DESCRIPTOR_PPI | EFI_PEI_PPI_DESCRIPTOR_TERMINATE_LIST, + &gBiosInfoGuid, + &mBiosInfo +}; + +/** + Installs BiosInfo Ppi. + + @param FileHandle Handle of the file being invoked. + @param PeiServices Describes the list of possible PEI Services. + + @retval EFI_SUCCESS Install the BiosInfo Ppi successfully. + +**/ +EFI_STATUS +EFIAPI +BiosInfoEntryPoint ( + IN EFI_PEI_FILE_HANDLE FileHandle, + IN CONST EFI_PEI_SERVICES **PeiServices + ) +{ + EFI_STATUS Status; + VOID *HobData; + + // + // Install PPI, so that other PEI module can add dependency. + // + Status =3D PeiServicesInstallPpi (&mBiosInfoPpiList); + ASSERT_EFI_ERROR (Status); + + // + // Build hob, so that DXE module can also get the data. + // + HobData =3D BuildGuidHob (&gBiosInfoGuid, sizeof (mBiosInfo)); + ASSERT (HobData !=3D NULL); + if (HobData =3D=3D NULL) { + return EFI_OUT_OF_RESOURCES; + } + CopyMem (HobData, &mBiosInfo, sizeof (mBiosInfo)); + return EFI_SUCCESS; +} diff --git a/Platform/Intel/TigerlakeOpenBoardPkg/BiosInfo/BiosInfo.inf b/P= latform/Intel/TigerlakeOpenBoardPkg/BiosInfo/BiosInfo.inf new file mode 100644 index 0000000000..66c8814c97 --- /dev/null +++ b/Platform/Intel/TigerlakeOpenBoardPkg/BiosInfo/BiosInfo.inf @@ -0,0 +1,83 @@ +## @file +# Module Information description file for BIOS Info Driver +# +# Copyright (c) 2021, Intel Corporation. All rights reserved.
+# SPDX-License-Identifier: BSD-2-Clause-Patent +# +## + +[Defines] + INF_VERSION =3D 0x00010017 + BASE_NAME =3D BiosInfo + FILE_GUID =3D 4A4CA1C6-871C-45BB-8801-6910A7AA5807 + VERSION_STRING =3D 1.0 + MODULE_TYPE =3D PEIM + ENTRY_POINT =3D BiosInfoEntryPoint +# +# The following information is for reference only and not required by the = build tools. +# +# VALID_ARCHITECTURES IA32 X64 +# + +[LibraryClasses] + PeimEntryPoint + PeiServicesLib + PeiServicesTablePointerLib + HobLib + BaseMemoryLib + MemoryAllocationLib + DebugLib + +[Packages] + MdePkg/MdePkg.dec + MdeModulePkg/MdeModulePkg.dec + TigerlakeSiliconPkg/SiPkg.dec + IntelSiliconPkg/IntelSiliconPkg.dec + MinPlatformPkg/MinPlatformPkg.dec + TigerlakeOpenBoardPkg/OpenBoardPkg.dec + SecurityPkg/SecurityPkg.dec + BoardModulePkg/BoardModulePkg.dec + +[Pcd] + gSiPkgTokenSpaceGuid.PcdBiosAreaBaseAddress ## CONSU= MES + gSiPkgTokenSpaceGuid.PcdBiosSize ## CONSU= MES + gEfiMdeModulePkgTokenSpaceGuid.PcdFlashNvStorageVariableBase ## CONSU= MES + gEfiMdeModulePkgTokenSpaceGuid.PcdFlashNvStorageVariableSize ## CONSU= MES + gEfiMdeModulePkgTokenSpaceGuid.PcdFlashNvStorageFtwWorkingBase ## CONSU= MES + gEfiMdeModulePkgTokenSpaceGuid.PcdFlashNvStorageFtwWorkingSize ## CONSU= MES + gEfiMdeModulePkgTokenSpaceGuid.PcdFlashNvStorageFtwSpareBase ## CONSU= MES + gEfiMdeModulePkgTokenSpaceGuid.PcdFlashNvStorageFtwSpareSize ## CONSU= MES + gBoardModuleTokenSpaceGuid.PcdFlashFvFirmwareBinariesBase ## CONSU= MES + gBoardModuleTokenSpaceGuid.PcdFlashFvFirmwareBinariesSize ## CONSU= MES + gMinPlatformPkgTokenSpaceGuid.PcdFlashFvAdvancedBase ## CONSU= MES + gMinPlatformPkgTokenSpaceGuid.PcdFlashFvAdvancedSize ## CONSU= MES + gBoardModuleTokenSpaceGuid.PcdFlashFvOptionalBase ## CONSU= MES + gBoardModuleTokenSpaceGuid.PcdFlashFvOptionalSize ## CONSU= MES + gMinPlatformPkgTokenSpaceGuid.PcdFlashFvSecurityBase ## CONSU= MES + gMinPlatformPkgTokenSpaceGuid.PcdFlashFvSecuritySize ## CONSU= MES + gMinPlatformPkgTokenSpaceGuid.PcdFlashFvOsBootBase ## CONSU= MES + gMinPlatformPkgTokenSpaceGuid.PcdFlashFvOsBootSize ## CONSU= MES + gMinPlatformPkgTokenSpaceGuid.PcdFlashFvUefiBootBase ## CONSU= MES + gMinPlatformPkgTokenSpaceGuid.PcdFlashFvUefiBootSize ## CONSU= MES + gMinPlatformPkgTokenSpaceGuid.PcdFlashFvPostMemoryBase ## CONSU= MES + gMinPlatformPkgTokenSpaceGuid.PcdFlashFvPostMemorySize ## CONSU= MES + gSiPkgTokenSpaceGuid.PcdFlashMicrocodeFvBase ## CONSU= MES + gSiPkgTokenSpaceGuid.PcdFlashMicrocodeFvSize ## CONSU= MES + gMinPlatformPkgTokenSpaceGuid.PcdFlashFvFspSBase ## CONSU= MES + gMinPlatformPkgTokenSpaceGuid.PcdFlashFvFspSSize ## CONSU= MES + gMinPlatformPkgTokenSpaceGuid.PcdFlashFvFspMBase ## CONSU= MES + gMinPlatformPkgTokenSpaceGuid.PcdFlashFvFspMSize ## CONSU= MES + gMinPlatformPkgTokenSpaceGuid.PcdFlashFvFspTBase ## CONSU= MES + gMinPlatformPkgTokenSpaceGuid.PcdFlashFvFspTSize ## CONSU= MES + gMinPlatformPkgTokenSpaceGuid.PcdFlashFvPreMemoryBase ## CONSU= MES + gMinPlatformPkgTokenSpaceGuid.PcdFlashFvPreMemorySize ## CONSU= MES + + +[Sources] + BiosInfo.c + +[Guids] + gBiosInfoGuid ## PRODUCES + +[Depex] + gEfiPeiMasterBootModePpiGuid --=20 2.24.0.windows.2