From: "Li, Zhihao" <zhihao.li@intel.com>
To: "Yao, Jiewen" <jiewen.yao@intel.com>,
"devel@edk2.groups.io" <devel@edk2.groups.io>
Cc: "Wang, Jian J" <jian.j.wang@intel.com>
Subject: Re: [edk2-devel] [PATCH v1 1/1] CryptPkg: Enable CryptoPkg BaseCryptLib ParallelHash for PEI and DXE
Date: Thu, 1 Dec 2022 11:43:25 +0000 [thread overview]
Message-ID: <DM6PR11MB4738DE0374E0EA04D542FA80F9149@DM6PR11MB4738.namprd11.prod.outlook.com> (raw)
In-Reply-To: <MW4PR11MB58721B508C5BF762168F666A8C149@MW4PR11MB5872.namprd11.prod.outlook.com>
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Yes. I tested parallelhash of CryptoProtocol/CryptoLib in Pei and Dxe phase. I find the log of the test. The file contains logs of many boot processes. Please check from the end of file.
I hope it can be used.
DXE phase:
[cid:image001.png@01D905B5.C52B9ED0]
Pei phase:
[cid:image002.png@01D905B7.42813BA0]
[cid:image003.png@01D905B8.0BB96100]
[cid:image004.png@01D905B9.222810C0]
-----Original Message-----
From: Yao, Jiewen <jiewen.yao@intel.com<mailto:jiewen.yao@intel.com>>
Sent: Thursday, December 1, 2022 4:37 PM
To: devel@edk2.groups.io<mailto:devel@edk2.groups.io>; Li, Zhihao <zhihao.li@intel.com<mailto:zhihao.li@intel.com>>
Cc: Wang, Jian J <jian.j.wang@intel.com<mailto:jian.j.wang@intel.com>>
Subject: RE: [edk2-devel] [PATCH v1 1/1] CryptPkg: Enable CryptoPkg BaseCryptLib ParallelHash for PEI and DXE
Thanks.
Would you please share what test you have run for this?
> -----Original Message-----
> From: devel@edk2.groups.io<mailto:devel@edk2.groups.io> <devel@edk2.groups.io<mailto:devel@edk2.groups.io>> On Behalf Of Li,
> Zhihao
> Sent: Wednesday, November 30, 2022 10:21 PM
> To: devel@edk2.groups.io<mailto:devel@edk2.groups.io>
> Cc: Yao, Jiewen <jiewen.yao@intel.com<mailto:jiewen.yao@intel.com>>; Wang, Jian J
> <jian.j.wang@intel.com<mailto:jian.j.wang@intel.com>>
> Subject: [edk2-devel] [PATCH v1 1/1] CryptPkg: Enable CryptoPkg
> BaseCryptLib ParallelHash for PEI and DXE
>
> From: Zhihao Li <zhihao.li@intel.com<mailto:zhihao.li@intel.com>>
>
> REF: https://bugzilla.tianocore.org/show_bug.cgi?id=4097
>
> The BaseCryptLib in the CryptoPkg currently supports ParallelHash
> algorithm for SMM. The MP Services PPI and MP Services Protocol could
> be used to enable ParallelHash in PEI and DXE versions of the
> BaseCryptLib.
>
> Cc: Jiewen Yao <jiewen.yao@intel.com<mailto:jiewen.yao@intel.com>>
> Cc: Jian J Wang <jian.j.wang@intel.com<mailto:jian.j.wang@intel.com>>
>
> Signed-off-by: Zhihao Li <zhihao.li@intel.com<mailto:zhihao.li@intel.com>>
> ---
> CryptoPkg/Library/BaseCryptLib/Hash/CryptDispatchApDxe.c | 49
> ++++++++++++++++++
> CryptoPkg/Library/BaseCryptLib/Hash/CryptDispatchApMm.c | 35
> +++++++++++++
> CryptoPkg/Library/BaseCryptLib/Hash/CryptDispatchApPei.c | 54
> ++++++++++++++++++++
> CryptoPkg/Library/BaseCryptLib/Hash/CryptParallelHash.c | 26 +---------
> CryptoPkg/Library/BaseCryptLib/BaseCryptLib.inf | 11 +++-
> CryptoPkg/Library/BaseCryptLib/Hash/CryptParallelHash.h | 23
> +++++++++
> CryptoPkg/Library/BaseCryptLib/PeiCryptLib.inf | 11 +++-
> CryptoPkg/Library/BaseCryptLib/SmmCryptLib.inf | 1 +
> 8 files changed, 183 insertions(+), 27 deletions(-)
>
> diff --git a/CryptoPkg/Library/BaseCryptLib/Hash/CryptDispatchApDxe.c
> b/CryptoPkg/Library/BaseCryptLib/Hash/CryptDispatchApDxe.c
> new file mode 100644
> index 000000000000..607aa7cd48d2
> --- /dev/null
> +++ b/CryptoPkg/Library/BaseCryptLib/Hash/CryptDispatchApDxe.c
> @@ -0,0 +1,49 @@
> +/** @file
>
> + Dispatch Block to Aps in Dxe phase for parallelhash algorithm.
>
> +
>
> +Copyright (c) 2022, Intel Corporation. All rights reserved.<BR>
>
> +SPDX-License-Identifier: BSD-2-Clause-Patent
>
> +
>
> +**/
>
> +
>
> +#include "CryptParallelHash.h"
>
> +#include <Library/UefiBootServicesTableLib.h>
>
> +#include <Protocol/MpService.h>
>
> +
>
> +/**
>
> + Dispatch the block task to each AP in PEI phase.
>
> +
>
> +**/
>
> +VOID
>
> +EFIAPI
>
> +DispatchBlockToAp (
>
> + VOID
>
> + )
>
> +{
>
> + EFI_STATUS Status;
>
> + EFI_MP_SERVICES_PROTOCOL *MpServices;
>
> +
>
> + Status = gBS->LocateProtocol (
>
> + &gEfiMpServiceProtocolGuid,
>
> + NULL,
>
> + (VOID **)&MpServices
>
> + );
>
> + if (EFI_ERROR (Status)) {
>
> + //
>
> + // Failed to locate MpServices Protocol, do parallel hash by one core.
>
> + //
>
> + DEBUG ((DEBUG_ERROR, "[DispatchBlockToApDxe] Failed to locate
> MpServices Protocol. Status = %r\n", Status));
>
> + return;
>
> + }
>
> +
>
> + Status = MpServices->StartupAllAPs (
>
> + MpServices,
>
> + ParallelHashApExecute,
>
> + FALSE,
>
> + NULL,
>
> + 0,
>
> + NULL,
>
> + NULL
>
> + );
>
> + return;
>
> +}
>
> diff --git a/CryptoPkg/Library/BaseCryptLib/Hash/CryptDispatchApMm.c
> b/CryptoPkg/Library/BaseCryptLib/Hash/CryptDispatchApMm.c
> new file mode 100644
> index 000000000000..0237fb38bcb6
> --- /dev/null
> +++ b/CryptoPkg/Library/BaseCryptLib/Hash/CryptDispatchApMm.c
> @@ -0,0 +1,35 @@
> +/** @file
>
> + Dispatch the block task to each AP in Smm mode for parallelhash
> algorithm.
>
> +
>
> +Copyright (c) 2022, Intel Corporation. All rights reserved.<BR>
>
> +SPDX-License-Identifier: BSD-2-Clause-Patent
>
> +
>
> +**/
>
> +
>
> +#include "CryptParallelHash.h"
>
> +#include <Library/MmServicesTableLib.h>
>
> +
>
> +/**
>
> + Dispatch the block task to each AP in SMM mode.
>
> +
>
> +**/
>
> +VOID
>
> +EFIAPI
>
> +DispatchBlockToAp (
>
> + VOID
>
> + )
>
> +{
>
> + UINTN Index;
>
> +
>
> + if (gMmst == NULL) {
>
> + return;
>
> + }
>
> +
>
> + for (Index = 0; Index < gMmst->NumberOfCpus; Index++) {
>
> + if (Index != gMmst->CurrentlyExecutingCpu) {
>
> + gMmst->MmStartupThisAp (ParallelHashApExecute, Index, NULL);
>
> + }
>
> + }
>
> +
>
> + return;
>
> +}
>
> diff --git a/CryptoPkg/Library/BaseCryptLib/Hash/CryptDispatchApPei.c
> b/CryptoPkg/Library/BaseCryptLib/Hash/CryptDispatchApPei.c
> new file mode 100644
> index 000000000000..9ddd23d32048
> --- /dev/null
> +++ b/CryptoPkg/Library/BaseCryptLib/Hash/CryptDispatchApPei.c
> @@ -0,0 +1,54 @@
> +/** @file
>
> + Dispatch Block to Aps in Pei phase for parallelhash algorithm.
>
> +
>
> +Copyright (c) 2022, Intel Corporation. All rights reserved.<BR>
>
> +SPDX-License-Identifier: BSD-2-Clause-Patent
>
> +
>
> +**/
>
> +
>
> +#include "CryptParallelHash.h"
>
> +#include <Library/PeiServicesTablePointerLib.h>
>
> +#include <PiPei.h>
>
> +#include <Ppi/MpServices.h>
>
> +#include <Library/PeiServicesLib.h>
>
> +
>
> +/**
>
> + Dispatch the block task to each AP in PEI phase.
>
> +
>
> +**/
>
> +VOID
>
> +EFIAPI
>
> +DispatchBlockToAp (
>
> + VOID
>
> + )
>
> +{
>
> + EFI_STATUS Status;
>
> + CONST EFI_PEI_SERVICES **PeiServices;
>
> + EFI_PEI_MP_SERVICES_PPI *MpServicesPpi;
>
> +
>
> + PeiServices = GetPeiServicesTablePointer ();
>
> + Status = (*PeiServices)->LocatePpi (
>
> + PeiServices,
>
> + &gEfiPeiMpServicesPpiGuid,
>
> + 0,
>
> + NULL,
>
> + (VOID **)&MpServicesPpi
>
> + );
>
> + if (EFI_ERROR (Status)) {
>
> + //
>
> + // Failed to locate MpServices Ppi, do parallel hash by one core.
>
> + //
>
> + DEBUG ((DEBUG_ERROR, "[DispatchBlockToApPei] Failed to locate
> MpServices Ppi. Status = %r\n", Status));
>
> + return;
>
> + }
>
> +
>
> + Status = MpServicesPpi->StartupAllAPs (
>
> + (CONST EFI_PEI_SERVICES **)PeiServices,
>
> + MpServicesPpi,
>
> + ParallelHashApExecute,
>
> + FALSE,
>
> + 0,
>
> + NULL
>
> + );
>
> + return;
>
> +}
>
> diff --git a/CryptoPkg/Library/BaseCryptLib/Hash/CryptParallelHash.c
> b/CryptoPkg/Library/BaseCryptLib/Hash/CryptParallelHash.c
> index f7ce9dbf523e..2931123736e3 100644
> --- a/CryptoPkg/Library/BaseCryptLib/Hash/CryptParallelHash.c
> +++ b/CryptoPkg/Library/BaseCryptLib/Hash/CryptParallelHash.c
> @@ -7,7 +7,6 @@ SPDX-License-Identifier: BSD-2-Clause-Patent **/
>
>
>
> #include "CryptParallelHash.h"
>
> -#include <Library/MmServicesTableLib.h>
>
> #include <Library/SynchronizationLib.h>
>
>
>
> #define PARALLELHASH_CUSTOMIZATION "ParallelHash"
>
> @@ -69,27 +68,6 @@ ParallelHashApExecute (
> }
>
> }
>
>
>
> -/**
>
> - Dispatch the block task to each AP in SMM mode.
>
> -
>
> -**/
>
> -VOID
>
> -EFIAPI
>
> -MmDispatchBlockToAP (
>
> - VOID
>
> - )
>
> -{
>
> - UINTN Index;
>
> -
>
> - for (Index = 0; Index < gMmst->NumberOfCpus; Index++) {
>
> - if (Index != gMmst->CurrentlyExecutingCpu) {
>
> - gMmst->MmStartupThisAp (ParallelHashApExecute, Index, NULL);
>
> - }
>
> - }
>
> -
>
> - return;
>
> -}
>
> -
>
> /**
>
> Parallel hash function ParallelHash256, as defined in NIST's
> Special Publication 800-185,
>
> published December 2016.
>
> @@ -197,9 +175,7 @@ ParallelHash256HashAll (
> //
>
> // Dispatch blocklist to each AP.
>
> //
>
> - if (gMmst != NULL) {
>
> - MmDispatchBlockToAP ();
>
> - }
>
> + DispatchBlockToAp ();
>
>
>
> //
>
> // Wait until all block hash completed.
>
> diff --git a/CryptoPkg/Library/BaseCryptLib/BaseCryptLib.inf
> b/CryptoPkg/Library/BaseCryptLib/BaseCryptLib.inf
> index 213813cad971..5be1724f0852 100644
> --- a/CryptoPkg/Library/BaseCryptLib/BaseCryptLib.inf
> +++ b/CryptoPkg/Library/BaseCryptLib/BaseCryptLib.inf
> @@ -35,7 +35,11 @@
> Hash/CryptSha256.c
>
> Hash/CryptSha512.c
>
> Hash/CryptSm3.c
>
> - Hash/CryptParallelHashNull.c
>
> + Hash/CryptSha3.c
>
> + Hash/CryptXkcp.c
>
> + Hash/CryptCShake256.c
>
> + Hash/CryptParallelHash.c
>
> + Hash/CryptDispatchApDxe.c
>
> Hmac/CryptHmac.c
>
> Kdf/CryptHkdf.c
>
> Cipher/CryptAes.c
>
> @@ -93,6 +97,11 @@
> OpensslLib
>
> IntrinsicLib
>
> PrintLib
>
> + UefiBootServicesTableLib
>
> + SynchronizationLib
>
> +
>
> +[Protocols]
>
> + gEfiMpServiceProtocolGuid
>
>
>
> #
>
> # Remove these [BuildOptions] after this library is cleaned up
>
> diff --git a/CryptoPkg/Library/BaseCryptLib/Hash/CryptParallelHash.h
> b/CryptoPkg/Library/BaseCryptLib/Hash/CryptParallelHash.h
> index dcfe200e5829..03a1a58cb8e7 100644
> --- a/CryptoPkg/Library/BaseCryptLib/Hash/CryptParallelHash.h
> +++ b/CryptoPkg/Library/BaseCryptLib/Hash/CryptParallelHash.h
> @@ -201,3 +201,26 @@ CShake256HashAll (
> IN UINTN CustomizationLen,
>
> OUT UINT8 *HashValue
>
> );
>
> +
>
> +/**
>
> + Complete computation of digest of each block.
>
> +
>
> + Each AP perform the function called by BSP.
>
> +
>
> + @param[in] ProcedureArgument Argument of the procedure.
>
> +**/
>
> +VOID
>
> +EFIAPI
>
> +ParallelHashApExecute (
>
> + IN VOID *ProcedureArgument
>
> + );
>
> +
>
> +/**
>
> + Dispatch the block task to each AP.
>
> +
>
> +**/
>
> +VOID
>
> +EFIAPI
>
> +DispatchBlockToAp (
>
> + VOID
>
> + );
>
> diff --git a/CryptoPkg/Library/BaseCryptLib/PeiCryptLib.inf
> b/CryptoPkg/Library/BaseCryptLib/PeiCryptLib.inf
> index b1629647f9c6..2aafa5f0ac9a 100644
> --- a/CryptoPkg/Library/BaseCryptLib/PeiCryptLib.inf
> +++ b/CryptoPkg/Library/BaseCryptLib/PeiCryptLib.inf
> @@ -40,7 +40,11 @@
> Hash/CryptSha256.c
>
> Hash/CryptSm3.c
>
> Hash/CryptSha512.c
>
> - Hash/CryptParallelHashNull.c
>
> + Hash/CryptSha3.c
>
> + Hash/CryptXkcp.c
>
> + Hash/CryptCShake256.c
>
> + Hash/CryptParallelHash.c
>
> + Hash/CryptDispatchApPei.c
>
> Hmac/CryptHmac.c
>
> Kdf/CryptHkdf.c
>
> Cipher/CryptAesNull.c
>
> @@ -80,7 +84,12 @@
> OpensslLib
>
> IntrinsicLib
>
> PrintLib
>
> + PeiServicesTablePointerLib
>
> + PeiServicesLib
>
> + SynchronizationLib
>
>
>
> +[Ppis]
>
> + gEfiPeiMpServicesPpiGuid
>
> #
>
> # Remove these [BuildOptions] after this library is cleaned up
>
> #
>
> diff --git a/CryptoPkg/Library/BaseCryptLib/SmmCryptLib.inf
> b/CryptoPkg/Library/BaseCryptLib/SmmCryptLib.inf
> index 0af7a3f96e8f..00ea7bf4c5df 100644
> --- a/CryptoPkg/Library/BaseCryptLib/SmmCryptLib.inf
> +++ b/CryptoPkg/Library/BaseCryptLib/SmmCryptLib.inf
> @@ -42,6 +42,7 @@
> Hash/CryptXkcp.c
>
> Hash/CryptCShake256.c
>
> Hash/CryptParallelHash.c
>
> + Hash/CryptDispatchApMm.c
>
> Hmac/CryptHmac.c
>
> Kdf/CryptHkdfNull.c
>
> Cipher/CryptAes.c
>
> --
> 2.26.2.windows.1
>
>
>
> -=-=-=-=-=-=
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> View/Reply Online (#96736):
> https://edk2.groups.io/g/devel/message/96736
> Mute This Topic: https://groups.io/mt/95358558/1772286
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>
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ÿPROGRESS CODE: V03020003 I0
PROGRESS CODE: V03020002 I0
PROGRESS CODE: V03020003 I0
PROGRESS CODE: V03020002 I0
PROGRESS CODE: V03020003 I0
PROGRESS CODE: V03020002 I0
PROGRESS CODE: V03020003 I0
PROGRESS CODE: V03020002 I0
[IPMI PEI] BMC Device ID: 0x23, firmware version: 2.03 UpdateMode:1
[IPMI] BMC in Forced Update mode, skip waiting for BMC_READY.
PROGRESS CODE: V03020003 I0
PROGRESS CODE: V03020002 I0
PROGRESS CODE: V03020003 I0
PROGRESS CODE: V03020002 I0
InstallHeciTransportPpis, start
InstallHeciTransportPpis, end
[HECI CONTROL PEI] HECI Transport found: 2
[HECI Control-1 PEI]: ERROR: HeciControlSendAndReceiveSinglePch() : Heci 1 is not initialized
HECI: ME type not recognized (MEFS1: 0x00000355, MEFS2: 0x80502006)
Initialization is allowed
[HECI Transport-1 PEI] Send pkt: 80040007
00: F0 11 00 00
[HECI Transport-1 PEI] Got pkt: 80080007
00: F0 91 00 00 09 00 00 00
HECI: Create MeType HOB for ME: 1
HECI: Set MeType HOB info to: 1
[HECI] [ME] (MeType is ME_TYPE_SPS)
Initialization is allowed
PROGRESS CODE: V03020003 I0
PROGRESS CODE: V03020002 I0
PROGRESS CODE: V03020003 I0
PROGRESS CODE: V03020002 I0
IioVmdDisableForPchRpInit: DonePCH Series : EBG PCH
PCH Stepping : B0
PROGRESS CODE: V03020003 I0
PROGRESS CODE: V03020002 I0
PROGRESS CODE: V03020003 I0
PROGRESS CODE: V03020002 I0
PROGRESS CODE: V03020003 I0
PROGRESS CODE: V03020002 I0
UbaInitPeim: PlatformType=0x16
UbaInitPeim: PlatformType=0x16
UbaInitPeim: PlatformType=0x16
UbaInitPeim: PlatformType=0x16
PROGRESS CODE: V03020003 I0
PROGRESS CODE: V03020002 I0
PROGRESS CODE: V03020003 I0
PROGRESS CODE: V03020002 I0
UBA:GpioTable size 0x9CC, blocks: 0xD1.
UBA: Start ConfigureGpio().
UBA: ConfigureGpio() end.
Unable to read FlashSecOvrdVal
FiaMuxRecordsCount = 0
[HECI] PeiMeServerPolicy (MeType is ME_TYPE_SPS)
Can't finde more CFR image in CFR FV - Not Found!
PPR Variable not found or CRC mismatch - Status: 0x8000000E, Crc: 0x0, calc. Crc: 0x0!
UpdatePeiSecurityPolicy: Create Status=Success
FIT not found, skip LT-SX
Platform Type = 22
Bios ID: EGSDCRB1.ZHI.0091.D15.2211010626
PROGRESS CODE: V03020003 I0
[HECI Transport-1 PEI] Send pkt: 80010020
00: 01
[HECI Transport-1 PEI] Got pkt: 800B0020
00: 81 01 01 14 00 88 00 01 - 00 00 00
[HECI Transport-1 PEI] Send pkt: 80300008
00: 00 00 05 00 1A 00 00 00 - 00 00 00 00 1C 00 00 00
10: 00 00 00 00 00 00 00 00 - 00 00 00 00 00 00 00 00
20: 00 00 00 00 00 00 00 00 - 00 00 00 00 00 00 00 00
[HECI Transport-1 PEI] Got pkt: 80300008
00: 00 00 05 00 1A 00 00 00 - 00 00 00 00 1C 00 00 00
10: 00 00 00 00 00 00 00 02 - 00 00 00 00 00 00 00 00
20: 00 00 00 00 00 00 00 00 - 00 00 00 00 00 00 00 00
Fail to Configure PSYS_CRIT
PROGRESS CODE: V03020002 I0
PROGRESS CODE: V03020003 I0
PROGRESS CODE: V03020002 I0
PROGRESS CODE: V03020003 I0
PROGRESS CODE: V03020002 I0
PROGRESS CODE: V03020003 I0
PROGRESS CODE: V03020002 I0
PROGRESS CODE: V03020003 I0
PROGRESS CODE: V03020002 I0
LtStatusRegister[0xFED30000] = 0x0000000000000003
LtExtendedStatusError[0xFED30008] = 0x0000000000000000
BootGuardBootStatus[0xFED300A0] = 0x0000000000000000
BootGuardAcmError[0xFED30328] = 0x0000000000000000
BootGuardLtExists[0xFED30010] = 0x0000000000000000
BootGuardLtCrash[0xFED30030] = 0x0000000000000000
MSR_DEBUG_INTERFACE[0x00000C80] = 0x0000000080000001
MSR_BOOT_GUARD_SACM_INFO[0x0000013A] = 0x0000000C00000000
AcmPolicyStatus = 0x0, IsTxtFailedWithScrtm 0
None of BtG/TXT is enabled or TXT failed with scrtm.
PROGRESS CODE: V03020003 I0
PROGRESS CODE: V03020002 I0
PROGRESS CODE: V03020003 I0
PROGRESS CODE: V03020002 I0
InitializeDefaultData()
[Enter] Initialize Reference Code Policy!
>>> Print the default settings of Reference Code Policy! Begin >>>
ReferenceCodePolicyPtr->NumaEn = 1
ReferenceCodePolicyPtr->UmaBasedClustering = 0
<<< Print the default settings of Reference Code Policy! End <<<
[Exit] Initialize Reference Code Policy!
SBSP socket = 0
InitializePlatformData()
InstallPpi MrcHooksServicesPpiDesc Status = 00000000
CacheMrcHooksServicesPpi in HOST: Host->MrcHooksServicesPpi = FFEA57C0
InstallPpi MrcHooksChipServicesPpiDesc Status = 00000000
CacheMrcChipHooksServicesPpi in HOST: Host->MrcHooksChipServicesPpi = FFEA5820
PROGRESS CODE: V030F100B I0
LoadNvramData: LoadSysInfoNvram failed, Status = Not Found
[HECI Transport-1 PEI] Send pkt: 80100007
00: F0 0C 00 00 DF FF FF FF - FF FF FF FF 00 00 00 00
[HECI Transport-1 PEI] Got pkt: 80100007
00: F0 8C 00 00 00 00 00 00 - 00 00 00 00 00 00 00 00
MeUmaConfigureRequestedSegmentSize: Exiting (Status = Success)
GetEmulationMemFlows: Simics $mrc value = 0
memFlows = 0xFFFFFFFF, memFlowsExt = 0xFFBF7FFF, memFlowsExt2 = 0xBF9E1F7F, memFlowsExt3 = 0xFFFFFFFF
Emulation Value is: 0!
Running on hardware
SPR processor detected
Warning: Newer CPU Stepping 4 detected
RC Version: 1.1.1.01BC
sizeof sysHost = 363776
SsaLoader - Entry
SsaLoader - Exit
KTI Init starting...
******* KTI Setup Structure *******
Bus Ratio (per socket): S0: 1 S1: 1 S2: 1 S3: 1
D2KCreditConfig: 0 [1:Low,2:Med,3:High]
SnoopThrottleConfig: 0 [0:Dis,1:Low,2:Med,3:High,4:Auto]
LegacyVgaSoc: 0
LegacyVgaStack: 0
P2pRelaxedOrdering: 0
DebugPrintLevel: 15
DegradePrecedence: 0
Degrade4SPreference: 0 (4SFullyConnect)
KtiLinkSpeedMode: 1 (FAST)
DfxWarmResetEliminationEn: 0
KtiLinkSpeed: 127 (MAX_SUPPORTED)
KtiAdaptationEn: 2 (UNKNOWN)
KtiAdaptationSpeed: 127 (MAX_SUPPORTED)
KtiLinkL0pEn: 2 (AUTO)
KtiLinkL1En: 2 (AUTO)
KtiFailoverEn: 2 (AUTO)
KtiLbEn: 0
SncEn: 15 (AUTO)
IoDcMode: 1 (AUTO)
DirectoryModeEn: 2
XptPrefetchEn: 2
KtiPrefetchEn: 2
XptRemotePrefetchEn: 2
RdCurForXptPrefetchEn: 2
StaleAtoSOptEn: 2
LLCDeadLineAlloc: 1
OppoLLC2SfMigrationEn: 0 (MANUAL)
MbeBWCalChoice: 3 [0:Linear,1:Biased,2:Legacy,3:Auto]
PmmMbaBWDownscale: 0 [0:1x,1:1/2x,2:1/4x,3:1/8x]
CxlMbaBWDownscale: 0 [0:1x,1:1/2x,2:1/4x,3:1/8x]
RemoteTargetMbaBWDownscale 0 [0:1x,1:1/2x,2:1/4x,3:1/8x]
SplitLock: 0
DdrtQosMode: 0
ClockModulationEn: 2 (AUTO)
KtiFpgaEnable (per socket): S0: 2 S1: 2 S2: 2 S3: 2
StackDisableBitMap (per socket): S0: 0x0 S1: 0x0 S2: 0x0 S3: 0x0
KtiCrcMode: 0 (16BIT)
KtiCpuSktHotPlugEn: 0
KtiCpuSktHotPlugTopology: 0 (4S)
KtiSkuMismatchCheck: 1
MctpBusOwner: 0 (PCH SPS as Bus Owner (Proxy))
KtiPortDisable (per port):
S0:0 0 0 0
S1:0 0 0 0
S2:0 0 0 0
S3:0 0 0 0
KtiLinkVnaOverride (per port):
S0:254 254 254 254
S1:254 254 254 254
S2:254 254 254 254
S3:254 254 254 254
KtiLinkSpeed (per port):
S0:7 7 7 7
S1:7 7 7 7
S2:7 7 7 7
S3:7 7 7 7
Rsvd (per port):
S0:0 0 0 0
S1:0 0 0 0
S2:0 0 0 0
S3:0 0 0 0
**KTI Setup Structure DfxParms **
DfxHaltLinkFailReset: 2 (AUTO)
DfxKtiMaxInitAbort: 2 (AUTO)
DfxLlcShareDrdCrd 2 (AUTO)
DfxBiasFwdMode: 5 (AUTO)
DfxSnoopFanoutEn: 2 (AUTO)
DfxHitMeEn: 2 (AUTO)
DfxFrcfwdinv 2 (AUTO)
DfxDbpEnable 2 (AUTO)
DfxCleanEvictAlwaysLive: 2 (AUTO)
DfxModifiedEvictAlwaysLive: 2 (AUTO)
DfxOsbEn 2 (AUTO)
DfxHitMeRfoDirsEn 2 (AUTO)
DfxGateOsbIodcAllocEn 2 (AUTO)
DfxDualLinksInterleavingMode 2 (AUTO)
DfxSystemDegradeMode: 1
DfxVn1En: 2 (AUTO)
DfxD2cEn: 2 (AUTO)
DfxD2kEn: 2 (AUTO)
DfxLockPrimary: 4 (AUTO)
DfxOsbLocRd: 2 (AUTO)
DfxOsbLocRdCur: 2 (AUTO)
DfxOsbRmtRd: 2 (AUTO)
DfxM3KtiCountMismatchEn: 2 (AUTO)
DfxSnoopFanoutChaInterleaveEn: 2 (AUTO)
DfxXptFifoEnabledCredit: 0x5
DfxMdfisTrainingEn: 2 (AUTO)
DfxClippedFreq: 23
DfxLlpEndcntClipped: 650
DfxLlpEndcntNonClipped: 576
DfxCxlSecLvl: 3 (AUTO)
DfxCxlStcge: 2 (AUTO)
DfxCxlSdcge: 2 (AUTO)
DfxCxlDlcge: 2 (AUTO)
DfxCxlLtcge: 2 (AUTO)
DfxCxlVid: 2 (AUTO)
DfxIioDfxEnabled: 0 (MANUAL)
DfxHqmEn: 2 (AUTO)
DfxRsfEnabledForDram: 2 (AUTO)
DfxS3mSoftStrap: 2 (AUTO)
DfxPmonConfig: 3 (AUTO)
DfxM2IosfPmonAccessControl: 2 (AUTO)
DfxMaxCache: 256 (AUTO)
DfxMaxCacheAtomic: 256 (AUTO)
DfxCtagEntryAvailMask: 256 (AUTO)
DfxXptPrefetchEn: 2 (AUTO)
DfxPrqBlockEn: 2 (AUTO)
DfxAeg0CounterLowVal: 65535 (AUTO)
DfxAeg0CounterHighVal: 65535 (AUTO)
DfxCrcMode (per port):
S0:2 (AUTO) 2 (AUTO) 2 (AUTO) 2 (AUTO)
S1:2 (AUTO) 2 (AUTO) 2 (AUTO) 2 (AUTO)
S2:2 (AUTO) 2 (AUTO) 2 (AUTO) 2 (AUTO)
S3:2 (AUTO) 2 (AUTO) 2 (AUTO) 2 (AUTO)
DfxL0pEnable (per port):
S0:2 (AUTO) 2 (AUTO) 2 (AUTO) 2 (AUTO)
S1:2 (AUTO) 2 (AUTO) 2 (AUTO) 2 (AUTO)
S2:2 (AUTO) 2 (AUTO) 2 (AUTO) 2 (AUTO)
S3:2 (AUTO) 2 (AUTO) 2 (AUTO) 2 (AUTO)
DfxL1Enable (per port):
S0:2 (AUTO) 2 (AUTO) 2 (AUTO) 2 (AUTO)
S1:2 (AUTO) 2 (AUTO) 2 (AUTO) 2 (AUTO)
S2:2 (AUTO) 2 (AUTO) 2 (AUTO) 2 (AUTO)
S3:2 (AUTO) 2 (AUTO) 2 (AUTO) 2 (AUTO)
DfxKtiFailoverEn (per port):
S0:2 (AUTO) 2 (AUTO) 2 (AUTO) 2 (AUTO)
S1:2 (AUTO) 2 (AUTO) 2 (AUTO) 2 (AUTO)
S2:2 (AUTO) 2 (AUTO) 2 (AUTO) 2 (AUTO)
S3:2 (AUTO) 2 (AUTO) 2 (AUTO) 2 (AUTO)
**Common Setup Structure**
mmCfgBase: 6 (AUTO)
mmCfgSize: 6 (AUTO)
mmiohBase: 0x00002000
CpuPaLimit: 0
mmiohSize: 3 (64GB per stack)
numaEn: 1
UmaClustering: 4
isocEn: 0
dcaEn: 0
**Common Var Structure **
resetRequired: 0
state: 0
numCpus: 0
socketPresentBitMap: 0x01
mmCfgBase: 0x80000000
meRequestedSize: 0
******* Collecting Early System Information - START *******
SBSP Socket: 0 Ways: 0x01 Ras: 0x06 Stepping: 0x04 DieCount: 4 Chop: XCC
Total Chas: 52 Cha List Map:
Cha List[0]: 0xBFCFF9FF
Cha List[1]: 0x0FEBFBFF
Total M3Kti: 04 Total KtiAgent: 04 Total M2M: 20 M2M list map: 0x000FFFFF
Current bus numbers:
Socket | Ins00 | Ins01 | Ins02 | Ins03 | Ins04 | Ins05 | Ins06 | Ins07 | Ins08 | Ins09 | Ins0A | Ins0B | Rsvd | Ubox0 | Ubox1 | LastBus | Seg
-----------------------------------------------------------------------------------------------------------------------------------------------
0 | 0x00 | 0x11 | 0x12 | 0x13 | 0x14 | 0x15 | 0x16 | 0x17 | 0x18 | 0x19 | 0x1A | 0x1B | --- | 0x1E | 0x1F | 0x1F | 0
1 | 0x20 | 0x21 | 0x22 | 0x23 | 0x24 | 0x25 | 0x26 | 0x27 | 0x28 | 0x29 | 0x2A | 0x2B | --- | 0x3E | 0x3F | 0x3F | 0
2 | 0x40 | 0x41 | 0x42 | 0x43 | 0x44 | 0x45 | 0x46 | 0x47 | 0x48 | 0x49 | 0x4A | 0x4B | --- | 0x5E | 0x5F | 0x5F | 0
3 | 0x60 | 0x61 | 0x62 | 0x63 | 0x64 | 0x65 | 0x66 | 0x67 | 0x68 | 0x69 | 0x6A | 0x6B | --- | 0x7E | 0x7F | 0x7F | 0
-----------------------------------------------------------------------------------------------------------------------------------------------
Assuming maximal config: TotCpus: 4 CpuList: 0x0F
Default UpiInterleaveMode: 0
Reset Type: Cold Reset
******* Collecting Early System Information - END *******
(Spr) UpiIpWrInit
MaxSocket 4, MaxKtiPort 4
UpiIpWrSingleInit
IpUpiIpInit(UpiAgent[0][0]):
UpiIpWrSingleInit
IpUpiIpInit(UpiAgent[0][1]):
UpiIpWrSingleInit
IpUpiIpInit(UpiAgent[0][2]):
UpiIpWrSingleInit
IpUpiIpInit(UpiAgent[0][3]):
UpiIpWrSingleInit
IpUpiIpInit(UpiAgent[1][0]):
UpiIpWrSingleInit
IpUpiIpInit(UpiAgent[1][1]):
UpiIpWrSingleInit
IpUpiIpInit(UpiAgent[1][2]):
UpiIpWrSingleInit
IpUpiIpInit(UpiAgent[1][3]):
UpiIpWrSingleInit
IpUpiIpInit(UpiAgent[2][0]):
UpiIpWrSingleInit
IpUpiIpInit(UpiAgent[2][1]):
UpiIpWrSingleInit
IpUpiIpInit(UpiAgent[2][2]):
UpiIpWrSingleInit
IpUpiIpInit(UpiAgent[2][3]):
UpiIpWrSingleInit
IpUpiIpInit(UpiAgent[3][0]):
UpiIpWrSingleInit
IpUpiIpInit(UpiAgent[3][1]):
UpiIpWrSingleInit
IpUpiIpInit(UpiAgent[3][2]):
UpiIpWrSingleInit
IpUpiIpInit(UpiAgent[3][3]):
******* Setting up Minimum Path - START *******
Constructing SBSP minimum path Topology Tree
--------------------------------------------
Adding SBSP (CPU0) to the tree
CPU0 Link Exchange
: LEP0(0,CPU1) Socket 0 Port 0:Primary - Peer Socket 1 Port 0 Secondary
: LEP1(1,CPU1) Socket 0 Port 1:Primary - Peer Socket 1 Port 1 Secondary
: LEP2(2,CPU1) Socket 0 Port 2:Primary - Peer Socket 1 Port 2 Secondary
: LEP3(3,CPU1) Socket 0 Port 3:Primary - Peer Socket 1 Port 3 Secondary
Adding CPU1 to the tree
Setting path between SBSP and CPU1.
In SBSP setting route to CPU1 using port 0.
In CPU1 using port 0 to set the M2UPCIe0 route.
CPU1 Link Exchange
: LEP0(0,CPU0) : LEP1(1,CPU0) : LEP2(2,CPU0) : LEP3(3,CPU0)
Setting boot path for CPU1
In CPU1 setting Cbo route to port 0
Socket[2] is removed
Socket[3] is removed
SBSP Minimum Path Tree
----------------------
Index Socket ParentPort Hop ParentIndex
00 CPU0 -- 0 --
01 CPU1 00 1 00
******* Setting up Minimum Path - END *******
******* Check for KTI Topology Degradation - START *******
Link Exchange Parameter
-----------------------
CPU0 : LEP0(0:CPU1) : LEP1(1:CPU1) : LEP2(2:CPU1) : LEP3(3:CPU1)
CPU1 : LEP0(0:CPU0) : LEP1(1:CPU0) : LEP2(2:CPU0) : LEP3(3:CPU0)
Already Reduced to Supported Topology
System will be treated 2S4L Configuration
******* Check for KTI Topology Degradation - END *******
******* Enable UBOX MMIO Addr Range - START *******
Current Bars:
Socket | SCF | PCU | MEM0 | MEM1 | MEM2 | MEM3 | MEM4 | MEM5 | MEM6 | MEM7 | SBREG |
-------------------------------------------------------------------------------------------------------------------------------------------------------
0 | 0xF8000000 | 0xF8200000 | 0xF8280000 | 0xF8300000 | 0xF8380000 | 0xF8400000 | 0xF8480000 | 0xF8500000 | 0xF8580000 | 0xF8600000 | 0xF8680000 |
1 | 0xF8800000 | 0xF8A00000 | 0xF8A80000 | 0xF8B00000 | 0xF8B80000 | 0xF8C00000 | 0xF8C80000 | 0xF8D00000 | 0xF8D80000 | 0xF8E00000 | 0xF8E80000 |
2 | 0xF9000000 | 0xF9200000 | 0xF9280000 | 0xF9300000 | 0xF9380000 | 0xF9400000 | 0xF9480000 | 0xF9500000 | 0xF9580000 | 0xF9600000 | 0xF9680000 |
3 | 0xF9800000 | 0xF9A00000 | 0xF9A80000 | 0xF9B00000 | 0xF9B80000 | 0xF9C00000 | 0xF9C80000 | 0xF9D00000 | 0xF9D80000 | 0xF9E00000 | 0xF9E80000 |
-------------------------------------------------------------------------------------------------------------------------------------------------------
******* Enable UBOX MMIO Addr Range - END *******
******* Process Straps Config - START *******
S3M Read SoftStrap Disabled, Exit.
******* Process Straps Config - END *******
******* Detecting IIO count - START *******
Socket 0 Stack Bitmap:F3F.
Stack Instance Bitmap:F3F.
IioCount: 10.
B2HotCount(LS): 00.
Socket 1 Stack Bitmap:F3F.
Stack Instance Bitmap:F3F.
IioCount: 10.
B2HotCount(LS): 00.
******* Detecting IIO count - END *******
******* Disable UBOX MMIO Addr Range - START *******
Current Bars:
Socket | SCF | PCU | MEM0 | MEM1 | MEM2 | MEM3 | MEM4 | MEM5 | MEM6 | MEM7 | SBREG |
-------------------------------------------------------------------------------------------------------------------------------------------------------
0 | 0x00000000 | 0x00000000 | 0x00000000 | 0x00000000 | 0x00000000 | 0x00000000 | 0x00000000 | 0x00000000 | 0x00000000 | 0x00000000 | 0x00000000 |
1 | 0x00000000 | 0x00000000 | 0x00000000 | 0x00000000 | 0x00000000 | 0x00000000 | 0x00000000 | 0x00000000 | 0x00000000 | 0x00000000 | 0x00000000 |
2 | 0x00000000 | 0x00000000 | 0x00000000 | 0x00000000 | 0x00000000 | 0x00000000 | 0x00000000 | 0x00000000 | 0x00000000 | 0x00000000 | 0x00000000 |
3 | 0x00000000 | 0x00000000 | 0x00000000 | 0x00000000 | 0x00000000 | 0x00000000 | 0x00000000 | 0x00000000 | 0x00000000 | 0x00000000 | 0x00000000 |
-------------------------------------------------------------------------------------------------------------------------------------------------------
******* Disable UBOX MMIO Addr Range - END *******
******* Checking KTIRC Input Structure - START *******
Desired MMCFG Config: Base = 0x80000000, Size = 0x10000000
OutSncPrefetchEn=4, OutSncEn=4
IpUpiGetCapability(UpiAgent[0][0], id=12):
IpUpiVersionSpecificConfigurationEnabled: unknown ID=2
IpWrError 0 49
IpUpiGetCapability(UpiAgent[0][0], id=7):
IpUpiGetCapability(UpiAgent[0][0], id=9):
IpUpiGetCapability(UpiAgent[0][0], id=10):
IpUpiGetCapability(UpiAgent[0][0], id=8):
IpUpiGetCapability(UpiAgent[0][1], id=12):
IpUpiVersionSpecificConfigurationEnabled: unknown ID=2
IpWrError 0 49
IpUpiGetCapability(UpiAgent[0][1], id=7):
IpUpiGetCapability(UpiAgent[0][1], id=9):
IpUpiGetCapability(UpiAgent[0][1], id=10):
IpUpiGetCapability(UpiAgent[0][1], id=8):
IpUpiGetCapability(UpiAgent[0][2], id=12):
IpUpiVersionSpecificConfigurationEnabled: unknown ID=2
IpWrError 0 49
IpUpiGetCapability(UpiAgent[0][2], id=7):
IpUpiGetCapability(UpiAgent[0][2], id=9):
IpUpiGetCapability(UpiAgent[0][2], id=10):
IpUpiGetCapability(UpiAgent[0][2], id=8):
IpUpiGetCapability(UpiAgent[0][3], id=12):
IpUpiVersionSpecificConfigurationEnabled: unknown ID=2
IpWrError 0 49
IpUpiGetCapability(UpiAgent[0][3], id=7):
IpUpiGetCapability(UpiAgent[0][3], id=9):
IpUpiGetCapability(UpiAgent[0][3], id=10):
IpUpiGetCapability(UpiAgent[0][3], id=8):
IpUpiGetCapability(UpiAgent[1][0], id=12):
IpUpiVersionSpecificConfigurationEnabled: unknown ID=2
IpWrError 0 49
IpUpiGetCapability(UpiAgent[1][0], id=7):
IpUpiGetCapability(UpiAgent[1][0], id=9):
IpUpiGetCapability(UpiAgent[1][0], id=10):
IpUpiGetCapability(UpiAgent[1][0], id=8):
IpUpiGetCapability(UpiAgent[1][1], id=12):
IpUpiVersionSpecificConfigurationEnabled: unknown ID=2
IpWrError 0 49
IpUpiGetCapability(UpiAgent[1][1], id=7):
IpUpiGetCapability(UpiAgent[1][1], id=9):
IpUpiGetCapability(UpiAgent[1][1], id=10):
IpUpiGetCapability(UpiAgent[1][1], id=8):
IpUpiGetCapability(UpiAgent[1][2], id=12):
IpUpiVersionSpecificConfigurationEnabled: unknown ID=2
IpWrError 0 49
IpUpiGetCapability(UpiAgent[1][2], id=7):
IpUpiGetCapability(UpiAgent[1][2], id=9):
IpUpiGetCapability(UpiAgent[1][2], id=10):
IpUpiGetCapability(UpiAgent[1][2], id=8):
IpUpiGetCapability(UpiAgent[1][3], id=12):
IpUpiVersionSpecificConfigurationEnabled: unknown ID=2
IpWrError 0 49
IpUpiGetCapability(UpiAgent[1][3], id=7):
IpUpiGetCapability(UpiAgent[1][3], id=9):
IpUpiGetCapability(UpiAgent[1][3], id=10):
IpUpiGetCapability(UpiAgent[1][3], id=8):
****** Selecting KTI freq. - START ******
Max supported KTI Speed requested: 16.0 GT/s
Selected KTI Freq is 16.0 GT/s
****** Selecting KTI freq. - END ******
MaxAddress=52
******* Checking KTIRC Input Structure - END *******
******* KTI NVRAM Verification - START *******
----------Update Kti Nvram in COLD BOOT ----------
******* KTI NVRAM Verification - END *******
******* Calculate Resource Allocation - START *******
S0 - AddressMap.hi=209F
S1 - AddressMap.hi=21BF
BitPos=2E
CPU Resource Allocation
--------------------------------------------------------------------------------------------------------------------------------------------------------------
| StkId | Seg | Bus | Io | IoApic | Mmiol | Mmioh | StkBmp |
--------------------------------------------------------------------------------------------------------------------------------------------------------------
CPU0 | | 0 | 0x00 - 0x7F | 0x0000 - 0x9FFF | 0xFEC00000 - 0xFECFFFFF | 0x90000000 - 0xC8FFFFFF | 0x00002000 00000000 - 0x0000209F FFFFFFFF | 0xF3F |
Ins00 | 0x00 | 0 | 0x00 - 0x14 | 0x0000 - 0x3FFF | 0xFEC00000 - 0xFECFFFFF | 0x90000000 - 0x957FFFFF | 0x00002000 00000000 - 0x0000200F FFFFFFFF | |
Ins01 | 0x01 | 0 | 0x15 - 0x25 | 0x4000 - 0x5FFF | 0xFFFFFFFF - 0x00000000 | 0x95800000 - 0x9F7FFFFF | 0x00002010 00000000 - 0x0000201F FFFFFFFF | |
Ins02 | 0x04 | 0 | 0x26 - 0x36 | 0x6000 - 0x6FFF | 0xFFFFFFFF - 0x00000000 | 0x9F800000 - 0xA93FFFFF | 0x00002020 00000000 - 0x0000202F FFFFFFFF | |
Ins03 | 0x03 | 0 | 0x37 - 0x47 | 0x7000 - 0x7FFF | 0xFFFFFFFF - 0x00000000 | 0xA9400000 - 0xB2FFFFFF | 0x00002030 00000000 - 0x0000203F FFFFFFFF | |
Ins04 | 0x05 | 0 | 0x48 - 0x58 | 0x8000 - 0x8FFF | 0xFFFFFFFF - 0x00000000 | 0xB3000000 - 0xBCBFFFFF | 0x00002040 00000000 - 0x0000204F FFFFFFFF | |
Ins05 | 0x02 | 0 | 0x59 - 0x69 | 0x9000 - 0x9FFF | 0xFFFFFFFF - 0x00000000 | 0xBCC00000 - 0xC67FFFFF | 0x00002050 00000000 - 0x0000205F FFFFFFFF | |
Ins06 | 0x06 | 0 | 0xFF - 0x00 | 0xFFFF - 0x0000 | 0xFFFFFFFF - 0x00000000 | 0xFFFFFFFF - 0x00000000 | 0xFFFFFFFF FFFFFFFF - 0x00000000 00000000 | |
Ins07 | 0x07 | 0 | 0xFF - 0x00 | 0xFFFF - 0x0000 | 0xFFFFFFFF - 0x00000000 | 0xFFFFFFFF - 0x00000000 | 0xFFFFFFFF FFFFFFFF - 0x00000000 00000000 | |
Ins08 | 0x08 | 0 | 0x6A - 0x6E | 0xFFFF - 0x0000 | 0xFFFFFFFF - 0x00000000 | 0xC6800000 - 0xC6FFFFFF | 0x00002060 00000000 - 0x0000206F FFFFFFFF | |
Ins09 | 0x09 | 0 | 0x6F - 0x73 | 0xFFFF - 0x0000 | 0xFFFFFFFF - 0x00000000 | 0xC7000000 - 0xC77FFFFF | 0x00002070 00000000 - 0x0000207F FFFFFFFF | |
Ins10 | 0x0A | 0 | 0x74 - 0x78 | 0xFFFF - 0x0000 | 0xFFFFFFFF - 0x00000000 | 0xC7800000 - 0xC7FFFFFF | 0x00002080 00000000 - 0x0000208F FFFFFFFF | |
Ins11 | 0x0B | 0 | 0x79 - 0x7D | 0xFFFF - 0x0000 | 0xFFFFFFFF - 0x00000000 | 0xC8000000 - 0xC87FFFFF | 0x00002090 00000000 - 0x0000209F FFFFFFFF | |
Rsvd | 0x0C | 0 | 0xFB - 0xFD | 0xFFFF - 0x0000 | 0xFFFFFFFF - 0x00000000 | 0xFFFFFFFF - 0x00000000 | 0xFFFFFFFF FFFFFFFF - 0x00000000 00000000 | |
Ubox | 0x0D | 0 | 0x7E - 0x7F | 0xFFFF - 0x0000 | 0xFFFFFFFF - 0x00000000 | 0xC8800000 - 0xC8FFFFFF | 0xFFFFFFFF FFFFFFFF - 0x00000000 00000000 | |
CPU1 | | 0 | 0x80 - 0xFF | 0xA000 - 0xFFFF | 0xFFFFFFFF - 0x00000000 | 0xC9000000 - 0xFBFFFFFF | 0x000020A0 00000000 - 0x0000213F FFFFFFFF | 0xF3F |
Ins00 | 0x00 | 0 | 0x80 - 0x96 | 0xA000 - 0xAFFF | 0xFFFFFFFF - 0x00000000 | 0xC9000000 - 0xD13FFFFF | 0x000020A0 00000000 - 0x000020AF FFFFFFFF | |
Ins01 | 0x01 | 0 | 0x97 - 0xA6 | 0xB000 - 0xBFFF | 0xFFFFFFFF - 0x00000000 | 0xD1400000 - 0xD97FFFFF | 0x000020B0 00000000 - 0x000020BF FFFFFFFF | |
Ins02 | 0x04 | 0 | 0xA7 - 0xB6 | 0xC000 - 0xCFFF | 0xFFFFFFFF - 0x00000000 | 0xD9800000 - 0xE17FFFFF | 0x000020C0 00000000 - 0x000020CF FFFFFFFF | |
Ins03 | 0x03 | 0 | 0xB7 - 0xC6 | 0xD000 - 0xDFFF | 0xFFFFFFFF - 0x00000000 | 0xE1800000 - 0xE97FFFFF | 0x000020D0 00000000 - 0x000020DF FFFFFFFF | |
Ins04 | 0x05 | 0 | 0xC7 - 0xD6 | 0xE000 - 0xEFFF | 0xFFFFFFFF - 0x00000000 | 0xE9800000 - 0xF17FFFFF | 0x000020E0 00000000 - 0x000020EF FFFFFFFF | |
Ins05 | 0x02 | 0 | 0xD7 - 0xE6 | 0xF000 - 0xFFFF | 0xFFFFFFFF - 0x00000000 | 0xF1800000 - 0xF97FFFFF | 0x000020F0 00000000 - 0x000020FF FFFFFFFF | |
Ins06 | 0x06 | 0 | 0xFF - 0x00 | 0xFFFF - 0x0000 | 0xFFFFFFFF - 0x00000000 | 0xFFFFFFFF - 0x00000000 | 0xFFFFFFFF FFFFFFFF - 0x00000000 00000000 | |
Ins07 | 0x07 | 0 | 0xFF - 0x00 | 0xFFFF - 0x0000 | 0xFFFFFFFF - 0x00000000 | 0xFFFFFFFF - 0x00000000 | 0xFFFFFFFF FFFFFFFF - 0x00000000 00000000 | |
Ins08 | 0x08 | 0 | 0xE7 - 0xEB | 0xFFFF - 0x0000 | 0xFFFFFFFF - 0x00000000 | 0xF9800000 - 0xF9FFFFFF | 0x00002100 00000000 - 0x0000210F FFFFFFFF | |
Ins09 | 0x09 | 0 | 0xEC - 0xF0 | 0xFFFF - 0x0000 | 0xFFFFFFFF - 0x00000000 | 0xFA000000 - 0xFA7FFFFF | 0x00002110 00000000 - 0x0000211F FFFFFFFF | |
Ins10 | 0x0A | 0 | 0xF1 - 0xF5 | 0xFFFF - 0x0000 | 0xFFFFFFFF - 0x00000000 | 0xFA800000 - 0xFAFFFFFF | 0x00002120 00000000 - 0x0000212F FFFFFFFF | |
Ins11 | 0x0B | 0 | 0xF6 - 0xFA | 0xFFFF - 0x0000 | 0xFFFFFFFF - 0x00000000 | 0xFB000000 - 0xFB7FFFFF | 0x00002130 00000000 - 0x0000213F FFFFFFFF | |
Rsvd | 0x0C | 0 | 0xFB - 0xFD | 0xFFFF - 0x0000 | 0xFFFFFFFF - 0x00000000 | 0xFFFFFFFF - 0x00000000 | 0xFFFFFFFF FFFFFFFF - 0x00000000 00000000 | |
Ubox | 0x0D | 0 | 0xFE - 0xFF | 0xFFFF - 0x0000 | 0xFFFFFFFF - 0x00000000 | 0xFB800000 - 0xFBFFFFFF | 0xFFFFFFFF FFFFFFFF - 0x00000000 00000000 | |
******* Calculate Resource Allocation - END *******
******* Sync Up PBSPs - START *******
Setting Ubox Sticky to save KTI topology to 0x000000000000FF03
Verifying if the remote socket(s) checked-in.
Inter-socket CSR access En request POST_RESET_WARM reset
packageBspStepping[0]=4
packageBspStepping[1]=4
******* Sync Up PBSPs - END *******
******* Program Mmcfg and bus numbers - START *******
Initiate S1 update
KtiVar->MmCfgBase = 0x80000000
KtiVar->segmentSocket[0] = 0x00
KtiVar->SocketFirstBus[0] = 0x00
KtiVar->SocketLastBus[0] = 0x7F
KtiVar->SocketMmCfgBase[0]= 0x80000000
KtiVar->segmentSocket[1] = 0x00
KtiVar->SocketFirstBus[1] = 0x80
KtiVar->SocketLastBus[1] = 0xFF
KtiVar->SocketMmCfgBase[1]= 0x80000000
Current bus numbers:
Socket | Ins00 | Ins01 | Ins02 | Ins03 | Ins04 | Ins05 | Ins06 | Ins07 | Ins08 | Ins09 | Ins0A | Ins0B | Rsvd | Ubox0 | Ubox1 | LastBus | Seg
-----------------------------------------------------------------------------------------------------------------------------------------------
0 | 0x00 | 0x15 | 0x26 | 0x37 | 0x48 | 0x59 | --- | --- | 0x6A | 0x6F | 0x74 | 0x79 | --- | 0x7E | 0x7F | 0x7F | 0
1 | 0x80 | 0x97 | 0xA7 | 0xB7 | 0xC7 | 0xD7 | --- | --- | 0xE7 | 0xEC | 0xF1 | 0xF6 | --- | 0xFE | 0xFF | 0xFF | 0
-----------------------------------------------------------------------------------------------------------------------------------------------
Wait for S1 to update
Change in Cache size request POST_RESET_WARM reset
Change in Cache size request POST_RESET_WARM reset
Change in Cache size request POST_RESET_WARM reset
Change in Cache size request POST_RESET_WARM reset
Change in Cache size request POST_RESET_WARM reset
Change in Cache size request POST_RESET_WARM reset
Change in Cache size request POST_RESET_WARM reset
Change in Cache size request POST_RESET_WARM reset
Change in Cache size request POST_RESET_WARM reset
Change in Cache size request POST_RESET_WARM reset
Change in Cache size request POST_RESET_WARM reset
Change in Cache size request POST_RESET_WARM reset
Change in Cache size request POST_RESET_WARM reset
Change in Cache size request POST_RESET_WARM reset
Change in Cache size request POST_RESET_WARM reset
Change in Cache size request POST_RESET_WARM reset
Change in Cache size request POST_RESET_WARM reset
Change in Cache size request POST_RESET_WARM reset
Change in Cache size request POST_RESET_WARM reset
Change in Cache size request POST_RESET_WARM reset
******* Program Mmcfg and bus numbers - END *******
Current Bars:
Socket | SCF | PCU | MEM0 | MEM1 | MEM2 | MEM3 | MEM4 | MEM5 | MEM6 | MEM7 | SBREG |
-------------------------------------------------------------------------------------------------------------------------------------------------------
0 | 0xC8800000 | 0xC8A00000 | 0xC8A80000 | 0xC8B00000 | 0xC8B80000 | 0xC8C00000 | 0xC8C80000 | 0xC8D00000 | 0xC8D80000 | 0xC8E00000 | 0xC8E80000 |
1 | 0xFB800000 | 0xFBA00000 | 0xFBA80000 | 0xFBB00000 | 0xFBB80000 | 0xFBC00000 | 0xFBC80000 | 0xFBD00000 | 0xFBD80000 | 0xFBE00000 | 0xFBE80000 |
-------------------------------------------------------------------------------------------------------------------------------------------------------
******* Programming Misc CSRs before WR - START *******
******* Programming Misc CSRs before WR - END *******
******* Pre-work before MDFIS Training *******
S0 S3M_S3MFW_CFR_SVN_N0_S3M_TREG_REG : 00000000
S0 S3M_S3MFW_REVID_N0_S3M_TREG_REG : 00000000
S0 S3M_S3MFW_CFR_SVN_N1_S3M_TREG_REG : 00010001
S0 S3M_S3MFW_REVID_N1_S3M_TREG_REG : 0000001E
******* Mdfs Sweep Training START *******
Get Uncore P0 Ratio = 24, Uncore Pm Ratio = 8
Dispatching command to notify Pbsp S1 to go to halt state
Send the Pipe data to S1 Successfully!
Mdfs training send command to pcode
All PBSPs resume from halt START
All PBSPs resume from halt END
Dispatching command to notify Pbsp S1 to go to halt state
Send the Pipe data to S1 Successfully!
Mdfs training send command to pcode
All PBSPs resume from halt START
All PBSPs resume from halt END
Dispatching command to notify Pbsp S1 to go to halt state
Send the Pipe data to S1 Successfully!
Mdfs training send command to pcode
All PBSPs resume from halt START
All PBSPs resume from halt END
******* Mdfs Sweep Training END *******
******* Post-work after MDFIS Training *******
******* Full Speed Transition - START *******
IpUpiVersionSpecificConfigurationEnabled: unknown ID=5
IpWrError 0 49
IpUpiVersionSpecificConfigurationEnabled: unknown ID=5
IpWrError 0 49
IpUpiVersionSpecificConfigurationEnabled: unknown ID=5
IpWrError 0 49
IpUpiVersionSpecificConfigurationEnabled: unknown ID=5
IpWrError 0 49
IpUpiVersionSpecificConfigurationEnabled: unknown ID=5
IpWrError 0 49
IpUpiVersionSpecificConfigurationEnabled: unknown ID=5
IpWrError 0 49
IpUpiVersionSpecificConfigurationEnabled: unknown ID=5
IpWrError 0 49
IpUpiVersionSpecificConfigurationEnabled: unknown ID=5
IpWrError 0 49
Skip UPI speed transition as there is a comming reset!
******* Full Speed Transition - END *******
******* Programming Credits - START *******
SPR M2IOSF -> M2UPI credit value: 34 is bigger than 31, force it to 31.
SPR M2IOSF -> M2UPI credit value: 34 is bigger than 31, force it to 31.
SPR M2IOSF -> M2UPI credit value: 34 is bigger than 31, force it to 31.
SPR M2IOSF -> M2UPI credit value: 34 is bigger than 31, force it to 31.
SPR M2IOSF -> M2UPI credit value: 50 is bigger than 31, force it to 31.
SPR M2IOSF -> M2UPI credit value: 50 is bigger than 31, force it to 31.
SPR M2IOSF -> M2UPI credit value: 33 is bigger than 31, force it to 31.
SPR M2IOSF -> M2UPI credit value: 49 is bigger than 31, force it to 31.
SPR M2IOSF -> M2UPI credit value: 33 is bigger than 31, force it to 31.
SPR M2IOSF -> M2UPI credit value: 49 is bigger than 31, force it to 31.
SPR M2IOSF -> M2UPI credit value: 34 is bigger than 31, force it to 31.
SPR M2IOSF -> M2UPI credit value: 34 is bigger than 31, force it to 31.
SPR M2IOSF -> M2UPI credit value: 34 is bigger than 31, force it to 31.
SPR M2IOSF -> M2UPI credit value: 34 is bigger than 31, force it to 31.
SPR M2IOSF -> M2UPI credit value: 50 is bigger than 31, force it to 31.
SPR M2IOSF -> M2UPI credit value: 50 is bigger than 31, force it to 31.
SPR M2IOSF -> M2UPI credit value: 33 is bigger than 31, force it to 31.
SPR M2IOSF -> M2UPI credit value: 49 is bigger than 31, force it to 31.
SPR M2IOSF -> M2UPI credit value: 33 is bigger than 31, force it to 31.
SPR M2IOSF -> M2UPI credit value: 49 is bigger than 31, force it to 31.
Mesh Credit Program request POST_RESET_WARM reset
******* Programming Credits - END *******
******* Pcu Misc Config - START *******
******* Pcu Misc Config - END *******
Setup Uncore Misc:
Write Socket 0 GLOBAL_PKG_C_S_CONTROL_REGISTER = 4
Write Socket 1 GLOBAL_PKG_C_S_CONTROL_REGISTER = 100
:INIT - BIOS_RESET_CPL: Set CPL1 on #S1
:INIT - BIOS_RESET_CPL: Set CPL1 on #S0
Initalize DMI RCRB region.
SetRcrbBar (): RcrbBase = 0x90000000
Warning: Created a Memory Hole: 0x90002000 ~ 0x9001FFFF
MEMBAR0: Base = 0x90020000, Size = 0x20000
Socket: 0;DMI MemBar locates on 0x90020000, Size: 0x20000
ProgramNumOfChaPerCluster
ProgramNumOfChaPerCluster
*******SOCKET1 STACKID SWAPPING - START *******
*******SOCKET1 STACKID SWAPPING - END *******
Current bus numbers:
Socket | Ins00 | Ins01 | Ins02 | Ins03 | Ins04 | Ins05 | Ins06 | Ins07 | Ins08 | Ins09 | Ins0A | Ins0B | Rsvd | Ubox0 | Ubox1 | LastBus | Seg
-----------------------------------------------------------------------------------------------------------------------------------------------
0 | 0x00 | 0x15 | 0x26 | 0x37 | 0x48 | 0x59 | --- | --- | 0x6A | 0x6F | 0x74 | 0x79 | --- | 0x7E | 0x7F | 0x7F | 0
1 | --- | 0x97 | 0xA7 | 0xB7 | 0xC7 | 0xD7 | 0x80 | --- | 0xE7 | 0xEC | 0xF1 | 0xF6 | --- | 0xFE | 0xFF | 0xFF | 0
-----------------------------------------------------------------------------------------------------------------------------------------------
Get FM_PCIE_FV_BIF_EN Status = Success, GpioVal = 0
**KTI Output Structure **
OutD2KCreditConfig: 0 [1:Low,2:Med,3:High]
SnoopThrottleConfig: 0 [0:Dis,1:Low,2:Med,3:High,4:Auto]
OutUpiAffinityEn for CHA and M2M: 0
OutTwoSktTopology : 5
OutM2iosfToUpiAffinity: 1
OutPmonConfig: 2 [1:Reduced,2:Full,3:Auto,0:Disabled]
OutM2IosfPmonAccessControl: 0 [0:Restricted,1:Full,2:Auto]
OutD2kEn: 0
OutLegacyVgaSoc: 0
OutLegacyVgaStack: 0
OutIsocEn: 0
OutHitMeEn: 1
OutSncEn: 4 (SNC4)
OutUmaClustering: 0
OutSysDirectoryModeEn: 1
OutKtiPrefetch: 0
OutXptPrefetch: 0
OutXptRemotePrefetch: 0
OutSncPrefetchEn: 4
OutSncGbAlignRequired: 0
OutIsRouteThrough: 0
OutStaleAtoSOptEn: 2
OutSystemRasType: 6 (ADVANCED)
OutIoDcMode: 5 (IODC_EN_REM_INVITOM_AND_WCILF)
KtiCurrentLinkSpeedMode: 0 (SLOW)
OutKtiLinkSpeed: 2 (16.0)
OutKtiLinkL0pEn: 0 (DISABLED)
OutKtiLinkL1En: 1 (ENABLED)
OutKtiFailoverEn: 1 (ENABLED)
OutKtiCrcMode: 0 (16BIT)
OutBoardVsCpuConflict: 0x0
OutKtiAdaptationEnable: 0x0
OutKtiPerLinkL1En (per port):
S0:0 0 0 0
S1:0 0 0 0
S2:0 0 0 0
S3:0 0 0 0
PchPresentBitMap: 0x01
OutKtiFpgaPresent (per socket): S0: 0 S1: 0 S2: 0 S3: 0
OutKtiFpgaEnable (per socket): S0: 0 S1: 0 S2: 0 S3: 0
OutFpgaHomeAgent (per socket): S0: 0 S1: 0 S2: 0 S3: 0
OutFpgaCacheAgent (per socket): S0: 0 S1: 0 S2: 0 S3: 0
OutStackDisableBitMap (per socket): S0: 0x0 S1: 0x0 S2: 0x0 S3: 0x0
mmCfgBase: 0x80000000
mmCfgSize: 0x10000000
mmiolBase: 0x90000000
mmiolSize: 0x6C000000
mmiohBase: 0x00002000
lowGap : 0x20
SecondaryNodeBitMap: 0x00
CpuPaLimit: 0
KtiInternalGlobal:
->SnoopFanoutEn: 0
->SysOsbEn: 1
->D2cEn: 1
->D2kEn: 0
->SnoopFilter: 0
->DualLinksInterleavingMode: 2
->UpiInterleaveMode: 2
->EightSocketTopology: 0
->SnoopFanoutChaInterleaveEn: 0
KtiLinkVnaOverride (per port - final values):
S0:254 254 254 254
S1:254 254 254 254
S2:254 254 254 254
S3:254 254 254 254
IIO STACK rootbus ID mapping table
Stack ID | Root Bus ID
0 ------- 0
1 ------- 1
2 ------- 2
3 ------- 3
4 ------- 4
5 ------- 5
6 ------- 6
7 ------- 7
8 ------- 8
9 ------- 9
10 ------- 10
11 ------- 11
OutDfxPrqBlockEn: 0
OutDfxAeg0CounterLowVal: 40
OutDfxAeg0CounterHighVal: 60
**KTI Output Structure End**
******* KTIRC Exit *******
KTI Init completed! Reset Requested: 2
IIO EarlyLink Init Start.
HcxType[0] = NONE
[IIO](VMD) [0] VMD disabled for RPs init.
MS2IOSF Traffic Controller Credits: Recipe Revision v1.11
Program HW_INIT using SB access
Program HW_INIT using SB access
Program HW_INIT using SB access
Program HW_INIT using SB access
Program HW_INIT using SB access
Program HW_INIT using SB access
Program HW_INIT using SB access
Program HW_INIT using SB access
Program HW_INIT using SB access
[0] Cpxsmb enabled
WARNING: Platform does not support uplink port!
HcxType[1] = NONE
[IIO](VMD) [1] VMD disabled for RPs init.
MS2IOSF Traffic Controller Credits: Recipe Revision v1.11
Program HW_INIT using SB access
Program HW_INIT using SB access
Program HW_INIT using SB access
Program HW_INIT using SB access
Program HW_INIT using SB access
Program HW_INIT using SB access
Program HW_INIT using SB access
Program HW_INIT using SB access
Program HW_INIT using SB access
Program HW_INIT using SB access
[1] Cpxsmb enabled
IIO EarlyLink Init completed! Reset Requested: 2
RC debug buffering, compression, and sync ready
Pipe Init starting...
Pass PIPE_DISPATCH_SYNCH_PSYSHOST to socket 1
Pass PeiPipeFollowerInit
CAR MEM Range 0xFE800000 - 0xFE97A14F
Pass pointer to Host: 0xFE800014
Sending address of Memory Policy: 0xFE96FF80
Pass boot mode 0
Send data buffer
Send data dwordcount 5E854
Send data...complete
CAR MEM Range2 0xFE9DC000 - 0xFE9DFFFF
Send data buffer
Send data dwordcount 1000
Send data...complete
Send data buffer
Send data dwordcount 18F
Send data...complete
N1 Checked into Pipe
Pipe Init completed! Reset Requested: 2
CPU Feature Early Config starting...
CpuInit Start
CpuUncoreInit()
: Get UncoreRatioLimit MaxClrRatio: 24, MinClrRatio: 8, UncoreRatioLimit.Uint32 = 0x818
: Get UncoreRatioLimit MaxClrRatio: 24, MinClrRatio: 8, UncoreRatioLimit.Uint32 = 0x818
:UFS: Update BIOS_SPARE2_PCU Bit[20] = 0 on S0
Write Socket 0 MSR_UNCORE_RATIO_LIMIT.MinClrRatio [14:8] = 8, MSR_UNCORE_RATIO_LIMIT.MaxClrRatio [6:0] = 24
:UFS: Update BIOS_SPARE2_PCU Bit[20] = 0 on S1
Write Socket 1 MSR_UNCORE_RATIO_LIMIT.MinClrRatio [14:8] = 8, MSR_UNCORE_RATIO_LIMIT.MaxClrRatio [6:0] = 24
Get socket PPIN
: PPIN = 22E546CB1AD8E915
Get socket PPIN
: PPIN = 22E548CB80015B4D
:: ProgramProcessorFlexRatio()
:: System Capable : AVX SST-CP SST-BF
1 1 0
:: SstPpCapableSystem : LevelEnableMask MaxLevel
0 00 00
S0_0 FusedCoresMask = 0x0DABBB6EAF4EE9DB FusedCoreCount = 40
GetAllConfigTdpLevels() Enter
S0_0 ConfigTdpLevel(0) IssCoreMask = 0x0DABBB6EAF4EE9DB IssCoreCount = 40
GetAllConfigTdpLevels() Exit
:: S0 MaxRatio : MinRatio : MinOpRatio : ConfigTdpMaxLevel
17 08 05 02
:: S0 Current SST-PP Level : Current SST-PP Lock
00 0
Level : PkgTDP : SSE P1 : AVX2 P1 : AVX3 P1 : Core Count
0 : 000350 : 000017 : 000014 : 000011 : 040, [0] 40
3 : 000000 : 000000 : 000000 : 000000 : 000, [0] 00
4 : 000000 : 000000 : 000000 : 000000 : 000, [0] 00
Level : Turbo Ratio Limit - SSE P1 : AVX2 P1 : AVX3 P1
0 : - : 181818191A1E2023 : 17171718191E2023 : 16161617171D1F22
3 : - : 0000000000000000 : 0000000000000000 : 0000000000000000
4 : - : 0000000000000000 : 0000000000000000 : 0000000000000000
Level : TJMax : CoreMask
0 : 100 : [0] 0DABBB6EAF4EE9DB
3 : 000 : [0] 0000000000000000
4 : 000 : [0] 0000000000000000
Level : SstBf - P1_Hi : P1_Lo : CoreMask
0 : 0000 : 0000 : [0] 0000000000000000
3 : 0000 : 0000 : [0] 0000000000000000
4 : 0000 : 0000 : [0] 0000000000000000
Core Ratio Info
Level : P0 : P1 : Pn : Pm
0 : 000035 : 000017 : 000008 : 000005
3 : 000000 : 000000 : 000000 : 000000
4 : 000000 : 000000 : 000000 : 000000
Uncore Ratio Info
Level : P0 : P1 : Pn : Pm
0 : 000024 : 000014 : 000008 : 000008
3 : 000000 : 000000 : 000000 : 000000
4 : 000000 : 000000 : 000000 : 000000
S1_0 FusedCoresMask = 0x0DB9772F6F4EE9DB FusedCoreCount = 40
GetAllConfigTdpLevels() Enter
S1_0 ConfigTdpLevel(0) IssCoreMask = 0x0DB9772F6F4EE9DB IssCoreCount = 40
GetAllConfigTdpLevels() Exit
:: S1 MaxRatio : MinRatio : MinOpRatio : ConfigTdpMaxLevel
17 08 05 02
:: S1 Current SST-PP Level : Current SST-PP Lock
00 0
Level : PkgTDP : SSE P1 : AVX2 P1 : AVX3 P1 : Core Count
0 : 000350 : 000017 : 000014 : 000011 : 040, [0] 40
3 : 000000 : 000000 : 000000 : 000000 : 000, [0] 00
4 : 000000 : 000000 : 000000 : 000000 : 000, [0] 00
Level : Turbo Ratio Limit - SSE P1 : AVX2 P1 : AVX3 P1
0 : - : 181818191A1E2023 : 17171718191E2023 : 16161617171D1F22
3 : - : 0000000000000000 : 0000000000000000 : 0000000000000000
4 : - : 0000000000000000 : 0000000000000000 : 0000000000000000
Level : TJMax : CoreMask
0 : 100 : [0] 0DB9772F6F4EE9DB
3 : 000 : [0] 0000000000000000
4 : 000 : [0] 0000000000000000
Level : SstBf - P1_Hi : P1_Lo : CoreMask
0 : 0000 : 0000 : [0] 0000000000000000
3 : 0000 : 0000 : [0] 0000000000000000
4 : 0000 : 0000 : [0] 0000000000000000
Core Ratio Info
Level : P0 : P1 : Pn : Pm
0 : 000035 : 000017 : 000008 : 000005
3 : 000000 : 000000 : 000000 : 000000
4 : 000000 : 000000 : 000000 : 000000
Uncore Ratio Info
Level : P0 : P1 : Pn : Pm
0 : 000024 : 000014 : 000008 : 000008
3 : 000000 : 000000 : 000000 : 000000
4 : 000000 : 000000 : 000000 : 000000
:: CommonMaxRatio : CommonMinRatio : Target Ratio
17 08 17
:: IssTdpLevel : AvxP1Level
00 00
:: TargetRatio: 17 is ready (RatioChangeFlag: 0), SstPpCurrentLevel: 0
:: SetActiveCoresAndLpEnableDisable()
:: S0_0 BIST_FAILURE_LOCAL_MASK = 0000000000000000
:: S0 setup input disable = 0000000000000000
:: S0_0 AvailCoresMask = 0DABBB6EAF4EE9DB
:: S0_0 ResolvedCoresMask = 0DABBB6EAF4EE9DB
:: S0_0 DesiredCoresCurrent = 0000000000000000
:: S0_0 BistResultMask = 0000000000000000
:: S0_0 CoreDisableReqMask = 0000000000000000
:: S0_0 NumberOfCoresDisabledMask = 0000000000000000
:: CheckCpuBist = 1
:: CoreFailover = 1
[s0_0] MaxLpEnable = 0, LpCapable = 1, MaxLpEnable knob = 0, Lock Status = 0
S0_0 MaxEnabledCores = 0
S0_0 FusedCoreCount = 40
S0_0 NonSparingCoresMask= FFFFFFFFFFFFFFFF
:: S0_0 DesiredCoresNew = 0000000000000000
:: S1_0 BIST_FAILURE_LOCAL_MASK = 0000000000000000
:: S1 setup input disable = 0000000000000000
:: S1_0 AvailCoresMask = 0DB9772F6F4EE9DB
:: S1_0 ResolvedCoresMask = 0DB9772F6F4EE9DB
:: S1_0 DesiredCoresCurrent = 0000000000000000
:: S1_0 BistResultMask = 0000000000000000
:: S1_0 CoreDisableReqMask = 0000000000000000
:: S1_0 NumberOfCoresDisabledMask = 0000000000000000
:: CheckCpuBist = 1
:: CoreFailover = 1
[s1_0] MaxLpEnable = 0, LpCapable = 1, MaxLpEnable knob = 0, Lock Status = 0
S1_0 MaxEnabledCores = 0
S1_0 FusedCoreCount = 40
S1_0 NonSparingCoresMask= FFFFFFFFFFFFFFFF
:: S1_0 DesiredCoresNew = 0000000000000000
CPUMISC Current S 0:
ITBM is not supported
CPUMISC Current S 1:
ITBM is not supported
CPU Feature Early Config completed! Reset Requested: 2
[CSR PCI BAR Access] Address:0xFFFFFFFF000000D4; PCI Cmd: 0xFFFF
START_MRC_RUN
Detect ColdBootSlowRequiredFlag and will force slow cold boot.
N0: Bus Instance = 0; I2C speed = 3; I3C speed = 2; Bus mode = 0
N0: Bus Instance = 1; I2C speed = 3; I3C speed = 2; Bus mode = 0
N0: Bus Instance = 0; I2C speed = 3; I3C speed = 2; Bus mode = 1
N0: Bus Instance = 0; I2C speed = 3; I3C speed = 2; Bus mode = 1
N0: Bus Instance = 0; I2C speed = 3; I3C speed = 2; Bus mode = 1
N0: Bus Instance = 0; I2C speed = 3; I3C speed = 2; Bus mode = 1
N0: Bus Instance = 0; I2C speed = 3; I3C speed = 2; Bus mode = 1
N0: Bus Instance = 0; I2C speed = 3; I3C speed = 2; Bus mode = 1
N0: Bus Instance = 1; I2C speed = 3; I3C speed = 2; Bus mode = 1
N0: Bus Instance = 1; I2C speed = 3; I3C speed = 2; Bus mode = 1
N0: Bus Instance = 1; I2C speed = 3; I3C speed = 2; Bus mode = 1
N0: Bus Instance = 1; I2C speed = 3; I3C speed = 2; Bus mode = 1
N0: Bus Instance = 1; I2C speed = 3; I3C speed = 2; Bus mode = 1
N0: Bus Instance = 1; I2C speed = 3; I3C speed = 2; Bus mode = 1
N0: Bus Instance = 0; I2C speed = 3; I3C speed = 2; Bus mode = 0
N0: Bus Instance = 0; I2C speed = 3; I3C speed = 2; Bus mode = 0
N0: Bus Instance = 0; I2C speed = 3; I3C speed = 2; Bus mode = 0
N0: Bus Instance = 0; I2C speed = 3; I3C speed = 2; Bus mode = 0
N0: Bus Instance = 0; I2C speed = 3; I3C speed = 2; Bus mode = 0
N0: Bus Instance = 0; I2C speed = 3; I3C speed = 2; Bus mode = 0
N0: Bus Instance = 1; I2C speed = 3; I3C speed = 2; Bus mode = 0
N0: Bus Instance = 1; I2C speed = 3; I3C speed = 2; Bus mode = 0
N0: Bus Instance = 1; I2C speed = 3; I3C speed = 2; Bus mode = 0
N0: Bus Instance = 1; I2C speed = 3; I3C speed = 2; Bus mode = 0
N0: Bus Instance = 1; I2C speed = 3; I3C speed = 2; Bus mode = 0
N0: Bus Instance = 1; I2C speed = 3; I3C speed = 2; Bus mode = 0
N0: Dimm changed.
Processors changed.
Get socket PPIN
: PPIN = 22E546CB1AD8E915
setupChanged: 1
Clearing the MRC NVRAM structure.
bootMode = NormalBoot
subBootMode = ColdBoot
[ScktId: 0] Parallel Mode Dispatch -- Started
Dispatch N1 for MemInit
N1 Entering MRC
Detect ColdBootSlowRequiredFlag and will force slow cold boot.
N1: Bus Instance = 0; I2C speed = 3; I3C speed = 2; Bus mode = 0
N1: Bus Instance = 1; I2C speed = 3; I3C speed = 2; Bus mode = 0
N1: Bus Instance = 0; I2C speed = 3; I3C speed = 2; Bus mode = 1
N1: Bus Instance = 0; I2C speed = 3; I3C speed = 2; Bus mode = 1
N1: Bus Instance = 0; I2C speed = 3; I3C speed = 2; Bus mode = 1
N1: Bus Instance = 0; I2C speed = 3; I3C speed = 2; Bus mode = 1
N1: Bus Instance = 0; I2C speed = 3; I3C speed = 2; Bus mode = 1
N1: Bus Instance = 0; I2C speed = 3; I3C speed = 2; Bus mode = 1
N1: Bus Instance = 1; I2C speed = 3; I3C speed = 2; Bus mode = 1
N1: Bus Instance = 1; I2C speed = 3; I3C speed = 2; Bus mode = 1
N1: Bus Instance = 1; I2C speed = 3; I3C speed = 2; Bus mode = 1
N1: Bus Instance = 1; I2C speed = 3; I3C speed = 2; Bus mode = 1
N1: Bus Instance = 1; I2C speed = 3; I3C speed = 2; Bus mode = 1
N1: Bus Instance = 1; I2C speed = 3; I3C speed = 2; Bus mode = 1
N1: Bus Instance = 0; I2C speed = 3; I3C speed = 2; Bus mode = 0
N1: Bus Instance = 0; I2C speed = 3; I3C speed = 2; Bus mode = 0
N1: Bus Instance = 0; I2C speed = 3; I3C speed = 2; Bus mode = 0
N1: Bus Instance = 0; I2C speed = 3; I3C speed = 2; Bus mode = 0
N1: Bus Instance = 0; I2C speed = 3; I3C speed = 2; Bus mode = 0
N1: Bus Instance = 0; I2C speed = 3; I3C speed = 2; Bus mode = 0
N1: Bus Instance = 1; I2C speed = 3; I3C speed = 2; Bus mode = 0
N1: Bus Instance = 1; I2C speed = 3; I3C speed = 2; Bus mode = 0
N1: Bus Instance = 1; I2C speed = 3; I3C speed = 2; Bus mode = 0
N1: Bus Instance = 1; I2C speed = 3; I3C speed = 2; Bus mode = 0
N1: Bus Instance = 1; I2C speed = 3; I3C speed = 2; Bus mode = 0
N1: Bus Instance = 1; I2C speed = 3; I3C speed = 2; Bus mode = 0
N1: Dimm changed.
Get socket PPIN
: PPIN = 22E548CB80015B4D
setupChanged: 1
Clearing the MRC NVRAM structure.
bootMode = NormalBoot
subBootMode = ColdBoot
[ScktId: 1] Parallel Mode Dispatch -- Started
[ScktId: 1] Parallel Mode Dispatch - 4ms
[ScktId: 0] Parallel Mode Dispatch - 203ms
[ScktId: 1] Pipe Sync AP Boot Mode -- Started
[ScktId: 0] Pipe Sync AP Boot Mode -- Started
[ScktId: 0] Pipe Sync AP Boot Mode - 9ms
[ScktId: 1] Pipe Sync AP Boot Mode - 13ms
N1 Checked into Pipe
[ScktId: 0] Select Boot Mode -- Started
DetermineBootMode: ColdBoot
[ScktId: 0] Select Boot Mode - 8ms
[ScktId: 1] Pipe Sync SBSP Boot Mode -- Started
[ScktId: 0] Pipe Sync SBSP Boot Mode -- Started
[ScktId: 1] Pipe Sync SBSP Boot Mode - 9ms
[ScktId: 0] Pipe Sync SBSP Boot Mode - 9ms
[ScktId: 1] Init Structures Late -- Started
[ScktId: 0] Init Structures Late -- Started
[ScktId: 1] Init Structures Late - 8ms
[ScktId: 0] Init Structures Late - 8ms
[ScktId: 1] Detect DIMM Configuration -- Started
[ScktId: 0] Detect DIMM Configuration -- Started
N1: Bus Instance = 0; I2C speed = 3; I3C speed = 2; Bus mode = 0
N0: Bus Instance = 0; I2C speed = 3; I3C speed = 2; Bus mode = 0
N1: Bus Instance = 0; I2C speed = 3; I3C speed = 2; Bus mode = 0
N0: Bus Instance = 0; I2C speed = 3; I3C speed = 2; Bus mode = 0
N1: Bus Instance = 0; I2C speed = 3; I3C speed = 2; Bus mode = 0
N0: Bus Instance = 0; I2C speed = 3; I3C speed = 2; Bus mode = 0
N1: Bus Instance = 0; I2C speed = 3; I3C speed = 2; Bus mode = 0
N0: Bus Instance = 0; I2C speed = 3; I3C speed = 2; Bus mode = 0
N1: Bus Instance = 0; I2C speed = 3; I3C speed = 2; Bus mode = 0
N0: Bus Instance = 0; I2C speed = 3; I3C speed = 2; Bus mode = 0
N1: Bus Instance = 0; I2C speed = 3; I3C speed = 2; Bus mode = 0
N0: Bus Instance = 0; I2C speed = 3; I3C speed = 2; Bus mode = 0
N1: Bus Instance = 1; I2C speed = 3; I3C speed = 2; Bus mode = 0
N0: Bus Instance = 1; I2C speed = 3; I3C speed = 2; Bus mode = 0
N1: Bus Instance = 1; I2C speed = 3; I3C speed = 2; Bus mode = 0
N0: Bus Instance = 1; I2C speed = 3; I3C speed = 2; Bus mode = 0
N1: Bus Instance = 1; I2C speed = 3; I3C speed = 2; Bus mode = 0
N0: Bus Instance = 1; I2C speed = 3; I3C speed = 2; Bus mode = 0
N1: Bus Instance = 1; I2C speed = 3; I3C speed = 2; Bus mode = 0
N0: Bus Instance = 1; I2C speed = 3; I3C speed = 2; Bus mode = 0
N1: Bus Instance = 1; I2C speed = 3; I3C speed = 2; Bus mode = 0
N0: Bus Instance = 1; I2C speed = 3; I3C speed = 2; Bus mode = 0
N1: Bus Instance = 1; I2C speed = 3; I3C speed = 2; Bus mode = 0
N0: Bus Instance = 1; I2C speed = 3; I3C speed = 2; Bus mode = 0
[ScktId: 1] Detect DIMM Configuration - 318ms
[ScktId: 0] Detect DIMM Configuration - 320ms
[ScktId: 1] Pipe Sync AP Data -- Started
[ScktId: 0] Pipe Sync AP Data -- Started
[ScktId: 0] Pipe Sync AP Data - 23ms
[ScktId: 1] Pipe Sync AP Data - 27ms
N1 Checked into Pipe
[ScktId: 0] Check POR Compatibility -- Started
[ScktId: 0] Check POR Compatibility - 6ms
N1 Checked into Pipe
[ScktId: 0] HBM Init Clock -- Started
PCU: API - Command->0xA6, sending data -> 0x0000F260
PCU: API - Command->0xA6, sending data -> 0x0000F260
[ScktId: 0] HBM Init Clock - 16ms
N1 Checked into Pipe
[ScktId: 0] Initialize clocks for all MemSs -- Started
N0: Platform segment mapping found. UseServerPor: 1; SegmentType: 7; ChopType: 3; PlatformSegment: 0
N0: Platform segment mapping found. UseServerPor: 1; SegmentType: 7; ChopType: 3; PlatformSegment: 0
N0: Platform segment mapping found. UseServerPor: 1; SegmentType: 7; ChopType: 3; PlatformSegment: 0
N0: Platform segment mapping found. UseServerPor: 1; SegmentType: 7; ChopType: 3; PlatformSegment: 0
N0: Platform segment mapping found. UseServerPor: 1; SegmentType: 7; ChopType: 3; PlatformSegment: 0
N0: Platform segment mapping found. UseServerPor: 1; SegmentType: 7; ChopType: 3; PlatformSegment: 0
N0: Platform segment mapping found. UseServerPor: 1; SegmentType: 7; ChopType: 3; PlatformSegment: 0
N0: Platform segment mapping found. UseServerPor: 1; SegmentType: 7; ChopType: 3; PlatformSegment: 0
Reset requested: non-MRC
PCU: API - Command->0xA6, sending data -> 0x8000F170
Reset requested: non-MRC
PCU: API - Command->0xA6, sending data -> 0x8000F170
[ScktId: 0] Initialize clocks for all MemSs - 103ms
[ScktId: 1] Pipe Sync SBSP Data -- Started
[ScktId: 0] Pipe Sync SBSP Data -- Started
[ScktId: 1] Pipe Sync SBSP Data - 22ms
[ScktId: 0] Pipe Sync SBSP Data - 22ms
[ScktId: 1] Unlock Memory -- Started
[ScktId: 0] Unlock Memory -- Started
[ScktId: 1] Unlock Memory - 7ms
[ScktId: 0] Unlock Memory - 7ms
[ScktId: 1] Pipe Sync AP Data -- Started
[ScktId: 0] Pipe Sync AP Data -- Started
[ScktId: 0] Pipe Sync AP Data - 23ms
[ScktId: 1] Pipe Sync AP Data - 26ms
[ScktId: 0] HBM Pre-Training -- Started
[ScktId: 1] HBM Pre-Training -- Started
HBMIO flows: set to 0xFFFFFF7F!
HBMIO flows: set to 0xFFFFFF7F!
Get socket PPIN
Get socket PPIN
: PPIN = 22E546CB1AD8E915
: PPIN = 22E548CB80015B4D
HBM frequency = 3200MHz
HBM frequency = 3200MHz
Socket0 HbmIo0, HW Rev: 0x110, FW Rev: 0x2180, Patch ID: 0x0, Unique ID: 0x18, Product ID: 0x2
Socket1 HbmIo0, HW Rev: 0x110, FW Rev: 0x2180, Patch ID: 0x0, Unique ID: 0x18, Product ID: 0x2
Socket0 HbmIo1, HW Rev: 0x110, FW Rev: 0x2180, Patch ID: 0x0, Unique ID: 0x18, Product ID: 0x2
Socket1 HbmIo1, HW Rev: 0x110, FW Rev: 0x2180, Patch ID: 0x0, Unique ID: 0x18, Product ID: 0x2
Socket0 HbmIo2, HW Rev: 0x110, FW Rev: 0x2180, Patch ID: 0x0, Unique ID: 0x18, Product ID: 0x2
Socket1 HbmIo2, HW Rev: 0x110, FW Rev: 0x2180, Patch ID: 0x0, Unique ID: 0x18, Product ID: 0x2
Socket0 HbmIo3, HW Rev: 0x110, FW Rev: 0x2180, Patch ID: 0x0, Unique ID: 0x18, Product ID: 0x2
Socket1 HbmIo3, HW Rev: 0x110, FW Rev: 0x2180, Patch ID: 0x0, Unique ID: 0x18, Product ID: 0x2
[ScktId: 0] HBM Pre-Training - 117ms
[ScktId: 1] HBM Pre-Training - 125ms
[ScktId: 0] AP HBM Information -- Started
[ScktId: 1] AP HBM Information -- Started
[ScktId: 0] AP HBM Information - 13ms
[ScktId: 1] AP HBM Information - 9ms
[ScktId: 0] Pipe Sync SBSP Status -- Started
[ScktId: 1] Pipe Sync SBSP Status -- Started
[ScktId: 1] Pipe Sync SBSP Status - 8ms
[ScktId: 0] Pipe Sync SBSP Status - 12ms
-- EXIT, status = MRC_STATUS_RESET_REQUIRED
-- EXIT, status = MRC_STATUS_RESET_REQUIRED
Total MRC time = 822ms
Total MRC time = 1026ms
STOP_MRC_RUN
Final Rc Heap usage:
******* Configure Mesh Mode - START *******
Configure Socket 0 2LM Hash -Enabled
Configure Socket 0 2LM Hash on KTI and IIO-Enabled
Configure Socket 1 2LM Hash -Enabled
Configure Socket 1 2LM Hash on KTI and IIO-Enabled
Socket 0 Mc 0 channel 0 enabled 1
Socket 0 Mc 0 Ch 0 maxDimm 1 Dimm = 0 numRanks= 1 TechIndex = 3 DimmSize 0x80
Memory Size = 0x80
Socket 0 has 1st 4G memory on Channel 0
Socket 0 Mc 0 channel 1 enabled 0
Socket 0 Mc 1 channel 2 enabled 1
Socket 0 Mc 1 Ch 0 maxDimm 1 Dimm = 0 numRanks= 1 TechIndex = 3 DimmSize 0x80
Memory Size = 0x80
Socket 0 Mc 1 channel 3 enabled 0
Socket 0 Mc 2 channel 4 enabled 1
Socket 0 Mc 2 Ch 0 maxDimm 1 Dimm = 0 numRanks= 1 TechIndex = 3 DimmSize 0x80
Memory Size = 0x80
Socket 0 Mc 2 channel 5 enabled 0
Socket 0 Mc 3 channel 6 enabled 1
Socket 0 Mc 3 Ch 0 maxDimm 1 Dimm = 0 numRanks= 1 TechIndex = 3 DimmSize 0x80
Memory Size = 0x80
Socket 0 Mc 3 channel 7 enabled 0
MaxHbmIo: 4 MemInfo->SncInfo[0].NumOfHbmioEnabled: 4
Socket 1 Mc 0 channel 0 enabled 1
Socket 1 Mc 0 Ch 0 maxDimm 1 Dimm = 0 numRanks= 1 TechIndex = 3 DimmSize 0x80
Memory Size = 0x80
Socket 1 Mc 0 channel 1 enabled 0
Socket 1 Mc 1 channel 2 enabled 1
Socket 1 Mc 1 Ch 0 maxDimm 1 Dimm = 0 numRanks= 1 TechIndex = 3 DimmSize 0x80
Memory Size = 0x80
Socket 1 Mc 1 channel 3 enabled 0
Socket 1 Mc 2 channel 4 enabled 1
Socket 1 Mc 2 Ch 0 maxDimm 1 Dimm = 0 numRanks= 1 TechIndex = 3 DimmSize 0x80
Memory Size = 0x80
Socket 1 Mc 2 channel 5 enabled 0
Socket 1 Mc 3 channel 6 enabled 1
Socket 1 Mc 3 Ch 0 maxDimm 1 Dimm = 0 numRanks= 1 TechIndex = 3 DimmSize 0x80
Memory Size = 0x80
Socket 1 Mc 3 channel 7 enabled 0
MaxHbmIo: 4 MemInfo->SncInfo[1].NumOfHbmioEnabled: 4
Socket 0
S0: SNC_Base_1 = 0000 GB
S0: SNC_Base_2 = 0004 GB
S0: SNC_Base_3 = 0004 GB
S0: SNC_Base_4 = 0004 GB
S0: SNC_Base_5 = 0004 GB
Socket 1
S1: SNC_Base_1 = 0004 GB
S1: SNC_Base_2 = 0004 GB
S1: SNC_Base_3 = 0004 GB
S1: SNC_Base_4 = 0004 GB
S1: SNC_Base_5 = 0004 GB
ProgramSncShadowReg
Socket:0 Base1 0x0FFF0000
Socket:0 Base2 0x1FE00004
Socket:0 Base3 0x00000004
Socket:0 Base4 0x00000004
Socket:0 Base5 0x00000004
Socket:0 UpperBase1 0x00000000
Socket:0 SncConfig 0x0000000A
Socket:1 Base1 0x0FFF0004
Socket:1 Base2 0x1FE00004
Socket:1 Base3 0x00000004
Socket:1 Base4 0x00000004
Socket:1 Base5 0x00000004
Socket:1 UpperBase1 0x00000000
Socket:1 SncConfig 0x0000000A
******* Configure Mesh Mode - END *******
S3M Provisioning SoftStrap Disabled, Exit.
PUcode Patch provisioning/commit flow
S3mPucodeCfrPatchProvisionCommit didn't find suitable CFR image, Exit.
S3M Patch provisioning/commit flow
Get Image :FF800090 11FF4
CFR Patch Provision start...
IFWI integrated S3M CFR patch revision SVN: 00000001, RevID: 0000001E.
S0 S3M_S3MFW_CFR_SVN_N0_S3M_TREG_REG : 00000000
S0 S3M_S3MFW_REVID_N0_S3M_TREG_REG : 00000000
S0 S3M_S3MFW_CFR_SVN_N1_S3M_TREG_REG : 00010001
S0 S3M_S3MFW_REVID_N1_S3M_TREG_REG : 0000001E
Committed region with the latest patch, skip provision.
Socket 0 Can't Provision, Skip.
IFWI integrated S3M CFR patch revision SVN: 00000001, RevID: 0000001E.
S1 S3M_S3MFW_CFR_SVN_N0_S3M_TREG_REG : 00000000
S1 S3M_S3MFW_REVID_N0_S3M_TREG_REG : 00000000
S1 S3M_S3MFW_CFR_SVN_N1_S3M_TREG_REG : 00010001
S1 S3M_S3MFW_REVID_N1_S3M_TREG_REG : 0000001E
Committed region with the latest patch, skip provision.
Socket 1 Can't Provision, Skip.
CFR Patch Commit start...
S0 S3M_S3MFW_CFR_SVN_N0_S3M_TREG_REG : 00000000
S0 S3M_S3MFW_REVID_N0_S3M_TREG_REG : 00000000
Socket 0 can't commit, skip
S1 S3M_S3MFW_CFR_SVN_N0_S3M_TREG_REG : 00000000
S1 S3M_S3MFW_REVID_N0_S3M_TREG_REG : 00000000
Socket 1 can't commit, skip
CFR Patch Provision/Commit Completed.
Reset Requested: 2
Pipe Exit starting...
Pipe Exit completed! Reset Requested: 2
Enhanced Warning Log:
Checking for Reset Requests...
ResetRequired: 02
[HECI Transport-1 PEI] Send pkt: 80040007
00: F3 01 00 00
[HECI Transport-1 PEI] Got pkt: 80050007
00: F3 81 00 00 00
Issue WARM RESET!
PROGRESS CODE: V03020003 I0
PROGRESS CODE: V03020002 I0
PROGRESS CODE: V03020003 I0
PROGRESS CODE: V03020002 I0
PROGRESS CODE: V03020003 I0
PROGRESS CODE: V03020002 I0
PROGRESS CODE: V03020003 I0
PROGRESS CODE: V03020002 I0
[IPMI PEI] BMC Device ID: 0x23, firmware version: 2.03 UpdateMode:1
[IPMI] BMC in Forced Update mode, skip waiting for BMC_READY.
PROGRESS CODE: V03020003 I0
PROGRESS CODE: V03020002 I0
PROGRESS CODE: V03020003 I0
PROGRESS CODE: V03020002 I0
InstallHeciTransportPpis, start
InstallHeciTransportPpis, end
[HECI CONTROL PEI] HECI Transport found: 2
[HECI Control-1 PEI]: ERROR: HeciControlSendAndReceiveSinglePch() : Heci 1 is not initialized
HECI: ME type not recognized (MEFS1: 0x00000355, MEFS2: 0x80508006)
Initialization is allowed
[HECI Transport-1 PEI] Send pkt: 80040007
00: F0 11 00 00
[HECI Transport-1 PEI] Got pkt: 80080007
00: F0 91 00 00 09 00 00 00
HECI: Create MeType HOB for ME: 1
HECI: Set MeType HOB info to: 1
[HECI] [ME] (MeType is ME_TYPE_SPS)
Initialization is allowed
PROGRESS CODE: V03020003 I0
PROGRESS CODE: V03020002 I0
PROGRESS CODE: V03020003 I0
PROGRESS CODE: V03020002 I0
IioVmdDisableForPchRpInit: DonePCH Series : EBG PCH
PCH Stepping : B0
PROGRESS CODE: V03020003 I0
PROGRESS CODE: V03020002 I0
PROGRESS CODE: V03020003 I0
PROGRESS CODE: V03020002 I0
PROGRESS CODE: V03020003 I0
PROGRESS CODE: V03020002 I0
UbaInitPeim: PlatformType=0x16
UbaInitPeim: PlatformType=0x16
UbaInitPeim: PlatformType=0x16
UbaInitPeim: PlatformType=0x16
PROGRESS CODE: V03020003 I0
PROGRESS CODE: V03020002 I0
PROGRESS CODE: V03020003 I0
PROGRESS CODE: V03020002 I0
UBA:GpioTable size 0x9CC, blocks: 0xD1.
UBA: Start ConfigureGpio().
UBA: ConfigureGpio() end.
Unable to read FlashSecOvrdVal
FiaMuxRecordsCount = 0
[HECI] PeiMeServerPolicy (MeType is ME_TYPE_SPS)
Can't finde more CFR image in CFR FV - Not Found!
PPR Variable not found or CRC mismatch - Status: 0x8000000E, Crc: 0x0, calc. Crc: 0x0!
UpdatePeiSecurityPolicy: Create Status=Success
FIT not found, skip LT-SX
Platform Type = 22
Bios ID: EGSDCRB1.ZHI.0091.D15.2211010626
PROGRESS CODE: V03020003 I0
[HECI Transport-1 PEI] Send pkt: 80010020
00: 01
[HECI Transport-1 PEI] Got pkt: 800B0020
00: 81 01 01 14 00 88 00 01 - 00 00 00
[HECI Transport-1 PEI] Send pkt: 80300008
00: 00 00 05 00 1A 00 00 00 - 00 00 00 00 1C 00 00 00
10: 00 00 00 00 00 00 00 00 - 00 00 00 00 00 00 00 00
20: 00 00 00 00 00 00 00 00 - 00 00 00 00 00 00 00 00
[HECI Transport-1 PEI] Got pkt: 80300008
00: 00 00 05 00 1A 00 00 00 - 00 00 00 00 1C 00 00 00
10: 00 00 00 00 00 00 00 02 - 00 00 00 00 00 00 00 00
20: 00 00 00 00 00 00 00 00 - 00 00 00 00 00 00 00 00
Fail to Configure PSYS_CRIT
PROGRESS CODE: V03020002 I0
PROGRESS CODE: V03020003 I0
PROGRESS CODE: V03020002 I0
PROGRESS CODE: V03020003 I0
PROGRESS CODE: V03020002 I0
PROGRESS CODE: V03020003 I0
PROGRESS CODE: V03020002 I0
PROGRESS CODE: V03020003 I0
PROGRESS CODE: V03020002 I0
LtStatusRegister[0xFED30000] = 0x0000000000000003
LtExtendedStatusError[0xFED30008] = 0x0000000000000000
BootGuardBootStatus[0xFED300A0] = 0x0000000000000000
BootGuardAcmError[0xFED30328] = 0x0000000000000000
BootGuardLtExists[0xFED30010] = 0x0000000000000000
BootGuardLtCrash[0xFED30030] = 0x0000000000000000
MSR_DEBUG_INTERFACE[0x00000C80] = 0x0000000080000001
MSR_BOOT_GUARD_SACM_INFO[0x0000013A] = 0x0000000C00000000
AcmPolicyStatus = 0x0, IsTxtFailedWithScrtm 0
None of BtG/TXT is enabled or TXT failed with scrtm.
PROGRESS CODE: V03020003 I0
PROGRESS CODE: V03020002 I0
PROGRESS CODE: V03020003 I0
PROGRESS CODE: V03020002 I0
InitializeDefaultData()
[Enter] Initialize Reference Code Policy!
>>> Print the default settings of Reference Code Policy! Begin >>>
ReferenceCodePolicyPtr->NumaEn = 1
ReferenceCodePolicyPtr->UmaBasedClustering = 0
<<< Print the default settings of Reference Code Policy! End <<<
[Exit] Initialize Reference Code Policy!
SBSP socket = 0
InitializePlatformData()
InstallPpi MrcHooksServicesPpiDesc Status = 00000000
CacheMrcHooksServicesPpi in HOST: Host->MrcHooksServicesPpi = FFEA57C0
InstallPpi MrcHooksChipServicesPpiDesc Status = 00000000
CacheMrcChipHooksServicesPpi in HOST: Host->MrcHooksChipServicesPpi = FFEA5820
PROGRESS CODE: V030F100B I0
LoadNvramData: LoadSysInfoNvram failed, Status = Not Found
[HECI Transport-1 PEI] Send pkt: 80100007
00: F0 0C 00 00 DF FF FF FF - FF FF FF FF 00 00 00 00
[HECI Transport-1 PEI] Got pkt: 80100007
00: F0 8C 00 00 00 00 00 00 - 00 00 00 00 00 00 00 00
MeUmaConfigureRequestedSegmentSize: Exiting (Status = Success)
GetEmulationMemFlows: Simics $mrc value = 0
memFlows = 0xFFFFFFFF, memFlowsExt = 0xFFBF7FFF, memFlowsExt2 = 0xBF9E1F7F, memFlowsExt3 = 0xFFFFFFFF
Emulation Value is: 0!
Running on hardware
SPR processor detected
Warning: Newer CPU Stepping 4 detected
RC Version: 1.1.1.01BC
sizeof sysHost = 363776
SsaLoader - Entry
SsaLoader - Exit
KTI Init starting...
******* KTI Setup Structure *******
Bus Ratio (per socket): S0: 1 S1: 1 S2: 1 S3: 1
D2KCreditConfig: 0 [1:Low,2:Med,3:High]
SnoopThrottleConfig: 0 [0:Dis,1:Low,2:Med,3:High,4:Auto]
LegacyVgaSoc: 0
LegacyVgaStack: 0
P2pRelaxedOrdering: 0
DebugPrintLevel: 15
DegradePrecedence: 0
Degrade4SPreference: 0 (4SFullyConnect)
KtiLinkSpeedMode: 1 (FAST)
DfxWarmResetEliminationEn: 0
KtiLinkSpeed: 127 (MAX_SUPPORTED)
KtiAdaptationEn: 2 (UNKNOWN)
KtiAdaptationSpeed: 127 (MAX_SUPPORTED)
KtiLinkL0pEn: 2 (AUTO)
KtiLinkL1En: 2 (AUTO)
KtiFailoverEn: 2 (AUTO)
KtiLbEn: 0
SncEn: 15 (AUTO)
IoDcMode: 1 (AUTO)
DirectoryModeEn: 2
XptPrefetchEn: 2
KtiPrefetchEn: 2
XptRemotePrefetchEn: 2
RdCurForXptPrefetchEn: 2
StaleAtoSOptEn: 2
LLCDeadLineAlloc: 1
OppoLLC2SfMigrationEn: 0 (MANUAL)
MbeBWCalChoice: 3 [0:Linear,1:Biased,2:Legacy,3:Auto]
PmmMbaBWDownscale: 0 [0:1x,1:1/2x,2:1/4x,3:1/8x]
CxlMbaBWDownscale: 0 [0:1x,1:1/2x,2:1/4x,3:1/8x]
RemoteTargetMbaBWDownscale 0 [0:1x,1:1/2x,2:1/4x,3:1/8x]
SplitLock: 0
DdrtQosMode: 0
ClockModulationEn: 2 (AUTO)
KtiFpgaEnable (per socket): S0: 2 S1: 2 S2: 2 S3: 2
StackDisableBitMap (per socket): S0: 0x0 S1: 0x0 S2: 0x0 S3: 0x0
KtiCrcMode: 0 (16BIT)
KtiCpuSktHotPlugEn: 0
KtiCpuSktHotPlugTopology: 0 (4S)
KtiSkuMismatchCheck: 1
MctpBusOwner: 0 (PCH SPS as Bus Owner (Proxy))
KtiPortDisable (per port):
S0:0 0 0 0
S1:0 0 0 0
S2:0 0 0 0
S3:0 0 0 0
KtiLinkVnaOverride (per port):
S0:254 254 254 254
S1:254 254 254 254
S2:254 254 254 254
S3:254 254 254 254
KtiLinkSpeed (per port):
S0:7 7 7 7
S1:7 7 7 7
S2:7 7 7 7
S3:7 7 7 7
Rsvd (per port):
S0:0 0 0 0
S1:0 0 0 0
S2:0 0 0 0
S3:0 0 0 0
**KTI Setup Structure DfxParms **
DfxHaltLinkFailReset: 2 (AUTO)
DfxKtiMaxInitAbort: 2 (AUTO)
DfxLlcShareDrdCrd 2 (AUTO)
DfxBiasFwdMode: 5 (AUTO)
DfxSnoopFanoutEn: 2 (AUTO)
DfxHitMeEn: 2 (AUTO)
DfxFrcfwdinv 2 (AUTO)
DfxDbpEnable 2 (AUTO)
DfxCleanEvictAlwaysLive: 2 (AUTO)
DfxModifiedEvictAlwaysLive: 2 (AUTO)
DfxOsbEn 2 (AUTO)
DfxHitMeRfoDirsEn 2 (AUTO)
DfxGateOsbIodcAllocEn 2 (AUTO)
DfxDualLinksInterleavingMode 2 (AUTO)
DfxSystemDegradeMode: 1
DfxVn1En: 2 (AUTO)
DfxD2cEn: 2 (AUTO)
DfxD2kEn: 2 (AUTO)
DfxLockPrimary: 4 (AUTO)
DfxOsbLocRd: 2 (AUTO)
DfxOsbLocRdCur: 2 (AUTO)
DfxOsbRmtRd: 2 (AUTO)
DfxM3KtiCountMismatchEn: 2 (AUTO)
DfxSnoopFanoutChaInterleaveEn: 2 (AUTO)
DfxXptFifoEnabledCredit: 0x5
DfxMdfisTrainingEn: 2 (AUTO)
DfxClippedFreq: 23
DfxLlpEndcntClipped: 650
DfxLlpEndcntNonClipped: 576
DfxCxlSecLvl: 3 (AUTO)
DfxCxlStcge: 2 (AUTO)
DfxCxlSdcge: 2 (AUTO)
DfxCxlDlcge: 2 (AUTO)
DfxCxlLtcge: 2 (AUTO)
DfxCxlVid: 2 (AUTO)
DfxIioDfxEnabled: 0 (MANUAL)
DfxHqmEn: 2 (AUTO)
DfxRsfEnabledForDram: 2 (AUTO)
DfxS3mSoftStrap: 2 (AUTO)
DfxPmonConfig: 3 (AUTO)
DfxM2IosfPmonAccessControl: 2 (AUTO)
DfxMaxCache: 256 (AUTO)
DfxMaxCacheAtomic: 256 (AUTO)
DfxCtagEntryAvailMask: 256 (AUTO)
DfxXptPrefetchEn: 2 (AUTO)
DfxPrqBlockEn: 2 (AUTO)
DfxAeg0CounterLowVal: 65535 (AUTO)
DfxAeg0CounterHighVal: 65535 (AUTO)
DfxCrcMode (per port):
S0:2 (AUTO) 2 (AUTO) 2 (AUTO) 2 (AUTO)
S1:2 (AUTO) 2 (AUTO) 2 (AUTO) 2 (AUTO)
S2:2 (AUTO) 2 (AUTO) 2 (AUTO) 2 (AUTO)
S3:2 (AUTO) 2 (AUTO) 2 (AUTO) 2 (AUTO)
DfxL0pEnable (per port):
S0:2 (AUTO) 2 (AUTO) 2 (AUTO) 2 (AUTO)
S1:2 (AUTO) 2 (AUTO) 2 (AUTO) 2 (AUTO)
S2:2 (AUTO) 2 (AUTO) 2 (AUTO) 2 (AUTO)
S3:2 (AUTO) 2 (AUTO) 2 (AUTO) 2 (AUTO)
DfxL1Enable (per port):
S0:2 (AUTO) 2 (AUTO) 2 (AUTO) 2 (AUTO)
S1:2 (AUTO) 2 (AUTO) 2 (AUTO) 2 (AUTO)
S2:2 (AUTO) 2 (AUTO) 2 (AUTO) 2 (AUTO)
S3:2 (AUTO) 2 (AUTO) 2 (AUTO) 2 (AUTO)
DfxKtiFailoverEn (per port):
S0:2 (AUTO) 2 (AUTO) 2 (AUTO) 2 (AUTO)
S1:2 (AUTO) 2 (AUTO) 2 (AUTO) 2 (AUTO)
S2:2 (AUTO) 2 (AUTO) 2 (AUTO) 2 (AUTO)
S3:2 (AUTO) 2 (AUTO) 2 (AUTO) 2 (AUTO)
**Common Setup Structure**
mmCfgBase: 6 (AUTO)
mmCfgSize: 6 (AUTO)
mmiohBase: 0x00002000
CpuPaLimit: 0
mmiohSize: 3 (64GB per stack)
numaEn: 1
UmaClustering: 4
isocEn: 0
dcaEn: 0
**Common Var Structure **
resetRequired: 0
state: 0
numCpus: 0
socketPresentBitMap: 0x01
mmCfgBase: 0x80000000
meRequestedSize: 0
******* Collecting Early System Information - START *******
SBSP Socket: 0 Ways: 0x01 Ras: 0x06 Stepping: 0x04 DieCount: 4 Chop: XCC
Total Chas: 52 Cha List Map:
Cha List[0]: 0xBFCFF9FF
Cha List[1]: 0x0FEBFBFF
Total M3Kti: 04 Total KtiAgent: 04 Total M2M: 20 M2M list map: 0x000FFFFF
Current bus numbers:
Socket | Ins00 | Ins01 | Ins02 | Ins03 | Ins04 | Ins05 | Ins06 | Ins07 | Ins08 | Ins09 | Ins0A | Ins0B | Rsvd | Ubox0 | Ubox1 | LastBus | Seg
-----------------------------------------------------------------------------------------------------------------------------------------------
0 | 0x00 | 0x11 | 0x12 | 0x13 | 0x14 | 0x15 | 0x16 | 0x17 | 0x18 | 0x19 | 0x1A | 0x1B | --- | 0x1E | 0x1F | 0x1F | 0
1 | 0x20 | 0x21 | 0x22 | 0x23 | 0x24 | 0x25 | 0x26 | 0x27 | 0x28 | 0x29 | 0x2A | 0x2B | --- | 0x3E | 0x3F | 0x3F | 0
2 | 0x40 | 0x41 | 0x42 | 0x43 | 0x44 | 0x45 | 0x46 | 0x47 | 0x48 | 0x49 | 0x4A | 0x4B | --- | 0x5E | 0x5F | 0x5F | 0
3 | 0x60 | 0x61 | 0x62 | 0x63 | 0x64 | 0x65 | 0x66 | 0x67 | 0x68 | 0x69 | 0x6A | 0x6B | --- | 0x7E | 0x7F | 0x7F | 0
-----------------------------------------------------------------------------------------------------------------------------------------------
Assuming maximal config: TotCpus: 4 CpuList: 0x0F
Default UpiInterleaveMode: 0
Reset Type: Warm Reset
******* Collecting Early System Information - END *******
(Spr) UpiIpWrInit
MaxSocket 4, MaxKtiPort 4
UpiIpWrSingleInit
IpUpiIpInit(UpiAgent[0][0]):
UpiIpWrSingleInit
IpUpiIpInit(UpiAgent[0][1]):
UpiIpWrSingleInit
IpUpiIpInit(UpiAgent[0][2]):
UpiIpWrSingleInit
IpUpiIpInit(UpiAgent[0][3]):
UpiIpWrSingleInit
IpUpiIpInit(UpiAgent[1][0]):
UpiIpWrSingleInit
IpUpiIpInit(UpiAgent[1][1]):
UpiIpWrSingleInit
IpUpiIpInit(UpiAgent[1][2]):
UpiIpWrSingleInit
IpUpiIpInit(UpiAgent[1][3]):
UpiIpWrSingleInit
IpUpiIpInit(UpiAgent[2][0]):
UpiIpWrSingleInit
IpUpiIpInit(UpiAgent[2][1]):
UpiIpWrSingleInit
IpUpiIpInit(UpiAgent[2][2]):
UpiIpWrSingleInit
IpUpiIpInit(UpiAgent[2][3]):
UpiIpWrSingleInit
IpUpiIpInit(UpiAgent[3][0]):
UpiIpWrSingleInit
IpUpiIpInit(UpiAgent[3][1]):
UpiIpWrSingleInit
IpUpiIpInit(UpiAgent[3][2]):
UpiIpWrSingleInit
IpUpiIpInit(UpiAgent[3][3]):
******* Setting up Minimum Path - START *******
Constructing SBSP minimum path Topology Tree
--------------------------------------------
Adding SBSP (CPU0) to the tree
CPU0 Link Exchange
: LEP0(0,CPU1) Socket 0 Port 0:Primary - Peer Socket 1 Port 0 Secondary
: LEP1(1,CPU1) Socket 0 Port 1:Primary - Peer Socket 1 Port 1 Secondary
: LEP2(2,CPU1) Socket 0 Port 2:Primary - Peer Socket 1 Port 2 Secondary
: LEP3(3,CPU1) Socket 0 Port 3:Primary - Peer Socket 1 Port 3 Secondary
Adding CPU1 to the tree
Setting path between SBSP and CPU1.
In SBSP setting route to CPU1 using port 0.
In CPU1 using port 0 to set the M2UPCIe0 route.
CPU1 Link Exchange
: LEP0(0,CPU0) : LEP1(1,CPU0) : LEP2(2,CPU0) : LEP3(3,CPU0)
Setting boot path for CPU1
In CPU1 setting Cbo route to port 0
Socket[2] is removed
Socket[3] is removed
SBSP Minimum Path Tree
----------------------
Index Socket ParentPort Hop ParentIndex
00 CPU0 -- 0 --
01 CPU1 00 1 00
******* Setting up Minimum Path - END *******
******* Check for KTI Topology Degradation - START *******
Link Exchange Parameter
-----------------------
CPU0 : LEP0(0:CPU1) : LEP1(1:CPU1) : LEP2(2:CPU1) : LEP3(3:CPU1)
CPU1 : LEP0(0:CPU0) : LEP1(1:CPU0) : LEP2(2:CPU0) : LEP3(3:CPU0)
Already Reduced to Supported Topology
System will be treated 2S4L Configuration
******* Check for KTI Topology Degradation - END *******
******* Enable UBOX MMIO Addr Range - START *******
Current Bars:
Socket | SCF | PCU | MEM0 | MEM1 | MEM2 | MEM3 | MEM4 | MEM5 | MEM6 | MEM7 | SBREG |
-------------------------------------------------------------------------------------------------------------------------------------------------------
0 | 0xF8000000 | 0xF8200000 | 0xF8280000 | 0xF8300000 | 0xF8380000 | 0xF8400000 | 0xF8480000 | 0xF8500000 | 0xF8580000 | 0xF8600000 | 0xF8680000 |
1 | 0xF8800000 | 0xF8A00000 | 0xF8A80000 | 0xF8B00000 | 0xF8B80000 | 0xF8C00000 | 0xF8C80000 | 0xF8D00000 | 0xF8D80000 | 0xF8E00000 | 0xF8E80000 |
2 | 0xF9000000 | 0xF9200000 | 0xF9280000 | 0xF9300000 | 0xF9380000 | 0xF9400000 | 0xF9480000 | 0xF9500000 | 0xF9580000 | 0xF9600000 | 0xF9680000 |
3 | 0xF9800000 | 0xF9A00000 | 0xF9A80000 | 0xF9B00000 | 0xF9B80000 | 0xF9C00000 | 0xF9C80000 | 0xF9D00000 | 0xF9D80000 | 0xF9E00000 | 0xF9E80000 |
-------------------------------------------------------------------------------------------------------------------------------------------------------
******* Enable UBOX MMIO Addr Range - END *******
******* Process Straps Config - START *******
S3M Read SoftStrap Disabled, Exit.
******* Process Straps Config - END *******
******* Detecting IIO count - START *******
Socket 0 Stack Bitmap:F3F.
Stack Instance Bitmap:F3F.
IioCount: 10.
B2HotCount(LS): 00.
Socket 1 Stack Bitmap:F3F.
Stack Instance Bitmap:F3F.
IioCount: 10.
B2HotCount(LS): 00.
******* Detecting IIO count - END *******
******* Disable UBOX MMIO Addr Range - START *******
Current Bars:
Socket | SCF | PCU | MEM0 | MEM1 | MEM2 | MEM3 | MEM4 | MEM5 | MEM6 | MEM7 | SBREG |
-------------------------------------------------------------------------------------------------------------------------------------------------------
0 | 0x00000000 | 0x00000000 | 0x00000000 | 0x00000000 | 0x00000000 | 0x00000000 | 0x00000000 | 0x00000000 | 0x00000000 | 0x00000000 | 0x00000000 |
1 | 0x00000000 | 0x00000000 | 0x00000000 | 0x00000000 | 0x00000000 | 0x00000000 | 0x00000000 | 0x00000000 | 0x00000000 | 0x00000000 | 0x00000000 |
2 | 0x00000000 | 0x00000000 | 0x00000000 | 0x00000000 | 0x00000000 | 0x00000000 | 0x00000000 | 0x00000000 | 0x00000000 | 0x00000000 | 0x00000000 |
3 | 0x00000000 | 0x00000000 | 0x00000000 | 0x00000000 | 0x00000000 | 0x00000000 | 0x00000000 | 0x00000000 | 0x00000000 | 0x00000000 | 0x00000000 |
-------------------------------------------------------------------------------------------------------------------------------------------------------
******* Disable UBOX MMIO Addr Range - END *******
******* Checking KTIRC Input Structure - START *******
Desired MMCFG Config: Base = 0x80000000, Size = 0x10000000
OutSncPrefetchEn=4, OutSncEn=4
IpUpiGetCapability(UpiAgent[0][0], id=12):
IpUpiVersionSpecificConfigurationEnabled: unknown ID=2
IpWrError 0 49
IpUpiGetCapability(UpiAgent[0][0], id=7):
IpUpiGetCapability(UpiAgent[0][0], id=9):
IpUpiGetCapability(UpiAgent[0][0], id=10):
IpUpiGetCapability(UpiAgent[0][0], id=8):
IpUpiGetCapability(UpiAgent[0][1], id=12):
IpUpiVersionSpecificConfigurationEnabled: unknown ID=2
IpWrError 0 49
IpUpiGetCapability(UpiAgent[0][1], id=7):
IpUpiGetCapability(UpiAgent[0][1], id=9):
IpUpiGetCapability(UpiAgent[0][1], id=10):
IpUpiGetCapability(UpiAgent[0][1], id=8):
IpUpiGetCapability(UpiAgent[0][2], id=12):
IpUpiVersionSpecificConfigurationEnabled: unknown ID=2
IpWrError 0 49
IpUpiGetCapability(UpiAgent[0][2], id=7):
IpUpiGetCapability(UpiAgent[0][2], id=9):
IpUpiGetCapability(UpiAgent[0][2], id=10):
IpUpiGetCapability(UpiAgent[0][2], id=8):
IpUpiGetCapability(UpiAgent[0][3], id=12):
IpUpiVersionSpecificConfigurationEnabled: unknown ID=2
IpWrError 0 49
IpUpiGetCapability(UpiAgent[0][3], id=7):
IpUpiGetCapability(UpiAgent[0][3], id=9):
IpUpiGetCapability(UpiAgent[0][3], id=10):
IpUpiGetCapability(UpiAgent[0][3], id=8):
IpUpiGetCapability(UpiAgent[1][0], id=12):
IpUpiVersionSpecificConfigurationEnabled: unknown ID=2
IpWrError 0 49
IpUpiGetCapability(UpiAgent[1][0], id=7):
IpUpiGetCapability(UpiAgent[1][0], id=9):
IpUpiGetCapability(UpiAgent[1][0], id=10):
IpUpiGetCapability(UpiAgent[1][0], id=8):
IpUpiGetCapability(UpiAgent[1][1], id=12):
IpUpiVersionSpecificConfigurationEnabled: unknown ID=2
IpWrError 0 49
IpUpiGetCapability(UpiAgent[1][1], id=7):
IpUpiGetCapability(UpiAgent[1][1], id=9):
IpUpiGetCapability(UpiAgent[1][1], id=10):
IpUpiGetCapability(UpiAgent[1][1], id=8):
IpUpiGetCapability(UpiAgent[1][2], id=12):
IpUpiVersionSpecificConfigurationEnabled: unknown ID=2
IpWrError 0 49
IpUpiGetCapability(UpiAgent[1][2], id=7):
IpUpiGetCapability(UpiAgent[1][2], id=9):
IpUpiGetCapability(UpiAgent[1][2], id=10):
IpUpiGetCapability(UpiAgent[1][2], id=8):
IpUpiGetCapability(UpiAgent[1][3], id=12):
IpUpiVersionSpecificConfigurationEnabled: unknown ID=2
IpWrError 0 49
IpUpiGetCapability(UpiAgent[1][3], id=7):
IpUpiGetCapability(UpiAgent[1][3], id=9):
IpUpiGetCapability(UpiAgent[1][3], id=10):
IpUpiGetCapability(UpiAgent[1][3], id=8):
****** Selecting KTI freq. - START ******
Max supported KTI Speed requested: 16.0 GT/s
Selected KTI Freq is 16.0 GT/s
****** Selecting KTI freq. - END ******
MaxAddress=52
******* Checking KTIRC Input Structure - END *******
******* KTI NVRAM Verification - START *******
******* KTI NVRAM Verification - END *******
******* Calculate Resource Allocation - START *******
S0 - AddressMap.hi=209F
S1 - AddressMap.hi=21BF
BitPos=2E
CPU Resource Allocation
--------------------------------------------------------------------------------------------------------------------------------------------------------------
| StkId | Seg | Bus | Io | IoApic | Mmiol | Mmioh | StkBmp |
--------------------------------------------------------------------------------------------------------------------------------------------------------------
CPU0 | | 0 | 0x00 - 0x7F | 0x0000 - 0x9FFF | 0xFEC00000 - 0xFECFFFFF | 0x90000000 - 0xC8FFFFFF | 0x00002000 00000000 - 0x0000209F FFFFFFFF | 0xF3F |
Ins00 | 0x00 | 0 | 0x00 - 0x14 | 0x0000 - 0x3FFF | 0xFEC00000 - 0xFECFFFFF | 0x90000000 - 0x957FFFFF | 0x00002000 00000000 - 0x0000200F FFFFFFFF | |
Ins01 | 0x01 | 0 | 0x15 - 0x25 | 0x4000 - 0x5FFF | 0xFFFFFFFF - 0x00000000 | 0x95800000 - 0x9F7FFFFF | 0x00002010 00000000 - 0x0000201F FFFFFFFF | |
Ins02 | 0x04 | 0 | 0x26 - 0x36 | 0x6000 - 0x6FFF | 0xFFFFFFFF - 0x00000000 | 0x9F800000 - 0xA93FFFFF | 0x00002020 00000000 - 0x0000202F FFFFFFFF | |
Ins03 | 0x03 | 0 | 0x37 - 0x47 | 0x7000 - 0x7FFF | 0xFFFFFFFF - 0x00000000 | 0xA9400000 - 0xB2FFFFFF | 0x00002030 00000000 - 0x0000203F FFFFFFFF | |
Ins04 | 0x05 | 0 | 0x48 - 0x58 | 0x8000 - 0x8FFF | 0xFFFFFFFF - 0x00000000 | 0xB3000000 - 0xBCBFFFFF | 0x00002040 00000000 - 0x0000204F FFFFFFFF | |
Ins05 | 0x02 | 0 | 0x59 - 0x69 | 0x9000 - 0x9FFF | 0xFFFFFFFF - 0x00000000 | 0xBCC00000 - 0xC67FFFFF | 0x00002050 00000000 - 0x0000205F FFFFFFFF | |
Ins06 | 0x06 | 0 | 0xFF - 0x00 | 0xFFFF - 0x0000 | 0xFFFFFFFF - 0x00000000 | 0xFFFFFFFF - 0x00000000 | 0xFFFFFFFF FFFFFFFF - 0x00000000 00000000 | |
Ins07 | 0x07 | 0 | 0xFF - 0x00 | 0xFFFF - 0x0000 | 0xFFFFFFFF - 0x00000000 | 0xFFFFFFFF - 0x00000000 | 0xFFFFFFFF FFFFFFFF - 0x00000000 00000000 | |
Ins08 | 0x08 | 0 | 0x6A - 0x6E | 0xFFFF - 0x0000 | 0xFFFFFFFF - 0x00000000 | 0xC6800000 - 0xC6FFFFFF | 0x00002060 00000000 - 0x0000206F FFFFFFFF | |
Ins09 | 0x09 | 0 | 0x6F - 0x73 | 0xFFFF - 0x0000 | 0xFFFFFFFF - 0x00000000 | 0xC7000000 - 0xC77FFFFF | 0x00002070 00000000 - 0x0000207F FFFFFFFF | |
Ins10 | 0x0A | 0 | 0x74 - 0x78 | 0xFFFF - 0x0000 | 0xFFFFFFFF - 0x00000000 | 0xC7800000 - 0xC7FFFFFF | 0x00002080 00000000 - 0x0000208F FFFFFFFF | |
Ins11 | 0x0B | 0 | 0x79 - 0x7D | 0xFFFF - 0x0000 | 0xFFFFFFFF - 0x00000000 | 0xC8000000 - 0xC87FFFFF | 0x00002090 00000000 - 0x0000209F FFFFFFFF | |
Rsvd | 0x0C | 0 | 0xFB - 0xFD | 0xFFFF - 0x0000 | 0xFFFFFFFF - 0x00000000 | 0xFFFFFFFF - 0x00000000 | 0xFFFFFFFF FFFFFFFF - 0x00000000 00000000 | |
Ubox | 0x0D | 0 | 0x7E - 0x7F | 0xFFFF - 0x0000 | 0xFFFFFFFF - 0x00000000 | 0xC8800000 - 0xC8FFFFFF | 0xFFFFFFFF FFFFFFFF - 0x00000000 00000000 | |
CPU1 | | 0 | 0x80 - 0xFF | 0xA000 - 0xFFFF | 0xFFFFFFFF - 0x00000000 | 0xC9000000 - 0xFBFFFFFF | 0x000020A0 00000000 - 0x0000213F FFFFFFFF | 0xF3F |
Ins00 | 0x00 | 0 | 0x80 - 0x96 | 0xA000 - 0xAFFF | 0xFFFFFFFF - 0x00000000 | 0xC9000000 - 0xD13FFFFF | 0x000020A0 00000000 - 0x000020AF FFFFFFFF | |
Ins01 | 0x01 | 0 | 0x97 - 0xA6 | 0xB000 - 0xBFFF | 0xFFFFFFFF - 0x00000000 | 0xD1400000 - 0xD97FFFFF | 0x000020B0 00000000 - 0x000020BF FFFFFFFF | |
Ins02 | 0x04 | 0 | 0xA7 - 0xB6 | 0xC000 - 0xCFFF | 0xFFFFFFFF - 0x00000000 | 0xD9800000 - 0xE17FFFFF | 0x000020C0 00000000 - 0x000020CF FFFFFFFF | |
Ins03 | 0x03 | 0 | 0xB7 - 0xC6 | 0xD000 - 0xDFFF | 0xFFFFFFFF - 0x00000000 | 0xE1800000 - 0xE97FFFFF | 0x000020D0 00000000 - 0x000020DF FFFFFFFF | |
Ins04 | 0x05 | 0 | 0xC7 - 0xD6 | 0xE000 - 0xEFFF | 0xFFFFFFFF - 0x00000000 | 0xE9800000 - 0xF17FFFFF | 0x000020E0 00000000 - 0x000020EF FFFFFFFF | |
Ins05 | 0x02 | 0 | 0xD7 - 0xE6 | 0xF000 - 0xFFFF | 0xFFFFFFFF - 0x00000000 | 0xF1800000 - 0xF97FFFFF | 0x000020F0 00000000 - 0x000020FF FFFFFFFF | |
Ins06 | 0x06 | 0 | 0xFF - 0x00 | 0xFFFF - 0x0000 | 0xFFFFFFFF - 0x00000000 | 0xFFFFFFFF - 0x00000000 | 0xFFFFFFFF FFFFFFFF - 0x00000000 00000000 | |
Ins07 | 0x07 | 0 | 0xFF - 0x00 | 0xFFFF - 0x0000 | 0xFFFFFFFF - 0x00000000 | 0xFFFFFFFF - 0x00000000 | 0xFFFFFFFF FFFFFFFF - 0x00000000 00000000 | |
Ins08 | 0x08 | 0 | 0xE7 - 0xEB | 0xFFFF - 0x0000 | 0xFFFFFFFF - 0x00000000 | 0xF9800000 - 0xF9FFFFFF | 0x00002100 00000000 - 0x0000210F FFFFFFFF | |
Ins09 | 0x09 | 0 | 0xEC - 0xF0 | 0xFFFF - 0x0000 | 0xFFFFFFFF - 0x00000000 | 0xFA000000 - 0xFA7FFFFF | 0x00002110 00000000 - 0x0000211F FFFFFFFF | |
Ins10 | 0x0A | 0 | 0xF1 - 0xF5 | 0xFFFF - 0x0000 | 0xFFFFFFFF - 0x00000000 | 0xFA800000 - 0xFAFFFFFF | 0x00002120 00000000 - 0x0000212F FFFFFFFF | |
Ins11 | 0x0B | 0 | 0xF6 - 0xFA | 0xFFFF - 0x0000 | 0xFFFFFFFF - 0x00000000 | 0xFB000000 - 0xFB7FFFFF | 0x00002130 00000000 - 0x0000213F FFFFFFFF | |
Rsvd | 0x0C | 0 | 0xFB - 0xFD | 0xFFFF - 0x0000 | 0xFFFFFFFF - 0x00000000 | 0xFFFFFFFF - 0x00000000 | 0xFFFFFFFF FFFFFFFF - 0x00000000 00000000 | |
Ubox | 0x0D | 0 | 0xFE - 0xFF | 0xFFFF - 0x0000 | 0xFFFFFFFF - 0x00000000 | 0xFB800000 - 0xFBFFFFFF | 0xFFFFFFFF FFFFFFFF - 0x00000000 00000000 | |
******* Calculate Resource Allocation - END *******
******* Check for KTI Topology change across reset - START *******
******* Check for KTI Topology change across reset - END *******
******* Sync Up PBSPs - START *******
Setting Ubox Sticky to save KTI topology to 0x000000000000FF03
Verifying if the remote socket(s) checked-in.
packageBspStepping[0]=4
packageBspStepping[1]=4
******* Sync Up PBSPs - END *******
******* Program Mmcfg and bus numbers - START *******
Initiate S1 update
KtiVar->MmCfgBase = 0x80000000
KtiVar->segmentSocket[0] = 0x00
KtiVar->SocketFirstBus[0] = 0x00
KtiVar->SocketLastBus[0] = 0x7F
KtiVar->SocketMmCfgBase[0]= 0x80000000
KtiVar->segmentSocket[1] = 0x00
KtiVar->SocketFirstBus[1] = 0x80
KtiVar->SocketLastBus[1] = 0xFF
KtiVar->SocketMmCfgBase[1]= 0x80000000
Current bus numbers:
Socket | Ins00 | Ins01 | Ins02 | Ins03 | Ins04 | Ins05 | Ins06 | Ins07 | Ins08 | Ins09 | Ins0A | Ins0B | Rsvd | Ubox0 | Ubox1 | LastBus | Seg
-----------------------------------------------------------------------------------------------------------------------------------------------
0 | 0x00 | 0x15 | 0x26 | 0x37 | 0x48 | 0x59 | --- | --- | 0x6A | 0x6F | 0x74 | 0x79 | --- | 0x7E | 0x7F | 0x7F | 0
1 | 0x80 | 0x97 | 0xA7 | 0xB7 | 0xC7 | 0xD7 | --- | --- | 0xE7 | 0xEC | 0xF1 | 0xF6 | --- | 0xFE | 0xFF | 0xFF | 0
-----------------------------------------------------------------------------------------------------------------------------------------------
Wait for S1 to update
******* Program Mmcfg and bus numbers - END *******
Current Bars:
Socket | SCF | PCU | MEM0 | MEM1 | MEM2 | MEM3 | MEM4 | MEM5 | MEM6 | MEM7 | SBREG |
-------------------------------------------------------------------------------------------------------------------------------------------------------
0 | 0xC8800000 | 0xC8A00000 | 0xC8A80000 | 0xC8B00000 | 0xC8B80000 | 0xC8C00000 | 0xC8C80000 | 0xC8D00000 | 0xC8D80000 | 0xC8E00000 | 0xC8E80000 |
1 | 0xFB800000 | 0xFBA00000 | 0xFBA80000 | 0xFBB00000 | 0xFBB80000 | 0xFBC00000 | 0xFBC80000 | 0xFBD00000 | 0xFBD80000 | 0xFBE00000 | 0xFBE80000 |
-------------------------------------------------------------------------------------------------------------------------------------------------------
******* Full Speed Transition - START *******
Clearing KTI DFX Locks
****** S0p0 Program Eparams - START ******
S0 P0's Preset Coeff table, all lane table size: 0x0; per lane table size: 0x10
Per Lane Preset coeffcients Index table located for Socket 0 Link 0, RedriverStatus: 0
Socket 0 Port 0 : EPARAM entry programmed
IpUpiSetTxCoefficient(UpiAgent[0][0]): 4B01
****** S0p0 Program Eparams - END ******
****** S0p0 Program UniPhy Recipe - START ******
Socket 0 Port 0 : UPI EV Recipe v2.009 programmed
****** S0p0 Program UniPhy Recipe - END ******
IpUpiGetCapability(UpiAgent[0][0], id=12):
IpUpiVersionSpecificConfigurationEnabled: unknown ID=2
IpWrError 0 49
IpUpiSpeedChangePart1(UpiAgent[0][0]):
IpUpiVersionSpecificConfigurationEnabled: unknown ID=1
IpWrError 0 49
IpUpiVersionSpecificConfigurationEnabled: unknown ID=3
IpWrError 0 49
IpUpiVersionSpecificConfigurationEnabled: unknown ID=4
IpWrError 0 49
IpUpiVersionSpecificConfigurationEnabled: unknown ID=6
IpWrError 0 49
IpUpiDfxSetValue(0, 4, 0x8A)
****** S0p1 Program Eparams - START ******
S0 P1's Preset Coeff table, all lane table size: 0x0; per lane table size: 0x10
Per Lane Preset coeffcients Index table located for Socket 0 Link 1, RedriverStatus: 0
Socket 0 Port 1 : EPARAM entry programmed
IpUpiSetTxCoefficient(UpiAgent[0][1]): 4B01
****** S0p1 Program Eparams - END ******
****** S0p1 Program UniPhy Recipe - START ******
Socket 0 Port 1 : UPI EV Recipe v2.009 programmed
****** S0p1 Program UniPhy Recipe - END ******
IpUpiGetCapability(UpiAgent[0][1], id=12):
IpUpiVersionSpecificConfigurationEnabled: unknown ID=2
IpWrError 0 49
IpUpiSpeedChangePart1(UpiAgent[0][1]):
IpUpiVersionSpecificConfigurationEnabled: unknown ID=1
IpWrError 0 49
IpUpiVersionSpecificConfigurationEnabled: unknown ID=3
IpWrError 0 49
IpUpiVersionSpecificConfigurationEnabled: unknown ID=4
IpWrError 0 49
IpUpiVersionSpecificConfigurationEnabled: unknown ID=6
IpWrError 0 49
IpUpiDfxSetValue(0, 4, 0x8A)
****** S0p2 Program Eparams - START ******
S0 P2's Preset Coeff table, all lane table size: 0x0; per lane table size: 0x10
Per Lane Preset coeffcients Index table located for Socket 0 Link 2, RedriverStatus: 0
Socket 0 Port 2 : EPARAM entry programmed
IpUpiSetTxCoefficient(UpiAgent[0][2]): 4B01
****** S0p2 Program Eparams - END ******
****** S0p2 Program UniPhy Recipe - START ******
Socket 0 Port 2 : UPI EV Recipe v2.009 programmed
****** S0p2 Program UniPhy Recipe - END ******
IpUpiGetCapability(UpiAgent[0][2], id=12):
IpUpiVersionSpecificConfigurationEnabled: unknown ID=2
IpWrError 0 49
IpUpiSpeedChangePart1(UpiAgent[0][2]):
IpUpiVersionSpecificConfigurationEnabled: unknown ID=1
IpWrError 0 49
IpUpiVersionSpecificConfigurationEnabled: unknown ID=3
IpWrError 0 49
IpUpiVersionSpecificConfigurationEnabled: unknown ID=4
IpWrError 0 49
IpUpiVersionSpecificConfigurationEnabled: unknown ID=6
IpWrError 0 49
IpUpiDfxSetValue(0, 4, 0x8A)
****** S0p3 Program Eparams - START ******
S0 P3's Preset Coeff table, all lane table size: 0x0; per lane table size: 0x10
Per Lane Preset coeffcients Index table located for Socket 0 Link 3, RedriverStatus: 0
Socket 0 Port 3 : EPARAM entry programmed
IpUpiSetTxCoefficient(UpiAgent[0][3]): 4B01
****** S0p3 Program Eparams - END ******
****** S0p3 Program UniPhy Recipe - START ******
Socket 0 Port 3 : UPI EV Recipe v2.009 programmed
****** S0p3 Program UniPhy Recipe - END ******
IpUpiGetCapability(UpiAgent[0][3], id=12):
IpUpiVersionSpecificConfigurationEnabled: unknown ID=2
IpWrError 0 49
IpUpiSpeedChangePart1(UpiAgent[0][3]):
IpUpiVersionSpecificConfigurationEnabled: unknown ID=1
IpWrError 0 49
IpUpiVersionSpecificConfigurationEnabled: unknown ID=3
IpWrError 0 49
IpUpiVersionSpecificConfigurationEnabled: unknown ID=4
IpWrError 0 49
IpUpiVersionSpecificConfigurationEnabled: unknown ID=6
IpWrError 0 49
IpUpiDfxSetValue(0, 4, 0x8A)
****** S1p0 Program Eparams - START ******
S1 P0's Preset Coeff table, all lane table size: 0x0; per lane table size: 0x10
Per Lane Preset coeffcients Index table located for Socket 1 Link 0, RedriverStatus: 0
Socket 1 Port 0 : EPARAM entry programmed
IpUpiSetTxCoefficient(UpiAgent[1][0]): 4B01
****** S1p0 Program Eparams - END ******
****** S1p0 Program UniPhy Recipe - START ******
Socket 1 Port 0 : UPI EV Recipe v2.009 programmed
****** S1p0 Program UniPhy Recipe - END ******
IpUpiGetCapability(UpiAgent[1][0], id=12):
IpUpiVersionSpecificConfigurationEnabled: unknown ID=2
IpWrError 0 49
IpUpiSpeedChangePart1(UpiAgent[1][0]):
IpUpiVersionSpecificConfigurationEnabled: unknown ID=1
IpWrError 0 49
IpUpiVersionSpecificConfigurationEnabled: unknown ID=3
IpWrError 0 49
IpUpiVersionSpecificConfigurationEnabled: unknown ID=4
IpWrError 0 49
IpUpiVersionSpecificConfigurationEnabled: unknown ID=6
IpWrError 0 49
IpUpiDfxSetValue(0, 4, 0x8A)
****** S1p1 Program Eparams - START ******
S1 P1's Preset Coeff table, all lane table size: 0x0; per lane table size: 0x10
Per Lane Preset coeffcients Index table located for Socket 1 Link 1, RedriverStatus: 0
Socket 1 Port 1 : EPARAM entry programmed
IpUpiSetTxCoefficient(UpiAgent[1][1]): 4B01
****** S1p1 Program Eparams - END ******
****** S1p1 Program UniPhy Recipe - START ******
Socket 1 Port 1 : UPI EV Recipe v2.009 programmed
****** S1p1 Program UniPhy Recipe - END ******
IpUpiGetCapability(UpiAgent[1][1], id=12):
IpUpiVersionSpecificConfigurationEnabled: unknown ID=2
IpWrError 0 49
IpUpiSpeedChangePart1(UpiAgent[1][1]):
IpUpiVersionSpecificConfigurationEnabled: unknown ID=1
IpWrError 0 49
IpUpiVersionSpecificConfigurationEnabled: unknown ID=3
IpWrError 0 49
IpUpiVersionSpecificConfigurationEnabled: unknown ID=4
IpWrError 0 49
IpUpiVersionSpecificConfigurationEnabled: unknown ID=6
IpWrError 0 49
IpUpiDfxSetValue(0, 4, 0x8A)
****** S1p2 Program Eparams - START ******
S1 P2's Preset Coeff table, all lane table size: 0x0; per lane table size: 0x10
Per Lane Preset coeffcients Index table located for Socket 1 Link 2, RedriverStatus: 0
Socket 1 Port 2 : EPARAM entry programmed
IpUpiSetTxCoefficient(UpiAgent[1][2]): 4B01
****** S1p2 Program Eparams - END ******
****** S1p2 Program UniPhy Recipe - START ******
Socket 1 Port 2 : UPI EV Recipe v2.009 programmed
****** S1p2 Program UniPhy Recipe - END ******
IpUpiGetCapability(UpiAgent[1][2], id=12):
IpUpiVersionSpecificConfigurationEnabled: unknown ID=2
IpWrError 0 49
IpUpiSpeedChangePart1(UpiAgent[1][2]):
IpUpiVersionSpecificConfigurationEnabled: unknown ID=1
IpWrError 0 49
IpUpiVersionSpecificConfigurationEnabled: unknown ID=3
IpWrError 0 49
IpUpiVersionSpecificConfigurationEnabled: unknown ID=4
IpWrError 0 49
IpUpiVersionSpecificConfigurationEnabled: unknown ID=6
IpWrError 0 49
IpUpiDfxSetValue(0, 4, 0x8A)
****** S1p3 Program Eparams - START ******
S1 P3's Preset Coeff table, all lane table size: 0x0; per lane table size: 0x10
Per Lane Preset coeffcients Index table located for Socket 1 Link 3, RedriverStatus: 0
Socket 1 Port 3 : EPARAM entry programmed
IpUpiSetTxCoefficient(UpiAgent[1][3]): 4B01
****** S1p3 Program Eparams - END ******
****** S1p3 Program UniPhy Recipe - START ******
Socket 1 Port 3 : UPI EV Recipe v2.009 programmed
****** S1p3 Program UniPhy Recipe - END ******
IpUpiGetCapability(UpiAgent[1][3], id=12):
IpUpiVersionSpecificConfigurationEnabled: unknown ID=2
IpWrError 0 49
IpUpiSpeedChangePart1(UpiAgent[1][3]):
IpUpiVersionSpecificConfigurationEnabled: unknown ID=1
IpWrError 0 49
IpUpiVersionSpecificConfigurationEnabled: unknown ID=3
IpWrError 0 49
IpUpiVersionSpecificConfigurationEnabled: unknown ID=4
IpWrError 0 49
IpUpiVersionSpecificConfigurationEnabled: unknown ID=6
IpWrError 0 49
IpUpiDfxSetValue(0, 4, 0x8A)
Dispatching the APs to do Kti Speed Transition.
Dispatching the AP 1's for switching to the AllLinksRatio: 14141414IpUpiSpeedChangePart2(UpiAgent[0][0]):
IpUpiSpeedChangePart2a(UpiAgent[0][0]):
IpUpiSpeedChangePart2b(UpiAgent[0][0]):
IpUpiSpeedChangePart2(UpiAgent[0][1]):
IpUpiSpeedChangePart2a(UpiAgent[0][1]):
IpUpiSpeedChangePart2b(UpiAgent[0][1]):
IpUpiSpeedChangePart2(UpiAgent[0][2]):
IpUpiSpeedChangePart2a(UpiAgent[0][2]):
IpUpiSpeedChangePart2b(UpiAgent[0][2]):
IpUpiSpeedChangePart2(UpiAgent[0][3]):
IpUpiSpeedChangePart2a(UpiAgent[0][3]):
IpUpiSpeedChangePart2b(UpiAgent[0][3]):
IpUpiSpeedChangePart3(UpiAgent[0][0]):
IpUpiSpeedChangePart3(UpiAgent[0][1]):
IpUpiSpeedChangePart3(UpiAgent[0][2]):
IpUpiSpeedChangePart3(UpiAgent[0][3]):
Socket 0 KTI Link 0 Freq is currently 16.0GT.
Socket 0 KTI Link 1 Freq is currently 16.0GT.
Socket 0 KTI Link 2 Freq is currently 16.0GT.
Socket 0 KTI Link 3 Freq is currently 16.0GT.
Socket 1 KTI Link 0 Freq is currently 16.0GT.
Socket 1 KTI Link 1 Freq is currently 16.0GT.
Socket 1 KTI Link 2 Freq is currently 16.0GT.
Socket 1 KTI Link 3 Freq is currently 16.0GT.
******* Full Speed Transition - END *******
******* Phy/Link Updates On Warm Reset - START *******
******* Phy/Link Updates On Warm Reset - END *******
******* Topology Discovery and Optimum Route Calculation - START *******
Locating the Rings Present in the Topology
No Rings Found
Constructing Topology Tree
Adjacency Table
----------------
S0 P0 VN0 TX (00) : S1 P0 VN0 RX (17)
S0 P0 VN0 RX (01) :
S1 P0 VN0 TX (16) : S0 P0 VN0 RX (01)
S1 P0 VN0 RX (17) :
Checking for Deadlock...
CPU0 Topology Tree
-------------------
Index Socket ParentSocket ParentPort ParentIndex Hop XOR
00 CPU0 -- -- -- 0 --
01 CPU1 CPU0 00 00 1 0
CPU1 Topology Tree
-------------------
Index Socket ParentSocket ParentPort ParentIndex Hop XOR
00 CPU1 -- -- -- 0 --
01 CPU0 CPU1 00 00 1 0
"S0 P0 VN0 TX" -> "S1 P0 VN0 RX";
"S1 P0 VN0 TX" -> "S0 P0 VN0 RX";
Calculating Route for CPU0
Calculating Route for CPU1
CPU0 Routing Table (UPI_ROUTING_TABLE*_CHA)
----------------------------------------------------
DestSocket Port
CPU1 0
1
2
3
CPU1 Routing Table (UPI_ROUTING_TABLE*_CHA)
----------------------------------------------------
DestSocket Port
CPU0 0
1
2
3
CPU0 M3KTI Route Table (M3KKRT*_M3KTI_MAIN_REG)
----------------------------------------------------------------
InPort M3KtiNum CPU0 CPU1 CPU2 CPU3 CPU4 CPU5 CPU6 CPU7
0 0 3 0 - -
1 1 3 0 - -
2 2 3 0 - -
3 3 3 0 - -
CPU1 M3KTI Route Table (M3KKRT*_M3KTI_MAIN_REG)
----------------------------------------------------------------
InPort M3KtiNum CPU0 CPU1 CPU2 CPU3 CPU4 CPU5 CPU6 CPU7
0 0 0 3 - -
1 1 0 3 - -
2 2 0 3 - -
3 3 0 3 - -
******* Topology Discovery and Optimum Route Calculation - END *******
******* Program Final IO SAD Setting - START *******
Current Bars:
Socket | SCF | PCU | MEM0 | MEM1 | MEM2 | MEM3 | MEM4 | MEM5 | MEM6 | MEM7 | SBREG |
-------------------------------------------------------------------------------------------------------------------------------------------------------
0 | 0xC8800000 | 0xC8A00000 | 0xC8A80000 | 0xC8B00000 | 0xC8B80000 | 0xC8C00000 | 0xC8C80000 | 0xC8D00000 | 0xC8D80000 | 0xC8E00000 | 0xC8E80000 |
1 | 0xFB800000 | 0xFBA00000 | 0xFBA80000 | 0xFBB00000 | 0xFBB80000 | 0xFBC00000 | 0xFBC80000 | 0xFBD00000 | 0xFBD80000 | 0xFBE00000 | 0xFBE80000 |
-------------------------------------------------------------------------------------------------------------------------------------------------------
******* Program Final IO SAD Setting - END *******
******* Program Optimum Route Table Settings - START *******
[WARNING]: S0 StackIdx:0 Read of side band register R2PGNCTRL returned 0
[WARNING]: S0 StackIdx:1 Read of side band register R2PGNCTRL returned 0
[WARNING]: S0 StackIdx:2 Read of side band register R2PGNCTRL returned 0
[WARNING]: S0 StackIdx:3 Read of side band register R2PGNCTRL returned 0
[WARNING]: S0 StackIdx:4 Read of side band register R2PGNCTRL returned 0
[WARNING]: S0 StackIdx:5 Read of side band register R2PGNCTRL returned 0
[WARNING]: S0 StackIdx:8 Read of side band register R2PGNCTRL returned 0
[WARNING]: S0 StackIdx:9 Read of side band register R2PGNCTRL returned 0
[WARNING]: S0 StackIdx:10 Read of side band register R2PGNCTRL returned 0
[WARNING]: S0 StackIdx:11 Read of side band register R2PGNCTRL returned 0
[WARNING]: S1 StackIdx:0 Read of side band register R2PGNCTRL returned 0
[WARNING]: S1 StackIdx:1 Read of side band register R2PGNCTRL returned 0
[WARNING]: S1 StackIdx:2 Read of side band register R2PGNCTRL returned 0
[WARNING]: S1 StackIdx:3 Read of side band register R2PGNCTRL returned 0
[WARNING]: S1 StackIdx:4 Read of side band register R2PGNCTRL returned 0
[WARNING]: S1 StackIdx:5 Read of side band register R2PGNCTRL returned 0
[WARNING]: S1 StackIdx:8 Read of side band register R2PGNCTRL returned 0
[WARNING]: S1 StackIdx:9 Read of side band register R2PGNCTRL returned 0
[WARNING]: S1 StackIdx:10 Read of side band register R2PGNCTRL returned 0
[WARNING]: S1 StackIdx:11 Read of side band register R2PGNCTRL returned 0
******* Program Optimum Route Table Settings - END *******
******* Program Misc. KTI Parameters - START *******
Dispatching the AP 1's for m2upi meshcreditupdate: FBE8000F
******* Program Misc. KTI Parameters - END *******
******* Program System Coherency Registers - START *******
******* Program System Coherency Registers - END *******
******* Check for S3 Resume - START *******
******* Check for S3 Resume - END *******
******* SNC Misc and Recovery - START *******
OutNumOfCluster = 4, FullSncEnable=1, SncIndEnable=1, NumClusters=3
OutNumOfCluster = 4, FullSncEnable=1, SncIndEnable=1, NumClusters=3
******* SNC Misc and Recovery - END *******
******* Collect Previous Boot Error - START *******
******* Collect Previous Boot Error - END *******
Setup Uncore Misc:
Write Socket 0 GLOBAL_PKG_C_S_CONTROL_REGISTER = 4
Write Socket 1 GLOBAL_PKG_C_S_CONTROL_REGISTER = 100
:INIT - BIOS_RESET_CPL: Set CPL1 on #S1
:INIT - BIOS_RESET_CPL: Set CPL1 on #S0
Initalize DMI RCRB region.
SetRcrbBar (): RcrbBase = 0x90000000
Warning: Created a Memory Hole: 0x90002000 ~ 0x9001FFFF
MEMBAR0: Base = 0x90020000, Size = 0x20000
Socket: 0;DMI MemBar locates on 0x90020000, Size: 0x20000
ProgramSncConfigureInChaBeforeMemoryReady
Socket0: NumOfCluster=4, UmaEn=0, BaseChaOfCluster1=13, BaseChaOfCluster2=26, BaseChaOfCluster3=39
Socket1: NumOfCluster=4, UmaEn=0, BaseChaOfCluster1=13, BaseChaOfCluster2=26, BaseChaOfCluster3=39
******* Configure M2IOSF P2P Credits - START *******
Soc 0, Shared P2P BL VNA credits: 59595959, 5959, 59595959, 61616161.
Soc 1, Shared P2P BL VNA credits: 59595959, 5959, 59595959, 61616161.
******* Configure M2IOSF P2P Credits - END *******
*******SOCKET1 STACKID SWAPPING - START *******
*******SOCKET1 STACKID SWAPPING - END *******
Current bus numbers:
Socket | Ins00 | Ins01 | Ins02 | Ins03 | Ins04 | Ins05 | Ins06 | Ins07 | Ins08 | Ins09 | Ins0A | Ins0B | Rsvd | Ubox0 | Ubox1 | LastBus | Seg
-----------------------------------------------------------------------------------------------------------------------------------------------
0 | 0x00 | 0x15 | 0x26 | 0x37 | 0x48 | 0x59 | --- | --- | 0x6A | 0x6F | 0x74 | 0x79 | --- | 0x7E | 0x7F | 0x7F | 0
1 | --- | 0x97 | 0xA7 | 0xB7 | 0xC7 | 0xD7 | 0x80 | --- | 0xE7 | 0xEC | 0xF1 | 0xF6 | --- | 0xFE | 0xFF | 0xFF | 0
-----------------------------------------------------------------------------------------------------------------------------------------------
Get FM_PCIE_FV_BIF_EN Status = Success, GpioVal = 0
******* Initialize CXL - START *******
CXL: IIO EarlyLink Init Start.
HcxType[0] = NONE
[IIO](VMD) [0] VMD disabled for RPs init.
Program HW_INIT using SB access
Program HW_INIT using SB access
Program HW_INIT using SB access
Program HW_INIT using SB access
Program HW_INIT using SB access
Program HW_INIT using SB access
Program HW_INIT using SB access
Program HW_INIT using SB access
Program HW_INIT using SB access
[0] Cpxsmb enabled
MS2IOSF_BANK_DECODER_INIT_START
MS2IOSF BankDecoder: TableSize 119, Recipe Revision 1.16
Hiding DSA Psf1DsaConfig: 0
Hiding DSA Psf1DsaConfig: 0
Hiding DSA Psf1DsaConfig: 0
Hiding DSA Psf1DsaConfig: 0
Hiding DSA Psf1DsaConfig: 100
Hiding DSA Psf1DsaConfig: 100
Hiding DSA Psf1DsaConfig: 100
Hiding DSA Psf1DsaConfig: 100
Hiding DSA Psf1DsaConfig: 100
Hiding DSA Psf1DsaConfig: 100
Hiding DSA Psf1DsaConfig: 100
Hiding DSA Psf1DsaConfig: 100
Hiding DSA Psf1DsaConfig: 100
Hiding DSA Psf1DsaConfig: 100
Hiding DSA Psf1DsaConfig: 100
Hiding DSA Psf1DsaConfig: 100
Hiding DSA Psf1DsaConfig: 100
Hiding DSA Psf1DsaConfig: 100
Hiding DSA Psf1DsaConfig: 100
Hiding DSA Psf1DsaConfig: 100
Hiding DSA Psf1DsaConfig: 100
Hiding DSA Psf1DsaConfig: 100
Hiding DSA Psf1DsaConfig: 100
Hiding DSA Psf1DsaConfig: 100
Hiding DSA Psf1DsaConfig: 100
Hiding DSA Psf1DsaConfig: 100
Hiding DSA Psf1DsaConfig: 100
Hiding DSA Psf1DsaConfig: 100
Hiding DSA Psf1DsaConfig: 100
Hiding DSA Psf1DsaConfig: 100
Hiding DSA Psf1DsaConfig: 100
Hiding DSA Psf1DsaConfig: 100
Hiding DSA Psf1DsaConfig: 100
Hiding DSA Psf1DsaConfig: 100
Hiding DSA Psf1DsaConfig: 100
Hiding DSA Psf1DsaConfig: 100
Hiding DSA Psf1DsaConfig: 100
Hiding DSA Psf1DsaConfig: 100
Hiding DSA Psf1DsaConfig: 100
Hiding DSA Psf1DsaConfig: 100
Hiding DSA Psf1DsaConfig: 100
Hiding DSA Psf1DsaConfig: 100
Hiding DSA Psf1DsaConfig: 100
Hiding DSA Psf1DsaConfig: 100
Hiding DSA Psf1DsaConfig: 100
Hiding DSA Psf1DsaConfig: 100
Hiding DSA Psf1DsaConfig: 100
Hiding DSA Psf1DsaConfig: 100
Hiding DSA Psf1DsaConfig: 100
Hiding DSA Psf1DsaConfig: 100
Hiding DSA Psf1DsaConfig: 100
Hiding DSA Psf1DsaConfig: 100
Hiding DSA Psf1DsaConfig: 100
Hiding DSA Psf1DsaConfig: 100
Hiding DSA Psf1DsaConfig: 100
Hiding DSA Psf1DsaConfig: 100
Hiding IAX Psf1IaxConfig: 0
Hiding IAX Psf1IaxConfig: 0
Hiding IAX Psf1IaxConfig: 0
Hiding IAX Psf1IaxConfig: 0
Hiding IAX Psf1IaxConfig: 100
Hiding IAX Psf1IaxConfig: 100
Hiding IAX Psf1IaxConfig: 100
Hiding IAX Psf1IaxConfig: 100
Hiding IAX Psf1IaxConfig: 100
Hiding IAX Psf1IaxConfig: 100
Hiding IAX Psf1IaxConfig: 100
Hiding IAX Psf1IaxConfig: 100
Hiding IAX Psf1IaxConfig: 100
Hiding IAX Psf1IaxConfig: 100
Hiding IAX Psf1IaxConfig: 100
Hiding IAX Psf1IaxConfig: 100
Hiding IAX Psf1IaxConfig: 100
Hiding IAX Psf1IaxConfig: 100
Hiding IAX Psf1IaxConfig: 100
Hiding IAX Psf1IaxConfig: 100
Hiding IAX Psf1IaxConfig: 100
Hiding IAX Psf1IaxConfig: 100
Hiding IAX Psf1IaxConfig: 100
Hiding IAX Psf1IaxConfig: 100
Hiding IAX Psf1IaxConfig: 100
Hiding IAX Psf1IaxConfig: 100
Hiding IAX Psf1IaxConfig: 100
Hiding IAX Psf1IaxConfig: 100
Hiding IAX Psf1IaxConfig: 100
Hiding IAX Psf1IaxConfig: 100
Hiding IAX Psf1IaxConfig: 100
Hiding IAX Psf1IaxConfig: 100
Hiding IAX Psf1IaxConfig: 100
Hiding IAX Psf1IaxConfig: 100
Hiding IAX Psf1IaxConfig: 100
Hiding IAX Psf1IaxConfig: 100
Hiding IAX Psf1IaxConfig: 100
Hiding IAX Psf1IaxConfig: 100
Hiding IAX Psf1IaxConfig: 100
Hiding IAX Psf1IaxConfig: 100
Hiding IAX Psf1IaxConfig: 100
Hiding IAX Psf1IaxConfig: 100
Hiding IAX Psf1IaxConfig: 100
Hiding IAX Psf1IaxConfig: 100
Hiding IAX Psf1IaxConfig: 100
Hiding IAX Psf1IaxConfig: 100
Hiding IAX Psf1IaxConfig: 100
Hiding IAX Psf1IaxConfig: 100
Hiding IAX Psf1IaxConfig: 100
Hiding IAX Psf1IaxConfig: 100
Hiding IAX Psf1IaxConfig: 100
Hiding IAX Psf1IaxConfig: 100
Hiding IAX Psf1IaxConfig: 100
Hiding IAX Psf1IaxConfig: 100
Hiding IAX Psf1IaxConfig: 100
Hiding IAX Psf1IaxConfig: 100
MS2IOSF_BANK_DECODER_INIT_END
[0 p0] DMI device is enabled
[0.1 p1] 00:15:01.0: PCI device 8086:352A is enabled
[0.1 p2] 00:15:02.0: PCI device FFFF:FFFF is disabled (not present)
[0.1 p3] 00:15:03.0: PCI device FFFF:FFFF is disabled (not present)
[0.1 p4] 00:15:04.0: PCI device FFFF:FFFF is disabled (not present)
[0.1 p5] 00:15:05.0: PCI device FFFF:FFFF is disabled (not present)
[0.1 p6] 00:15:06.0: PCI device FFFF:FFFF is disabled (not present)
[0.1 p7] 00:15:07.0: PCI device FFFF:FFFF is disabled (not present)
[0.1 p8] 00:15:08.0: PCI device FFFF:FFFF is disabled (not present)
[0.2 p9] 00:26:01.0: PCI device 8086:352A is enabled
[0.2 p10] 00:26:02.0: PCI device FFFF:FFFF is disabled (not present)
[0.2 p11] 00:26:03.0: PCI device FFFF:FFFF is disabled (not present)
[0.2 p12] 00:26:04.0: PCI device FFFF:FFFF is disabled (not present)
[0.2 p13] 00:26:05.0: PCI device FFFF:FFFF is disabled (not present)
[0.2 p14] 00:26:06.0: PCI device FFFF:FFFF is disabled (not present)
[0.2 p15] 00:26:07.0: PCI device FFFF:FFFF is disabled (not present)
[0.2 p16] 00:26:08.0: PCI device FFFF:FFFF is disabled (not present)
[0.3 p17] 00:37:01.0: PCI device 8086:352A is enabled
[0.3 p18] 00:37:02.0: PCI device FFFF:FFFF is disabled (not present)
[0.3 p19] 00:37:03.0: PCI device FFFF:FFFF is disabled (not present)
[0.3 p20] 00:37:04.0: PCI device FFFF:FFFF is disabled (not present)
[0.3 p21] 00:37:05.0: PCI device FFFF:FFFF is disabled (not present)
[0.3 p22] 00:37:06.0: PCI device FFFF:FFFF is disabled (not present)
[0.3 p23] 00:37:07.0: PCI device FFFF:FFFF is disabled (not present)
[0.3 p24] 00:37:08.0: PCI device FFFF:FFFF is disabled (not present)
[0.4 p25] 00:48:01.0: PCI device 8086:352A is enabled
[0.4 p26] 00:48:02.0: PCI device FFFF:FFFF is disabled (not present)
[0.4 p27] 00:48:03.0: PCI device 8086:352B is enabled
[0.4 p28] 00:48:04.0: PCI device FFFF:FFFF is disabled (not present)
[0.4 p29] 00:48:05.0: PCI device 8086:352C is enabled
[0.4 p30] 00:48:06.0: PCI device FFFF:FFFF is disabled (not present)
[0.4 p31] 00:48:07.0: PCI device 8086:352D is enabled
[0.4 p32] 00:48:08.0: PCI device FFFF:FFFF is disabled (not present)
[0.5 p33] 00:59:01.0: PCI device 8086:352A is enabled
[0.5 p34] 00:59:02.0: PCI device FFFF:FFFF is disabled (not present)
[0.5 p35] 00:59:03.0: PCI device 8086:352B is enabled
[0.5 p36] 00:59:04.0: PCI device FFFF:FFFF is disabled (not present)
[0.5 p37] 00:59:05.0: PCI device 8086:352C is enabled
[0.5 p38] 00:59:06.0: PCI device FFFF:FFFF is disabled (not present)
[0.5 p39] 00:59:07.0: PCI device 8086:352D is enabled
[0.5 p40] 00:59:08.0: PCI device FFFF:FFFF is disabled (not present)
WARNING: Platform does not support uplink port!
HcxType[1] = NONE
[IIO](VMD) [1] VMD disabled for RPs init.
Program HW_INIT using SB access
Program HW_INIT using SB access
Program HW_INIT using SB access
Program HW_INIT using SB access
Program HW_INIT using SB access
Program HW_INIT using SB access
Program HW_INIT using SB access
Program HW_INIT using SB access
Program HW_INIT using SB access
Program HW_INIT using SB access
[1] Cpxsmb enabled
MS2IOSF_BANK_DECODER_INIT_START
MS2IOSF BankDecoder: TableSize 119, Recipe Revision 1.16
Hiding DSA Psf1DsaConfig: 0
Hiding DSA Psf1DsaConfig: 0
Hiding DSA Psf1DsaConfig: 0
Hiding DSA Psf1DsaConfig: 0
Hiding DSA Psf1DsaConfig: 100
Hiding DSA Psf1DsaConfig: 100
Hiding DSA Psf1DsaConfig: 100
Hiding DSA Psf1DsaConfig: 100
Hiding DSA Psf1DsaConfig: 100
Hiding DSA Psf1DsaConfig: 100
Hiding DSA Psf1DsaConfig: 100
Hiding DSA Psf1DsaConfig: 100
Hiding DSA Psf1DsaConfig: 100
Hiding DSA Psf1DsaConfig: 100
Hiding DSA Psf1DsaConfig: 100
Hiding DSA Psf1DsaConfig: 100
Hiding DSA Psf1DsaConfig: 100
Hiding DSA Psf1DsaConfig: 100
Hiding DSA Psf1DsaConfig: 100
Hiding DSA Psf1DsaConfig: 100
Hiding DSA Psf1DsaConfig: 100
Hiding DSA Psf1DsaConfig: 100
Hiding DSA Psf1DsaConfig: 100
Hiding DSA Psf1DsaConfig: 100
Hiding DSA Psf1DsaConfig: 100
Hiding DSA Psf1DsaConfig: 100
Hiding DSA Psf1DsaConfig: 100
Hiding DSA Psf1DsaConfig: 100
Hiding DSA Psf1DsaConfig: 100
Hiding DSA Psf1DsaConfig: 100
Hiding DSA Psf1DsaConfig: 100
Hiding DSA Psf1DsaConfig: 100
Hiding DSA Psf1DsaConfig: 100
Hiding DSA Psf1DsaConfig: 100
Hiding DSA Psf1DsaConfig: 100
Hiding DSA Psf1DsaConfig: 100
Hiding DSA Psf1DsaConfig: 100
Hiding DSA Psf1DsaConfig: 100
Hiding DSA Psf1DsaConfig: 100
Hiding DSA Psf1DsaConfig: 100
Hiding DSA Psf1DsaConfig: 100
Hiding DSA Psf1DsaConfig: 100
Hiding DSA Psf1DsaConfig: 100
Hiding DSA Psf1DsaConfig: 100
Hiding DSA Psf1DsaConfig: 100
Hiding DSA Psf1DsaConfig: 100
Hiding DSA Psf1DsaConfig: 100
Hiding DSA Psf1DsaConfig: 100
Hiding DSA Psf1DsaConfig: 100
Hiding DSA Psf1DsaConfig: 100
Hiding DSA Psf1DsaConfig: 100
Hiding DSA Psf1DsaConfig: 100
Hiding DSA Psf1DsaConfig: 100
Hiding DSA Psf1DsaConfig: 100
Hiding DSA Psf1DsaConfig: 100
Hiding DSA Psf1DsaConfig: 100
Hiding IAX Psf1IaxConfig: 0
Hiding IAX Psf1IaxConfig: 0
Hiding IAX Psf1IaxConfig: 0
Hiding IAX Psf1IaxConfig: 0
Hiding IAX Psf1IaxConfig: 100
Hiding IAX Psf1IaxConfig: 100
Hiding IAX Psf1IaxConfig: 100
Hiding IAX Psf1IaxConfig: 100
Hiding IAX Psf1IaxConfig: 100
Hiding IAX Psf1IaxConfig: 100
Hiding IAX Psf1IaxConfig: 100
Hiding IAX Psf1IaxConfig: 100
Hiding IAX Psf1IaxConfig: 100
Hiding IAX Psf1IaxConfig: 100
Hiding IAX Psf1IaxConfig: 100
Hiding IAX Psf1IaxConfig: 100
Hiding IAX Psf1IaxConfig: 100
Hiding IAX Psf1IaxConfig: 100
Hiding IAX Psf1IaxConfig: 100
Hiding IAX Psf1IaxConfig: 100
Hiding IAX Psf1IaxConfig: 100
Hiding IAX Psf1IaxConfig: 100
Hiding IAX Psf1IaxConfig: 100
Hiding IAX Psf1IaxConfig: 100
Hiding IAX Psf1IaxConfig: 100
Hiding IAX Psf1IaxConfig: 100
Hiding IAX Psf1IaxConfig: 100
Hiding IAX Psf1IaxConfig: 100
Hiding IAX Psf1IaxConfig: 100
Hiding IAX Psf1IaxConfig: 100
Hiding IAX Psf1IaxConfig: 100
Hiding IAX Psf1IaxConfig: 100
Hiding IAX Psf1IaxConfig: 100
Hiding IAX Psf1IaxConfig: 100
Hiding IAX Psf1IaxConfig: 100
Hiding IAX Psf1IaxConfig: 100
Hiding IAX Psf1IaxConfig: 100
Hiding IAX Psf1IaxConfig: 100
Hiding IAX Psf1IaxConfig: 100
Hiding IAX Psf1IaxConfig: 100
Hiding IAX Psf1IaxConfig: 100
Hiding IAX Psf1IaxConfig: 100
Hiding IAX Psf1IaxConfig: 100
Hiding IAX Psf1IaxConfig: 100
Hiding IAX Psf1IaxConfig: 100
Hiding IAX Psf1IaxConfig: 100
Hiding IAX Psf1IaxConfig: 100
Hiding IAX Psf1IaxConfig: 100
Hiding IAX Psf1IaxConfig: 100
Hiding IAX Psf1IaxConfig: 100
Hiding IAX Psf1IaxConfig: 100
Hiding IAX Psf1IaxConfig: 100
Hiding IAX Psf1IaxConfig: 100
Hiding IAX Psf1IaxConfig: 100
Hiding IAX Psf1IaxConfig: 100
Hiding IAX Psf1IaxConfig: 100
MS2IOSF_BANK_DECODER_INIT_END
[1.1 p1] 00:97:01.0: PCI device 8086:352A is enabled
[1.1 p2] 00:97:02.0: PCI device FFFF:FFFF is disabled (not present)
[1.1 p3] 00:97:03.0: PCI device FFFF:FFFF is disabled (not present)
[1.1 p4] 00:97:04.0: PCI device FFFF:FFFF is disabled (not present)
[1.1 p5] 00:97:05.0: PCI device FFFF:FFFF is disabled (not present)
[1.1 p6] 00:97:06.0: PCI device FFFF:FFFF is disabled (not present)
[1.1 p7] 00:97:07.0: PCI device FFFF:FFFF is disabled (not present)
[1.1 p8] 00:97:08.0: PCI device FFFF:FFFF is disabled (not present)
[1.2 p9] 00:A7:01.0: PCI device 8086:352A is enabled
[1.2 p10] 00:A7:02.0: PCI device FFFF:FFFF is disabled (not present)
[1.2 p11] 00:A7:03.0: PCI device FFFF:FFFF is disabled (not present)
[1.2 p12] 00:A7:04.0: PCI device FFFF:FFFF is disabled (not present)
[1.2 p13] 00:A7:05.0: PCI device FFFF:FFFF is disabled (not present)
[1.2 p14] 00:A7:06.0: PCI device FFFF:FFFF is disabled (not present)
[1.2 p15] 00:A7:07.0: PCI device FFFF:FFFF is disabled (not present)
[1.2 p16] 00:A7:08.0: PCI device FFFF:FFFF is disabled (not present)
[1.3 p17] 00:B7:01.0: PCI device 8086:352A is enabled
[1.3 p18] 00:B7:02.0: PCI device FFFF:FFFF is disabled (not present)
[1.3 p19] 00:B7:03.0: PCI device FFFF:FFFF is disabled (not present)
[1.3 p20] 00:B7:04.0: PCI device FFFF:FFFF is disabled (not present)
[1.3 p21] 00:B7:05.0: PCI device FFFF:FFFF is disabled (not present)
[1.3 p22] 00:B7:06.0: PCI device FFFF:FFFF is disabled (not present)
[1.3 p23] 00:B7:07.0: PCI device FFFF:FFFF is disabled (not present)
[1.3 p24] 00:B7:08.0: PCI device FFFF:FFFF is disabled (not present)
[1.4 p25] 00:C7:01.0: PCI device 8086:352A is enabled
[1.4 p26] 00:C7:02.0: PCI device FFFF:FFFF is disabled (not present)
[1.4 p27] 00:C7:03.0: PCI device 8086:352B is enabled
[1.4 p28] 00:C7:04.0: PCI device FFFF:FFFF is disabled (not present)
[1.4 p29] 00:C7:05.0: PCI device 8086:352C is enabled
[1.4 p30] 00:C7:06.0: PCI device FFFF:FFFF is disabled (not present)
[1.4 p31] 00:C7:07.0: PCI device 8086:352D is enabled
[1.4 p32] 00:C7:08.0: PCI device FFFF:FFFF is disabled (not present)
[1.5 p33] 00:D7:01.0: PCI device 8086:352A is enabled
[1.5 p34] 00:D7:02.0: PCI device FFFF:FFFF is disabled (not present)
[1.5 p35] 00:D7:03.0: PCI device 8086:352B is enabled
[1.5 p36] 00:D7:04.0: PCI device FFFF:FFFF is disabled (not present)
[1.5 p37] 00:D7:05.0: PCI device 8086:352C is enabled
[1.5 p38] 00:D7:06.0: PCI device FFFF:FFFF is disabled (not present)
[1.5 p39] 00:D7:07.0: PCI device 8086:352D is enabled
[1.5 p40] 00:D7:08.0: PCI device FFFF:FFFF is disabled (not present)
[1.6 p41] 00:80:01.0: PCI device 8086:352A is enabled
[1.6 p42] 00:80:02.0: PCI device FFFF:FFFF is disabled (not present)
[1.6 p43] 00:80:03.0: PCI device FFFF:FFFF is disabled (not present)
[1.6 p44] 00:80:04.0: PCI device FFFF:FFFF is disabled (not present)
[1.6 p45] 00:80:05.0: PCI device 8086:352C is enabled
[1.6 p46] 00:80:06.0: PCI device FFFF:FFFF is disabled (not present)
[1.6 p47] 00:80:07.0: PCI device FFFF:FFFF is disabled (not present)
[1.6 p48] 00:80:08.0: PCI device FFFF:FFFF is disabled (not present)
Calling IioEarlyIntiazeEntry Start
[0] IioAllocateMmioResource: Seg=0, MaxStackPerSocket=12
[0.0] Temp BUS: 0x00 -> 0x00 | MMIOL: 0x90122000 -> 0x957FFFFF
[0.1] Temp BUS: 0x15 -> 0x15 | MMIOL: 0x95900000 -> 0x9F7FFFFF
[0.2] Temp BUS: 0x26 -> 0x26 | MMIOL: 0x9F900000 -> 0xA93FFFFF
[0.3] Temp BUS: 0x37 -> 0x37 | MMIOL: 0xA9500000 -> 0xB2FFFFFF
[0.4] Temp BUS: 0x48 -> 0x48 | MMIOL: 0xB3100000 -> 0xBCBFFFFF
[0.5] Temp BUS: 0x59 -> 0x59 | MMIOL: 0xBCD00000 -> 0xC67FFFFF
[0.8] Temp BUS: 0x6A -> 0x6A | MMIOL: 0xC6900000 -> 0xC6FFFFFF
[0.9] Temp BUS: 0x6F -> 0x6F | MMIOL: 0xC7100000 -> 0xC77FFFFF
[0.10] Temp BUS: 0x74 -> 0x74 | MMIOL: 0xC7900000 -> 0xC7FFFFFF
[0.11] Temp BUS: 0x79 -> 0x79 | MMIOL: 0xC8100000 -> 0xC87FFFFF
[0] IIO Early Link Training Starting...
Recipy decompressing...
Socket[0] Stack[0] Program RX recipe values START...
Program recipe revision 2.009 (Info : 1.5:, len 2556)
[0] Program RX recipe values END
Recipy decompressing...
Socket[0] Stack[1] Program RX recipe values START...
Program recipe revision 2.009 (Info : 1.5:, len 2966)
[0] Program RX recipe values END
Socket[0] Stack[2] Program RX recipe values START...
Program recipe revision 2.009 (Info : 1.5:, len 2966)
[0] Program RX recipe values END
Socket[0] Stack[3] Program RX recipe values START...
Program recipe revision 2.009 (Info : 1.5:, len 2966)
[0] Program RX recipe values END
Socket[0] Stack[4] Program RX recipe values START...
Program recipe revision 2.009 (Info : 1.5:, len 2966)
[0] Program RX recipe values END
Socket[0] Stack[5] Program RX recipe values START...
Program recipe revision 2.009 (Info : 1.5:, len 2966)
[0] Program RX recipe values END
CXL_IO_PRE_TRAIN_INIT_START
CXL_IO_PRE_TRAIN_INIT_END
FBLP_PRE_TRAIN_INIT_START
FBLP_PRE_TRAIN_INIT_END
[0 p0] IioDmiLinkInit
[0 p0] DMI link speed vector IIO 0xF, PCH 0x7 -> target speed 3
[0] IIO Early Link Training Completed!
[1] IioAllocateMmioResource: Seg=0, MaxStackPerSocket=12
[1.1] Temp BUS: 0x97 -> 0x97 | MMIOL: 0xD1500000 -> 0xD97FFFFF
[1.2] Temp BUS: 0xA7 -> 0xA7 | MMIOL: 0xD9900000 -> 0xE17FFFFF
[1.3] Temp BUS: 0xB7 -> 0xB7 | MMIOL: 0xE1900000 -> 0xE97FFFFF
[1.4] Temp BUS: 0xC7 -> 0xC7 | MMIOL: 0xE9900000 -> 0xF17FFFFF
[1.5] Temp BUS: 0xD7 -> 0xD7 | MMIOL: 0xF1900000 -> 0xF97FFFFF
[1.6] Temp BUS: 0x80 -> 0x80 | MMIOL: 0xC9100000 -> 0xD13FFFFF
[1.8] Temp BUS: 0xE7 -> 0xE7 | MMIOL: 0xF9900000 -> 0xF9FFFFFF
[1.9] Temp BUS: 0xEC -> 0xEC | MMIOL: 0xFA100000 -> 0xFA7FFFFF
[1.10] Temp BUS: 0xF1 -> 0xF1 | MMIOL: 0xFA900000 -> 0xFAFFFFFF
[1.11] Temp BUS: 0xF6 -> 0xF6 | MMIOL: 0xFB100000 -> 0xFB7FFFFF
[1] IIO Early Link Training Starting...
Recipy decompressing...
Recipy decompressing...
Socket[1] Stack[1] Program RX recipe values START...
Program recipe revision 2.009 (Info : 1.5:, len 2966)
[1] Program RX recipe values END
Socket[1] Stack[2] Program RX recipe values START...
Program recipe revision 2.009 (Info : 1.5:, len 2966)
[1] Program RX recipe values END
Socket[1] Stack[3] Program RX recipe values START...
Program recipe revision 2.009 (Info : 1.5:, len 2966)
[1] Program RX recipe values END
Socket[1] Stack[4] Program RX recipe values START...
Program recipe revision 2.009 (Info : 1.5:, len 2966)
[1] Program RX recipe values END
Socket[1] Stack[5] Program RX recipe values START...
Program recipe revision 2.009 (Info : 1.5:, len 2966)
[1] Program RX recipe values END
Socket[1] Stack[6] Program RX recipe values START...
Program recipe revision 2.009 (Info : 1.5:, len 2966)
[1] Program RX recipe values END
CXL_IO_PRE_TRAIN_INIT_START
CXL_IO_PRE_TRAIN_INIT_END
FBLP_PRE_TRAIN_INIT_START
FBLP_PRE_TRAIN_INIT_END
[1] IIO Early Link Training Completed!
IIO CXL Status Socket 0:
[0.1] NotTrained
[0.2] NotTrained
[0.3] NotTrained
[0.4] NotSupportCxlMode
[0.5] NotSupportCxlMode
[0.6] NotSupportCxlMode
[0.7] NotSupportCxlMode
IIO CXL Status Socket 1:
[1.1] NotTrained
[1.2] NotTrained
[1.3] NotTrained
[1.4] NotSupportCxlMode
[1.5] NotSupportCxlMode
[1.6] NotSupportCxlMode
[1.7] NotSupportCxlMode
CXL_NOTIFY_PCODE_START
CXL_NOTIFY_PCODE_END
IIO Early Link Tc/Vc Configuration Start
Final Tc/VC mapping:
[0] Program TC/VC mapping on IIO side
[0] Program/Poll TC/VC mapping on PCH side
Poll TC/VC mapping on IIO side
IIO Early Link Tc/Vc Configuration End
Calling IioEarlyIntiazeEntry Stop
******* Initialize CXL - END *******
******* OOBMSM PreMem Configure - START *******
******* UncoreEnablePeciAccess - START *******
******* UncoreEnablePeciAccess - END *******
******* OOBMSM PreMem Configure - END *******
**KTI Output Structure **
OutD2KCreditConfig: 0 [1:Low,2:Med,3:High]
SnoopThrottleConfig: 0 [0:Dis,1:Low,2:Med,3:High,4:Auto]
OutUpiAffinityEn for CHA and M2M: 0
OutTwoSktTopology : 5
OutM2iosfToUpiAffinity: 1
OutPmonConfig: 2 [1:Reduced,2:Full,3:Auto,0:Disabled]
OutM2IosfPmonAccessControl: 0 [0:Restricted,1:Full,2:Auto]
OutD2kEn: 0
OutLegacyVgaSoc: 0
OutLegacyVgaStack: 0
OutIsocEn: 0
OutHitMeEn: 1
OutSncEn: 4 (SNC4)
OutUmaClustering: 0
OutSysDirectoryModeEn: 1
OutKtiPrefetch: 0
OutXptPrefetch: 0
OutXptRemotePrefetch: 0
OutSncPrefetchEn: 4
OutSncGbAlignRequired: 1
OutIsRouteThrough: 0
OutStaleAtoSOptEn: 2
OutSystemRasType: 6 (ADVANCED)
OutIoDcMode: 5 (IODC_EN_REM_INVITOM_AND_WCILF)
KtiCurrentLinkSpeedMode: 1 (FAST)
OutKtiLinkSpeed: 2 (16.0)
OutKtiLinkL0pEn: 0 (DISABLED)
OutKtiLinkL1En: 1 (ENABLED)
OutKtiFailoverEn: 1 (ENABLED)
OutKtiCrcMode: 0 (16BIT)
OutBoardVsCpuConflict: 0x0
OutKtiAdaptationEnable: 0x0
OutKtiPerLinkL1En (per port):
S0:1 1 1 1
S1:1 1 1 1
S2:0 0 0 0
S3:0 0 0 0
PchPresentBitMap: 0x01
OutKtiFpgaPresent (per socket): S0: 0 S1: 0 S2: 0 S3: 0
OutKtiFpgaEnable (per socket): S0: 0 S1: 0 S2: 0 S3: 0
OutFpgaHomeAgent (per socket): S0: 0 S1: 0 S2: 0 S3: 0
OutFpgaCacheAgent (per socket): S0: 0 S1: 0 S2: 0 S3: 0
OutStackDisableBitMap (per socket): S0: 0x0 S1: 0x0 S2: 0x0 S3: 0x0
mmCfgBase: 0x80000000
mmCfgSize: 0x10000000
mmiolBase: 0x90000000
mmiolSize: 0x6C000000
mmiohBase: 0x00002000
lowGap : 0x20
SecondaryNodeBitMap: 0x00
CpuPaLimit: 0
KtiInternalGlobal:
->SnoopFanoutEn: 0
->SysOsbEn: 1
->D2cEn: 1
->D2kEn: 0
->SnoopFilter: 0
->DualLinksInterleavingMode: 2
->UpiInterleaveMode: 2
->EightSocketTopology: 0
->SnoopFanoutChaInterleaveEn: 0
KtiLinkVnaOverride (per port - final values):
S0:138 138 138 138
S1:138 138 138 138
S2:254 254 254 254
S3:254 254 254 254
IIO STACK rootbus ID mapping table
Stack ID | Root Bus ID
0 ------- 0
1 ------- 1
2 ------- 2
3 ------- 3
4 ------- 4
5 ------- 5
6 ------- 6
7 ------- 7
8 ------- 8
9 ------- 9
10 ------- 10
11 ------- 11
OutDfxPrqBlockEn: 0
OutDfxAeg0CounterLowVal: 40
OutDfxAeg0CounterHighVal: 60
**KTI Output Structure End**
******* KTIRC Exit *******
KTI Init completed! Reset Requested: 0
RC debug buffering, compression, and sync ready
Pipe Init starting...
Pass PIPE_DISPATCH_SYNCH_PSYSHOST to socket 1
Pass PeiPipeFollowerInit
CAR MEM Range 0xFE800000 - 0xFE983B67
Pass pointer to Host: 0xFE800014
Sending address of Memory Policy: 0xFE96FF80
Pass boot mode 0
Send data buffer
Send data dwordcount 60EDA
Send data...complete
CAR MEM Range2 0xFE9DC000 - 0xFE9DFFFF
Send data buffer
Send data dwordcount 1000
Send data...complete
Send data buffer
Send data dwordcount 18F
Send data...complete
N1 Checked into Pipe
Pipe Init completed! Reset Requested: 0
CPU Feature Early Config starting...
CpuInit Start
CpuUncoreInit()
: Get UncoreRatioLimit MaxClrRatio: 24, MinClrRatio: 8, UncoreRatioLimit.Uint32 = 0x818
: Get UncoreRatioLimit MaxClrRatio: 24, MinClrRatio: 8, UncoreRatioLimit.Uint32 = 0x818
:UFS: Update BIOS_SPARE2_PCU Bit[20] = 0 on S0
Write Socket 0 MSR_UNCORE_RATIO_LIMIT.MinClrRatio [14:8] = 8, MSR_UNCORE_RATIO_LIMIT.MaxClrRatio [6:0] = 24
:UFS: Update BIOS_SPARE2_PCU Bit[20] = 0 on S1
Write Socket 1 MSR_UNCORE_RATIO_LIMIT.MinClrRatio [14:8] = 8, MSR_UNCORE_RATIO_LIMIT.MaxClrRatio [6:0] = 24
Get socket PPIN
: PPIN = 22E546CB1AD8E915
Get socket PPIN
: PPIN = 22E548CB80015B4D
:: ProgramProcessorFlexRatio()
:: System Capable : AVX SST-CP SST-BF
1 1 0
:: SstPpCapableSystem : LevelEnableMask MaxLevel
0 00 00
S0_0 FusedCoresMask = 0x0DABBB6EAF4EE9DB FusedCoreCount = 40
GetAllConfigTdpLevels() Enter
S0_0 ConfigTdpLevel(0) IssCoreMask = 0x0DABBB6EAF4EE9DB IssCoreCount = 40
GetAllConfigTdpLevels() Exit
:: S0 MaxRatio : MinRatio : MinOpRatio : ConfigTdpMaxLevel
17 08 05 02
:: S0 Current SST-PP Level : Current SST-PP Lock
00 0
Level : PkgTDP : SSE P1 : AVX2 P1 : AVX3 P1 : Core Count
0 : 000350 : 000017 : 000014 : 000011 : 040, [0] 40
3 : 000000 : 000000 : 000000 : 000000 : 000, [0] 00
4 : 000000 : 000000 : 000000 : 000000 : 000, [0] 00
Level : Turbo Ratio Limit - SSE P1 : AVX2 P1 : AVX3 P1
0 : - : 181818191A1E2023 : 17171718191E2023 : 16161617171D1F22
3 : - : 0000000000000000 : 0000000000000000 : 0000000000000000
4 : - : 0000000000000000 : 0000000000000000 : 0000000000000000
Level : TJMax : CoreMask
0 : 100 : [0] 0DABBB6EAF4EE9DB
3 : 000 : [0] 0000000000000000
4 : 000 : [0] 0000000000000000
Level : SstBf - P1_Hi : P1_Lo : CoreMask
0 : 0000 : 0000 : [0] 0000000000000000
3 : 0000 : 0000 : [0] 0000000000000000
4 : 0000 : 0000 : [0] 0000000000000000
Core Ratio Info
Level : P0 : P1 : Pn : Pm
0 : 000035 : 000017 : 000008 : 000005
3 : 000000 : 000000 : 000000 : 000000
4 : 000000 : 000000 : 000000 : 000000
Uncore Ratio Info
Level : P0 : P1 : Pn : Pm
0 : 000024 : 000014 : 000008 : 000008
3 : 000000 : 000000 : 000000 : 000000
4 : 000000 : 000000 : 000000 : 000000
S1_0 FusedCoresMask = 0x0DB9772F6F4EE9DB FusedCoreCount = 40
GetAllConfigTdpLevels() Enter
S1_0 ConfigTdpLevel(0) IssCoreMask = 0x0DB9772F6F4EE9DB IssCoreCount = 40
GetAllConfigTdpLevels() Exit
:: S1 MaxRatio : MinRatio : MinOpRatio : ConfigTdpMaxLevel
17 08 05 02
:: S1 Current SST-PP Level : Current SST-PP Lock
00 0
Level : PkgTDP : SSE P1 : AVX2 P1 : AVX3 P1 : Core Count
0 : 000350 : 000017 : 000014 : 000011 : 040, [0] 40
3 : 000000 : 000000 : 000000 : 000000 : 000, [0] 00
4 : 000000 : 000000 : 000000 : 000000 : 000, [0] 00
Level : Turbo Ratio Limit - SSE P1 : AVX2 P1 : AVX3 P1
0 : - : 181818191A1E2023 : 17171718191E2023 : 16161617171D1F22
3 : - : 0000000000000000 : 0000000000000000 : 0000000000000000
4 : - : 0000000000000000 : 0000000000000000 : 0000000000000000
Level : TJMax : CoreMask
0 : 100 : [0] 0DB9772F6F4EE9DB
3 : 000 : [0] 0000000000000000
4 : 000 : [0] 0000000000000000
Level : SstBf - P1_Hi : P1_Lo : CoreMask
0 : 0000 : 0000 : [0] 0000000000000000
3 : 0000 : 0000 : [0] 0000000000000000
4 : 0000 : 0000 : [0] 0000000000000000
Core Ratio Info
Level : P0 : P1 : Pn : Pm
0 : 000035 : 000017 : 000008 : 000005
3 : 000000 : 000000 : 000000 : 000000
4 : 000000 : 000000 : 000000 : 000000
Uncore Ratio Info
Level : P0 : P1 : Pn : Pm
0 : 000024 : 000014 : 000008 : 000008
3 : 000000 : 000000 : 000000 : 000000
4 : 000000 : 000000 : 000000 : 000000
:: CommonMaxRatio : CommonMinRatio : Target Ratio
17 08 17
:: IssTdpLevel : AvxP1Level
00 00
:: TargetRatio: 17 is ready (RatioChangeFlag: 0), SstPpCurrentLevel: 0
:: SetActiveCoresAndLpEnableDisable()
:: S0_0 BIST_FAILURE_LOCAL_MASK = 0000000000000000
:: S0 setup input disable = 0000000000000000
:: S0_0 AvailCoresMask = 0DABBB6EAF4EE9DB
:: S0_0 ResolvedCoresMask = 0DABBB6EAF4EE9DB
:: S0_0 DesiredCoresCurrent = 0000000000000000
:: S0_0 BistResultMask = 0000000000000000
:: S0_0 CoreDisableReqMask = 0000000000000000
:: S0_0 NumberOfCoresDisabledMask = 0000000000000000
:: CheckCpuBist = 1
:: CoreFailover = 1
[s0_0] MaxLpEnable = 0, LpCapable = 1, MaxLpEnable knob = 0, Lock Status = 0
S0_0 MaxEnabledCores = 0
S0_0 FusedCoreCount = 40
S0_0 NonSparingCoresMask= FFFFFFFFFFFFFFFF
:: S0_0 DesiredCoresNew = 0000000000000000
:: S1_0 BIST_FAILURE_LOCAL_MASK = 0000000000000000
:: S1 setup input disable = 0000000000000000
:: S1_0 AvailCoresMask = 0DB9772F6F4EE9DB
:: S1_0 ResolvedCoresMask = 0DB9772F6F4EE9DB
:: S1_0 DesiredCoresCurrent = 0000000000000000
:: S1_0 BistResultMask = 0000000000000000
:: S1_0 CoreDisableReqMask = 0000000000000000
:: S1_0 NumberOfCoresDisabledMask = 0000000000000000
:: CheckCpuBist = 1
:: CoreFailover = 1
[s1_0] MaxLpEnable = 0, LpCapable = 1, MaxLpEnable knob = 0, Lock Status = 0
S1_0 MaxEnabledCores = 0
S1_0 FusedCoreCount = 40
S1_0 NonSparingCoresMask= FFFFFFFFFFFFFFFF
:: S1_0 DesiredCoresNew = 0000000000000000
CPUMISC Current S 0:
ITBM is not supported
CPUMISC Current S 1:
ITBM is not supported
CPU Feature Early Config completed! Reset Requested: 0
PrevBootErrors: No Memory MCA Error Found
PrevBootErrors - Valid MCA UC entries: 0
[CSR PCI BAR Access] Address:0xFFFFFFFF000000D4; PCI Cmd: 0xFFFF
[CSR PCI BAR Access] Address:0xFFFFFFFF000000D4; PCI Cmd: 0xFFFF
START_MRC_RUN
Detect ColdBootSlowRequiredFlag and will force slow cold boot.
N0: Bus Instance = 0; I2C speed = 3; I3C speed = 2; Bus mode = 0
N0: Bus Instance = 1; I2C speed = 3; I3C speed = 2; Bus mode = 0
N0: Bus Instance = 0; I2C speed = 3; I3C speed = 2; Bus mode = 1
N0: Bus Instance = 0; I2C speed = 3; I3C speed = 2; Bus mode = 1
N0: Bus Instance = 0; I2C speed = 3; I3C speed = 2; Bus mode = 1
N0: Bus Instance = 0; I2C speed = 3; I3C speed = 2; Bus mode = 1
N0: Bus Instance = 0; I2C speed = 3; I3C speed = 2; Bus mode = 1
N0: Bus Instance = 0; I2C speed = 3; I3C speed = 2; Bus mode = 1
N0: Bus Instance = 1; I2C speed = 3; I3C speed = 2; Bus mode = 1
N0: Bus Instance = 1; I2C speed = 3; I3C speed = 2; Bus mode = 1
N0: Bus Instance = 1; I2C speed = 3; I3C speed = 2; Bus mode = 1
N0: Bus Instance = 1; I2C speed = 3; I3C speed = 2; Bus mode = 1
N0: Bus Instance = 1; I2C speed = 3; I3C speed = 2; Bus mode = 1
N0: Bus Instance = 1; I2C speed = 3; I3C speed = 2; Bus mode = 1
N0: Bus Instance = 0; I2C speed = 3; I3C speed = 2; Bus mode = 0
N0: Bus Instance = 0; I2C speed = 3; I3C speed = 2; Bus mode = 0
N0: Bus Instance = 0; I2C speed = 3; I3C speed = 2; Bus mode = 0
N0: Bus Instance = 0; I2C speed = 3; I3C speed = 2; Bus mode = 0
N0: Bus Instance = 0; I2C speed = 3; I3C speed = 2; Bus mode = 0
N0: Bus Instance = 0; I2C speed = 3; I3C speed = 2; Bus mode = 0
N0: Bus Instance = 1; I2C speed = 3; I3C speed = 2; Bus mode = 0
N0: Bus Instance = 1; I2C speed = 3; I3C speed = 2; Bus mode = 0
N0: Bus Instance = 1; I2C speed = 3; I3C speed = 2; Bus mode = 0
N0: Bus Instance = 1; I2C speed = 3; I3C speed = 2; Bus mode = 0
N0: Bus Instance = 1; I2C speed = 3; I3C speed = 2; Bus mode = 0
N0: Bus Instance = 1; I2C speed = 3; I3C speed = 2; Bus mode = 0
N0: Dimm changed.
Processors changed.
Get socket PPIN
: PPIN = 22E546CB1AD8E915
setupChanged: 1
Clearing the MRC NVRAM structure.
bootMode = NormalBoot
subBootMode = ColdBoot
[ScktId: 0] Parallel Mode Dispatch -- Started
Dispatch N1 for MemInit
N1 Entering MRC
Detect ColdBootSlowRequiredFlag and will force slow cold boot.
N1: Bus Instance = 0; I2C speed = 3; I3C speed = 2; Bus mode = 0
N1: Bus Instance = 1; I2C speed = 3; I3C speed = 2; Bus mode = 0
N1: Bus Instance = 0; I2C speed = 3; I3C speed = 2; Bus mode = 1
N1: Bus Instance = 0; I2C speed = 3; I3C speed = 2; Bus mode = 1
N1: Bus Instance = 0; I2C speed = 3; I3C speed = 2; Bus mode = 1
N1: Bus Instance = 0; I2C speed = 3; I3C speed = 2; Bus mode = 1
N1: Bus Instance = 0; I2C speed = 3; I3C speed = 2; Bus mode = 1
N1: Bus Instance = 0; I2C speed = 3; I3C speed = 2; Bus mode = 1
N1: Bus Instance = 1; I2C speed = 3; I3C speed = 2; Bus mode = 1
N1: Bus Instance = 1; I2C speed = 3; I3C speed = 2; Bus mode = 1
N1: Bus Instance = 1; I2C speed = 3; I3C speed = 2; Bus mode = 1
N1: Bus Instance = 1; I2C speed = 3; I3C speed = 2; Bus mode = 1
N1: Bus Instance = 1; I2C speed = 3; I3C speed = 2; Bus mode = 1
N1: Bus Instance = 1; I2C speed = 3; I3C speed = 2; Bus mode = 1
N1: Bus Instance = 0; I2C speed = 3; I3C speed = 2; Bus mode = 0
N1: Bus Instance = 0; I2C speed = 3; I3C speed = 2; Bus mode = 0
N1: Bus Instance = 0; I2C speed = 3; I3C speed = 2; Bus mode = 0
N1: Bus Instance = 0; I2C speed = 3; I3C speed = 2; Bus mode = 0
N1: Bus Instance = 0; I2C speed = 3; I3C speed = 2; Bus mode = 0
N1: Bus Instance = 0; I2C speed = 3; I3C speed = 2; Bus mode = 0
N1: Bus Instance = 1; I2C speed = 3; I3C speed = 2; Bus mode = 0
N1: Bus Instance = 1; I2C speed = 3; I3C speed = 2; Bus mode = 0
N1: Bus Instance = 1; I2C speed = 3; I3C speed = 2; Bus mode = 0
N1: Bus Instance = 1; I2C speed = 3; I3C speed = 2; Bus mode = 0
N1: Bus Instance = 1; I2C speed = 3; I3C speed = 2; Bus mode = 0
N1: Bus Instance = 1; I2C speed = 3; I3C speed = 2; Bus mode = 0
N1: Dimm changed.
Get socket PPIN
: PPIN = 22E548CB80015B4D
setupChanged: 1
Clearing the MRC NVRAM structure.
bootMode = NormalBoot
subBootMode = ColdBoot
[ScktId: 1] Parallel Mode Dispatch -- Started
[ScktId: 0] Parallel Mode Dispatch - 203ms
[ScktId: 1] Parallel Mode Dispatch - 4ms
[ScktId: 0] Pipe Sync AP Boot Mode -- Started
[ScktId: 1] Pipe Sync AP Boot Mode -- Started
[ScktId: 0] Pipe Sync AP Boot Mode - 13ms
[ScktId: 1] Pipe Sync AP Boot Mode - 9ms
N1 Checked into Pipe
[ScktId: 0] Select Boot Mode -- Started
DetermineBootMode: ColdBoot
[ScktId: 0] Select Boot Mode - 8ms
[ScktId: 1] Pipe Sync SBSP Boot Mode -- Started
[ScktId: 0] Pipe Sync SBSP Boot Mode -- Started
[ScktId: 1] Pipe Sync SBSP Boot Mode - 9ms
[ScktId: 0] Pipe Sync SBSP Boot Mode - 9ms
[ScktId: 1] Init Structures Late -- Started
[ScktId: 0] Init Structures Late -- Started
[ScktId: 1] Init Structures Late - 8ms
[ScktId: 0] Init Structures Late - 8ms
[ScktId: 1] Detect DIMM Configuration -- Started
[ScktId: 0] Detect DIMM Configuration -- Started
N1: Bus Instance = 0; I2C speed = 3; I3C speed = 2; Bus mode = 0
N0: Bus Instance = 0; I2C speed = 3; I3C speed = 2; Bus mode = 0
N1: Bus Instance = 0; I2C speed = 3; I3C speed = 2; Bus mode = 0
N0: Bus Instance = 0; I2C speed = 3; I3C speed = 2; Bus mode = 0
N1: Bus Instance = 0; I2C speed = 3; I3C speed = 2; Bus mode = 0
N0: Bus Instance = 0; I2C speed = 3; I3C speed = 2; Bus mode = 0
N1: Bus Instance = 0; I2C speed = 3; I3C speed = 2; Bus mode = 0
N0: Bus Instance = 0; I2C speed = 3; I3C speed = 2; Bus mode = 0
N1: Bus Instance = 0; I2C speed = 3; I3C speed = 2; Bus mode = 0
N0: Bus Instance = 0; I2C speed = 3; I3C speed = 2; Bus mode = 0
N1: Bus Instance = 0; I2C speed = 3; I3C speed = 2; Bus mode = 0
N0: Bus Instance = 0; I2C speed = 3; I3C speed = 2; Bus mode = 0
N1: Bus Instance = 1; I2C speed = 3; I3C speed = 2; Bus mode = 0
N0: Bus Instance = 1; I2C speed = 3; I3C speed = 2; Bus mode = 0
N1: Bus Instance = 1; I2C speed = 3; I3C speed = 2; Bus mode = 0
N0: Bus Instance = 1; I2C speed = 3; I3C speed = 2; Bus mode = 0
N1: Bus Instance = 1; I2C speed = 3; I3C speed = 2; Bus mode = 0
N0: Bus Instance = 1; I2C speed = 3; I3C speed = 2; Bus mode = 0
N1: Bus Instance = 1; I2C speed = 3; I3C speed = 2; Bus mode = 0
N0: Bus Instance = 1; I2C speed = 3; I3C speed = 2; Bus mode = 0
N1: Bus Instance = 1; I2C speed = 3; I3C speed = 2; Bus mode = 0
N0: Bus Instance = 1; I2C speed = 3; I3C speed = 2; Bus mode = 0
N1: Bus Instance = 1; I2C speed = 3; I3C speed = 2; Bus mode = 0
N0: Bus Instance = 1; I2C speed = 3; I3C speed = 2; Bus mode = 0
[ScktId: 1] Detect DIMM Configuration - 320ms
[ScktId: 0] Detect DIMM Configuration - 322ms
[ScktId: 1] Pipe Sync AP Data -- Started
[ScktId: 0] Pipe Sync AP Data -- Started
[ScktId: 0] Pipe Sync AP Data - 21ms
[ScktId: 1] Pipe Sync AP Data - 26ms
N1 Checked into Pipe
[ScktId: 0] Check POR Compatibility -- Started
[ScktId: 0] Check POR Compatibility - 6ms
N1 Checked into Pipe
[ScktId: 0] HBM Init Clock -- Started
[ScktId: 0] HBM Init Clock - 5ms
N1 Checked into Pipe
[ScktId: 0] Initialize clocks for all MemSs -- Started
N0: Platform segment mapping found. UseServerPor: 1; SegmentType: 7; ChopType: 3; PlatformSegment: 0
N0: Platform segment mapping found. UseServerPor: 1; SegmentType: 7; ChopType: 3; PlatformSegment: 0
N0: Platform segment mapping found. UseServerPor: 1; SegmentType: 7; ChopType: 3; PlatformSegment: 0
N0: Platform segment mapping found. UseServerPor: 1; SegmentType: 7; ChopType: 3; PlatformSegment: 0
N0: Platform segment mapping found. UseServerPor: 1; SegmentType: 7; ChopType: 3; PlatformSegment: 0
N0: Platform segment mapping found. UseServerPor: 1; SegmentType: 7; ChopType: 3; PlatformSegment: 0
N0: Platform segment mapping found. UseServerPor: 1; SegmentType: 7; ChopType: 3; PlatformSegment: 0
N0: Platform segment mapping found. UseServerPor: 1; SegmentType: 7; ChopType: 3; PlatformSegment: 0
Memory behind processor 0 running at DDR-4800
Memory behind processor 1 running at DDR-4800
[ScktId: 0] Initialize clocks for all MemSs - 96ms
[ScktId: 1] Pipe Sync SBSP Data -- Started
[ScktId: 0] Pipe Sync SBSP Data -- Started
[ScktId: 1] Pipe Sync SBSP Data - 21ms
[ScktId: 0] Pipe Sync SBSP Data - 21ms
[ScktId: 1] Unlock Memory -- Started
[ScktId: 0] Unlock Memory -- Started
[ScktId: 1] Unlock Memory - 7ms
[ScktId: 0] Unlock Memory - 7ms
[ScktId: 1] Pipe Sync AP Data -- Started
[ScktId: 0] Pipe Sync AP Data -- Started
[ScktId: 0] Pipe Sync AP Data - 21ms
[ScktId: 1] Pipe Sync AP Data - 24ms
[ScktId: 0] HBM Pre-Training -- Started
[ScktId: 1] HBM Pre-Training -- Started
HBMIO flows: set to 0xFFFFFF7F!
HBMIO flows: set to 0xFFFFFF7F!
Get socket PPIN
Get socket PPIN
: PPIN = 22E546CB1AD8E915
: PPIN = 22E548CB80015B4D
HBM frequency = 3200MHz
HBM frequency = 3200MHz
Hbm Policy Option: DisableRefreshPostpone = 0
Socket1 HbmIo0, HW Rev: 0x110, FW Rev: 0x2180, Patch ID: 0x0, Unique ID: 0x18, Product ID: 0x2
Hbm Policy Option: RefreshMode = 1
Socket1 HbmIo1, HW Rev: 0x110, FW Rev: 0x2180, Patch ID: 0x0, Unique ID: 0x18, Product ID: 0x2
Socket0 HbmIo0, HW Rev: 0x110, FW Rev: 0x2180, Patch ID: 0x0, Unique ID: 0x18, Product ID: 0x2
Socket1 HbmIo2, HW Rev: 0x110, FW Rev: 0x2180, Patch ID: 0x0, Unique ID: 0x18, Product ID: 0x2
Socket0 HbmIo1, HW Rev: 0x110, FW Rev: 0x2180, Patch ID: 0x0, Unique ID: 0x18, Product ID: 0x2
Socket1 HbmIo3, HW Rev: 0x110, FW Rev: 0x2180, Patch ID: 0x0, Unique ID: 0x18, Product ID: 0x2
Socket0 HbmIo2, HW Rev: 0x110, FW Rev: 0x2180, Patch ID: 0x0, Unique ID: 0x18, Product ID: 0x2
[ScktId: 1] HBM Pre-Training - 109ms
Socket0 HbmIo3, HW Rev: 0x110, FW Rev: 0x2180, Patch ID: 0x0, Unique ID: 0x18, Product ID: 0x2
[ScktId: 1] AP HBM Information -- Started
[ScktId: 0] HBM Pre-Training - 141ms
[ScktId: 0] AP HBM Information -- Started
[ScktId: 0] AP HBM Information - 5ms
[ScktId: 1] AP HBM Information - 25ms
[ScktId: 0] Pipe Sync SBSP Status -- Started
[ScktId: 1] Pipe Sync SBSP Status -- Started
[ScktId: 1] Pipe Sync SBSP Status - 8ms
[ScktId: 0] Pipe Sync SBSP Status - 12ms
[ScktId: 1] Check XMP -- Started
[ScktId: 0] Check XMP -- Started
[ScktId: 1] Check XMP - 7ms
[ScktId: 0] Check XMP - 6ms
N1 Checked into Pipe
[ScktId: 0] Set Vdd -- Started
[ScktId: 0] Set Vdd - 5ms
[ScktId: 1] Power on Memory -- Started
[ScktId: 0] Power on Memory -- Started
N1.C00.D0: PMIC in Secure Mode, PMIC voltage programming aborted!
N0.C00.D0: PMIC in Secure Mode, PMIC voltage programming aborted!
N1.C02.D0: PMIC in Secure Mode, PMIC voltage programming aborted!
N0.C02.D0: PMIC in Secure Mode, PMIC voltage programming aborted!
N1.C04.D0: PMIC in Secure Mode, PMIC voltage programming aborted!
N0.C04.D0: PMIC in Secure Mode, PMIC voltage programming aborted!
N1.C06.D0: PMIC in Secure Mode, PMIC voltage programming aborted!
N0.C06.D0: PMIC in Secure Mode, PMIC voltage programming aborted!
[ScktId: 1] Power on Memory - 216ms
[ScktId: 0] Power on Memory - 223ms
[ScktId: 1] Ddrio Power Status Check -- Started
[ScktId: 0] Ddrio Power Status Check -- Started
[ScktId: 1] Ddrio Power Status Check - 8ms
[ScktId: 0] Ddrio Power Status Check - 9ms
[ScktId: 1] Pipe Sync AP Data -- Started
[ScktId: 0] Pipe Sync AP Data -- Started
[ScktId: 0] Pipe Sync AP Data - 21ms
[ScktId: 1] Pipe Sync AP Data - 25ms
N1 Checked into Pipe
[ScktId: 0] Configure DIMM Ranks -- Started
[ScktId: 0] Configure DIMM Ranks - 6ms
[ScktId: 1] Pipe Sync SBSP Data -- Started
[ScktId: 0] Pipe Sync SBSP Data -- Started
[ScktId: 1] Pipe Sync SBSP Data - 21ms
[ScktId: 0] Pipe Sync SBSP Data - 21ms
[ScktId: 1] Initialize Throttling Early -- Started
[ScktId: 0] Initialize Throttling Early -- Started
[ScktId: 1] Initialize Throttling Early - 9ms
[ScktId: 0] Initialize Throttling Early - 10ms
[ScktId: 1] Initialize Memory -- Started
[ScktId: 0] Initialize Memory -- Started
[ScktId: 1] Initialize Memory - 8ms
[ScktId: 0] Initialize Memory - 8ms
[ScktId: 1] Gather SPD Data -- Started
[ScktId: 0] Gather SPD Data -- Started
N1: Bus Instance = 0; I2C speed = 3; I3C speed = 2; Bus mode = 0
N0: Bus Instance = 0; I2C speed = 3; I3C speed = 2; Bus mode = 0
N1: Bus Instance = 0; I2C speed = 3; I3C speed = 2; Bus mode = 1
N0: Bus Instance = 0; I2C speed = 3; I3C speed = 2; Bus mode = 1
N1: I3C Instance 0: Switch to I3C mode - Status = Success
N0: I3C Instance 0: Switch to I3C mode - Status = Success
N1: Bus Instance = 1; I2C speed = 3; I3C speed = 2; Bus mode = 0
N0: Bus Instance = 1; I2C speed = 3; I3C speed = 2; Bus mode = 0
N1: Bus Instance = 1; I2C speed = 3; I3C speed = 2; Bus mode = 1
N0: Bus Instance = 1; I2C speed = 3; I3C speed = 2; Bus mode = 1
N1: I3C Instance 1: Switch to I3C mode - Status = Success
N0: I3C Instance 1: Switch to I3C mode - Status = Success
[ScktId: 1] Gather SPD Data - 86ms
[ScktId: 1] Socket DIMM Information -- Started
[ScktId: 0] Gather SPD Data - 88ms
==========================================================================================================================================================================
START_SOCKET_1_DIMMINFO_TABLE
SPR Ex - Socket 2S
==========================================================================================================================================================================
S| Channel 0 | Channel 1 | Channel 2 | Channel 3 | Channel 4 | Channel 5 | Channel 6 | Channel 7 |
==========================================================================================================================================================================
0| DIMM: Micron | Not installed | DIMM: Micron | Not installed | DIMM: Micron | Not installed | DIMM: Micron | Not installed |
| DRAM: Micron | | DRAM: Micron | | DRAM: Micron | | DRAM: Micron | |
| RCD: IDT | | RCD: IDT | | RCD: IDT | | RCD: IDT | |
|RCD Rev: 0x33 | |RCD Rev: 0x33 | |RCD Rev: 0x33 | |RCD Rev: 0x33 | |
| DB Ven: N/A | | DB Ven: N/A | | DB Ven: N/A | | DB Ven: N/A | |
| DB Rev: N/A | | DB Rev: N/A | | DB Rev: N/A | | DB Rev: N/A | |
| PMIC: MPS | | PMIC: MPS | | PMIC: MPS | | PMIC: MPS | |
|PMICRev: 0x12 | |PMICRev: 0x12 | |PMICRev: 0x12 | |PMICRev: 0x12 | |
|SPD Dev: IDT | |SPD Dev: IDT | |SPD Dev: IDT | |SPD Dev: IDT | |
|Dev Rev: 0x21 | |Dev Rev: 0x21 | |Dev Rev: 0x21 | |Dev Rev: 0x21 | |
| SPD BL: 0.9 | | SPD BL: 0.9 | | SPD BL: 0.9 | | SPD BL: 0.9 | |
| TSOD: IDT | | TSOD: IDT | | TSOD: IDT | | TSOD: IDT | |
|TSODRev: 0x12 | |TSODRev: 0x12 | |TSODRev: 0x12 | |TSODRev: 0x12 | |
| | | | | | | | |
| 32GB( 16Gbx4 SR)| | 32GB( 16Gbx4 SR)| | 32GB( 16Gbx4 SR)| | 32GB( 16Gbx4 SR)| |
| DDR5 RDIMM R/C-F | | DDR5 RDIMM R/C-F | | DDR5 RDIMM R/C-F | | DDR5 RDIMM R/C-F | |
| 4800 39-39-39 | | 4800 39-39-39 | | 4800 39-39-39 | | 4800 39-39-39 | |
| ww51 2021 | | ww51 2021 | | ww51 2021 | | ww51 2021 | |
|MTC18F1045S1PC48BA2 | |MTC18F1045S1PC48BA2 | |MTC18F1045S1PC48BA2 | |MTC18F1045S1PC48BA2 | |
| | | | | | | | |
|0x002C0F2151336C7DD8| |0x002C0F2151336C7E17| |0x002C0F2151336C7DDA| |0x002C0F2151336C7E33| |
| | | | | | | | |
--------------------------------------------------------------------------------------------------------------------------------------------------------------------------
1| Not installed | Not installed | Not installed | Not installed | Not installed | Not installed | Not installed | Not installed |
--------------------------------------------------------------------------------------------------------------------------------------------------------------------------
STOP_SOCKET_1_DIMMINFO_TABLE
==========================================================================================================================================================================
[ScktId: 0] Socket DIMM Information -- Started
[ScktId: 1] Socket DIMM Information - 580ms
==========================================================================================================================================================================
START_SOCKET_0_DIMMINFO_TABLE
SPR Ex - Socket 2S
==========================================================================================================================================================================
S| Channel 0 | Channel 1 | Channel 2 | Channel 3 | Channel 4 | Channel 5 | Channel 6 | Channel 7 |
==========================================================================================================================================================================
0| DIMM: Micron | Not installed | DIMM: Micron | Not installed | DIMM: Micron | Not installed | DIMM: Micron | Not installed |
| DRAM: Micron | | DRAM: Micron | | DRAM: Micron | | DRAM: Micron | |
| RCD: IDT | | RCD: IDT | | RCD: IDT | | RCD: IDT | |
|RCD Rev: 0x33 | |RCD Rev: 0x33 | |RCD Rev: 0x33 | |RCD Rev: 0x33 | |
| DB Ven: N/A | | DB Ven: N/A | | DB Ven: N/A | | DB Ven: N/A | |
| DB Rev: N/A | | DB Rev: N/A | | DB Rev: N/A | | DB Rev: N/A | |
| PMIC: MPS | | PMIC: MPS | | PMIC: MPS | | PMIC: MPS | |
|PMICRev: 0x12 | |PMICRev: 0x12 | |PMICRev: 0x12 | |PMICRev: 0x12 | |
|SPD Dev: IDT | |SPD Dev: IDT | |SPD Dev: IDT | |SPD Dev: IDT | |
|Dev Rev: 0x21 | |Dev Rev: 0x21 | |Dev Rev: 0x21 | |Dev Rev: 0x21 | |
| SPD BL: 0.9 | | SPD BL: 0.9 | | SPD BL: 0.9 | | SPD BL: 0.9 | |
| TSOD: IDT | | TSOD: IDT | | TSOD: IDT | | TSOD: IDT | |
|TSODRev: 0x12 | |TSODRev: 0x12 | |TSODRev: 0x12 | |TSODRev: 0x12 | |
| | | | | | | | |
| 32GB( 16Gbx4 SR)| | 32GB( 16Gbx4 SR)| | 32GB( 16Gbx4 SR)| | 32GB( 16Gbx4 SR)| |
| DDR5 RDIMM R/C-F | | DDR5 RDIMM R/C-F | | DDR5 RDIMM R/C-F | | DDR5 RDIMM R/C-F | |
| 4800 39-39-39 | | 4800 39-39-39 | | 4800 39-39-39 | | 4800 39-39-39 | |
| ww51 2021 | | ww51 2021 | | ww51 2021 | | ww51 2021 | |
|MTC18F1045S1PC48BA2 | |MTC18F1045S1PC48BA2 | |MTC18F1045S1PC48BA2 | |MTC18F1045S1PC48BA2 | |
| | | | | | | | |
|0x002C0F2151336C7E2C| |0x002C0F2151336C7E24| |0x002C0F2151336C7E3A| |0x002C0F2151336C7E3F| |
| | | | | | | | |
--------------------------------------------------------------------------------------------------------------------------------------------------------------------------
1| Not installed | Not installed | Not installed | Not installed | Not installed | Not installed | Not installed | Not installed |
--------------------------------------------------------------------------------------------------------------------------------------------------------------------------
STOP_SOCKET_0_DIMMINFO_TABLE
==========================================================================================================================================================================
[ScktId: 1] Early Configuration -- Started
[ScktId: 0] Socket DIMM Information - 1153ms
N1.C00: MCSCRAMBLE_SEED_SEL_MCDDC_DP_REG access function - average write latency = 419 ns
[ScktId: 0] Early Configuration -- Started
N1.C01: MCSCRAMBLE_SEED_SEL_MCDDC_DP_REG access function - average write latency = 400 ns
N0.C00: MCSCRAMBLE_SEED_SEL_MCDDC_DP_REG access function - average write latency = 330 ns
N1.C02: MCSCRAMBLE_SEED_SEL_MCDDC_DP_REG access function - average write latency = 511 ns
N0.C01: MCSCRAMBLE_SEED_SEL_MCDDC_DP_REG access function - average write latency = 347 ns
N1.C03: MCSCRAMBLE_SEED_SEL_MCDDC_DP_REG access function - average write latency = 523 ns
N0.C02: MCSCRAMBLE_SEED_SEL_MCDDC_DP_REG access function - average write latency = 438 ns
N1.C04: MCSCRAMBLE_SEED_SEL_MCDDC_DP_REG access function - average write latency = 563 ns
N0.C03: MCSCRAMBLE_SEED_SEL_MCDDC_DP_REG access function - average write latency = 439 ns
N1.C05: MCSCRAMBLE_SEED_SEL_MCDDC_DP_REG access function - average write latency = 583 ns
N0.C04: MCSCRAMBLE_SEED_SEL_MCDDC_DP_REG access function - average write latency = 524 ns
N1.C06: MCSCRAMBLE_SEED_SEL_MCDDC_DP_REG access function - average write latency = 685 ns
N0.C05: MCSCRAMBLE_SEED_SEL_MCDDC_DP_REG access function - average write latency = 506 ns
N1.C07: MCSCRAMBLE_SEED_SEL_MCDDC_DP_REG access function - average write latency = 674 ns
N0.C06: MCSCRAMBLE_SEED_SEL_MCDDC_DP_REG access function - average write latency = 624 ns
N1.C00: MCSCRAMBLE_SEED_SEL_MCDDC_DP_REG access function - average read latency = 373 ns
N0.C07: MCSCRAMBLE_SEED_SEL_MCDDC_DP_REG access function - average write latency = 603 ns
N1.C01: MCSCRAMBLE_SEED_SEL_MCDDC_DP_REG access function - average read latency = 361 ns
N0.C00: MCSCRAMBLE_SEED_SEL_MCDDC_DP_REG access function - average read latency = 317 ns
N1.C02: MCSCRAMBLE_SEED_SEL_MCDDC_DP_REG access function - average read latency = 464 ns
N0.C01: MCSCRAMBLE_SEED_SEL_MCDDC_DP_REG access function - average read latency = 328 ns
N1.C03: MCSCRAMBLE_SEED_SEL_MCDDC_DP_REG access function - average read latency = 475 ns
N0.C02: MCSCRAMBLE_SEED_SEL_MCDDC_DP_REG access function - average read latency = 416 ns
N1.C04: MCSCRAMBLE_SEED_SEL_MCDDC_DP_REG access function - average read latency = 527 ns
N0.C03: MCSCRAMBLE_SEED_SEL_MCDDC_DP_REG access function - average read latency = 418 ns
N1.C05: MCSCRAMBLE_SEED_SEL_MCDDC_DP_REG access function - average read latency = 539 ns
N0.C04: MCSCRAMBLE_SEED_SEL_MCDDC_DP_REG access function - average read latency = 503 ns
N1.C06: MCSCRAMBLE_SEED_SEL_MCDDC_DP_REG access function - average read latency = 638 ns
N0.C05: MCSCRAMBLE_SEED_SEL_MCDDC_DP_REG access function - average read latency = 488 ns
N1.C07: MCSCRAMBLE_SEED_SEL_MCDDC_DP_REG access function - average read latency = 629 ns
N0.C06: MCSCRAMBLE_SEED_SEL_MCDDC_DP_REG access function - average read latency = 599 ns
S1 TME CPUID = 1
S1 TmeActivated = 0
S1 TME CPUID = 1
S1 TmeActivated = 0
N0.C07: MCSCRAMBLE_SEED_SEL_MCDDC_DP_REG access function - average read latency = 583 ns
S1 TME CPUID = 1
S0 TME CPUID = 1
S1 TmeActivated = 0
S0 TmeActivated = 0
S1 TME CPUID = 1
S0 TME CPUID = 1
S1 TmeActivated = 0
S0 TmeActivated = 0
tRRDD -- MinVal = 0x2, value = 0x0, adjusted to MinVal.
S0 TME CPUID = 1
tWWDD -- MinVal = 0x2, value = 0x0, adjusted to MinVal.
S0 TmeActivated = 0
tRWDD -- MinVal = 0x2, value = 0x0, adjusted to MinVal.
S0 TME CPUID = 1
tWRDD -- MinVal = 0x2, value = 0x0, adjusted to MinVal.
S0 TmeActivated = 0
tRRDS -- MinVal = 0x2, value = 0x0, adjusted to MinVal.
tRRDD -- MinVal = 0x2, value = 0x0, adjusted to MinVal.
tWWDS -- MinVal = 0x2, value = 0x0, adjusted to MinVal.
tWWDD -- MinVal = 0x2, value = 0x0, adjusted to MinVal.
tRWDS -- MinVal = 0x2, value = 0x0, adjusted to MinVal.
tRWDD -- MinVal = 0x2, value = 0x0, adjusted to MinVal.
tRRDS -- MinVal = 0x2, value = 0x0, adjusted to MinVal.
tWRDD -- MinVal = 0x2, value = 0x0, adjusted to MinVal.
tRRDD -- MinVal = 0x2, value = 0x0, adjusted to MinVal.
tRRDS -- MinVal = 0x2, value = 0x0, adjusted to MinVal.
tWWDD -- MinVal = 0x2, value = 0x0, adjusted to MinVal.
tWWDS -- MinVal = 0x2, value = 0x0, adjusted to MinVal.
tRWDD -- MinVal = 0x2, value = 0x0, adjusted to MinVal.
tRWDS -- MinVal = 0x2, value = 0x0, adjusted to MinVal.
tWRDD -- MinVal = 0x2, value = 0x0, adjusted to MinVal.
tRRDS -- MinVal = 0x2, value = 0x0, adjusted to MinVal.
tRRDS -- MinVal = 0x2, value = 0x0, adjusted to MinVal.
tRRDD -- MinVal = 0x2, value = 0x0, adjusted to MinVal.
tWWDS -- MinVal = 0x2, value = 0x0, adjusted to MinVal.
tWWDD -- MinVal = 0x2, value = 0x0, adjusted to MinVal.
tRWDS -- MinVal = 0x2, value = 0x0, adjusted to MinVal.
tRWDD -- MinVal = 0x2, value = 0x0, adjusted to MinVal.
tRRDS -- MinVal = 0x2, value = 0x0, adjusted to MinVal.
tWRDD -- MinVal = 0x2, value = 0x0, adjusted to MinVal.
tRRDD -- MinVal = 0x2, value = 0x0, adjusted to MinVal.
tRRDS -- MinVal = 0x2, value = 0x0, adjusted to MinVal.
tWWDD -- MinVal = 0x2, value = 0x0, adjusted to MinVal.
tWWDS -- MinVal = 0x2, value = 0x0, adjusted to MinVal.
tRWDD -- MinVal = 0x2, value = 0x0, adjusted to MinVal.
tRWDS -- MinVal = 0x2, value = 0x0, adjusted to MinVal.
tWRDD -- MinVal = 0x2, value = 0x0, adjusted to MinVal.
tRRDS -- MinVal = 0x2, value = 0x0, adjusted to MinVal.
tRRDS -- MinVal = 0x2, value = 0x0, adjusted to MinVal.
tRRDD -- MinVal = 0x2, value = 0x0, adjusted to MinVal.
tWWDS -- MinVal = 0x2, value = 0x0, adjusted to MinVal.
tWWDD -- MinVal = 0x2, value = 0x0, adjusted to MinVal.
tRWDS -- MinVal = 0x2, value = 0x0, adjusted to MinVal.
tRWDD -- MinVal = 0x2, value = 0x0, adjusted to MinVal.
tRRDS -- MinVal = 0x2, value = 0x0, adjusted to MinVal.
tWRDD -- MinVal = 0x2, value = 0x0, adjusted to MinVal.
tRRDD -- MinVal = 0x2, value = 0x0, adjusted to MinVal.
tRRDS -- MinVal = 0x2, value = 0x0, adjusted to MinVal.
tWWDD -- MinVal = 0x2, value = 0x0, adjusted to MinVal.
tWWDS -- MinVal = 0x2, value = 0x0, adjusted to MinVal.
tRWDD -- MinVal = 0x2, value = 0x0, adjusted to MinVal.
tRWDS -- MinVal = 0x2, value = 0x0, adjusted to MinVal.
tWRDD -- MinVal = 0x2, value = 0x0, adjusted to MinVal.
tRRDS -- MinVal = 0x2, value = 0x0, adjusted to MinVal.
tRRDS -- MinVal = 0x2, value = 0x0, adjusted to MinVal.
tRRDD -- MinVal = 0x2, value = 0x0, adjusted to MinVal.
tWWDS -- MinVal = 0x2, value = 0x0, adjusted to MinVal.
tWWDD -- MinVal = 0x2, value = 0x0, adjusted to MinVal.
tRWDS -- MinVal = 0x2, value = 0x0, adjusted to MinVal.
tRWDD -- MinVal = 0x2, value = 0x0, adjusted to MinVal.
tRRDS -- MinVal = 0x2, value = 0x0, adjusted to MinVal.
tWRDD -- MinVal = 0x2, value = 0x0, adjusted to MinVal.
[ScktId: 1] Early Configuration - 1272ms
tRRDS -- MinVal = 0x2, value = 0x0, adjusted to MinVal.
[ScktId: 1] DDRIO Initialization -- Started
tWWDS -- MinVal = 0x2, value = 0x0, adjusted to MinVal.
tRWDS -- MinVal = 0x2, value = 0x0, adjusted to MinVal.
tRRDS -- MinVal = 0x2, value = 0x0, adjusted to MinVal.
[ScktId: 0] Early Configuration - 728ms
[ScktId: 0] DDRIO Initialization -- Started
[ScktId: 1] DDRIO Initialization - 38ms
[ScktId: 1] DDRIO Initialization Late -- Started
DfxTimingOverride10nm Starts
[ScktId: 1] DDRIO Initialization Late - 17ms
[ScktId: 0] DDRIO Initialization - 32ms
[ScktId: 1] Pipe Sync AP Data -- Started
[ScktId: 0] DDRIO Initialization Late -- Started
DfxTimingOverride10nm Starts
[ScktId: 0] DDRIO Initialization Late - 20ms
[ScktId: 0] Pipe Sync AP Data -- Started
[ScktId: 0] Pipe Sync AP Data - 17ms
[ScktId: 1] Pipe Sync AP Data - 46ms
[ScktId: 0] Pipe Sync AP Smbus Mode -- Started
[ScktId: 1] Pipe Sync AP Smbus Mode -- Started
[ScktId: 0] Pipe Sync AP Smbus Mode - 13ms
[ScktId: 1] Pipe Sync AP Smbus Mode - 9ms
[ScktId: 0] Pipe Sync AP Reset Status -- Started
[ScktId: 1] Pipe Sync AP Reset Status -- Started
[ScktId: 1] Pipe Sync AP Reset Status - 9ms
[ScktId: 0] Pipe Sync AP Reset Status - 13ms
[ScktId: 1] Pipe Sync SBSP Status -- Started
[ScktId: 0] Pipe Sync SBSP Status -- Started
[ScktId: 1] Pipe Sync SBSP Status - 13ms
[ScktId: 0] Pipe Sync SBSP Status - 8ms
[ScktId: 1] DDR Training -- Started
[ScktId: 0] DDR Training -- Started
[ScktId: 1] Pre-Training Initialization -- Started
[ScktId: 0] Pre-Training Initialization -- Started
N1: Bus Instance = 0; I2C speed = 3; I3C speed = 2; Bus mode = 0
N0: Bus Instance = 0; I2C speed = 3; I3C speed = 2; Bus mode = 0
N1: Bus Instance = 0; I2C speed = 3; I3C speed = 2; Bus mode = 1
N0: Bus Instance = 0; I2C speed = 3; I3C speed = 2; Bus mode = 1
N1: I3C Instance 0: Switch to I3C mode - Status = Success
N0: I3C Instance 0: Switch to I3C mode - Status = Success
N1: Bus Instance = 1; I2C speed = 3; I3C speed = 2; Bus mode = 0
N0: Bus Instance = 1; I2C speed = 3; I3C speed = 2; Bus mode = 0
N1: Bus Instance = 1; I2C speed = 3; I3C speed = 2; Bus mode = 1
N0: Bus Instance = 1; I2C speed = 3; I3C speed = 2; Bus mode = 1
N1: I3C Instance 1: Switch to I3C mode - Status = Success
N0: I3C Instance 1: Switch to I3C mode - Status = Success
Socket 1 - Sending 3 NOPS sequence to exit clockstop.
[ScktId: 1] Pre-Training Initialization - 104ms
Socket 0 - Sending 3 NOPS sequence to exit clockstop.
[ScktId: 1] Host CS Training -- Started
[ScktId: 0] Pre-Training Initialization - 111ms
[ScktId: 0] Host CS Training -- Started
N0: Bus Instance = 0; I2C speed = 3; I3C speed = 2; Bus mode = 0
N1: Bus Instance = 0; I2C speed = 3; I3C speed = 2; Bus mode = 0
N0: Bus Instance = 0; I2C speed = 3; I3C speed = 2; Bus mode = 1
N1: Bus Instance = 0; I2C speed = 3; I3C speed = 2; Bus mode = 1
N0: I3C Instance 0: Switch to I3C mode - Status = Success
N1: I3C Instance 0: Switch to I3C mode - Status = Success
N0: Bus Instance = 1; I2C speed = 3; I3C speed = 2; Bus mode = 0
N1: Bus Instance = 1; I2C speed = 3; I3C speed = 2; Bus mode = 0
N0: Bus Instance = 1; I2C speed = 3; I3C speed = 2; Bus mode = 1
N1: Bus Instance = 1; I2C speed = 3; I3C speed = 2; Bus mode = 1
N0: I3C Instance 1: Switch to I3C mode - Status = Success
N1: I3C Instance 1: Switch to I3C mode - Status = Success
[ScktId: 0] Host CS Training - 227ms
[ScktId: 0] Host CA Training Simple -- Started
[ScktId: 1] Host CS Training - 246ms
[ScktId: 1] Host CA Training Simple -- Started
[ScktId: 0] Host CA Training Simple - 347ms
[ScktId: 0] RCD DCA DFE Training -- Started
[ScktId: 1] Host CA Training Simple - 575ms
[ScktId: 1] RCD DCA DFE Training -- Started
[ScktId: 0] RCD DCA DFE Training - 3726ms
[ScktId: 0] Host CA Training Complex -- Started
[ScktId: 0] Host CA Training Complex - 164ms
[ScktId: 0] RCD DCA Slew Rate Training -- Started
[ScktId: 0] RCD DCA Slew Rate Training - 4ms
[ScktId: 0] RCD DCA TCO Training -- Started
[ScktId: 1] RCD DCA DFE Training - 4078ms
[ScktId: 1] Host CA Training Complex -- Started
[ScktId: 1] Host CA Training Complex - 173ms
[ScktId: 1] RCD DCA Slew Rate Training -- Started
[ScktId: 1] RCD DCA Slew Rate Training - 4ms
[ScktId: 1] RCD DCA TCO Training -- Started
[ScktId: 0] RCD DCA TCO Training - 562ms
[ScktId: 0] RCD DCA/DCK Duty Cycle Training -- Started
[ScktId: 0] RCD DCA/DCK Duty Cycle Training - 416ms
[ScktId: 0] Re-center Host CA Training -- Started
[ScktId: 1] RCD DCA TCO Training - 598ms
[ScktId: 1] RCD DCA/DCK Duty Cycle Training -- Started
[ScktId: 0] Re-center Host CA Training - 164ms
[ScktId: 1] RCD DCA/DCK Duty Cycle Training - 456ms
[ScktId: 0] CA temperature compensation -- Started
[ScktId: 1] Re-center Host CA Training -- Started
[ScktId: 0] CA temperature compensation - 10ms
[ScktId: 0] BCOM Training -- Started
[ScktId: 0] BCOM Training - 28ms
[ScktId: 0] RCD QCS Training -- Started
[ScktId: 0] RCD QCS Training - 105ms
[ScktId: 0] RCD QCA Training -- Started
[ScktId: 1] Re-center Host CA Training - 183ms
[ScktId: 0] RCD QCA Training - 328ms
[ScktId: 1] CA temperature compensation -- Started
[ScktId: 0] PBA Enumeration -- Started
[ScktId: 1] CA temperature compensation - 8ms
[ScktId: 0] PBA Enumeration - 8ms
[ScktId: 1] BCOM Training -- Started
[ScktId: 0] REQ Training -- Started
[ScktId: 1] BCOM Training - 7ms
[ScktId: 0] REQ Training - 7ms
[ScktId: 1] RCD QCS Training -- Started
[ScktId: 0] MDQS Receive Enable Training -- Started
[ScktId: 0] MDQS Receive Enable Training - 9ms
[ScktId: 0] MDQS Read Delay Training -- Started
[ScktId: 0] MDQS Read Delay Training - 4ms
[ScktId: 0] Receive Enable Training -- Started
[ScktId: 0] Receive Enable Training - 20ms
[ScktId: 0] Read Dq Dqs: Coarse Read DQ/DQS -- Started
[ScktId: 1] RCD QCS Training - 114ms
[ScktId: 1] RCD QCA Training -- Started
[ScktId: 0] Read Dq Dqs: Coarse Read DQ/DQS - 354ms
[ScktId: 1] RCD QCA Training - 347ms
[ScktId: 0] Read Dq Dqs: Swizzle Discovery -- Started
[ScktId: 1] PBA Enumeration -- Started
[ScktId: 0] Read Dq Dqs: Swizzle Discovery - 10ms
[ScktId: 1] PBA Enumeration - 9ms
[ScktId: 0] Read Dq Dqs: Pre-DFE Read 2D Centering -- Started
[ScktId: 1] REQ Training -- Started
[ScktId: 1] REQ Training - 9ms
[ScktId: 1] MDQS Receive Enable Training -- Started
[ScktId: 1] MDQS Receive Enable Training - 5ms
[ScktId: 1] MDQS Read Delay Training -- Started
[ScktId: 1] MDQS Read Delay Training - 4ms
[ScktId: 1] Receive Enable Training -- Started
[ScktId: 1] Receive Enable Training - 22ms
[ScktId: 1] Read Dq Dqs: Coarse Read DQ/DQS -- Started
[ScktId: 0] Read Dq Dqs: Pre-DFE Read 2D Centering - 94ms
[ScktId: 0] Read Dq Dqs: Duty Cycle Adjuster -- Started
[ScktId: 0] Read Dq Dqs: Duty Cycle Adjuster - 5ms
[ScktId: 0] Read Dq Dqs: Read DFE Training -- Started
[ScktId: 1] Read Dq Dqs: Coarse Read DQ/DQS - 371ms
[ScktId: 1] Read Dq Dqs: Swizzle Discovery -- Started
[ScktId: 1] Read Dq Dqs: Swizzle Discovery - 6ms
[ScktId: 1] Read Dq Dqs: Pre-DFE Read 2D Centering -- Started
[ScktId: 1] Read Dq Dqs: Pre-DFE Read 2D Centering - 97ms
[ScktId: 1] Read Dq Dqs: Duty Cycle Adjuster -- Started
[ScktId: 1] Read Dq Dqs: Duty Cycle Adjuster - 5ms
[ScktId: 1] Read Dq Dqs: Read DFE Training -- Started
[ScktId: 0] Read Dq Dqs: Read DFE Training - 3457ms
[ScktId: 0] Read Dq Dqs: Post-DFE Read 2D Centering -- Started
[ScktId: 0] Read Dq Dqs: Post-DFE Read 2D Centering - 641ms
[ScktId: 0] Switch to DDRT2 Mode -- Started
[ScktId: 0] Switch to DDRT2 Mode - 4ms
[ScktId: 0] Buffer DRAM Write Leveling Training -- Started
[ScktId: 0] Buffer DRAM Write Leveling Training - 5ms
[ScktId: 0] Buffer Write Delay Training -- Started
[ScktId: 0] Buffer Write Delay Training - 5ms
[ScktId: 0] Write Leveling Training -- Started
[ScktId: 1] Read Dq Dqs: Read DFE Training - 3690ms
[ScktId: 1] Read Dq Dqs: Post-DFE Read 2D Centering -- Started
[ScktId: 0] Write Leveling Training - 97ms
[ScktId: 0] Write Dq Dqs: Coarse Write DQ/DQS -- Started
[ScktId: 0] Write Dq Dqs: Coarse Write DQ/DQS - 558ms
[ScktId: 0] Write Dq Dqs: Pre-DFE Write 2D Centering -- Started
[ScktId: 1] Read Dq Dqs: Post-DFE Read 2D Centering - 695ms
[ScktId: 1] Switch to DDRT2 Mode -- Started
[ScktId: 1] Switch to DDRT2 Mode - 4ms
[ScktId: 1] Buffer DRAM Write Leveling Training -- Started
[ScktId: 1] Buffer DRAM Write Leveling Training - 5ms
[ScktId: 1] Buffer Write Delay Training -- Started
[ScktId: 1] Buffer Write Delay Training - 5ms
[ScktId: 1] Write Leveling Training -- Started
N0.C00.D0.R0: High = 21 - Low = -23
N0.C00: Composite High = 21 - Composite Low = -23
N0.C02.D0.R0: High = 18 - Low = -21
N0.C02: Composite High = 18 - Composite Low = -21
N0.C04.D0.R0: High = 22 - Low = -21
N0.C04: Composite High = 22 - Composite Low = -21
N0.C06.D0.R0: High = 20 - Low = -18
N0.C06: Composite High = 20 - Composite Low = -18
N0: Get eye height
N0: Low: -18 High: 18
[ScktId: 1] Write Leveling Training - 103ms
N0: Eye height = 36
[ScktId: 1] Write Dq Dqs: Coarse Write DQ/DQS -- Started
N0: Timing Limited
[ScktId: 0] Write Dq Dqs: Pre-DFE Write 2D Centering - 292ms
[ScktId: 0] Write Dq Dqs: Slew Rate DQ -- Started
[ScktId: 0] Write Dq Dqs: Slew Rate DQ - 4ms
[ScktId: 0] Write Dq Dqs: TCO DQ -- Started
[ScktId: 0] Write Dq Dqs: TCO DQ - 4ms
[ScktId: 0] Write Dq Dqs: Write DFE Training -- Started
[ScktId: 1] Write Dq Dqs: Coarse Write DQ/DQS - 609ms
[ScktId: 1] Write Dq Dqs: Pre-DFE Write 2D Centering -- Started
N1.C00.D0.R0: High = 22 - Low = -22
N1.C00: Composite High = 22 - Composite Low = -22
N1.C02.D0.R0: High = 18 - Low = -23
N1.C02: Composite High = 18 - Composite Low = -23
N1.C04.D0.R0: High = 18 - Low = -24
N1.C04: Composite High = 18 - Composite Low = -24
N1.C06.D0.R0: High = 20 - Low = -19
N1.C06: Composite High = 20 - Composite Low = -19
N1: Get eye height
N1: Low: -19 High: 18
N1: Eye height = 37
N1: Timing Limited
[ScktId: 1] Write Dq Dqs: Pre-DFE Write 2D Centering - 307ms
[ScktId: 1] Write Dq Dqs: Slew Rate DQ -- Started
[ScktId: 1] Write Dq Dqs: Slew Rate DQ - 4ms
[ScktId: 1] Write Dq Dqs: TCO DQ -- Started
[ScktId: 1] Write Dq Dqs: TCO DQ - 4ms
[ScktId: 1] Write Dq Dqs: Write DFE Training -- Started
[ScktId: 0] Write Dq Dqs: Write DFE Training - 4255ms
[ScktId: 0] Buffer Write DFE Training -- Started
[ScktId: 0] Buffer Write DFE Training - 4ms
[ScktId: 0] Write Dq Dqs: Write ODT Latency Training -- Started
[ScktId: 0] Write Dq Dqs: Write ODT Latency Training - 8ms
[ScktId: 0] Command Normalization -- Started
[ScktId: 0] Command Normalization - 20ms
[ScktId: 0] Write Dq Dqs: Post-DFE Write 2D Centering -- Started
N0.C00.D0.R0: High = 21 - Low = -20
N0.C00: Composite High = 21 - Composite Low = -20
N0.C02.D0.R0: High = 20 - Low = -22
N0.C02: Composite High = 20 - Composite Low = -22
N0.C04.D0.R0: High = 22 - Low = -21
N0.C04: Composite High = 22 - Composite Low = -21
N0.C06.D0.R0: High = 20 - Low = -20
N0.C06: Composite High = 20 - Composite Low = -20
N0: Get eye height
N0: Low: -20 High: 20
N0: Eye height = 40
N0: Timing Limited
[ScktId: 1] Write Dq Dqs: Write DFE Training - 4838ms
[ScktId: 1] Buffer Write DFE Training -- Started
[ScktId: 1] Buffer Write DFE Training - 4ms
[ScktId: 1] Write Dq Dqs: Write ODT Latency Training -- Started
[ScktId: 1] Write Dq Dqs: Write ODT Latency Training - 8ms
[ScktId: 1] Command Normalization -- Started
[ScktId: 1] Command Normalization - 22ms
[ScktId: 1] Write Dq Dqs: Post-DFE Write 2D Centering -- Started
[ScktId: 0] Write Dq Dqs: Post-DFE Write 2D Centering - 1707ms
[ScktId: 0] Initialize Tx DQ Periodic Retraining -- Started
[ScktId: 0] Initialize Tx DQ Periodic Retraining - 7ms
[ScktId: 0] Read Dq Dqs: Post-DFE Read 2D Centering Late -- Started
N1.C00.D0.R0: High = 21 - Low = -22
N1.C00: Composite High = 21 - Composite Low = -22
N1.C02.D0.R0: High = 20 - Low = -20
N1.C02: Composite High = 20 - Composite Low = -20
N1.C04.D0.R0: High = 20 - Low = -21
N1.C04: Composite High = 20 - Composite Low = -21
N1.C06.D0.R0: High = 20 - Low = -21
N1.C06: Composite High = 20 - Composite Low = -21
N1: Get eye height
N1: Low: -20 High: 20
N1: Eye height = 40
N1: Timing Limited
[ScktId: 1] Write Dq Dqs: Post-DFE Write 2D Centering - 1728ms
[ScktId: 1] Initialize Tx DQ Periodic Retraining -- Started
[ScktId: 1] Initialize Tx DQ Periodic Retraining - 7ms
[ScktId: 1] Read Dq Dqs: Post-DFE Read 2D Centering Late -- Started
[ScktId: 0] Read Dq Dqs: Post-DFE Read 2D Centering Late - 12451ms
[ScktId: 0] Initialize Rx DQS Periodic Retraining -- Started
[ScktId: 0] Initialize Rx DQS Periodic Retraining - 6ms
[ScktId: 0] MemSweepTester -- Started
[ScktId: 0] MemSweepTester - 3ms
[ScktId: 0] PPR Flow -- Started
Calling PostPackageRepair
[ScktId: 0] PPR Flow - 6ms
[ScktId: 0] Roundtrip Latency Optimization -- Started
[ScktId: 0] Roundtrip Latency Optimization - 827ms
[ScktId: 0] Turnarounds Training -- Started
[ScktId: 0] Turnarounds Training - 530ms
Total MRC time = 32402ms
[ScktId: 0] DDR Training - 32412ms
[ScktId: 0] Pipe Sync AP Smbus Mode -- Started
[ScktId: 1] Read Dq Dqs: Post-DFE Read 2D Centering Late - 12679ms
[ScktId: 1] Initialize Rx DQS Periodic Retraining -- Started
[ScktId: 1] Initialize Rx DQS Periodic Retraining - 6ms
[ScktId: 1] MemSweepTester -- Started
[ScktId: 1] MemSweepTester - 3ms
[ScktId: 1] PPR Flow -- Started
Calling PostPackageRepair
[ScktId: 1] PPR Flow - 6ms
[ScktId: 1] Roundtrip Latency Optimization -- Started
[ScktId: 1] Roundtrip Latency Optimization - 873ms
[ScktId: 1] Turnarounds Training -- Started
[ScktId: 1] Turnarounds Training - 536ms
Total MRC time = 34107ms
[ScktId: 1] DDR Training - 34117ms
[ScktId: 1] Pipe Sync AP Smbus Mode -- Started
[ScktId: 0] Pipe Sync AP Smbus Mode - 1705ms
[ScktId: 1] Pipe Sync AP Smbus Mode - 4ms
[ScktId: 0] Display Training Results -- Started
[ScktId: 1] Display Training Results -- Started
[ScktId: 0] Display Training Results - 109ms
[ScktId: 1] Display Training Results - 209ms
[ScktId: 0] Check Training Results -- Started
[ScktId: 1] Check Training Results -- Started
[ScktId: 0] Check Training Results - 9ms
[ScktId: 1] Check Training Results - 9ms
[ScktId: 0] HBM Training -- Started
[ScktId: 1] HBM Training -- Started
HbmioMailbox -In Mailbox Full Prod Training (Cold Reset)
HbmioMailbox -In Mailbox Full Prod Training (Cold Reset)
Executing full_prod_training on Socket 0, HBMIO 0
Executing full_prod_training on Socket 1, HBMIO 0
Training result: return_data0 = 0x0, return_data1 = 0xB00
Training result: return_data0 = 0x0, return_data1 = 0xB00
Executing full_prod_training on Socket 0, HBMIO 1
Executing full_prod_training on Socket 1, HBMIO 1
Training result: return_data0 = 0x0, return_data1 = 0xB00
Training result: return_data0 = 0x0, return_data1 = 0xB00
Executing full_prod_training on Socket 0, HBMIO 2
Executing full_prod_training on Socket 1, HBMIO 2
Training result: return_data0 = 0x0, return_data1 = 0xB00
Training result: return_data0 = 0x0, return_data1 = 0xB00
Executing full_prod_training on Socket 0, HBMIO 3
Executing full_prod_training on Socket 1, HBMIO 3
Training result: return_data0 = 0x0, return_data1 = 0xB00
Training result: return_data0 = 0x0, return_data1 = 0xB00
Socket0 HbmCh0, PI Code:
Socket1 HbmCh0, PI Code:
DWord DQ: txdq_pi0_code = 0x1, txdq_pi1_code = 0x41
DWord DQ: txdq_pi0_code = 0x1, txdq_pi1_code = 0x41
DWord DQS: dqs_pi0_code = 0x20, dqs_pi1_code = 0x60
DWord DQS: dqs_pi0_code = 0x20, dqs_pi1_code = 0x60
AWord DQ: txdq_pi0_code = 0x7E, txdq_pi1_code = 0x3E
AWord DQ: txdq_pi0_code = 0x0, txdq_pi1_code = 0x40
AWord DQS: dqs_pi0_code = 0x20, dqs_pi1_code = 0x60
AWord DQS: dqs_pi0_code = 0x20, dqs_pi1_code = 0x60
Socket0 HbmCh1, PI Code:
Socket1 HbmCh1, PI Code:
DWord DQ: txdq_pi0_code = 0x0, txdq_pi1_code = 0x40
DWord DQ: txdq_pi0_code = 0x2, txdq_pi1_code = 0x42
DWord DQS: dqs_pi0_code = 0x20, dqs_pi1_code = 0x60
DWord DQS: dqs_pi0_code = 0x20, dqs_pi1_code = 0x60
AWord DQ: txdq_pi0_code = 0x7F, txdq_pi1_code = 0x3F
AWord DQ: txdq_pi0_code = 0x7F, txdq_pi1_code = 0x3F
AWord DQS: dqs_pi0_code = 0x20, dqs_pi1_code = 0x60
AWord DQS: dqs_pi0_code = 0x20, dqs_pi1_code = 0x60
Socket0 HbmCh2, PI Code:
Socket1 HbmCh2, PI Code:
DWord DQ: txdq_pi0_code = 0x1, txdq_pi1_code = 0x41
DWord DQ: txdq_pi0_code = 0x0, txdq_pi1_code = 0x40
DWord DQS: dqs_pi0_code = 0x20, dqs_pi1_code = 0x60
DWord DQS: dqs_pi0_code = 0x20, dqs_pi1_code = 0x60
AWord DQ: txdq_pi0_code = 0x7F, txdq_pi1_code = 0x3F
AWord DQ: txdq_pi0_code = 0x7F, txdq_pi1_code = 0x3F
AWord DQS: dqs_pi0_code = 0x20, dqs_pi1_code = 0x60
AWord DQS: dqs_pi0_code = 0x20, dqs_pi1_code = 0x60
Socket0 HbmCh3, PI Code:
Socket1 HbmCh3, PI Code:
DWord DQ: txdq_pi0_code = 0x1, txdq_pi1_code = 0x41
DWord DQ: txdq_pi0_code = 0x7F, txdq_pi1_code = 0x3F
DWord DQS: dqs_pi0_code = 0x20, dqs_pi1_code = 0x60
DWord DQS: dqs_pi0_code = 0x20, dqs_pi1_code = 0x60
AWord DQ: txdq_pi0_code = 0x7F, txdq_pi1_code = 0x3F
AWord DQ: txdq_pi0_code = 0x7F, txdq_pi1_code = 0x3F
AWord DQS: dqs_pi0_code = 0x20, dqs_pi1_code = 0x60
AWord DQS: dqs_pi0_code = 0x20, dqs_pi1_code = 0x60
Socket0 HbmCh4, PI Code:
Socket1 HbmCh4, PI Code:
DWord DQ: txdq_pi0_code = 0x3, txdq_pi1_code = 0x43
DWord DQ: txdq_pi0_code = 0x2, txdq_pi1_code = 0x42
DWord DQS: dqs_pi0_code = 0x20, dqs_pi1_code = 0x60
DWord DQS: dqs_pi0_code = 0x20, dqs_pi1_code = 0x60
AWord DQ: txdq_pi0_code = 0x7F, txdq_pi1_code = 0x3F
AWord DQ: txdq_pi0_code = 0x7F, txdq_pi1_code = 0x3F
AWord DQS: dqs_pi0_code = 0x20, dqs_pi1_code = 0x60
AWord DQS: dqs_pi0_code = 0x20, dqs_pi1_code = 0x60
Socket0 HbmCh5, PI Code:
Socket1 HbmCh5, PI Code:
DWord DQ: txdq_pi0_code = 0x2, txdq_pi1_code = 0x42
DWord DQ: txdq_pi0_code = 0x1, txdq_pi1_code = 0x41
DWord DQS: dqs_pi0_code = 0x20, dqs_pi1_code = 0x60
DWord DQS: dqs_pi0_code = 0x20, dqs_pi1_code = 0x60
AWord DQ: txdq_pi0_code = 0x7F, txdq_pi1_code = 0x3F
AWord DQ: txdq_pi0_code = 0x7E, txdq_pi1_code = 0x3E
AWord DQS: dqs_pi0_code = 0x20, dqs_pi1_code = 0x60
AWord DQS: dqs_pi0_code = 0x20, dqs_pi1_code = 0x60
Socket0 HbmCh6, PI Code:
Socket1 HbmCh6, PI Code:
DWord DQ: txdq_pi0_code = 0x2, txdq_pi1_code = 0x42
DWord DQ: txdq_pi0_code = 0x1, txdq_pi1_code = 0x41
DWord DQS: dqs_pi0_code = 0x20, dqs_pi1_code = 0x60
DWord DQS: dqs_pi0_code = 0x20, dqs_pi1_code = 0x60
AWord DQ: txdq_pi0_code = 0x7E, txdq_pi1_code = 0x3E
AWord DQ: txdq_pi0_code = 0x7E, txdq_pi1_code = 0x3E
AWord DQS: dqs_pi0_code = 0x20, dqs_pi1_code = 0x60
AWord DQS: dqs_pi0_code = 0x20, dqs_pi1_code = 0x60
Socket0 HbmCh7, PI Code:
Socket1 HbmCh7, PI Code:
DWord DQ: txdq_pi0_code = 0x1, txdq_pi1_code = 0x41
DWord DQ: txdq_pi0_code = 0x1, txdq_pi1_code = 0x41
DWord DQS: dqs_pi0_code = 0x20, dqs_pi1_code = 0x60
DWord DQS: dqs_pi0_code = 0x20, dqs_pi1_code = 0x60
AWord DQ: txdq_pi0_code = 0x7E, txdq_pi1_code = 0x3E
AWord DQ: txdq_pi0_code = 0x7E, txdq_pi1_code = 0x3E
AWord DQS: dqs_pi0_code = 0x20, dqs_pi1_code = 0x60
AWord DQS: dqs_pi0_code = 0x20, dqs_pi1_code = 0x60
Socket0 HbmCh8, PI Code:
Socket1 HbmCh8, PI Code:
DWord DQ: txdq_pi0_code = 0x0, txdq_pi1_code = 0x40
DWord DQ: txdq_pi0_code = 0x0, txdq_pi1_code = 0x40
DWord DQS: dqs_pi0_code = 0x20, dqs_pi1_code = 0x60
DWord DQS: dqs_pi0_code = 0x20, dqs_pi1_code = 0x60
AWord DQ: txdq_pi0_code = 0x7F, txdq_pi1_code = 0x3F
AWord DQ: txdq_pi0_code = 0x0, txdq_pi1_code = 0x40
AWord DQS: dqs_pi0_code = 0x20, dqs_pi1_code = 0x60
AWord DQS: dqs_pi0_code = 0x20, dqs_pi1_code = 0x60
Socket0 HbmCh9, PI Code:
Socket1 HbmCh9, PI Code:
DWord DQ: txdq_pi0_code = 0x0, txdq_pi1_code = 0x40
DWord DQ: txdq_pi0_code = 0x1, txdq_pi1_code = 0x41
DWord DQS: dqs_pi0_code = 0x20, dqs_pi1_code = 0x60
DWord DQS: dqs_pi0_code = 0x20, dqs_pi1_code = 0x60
AWord DQ: txdq_pi0_code = 0x0, txdq_pi1_code = 0x40
AWord DQ: txdq_pi0_code = 0x1, txdq_pi1_code = 0x41
AWord DQS: dqs_pi0_code = 0x20, dqs_pi1_code = 0x60
AWord DQS: dqs_pi0_code = 0x20, dqs_pi1_code = 0x60
Socket0 HbmCh10, PI Code:
Socket1 HbmCh10, PI Code:
DWord DQ: txdq_pi0_code = 0x1, txdq_pi1_code = 0x41
DWord DQ: txdq_pi0_code = 0x0, txdq_pi1_code = 0x40
DWord DQS: dqs_pi0_code = 0x20, dqs_pi1_code = 0x60
DWord DQS: dqs_pi0_code = 0x20, dqs_pi1_code = 0x60
AWord DQ: txdq_pi0_code = 0x0, txdq_pi1_code = 0x40
AWord DQ: txdq_pi0_code = 0x0, txdq_pi1_code = 0x40
AWord DQS: dqs_pi0_code = 0x20, dqs_pi1_code = 0x60
AWord DQS: dqs_pi0_code = 0x20, dqs_pi1_code = 0x60
Socket0 HbmCh11, PI Code:
Socket1 HbmCh11, PI Code:
DWord DQ: txdq_pi0_code = 0x1, txdq_pi1_code = 0x41
DWord DQ: txdq_pi0_code = 0x1, txdq_pi1_code = 0x41
DWord DQS: dqs_pi0_code = 0x20, dqs_pi1_code = 0x60
DWord DQS: dqs_pi0_code = 0x20, dqs_pi1_code = 0x60
AWord DQ: txdq_pi0_code = 0x0, txdq_pi1_code = 0x40
AWord DQ: txdq_pi0_code = 0x7F, txdq_pi1_code = 0x3F
AWord DQS: dqs_pi0_code = 0x20, dqs_pi1_code = 0x60
AWord DQS: dqs_pi0_code = 0x20, dqs_pi1_code = 0x60
Socket0 HbmCh12, PI Code:
Socket1 HbmCh12, PI Code:
DWord DQ: txdq_pi0_code = 0x2, txdq_pi1_code = 0x42
DWord DQ: txdq_pi0_code = 0x0, txdq_pi1_code = 0x40
DWord DQS: dqs_pi0_code = 0x20, dqs_pi1_code = 0x60
DWord DQS: dqs_pi0_code = 0x20, dqs_pi1_code = 0x60
AWord DQ: txdq_pi0_code = 0x0, txdq_pi1_code = 0x40
AWord DQ: txdq_pi0_code = 0x7F, txdq_pi1_code = 0x3F
AWord DQS: dqs_pi0_code = 0x20, dqs_pi1_code = 0x60
AWord DQS: dqs_pi0_code = 0x20, dqs_pi1_code = 0x60
Socket0 HbmCh13, PI Code:
Socket1 HbmCh13, PI Code:
DWord DQ: txdq_pi0_code = 0x1, txdq_pi1_code = 0x41
DWord DQ: txdq_pi0_code = 0x1, txdq_pi1_code = 0x41
DWord DQS: dqs_pi0_code = 0x20, dqs_pi1_code = 0x60
DWord DQS: dqs_pi0_code = 0x20, dqs_pi1_code = 0x60
AWord DQ: txdq_pi0_code = 0x7E, txdq_pi1_code = 0x3E
AWord DQ: txdq_pi0_code = 0x0, txdq_pi1_code = 0x40
AWord DQS: dqs_pi0_code = 0x20, dqs_pi1_code = 0x60
AWord DQS: dqs_pi0_code = 0x20, dqs_pi1_code = 0x60
Socket0 HbmCh14, PI Code:
Socket1 HbmCh14, PI Code:
DWord DQ: txdq_pi0_code = 0x1, txdq_pi1_code = 0x41
DWord DQ: txdq_pi0_code = 0x1, txdq_pi1_code = 0x41
DWord DQS: dqs_pi0_code = 0x20, dqs_pi1_code = 0x60
DWord DQS: dqs_pi0_code = 0x20, dqs_pi1_code = 0x60
AWord DQ: txdq_pi0_code = 0x7F, txdq_pi1_code = 0x3F
AWord DQ: txdq_pi0_code = 0x7E, txdq_pi1_code = 0x3E
AWord DQS: dqs_pi0_code = 0x20, dqs_pi1_code = 0x60
AWord DQS: dqs_pi0_code = 0x20, dqs_pi1_code = 0x60
Socket0 HbmCh15, PI Code:
Socket1 HbmCh15, PI Code:
DWord DQ: txdq_pi0_code = 0x3, txdq_pi1_code = 0x43
DWord DQ: txdq_pi0_code = 0x1, txdq_pi1_code = 0x41
DWord DQS: dqs_pi0_code = 0x20, dqs_pi1_code = 0x60
DWord DQS: dqs_pi0_code = 0x20, dqs_pi1_code = 0x60
AWord DQ: txdq_pi0_code = 0x7F, txdq_pi1_code = 0x3F
AWord DQ: txdq_pi0_code = 0x7F, txdq_pi1_code = 0x3F
AWord DQS: dqs_pi0_code = 0x20, dqs_pi1_code = 0x60
AWord DQS: dqs_pi0_code = 0x20, dqs_pi1_code = 0x60
Socket0 HbmCh16, PI Code:
Socket1 HbmCh16, PI Code:
DWord DQ: txdq_pi0_code = 0x1, txdq_pi1_code = 0x41
DWord DQ: txdq_pi0_code = 0x1, txdq_pi1_code = 0x41
DWord DQS: dqs_pi0_code = 0x20, dqs_pi1_code = 0x60
DWord DQS: dqs_pi0_code = 0x20, dqs_pi1_code = 0x60
AWord DQ: txdq_pi0_code = 0x0, txdq_pi1_code = 0x40
AWord DQ: txdq_pi0_code = 0x0, txdq_pi1_code = 0x40
AWord DQS: dqs_pi0_code = 0x20, dqs_pi1_code = 0x60
AWord DQS: dqs_pi0_code = 0x20, dqs_pi1_code = 0x60
Socket0 HbmCh17, PI Code:
Socket1 HbmCh17, PI Code:
DWord DQ: txdq_pi0_code = 0x0, txdq_pi1_code = 0x40
DWord DQ: txdq_pi0_code = 0x1, txdq_pi1_code = 0x41
DWord DQS: dqs_pi0_code = 0x20, dqs_pi1_code = 0x60
DWord DQS: dqs_pi0_code = 0x20, dqs_pi1_code = 0x60
AWord DQ: txdq_pi0_code = 0x7F, txdq_pi1_code = 0x3F
AWord DQ: txdq_pi0_code = 0x0, txdq_pi1_code = 0x40
AWord DQS: dqs_pi0_code = 0x20, dqs_pi1_code = 0x60
AWord DQS: dqs_pi0_code = 0x20, dqs_pi1_code = 0x60
Socket0 HbmCh18, PI Code:
Socket1 HbmCh18, PI Code:
DWord DQ: txdq_pi0_code = 0x1, txdq_pi1_code = 0x41
DWord DQ: txdq_pi0_code = 0x2, txdq_pi1_code = 0x42
DWord DQS: dqs_pi0_code = 0x20, dqs_pi1_code = 0x60
DWord DQS: dqs_pi0_code = 0x20, dqs_pi1_code = 0x60
AWord DQ: txdq_pi0_code = 0x7F, txdq_pi1_code = 0x3F
AWord DQ: txdq_pi0_code = 0x0, txdq_pi1_code = 0x40
AWord DQS: dqs_pi0_code = 0x20, dqs_pi1_code = 0x60
AWord DQS: dqs_pi0_code = 0x20, dqs_pi1_code = 0x60
Socket0 HbmCh19, PI Code:
Socket1 HbmCh19, PI Code:
DWord DQ: txdq_pi0_code = 0x0, txdq_pi1_code = 0x40
DWord DQ: txdq_pi0_code = 0x0, txdq_pi1_code = 0x40
DWord DQS: dqs_pi0_code = 0x20, dqs_pi1_code = 0x60
DWord DQS: dqs_pi0_code = 0x20, dqs_pi1_code = 0x60
AWord DQ: txdq_pi0_code = 0x7F, txdq_pi1_code = 0x3F
AWord DQ: txdq_pi0_code = 0x7E, txdq_pi1_code = 0x3E
AWord DQS: dqs_pi0_code = 0x20, dqs_pi1_code = 0x60
AWord DQS: dqs_pi0_code = 0x20, dqs_pi1_code = 0x60
Socket0 HbmCh20, PI Code:
Socket1 HbmCh20, PI Code:
DWord DQ: txdq_pi0_code = 0x2, txdq_pi1_code = 0x42
DWord DQ: txdq_pi0_code = 0x3, txdq_pi1_code = 0x43
DWord DQS: dqs_pi0_code = 0x20, dqs_pi1_code = 0x60
DWord DQS: dqs_pi0_code = 0x20, dqs_pi1_code = 0x60
AWord DQ: txdq_pi0_code = 0x7F, txdq_pi1_code = 0x3F
AWord DQ: txdq_pi0_code = 0x7F, txdq_pi1_code = 0x3F
AWord DQS: dqs_pi0_code = 0x20, dqs_pi1_code = 0x60
AWord DQS: dqs_pi0_code = 0x20, dqs_pi1_code = 0x60
Socket0 HbmCh21, PI Code:
Socket1 HbmCh21, PI Code:
DWord DQ: txdq_pi0_code = 0x1, txdq_pi1_code = 0x41
DWord DQ: txdq_pi0_code = 0x3, txdq_pi1_code = 0x43
DWord DQS: dqs_pi0_code = 0x20, dqs_pi1_code = 0x60
DWord DQS: dqs_pi0_code = 0x20, dqs_pi1_code = 0x60
AWord DQ: txdq_pi0_code = 0x7E, txdq_pi1_code = 0x3E
AWord DQ: txdq_pi0_code = 0x7F, txdq_pi1_code = 0x3F
AWord DQS: dqs_pi0_code = 0x20, dqs_pi1_code = 0x60
AWord DQS: dqs_pi0_code = 0x20, dqs_pi1_code = 0x60
Socket0 HbmCh22, PI Code:
Socket1 HbmCh22, PI Code:
DWord DQ: txdq_pi0_code = 0x1, txdq_pi1_code = 0x41
DWord DQ: txdq_pi0_code = 0x3, txdq_pi1_code = 0x43
DWord DQS: dqs_pi0_code = 0x20, dqs_pi1_code = 0x60
DWord DQS: dqs_pi0_code = 0x20, dqs_pi1_code = 0x60
AWord DQ: txdq_pi0_code = 0x7F, txdq_pi1_code = 0x3F
AWord DQ: txdq_pi0_code = 0x7F, txdq_pi1_code = 0x3F
AWord DQS: dqs_pi0_code = 0x20, dqs_pi1_code = 0x60
AWord DQS: dqs_pi0_code = 0x20, dqs_pi1_code = 0x60
Socket0 HbmCh23, PI Code:
Socket1 HbmCh23, PI Code:
DWord DQ: txdq_pi0_code = 0x2, txdq_pi1_code = 0x42
DWord DQ: txdq_pi0_code = 0x0, txdq_pi1_code = 0x40
DWord DQS: dqs_pi0_code = 0x20, dqs_pi1_code = 0x60
DWord DQS: dqs_pi0_code = 0x20, dqs_pi1_code = 0x60
AWord DQ: txdq_pi0_code = 0x7E, txdq_pi1_code = 0x3E
AWord DQ: txdq_pi0_code = 0x7E, txdq_pi1_code = 0x3E
AWord DQS: dqs_pi0_code = 0x20, dqs_pi1_code = 0x60
AWord DQS: dqs_pi0_code = 0x20, dqs_pi1_code = 0x60
Socket0 HbmCh24, PI Code:
Socket1 HbmCh24, PI Code:
DWord DQ: txdq_pi0_code = 0x0, txdq_pi1_code = 0x40
DWord DQ: txdq_pi0_code = 0x7F, txdq_pi1_code = 0x3F
DWord DQS: dqs_pi0_code = 0x20, dqs_pi1_code = 0x60
DWord DQS: dqs_pi0_code = 0x20, dqs_pi1_code = 0x60
AWord DQ: txdq_pi0_code = 0x7D, txdq_pi1_code = 0x3D
AWord DQ: txdq_pi0_code = 0x7F, txdq_pi1_code = 0x3F
AWord DQS: dqs_pi0_code = 0x20, dqs_pi1_code = 0x60
AWord DQS: dqs_pi0_code = 0x20, dqs_pi1_code = 0x60
Socket0 HbmCh25, PI Code:
Socket1 HbmCh25, PI Code:
DWord DQ: txdq_pi0_code = 0x0, txdq_pi1_code = 0x40
DWord DQ: txdq_pi0_code = 0x0, txdq_pi1_code = 0x40
DWord DQS: dqs_pi0_code = 0x20, dqs_pi1_code = 0x60
DWord DQS: dqs_pi0_code = 0x20, dqs_pi1_code = 0x60
AWord DQ: txdq_pi0_code = 0x0, txdq_pi1_code = 0x40
AWord DQ: txdq_pi0_code = 0x1, txdq_pi1_code = 0x41
AWord DQS: dqs_pi0_code = 0x20, dqs_pi1_code = 0x60
AWord DQS: dqs_pi0_code = 0x20, dqs_pi1_code = 0x60
Socket0 HbmCh26, PI Code:
Socket1 HbmCh26, PI Code:
DWord DQ: txdq_pi0_code = 0x7F, txdq_pi1_code = 0x3F
DWord DQ: txdq_pi0_code = 0x0, txdq_pi1_code = 0x40
DWord DQS: dqs_pi0_code = 0x20, dqs_pi1_code = 0x60
DWord DQS: dqs_pi0_code = 0x20, dqs_pi1_code = 0x60
AWord DQ: txdq_pi0_code = 0x0, txdq_pi1_code = 0x40
AWord DQ: txdq_pi0_code = 0x0, txdq_pi1_code = 0x40
AWord DQS: dqs_pi0_code = 0x20, dqs_pi1_code = 0x60
AWord DQS: dqs_pi0_code = 0x20, dqs_pi1_code = 0x60
Socket0 HbmCh27, PI Code:
Socket1 HbmCh27, PI Code:
DWord DQ: txdq_pi0_code = 0x7F, txdq_pi1_code = 0x3F
DWord DQ: txdq_pi0_code = 0x7F, txdq_pi1_code = 0x3F
DWord DQS: dqs_pi0_code = 0x20, dqs_pi1_code = 0x60
DWord DQS: dqs_pi0_code = 0x20, dqs_pi1_code = 0x60
AWord DQ: txdq_pi0_code = 0x7F, txdq_pi1_code = 0x3F
AWord DQ: txdq_pi0_code = 0x7F, txdq_pi1_code = 0x3F
AWord DQS: dqs_pi0_code = 0x20, dqs_pi1_code = 0x60
AWord DQS: dqs_pi0_code = 0x20, dqs_pi1_code = 0x60
Socket0 HbmCh28, PI Code:
Socket1 HbmCh28, PI Code:
DWord DQ: txdq_pi0_code = 0x2, txdq_pi1_code = 0x42
DWord DQ: txdq_pi0_code = 0x0, txdq_pi1_code = 0x40
DWord DQS: dqs_pi0_code = 0x20, dqs_pi1_code = 0x60
DWord DQS: dqs_pi0_code = 0x20, dqs_pi1_code = 0x60
AWord DQ: txdq_pi0_code = 0x7D, txdq_pi1_code = 0x3D
AWord DQ: txdq_pi0_code = 0x7E, txdq_pi1_code = 0x3E
AWord DQS: dqs_pi0_code = 0x20, dqs_pi1_code = 0x60
AWord DQS: dqs_pi0_code = 0x20, dqs_pi1_code = 0x60
Socket0 HbmCh29, PI Code:
Socket1 HbmCh29, PI Code:
DWord DQ: txdq_pi0_code = 0x1, txdq_pi1_code = 0x41
DWord DQ: txdq_pi0_code = 0x1, txdq_pi1_code = 0x41
DWord DQS: dqs_pi0_code = 0x20, dqs_pi1_code = 0x60
DWord DQS: dqs_pi0_code = 0x20, dqs_pi1_code = 0x60
AWord DQ: txdq_pi0_code = 0x7D, txdq_pi1_code = 0x3D
AWord DQ: txdq_pi0_code = 0x7E, txdq_pi1_code = 0x3E
AWord DQS: dqs_pi0_code = 0x20, dqs_pi1_code = 0x60
AWord DQS: dqs_pi0_code = 0x20, dqs_pi1_code = 0x60
Socket0 HbmCh30, PI Code:
Socket1 HbmCh30, PI Code:
DWord DQ: txdq_pi0_code = 0x1, txdq_pi1_code = 0x41
DWord DQ: txdq_pi0_code = 0x1, txdq_pi1_code = 0x41
DWord DQS: dqs_pi0_code = 0x20, dqs_pi1_code = 0x60
DWord DQS: dqs_pi0_code = 0x20, dqs_pi1_code = 0x60
AWord DQ: txdq_pi0_code = 0x7F, txdq_pi1_code = 0x3F
AWord DQ: txdq_pi0_code = 0x7D, txdq_pi1_code = 0x3D
AWord DQS: dqs_pi0_code = 0x20, dqs_pi1_code = 0x60
AWord DQS: dqs_pi0_code = 0x20, dqs_pi1_code = 0x60
Socket0 HbmCh31, PI Code:
Socket1 HbmCh31, PI Code:
DWord DQ: txdq_pi0_code = 0x2, txdq_pi1_code = 0x42
DWord DQ: txdq_pi0_code = 0x7F, txdq_pi1_code = 0x3F
DWord DQS: dqs_pi0_code = 0x20, dqs_pi1_code = 0x60
DWord DQS: dqs_pi0_code = 0x20, dqs_pi1_code = 0x60
AWord DQ: txdq_pi0_code = 0x7E, txdq_pi1_code = 0x3E
AWord DQ: txdq_pi0_code = 0x7F, txdq_pi1_code = 0x3F
AWord DQS: dqs_pi0_code = 0x20, dqs_pi1_code = 0x60
AWord DQS: dqs_pi0_code = 0x20, dqs_pi1_code = 0x60
Socket0 HbmIo0, HbmPhyCfg0Fuse = 0xF2099D47, HbmPhyCfg1Fuse = 0x26C8A033
Socket1 HbmIo0, HbmPhyCfg0Fuse = 0xF2099D47, HbmPhyCfg1Fuse = 0x26C8A033
Socket0 HbmIo1, HbmPhyCfg0Fuse = 0xF2099D47, HbmPhyCfg1Fuse = 0x26C8A833
Socket1 HbmIo1, HbmPhyCfg0Fuse = 0xF2099D47, HbmPhyCfg1Fuse = 0x26C8A833
Socket0 HbmIo2, HbmPhyCfg0Fuse = 0xF2099D47, HbmPhyCfg1Fuse = 0x26C8A833
Socket1 HbmIo2, HbmPhyCfg0Fuse = 0xF2099D47, HbmPhyCfg1Fuse = 0x26C8A833
Socket0 HbmIo3, HbmPhyCfg0Fuse = 0xF2099D47, HbmPhyCfg1Fuse = 0x26C8A033
Socket1 HbmIo3, HbmPhyCfg0Fuse = 0xF2099D47, HbmPhyCfg1Fuse = 0x26C8A033
Socket0 HbmCh0, AWordReadTiming = 0x83E59423, AWordWriteTiming = 0x1D3400A5
Socket1 HbmCh0, AWordReadTiming = 0x83E59423, AWordWriteTiming = 0x1D3400A5
Socket0 HbmCh1, AWordReadTiming = 0x83E59423, AWordWriteTiming = 0x1D3400A5
Socket1 HbmCh1, AWordReadTiming = 0x83E59423, AWordWriteTiming = 0x1D3400A5
Socket0 HbmCh2, AWordReadTiming = 0x83E59423, AWordWriteTiming = 0x1D3400A5
Socket1 HbmCh2, AWordReadTiming = 0x83E59423, AWordWriteTiming = 0x1D3400A5
Socket0 HbmCh3, AWordReadTiming = 0x83E59423, AWordWriteTiming = 0x1D3400A5
Socket1 HbmCh3, AWordReadTiming = 0x83E59423, AWordWriteTiming = 0x1D3400A5
Socket0 HbmCh4, AWordReadTiming = 0x83E59423, AWordWriteTiming = 0x1D3400A5
Socket1 HbmCh4, AWordReadTiming = 0x83E59423, AWordWriteTiming = 0x1D3400A5
Socket0 HbmCh5, AWordReadTiming = 0x83E59423, AWordWriteTiming = 0x1D3400A5
Socket1 HbmCh5, AWordReadTiming = 0x83E59423, AWordWriteTiming = 0x1D3400A5
Socket0 HbmCh6, AWordReadTiming = 0x83E59423, AWordWriteTiming = 0x1D3400A5
Socket1 HbmCh6, AWordReadTiming = 0x83E59423, AWordWriteTiming = 0x1D3400A5
Socket0 HbmCh7, AWordReadTiming = 0x83E59423, AWordWriteTiming = 0x1D3400A5
Socket1 HbmCh7, AWordReadTiming = 0x83E59423, AWordWriteTiming = 0x1D3400A5
Socket0 HbmCh8, AWordReadTiming = 0x83E59423, AWordWriteTiming = 0x1D3400A5
Socket1 HbmCh8, AWordReadTiming = 0x83E59423, AWordWriteTiming = 0x1D3400A5
Socket0 HbmCh9, AWordReadTiming = 0x83E59423, AWordWriteTiming = 0x1D3400A5
Socket1 HbmCh9, AWordReadTiming = 0x83E59423, AWordWriteTiming = 0x1D3400A5
Socket0 HbmCh10, AWordReadTiming = 0x83E59423, AWordWriteTiming = 0x1D3400A5
Socket1 HbmCh10, AWordReadTiming = 0x83E59423, AWordWriteTiming = 0x1D3400A5
Socket0 HbmCh11, AWordReadTiming = 0x83E59423, AWordWriteTiming = 0x1D3400A5
Socket1 HbmCh11, AWordReadTiming = 0x83E59423, AWordWriteTiming = 0x1D3400A5
Socket0 HbmCh12, AWordReadTiming = 0x83E59423, AWordWriteTiming = 0x1D3400A5
Socket1 HbmCh12, AWordReadTiming = 0x83E59423, AWordWriteTiming = 0x1D3400A5
Socket0 HbmCh13, AWordReadTiming = 0x83E59423, AWordWriteTiming = 0x1D3400A5
Socket1 HbmCh13, AWordReadTiming = 0x83E59423, AWordWriteTiming = 0x1D3400A5
Socket0 HbmCh14, AWordReadTiming = 0x83E59423, AWordWriteTiming = 0x1D3400A5
Socket1 HbmCh14, AWordReadTiming = 0x83E59423, AWordWriteTiming = 0x1D3400A5
Socket0 HbmCh15, AWordReadTiming = 0x83E59423, AWordWriteTiming = 0x1D3400A5
Socket1 HbmCh15, AWordReadTiming = 0x83E59423, AWordWriteTiming = 0x1D3400A5
Socket0 HbmCh16, AWordReadTiming = 0x83E59423, AWordWriteTiming = 0x1D3400A5
Socket1 HbmCh16, AWordReadTiming = 0x83E59423, AWordWriteTiming = 0x1D3400A5
Socket0 HbmCh17, AWordReadTiming = 0x83E59423, AWordWriteTiming = 0x1D3400A5
Socket1 HbmCh17, AWordReadTiming = 0x83E59423, AWordWriteTiming = 0x1D3400A5
Socket0 HbmCh18, AWordReadTiming = 0x83E59423, AWordWriteTiming = 0x1D3400A5
Socket1 HbmCh18, AWordReadTiming = 0x83E59423, AWordWriteTiming = 0x1D3400A5
Socket0 HbmCh19, AWordReadTiming = 0x83E59423, AWordWriteTiming = 0x1D3400A5
Socket1 HbmCh19, AWordReadTiming = 0x83E59423, AWordWriteTiming = 0x1D3400A5
Socket0 HbmCh20, AWordReadTiming = 0x83E59423, AWordWriteTiming = 0x1D3400A5
Socket1 HbmCh20, AWordReadTiming = 0x83E59423, AWordWriteTiming = 0x1D3400A5
Socket0 HbmCh21, AWordReadTiming = 0x83E59423, AWordWriteTiming = 0x1D3400A5
Socket1 HbmCh21, AWordReadTiming = 0x83E59423, AWordWriteTiming = 0x1D3400A5
Socket0 HbmCh22, AWordReadTiming = 0x83E59423, AWordWriteTiming = 0x1D3400A5
Socket1 HbmCh22, AWordReadTiming = 0x83E59423, AWordWriteTiming = 0x1D3400A5
Socket0 HbmCh23, AWordReadTiming = 0x83E59423, AWordWriteTiming = 0x1D3400A5
Socket1 HbmCh23, AWordReadTiming = 0x83E59423, AWordWriteTiming = 0x1D3400A5
Socket0 HbmCh24, AWordReadTiming = 0x83E59423, AWordWriteTiming = 0x1D3400A5
Socket1 HbmCh24, AWordReadTiming = 0x83E59423, AWordWriteTiming = 0x1D3400A5
Socket0 HbmCh25, AWordReadTiming = 0x83E59423, AWordWriteTiming = 0x1D3400A5
Socket1 HbmCh25, AWordReadTiming = 0x83E59423, AWordWriteTiming = 0x1D3400A5
Socket0 HbmCh26, AWordReadTiming = 0x83E59423, AWordWriteTiming = 0x1D3400A5
Socket1 HbmCh26, AWordReadTiming = 0x83E59423, AWordWriteTiming = 0x1D3400A5
Socket0 HbmCh27, AWordReadTiming = 0x83E59423, AWordWriteTiming = 0x1D3400A5
Socket1 HbmCh27, AWordReadTiming = 0x83E59423, AWordWriteTiming = 0x1D3400A5
Socket0 HbmCh28, AWordReadTiming = 0x83E59423, AWordWriteTiming = 0x1D3400A5
Socket1 HbmCh28, AWordReadTiming = 0x83E59423, AWordWriteTiming = 0x1D3400A5
Socket0 HbmCh29, AWordReadTiming = 0x83E59423, AWordWriteTiming = 0x1D3400A5
Socket1 HbmCh29, AWordReadTiming = 0x83E59423, AWordWriteTiming = 0x1D3400A5
Socket0 HbmCh30, AWordReadTiming = 0x83E59423, AWordWriteTiming = 0x1D3400A5
Socket1 HbmCh30, AWordReadTiming = 0x83E59423, AWordWriteTiming = 0x1D3400A5
Socket0 HbmCh31, AWordReadTiming = 0x83E59423, AWordWriteTiming = 0x1D3400A5
Socket1 HbmCh31, AWordReadTiming = 0x83E59423, AWordWriteTiming = 0x1D3400A5
Socket0 HbmIo0, UcRamEccLog0 = 0x0, UcRamEccLog1 = 0x0
Socket1 HbmIo0, UcRamEccLog0 = 0x0, UcRamEccLog1 = 0x0
Socket0 HbmIo1, UcRamEccLog0 = 0x0, UcRamEccLog1 = 0x0
Socket1 HbmIo1, UcRamEccLog0 = 0x0, UcRamEccLog1 = 0x0
Socket0 HbmIo2, UcRamEccLog0 = 0x0, UcRamEccLog1 = 0x0
Socket1 HbmIo2, UcRamEccLog0 = 0x0, UcRamEccLog1 = 0x0
Socket0 HbmIo3, UcRamEccLog0 = 0x0, UcRamEccLog1 = 0x0
Socket1 HbmIo3, UcRamEccLog0 = 0x0, UcRamEccLog1 = 0x0
Socket0 HbmIo0, UcScratchPad0 = 0x60000000, UcScratchPad1 = 0x40000006, UcScratchPad2 = 0x0
Socket1 HbmIo0, UcScratchPad0 = 0x60000000, UcScratchPad1 = 0x40000006, UcScratchPad2 = 0x0
Socket0 HbmIo1, UcScratchPad0 = 0x60000000, UcScratchPad1 = 0x40000006, UcScratchPad2 = 0x0
Socket1 HbmIo1, UcScratchPad0 = 0x60000000, UcScratchPad1 = 0x40000006, UcScratchPad2 = 0x0
Socket0 HbmIo2, UcScratchPad0 = 0x60000000, UcScratchPad1 = 0x40000006, UcScratchPad2 = 0x0
Socket1 HbmIo2, UcScratchPad0 = 0x60000000, UcScratchPad1 = 0x40000006, UcScratchPad2 = 0x0
Socket0 HbmIo3, UcScratchPad0 = 0x60000000, UcScratchPad1 = 0x40000006, UcScratchPad2 = 0x0
Socket1 HbmIo3, UcScratchPad0 = 0x60000000, UcScratchPad1 = 0x40000006, UcScratchPad2 = 0x0
HbmioMailbox -IEEE 1500 Read Device ID for Socket 0 HbmIoId 0
HbmioMailbox -IEEE 1500 Read Device ID for Socket 1 HbmIoId 0
HBM: DeviceIdData = {0x3389FFC3, 0xA0A80431, 0x0003A1D0}
HBM: DeviceIdData = {0xAAE9FFC3, 0xA0A80400, 0x0003A1D0}
HbmioMailbox -IEEE 1500 Read Device ID for Socket 0 HbmIoId 1
HbmioMailbox -IEEE 1500 Read Device ID for Socket 1 HbmIoId 1
HBM: DeviceIdData = {0x2309FFC3, 0xA0A80431, 0x0003A1D0}
HBM: DeviceIdData = {0xAE09FFC3, 0xA0A80400, 0x0003A1D0}
HbmioMailbox -IEEE 1500 Read Device ID for Socket 0 HbmIoId 2
HbmioMailbox -IEEE 1500 Read Device ID for Socket 1 HbmIoId 2
HBM: DeviceIdData = {0x3DC9FFC3, 0xA0A80431, 0x0003A1D0}
HBM: DeviceIdData = {0xA271FFC3, 0xA0A80400, 0x0003A1D0}
HbmioMailbox -IEEE 1500 Read Device ID for Socket 0 HbmIoId 3
HbmioMailbox -IEEE 1500 Read Device ID for Socket 1 HbmIoId 3
HBM: DeviceIdData = {0x2669FFC3, 0xA0A00020, 0x0003A1D0}
HBM: DeviceIdData = {0xB299FFC3, 0xA0A80400, 0x0003A1D0}
| HBM Socket:0 Display Device Info |
| Field | HBMIO MODULE 0 | HBMIO MODULE 1 | HBMIO MODULE 2 | HBMIO MODULE 3 |
|Module Enable | ENABLED | ENABLED | ENABLED | ENABLED |
|Model num | 43 | 43 | 43 | 43 |
|Stack High | 8 | 8 | 8 | 8 |
|Channel enable| 11111111 | 11111111 | 11111111 | 11111111 |
|Address Mode | Pseudo Ch | Pseudo Ch | Pseudo Ch | Pseudo Ch |
|Serial number | 02010C4CE2 | 02010C48C2 | 02010C4F72 | 000008099A |
|Manuf. Week | WW10 | WW10 | WW10 | WW10 |
|Manuf. Year | 2021 | 2021 | 2021 | 2021 |
|Manuf. loc | 000D | 000D | 000D | 000D |
|Manuf. ID | SAMSUNG | SAMSUNG | SAMSUNG | SAMSUNG |
|Density | 16 Gbit | 16 Gbit | 16 Gbit | 16 Gbit |
|ECC | ECC | ECC | ECC | ECC |
|Gen2 Test | Supported | Supported | Supported | Supported |
| HBM Socket:1 Display Device Info |
| Field | HBMIO MODULE 0 | HBMIO MODULE 1 | HBMIO MODULE 2 | HBMIO MODULE 3 |
|Module Enable | ENABLED | ENABLED | ENABLED | ENABLED |
|Model num | 43 | 43 | 43 | 43 |
|Stack High | 8 | 8 | 8 | 8 |
|Channel enable| 11111111 | 11111111 | 11111111 | 11111111 |
|Address Mode | Pseudo Ch | Pseudo Ch | Pseudo Ch | Pseudo Ch |
|Serial number | 0201002ABA | 0201002B82 | 020100289C | 0201002CA6 |
|Manuf. Week | WW10 | WW10 | WW10 | WW10 |
|Manuf. Year | 2021 | 2021 | 2021 | 2021 |
|Manuf. loc | 000D | 000D | 000D | 000D |
|Manuf. ID | SAMSUNG | SAMSUNG | SAMSUNG | SAMSUNG |
|Density | 16 Gbit | 16 Gbit | 16 Gbit | 16 Gbit |
|ECC | ECC | ECC | ECC | ECC |
|Gen2 Test | Supported | Supported | Supported | Supported |
N0: DDR and HBM memory populated!
N1: DDR and HBM memory populated!
[ScktId: 0] HBM Training - 2916ms
[ScktId: 1] HBM Training - 2916ms
[ScktId: 0] HBM PPR Flow -- Started
[ScktId: 1] HBM PPR Flow -- Started
[ScktId: 0] HBM PPR Flow - 6ms
[ScktId: 1] HBM PPR Flow - 7ms
[ScktId: 0] HBM mBIST Flow -- Started
[ScktId: 1] HBM mBIST Flow -- Started
[ScktId: 0] HBM mBIST Flow - 6ms
[ScktId: 1] HBM mBIST Flow - 7ms
[ScktId: 0] HBM ReTraining -- Started
[ScktId: 1] HBM ReTraining -- Started
[ScktId: 0] HBM ReTraining - 7ms
[ScktId: 1] HBM ReTraining - 7ms
[ScktId: 0] AP HBM Information -- Started
[ScktId: 1] AP HBM Information -- Started
[ScktId: 0] AP HBM Information - 12ms
[ScktId: 1] AP HBM Information - 9ms
[ScktId: 0] Post-Training Initialization -- Started
[ScktId: 1] Post-Training Initialization -- Started
[ScktId: 0] Post-Training Initialization - 9ms
[ScktId: 1] Post-Training Initialization - 10ms
[ScktId: 0] Pipe Sync AP Pre SSA Data -- Started
[ScktId: 1] Pipe Sync AP Pre SSA Data -- Started
[ScktId: 0] Pipe Sync AP Pre SSA Data - 27ms
[ScktId: 1] Pipe Sync AP Pre SSA Data - 22ms
[ScktId: 0] Enable RX Retraining -- Started
[ScktId: 1] Enable RX Retraining -- Started
[ScktId: 0] Enable RX Retraining - 8ms
[ScktId: 1] Enable RX Retraining - 8ms
[ScktId: 0] Enable TX Retraining -- Started
[ScktId: 1] Enable TX Retraining -- Started
[ScktId: 0] Enable TX Retraining - 521ms
[ScktId: 0] Rank Margin Test -- Started
[ScktId: 1] Enable TX Retraining - 521ms
[ScktId: 0] Rank Margin Test - 3ms
[ScktId: 1] Rank Margin Test -- Started
[ScktId: 0] Pipe Sync SBSP Post SSA Data -- Started
[ScktId: 1] Rank Margin Test - 7ms
[ScktId: 1] Pipe Sync SBSP Post SSA Data -- Started
[ScktId: 1] Pipe Sync SBSP Post SSA Data - 5ms
[ScktId: 0] Pipe Sync SBSP Post SSA Data - 17ms
[ScktId: 1] Pipe Sync AP Pre I/O Health Check Data -- Started
[ScktId: 0] Pipe Sync AP Pre I/O Health Check Data -- Started
[ScktId: 0] Pipe Sync AP Pre I/O Health Check Data - 25ms
[ScktId: 1] Pipe Sync AP Pre I/O Health Check Data - 30ms
[ScktId: 0] Perform I/O Health Check -- Started
[ScktId: 1] Perform I/O Health Check -- Started
I/O Health Check Passed
[ScktId: 0] Perform I/O Health Check - 1605ms
I/O Health Check Passed
[ScktId: 0] Pipe Sync SBSP Post I/O Heath Check -- Started
[ScktId: 1] Perform I/O Health Check - 1606ms
[ScktId: 1] Pipe Sync SBSP Post I/O Heath Check -- Started
[ScktId: 0] Pipe Sync SBSP Post I/O Heath Check - 18ms
[ScktId: 1] Pipe Sync SBSP Post I/O Heath Check - 5ms
N1 Checked into Pipe
[ScktId: 0] Check I/O Health Check Status -- Started
[ScktId: 0] Check I/O Health Check Status - 7ms
[ScktId: 1] Offset training results -- Started
[ScktId: 0] Offset training results -- Started
[ScktId: 1] Offset training results - 4ms
[ScktId: 0] Offset training results - 9ms
[ScktId: 1] HBM Post-Training -- Started
[ScktId: 0] HBM Post-Training -- Started
N1.C00: HBM Density: 10 N0.C00: HBM Density: 10 N1.C00: Column Address width: 0; N0.C00: Column Address width: 0; N1.C00: Row Address width: 3; N0.C00: Row Address width: 3; N1.C00: Number of banks: 2
N0.C00: Number of banks: 2
N1.C08: HBM Density: 10 N0.C08: HBM Density: 10 N1.C08: Column Address width: 0; N0.C08: Column Address width: 0; N1.C08: Row Address width: 3; N0.C08: Row Address width: 3; N1.C08: Number of banks: 2
N0.C08: Number of banks: 2
N1.C16: HBM Density: 10 N0.C16: HBM Density: 10 N1.C16: Column Address width: 0; N0.C16: Column Address width: 0; N1.C16: Row Address width: 3; N0.C16: Row Address width: 3; N1.C16: Number of banks: 2
N0.C16: Number of banks: 2
N1.C24: HBM Density: 10 N0.C24: HBM Density: 10 N1.C24: Column Address width: 0; N0.C24: Column Address width: 0; N1.C24: Row Address width: 3; N0.C24: Row Address width: 3; N1.C24: Number of banks: 2
N0.C24: Number of banks: 2
MemHotOutputOnlyOpt set to :0
MemHotOutputOnlyOpt set to :0
Socket 1 Ch 0 - CkeLl0.Data = 0x10000080
Socket 1 Ch 0 - CkeLl1.Data = 0x10000260
Socket 1 Ch 0 - CkeLl2.Data = 0x10000230
Socket 1 Ch 0 - CkeLl3.Data = 0x10000230
Socket 1 Ch 0 - PkgcCke.Data = 0x10000230
Socket 0 Ch 0 - CkeLl0.Data = 0x10000080
Socket 0 Ch 0 - CkeLl1.Data = 0x10000260
Socket 0 Ch 0 - CkeLl2.Data = 0x10000230
Socket 0 Ch 0 - CkeLl3.Data = 0x10000230
Socket 0 Ch 0 - PkgcCke.Data = 0x10000230
LpModePmControlN0.Data Original = 0x8806C
LpModePmControlN0.Data Original = 0x8806C
LpModePmControlN1.Data Original = 0x0
LpModePmControlN1.Data Original = 0x0
LpModePmControlN0.Data New = 0xC3F4206B
LpModePmControlN0.Data New = 0xC3F4206B
LpModePmControlN1.Data New = 0x87
LpModePmControlN1.Data New = 0x87
N1.C00: HBM Tcrftp.t_rfc = 0xA for density 0x00000001
N0.C00: HBM Tcrftp.t_rfc = 0xA for density 0x00000000
Socket 1 Ch 1 - CkeLl0.Data = 0x10000080
Socket 1 Ch 1 - CkeLl1.Data = 0x10000260
Socket 1 Ch 1 - CkeLl2.Data = 0x10000230
Socket 1 Ch 1 - CkeLl3.Data = 0x10000230
Socket 1 Ch 1 - PkgcCke.Data = 0x10000230
Socket 0 Ch 1 - CkeLl0.Data = 0x10000080
Socket 0 Ch 1 - CkeLl1.Data = 0x10000260
Socket 0 Ch 1 - CkeLl2.Data = 0x10000230
Socket 0 Ch 1 - CkeLl3.Data = 0x10000230
Socket 0 Ch 1 - PkgcCke.Data = 0x10000230
LpModePmControlN0.Data Original = 0x8806C
LpModePmControlN0.Data Original = 0x8806C
LpModePmControlN1.Data Original = 0x0
LpModePmControlN1.Data Original = 0x0
LpModePmControlN0.Data New = 0xC3F4206B
LpModePmControlN0.Data New = 0xC3F4206B
LpModePmControlN1.Data New = 0x87
LpModePmControlN1.Data New = 0x87
N1.C01: HBM Tcrftp.t_rfc = 0xA for density 0x00000001
N0.C01: HBM Tcrftp.t_rfc = 0xA for density 0x00000000
Socket 1 Ch 2 - CkeLl0.Data = 0x10000080
Socket 1 Ch 2 - CkeLl1.Data = 0x10000260
Socket 1 Ch 2 - CkeLl2.Data = 0x10000230
Socket 1 Ch 2 - CkeLl3.Data = 0x10000230
Socket 1 Ch 2 - PkgcCke.Data = 0x10000230
Socket 0 Ch 2 - CkeLl0.Data = 0x10000080
Socket 0 Ch 2 - CkeLl1.Data = 0x10000260
Socket 0 Ch 2 - CkeLl2.Data = 0x10000230
Socket 0 Ch 2 - CkeLl3.Data = 0x10000230
Socket 0 Ch 2 - PkgcCke.Data = 0x10000230
LpModePmControlN0.Data Original = 0x8806C
LpModePmControlN0.Data Original = 0x8806C
LpModePmControlN1.Data Original = 0x0
LpModePmControlN1.Data Original = 0x0
LpModePmControlN0.Data New = 0xC3F4206B
LpModePmControlN0.Data New = 0xC3F4206B
LpModePmControlN1.Data New = 0x87
LpModePmControlN1.Data New = 0x87
N1.C02: HBM Tcrftp.t_rfc = 0xA for density 0x00000001
N0.C02: HBM Tcrftp.t_rfc = 0xA for density 0x00000000
Socket 1 Ch 3 - CkeLl0.Data = 0x10000080
Socket 1 Ch 3 - CkeLl1.Data = 0x10000260
Socket 1 Ch 3 - CkeLl2.Data = 0x10000230
Socket 1 Ch 3 - CkeLl3.Data = 0x10000230
Socket 1 Ch 3 - PkgcCke.Data = 0x10000230
Socket 0 Ch 3 - CkeLl0.Data = 0x10000080
Socket 0 Ch 3 - CkeLl1.Data = 0x10000260
Socket 0 Ch 3 - CkeLl2.Data = 0x10000230
Socket 0 Ch 3 - CkeLl3.Data = 0x10000230
Socket 0 Ch 3 - PkgcCke.Data = 0x10000230
LpModePmControlN0.Data Original = 0x8806C
LpModePmControlN0.Data Original = 0x8806C
LpModePmControlN1.Data Original = 0x0
LpModePmControlN1.Data Original = 0x0
LpModePmControlN0.Data New = 0xC3F4206B
LpModePmControlN0.Data New = 0xC3F4206B
LpModePmControlN1.Data New = 0x87
LpModePmControlN1.Data New = 0x87
N1.C03: HBM Tcrftp.t_rfc = 0xA for density 0x00000001
N0.C03: HBM Tcrftp.t_rfc = 0xA for density 0x00000000
Socket 1 Ch 4 - CkeLl0.Data = 0x10000080
Socket 1 Ch 4 - CkeLl1.Data = 0x10000260
Socket 1 Ch 4 - CkeLl2.Data = 0x10000230
Socket 1 Ch 4 - CkeLl3.Data = 0x10000230
Socket 1 Ch 4 - PkgcCke.Data = 0x10000230
Socket 0 Ch 4 - CkeLl0.Data = 0x10000080
Socket 0 Ch 4 - CkeLl1.Data = 0x10000260
Socket 0 Ch 4 - CkeLl2.Data = 0x10000230
Socket 0 Ch 4 - CkeLl3.Data = 0x10000230
Socket 0 Ch 4 - PkgcCke.Data = 0x10000230
LpModePmControlN0.Data Original = 0x8806C
LpModePmControlN0.Data Original = 0x8806C
LpModePmControlN1.Data Original = 0x0
LpModePmControlN1.Data Original = 0x0
LpModePmControlN0.Data New = 0xC3F4206B
LpModePmControlN0.Data New = 0xC3F4206B
LpModePmControlN1.Data New = 0x87
LpModePmControlN1.Data New = 0x87
N1.C04: HBM Tcrftp.t_rfc = 0xA for density 0x00000001
N0.C04: HBM Tcrftp.t_rfc = 0xA for density 0x00000000
Socket 1 Ch 5 - CkeLl0.Data = 0x10000080
Socket 1 Ch 5 - CkeLl1.Data = 0x10000260
Socket 1 Ch 5 - CkeLl2.Data = 0x10000230
Socket 1 Ch 5 - CkeLl3.Data = 0x10000230
Socket 1 Ch 5 - PkgcCke.Data = 0x10000230
Socket 0 Ch 5 - CkeLl0.Data = 0x10000080
Socket 0 Ch 5 - CkeLl1.Data = 0x10000260
Socket 0 Ch 5 - CkeLl2.Data = 0x10000230
Socket 0 Ch 5 - CkeLl3.Data = 0x10000230
Socket 0 Ch 5 - PkgcCke.Data = 0x10000230
LpModePmControlN0.Data Original = 0x8806C
LpModePmControlN0.Data Original = 0x8806C
LpModePmControlN1.Data Original = 0x0
LpModePmControlN1.Data Original = 0x0
LpModePmControlN0.Data New = 0xC3F4206B
LpModePmControlN0.Data New = 0xC3F4206B
LpModePmControlN1.Data New = 0x87
LpModePmControlN1.Data New = 0x87
N1.C05: HBM Tcrftp.t_rfc = 0xA for density 0x00000001
N0.C05: HBM Tcrftp.t_rfc = 0xA for density 0x00000000
Socket 1 Ch 6 - CkeLl0.Data = 0x10000080
Socket 1 Ch 6 - CkeLl1.Data = 0x10000260
Socket 1 Ch 6 - CkeLl2.Data = 0x10000230
Socket 1 Ch 6 - CkeLl3.Data = 0x10000230
Socket 1 Ch 6 - PkgcCke.Data = 0x10000230
Socket 0 Ch 6 - CkeLl0.Data = 0x10000080
Socket 0 Ch 6 - CkeLl1.Data = 0x10000260
Socket 0 Ch 6 - CkeLl2.Data = 0x10000230
Socket 0 Ch 6 - CkeLl3.Data = 0x10000230
Socket 0 Ch 6 - PkgcCke.Data = 0x10000230
LpModePmControlN0.Data Original = 0x8806C
LpModePmControlN0.Data Original = 0x8806C
LpModePmControlN1.Data Original = 0x0
LpModePmControlN1.Data Original = 0x0
LpModePmControlN0.Data New = 0xC3F4206B
LpModePmControlN0.Data New = 0xC3F4206B
LpModePmControlN1.Data New = 0x87
LpModePmControlN1.Data New = 0x87
N1.C06: HBM Tcrftp.t_rfc = 0xA for density 0x00000001
N0.C06: HBM Tcrftp.t_rfc = 0xA for density 0x00000000
Socket 1 Ch 7 - CkeLl0.Data = 0x10000080
Socket 1 Ch 7 - CkeLl1.Data = 0x10000260
Socket 1 Ch 7 - CkeLl2.Data = 0x10000230
Socket 1 Ch 7 - CkeLl3.Data = 0x10000230
Socket 1 Ch 7 - PkgcCke.Data = 0x10000230
Socket 0 Ch 7 - CkeLl0.Data = 0x10000080
Socket 0 Ch 7 - CkeLl1.Data = 0x10000260
Socket 0 Ch 7 - CkeLl2.Data = 0x10000230
Socket 0 Ch 7 - CkeLl3.Data = 0x10000230
Socket 0 Ch 7 - PkgcCke.Data = 0x10000230
LpModePmControlN0.Data Original = 0x8806C
LpModePmControlN0.Data Original = 0x8806C
LpModePmControlN1.Data Original = 0x0
LpModePmControlN1.Data Original = 0x0
LpModePmControlN0.Data New = 0xC3F4206B
LpModePmControlN0.Data New = 0xC3F4206B
LpModePmControlN1.Data New = 0x87
LpModePmControlN1.Data New = 0x87
N1.C07: HBM Tcrftp.t_rfc = 0xA for density 0x00000001
N0.C07: HBM Tcrftp.t_rfc = 0xA for density 0x00000000
Socket 1 Ch 8 - CkeLl0.Data = 0x10000080
Socket 1 Ch 8 - CkeLl1.Data = 0x10000260
Socket 1 Ch 8 - CkeLl2.Data = 0x10000230
Socket 1 Ch 8 - CkeLl3.Data = 0x10000230
Socket 1 Ch 8 - PkgcCke.Data = 0x10000230
Socket 0 Ch 8 - CkeLl0.Data = 0x10000080
Socket 0 Ch 8 - CkeLl1.Data = 0x10000260
Socket 0 Ch 8 - CkeLl2.Data = 0x10000230
Socket 0 Ch 8 - CkeLl3.Data = 0x10000230
Socket 0 Ch 8 - PkgcCke.Data = 0x10000230
LpModePmControlN0.Data Original = 0x8806C
LpModePmControlN0.Data Original = 0x8806C
LpModePmControlN1.Data Original = 0x0
LpModePmControlN1.Data Original = 0x0
LpModePmControlN0.Data New = 0xC3F4206B
LpModePmControlN0.Data New = 0xC3F4206B
LpModePmControlN1.Data New = 0x87
LpModePmControlN1.Data New = 0x87
N1.C08: HBM Tcrftp.t_rfc = 0xA for density 0x00000001
N0.C08: HBM Tcrftp.t_rfc = 0xA for density 0x00000000
Socket 1 Ch 9 - CkeLl0.Data = 0x10000080
Socket 1 Ch 9 - CkeLl1.Data = 0x10000260
Socket 1 Ch 9 - CkeLl2.Data = 0x10000230
Socket 1 Ch 9 - CkeLl3.Data = 0x10000230
Socket 1 Ch 9 - PkgcCke.Data = 0x10000230
Socket 0 Ch 9 - CkeLl0.Data = 0x10000080
Socket 0 Ch 9 - CkeLl1.Data = 0x10000260
Socket 0 Ch 9 - CkeLl2.Data = 0x10000230
Socket 0 Ch 9 - CkeLl3.Data = 0x10000230
Socket 0 Ch 9 - PkgcCke.Data = 0x10000230
LpModePmControlN0.Data Original = 0x8806C
LpModePmControlN0.Data Original = 0x8806C
LpModePmControlN1.Data Original = 0x0
LpModePmControlN1.Data Original = 0x0
LpModePmControlN0.Data New = 0xC3F4206B
LpModePmControlN0.Data New = 0xC3F4206B
LpModePmControlN1.Data New = 0x87
LpModePmControlN1.Data New = 0x87
N1.C09: HBM Tcrftp.t_rfc = 0xA for density 0x00000001
N0.C09: HBM Tcrftp.t_rfc = 0xA for density 0x00000000
Socket 1 Ch 10 - CkeLl0.Data = 0x10000080
Socket 1 Ch 10 - CkeLl1.Data = 0x10000260
Socket 1 Ch 10 - CkeLl2.Data = 0x10000230
Socket 1 Ch 10 - CkeLl3.Data = 0x10000230
Socket 1 Ch 10 - PkgcCke.Data = 0x10000230
Socket 0 Ch 10 - CkeLl0.Data = 0x10000080
Socket 0 Ch 10 - CkeLl1.Data = 0x10000260
Socket 0 Ch 10 - CkeLl2.Data = 0x10000230
Socket 0 Ch 10 - CkeLl3.Data = 0x10000230
Socket 0 Ch 10 - PkgcCke.Data = 0x10000230
LpModePmControlN0.Data Original = 0x8806C
LpModePmControlN0.Data Original = 0x8806C
LpModePmControlN1.Data Original = 0x0
LpModePmControlN1.Data Original = 0x0
LpModePmControlN0.Data New = 0xC3F4206B
LpModePmControlN0.Data New = 0xC3F4206B
LpModePmControlN1.Data New = 0x87
LpModePmControlN1.Data New = 0x87
N1.C10: HBM Tcrftp.t_rfc = 0xA for density 0x00000001
N0.C10: HBM Tcrftp.t_rfc = 0xA for density 0x00000000
Socket 1 Ch 11 - CkeLl0.Data = 0x10000080
Socket 1 Ch 11 - CkeLl1.Data = 0x10000260
Socket 1 Ch 11 - CkeLl2.Data = 0x10000230
Socket 1 Ch 11 - CkeLl3.Data = 0x10000230
Socket 1 Ch 11 - PkgcCke.Data = 0x10000230
Socket 0 Ch 11 - CkeLl0.Data = 0x10000080
Socket 0 Ch 11 - CkeLl1.Data = 0x10000260
Socket 0 Ch 11 - CkeLl2.Data = 0x10000230
Socket 0 Ch 11 - CkeLl3.Data = 0x10000230
Socket 0 Ch 11 - PkgcCke.Data = 0x10000230
LpModePmControlN0.Data Original = 0x8806C
LpModePmControlN0.Data Original = 0x8806C
LpModePmControlN1.Data Original = 0x0
LpModePmControlN1.Data Original = 0x0
LpModePmControlN0.Data New = 0xC3F4206B
LpModePmControlN0.Data New = 0xC3F4206B
LpModePmControlN1.Data New = 0x87
LpModePmControlN1.Data New = 0x87
N1.C11: HBM Tcrftp.t_rfc = 0xA for density 0x00000001
N0.C11: HBM Tcrftp.t_rfc = 0xA for density 0x00000000
Socket 1 Ch 12 - CkeLl0.Data = 0x10000080
Socket 1 Ch 12 - CkeLl1.Data = 0x10000260
Socket 1 Ch 12 - CkeLl2.Data = 0x10000230
Socket 1 Ch 12 - CkeLl3.Data = 0x10000230
Socket 1 Ch 12 - PkgcCke.Data = 0x10000230
Socket 0 Ch 12 - CkeLl0.Data = 0x10000080
Socket 0 Ch 12 - CkeLl1.Data = 0x10000260
Socket 0 Ch 12 - CkeLl2.Data = 0x10000230
Socket 0 Ch 12 - CkeLl3.Data = 0x10000230
Socket 0 Ch 12 - PkgcCke.Data = 0x10000230
LpModePmControlN0.Data Original = 0x8806C
LpModePmControlN0.Data Original = 0x8806C
LpModePmControlN1.Data Original = 0x0
LpModePmControlN1.Data Original = 0x0
LpModePmControlN0.Data New = 0xC3F4206B
LpModePmControlN0.Data New = 0xC3F4206B
LpModePmControlN1.Data New = 0x87
LpModePmControlN1.Data New = 0x87
N1.C12: HBM Tcrftp.t_rfc = 0xA for density 0x00000001
N0.C12: HBM Tcrftp.t_rfc = 0xA for density 0x00000000
Socket 1 Ch 13 - CkeLl0.Data = 0x10000080
Socket 1 Ch 13 - CkeLl1.Data = 0x10000260
Socket 1 Ch 13 - CkeLl2.Data = 0x10000230
Socket 1 Ch 13 - CkeLl3.Data = 0x10000230
Socket 1 Ch 13 - PkgcCke.Data = 0x10000230
Socket 0 Ch 13 - CkeLl0.Data = 0x10000080
Socket 0 Ch 13 - CkeLl1.Data = 0x10000260
Socket 0 Ch 13 - CkeLl2.Data = 0x10000230
Socket 0 Ch 13 - CkeLl3.Data = 0x10000230
Socket 0 Ch 13 - PkgcCke.Data = 0x10000230
LpModePmControlN0.Data Original = 0x8806C
LpModePmControlN0.Data Original = 0x8806C
LpModePmControlN1.Data Original = 0x0
LpModePmControlN1.Data Original = 0x0
LpModePmControlN0.Data New = 0xC3F4206B
LpModePmControlN0.Data New = 0xC3F4206B
LpModePmControlN1.Data New = 0x87
LpModePmControlN1.Data New = 0x87
N1.C13: HBM Tcrftp.t_rfc = 0xA for density 0x00000001
N0.C13: HBM Tcrftp.t_rfc = 0xA for density 0x00000000
Socket 1 Ch 14 - CkeLl0.Data = 0x10000080
Socket 1 Ch 14 - CkeLl1.Data = 0x10000260
Socket 1 Ch 14 - CkeLl2.Data = 0x10000230
Socket 1 Ch 14 - CkeLl3.Data = 0x10000230
Socket 1 Ch 14 - PkgcCke.Data = 0x10000230
Socket 0 Ch 14 - CkeLl0.Data = 0x10000080
Socket 0 Ch 14 - CkeLl1.Data = 0x10000260
Socket 0 Ch 14 - CkeLl2.Data = 0x10000230
Socket 0 Ch 14 - CkeLl3.Data = 0x10000230
Socket 0 Ch 14 - PkgcCke.Data = 0x10000230
LpModePmControlN0.Data Original = 0x8806C
LpModePmControlN0.Data Original = 0x8806C
LpModePmControlN1.Data Original = 0x0
LpModePmControlN1.Data Original = 0x0
LpModePmControlN0.Data New = 0xC3F4206B
LpModePmControlN0.Data New = 0xC3F4206B
LpModePmControlN1.Data New = 0x87
LpModePmControlN1.Data New = 0x87
N1.C14: HBM Tcrftp.t_rfc = 0xA for density 0x00000001
N0.C14: HBM Tcrftp.t_rfc = 0xA for density 0x00000000
Socket 1 Ch 15 - CkeLl0.Data = 0x10000080
Socket 1 Ch 15 - CkeLl1.Data = 0x10000260
Socket 1 Ch 15 - CkeLl2.Data = 0x10000230
Socket 1 Ch 15 - CkeLl3.Data = 0x10000230
Socket 1 Ch 15 - PkgcCke.Data = 0x10000230
Socket 0 Ch 15 - CkeLl0.Data = 0x10000080
Socket 0 Ch 15 - CkeLl1.Data = 0x10000260
Socket 0 Ch 15 - CkeLl2.Data = 0x10000230
Socket 0 Ch 15 - CkeLl3.Data = 0x10000230
Socket 0 Ch 15 - PkgcCke.Data = 0x10000230
LpModePmControlN0.Data Original = 0x8806C
LpModePmControlN0.Data Original = 0x8806C
LpModePmControlN1.Data Original = 0x0
LpModePmControlN1.Data Original = 0x0
LpModePmControlN0.Data New = 0xC3F4206B
LpModePmControlN0.Data New = 0xC3F4206B
LpModePmControlN1.Data New = 0x87
LpModePmControlN1.Data New = 0x87
N1.C15: HBM Tcrftp.t_rfc = 0xA for density 0x00000001
N0.C15: HBM Tcrftp.t_rfc = 0xA for density 0x00000000
Socket 1 Ch 16 - CkeLl0.Data = 0x10000080
Socket 1 Ch 16 - CkeLl1.Data = 0x10000260
Socket 1 Ch 16 - CkeLl2.Data = 0x10000230
Socket 1 Ch 16 - CkeLl3.Data = 0x10000230
Socket 1 Ch 16 - PkgcCke.Data = 0x10000230
Socket 0 Ch 16 - CkeLl0.Data = 0x10000080
Socket 0 Ch 16 - CkeLl1.Data = 0x10000260
Socket 0 Ch 16 - CkeLl2.Data = 0x10000230
Socket 0 Ch 16 - CkeLl3.Data = 0x10000230
Socket 0 Ch 16 - PkgcCke.Data = 0x10000230
LpModePmControlN0.Data Original = 0x8806C
LpModePmControlN0.Data Original = 0x8806C
LpModePmControlN1.Data Original = 0x0
LpModePmControlN1.Data Original = 0x0
LpModePmControlN0.Data New = 0xC3F4206B
LpModePmControlN0.Data New = 0xC3F4206B
LpModePmControlN1.Data New = 0x87
LpModePmControlN1.Data New = 0x87
N1.C16: HBM Tcrftp.t_rfc = 0xA for density 0x00000001
N0.C16: HBM Tcrftp.t_rfc = 0xA for density 0x00000000
Socket 1 Ch 17 - CkeLl0.Data = 0x10000080
Socket 1 Ch 17 - CkeLl1.Data = 0x10000260
Socket 1 Ch 17 - CkeLl2.Data = 0x10000230
Socket 1 Ch 17 - CkeLl3.Data = 0x10000230
Socket 1 Ch 17 - PkgcCke.Data = 0x10000230
Socket 0 Ch 17 - CkeLl0.Data = 0x10000080
Socket 0 Ch 17 - CkeLl1.Data = 0x10000260
Socket 0 Ch 17 - CkeLl2.Data = 0x10000230
Socket 0 Ch 17 - CkeLl3.Data = 0x10000230
Socket 0 Ch 17 - PkgcCke.Data = 0x10000230
LpModePmControlN0.Data Original = 0x8806C
LpModePmControlN0.Data Original = 0x8806C
LpModePmControlN1.Data Original = 0x0
LpModePmControlN1.Data Original = 0x0
LpModePmControlN0.Data New = 0xC3F4206B
LpModePmControlN0.Data New = 0xC3F4206B
LpModePmControlN1.Data New = 0x87
LpModePmControlN1.Data New = 0x87
N1.C17: HBM Tcrftp.t_rfc = 0xA for density 0x00000001
N0.C17: HBM Tcrftp.t_rfc = 0xA for density 0x00000000
Socket 1 Ch 18 - CkeLl0.Data = 0x10000080
Socket 1 Ch 18 - CkeLl1.Data = 0x10000260
Socket 1 Ch 18 - CkeLl2.Data = 0x10000230
Socket 1 Ch 18 - CkeLl3.Data = 0x10000230
Socket 1 Ch 18 - PkgcCke.Data = 0x10000230
Socket 0 Ch 18 - CkeLl0.Data = 0x10000080
Socket 0 Ch 18 - CkeLl1.Data = 0x10000260
Socket 0 Ch 18 - CkeLl2.Data = 0x10000230
Socket 0 Ch 18 - CkeLl3.Data = 0x10000230
Socket 0 Ch 18 - PkgcCke.Data = 0x10000230
LpModePmControlN0.Data Original = 0x8806C
LpModePmControlN0.Data Original = 0x8806C
LpModePmControlN1.Data Original = 0x0
LpModePmControlN1.Data Original = 0x0
LpModePmControlN0.Data New = 0xC3F4206B
LpModePmControlN0.Data New = 0xC3F4206B
LpModePmControlN1.Data New = 0x87
LpModePmControlN1.Data New = 0x87
N1.C18: HBM Tcrftp.t_rfc = 0xA for density 0x00000001
N0.C18: HBM Tcrftp.t_rfc = 0xA for density 0x00000000
Socket 1 Ch 19 - CkeLl0.Data = 0x10000080
Socket 1 Ch 19 - CkeLl1.Data = 0x10000260
Socket 1 Ch 19 - CkeLl2.Data = 0x10000230
Socket 1 Ch 19 - CkeLl3.Data = 0x10000230
Socket 1 Ch 19 - PkgcCke.Data = 0x10000230
Socket 0 Ch 19 - CkeLl0.Data = 0x10000080
Socket 0 Ch 19 - CkeLl1.Data = 0x10000260
Socket 0 Ch 19 - CkeLl2.Data = 0x10000230
Socket 0 Ch 19 - CkeLl3.Data = 0x10000230
Socket 0 Ch 19 - PkgcCke.Data = 0x10000230
LpModePmControlN0.Data Original = 0x8806C
LpModePmControlN0.Data Original = 0x8806C
LpModePmControlN1.Data Original = 0x0
LpModePmControlN1.Data Original = 0x0
LpModePmControlN0.Data New = 0xC3F4206B
LpModePmControlN0.Data New = 0xC3F4206B
LpModePmControlN1.Data New = 0x87
LpModePmControlN1.Data New = 0x87
N1.C19: HBM Tcrftp.t_rfc = 0xA for density 0x00000001
N0.C19: HBM Tcrftp.t_rfc = 0xA for density 0x00000000
Socket 1 Ch 20 - CkeLl0.Data = 0x10000080
Socket 1 Ch 20 - CkeLl1.Data = 0x10000260
Socket 1 Ch 20 - CkeLl2.Data = 0x10000230
Socket 1 Ch 20 - CkeLl3.Data = 0x10000230
Socket 1 Ch 20 - PkgcCke.Data = 0x10000230
Socket 0 Ch 20 - CkeLl0.Data = 0x10000080
Socket 0 Ch 20 - CkeLl1.Data = 0x10000260
Socket 0 Ch 20 - CkeLl2.Data = 0x10000230
Socket 0 Ch 20 - CkeLl3.Data = 0x10000230
Socket 0 Ch 20 - PkgcCke.Data = 0x10000230
LpModePmControlN0.Data Original = 0x8806C
LpModePmControlN0.Data Original = 0x8806C
LpModePmControlN1.Data Original = 0x0
LpModePmControlN1.Data Original = 0x0
LpModePmControlN0.Data New = 0xC3F4206B
LpModePmControlN0.Data New = 0xC3F4206B
LpModePmControlN1.Data New = 0x87
LpModePmControlN1.Data New = 0x87
N1.C20: HBM Tcrftp.t_rfc = 0xA for density 0x00000001
N0.C20: HBM Tcrftp.t_rfc = 0xA for density 0x00000000
Socket 1 Ch 21 - CkeLl0.Data = 0x10000080
Socket 1 Ch 21 - CkeLl1.Data = 0x10000260
Socket 1 Ch 21 - CkeLl2.Data = 0x10000230
Socket 1 Ch 21 - CkeLl3.Data = 0x10000230
Socket 1 Ch 21 - PkgcCke.Data = 0x10000230
Socket 0 Ch 21 - CkeLl0.Data = 0x10000080
Socket 0 Ch 21 - CkeLl1.Data = 0x10000260
Socket 0 Ch 21 - CkeLl2.Data = 0x10000230
Socket 0 Ch 21 - CkeLl3.Data = 0x10000230
Socket 0 Ch 21 - PkgcCke.Data = 0x10000230
LpModePmControlN0.Data Original = 0x8806C
LpModePmControlN0.Data Original = 0x8806C
LpModePmControlN1.Data Original = 0x0
LpModePmControlN1.Data Original = 0x0
LpModePmControlN0.Data New = 0xC3F4206B
LpModePmControlN0.Data New = 0xC3F4206B
LpModePmControlN1.Data New = 0x87
LpModePmControlN1.Data New = 0x87
N1.C21: HBM Tcrftp.t_rfc = 0xA for density 0x00000001
N0.C21: HBM Tcrftp.t_rfc = 0xA for density 0x00000000
Socket 1 Ch 22 - CkeLl0.Data = 0x10000080
Socket 1 Ch 22 - CkeLl1.Data = 0x10000260
Socket 1 Ch 22 - CkeLl2.Data = 0x10000230
Socket 1 Ch 22 - CkeLl3.Data = 0x10000230
Socket 1 Ch 22 - PkgcCke.Data = 0x10000230
Socket 0 Ch 22 - CkeLl0.Data = 0x10000080
Socket 0 Ch 22 - CkeLl1.Data = 0x10000260
Socket 0 Ch 22 - CkeLl2.Data = 0x10000230
Socket 0 Ch 22 - CkeLl3.Data = 0x10000230
Socket 0 Ch 22 - PkgcCke.Data = 0x10000230
LpModePmControlN0.Data Original = 0x8806C
LpModePmControlN0.Data Original = 0x8806C
LpModePmControlN1.Data Original = 0x0
LpModePmControlN1.Data Original = 0x0
LpModePmControlN0.Data New = 0xC3F4206B
LpModePmControlN0.Data New = 0xC3F4206B
LpModePmControlN1.Data New = 0x87
LpModePmControlN1.Data New = 0x87
N1.C22: HBM Tcrftp.t_rfc = 0xA for density 0x00000001
N0.C22: HBM Tcrftp.t_rfc = 0xA for density 0x00000000
Socket 1 Ch 23 - CkeLl0.Data = 0x10000080
Socket 1 Ch 23 - CkeLl1.Data = 0x10000260
Socket 1 Ch 23 - CkeLl2.Data = 0x10000230
Socket 1 Ch 23 - CkeLl3.Data = 0x10000230
Socket 1 Ch 23 - PkgcCke.Data = 0x10000230
Socket 0 Ch 23 - CkeLl0.Data = 0x10000080
Socket 0 Ch 23 - CkeLl1.Data = 0x10000260
Socket 0 Ch 23 - CkeLl2.Data = 0x10000230
Socket 0 Ch 23 - CkeLl3.Data = 0x10000230
Socket 0 Ch 23 - PkgcCke.Data = 0x10000230
LpModePmControlN0.Data Original = 0x8806C
LpModePmControlN0.Data Original = 0x8806C
LpModePmControlN1.Data Original = 0x0
LpModePmControlN1.Data Original = 0x0
LpModePmControlN0.Data New = 0xC3F4206B
LpModePmControlN0.Data New = 0xC3F4206B
LpModePmControlN1.Data New = 0x87
LpModePmControlN1.Data New = 0x87
N1.C23: HBM Tcrftp.t_rfc = 0xA for density 0x00000001
N0.C23: HBM Tcrftp.t_rfc = 0xA for density 0x00000000
Socket 1 Ch 24 - CkeLl0.Data = 0x10000080
Socket 1 Ch 24 - CkeLl1.Data = 0x10000260
Socket 1 Ch 24 - CkeLl2.Data = 0x10000230
Socket 1 Ch 24 - CkeLl3.Data = 0x10000230
Socket 1 Ch 24 - PkgcCke.Data = 0x10000230
Socket 0 Ch 24 - CkeLl0.Data = 0x10000080
Socket 0 Ch 24 - CkeLl1.Data = 0x10000260
Socket 0 Ch 24 - CkeLl2.Data = 0x10000230
Socket 0 Ch 24 - CkeLl3.Data = 0x10000230
Socket 0 Ch 24 - PkgcCke.Data = 0x10000230
LpModePmControlN0.Data Original = 0x8806C
LpModePmControlN0.Data Original = 0x8806C
LpModePmControlN1.Data Original = 0x0
LpModePmControlN1.Data Original = 0x0
LpModePmControlN0.Data New = 0xC3F4206B
LpModePmControlN0.Data New = 0xC3F4206B
LpModePmControlN1.Data New = 0x87
LpModePmControlN1.Data New = 0x87
N1.C24: HBM Tcrftp.t_rfc = 0xA for density 0x00000001
N0.C24: HBM Tcrftp.t_rfc = 0xA for density 0x00000000
Socket 1 Ch 25 - CkeLl0.Data = 0x10000080
Socket 1 Ch 25 - CkeLl1.Data = 0x10000260
Socket 1 Ch 25 - CkeLl2.Data = 0x10000230
Socket 1 Ch 25 - CkeLl3.Data = 0x10000230
Socket 1 Ch 25 - PkgcCke.Data = 0x10000230
Socket 0 Ch 25 - CkeLl0.Data = 0x10000080
Socket 0 Ch 25 - CkeLl1.Data = 0x10000260
Socket 0 Ch 25 - CkeLl2.Data = 0x10000230
Socket 0 Ch 25 - CkeLl3.Data = 0x10000230
Socket 0 Ch 25 - PkgcCke.Data = 0x10000230
LpModePmControlN0.Data Original = 0x8806C
LpModePmControlN0.Data Original = 0x8806C
LpModePmControlN1.Data Original = 0x0
LpModePmControlN1.Data Original = 0x0
LpModePmControlN0.Data New = 0xC3F4206B
LpModePmControlN0.Data New = 0xC3F4206B
LpModePmControlN1.Data New = 0x87
LpModePmControlN1.Data New = 0x87
N1.C25: HBM Tcrftp.t_rfc = 0xA for density 0x00000001
N0.C25: HBM Tcrftp.t_rfc = 0xA for density 0x00000000
Socket 1 Ch 26 - CkeLl0.Data = 0x10000080
Socket 1 Ch 26 - CkeLl1.Data = 0x10000260
Socket 1 Ch 26 - CkeLl2.Data = 0x10000230
Socket 1 Ch 26 - CkeLl3.Data = 0x10000230
Socket 1 Ch 26 - PkgcCke.Data = 0x10000230
Socket 0 Ch 26 - CkeLl0.Data = 0x10000080
Socket 0 Ch 26 - CkeLl1.Data = 0x10000260
Socket 0 Ch 26 - CkeLl2.Data = 0x10000230
Socket 0 Ch 26 - CkeLl3.Data = 0x10000230
Socket 0 Ch 26 - PkgcCke.Data = 0x10000230
LpModePmControlN0.Data Original = 0x8806C
LpModePmControlN0.Data Original = 0x8806C
LpModePmControlN1.Data Original = 0x0
LpModePmControlN1.Data Original = 0x0
LpModePmControlN0.Data New = 0xC3F4206B
LpModePmControlN0.Data New = 0xC3F4206B
LpModePmControlN1.Data New = 0x87
LpModePmControlN1.Data New = 0x87
N1.C26: HBM Tcrftp.t_rfc = 0xA for density 0x00000001
N0.C26: HBM Tcrftp.t_rfc = 0xA for density 0x00000000
Socket 1 Ch 27 - CkeLl0.Data = 0x10000080
Socket 1 Ch 27 - CkeLl1.Data = 0x10000260
Socket 1 Ch 27 - CkeLl2.Data = 0x10000230
Socket 1 Ch 27 - CkeLl3.Data = 0x10000230
Socket 1 Ch 27 - PkgcCke.Data = 0x10000230
Socket 0 Ch 27 - CkeLl0.Data = 0x10000080
Socket 0 Ch 27 - CkeLl1.Data = 0x10000260
Socket 0 Ch 27 - CkeLl2.Data = 0x10000230
Socket 0 Ch 27 - CkeLl3.Data = 0x10000230
Socket 0 Ch 27 - PkgcCke.Data = 0x10000230
LpModePmControlN0.Data Original = 0x8806C
LpModePmControlN0.Data Original = 0x8806C
LpModePmControlN1.Data Original = 0x0
LpModePmControlN1.Data Original = 0x0
LpModePmControlN0.Data New = 0xC3F4206B
LpModePmControlN0.Data New = 0xC3F4206B
LpModePmControlN1.Data New = 0x87
LpModePmControlN1.Data New = 0x87
N1.C27: HBM Tcrftp.t_rfc = 0xA for density 0x00000001
N0.C27: HBM Tcrftp.t_rfc = 0xA for density 0x00000000
Socket 1 Ch 28 - CkeLl0.Data = 0x10000080
Socket 1 Ch 28 - CkeLl1.Data = 0x10000260
Socket 1 Ch 28 - CkeLl2.Data = 0x10000230
Socket 1 Ch 28 - CkeLl3.Data = 0x10000230
Socket 1 Ch 28 - PkgcCke.Data = 0x10000230
Socket 0 Ch 28 - CkeLl0.Data = 0x10000080
Socket 0 Ch 28 - CkeLl1.Data = 0x10000260
Socket 0 Ch 28 - CkeLl2.Data = 0x10000230
Socket 0 Ch 28 - CkeLl3.Data = 0x10000230
Socket 0 Ch 28 - PkgcCke.Data = 0x10000230
LpModePmControlN0.Data Original = 0x8806C
LpModePmControlN0.Data Original = 0x8806C
LpModePmControlN1.Data Original = 0x0
LpModePmControlN1.Data Original = 0x0
LpModePmControlN0.Data New = 0xC3F4206B
LpModePmControlN0.Data New = 0xC3F4206B
LpModePmControlN1.Data New = 0x87
LpModePmControlN1.Data New = 0x87
N1.C28: HBM Tcrftp.t_rfc = 0xA for density 0x00000001
N0.C28: HBM Tcrftp.t_rfc = 0xA for density 0x00000000
Socket 1 Ch 29 - CkeLl0.Data = 0x10000080
Socket 1 Ch 29 - CkeLl1.Data = 0x10000260
Socket 1 Ch 29 - CkeLl2.Data = 0x10000230
Socket 1 Ch 29 - CkeLl3.Data = 0x10000230
Socket 1 Ch 29 - PkgcCke.Data = 0x10000230
Socket 0 Ch 29 - CkeLl0.Data = 0x10000080
Socket 0 Ch 29 - CkeLl1.Data = 0x10000260
Socket 0 Ch 29 - CkeLl2.Data = 0x10000230
Socket 0 Ch 29 - CkeLl3.Data = 0x10000230
Socket 0 Ch 29 - PkgcCke.Data = 0x10000230
LpModePmControlN0.Data Original = 0x8806C
LpModePmControlN0.Data Original = 0x8806C
LpModePmControlN1.Data Original = 0x0
LpModePmControlN1.Data Original = 0x0
LpModePmControlN0.Data New = 0xC3F4206B
LpModePmControlN0.Data New = 0xC3F4206B
LpModePmControlN1.Data New = 0x87
LpModePmControlN1.Data New = 0x87
N1.C29: HBM Tcrftp.t_rfc = 0xA for density 0x00000001
N0.C29: HBM Tcrftp.t_rfc = 0xA for density 0x00000000
Socket 1 Ch 30 - CkeLl0.Data = 0x10000080
Socket 1 Ch 30 - CkeLl1.Data = 0x10000260
Socket 1 Ch 30 - CkeLl2.Data = 0x10000230
Socket 1 Ch 30 - CkeLl3.Data = 0x10000230
Socket 1 Ch 30 - PkgcCke.Data = 0x10000230
Socket 0 Ch 30 - CkeLl0.Data = 0x10000080
Socket 0 Ch 30 - CkeLl1.Data = 0x10000260
Socket 0 Ch 30 - CkeLl2.Data = 0x10000230
Socket 0 Ch 30 - CkeLl3.Data = 0x10000230
Socket 0 Ch 30 - PkgcCke.Data = 0x10000230
LpModePmControlN0.Data Original = 0x8806C
LpModePmControlN0.Data Original = 0x8806C
LpModePmControlN1.Data Original = 0x0
LpModePmControlN1.Data Original = 0x0
LpModePmControlN0.Data New = 0xC3F4206B
LpModePmControlN0.Data New = 0xC3F4206B
LpModePmControlN1.Data New = 0x87
LpModePmControlN1.Data New = 0x87
N1.C30: HBM Tcrftp.t_rfc = 0xA for density 0x00000001
N0.C30: HBM Tcrftp.t_rfc = 0xA for density 0x00000000
Socket 1 Ch 31 - CkeLl0.Data = 0x10000080
Socket 1 Ch 31 - CkeLl1.Data = 0x10000260
Socket 1 Ch 31 - CkeLl2.Data = 0x10000230
Socket 1 Ch 31 - CkeLl3.Data = 0x10000230
Socket 1 Ch 31 - PkgcCke.Data = 0x10000230
Socket 0 Ch 31 - CkeLl0.Data = 0x10000080
Socket 0 Ch 31 - CkeLl1.Data = 0x10000260
Socket 0 Ch 31 - CkeLl2.Data = 0x10000230
Socket 0 Ch 31 - CkeLl3.Data = 0x10000230
Socket 0 Ch 31 - PkgcCke.Data = 0x10000230
LpModePmControlN0.Data Original = 0x8806C
LpModePmControlN0.Data Original = 0x8806C
LpModePmControlN1.Data Original = 0x0
LpModePmControlN1.Data Original = 0x0
LpModePmControlN0.Data New = 0xC3F4206B
LpModePmControlN0.Data New = 0xC3F4206B
LpModePmControlN1.Data New = 0x87
LpModePmControlN1.Data New = 0x87
N1.C31: HBM Tcrftp.t_rfc = 0xA for density 0x00000001
N0.C31: HBM Tcrftp.t_rfc = 0xA for density 0x00000000
[ScktId: 1] HBM Post-Training - 2817ms
[ScktId: 0] HBM Post-Training - 2819ms
[ScktId: 1] MemTest -- Started
[ScktId: 0] MemTest -- Started
N1: MemTestScram Starts
N0: MemTestScram Starts
...N1:
MemTestScram TestType 10 Ends
.TestType 10 Latency = 2 sec
N0:
MemTestScram TestType 10 Ends
[ScktId: 1] MemTest - 2031ms
TestType 10 Latency = 2 sec
[ScktId: 1] Pipe Sync AP Final Error Sync -- Started
[ScktId: 0] MemTest - 2036ms
[ScktId: 0] Pipe Sync AP Final Error Sync -- Started
[ScktId: 0] Pipe Sync AP Final Error Sync - 5ms
[ScktId: 1] Pipe Sync AP Final Error Sync - 16ms
[ScktId: 0] Late Configuration -- Started
[ScktId: 1] Late Configuration -- Started
S0 TME CPUID = 1
S1 TME CPUID = 1
S0 TmeActivated = 0
S1 TmeActivated = 0
S0 TME CPUID = 1
S1 TME CPUID = 1
S0 TmeActivated = 0
S1 TmeActivated = 0
S0 TME CPUID = 1
S1 TME CPUID = 1
S0 TmeActivated = 0
S1 TmeActivated = 0
S0 TME CPUID = 1
S1 TME CPUID = 1
S0 TmeActivated = 0
S1 TmeActivated = 0
[ScktId: 0] Late Configuration - 41ms
[ScktId: 1] Late Configuration - 38ms
[ScktId: 0] Initialize Memory RAS before refresh enable -- Started
[ScktId: 1] Initialize Memory RAS before refresh enable -- Started
[ScktId: 0] Initialize Memory RAS before refresh enable - 12ms
[ScktId: 1] Initialize Memory RAS before refresh enable - 15ms
[ScktId: 0] Initialize Throttling -- Started
[ScktId: 1] Initialize Throttling -- Started
Data received from mailbox: 0x20000002
N0: McId = 0, VR SVID = 10
N0: McId = 1, VR SVID = 10
N0: McId = 2, VR SVID = 10
N0: McId = 3, VR SVID = 10
Data received from mailbox: 0x20000002
N1: McId = 0, VR SVID = 10
N1: McId = 1, VR SVID = 10
N1: McId = 2, VR SVID = 10
N1: McId = 3, VR SVID = 10
[ScktId: 0] Initialize Throttling - 31ms
[ScktId: 1] Initialize Throttling - 40ms
[ScktId: 0] Publish ACTM DIMM Manifest -- Started
[ScktId: 1] Publish ACTM DIMM Manifest -- Started
[ScktId: 0] Publish ACTM DIMM Manifest - 14ms
[ScktId: 1] Publish ACTM DIMM Manifest - 10ms
[ScktId: 0] Setup SVL and Scrambling -- Started
[ScktId: 1] Setup SVL and Scrambling -- Started
[ScktId: 0] Setup SVL and Scrambling - 9ms
[ScktId: 1] Setup SVL and Scrambling - 9ms
N1 Checked into Pipe
[ScktId: 0] Mem ALIAS Check -- Started
[ScktId: 0] Mem ALIAS Check - 6ms
[ScktId: 1] Switch to Cpgc Out Of Order Mode -- Started
[ScktId: 0] Switch to Cpgc Out Of Order Mode -- Started
[ScktId: 1] Switch to Cpgc Out Of Order Mode - 5ms
[ScktId: 0] Switch to Cpgc Out Of Order Mode - 11ms
[ScktId: 1] Enable Host Refresh -- Started
[ScktId: 0] Enable Host Refresh -- Started
C00: REFRESH_SYNC_TIME_PerCh= 7800
C00: REFRESH_SYNC_TIME_PerCh= 7800
C02: REFRESH_SYNC_TIME_PerCh= 7800
C02: REFRESH_SYNC_TIME_PerCh= 7800
C04: REFRESH_SYNC_TIME_PerCh= 7800
C04: REFRESH_SYNC_TIME_PerCh= 7800
C06: REFRESH_SYNC_TIME_PerCh= 7800
C06: REFRESH_SYNC_TIME_PerCh= 7800
C00: HostRefreshStartTime= 7800
C00: HostRefreshStartTime= 7800
C02: HostRefreshStartTime= 7754
C02: HostRefreshStartTime= 7746
C04: HostRefreshStartTime= 7774
C04: HostRefreshStartTime= 7757
C06: HostRefreshStartTime= 7739
C06: HostRefreshStartTime= 7750
EnableHostRefresh Start Write Time diff[2]=437 ns
EnableHostRefresh Start Write Time diff[2]=284 ns
EnableHostRefresh Start Write Time diff[4]=518 ns
EnableHostRefresh Start Write Time diff[4]=347 ns
EnableHostRefresh Start Write Time diff[6]=621 ns
EnableHostRefresh Start Write Time diff[6]=567 ns
[ScktId: 1] Enable Host Refresh - 92ms
[ScktId: 0] Enable Host Refresh - 91ms
[ScktId: 1] MemInit -- Started
[ScktId: 0] MemInit -- Started
.[ScktId: 1] MemInit - 1221ms
.[ScktId: 1] HBM Mem Test -- Started
[ScktId: 0] MemInit - 1220ms
SetCpgcCurrentTechType: MemTechType = 1
[ScktId: 0] HBM Mem Test -- Started
SetCpgcCurrentTechType: MemTechType = 1
...TestType 10 Latency = 0 sec
.TestType 10 Latency = 0 sec
...TestType 10 Latency = 0 sec
.TestType 10 Latency = 0 sec
...TestType 10 Latency = 0 sec
.TestType 10 Latency = 0 sec
...TestType 10 Latency = 0 sec
SetCpgcCurrentTechType: MemTechType = 0
.[ScktId: 1] HBM Mem Test - 1187ms
TestType 10 Latency = 0 sec
[ScktId: 1] HBM Setup Scrambling -- Started
SetCpgcCurrentTechType: MemTechType = 0
[ScktId: 1] HBM Setup Scrambling - 7ms
[ScktId: 0] HBM Mem Test - 1195ms
[ScktId: 1] AP HBM Information -- Started
[ScktId: 0] HBM Setup Scrambling -- Started
[ScktId: 0] HBM Setup Scrambling - 8ms
[ScktId: 0] AP HBM Information -- Started
[ScktId: 0] AP HBM Information - 5ms
[ScktId: 1] AP HBM Information - 21ms
N1 Checked into Pipe
[ScktId: 0] HBM Fault Resilient Boot -- Started
[ScktId: 0] HBM Fault Resilient Boot - 6ms
N1 Checked into Pipe
[ScktId: 0] HBM Reset System -- Started
[ScktId: 0] HBM Reset System - 6ms
[ScktId: 1] SBSP HBM Information -- Started
[ScktId: 0] SBSP HBM Information -- Started
[ScktId: 1] SBSP HBM Information - 9ms
[ScktId: 0] SBSP HBM Information - 9ms
[ScktId: 1] HBM Mem Init -- Started
[ScktId: 0] HBM Mem Init -- Started
SetCpgcCurrentTechType: MemTechType = 1
SetCpgcCurrentTechType: MemTechType = 1
.TestType 9 Latency = 0 sec
SetCpgcCurrentTechType: MemTechType = 0
.[ScktId: 1] HBM Mem Init - 706ms
TestType 9 Latency = 0 sec
[ScktId: 1] Pipe Sync AP NVRAM Data -- Started
SetCpgcCurrentTechType: MemTechType = 0
[ScktId: 0] HBM Mem Init - 716ms
[ScktId: 0] Pipe Sync AP NVRAM Data -- Started
[ScktId: 0] Pipe Sync AP NVRAM Data - 17ms
[ScktId: 1] Pipe Sync AP NVRAM Data - 32ms
N1 Checked into Pipe
[ScktId: 0] Check Memory Topology -- Started
GetPorTablePtr - Using SPR HBM Matrix
[ScktId: 0] Check Memory Topology - 10ms
[ScktId: 1] Pipe Sync AP Final Error Sync -- Started
[ScktId: 0] Pipe Sync AP Final Error Sync -- Started
[ScktId: 1] Pipe Sync AP Final Error Sync - 10ms
[ScktId: 0] Pipe Sync AP Final Error Sync - 10ms
N1 Checked into Pipe
[ScktId: 0] Check Ras Support After MemInit -- Started
[ScktId: 0] Check Ras Support After MemInit - 7ms
N1 Checked into Pipe
[ScktId: 0] Initialize Memory Map -- Started
N0.C00.D0: Memory Found!
N0.C02.D0: Memory Found!
N0.C04.D0: Memory Found!
N0.C06.D0: Memory Found!
N1.C00.D0: Memory Found!
N1.C02.D0: Memory Found!
N1.C04.D0: Memory Found!
N1.C06.D0: Memory Found!
sizeof (MEMORY_MAP_HOST) = 66360
***BEGIN MEMORY MAPPING***
mmiohbasefrom setup: 2000 MMIOH base = 80000 (64mb)
Silicon capability does not support persistent modes, forcing to non-persistent mode.
Silicon capability does not support persistent modes, forcing to non-persistent mode.
PMem mgmt Driver is available..
CXL: Socket 0 Stack 0, CXL device not found
CXL: Socket 0 Stack 1, CXL device not found
CXL: Socket 0 Stack 2, CXL device not found
CXL: Socket 0 Stack 3, CXL device not found
CXL: Socket 0 Stack 4, CXL device not found
CXL: Socket 0 Stack 5, CXL device not found
CXL: Socket 0 Stack 6, CXL device not found
CXL: Socket 0 Stack 7, CXL device not found
CXL: Socket 1 Stack 0, CXL device not found
CXL: Socket 1 Stack 1, CXL device not found
CXL: Socket 1 Stack 2, CXL device not found
CXL: Socket 1 Stack 3, CXL device not found
CXL: Socket 1 Stack 4, CXL device not found
CXL: Socket 1 Stack 5, CXL device not found
CXL: Socket 1 Stack 6, CXL device not found
CXL: Socket 1 Stack 7, CXL device not found
N0: HBM: MemSizePerStack: 0x100 (64MB), StackValidBitMask: 0xF
N0: Hbm size = 1024
N1: HBM: MemSizePerStack: 0x100 (64MB), StackValidBitMask: 0xF
N1: Hbm size = 1024
Total Hbm size = 2048
N0.C00.D0.R0: ranksize = 200, NVranksize = 0 (rank enabled)
N0.C02.D0.R0: ranksize = 200, NVranksize = 0 (rank enabled)
N0.C04.D0.R0: ranksize = 200, NVranksize = 0 (rank enabled)
N0.C06.D0.R0: ranksize = 200, NVranksize = 0 (rank enabled)
N1.C00.D0.R0: ranksize = 200, NVranksize = 0 (rank enabled)
N1.C02.D0.R0: ranksize = 200, NVranksize = 0 (rank enabled)
N1.C04.D0.R0: ranksize = 200, NVranksize = 0 (rank enabled)
N1.C06.D0.R0: ranksize = 200, NVranksize = 0 (rank enabled)
N0: Total mem size = 2048; mem size = 2048; per size = 0
N1: Total mem size = 4096; mem size = 2048; per size = 0
^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^
Platform DIMM Configuration(num_chunks(chunk_size))
^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^
Socket : 0
Channel : 0 DDR Size : 512(64MB) PMem volatile Size : 0(64MB) PMem non volatile Size : 0(64MB) NVDIMM-N Memory Size : 0(64MB)
Channel : 1 DDR Size : 0(64MB) PMem volatile Size : 0(64MB) PMem non volatile Size : 0(64MB) NVDIMM-N Memory Size : 0(64MB)
Channel : 2 DDR Size : 512(64MB) PMem volatile Size : 0(64MB) PMem non volatile Size : 0(64MB) NVDIMM-N Memory Size : 0(64MB)
Channel : 3 DDR Size : 0(64MB) PMem volatile Size : 0(64MB) PMem non volatile Size : 0(64MB) NVDIMM-N Memory Size : 0(64MB)
Channel : 4 DDR Size : 512(64MB) PMem volatile Size : 0(64MB) PMem non volatile Size : 0(64MB) NVDIMM-N Memory Size : 0(64MB)
Channel : 5 DDR Size : 0(64MB) PMem volatile Size : 0(64MB) PMem non volatile Size : 0(64MB) NVDIMM-N Memory Size : 0(64MB)
Channel : 6 DDR Size : 512(64MB) PMem volatile Size : 0(64MB) PMem non volatile Size : 0(64MB) NVDIMM-N Memory Size : 0(64MB)
Channel : 7 DDR Size : 0(64MB) PMem volatile Size : 0(64MB) PMem non volatile Size : 0(64MB) NVDIMM-N Memory Size : 0(64MB)
Socket : 1
Channel : 0 DDR Size : 512(64MB) PMem volatile Size : 0(64MB) PMem non volatile Size : 0(64MB) NVDIMM-N Memory Size : 0(64MB)
Channel : 1 DDR Size : 0(64MB) PMem volatile Size : 0(64MB) PMem non volatile Size : 0(64MB) NVDIMM-N Memory Size : 0(64MB)
Channel : 2 DDR Size : 512(64MB) PMem volatile Size : 0(64MB) PMem non volatile Size : 0(64MB) NVDIMM-N Memory Size : 0(64MB)
Channel : 3 DDR Size : 0(64MB) PMem volatile Size : 0(64MB) PMem non volatile Size : 0(64MB) NVDIMM-N Memory Size : 0(64MB)
Channel : 4 DDR Size : 512(64MB) PMem volatile Size : 0(64MB) PMem non volatile Size : 0(64MB) NVDIMM-N Memory Size : 0(64MB)
Channel : 5 DDR Size : 0(64MB) PMem volatile Size : 0(64MB) PMem non volatile Size : 0(64MB) NVDIMM-N Memory Size : 0(64MB)
Channel : 6 DDR Size : 512(64MB) PMem volatile Size : 0(64MB) PMem non volatile Size : 0(64MB) NVDIMM-N Memory Size : 0(64MB)
Channel : 7 DDR Size : 0(64MB) PMem volatile Size : 0(64MB) PMem non volatile Size : 0(64MB) NVDIMM-N Memory Size : 0(64MB)
N0: Memory population doesn't support SGX
System Memory Population doesn't support SGX
CollectCpuPrmSizeBitmap BEGIN
CollectCpuPrmSizeBitmap ProtectedMemValidBitMask = 0x000000FFF0000000
tCollectCpuPrmSizeBitmap END
SGX Status 0 PrmrrSize 0
PrmrrCountRequested 8 PrmrrCountPerPackage 4
Value set for Channel Interleave to 3
Value set for Imc Interleave to 4
Checkpoint Code: Socket 0, 0xBB, 0x03, 0x0000
N0: Map 2LM (HBM/DDR)
N0: Map 2LM (HBM/DDR)
N0: Map 2LM (HBM/DDR)
N0: Map 2LM (HBM/DDR)
N0: ClusterId 0 SadCount = 2
N0: ClusterId 1 SadCount = 1
N0: ClusterId 2 SadCount = 1
N0: ClusterId 3 SadCount = 1
N0: Adding NXM at ClusterId 1 SadIndex 17
N0: Adding NXM at ClusterId 2 SadIndex 33
N0: Adding NXM at ClusterId 3 SadIndex 49
N1: Map 2LM (HBM/DDR)
N1: Map 2LM (HBM/DDR)
N1: Map 2LM (HBM/DDR)
N1: Map 2LM (HBM/DDR)
N1: ClusterId 0 SadCount = 1
N1: ClusterId 1 SadCount = 1
N1: ClusterId 2 SadCount = 1
N1: ClusterId 3 SadCount = 1
N0: Not an FPGA Socket
N1: Not an FPGA Socket
N2: Not an FPGA Socket
N3: Not an FPGA Socket
AdjustMemAddrMapForMirror: In the function
N0:
Mirroring population not met
Checkpoint Code: Socket 0, 0xBB, 0x04, 0x0000
HBM: CreateHbmTadRules
Checkpoint Code: Socket 0, 0xBB, 0x05, 0x0000
PMem mgmt Driver is available..
CXL: Socket 0 Stack 0, CXL device not found
CXL: Socket 0 Stack 1, CXL device not found
CXL: Socket 0 Stack 2, CXL device not found
CXL: Socket 0 Stack 3, CXL device not found
CXL: Socket 0 Stack 4, CXL device not found
CXL: Socket 0 Stack 5, CXL device not found
CXL: Socket 0 Stack 6, CXL device not found
CXL: Socket 0 Stack 7, CXL device not found
CXL: Socket 1 Stack 0, CXL device not found
CXL: Socket 1 Stack 1, CXL device not found
CXL: Socket 1 Stack 2, CXL device not found
CXL: Socket 1 Stack 3, CXL device not found
CXL: Socket 1 Stack 4, CXL device not found
CXL: Socket 1 Stack 5, CXL device not found
CXL: Socket 1 Stack 6, CXL device not found
CXL: Socket 1 Stack 7, CXL device not found
N0: HBM: MemSizePerStack: 0x100 (64MB), StackValidBitMask: 0xF
N0: Hbm size = 1024
N1: HBM: MemSizePerStack: 0x100 (64MB), StackValidBitMask: 0xF
N1: Hbm size = 1024
Total Hbm size = 2048
N0.C00.D0.R0: ranksize = 200, NVranksize = 0 (rank enabled)
N0.C02.D0.R0: ranksize = 200, NVranksize = 0 (rank enabled)
N0.C04.D0.R0: ranksize = 200, NVranksize = 0 (rank enabled)
N0.C06.D0.R0: ranksize = 200, NVranksize = 0 (rank enabled)
N1.C00.D0.R0: ranksize = 200, NVranksize = 0 (rank enabled)
N1.C02.D0.R0: ranksize = 200, NVranksize = 0 (rank enabled)
N1.C04.D0.R0: ranksize = 200, NVranksize = 0 (rank enabled)
N1.C06.D0.R0: ranksize = 200, NVranksize = 0 (rank enabled)
N0: Total mem size = 2048; mem size = 2048; per size = 0
N1: Total mem size = 4096; mem size = 2048; per size = 0
N0: Memory population doesn't support SGX
System Memory Population doesn't support SGX
CollectCpuPrmSizeBitmap BEGIN
CollectCpuPrmSizeBitmap ProtectedMemValidBitMask = 0x000000FFF0000000
tCollectCpuPrmSizeBitmap END
SGX Status 0 PrmrrSize 0
PrmrrCountRequested 8 PrmrrCountPerPackage 4
Value set for Channel Interleave to 3
Value set for Imc Interleave to 4
Checkpoint Code: Socket 0, 0xBB, 0x03, 0x0000
N0: Map 2LM (HBM/DDR)
N0: Map 2LM (HBM/DDR)
N0: Map 2LM (HBM/DDR)
N0: Map 2LM (HBM/DDR)
N0: ClusterId 0 SadCount = 2
N0: ClusterId 1 SadCount = 1
N0: ClusterId 2 SadCount = 1
N0: ClusterId 3 SadCount = 1
N0: Adding NXM at ClusterId 1 SadIndex 17
N0: Adding NXM at ClusterId 2 SadIndex 33
N0: Adding NXM at ClusterId 3 SadIndex 49
N1: Map 2LM (HBM/DDR)
N1: Map 2LM (HBM/DDR)
N1: Map 2LM (HBM/DDR)
N1: Map 2LM (HBM/DDR)
N1: ClusterId 0 SadCount = 1
N1: ClusterId 1 SadCount = 1
N1: ClusterId 2 SadCount = 1
N1: ClusterId 3 SadCount = 1
N0: Not an FPGA Socket
N1: Not an FPGA Socket
N2: Not an FPGA Socket
N3: Not an FPGA Socket
AdjustMemAddrMapForMirror: In the function
N0:
Mirroring population not met
Checkpoint Code: Socket 0, 0xBB, 0x04, 0x0000
HBM: CreateHbmTadRules
Checkpoint Code: Socket 0, 0xBB, 0x05, 0x0000
********SAD table for socket 0*******
Type Base Limit Ways McIntBitmap ChIntBitmap[MC00] FmChIntBitmap[MC00] ChIntBitmap[MC01] FmChIntBitmap[MC01] ChIntBitmap[MC02] FmChIntBitmap[MC02] ChIntBitmap[MC03] FmChIntBitmap[MC03] Granularity Tgtgranularity Attr Cluster
HBM 2LM DDR 0x00000 0x00040 1 1 3 1 3 0 3 0 3 0 1 1 3 0
HBM 2LM DDR 0x00040 0x00220 1 1 3 1 3 0 3 0 3 0 1 1 3 0
HBM 2LM DDR 0x00220 0x00420 1 2 3 0 3 1 3 0 3 0 1 1 3 1
NXM 0x00420 0x00420 0 0 0 0 0 0 0 0 0 0 0 0 0 1
HBM 2LM DDR 0x00420 0x00620 1 4 3 0 3 0 3 1 3 0 1 1 3 2
NXM 0x00620 0x00620 0 0 0 0 0 0 0 0 0 0 0 0 0 2
HBM 2LM DDR 0x00620 0x00820 1 8 3 0 3 0 3 0 3 1 1 1 3 3
NXM 0x00820 0x00820 0 0 0 0 0 0 0 0 0 0 0 0 0 3
<<SAD Interleave List>>
1 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0
1 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0
0 1 0 0 0 0 0 0 0 0 0 0 0 0 0 0
0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0
0 0 1 0 0 0 0 0 0 0 0 0 0 0 0 0
0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0
0 0 0 1 0 0 0 0 0 0 0 0 0 0 0 0
0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0
********SAD table for socket 1*******
Type Base Limit Ways McIntBitmap ChIntBitmap[MC00] FmChIntBitmap[MC00] ChIntBitmap[MC01] FmChIntBitmap[MC01] ChIntBitmap[MC02] FmChIntBitmap[MC02] ChIntBitmap[MC03] FmChIntBitmap[MC03] Granularity Tgtgranularity Attr Cluster
HBM 2LM DDR 0x00820 0x00A20 1 1 3 1 3 0 3 0 3 0 1 1 3 0
HBM 2LM DDR 0x00A20 0x00C20 1 2 3 0 3 1 3 0 3 0 1 1 3 1
HBM 2LM DDR 0x00C20 0x00E20 1 4 3 0 3 0 3 1 3 0 1 1 3 2
HBM 2LM DDR 0x00E20 0x01020 1 8 3 0 3 0 3 0 3 1 1 1 3 3
<<SAD Interleave List>>
0 0 0 0 1 0 0 0 0 0 0 0 0 0 0 0
0 0 0 0 0 1 0 0 0 0 0 0 0 0 0 0
0 0 0 0 0 0 1 0 0 0 0 0 0 0 0 0
0 0 0 0 0 0 0 1 0 0 0 0 0 0 0 0
</SADTable>
*******TAD Table for socket 0 Mc 0*******
Enable SadID Limit SktWays TargetGran ChGran NmTadIndex FmTadIndex
1 0 0x00020 1 1 1 0 0
1 1 0x00220 1 1 1 0 0
</TADTable>
*******TAD Table for socket 0 Mc 1*******
Enable SadID Limit SktWays TargetGran ChGran NmTadIndex FmTadIndex
1 16 0x00420 1 1 1 0 0
</TADTable>
*******TAD Table for socket 0 Mc 2*******
Enable SadID Limit SktWays TargetGran ChGran NmTadIndex FmTadIndex
1 32 0x00620 1 1 1 0 0
</TADTable>
*******TAD Table for socket 0 Mc 3*******
Enable SadID Limit SktWays TargetGran ChGran NmTadIndex FmTadIndex
1 48 0x00820 1 1 1 0 0
</TADTable>
*******TAD Table for Socket 0 Stack 0*******
Enable SadID Limit SktWays TargetGran ChGran
1 0 0x00000 1 1 1
</TADTable>
*******TAD Table for Socket 0 Stack 1*******
Enable SadID Limit SktWays TargetGran ChGran
1 16 0x00000 1 1 1
</TADTable>
*******TAD Table for Socket 0 Stack 2*******
Enable SadID Limit SktWays TargetGran ChGran
1 32 0x00000 1 1 1
</TADTable>
*******TAD Table for Socket 0 Stack 3*******
Enable SadID Limit SktWays TargetGran ChGran
1 48 0x00000 1 1 1
</TADTable>
*******TAD Table for socket 1 Mc 0*******
Enable SadID Limit SktWays TargetGran ChGran NmTadIndex FmTadIndex
1 0 0x00A20 1 1 1 0 0
</TADTable>
*******TAD Table for socket 1 Mc 1*******
Enable SadID Limit SktWays TargetGran ChGran NmTadIndex FmTadIndex
1 16 0x00C20 1 1 1 0 0
</TADTable>
*******TAD Table for socket 1 Mc 2*******
Enable SadID Limit SktWays TargetGran ChGran NmTadIndex FmTadIndex
1 32 0x00E20 1 1 1 0 0
</TADTable>
*******TAD Table for socket 1 Mc 3*******
Enable SadID Limit SktWays TargetGran ChGran NmTadIndex FmTadIndex
1 48 0x01020 1 1 1 0 0
</TADTable>
*******TAD Table for Socket 1 Stack 0*******
Enable SadID Limit SktWays TargetGran ChGran
1 0 0x00000 1 1 1
</TADTable>
*******TAD Table for Socket 1 Stack 1*******
Enable SadID Limit SktWays TargetGran ChGran
1 16 0x00000 1 1 1
</TADTable>
*******TAD Table for Socket 1 Stack 2*******
Enable SadID Limit SktWays TargetGran ChGran
1 32 0x00000 1 1 1
</TADTable>
*******TAD Table for Socket 1 Stack 3*******
Enable SadID Limit SktWays TargetGran ChGran
1 48 0x00000 1 1 1
</TADTable>
Checkpoint Code: Socket 0, 0xBB, 0x06, 0x0000
^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^
Write CHA Remote SAD CSRs for Socket: 0
^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^
En Base Limit NodeId Attr
1 0x00820 0x0101F 0x1 0x3
^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^
Write CHA SAD CSRs for Socket: 0
^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^
CHA unlock DRAM cluster 0 snc_lock bits: 0xE
Program Channel Interleaves
rt0_interleave_mode: 7
rt1_interleave_shift: 7
rt2_interleave_shift: 2
Program CSRs for SAD Rule 0 (HBM 2LM DDR)
En Limit Mode Attr NMCacheable
1 0x0003F 0x1 0x3 1
Interleave List: 0x0000000088888888
Single Target: H0 Index 0
DRAM_RULE_CFG2: cxl_accelerator_mem Durable_mem_en cxl_mem_expander NXM
0 0 0 0
TgtRt: 00 ChnRt: 00
Program CSRs for SAD Rule 1 (HBM 2LM DDR)
En Limit Mode Attr NMCacheable
1 0x0021F 0x1 0x3 1
Interleave List: 0x0000000088888888
Single Target: H0 Index 0
DRAM_RULE_CFG2: cxl_accelerator_mem Durable_mem_en cxl_mem_expander NXM
0 0 0 0
TgtRt: 00 ChnRt: 00
Program target config: 00000000
Program channel config: 00000000
Program Mode config.
H0 DramRt0Mode0Cfg: 00000036
H0 DramRt0Mode1Cfg: 00000000
H1 DramRt0Mode0Cfg: 00000000
H1 DramRt0Mode1Cfg: 00000000
H0 DramRt1Mode0Cfg: 00000000
H0 DramRt1Mode1Cfg: 00000000
H1 DramRt1Mode0Cfg: 00000000
H1 DramRt1Mode1Cfg: 00000000
H0 DramRt2Mode0Cfg: 00000000
H0 DramRt2Mode1Cfg: 00000000
H1 DramRt2Mode0Cfg: 00000000
H1 DramRt2Mode1Cfg: 00000000
CHA unlock DRAM cluster 1 snc_lock bits: 0xD
Program Channel Interleaves
rt0_interleave_mode: 7
rt1_interleave_shift: 7
rt2_interleave_shift: 2
Program CSRs for SAD Rule 0 (HBM 2LM DDR)
En Limit Mode Attr NMCacheable
1 0x0041F 0x1 0x3 1
Interleave List: 0x0000000088888888
Single Target: H0 Index 0
DRAM_RULE_CFG2: cxl_accelerator_mem Durable_mem_en cxl_mem_expander NXM
0 0 0 0
TgtRt: 00 ChnRt: 00
Program CSRs for SAD Rule 1 (NXM)
En Limit Mode Attr NMCacheable
1 0x0041F 0x0 0x0 0
Interleave List: 0xFFFFFFFFFFFFFFFF
DRAM_RULE_CFG2: cxl_accelerator_mem Durable_mem_en cxl_mem_expander NXM
0 0 0 1
Program target config: 00000000
Program channel config: 00000000
Program Mode config.
H0 DramRt0Mode0Cfg: 00000006
H0 DramRt0Mode1Cfg: 00000000
H1 DramRt0Mode0Cfg: 00000000
H1 DramRt0Mode1Cfg: 00000000
H0 DramRt1Mode0Cfg: 00000000
H0 DramRt1Mode1Cfg: 00000000
H1 DramRt1Mode0Cfg: 00000000
H1 DramRt1Mode1Cfg: 00000000
H0 DramRt2Mode0Cfg: 00000000
H0 DramRt2Mode1Cfg: 00000000
H1 DramRt2Mode0Cfg: 00000000
H1 DramRt2Mode1Cfg: 00000000
CHA unlock DRAM cluster 2 snc_lock bits: 0xB
Program Channel Interleaves
rt0_interleave_mode: 7
rt1_interleave_shift: 7
rt2_interleave_shift: 2
Program CSRs for SAD Rule 0 (HBM 2LM DDR)
En Limit Mode Attr NMCacheable
1 0x0061F 0x1 0x3 1
Interleave List: 0x0000000088888888
Single Target: H0 Index 0
DRAM_RULE_CFG2: cxl_accelerator_mem Durable_mem_en cxl_mem_expander NXM
0 0 0 0
TgtRt: 00 ChnRt: 00
Program CSRs for SAD Rule 1 (NXM)
En Limit Mode Attr NMCacheable
1 0x0061F 0x0 0x0 0
Interleave List: 0xFFFFFFFFFFFFFFFF
DRAM_RULE_CFG2: cxl_accelerator_mem Durable_mem_en cxl_mem_expander NXM
0 0 0 1
Program target config: 00000000
Program channel config: 00000000
Program Mode config.
H0 DramRt0Mode0Cfg: 00000006
H0 DramRt0Mode1Cfg: 00000000
H1 DramRt0Mode0Cfg: 00000000
H1 DramRt0Mode1Cfg: 00000000
H0 DramRt1Mode0Cfg: 00000000
H0 DramRt1Mode1Cfg: 00000000
H1 DramRt1Mode0Cfg: 00000000
H1 DramRt1Mode1Cfg: 00000000
H0 DramRt2Mode0Cfg: 00000000
H0 DramRt2Mode1Cfg: 00000000
H1 DramRt2Mode0Cfg: 00000000
H1 DramRt2Mode1Cfg: 00000000
CHA unlock DRAM cluster 3 snc_lock bits: 0x7
Program Channel Interleaves
rt0_interleave_mode: 7
rt1_interleave_shift: 7
rt2_interleave_shift: 2
Program CSRs for SAD Rule 0 (HBM 2LM DDR)
En Limit Mode Attr NMCacheable
1 0x0081F 0x1 0x3 1
Interleave List: 0x0000000088888888
Single Target: H0 Index 0
DRAM_RULE_CFG2: cxl_accelerator_mem Durable_mem_en cxl_mem_expander NXM
0 0 0 0
TgtRt: 00 ChnRt: 00
Program CSRs for SAD Rule 1 (NXM)
En Limit Mode Attr NMCacheable
1 0x0081F 0x0 0x0 0
Interleave List: 0xFFFFFFFFFFFFFFFF
DRAM_RULE_CFG2: cxl_accelerator_mem Durable_mem_en cxl_mem_expander NXM
0 0 0 1
Program target config: 00000000
Program channel config: 00000000
Program Mode config.
H0 DramRt0Mode0Cfg: 00000006
H0 DramRt0Mode1Cfg: 00000000
H1 DramRt0Mode0Cfg: 00000000
H1 DramRt0Mode1Cfg: 00000000
H0 DramRt1Mode0Cfg: 00000000
H0 DramRt1Mode1Cfg: 00000000
H1 DramRt1Mode0Cfg: 00000000
H1 DramRt1Mode1Cfg: 00000000
H0 DramRt2Mode0Cfg: 00000000
H0 DramRt2Mode1Cfg: 00000000
H1 DramRt2Mode0Cfg: 00000000
H1 DramRt2Mode1Cfg: 00000000
CHA lock all DRAM clusters snc_lock bits: 0xF
^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^
Write Route Table CSRs for Socket: 0
^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^
CSR: Cluster 0 H0_CH_ROUTE_TABLE_0 - 0x0 0x1 0x0 0x1 0x0 0x1 0x0 0x1
CSR: Cluster 0 H0_TGT_ROUTE_TABLE_0 - 0x4 0x4 0x5 0x5 0x6 0x6 0x7 0x7
CSR: Cluster 0 H1_CH_ROUTE_TABLE_0 - 0x0 0x0 0x0 0x0 0x0 0x0 0x0 0x0
CSR: Cluster 0 H1_TGT_ROUTE_TABLE_0 - 0x0 0x0 0x0 0x0 0x0 0x0 0x0 0x0
CSR: Cluster 1 H0_CH_ROUTE_TABLE_0 - 0x0 0x1 0x0 0x1 0x0 0x1 0x0 0x1
CSR: Cluster 1 H0_TGT_ROUTE_TABLE_0 - 0x4 0x4 0x5 0x5 0x6 0x6 0x7 0x7
CSR: Cluster 1 H1_CH_ROUTE_TABLE_0 - 0x0 0x0 0x0 0x0 0x0 0x0 0x0 0x0
CSR: Cluster 1 H1_TGT_ROUTE_TABLE_0 - 0x0 0x0 0x0 0x0 0x0 0x0 0x0 0x0
CSR: Cluster 2 H0_CH_ROUTE_TABLE_0 - 0x0 0x1 0x0 0x1 0x0 0x1 0x0 0x1
CSR: Cluster 2 H0_TGT_ROUTE_TABLE_0 - 0x7 0x7 0x6 0x6 0x5 0x5 0x4 0x4
CSR: Cluster 2 H1_CH_ROUTE_TABLE_0 - 0x0 0x0 0x0 0x0 0x0 0x0 0x0 0x0
CSR: Cluster 2 H1_TGT_ROUTE_TABLE_0 - 0x0 0x0 0x0 0x0 0x0 0x0 0x0 0x0
CSR: Cluster 3 H0_CH_ROUTE_TABLE_0 - 0x0 0x1 0x0 0x1 0x0 0x1 0x0 0x1
CSR: Cluster 3 H0_TGT_ROUTE_TABLE_0 - 0x7 0x7 0x6 0x6 0x5 0x5 0x4 0x4
CSR: Cluster 3 H1_CH_ROUTE_TABLE_0 - 0x0 0x0 0x0 0x0 0x0 0x0 0x0 0x0
CSR: Cluster 3 H1_TGT_ROUTE_TABLE_0 - 0x0 0x0 0x0 0x0 0x0 0x0 0x0 0x0
^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^
Write MESH2MEM CSRs for Socket: 0
^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^
Memory Controller : 0
------------------------
DEFEATURES0_M2MEM_MAIN_REG
wrcmpfromnm: 1
MODE_M2MEM_MAIN_REG
nmcaching:0x1 pmem:0x0 blockregion:0x0 in-tile caching: 0x1
Memory Controller : 1
------------------------
DEFEATURES0_M2MEM_MAIN_REG
wrcmpfromnm: 1
MODE_M2MEM_MAIN_REG
nmcaching:0x1 pmem:0x0 blockregion:0x0 in-tile caching: 0x1
Memory Controller : 2
------------------------
DEFEATURES0_M2MEM_MAIN_REG
wrcmpfromnm: 1
MODE_M2MEM_MAIN_REG
nmcaching:0x1 pmem:0x0 blockregion:0x0 in-tile caching: 0x1
Memory Controller : 3
------------------------
DEFEATURES0_M2MEM_MAIN_REG
wrcmpfromnm: 1
MODE_M2MEM_MAIN_REG
nmcaching:0x1 pmem:0x0 blockregion:0x0 in-tile caching: 0x1
MC: 0
tadid:0x0 tadvld:0x1 pmemvld:0x0 blkvld:0x0 ddr4tadid:0x0 ddrttadid:0x0 ddr4:0x1 nmcacheablevld:0x0 mirror:0x0 secondary1st:0x0 frcnpwr:0x0 spare:0x0 addresslimit[51:26]:0x1F nonpersistentfm:0x1
MC: 0
tadid:0x1 tadvld:0x1 pmemvld:0x0 blkvld:0x0 ddr4tadid:0x1 ddrttadid:0x0 ddr4:0x1 nmcacheablevld:0x0 mirror:0x0 secondary1st:0x0 frcnpwr:0x0 spare:0x0 addresslimit[51:26]:0x21F nonpersistentfm:0x1
MC: 1
tadid:0x0 tadvld:0x1 pmemvld:0x0 blkvld:0x0 ddr4tadid:0x0 ddrttadid:0x0 ddr4:0x1 nmcacheablevld:0x0 mirror:0x0 secondary1st:0x0 frcnpwr:0x0 spare:0x0 addresslimit[51:26]:0x41F nonpersistentfm:0x1
MC: 2
tadid:0x0 tadvld:0x1 pmemvld:0x0 blkvld:0x0 ddr4tadid:0x0 ddrttadid:0x0 ddr4:0x1 nmcacheablevld:0x0 mirror:0x0 secondary1st:0x0 frcnpwr:0x0 spare:0x0 addresslimit[51:26]:0x61F nonpersistentfm:0x1
MC: 3
tadid:0x0 tadvld:0x1 pmemvld:0x0 blkvld:0x0 ddr4tadid:0x0 ddrttadid:0x0 ddr4:0x1 nmcacheablevld:0x0 mirror:0x0 secondary1st:0x0 frcnpwr:0x0 spare:0x0 addresslimit[51:26]:0x81F nonpersistentfm:0x1
Programs feature registers for MC 0
Programs feature registers for MC 1
Programs feature registers for MC 2
Programs feature registers for MC 3
^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^
Write HBM MESH2MEM CSRs for Socket: 0
^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^
HBM Stack: 0
Mesh2Mem misc: nmcaching: 1 wrcmpfromnm: 1
Mesh2Mem TAD: tadid:0x0 ddrtadid:0x0 nmcacheablevld:0x1 addresslimit[51:26]:0x21F
HBM Stack: 1
Mesh2Mem misc: nmcaching: 1 wrcmpfromnm: 1
Mesh2Mem TAD: tadid:0x0 ddrtadid:0x0 nmcacheablevld:0x1 addresslimit[51:26]:0x41F
HBM Stack: 2
Mesh2Mem misc: nmcaching: 1 wrcmpfromnm: 1
Mesh2Mem TAD: tadid:0x0 ddrtadid:0x0 nmcacheablevld:0x1 addresslimit[51:26]:0x61F
HBM Stack: 3
Mesh2Mem misc: nmcaching: 1 wrcmpfromnm: 1
Mesh2Mem TAD: tadid:0x0 ddrtadid:0x0 nmcacheablevld:0x1 addresslimit[51:26]:0x81F
Programs feature registers for MC 0
N0.C00: CSR : SYSFEATURES0_MC_2LM_REG: 0x10
N0.C01: CSR : SYSFEATURES0_MC_2LM_REG: 0x10
Programs feature registers for MC 1
N0.C00: CSR : SYSFEATURES0_MC_2LM_REG: 0x10
N0.C01: CSR : SYSFEATURES0_MC_2LM_REG: 0x10
Programs feature registers for MC 2
N0.C00: CSR : SYSFEATURES0_MC_2LM_REG: 0x10
N0.C01: CSR : SYSFEATURES0_MC_2LM_REG: 0x10
Programs feature registers for MC 3
N0.C00: CSR : SYSFEATURES0_MC_2LM_REG: 0x10
N0.C01: CSR : SYSFEATURES0_MC_2LM_REG: 0x10
Programs feature registers for MC 4
N0.C00: CSR : SYSFEATURES0_MC_2LM_REG: 0x10
N0.C01: CSR : SYSFEATURES0_MC_2LM_REG: 0x10
Programs feature registers for MC 5
N0.C00: CSR : SYSFEATURES0_MC_2LM_REG: 0x10
N0.C01: CSR : SYSFEATURES0_MC_2LM_REG: 0x10
Programs feature registers for MC 6
N0.C00: CSR : SYSFEATURES0_MC_2LM_REG: 0x10
N0.C01: CSR : SYSFEATURES0_MC_2LM_REG: 0x10
Programs feature registers for MC 7
N0.C00: CSR : SYSFEATURES0_MC_2LM_REG: 0x10
N0.C01: CSR : SYSFEATURES0_MC_2LM_REG: 0x10
Programs feature registers for MC 8
N0.C00: CSR : SYSFEATURES0_MC_2LM_REG: 0x10
N0.C01: CSR : SYSFEATURES0_MC_2LM_REG: 0x10
Programs feature registers for MC 9
N0.C00: CSR : SYSFEATURES0_MC_2LM_REG: 0x10
N0.C01: CSR : SYSFEATURES0_MC_2LM_REG: 0x10
Programs feature registers for MC 10
N0.C00: CSR : SYSFEATURES0_MC_2LM_REG: 0x10
N0.C01: CSR : SYSFEATURES0_MC_2LM_REG: 0x10
Programs feature registers for MC 11
N0.C00: CSR : SYSFEATURES0_MC_2LM_REG: 0x10
N0.C01: CSR : SYSFEATURES0_MC_2LM_REG: 0x10
Programs feature registers for MC 12
N0.C00: CSR : SYSFEATURES0_MC_2LM_REG: 0x10
N0.C01: CSR : SYSFEATURES0_MC_2LM_REG: 0x10
Programs feature registers for MC 13
N0.C00: CSR : SYSFEATURES0_MC_2LM_REG: 0x10
N0.C01: CSR : SYSFEATURES0_MC_2LM_REG: 0x10
Programs feature registers for MC 14
N0.C00: CSR : SYSFEATURES0_MC_2LM_REG: 0x10
N0.C01: CSR : SYSFEATURES0_MC_2LM_REG: 0x10
Programs feature registers for MC 15
N0.C00: CSR : SYSFEATURES0_MC_2LM_REG: 0x10
N0.C01: CSR : SYSFEATURES0_MC_2LM_REG: 0x10
Checkpoint Code: Socket 0, 0xBB, 0x07, 0x0000
^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^
Write TAD CSRs for Socket: 0
^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^
Write Patrol and Sparing CSR's for MC 0
C00: TADWAYNESS[0]:
target_lid: 0 chn_lid: 0 tad_limit: 0x1F
C00: TADBASE[0]:
mirror_en: 0 en_failover: 0 ign_ptrl_uc: 0 base: 0x0
C00: TADWAYNESS[1]:
target_lid: 0 chn_lid: 0 tad_limit: 0x21F
C00: TADBASE[1]:
mirror_en: 0 en_failover: 0 ign_ptrl_uc: 0 base: 0x40
NM_DRAM_RULE[0]:
rule_enable: 1 limit: 0x3F nm_chn_ways: 0 nm_chn_gran: 1 nm_target_ways: 0 nm_gran_eq: 0 nm_chn_l2pid: 0x00FFFFF8
Logical Ch Id: 0 1 2 3 4 5 6 7
Physical Ch Id: 0 7 7 7 7 7 7 7
C00: NM_DRAM_RULE[0]:
NM_DRAM_RULE[1]:
rule_enable: 1 limit: 0x21F nm_chn_ways: 0 nm_chn_gran: 1 nm_target_ways: 0 nm_gran_eq: 0 nm_chn_l2pid: 0x00FFFFF8
Logical Ch Id: 0 1 2 3 4 5 6 7
Physical Ch Id: 0 7 7 7 7 7 7 7
C00: NM_DRAM_RULE[1]:
Write 1LM Decoder CSR's for MC 0
C00: TADCHNILVOFFSET[0]:
target_ways: 0 chn_ways: 0 target_gran: 1 chn_gran: 1 tad_offset: 0x0 tad_offset_sign: 0
C00: TADCHNILVOFFSET[1]:
target_ways: 0 chn_ways: 0 target_gran: 1 chn_gran: 1 tad_offset: 0x20 tad_offset_sign: 0
C00: MCNMCACHINGCFG:
mcnmcachingenb: 0 mcpmemenb: 0 mcnmcachingpmemwt: 0
C01: MCNMCACHINGCFG:
mcnmcachingenb: 0 mcpmemenb: 0 mcnmcachingpmemwt: 0
Write Patrol and Sparing CSR's for MC 1
C00: TADWAYNESS[0]:
target_lid: 0 chn_lid: 0 tad_limit: 0x41F
C00: TADBASE[0]:
mirror_en: 0 en_failover: 0 ign_ptrl_uc: 0 base: 0x220
NM_DRAM_RULE[0]:
rule_enable: 1 limit: 0x41F nm_chn_ways: 0 nm_chn_gran: 1 nm_target_ways: 0 nm_gran_eq: 0 nm_chn_l2pid: 0x00FFFFF8
Logical Ch Id: 0 1 2 3 4 5 6 7
Physical Ch Id: 0 7 7 7 7 7 7 7
C00: NM_DRAM_RULE[0]:
Write 1LM Decoder CSR's for MC 1
C00: TADCHNILVOFFSET[0]:
target_ways: 0 chn_ways: 0 target_gran: 1 chn_gran: 1 tad_offset: 0x220 tad_offset_sign: 0
C00: MCNMCACHINGCFG:
mcnmcachingenb: 0 mcpmemenb: 0 mcnmcachingpmemwt: 0
C01: MCNMCACHINGCFG:
mcnmcachingenb: 0 mcpmemenb: 0 mcnmcachingpmemwt: 0
Write Patrol and Sparing CSR's for MC 2
C00: TADWAYNESS[0]:
target_lid: 0 chn_lid: 0 tad_limit: 0x61F
C00: TADBASE[0]:
mirror_en: 0 en_failover: 0 ign_ptrl_uc: 0 base: 0x420
NM_DRAM_RULE[0]:
rule_enable: 1 limit: 0x61F nm_chn_ways: 0 nm_chn_gran: 1 nm_target_ways: 0 nm_gran_eq: 0 nm_chn_l2pid: 0x00FFFFF8
Logical Ch Id: 0 1 2 3 4 5 6 7
Physical Ch Id: 0 7 7 7 7 7 7 7
C00: NM_DRAM_RULE[0]:
Write 1LM Decoder CSR's for MC 2
C00: TADCHNILVOFFSET[0]:
target_ways: 0 chn_ways: 0 target_gran: 1 chn_gran: 1 tad_offset: 0x420 tad_offset_sign: 0
C00: MCNMCACHINGCFG:
mcnmcachingenb: 0 mcpmemenb: 0 mcnmcachingpmemwt: 0
C01: MCNMCACHINGCFG:
mcnmcachingenb: 0 mcpmemenb: 0 mcnmcachingpmemwt: 0
Write Patrol and Sparing CSR's for MC 3
C00: TADWAYNESS[0]:
target_lid: 0 chn_lid: 0 tad_limit: 0x81F
C00: TADBASE[0]:
mirror_en: 0 en_failover: 0 ign_ptrl_uc: 0 base: 0x620
NM_DRAM_RULE[0]:
rule_enable: 1 limit: 0x81F nm_chn_ways: 0 nm_chn_gran: 1 nm_target_ways: 0 nm_gran_eq: 0 nm_chn_l2pid: 0x00FFFFF8
Logical Ch Id: 0 1 2 3 4 5 6 7
Physical Ch Id: 0 7 7 7 7 7 7 7
C00: NM_DRAM_RULE[0]:
Write 1LM Decoder CSR's for MC 3
C00: TADCHNILVOFFSET[0]:
target_ways: 0 chn_ways: 0 target_gran: 1 chn_gran: 1 tad_offset: 0x620 tad_offset_sign: 0
C00: MCNMCACHINGCFG:
mcnmcachingenb: 0 mcpmemenb: 0 mcnmcachingpmemwt: 0
C01: MCNMCACHINGCFG:
mcnmcachingenb: 0 mcpmemenb: 0 mcnmcachingpmemwt: 0
Write Patrol and Sparing TAD range CSR's for HBM Stack 0 MC 0
C00: TADWAYNESS[0]:
target_lid: 0 chn_lid: 0 tad_limit: 0x1F
C00: TADBASE[0]:
mirror_en: 0 en_failover: 0 ign_ptrl_uc: 0 base: 0x0
C01: TADWAYNESS[0]:
target_lid: 0 chn_lid: 1 tad_limit: 0x1F
C01: TADBASE[0]:
mirror_en: 0 en_failover: 0 ign_ptrl_uc: 0 base: 0x0
Write Patrol and Sparing TAD range CSR's for HBM Stack 0 MC 1
C00: TADWAYNESS[0]:
target_lid: 0 chn_lid: 2 tad_limit: 0x1F
C00: TADBASE[0]:
mirror_en: 0 en_failover: 0 ign_ptrl_uc: 0 base: 0x0
C01: TADWAYNESS[0]:
target_lid: 0 chn_lid: 3 tad_limit: 0x1F
C01: TADBASE[0]:
mirror_en: 0 en_failover: 0 ign_ptrl_uc: 0 base: 0x0
Write Patrol and Sparing TAD range CSR's for HBM Stack 0 MC 2
C00: TADWAYNESS[0]:
target_lid: 0 chn_lid: 4 tad_limit: 0x1F
C00: TADBASE[0]:
mirror_en: 0 en_failover: 0 ign_ptrl_uc: 0 base: 0x0
C01: TADWAYNESS[0]:
target_lid: 0 chn_lid: 5 tad_limit: 0x1F
C01: TADBASE[0]:
mirror_en: 0 en_failover: 0 ign_ptrl_uc: 0 base: 0x0
Write Patrol and Sparing TAD range CSR's for HBM Stack 0 MC 3
C00: TADWAYNESS[0]:
target_lid: 0 chn_lid: 6 tad_limit: 0x1F
C00: TADBASE[0]:
mirror_en: 0 en_failover: 0 ign_ptrl_uc: 0 base: 0x0
C01: TADWAYNESS[0]:
target_lid: 0 chn_lid: 7 tad_limit: 0x1F
C01: TADBASE[0]:
mirror_en: 0 en_failover: 0 ign_ptrl_uc: 0 base: 0x0
Write Hbm Nm Caching Tad CSR's for HBM Stack 0 MC 0
C00: MCNMCACHINGCFG 2LM TAD:
nmcachingtaden: 1 nmcachingtad: 0
C01: MCNMCACHINGCFG 2LM TAD:
nmcachingtaden: 1 nmcachingtad: 0
Write Hbm Nm Caching Tad CSR's for HBM Stack 0 MC 1
C00: MCNMCACHINGCFG 2LM TAD:
nmcachingtaden: 1 nmcachingtad: 0
C01: MCNMCACHINGCFG 2LM TAD:
nmcachingtaden: 1 nmcachingtad: 0
Write Hbm Nm Caching Tad CSR's for HBM Stack 0 MC 2
C00: MCNMCACHINGCFG 2LM TAD:
nmcachingtaden: 1 nmcachingtad: 0
C01: MCNMCACHINGCFG 2LM TAD:
nmcachingtaden: 1 nmcachingtad: 0
Write Hbm Nm Caching Tad CSR's for HBM Stack 0 MC 3
C00: MCNMCACHINGCFG 2LM TAD:
nmcachingtaden: 1 nmcachingtad: 0
C01: MCNMCACHINGCFG 2LM TAD:
nmcachingtaden: 1 nmcachingtad: 0
Write 1LM Decoder CSR's for HBM Stack 0 MC 0
C00: TADCHNILVOFFSET[0]:
target_ways: 0 chn_ways: 0 target_gran: 1 chn_gran: 1 tad_offset: 0x0 tad_offset_sign: 0
C01: TADCHNILVOFFSET[0]:
target_ways: 0 chn_ways: 0 target_gran: 1 chn_gran: 1 tad_offset: 0x0 tad_offset_sign: 0
Write 1LM Decoder CSR's for HBM Stack 0 MC 1
C00: TADCHNILVOFFSET[0]:
target_ways: 0 chn_ways: 0 target_gran: 1 chn_gran: 1 tad_offset: 0x0 tad_offset_sign: 0
C01: TADCHNILVOFFSET[0]:
target_ways: 0 chn_ways: 0 target_gran: 1 chn_gran: 1 tad_offset: 0x0 tad_offset_sign: 0
Write 1LM Decoder CSR's for HBM Stack 0 MC 2
C00: TADCHNILVOFFSET[0]:
target_ways: 0 chn_ways: 0 target_gran: 1 chn_gran: 1 tad_offset: 0x0 tad_offset_sign: 0
C01: TADCHNILVOFFSET[0]:
target_ways: 0 chn_ways: 0 target_gran: 1 chn_gran: 1 tad_offset: 0x0 tad_offset_sign: 0
Write 1LM Decoder CSR's for HBM Stack 0 MC 3
C00: TADCHNILVOFFSET[0]:
target_ways: 0 chn_ways: 0 target_gran: 1 chn_gran: 1 tad_offset: 0x0 tad_offset_sign: 0
C01: TADCHNILVOFFSET[0]:
target_ways: 0 chn_ways: 0 target_gran: 1 chn_gran: 1 tad_offset: 0x0 tad_offset_sign: 0
Write MCNMCACHINGCFG for HBM Stack 0 MC 0
C00: MCNMCACHINGCFG:
mcnmcachingenb: 1 mcpmemenb: 0 mcnmcachingpmemwt: 0
C01: MCNMCACHINGCFG:
mcnmcachingenb: 1 mcpmemenb: 0 mcnmcachingpmemwt: 0
Write MCNMCACHINGCFG for HBM Stack 0 MC 1
C00: MCNMCACHINGCFG:
mcnmcachingenb: 1 mcpmemenb: 0 mcnmcachingpmemwt: 0
C01: MCNMCACHINGCFG:
mcnmcachingenb: 1 mcpmemenb: 0 mcnmcachingpmemwt: 0
Write MCNMCACHINGCFG for HBM Stack 0 MC 2
C00: MCNMCACHINGCFG:
mcnmcachingenb: 1 mcpmemenb: 0 mcnmcachingpmemwt: 0
C01: MCNMCACHINGCFG:
mcnmcachingenb: 1 mcpmemenb: 0 mcnmcachingpmemwt: 0
Write MCNMCACHINGCFG for HBM Stack 0 MC 3
C00: MCNMCACHINGCFG:
mcnmcachingenb: 1 mcpmemenb: 0 mcnmcachingpmemwt: 0
C01: MCNMCACHINGCFG:
mcnmcachingenb: 1 mcpmemenb: 0 mcnmcachingpmemwt: 0
Write 2LM NM Decoder CSR's for HBM Stack 0 MC 0
C00: MCNMCACHINGINTLV:
nm_target_ways: 0 nm_chn_ways: 3 nm_target_lid: 0 nm_target_gran: 1 nm_chn_gran: 1 nm_chn_lid: 0
C00: MCNMCACHINGCFG_MC_2LM_REG:
en_2way: 0 prefer_way_sel: 0 chn_cap: 0xB nm_ratio_chn_cap: 0
C00: MCNMCACHINGOFFSET:
mcnmcachingoffsetlower: 0x0 mcnmcachingoffset: 0x0 mcnmcachingoffseten: 0
C01: MCNMCACHINGINTLV:
nm_target_ways: 0 nm_chn_ways: 3 nm_target_lid: 0 nm_target_gran: 1 nm_chn_gran: 1 nm_chn_lid: 1
C01: MCNMCACHINGCFG_MC_2LM_REG:
en_2way: 0 prefer_way_sel: 0 chn_cap: 0xB nm_ratio_chn_cap: 0
C01: MCNMCACHINGOFFSET:
mcnmcachingoffsetlower: 0x0 mcnmcachingoffset: 0x0 mcnmcachingoffseten: 0
Write 2LM NM Decoder CSR's for HBM Stack 0 MC 1
C00: MCNMCACHINGINTLV:
nm_target_ways: 0 nm_chn_ways: 3 nm_target_lid: 0 nm_target_gran: 1 nm_chn_gran: 1 nm_chn_lid: 2
C00: MCNMCACHINGCFG_MC_2LM_REG:
en_2way: 0 prefer_way_sel: 0 chn_cap: 0xB nm_ratio_chn_cap: 0
C00: MCNMCACHINGOFFSET:
mcnmcachingoffsetlower: 0x0 mcnmcachingoffset: 0x0 mcnmcachingoffseten: 0
C01: MCNMCACHINGINTLV:
nm_target_ways: 0 nm_chn_ways: 3 nm_target_lid: 0 nm_target_gran: 1 nm_chn_gran: 1 nm_chn_lid: 3
C01: MCNMCACHINGCFG_MC_2LM_REG:
en_2way: 0 prefer_way_sel: 0 chn_cap: 0xB nm_ratio_chn_cap: 0
C01: MCNMCACHINGOFFSET:
mcnmcachingoffsetlower: 0x0 mcnmcachingoffset: 0x0 mcnmcachingoffseten: 0
Write 2LM NM Decoder CSR's for HBM Stack 0 MC 2
C00: MCNMCACHINGINTLV:
nm_target_ways: 0 nm_chn_ways: 3 nm_target_lid: 0 nm_target_gran: 1 nm_chn_gran: 1 nm_chn_lid: 4
C00: MCNMCACHINGCFG_MC_2LM_REG:
en_2way: 0 prefer_way_sel: 0 chn_cap: 0xB nm_ratio_chn_cap: 0
C00: MCNMCACHINGOFFSET:
mcnmcachingoffsetlower: 0x0 mcnmcachingoffset: 0x0 mcnmcachingoffseten: 0
C01: MCNMCACHINGINTLV:
nm_target_ways: 0 nm_chn_ways: 3 nm_target_lid: 0 nm_target_gran: 1 nm_chn_gran: 1 nm_chn_lid: 5
C01: MCNMCACHINGCFG_MC_2LM_REG:
en_2way: 0 prefer_way_sel: 0 chn_cap: 0xB nm_ratio_chn_cap: 0
C01: MCNMCACHINGOFFSET:
mcnmcachingoffsetlower: 0x0 mcnmcachingoffset: 0x0 mcnmcachingoffseten: 0
Write 2LM NM Decoder CSR's for HBM Stack 0 MC 3
C00: MCNMCACHINGINTLV:
nm_target_ways: 0 nm_chn_ways: 3 nm_target_lid: 0 nm_target_gran: 1 nm_chn_gran: 1 nm_chn_lid: 6
C00: MCNMCACHINGCFG_MC_2LM_REG:
en_2way: 0 prefer_way_sel: 0 chn_cap: 0xB nm_ratio_chn_cap: 0
C00: MCNMCACHINGOFFSET:
mcnmcachingoffsetlower: 0x0 mcnmcachingoffset: 0x0 mcnmcachingoffseten: 0
C01: MCNMCACHINGINTLV:
nm_target_ways: 0 nm_chn_ways: 3 nm_target_lid: 0 nm_target_gran: 1 nm_chn_gran: 1 nm_chn_lid: 7
C01: MCNMCACHINGCFG_MC_2LM_REG:
en_2way: 0 prefer_way_sel: 0 chn_cap: 0xB nm_ratio_chn_cap: 0
C01: MCNMCACHINGOFFSET:
mcnmcachingoffsetlower: 0x0 mcnmcachingoffset: 0x0 mcnmcachingoffseten: 0
Write 2LM FM Decoder CSR's for HBM Stack 0 MC 0 TAD 0
C00: DRAM_RULE[0]:
rule_enable: 1 limit: 0x3F fm_target: 0 fm_chn_ways: 0 fm_chn_gran: 1 fm_target_ways: 0 fm_gran_eq: 0 fm_chn_l2pid: 0x00000000
C01: DRAM_RULE[0]:
rule_enable: 1 limit: 0x3F fm_target: 0 fm_chn_ways: 0 fm_chn_gran: 1 fm_target_ways: 0 fm_gran_eq: 0 fm_chn_l2pid: 0x00000000
Write 2LM FM Decoder CSR's for HBM Stack 0 MC 1 TAD 0
C00: DRAM_RULE[0]:
rule_enable: 1 limit: 0x3F fm_target: 0 fm_chn_ways: 0 fm_chn_gran: 1 fm_target_ways: 0 fm_gran_eq: 0 fm_chn_l2pid: 0x00000000
C01: DRAM_RULE[0]:
rule_enable: 1 limit: 0x3F fm_target: 0 fm_chn_ways: 0 fm_chn_gran: 1 fm_target_ways: 0 fm_gran_eq: 0 fm_chn_l2pid: 0x00000000
Write 2LM FM Decoder CSR's for HBM Stack 0 MC 2 TAD 0
C00: DRAM_RULE[0]:
rule_enable: 1 limit: 0x3F fm_target: 0 fm_chn_ways: 0 fm_chn_gran: 1 fm_target_ways: 0 fm_gran_eq: 0 fm_chn_l2pid: 0x00000000
C01: DRAM_RULE[0]:
rule_enable: 1 limit: 0x3F fm_target: 0 fm_chn_ways: 0 fm_chn_gran: 1 fm_target_ways: 0 fm_gran_eq: 0 fm_chn_l2pid: 0x00000000
Write 2LM FM Decoder CSR's for HBM Stack 0 MC 3 TAD 0
C00: DRAM_RULE[0]:
rule_enable: 1 limit: 0x3F fm_target: 0 fm_chn_ways: 0 fm_chn_gran: 1 fm_target_ways: 0 fm_gran_eq: 0 fm_chn_l2pid: 0x00000000
C01: DRAM_RULE[0]:
rule_enable: 1 limit: 0x3F fm_target: 0 fm_chn_ways: 0 fm_chn_gran: 1 fm_target_ways: 0 fm_gran_eq: 0 fm_chn_l2pid: 0x00000000
Write 2LM FM Decoder CSR's for HBM Stack 0 MC 0 TAD 1
C00: DRAM_RULE[1]:
rule_enable: 1 limit: 0x21F fm_target: 0 fm_chn_ways: 0 fm_chn_gran: 1 fm_target_ways: 0 fm_gran_eq: 0 fm_chn_l2pid: 0x00000000
C01: DRAM_RULE[1]:
rule_enable: 1 limit: 0x21F fm_target: 0 fm_chn_ways: 0 fm_chn_gran: 1 fm_target_ways: 0 fm_gran_eq: 0 fm_chn_l2pid: 0x00000000
Write 2LM FM Decoder CSR's for HBM Stack 0 MC 1 TAD 1
C00: DRAM_RULE[1]:
rule_enable: 1 limit: 0x21F fm_target: 0 fm_chn_ways: 0 fm_chn_gran: 1 fm_target_ways: 0 fm_gran_eq: 0 fm_chn_l2pid: 0x00000000
C01: DRAM_RULE[1]:
rule_enable: 1 limit: 0x21F fm_target: 0 fm_chn_ways: 0 fm_chn_gran: 1 fm_target_ways: 0 fm_gran_eq: 0 fm_chn_l2pid: 0x00000000
Write 2LM FM Decoder CSR's for HBM Stack 0 MC 2 TAD 1
C00: DRAM_RULE[1]:
rule_enable: 1 limit: 0x21F fm_target: 0 fm_chn_ways: 0 fm_chn_gran: 1 fm_target_ways: 0 fm_gran_eq: 0 fm_chn_l2pid: 0x00000000
C01: DRAM_RULE[1]:
rule_enable: 1 limit: 0x21F fm_target: 0 fm_chn_ways: 0 fm_chn_gran: 1 fm_target_ways: 0 fm_gran_eq: 0 fm_chn_l2pid: 0x00000000
Write 2LM FM Decoder CSR's for HBM Stack 0 MC 3 TAD 1
C00: DRAM_RULE[1]:
rule_enable: 1 limit: 0x21F fm_target: 0 fm_chn_ways: 0 fm_chn_gran: 1 fm_target_ways: 0 fm_gran_eq: 0 fm_chn_l2pid: 0x00000000
C01: DRAM_RULE[1]:
rule_enable: 1 limit: 0x21F fm_target: 0 fm_chn_ways: 0 fm_chn_gran: 1 fm_target_ways: 0 fm_gran_eq: 0 fm_chn_l2pid: 0x00000000
Write Patrol and Sparing TAD range CSR's for HBM Stack 1 MC 0
C00: TADWAYNESS[0]:
target_lid: 0 chn_lid: 0 tad_limit: 0x1F
C00: TADBASE[0]:
mirror_en: 0 en_failover: 0 ign_ptrl_uc: 0 base: 0x0
C01: TADWAYNESS[0]:
target_lid: 0 chn_lid: 1 tad_limit: 0x1F
C01: TADBASE[0]:
mirror_en: 0 en_failover: 0 ign_ptrl_uc: 0 base: 0x0
Write Patrol and Sparing TAD range CSR's for HBM Stack 1 MC 1
C00: TADWAYNESS[0]:
target_lid: 0 chn_lid: 2 tad_limit: 0x1F
C00: TADBASE[0]:
mirror_en: 0 en_failover: 0 ign_ptrl_uc: 0 base: 0x0
C01: TADWAYNESS[0]:
target_lid: 0 chn_lid: 3 tad_limit: 0x1F
C01: TADBASE[0]:
mirror_en: 0 en_failover: 0 ign_ptrl_uc: 0 base: 0x0
Write Patrol and Sparing TAD range CSR's for HBM Stack 1 MC 2
C00: TADWAYNESS[0]:
target_lid: 0 chn_lid: 4 tad_limit: 0x1F
C00: TADBASE[0]:
mirror_en: 0 en_failover: 0 ign_ptrl_uc: 0 base: 0x0
C01: TADWAYNESS[0]:
target_lid: 0 chn_lid: 5 tad_limit: 0x1F
C01: TADBASE[0]:
mirror_en: 0 en_failover: 0 ign_ptrl_uc: 0 base: 0x0
Write Patrol and Sparing TAD range CSR's for HBM Stack 1 MC 3
C00: TADWAYNESS[0]:
target_lid: 0 chn_lid: 6 tad_limit: 0x1F
C00: TADBASE[0]:
mirror_en: 0 en_failover: 0 ign_ptrl_uc: 0 base: 0x0
C01: TADWAYNESS[0]:
target_lid: 0 chn_lid: 7 tad_limit: 0x1F
C01: TADBASE[0]:
mirror_en: 0 en_failover: 0 ign_ptrl_uc: 0 base: 0x0
Write Hbm Nm Caching Tad CSR's for HBM Stack 1 MC 0
C00: MCNMCACHINGCFG 2LM TAD:
nmcachingtaden: 1 nmcachingtad: 0
C01: MCNMCACHINGCFG 2LM TAD:
nmcachingtaden: 1 nmcachingtad: 0
Write Hbm Nm Caching Tad CSR's for HBM Stack 1 MC 1
C00: MCNMCACHINGCFG 2LM TAD:
nmcachingtaden: 1 nmcachingtad: 0
C01: MCNMCACHINGCFG 2LM TAD:
nmcachingtaden: 1 nmcachingtad: 0
Write Hbm Nm Caching Tad CSR's for HBM Stack 1 MC 2
C00: MCNMCACHINGCFG 2LM TAD:
nmcachingtaden: 1 nmcachingtad: 0
C01: MCNMCACHINGCFG 2LM TAD:
nmcachingtaden: 1 nmcachingtad: 0
Write Hbm Nm Caching Tad CSR's for HBM Stack 1 MC 3
C00: MCNMCACHINGCFG 2LM TAD:
nmcachingtaden: 1 nmcachingtad: 0
C01: MCNMCACHINGCFG 2LM TAD:
nmcachingtaden: 1 nmcachingtad: 0
Write 1LM Decoder CSR's for HBM Stack 1 MC 0
C00: TADCHNILVOFFSET[0]:
target_ways: 0 chn_ways: 0 target_gran: 1 chn_gran: 1 tad_offset: 0x0 tad_offset_sign: 0
C01: TADCHNILVOFFSET[0]:
target_ways: 0 chn_ways: 0 target_gran: 1 chn_gran: 1 tad_offset: 0x0 tad_offset_sign: 0
Write 1LM Decoder CSR's for HBM Stack 1 MC 1
C00: TADCHNILVOFFSET[0]:
target_ways: 0 chn_ways: 0 target_gran: 1 chn_gran: 1 tad_offset: 0x0 tad_offset_sign: 0
C01: TADCHNILVOFFSET[0]:
target_ways: 0 chn_ways: 0 target_gran: 1 chn_gran: 1 tad_offset: 0x0 tad_offset_sign: 0
Write 1LM Decoder CSR's for HBM Stack 1 MC 2
C00: TADCHNILVOFFSET[0]:
target_ways: 0 chn_ways: 0 target_gran: 1 chn_gran: 1 tad_offset: 0x0 tad_offset_sign: 0
C01: TADCHNILVOFFSET[0]:
target_ways: 0 chn_ways: 0 target_gran: 1 chn_gran: 1 tad_offset: 0x0 tad_offset_sign: 0
Write 1LM Decoder CSR's for HBM Stack 1 MC 3
C00: TADCHNILVOFFSET[0]:
target_ways: 0 chn_ways: 0 target_gran: 1 chn_gran: 1 tad_offset: 0x0 tad_offset_sign: 0
C01: TADCHNILVOFFSET[0]:
target_ways: 0 chn_ways: 0 target_gran: 1 chn_gran: 1 tad_offset: 0x0 tad_offset_sign: 0
Write MCNMCACHINGCFG for HBM Stack 1 MC 0
C00: MCNMCACHINGCFG:
mcnmcachingenb: 1 mcpmemenb: 0 mcnmcachingpmemwt: 0
C01: MCNMCACHINGCFG:
mcnmcachingenb: 1 mcpmemenb: 0 mcnmcachingpmemwt: 0
Write MCNMCACHINGCFG for HBM Stack 1 MC 1
C00: MCNMCACHINGCFG:
mcnmcachingenb: 1 mcpmemenb: 0 mcnmcachingpmemwt: 0
C01: MCNMCACHINGCFG:
mcnmcachingenb: 1 mcpmemenb: 0 mcnmcachingpmemwt: 0
Write MCNMCACHINGCFG for HBM Stack 1 MC 2
C00: MCNMCACHINGCFG:
mcnmcachingenb: 1 mcpmemenb: 0 mcnmcachingpmemwt: 0
C01: MCNMCACHINGCFG:
mcnmcachingenb: 1 mcpmemenb: 0 mcnmcachingpmemwt: 0
Write MCNMCACHINGCFG for HBM Stack 1 MC 3
C00: MCNMCACHINGCFG:
mcnmcachingenb: 1 mcpmemenb: 0 mcnmcachingpmemwt: 0
C01: MCNMCACHINGCFG:
mcnmcachingenb: 1 mcpmemenb: 0 mcnmcachingpmemwt: 0
Write 2LM NM Decoder CSR's for HBM Stack 1 MC 0
C00: CSR for force_lat bit : AMAP_MC_MAIN_REG: 0x52
C00: MCNMCACHINGINTLV:
nm_target_ways: 0 nm_chn_ways: 3 nm_target_lid: 0 nm_target_gran: 1 nm_chn_gran: 1 nm_chn_lid: 0
C00: MCNMCACHINGCFG_MC_2LM_REG:
en_2way: 0 prefer_way_sel: 0 chn_cap: 0xB nm_ratio_chn_cap: 0
C00: MCNMCACHINGOFFSET:
mcnmcachingoffsetlower: 0x2 mcnmcachingoffset: 0x1 mcnmcachingoffseten: 1
C01: CSR for force_lat bit : AMAP_MC_MAIN_REG: 0x52
C01: MCNMCACHINGINTLV:
nm_target_ways: 0 nm_chn_ways: 3 nm_target_lid: 0 nm_target_gran: 1 nm_chn_gran: 1 nm_chn_lid: 1
C01: MCNMCACHINGCFG_MC_2LM_REG:
en_2way: 0 prefer_way_sel: 0 chn_cap: 0xB nm_ratio_chn_cap: 0
C01: MCNMCACHINGOFFSET:
mcnmcachingoffsetlower: 0x2 mcnmcachingoffset: 0x1 mcnmcachingoffseten: 1
Write 2LM NM Decoder CSR's for HBM Stack 1 MC 1
C00: CSR for force_lat bit : AMAP_MC_MAIN_REG: 0x52
C00: MCNMCACHINGINTLV:
nm_target_ways: 0 nm_chn_ways: 3 nm_target_lid: 0 nm_target_gran: 1 nm_chn_gran: 1 nm_chn_lid: 2
C00: MCNMCACHINGCFG_MC_2LM_REG:
en_2way: 0 prefer_way_sel: 0 chn_cap: 0xB nm_ratio_chn_cap: 0
C00: MCNMCACHINGOFFSET:
mcnmcachingoffsetlower: 0x2 mcnmcachingoffset: 0x1 mcnmcachingoffseten: 1
C01: CSR for force_lat bit : AMAP_MC_MAIN_REG: 0x52
C01: MCNMCACHINGINTLV:
nm_target_ways: 0 nm_chn_ways: 3 nm_target_lid: 0 nm_target_gran: 1 nm_chn_gran: 1 nm_chn_lid: 3
C01: MCNMCACHINGCFG_MC_2LM_REG:
en_2way: 0 prefer_way_sel: 0 chn_cap: 0xB nm_ratio_chn_cap: 0
C01: MCNMCACHINGOFFSET:
mcnmcachingoffsetlower: 0x2 mcnmcachingoffset: 0x1 mcnmcachingoffseten: 1
Write 2LM NM Decoder CSR's for HBM Stack 1 MC 2
C00: CSR for force_lat bit : AMAP_MC_MAIN_REG: 0x52
C00: MCNMCACHINGINTLV:
nm_target_ways: 0 nm_chn_ways: 3 nm_target_lid: 0 nm_target_gran: 1 nm_chn_gran: 1 nm_chn_lid: 4
C00: MCNMCACHINGCFG_MC_2LM_REG:
en_2way: 0 prefer_way_sel: 0 chn_cap: 0xB nm_ratio_chn_cap: 0
C00: MCNMCACHINGOFFSET:
mcnmcachingoffsetlower: 0x2 mcnmcachingoffset: 0x1 mcnmcachingoffseten: 1
C01: CSR for force_lat bit : AMAP_MC_MAIN_REG: 0x52
C01: MCNMCACHINGINTLV:
nm_target_ways: 0 nm_chn_ways: 3 nm_target_lid: 0 nm_target_gran: 1 nm_chn_gran: 1 nm_chn_lid: 5
C01: MCNMCACHINGCFG_MC_2LM_REG:
en_2way: 0 prefer_way_sel: 0 chn_cap: 0xB nm_ratio_chn_cap: 0
C01: MCNMCACHINGOFFSET:
mcnmcachingoffsetlower: 0x2 mcnmcachingoffset: 0x1 mcnmcachingoffseten: 1
Write 2LM NM Decoder CSR's for HBM Stack 1 MC 3
C00: CSR for force_lat bit : AMAP_MC_MAIN_REG: 0x52
C00: MCNMCACHINGINTLV:
nm_target_ways: 0 nm_chn_ways: 3 nm_target_lid: 0 nm_target_gran: 1 nm_chn_gran: 1 nm_chn_lid: 6
C00: MCNMCACHINGCFG_MC_2LM_REG:
en_2way: 0 prefer_way_sel: 0 chn_cap: 0xB nm_ratio_chn_cap: 0
C00: MCNMCACHINGOFFSET:
mcnmcachingoffsetlower: 0x2 mcnmcachingoffset: 0x1 mcnmcachingoffseten: 1
C01: CSR for force_lat bit : AMAP_MC_MAIN_REG: 0x52
C01: MCNMCACHINGINTLV:
nm_target_ways: 0 nm_chn_ways: 3 nm_target_lid: 0 nm_target_gran: 1 nm_chn_gran: 1 nm_chn_lid: 7
C01: MCNMCACHINGCFG_MC_2LM_REG:
en_2way: 0 prefer_way_sel: 0 chn_cap: 0xB nm_ratio_chn_cap: 0
C01: MCNMCACHINGOFFSET:
mcnmcachingoffsetlower: 0x2 mcnmcachingoffset: 0x1 mcnmcachingoffseten: 1
Write 2LM FM Decoder CSR's for HBM Stack 1 MC 0 TAD 0
C00: DRAM_RULE[0]:
rule_enable: 1 limit: 0x41F fm_target: 0 fm_chn_ways: 0 fm_chn_gran: 1 fm_target_ways: 0 fm_gran_eq: 0 fm_chn_l2pid: 0x00000000
C01: DRAM_RULE[0]:
rule_enable: 1 limit: 0x41F fm_target: 0 fm_chn_ways: 0 fm_chn_gran: 1 fm_target_ways: 0 fm_gran_eq: 0 fm_chn_l2pid: 0x00000000
Write 2LM FM Decoder CSR's for HBM Stack 1 MC 1 TAD 0
C00: DRAM_RULE[0]:
rule_enable: 1 limit: 0x41F fm_target: 0 fm_chn_ways: 0 fm_chn_gran: 1 fm_target_ways: 0 fm_gran_eq: 0 fm_chn_l2pid: 0x00000000
C01: DRAM_RULE[0]:
rule_enable: 1 limit: 0x41F fm_target: 0 fm_chn_ways: 0 fm_chn_gran: 1 fm_target_ways: 0 fm_gran_eq: 0 fm_chn_l2pid: 0x00000000
Write 2LM FM Decoder CSR's for HBM Stack 1 MC 2 TAD 0
C00: DRAM_RULE[0]:
rule_enable: 1 limit: 0x41F fm_target: 0 fm_chn_ways: 0 fm_chn_gran: 1 fm_target_ways: 0 fm_gran_eq: 0 fm_chn_l2pid: 0x00000000
C01: DRAM_RULE[0]:
rule_enable: 1 limit: 0x41F fm_target: 0 fm_chn_ways: 0 fm_chn_gran: 1 fm_target_ways: 0 fm_gran_eq: 0 fm_chn_l2pid: 0x00000000
Write 2LM FM Decoder CSR's for HBM Stack 1 MC 3 TAD 0
C00: DRAM_RULE[0]:
rule_enable: 1 limit: 0x41F fm_target: 0 fm_chn_ways: 0 fm_chn_gran: 1 fm_target_ways: 0 fm_gran_eq: 0 fm_chn_l2pid: 0x00000000
C01: DRAM_RULE[0]:
rule_enable: 1 limit: 0x41F fm_target: 0 fm_chn_ways: 0 fm_chn_gran: 1 fm_target_ways: 0 fm_gran_eq: 0 fm_chn_l2pid: 0x00000000
Write Patrol and Sparing TAD range CSR's for HBM Stack 2 MC 0
C00: TADWAYNESS[0]:
target_lid: 0 chn_lid: 0 tad_limit: 0x1F
C00: TADBASE[0]:
mirror_en: 0 en_failover: 0 ign_ptrl_uc: 0 base: 0x0
C01: TADWAYNESS[0]:
target_lid: 0 chn_lid: 1 tad_limit: 0x1F
C01: TADBASE[0]:
mirror_en: 0 en_failover: 0 ign_ptrl_uc: 0 base: 0x0
Write Patrol and Sparing TAD range CSR's for HBM Stack 2 MC 1
C00: TADWAYNESS[0]:
target_lid: 0 chn_lid: 2 tad_limit: 0x1F
C00: TADBASE[0]:
mirror_en: 0 en_failover: 0 ign_ptrl_uc: 0 base: 0x0
C01: TADWAYNESS[0]:
target_lid: 0 chn_lid: 3 tad_limit: 0x1F
C01: TADBASE[0]:
mirror_en: 0 en_failover: 0 ign_ptrl_uc: 0 base: 0x0
Write Patrol and Sparing TAD range CSR's for HBM Stack 2 MC 2
C00: TADWAYNESS[0]:
target_lid: 0 chn_lid: 4 tad_limit: 0x1F
C00: TADBASE[0]:
mirror_en: 0 en_failover: 0 ign_ptrl_uc: 0 base: 0x0
C01: TADWAYNESS[0]:
target_lid: 0 chn_lid: 5 tad_limit: 0x1F
C01: TADBASE[0]:
mirror_en: 0 en_failover: 0 ign_ptrl_uc: 0 base: 0x0
Write Patrol and Sparing TAD range CSR's for HBM Stack 2 MC 3
C00: TADWAYNESS[0]:
target_lid: 0 chn_lid: 6 tad_limit: 0x1F
C00: TADBASE[0]:
mirror_en: 0 en_failover: 0 ign_ptrl_uc: 0 base: 0x0
C01: TADWAYNESS[0]:
target_lid: 0 chn_lid: 7 tad_limit: 0x1F
C01: TADBASE[0]:
mirror_en: 0 en_failover: 0 ign_ptrl_uc: 0 base: 0x0
Write Hbm Nm Caching Tad CSR's for HBM Stack 2 MC 0
C00: MCNMCACHINGCFG 2LM TAD:
nmcachingtaden: 1 nmcachingtad: 0
C01: MCNMCACHINGCFG 2LM TAD:
nmcachingtaden: 1 nmcachingtad: 0
Write Hbm Nm Caching Tad CSR's for HBM Stack 2 MC 1
C00: MCNMCACHINGCFG 2LM TAD:
nmcachingtaden: 1 nmcachingtad: 0
C01: MCNMCACHINGCFG 2LM TAD:
nmcachingtaden: 1 nmcachingtad: 0
Write Hbm Nm Caching Tad CSR's for HBM Stack 2 MC 2
C00: MCNMCACHINGCFG 2LM TAD:
nmcachingtaden: 1 nmcachingtad: 0
C01: MCNMCACHINGCFG 2LM TAD:
nmcachingtaden: 1 nmcachingtad: 0
Write Hbm Nm Caching Tad CSR's for HBM Stack 2 MC 3
C00: MCNMCACHINGCFG 2LM TAD:
nmcachingtaden: 1 nmcachingtad: 0
C01: MCNMCACHINGCFG 2LM TAD:
nmcachingtaden: 1 nmcachingtad: 0
Write 1LM Decoder CSR's for HBM Stack 2 MC 0
C00: TADCHNILVOFFSET[0]:
target_ways: 0 chn_ways: 0 target_gran: 1 chn_gran: 1 tad_offset: 0x0 tad_offset_sign: 0
C01: TADCHNILVOFFSET[0]:
target_ways: 0 chn_ways: 0 target_gran: 1 chn_gran: 1 tad_offset: 0x0 tad_offset_sign: 0
Write 1LM Decoder CSR's for HBM Stack 2 MC 1
C00: TADCHNILVOFFSET[0]:
target_ways: 0 chn_ways: 0 target_gran: 1 chn_gran: 1 tad_offset: 0x0 tad_offset_sign: 0
C01: TADCHNILVOFFSET[0]:
target_ways: 0 chn_ways: 0 target_gran: 1 chn_gran: 1 tad_offset: 0x0 tad_offset_sign: 0
Write 1LM Decoder CSR's for HBM Stack 2 MC 2
C00: TADCHNILVOFFSET[0]:
target_ways: 0 chn_ways: 0 target_gran: 1 chn_gran: 1 tad_offset: 0x0 tad_offset_sign: 0
C01: TADCHNILVOFFSET[0]:
target_ways: 0 chn_ways: 0 target_gran: 1 chn_gran: 1 tad_offset: 0x0 tad_offset_sign: 0
Write 1LM Decoder CSR's for HBM Stack 2 MC 3
C00: TADCHNILVOFFSET[0]:
target_ways: 0 chn_ways: 0 target_gran: 1 chn_gran: 1 tad_offset: 0x0 tad_offset_sign: 0
C01: TADCHNILVOFFSET[0]:
target_ways: 0 chn_ways: 0 target_gran: 1 chn_gran: 1 tad_offset: 0x0 tad_offset_sign: 0
Write MCNMCACHINGCFG for HBM Stack 2 MC 0
C00: MCNMCACHINGCFG:
mcnmcachingenb: 1 mcpmemenb: 0 mcnmcachingpmemwt: 0
C01: MCNMCACHINGCFG:
mcnmcachingenb: 1 mcpmemenb: 0 mcnmcachingpmemwt: 0
Write MCNMCACHINGCFG for HBM Stack 2 MC 1
C00: MCNMCACHINGCFG:
mcnmcachingenb: 1 mcpmemenb: 0 mcnmcachingpmemwt: 0
C01: MCNMCACHINGCFG:
mcnmcachingenb: 1 mcpmemenb: 0 mcnmcachingpmemwt: 0
Write MCNMCACHINGCFG for HBM Stack 2 MC 2
C00: MCNMCACHINGCFG:
mcnmcachingenb: 1 mcpmemenb: 0 mcnmcachingpmemwt: 0
C01: MCNMCACHINGCFG:
mcnmcachingenb: 1 mcpmemenb: 0 mcnmcachingpmemwt: 0
Write MCNMCACHINGCFG for HBM Stack 2 MC 3
C00: MCNMCACHINGCFG:
mcnmcachingenb: 1 mcpmemenb: 0 mcnmcachingpmemwt: 0
C01: MCNMCACHINGCFG:
mcnmcachingenb: 1 mcpmemenb: 0 mcnmcachingpmemwt: 0
Write 2LM NM Decoder CSR's for HBM Stack 2 MC 0
C00: CSR for force_lat bit : AMAP_MC_MAIN_REG: 0x52
C00: MCNMCACHINGINTLV:
nm_target_ways: 0 nm_chn_ways: 3 nm_target_lid: 0 nm_target_gran: 1 nm_chn_gran: 1 nm_chn_lid: 0
C00: MCNMCACHINGCFG_MC_2LM_REG:
en_2way: 0 prefer_way_sel: 0 chn_cap: 0xB nm_ratio_chn_cap: 0
C00: MCNMCACHINGOFFSET:
mcnmcachingoffsetlower: 0x2 mcnmcachingoffset: 0x2 mcnmcachingoffseten: 1
C01: CSR for force_lat bit : AMAP_MC_MAIN_REG: 0x52
C01: MCNMCACHINGINTLV:
nm_target_ways: 0 nm_chn_ways: 3 nm_target_lid: 0 nm_target_gran: 1 nm_chn_gran: 1 nm_chn_lid: 1
C01: MCNMCACHINGCFG_MC_2LM_REG:
en_2way: 0 prefer_way_sel: 0 chn_cap: 0xB nm_ratio_chn_cap: 0
C01: MCNMCACHINGOFFSET:
mcnmcachingoffsetlower: 0x2 mcnmcachingoffset: 0x2 mcnmcachingoffseten: 1
Write 2LM NM Decoder CSR's for HBM Stack 2 MC 1
C00: CSR for force_lat bit : AMAP_MC_MAIN_REG: 0x52
C00: MCNMCACHINGINTLV:
nm_target_ways: 0 nm_chn_ways: 3 nm_target_lid: 0 nm_target_gran: 1 nm_chn_gran: 1 nm_chn_lid: 2
C00: MCNMCACHINGCFG_MC_2LM_REG:
en_2way: 0 prefer_way_sel: 0 chn_cap: 0xB nm_ratio_chn_cap: 0
C00: MCNMCACHINGOFFSET:
mcnmcachingoffsetlower: 0x2 mcnmcachingoffset: 0x2 mcnmcachingoffseten: 1
C01: CSR for force_lat bit : AMAP_MC_MAIN_REG: 0x52
C01: MCNMCACHINGINTLV:
nm_target_ways: 0 nm_chn_ways: 3 nm_target_lid: 0 nm_target_gran: 1 nm_chn_gran: 1 nm_chn_lid: 3
C01: MCNMCACHINGCFG_MC_2LM_REG:
en_2way: 0 prefer_way_sel: 0 chn_cap: 0xB nm_ratio_chn_cap: 0
C01: MCNMCACHINGOFFSET:
mcnmcachingoffsetlower: 0x2 mcnmcachingoffset: 0x2 mcnmcachingoffseten: 1
Write 2LM NM Decoder CSR's for HBM Stack 2 MC 2
C00: CSR for force_lat bit : AMAP_MC_MAIN_REG: 0x52
C00: MCNMCACHINGINTLV:
nm_target_ways: 0 nm_chn_ways: 3 nm_target_lid: 0 nm_target_gran: 1 nm_chn_gran: 1 nm_chn_lid: 4
C00: MCNMCACHINGCFG_MC_2LM_REG:
en_2way: 0 prefer_way_sel: 0 chn_cap: 0xB nm_ratio_chn_cap: 0
C00: MCNMCACHINGOFFSET:
mcnmcachingoffsetlower: 0x2 mcnmcachingoffset: 0x2 mcnmcachingoffseten: 1
C01: CSR for force_lat bit : AMAP_MC_MAIN_REG: 0x52
C01: MCNMCACHINGINTLV:
nm_target_ways: 0 nm_chn_ways: 3 nm_target_lid: 0 nm_target_gran: 1 nm_chn_gran: 1 nm_chn_lid: 5
C01: MCNMCACHINGCFG_MC_2LM_REG:
en_2way: 0 prefer_way_sel: 0 chn_cap: 0xB nm_ratio_chn_cap: 0
C01: MCNMCACHINGOFFSET:
mcnmcachingoffsetlower: 0x2 mcnmcachingoffset: 0x2 mcnmcachingoffseten: 1
Write 2LM NM Decoder CSR's for HBM Stack 2 MC 3
C00: CSR for force_lat bit : AMAP_MC_MAIN_REG: 0x52
C00: MCNMCACHINGINTLV:
nm_target_ways: 0 nm_chn_ways: 3 nm_target_lid: 0 nm_target_gran: 1 nm_chn_gran: 1 nm_chn_lid: 6
C00: MCNMCACHINGCFG_MC_2LM_REG:
en_2way: 0 prefer_way_sel: 0 chn_cap: 0xB nm_ratio_chn_cap: 0
C00: MCNMCACHINGOFFSET:
mcnmcachingoffsetlower: 0x2 mcnmcachingoffset: 0x2 mcnmcachingoffseten: 1
C01: CSR for force_lat bit : AMAP_MC_MAIN_REG: 0x52
C01: MCNMCACHINGINTLV:
nm_target_ways: 0 nm_chn_ways: 3 nm_target_lid: 0 nm_target_gran: 1 nm_chn_gran: 1 nm_chn_lid: 7
C01: MCNMCACHINGCFG_MC_2LM_REG:
en_2way: 0 prefer_way_sel: 0 chn_cap: 0xB nm_ratio_chn_cap: 0
C01: MCNMCACHINGOFFSET:
mcnmcachingoffsetlower: 0x2 mcnmcachingoffset: 0x2 mcnmcachingoffseten: 1
Write 2LM FM Decoder CSR's for HBM Stack 2 MC 0 TAD 0
C00: DRAM_RULE[0]:
rule_enable: 1 limit: 0x61F fm_target: 0 fm_chn_ways: 0 fm_chn_gran: 1 fm_target_ways: 0 fm_gran_eq: 0 fm_chn_l2pid: 0x00000000
C01: DRAM_RULE[0]:
rule_enable: 1 limit: 0x61F fm_target: 0 fm_chn_ways: 0 fm_chn_gran: 1 fm_target_ways: 0 fm_gran_eq: 0 fm_chn_l2pid: 0x00000000
Write 2LM FM Decoder CSR's for HBM Stack 2 MC 1 TAD 0
C00: DRAM_RULE[0]:
rule_enable: 1 limit: 0x61F fm_target: 0 fm_chn_ways: 0 fm_chn_gran: 1 fm_target_ways: 0 fm_gran_eq: 0 fm_chn_l2pid: 0x00000000
C01: DRAM_RULE[0]:
rule_enable: 1 limit: 0x61F fm_target: 0 fm_chn_ways: 0 fm_chn_gran: 1 fm_target_ways: 0 fm_gran_eq: 0 fm_chn_l2pid: 0x00000000
Write 2LM FM Decoder CSR's for HBM Stack 2 MC 2 TAD 0
C00: DRAM_RULE[0]:
rule_enable: 1 limit: 0x61F fm_target: 0 fm_chn_ways: 0 fm_chn_gran: 1 fm_target_ways: 0 fm_gran_eq: 0 fm_chn_l2pid: 0x00000000
C01: DRAM_RULE[0]:
rule_enable: 1 limit: 0x61F fm_target: 0 fm_chn_ways: 0 fm_chn_gran: 1 fm_target_ways: 0 fm_gran_eq: 0 fm_chn_l2pid: 0x00000000
Write 2LM FM Decoder CSR's for HBM Stack 2 MC 3 TAD 0
C00: DRAM_RULE[0]:
rule_enable: 1 limit: 0x61F fm_target: 0 fm_chn_ways: 0 fm_chn_gran: 1 fm_target_ways: 0 fm_gran_eq: 0 fm_chn_l2pid: 0x00000000
C01: DRAM_RULE[0]:
rule_enable: 1 limit: 0x61F fm_target: 0 fm_chn_ways: 0 fm_chn_gran: 1 fm_target_ways: 0 fm_gran_eq: 0 fm_chn_l2pid: 0x00000000
Write Patrol and Sparing TAD range CSR's for HBM Stack 3 MC 0
C00: TADWAYNESS[0]:
target_lid: 0 chn_lid: 0 tad_limit: 0x1F
C00: TADBASE[0]:
mirror_en: 0 en_failover: 0 ign_ptrl_uc: 0 base: 0x0
C01: TADWAYNESS[0]:
target_lid: 0 chn_lid: 1 tad_limit: 0x1F
C01: TADBASE[0]:
mirror_en: 0 en_failover: 0 ign_ptrl_uc: 0 base: 0x0
Write Patrol and Sparing TAD range CSR's for HBM Stack 3 MC 1
C00: TADWAYNESS[0]:
target_lid: 0 chn_lid: 2 tad_limit: 0x1F
C00: TADBASE[0]:
mirror_en: 0 en_failover: 0 ign_ptrl_uc: 0 base: 0x0
C01: TADWAYNESS[0]:
target_lid: 0 chn_lid: 3 tad_limit: 0x1F
C01: TADBASE[0]:
mirror_en: 0 en_failover: 0 ign_ptrl_uc: 0 base: 0x0
Write Patrol and Sparing TAD range CSR's for HBM Stack 3 MC 2
C00: TADWAYNESS[0]:
target_lid: 0 chn_lid: 4 tad_limit: 0x1F
C00: TADBASE[0]:
mirror_en: 0 en_failover: 0 ign_ptrl_uc: 0 base: 0x0
C01: TADWAYNESS[0]:
target_lid: 0 chn_lid: 5 tad_limit: 0x1F
C01: TADBASE[0]:
mirror_en: 0 en_failover: 0 ign_ptrl_uc: 0 base: 0x0
Write Patrol and Sparing TAD range CSR's for HBM Stack 3 MC 3
C00: TADWAYNESS[0]:
target_lid: 0 chn_lid: 6 tad_limit: 0x1F
C00: TADBASE[0]:
mirror_en: 0 en_failover: 0 ign_ptrl_uc: 0 base: 0x0
C01: TADWAYNESS[0]:
target_lid: 0 chn_lid: 7 tad_limit: 0x1F
C01: TADBASE[0]:
mirror_en: 0 en_failover: 0 ign_ptrl_uc: 0 base: 0x0
Write Hbm Nm Caching Tad CSR's for HBM Stack 3 MC 0
C00: MCNMCACHINGCFG 2LM TAD:
nmcachingtaden: 1 nmcachingtad: 0
C01: MCNMCACHINGCFG 2LM TAD:
nmcachingtaden: 1 nmcachingtad: 0
Write Hbm Nm Caching Tad CSR's for HBM Stack 3 MC 1
C00: MCNMCACHINGCFG 2LM TAD:
nmcachingtaden: 1 nmcachingtad: 0
C01: MCNMCACHINGCFG 2LM TAD:
nmcachingtaden: 1 nmcachingtad: 0
Write Hbm Nm Caching Tad CSR's for HBM Stack 3 MC 2
C00: MCNMCACHINGCFG 2LM TAD:
nmcachingtaden: 1 nmcachingtad: 0
C01: MCNMCACHINGCFG 2LM TAD:
nmcachingtaden: 1 nmcachingtad: 0
Write Hbm Nm Caching Tad CSR's for HBM Stack 3 MC 3
C00: MCNMCACHINGCFG 2LM TAD:
nmcachingtaden: 1 nmcachingtad: 0
C01: MCNMCACHINGCFG 2LM TAD:
nmcachingtaden: 1 nmcachingtad: 0
Write 1LM Decoder CSR's for HBM Stack 3 MC 0
C00: TADCHNILVOFFSET[0]:
target_ways: 0 chn_ways: 0 target_gran: 1 chn_gran: 1 tad_offset: 0x0 tad_offset_sign: 0
C01: TADCHNILVOFFSET[0]:
target_ways: 0 chn_ways: 0 target_gran: 1 chn_gran: 1 tad_offset: 0x0 tad_offset_sign: 0
Write 1LM Decoder CSR's for HBM Stack 3 MC 1
C00: TADCHNILVOFFSET[0]:
target_ways: 0 chn_ways: 0 target_gran: 1 chn_gran: 1 tad_offset: 0x0 tad_offset_sign: 0
C01: TADCHNILVOFFSET[0]:
target_ways: 0 chn_ways: 0 target_gran: 1 chn_gran: 1 tad_offset: 0x0 tad_offset_sign: 0
Write 1LM Decoder CSR's for HBM Stack 3 MC 2
C00: TADCHNILVOFFSET[0]:
target_ways: 0 chn_ways: 0 target_gran: 1 chn_gran: 1 tad_offset: 0x0 tad_offset_sign: 0
C01: TADCHNILVOFFSET[0]:
target_ways: 0 chn_ways: 0 target_gran: 1 chn_gran: 1 tad_offset: 0x0 tad_offset_sign: 0
Write 1LM Decoder CSR's for HBM Stack 3 MC 3
C00: TADCHNILVOFFSET[0]:
target_ways: 0 chn_ways: 0 target_gran: 1 chn_gran: 1 tad_offset: 0x0 tad_offset_sign: 0
C01: TADCHNILVOFFSET[0]:
target_ways: 0 chn_ways: 0 target_gran: 1 chn_gran: 1 tad_offset: 0x0 tad_offset_sign: 0
Write MCNMCACHINGCFG for HBM Stack 3 MC 0
C00: MCNMCACHINGCFG:
mcnmcachingenb: 1 mcpmemenb: 0 mcnmcachingpmemwt: 0
C01: MCNMCACHINGCFG:
mcnmcachingenb: 1 mcpmemenb: 0 mcnmcachingpmemwt: 0
Write MCNMCACHINGCFG for HBM Stack 3 MC 1
C00: MCNMCACHINGCFG:
mcnmcachingenb: 1 mcpmemenb: 0 mcnmcachingpmemwt: 0
C01: MCNMCACHINGCFG:
mcnmcachingenb: 1 mcpmemenb: 0 mcnmcachingpmemwt: 0
Write MCNMCACHINGCFG for HBM Stack 3 MC 2
C00: MCNMCACHINGCFG:
mcnmcachingenb: 1 mcpmemenb: 0 mcnmcachingpmemwt: 0
C01: MCNMCACHINGCFG:
mcnmcachingenb: 1 mcpmemenb: 0 mcnmcachingpmemwt: 0
Write MCNMCACHINGCFG for HBM Stack 3 MC 3
C00: MCNMCACHINGCFG:
mcnmcachingenb: 1 mcpmemenb: 0 mcnmcachingpmemwt: 0
C01: MCNMCACHINGCFG:
mcnmcachingenb: 1 mcpmemenb: 0 mcnmcachingpmemwt: 0
Write 2LM NM Decoder CSR's for HBM Stack 3 MC 0
C00: CSR for force_lat bit : AMAP_MC_MAIN_REG: 0x52
C00: MCNMCACHINGINTLV:
nm_target_ways: 0 nm_chn_ways: 3 nm_target_lid: 0 nm_target_gran: 1 nm_chn_gran: 1 nm_chn_lid: 0
C00: MCNMCACHINGCFG_MC_2LM_REG:
en_2way: 0 prefer_way_sel: 0 chn_cap: 0xB nm_ratio_chn_cap: 0
C00: MCNMCACHINGOFFSET:
mcnmcachingoffsetlower: 0x2 mcnmcachingoffset: 0x3 mcnmcachingoffseten: 1
C01: CSR for force_lat bit : AMAP_MC_MAIN_REG: 0x52
C01: MCNMCACHINGINTLV:
nm_target_ways: 0 nm_chn_ways: 3 nm_target_lid: 0 nm_target_gran: 1 nm_chn_gran: 1 nm_chn_lid: 1
C01: MCNMCACHINGCFG_MC_2LM_REG:
en_2way: 0 prefer_way_sel: 0 chn_cap: 0xB nm_ratio_chn_cap: 0
C01: MCNMCACHINGOFFSET:
mcnmcachingoffsetlower: 0x2 mcnmcachingoffset: 0x3 mcnmcachingoffseten: 1
Write 2LM NM Decoder CSR's for HBM Stack 3 MC 1
C00: CSR for force_lat bit : AMAP_MC_MAIN_REG: 0x52
C00: MCNMCACHINGINTLV:
nm_target_ways: 0 nm_chn_ways: 3 nm_target_lid: 0 nm_target_gran: 1 nm_chn_gran: 1 nm_chn_lid: 2
C00: MCNMCACHINGCFG_MC_2LM_REG:
en_2way: 0 prefer_way_sel: 0 chn_cap: 0xB nm_ratio_chn_cap: 0
C00: MCNMCACHINGOFFSET:
mcnmcachingoffsetlower: 0x2 mcnmcachingoffset: 0x3 mcnmcachingoffseten: 1
C01: CSR for force_lat bit : AMAP_MC_MAIN_REG: 0x52
C01: MCNMCACHINGINTLV:
nm_target_ways: 0 nm_chn_ways: 3 nm_target_lid: 0 nm_target_gran: 1 nm_chn_gran: 1 nm_chn_lid: 3
C01: MCNMCACHINGCFG_MC_2LM_REG:
en_2way: 0 prefer_way_sel: 0 chn_cap: 0xB nm_ratio_chn_cap: 0
C01: MCNMCACHINGOFFSET:
mcnmcachingoffsetlower: 0x2 mcnmcachingoffset: 0x3 mcnmcachingoffseten: 1
Write 2LM NM Decoder CSR's for HBM Stack 3 MC 2
C00: CSR for force_lat bit : AMAP_MC_MAIN_REG: 0x52
C00: MCNMCACHINGINTLV:
nm_target_ways: 0 nm_chn_ways: 3 nm_target_lid: 0 nm_target_gran: 1 nm_chn_gran: 1 nm_chn_lid: 4
C00: MCNMCACHINGCFG_MC_2LM_REG:
en_2way: 0 prefer_way_sel: 0 chn_cap: 0xB nm_ratio_chn_cap: 0
C00: MCNMCACHINGOFFSET:
mcnmcachingoffsetlower: 0x2 mcnmcachingoffset: 0x3 mcnmcachingoffseten: 1
C01: CSR for force_lat bit : AMAP_MC_MAIN_REG: 0x52
C01: MCNMCACHINGINTLV:
nm_target_ways: 0 nm_chn_ways: 3 nm_target_lid: 0 nm_target_gran: 1 nm_chn_gran: 1 nm_chn_lid: 5
C01: MCNMCACHINGCFG_MC_2LM_REG:
en_2way: 0 prefer_way_sel: 0 chn_cap: 0xB nm_ratio_chn_cap: 0
C01: MCNMCACHINGOFFSET:
mcnmcachingoffsetlower: 0x2 mcnmcachingoffset: 0x3 mcnmcachingoffseten: 1
Write 2LM NM Decoder CSR's for HBM Stack 3 MC 3
C00: CSR for force_lat bit : AMAP_MC_MAIN_REG: 0x52
C00: MCNMCACHINGINTLV:
nm_target_ways: 0 nm_chn_ways: 3 nm_target_lid: 0 nm_target_gran: 1 nm_chn_gran: 1 nm_chn_lid: 6
C00: MCNMCACHINGCFG_MC_2LM_REG:
en_2way: 0 prefer_way_sel: 0 chn_cap: 0xB nm_ratio_chn_cap: 0
C00: MCNMCACHINGOFFSET:
mcnmcachingoffsetlower: 0x2 mcnmcachingoffset: 0x3 mcnmcachingoffseten: 1
C01: CSR for force_lat bit : AMAP_MC_MAIN_REG: 0x52
C01: MCNMCACHINGINTLV:
nm_target_ways: 0 nm_chn_ways: 3 nm_target_lid: 0 nm_target_gran: 1 nm_chn_gran: 1 nm_chn_lid: 7
C01: MCNMCACHINGCFG_MC_2LM_REG:
en_2way: 0 prefer_way_sel: 0 chn_cap: 0xB nm_ratio_chn_cap: 0
C01: MCNMCACHINGOFFSET:
mcnmcachingoffsetlower: 0x2 mcnmcachingoffset: 0x3 mcnmcachingoffseten: 1
Write 2LM FM Decoder CSR's for HBM Stack 3 MC 0 TAD 0
C00: DRAM_RULE[0]:
rule_enable: 1 limit: 0x81F fm_target: 0 fm_chn_ways: 0 fm_chn_gran: 1 fm_target_ways: 0 fm_gran_eq: 0 fm_chn_l2pid: 0x00000000
C01: DRAM_RULE[0]:
rule_enable: 1 limit: 0x81F fm_target: 0 fm_chn_ways: 0 fm_chn_gran: 1 fm_target_ways: 0 fm_gran_eq: 0 fm_chn_l2pid: 0x00000000
Write 2LM FM Decoder CSR's for HBM Stack 3 MC 1 TAD 0
C00: DRAM_RULE[0]:
rule_enable: 1 limit: 0x81F fm_target: 0 fm_chn_ways: 0 fm_chn_gran: 1 fm_target_ways: 0 fm_gran_eq: 0 fm_chn_l2pid: 0x00000000
C01: DRAM_RULE[0]:
rule_enable: 1 limit: 0x81F fm_target: 0 fm_chn_ways: 0 fm_chn_gran: 1 fm_target_ways: 0 fm_gran_eq: 0 fm_chn_l2pid: 0x00000000
Write 2LM FM Decoder CSR's for HBM Stack 3 MC 2 TAD 0
C00: DRAM_RULE[0]:
rule_enable: 1 limit: 0x81F fm_target: 0 fm_chn_ways: 0 fm_chn_gran: 1 fm_target_ways: 0 fm_gran_eq: 0 fm_chn_l2pid: 0x00000000
C01: DRAM_RULE[0]:
rule_enable: 1 limit: 0x81F fm_target: 0 fm_chn_ways: 0 fm_chn_gran: 1 fm_target_ways: 0 fm_gran_eq: 0 fm_chn_l2pid: 0x00000000
Write 2LM FM Decoder CSR's for HBM Stack 3 MC 3 TAD 0
C00: DRAM_RULE[0]:
rule_enable: 1 limit: 0x81F fm_target: 0 fm_chn_ways: 0 fm_chn_gran: 1 fm_target_ways: 0 fm_gran_eq: 0 fm_chn_l2pid: 0x00000000
C01: DRAM_RULE[0]:
rule_enable: 1 limit: 0x81F fm_target: 0 fm_chn_ways: 0 fm_chn_gran: 1 fm_target_ways: 0 fm_gran_eq: 0 fm_chn_l2pid: 0x00000000
Checkpoint Code: Socket 0, 0xBB, 0x08, 0x0000
^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^
Write RIR CSRs for Socket: 0
^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^
Channel - 0
RIRWAYNESSLIMIT_0_MC_MAIN_REG
rir_val: 1 rir_limit: 0x1F rir_way: 0x0
RIRILV0OFFSET_0_MC_MAIN_REG
rir_rnk_tgt0: 0x0 rir_offset0: 0x0
RIRILV1OFFSET_0_MC_MAIN_REG
rir_rnk_tgt0: 0x0 rir_offset0: 0x0
RIRILV2OFFSET_0_MC_MAIN_REG
rir_rnk_tgt0: 0x0 rir_offset0: 0x0
RIRILV3OFFSET_0_MC_MAIN_REG
rir_rnk_tgt0: 0x0 rir_offset0: 0x0
RIRILV4OFFSET_0_MC_MAIN_REG
rir_rnk_tgt0: 0x0 rir_offset0: 0x0
RIRILV5OFFSET_0_MC_MAIN_REG
rir_rnk_tgt0: 0x0 rir_offset0: 0x0
RIRILV6OFFSET_0_MC_MAIN_REG
rir_rnk_tgt0: 0x0 rir_offset0: 0x0
RIRILV7OFFSET_0_MC_MAIN_REG
rir_rnk_tgt0: 0x0 rir_offset0: 0x0
RIRWAYNESSLIMIT_1_MC_MAIN_REG
rir_val: 0 rir_limit: 0x1F rir_way: 0x0
RIRILV0OFFSET_1_MC_MAIN_REG
rir_rnk_tgt0: 0x0 rir_offset0: 0x0
RIRILV1OFFSET_1_MC_MAIN_REG
rir_rnk_tgt0: 0x0 rir_offset0: 0x0
RIRILV2OFFSET_1_MC_MAIN_REG
rir_rnk_tgt0: 0x0 rir_offset0: 0x0
RIRILV3OFFSET_1_MC_MAIN_REG
rir_rnk_tgt0: 0x0 rir_offset0: 0x0
RIRILV4OFFSET_1_MC_MAIN_REG
rir_rnk_tgt0: 0x0 rir_offset0: 0x0
RIRILV5OFFSET_1_MC_MAIN_REG
rir_rnk_tgt0: 0x0 rir_offset0: 0x0
RIRILV6OFFSET_1_MC_MAIN_REG
rir_rnk_tgt0: 0x0 rir_offset0: 0x0
RIRILV7OFFSET_1_MC_MAIN_REG
rir_rnk_tgt0: 0x0 rir_offset0: 0x0
RIRWAYNESSLIMIT_2_MC_MAIN_REG
rir_val: 0 rir_limit: 0x1F rir_way: 0x0
RIRILV0OFFSET_2_MC_MAIN_REG
rir_rnk_tgt0: 0x0 rir_offset0: 0x0
RIRILV1OFFSET_2_MC_MAIN_REG
rir_rnk_tgt0: 0x0 rir_offset0: 0x0
RIRILV2OFFSET_2_MC_MAIN_REG
rir_rnk_tgt0: 0x0 rir_offset0: 0x0
RIRILV3OFFSET_2_MC_MAIN_REG
rir_rnk_tgt0: 0x0 rir_offset0: 0x0
RIRILV4OFFSET_2_MC_MAIN_REG
rir_rnk_tgt0: 0x0 rir_offset0: 0x0
RIRILV5OFFSET_2_MC_MAIN_REG
rir_rnk_tgt0: 0x0 rir_offset0: 0x0
RIRILV6OFFSET_2_MC_MAIN_REG
rir_rnk_tgt0: 0x0 rir_offset0: 0x0
RIRILV7OFFSET_2_MC_MAIN_REG
rir_rnk_tgt0: 0x0 rir_offset0: 0x0
RIRWAYNESSLIMIT_3_MC_MAIN_REG
rir_val: 0 rir_limit: 0x1F rir_way: 0x0
RIRILV0OFFSET_3_MC_MAIN_REG
rir_rnk_tgt0: 0x0 rir_offset0: 0x0
RIRILV1OFFSET_3_MC_MAIN_REG
rir_rnk_tgt0: 0x0 rir_offset0: 0x0
RIRILV2OFFSET_3_MC_MAIN_REG
rir_rnk_tgt0: 0x0 rir_offset0: 0x0
RIRILV3OFFSET_3_MC_MAIN_REG
rir_rnk_tgt0: 0x0 rir_offset0: 0x0
RIRILV4OFFSET_3_MC_MAIN_REG
rir_rnk_tgt0: 0x0 rir_offset0: 0x0
RIRILV5OFFSET_3_MC_MAIN_REG
rir_rnk_tgt0: 0x0 rir_offset0: 0x0
RIRILV6OFFSET_3_MC_MAIN_REG
rir_rnk_tgt0: 0x0 rir_offset0: 0x0
RIRILV7OFFSET_3_MC_MAIN_REG
rir_rnk_tgt0: 0x0 rir_offset0: 0x0
Channel - 2
RIRWAYNESSLIMIT_0_MC_MAIN_REG
rir_val: 1 rir_limit: 0x1F rir_way: 0x0
RIRILV0OFFSET_0_MC_MAIN_REG
rir_rnk_tgt0: 0x0 rir_offset0: 0x0
RIRILV1OFFSET_0_MC_MAIN_REG
rir_rnk_tgt0: 0x0 rir_offset0: 0x0
RIRILV2OFFSET_0_MC_MAIN_REG
rir_rnk_tgt0: 0x0 rir_offset0: 0x0
RIRILV3OFFSET_0_MC_MAIN_REG
rir_rnk_tgt0: 0x0 rir_offset0: 0x0
RIRILV4OFFSET_0_MC_MAIN_REG
rir_rnk_tgt0: 0x0 rir_offset0: 0x0
RIRILV5OFFSET_0_MC_MAIN_REG
rir_rnk_tgt0: 0x0 rir_offset0: 0x0
RIRILV6OFFSET_0_MC_MAIN_REG
rir_rnk_tgt0: 0x0 rir_offset0: 0x0
RIRILV7OFFSET_0_MC_MAIN_REG
rir_rnk_tgt0: 0x0 rir_offset0: 0x0
RIRWAYNESSLIMIT_1_MC_MAIN_REG
rir_val: 0 rir_limit: 0x1F rir_way: 0x0
RIRILV0OFFSET_1_MC_MAIN_REG
rir_rnk_tgt0: 0x0 rir_offset0: 0x0
RIRILV1OFFSET_1_MC_MAIN_REG
rir_rnk_tgt0: 0x0 rir_offset0: 0x0
RIRILV2OFFSET_1_MC_MAIN_REG
rir_rnk_tgt0: 0x0 rir_offset0: 0x0
RIRILV3OFFSET_1_MC_MAIN_REG
rir_rnk_tgt0: 0x0 rir_offset0: 0x0
RIRILV4OFFSET_1_MC_MAIN_REG
rir_rnk_tgt0: 0x0 rir_offset0: 0x0
RIRILV5OFFSET_1_MC_MAIN_REG
rir_rnk_tgt0: 0x0 rir_offset0: 0x0
RIRILV6OFFSET_1_MC_MAIN_REG
rir_rnk_tgt0: 0x0 rir_offset0: 0x0
RIRILV7OFFSET_1_MC_MAIN_REG
rir_rnk_tgt0: 0x0 rir_offset0: 0x0
RIRWAYNESSLIMIT_2_MC_MAIN_REG
rir_val: 0 rir_limit: 0x1F rir_way: 0x0
RIRILV0OFFSET_2_MC_MAIN_REG
rir_rnk_tgt0: 0x0 rir_offset0: 0x0
RIRILV1OFFSET_2_MC_MAIN_REG
rir_rnk_tgt0: 0x0 rir_offset0: 0x0
RIRILV2OFFSET_2_MC_MAIN_REG
rir_rnk_tgt0: 0x0 rir_offset0: 0x0
RIRILV3OFFSET_2_MC_MAIN_REG
rir_rnk_tgt0: 0x0 rir_offset0: 0x0
RIRILV4OFFSET_2_MC_MAIN_REG
rir_rnk_tgt0: 0x0 rir_offset0: 0x0
RIRILV5OFFSET_2_MC_MAIN_REG
rir_rnk_tgt0: 0x0 rir_offset0: 0x0
RIRILV6OFFSET_2_MC_MAIN_REG
rir_rnk_tgt0: 0x0 rir_offset0: 0x0
RIRILV7OFFSET_2_MC_MAIN_REG
rir_rnk_tgt0: 0x0 rir_offset0: 0x0
RIRWAYNESSLIMIT_3_MC_MAIN_REG
rir_val: 0 rir_limit: 0x1F rir_way: 0x0
RIRILV0OFFSET_3_MC_MAIN_REG
rir_rnk_tgt0: 0x0 rir_offset0: 0x0
RIRILV1OFFSET_3_MC_MAIN_REG
rir_rnk_tgt0: 0x0 rir_offset0: 0x0
RIRILV2OFFSET_3_MC_MAIN_REG
rir_rnk_tgt0: 0x0 rir_offset0: 0x0
RIRILV3OFFSET_3_MC_MAIN_REG
rir_rnk_tgt0: 0x0 rir_offset0: 0x0
RIRILV4OFFSET_3_MC_MAIN_REG
rir_rnk_tgt0: 0x0 rir_offset0: 0x0
RIRILV5OFFSET_3_MC_MAIN_REG
rir_rnk_tgt0: 0x0 rir_offset0: 0x0
RIRILV6OFFSET_3_MC_MAIN_REG
rir_rnk_tgt0: 0x0 rir_offset0: 0x0
RIRILV7OFFSET_3_MC_MAIN_REG
rir_rnk_tgt0: 0x0 rir_offset0: 0x0
Channel - 4
RIRWAYNESSLIMIT_0_MC_MAIN_REG
rir_val: 1 rir_limit: 0x1F rir_way: 0x0
RIRILV0OFFSET_0_MC_MAIN_REG
rir_rnk_tgt0: 0x0 rir_offset0: 0x0
RIRILV1OFFSET_0_MC_MAIN_REG
rir_rnk_tgt0: 0x0 rir_offset0: 0x0
RIRILV2OFFSET_0_MC_MAIN_REG
rir_rnk_tgt0: 0x0 rir_offset0: 0x0
RIRILV3OFFSET_0_MC_MAIN_REG
rir_rnk_tgt0: 0x0 rir_offset0: 0x0
RIRILV4OFFSET_0_MC_MAIN_REG
rir_rnk_tgt0: 0x0 rir_offset0: 0x0
RIRILV5OFFSET_0_MC_MAIN_REG
rir_rnk_tgt0: 0x0 rir_offset0: 0x0
RIRILV6OFFSET_0_MC_MAIN_REG
rir_rnk_tgt0: 0x0 rir_offset0: 0x0
RIRILV7OFFSET_0_MC_MAIN_REG
rir_rnk_tgt0: 0x0 rir_offset0: 0x0
RIRWAYNESSLIMIT_1_MC_MAIN_REG
rir_val: 0 rir_limit: 0x1F rir_way: 0x0
RIRILV0OFFSET_1_MC_MAIN_REG
rir_rnk_tgt0: 0x0 rir_offset0: 0x0
RIRILV1OFFSET_1_MC_MAIN_REG
rir_rnk_tgt0: 0x0 rir_offset0: 0x0
RIRILV2OFFSET_1_MC_MAIN_REG
rir_rnk_tgt0: 0x0 rir_offset0: 0x0
RIRILV3OFFSET_1_MC_MAIN_REG
rir_rnk_tgt0: 0x0 rir_offset0: 0x0
RIRILV4OFFSET_1_MC_MAIN_REG
rir_rnk_tgt0: 0x0 rir_offset0: 0x0
RIRILV5OFFSET_1_MC_MAIN_REG
rir_rnk_tgt0: 0x0 rir_offset0: 0x0
RIRILV6OFFSET_1_MC_MAIN_REG
rir_rnk_tgt0: 0x0 rir_offset0: 0x0
RIRILV7OFFSET_1_MC_MAIN_REG
rir_rnk_tgt0: 0x0 rir_offset0: 0x0
RIRWAYNESSLIMIT_2_MC_MAIN_REG
rir_val: 0 rir_limit: 0x1F rir_way: 0x0
RIRILV0OFFSET_2_MC_MAIN_REG
rir_rnk_tgt0: 0x0 rir_offset0: 0x0
RIRILV1OFFSET_2_MC_MAIN_REG
rir_rnk_tgt0: 0x0 rir_offset0: 0x0
RIRILV2OFFSET_2_MC_MAIN_REG
rir_rnk_tgt0: 0x0 rir_offset0: 0x0
RIRILV3OFFSET_2_MC_MAIN_REG
rir_rnk_tgt0: 0x0 rir_offset0: 0x0
RIRILV4OFFSET_2_MC_MAIN_REG
rir_rnk_tgt0: 0x0 rir_offset0: 0x0
RIRILV5OFFSET_2_MC_MAIN_REG
rir_rnk_tgt0: 0x0 rir_offset0: 0x0
RIRILV6OFFSET_2_MC_MAIN_REG
rir_rnk_tgt0: 0x0 rir_offset0: 0x0
RIRILV7OFFSET_2_MC_MAIN_REG
rir_rnk_tgt0: 0x0 rir_offset0: 0x0
RIRWAYNESSLIMIT_3_MC_MAIN_REG
rir_val: 0 rir_limit: 0x1F rir_way: 0x0
RIRILV0OFFSET_3_MC_MAIN_REG
rir_rnk_tgt0: 0x0 rir_offset0: 0x0
RIRILV1OFFSET_3_MC_MAIN_REG
rir_rnk_tgt0: 0x0 rir_offset0: 0x0
RIRILV2OFFSET_3_MC_MAIN_REG
rir_rnk_tgt0: 0x0 rir_offset0: 0x0
RIRILV3OFFSET_3_MC_MAIN_REG
rir_rnk_tgt0: 0x0 rir_offset0: 0x0
RIRILV4OFFSET_3_MC_MAIN_REG
rir_rnk_tgt0: 0x0 rir_offset0: 0x0
RIRILV5OFFSET_3_MC_MAIN_REG
rir_rnk_tgt0: 0x0 rir_offset0: 0x0
RIRILV6OFFSET_3_MC_MAIN_REG
rir_rnk_tgt0: 0x0 rir_offset0: 0x0
RIRILV7OFFSET_3_MC_MAIN_REG
rir_rnk_tgt0: 0x0 rir_offset0: 0x0
Channel - 6
RIRWAYNESSLIMIT_0_MC_MAIN_REG
rir_val: 1 rir_limit: 0x1F rir_way: 0x0
RIRILV0OFFSET_0_MC_MAIN_REG
rir_rnk_tgt0: 0x0 rir_offset0: 0x0
RIRILV1OFFSET_0_MC_MAIN_REG
rir_rnk_tgt0: 0x0 rir_offset0: 0x0
RIRILV2OFFSET_0_MC_MAIN_REG
rir_rnk_tgt0: 0x0 rir_offset0: 0x0
RIRILV3OFFSET_0_MC_MAIN_REG
rir_rnk_tgt0: 0x0 rir_offset0: 0x0
RIRILV4OFFSET_0_MC_MAIN_REG
rir_rnk_tgt0: 0x0 rir_offset0: 0x0
RIRILV5OFFSET_0_MC_MAIN_REG
rir_rnk_tgt0: 0x0 rir_offset0: 0x0
RIRILV6OFFSET_0_MC_MAIN_REG
rir_rnk_tgt0: 0x0 rir_offset0: 0x0
RIRILV7OFFSET_0_MC_MAIN_REG
rir_rnk_tgt0: 0x0 rir_offset0: 0x0
RIRWAYNESSLIMIT_1_MC_MAIN_REG
rir_val: 0 rir_limit: 0x1F rir_way: 0x0
RIRILV0OFFSET_1_MC_MAIN_REG
rir_rnk_tgt0: 0x0 rir_offset0: 0x0
RIRILV1OFFSET_1_MC_MAIN_REG
rir_rnk_tgt0: 0x0 rir_offset0: 0x0
RIRILV2OFFSET_1_MC_MAIN_REG
rir_rnk_tgt0: 0x0 rir_offset0: 0x0
RIRILV3OFFSET_1_MC_MAIN_REG
rir_rnk_tgt0: 0x0 rir_offset0: 0x0
RIRILV4OFFSET_1_MC_MAIN_REG
rir_rnk_tgt0: 0x0 rir_offset0: 0x0
RIRILV5OFFSET_1_MC_MAIN_REG
rir_rnk_tgt0: 0x0 rir_offset0: 0x0
RIRILV6OFFSET_1_MC_MAIN_REG
rir_rnk_tgt0: 0x0 rir_offset0: 0x0
RIRILV7OFFSET_1_MC_MAIN_REG
rir_rnk_tgt0: 0x0 rir_offset0: 0x0
RIRWAYNESSLIMIT_2_MC_MAIN_REG
rir_val: 0 rir_limit: 0x1F rir_way: 0x0
RIRILV0OFFSET_2_MC_MAIN_REG
rir_rnk_tgt0: 0x0 rir_offset0: 0x0
RIRILV1OFFSET_2_MC_MAIN_REG
rir_rnk_tgt0: 0x0 rir_offset0: 0x0
RIRILV2OFFSET_2_MC_MAIN_REG
rir_rnk_tgt0: 0x0 rir_offset0: 0x0
RIRILV3OFFSET_2_MC_MAIN_REG
rir_rnk_tgt0: 0x0 rir_offset0: 0x0
RIRILV4OFFSET_2_MC_MAIN_REG
rir_rnk_tgt0: 0x0 rir_offset0: 0x0
RIRILV5OFFSET_2_MC_MAIN_REG
rir_rnk_tgt0: 0x0 rir_offset0: 0x0
RIRILV6OFFSET_2_MC_MAIN_REG
rir_rnk_tgt0: 0x0 rir_offset0: 0x0
RIRILV7OFFSET_2_MC_MAIN_REG
rir_rnk_tgt0: 0x0 rir_offset0: 0x0
RIRWAYNESSLIMIT_3_MC_MAIN_REG
rir_val: 0 rir_limit: 0x1F rir_way: 0x0
RIRILV0OFFSET_3_MC_MAIN_REG
rir_rnk_tgt0: 0x0 rir_offset0: 0x0
RIRILV1OFFSET_3_MC_MAIN_REG
rir_rnk_tgt0: 0x0 rir_offset0: 0x0
RIRILV2OFFSET_3_MC_MAIN_REG
rir_rnk_tgt0: 0x0 rir_offset0: 0x0
RIRILV3OFFSET_3_MC_MAIN_REG
rir_rnk_tgt0: 0x0 rir_offset0: 0x0
RIRILV4OFFSET_3_MC_MAIN_REG
rir_rnk_tgt0: 0x0 rir_offset0: 0x0
RIRILV5OFFSET_3_MC_MAIN_REG
rir_rnk_tgt0: 0x0 rir_offset0: 0x0
RIRILV6OFFSET_3_MC_MAIN_REG
rir_rnk_tgt0: 0x0 rir_offset0: 0x0
RIRILV7OFFSET_3_MC_MAIN_REG
rir_rnk_tgt0: 0x0 rir_offset0: 0x0
^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^
Write CHA CSRs for Socket: 0
^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^
TWO_LM_CONFIG_CHA_PMA_REG
enable: 0x1 mask: 0x3F mask_hi: 0x0
HA_COH_CHABC_SAD1_REG
dis_spec_rd: 0x0
lowMemBase: 0x0
lowMemSize: 0x20
highMemBase: 0x40
highMemSize: 0xFE0
TOLM: 0x1F
TOHM: 0x101F
C00: CSR for wait4bothhalves bit: AMAP_MC_MAIN_REG: 0x49
C00: CSR for wait4bothhalves bit: AMAP_MC_MAIN_REG: 0x49
C00: CSR for wait4bothhalves bit: AMAP_MC_MAIN_REG: 0x49
C00: CSR for wait4bothhalves bit: AMAP_MC_MAIN_REG: 0x49
Checkpoint Code: Socket 0, 0xBB, 0x06, 0x0001
^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^
Write CHA Remote SAD CSRs for Socket: 1
^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^
En Base Limit NodeId Attr
1 0x00000 0x0081F 0x0 0x3
^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^
Write CHA SAD CSRs for Socket: 1
^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^
CHA unlock DRAM cluster 0 snc_lock bits: 0xE
Program Channel Interleaves
rt0_interleave_mode: 7
rt1_interleave_shift: 7
rt2_interleave_shift: 2
Program CSRs for SAD Rule 0 (HBM 2LM DDR)
En Limit Mode Attr NMCacheable
1 0x00A1F 0x1 0x3 1
Interleave List: 0x0000000088888888
Single Target: H0 Index 0
DRAM_RULE_CFG2: cxl_accelerator_mem Durable_mem_en cxl_mem_expander NXM
0 0 0 0
TgtRt: 00 ChnRt: 00
Program target config: 00000000
Program channel config: 00000000
Program Mode config.
H0 DramRt0Mode0Cfg: 00000006
H0 DramRt0Mode1Cfg: 00000000
H1 DramRt0Mode0Cfg: 00000000
H1 DramRt0Mode1Cfg: 00000000
H0 DramRt1Mode0Cfg: 00000000
H0 DramRt1Mode1Cfg: 00000000
H1 DramRt1Mode0Cfg: 00000000
H1 DramRt1Mode1Cfg: 00000000
H0 DramRt2Mode0Cfg: 00000000
H0 DramRt2Mode1Cfg: 00000000
H1 DramRt2Mode0Cfg: 00000000
H1 DramRt2Mode1Cfg: 00000000
CHA unlock DRAM cluster 1 snc_lock bits: 0xD
Program Channel Interleaves
rt0_interleave_mode: 7
rt1_interleave_shift: 7
rt2_interleave_shift: 2
Program CSRs for SAD Rule 0 (HBM 2LM DDR)
En Limit Mode Attr NMCacheable
1 0x00C1F 0x1 0x3 1
Interleave List: 0x0000000088888888
Single Target: H0 Index 0
DRAM_RULE_CFG2: cxl_accelerator_mem Durable_mem_en cxl_mem_expander NXM
0 0 0 0
TgtRt: 00 ChnRt: 00
Program target config: 00000000
Program channel config: 00000000
Program Mode config.
H0 DramRt0Mode0Cfg: 00000006
H0 DramRt0Mode1Cfg: 00000000
H1 DramRt0Mode0Cfg: 00000000
H1 DramRt0Mode1Cfg: 00000000
H0 DramRt1Mode0Cfg: 00000000
H0 DramRt1Mode1Cfg: 00000000
H1 DramRt1Mode0Cfg: 00000000
H1 DramRt1Mode1Cfg: 00000000
H0 DramRt2Mode0Cfg: 00000000
H0 DramRt2Mode1Cfg: 00000000
H1 DramRt2Mode0Cfg: 00000000
H1 DramRt2Mode1Cfg: 00000000
CHA unlock DRAM cluster 2 snc_lock bits: 0xB
Program Channel Interleaves
rt0_interleave_mode: 7
rt1_interleave_shift: 7
rt2_interleave_shift: 2
Program CSRs for SAD Rule 0 (HBM 2LM DDR)
En Limit Mode Attr NMCacheable
1 0x00E1F 0x1 0x3 1
Interleave List: 0x0000000088888888
Single Target: H0 Index 0
DRAM_RULE_CFG2: cxl_accelerator_mem Durable_mem_en cxl_mem_expander NXM
0 0 0 0
TgtRt: 00 ChnRt: 00
Program target config: 00000000
Program channel config: 00000000
Program Mode config.
H0 DramRt0Mode0Cfg: 00000006
H0 DramRt0Mode1Cfg: 00000000
H1 DramRt0Mode0Cfg: 00000000
H1 DramRt0Mode1Cfg: 00000000
H0 DramRt1Mode0Cfg: 00000000
H0 DramRt1Mode1Cfg: 00000000
H1 DramRt1Mode0Cfg: 00000000
H1 DramRt1Mode1Cfg: 00000000
H0 DramRt2Mode0Cfg: 00000000
H0 DramRt2Mode1Cfg: 00000000
H1 DramRt2Mode0Cfg: 00000000
H1 DramRt2Mode1Cfg: 00000000
CHA unlock DRAM cluster 3 snc_lock bits: 0x7
Program Channel Interleaves
rt0_interleave_mode: 7
rt1_interleave_shift: 7
rt2_interleave_shift: 2
Program CSRs for SAD Rule 0 (HBM 2LM DDR)
En Limit Mode Attr NMCacheable
1 0x0101F 0x1 0x3 1
Interleave List: 0x0000000088888888
Single Target: H0 Index 0
DRAM_RULE_CFG2: cxl_accelerator_mem Durable_mem_en cxl_mem_expander NXM
0 0 0 0
TgtRt: 00 ChnRt: 00
Program target config: 00000000
Program channel config: 00000000
Program Mode config.
H0 DramRt0Mode0Cfg: 00000006
H0 DramRt0Mode1Cfg: 00000000
H1 DramRt0Mode0Cfg: 00000000
H1 DramRt0Mode1Cfg: 00000000
H0 DramRt1Mode0Cfg: 00000000
H0 DramRt1Mode1Cfg: 00000000
H1 DramRt1Mode0Cfg: 00000000
H1 DramRt1Mode1Cfg: 00000000
H0 DramRt2Mode0Cfg: 00000000
H0 DramRt2Mode1Cfg: 00000000
H1 DramRt2Mode0Cfg: 00000000
H1 DramRt2Mode1Cfg: 00000000
CHA lock all DRAM clusters snc_lock bits: 0xF
^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^
Write Route Table CSRs for Socket: 1
^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^
CSR: Cluster 0 H0_CH_ROUTE_TABLE_0 - 0x0 0x1 0x0 0x1 0x0 0x1 0x0 0x1
CSR: Cluster 0 H0_TGT_ROUTE_TABLE_0 - 0x4 0x4 0x5 0x5 0x6 0x6 0x7 0x7
CSR: Cluster 0 H1_CH_ROUTE_TABLE_0 - 0x0 0x0 0x0 0x0 0x0 0x0 0x0 0x0
CSR: Cluster 0 H1_TGT_ROUTE_TABLE_0 - 0x0 0x0 0x0 0x0 0x0 0x0 0x0 0x0
CSR: Cluster 1 H0_CH_ROUTE_TABLE_0 - 0x0 0x1 0x0 0x1 0x0 0x1 0x0 0x1
CSR: Cluster 1 H0_TGT_ROUTE_TABLE_0 - 0x4 0x4 0x5 0x5 0x6 0x6 0x7 0x7
CSR: Cluster 1 H1_CH_ROUTE_TABLE_0 - 0x0 0x0 0x0 0x0 0x0 0x0 0x0 0x0
CSR: Cluster 1 H1_TGT_ROUTE_TABLE_0 - 0x0 0x0 0x0 0x0 0x0 0x0 0x0 0x0
CSR: Cluster 2 H0_CH_ROUTE_TABLE_0 - 0x0 0x1 0x0 0x1 0x0 0x1 0x0 0x1
CSR: Cluster 2 H0_TGT_ROUTE_TABLE_0 - 0x7 0x7 0x6 0x6 0x5 0x5 0x4 0x4
CSR: Cluster 2 H1_CH_ROUTE_TABLE_0 - 0x0 0x0 0x0 0x0 0x0 0x0 0x0 0x0
CSR: Cluster 2 H1_TGT_ROUTE_TABLE_0 - 0x0 0x0 0x0 0x0 0x0 0x0 0x0 0x0
CSR: Cluster 3 H0_CH_ROUTE_TABLE_0 - 0x0 0x1 0x0 0x1 0x0 0x1 0x0 0x1
CSR: Cluster 3 H0_TGT_ROUTE_TABLE_0 - 0x7 0x7 0x6 0x6 0x5 0x5 0x4 0x4
CSR: Cluster 3 H1_CH_ROUTE_TABLE_0 - 0x0 0x0 0x0 0x0 0x0 0x0 0x0 0x0
CSR: Cluster 3 H1_TGT_ROUTE_TABLE_0 - 0x0 0x0 0x0 0x0 0x0 0x0 0x0 0x0
^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^
Write MESH2MEM CSRs for Socket: 1
^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^
Memory Controller : 0
------------------------
DEFEATURES0_M2MEM_MAIN_REG
wrcmpfromnm: 1
MODE_M2MEM_MAIN_REG
nmcaching:0x1 pmem:0x0 blockregion:0x0 in-tile caching: 0x1
Memory Controller : 1
------------------------
DEFEATURES0_M2MEM_MAIN_REG
wrcmpfromnm: 1
MODE_M2MEM_MAIN_REG
nmcaching:0x1 pmem:0x0 blockregion:0x0 in-tile caching: 0x1
Memory Controller : 2
------------------------
DEFEATURES0_M2MEM_MAIN_REG
wrcmpfromnm: 1
MODE_M2MEM_MAIN_REG
nmcaching:0x1 pmem:0x0 blockregion:0x0 in-tile caching: 0x1
Memory Controller : 3
------------------------
DEFEATURES0_M2MEM_MAIN_REG
wrcmpfromnm: 1
MODE_M2MEM_MAIN_REG
nmcaching:0x1 pmem:0x0 blockregion:0x0 in-tile caching: 0x1
MC: 0
tadid:0x0 tadvld:0x1 pmemvld:0x0 blkvld:0x0 ddr4tadid:0x0 ddrttadid:0x0 ddr4:0x1 nmcacheablevld:0x0 mirror:0x0 secondary1st:0x0 frcnpwr:0x0 spare:0x0 addresslimit[51:26]:0xA1F nonpersistentfm:0x1
MC: 1
tadid:0x0 tadvld:0x1 pmemvld:0x0 blkvld:0x0 ddr4tadid:0x0 ddrttadid:0x0 ddr4:0x1 nmcacheablevld:0x0 mirror:0x0 secondary1st:0x0 frcnpwr:0x0 spare:0x0 addresslimit[51:26]:0xC1F nonpersistentfm:0x1
MC: 2
tadid:0x0 tadvld:0x1 pmemvld:0x0 blkvld:0x0 ddr4tadid:0x0 ddrttadid:0x0 ddr4:0x1 nmcacheablevld:0x0 mirror:0x0 secondary1st:0x0 frcnpwr:0x0 spare:0x0 addresslimit[51:26]:0xE1F nonpersistentfm:0x1
MC: 3
tadid:0x0 tadvld:0x1 pmemvld:0x0 blkvld:0x0 ddr4tadid:0x0 ddrttadid:0x0 ddr4:0x1 nmcacheablevld:0x0 mirror:0x0 secondary1st:0x0 frcnpwr:0x0 spare:0x0 addresslimit[51:26]:0x101F nonpersistentfm:0x1
Programs feature registers for MC 0
Programs feature registers for MC 1
Programs feature registers for MC 2
Programs feature registers for MC 3
^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^
Write HBM MESH2MEM CSRs for Socket: 1
^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^
HBM Stack: 0
Mesh2Mem misc: nmcaching: 1 wrcmpfromnm: 1
Mesh2Mem TAD: tadid:0x0 ddrtadid:0x0 nmcacheablevld:0x1 addresslimit[51:26]:0xA1F
HBM Stack: 1
Mesh2Mem misc: nmcaching: 1 wrcmpfromnm: 1
Mesh2Mem TAD: tadid:0x0 ddrtadid:0x0 nmcacheablevld:0x1 addresslimit[51:26]:0xC1F
HBM Stack: 2
Mesh2Mem misc: nmcaching: 1 wrcmpfromnm: 1
Mesh2Mem TAD: tadid:0x0 ddrtadid:0x0 nmcacheablevld:0x1 addresslimit[51:26]:0xE1F
HBM Stack: 3
Mesh2Mem misc: nmcaching: 1 wrcmpfromnm: 1
Mesh2Mem TAD: tadid:0x0 ddrtadid:0x0 nmcacheablevld:0x1 addresslimit[51:26]:0x101F
Programs feature registers for MC 0
N1.C00: CSR : SYSFEATURES0_MC_2LM_REG: 0x10
N1.C01: CSR : SYSFEATURES0_MC_2LM_REG: 0x10
Programs feature registers for MC 1
N1.C00: CSR : SYSFEATURES0_MC_2LM_REG: 0x10
N1.C01: CSR : SYSFEATURES0_MC_2LM_REG: 0x10
Programs feature registers for MC 2
N1.C00: CSR : SYSFEATURES0_MC_2LM_REG: 0x10
N1.C01: CSR : SYSFEATURES0_MC_2LM_REG: 0x10
Programs feature registers for MC 3
N1.C00: CSR : SYSFEATURES0_MC_2LM_REG: 0x10
N1.C01: CSR : SYSFEATURES0_MC_2LM_REG: 0x10
Programs feature registers for MC 4
N1.C00: CSR : SYSFEATURES0_MC_2LM_REG: 0x10
N1.C01: CSR : SYSFEATURES0_MC_2LM_REG: 0x10
Programs feature registers for MC 5
N1.C00: CSR : SYSFEATURES0_MC_2LM_REG: 0x10
N1.C01: CSR : SYSFEATURES0_MC_2LM_REG: 0x10
Programs feature registers for MC 6
N1.C00: CSR : SYSFEATURES0_MC_2LM_REG: 0x10
N1.C01: CSR : SYSFEATURES0_MC_2LM_REG: 0x10
Programs feature registers for MC 7
N1.C00: CSR : SYSFEATURES0_MC_2LM_REG: 0x10
N1.C01: CSR : SYSFEATURES0_MC_2LM_REG: 0x10
Programs feature registers for MC 8
N1.C00: CSR : SYSFEATURES0_MC_2LM_REG: 0x10
N1.C01: CSR : SYSFEATURES0_MC_2LM_REG: 0x10
Programs feature registers for MC 9
N1.C00: CSR : SYSFEATURES0_MC_2LM_REG: 0x10
N1.C01: CSR : SYSFEATURES0_MC_2LM_REG: 0x10
Programs feature registers for MC 10
N1.C00: CSR : SYSFEATURES0_MC_2LM_REG: 0x10
N1.C01: CSR : SYSFEATURES0_MC_2LM_REG: 0x10
Programs feature registers for MC 11
N1.C00: CSR : SYSFEATURES0_MC_2LM_REG: 0x10
N1.C01: CSR : SYSFEATURES0_MC_2LM_REG: 0x10
Programs feature registers for MC 12
N1.C00: CSR : SYSFEATURES0_MC_2LM_REG: 0x10
N1.C01: CSR : SYSFEATURES0_MC_2LM_REG: 0x10
Programs feature registers for MC 13
N1.C00: CSR : SYSFEATURES0_MC_2LM_REG: 0x10
N1.C01: CSR : SYSFEATURES0_MC_2LM_REG: 0x10
Programs feature registers for MC 14
N1.C00: CSR : SYSFEATURES0_MC_2LM_REG: 0x10
N1.C01: CSR : SYSFEATURES0_MC_2LM_REG: 0x10
Programs feature registers for MC 15
N1.C00: CSR : SYSFEATURES0_MC_2LM_REG: 0x10
N1.C01: CSR : SYSFEATURES0_MC_2LM_REG: 0x10
Checkpoint Code: Socket 0, 0xBB, 0x07, 0x0001
^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^
Write TAD CSRs for Socket: 1
^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^
Write Patrol and Sparing CSR's for MC 0
C00: TADWAYNESS[0]:
target_lid: 0 chn_lid: 0 tad_limit: 0xA1F
C00: TADBASE[0]:
mirror_en: 0 en_failover: 0 ign_ptrl_uc: 0 base: 0x820
NM_DRAM_RULE[0]:
rule_enable: 1 limit: 0xA1F nm_chn_ways: 0 nm_chn_gran: 1 nm_target_ways: 0 nm_gran_eq: 0 nm_chn_l2pid: 0x00FFFFF8
Logical Ch Id: 0 1 2 3 4 5 6 7
Physical Ch Id: 0 7 7 7 7 7 7 7
C00: NM_DRAM_RULE[0]:
Write 1LM Decoder CSR's for MC 0
C00: TADCHNILVOFFSET[0]:
target_ways: 0 chn_ways: 0 target_gran: 1 chn_gran: 1 tad_offset: 0x820 tad_offset_sign: 0
C00: MCNMCACHINGCFG:
mcnmcachingenb: 0 mcpmemenb: 0 mcnmcachingpmemwt: 0
C01: MCNMCACHINGCFG:
mcnmcachingenb: 0 mcpmemenb: 0 mcnmcachingpmemwt: 0
Write Patrol and Sparing CSR's for MC 1
C00: TADWAYNESS[0]:
target_lid: 0 chn_lid: 0 tad_limit: 0xC1F
C00: TADBASE[0]:
mirror_en: 0 en_failover: 0 ign_ptrl_uc: 0 base: 0xA20
NM_DRAM_RULE[0]:
rule_enable: 1 limit: 0xC1F nm_chn_ways: 0 nm_chn_gran: 1 nm_target_ways: 0 nm_gran_eq: 0 nm_chn_l2pid: 0x00FFFFF8
Logical Ch Id: 0 1 2 3 4 5 6 7
Physical Ch Id: 0 7 7 7 7 7 7 7
C00: NM_DRAM_RULE[0]:
Write 1LM Decoder CSR's for MC 1
C00: TADCHNILVOFFSET[0]:
target_ways: 0 chn_ways: 0 target_gran: 1 chn_gran: 1 tad_offset: 0xA20 tad_offset_sign: 0
C00: MCNMCACHINGCFG:
mcnmcachingenb: 0 mcpmemenb: 0 mcnmcachingpmemwt: 0
C01: MCNMCACHINGCFG:
mcnmcachingenb: 0 mcpmemenb: 0 mcnmcachingpmemwt: 0
Write Patrol and Sparing CSR's for MC 2
C00: TADWAYNESS[0]:
target_lid: 0 chn_lid: 0 tad_limit: 0xE1F
C00: TADBASE[0]:
mirror_en: 0 en_failover: 0 ign_ptrl_uc: 0 base: 0xC20
NM_DRAM_RULE[0]:
rule_enable: 1 limit: 0xE1F nm_chn_ways: 0 nm_chn_gran: 1 nm_target_ways: 0 nm_gran_eq: 0 nm_chn_l2pid: 0x00FFFFF8
Logical Ch Id: 0 1 2 3 4 5 6 7
Physical Ch Id: 0 7 7 7 7 7 7 7
C00: NM_DRAM_RULE[0]:
Write 1LM Decoder CSR's for MC 2
C00: TADCHNILVOFFSET[0]:
target_ways: 0 chn_ways: 0 target_gran: 1 chn_gran: 1 tad_offset: 0xC20 tad_offset_sign: 0
C00: MCNMCACHINGCFG:
mcnmcachingenb: 0 mcpmemenb: 0 mcnmcachingpmemwt: 0
C01: MCNMCACHINGCFG:
mcnmcachingenb: 0 mcpmemenb: 0 mcnmcachingpmemwt: 0
Write Patrol and Sparing CSR's for MC 3
C00: TADWAYNESS[0]:
target_lid: 0 chn_lid: 0 tad_limit: 0x101F
C00: TADBASE[0]:
mirror_en: 0 en_failover: 0 ign_ptrl_uc: 0 base: 0xE20
NM_DRAM_RULE[0]:
rule_enable: 1 limit: 0x101F nm_chn_ways: 0 nm_chn_gran: 1 nm_target_ways: 0 nm_gran_eq: 0 nm_chn_l2pid: 0x00FFFFF8
Logical Ch Id: 0 1 2 3 4 5 6 7
Physical Ch Id: 0 7 7 7 7 7 7 7
C00: NM_DRAM_RULE[0]:
Write 1LM Decoder CSR's for MC 3
C00: TADCHNILVOFFSET[0]:
target_ways: 0 chn_ways: 0 target_gran: 1 chn_gran: 1 tad_offset: 0xE20 tad_offset_sign: 0
C00: MCNMCACHINGCFG:
mcnmcachingenb: 0 mcpmemenb: 0 mcnmcachingpmemwt: 0
C01: MCNMCACHINGCFG:
mcnmcachingenb: 0 mcpmemenb: 0 mcnmcachingpmemwt: 0
Write Patrol and Sparing TAD range CSR's for HBM Stack 0 MC 0
C00: TADWAYNESS[0]:
target_lid: 0 chn_lid: 0 tad_limit: 0x1F
C00: TADBASE[0]:
mirror_en: 0 en_failover: 0 ign_ptrl_uc: 0 base: 0x0
C01: TADWAYNESS[0]:
target_lid: 0 chn_lid: 1 tad_limit: 0x1F
C01: TADBASE[0]:
mirror_en: 0 en_failover: 0 ign_ptrl_uc: 0 base: 0x0
Write Patrol and Sparing TAD range CSR's for HBM Stack 0 MC 1
C00: TADWAYNESS[0]:
target_lid: 0 chn_lid: 2 tad_limit: 0x1F
C00: TADBASE[0]:
mirror_en: 0 en_failover: 0 ign_ptrl_uc: 0 base: 0x0
C01: TADWAYNESS[0]:
target_lid: 0 chn_lid: 3 tad_limit: 0x1F
C01: TADBASE[0]:
mirror_en: 0 en_failover: 0 ign_ptrl_uc: 0 base: 0x0
Write Patrol and Sparing TAD range CSR's for HBM Stack 0 MC 2
C00: TADWAYNESS[0]:
target_lid: 0 chn_lid: 4 tad_limit: 0x1F
C00: TADBASE[0]:
mirror_en: 0 en_failover: 0 ign_ptrl_uc: 0 base: 0x0
C01: TADWAYNESS[0]:
target_lid: 0 chn_lid: 5 tad_limit: 0x1F
C01: TADBASE[0]:
mirror_en: 0 en_failover: 0 ign_ptrl_uc: 0 base: 0x0
Write Patrol and Sparing TAD range CSR's for HBM Stack 0 MC 3
C00: TADWAYNESS[0]:
target_lid: 0 chn_lid: 6 tad_limit: 0x1F
C00: TADBASE[0]:
mirror_en: 0 en_failover: 0 ign_ptrl_uc: 0 base: 0x0
C01: TADWAYNESS[0]:
target_lid: 0 chn_lid: 7 tad_limit: 0x1F
C01: TADBASE[0]:
mirror_en: 0 en_failover: 0 ign_ptrl_uc: 0 base: 0x0
Write Hbm Nm Caching Tad CSR's for HBM Stack 0 MC 0
C00: MCNMCACHINGCFG 2LM TAD:
nmcachingtaden: 1 nmcachingtad: 0
C01: MCNMCACHINGCFG 2LM TAD:
nmcachingtaden: 1 nmcachingtad: 0
Write Hbm Nm Caching Tad CSR's for HBM Stack 0 MC 1
C00: MCNMCACHINGCFG 2LM TAD:
nmcachingtaden: 1 nmcachingtad: 0
C01: MCNMCACHINGCFG 2LM TAD:
nmcachingtaden: 1 nmcachingtad: 0
Write Hbm Nm Caching Tad CSR's for HBM Stack 0 MC 2
C00: MCNMCACHINGCFG 2LM TAD:
nmcachingtaden: 1 nmcachingtad: 0
C01: MCNMCACHINGCFG 2LM TAD:
nmcachingtaden: 1 nmcachingtad: 0
Write Hbm Nm Caching Tad CSR's for HBM Stack 0 MC 3
C00: MCNMCACHINGCFG 2LM TAD:
nmcachingtaden: 1 nmcachingtad: 0
C01: MCNMCACHINGCFG 2LM TAD:
nmcachingtaden: 1 nmcachingtad: 0
Write 1LM Decoder CSR's for HBM Stack 0 MC 0
C00: TADCHNILVOFFSET[0]:
target_ways: 0 chn_ways: 0 target_gran: 1 chn_gran: 1 tad_offset: 0x0 tad_offset_sign: 0
C01: TADCHNILVOFFSET[0]:
target_ways: 0 chn_ways: 0 target_gran: 1 chn_gran: 1 tad_offset: 0x0 tad_offset_sign: 0
Write 1LM Decoder CSR's for HBM Stack 0 MC 1
C00: TADCHNILVOFFSET[0]:
target_ways: 0 chn_ways: 0 target_gran: 1 chn_gran: 1 tad_offset: 0x0 tad_offset_sign: 0
C01: TADCHNILVOFFSET[0]:
target_ways: 0 chn_ways: 0 target_gran: 1 chn_gran: 1 tad_offset: 0x0 tad_offset_sign: 0
Write 1LM Decoder CSR's for HBM Stack 0 MC 2
C00: TADCHNILVOFFSET[0]:
target_ways: 0 chn_ways: 0 target_gran: 1 chn_gran: 1 tad_offset: 0x0 tad_offset_sign: 0
C01: TADCHNILVOFFSET[0]:
target_ways: 0 chn_ways: 0 target_gran: 1 chn_gran: 1 tad_offset: 0x0 tad_offset_sign: 0
Write 1LM Decoder CSR's for HBM Stack 0 MC 3
C00: TADCHNILVOFFSET[0]:
target_ways: 0 chn_ways: 0 target_gran: 1 chn_gran: 1 tad_offset: 0x0 tad_offset_sign: 0
C01: TADCHNILVOFFSET[0]:
target_ways: 0 chn_ways: 0 target_gran: 1 chn_gran: 1 tad_offset: 0x0 tad_offset_sign: 0
Write MCNMCACHINGCFG for HBM Stack 0 MC 0
C00: MCNMCACHINGCFG:
mcnmcachingenb: 1 mcpmemenb: 0 mcnmcachingpmemwt: 0
C01: MCNMCACHINGCFG:
mcnmcachingenb: 1 mcpmemenb: 0 mcnmcachingpmemwt: 0
Write MCNMCACHINGCFG for HBM Stack 0 MC 1
C00: MCNMCACHINGCFG:
mcnmcachingenb: 1 mcpmemenb: 0 mcnmcachingpmemwt: 0
C01: MCNMCACHINGCFG:
mcnmcachingenb: 1 mcpmemenb: 0 mcnmcachingpmemwt: 0
Write MCNMCACHINGCFG for HBM Stack 0 MC 2
C00: MCNMCACHINGCFG:
mcnmcachingenb: 1 mcpmemenb: 0 mcnmcachingpmemwt: 0
C01: MCNMCACHINGCFG:
mcnmcachingenb: 1 mcpmemenb: 0 mcnmcachingpmemwt: 0
Write MCNMCACHINGCFG for HBM Stack 0 MC 3
C00: MCNMCACHINGCFG:
mcnmcachingenb: 1 mcpmemenb: 0 mcnmcachingpmemwt: 0
C01: MCNMCACHINGCFG:
mcnmcachingenb: 1 mcpmemenb: 0 mcnmcachingpmemwt: 0
Write 2LM NM Decoder CSR's for HBM Stack 0 MC 0
C00: CSR for force_lat bit : AMAP_MC_MAIN_REG: 0x52
C00: MCNMCACHINGINTLV:
nm_target_ways: 0 nm_chn_ways: 3 nm_target_lid: 0 nm_target_gran: 1 nm_chn_gran: 1 nm_chn_lid: 0
C00: MCNMCACHINGCFG_MC_2LM_REG:
en_2way: 0 prefer_way_sel: 0 chn_cap: 0xB nm_ratio_chn_cap: 0
C00: MCNMCACHINGOFFSET:
mcnmcachingoffsetlower: 0x2 mcnmcachingoffset: 0x4 mcnmcachingoffseten: 1
C01: CSR for force_lat bit : AMAP_MC_MAIN_REG: 0x52
C01: MCNMCACHINGINTLV:
nm_target_ways: 0 nm_chn_ways: 3 nm_target_lid: 0 nm_target_gran: 1 nm_chn_gran: 1 nm_chn_lid: 1
C01: MCNMCACHINGCFG_MC_2LM_REG:
en_2way: 0 prefer_way_sel: 0 chn_cap: 0xB nm_ratio_chn_cap: 0
C01: MCNMCACHINGOFFSET:
mcnmcachingoffsetlower: 0x2 mcnmcachingoffset: 0x4 mcnmcachingoffseten: 1
Write 2LM NM Decoder CSR's for HBM Stack 0 MC 1
C00: CSR for force_lat bit : AMAP_MC_MAIN_REG: 0x52
C00: MCNMCACHINGINTLV:
nm_target_ways: 0 nm_chn_ways: 3 nm_target_lid: 0 nm_target_gran: 1 nm_chn_gran: 1 nm_chn_lid: 2
C00: MCNMCACHINGCFG_MC_2LM_REG:
en_2way: 0 prefer_way_sel: 0 chn_cap: 0xB nm_ratio_chn_cap: 0
C00: MCNMCACHINGOFFSET:
mcnmcachingoffsetlower: 0x2 mcnmcachingoffset: 0x4 mcnmcachingoffseten: 1
C01: CSR for force_lat bit : AMAP_MC_MAIN_REG: 0x52
C01: MCNMCACHINGINTLV:
nm_target_ways: 0 nm_chn_ways: 3 nm_target_lid: 0 nm_target_gran: 1 nm_chn_gran: 1 nm_chn_lid: 3
C01: MCNMCACHINGCFG_MC_2LM_REG:
en_2way: 0 prefer_way_sel: 0 chn_cap: 0xB nm_ratio_chn_cap: 0
C01: MCNMCACHINGOFFSET:
mcnmcachingoffsetlower: 0x2 mcnmcachingoffset: 0x4 mcnmcachingoffseten: 1
Write 2LM NM Decoder CSR's for HBM Stack 0 MC 2
C00: CSR for force_lat bit : AMAP_MC_MAIN_REG: 0x52
C00: MCNMCACHINGINTLV:
nm_target_ways: 0 nm_chn_ways: 3 nm_target_lid: 0 nm_target_gran: 1 nm_chn_gran: 1 nm_chn_lid: 4
C00: MCNMCACHINGCFG_MC_2LM_REG:
en_2way: 0 prefer_way_sel: 0 chn_cap: 0xB nm_ratio_chn_cap: 0
C00: MCNMCACHINGOFFSET:
mcnmcachingoffsetlower: 0x2 mcnmcachingoffset: 0x4 mcnmcachingoffseten: 1
C01: CSR for force_lat bit : AMAP_MC_MAIN_REG: 0x52
C01: MCNMCACHINGINTLV:
nm_target_ways: 0 nm_chn_ways: 3 nm_target_lid: 0 nm_target_gran: 1 nm_chn_gran: 1 nm_chn_lid: 5
C01: MCNMCACHINGCFG_MC_2LM_REG:
en_2way: 0 prefer_way_sel: 0 chn_cap: 0xB nm_ratio_chn_cap: 0
C01: MCNMCACHINGOFFSET:
mcnmcachingoffsetlower: 0x2 mcnmcachingoffset: 0x4 mcnmcachingoffseten: 1
Write 2LM NM Decoder CSR's for HBM Stack 0 MC 3
C00: CSR for force_lat bit : AMAP_MC_MAIN_REG: 0x52
C00: MCNMCACHINGINTLV:
nm_target_ways: 0 nm_chn_ways: 3 nm_target_lid: 0 nm_target_gran: 1 nm_chn_gran: 1 nm_chn_lid: 6
C00: MCNMCACHINGCFG_MC_2LM_REG:
en_2way: 0 prefer_way_sel: 0 chn_cap: 0xB nm_ratio_chn_cap: 0
C00: MCNMCACHINGOFFSET:
mcnmcachingoffsetlower: 0x2 mcnmcachingoffset: 0x4 mcnmcachingoffseten: 1
C01: CSR for force_lat bit : AMAP_MC_MAIN_REG: 0x52
C01: MCNMCACHINGINTLV:
nm_target_ways: 0 nm_chn_ways: 3 nm_target_lid: 0 nm_target_gran: 1 nm_chn_gran: 1 nm_chn_lid: 7
C01: MCNMCACHINGCFG_MC_2LM_REG:
en_2way: 0 prefer_way_sel: 0 chn_cap: 0xB nm_ratio_chn_cap: 0
C01: MCNMCACHINGOFFSET:
mcnmcachingoffsetlower: 0x2 mcnmcachingoffset: 0x4 mcnmcachingoffseten: 1
Write 2LM FM Decoder CSR's for HBM Stack 0 MC 0 TAD 0
C00: DRAM_RULE[0]:
rule_enable: 1 limit: 0xA1F fm_target: 0 fm_chn_ways: 0 fm_chn_gran: 1 fm_target_ways: 0 fm_gran_eq: 0 fm_chn_l2pid: 0x00000000
C01: DRAM_RULE[0]:
rule_enable: 1 limit: 0xA1F fm_target: 0 fm_chn_ways: 0 fm_chn_gran: 1 fm_target_ways: 0 fm_gran_eq: 0 fm_chn_l2pid: 0x00000000
Write 2LM FM Decoder CSR's for HBM Stack 0 MC 1 TAD 0
C00: DRAM_RULE[0]:
rule_enable: 1 limit: 0xA1F fm_target: 0 fm_chn_ways: 0 fm_chn_gran: 1 fm_target_ways: 0 fm_gran_eq: 0 fm_chn_l2pid: 0x00000000
C01: DRAM_RULE[0]:
rule_enable: 1 limit: 0xA1F fm_target: 0 fm_chn_ways: 0 fm_chn_gran: 1 fm_target_ways: 0 fm_gran_eq: 0 fm_chn_l2pid: 0x00000000
Write 2LM FM Decoder CSR's for HBM Stack 0 MC 2 TAD 0
C00: DRAM_RULE[0]:
rule_enable: 1 limit: 0xA1F fm_target: 0 fm_chn_ways: 0 fm_chn_gran: 1 fm_target_ways: 0 fm_gran_eq: 0 fm_chn_l2pid: 0x00000000
C01: DRAM_RULE[0]:
rule_enable: 1 limit: 0xA1F fm_target: 0 fm_chn_ways: 0 fm_chn_gran: 1 fm_target_ways: 0 fm_gran_eq: 0 fm_chn_l2pid: 0x00000000
Write 2LM FM Decoder CSR's for HBM Stack 0 MC 3 TAD 0
C00: DRAM_RULE[0]:
rule_enable: 1 limit: 0xA1F fm_target: 0 fm_chn_ways: 0 fm_chn_gran: 1 fm_target_ways: 0 fm_gran_eq: 0 fm_chn_l2pid: 0x00000000
C01: DRAM_RULE[0]:
rule_enable: 1 limit: 0xA1F fm_target: 0 fm_chn_ways: 0 fm_chn_gran: 1 fm_target_ways: 0 fm_gran_eq: 0 fm_chn_l2pid: 0x00000000
Write Patrol and Sparing TAD range CSR's for HBM Stack 1 MC 0
C00: TADWAYNESS[0]:
target_lid: 0 chn_lid: 0 tad_limit: 0x1F
C00: TADBASE[0]:
mirror_en: 0 en_failover: 0 ign_ptrl_uc: 0 base: 0x0
C01: TADWAYNESS[0]:
target_lid: 0 chn_lid: 1 tad_limit: 0x1F
C01: TADBASE[0]:
mirror_en: 0 en_failover: 0 ign_ptrl_uc: 0 base: 0x0
Write Patrol and Sparing TAD range CSR's for HBM Stack 1 MC 1
C00: TADWAYNESS[0]:
target_lid: 0 chn_lid: 2 tad_limit: 0x1F
C00: TADBASE[0]:
mirror_en: 0 en_failover: 0 ign_ptrl_uc: 0 base: 0x0
C01: TADWAYNESS[0]:
target_lid: 0 chn_lid: 3 tad_limit: 0x1F
C01: TADBASE[0]:
mirror_en: 0 en_failover: 0 ign_ptrl_uc: 0 base: 0x0
Write Patrol and Sparing TAD range CSR's for HBM Stack 1 MC 2
C00: TADWAYNESS[0]:
target_lid: 0 chn_lid: 4 tad_limit: 0x1F
C00: TADBASE[0]:
mirror_en: 0 en_failover: 0 ign_ptrl_uc: 0 base: 0x0
C01: TADWAYNESS[0]:
target_lid: 0 chn_lid: 5 tad_limit: 0x1F
C01: TADBASE[0]:
mirror_en: 0 en_failover: 0 ign_ptrl_uc: 0 base: 0x0
Write Patrol and Sparing TAD range CSR's for HBM Stack 1 MC 3
C00: TADWAYNESS[0]:
target_lid: 0 chn_lid: 6 tad_limit: 0x1F
C00: TADBASE[0]:
mirror_en: 0 en_failover: 0 ign_ptrl_uc: 0 base: 0x0
C01: TADWAYNESS[0]:
target_lid: 0 chn_lid: 7 tad_limit: 0x1F
C01: TADBASE[0]:
mirror_en: 0 en_failover: 0 ign_ptrl_uc: 0 base: 0x0
Write Hbm Nm Caching Tad CSR's for HBM Stack 1 MC 0
C00: MCNMCACHINGCFG 2LM TAD:
nmcachingtaden: 1 nmcachingtad: 0
C01: MCNMCACHINGCFG 2LM TAD:
nmcachingtaden: 1 nmcachingtad: 0
Write Hbm Nm Caching Tad CSR's for HBM Stack 1 MC 1
C00: MCNMCACHINGCFG 2LM TAD:
nmcachingtaden: 1 nmcachingtad: 0
C01: MCNMCACHINGCFG 2LM TAD:
nmcachingtaden: 1 nmcachingtad: 0
Write Hbm Nm Caching Tad CSR's for HBM Stack 1 MC 2
C00: MCNMCACHINGCFG 2LM TAD:
nmcachingtaden: 1 nmcachingtad: 0
C01: MCNMCACHINGCFG 2LM TAD:
nmcachingtaden: 1 nmcachingtad: 0
Write Hbm Nm Caching Tad CSR's for HBM Stack 1 MC 3
C00: MCNMCACHINGCFG 2LM TAD:
nmcachingtaden: 1 nmcachingtad: 0
C01: MCNMCACHINGCFG 2LM TAD:
nmcachingtaden: 1 nmcachingtad: 0
Write 1LM Decoder CSR's for HBM Stack 1 MC 0
C00: TADCHNILVOFFSET[0]:
target_ways: 0 chn_ways: 0 target_gran: 1 chn_gran: 1 tad_offset: 0x0 tad_offset_sign: 0
C01: TADCHNILVOFFSET[0]:
target_ways: 0 chn_ways: 0 target_gran: 1 chn_gran: 1 tad_offset: 0x0 tad_offset_sign: 0
Write 1LM Decoder CSR's for HBM Stack 1 MC 1
C00: TADCHNILVOFFSET[0]:
target_ways: 0 chn_ways: 0 target_gran: 1 chn_gran: 1 tad_offset: 0x0 tad_offset_sign: 0
C01: TADCHNILVOFFSET[0]:
target_ways: 0 chn_ways: 0 target_gran: 1 chn_gran: 1 tad_offset: 0x0 tad_offset_sign: 0
Write 1LM Decoder CSR's for HBM Stack 1 MC 2
C00: TADCHNILVOFFSET[0]:
target_ways: 0 chn_ways: 0 target_gran: 1 chn_gran: 1 tad_offset: 0x0 tad_offset_sign: 0
C01: TADCHNILVOFFSET[0]:
target_ways: 0 chn_ways: 0 target_gran: 1 chn_gran: 1 tad_offset: 0x0 tad_offset_sign: 0
Write 1LM Decoder CSR's for HBM Stack 1 MC 3
C00: TADCHNILVOFFSET[0]:
target_ways: 0 chn_ways: 0 target_gran: 1 chn_gran: 1 tad_offset: 0x0 tad_offset_sign: 0
C01: TADCHNILVOFFSET[0]:
target_ways: 0 chn_ways: 0 target_gran: 1 chn_gran: 1 tad_offset: 0x0 tad_offset_sign: 0
Write MCNMCACHINGCFG for HBM Stack 1 MC 0
C00: MCNMCACHINGCFG:
mcnmcachingenb: 1 mcpmemenb: 0 mcnmcachingpmemwt: 0
C01: MCNMCACHINGCFG:
mcnmcachingenb: 1 mcpmemenb: 0 mcnmcachingpmemwt: 0
Write MCNMCACHINGCFG for HBM Stack 1 MC 1
C00: MCNMCACHINGCFG:
mcnmcachingenb: 1 mcpmemenb: 0 mcnmcachingpmemwt: 0
C01: MCNMCACHINGCFG:
mcnmcachingenb: 1 mcpmemenb: 0 mcnmcachingpmemwt: 0
Write MCNMCACHINGCFG for HBM Stack 1 MC 2
C00: MCNMCACHINGCFG:
mcnmcachingenb: 1 mcpmemenb: 0 mcnmcachingpmemwt: 0
C01: MCNMCACHINGCFG:
mcnmcachingenb: 1 mcpmemenb: 0 mcnmcachingpmemwt: 0
Write MCNMCACHINGCFG for HBM Stack 1 MC 3
C00: MCNMCACHINGCFG:
mcnmcachingenb: 1 mcpmemenb: 0 mcnmcachingpmemwt: 0
C01: MCNMCACHINGCFG:
mcnmcachingenb: 1 mcpmemenb: 0 mcnmcachingpmemwt: 0
Write 2LM NM Decoder CSR's for HBM Stack 1 MC 0
C00: CSR for force_lat bit : AMAP_MC_MAIN_REG: 0x52
C00: MCNMCACHINGINTLV:
nm_target_ways: 0 nm_chn_ways: 3 nm_target_lid: 0 nm_target_gran: 1 nm_chn_gran: 1 nm_chn_lid: 0
C00: MCNMCACHINGCFG_MC_2LM_REG:
en_2way: 0 prefer_way_sel: 0 chn_cap: 0xB nm_ratio_chn_cap: 0
C00: MCNMCACHINGOFFSET:
mcnmcachingoffsetlower: 0x2 mcnmcachingoffset: 0x5 mcnmcachingoffseten: 1
C01: CSR for force_lat bit : AMAP_MC_MAIN_REG: 0x52
C01: MCNMCACHINGINTLV:
nm_target_ways: 0 nm_chn_ways: 3 nm_target_lid: 0 nm_target_gran: 1 nm_chn_gran: 1 nm_chn_lid: 1
C01: MCNMCACHINGCFG_MC_2LM_REG:
en_2way: 0 prefer_way_sel: 0 chn_cap: 0xB nm_ratio_chn_cap: 0
C01: MCNMCACHINGOFFSET:
mcnmcachingoffsetlower: 0x2 mcnmcachingoffset: 0x5 mcnmcachingoffseten: 1
Write 2LM NM Decoder CSR's for HBM Stack 1 MC 1
C00: CSR for force_lat bit : AMAP_MC_MAIN_REG: 0x52
C00: MCNMCACHINGINTLV:
nm_target_ways: 0 nm_chn_ways: 3 nm_target_lid: 0 nm_target_gran: 1 nm_chn_gran: 1 nm_chn_lid: 2
C00: MCNMCACHINGCFG_MC_2LM_REG:
en_2way: 0 prefer_way_sel: 0 chn_cap: 0xB nm_ratio_chn_cap: 0
C00: MCNMCACHINGOFFSET:
mcnmcachingoffsetlower: 0x2 mcnmcachingoffset: 0x5 mcnmcachingoffseten: 1
C01: CSR for force_lat bit : AMAP_MC_MAIN_REG: 0x52
C01: MCNMCACHINGINTLV:
nm_target_ways: 0 nm_chn_ways: 3 nm_target_lid: 0 nm_target_gran: 1 nm_chn_gran: 1 nm_chn_lid: 3
C01: MCNMCACHINGCFG_MC_2LM_REG:
en_2way: 0 prefer_way_sel: 0 chn_cap: 0xB nm_ratio_chn_cap: 0
C01: MCNMCACHINGOFFSET:
mcnmcachingoffsetlower: 0x2 mcnmcachingoffset: 0x5 mcnmcachingoffseten: 1
Write 2LM NM Decoder CSR's for HBM Stack 1 MC 2
C00: CSR for force_lat bit : AMAP_MC_MAIN_REG: 0x52
C00: MCNMCACHINGINTLV:
nm_target_ways: 0 nm_chn_ways: 3 nm_target_lid: 0 nm_target_gran: 1 nm_chn_gran: 1 nm_chn_lid: 4
C00: MCNMCACHINGCFG_MC_2LM_REG:
en_2way: 0 prefer_way_sel: 0 chn_cap: 0xB nm_ratio_chn_cap: 0
C00: MCNMCACHINGOFFSET:
mcnmcachingoffsetlower: 0x2 mcnmcachingoffset: 0x5 mcnmcachingoffseten: 1
C01: CSR for force_lat bit : AMAP_MC_MAIN_REG: 0x52
C01: MCNMCACHINGINTLV:
nm_target_ways: 0 nm_chn_ways: 3 nm_target_lid: 0 nm_target_gran: 1 nm_chn_gran: 1 nm_chn_lid: 5
C01: MCNMCACHINGCFG_MC_2LM_REG:
en_2way: 0 prefer_way_sel: 0 chn_cap: 0xB nm_ratio_chn_cap: 0
C01: MCNMCACHINGOFFSET:
mcnmcachingoffsetlower: 0x2 mcnmcachingoffset: 0x5 mcnmcachingoffseten: 1
Write 2LM NM Decoder CSR's for HBM Stack 1 MC 3
C00: CSR for force_lat bit : AMAP_MC_MAIN_REG: 0x52
C00: MCNMCACHINGINTLV:
nm_target_ways: 0 nm_chn_ways: 3 nm_target_lid: 0 nm_target_gran: 1 nm_chn_gran: 1 nm_chn_lid: 6
C00: MCNMCACHINGCFG_MC_2LM_REG:
en_2way: 0 prefer_way_sel: 0 chn_cap: 0xB nm_ratio_chn_cap: 0
C00: MCNMCACHINGOFFSET:
mcnmcachingoffsetlower: 0x2 mcnmcachingoffset: 0x5 mcnmcachingoffseten: 1
C01: CSR for force_lat bit : AMAP_MC_MAIN_REG: 0x52
C01: MCNMCACHINGINTLV:
nm_target_ways: 0 nm_chn_ways: 3 nm_target_lid: 0 nm_target_gran: 1 nm_chn_gran: 1 nm_chn_lid: 7
C01: MCNMCACHINGCFG_MC_2LM_REG:
en_2way: 0 prefer_way_sel: 0 chn_cap: 0xB nm_ratio_chn_cap: 0
C01: MCNMCACHINGOFFSET:
mcnmcachingoffsetlower: 0x2 mcnmcachingoffset: 0x5 mcnmcachingoffseten: 1
Write 2LM FM Decoder CSR's for HBM Stack 1 MC 0 TAD 0
C00: DRAM_RULE[0]:
rule_enable: 1 limit: 0xC1F fm_target: 0 fm_chn_ways: 0 fm_chn_gran: 1 fm_target_ways: 0 fm_gran_eq: 0 fm_chn_l2pid: 0x00000000
C01: DRAM_RULE[0]:
rule_enable: 1 limit: 0xC1F fm_target: 0 fm_chn_ways: 0 fm_chn_gran: 1 fm_target_ways: 0 fm_gran_eq: 0 fm_chn_l2pid: 0x00000000
Write 2LM FM Decoder CSR's for HBM Stack 1 MC 1 TAD 0
C00: DRAM_RULE[0]:
rule_enable: 1 limit: 0xC1F fm_target: 0 fm_chn_ways: 0 fm_chn_gran: 1 fm_target_ways: 0 fm_gran_eq: 0 fm_chn_l2pid: 0x00000000
C01: DRAM_RULE[0]:
rule_enable: 1 limit: 0xC1F fm_target: 0 fm_chn_ways: 0 fm_chn_gran: 1 fm_target_ways: 0 fm_gran_eq: 0 fm_chn_l2pid: 0x00000000
Write 2LM FM Decoder CSR's for HBM Stack 1 MC 2 TAD 0
C00: DRAM_RULE[0]:
rule_enable: 1 limit: 0xC1F fm_target: 0 fm_chn_ways: 0 fm_chn_gran: 1 fm_target_ways: 0 fm_gran_eq: 0 fm_chn_l2pid: 0x00000000
C01: DRAM_RULE[0]:
rule_enable: 1 limit: 0xC1F fm_target: 0 fm_chn_ways: 0 fm_chn_gran: 1 fm_target_ways: 0 fm_gran_eq: 0 fm_chn_l2pid: 0x00000000
Write 2LM FM Decoder CSR's for HBM Stack 1 MC 3 TAD 0
C00: DRAM_RULE[0]:
rule_enable: 1 limit: 0xC1F fm_target: 0 fm_chn_ways: 0 fm_chn_gran: 1 fm_target_ways: 0 fm_gran_eq: 0 fm_chn_l2pid: 0x00000000
C01: DRAM_RULE[0]:
rule_enable: 1 limit: 0xC1F fm_target: 0 fm_chn_ways: 0 fm_chn_gran: 1 fm_target_ways: 0 fm_gran_eq: 0 fm_chn_l2pid: 0x00000000
Write Patrol and Sparing TAD range CSR's for HBM Stack 2 MC 0
C00: TADWAYNESS[0]:
target_lid: 0 chn_lid: 0 tad_limit: 0x1F
C00: TADBASE[0]:
mirror_en: 0 en_failover: 0 ign_ptrl_uc: 0 base: 0x0
C01: TADWAYNESS[0]:
target_lid: 0 chn_lid: 1 tad_limit: 0x1F
C01: TADBASE[0]:
mirror_en: 0 en_failover: 0 ign_ptrl_uc: 0 base: 0x0
Write Patrol and Sparing TAD range CSR's for HBM Stack 2 MC 1
C00: TADWAYNESS[0]:
target_lid: 0 chn_lid: 2 tad_limit: 0x1F
C00: TADBASE[0]:
mirror_en: 0 en_failover: 0 ign_ptrl_uc: 0 base: 0x0
C01: TADWAYNESS[0]:
target_lid: 0 chn_lid: 3 tad_limit: 0x1F
C01: TADBASE[0]:
mirror_en: 0 en_failover: 0 ign_ptrl_uc: 0 base: 0x0
Write Patrol and Sparing TAD range CSR's for HBM Stack 2 MC 2
C00: TADWAYNESS[0]:
target_lid: 0 chn_lid: 4 tad_limit: 0x1F
C00: TADBASE[0]:
mirror_en: 0 en_failover: 0 ign_ptrl_uc: 0 base: 0x0
C01: TADWAYNESS[0]:
target_lid: 0 chn_lid: 5 tad_limit: 0x1F
C01: TADBASE[0]:
mirror_en: 0 en_failover: 0 ign_ptrl_uc: 0 base: 0x0
Write Patrol and Sparing TAD range CSR's for HBM Stack 2 MC 3
C00: TADWAYNESS[0]:
target_lid: 0 chn_lid: 6 tad_limit: 0x1F
C00: TADBASE[0]:
mirror_en: 0 en_failover: 0 ign_ptrl_uc: 0 base: 0x0
C01: TADWAYNESS[0]:
target_lid: 0 chn_lid: 7 tad_limit: 0x1F
C01: TADBASE[0]:
mirror_en: 0 en_failover: 0 ign_ptrl_uc: 0 base: 0x0
Write Hbm Nm Caching Tad CSR's for HBM Stack 2 MC 0
C00: MCNMCACHINGCFG 2LM TAD:
nmcachingtaden: 1 nmcachingtad: 0
C01: MCNMCACHINGCFG 2LM TAD:
nmcachingtaden: 1 nmcachingtad: 0
Write Hbm Nm Caching Tad CSR's for HBM Stack 2 MC 1
C00: MCNMCACHINGCFG 2LM TAD:
nmcachingtaden: 1 nmcachingtad: 0
C01: MCNMCACHINGCFG 2LM TAD:
nmcachingtaden: 1 nmcachingtad: 0
Write Hbm Nm Caching Tad CSR's for HBM Stack 2 MC 2
C00: MCNMCACHINGCFG 2LM TAD:
nmcachingtaden: 1 nmcachingtad: 0
C01: MCNMCACHINGCFG 2LM TAD:
nmcachingtaden: 1 nmcachingtad: 0
Write Hbm Nm Caching Tad CSR's for HBM Stack 2 MC 3
C00: MCNMCACHINGCFG 2LM TAD:
nmcachingtaden: 1 nmcachingtad: 0
C01: MCNMCACHINGCFG 2LM TAD:
nmcachingtaden: 1 nmcachingtad: 0
Write 1LM Decoder CSR's for HBM Stack 2 MC 0
C00: TADCHNILVOFFSET[0]:
target_ways: 0 chn_ways: 0 target_gran: 1 chn_gran: 1 tad_offset: 0x0 tad_offset_sign: 0
C01: TADCHNILVOFFSET[0]:
target_ways: 0 chn_ways: 0 target_gran: 1 chn_gran: 1 tad_offset: 0x0 tad_offset_sign: 0
Write 1LM Decoder CSR's for HBM Stack 2 MC 1
C00: TADCHNILVOFFSET[0]:
target_ways: 0 chn_ways: 0 target_gran: 1 chn_gran: 1 tad_offset: 0x0 tad_offset_sign: 0
C01: TADCHNILVOFFSET[0]:
target_ways: 0 chn_ways: 0 target_gran: 1 chn_gran: 1 tad_offset: 0x0 tad_offset_sign: 0
Write 1LM Decoder CSR's for HBM Stack 2 MC 2
C00: TADCHNILVOFFSET[0]:
target_ways: 0 chn_ways: 0 target_gran: 1 chn_gran: 1 tad_offset: 0x0 tad_offset_sign: 0
C01: TADCHNILVOFFSET[0]:
target_ways: 0 chn_ways: 0 target_gran: 1 chn_gran: 1 tad_offset: 0x0 tad_offset_sign: 0
Write 1LM Decoder CSR's for HBM Stack 2 MC 3
C00: TADCHNILVOFFSET[0]:
target_ways: 0 chn_ways: 0 target_gran: 1 chn_gran: 1 tad_offset: 0x0 tad_offset_sign: 0
C01: TADCHNILVOFFSET[0]:
target_ways: 0 chn_ways: 0 target_gran: 1 chn_gran: 1 tad_offset: 0x0 tad_offset_sign: 0
Write MCNMCACHINGCFG for HBM Stack 2 MC 0
C00: MCNMCACHINGCFG:
mcnmcachingenb: 1 mcpmemenb: 0 mcnmcachingpmemwt: 0
C01: MCNMCACHINGCFG:
mcnmcachingenb: 1 mcpmemenb: 0 mcnmcachingpmemwt: 0
Write MCNMCACHINGCFG for HBM Stack 2 MC 1
C00: MCNMCACHINGCFG:
mcnmcachingenb: 1 mcpmemenb: 0 mcnmcachingpmemwt: 0
C01: MCNMCACHINGCFG:
mcnmcachingenb: 1 mcpmemenb: 0 mcnmcachingpmemwt: 0
Write MCNMCACHINGCFG for HBM Stack 2 MC 2
C00: MCNMCACHINGCFG:
mcnmcachingenb: 1 mcpmemenb: 0 mcnmcachingpmemwt: 0
C01: MCNMCACHINGCFG:
mcnmcachingenb: 1 mcpmemenb: 0 mcnmcachingpmemwt: 0
Write MCNMCACHINGCFG for HBM Stack 2 MC 3
C00: MCNMCACHINGCFG:
mcnmcachingenb: 1 mcpmemenb: 0 mcnmcachingpmemwt: 0
C01: MCNMCACHINGCFG:
mcnmcachingenb: 1 mcpmemenb: 0 mcnmcachingpmemwt: 0
Write 2LM NM Decoder CSR's for HBM Stack 2 MC 0
C00: CSR for force_lat bit : AMAP_MC_MAIN_REG: 0x52
C00: MCNMCACHINGINTLV:
nm_target_ways: 0 nm_chn_ways: 3 nm_target_lid: 0 nm_target_gran: 1 nm_chn_gran: 1 nm_chn_lid: 0
C00: MCNMCACHINGCFG_MC_2LM_REG:
en_2way: 0 prefer_way_sel: 0 chn_cap: 0xB nm_ratio_chn_cap: 0
C00: MCNMCACHINGOFFSET:
mcnmcachingoffsetlower: 0x2 mcnmcachingoffset: 0x6 mcnmcachingoffseten: 1
C01: CSR for force_lat bit : AMAP_MC_MAIN_REG: 0x52
C01: MCNMCACHINGINTLV:
nm_target_ways: 0 nm_chn_ways: 3 nm_target_lid: 0 nm_target_gran: 1 nm_chn_gran: 1 nm_chn_lid: 1
C01: MCNMCACHINGCFG_MC_2LM_REG:
en_2way: 0 prefer_way_sel: 0 chn_cap: 0xB nm_ratio_chn_cap: 0
C01: MCNMCACHINGOFFSET:
mcnmcachingoffsetlower: 0x2 mcnmcachingoffset: 0x6 mcnmcachingoffseten: 1
Write 2LM NM Decoder CSR's for HBM Stack 2 MC 1
C00: CSR for force_lat bit : AMAP_MC_MAIN_REG: 0x52
C00: MCNMCACHINGINTLV:
nm_target_ways: 0 nm_chn_ways: 3 nm_target_lid: 0 nm_target_gran: 1 nm_chn_gran: 1 nm_chn_lid: 2
C00: MCNMCACHINGCFG_MC_2LM_REG:
en_2way: 0 prefer_way_sel: 0 chn_cap: 0xB nm_ratio_chn_cap: 0
C00: MCNMCACHINGOFFSET:
mcnmcachingoffsetlower: 0x2 mcnmcachingoffset: 0x6 mcnmcachingoffseten: 1
C01: CSR for force_lat bit : AMAP_MC_MAIN_REG: 0x52
C01: MCNMCACHINGINTLV:
nm_target_ways: 0 nm_chn_ways: 3 nm_target_lid: 0 nm_target_gran: 1 nm_chn_gran: 1 nm_chn_lid: 3
C01: MCNMCACHINGCFG_MC_2LM_REG:
en_2way: 0 prefer_way_sel: 0 chn_cap: 0xB nm_ratio_chn_cap: 0
C01: MCNMCACHINGOFFSET:
mcnmcachingoffsetlower: 0x2 mcnmcachingoffset: 0x6 mcnmcachingoffseten: 1
Write 2LM NM Decoder CSR's for HBM Stack 2 MC 2
C00: CSR for force_lat bit : AMAP_MC_MAIN_REG: 0x52
C00: MCNMCACHINGINTLV:
nm_target_ways: 0 nm_chn_ways: 3 nm_target_lid: 0 nm_target_gran: 1 nm_chn_gran: 1 nm_chn_lid: 4
C00: MCNMCACHINGCFG_MC_2LM_REG:
en_2way: 0 prefer_way_sel: 0 chn_cap: 0xB nm_ratio_chn_cap: 0
C00: MCNMCACHINGOFFSET:
mcnmcachingoffsetlower: 0x2 mcnmcachingoffset: 0x6 mcnmcachingoffseten: 1
C01: CSR for force_lat bit : AMAP_MC_MAIN_REG: 0x52
C01: MCNMCACHINGINTLV:
nm_target_ways: 0 nm_chn_ways: 3 nm_target_lid: 0 nm_target_gran: 1 nm_chn_gran: 1 nm_chn_lid: 5
C01: MCNMCACHINGCFG_MC_2LM_REG:
en_2way: 0 prefer_way_sel: 0 chn_cap: 0xB nm_ratio_chn_cap: 0
C01: MCNMCACHINGOFFSET:
mcnmcachingoffsetlower: 0x2 mcnmcachingoffset: 0x6 mcnmcachingoffseten: 1
Write 2LM NM Decoder CSR's for HBM Stack 2 MC 3
C00: CSR for force_lat bit : AMAP_MC_MAIN_REG: 0x52
C00: MCNMCACHINGINTLV:
nm_target_ways: 0 nm_chn_ways: 3 nm_target_lid: 0 nm_target_gran: 1 nm_chn_gran: 1 nm_chn_lid: 6
C00: MCNMCACHINGCFG_MC_2LM_REG:
en_2way: 0 prefer_way_sel: 0 chn_cap: 0xB nm_ratio_chn_cap: 0
C00: MCNMCACHINGOFFSET:
mcnmcachingoffsetlower: 0x2 mcnmcachingoffset: 0x6 mcnmcachingoffseten: 1
C01: CSR for force_lat bit : AMAP_MC_MAIN_REG: 0x52
C01: MCNMCACHINGINTLV:
nm_target_ways: 0 nm_chn_ways: 3 nm_target_lid: 0 nm_target_gran: 1 nm_chn_gran: 1 nm_chn_lid: 7
C01: MCNMCACHINGCFG_MC_2LM_REG:
en_2way: 0 prefer_way_sel: 0 chn_cap: 0xB nm_ratio_chn_cap: 0
C01: MCNMCACHINGOFFSET:
mcnmcachingoffsetlower: 0x2 mcnmcachingoffset: 0x6 mcnmcachingoffseten: 1
Write 2LM FM Decoder CSR's for HBM Stack 2 MC 0 TAD 0
C00: DRAM_RULE[0]:
rule_enable: 1 limit: 0xE1F fm_target: 0 fm_chn_ways: 0 fm_chn_gran: 1 fm_target_ways: 0 fm_gran_eq: 0 fm_chn_l2pid: 0x00000000
C01: DRAM_RULE[0]:
rule_enable: 1 limit: 0xE1F fm_target: 0 fm_chn_ways: 0 fm_chn_gran: 1 fm_target_ways: 0 fm_gran_eq: 0 fm_chn_l2pid: 0x00000000
Write 2LM FM Decoder CSR's for HBM Stack 2 MC 1 TAD 0
C00: DRAM_RULE[0]:
rule_enable: 1 limit: 0xE1F fm_target: 0 fm_chn_ways: 0 fm_chn_gran: 1 fm_target_ways: 0 fm_gran_eq: 0 fm_chn_l2pid: 0x00000000
C01: DRAM_RULE[0]:
rule_enable: 1 limit: 0xE1F fm_target: 0 fm_chn_ways: 0 fm_chn_gran: 1 fm_target_ways: 0 fm_gran_eq: 0 fm_chn_l2pid: 0x00000000
Write 2LM FM Decoder CSR's for HBM Stack 2 MC 2 TAD 0
C00: DRAM_RULE[0]:
rule_enable: 1 limit: 0xE1F fm_target: 0 fm_chn_ways: 0 fm_chn_gran: 1 fm_target_ways: 0 fm_gran_eq: 0 fm_chn_l2pid: 0x00000000
C01: DRAM_RULE[0]:
rule_enable: 1 limit: 0xE1F fm_target: 0 fm_chn_ways: 0 fm_chn_gran: 1 fm_target_ways: 0 fm_gran_eq: 0 fm_chn_l2pid: 0x00000000
Write 2LM FM Decoder CSR's for HBM Stack 2 MC 3 TAD 0
C00: DRAM_RULE[0]:
rule_enable: 1 limit: 0xE1F fm_target: 0 fm_chn_ways: 0 fm_chn_gran: 1 fm_target_ways: 0 fm_gran_eq: 0 fm_chn_l2pid: 0x00000000
C01: DRAM_RULE[0]:
rule_enable: 1 limit: 0xE1F fm_target: 0 fm_chn_ways: 0 fm_chn_gran: 1 fm_target_ways: 0 fm_gran_eq: 0 fm_chn_l2pid: 0x00000000
Write Patrol and Sparing TAD range CSR's for HBM Stack 3 MC 0
C00: TADWAYNESS[0]:
target_lid: 0 chn_lid: 0 tad_limit: 0x1F
C00: TADBASE[0]:
mirror_en: 0 en_failover: 0 ign_ptrl_uc: 0 base: 0x0
C01: TADWAYNESS[0]:
target_lid: 0 chn_lid: 1 tad_limit: 0x1F
C01: TADBASE[0]:
mirror_en: 0 en_failover: 0 ign_ptrl_uc: 0 base: 0x0
Write Patrol and Sparing TAD range CSR's for HBM Stack 3 MC 1
C00: TADWAYNESS[0]:
target_lid: 0 chn_lid: 2 tad_limit: 0x1F
C00: TADBASE[0]:
mirror_en: 0 en_failover: 0 ign_ptrl_uc: 0 base: 0x0
C01: TADWAYNESS[0]:
target_lid: 0 chn_lid: 3 tad_limit: 0x1F
C01: TADBASE[0]:
mirror_en: 0 en_failover: 0 ign_ptrl_uc: 0 base: 0x0
Write Patrol and Sparing TAD range CSR's for HBM Stack 3 MC 2
C00: TADWAYNESS[0]:
target_lid: 0 chn_lid: 4 tad_limit: 0x1F
C00: TADBASE[0]:
mirror_en: 0 en_failover: 0 ign_ptrl_uc: 0 base: 0x0
C01: TADWAYNESS[0]:
target_lid: 0 chn_lid: 5 tad_limit: 0x1F
C01: TADBASE[0]:
mirror_en: 0 en_failover: 0 ign_ptrl_uc: 0 base: 0x0
Write Patrol and Sparing TAD range CSR's for HBM Stack 3 MC 3
C00: TADWAYNESS[0]:
target_lid: 0 chn_lid: 6 tad_limit: 0x1F
C00: TADBASE[0]:
mirror_en: 0 en_failover: 0 ign_ptrl_uc: 0 base: 0x0
C01: TADWAYNESS[0]:
target_lid: 0 chn_lid: 7 tad_limit: 0x1F
C01: TADBASE[0]:
mirror_en: 0 en_failover: 0 ign_ptrl_uc: 0 base: 0x0
Write Hbm Nm Caching Tad CSR's for HBM Stack 3 MC 0
C00: MCNMCACHINGCFG 2LM TAD:
nmcachingtaden: 1 nmcachingtad: 0
C01: MCNMCACHINGCFG 2LM TAD:
nmcachingtaden: 1 nmcachingtad: 0
Write Hbm Nm Caching Tad CSR's for HBM Stack 3 MC 1
C00: MCNMCACHINGCFG 2LM TAD:
nmcachingtaden: 1 nmcachingtad: 0
C01: MCNMCACHINGCFG 2LM TAD:
nmcachingtaden: 1 nmcachingtad: 0
Write Hbm Nm Caching Tad CSR's for HBM Stack 3 MC 2
C00: MCNMCACHINGCFG 2LM TAD:
nmcachingtaden: 1 nmcachingtad: 0
C01: MCNMCACHINGCFG 2LM TAD:
nmcachingtaden: 1 nmcachingtad: 0
Write Hbm Nm Caching Tad CSR's for HBM Stack 3 MC 3
C00: MCNMCACHINGCFG 2LM TAD:
nmcachingtaden: 1 nmcachingtad: 0
C01: MCNMCACHINGCFG 2LM TAD:
nmcachingtaden: 1 nmcachingtad: 0
Write 1LM Decoder CSR's for HBM Stack 3 MC 0
C00: TADCHNILVOFFSET[0]:
target_ways: 0 chn_ways: 0 target_gran: 1 chn_gran: 1 tad_offset: 0x0 tad_offset_sign: 0
C01: TADCHNILVOFFSET[0]:
target_ways: 0 chn_ways: 0 target_gran: 1 chn_gran: 1 tad_offset: 0x0 tad_offset_sign: 0
Write 1LM Decoder CSR's for HBM Stack 3 MC 1
C00: TADCHNILVOFFSET[0]:
target_ways: 0 chn_ways: 0 target_gran: 1 chn_gran: 1 tad_offset: 0x0 tad_offset_sign: 0
C01: TADCHNILVOFFSET[0]:
target_ways: 0 chn_ways: 0 target_gran: 1 chn_gran: 1 tad_offset: 0x0 tad_offset_sign: 0
Write 1LM Decoder CSR's for HBM Stack 3 MC 2
C00: TADCHNILVOFFSET[0]:
target_ways: 0 chn_ways: 0 target_gran: 1 chn_gran: 1 tad_offset: 0x0 tad_offset_sign: 0
C01: TADCHNILVOFFSET[0]:
target_ways: 0 chn_ways: 0 target_gran: 1 chn_gran: 1 tad_offset: 0x0 tad_offset_sign: 0
Write 1LM Decoder CSR's for HBM Stack 3 MC 3
C00: TADCHNILVOFFSET[0]:
target_ways: 0 chn_ways: 0 target_gran: 1 chn_gran: 1 tad_offset: 0x0 tad_offset_sign: 0
C01: TADCHNILVOFFSET[0]:
target_ways: 0 chn_ways: 0 target_gran: 1 chn_gran: 1 tad_offset: 0x0 tad_offset_sign: 0
Write MCNMCACHINGCFG for HBM Stack 3 MC 0
C00: MCNMCACHINGCFG:
mcnmcachingenb: 1 mcpmemenb: 0 mcnmcachingpmemwt: 0
C01: MCNMCACHINGCFG:
mcnmcachingenb: 1 mcpmemenb: 0 mcnmcachingpmemwt: 0
Write MCNMCACHINGCFG for HBM Stack 3 MC 1
C00: MCNMCACHINGCFG:
mcnmcachingenb: 1 mcpmemenb: 0 mcnmcachingpmemwt: 0
C01: MCNMCACHINGCFG:
mcnmcachingenb: 1 mcpmemenb: 0 mcnmcachingpmemwt: 0
Write MCNMCACHINGCFG for HBM Stack 3 MC 2
C00: MCNMCACHINGCFG:
mcnmcachingenb: 1 mcpmemenb: 0 mcnmcachingpmemwt: 0
C01: MCNMCACHINGCFG:
mcnmcachingenb: 1 mcpmemenb: 0 mcnmcachingpmemwt: 0
Write MCNMCACHINGCFG for HBM Stack 3 MC 3
C00: MCNMCACHINGCFG:
mcnmcachingenb: 1 mcpmemenb: 0 mcnmcachingpmemwt: 0
C01: MCNMCACHINGCFG:
mcnmcachingenb: 1 mcpmemenb: 0 mcnmcachingpmemwt: 0
Write 2LM NM Decoder CSR's for HBM Stack 3 MC 0
C00: CSR for force_lat bit : AMAP_MC_MAIN_REG: 0x52
C00: MCNMCACHINGINTLV:
nm_target_ways: 0 nm_chn_ways: 3 nm_target_lid: 0 nm_target_gran: 1 nm_chn_gran: 1 nm_chn_lid: 0
C00: MCNMCACHINGCFG_MC_2LM_REG:
en_2way: 0 prefer_way_sel: 0 chn_cap: 0xB nm_ratio_chn_cap: 0
C00: MCNMCACHINGOFFSET:
mcnmcachingoffsetlower: 0x2 mcnmcachingoffset: 0x7 mcnmcachingoffseten: 1
C01: CSR for force_lat bit : AMAP_MC_MAIN_REG: 0x52
C01: MCNMCACHINGINTLV:
nm_target_ways: 0 nm_chn_ways: 3 nm_target_lid: 0 nm_target_gran: 1 nm_chn_gran: 1 nm_chn_lid: 1
C01: MCNMCACHINGCFG_MC_2LM_REG:
en_2way: 0 prefer_way_sel: 0 chn_cap: 0xB nm_ratio_chn_cap: 0
C01: MCNMCACHINGOFFSET:
mcnmcachingoffsetlower: 0x2 mcnmcachingoffset: 0x7 mcnmcachingoffseten: 1
Write 2LM NM Decoder CSR's for HBM Stack 3 MC 1
C00: CSR for force_lat bit : AMAP_MC_MAIN_REG: 0x52
C00: MCNMCACHINGINTLV:
nm_target_ways: 0 nm_chn_ways: 3 nm_target_lid: 0 nm_target_gran: 1 nm_chn_gran: 1 nm_chn_lid: 2
C00: MCNMCACHINGCFG_MC_2LM_REG:
en_2way: 0 prefer_way_sel: 0 chn_cap: 0xB nm_ratio_chn_cap: 0
C00: MCNMCACHINGOFFSET:
mcnmcachingoffsetlower: 0x2 mcnmcachingoffset: 0x7 mcnmcachingoffseten: 1
C01: CSR for force_lat bit : AMAP_MC_MAIN_REG: 0x52
C01: MCNMCACHINGINTLV:
nm_target_ways: 0 nm_chn_ways: 3 nm_target_lid: 0 nm_target_gran: 1 nm_chn_gran: 1 nm_chn_lid: 3
C01: MCNMCACHINGCFG_MC_2LM_REG:
en_2way: 0 prefer_way_sel: 0 chn_cap: 0xB nm_ratio_chn_cap: 0
C01: MCNMCACHINGOFFSET:
mcnmcachingoffsetlower: 0x2 mcnmcachingoffset: 0x7 mcnmcachingoffseten: 1
Write 2LM NM Decoder CSR's for HBM Stack 3 MC 2
C00: CSR for force_lat bit : AMAP_MC_MAIN_REG: 0x52
C00: MCNMCACHINGINTLV:
nm_target_ways: 0 nm_chn_ways: 3 nm_target_lid: 0 nm_target_gran: 1 nm_chn_gran: 1 nm_chn_lid: 4
C00: MCNMCACHINGCFG_MC_2LM_REG:
en_2way: 0 prefer_way_sel: 0 chn_cap: 0xB nm_ratio_chn_cap: 0
C00: MCNMCACHINGOFFSET:
mcnmcachingoffsetlower: 0x2 mcnmcachingoffset: 0x7 mcnmcachingoffseten: 1
C01: CSR for force_lat bit : AMAP_MC_MAIN_REG: 0x52
C01: MCNMCACHINGINTLV:
nm_target_ways: 0 nm_chn_ways: 3 nm_target_lid: 0 nm_target_gran: 1 nm_chn_gran: 1 nm_chn_lid: 5
C01: MCNMCACHINGCFG_MC_2LM_REG:
en_2way: 0 prefer_way_sel: 0 chn_cap: 0xB nm_ratio_chn_cap: 0
C01: MCNMCACHINGOFFSET:
mcnmcachingoffsetlower: 0x2 mcnmcachingoffset: 0x7 mcnmcachingoffseten: 1
Write 2LM NM Decoder CSR's for HBM Stack 3 MC 3
C00: CSR for force_lat bit : AMAP_MC_MAIN_REG: 0x52
C00: MCNMCACHINGINTLV:
nm_target_ways: 0 nm_chn_ways: 3 nm_target_lid: 0 nm_target_gran: 1 nm_chn_gran: 1 nm_chn_lid: 6
C00: MCNMCACHINGCFG_MC_2LM_REG:
en_2way: 0 prefer_way_sel: 0 chn_cap: 0xB nm_ratio_chn_cap: 0
C00: MCNMCACHINGOFFSET:
mcnmcachingoffsetlower: 0x2 mcnmcachingoffset: 0x7 mcnmcachingoffseten: 1
C01: CSR for force_lat bit : AMAP_MC_MAIN_REG: 0x52
C01: MCNMCACHINGINTLV:
nm_target_ways: 0 nm_chn_ways: 3 nm_target_lid: 0 nm_target_gran: 1 nm_chn_gran: 1 nm_chn_lid: 7
C01: MCNMCACHINGCFG_MC_2LM_REG:
en_2way: 0 prefer_way_sel: 0 chn_cap: 0xB nm_ratio_chn_cap: 0
C01: MCNMCACHINGOFFSET:
mcnmcachingoffsetlower: 0x2 mcnmcachingoffset: 0x7 mcnmcachingoffseten: 1
Write 2LM FM Decoder CSR's for HBM Stack 3 MC 0 TAD 0
C00: DRAM_RULE[0]:
rule_enable: 1 limit: 0x101F fm_target: 0 fm_chn_ways: 0 fm_chn_gran: 1 fm_target_ways: 0 fm_gran_eq: 0 fm_chn_l2pid: 0x00000000
C01: DRAM_RULE[0]:
rule_enable: 1 limit: 0x101F fm_target: 0 fm_chn_ways: 0 fm_chn_gran: 1 fm_target_ways: 0 fm_gran_eq: 0 fm_chn_l2pid: 0x00000000
Write 2LM FM Decoder CSR's for HBM Stack 3 MC 1 TAD 0
C00: DRAM_RULE[0]:
rule_enable: 1 limit: 0x101F fm_target: 0 fm_chn_ways: 0 fm_chn_gran: 1 fm_target_ways: 0 fm_gran_eq: 0 fm_chn_l2pid: 0x00000000
C01: DRAM_RULE[0]:
rule_enable: 1 limit: 0x101F fm_target: 0 fm_chn_ways: 0 fm_chn_gran: 1 fm_target_ways: 0 fm_gran_eq: 0 fm_chn_l2pid: 0x00000000
Write 2LM FM Decoder CSR's for HBM Stack 3 MC 2 TAD 0
C00: DRAM_RULE[0]:
rule_enable: 1 limit: 0x101F fm_target: 0 fm_chn_ways: 0 fm_chn_gran: 1 fm_target_ways: 0 fm_gran_eq: 0 fm_chn_l2pid: 0x00000000
C01: DRAM_RULE[0]:
rule_enable: 1 limit: 0x101F fm_target: 0 fm_chn_ways: 0 fm_chn_gran: 1 fm_target_ways: 0 fm_gran_eq: 0 fm_chn_l2pid: 0x00000000
Write 2LM FM Decoder CSR's for HBM Stack 3 MC 3 TAD 0
C00: DRAM_RULE[0]:
rule_enable: 1 limit: 0x101F fm_target: 0 fm_chn_ways: 0 fm_chn_gran: 1 fm_target_ways: 0 fm_gran_eq: 0 fm_chn_l2pid: 0x00000000
C01: DRAM_RULE[0]:
rule_enable: 1 limit: 0x101F fm_target: 0 fm_chn_ways: 0 fm_chn_gran: 1 fm_target_ways: 0 fm_gran_eq: 0 fm_chn_l2pid: 0x00000000
Checkpoint Code: Socket 0, 0xBB, 0x08, 0x0001
^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^
Write RIR CSRs for Socket: 1
^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^
Channel - 0
RIRWAYNESSLIMIT_0_MC_MAIN_REG
rir_val: 1 rir_limit: 0x1F rir_way: 0x0
RIRILV0OFFSET_0_MC_MAIN_REG
rir_rnk_tgt0: 0x0 rir_offset0: 0x0
RIRILV1OFFSET_0_MC_MAIN_REG
rir_rnk_tgt0: 0x0 rir_offset0: 0x0
RIRILV2OFFSET_0_MC_MAIN_REG
rir_rnk_tgt0: 0x0 rir_offset0: 0x0
RIRILV3OFFSET_0_MC_MAIN_REG
rir_rnk_tgt0: 0x0 rir_offset0: 0x0
RIRILV4OFFSET_0_MC_MAIN_REG
rir_rnk_tgt0: 0x0 rir_offset0: 0x0
RIRILV5OFFSET_0_MC_MAIN_REG
rir_rnk_tgt0: 0x0 rir_offset0: 0x0
RIRILV6OFFSET_0_MC_MAIN_REG
rir_rnk_tgt0: 0x0 rir_offset0: 0x0
RIRILV7OFFSET_0_MC_MAIN_REG
rir_rnk_tgt0: 0x0 rir_offset0: 0x0
RIRWAYNESSLIMIT_1_MC_MAIN_REG
rir_val: 0 rir_limit: 0x1F rir_way: 0x0
RIRILV0OFFSET_1_MC_MAIN_REG
rir_rnk_tgt0: 0x0 rir_offset0: 0x0
RIRILV1OFFSET_1_MC_MAIN_REG
rir_rnk_tgt0: 0x0 rir_offset0: 0x0
RIRILV2OFFSET_1_MC_MAIN_REG
rir_rnk_tgt0: 0x0 rir_offset0: 0x0
RIRILV3OFFSET_1_MC_MAIN_REG
rir_rnk_tgt0: 0x0 rir_offset0: 0x0
RIRILV4OFFSET_1_MC_MAIN_REG
rir_rnk_tgt0: 0x0 rir_offset0: 0x0
RIRILV5OFFSET_1_MC_MAIN_REG
rir_rnk_tgt0: 0x0 rir_offset0: 0x0
RIRILV6OFFSET_1_MC_MAIN_REG
rir_rnk_tgt0: 0x0 rir_offset0: 0x0
RIRILV7OFFSET_1_MC_MAIN_REG
rir_rnk_tgt0: 0x0 rir_offset0: 0x0
RIRWAYNESSLIMIT_2_MC_MAIN_REG
rir_val: 0 rir_limit: 0x1F rir_way: 0x0
RIRILV0OFFSET_2_MC_MAIN_REG
rir_rnk_tgt0: 0x0 rir_offset0: 0x0
RIRILV1OFFSET_2_MC_MAIN_REG
rir_rnk_tgt0: 0x0 rir_offset0: 0x0
RIRILV2OFFSET_2_MC_MAIN_REG
rir_rnk_tgt0: 0x0 rir_offset0: 0x0
RIRILV3OFFSET_2_MC_MAIN_REG
rir_rnk_tgt0: 0x0 rir_offset0: 0x0
RIRILV4OFFSET_2_MC_MAIN_REG
rir_rnk_tgt0: 0x0 rir_offset0: 0x0
RIRILV5OFFSET_2_MC_MAIN_REG
rir_rnk_tgt0: 0x0 rir_offset0: 0x0
RIRILV6OFFSET_2_MC_MAIN_REG
rir_rnk_tgt0: 0x0 rir_offset0: 0x0
RIRILV7OFFSET_2_MC_MAIN_REG
rir_rnk_tgt0: 0x0 rir_offset0: 0x0
RIRWAYNESSLIMIT_3_MC_MAIN_REG
rir_val: 0 rir_limit: 0x1F rir_way: 0x0
RIRILV0OFFSET_3_MC_MAIN_REG
rir_rnk_tgt0: 0x0 rir_offset0: 0x0
RIRILV1OFFSET_3_MC_MAIN_REG
rir_rnk_tgt0: 0x0 rir_offset0: 0x0
RIRILV2OFFSET_3_MC_MAIN_REG
rir_rnk_tgt0: 0x0 rir_offset0: 0x0
RIRILV3OFFSET_3_MC_MAIN_REG
rir_rnk_tgt0: 0x0 rir_offset0: 0x0
RIRILV4OFFSET_3_MC_MAIN_REG
rir_rnk_tgt0: 0x0 rir_offset0: 0x0
RIRILV5OFFSET_3_MC_MAIN_REG
rir_rnk_tgt0: 0x0 rir_offset0: 0x0
RIRILV6OFFSET_3_MC_MAIN_REG
rir_rnk_tgt0: 0x0 rir_offset0: 0x0
RIRILV7OFFSET_3_MC_MAIN_REG
rir_rnk_tgt0: 0x0 rir_offset0: 0x0
Channel - 2
RIRWAYNESSLIMIT_0_MC_MAIN_REG
rir_val: 1 rir_limit: 0x1F rir_way: 0x0
RIRILV0OFFSET_0_MC_MAIN_REG
rir_rnk_tgt0: 0x0 rir_offset0: 0x0
RIRILV1OFFSET_0_MC_MAIN_REG
rir_rnk_tgt0: 0x0 rir_offset0: 0x0
RIRILV2OFFSET_0_MC_MAIN_REG
rir_rnk_tgt0: 0x0 rir_offset0: 0x0
RIRILV3OFFSET_0_MC_MAIN_REG
rir_rnk_tgt0: 0x0 rir_offset0: 0x0
RIRILV4OFFSET_0_MC_MAIN_REG
rir_rnk_tgt0: 0x0 rir_offset0: 0x0
RIRILV5OFFSET_0_MC_MAIN_REG
rir_rnk_tgt0: 0x0 rir_offset0: 0x0
RIRILV6OFFSET_0_MC_MAIN_REG
rir_rnk_tgt0: 0x0 rir_offset0: 0x0
RIRILV7OFFSET_0_MC_MAIN_REG
rir_rnk_tgt0: 0x0 rir_offset0: 0x0
RIRWAYNESSLIMIT_1_MC_MAIN_REG
rir_val: 0 rir_limit: 0x1F rir_way: 0x0
RIRILV0OFFSET_1_MC_MAIN_REG
rir_rnk_tgt0: 0x0 rir_offset0: 0x0
RIRILV1OFFSET_1_MC_MAIN_REG
rir_rnk_tgt0: 0x0 rir_offset0: 0x0
RIRILV2OFFSET_1_MC_MAIN_REG
rir_rnk_tgt0: 0x0 rir_offset0: 0x0
RIRILV3OFFSET_1_MC_MAIN_REG
rir_rnk_tgt0: 0x0 rir_offset0: 0x0
RIRILV4OFFSET_1_MC_MAIN_REG
rir_rnk_tgt0: 0x0 rir_offset0: 0x0
RIRILV5OFFSET_1_MC_MAIN_REG
rir_rnk_tgt0: 0x0 rir_offset0: 0x0
RIRILV6OFFSET_1_MC_MAIN_REG
rir_rnk_tgt0: 0x0 rir_offset0: 0x0
RIRILV7OFFSET_1_MC_MAIN_REG
rir_rnk_tgt0: 0x0 rir_offset0: 0x0
RIRWAYNESSLIMIT_2_MC_MAIN_REG
rir_val: 0 rir_limit: 0x1F rir_way: 0x0
RIRILV0OFFSET_2_MC_MAIN_REG
rir_rnk_tgt0: 0x0 rir_offset0: 0x0
RIRILV1OFFSET_2_MC_MAIN_REG
rir_rnk_tgt0: 0x0 rir_offset0: 0x0
RIRILV2OFFSET_2_MC_MAIN_REG
rir_rnk_tgt0: 0x0 rir_offset0: 0x0
RIRILV3OFFSET_2_MC_MAIN_REG
rir_rnk_tgt0: 0x0 rir_offset0: 0x0
RIRILV4OFFSET_2_MC_MAIN_REG
rir_rnk_tgt0: 0x0 rir_offset0: 0x0
RIRILV5OFFSET_2_MC_MAIN_REG
rir_rnk_tgt0: 0x0 rir_offset0: 0x0
RIRILV6OFFSET_2_MC_MAIN_REG
rir_rnk_tgt0: 0x0 rir_offset0: 0x0
RIRILV7OFFSET_2_MC_MAIN_REG
rir_rnk_tgt0: 0x0 rir_offset0: 0x0
RIRWAYNESSLIMIT_3_MC_MAIN_REG
rir_val: 0 rir_limit: 0x1F rir_way: 0x0
RIRILV0OFFSET_3_MC_MAIN_REG
rir_rnk_tgt0: 0x0 rir_offset0: 0x0
RIRILV1OFFSET_3_MC_MAIN_REG
rir_rnk_tgt0: 0x0 rir_offset0: 0x0
RIRILV2OFFSET_3_MC_MAIN_REG
rir_rnk_tgt0: 0x0 rir_offset0: 0x0
RIRILV3OFFSET_3_MC_MAIN_REG
rir_rnk_tgt0: 0x0 rir_offset0: 0x0
RIRILV4OFFSET_3_MC_MAIN_REG
rir_rnk_tgt0: 0x0 rir_offset0: 0x0
RIRILV5OFFSET_3_MC_MAIN_REG
rir_rnk_tgt0: 0x0 rir_offset0: 0x0
RIRILV6OFFSET_3_MC_MAIN_REG
rir_rnk_tgt0: 0x0 rir_offset0: 0x0
RIRILV7OFFSET_3_MC_MAIN_REG
rir_rnk_tgt0: 0x0 rir_offset0: 0x0
Channel - 4
RIRWAYNESSLIMIT_0_MC_MAIN_REG
rir_val: 1 rir_limit: 0x1F rir_way: 0x0
RIRILV0OFFSET_0_MC_MAIN_REG
rir_rnk_tgt0: 0x0 rir_offset0: 0x0
RIRILV1OFFSET_0_MC_MAIN_REG
rir_rnk_tgt0: 0x0 rir_offset0: 0x0
RIRILV2OFFSET_0_MC_MAIN_REG
rir_rnk_tgt0: 0x0 rir_offset0: 0x0
RIRILV3OFFSET_0_MC_MAIN_REG
rir_rnk_tgt0: 0x0 rir_offset0: 0x0
RIRILV4OFFSET_0_MC_MAIN_REG
rir_rnk_tgt0: 0x0 rir_offset0: 0x0
RIRILV5OFFSET_0_MC_MAIN_REG
rir_rnk_tgt0: 0x0 rir_offset0: 0x0
RIRILV6OFFSET_0_MC_MAIN_REG
rir_rnk_tgt0: 0x0 rir_offset0: 0x0
RIRILV7OFFSET_0_MC_MAIN_REG
rir_rnk_tgt0: 0x0 rir_offset0: 0x0
RIRWAYNESSLIMIT_1_MC_MAIN_REG
rir_val: 0 rir_limit: 0x1F rir_way: 0x0
RIRILV0OFFSET_1_MC_MAIN_REG
rir_rnk_tgt0: 0x0 rir_offset0: 0x0
RIRILV1OFFSET_1_MC_MAIN_REG
rir_rnk_tgt0: 0x0 rir_offset0: 0x0
RIRILV2OFFSET_1_MC_MAIN_REG
rir_rnk_tgt0: 0x0 rir_offset0: 0x0
RIRILV3OFFSET_1_MC_MAIN_REG
rir_rnk_tgt0: 0x0 rir_offset0: 0x0
RIRILV4OFFSET_1_MC_MAIN_REG
rir_rnk_tgt0: 0x0 rir_offset0: 0x0
RIRILV5OFFSET_1_MC_MAIN_REG
rir_rnk_tgt0: 0x0 rir_offset0: 0x0
RIRILV6OFFSET_1_MC_MAIN_REG
rir_rnk_tgt0: 0x0 rir_offset0: 0x0
RIRILV7OFFSET_1_MC_MAIN_REG
rir_rnk_tgt0: 0x0 rir_offset0: 0x0
RIRWAYNESSLIMIT_2_MC_MAIN_REG
rir_val: 0 rir_limit: 0x1F rir_way: 0x0
RIRILV0OFFSET_2_MC_MAIN_REG
rir_rnk_tgt0: 0x0 rir_offset0: 0x0
RIRILV1OFFSET_2_MC_MAIN_REG
rir_rnk_tgt0: 0x0 rir_offset0: 0x0
RIRILV2OFFSET_2_MC_MAIN_REG
rir_rnk_tgt0: 0x0 rir_offset0: 0x0
RIRILV3OFFSET_2_MC_MAIN_REG
rir_rnk_tgt0: 0x0 rir_offset0: 0x0
RIRILV4OFFSET_2_MC_MAIN_REG
rir_rnk_tgt0: 0x0 rir_offset0: 0x0
RIRILV5OFFSET_2_MC_MAIN_REG
rir_rnk_tgt0: 0x0 rir_offset0: 0x0
RIRILV6OFFSET_2_MC_MAIN_REG
rir_rnk_tgt0: 0x0 rir_offset0: 0x0
RIRILV7OFFSET_2_MC_MAIN_REG
rir_rnk_tgt0: 0x0 rir_offset0: 0x0
RIRWAYNESSLIMIT_3_MC_MAIN_REG
rir_val: 0 rir_limit: 0x1F rir_way: 0x0
RIRILV0OFFSET_3_MC_MAIN_REG
rir_rnk_tgt0: 0x0 rir_offset0: 0x0
RIRILV1OFFSET_3_MC_MAIN_REG
rir_rnk_tgt0: 0x0 rir_offset0: 0x0
RIRILV2OFFSET_3_MC_MAIN_REG
rir_rnk_tgt0: 0x0 rir_offset0: 0x0
RIRILV3OFFSET_3_MC_MAIN_REG
rir_rnk_tgt0: 0x0 rir_offset0: 0x0
RIRILV4OFFSET_3_MC_MAIN_REG
rir_rnk_tgt0: 0x0 rir_offset0: 0x0
RIRILV5OFFSET_3_MC_MAIN_REG
rir_rnk_tgt0: 0x0 rir_offset0: 0x0
RIRILV6OFFSET_3_MC_MAIN_REG
rir_rnk_tgt0: 0x0 rir_offset0: 0x0
RIRILV7OFFSET_3_MC_MAIN_REG
rir_rnk_tgt0: 0x0 rir_offset0: 0x0
Channel - 6
RIRWAYNESSLIMIT_0_MC_MAIN_REG
rir_val: 1 rir_limit: 0x1F rir_way: 0x0
RIRILV0OFFSET_0_MC_MAIN_REG
rir_rnk_tgt0: 0x0 rir_offset0: 0x0
RIRILV1OFFSET_0_MC_MAIN_REG
rir_rnk_tgt0: 0x0 rir_offset0: 0x0
RIRILV2OFFSET_0_MC_MAIN_REG
rir_rnk_tgt0: 0x0 rir_offset0: 0x0
RIRILV3OFFSET_0_MC_MAIN_REG
rir_rnk_tgt0: 0x0 rir_offset0: 0x0
RIRILV4OFFSET_0_MC_MAIN_REG
rir_rnk_tgt0: 0x0 rir_offset0: 0x0
RIRILV5OFFSET_0_MC_MAIN_REG
rir_rnk_tgt0: 0x0 rir_offset0: 0x0
RIRILV6OFFSET_0_MC_MAIN_REG
rir_rnk_tgt0: 0x0 rir_offset0: 0x0
RIRILV7OFFSET_0_MC_MAIN_REG
rir_rnk_tgt0: 0x0 rir_offset0: 0x0
RIRWAYNESSLIMIT_1_MC_MAIN_REG
rir_val: 0 rir_limit: 0x1F rir_way: 0x0
RIRILV0OFFSET_1_MC_MAIN_REG
rir_rnk_tgt0: 0x0 rir_offset0: 0x0
RIRILV1OFFSET_1_MC_MAIN_REG
rir_rnk_tgt0: 0x0 rir_offset0: 0x0
RIRILV2OFFSET_1_MC_MAIN_REG
rir_rnk_tgt0: 0x0 rir_offset0: 0x0
RIRILV3OFFSET_1_MC_MAIN_REG
rir_rnk_tgt0: 0x0 rir_offset0: 0x0
RIRILV4OFFSET_1_MC_MAIN_REG
rir_rnk_tgt0: 0x0 rir_offset0: 0x0
RIRILV5OFFSET_1_MC_MAIN_REG
rir_rnk_tgt0: 0x0 rir_offset0: 0x0
RIRILV6OFFSET_1_MC_MAIN_REG
rir_rnk_tgt0: 0x0 rir_offset0: 0x0
RIRILV7OFFSET_1_MC_MAIN_REG
rir_rnk_tgt0: 0x0 rir_offset0: 0x0
RIRWAYNESSLIMIT_2_MC_MAIN_REG
rir_val: 0 rir_limit: 0x1F rir_way: 0x0
RIRILV0OFFSET_2_MC_MAIN_REG
rir_rnk_tgt0: 0x0 rir_offset0: 0x0
RIRILV1OFFSET_2_MC_MAIN_REG
rir_rnk_tgt0: 0x0 rir_offset0: 0x0
RIRILV2OFFSET_2_MC_MAIN_REG
rir_rnk_tgt0: 0x0 rir_offset0: 0x0
RIRILV3OFFSET_2_MC_MAIN_REG
rir_rnk_tgt0: 0x0 rir_offset0: 0x0
RIRILV4OFFSET_2_MC_MAIN_REG
rir_rnk_tgt0: 0x0 rir_offset0: 0x0
RIRILV5OFFSET_2_MC_MAIN_REG
rir_rnk_tgt0: 0x0 rir_offset0: 0x0
RIRILV6OFFSET_2_MC_MAIN_REG
rir_rnk_tgt0: 0x0 rir_offset0: 0x0
RIRILV7OFFSET_2_MC_MAIN_REG
rir_rnk_tgt0: 0x0 rir_offset0: 0x0
RIRWAYNESSLIMIT_3_MC_MAIN_REG
rir_val: 0 rir_limit: 0x1F rir_way: 0x0
RIRILV0OFFSET_3_MC_MAIN_REG
rir_rnk_tgt0: 0x0 rir_offset0: 0x0
RIRILV1OFFSET_3_MC_MAIN_REG
rir_rnk_tgt0: 0x0 rir_offset0: 0x0
RIRILV2OFFSET_3_MC_MAIN_REG
rir_rnk_tgt0: 0x0 rir_offset0: 0x0
RIRILV3OFFSET_3_MC_MAIN_REG
rir_rnk_tgt0: 0x0 rir_offset0: 0x0
RIRILV4OFFSET_3_MC_MAIN_REG
rir_rnk_tgt0: 0x0 rir_offset0: 0x0
RIRILV5OFFSET_3_MC_MAIN_REG
rir_rnk_tgt0: 0x0 rir_offset0: 0x0
RIRILV6OFFSET_3_MC_MAIN_REG
rir_rnk_tgt0: 0x0 rir_offset0: 0x0
RIRILV7OFFSET_3_MC_MAIN_REG
rir_rnk_tgt0: 0x0 rir_offset0: 0x0
^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^
Write CHA CSRs for Socket: 1
^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^
TWO_LM_CONFIG_CHA_PMA_REG
enable: 0x1 mask: 0x3F mask_hi: 0x0
HA_COH_CHABC_SAD1_REG
dis_spec_rd: 0x0
lowMemBase: 0x0
lowMemSize: 0x20
highMemBase: 0x40
highMemSize: 0xFE0
TOLM: 0x1F
TOHM: 0x101F
C00: CSR for wait4bothhalves bit: AMAP_MC_MAIN_REG: 0x49
C00: CSR for wait4bothhalves bit: AMAP_MC_MAIN_REG: 0x49
C00: CSR for wait4bothhalves bit: AMAP_MC_MAIN_REG: 0x49
C00: CSR for wait4bothhalves bit: AMAP_MC_MAIN_REG: 0x49
M2mTwoWayCache: Enable 0 NonPreferredWayMask 0x001 PreferredReadFirst 1
M2mTwoWayCache: Enable 0 NonPreferredWayMask 0x001 PreferredReadFirst 1
SGX memory map status: 1
ValidPrmrrBitMap: 0x0
PrmrrCountPerPackage: 4
CPU encryptable range count: 0
Enter MemReservePsmiBuffers
Volatile memory mode not in 1LM, cannot allocate PSMI buffers.
Memory could not be reserved for PSMI buffers
N0:
<AdjustMemorySizeFieldsforMirror>
N1:
<AdjustMemorySizeFieldsforMirror>
N2:
<AdjustMemorySizeFieldsforMirror>
N3:
<AdjustMemorySizeFieldsforMirror>
N0: Total NM size:0x20
N0: SktTotMemMapSPA:0x0
N0: PMem performance knobs override disabled
N1: Total NM size:0x20
N1: SktTotMemMapSPA:0x0
N1: PMem performance knobs override disabled
DDR clustering mode is SNC4
[ScktId: 0] Initialize Memory Map - 16856ms
[ScktId: 1] Pipe Sync SBSP Variable Data -- Started
[ScktId: 0] Pipe Sync SBSP Variable Data -- Started
[ScktId: 1] Pipe Sync SBSP Variable Data - 15ms
[ScktId: 0] Pipe Sync SBSP Variable Data - 15ms
[ScktId: 1] Pipe Sync SBSP Memory Mode -- Started
[ScktId: 0] Pipe Sync SBSP Memory Mode -- Started
[ScktId: 1] Pipe Sync SBSP Memory Mode - 41ms
[ScktId: 0] Pipe Sync SBSP Memory Mode - 36ms
N1 Checked into Pipe
[ScktId: 0] TME Init Flow -- Started
[TME] Error: There is no TME encryptable memory ranges present in the system. Disabling TME...
[TME] 2lm detected! Disabling TME.
[ScktId: 0] TME Init Flow - 21ms
[ScktId: 1] Pipe Sync AP Final Error Sync -- Started
[ScktId: 0] Pipe Sync AP Final Error Sync -- Started
[ScktId: 1] Pipe Sync AP Final Error Sync - 10ms
[ScktId: 0] Pipe Sync AP Final Error Sync - 10ms
[ScktId: 1] MK-TME Flow -- Started
[ScktId: 0] MK-TME Flow -- Started
[ScktId: 1] MK-TME Flow - 12ms
[ScktId: 0] MK-TME Flow - 7ms
[ScktId: 1] Pipe Sync AP Final Error Sync -- Started
[ScktId: 0] Pipe Sync AP Final Error Sync -- Started
[ScktId: 1] Pipe Sync AP Final Error Sync - 13ms
[ScktId: 0] Pipe Sync AP Final Error Sync - 10ms
[ScktId: 1] TME Flow - PROGRAM_MSRS -- Started
[ScktId: 0] TME Flow - PROGRAM_MSRS -- Started
[ScktId: 1] TME Flow - PROGRAM_MSRS - 14ms
[ScktId: 0] TME Flow - PROGRAM_MSRS - 9ms
[ScktId: 1] Pipe Sync AP Final Error Sync -- Started
[ScktId: 0] Pipe Sync AP Final Error Sync -- Started
[ScktId: 0] Pipe Sync AP Final Error Sync - 10ms
[ScktId: 1] Pipe Sync AP Final Error Sync - 14ms
[ScktId: 0] SGX PreMem Check Capability MT -- Started
[ScktId: 1] SGX PreMem Check Capability MT -- Started
IsSafCapSupportedMt: MSR_FUSA_CAPABILITIES SafCap.Uint32 0xFE970AB800000011
[ScktId: 0] SGX PreMem Check Capability MT - 24ms
[ScktId: 1] SGX PreMem Check Capability MT - 19ms
[ScktId: 0] Pipe Sync AP Final Error Sync -- Started
[ScktId: 1] Pipe Sync AP Final Error Sync -- Started
[ScktId: 1] Pipe Sync AP Final Error Sync - 10ms
[ScktId: 0] Pipe Sync AP Final Error Sync - 15ms
[ScktId: 1] SGX PreMem Init -- Started
[ScktId: 0] SGX PreMem Init -- Started
[SGX] SgxPreMemInitSbsp BEGIN
[SGX] VerifyFeatureControl BEGIN
[SGX] MSR_IA32_FEATURE_CONTROL 0x0000000000000000
[SGX] SecurityPolicy.EnableSgx 0 SecurityPolicy.SgxLaunchControlEnable 1
[SGX] VerifyFeatureControl END
[SGX] VerifyHardwarePreconditions BEGIN
[SGX] VerifyHardwarePreconditions END
[ScktId: 1] SGX PreMem Init - 42ms
Error: GetSgxPrmrrData (Unsupported), continue...
[ScktId: 1] Pipe Sync AP Final Error Sync -- Started
Memory configuration is NOT valid for SGX!
SgxErrorCode = 0x19
[SGX] SgxPreMemInitSbsp END
[ScktId: 0] SGX PreMem Init - 61ms
[ScktId: 0] Pipe Sync AP Final Error Sync -- Started
[ScktId: 1] Pipe Sync AP Final Error Sync - 28ms
[ScktId: 0] Pipe Sync AP Final Error Sync - 5ms
[ScktId: 1] HBM Normal Mode -- Started
[ScktId: 0] HBM Normal Mode -- Started
HbmioMailbox - Disabling HBMIO uController
HbmioMailbox - Disabling HBMIO uController
Executing uc_halt on Socket 1, HBMIO 0
Executing uc_halt on Socket 0, HBMIO 0
Executing uc_halt on Socket 1, HBMIO 1
Executing uc_halt on Socket 0, HBMIO 1
Executing uc_halt on Socket 1, HBMIO 2
Executing uc_halt on Socket 0, HBMIO 2
Executing uc_halt on Socket 1, HBMIO 3
Executing uc_halt on Socket 0, HBMIO 3
Cmi Option Auto Selected
Cmi Option Auto Selected
[ScktId: 1] HBM Normal Mode - 55ms
[ScktId: 0] HBM Normal Mode - 53ms
[ScktId: 1] AP HBM Information -- Started
[ScktId: 0] AP HBM Information -- Started
[ScktId: 0] AP HBM Information - 9ms
[ScktId: 1] AP HBM Information - 13ms
[ScktId: 0] Switch to Normal Mode -- Started
[ScktId: 1] Switch to Normal Mode -- Started
S0 TME CPUID = 1
S1 TME CPUID = 1
S0 TmeActivated = 0
S1 TmeActivated = 0
S0 TME CPUID = 1
S1 TME CPUID = 1
S0 TmeActivated = 0
S1 TmeActivated = 0
S0 TME CPUID = 1
S1 TME CPUID = 1
S0 TmeActivated = 0
S1 TmeActivated = 0
S0 TME CPUID = 1
S1 TME CPUID = 1
S0 TmeActivated = 0
S1 TmeActivated = 0
S0 TME CPUID = 1
S1 TME CPUID = 1
S0 TmeActivated = 0
S1 TmeActivated = 0
S0 TME CPUID = 1
S1 TME CPUID = 1
S0 TmeActivated = 0
S1 TmeActivated = 0
S0 TME CPUID = 1
S1 TME CPUID = 1
S0 TmeActivated = 0
S1 TmeActivated = 0
S0 TME CPUID = 1
S1 TME CPUID = 1
S0 TmeActivated = 0
S1 TmeActivated = 0
S0 TME CPUID = 1
S1 TME CPUID = 1
S0 IntegrityActivated = 0
S1 IntegrityActivated = 0
DDRT-Link-Failure-WA-Applied: err_ack_timer_limit = 0xF0
DDRT-Link-Failure-WA-Applied: err_ack_timer_limit = 0xF0
DDRT-Link-Failure-WA-Applied: err_ack_cnt_limit = 0x0
DDRT-Link-Failure-WA-Applied: err_ack_cnt_limit = 0x0
DDRT-Link-Failure-WA-Applied: err_ack_timer_limit = 0xF0
DDRT-Link-Failure-WA-Applied: err_ack_timer_limit = 0xF0
DDRT-Link-Failure-WA-Applied: err_ack_cnt_limit = 0x0
DDRT-Link-Failure-WA-Applied: err_ack_cnt_limit = 0x0
DDRT-Link-Failure-WA-Applied: err_ack_timer_limit = 0xF0
DDRT-Link-Failure-WA-Applied: err_ack_timer_limit = 0xF0
DDRT-Link-Failure-WA-Applied: err_ack_cnt_limit = 0x0
DDRT-Link-Failure-WA-Applied: err_ack_cnt_limit = 0x0
DDRT-Link-Failure-WA-Applied: err_ack_timer_limit = 0xF0
DDRT-Link-Failure-WA-Applied: err_ack_timer_limit = 0xF0
DDRT-Link-Failure-WA-Applied: err_ack_cnt_limit = 0x0
DDRT-Link-Failure-WA-Applied: err_ack_cnt_limit = 0x0
LpModePmControlN0.Data Original = 0x88063
LpModePmControlN0.Data Original = 0x88063
LpModePmControlN1.Data Original = 0x71D00
LpModePmControlN1.Data Original = 0x71D00
LpModePmControlN0.Bits.datadllwakeuptime = 0x3
LpModePmControlN0.Bits.datadllwakeuptime = 0x3
LpModePmControlN1.Bits.datadllwakeuptime = 0x6
LpModePmControlN1.Bits.datadllwakeuptime = 0x6
MininalTclByHCLK = 0x13
MininalTclByHCLK = 0x13
LpModePmControlN0.Bits.lpmode_block_rd = 0x8
LpModePmControlN0.Bits.lpmode_block_rd = 0x8
LpModePmControlN0.Data New = 0xC1088063
LpModePmControlN0.Data New = 0xC1088063
LpModePmControlN1.Data New = 0x71D86
LpModePmControlN1.Data New = 0x71D86
LpModePmControlN0.Data Original = 0x88063
LpModePmControlN0.Data Original = 0x88063
LpModePmControlN1.Data Original = 0x71D00
LpModePmControlN1.Data Original = 0x71D00
LpModePmControlN0.Bits.datadllwakeuptime = 0x3
LpModePmControlN0.Bits.datadllwakeuptime = 0x3
LpModePmControlN1.Bits.datadllwakeuptime = 0x6
LpModePmControlN1.Bits.datadllwakeuptime = 0x6
MininalTclByHCLK = 0x13
MininalTclByHCLK = 0x13
LpModePmControlN0.Bits.lpmode_block_rd = 0x8
LpModePmControlN0.Bits.lpmode_block_rd = 0x8
LpModePmControlN0.Data New = 0xC1088063
LpModePmControlN0.Data New = 0xC1088063
LpModePmControlN1.Data New = 0x71D86
LpModePmControlN1.Data New = 0x71D86
LpModePmControlN0.Data Original = 0x88063
LpModePmControlN0.Data Original = 0x88063
LpModePmControlN1.Data Original = 0x71D00
LpModePmControlN1.Data Original = 0x71D00
LpModePmControlN0.Bits.datadllwakeuptime = 0x3
LpModePmControlN0.Bits.datadllwakeuptime = 0x3
LpModePmControlN1.Bits.datadllwakeuptime = 0x6
LpModePmControlN1.Bits.datadllwakeuptime = 0x6
MininalTclByHCLK = 0x13
MininalTclByHCLK = 0x13
LpModePmControlN0.Bits.lpmode_block_rd = 0x8
LpModePmControlN0.Bits.lpmode_block_rd = 0x8
LpModePmControlN0.Data New = 0xC1088063
LpModePmControlN0.Data New = 0xC1088063
LpModePmControlN1.Data New = 0x71D86
LpModePmControlN1.Data New = 0x71D86
LpModePmControlN0.Data Original = 0x88063
LpModePmControlN0.Data Original = 0x88063
LpModePmControlN1.Data Original = 0x71D00
LpModePmControlN1.Data Original = 0x71D00
LpModePmControlN0.Bits.datadllwakeuptime = 0x3
LpModePmControlN0.Bits.datadllwakeuptime = 0x3
LpModePmControlN1.Bits.datadllwakeuptime = 0x6
LpModePmControlN1.Bits.datadllwakeuptime = 0x6
MininalTclByHCLK = 0x13
MininalTclByHCLK = 0x13
LpModePmControlN0.Bits.lpmode_block_rd = 0x8
LpModePmControlN0.Bits.lpmode_block_rd = 0x8
LpModePmControlN0.Data New = 0xC1088063
LpModePmControlN0.Data New = 0xC1088063
LpModePmControlN1.Data New = 0x71D86
LpModePmControlN1.Data New = 0x71D86
[ScktId: 0] Switch to Normal Mode - 435ms
[ScktId: 1] Switch to Normal Mode - 435ms
[ScktId: 0] Init CMI Credit Programming -- Started
[ScktId: 1] Init CMI Credit Programming -- Started
Cmi Option Auto Selected
Cmi Option Auto Selected
MemMc Cmi Data Version: 1
MemMc Cmi Data Version: 1
S0 TME CPUID = 1
S1 TME CPUID = 1
S0 TmeActivated = 0
S1 TmeActivated = 0
TmeEnabled: 0
TmeEnabled: 0
TwoLmEnabled: 0
TwoLmEnabled: 0
2LM_XTILE: 0
2LM_XTILE: 0
CMI Credit Data for CPU Stepping: Ex and Later
CMI Credit Data for CPU Stepping: Ex and Later
S0 TME CPUID = 1
S1 TME CPUID = 1
S0 TmeActivated = 0
S1 TmeActivated = 0
TmeEnabled: 0
TmeEnabled: 0
TwoLmEnabled: 0
TwoLmEnabled: 0
2LM_XTILE: 0
2LM_XTILE: 0
CMI Credit Data for CPU Stepping: Ex and Later
CMI Credit Data for CPU Stepping: Ex and Later
S0 TME CPUID = 1
S1 TME CPUID = 1
S0 TmeActivated = 0
S1 TmeActivated = 0
TmeEnabled: 0
TmeEnabled: 0
TwoLmEnabled: 0
TwoLmEnabled: 0
2LM_XTILE: 0
2LM_XTILE: 0
CMI Credit Data for CPU Stepping: Ex and Later
CMI Credit Data for CPU Stepping: Ex and Later
S0 TME CPUID = 1
S1 TME CPUID = 1
S0 TmeActivated = 0
S1 TmeActivated = 0
TmeEnabled: 0
TmeEnabled: 0
TwoLmEnabled: 0
TwoLmEnabled: 0
2LM_XTILE: 0
2LM_XTILE: 0
CMI Credit Data for CPU Stepping: Ex and Later
CMI Credit Data for CPU Stepping: Ex and Later
S0 TME CPUID = 1
S1 TME CPUID = 1
S0 TmeActivated = 0
S1 TmeActivated = 0
TmeEnabled: 0
TmeEnabled: 0
TwoLmEnabled: 0
TwoLmEnabled: 0
2LM_XTILE: 0
2LM_XTILE: 0
CMI Credit Data for CPU Stepping: Ex and Later
CMI Credit Data for CPU Stepping: Ex and Later
S0 TME CPUID = 1
S1 TME CPUID = 1
S0 TmeActivated = 0
S1 TmeActivated = 0
TmeEnabled: 0
TmeEnabled: 0
TwoLmEnabled: 0
TwoLmEnabled: 0
2LM_XTILE: 0
2LM_XTILE: 0
CMI Credit Data for CPU Stepping: Ex and Later
CMI Credit Data for CPU Stepping: Ex and Later
S0 TME CPUID = 1
S1 TME CPUID = 1
S0 TmeActivated = 0
S1 TmeActivated = 0
TmeEnabled: 0
TmeEnabled: 0
TwoLmEnabled: 0
TwoLmEnabled: 0
2LM_XTILE: 0
2LM_XTILE: 0
CMI Credit Data for CPU Stepping: Ex and Later
CMI Credit Data for CPU Stepping: Ex and Later
S0 TME CPUID = 1
S1 TME CPUID = 1
S0 TmeActivated = 0
S1 TmeActivated = 0
TmeEnabled: 0
TmeEnabled: 0
TwoLmEnabled: 0
TwoLmEnabled: 0
2LM_XTILE: 0
2LM_XTILE: 0
CMI Credit Data for CPU Stepping: Ex and Later
CMI Credit Data for CPU Stepping: Ex and Later
S0 TME CPUID = 1
S1 TME CPUID = 1
S0 TmeActivated = 0
S1 TmeActivated = 0
TmeEnabled: 0
TmeEnabled: 0
TwoLmEnabled: 0
TwoLmEnabled: 0
2LM_XTILE: 0
2LM_XTILE: 0
CMI Credit Data for CPU Stepping: Ex and Later
CMI Credit Data for CPU Stepping: Ex and Later
S0 TME CPUID = 1
S1 TME CPUID = 1
S0 TmeActivated = 0
S1 TmeActivated = 0
TmeEnabled: 0
TmeEnabled: 0
TwoLmEnabled: 0
TwoLmEnabled: 0
2LM_XTILE: 0
2LM_XTILE: 0
CMI Credit Data for CPU Stepping: Ex and Later
CMI Credit Data for CPU Stepping: Ex and Later
S0 TME CPUID = 1
S1 TME CPUID = 1
S0 TmeActivated = 0
S1 TmeActivated = 0
TmeEnabled: 0
TmeEnabled: 0
TwoLmEnabled: 0
TwoLmEnabled: 0
2LM_XTILE: 0
2LM_XTILE: 0
CMI Credit Data for CPU Stepping: Ex and Later
CMI Credit Data for CPU Stepping: Ex and Later
S0 TME CPUID = 1
S1 TME CPUID = 1
S0 TmeActivated = 0
S1 TmeActivated = 0
TmeEnabled: 0
TmeEnabled: 0
TwoLmEnabled: 0
TwoLmEnabled: 0
2LM_XTILE: 0
2LM_XTILE: 0
CMI Credit Data for CPU Stepping: Ex and Later
CMI Credit Data for CPU Stepping: Ex and Later
S0 TME CPUID = 1
S1 TME CPUID = 1
S0 TmeActivated = 0
S1 TmeActivated = 0
TmeEnabled: 0
TmeEnabled: 0
TwoLmEnabled: 0
TwoLmEnabled: 0
2LM_XTILE: 0
2LM_XTILE: 0
CMI Credit Data for CPU Stepping: Ex and Later
CMI Credit Data for CPU Stepping: Ex and Later
S0 TME CPUID = 1
S1 TME CPUID = 1
S0 TmeActivated = 0
S1 TmeActivated = 0
TmeEnabled: 0
TmeEnabled: 0
TwoLmEnabled: 0
TwoLmEnabled: 0
2LM_XTILE: 0
2LM_XTILE: 0
CMI Credit Data for CPU Stepping: Ex and Later
CMI Credit Data for CPU Stepping: Ex and Later
S0 TME CPUID = 1
S1 TME CPUID = 1
S0 TmeActivated = 0
S1 TmeActivated = 0
TmeEnabled: 0
TmeEnabled: 0
TwoLmEnabled: 0
TwoLmEnabled: 0
2LM_XTILE: 0
2LM_XTILE: 0
CMI Credit Data for CPU Stepping: Ex and Later
CMI Credit Data for CPU Stepping: Ex and Later
S0 TME CPUID = 1
S1 TME CPUID = 1
S0 TmeActivated = 0
S1 TmeActivated = 0
TmeEnabled: 0
TmeEnabled: 0
TwoLmEnabled: 0
TwoLmEnabled: 0
2LM_XTILE: 0
2LM_XTILE: 0
CMI Credit Data for CPU Stepping: Ex and Later
CMI Credit Data for CPU Stepping: Ex and Later
S0 TME CPUID = 1
S1 TME CPUID = 1
S0 TmeActivated = 0
S1 TmeActivated = 0
TmeEnabled: 0
TmeEnabled: 0
TwoLmEnabled: 0
TwoLmEnabled: 0
2LM_XTILE: 0
2LM_XTILE: 0
CMI Credit Data for CPU Stepping: Ex and Later
CMI Credit Data for CPU Stepping: Ex and Later
S0 TME CPUID = 1
S1 TME CPUID = 1
S0 TmeActivated = 0
S1 TmeActivated = 0
TmeEnabled: 0
TmeEnabled: 0
TwoLmEnabled: 0
TwoLmEnabled: 0
2LM_XTILE: 0
2LM_XTILE: 0
CMI Credit Data for CPU Stepping: Ex and Later
CMI Credit Data for CPU Stepping: Ex and Later
S0 TME CPUID = 1
S1 TME CPUID = 1
S0 TmeActivated = 0
S1 TmeActivated = 0
TmeEnabled: 0
TmeEnabled: 0
TwoLmEnabled: 0
TwoLmEnabled: 0
2LM_XTILE: 0
2LM_XTILE: 0
CMI Credit Data for CPU Stepping: Ex and Later
CMI Credit Data for CPU Stepping: Ex and Later
S0 TME CPUID = 1
S1 TME CPUID = 1
S0 TmeActivated = 0
S1 TmeActivated = 0
TmeEnabled: 0
TmeEnabled: 0
TwoLmEnabled: 0
TwoLmEnabled: 0
2LM_XTILE: 0
2LM_XTILE: 0
CMI Credit Data for CPU Stepping: Ex and Later
CMI Credit Data for CPU Stepping: Ex and Later
S0 TME CPUID = 1
S1 TME CPUID = 1
S0 TmeActivated = 0
S1 TmeActivated = 0
TmeEnabled: 0
TmeEnabled: 0
TwoLmEnabled: 0
TwoLmEnabled: 0
2LM_XTILE: 0
2LM_XTILE: 0
CMI Credit Data for CPU Stepping: Ex and Later
CMI Credit Data for CPU Stepping: Ex and Later
S0 TME CPUID = 1
S1 TME CPUID = 1
S0 TmeActivated = 0
S1 TmeActivated = 0
TmeEnabled: 0
TmeEnabled: 0
TwoLmEnabled: 0
TwoLmEnabled: 0
2LM_XTILE: 0
2LM_XTILE: 0
CMI Credit Data for CPU Stepping: Ex and Later
CMI Credit Data for CPU Stepping: Ex and Later
S0 TME CPUID = 1
S1 TME CPUID = 1
S0 TmeActivated = 0
S1 TmeActivated = 0
TmeEnabled: 0
TmeEnabled: 0
TwoLmEnabled: 0
TwoLmEnabled: 0
2LM_XTILE: 0
2LM_XTILE: 0
CMI Credit Data for CPU Stepping: Ex and Later
CMI Credit Data for CPU Stepping: Ex and Later
S0 TME CPUID = 1
S1 TME CPUID = 1
S0 TmeActivated = 0
S1 TmeActivated = 0
TmeEnabled: 0
TmeEnabled: 0
TwoLmEnabled: 0
TwoLmEnabled: 0
2LM_XTILE: 0
2LM_XTILE: 0
CMI Credit Data for CPU Stepping: Ex and Later
CMI Credit Data for CPU Stepping: Ex and Later
S0 TME CPUID = 1
S1 TME CPUID = 1
S0 TmeActivated = 0
S1 TmeActivated = 0
TmeEnabled: 0
TmeEnabled: 0
TwoLmEnabled: 0
TwoLmEnabled: 0
2LM_XTILE: 0
2LM_XTILE: 0
CMI Credit Data for CPU Stepping: Ex and Later
CMI Credit Data for CPU Stepping: Ex and Later
S0 TME CPUID = 1
S1 TME CPUID = 1
S0 TmeActivated = 0
S1 TmeActivated = 0
TmeEnabled: 0
TmeEnabled: 0
TwoLmEnabled: 0
TwoLmEnabled: 0
2LM_XTILE: 0
2LM_XTILE: 0
CMI Credit Data for CPU Stepping: Ex and Later
CMI Credit Data for CPU Stepping: Ex and Later
S0 TME CPUID = 1
S1 TME CPUID = 1
S0 TmeActivated = 0
S1 TmeActivated = 0
TmeEnabled: 0
TmeEnabled: 0
TwoLmEnabled: 0
TwoLmEnabled: 0
2LM_XTILE: 0
2LM_XTILE: 0
CMI Credit Data for CPU Stepping: Ex and Later
CMI Credit Data for CPU Stepping: Ex and Later
S0 TME CPUID = 1
S1 TME CPUID = 1
S0 TmeActivated = 0
S1 TmeActivated = 0
TmeEnabled: 0
TmeEnabled: 0
TwoLmEnabled: 0
TwoLmEnabled: 0
2LM_XTILE: 0
2LM_XTILE: 0
CMI Credit Data for CPU Stepping: Ex and Later
CMI Credit Data for CPU Stepping: Ex and Later
S0 TME CPUID = 1
S1 TME CPUID = 1
S0 TmeActivated = 0
S1 TmeActivated = 0
TmeEnabled: 0
TmeEnabled: 0
TwoLmEnabled: 0
TwoLmEnabled: 0
2LM_XTILE: 0
2LM_XTILE: 0
CMI Credit Data for CPU Stepping: Ex and Later
CMI Credit Data for CPU Stepping: Ex and Later
S0 TME CPUID = 1
S1 TME CPUID = 1
S0 TmeActivated = 0
S1 TmeActivated = 0
TmeEnabled: 0
TmeEnabled: 0
TwoLmEnabled: 0
TwoLmEnabled: 0
2LM_XTILE: 0
2LM_XTILE: 0
CMI Credit Data for CPU Stepping: Ex and Later
CMI Credit Data for CPU Stepping: Ex and Later
S0 TME CPUID = 1
S1 TME CPUID = 1
S0 TmeActivated = 0
S1 TmeActivated = 0
TmeEnabled: 0
TmeEnabled: 0
TwoLmEnabled: 0
TwoLmEnabled: 0
2LM_XTILE: 0
2LM_XTILE: 0
CMI Credit Data for CPU Stepping: Ex and Later
CMI Credit Data for CPU Stepping: Ex and Later
S0 TME CPUID = 1
S1 TME CPUID = 1
S0 TmeActivated = 0
S1 TmeActivated = 0
TmeEnabled: 0
TmeEnabled: 0
TwoLmEnabled: 0
TwoLmEnabled: 0
2LM_XTILE: 0
2LM_XTILE: 0
CMI Credit Data for CPU Stepping: Ex and Later
CMI Credit Data for CPU Stepping: Ex and Later
S0 TME CPUID = 1
S1 TME CPUID = 1
S0 TmeActivated = 0
S1 TmeActivated = 0
TmeEnabled: 0
TmeEnabled: 0
TwoLmEnabled: 0
TwoLmEnabled: 0
2LM_XTILE: 0
2LM_XTILE: 0
CMI Credit Data for CPU Stepping: Ex and Later
CMI Credit Data for CPU Stepping: Ex and Later
S0 TME CPUID = 1
S1 TME CPUID = 1
S0 TmeActivated = 0
S1 TmeActivated = 0
TmeEnabled: 0
TmeEnabled: 0
TwoLmEnabled: 0
TwoLmEnabled: 0
2LM_XTILE: 0
2LM_XTILE: 0
CMI Credit Data for CPU Stepping: Ex and Later
CMI Credit Data for CPU Stepping: Ex and Later
S0 TME CPUID = 1
S1 TME CPUID = 1
S0 TmeActivated = 0
S1 TmeActivated = 0
TmeEnabled: 0
TmeEnabled: 0
TwoLmEnabled: 0
TwoLmEnabled: 0
2LM_XTILE: 0
2LM_XTILE: 0
CMI Credit Data for CPU Stepping: Ex and Later
CMI Credit Data for CPU Stepping: Ex and Later
S0 TME CPUID = 1
S1 TME CPUID = 1
S0 TmeActivated = 0
S1 TmeActivated = 0
TmeEnabled: 0
TmeEnabled: 0
TwoLmEnabled: 0
TwoLmEnabled: 0
2LM_XTILE: 0
2LM_XTILE: 0
CMI Credit Data for CPU Stepping: Ex and Later
CMI Credit Data for CPU Stepping: Ex and Later
Mesh2Mem CMI Data Version: 1
Mesh2Mem CMI Data Version: 1
S0 TME CPUID = 1
S1 TME CPUID = 1
S0 TmeActivated = 0
S1 TmeActivated = 0
TmeEnabled: 0
TmeEnabled: 0
TwoLmEnabled: 0
TwoLmEnabled: 0
2LM_XTILE: 0
2LM_XTILE: 0
CMI Credit Data for CPU Stepping: Ex and Later
CMI Credit Data for CPU Stepping: Ex and Later
S0 TME CPUID = 1
S1 TME CPUID = 1
S0 TmeActivated = 0
S1 TmeActivated = 0
TmeEnabled: 0
TmeEnabled: 0
TwoLmEnabled: 0
TwoLmEnabled: 0
2LM_XTILE: 0
2LM_XTILE: 0
CMI Credit Data for CPU Stepping: Ex and Later
CMI Credit Data for CPU Stepping: Ex and Later
S0 TME CPUID = 1
S1 TME CPUID = 1
S0 TmeActivated = 0
S1 TmeActivated = 0
TmeEnabled: 0
TmeEnabled: 0
TwoLmEnabled: 0
TwoLmEnabled: 0
2LM_XTILE: 0
2LM_XTILE: 0
CMI Credit Data for CPU Stepping: Ex and Later
CMI Credit Data for CPU Stepping: Ex and Later
S0 TME CPUID = 1
S1 TME CPUID = 1
S0 TmeActivated = 0
S1 TmeActivated = 0
McTme CMI Data Version: 1
McTme CMI Data Version: 1
S0 TME CPUID = 1
S1 TME CPUID = 1
S0 TmeActivated = 0
S1 TmeActivated = 0
TmeEnabled: 0
TmeEnabled: 0
TwoLmEnabled: 0
TwoLmEnabled: 0
2LM_XTILE: 0
2LM_XTILE: 0
CMI Credit Data for CPU Stepping: Ex and Later
CMI Credit Data for CPU Stepping: Ex and Later
S0 TME CPUID = 1
S1 TME CPUID = 1
S0 TmeActivated = 0
S1 TmeActivated = 0
TmeEnabled: 0
TmeEnabled: 0
TwoLmEnabled: 0
TwoLmEnabled: 0
2LM_XTILE: 0
2LM_XTILE: 0
CMI Credit Data for CPU Stepping: Ex and Later
CMI Credit Data for CPU Stepping: Ex and Later
S0 TME CPUID = 1
S1 TME CPUID = 1
S0 TmeActivated = 0
S1 TmeActivated = 0
TmeEnabled: 0
TmeEnabled: 0
TwoLmEnabled: 0
TwoLmEnabled: 0
2LM_XTILE: 0
2LM_XTILE: 0
CMI Credit Data for CPU Stepping: Ex and Later
CMI Credit Data for CPU Stepping: Ex and Later
S0 TME CPUID = 1
S1 TME CPUID = 1
S0 TmeActivated = 0
S1 TmeActivated = 0
TmeEnabled: 0
TmeEnabled: 0
TwoLmEnabled: 0
TwoLmEnabled: 0
2LM_XTILE: 0
2LM_XTILE: 0
CMI Credit Data for CPU Stepping: Ex and Later
CMI Credit Data for CPU Stepping: Ex and Later
S0 TME CPUID = 1
S1 TME CPUID = 1
S0 TmeActivated = 0
S1 TmeActivated = 0
TmeEnabled: 0
TmeEnabled: 0
TwoLmEnabled: 0
TwoLmEnabled: 0
2LM_XTILE: 0
2LM_XTILE: 0
CMI Credit Data for CPU Stepping: Ex and Later
CMI Credit Data for CPU Stepping: Ex and Later
Mesh2Mem CMI Data Version: 1
Mesh2Mem CMI Data Version: 1
S0 TME CPUID = 1
S1 TME CPUID = 1
S0 TmeActivated = 0
S1 TmeActivated = 0
TmeEnabled: 0
TmeEnabled: 0
TwoLmEnabled: 0
TwoLmEnabled: 0
2LM_XTILE: 0
2LM_XTILE: 0
CMI Credit Data for CPU Stepping: Ex and Later
CMI Credit Data for CPU Stepping: Ex and Later
S0 TME CPUID = 1
S1 TME CPUID = 1
S0 TmeActivated = 0
S1 TmeActivated = 0
TmeEnabled: 0
TmeEnabled: 0
TwoLmEnabled: 0
TwoLmEnabled: 0
2LM_XTILE: 0
2LM_XTILE: 0
CMI Credit Data for CPU Stepping: Ex and Later
CMI Credit Data for CPU Stepping: Ex and Later
S0 TME CPUID = 1
S1 TME CPUID = 1
S0 TmeActivated = 0
S1 TmeActivated = 0
TmeEnabled: 0
TmeEnabled: 0
TwoLmEnabled: 0
TwoLmEnabled: 0
2LM_XTILE: 0
2LM_XTILE: 0
CMI Credit Data for CPU Stepping: Ex and Later
CMI Credit Data for CPU Stepping: Ex and Later
S0 TME CPUID = 1
S1 TME CPUID = 1
S0 TmeActivated = 0
S1 TmeActivated = 0
S0 TME CPUID = 1
S1 TME CPUID = 1
S0 TmeActivated = 0
S1 TmeActivated = 0
TmeEnabled: 0
TmeEnabled: 0
TwoLmEnabled: 0
TwoLmEnabled: 0
2LM_XTILE: 0
2LM_XTILE: 0
CMI Credit Data for CPU Stepping: Ex and Later
CMI Credit Data for CPU Stepping: Ex and Later
S0 TME CPUID = 1
S1 TME CPUID = 1
S0 TmeActivated = 0
S1 TmeActivated = 0
TmeEnabled: 0
TmeEnabled: 0
TwoLmEnabled: 0
TwoLmEnabled: 0
2LM_XTILE: 0
2LM_XTILE: 0
CMI Credit Data for CPU Stepping: Ex and Later
CMI Credit Data for CPU Stepping: Ex and Later
S0 TME CPUID = 1
S1 TME CPUID = 1
S0 TmeActivated = 0
S1 TmeActivated = 0
TmeEnabled: 0
TmeEnabled: 0
TwoLmEnabled: 0
TwoLmEnabled: 0
2LM_XTILE: 0
2LM_XTILE: 0
CMI Credit Data for CPU Stepping: Ex and Later
CMI Credit Data for CPU Stepping: Ex and Later
S0 TME CPUID = 1
S1 TME CPUID = 1
S0 TmeActivated = 0
S1 TmeActivated = 0
TmeEnabled: 0
TmeEnabled: 0
TwoLmEnabled: 0
TwoLmEnabled: 0
2LM_XTILE: 0
2LM_XTILE: 0
CMI Credit Data for CPU Stepping: Ex and Later
CMI Credit Data for CPU Stepping: Ex and Later
S0 TME CPUID = 1
S1 TME CPUID = 1
S0 TmeActivated = 0
S1 TmeActivated = 0
TmeEnabled: 0
TmeEnabled: 0
TwoLmEnabled: 0
TwoLmEnabled: 0
2LM_XTILE: 0
2LM_XTILE: 0
CMI Credit Data for CPU Stepping: Ex and Later
CMI Credit Data for CPU Stepping: Ex and Later
Mesh2Mem CMI Data Version: 1
Mesh2Mem CMI Data Version: 1
S0 TME CPUID = 1
S1 TME CPUID = 1
S0 TmeActivated = 0
S1 TmeActivated = 0
TmeEnabled: 0
TmeEnabled: 0
TwoLmEnabled: 0
TwoLmEnabled: 0
2LM_XTILE: 0
2LM_XTILE: 0
CMI Credit Data for CPU Stepping: Ex and Later
CMI Credit Data for CPU Stepping: Ex and Later
S0 TME CPUID = 1
S1 TME CPUID = 1
S0 TmeActivated = 0
S1 TmeActivated = 0
TmeEnabled: 0
TmeEnabled: 0
TwoLmEnabled: 0
TwoLmEnabled: 0
2LM_XTILE: 0
2LM_XTILE: 0
CMI Credit Data for CPU Stepping: Ex and Later
CMI Credit Data for CPU Stepping: Ex and Later
S0 TME CPUID = 1
S1 TME CPUID = 1
S0 TmeActivated = 0
S1 TmeActivated = 0
TmeEnabled: 0
TmeEnabled: 0
TwoLmEnabled: 0
TwoLmEnabled: 0
2LM_XTILE: 0
2LM_XTILE: 0
CMI Credit Data for CPU Stepping: Ex and Later
CMI Credit Data for CPU Stepping: Ex and Later
S0 TME CPUID = 1
S1 TME CPUID = 1
S0 TmeActivated = 0
S1 TmeActivated = 0
S0 TME CPUID = 1
S1 TME CPUID = 1
S0 TmeActivated = 0
S1 TmeActivated = 0
TmeEnabled: 0
TmeEnabled: 0
TwoLmEnabled: 0
TwoLmEnabled: 0
2LM_XTILE: 0
2LM_XTILE: 0
CMI Credit Data for CPU Stepping: Ex and Later
CMI Credit Data for CPU Stepping: Ex and Later
S0 TME CPUID = 1
S1 TME CPUID = 1
S0 TmeActivated = 0
S1 TmeActivated = 0
TmeEnabled: 0
TmeEnabled: 0
TwoLmEnabled: 0
TwoLmEnabled: 0
2LM_XTILE: 0
2LM_XTILE: 0
CMI Credit Data for CPU Stepping: Ex and Later
CMI Credit Data for CPU Stepping: Ex and Later
S0 TME CPUID = 1
S1 TME CPUID = 1
S0 TmeActivated = 0
S1 TmeActivated = 0
TmeEnabled: 0
TmeEnabled: 0
TwoLmEnabled: 0
TwoLmEnabled: 0
2LM_XTILE: 0
2LM_XTILE: 0
CMI Credit Data for CPU Stepping: Ex and Later
CMI Credit Data for CPU Stepping: Ex and Later
S0 TME CPUID = 1
S1 TME CPUID = 1
S0 TmeActivated = 0
S1 TmeActivated = 0
TmeEnabled: 0
TmeEnabled: 0
TwoLmEnabled: 0
TwoLmEnabled: 0
2LM_XTILE: 0
2LM_XTILE: 0
CMI Credit Data for CPU Stepping: Ex and Later
CMI Credit Data for CPU Stepping: Ex and Later
S0 TME CPUID = 1
S1 TME CPUID = 1
S0 TmeActivated = 0
S1 TmeActivated = 0
TmeEnabled: 0
TmeEnabled: 0
TwoLmEnabled: 0
TwoLmEnabled: 0
2LM_XTILE: 0
2LM_XTILE: 0
CMI Credit Data for CPU Stepping: Ex and Later
CMI Credit Data for CPU Stepping: Ex and Later
Mesh2Mem CMI Data Version: 1
Mesh2Mem CMI Data Version: 1
S0 TME CPUID = 1
S1 TME CPUID = 1
S0 TmeActivated = 0
S1 TmeActivated = 0
TmeEnabled: 0
TmeEnabled: 0
TwoLmEnabled: 0
TwoLmEnabled: 0
2LM_XTILE: 0
2LM_XTILE: 0
CMI Credit Data for CPU Stepping: Ex and Later
CMI Credit Data for CPU Stepping: Ex and Later
S0 TME CPUID = 1
S1 TME CPUID = 1
S0 TmeActivated = 0
S1 TmeActivated = 0
TmeEnabled: 0
TmeEnabled: 0
TwoLmEnabled: 0
TwoLmEnabled: 0
2LM_XTILE: 0
2LM_XTILE: 0
CMI Credit Data for CPU Stepping: Ex and Later
CMI Credit Data for CPU Stepping: Ex and Later
S0 TME CPUID = 1
S1 TME CPUID = 1
S0 TmeActivated = 0
S1 TmeActivated = 0
TmeEnabled: 0
TmeEnabled: 0
TwoLmEnabled: 0
TwoLmEnabled: 0
2LM_XTILE: 0
2LM_XTILE: 0
CMI Credit Data for CPU Stepping: Ex and Later
CMI Credit Data for CPU Stepping: Ex and Later
S0 TME CPUID = 1
S1 TME CPUID = 1
S0 TmeActivated = 0
S1 TmeActivated = 0
S0 TME CPUID = 1
S1 TME CPUID = 1
S0 TmeActivated = 0
S1 TmeActivated = 0
TmeEnabled: 0
TmeEnabled: 0
TwoLmEnabled: 0
TwoLmEnabled: 0
2LM_XTILE: 0
2LM_XTILE: 0
CMI Credit Data for CPU Stepping: Ex and Later
CMI Credit Data for CPU Stepping: Ex and Later
S0 TME CPUID = 1
S1 TME CPUID = 1
S0 TmeActivated = 0
S1 TmeActivated = 0
TmeEnabled: 0
TmeEnabled: 0
TwoLmEnabled: 0
TwoLmEnabled: 0
2LM_XTILE: 0
2LM_XTILE: 0
CMI Credit Data for CPU Stepping: Ex and Later
CMI Credit Data for CPU Stepping: Ex and Later
S0 TME CPUID = 1
S1 TME CPUID = 1
S0 TmeActivated = 0
S1 TmeActivated = 0
TmeEnabled: 0
TmeEnabled: 0
TwoLmEnabled: 0
TwoLmEnabled: 0
2LM_XTILE: 0
2LM_XTILE: 0
CMI Credit Data for CPU Stepping: Ex and Later
CMI Credit Data for CPU Stepping: Ex and Later
S0 TME CPUID = 1
S1 TME CPUID = 1
S0 TmeActivated = 0
S1 TmeActivated = 0
TmeEnabled: 0
TmeEnabled: 0
TwoLmEnabled: 0
TwoLmEnabled: 0
2LM_XTILE: 0
2LM_XTILE: 0
CMI Credit Data for CPU Stepping: Ex and Later
CMI Credit Data for CPU Stepping: Ex and Later
S0 TME CPUID = 1
S1 TME CPUID = 1
S0 TmeActivated = 0
S1 TmeActivated = 0
TmeEnabled: 0
TmeEnabled: 0
TwoLmEnabled: 0
TwoLmEnabled: 0
2LM_XTILE: 0
2LM_XTILE: 0
CMI Credit Data for CPU Stepping: Ex and Later
CMI Credit Data for CPU Stepping: Ex and Later
S0 TME CPUID = 1
S1 TME CPUID = 1
S0 TmeActivated = 0
S1 TmeActivated = 0
S0 TME CPUID = 1
S1 TME CPUID = 1
S0 TmeActivated = 0
S1 TmeActivated = 0
S0 TME CPUID = 1
S1 TME CPUID = 1
S0 TmeActivated = 0
S1 TmeActivated = 0
S0 TME CPUID = 1
S1 TME CPUID = 1
S0 TmeActivated = 0
S1 TmeActivated = 0
S0 TME CPUID = 1
S1 TME CPUID = 1
S0 TmeActivated = 0
S1 TmeActivated = 0
S0 TME CPUID = 1
S1 TME CPUID = 1
S0 TmeActivated = 0
S1 TmeActivated = 0
S0 TME CPUID = 1
S1 TME CPUID = 1
S0 TmeActivated = 0
S1 TmeActivated = 0
S0 TME CPUID = 1
S1 TME CPUID = 1
S0 TmeActivated = 0
S1 TmeActivated = 0
[ScktId: 0] Init CMI Credit Programming - 1904ms
[ScktId: 1] Init CMI Credit Programming - 1902ms
[ScktId: 0] Program TME Cfg register for SGX/TDX -- Started
[ScktId: 1] Program TME Cfg register for SGX/TDX -- Started
DisableTdxTdMismatchBit return fail: Aborted
DisableTdxTdMismatchBit return fail: Aborted
[ScktId: 1] Program TME Cfg register for SGX/TDX - 17ms
[ScktId: 0] Program TME Cfg register for SGX/TDX - 26ms
[ScktId: 1] Pipe Sync AP Final Error Sync -- Started
[ScktId: 0] Pipe Sync AP Final Error Sync -- Started
[ScktId: 1] Pipe Sync AP Final Error Sync - 16ms
[ScktId: 0] Pipe Sync AP Final Error Sync - 10ms
N1 Checked into Pipe
[ScktId: 0] Initialize ADR -- Started
[ScktId: 0] Initialize ADR - 5ms
N1 Checked into Pipe
[ScktId: 0] Set RAS Configuration -- Started
N0: ProbabilisticTargetedRowRefreshInit Enable
SetPatrolScrub execution on Skt 0
N0: ScrubFactor: 86400, MemSize: 20, Scrub Interval:29E8
N0: ScrubFactor: 86400, MemSize: 20, Scrub Interval:29E8
N0: ScrubFactor: 86400, MemSize: 20, Scrub Interval:29E8
N0: ScrubFactor: 86400, MemSize: 20, Scrub Interval:29E8
N0: ScrubFactor: 86400, MemSize: 20, Scrub Interval:29E8
N0: ScrubFactor: 86400, MemSize: 20, Scrub Interval:29E8
N0: ScrubFactor: 86400, MemSize: 20, Scrub Interval:29E8
N0: ScrubFactor: 86400, MemSize: 20, Scrub Interval:29E8
N0: ScrubFactor: 86400, MemSize: 20, Scrub Interval:29E8
N0: ScrubFactor: 86400, MemSize: 20, Scrub Interval:29E8
N0: ScrubFactor: 86400, MemSize: 20, Scrub Interval:29E8
N0: ScrubFactor: 86400, MemSize: 20, Scrub Interval:29E8
N0: ScrubFactor: 86400, MemSize: 20, Scrub Interval:29E8
N0: ScrubFactor: 86400, MemSize: 20, Scrub Interval:29E8
N0: ScrubFactor: 86400, MemSize: 20, Scrub Interval:29E8
N0: ScrubFactor: 86400, MemSize: 20, Scrub Interval:29E8
[imc] ConfigSystemRetryRegister start
N1: ProbabilisticTargetedRowRefreshInit Enable
SetPatrolScrub execution on Skt 1
N1: ScrubFactor: 86400, MemSize: 20, Scrub Interval:29E8
N1: ScrubFactor: 86400, MemSize: 20, Scrub Interval:29E8
N1: ScrubFactor: 86400, MemSize: 20, Scrub Interval:29E8
N1: ScrubFactor: 86400, MemSize: 20, Scrub Interval:29E8
N1: ScrubFactor: 86400, MemSize: 20, Scrub Interval:29E8
N1: ScrubFactor: 86400, MemSize: 20, Scrub Interval:29E8
N1: ScrubFactor: 86400, MemSize: 20, Scrub Interval:29E8
N1: ScrubFactor: 86400, MemSize: 20, Scrub Interval:29E8
N1: ScrubFactor: 86400, MemSize: 20, Scrub Interval:29E8
N1: ScrubFactor: 86400, MemSize: 20, Scrub Interval:29E8
N1: ScrubFactor: 86400, MemSize: 20, Scrub Interval:29E8
N1: ScrubFactor: 86400, MemSize: 20, Scrub Interval:29E8
N1: ScrubFactor: 86400, MemSize: 20, Scrub Interval:29E8
N1: ScrubFactor: 86400, MemSize: 20, Scrub Interval:29E8
N1: ScrubFactor: 86400, MemSize: 20, Scrub Interval:29E8
N1: ScrubFactor: 86400, MemSize: 20, Scrub Interval:29E8
[imc] ConfigSystemRetryRegister start
SetRASConfig End
[ScktId: 0] Set RAS Configuration - 213ms
N1 Checked into Pipe
[ScktId: 0] Memory Late -- Started
[ScktId: 0] Memory Late - 5ms
[ScktId: 0] Print All Stats -- Started
[ScktId: 1] Print All Stats -- Started
Performance statistics for socket 0
FmcMaxCached = 0
FmcCachedReads = 0
MRC Phase | PCI | PCI | Polling |JEDEC | FixedDelay | Vref | CPGC | SMBUS | SMBUS | MRS | Duration | GetSysHostPointer
| Read | Write | Count | | Time | Count | Count | Read | Write | Write | Time | Calls
--------------------------------------------------------------------------------------------------------------------------------------------
Total Stats | 107730600| 16948309| 61951909 | 1| 2392 | 753296 | 555904 | 3264 | 33408 | 133135 | 69915 | 0 |
PreMrc | 110601| 189846| 1205 | 0| 1 | 0 | 32 | 56 | 24 | 16 | 22 | 0 |
PipeSync | 614334| 130845| 0 | 0| 0 | 0 | 0 | 0 | 0 | 0 | 416 | 0 |
SelectBootMode | 11257| 5| 0 | 0| 0 | 0 | 0 | 0 | 0 | 0 | 8 | 0 |
InitStructLate | 22977| 3| 0 | 0| 0 | 0 | 0 | 0 | 0 | 0 | 8 | 0 |
DetectDimmConfig | 401633| 13527| 77673 | 0| 0 | 0 | 0 | 2236 | 2204 | 0 | 322 | 0 |
CheckPor | 11242| 4| 0 | 0| 0 | 0 | 0 | 0 | 0 | 0 | 6 | 0 |
HBM Init Clock | 11235| 4| 0 | 0| 0 | 0 | 0 | 0 | 0 | 0 | 5 | 0 |
Clock Init | 11255| 28| 0 | 0| 0 | 0 | 0 | 0 | 0 | 0 | 96 | 0 |
UnlockMemRegs | 19414| 5| 0 | 0| 0 | 0 | 0 | 0 | 0 | 0 | 7 | 0 |
HBM Pre-Training | 360797| 1709| 0 | 0| 0 | 0 | 0 | 0 | 0 | 0 | 141 | 0 |
ConfigXmp | 17371| 1| 0 | 0| 0 | 0 | 0 | 0 | 0 | 0 | 6 | 0 |
SetClkVdd | 11262| 44| 0 | 0| 0 | 0 | 0 | 0 | 0 | 0 | 5 | 0 |
SetPmicVdd | 137012| 85| 448 | 0| 166 | 0 | 0 | 16 | 8 | 0 | 223 | 0 |
CheckDimmRanks | 11251| 36| 0 | 0| 0 | 0 | 0 | 0 | 0 | 0 | 6 | 0 |
EarlyDdrTherm | 26669| 107| 0 | 0| 0 | 0 | 0 | 0 | 0 | 0 | 10 | 0 |
EarlyInitMem | 21446| 1| 0 | 0| 0 | 0 | 0 | 0 | 0 | 0 | 8 | 0 |
HBM Training | 7481811| 236| 0 | 0| 58 | 0 | 0 | 0 | 0 | 0 | 2916 | 0 |
HBM PostPkgRepair | 17858| 1| 0 | 0| 0 | 0 | 0 | 0 | 0 | 0 | 6 | 0 |
HBM Mem BIST | 16311| 1| 0 | 0| 0 | 0 | 0 | 0 | 0 | 0 | 6 | 0 |
HBM ReTraining | 17332| 1| 0 | 0| 0 | 0 | 0 | 0 | 0 | 0 | 7 | 0 |
GatherSPDData | 219886| 817| 2734 | 0| 0 | 0 | 0 | 256 | 4 | 0 | 88 | 0 |
DisplayDimmInfo | 3043313| 2| 0 | 0| 0 | 0 | 0 | 0 | 0 | 0 | 1153 | 0 |
ChannelEarlyConfig | 1590459| 80597| 168 | 0| 0 | 0 | 0 | 16 | 0 | 0 | 728 | 0 |
DdrioPowerStatusCheck| 25030| 1| 0 | 0| 0 | 0 | 0 | 0 | 0 | 0 | 9 | 0 |
InitDdrioInterface | 33972| 3709| 0 | 0| 24 | 0 | 0 | 0 | 0 | 0 | 52 | 0 |
X-Over Calib | 732| 398| 0 | 0| 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 |
RcompStaticLeg | 180| 352| 0 | 0| 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 |
DdrPreTrainingInit | 244176| 744| 284 | 1| 16 | 0 | 0 | 0 | 32 | 16 | 111 | 0 |
CsClockEarly | 316271| 189277| 3424 | 0| 26 | 0 | 20 | 16 | 376 | 120 | 227 | 0 |
CaClockEarlySimple | 322034| 350674| 30234 | 0| 20 | 0 | 32 | 192 | 3252 | 3184 | 347 | 0 |
CaClockEarlyComplex| 99532| 78447| 30846 | 0| 5 | 0 | 32 | 192 | 3324 | 3260 | 164 | 0 |
CaClkEarCompRecent | 100052| 79111| 30778 | 0| 5 | 0 | 32 | 192 | 3316 | 3252 | 164 | 0 |
DcaSlewRate | 2| 1| 0 | 0| 0 | 0 | 0 | 0 | 0 | 0 | 4 | 0 |
RcdDcaDckDutyCycle | 465596| 602311| 2210 | 0| 33 | 0 | 32 | 0 | 260 | 260 | 416 | 0 |
Lrdimm Bcom Train | 131466| 1| 0 | 0| 0 | 0 | 0 | 0 | 0 | 0 | 28 | 0 |
DcaDfeTraining | 4332574| 4339202| 73134 | 0| 398 | 0 | 98800 | 0 | 8604 | 3276 | 3726 | 0 |
BsCsClockEarly | 67284| 42085| 20214 | 0| 4 | 0 | 472 | 16 | 2340 | 2320 | 105 | 0 |
BsCaClockEarly | 250626| 138195| 57596 | 0| 8 | 0 | 77 | 0 | 6776 | 6816 | 328 | 0 |
Lrdimm Pba Enu Id | 26561| 1| 0 | 0| 0 | 0 | 0 | 0 | 0 | 0 | 8 | 0 |
Early Req Clk Train| 19395| 2| 0 | 0| 0 | 0 | 0 | 0 | 0 | 0 | 7 | 0 |
LRDIMM RX | 20915| 2| 0 | 0| 0 | 0 | 0 | 0 | 0 | 0 | 13 | 0 |
Receive Enable | 20230| 17334| 1686 | 0| 0 | 0 | 570 | 0 | 0 | 8 | 20 | 0 |
Rd Dq/Dqs | 449774| 304580| 56444 | 0| 11 | 44 | 7776 | 0 | 0 | 32 | 354 | 0 |
Swizzle Discovery | 20786| 2422| 48 | 0| 0 | 0 | 48 | 0 | 0 | 32 | 10 | 0 |
Dram Duty Cycle Adj| 2| 1| 0 | 0| 0 | 0 | 0 | 0 | 0 | 0 | 5 | 0 |
RdDqDqsDfeCentering| 86182| 68265| 29535 | 0| 3 | 9512 | 2600 | 0 | 0 | 364 | 94 | 0 |
READ DFE | 3306372| 2672386| 1798798 | 0| 201 | 562696 | 125784 | 0 | 0 | 25320 | 3457 | 0 |
Rx Dq/Dqs Post Dfe | 590905| 521676| 312777 | 0| 39 | 43848 | 24012 | 0 | 0 | 5220 | 641 | 0 |
Periodic Rx Retrain| 95| 21| 0 | 0| 0 | 0 | 0 | 0 | 0 | 0 | 6 | 0 |
Switch DDRT2 Mode | 10| 33| 0 | 0| 0 | 0 | 0 | 0 | 0 | 0 | 4 | 0 |
LRDIMM TX | 2| 1| 0 | 0| 0 | 0 | 0 | 0 | 0 | 0 | 5 | 0 |
Write Leveling | 58073| 82463| 4656 | 0| 19 | 0 | 1856 | 0 | 0 | 160 | 97 | 0 |
Wr Dq/Dqs | 459058| 732418| 50688 | 0| 8 | 48 | 17140 | 0 | 0 | 244 | 558 | 0 |
Tx DQ Slew Rate | 2| 1| 0 | 0| 0 | 0 | 0 | 0 | 0 | 0 | 4 | 0 |
WrDqDqsDfeCentering| 186547| 301512| 6096 | 0| 36 | 2444 | 15268 | 0 | 0 | 4412 | 292 | 0 |
PostPkgRepair | 8| 4| 0 | 0| 0 | 0 | 0 | 0 | 0 | 0 | 6 | 0 |
LRDIMM Bs Write | 2| 1| 0 | 0| 0 | 0 | 0 | 0 | 0 | 0 | 5 | 0 |
DCA TCO | 472322| 613707| 24480 | 0| 31 | 0 | 240 | 0 | 2880 | 2880 | 562 | 0 |
TCO_DQDQS | 2| 1| 0 | 0| 0 | 0 | 0 | 0 | 0 | 0 | 4 | 0 |
TX ODT | 1302| 3393| 0 | 0| 0 | 0 | 216 | 0 | 0 | 72 | 8 | 0 |
WRITE DFE | 5163009| 4023065| 3448695 | 0| 660 | 109660 | 214092 | 0 | 0 | 65436 | 4255 | 0 |
WRITE DB DFE | 2| 1| 0 | 0| 0 | 0 | 0 | 0 | 0 | 0 | 4 | 0 |
Tx Dq/Dqs Post Dfe | 4149646| 321529| 4011228 | 0| 47 | 8004 | 15739 | 0 | 0 | 4453 | 1707 | 0 |
Read Post Dfe Late | 33835873| 660662| 33467270 | 0| 20 | 12948 | 18135 | 0 | 0 | 0 | 12451 | 0 |
MemSweepTester | 2| 1| 0 | 0| 0 | 0 | 0 | 0 | 0 | 0 | 3 | 0 |
Periodic Tx Retrain| 1338| 1629| 24 | 0| 0 | 0 | 16 | 0 | 0 | 4 | 7 | 0 |
Round Trip Opt | 2223514| 27859| 2197236 | 0| 1 | 0 | 1332 | 0 | 0 | 0 | 827 | 0 |
TurnaroundTrain | 1283852| 114650| 1232058 | 0| 19 | 3372 | 5882 | 0 | 0 | 1710 | 530 | 0 |
DisplayResults | 147410| 157746| 5832 | 0| 3 | 360 | 3384 | 0 | 0 | 0 | 109 | 0 |
PostTrainingInit | 19548| 373| 0 | 0| 0 | 0 | 4 | 0 | 0 | 4 | 9 | 0 |
One Time TxRt | 21349| 913| 24 | 0| 512 | 0 | 8 | 0 | 0 | 0 | 521 | 0 |
ExecuteSsaRmt | 4| 2| 0 | 0| 0 | 0 | 0 | 0 | 0 | 0 | 3 | 0 |
Offset training | 24493| 1| 0 | 0| 0 | 0 | 0 | 0 | 0 | 0 | 9 | 0 |
HBM Post-Training | 7448915| 2834| 0 | 0| 0 | 0 | 0 | 0 | 0 | 0 | 2819 | 0 |
LateConfig | 116024| 331| 40 | 0| 0 | 0 | 12 | 4 | 0 | 12 | 41 | 0 |
InitThrottling | 56896| 211| 336 | 0| 0 | 0 | 0 | 32 | 0 | 0 | 31 | 0 |
MEMTEST | 5712862| 4405| 5651223 | 0| 0 | 0 | 60 | 8 | 0 | 12 | 2036 | 0 |
HBM Mem Test | 2619657| 18443| 2546472 | 0| 0 | 0 | 256 | 0 | 0 | 0 | 1195 | 0 |
HBM Scrambling | 22017| 65| 0 | 0| 0 | 0 | 0 | 0 | 0 | 0 | 8 | 0 |
HBMFaultResilientBoot| 11213| 4| 0 | 0| 0 | 0 | 0 | 0 | 0 | 0 | 6 | 0 |
HBM Reset System | 11180| 4| 0 | 0| 0 | 0 | 0 | 0 | 0 | 0 | 6 | 0 |
HBM Mem Init | 1606577| 2985| 1508754 | 0| 0 | 0 | 32 | 0 | 0 | 0 | 716 | 0 |
Pub DIMM Manifest | 21925| 163| 252 | 0| 0 | 0 | 0 | 24 | 0 | 0 | 14 | 0 |
SvlAndScrambling | 23994| 5| 0 | 0| 0 | 0 | 0 | 0 | 0 | 0 | 9 | 0 |
Mem ALIAS Check | 11222| 4| 0 | 0| 0 | 0 | 0 | 0 | 0 | 0 | 6 | 0 |
CpgcOutOfOrderMode | 29147| 45| 0 | 0| 0 | 0 | 0 | 0 | 0 | 0 | 11 | 0 |
EnableHostRefresh | 241757| 104| 0 | 0| 0 | 0 | 0 | 0 | 0 | 0 | 91 | 0 |
MEMINIT | 3450699| 1311| 3428514 | 0| 0 | 0 | 16 | 0 | 0 | 0 | 1220 | 0 |
CmiCreditProg | 5000325| 581| 0 | 0| 0 | 0 | 0 | 0 | 0 | 0 | 1904 | 0 |
CheckRasPostMrc | 11500| 148| 0 | 0| 0 | 0 | 0 | 0 | 0 | 0 | 7 | 0 |
MemLate | 11228| 47| 0 | 0| 0 | 0 | 0 | 0 | 0 | 0 | 5 | 0 |
Memory Mapping | 17871| 5369| 0 | 0| 0 | 0 | 0 | 0 | 0 | 0 | 16856 | 0 |
HBM Normal Mode | 135425| 1275| 0 | 0| 0 | 0 | 0 | 0 | 0 | 0 | 53 | 0 |
Normal Mode | 1137766| 1037| 136 | 0| 0 | 0 | 0 | 8 | 8 | 0 | 435 | 0 |
InitAdr | 11171| 4| 0 | 0| 0 | 0 | 0 | 0 | 0 | 0 | 5 | 0 |
RAS Config | 14161| 2031| 0 | 0| 0 | 0 | 0 | 0 | 0 | 0 | 213 | 0 |
CallTableOverhead | 4809052| 301| 0 | 0| 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 |
Normalize CMD | 20494| 18739| 1683 | 0| 0 | 0 | 593 | 0 | 0 | 24 | 20 | 0 |
No Zone 0 | 6| 5| 0 | 0| 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 |
No Zone 1 | 0| 1| 0 | 0| 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 |
No Zone 2 | 0| 0| 0 | 0| 0 | 0 | 0 | 0 | 0 | 0 | 203 | 0 |
No Zone 3 | 8574| 2| 0 | 0| 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 |
No Zone 4 | 1| 0| 0 | 0| 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 |
No Zone 5 | 0| 2| 0 | 0| 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 |
No Zone 6 | 1| 0| 0 | 0| 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 |
No Zone 7 | 0| 2| 0 | 0| 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 |
No Zone 8 | 1| 0| 0 | 0| 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 |
No Zone 9 | 2004101| 16783| 1835976 | 0| 2 | 360 | 1304 | 0 | 0 | 216 | 3536 | 0 |
Performance statistics for socket 1
FmcMaxCached = 0
FmcCachedReads = 0
MRC Phase | PCI | PCI | Polling |JEDEC | FixedDelay | Vref | CPGC | SMBUS | SMBUS | MRS | Duration | GetSysHostPointer
| Read | Write | Count | | Time | Count | Count | Read | Write | Write | Time | Calls
--------------------------------------------------------------------------------------------------------------------------------------------
Total Stats | 95198719| 17006627| 64470818 | 1| 2394 | 766752 | 559720 | 3264 | 33512 | 132842 | 52799 | 0 |
PreMrc | 90291| 174374| 1220 | 0| 1 | 0 | 32 | 56 | 24 | 16 | 15 | 0 |
PipeSync | 327517| 152491| 0 | 0| 0 | 0 | 0 | 0 | 0 | 0 | 541 | 0 |
InitStructLate | 13000| 3| 0 | 0| 0 | 0 | 0 | 0 | 0 | 0 | 8 | 0 |
DetectDimmConfig | 268823| 13527| 79707 | 0| 0 | 0 | 0 | 2236 | 2204 | 0 | 320 | 0 |
UnlockMemRegs | 11817| 5| 0 | 0| 0 | 0 | 0 | 0 | 0 | 0 | 7 | 0 |
HBM Pre-Training | 135287| 1707| 0 | 0| 0 | 0 | 0 | 0 | 0 | 0 | 109 | 0 |
ConfigXmp | 12399| 1| 0 | 0| 0 | 0 | 0 | 0 | 0 | 0 | 7 | 0 |
SetPmicVdd | 59967| 85| 460 | 0| 166 | 0 | 0 | 16 | 8 | 0 | 216 | 0 |
EarlyDdrTherm | 11918| 107| 0 | 0| 0 | 0 | 0 | 0 | 0 | 0 | 9 | 0 |
EarlyInitMem | 14188| 1| 0 | 0| 0 | 0 | 0 | 0 | 0 | 0 | 8 | 0 |
HBM Training | 4327544| 236| 0 | 0| 57 | 0 | 0 | 0 | 0 | 0 | 2916 | 0 |
HBM PostPkgRepair | 10913| 1| 0 | 0| 0 | 0 | 0 | 0 | 0 | 0 | 7 | 0 |
HBM Mem BIST | 11516| 1| 0 | 0| 0 | 0 | 0 | 0 | 0 | 0 | 7 | 0 |
HBM ReTraining | 11518| 1| 0 | 0| 0 | 0 | 0 | 0 | 0 | 0 | 7 | 0 |
GatherSPDData | 122308| 817| 2863 | 0| 0 | 0 | 0 | 256 | 4 | 0 | 86 | 0 |
DisplayDimmInfo | 10639| 2| 0 | 0| 0 | 0 | 0 | 0 | 0 | 0 | 580 | 0 |
ChannelEarlyConfig | 2598519| 80597| 176 | 0| 0 | 0 | 0 | 16 | 0 | 0 | 1272 | 0 |
DdrioPowerStatusCheck| 10935| 1| 0 | 0| 0 | 0 | 0 | 0 | 0 | 0 | 8 | 0 |
InitDdrioInterface | 29457| 3703| 0 | 0| 24 | 0 | 0 | 0 | 0 | 0 | 55 | 0 |
X-Over Calib | 732| 398| 0 | 0| 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 |
RcompStaticLeg | 166| 352| 0 | 0| 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 |
DdrPreTrainingInit | 121068| 744| 299 | 1| 16 | 0 | 0 | 0 | 32 | 16 | 104 | 0 |
CsClockEarly | 268564| 189277| 3594 | 0| 26 | 0 | 20 | 16 | 376 | 120 | 246 | 0 |
CaClockEarlySimple | 936410| 350878| 31828 | 0| 20 | 0 | 32 | 192 | 3264 | 3196 | 575 | 0 |
CaClockEarlyComplex| 101002| 79091| 31664 | 0| 5 | 0 | 32 | 192 | 3364 | 3300 | 173 | 0 |
CaClkEarCompRecent | 125350| 79797| 32625 | 0| 5 | 0 | 32 | 192 | 3368 | 3304 | 183 | 0 |
DcaSlewRate | 2| 1| 0 | 0| 0 | 0 | 0 | 0 | 0 | 0 | 4 | 0 |
RcdDcaDckDutyCycle | 465618| 602311| 2232 | 0| 33 | 0 | 32 | 0 | 260 | 260 | 456 | 0 |
Lrdimm Bcom Train | 10336| 1| 0 | 0| 0 | 0 | 0 | 0 | 0 | 0 | 7 | 0 |
DcaDfeTraining | 4336148| 4339202| 76708 | 0| 398 | 0 | 98800 | 0 | 8604 | 3276 | 4078 | 0 |
BsCsClockEarly | 77383| 42085| 20871 | 0| 4 | 0 | 472 | 16 | 2340 | 2320 | 114 | 0 |
BsCaClockEarly | 252370| 138195| 59340 | 0| 8 | 0 | 77 | 0 | 6776 | 6816 | 347 | 0 |
Lrdimm Pba Enu Id | 16242| 1| 0 | 0| 0 | 0 | 0 | 0 | 0 | 0 | 9 | 0 |
Early Req Clk Train| 18611| 2| 0 | 0| 0 | 0 | 0 | 0 | 0 | 0 | 9 | 0 |
LRDIMM RX | 4| 2| 0 | 0| 0 | 0 | 0 | 0 | 0 | 0 | 9 | 0 |
Receive Enable | 20230| 17339| 1686 | 0| 0 | 0 | 570 | 0 | 0 | 8 | 22 | 0 |
Rd Dq/Dqs | 450903| 304587| 57573 | 0| 11 | 44 | 7776 | 0 | 0 | 32 | 371 | 0 |
Swizzle Discovery | 1408| 2422| 48 | 0| 0 | 0 | 48 | 0 | 0 | 32 | 6 | 0 |
Dram Duty Cycle Adj| 2| 1| 0 | 0| 0 | 0 | 0 | 0 | 0 | 0 | 5 | 0 |
RdDqDqsDfeCentering| 72437| 69485| 32333 | 0| 3 | 9872 | 2668 | 0 | 0 | 364 | 97 | 0 |
READ DFE | 3453514| 2704447| 1922000 | 0| 202 | 574460 | 127044 | 0 | 0 | 25320 | 3690 | 0 |
Rx Dq/Dqs Post Dfe | 621126| 527911| 335170 | 0| 39 | 44424 | 24424 | 0 | 0 | 5220 | 695 | 0 |
Periodic Rx Retrain| 89| 21| 0 | 0| 0 | 0 | 0 | 0 | 0 | 0 | 6 | 0 |
Switch DDRT2 Mode | 10| 33| 0 | 0| 0 | 0 | 0 | 0 | 0 | 0 | 4 | 0 |
LRDIMM TX | 2| 1| 0 | 0| 0 | 0 | 0 | 0 | 0 | 0 | 5 | 0 |
Write Leveling | 58074| 82455| 4656 | 0| 19 | 0 | 1856 | 0 | 0 | 160 | 103 | 0 |
Wr Dq/Dqs | 465207| 732422| 50688 | 0| 8 | 48 | 17140 | 0 | 0 | 244 | 609 | 0 |
Tx DQ Slew Rate | 2| 1| 0 | 0| 0 | 0 | 0 | 0 | 0 | 0 | 4 | 0 |
WrDqDqsDfeCentering| 134522| 302419| 6180 | 0| 37 | 2736 | 15227 | 0 | 0 | 4389 | 307 | 0 |
PostPkgRepair | 8| 4| 0 | 0| 0 | 0 | 0 | 0 | 0 | 0 | 6 | 0 |
LRDIMM Bs Write | 2| 1| 0 | 0| 0 | 0 | 0 | 0 | 0 | 0 | 5 | 0 |
DCA TCO | 468224| 608588| 24582 | 0| 31 | 0 | 240 | 0 | 2880 | 2880 | 598 | 0 |
TCO_DQDQS | 2| 1| 0 | 0| 0 | 0 | 0 | 0 | 0 | 0 | 4 | 0 |
TX ODT | 1302| 3393| 0 | 0| 0 | 0 | 216 | 0 | 0 | 72 | 8 | 0 |
WRITE DFE | 5942644| 4035129| 4185420 | 0| 660 | 110108 | 215395 | 0 | 0 | 64949 | 4838 | 0 |
WRITE DB DFE | 2| 1| 0 | 0| 0 | 0 | 0 | 0 | 0 | 0 | 4 | 0 |
Tx Dq/Dqs Post Dfe | 4234752| 325729| 4095038 | 0| 47 | 7720 | 16009 | 0 | 0 | 4547 | 1728 | 0 |
Read Post Dfe Late | 35405590| 663922| 35028596 | 0| 20 | 13388 | 18555 | 0 | 0 | 0 | 12679 | 0 |
MemSweepTester | 2| 1| 0 | 0| 0 | 0 | 0 | 0 | 0 | 0 | 3 | 0 |
Periodic Tx Retrain| 1338| 1629| 24 | 0| 0 | 0 | 16 | 0 | 0 | 4 | 7 | 0 |
Round Trip Opt | 2426198| 29317| 2398552 | 0| 1 | 0 | 1404 | 0 | 0 | 0 | 873 | 0 |
TurnaroundTrain | 1318832| 115400| 1266856 | 0| 19 | 3232 | 5935 | 0 | 0 | 1729 | 536 | 0 |
DisplayResults | 406188| 157746| 5832 | 0| 3 | 360 | 3384 | 0 | 0 | 0 | 209 | 0 |
PostTrainingInit | 15827| 373| 0 | 0| 0 | 0 | 4 | 0 | 0 | 4 | 10 | 0 |
One Time TxRt | 14236| 913| 24 | 0| 512 | 0 | 8 | 0 | 0 | 0 | 521 | 0 |
ExecuteSsaRmt | 10622| 2| 0 | 0| 0 | 0 | 0 | 0 | 0 | 0 | 7 | 0 |
Offset training | 2| 1| 0 | 0| 0 | 0 | 0 | 0 | 0 | 0 | 4 | 0 |
HBM Post-Training | 4269311| 2834| 0 | 0| 0 | 0 | 0 | 0 | 0 | 0 | 2817 | 0 |
LateConfig | 58628| 331| 40 | 0| 0 | 0 | 12 | 4 | 0 | 12 | 38 | 0 |
InitThrottling | 63005| 211| 352 | 0| 0 | 0 | 0 | 32 | 0 | 0 | 40 | 0 |
MEMTEST | 6039764| 4405| 6019544 | 0| 0 | 0 | 60 | 8 | 0 | 12 | 2031 | 0 |
HBM Mem Test | 2411270| 18443| 2392974 | 0| 0 | 0 | 256 | 0 | 0 | 0 | 1187 | 0 |
HBM Scrambling | 8611| 65| 0 | 0| 0 | 0 | 0 | 0 | 0 | 0 | 7 | 0 |
HBM Mem Init | 1449232| 2985| 1425022 | 0| 0 | 0 | 32 | 0 | 0 | 0 | 706 | 0 |
Pub DIMM Manifest | 15466| 252| 264 | 0| 0 | 0 | 0 | 24 | 0 | 0 | 10 | 0 |
SvlAndScrambling | 14474| 5| 0 | 0| 0 | 0 | 0 | 0 | 0 | 0 | 9 | 0 |
CpgcOutOfOrderMode | 50| 45| 0 | 0| 0 | 0 | 0 | 0 | 0 | 0 | 5 | 0 |
EnableHostRefresh | 140337| 104| 0 | 0| 0 | 0 | 0 | 0 | 0 | 0 | 92 | 0 |
MEMINIT | 3022200| 1311| 3009951 | 0| 0 | 0 | 16 | 0 | 0 | 0 | 1221 | 0 |
CmiCreditProg | 2903960| 581| 0 | 0| 0 | 0 | 0 | 0 | 0 | 0 | 1902 | 0 |
HBM Normal Mode | 85545| 1275| 0 | 0| 0 | 0 | 0 | 0 | 0 | 0 | 55 | 0 |
Normal Mode | 658298| 1037| 136 | 0| 0 | 0 | 0 | 8 | 8 | 0 | 435 | 0 |
CallTableOverhead | 1733207| 591| 0 | 0| 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 |
Normalize CMD | 20458| 18715| 1680 | 0| 0 | 0 | 592 | 0 | 0 | 24 | 22 | 0 |
No Zone 0 | 2| 2| 0 | 0| 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 |
No Zone 1 | 0| 1| 0 | 0| 0 | 0 | 0 | 0 | 0 | 0 | 4 | 0 |
No Zone 2 | 8212| 1| 0 | 0| 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 |
No Zone 3 | 0| 3| 0 | 0| 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 |
No Zone 4 | 0| 3| 0 | 0| 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 |
No Zone 5 | 0| 3| 0 | 0| 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 |
No Zone 6 | 0| 1| 0 | 0| 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 |
No Zone 7 | 1| 0| 0 | 0| 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 |
No Zone 8 | 0| 1| 0 | 0| 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 |
No Zone 9 | 1964829| 16553| 1862010 | 0| 2 | 360 | 1304 | 0 | 0 | 216 | 1762 | 0 |
[ScktId: 0] Print All Stats - 3220ms
[ScktId: 1] Print All Stats - 3220ms
[ScktId: 0] Print Performance Settings -- Started
[ScktId: 1] Print Performance Settings -- Started
[ScktId: 0] Print Performance Settings - 9ms
[ScktId: 1] Print Performance Settings - 11ms
N1 Checked into Pipe
[ScktId: 0] DIMM Information After MRC -- Started
======================================================================================
START_DIMMINFO_SYSTEM_TABLE
======================================================================================
| Socket 0 | Socket 1 | Socket 2 | Socket 3 | System |
======================================================================================
Active Memory | 128GB | 128GB | N/A | N/A | 256GB |
DDR Freq | | | | | DDR5-4800 |
Ch0 CL-RCD-RP-CMD |40-39-39-1n |40-39-39-1n | | | |
Ch2 CL-RCD-RP-CMD |40-39-39-1n |40-39-39-1n | | | |
Ch4 CL-RCD-RP-CMD |40-39-39-1n |40-39-39-1n | | | |
Ch6 CL-RCD-RP-CMD |40-39-39-1n |40-39-39-1n | | | |
DDR Vdd | 1.145V | 1.145V | N/A | N/A | |
ECC Checking | | | | | On |
Patrol/Demand Scrub | | | | | Off |
RAS Mode | | | | | Indep |
Paging Policy | | | | | Closed |
Data Scrambling | | | | | On |
CCMRC Revision | | | | | 00.50.00 |
RC Version | | | | | 1.1.1.01BC |
======================================================================================
STOP_DIMMINFO_SYSTEM_TABLE
======================================================================================
[ScktId: 0] DIMM Information After MRC - 195ms
N1 Checked into Pipe
[ScktId: 0] DDR Reset Loop -- Started
[ScktId: 0] DDR Reset Loop - 5ms
[ScktId: 1] Pipe Sync AP Final Error Sync -- Started
[ScktId: 0] Pipe Sync AP Final Error Sync -- Started
[ScktId: 1] Pipe Sync AP Final Error Sync - 10ms
[ScktId: 0] Pipe Sync AP Final Error Sync - 10ms
Total MRC time = 74819ms
Total MRC time = 75022ms
STOP_MRC_RUN
Final Rc Heap usage:
******* Configure Mesh Mode - START *******
Configure Socket 0 2LM Hash on KTI and IIO-Enabled
Configure Socket 1 2LM Hash on KTI and IIO-Enabled
Socket 0 Tolm 20
SADEntry Local Base Limit Cluster Ways NmChWays ImcIntBitmap NmImcIntBitmap Mc0ChIntMap Mc1ChIntMap Mc2ChIntMap Mc3ChIntMap Type
0 1 0x0000000 0x0000040 0 1 8 0x1 0x1 0x3 0x3 0x3 0x3 2LM HBM cache DDR Granularity=256B IntGranularity=2
MemInfo->imcBitmap[0][MC_TECH_DDR]=0x1 McBitmapPerCluster[0]=0x1 XorDefeature[socket=0]=0
Ways[socket=0][cluster=0]=8
1 1 0x0000040 0x0000220 0 1 8 0x1 0x1 0x3 0x3 0x3 0x3 2LM HBM cache DDR Granularity=256B IntGranularity=2
MemInfo->imcBitmap[0][MC_TECH_DDR]=0x1 XorDefeature[socket=0]=0
Ways[socket=0][cluster=0]=8
16 1 0x0000220 0x0000420 1 1 8 0x2 0x2 0x3 0x3 0x3 0x3 2LM HBM cache DDR Granularity=256B IntGranularity=2
MemInfo->imcBitmap[0][MC_TECH_DDR]=0x3 McBitmapPerCluster[1]=0x2 XorDefeature[socket=0]=0
Ways[socket=0][cluster=1]=8
17 0 0x0000420 0x0000420 1 0 0 0x0 0x0 0x0 0x0 0x0 0x0 NXM Granularity=Unknown
32 1 0x0000420 0x0000620 2 1 8 0x4 0x4 0x3 0x3 0x3 0x3 2LM HBM cache DDR Granularity=256B IntGranularity=2
MemInfo->imcBitmap[0][MC_TECH_DDR]=0x7 McBitmapPerCluster[2]=0x4 XorDefeature[socket=0]=0
Ways[socket=0][cluster=2]=8
33 0 0x0000620 0x0000620 2 0 0 0x0 0x0 0x0 0x0 0x0 0x0 NXM Granularity=Unknown
48 1 0x0000620 0x0000820 3 1 8 0x8 0x8 0x3 0x3 0x3 0x3 2LM HBM cache DDR Granularity=256B IntGranularity=2
MemInfo->imcBitmap[0][MC_TECH_DDR]=0xF McBitmapPerCluster[3]=0x8 XorDefeature[socket=0]=0
Ways[socket=0][cluster=3]=8
49 0 0x0000820 0x0000820 3 0 0 0x0 0x0 0x0 0x0 0x0 0x0 NXM Granularity=Unknown
MC-Cluster InterleaveEn PrefetchEn Membase MemLimit
0 0 0 0x0000000 0x0000220
NumOfMcEnabled=1, NumOfMcPerCluster=1
1 0 0 0x0000220 0x0000420
NumOfMcEnabled=2, NumOfMcPerCluster=1
2 0 0 0x0000420 0x0000620
NumOfMcEnabled=3, NumOfMcPerCluster=1
3 0 0 0x0000620 0x0000820
NumOfMcEnabled=4, NumOfMcPerCluster=1
Number of clusters = 4
Socket 1 Tolm 20
SADEntry Local Base Limit Cluster Ways NmChWays ImcIntBitmap NmImcIntBitmap Mc0ChIntMap Mc1ChIntMap Mc2ChIntMap Mc3ChIntMap Type
0 1 0x0000820 0x0000A20 0 1 8 0x1 0x1 0x3 0x3 0x3 0x3 2LM HBM cache DDR Granularity=256B IntGranularity=2
MemInfo->imcBitmap[1][MC_TECH_DDR]=0x1 McBitmapPerCluster[0]=0x1 XorDefeature[socket=1]=0
Ways[socket=1][cluster=0]=8
16 1 0x0000A20 0x0000C20 1 1 8 0x2 0x2 0x3 0x3 0x3 0x3 2LM HBM cache DDR Granularity=256B IntGranularity=2
MemInfo->imcBitmap[1][MC_TECH_DDR]=0x3 McBitmapPerCluster[1]=0x2 XorDefeature[socket=1]=0
Ways[socket=1][cluster=1]=8
32 1 0x0000C20 0x0000E20 2 1 8 0x4 0x4 0x3 0x3 0x3 0x3 2LM HBM cache DDR Granularity=256B IntGranularity=2
MemInfo->imcBitmap[1][MC_TECH_DDR]=0x7 McBitmapPerCluster[2]=0x4 XorDefeature[socket=1]=0
Ways[socket=1][cluster=2]=8
48 1 0x0000E20 0x0001020 3 1 8 0x8 0x8 0x3 0x3 0x3 0x3 2LM HBM cache DDR Granularity=256B IntGranularity=2
MemInfo->imcBitmap[1][MC_TECH_DDR]=0xF McBitmapPerCluster[3]=0x8 XorDefeature[socket=1]=0
Ways[socket=1][cluster=3]=8
MC-Cluster InterleaveEn PrefetchEn Membase MemLimit
0 0 0 0x0000820 0x0000A20
NumOfMcEnabled=1, NumOfMcPerCluster=1
1 0 0 0x0000A20 0x0000C20
NumOfMcEnabled=2, NumOfMcPerCluster=1
2 0 0 0x0000C20 0x0000E20
NumOfMcEnabled=3, NumOfMcPerCluster=1
3 0 0 0x0000E20 0x0001020
NumOfMcEnabled=4, NumOfMcPerCluster=1
Number of clusters = 4
Socket 0
SNC_Base_1 = 0000 GB
SNC_Base_2 = 0034 GB
SNC_Base_3 = 0066 GB
SNC_Base_4 = 0098 GB
SNC_Base_5 = 0130 GB
Socket 1
SNC_Base_1 = 0130 GB
SNC_Base_2 = 0162 GB
SNC_Base_3 = 0194 GB
SNC_Base_4 = 0226 GB
SNC_Base_5 = 0258 GB
Socket 0 XPT and KTI prefetch Disabled
Programming credits for clustering mode
Socket 1 XPT and KTI prefetch Disabled
Programming credits for clustering mode
[SDSi] Init for Socket[0] - Begin
[VSEC] VSEC discovery - S:B:D:F = 0x0:0x6A:0x3:0x1, VidDid = 0x09A78086
VsecId: 0x00000041 SDSI VSEC capability offset: 0x00000160
[OOBMSM] InitOobMsmBar() Enter
Socket[0], OobMsm.Func[1], BAR[1]
Disable MSE and BME
Original StsCmdReg Value = 0x00100006
BarSize: 0x00040000
BarBase: 0xC6B40000(Already assigned)
Enable MSE and BME
[OOBMSM] InitOobMsmBar() Exit
SDSi MMIO Layout Address = 0xC6B42000
SdsiMmio.Ppin Address = 0xC6B42408, Value = 0x22E546CB1AD8E915
[OOBMSM] InitOobMsmBar() Enter
Socket[0], OobMsm.Func[1], BAR[0]
Disable MSE and BME
Original StsCmdReg Value = 0x00100006
BarSize: 0x00002000
BarBase: 0xC6B00000(Already assigned)
Enable MSE and BME
[OOBMSM] InitOobMsmBar() Exit
PMon Bar0 address: 0xC6B00000
Global Discovery State at address: 0xC6B00000
Access Type|Max Blocks|Block Stride|Type ||GlobalControlAddr||NumBlockStatusBits|GblCtrStatAddr
[63:62] |[25:16] |[15:8] |[7:0]||[63:0] ||[23:8] |[7:0]
0 |221 |4 |5 ||0x2FF0 ||209 |0xE
Unit Discovery State at address: 0xC6B00020
Access Type|UnitStatus Offset|Counter0 Offset|Ctrl Width|Ctrl0 Offset|Num Ctrl Regs||UnitCounterControlAddr||Gbl Stat Pos|Unit ID|UnitType|Offset
[63:62] |[39:32] |[31:24] |[23:16] |[15:8] |[7:0] ||[63:0] ||[47:32] |[31:16]|[15:0]|
UNIT_TYPE_CHA
0 |0x01 |0x08 |48 |0x02 |4 ||0x00002000 || 0 | 0 |0|0x0040
UNIT_TYPE_CHA
0 |0x01 |0x08 |48 |0x02 |4 ||0x00002010 || 1 | 1 |0|0x0060
UNIT_TYPE_CHA
0 |0x01 |0x08 |48 |0x02 |4 ||0x00002020 || 2 | 2 |0|0x0080
UNIT_TYPE_CHA
0 |0x01 |0x08 |48 |0x02 |4 ||0x00002030 || 3 | 3 |0|0x00A0
UNIT_TYPE_CHA
0 |0x01 |0x08 |48 |0x02 |4 ||0x00002040 || 4 | 4 |0|0x00C0
UNIT_TYPE_CHA
0 |0x01 |0x08 |48 |0x02 |4 ||0x00002050 || 5 | 5 |0|0x00E0
UNIT_TYPE_CHA
0 |0x01 |0x08 |48 |0x02 |4 ||0x00002060 || 6 | 6 |0|0x0100
UNIT_TYPE_CHA
0 |0x01 |0x08 |48 |0x02 |4 ||0x00002070 || 7 | 7 |0|0x0120
UNIT_TYPE_CHA
0 |0x01 |0x08 |48 |0x02 |4 ||0x00002080 || 8 | 8 |0|0x0140
UNIT_TYPE_CHA
0 |0x01 |0x08 |48 |0x02 |4 ||0x00002090 || 9 | 9 |0|0x0160
UNIT_TYPE_CHA
0 |0x01 |0x08 |48 |0x02 |4 ||0x000020A0 ||10 |10 |0|0x0180
UNIT_TYPE_CHA
0 |0x01 |0x08 |48 |0x02 |4 ||0x000020B0 ||11 |11 |0|0x01A0
UNIT_TYPE_CHA
0 |0x01 |0x08 |48 |0x02 |4 ||0x000020C0 ||12 |12 |0|0x01C0
UNIT_TYPE_CHA
0 |0x01 |0x08 |48 |0x02 |4 ||0x000020D0 ||13 |13 |0|0x01E0
UNIT_TYPE_CHA
0 |0x01 |0x08 |48 |0x02 |4 ||0x000020E0 ||14 |14 |0|0x0200
UNIT_TYPE_CHA
0 |0x01 |0x08 |48 |0x02 |4 ||0x000020F0 ||15 |15 |0|0x0220
UNIT_TYPE_CHA
0 |0x01 |0x08 |48 |0x02 |4 ||0x00002100 ||16 |16 |0|0x0240
UNIT_TYPE_CHA
0 |0x01 |0x08 |48 |0x02 |4 ||0x00002110 ||17 |17 |0|0x0260
UNIT_TYPE_CHA
0 |0x01 |0x08 |48 |0x02 |4 ||0x00002120 ||18 |18 |0|0x0280
UNIT_TYPE_CHA
0 |0x01 |0x08 |48 |0x02 |4 ||0x00002130 ||19 |19 |0|0x02A0
UNIT_TYPE_CHA
0 |0x01 |0x08 |48 |0x02 |4 ||0x00002140 ||20 |20 |0|0x02C0
UNIT_TYPE_CHA
0 |0x01 |0x08 |48 |0x02 |4 ||0x00002150 ||21 |21 |0|0x02E0
UNIT_TYPE_CHA
0 |0x01 |0x08 |48 |0x02 |4 ||0x00002160 ||22 |22 |0|0x0300
UNIT_TYPE_CHA
0 |0x01 |0x08 |48 |0x02 |4 ||0x00002170 ||23 |23 |0|0x0320
UNIT_TYPE_CHA
0 |0x01 |0x08 |48 |0x02 |4 ||0x00002180 ||24 |24 |0|0x0340
UNIT_TYPE_CHA
0 |0x01 |0x08 |48 |0x02 |4 ||0x00002190 ||25 |25 |0|0x0360
UNIT_TYPE_CHA
0 |0x01 |0x08 |48 |0x02 |4 ||0x000021A0 ||26 |26 |0|0x0380
UNIT_TYPE_CHA
0 |0x01 |0x08 |48 |0x02 |4 ||0x000021B0 ||27 |27 |0|0x03A0
UNIT_TYPE_CHA
0 |0x01 |0x08 |48 |0x02 |4 ||0x000021C0 ||28 |28 |0|0x03C0
UNIT_TYPE_CHA
0 |0x01 |0x08 |48 |0x02 |4 ||0x000021D0 ||29 |29 |0|0x03E0
UNIT_TYPE_CHA
0 |0x01 |0x08 |48 |0x02 |4 ||0x000021E0 ||30 |30 |0|0x0400
UNIT_TYPE_CHA
0 |0x01 |0x08 |48 |0x02 |4 ||0x000021F0 ||31 |31 |0|0x0420
UNIT_TYPE_CHA
0 |0x01 |0x08 |48 |0x02 |4 ||0x00002200 ||32 |32 |0|0x0440
UNIT_TYPE_CHA
0 |0x01 |0x08 |48 |0x02 |4 ||0x00002210 ||33 |33 |0|0x0460
UNIT_TYPE_CHA
0 |0x01 |0x08 |48 |0x02 |4 ||0x00002220 ||34 |34 |0|0x0480
UNIT_TYPE_CHA
0 |0x01 |0x08 |48 |0x02 |4 ||0x00002230 ||35 |35 |0|0x04A0
UNIT_TYPE_CHA
0 |0x01 |0x08 |48 |0x02 |4 ||0x00002240 ||36 |36 |0|0x04C0
UNIT_TYPE_CHA
0 |0x01 |0x08 |48 |0x02 |4 ||0x00002250 ||37 |37 |0|0x04E0
UNIT_TYPE_CHA
0 |0x01 |0x08 |48 |0x02 |4 ||0x00002260 ||38 |38 |0|0x0500
UNIT_TYPE_CHA
0 |0x01 |0x08 |48 |0x02 |4 ||0x00002270 ||39 |39 |0|0x0520
UNIT_TYPE_CHA
0 |0x01 |0x08 |48 |0x02 |4 ||0x00002280 ||40 |40 |0|0x0540
UNIT_TYPE_CHA
0 |0x01 |0x08 |48 |0x02 |4 ||0x00002290 ||41 |41 |0|0x0560
UNIT_TYPE_CHA
0 |0x01 |0x08 |48 |0x02 |4 ||0x000022A0 ||42 |42 |0|0x0580
UNIT_TYPE_CHA
0 |0x01 |0x08 |48 |0x02 |4 ||0x000022B0 ||43 |43 |0|0x05A0
UNIT_TYPE_CHA
0 |0x01 |0x08 |48 |0x02 |4 ||0x000022C0 ||44 |44 |0|0x05C0
UNIT_TYPE_CHA
0 |0x01 |0x08 |48 |0x02 |4 ||0x000022D0 ||45 |45 |0|0x05E0
UNIT_TYPE_CHA
0 |0x01 |0x08 |48 |0x02 |4 ||0x000022E0 ||46 |46 |0|0x0600
UNIT_TYPE_CHA
0 |0x01 |0x08 |48 |0x02 |4 ||0x000022F0 ||47 |47 |0|0x0620
UNIT_TYPE_CHA
0 |0x01 |0x08 |48 |0x02 |4 ||0x00002300 ||48 |48 |0|0x0640
UNIT_TYPE_CHA
0 |0x01 |0x08 |48 |0x02 |4 ||0x00002310 ||49 |49 |0|0x0660
UNIT_TYPE_CHA
0 |0x01 |0x08 |48 |0x02 |4 ||0x00002320 ||50 |50 |0|0x0680
UNIT_TYPE_CHA
0 |0x01 |0x08 |48 |0x02 |4 ||0x00002330 ||51 |51 |0|0x06A0
UNIT_TYPE_CHA
0 |0x01 |0x08 |48 |0x02 |4 ||0x00002340 ||52 |52 |0|0x06C0
UNIT_TYPE_CHA
0 |0x01 |0x08 |48 |0x02 |4 ||0x00002350 ||53 |53 |0|0x06E0
UNIT_TYPE_CHA
0 |0x01 |0x08 |48 |0x02 |4 ||0x00002360 ||54 |54 |0|0x0700
UNIT_TYPE_CHA
0 |0x01 |0x08 |48 |0x02 |4 ||0x00002370 ||55 |55 |0|0x0720
UNIT_TYPE_CHA
0 |0x01 |0x08 |48 |0x02 |4 ||0x00002380 ||56 |56 |0|0x0740
UNIT_TYPE_CHA
0 |0x01 |0x08 |48 |0x02 |4 ||0x00002390 ||57 |57 |0|0x0760
UNIT_TYPE_CHA
0 |0x01 |0x08 |48 |0x02 |4 ||0x000023A0 ||58 |58 |0|0x0780
UNIT_TYPE_CHA
0 |0x01 |0x08 |48 |0x02 |4 ||0x000023B0 ||59 |59 |0|0x07A0
UNIT_TYPE_TC
0 |0x01 |0x08 |48 |0x02 |4 ||0x00003000 ||100 | 0 |1|0x0C60
UNIT_TYPE_TC
0 |0x01 |0x08 |48 |0x02 |4 ||0x00003010 ||101 | 1 |1|0x0CC0
UNIT_TYPE_TC
0 |0x01 |0x08 |48 |0x02 |4 ||0x00003020 ||102 | 2 |1|0x0D20
UNIT_TYPE_TC
0 |0x01 |0x08 |48 |0x02 |4 ||0x00003030 ||103 | 3 |1|0x0D80
UNIT_TYPE_TC
0 |0x00 |0x00 | 0 |0x00 |0 ||0x00000000 || 0 | 0 |0|0x0DE0
UNIT_TYPE_TC
0 |0x01 |0x08 |48 |0x02 |4 ||0x00003040 ||105 | 5 |1|0x0E40
UNIT_TYPE_TC
0 |0x01 |0x08 |48 |0x02 |4 ||0x00003050 ||106 | 6 |1|0x0EA0
UNIT_TYPE_TC
0 |0x01 |0x08 |48 |0x02 |4 ||0x00003060 ||107 | 7 |1|0x0F00
UNIT_TYPE_TC
0 |0x01 |0x08 |48 |0x02 |4 ||0x00003070 ||108 | 8 |1|0x0F60
UNIT_TYPE_TC
0 |0x01 |0x08 |48 |0x02 |4 ||0x00003080 ||109 | 9 |1|0x0FC0
UNIT_TYPE_TC
0 |0x00 |0x00 | 0 |0x00 |0 ||0x00000000 || 0 | 0 |0|0x1020
UNIT_TYPE_TC
0 |0x01 |0x08 |48 |0x02 |4 ||0x00003090 ||111 |11 |1|0x1080
UNIT_TYPE_IRP
0 |0x01 |0x08 |48 |0x02 |2 ||0x00003400 ||112 | 0 |2|0x0C80
UNIT_TYPE_IRP
0 |0x01 |0x08 |48 |0x02 |2 ||0x00003410 ||113 | 1 |2|0x0CE0
UNIT_TYPE_IRP
0 |0x01 |0x08 |48 |0x02 |2 ||0x00003420 ||114 | 2 |2|0x0D40
UNIT_TYPE_IRP
0 |0x01 |0x08 |48 |0x02 |2 ||0x00003430 ||115 | 3 |2|0x0DA0
UNIT_TYPE_IRP
0 |0x00 |0x00 | 0 |0x00 |0 ||0x00000000 || 0 | 0 |0|0x0E00
UNIT_TYPE_IRP
0 |0x01 |0x08 |48 |0x02 |2 ||0x00003440 ||117 | 5 |2|0x0E60
UNIT_TYPE_IRP
0 |0x01 |0x08 |48 |0x02 |2 ||0x00003450 ||118 | 6 |2|0x0EC0
UNIT_TYPE_IRP
0 |0x01 |0x08 |48 |0x02 |2 ||0x00003460 ||119 | 7 |2|0x0F20
UNIT_TYPE_IRP
0 |0x01 |0x08 |48 |0x02 |2 ||0x00003470 ||120 | 8 |2|0x0F80
UNIT_TYPE_IRP
0 |0x01 |0x08 |48 |0x02 |2 ||0x00003480 ||121 | 9 |2|0x0FE0
UNIT_TYPE_IRP
0 |0x00 |0x00 | 0 |0x00 |0 ||0x00000000 || 0 | 0 |0|0x1040
UNIT_TYPE_IRP
0 |0x01 |0x08 |48 |0x02 |2 ||0x00003490 ||123 |11 |2|0x10A0
UNIT_TYPE_M2PCIE
0 |0x01 |0x08 |48 |0x02 |4 ||0x00003200 ||124 | 0 |3|0x0C40
UNIT_TYPE_M2PCIE
0 |0x01 |0x08 |48 |0x02 |4 ||0x00003210 ||125 | 1 |3|0x0CA0
UNIT_TYPE_M2PCIE
0 |0x01 |0x08 |48 |0x02 |4 ||0x00003220 ||126 | 2 |3|0x0D00
UNIT_TYPE_M2PCIE
0 |0x01 |0x08 |48 |0x02 |4 ||0x00003230 ||127 | 3 |3|0x0D60
UNIT_TYPE_M2PCIE
0 |0x00 |0x00 | 0 |0x00 |0 ||0x00000000 || 0 | 0 |0|0x0DC0
UNIT_TYPE_M2PCIE
0 |0x01 |0x08 |48 |0x02 |4 ||0x00003240 ||129 | 5 |3|0x0E20
UNIT_TYPE_M2PCIE
0 |0x01 |0x08 |48 |0x02 |4 ||0x00003250 ||130 | 6 |3|0x0E80
UNIT_TYPE_M2PCIE
0 |0x01 |0x08 |48 |0x02 |4 ||0x00003260 ||131 | 7 |3|0x0EE0
UNIT_TYPE_M2PCIE
0 |0x01 |0x08 |48 |0x02 |4 ||0x00003270 ||132 | 8 |3|0x0F40
UNIT_TYPE_M2PCIE
0 |0x01 |0x08 |48 |0x02 |4 ||0x00003280 ||133 | 9 |3|0x0FA0
UNIT_TYPE_M2PCIE
0 |0x00 |0x00 | 0 |0x00 |0 ||0x00000000 || 0 | 0 |0|0x1000
UNIT_TYPE_M2PCIE
0 |0x01 |0x08 |48 |0x02 |4 ||0x00003290 ||135 |11 |3|0x1060
UNIT_TYPE_PCU
0 |0x01 |0x08 |48 |0x02 |4 ||0x00002FC0 ||136 | 0 |4|0x0020
UNIT_TYPE_MC
1 |0x5C |0x08 |48 |0x40 |4 ||0xC8AA2800 ||138 | 0 |6|0x08C0
UNIT_TYPE_MC
1 |0x5C |0x08 |48 |0x40 |4 ||0xC8AAA800 ||139 | 1 |6|0x08E0
UNIT_TYPE_MC
1 |0x5C |0x08 |48 |0x40 |4 ||0xC8B22800 ||140 | 2 |6|0x0900
UNIT_TYPE_MC
1 |0x5C |0x08 |48 |0x40 |4 ||0xC8B2A800 ||141 | 3 |6|0x0920
UNIT_TYPE_MC
1 |0x5C |0x08 |48 |0x40 |4 ||0xC8BA2800 ||142 | 4 |6|0x0940
UNIT_TYPE_MC
1 |0x5C |0x08 |48 |0x40 |4 ||0xC8BAA800 ||143 | 5 |6|0x0960
UNIT_TYPE_MC
1 |0x5C |0x08 |48 |0x40 |4 ||0xC8C22800 ||144 | 6 |6|0x0980
UNIT_TYPE_MC
1 |0x5C |0x08 |48 |0x40 |4 ||0xC8C2A800 ||145 | 7 |6|0x09A0
UNIT_TYPE_M2M
2 |0x70 |0x08 |48 |0x30 |4 ||0x87E60438 ||146 | 0 |7|0x09C0
UNIT_TYPE_M2M
2 |0x70 |0x08 |48 |0x30 |4 ||0x87E68438 ||147 | 1 |7|0x09E0
UNIT_TYPE_M2M
2 |0x70 |0x08 |48 |0x30 |4 ||0x87E70438 ||148 | 2 |7|0x0A00
UNIT_TYPE_M2M
2 |0x70 |0x08 |48 |0x30 |4 ||0x87E78438 ||149 | 3 |7|0x0A20
UNIT_TYPE_M2M
2 |0x70 |0x08 |48 |0x30 |4 ||0x87E80438 ||150 | 4 |7|0x0A40
UNIT_TYPE_M2M
2 |0x70 |0x08 |48 |0x30 |4 ||0x87E88438 ||151 | 5 |7|0x0A60
UNIT_TYPE_M2M
2 |0x70 |0x08 |48 |0x30 |4 ||0x87E90438 ||152 | 6 |7|0x0A80
UNIT_TYPE_M2M
2 |0x70 |0x08 |48 |0x30 |4 ||0x87E98438 ||153 | 7 |7|0x0AA0
UNIT_TYPE_M2M
2 |0x70 |0x08 |48 |0x30 |4 ||0x87EA0438 ||154 | 8 |7|0x0AC0
UNIT_TYPE_M2M
2 |0x70 |0x08 |48 |0x30 |4 ||0x87EA8438 ||155 | 9 |7|0x0AE0
UNIT_TYPE_M2M
2 |0x70 |0x08 |48 |0x30 |4 ||0x87EB0438 ||156 |10 |7|0x0B00
UNIT_TYPE_M2M
2 |0x70 |0x08 |48 |0x30 |4 ||0x87EB8438 ||157 |11 |7|0x0B20
UNIT_TYPE_M2M
2 |0x70 |0x08 |48 |0x30 |4 ||0x87EC0438 ||158 |12 |7|0x0B40
UNIT_TYPE_M2M
2 |0x70 |0x08 |48 |0x30 |4 ||0x87EC8438 ||159 |13 |7|0x0B60
UNIT_TYPE_M2M
2 |0x70 |0x08 |48 |0x30 |4 ||0x87ED0438 ||160 |14 |7|0x0B80
UNIT_TYPE_M2M
2 |0x70 |0x08 |48 |0x30 |4 ||0x87ED8438 ||161 |15 |7|0x0BA0
UNIT_TYPE_M2M
2 |0x70 |0x08 |48 |0x30 |4 ||0x87EE0438 ||162 |16 |7|0x0BC0
UNIT_TYPE_M2M
2 |0x70 |0x08 |48 |0x30 |4 ||0x87EE8438 ||163 |17 |7|0x0BE0
UNIT_TYPE_M2M
2 |0x70 |0x08 |48 |0x30 |4 ||0x87EF0438 ||164 |18 |7|0x0C00
UNIT_TYPE_M2M
2 |0x70 |0x08 |48 |0x30 |4 ||0x87EF8438 ||165 |19 |7|0x0C20
UNIT_TYPE_UPI_LL
2 |0x64 |0x08 |48 |0x38 |4 ||0x87E09318 ||166 | 0 |8|0x07E0
UNIT_TYPE_UPI_LL
2 |0x64 |0x08 |48 |0x38 |4 ||0x87E11318 ||167 | 1 |8|0x0820
UNIT_TYPE_UPI_LL
2 |0x64 |0x08 |48 |0x38 |4 ||0x87E19318 ||168 | 2 |8|0x0860
UNIT_TYPE_UPI_LL
2 |0x64 |0x08 |48 |0x38 |4 ||0x87E21318 ||169 | 3 |8|0x08A0
UNIT_TYPE_M3UPI
2 |0x58 |0x08 |48 |0x38 |4 ||0x87E290A0 ||170 | 0 |9|0x07C0
UNIT_TYPE_M3UPI
2 |0x58 |0x08 |48 |0x38 |4 ||0x87E310A0 ||171 | 1 |9|0x0800
UNIT_TYPE_M3UPI
2 |0x58 |0x08 |48 |0x38 |4 ||0x87E390A0 ||172 | 2 |9|0x0840
UNIT_TYPE_M3UPI
2 |0x58 |0x08 |48 |0x38 |4 ||0x87E410A0 ||173 | 3 |9|0x0880
UNIT_TYPE_MDF
0 |0x01 |0x08 |48 |0x02 |4 ||0x00002840 ||60 | 0 |11|0x12C0
UNIT_TYPE_MDF
0 |0x01 |0x08 |48 |0x02 |4 ||0x00002850 ||61 | 1 |11|0x12E0
UNIT_TYPE_MDF
0 |0x01 |0x08 |48 |0x02 |4 ||0x00002860 ||62 | 2 |11|0x1300
UNIT_TYPE_MDF
0 |0x01 |0x08 |48 |0x02 |4 ||0x00002870 ||63 | 3 |11|0x1320
UNIT_TYPE_MDF
0 |0x01 |0x08 |48 |0x02 |4 ||0x00002880 ||64 | 4 |11|0x1340
UNIT_TYPE_MDF
0 |0x01 |0x08 |48 |0x02 |4 ||0x00002890 ||65 | 5 |11|0x1360
UNIT_TYPE_MDF
0 |0x01 |0x08 |48 |0x02 |4 ||0x000028E0 ||66 | 6 |11|0x1380
UNIT_TYPE_MDF
0 |0x01 |0x08 |48 |0x02 |4 ||0x000028F0 ||67 | 7 |11|0x13A0
UNIT_TYPE_MDF
0 |0x01 |0x08 |48 |0x02 |4 ||0x00002900 ||68 | 8 |11|0x13C0
UNIT_TYPE_MDF
0 |0x01 |0x08 |48 |0x02 |4 ||0x00002910 ||69 | 9 |11|0x13E0
UNIT_TYPE_MDF
0 |0x01 |0x08 |48 |0x02 |4 ||0x00002920 ||70 |10 |11|0x1400
UNIT_TYPE_MDF
0 |0x01 |0x08 |48 |0x02 |4 ||0x00002930 ||71 |11 |11|0x1420
UNIT_TYPE_MDF
0 |0x01 |0x08 |48 |0x02 |4 ||0x00002980 ||72 |12 |11|0x1440
UNIT_TYPE_MDF
0 |0x01 |0x08 |48 |0x02 |4 ||0x00002990 ||73 |13 |11|0x1460
UNIT_TYPE_MDF
0 |0x01 |0x08 |48 |0x02 |4 ||0x000029A0 ||74 |14 |11|0x1480
UNIT_TYPE_MDF
0 |0x01 |0x08 |48 |0x02 |4 ||0x000029B0 ||75 |15 |11|0x14A0
UNIT_TYPE_MDF
0 |0x01 |0x08 |48 |0x02 |4 ||0x000029C0 ||76 |16 |11|0x14C0
UNIT_TYPE_MDF
0 |0x01 |0x08 |48 |0x02 |4 ||0x000029D0 ||77 |17 |11|0x14E0
UNIT_TYPE_MDF
0 |0x01 |0x08 |48 |0x02 |4 ||0x00002A20 ||78 |18 |11|0x1500
UNIT_TYPE_MDF
0 |0x01 |0x08 |48 |0x02 |4 ||0x00002A30 ||79 |19 |11|0x1520
UNIT_TYPE_MDF
0 |0x01 |0x08 |48 |0x02 |4 ||0x00002A40 ||80 |20 |11|0x1540
UNIT_TYPE_MDF
0 |0x01 |0x08 |48 |0x02 |4 ||0x00002A50 ||81 |21 |11|0x1560
UNIT_TYPE_MDF
0 |0x01 |0x08 |48 |0x02 |4 ||0x00002A60 ||82 |22 |11|0x1580
UNIT_TYPE_MDF
0 |0x01 |0x08 |48 |0x02 |4 ||0x00002A70 ||83 |23 |11|0x15A0
UNIT_TYPE_MDF
0 |0x01 |0x08 |48 |0x02 |4 ||0x00002800 ||84 |24 |11|0x15C0
UNIT_TYPE_MDF
0 |0x01 |0x08 |48 |0x02 |4 ||0x00002810 ||85 |25 |11|0x15E0
UNIT_TYPE_MDF
0 |0x01 |0x08 |48 |0x02 |4 ||0x00002820 ||86 |26 |11|0x1600
UNIT_TYPE_MDF
0 |0x01 |0x08 |48 |0x02 |4 ||0x00002830 ||87 |27 |11|0x1620
UNIT_TYPE_MDF
0 |0x01 |0x08 |48 |0x02 |4 ||0x000028A0 ||88 |28 |11|0x1640
UNIT_TYPE_MDF
0 |0x01 |0x08 |48 |0x02 |4 ||0x000028B0 ||89 |29 |11|0x1660
UNIT_TYPE_MDF
0 |0x01 |0x08 |48 |0x02 |4 ||0x000028C0 ||90 |30 |11|0x1680
UNIT_TYPE_MDF
0 |0x01 |0x08 |48 |0x02 |4 ||0x000028D0 ||91 |31 |11|0x16A0
UNIT_TYPE_MDF
0 |0x01 |0x08 |48 |0x02 |4 ||0x00002970 ||92 |32 |11|0x16C0
UNIT_TYPE_MDF
0 |0x01 |0x08 |48 |0x02 |4 ||0x00002960 ||93 |33 |11|0x16E0
UNIT_TYPE_MDF
0 |0x01 |0x08 |48 |0x02 |4 ||0x00002950 ||94 |34 |11|0x1700
UNIT_TYPE_MDF
0 |0x01 |0x08 |48 |0x02 |4 ||0x00002940 ||95 |35 |11|0x1720
UNIT_TYPE_MDF
0 |0x01 |0x08 |48 |0x02 |4 ||0x00002A10 ||96 |36 |11|0x1740
UNIT_TYPE_MDF
0 |0x01 |0x08 |48 |0x02 |4 ||0x00002A00 ||97 |37 |11|0x1760
UNIT_TYPE_MDF
0 |0x01 |0x08 |48 |0x02 |4 ||0x000029F0 ||98 |38 |11|0x1780
UNIT_TYPE_MDF
0 |0x01 |0x08 |48 |0x02 |4 ||0x000029E0 ||99 |39 |11|0x17A0
UNIT_TYPE_IAL_0
0 |0x00 |0x00 | 0 |0x00 |0 ||0x00000000 || 0 | 0 |0|0x10C0
UNIT_TYPE_IAL_0
0 |0x00 |0x00 | 0 |0x00 |0 ||0x00000000 || 0 | 0 |0|0x1100
UNIT_TYPE_IAL_0
0 |0x00 |0x00 | 0 |0x00 |0 ||0x00000000 || 0 | 0 |0|0x1140
UNIT_TYPE_IAL_0
0 |0x00 |0x00 | 0 |0x00 |0 ||0x00000000 || 0 | 0 |0|0x1180
UNIT_TYPE_IAL_0
0 |0x00 |0x00 | 0 |0x00 |0 ||0x00000000 || 0 | 0 |0|0x11C0
UNIT_TYPE_IAL_0
0 |0x00 |0x00 | 0 |0x00 |0 ||0x00000000 || 0 | 0 |0|0x1200
UNIT_TYPE_IAL_0
0 |0x00 |0x00 | 0 |0x00 |0 ||0x00000000 || 0 | 0 |0|0x1240
UNIT_TYPE_IAL_0
0 |0x00 |0x00 | 0 |0x00 |0 ||0x00000000 || 0 | 0 |0|0x1280
UNIT_TYPE_IAL_1
0 |0x00 |0x00 | 0 |0x00 |0 ||0x00000000 || 0 | 0 |0|0x10E0
UNIT_TYPE_IAL_1
0 |0x00 |0x00 | 0 |0x00 |0 ||0x00000000 || 0 | 0 |0|0x1120
UNIT_TYPE_IAL_1
0 |0x00 |0x00 | 0 |0x00 |0 ||0x00000000 || 0 | 0 |0|0x1160
UNIT_TYPE_IAL_1
0 |0x00 |0x00 | 0 |0x00 |0 ||0x00000000 || 0 | 0 |0|0x11A0
UNIT_TYPE_IAL_1
0 |0x00 |0x00 | 0 |0x00 |0 ||0x00000000 || 0 | 0 |0|0x11E0
UNIT_TYPE_IAL_1
0 |0x00 |0x00 | 0 |0x00 |0 ||0x00000000 || 0 | 0 |0|0x1220
UNIT_TYPE_IAL_1
0 |0x00 |0x00 | 0 |0x00 |0 ||0x00000000 || 0 | 0 |0|0x1260
UNIT_TYPE_IAL_1
0 |0x00 |0x00 | 0 |0x00 |0 ||0x00000000 || 0 | 0 |0|0x12A0
UNIT_TYPE_HBM
1 |0x5C |0x08 |48 |0x40 |4 ||0xC8941C00 ||190 | 0 |14|0x17C0
UNIT_TYPE_HBM
1 |0x5C |0x08 |48 |0x40 |4 ||0xC8945C00 ||191 | 1 |14|0x17E0
UNIT_TYPE_HBM
1 |0x5C |0x08 |48 |0x40 |4 ||0xC894AC00 ||192 | 2 |14|0x1800
UNIT_TYPE_HBM
1 |0x5C |0x08 |48 |0x40 |4 ||0xC894EC00 ||193 | 3 |14|0x1820
UNIT_TYPE_HBM
1 |0x5C |0x08 |48 |0x40 |4 ||0xC8953C00 ||194 | 4 |14|0x1840
UNIT_TYPE_HBM
1 |0x5C |0x08 |48 |0x40 |4 ||0xC8957C00 ||195 | 5 |14|0x1860
UNIT_TYPE_HBM
1 |0x5C |0x08 |48 |0x40 |4 ||0xC895CC00 ||196 | 6 |14|0x1880
UNIT_TYPE_HBM
1 |0x5C |0x08 |48 |0x40 |4 ||0xC8960C00 ||197 | 7 |14|0x18A0
UNIT_TYPE_HBM
1 |0x5C |0x08 |48 |0x40 |4 ||0xC8965C00 ||198 | 8 |14|0x18C0
UNIT_TYPE_HBM
1 |0x5C |0x08 |48 |0x40 |4 ||0xC8969C00 ||199 | 9 |14|0x18E0
UNIT_TYPE_HBM
1 |0x5C |0x08 |48 |0x40 |4 ||0xC896EC00 ||200 |10 |14|0x1900
UNIT_TYPE_HBM
1 |0x5C |0x08 |48 |0x40 |4 ||0xC8972C00 ||201 |11 |14|0x1920
UNIT_TYPE_HBM
1 |0x5C |0x08 |48 |0x40 |4 ||0xC8977C00 ||202 |12 |14|0x1940
UNIT_TYPE_HBM
1 |0x5C |0x08 |48 |0x40 |4 ||0xC897BC00 ||203 |13 |14|0x1960
UNIT_TYPE_HBM
1 |0x5C |0x08 |48 |0x40 |4 ||0xC8980C00 ||204 |14 |14|0x1980
UNIT_TYPE_HBM
1 |0x5C |0x08 |48 |0x40 |4 ||0xC8984C00 ||205 |15 |14|0x19A0
UNIT_TYPE_HBM
1 |0x5C |0x08 |48 |0x40 |4 ||0xC8989C00 ||206 |16 |14|0x19C0
UNIT_TYPE_HBM
1 |0x5C |0x08 |48 |0x40 |4 ||0xC898DC00 ||207 |17 |14|0x19E0
UNIT_TYPE_HBM
1 |0x5C |0x08 |48 |0x40 |4 ||0xC8992C00 ||208 |18 |14|0x1A00
UNIT_TYPE_HBM
1 |0x5C |0x08 |48 |0x40 |4 ||0xC8996C00 ||209 |19 |14|0x1A20
UNIT_TYPE_HBM
1 |0x5C |0x08 |48 |0x40 |4 ||0xC899BC00 ||210 |20 |14|0x1A40
UNIT_TYPE_HBM
1 |0x5C |0x08 |48 |0x40 |4 ||0xC899FC00 ||211 |21 |14|0x1A60
UNIT_TYPE_HBM
1 |0x5C |0x08 |48 |0x40 |4 ||0xC89A4C00 ||212 |22 |14|0x1A80
UNIT_TYPE_HBM
1 |0x5C |0x08 |48 |0x40 |4 ||0xC89A8C00 ||213 |23 |14|0x1AA0
UNIT_TYPE_HBM
1 |0x5C |0x08 |48 |0x40 |4 ||0xC89ADC00 ||214 |24 |14|0x1AC0
UNIT_TYPE_HBM
1 |0x5C |0x08 |48 |0x40 |4 ||0xC89B1C00 ||215 |25 |14|0x1AE0
UNIT_TYPE_HBM
1 |0x5C |0x08 |48 |0x40 |4 ||0xC89B6C00 ||216 |26 |14|0x1B00
UNIT_TYPE_HBM
1 |0x5C |0x08 |48 |0x40 |4 ||0xC89BAC00 ||217 |27 |14|0x1B20
UNIT_TYPE_HBM
1 |0x5C |0x08 |48 |0x40 |4 ||0xC89BFC00 ||218 |28 |14|0x1B40
UNIT_TYPE_HBM
1 |0x5C |0x08 |48 |0x40 |4 ||0xC89C3C00 ||219 |29 |14|0x1B60
UNIT_TYPE_HBM
1 |0x5C |0x08 |48 |0x40 |4 ||0xC89C8C00 ||220 |30 |14|0x1B80
UNIT_TYPE_HBM
1 |0x5C |0x08 |48 |0x40 |4 ||0xC89CCC00 ||221 |31 |14|0x1BA0
[OOBMSM] InitOobMsmBar() Enter
Socket[0], OobMsm.Func[2], BAR[0]
Disable MSE and BME
Original StsCmdReg Value = 0x00100004
BarSize: 0x00200000
BarBase: 0xC6C00000(Already assigned)
Enable MSE and BME
[OOBMSM] InitOobMsmBar() Exit
SPK Bar0 address: 0xC6C00000
SPK instance 0: BAR offset: 0x00058000
SPK SNC Base Address 1: 0x0FFF0000
SPK SNC Base Address 2: 0x1FE00022
SPK SNC Base Address 3: 0x00000042
SPK SNC Base Address 4: 0x00000062
SPK SNC Base Address 5: 0x00000082
SPK SNC Upper Base Address: 0x00000000
SPK_SNC_CONFIG: 0x0000000F
SPK_UNCORE_SNC_CONFIG: NumChaPerCluster:13, BaseChaCluster1:13, BaseChaCluster2:26, BaseChaCluster3:39
SPK_UMA_CLUSTER_CFG: UmaClusterEn: 0, XorDefeatur: 0
SPK instance 1: BAR offset: 0x00059000
SPK SNC Base Address 1: 0x0FFF0000
SPK SNC Base Address 2: 0x1FE00022
SPK SNC Base Address 3: 0x00000042
SPK SNC Base Address 4: 0x00000062
SPK SNC Base Address 5: 0x00000082
SPK SNC Upper Base Address: 0x00000000
SPK_SNC_CONFIG: 0x0000000F
SPK_UNCORE_SNC_CONFIG: NumChaPerCluster:13, BaseChaCluster1:13, BaseChaCluster2:26, BaseChaCluster3:39
SPK_UMA_CLUSTER_CFG: UmaClusterEn: 0, XorDefeatur: 0
SPK instance 2: BAR offset: 0x0005A000
SPK SNC Base Address 1: 0x0FFF0000
SPK SNC Base Address 2: 0x1FE00022
SPK SNC Base Address 3: 0x00000042
SPK SNC Base Address 4: 0x00000062
SPK SNC Base Address 5: 0x00000082
SPK SNC Upper Base Address: 0x00000000
SPK_SNC_CONFIG: 0x0000000F
SPK_UNCORE_SNC_CONFIG: NumChaPerCluster:13, BaseChaCluster1:13, BaseChaCluster2:26, BaseChaCluster3:39
SPK_UMA_CLUSTER_CFG: UmaClusterEn: 0, XorDefeatur: 0
SPK instance 3: BAR offset: 0x0005B000
SPK SNC Base Address 1: 0x0FFF0000
SPK SNC Base Address 2: 0x1FE00022
SPK SNC Base Address 3: 0x00000042
SPK SNC Base Address 4: 0x00000062
SPK SNC Base Address 5: 0x00000082
SPK SNC Upper Base Address: 0x00000000
SPK_SNC_CONFIG: 0x0000000F
SPK_UNCORE_SNC_CONFIG: NumChaPerCluster:13, BaseChaCluster1:13, BaseChaCluster2:26, BaseChaCluster3:39
SPK_UMA_CLUSTER_CFG: UmaClusterEn: 0, XorDefeatur: 0
SPK instance 4: BAR offset: 0x0005C000
SPK SNC Base Address 1: 0x0FFF0000
SPK SNC Base Address 2: 0x1FE00022
SPK SNC Base Address 3: 0x00000042
SPK SNC Base Address 4: 0x00000062
SPK SNC Base Address 5: 0x00000082
SPK SNC Upper Base Address: 0x00000000
SPK_SNC_CONFIG: 0x0000000F
SPK_UNCORE_SNC_CONFIG: NumChaPerCluster:13, BaseChaCluster1:13, BaseChaCluster2:26, BaseChaCluster3:39
SPK_UMA_CLUSTER_CFG: UmaClusterEn: 0, XorDefeatur: 0
SPK instance 5: BAR offset: 0x0005D000
SPK SNC Base Address 1: 0x0FFF0000
SPK SNC Base Address 2: 0x1FE00022
SPK SNC Base Address 3: 0x00000042
SPK SNC Base Address 4: 0x00000062
SPK SNC Base Address 5: 0x00000082
SPK SNC Upper Base Address: 0x00000000
SPK_SNC_CONFIG: 0x0000000F
SPK_UNCORE_SNC_CONFIG: NumChaPerCluster:13, BaseChaCluster1:13, BaseChaCluster2:26, BaseChaCluster3:39
SPK_UMA_CLUSTER_CFG: UmaClusterEn: 0, XorDefeatur: 0
SPK instance 6: BAR offset: 0x0005E000
SPK SNC Base Address 1: 0x0FFF0000
SPK SNC Base Address 2: 0x1FE00022
SPK SNC Base Address 3: 0x00000042
SPK SNC Base Address 4: 0x00000062
SPK SNC Base Address 5: 0x00000082
SPK SNC Upper Base Address: 0x00000000
SPK_SNC_CONFIG: 0x0000000F
SPK_UNCORE_SNC_CONFIG: NumChaPerCluster:13, BaseChaCluster1:13, BaseChaCluster2:26, BaseChaCluster3:39
SPK_UMA_CLUSTER_CFG: UmaClusterEn: 0, XorDefeatur: 0
SPK instance 7: BAR offset: 0x0005F000
SPK SNC Base Address 1: 0x0FFF0000
SPK SNC Base Address 2: 0x1FE00022
SPK SNC Base Address 3: 0x00000042
SPK SNC Base Address 4: 0x00000062
SPK SNC Base Address 5: 0x00000082
SPK SNC Upper Base Address: 0x00000000
SPK_SNC_CONFIG: 0x0000000F
SPK_UNCORE_SNC_CONFIG: NumChaPerCluster:13, BaseChaCluster1:13, BaseChaCluster2:26, BaseChaCluster3:39
SPK_UMA_CLUSTER_CFG: UmaClusterEn: 0, XorDefeatur: 0
SPK instance 8: BAR offset: 0x00060000
SPK SNC Base Address 1: 0x0FFF0000
SPK SNC Base Address 2: 0x1FE00022
SPK SNC Base Address 3: 0x00000042
SPK SNC Base Address 4: 0x00000062
SPK SNC Base Address 5: 0x00000082
SPK SNC Upper Base Address: 0x00000000
SPK_SNC_CONFIG: 0x0000000F
SPK_UNCORE_SNC_CONFIG: NumChaPerCluster:13, BaseChaCluster1:13, BaseChaCluster2:26, BaseChaCluster3:39
SPK_UMA_CLUSTER_CFG: UmaClusterEn: 0, XorDefeatur: 0
SPK instance 9: BAR offset: 0x00061000
SPK SNC Base Address 1: 0x0FFF0000
SPK SNC Base Address 2: 0x1FE00022
SPK SNC Base Address 3: 0x00000042
SPK SNC Base Address 4: 0x00000062
SPK SNC Base Address 5: 0x00000082
SPK SNC Upper Base Address: 0x00000000
SPK_SNC_CONFIG: 0x0000000F
SPK_UNCORE_SNC_CONFIG: NumChaPerCluster:13, BaseChaCluster1:13, BaseChaCluster2:26, BaseChaCluster3:39
SPK_UMA_CLUSTER_CFG: UmaClusterEn: 0, XorDefeatur: 0
SPK instance 10: BAR offset: 0x00062000
SPK SNC Base Address 1: 0x0FFF0000
SPK SNC Base Address 2: 0x1FE00022
SPK SNC Base Address 3: 0x00000042
SPK SNC Base Address 4: 0x00000062
SPK SNC Base Address 5: 0x00000082
SPK SNC Upper Base Address: 0x00000000
SPK_SNC_CONFIG: 0x0000000F
SPK_UNCORE_SNC_CONFIG: NumChaPerCluster:13, BaseChaCluster1:13, BaseChaCluster2:26, BaseChaCluster3:39
SPK_UMA_CLUSTER_CFG: UmaClusterEn: 0, XorDefeatur: 0
SPK instance 11: BAR offset: 0x00063000
SPK SNC Base Address 1: 0x0FFF0000
SPK SNC Base Address 2: 0x1FE00022
SPK SNC Base Address 3: 0x00000042
SPK SNC Base Address 4: 0x00000062
SPK SNC Base Address 5: 0x00000082
SPK SNC Upper Base Address: 0x00000000
SPK_SNC_CONFIG: 0x0000000F
SPK_UNCORE_SNC_CONFIG: NumChaPerCluster:13, BaseChaCluster1:13, BaseChaCluster2:26, BaseChaCluster3:39
SPK_UMA_CLUSTER_CFG: UmaClusterEn: 0, XorDefeatur: 0
SPK instance 12: BAR offset: 0x00070000
SPK SNC Base Address 1: 0x0FFF0000
SPK SNC Base Address 2: 0x1FE00022
SPK SNC Base Address 3: 0x00000042
SPK SNC Base Address 4: 0x00000062
SPK SNC Base Address 5: 0x00000082
SPK SNC Upper Base Address: 0x00000000
SPK_SNC_CONFIG: 0x0000000F
SPK_UNCORE_SNC_CONFIG: NumChaPerCluster:13, BaseChaCluster1:13, BaseChaCluster2:26, BaseChaCluster3:39
SPK_UMA_CLUSTER_CFG: UmaClusterEn: 0, XorDefeatur: 0
SPK instance 13: BAR offset: 0x00071000
SPK SNC Base Address 1: 0x0FFF0000
SPK SNC Base Address 2: 0x1FE00022
SPK SNC Base Address 3: 0x00000042
SPK SNC Base Address 4: 0x00000062
SPK SNC Base Address 5: 0x00000082
SPK SNC Upper Base Address: 0x00000000
SPK_SNC_CONFIG: 0x0000000F
SPK_UNCORE_SNC_CONFIG: NumChaPerCluster:13, BaseChaCluster1:13, BaseChaCluster2:26, BaseChaCluster3:39
SPK_UMA_CLUSTER_CFG: UmaClusterEn: 0, XorDefeatur: 0
SPK instance 14: BAR offset: 0x00072000
SPK SNC Base Address 1: 0x0FFF0000
SPK SNC Base Address 2: 0x1FE00022
SPK SNC Base Address 3: 0x00000042
SPK SNC Base Address 4: 0x00000062
SPK SNC Base Address 5: 0x00000082
SPK SNC Upper Base Address: 0x00000000
SPK_SNC_CONFIG: 0x0000000F
SPK_UNCORE_SNC_CONFIG: NumChaPerCluster:13, BaseChaCluster1:13, BaseChaCluster2:26, BaseChaCluster3:39
SPK_UMA_CLUSTER_CFG: UmaClusterEn: 0, XorDefeatur: 0
SPK instance 15: BAR offset: 0x00073000
SPK SNC Base Address 1: 0x0FFF0000
SPK SNC Base Address 2: 0x1FE00022
SPK SNC Base Address 3: 0x00000042
SPK SNC Base Address 4: 0x00000062
SPK SNC Base Address 5: 0x00000082
SPK SNC Upper Base Address: 0x00000000
SPK_SNC_CONFIG: 0x0000000F
SPK_UNCORE_SNC_CONFIG: NumChaPerCluster:13, BaseChaCluster1:13, BaseChaCluster2:26, BaseChaCluster3:39
SPK_UMA_CLUSTER_CFG: UmaClusterEn: 0, XorDefeatur: 0
[SDSi] Init for Socket[1] - Begin
[VSEC] VSEC discovery - S:B:D:F = 0x0:0xE7:0x3:0x1, VidDid = 0x09A78086
VsecId: 0x00000041 SDSI VSEC capability offset: 0x00000160
[OOBMSM] InitOobMsmBar() Enter
Socket[1], OobMsm.Func[1], BAR[1]
Disable MSE and BME
Original StsCmdReg Value = 0x00100006
BarSize: 0x00040000
BarBase: 0xF9B40000(Already assigned)
Enable MSE and BME
[OOBMSM] InitOobMsmBar() Exit
SDSi MMIO Layout Address = 0xF9B42000
SdsiMmio.Ppin Address = 0xF9B42408, Value = 0x22E548CB80015B4D
[OOBMSM] InitOobMsmBar() Enter
Socket[1], OobMsm.Func[1], BAR[0]
Disable MSE and BME
Original StsCmdReg Value = 0x00100006
BarSize: 0x00002000
BarBase: 0xF9B00000(Already assigned)
Enable MSE and BME
[OOBMSM] InitOobMsmBar() Exit
PMon Bar0 address: 0xF9B00000
Global Discovery State at address: 0xF9B00000
Access Type|Max Blocks|Block Stride|Type ||GlobalControlAddr||NumBlockStatusBits|GblCtrStatAddr
[63:62] |[25:16] |[15:8] |[7:0]||[63:0] ||[23:8] |[7:0]
0 |221 |4 |5 ||0x2FF0 ||209 |0xE
Unit Discovery State at address: 0xF9B00020
Access Type|UnitStatus Offset|Counter0 Offset|Ctrl Width|Ctrl0 Offset|Num Ctrl Regs||UnitCounterControlAddr||Gbl Stat Pos|Unit ID|UnitType|Offset
[63:62] |[39:32] |[31:24] |[23:16] |[15:8] |[7:0] ||[63:0] ||[47:32] |[31:16]|[15:0]|
UNIT_TYPE_CHA
0 |0x01 |0x08 |48 |0x02 |4 ||0x00002000 || 0 | 0 |0|0x0040
UNIT_TYPE_CHA
0 |0x01 |0x08 |48 |0x02 |4 ||0x00002010 || 1 | 1 |0|0x0060
UNIT_TYPE_CHA
0 |0x01 |0x08 |48 |0x02 |4 ||0x00002020 || 2 | 2 |0|0x0080
UNIT_TYPE_CHA
0 |0x01 |0x08 |48 |0x02 |4 ||0x00002030 || 3 | 3 |0|0x00A0
UNIT_TYPE_CHA
0 |0x01 |0x08 |48 |0x02 |4 ||0x00002040 || 4 | 4 |0|0x00C0
UNIT_TYPE_CHA
0 |0x01 |0x08 |48 |0x02 |4 ||0x00002050 || 5 | 5 |0|0x00E0
UNIT_TYPE_CHA
0 |0x01 |0x08 |48 |0x02 |4 ||0x00002060 || 6 | 6 |0|0x0100
UNIT_TYPE_CHA
0 |0x01 |0x08 |48 |0x02 |4 ||0x00002070 || 7 | 7 |0|0x0120
UNIT_TYPE_CHA
0 |0x01 |0x08 |48 |0x02 |4 ||0x00002080 || 8 | 8 |0|0x0140
UNIT_TYPE_CHA
0 |0x01 |0x08 |48 |0x02 |4 ||0x00002090 || 9 | 9 |0|0x0160
UNIT_TYPE_CHA
0 |0x01 |0x08 |48 |0x02 |4 ||0x000020A0 ||10 |10 |0|0x0180
UNIT_TYPE_CHA
0 |0x01 |0x08 |48 |0x02 |4 ||0x000020B0 ||11 |11 |0|0x01A0
UNIT_TYPE_CHA
0 |0x01 |0x08 |48 |0x02 |4 ||0x000020C0 ||12 |12 |0|0x01C0
UNIT_TYPE_CHA
0 |0x01 |0x08 |48 |0x02 |4 ||0x000020D0 ||13 |13 |0|0x01E0
UNIT_TYPE_CHA
0 |0x01 |0x08 |48 |0x02 |4 ||0x000020E0 ||14 |14 |0|0x0200
UNIT_TYPE_CHA
0 |0x01 |0x08 |48 |0x02 |4 ||0x000020F0 ||15 |15 |0|0x0220
UNIT_TYPE_CHA
0 |0x01 |0x08 |48 |0x02 |4 ||0x00002100 ||16 |16 |0|0x0240
UNIT_TYPE_CHA
0 |0x01 |0x08 |48 |0x02 |4 ||0x00002110 ||17 |17 |0|0x0260
UNIT_TYPE_CHA
0 |0x01 |0x08 |48 |0x02 |4 ||0x00002120 ||18 |18 |0|0x0280
UNIT_TYPE_CHA
0 |0x01 |0x08 |48 |0x02 |4 ||0x00002130 ||19 |19 |0|0x02A0
UNIT_TYPE_CHA
0 |0x01 |0x08 |48 |0x02 |4 ||0x00002140 ||20 |20 |0|0x02C0
UNIT_TYPE_CHA
0 |0x01 |0x08 |48 |0x02 |4 ||0x00002150 ||21 |21 |0|0x02E0
UNIT_TYPE_CHA
0 |0x01 |0x08 |48 |0x02 |4 ||0x00002160 ||22 |22 |0|0x0300
UNIT_TYPE_CHA
0 |0x01 |0x08 |48 |0x02 |4 ||0x00002170 ||23 |23 |0|0x0320
UNIT_TYPE_CHA
0 |0x01 |0x08 |48 |0x02 |4 ||0x00002180 ||24 |24 |0|0x0340
UNIT_TYPE_CHA
0 |0x01 |0x08 |48 |0x02 |4 ||0x00002190 ||25 |25 |0|0x0360
UNIT_TYPE_CHA
0 |0x01 |0x08 |48 |0x02 |4 ||0x000021A0 ||26 |26 |0|0x0380
UNIT_TYPE_CHA
0 |0x01 |0x08 |48 |0x02 |4 ||0x000021B0 ||27 |27 |0|0x03A0
UNIT_TYPE_CHA
0 |0x01 |0x08 |48 |0x02 |4 ||0x000021C0 ||28 |28 |0|0x03C0
UNIT_TYPE_CHA
0 |0x01 |0x08 |48 |0x02 |4 ||0x000021D0 ||29 |29 |0|0x03E0
UNIT_TYPE_CHA
0 |0x01 |0x08 |48 |0x02 |4 ||0x000021E0 ||30 |30 |0|0x0400
UNIT_TYPE_CHA
0 |0x01 |0x08 |48 |0x02 |4 ||0x000021F0 ||31 |31 |0|0x0420
UNIT_TYPE_CHA
0 |0x01 |0x08 |48 |0x02 |4 ||0x00002200 ||32 |32 |0|0x0440
UNIT_TYPE_CHA
0 |0x01 |0x08 |48 |0x02 |4 ||0x00002210 ||33 |33 |0|0x0460
UNIT_TYPE_CHA
0 |0x01 |0x08 |48 |0x02 |4 ||0x00002220 ||34 |34 |0|0x0480
UNIT_TYPE_CHA
0 |0x01 |0x08 |48 |0x02 |4 ||0x00002230 ||35 |35 |0|0x04A0
UNIT_TYPE_CHA
0 |0x01 |0x08 |48 |0x02 |4 ||0x00002240 ||36 |36 |0|0x04C0
UNIT_TYPE_CHA
0 |0x01 |0x08 |48 |0x02 |4 ||0x00002250 ||37 |37 |0|0x04E0
UNIT_TYPE_CHA
0 |0x01 |0x08 |48 |0x02 |4 ||0x00002260 ||38 |38 |0|0x0500
UNIT_TYPE_CHA
0 |0x01 |0x08 |48 |0x02 |4 ||0x00002270 ||39 |39 |0|0x0520
UNIT_TYPE_CHA
0 |0x01 |0x08 |48 |0x02 |4 ||0x00002280 ||40 |40 |0|0x0540
UNIT_TYPE_CHA
0 |0x01 |0x08 |48 |0x02 |4 ||0x00002290 ||41 |41 |0|0x0560
UNIT_TYPE_CHA
0 |0x01 |0x08 |48 |0x02 |4 ||0x000022A0 ||42 |42 |0|0x0580
UNIT_TYPE_CHA
0 |0x01 |0x08 |48 |0x02 |4 ||0x000022B0 ||43 |43 |0|0x05A0
UNIT_TYPE_CHA
0 |0x01 |0x08 |48 |0x02 |4 ||0x000022C0 ||44 |44 |0|0x05C0
UNIT_TYPE_CHA
0 |0x01 |0x08 |48 |0x02 |4 ||0x000022D0 ||45 |45 |0|0x05E0
UNIT_TYPE_CHA
0 |0x01 |0x08 |48 |0x02 |4 ||0x000022E0 ||46 |46 |0|0x0600
UNIT_TYPE_CHA
0 |0x01 |0x08 |48 |0x02 |4 ||0x000022F0 ||47 |47 |0|0x0620
UNIT_TYPE_CHA
0 |0x01 |0x08 |48 |0x02 |4 ||0x00002300 ||48 |48 |0|0x0640
UNIT_TYPE_CHA
0 |0x01 |0x08 |48 |0x02 |4 ||0x00002310 ||49 |49 |0|0x0660
UNIT_TYPE_CHA
0 |0x01 |0x08 |48 |0x02 |4 ||0x00002320 ||50 |50 |0|0x0680
UNIT_TYPE_CHA
0 |0x01 |0x08 |48 |0x02 |4 ||0x00002330 ||51 |51 |0|0x06A0
UNIT_TYPE_CHA
0 |0x01 |0x08 |48 |0x02 |4 ||0x00002340 ||52 |52 |0|0x06C0
UNIT_TYPE_CHA
0 |0x01 |0x08 |48 |0x02 |4 ||0x00002350 ||53 |53 |0|0x06E0
UNIT_TYPE_CHA
0 |0x01 |0x08 |48 |0x02 |4 ||0x00002360 ||54 |54 |0|0x0700
UNIT_TYPE_CHA
0 |0x01 |0x08 |48 |0x02 |4 ||0x00002370 ||55 |55 |0|0x0720
UNIT_TYPE_CHA
0 |0x01 |0x08 |48 |0x02 |4 ||0x00002380 ||56 |56 |0|0x0740
UNIT_TYPE_CHA
0 |0x01 |0x08 |48 |0x02 |4 ||0x00002390 ||57 |57 |0|0x0760
UNIT_TYPE_CHA
0 |0x01 |0x08 |48 |0x02 |4 ||0x000023A0 ||58 |58 |0|0x0780
UNIT_TYPE_CHA
0 |0x01 |0x08 |48 |0x02 |4 ||0x000023B0 ||59 |59 |0|0x07A0
UNIT_TYPE_TC
0 |0x01 |0x08 |48 |0x02 |4 ||0x00003000 ||100 | 0 |1|0x0C60
UNIT_TYPE_TC
0 |0x01 |0x08 |48 |0x02 |4 ||0x00003010 ||101 | 1 |1|0x0CC0
UNIT_TYPE_TC
0 |0x01 |0x08 |48 |0x02 |4 ||0x00003020 ||102 | 2 |1|0x0D20
UNIT_TYPE_TC
0 |0x01 |0x08 |48 |0x02 |4 ||0x00003030 ||103 | 3 |1|0x0D80
UNIT_TYPE_TC
0 |0x00 |0x00 | 0 |0x00 |0 ||0x00000000 || 0 | 0 |0|0x0DE0
UNIT_TYPE_TC
0 |0x01 |0x08 |48 |0x02 |4 ||0x00003040 ||105 | 5 |1|0x0E40
UNIT_TYPE_TC
0 |0x01 |0x08 |48 |0x02 |4 ||0x00003050 ||106 | 6 |1|0x0EA0
UNIT_TYPE_TC
0 |0x01 |0x08 |48 |0x02 |4 ||0x00003060 ||107 | 7 |1|0x0F00
UNIT_TYPE_TC
0 |0x01 |0x08 |48 |0x02 |4 ||0x00003070 ||108 | 8 |1|0x0F60
UNIT_TYPE_TC
0 |0x01 |0x08 |48 |0x02 |4 ||0x00003080 ||109 | 9 |1|0x0FC0
UNIT_TYPE_TC
0 |0x00 |0x00 | 0 |0x00 |0 ||0x00000000 || 0 | 0 |0|0x1020
UNIT_TYPE_TC
0 |0x01 |0x08 |48 |0x02 |4 ||0x00003090 ||111 |11 |1|0x1080
UNIT_TYPE_IRP
0 |0x01 |0x08 |48 |0x02 |2 ||0x00003400 ||112 | 0 |2|0x0C80
UNIT_TYPE_IRP
0 |0x01 |0x08 |48 |0x02 |2 ||0x00003410 ||113 | 1 |2|0x0CE0
UNIT_TYPE_IRP
0 |0x01 |0x08 |48 |0x02 |2 ||0x00003420 ||114 | 2 |2|0x0D40
UNIT_TYPE_IRP
0 |0x01 |0x08 |48 |0x02 |2 ||0x00003430 ||115 | 3 |2|0x0DA0
UNIT_TYPE_IRP
0 |0x00 |0x00 | 0 |0x00 |0 ||0x00000000 || 0 | 0 |0|0x0E00
UNIT_TYPE_IRP
0 |0x01 |0x08 |48 |0x02 |2 ||0x00003440 ||117 | 5 |2|0x0E60
UNIT_TYPE_IRP
0 |0x01 |0x08 |48 |0x02 |2 ||0x00003450 ||118 | 6 |2|0x0EC0
UNIT_TYPE_IRP
0 |0x01 |0x08 |48 |0x02 |2 ||0x00003460 ||119 | 7 |2|0x0F20
UNIT_TYPE_IRP
0 |0x01 |0x08 |48 |0x02 |2 ||0x00003470 ||120 | 8 |2|0x0F80
UNIT_TYPE_IRP
0 |0x01 |0x08 |48 |0x02 |2 ||0x00003480 ||121 | 9 |2|0x0FE0
UNIT_TYPE_IRP
0 |0x00 |0x00 | 0 |0x00 |0 ||0x00000000 || 0 | 0 |0|0x1040
UNIT_TYPE_IRP
0 |0x01 |0x08 |48 |0x02 |2 ||0x00003490 ||123 |11 |2|0x10A0
UNIT_TYPE_M2PCIE
0 |0x01 |0x08 |48 |0x02 |4 ||0x00003200 ||124 | 0 |3|0x0C40
UNIT_TYPE_M2PCIE
0 |0x01 |0x08 |48 |0x02 |4 ||0x00003210 ||125 | 1 |3|0x0CA0
UNIT_TYPE_M2PCIE
0 |0x01 |0x08 |48 |0x02 |4 ||0x00003220 ||126 | 2 |3|0x0D00
UNIT_TYPE_M2PCIE
0 |0x01 |0x08 |48 |0x02 |4 ||0x00003230 ||127 | 3 |3|0x0D60
UNIT_TYPE_M2PCIE
0 |0x00 |0x00 | 0 |0x00 |0 ||0x00000000 || 0 | 0 |0|0x0DC0
UNIT_TYPE_M2PCIE
0 |0x01 |0x08 |48 |0x02 |4 ||0x00003240 ||129 | 5 |3|0x0E20
UNIT_TYPE_M2PCIE
0 |0x01 |0x08 |48 |0x02 |4 ||0x00003250 ||130 | 6 |3|0x0E80
UNIT_TYPE_M2PCIE
0 |0x01 |0x08 |48 |0x02 |4 ||0x00003260 ||131 | 7 |3|0x0EE0
UNIT_TYPE_M2PCIE
0 |0x01 |0x08 |48 |0x02 |4 ||0x00003270 ||132 | 8 |3|0x0F40
UNIT_TYPE_M2PCIE
0 |0x01 |0x08 |48 |0x02 |4 ||0x00003280 ||133 | 9 |3|0x0FA0
UNIT_TYPE_M2PCIE
0 |0x00 |0x00 | 0 |0x00 |0 ||0x00000000 || 0 | 0 |0|0x1000
UNIT_TYPE_M2PCIE
0 |0x01 |0x08 |48 |0x02 |4 ||0x00003290 ||135 |11 |3|0x1060
UNIT_TYPE_PCU
0 |0x01 |0x08 |48 |0x02 |4 ||0x00002FC0 ||136 | 0 |4|0x0020
UNIT_TYPE_MC
1 |0x5C |0x08 |48 |0x40 |4 ||0xFBAA2800 ||138 | 0 |6|0x08C0
UNIT_TYPE_MC
1 |0x5C |0x08 |48 |0x40 |4 ||0xFBAAA800 ||139 | 1 |6|0x08E0
UNIT_TYPE_MC
1 |0x5C |0x08 |48 |0x40 |4 ||0xFBB22800 ||140 | 2 |6|0x0900
UNIT_TYPE_MC
1 |0x5C |0x08 |48 |0x40 |4 ||0xFBB2A800 ||141 | 3 |6|0x0920
UNIT_TYPE_MC
1 |0x5C |0x08 |48 |0x40 |4 ||0xFBBA2800 ||142 | 4 |6|0x0940
UNIT_TYPE_MC
1 |0x5C |0x08 |48 |0x40 |4 ||0xFBBAA800 ||143 | 5 |6|0x0960
UNIT_TYPE_MC
1 |0x5C |0x08 |48 |0x40 |4 ||0xFBC22800 ||144 | 6 |6|0x0980
UNIT_TYPE_MC
1 |0x5C |0x08 |48 |0x40 |4 ||0xFBC2A800 ||145 | 7 |6|0x09A0
UNIT_TYPE_M2M
2 |0x70 |0x08 |48 |0x30 |4 ||0x8FE60438 ||146 | 0 |7|0x09C0
UNIT_TYPE_M2M
2 |0x70 |0x08 |48 |0x30 |4 ||0x8FE68438 ||147 | 1 |7|0x09E0
UNIT_TYPE_M2M
2 |0x70 |0x08 |48 |0x30 |4 ||0x8FE70438 ||148 | 2 |7|0x0A00
UNIT_TYPE_M2M
2 |0x70 |0x08 |48 |0x30 |4 ||0x8FE78438 ||149 | 3 |7|0x0A20
UNIT_TYPE_M2M
2 |0x70 |0x08 |48 |0x30 |4 ||0x8FE80438 ||150 | 4 |7|0x0A40
UNIT_TYPE_M2M
2 |0x70 |0x08 |48 |0x30 |4 ||0x8FE88438 ||151 | 5 |7|0x0A60
UNIT_TYPE_M2M
2 |0x70 |0x08 |48 |0x30 |4 ||0x8FE90438 ||152 | 6 |7|0x0A80
UNIT_TYPE_M2M
2 |0x70 |0x08 |48 |0x30 |4 ||0x8FE98438 ||153 | 7 |7|0x0AA0
UNIT_TYPE_M2M
2 |0x70 |0x08 |48 |0x30 |4 ||0x8FEA0438 ||154 | 8 |7|0x0AC0
UNIT_TYPE_M2M
2 |0x70 |0x08 |48 |0x30 |4 ||0x8FEA8438 ||155 | 9 |7|0x0AE0
UNIT_TYPE_M2M
2 |0x70 |0x08 |48 |0x30 |4 ||0x8FEB0438 ||156 |10 |7|0x0B00
UNIT_TYPE_M2M
2 |0x70 |0x08 |48 |0x30 |4 ||0x8FEB8438 ||157 |11 |7|0x0B20
UNIT_TYPE_M2M
2 |0x70 |0x08 |48 |0x30 |4 ||0x8FEC0438 ||158 |12 |7|0x0B40
UNIT_TYPE_M2M
2 |0x70 |0x08 |48 |0x30 |4 ||0x8FEC8438 ||159 |13 |7|0x0B60
UNIT_TYPE_M2M
2 |0x70 |0x08 |48 |0x30 |4 ||0x8FED0438 ||160 |14 |7|0x0B80
UNIT_TYPE_M2M
2 |0x70 |0x08 |48 |0x30 |4 ||0x8FED8438 ||161 |15 |7|0x0BA0
UNIT_TYPE_M2M
2 |0x70 |0x08 |48 |0x30 |4 ||0x8FEE0438 ||162 |16 |7|0x0BC0
UNIT_TYPE_M2M
2 |0x70 |0x08 |48 |0x30 |4 ||0x8FEE8438 ||163 |17 |7|0x0BE0
UNIT_TYPE_M2M
2 |0x70 |0x08 |48 |0x30 |4 ||0x8FEF0438 ||164 |18 |7|0x0C00
UNIT_TYPE_M2M
2 |0x70 |0x08 |48 |0x30 |4 ||0x8FEF8438 ||165 |19 |7|0x0C20
UNIT_TYPE_UPI_LL
2 |0x64 |0x08 |48 |0x38 |4 ||0x8FE09318 ||166 | 0 |8|0x07E0
UNIT_TYPE_UPI_LL
2 |0x64 |0x08 |48 |0x38 |4 ||0x8FE11318 ||167 | 1 |8|0x0820
UNIT_TYPE_UPI_LL
2 |0x64 |0x08 |48 |0x38 |4 ||0x8FE19318 ||168 | 2 |8|0x0860
UNIT_TYPE_UPI_LL
2 |0x64 |0x08 |48 |0x38 |4 ||0x8FE21318 ||169 | 3 |8|0x08A0
UNIT_TYPE_M3UPI
2 |0x58 |0x08 |48 |0x38 |4 ||0x8FE290A0 ||170 | 0 |9|0x07C0
UNIT_TYPE_M3UPI
2 |0x58 |0x08 |48 |0x38 |4 ||0x8FE310A0 ||171 | 1 |9|0x0800
UNIT_TYPE_M3UPI
2 |0x58 |0x08 |48 |0x38 |4 ||0x8FE390A0 ||172 | 2 |9|0x0840
UNIT_TYPE_M3UPI
2 |0x58 |0x08 |48 |0x38 |4 ||0x8FE410A0 ||173 | 3 |9|0x0880
UNIT_TYPE_MDF
0 |0x01 |0x08 |48 |0x02 |4 ||0x00002840 ||60 | 0 |11|0x12C0
UNIT_TYPE_MDF
0 |0x01 |0x08 |48 |0x02 |4 ||0x00002850 ||61 | 1 |11|0x12E0
UNIT_TYPE_MDF
0 |0x01 |0x08 |48 |0x02 |4 ||0x00002860 ||62 | 2 |11|0x1300
UNIT_TYPE_MDF
0 |0x01 |0x08 |48 |0x02 |4 ||0x00002870 ||63 | 3 |11|0x1320
UNIT_TYPE_MDF
0 |0x01 |0x08 |48 |0x02 |4 ||0x00002880 ||64 | 4 |11|0x1340
UNIT_TYPE_MDF
0 |0x01 |0x08 |48 |0x02 |4 ||0x00002890 ||65 | 5 |11|0x1360
UNIT_TYPE_MDF
0 |0x01 |0x08 |48 |0x02 |4 ||0x000028E0 ||66 | 6 |11|0x1380
UNIT_TYPE_MDF
0 |0x01 |0x08 |48 |0x02 |4 ||0x000028F0 ||67 | 7 |11|0x13A0
UNIT_TYPE_MDF
0 |0x01 |0x08 |48 |0x02 |4 ||0x00002900 ||68 | 8 |11|0x13C0
UNIT_TYPE_MDF
0 |0x01 |0x08 |48 |0x02 |4 ||0x00002910 ||69 | 9 |11|0x13E0
UNIT_TYPE_MDF
0 |0x01 |0x08 |48 |0x02 |4 ||0x00002920 ||70 |10 |11|0x1400
UNIT_TYPE_MDF
0 |0x01 |0x08 |48 |0x02 |4 ||0x00002930 ||71 |11 |11|0x1420
UNIT_TYPE_MDF
0 |0x01 |0x08 |48 |0x02 |4 ||0x00002980 ||72 |12 |11|0x1440
UNIT_TYPE_MDF
0 |0x01 |0x08 |48 |0x02 |4 ||0x00002990 ||73 |13 |11|0x1460
UNIT_TYPE_MDF
0 |0x01 |0x08 |48 |0x02 |4 ||0x000029A0 ||74 |14 |11|0x1480
UNIT_TYPE_MDF
0 |0x01 |0x08 |48 |0x02 |4 ||0x000029B0 ||75 |15 |11|0x14A0
UNIT_TYPE_MDF
0 |0x01 |0x08 |48 |0x02 |4 ||0x000029C0 ||76 |16 |11|0x14C0
UNIT_TYPE_MDF
0 |0x01 |0x08 |48 |0x02 |4 ||0x000029D0 ||77 |17 |11|0x14E0
UNIT_TYPE_MDF
0 |0x01 |0x08 |48 |0x02 |4 ||0x00002A20 ||78 |18 |11|0x1500
UNIT_TYPE_MDF
0 |0x01 |0x08 |48 |0x02 |4 ||0x00002A30 ||79 |19 |11|0x1520
UNIT_TYPE_MDF
0 |0x01 |0x08 |48 |0x02 |4 ||0x00002A40 ||80 |20 |11|0x1540
UNIT_TYPE_MDF
0 |0x01 |0x08 |48 |0x02 |4 ||0x00002A50 ||81 |21 |11|0x1560
UNIT_TYPE_MDF
0 |0x01 |0x08 |48 |0x02 |4 ||0x00002A60 ||82 |22 |11|0x1580
UNIT_TYPE_MDF
0 |0x01 |0x08 |48 |0x02 |4 ||0x00002A70 ||83 |23 |11|0x15A0
UNIT_TYPE_MDF
0 |0x01 |0x08 |48 |0x02 |4 ||0x00002800 ||84 |24 |11|0x15C0
UNIT_TYPE_MDF
0 |0x01 |0x08 |48 |0x02 |4 ||0x00002810 ||85 |25 |11|0x15E0
UNIT_TYPE_MDF
0 |0x01 |0x08 |48 |0x02 |4 ||0x00002820 ||86 |26 |11|0x1600
UNIT_TYPE_MDF
0 |0x01 |0x08 |48 |0x02 |4 ||0x00002830 ||87 |27 |11|0x1620
UNIT_TYPE_MDF
0 |0x01 |0x08 |48 |0x02 |4 ||0x000028A0 ||88 |28 |11|0x1640
UNIT_TYPE_MDF
0 |0x01 |0x08 |48 |0x02 |4 ||0x000028B0 ||89 |29 |11|0x1660
UNIT_TYPE_MDF
0 |0x01 |0x08 |48 |0x02 |4 ||0x000028C0 ||90 |30 |11|0x1680
UNIT_TYPE_MDF
0 |0x01 |0x08 |48 |0x02 |4 ||0x000028D0 ||91 |31 |11|0x16A0
UNIT_TYPE_MDF
0 |0x01 |0x08 |48 |0x02 |4 ||0x00002970 ||92 |32 |11|0x16C0
UNIT_TYPE_MDF
0 |0x01 |0x08 |48 |0x02 |4 ||0x00002960 ||93 |33 |11|0x16E0
UNIT_TYPE_MDF
0 |0x01 |0x08 |48 |0x02 |4 ||0x00002950 ||94 |34 |11|0x1700
UNIT_TYPE_MDF
0 |0x01 |0x08 |48 |0x02 |4 ||0x00002940 ||95 |35 |11|0x1720
UNIT_TYPE_MDF
0 |0x01 |0x08 |48 |0x02 |4 ||0x00002A10 ||96 |36 |11|0x1740
UNIT_TYPE_MDF
0 |0x01 |0x08 |48 |0x02 |4 ||0x00002A00 ||97 |37 |11|0x1760
UNIT_TYPE_MDF
0 |0x01 |0x08 |48 |0x02 |4 ||0x000029F0 ||98 |38 |11|0x1780
UNIT_TYPE_MDF
0 |0x01 |0x08 |48 |0x02 |4 ||0x000029E0 ||99 |39 |11|0x17A0
UNIT_TYPE_IAL_0
0 |0x00 |0x00 | 0 |0x00 |0 ||0x00000000 || 0 | 0 |0|0x10C0
UNIT_TYPE_IAL_0
0 |0x00 |0x00 | 0 |0x00 |0 ||0x00000000 || 0 | 0 |0|0x1100
UNIT_TYPE_IAL_0
0 |0x00 |0x00 | 0 |0x00 |0 ||0x00000000 || 0 | 0 |0|0x1140
UNIT_TYPE_IAL_0
0 |0x00 |0x00 | 0 |0x00 |0 ||0x00000000 || 0 | 0 |0|0x1180
UNIT_TYPE_IAL_0
0 |0x00 |0x00 | 0 |0x00 |0 ||0x00000000 || 0 | 0 |0|0x11C0
UNIT_TYPE_IAL_0
0 |0x00 |0x00 | 0 |0x00 |0 ||0x00000000 || 0 | 0 |0|0x1200
UNIT_TYPE_IAL_0
0 |0x00 |0x00 | 0 |0x00 |0 ||0x00000000 || 0 | 0 |0|0x1240
UNIT_TYPE_IAL_0
0 |0x00 |0x00 | 0 |0x00 |0 ||0x00000000 || 0 | 0 |0|0x1280
UNIT_TYPE_IAL_1
0 |0x00 |0x00 | 0 |0x00 |0 ||0x00000000 || 0 | 0 |0|0x10E0
UNIT_TYPE_IAL_1
0 |0x00 |0x00 | 0 |0x00 |0 ||0x00000000 || 0 | 0 |0|0x1120
UNIT_TYPE_IAL_1
0 |0x00 |0x00 | 0 |0x00 |0 ||0x00000000 || 0 | 0 |0|0x1160
UNIT_TYPE_IAL_1
0 |0x00 |0x00 | 0 |0x00 |0 ||0x00000000 || 0 | 0 |0|0x11A0
UNIT_TYPE_IAL_1
0 |0x00 |0x00 | 0 |0x00 |0 ||0x00000000 || 0 | 0 |0|0x11E0
UNIT_TYPE_IAL_1
0 |0x00 |0x00 | 0 |0x00 |0 ||0x00000000 || 0 | 0 |0|0x1220
UNIT_TYPE_IAL_1
0 |0x00 |0x00 | 0 |0x00 |0 ||0x00000000 || 0 | 0 |0|0x1260
UNIT_TYPE_IAL_1
0 |0x00 |0x00 | 0 |0x00 |0 ||0x00000000 || 0 | 0 |0|0x12A0
UNIT_TYPE_HBM
1 |0x5C |0x08 |48 |0x40 |4 ||0xFB941C00 ||190 | 0 |14|0x17C0
UNIT_TYPE_HBM
1 |0x5C |0x08 |48 |0x40 |4 ||0xFB945C00 ||191 | 1 |14|0x17E0
UNIT_TYPE_HBM
1 |0x5C |0x08 |48 |0x40 |4 ||0xFB94AC00 ||192 | 2 |14|0x1800
UNIT_TYPE_HBM
1 |0x5C |0x08 |48 |0x40 |4 ||0xFB94EC00 ||193 | 3 |14|0x1820
UNIT_TYPE_HBM
1 |0x5C |0x08 |48 |0x40 |4 ||0xFB953C00 ||194 | 4 |14|0x1840
UNIT_TYPE_HBM
1 |0x5C |0x08 |48 |0x40 |4 ||0xFB957C00 ||195 | 5 |14|0x1860
UNIT_TYPE_HBM
1 |0x5C |0x08 |48 |0x40 |4 ||0xFB95CC00 ||196 | 6 |14|0x1880
UNIT_TYPE_HBM
1 |0x5C |0x08 |48 |0x40 |4 ||0xFB960C00 ||197 | 7 |14|0x18A0
UNIT_TYPE_HBM
1 |0x5C |0x08 |48 |0x40 |4 ||0xFB965C00 ||198 | 8 |14|0x18C0
UNIT_TYPE_HBM
1 |0x5C |0x08 |48 |0x40 |4 ||0xFB969C00 ||199 | 9 |14|0x18E0
UNIT_TYPE_HBM
1 |0x5C |0x08 |48 |0x40 |4 ||0xFB96EC00 ||200 |10 |14|0x1900
UNIT_TYPE_HBM
1 |0x5C |0x08 |48 |0x40 |4 ||0xFB972C00 ||201 |11 |14|0x1920
UNIT_TYPE_HBM
1 |0x5C |0x08 |48 |0x40 |4 ||0xFB977C00 ||202 |12 |14|0x1940
UNIT_TYPE_HBM
1 |0x5C |0x08 |48 |0x40 |4 ||0xFB97BC00 ||203 |13 |14|0x1960
UNIT_TYPE_HBM
1 |0x5C |0x08 |48 |0x40 |4 ||0xFB980C00 ||204 |14 |14|0x1980
UNIT_TYPE_HBM
1 |0x5C |0x08 |48 |0x40 |4 ||0xFB984C00 ||205 |15 |14|0x19A0
UNIT_TYPE_HBM
1 |0x5C |0x08 |48 |0x40 |4 ||0xFB989C00 ||206 |16 |14|0x19C0
UNIT_TYPE_HBM
1 |0x5C |0x08 |48 |0x40 |4 ||0xFB98DC00 ||207 |17 |14|0x19E0
UNIT_TYPE_HBM
1 |0x5C |0x08 |48 |0x40 |4 ||0xFB992C00 ||208 |18 |14|0x1A00
UNIT_TYPE_HBM
1 |0x5C |0x08 |48 |0x40 |4 ||0xFB996C00 ||209 |19 |14|0x1A20
UNIT_TYPE_HBM
1 |0x5C |0x08 |48 |0x40 |4 ||0xFB99BC00 ||210 |20 |14|0x1A40
UNIT_TYPE_HBM
1 |0x5C |0x08 |48 |0x40 |4 ||0xFB99FC00 ||211 |21 |14|0x1A60
UNIT_TYPE_HBM
1 |0x5C |0x08 |48 |0x40 |4 ||0xFB9A4C00 ||212 |22 |14|0x1A80
UNIT_TYPE_HBM
1 |0x5C |0x08 |48 |0x40 |4 ||0xFB9A8C00 ||213 |23 |14|0x1AA0
UNIT_TYPE_HBM
1 |0x5C |0x08 |48 |0x40 |4 ||0xFB9ADC00 ||214 |24 |14|0x1AC0
UNIT_TYPE_HBM
1 |0x5C |0x08 |48 |0x40 |4 ||0xFB9B1C00 ||215 |25 |14|0x1AE0
UNIT_TYPE_HBM
1 |0x5C |0x08 |48 |0x40 |4 ||0xFB9B6C00 ||216 |26 |14|0x1B00
UNIT_TYPE_HBM
1 |0x5C |0x08 |48 |0x40 |4 ||0xFB9BAC00 ||217 |27 |14|0x1B20
UNIT_TYPE_HBM
1 |0x5C |0x08 |48 |0x40 |4 ||0xFB9BFC00 ||218 |28 |14|0x1B40
UNIT_TYPE_HBM
1 |0x5C |0x08 |48 |0x40 |4 ||0xFB9C3C00 ||219 |29 |14|0x1B60
UNIT_TYPE_HBM
1 |0x5C |0x08 |48 |0x40 |4 ||0xFB9C8C00 ||220 |30 |14|0x1B80
UNIT_TYPE_HBM
1 |0x5C |0x08 |48 |0x40 |4 ||0xFB9CCC00 ||221 |31 |14|0x1BA0
[OOBMSM] InitOobMsmBar() Enter
Socket[1], OobMsm.Func[2], BAR[0]
Disable MSE and BME
Original StsCmdReg Value = 0x00100004
BarSize: 0x00200000
BarBase: 0xF9C00000(Already assigned)
Enable MSE and BME
[OOBMSM] InitOobMsmBar() Exit
SPK Bar0 address: 0xF9C00000
SPK instance 0: BAR offset: 0x00058000
SPK SNC Base Address 1: 0x0FFF0082
SPK SNC Base Address 2: 0x1FE000A2
SPK SNC Base Address 3: 0x000000C2
SPK SNC Base Address 4: 0x000000E2
SPK SNC Base Address 5: 0x00000102
SPK SNC Upper Base Address: 0x00000000
SPK_SNC_CONFIG: 0x0000000F
SPK_UNCORE_SNC_CONFIG: NumChaPerCluster:13, BaseChaCluster1:13, BaseChaCluster2:26, BaseChaCluster3:39
SPK_UMA_CLUSTER_CFG: UmaClusterEn: 0, XorDefeatur: 0
SPK instance 1: BAR offset: 0x00059000
SPK SNC Base Address 1: 0x0FFF0082
SPK SNC Base Address 2: 0x1FE000A2
SPK SNC Base Address 3: 0x000000C2
SPK SNC Base Address 4: 0x000000E2
SPK SNC Base Address 5: 0x00000102
SPK SNC Upper Base Address: 0x00000000
SPK_SNC_CONFIG: 0x0000000F
SPK_UNCORE_SNC_CONFIG: NumChaPerCluster:13, BaseChaCluster1:13, BaseChaCluster2:26, BaseChaCluster3:39
SPK_UMA_CLUSTER_CFG: UmaClusterEn: 0, XorDefeatur: 0
SPK instance 2: BAR offset: 0x0005A000
SPK SNC Base Address 1: 0x0FFF0082
SPK SNC Base Address 2: 0x1FE000A2
SPK SNC Base Address 3: 0x000000C2
SPK SNC Base Address 4: 0x000000E2
SPK SNC Base Address 5: 0x00000102
SPK SNC Upper Base Address: 0x00000000
SPK_SNC_CONFIG: 0x0000000F
SPK_UNCORE_SNC_CONFIG: NumChaPerCluster:13, BaseChaCluster1:13, BaseChaCluster2:26, BaseChaCluster3:39
SPK_UMA_CLUSTER_CFG: UmaClusterEn: 0, XorDefeatur: 0
SPK instance 3: BAR offset: 0x0005B000
SPK SNC Base Address 1: 0x0FFF0082
SPK SNC Base Address 2: 0x1FE000A2
SPK SNC Base Address 3: 0x000000C2
SPK SNC Base Address 4: 0x000000E2
SPK SNC Base Address 5: 0x00000102
SPK SNC Upper Base Address: 0x00000000
SPK_SNC_CONFIG: 0x0000000F
SPK_UNCORE_SNC_CONFIG: NumChaPerCluster:13, BaseChaCluster1:13, BaseChaCluster2:26, BaseChaCluster3:39
SPK_UMA_CLUSTER_CFG: UmaClusterEn: 0, XorDefeatur: 0
SPK instance 4: BAR offset: 0x0005C000
SPK SNC Base Address 1: 0x0FFF0082
SPK SNC Base Address 2: 0x1FE000A2
SPK SNC Base Address 3: 0x000000C2
SPK SNC Base Address 4: 0x000000E2
SPK SNC Base Address 5: 0x00000102
SPK SNC Upper Base Address: 0x00000000
SPK_SNC_CONFIG: 0x0000000F
SPK_UNCORE_SNC_CONFIG: NumChaPerCluster:13, BaseChaCluster1:13, BaseChaCluster2:26, BaseChaCluster3:39
SPK_UMA_CLUSTER_CFG: UmaClusterEn: 0, XorDefeatur: 0
SPK instance 5: BAR offset: 0x0005D000
SPK SNC Base Address 1: 0x0FFF0082
SPK SNC Base Address 2: 0x1FE000A2
SPK SNC Base Address 3: 0x000000C2
SPK SNC Base Address 4: 0x000000E2
SPK SNC Base Address 5: 0x00000102
SPK SNC Upper Base Address: 0x00000000
SPK_SNC_CONFIG: 0x0000000F
SPK_UNCORE_SNC_CONFIG: NumChaPerCluster:13, BaseChaCluster1:13, BaseChaCluster2:26, BaseChaCluster3:39
SPK_UMA_CLUSTER_CFG: UmaClusterEn: 0, XorDefeatur: 0
SPK instance 6: BAR offset: 0x0005E000
SPK SNC Base Address 1: 0x0FFF0082
SPK SNC Base Address 2: 0x1FE000A2
SPK SNC Base Address 3: 0x000000C2
SPK SNC Base Address 4: 0x000000E2
SPK SNC Base Address 5: 0x00000102
SPK SNC Upper Base Address: 0x00000000
SPK_SNC_CONFIG: 0x0000000F
SPK_UNCORE_SNC_CONFIG: NumChaPerCluster:13, BaseChaCluster1:13, BaseChaCluster2:26, BaseChaCluster3:39
SPK_UMA_CLUSTER_CFG: UmaClusterEn: 0, XorDefeatur: 0
SPK instance 7: BAR offset: 0x0005F000
SPK SNC Base Address 1: 0x0FFF0082
SPK SNC Base Address 2: 0x1FE000A2
SPK SNC Base Address 3: 0x000000C2
SPK SNC Base Address 4: 0x000000E2
SPK SNC Base Address 5: 0x00000102
SPK SNC Upper Base Address: 0x00000000
SPK_SNC_CONFIG: 0x0000000F
SPK_UNCORE_SNC_CONFIG: NumChaPerCluster:13, BaseChaCluster1:13, BaseChaCluster2:26, BaseChaCluster3:39
SPK_UMA_CLUSTER_CFG: UmaClusterEn: 0, XorDefeatur: 0
SPK instance 8: BAR offset: 0x00060000
SPK SNC Base Address 1: 0x0FFF0082
SPK SNC Base Address 2: 0x1FE000A2
SPK SNC Base Address 3: 0x000000C2
SPK SNC Base Address 4: 0x000000E2
SPK SNC Base Address 5: 0x00000102
SPK SNC Upper Base Address: 0x00000000
SPK_SNC_CONFIG: 0x0000000F
SPK_UNCORE_SNC_CONFIG: NumChaPerCluster:13, BaseChaCluster1:13, BaseChaCluster2:26, BaseChaCluster3:39
SPK_UMA_CLUSTER_CFG: UmaClusterEn: 0, XorDefeatur: 0
SPK instance 9: BAR offset: 0x00061000
SPK SNC Base Address 1: 0x0FFF0082
SPK SNC Base Address 2: 0x1FE000A2
SPK SNC Base Address 3: 0x000000C2
SPK SNC Base Address 4: 0x000000E2
SPK SNC Base Address 5: 0x00000102
SPK SNC Upper Base Address: 0x00000000
SPK_SNC_CONFIG: 0x0000000F
SPK_UNCORE_SNC_CONFIG: NumChaPerCluster:13, BaseChaCluster1:13, BaseChaCluster2:26, BaseChaCluster3:39
SPK_UMA_CLUSTER_CFG: UmaClusterEn: 0, XorDefeatur: 0
SPK instance 10: BAR offset: 0x00062000
SPK SNC Base Address 1: 0x0FFF0082
SPK SNC Base Address 2: 0x1FE000A2
SPK SNC Base Address 3: 0x000000C2
SPK SNC Base Address 4: 0x000000E2
SPK SNC Base Address 5: 0x00000102
SPK SNC Upper Base Address: 0x00000000
SPK_SNC_CONFIG: 0x0000000F
SPK_UNCORE_SNC_CONFIG: NumChaPerCluster:13, BaseChaCluster1:13, BaseChaCluster2:26, BaseChaCluster3:39
SPK_UMA_CLUSTER_CFG: UmaClusterEn: 0, XorDefeatur: 0
SPK instance 11: BAR offset: 0x00063000
SPK SNC Base Address 1: 0x0FFF0082
SPK SNC Base Address 2: 0x1FE000A2
SPK SNC Base Address 3: 0x000000C2
SPK SNC Base Address 4: 0x000000E2
SPK SNC Base Address 5: 0x00000102
SPK SNC Upper Base Address: 0x00000000
SPK_SNC_CONFIG: 0x0000000F
SPK_UNCORE_SNC_CONFIG: NumChaPerCluster:13, BaseChaCluster1:13, BaseChaCluster2:26, BaseChaCluster3:39
SPK_UMA_CLUSTER_CFG: UmaClusterEn: 0, XorDefeatur: 0
SPK instance 12: BAR offset: 0x00070000
SPK SNC Base Address 1: 0x0FFF0082
SPK SNC Base Address 2: 0x1FE000A2
SPK SNC Base Address 3: 0x000000C2
SPK SNC Base Address 4: 0x000000E2
SPK SNC Base Address 5: 0x00000102
SPK SNC Upper Base Address: 0x00000000
SPK_SNC_CONFIG: 0x0000000F
SPK_UNCORE_SNC_CONFIG: NumChaPerCluster:13, BaseChaCluster1:13, BaseChaCluster2:26, BaseChaCluster3:39
SPK_UMA_CLUSTER_CFG: UmaClusterEn: 0, XorDefeatur: 0
SPK instance 13: BAR offset: 0x00071000
SPK SNC Base Address 1: 0x0FFF0082
SPK SNC Base Address 2: 0x1FE000A2
SPK SNC Base Address 3: 0x000000C2
SPK SNC Base Address 4: 0x000000E2
SPK SNC Base Address 5: 0x00000102
SPK SNC Upper Base Address: 0x00000000
SPK_SNC_CONFIG: 0x0000000F
SPK_UNCORE_SNC_CONFIG: NumChaPerCluster:13, BaseChaCluster1:13, BaseChaCluster2:26, BaseChaCluster3:39
SPK_UMA_CLUSTER_CFG: UmaClusterEn: 0, XorDefeatur: 0
SPK instance 14: BAR offset: 0x00072000
SPK SNC Base Address 1: 0x0FFF0082
SPK SNC Base Address 2: 0x1FE000A2
SPK SNC Base Address 3: 0x000000C2
SPK SNC Base Address 4: 0x000000E2
SPK SNC Base Address 5: 0x00000102
SPK SNC Upper Base Address: 0x00000000
SPK_SNC_CONFIG: 0x0000000F
SPK_UNCORE_SNC_CONFIG: NumChaPerCluster:13, BaseChaCluster1:13, BaseChaCluster2:26, BaseChaCluster3:39
SPK_UMA_CLUSTER_CFG: UmaClusterEn: 0, XorDefeatur: 0
SPK instance 15: BAR offset: 0x00073000
SPK SNC Base Address 1: 0x0FFF0082
SPK SNC Base Address 2: 0x1FE000A2
SPK SNC Base Address 3: 0x000000C2
SPK SNC Base Address 4: 0x000000E2
SPK SNC Base Address 5: 0x00000102
SPK SNC Upper Base Address: 0x00000000
SPK_SNC_CONFIG: 0x0000000F
SPK_UNCORE_SNC_CONFIG: NumChaPerCluster:13, BaseChaCluster1:13, BaseChaCluster2:26, BaseChaCluster3:39
SPK_UMA_CLUSTER_CFG: UmaClusterEn: 0, XorDefeatur: 0
**** SNC XPT DUMP START ****
**** CPU 0: ****
SNC_CONFIG_MS2IDI : 0x0000000F
UNCORE_SNC_CONFIG_MS2IDI : 0x271A0D0D
UMA_CLUSTER_MS2IDI : 0x00000000
XPT_2_ENTRY_MINISAD_TABLE : 0x00000000
XPT_LOCAL_PREFETCH_CONFIG1 : 0x000400BD
XPT_LOCAL_PREFETCH_CONFIG2 : 0x008186A0
XPT_32_ENTRY_MINISAD_TABLE_0 : 0x00000000
XPT_32_ENTRY_MINISAD_TABLE_1 : 0x00000000
XPT_32_ENTRY_MINISAD_TABLE_2 : 0x00000000
XPT_32_ENTRY_MINISAD_TABLE_3 : 0x00000000
XPT_32_ENTRY_MINISAD_TABLE_4 : 0x00000000
XPT_32_ENTRY_MINISAD_TABLE_5 : 0x00000000
XPT_32_ENTRY_PREFETCH_BASE_0 : 0x00000000
XPT_32_ENTRY_PREFETCH_BASE_1 : 0x00000000
XPT_32_ENTRY_PREFETCH_BASE_2 : 0x00000000
XPT_32_ENTRY_PREFETCH_BASE_3 : 0x00000000
XPT_REMOTE_PREFETCH_CONFIG1 : 0x000400BD
XPT_REMOTE_PREFETCH_CONFIG2 : 0x008186A0
XPT_UPI_DECODE_TABLE_0_N0: 0x00000000
XPT_UPI_DECODE_TABLE_0_N1: 0x00000000
XPT_UPI_DECODE_TABLE_1_N0: 0x00000000
XPT_UPI_DECODE_TABLE_1_N1: 0x00000000
XPT_UPI_DECODE_TABLE_2_N0: 0x00000000
XPT_UPI_DECODE_TABLE_2_N1: 0x00000000
XPT_UPI_DECODE_TABLE_3_N0: 0x00000000
XPT_UPI_DECODE_TABLE_3_N1: 0x00000000
KTI_0_SNC_CONFIG_KTI : 0x0000000F
KTI_0_KTIAGCTRL : 0x00101012
KTI_0_KTI_SNC_BASE_1 : 0x0FFF0000
KTI_0_KTI_SNC_BASE_2 : 0x1FE00022
KTI_0_KTI_SNC_BASE_3 : 0x00000042
KTI_0_KTI_SNC_BASE_4 : 0x00000062
KTI_0_KTI_SNC_BASE_5 : 0x00000082
M3KTI 0:
M3KPRECTRL_0 : 0x00000040
M3KPRETL_0 : 0x00000000
KTI_1_SNC_CONFIG_KTI : 0x0000000F
KTI_1_KTIAGCTRL : 0x00101012
KTI_1_KTI_SNC_BASE_1 : 0x0FFF0000
KTI_1_KTI_SNC_BASE_2 : 0x1FE00022
KTI_1_KTI_SNC_BASE_3 : 0x00000042
KTI_1_KTI_SNC_BASE_4 : 0x00000062
KTI_1_KTI_SNC_BASE_5 : 0x00000082
M3KTI 1:
M3KPRECTRL_1 : 0x00000040
M3KPRETL_1 : 0x00000000
KTI_2_SNC_CONFIG_KTI : 0x0000000F
KTI_2_KTIAGCTRL : 0x00101012
KTI_2_KTI_SNC_BASE_1 : 0x0FFF0000
KTI_2_KTI_SNC_BASE_2 : 0x1FE00022
KTI_2_KTI_SNC_BASE_3 : 0x00000042
KTI_2_KTI_SNC_BASE_4 : 0x00000062
KTI_2_KTI_SNC_BASE_5 : 0x00000082
M3KTI 2:
M3KPRECTRL_2 : 0x00000040
M3KPRETL_2 : 0x00000000
KTI_3_SNC_CONFIG_KTI : 0x0000000F
KTI_3_KTIAGCTRL : 0x00101012
KTI_3_KTI_SNC_BASE_1 : 0x0FFF0000
KTI_3_KTI_SNC_BASE_2 : 0x1FE00022
KTI_3_KTI_SNC_BASE_3 : 0x00000042
KTI_3_KTI_SNC_BASE_4 : 0x00000062
KTI_3_KTI_SNC_BASE_5 : 0x00000082
M3KTI 3:
M3KPRECTRL_3 : 0x00000040
M3KPRETL_3 : 0x00000000
CHA_SNC_CONFIG_CHA_PMA : 0x271A0D0F
SNC_CONFIG_IIO_VTD : 0x0000000F
UNCORE_SNC_IIO_VTD : 0x04E6868D
SNC_BASE_1_IIO_VTD : 0x0FFF0000
SNC_BASE_2_IIO_VTD : 0x1FE00022
SNC_BASE_3_IIO_VTD : 0x00000042
SNC_BASE_4_IIO_VTD : 0x00000062
SNC_BASE_5_IIO_VTD : 0x00000082
IIO 0:
IIO_0_SNC_CONFIG_IIO : 0x0000000F
IIO_0_SNC_BASE_1 : 0x0FFF0000
IIO_0_SNC_BASE_2 : 0x1FE00022
IIO_0_SNC_BASE_3 : 0x00000042
IIO_0_SNC_BASE_4 : 0x00000062
IIO_0_SNC_BASE_5 : 0x00000082
IIO 1:
IIO_1_SNC_CONFIG_IIO : 0x0000000F
IIO_1_SNC_BASE_1 : 0x0FFF0000
IIO_1_SNC_BASE_2 : 0x1FE00022
IIO_1_SNC_BASE_3 : 0x00000042
IIO_1_SNC_BASE_4 : 0x00000062
IIO_1_SNC_BASE_5 : 0x00000082
IIO 2:
IIO_2_SNC_CONFIG_IIO : 0x0000000F
IIO_2_SNC_BASE_1 : 0x0FFF0000
IIO_2_SNC_BASE_2 : 0x1FE00022
IIO_2_SNC_BASE_3 : 0x00000042
IIO_2_SNC_BASE_4 : 0x00000062
IIO_2_SNC_BASE_5 : 0x00000082
IIO 3:
IIO_3_SNC_CONFIG_IIO : 0x0000000F
IIO_3_SNC_BASE_1 : 0x0FFF0000
IIO_3_SNC_BASE_2 : 0x1FE00022
IIO_3_SNC_BASE_3 : 0x00000042
IIO_3_SNC_BASE_4 : 0x00000062
IIO_3_SNC_BASE_5 : 0x00000082
IIO 4:
IIO_4_SNC_CONFIG_IIO : 0x0000000F
IIO_4_SNC_BASE_1 : 0x0FFF0000
IIO_4_SNC_BASE_2 : 0x1FE00022
IIO_4_SNC_BASE_3 : 0x00000042
IIO_4_SNC_BASE_4 : 0x00000062
IIO_4_SNC_BASE_5 : 0x00000082
IIO 5:
IIO_5_SNC_CONFIG_IIO : 0x0000000F
IIO_5_SNC_BASE_1 : 0x0FFF0000
IIO_5_SNC_BASE_2 : 0x1FE00022
IIO_5_SNC_BASE_3 : 0x00000042
IIO_5_SNC_BASE_4 : 0x00000062
IIO_5_SNC_BASE_5 : 0x00000082
IIO 8:
IIO_8_SNC_CONFIG_IIO : 0x0000000F
IIO_8_SNC_BASE_1 : 0x0FFF0000
IIO_8_SNC_BASE_2 : 0x1FE00022
IIO_8_SNC_BASE_3 : 0x00000042
IIO_8_SNC_BASE_4 : 0x00000062
IIO_8_SNC_BASE_5 : 0x00000082
IIO 9:
IIO_9_SNC_CONFIG_IIO : 0x0000000F
IIO_9_SNC_BASE_1 : 0x0FFF0000
IIO_9_SNC_BASE_2 : 0x1FE00022
IIO_9_SNC_BASE_3 : 0x00000042
IIO_9_SNC_BASE_4 : 0x00000062
IIO_9_SNC_BASE_5 : 0x00000082
IIO 10:
IIO_10_SNC_CONFIG_IIO : 0x0000000F
IIO_10_SNC_BASE_1 : 0x0FFF0000
IIO_10_SNC_BASE_2 : 0x1FE00022
IIO_10_SNC_BASE_3 : 0x00000042
IIO_10_SNC_BASE_4 : 0x00000062
IIO_10_SNC_BASE_5 : 0x00000082
IIO 11:
IIO_11_SNC_CONFIG_IIO : 0x0000000F
IIO_11_SNC_BASE_1 : 0x0FFF0000
IIO_11_SNC_BASE_2 : 0x1FE00022
IIO_11_SNC_BASE_3 : 0x00000042
IIO_11_SNC_BASE_4 : 0x00000062
IIO_11_SNC_BASE_5 : 0x00000082
M2MEM_0_TOPOLOGY : 0x00018000
M2MEM_0_PREFSADCONFIG0 : 0x00000000
M2MEM_0_PREFSADCONFIG1 : 0x00000000
M2MEM_0_PREFETCHSADSTARTADDR0 : 0x00000000
M2MEM_0_PREFETCHSADLIMITADDR0 : 0x00000000
M2MEM_0_PREFETCHSADSTARTADDR1 : 0x00000000
M2MEM_0_PREFETCHSADLIMITADDR1 : 0x00000000
M2MEM_0_PREFETCHSADSTARTADDR2 : 0x00000000
M2MEM_0_PREFETCHSADLIMITADDR2 : 0x00000000
M2MEM_0_SYSFEATURES0 : 0x1340008D
M2MEM_1_TOPOLOGY : 0x00032340
M2MEM_1_PREFSADCONFIG0 : 0x00000000
M2MEM_1_PREFSADCONFIG1 : 0x00000000
M2MEM_1_PREFETCHSADSTARTADDR0 : 0x00000000
M2MEM_1_PREFETCHSADLIMITADDR0 : 0x00000000
M2MEM_1_PREFETCHSADSTARTADDR1 : 0x00000000
M2MEM_1_PREFETCHSADLIMITADDR1 : 0x00000000
M2MEM_1_PREFETCHSADSTARTADDR2 : 0x00000000
M2MEM_1_PREFETCHSADLIMITADDR2 : 0x00000000
M2MEM_1_SYSFEATURES0 : 0x1340008D
M2MEM_2_TOPOLOGY : 0x0004C680
M2MEM_2_PREFSADCONFIG0 : 0x00000000
M2MEM_2_PREFSADCONFIG1 : 0x00000000
M2MEM_2_PREFETCHSADSTARTADDR0 : 0x00000000
M2MEM_2_PREFETCHSADLIMITADDR0 : 0x00000000
M2MEM_2_PREFETCHSADSTARTADDR1 : 0x00000000
M2MEM_2_PREFETCHSADLIMITADDR1 : 0x00000000
M2MEM_2_PREFETCHSADSTARTADDR2 : 0x00000000
M2MEM_2_PREFETCHSADLIMITADDR2 : 0x00000000
M2MEM_2_SYSFEATURES0 : 0x1340008D
M2MEM_3_TOPOLOGY : 0x000669C0
M2MEM_3_PREFSADCONFIG0 : 0x00000000
M2MEM_3_PREFSADCONFIG1 : 0x00000000
M2MEM_3_PREFETCHSADSTARTADDR0 : 0x00000000
M2MEM_3_PREFETCHSADLIMITADDR0 : 0x00000000
M2MEM_3_PREFETCHSADSTARTADDR1 : 0x00000000
M2MEM_3_PREFETCHSADLIMITADDR1 : 0x00000000
M2MEM_3_PREFETCHSADSTARTADDR2 : 0x00000000
M2MEM_3_PREFETCHSADLIMITADDR2 : 0x00000000
M2MEM_3_SYSFEATURES0 : 0x1340008D
M2MEM_4_TOPOLOGY : 0x00018000
M2MEM_4_PREFSADCONFIG0 : 0x00000000
M2MEM_4_PREFSADCONFIG1 : 0x00000000
M2MEM_4_PREFETCHSADSTARTADDR0 : 0x00000000
M2MEM_4_PREFETCHSADLIMITADDR0 : 0x00000000
M2MEM_4_PREFETCHSADSTARTADDR1 : 0x00000000
M2MEM_4_PREFETCHSADLIMITADDR1 : 0x00000000
M2MEM_4_PREFETCHSADSTARTADDR2 : 0x00000000
M2MEM_4_PREFETCHSADLIMITADDR2 : 0x00000000
M2MEM_4_SYSFEATURES0 : 0x1368009C
M2MEM_5_TOPOLOGY : 0x00018000
M2MEM_5_PREFSADCONFIG0 : 0x00000000
M2MEM_5_PREFSADCONFIG1 : 0x00000000
M2MEM_5_PREFETCHSADSTARTADDR0 : 0x00000000
M2MEM_5_PREFETCHSADLIMITADDR0 : 0x00000000
M2MEM_5_PREFETCHSADSTARTADDR1 : 0x00000000
M2MEM_5_PREFETCHSADLIMITADDR1 : 0x00000000
M2MEM_5_PREFETCHSADSTARTADDR2 : 0x00000000
M2MEM_5_PREFETCHSADLIMITADDR2 : 0x00000000
M2MEM_5_SYSFEATURES0 : 0x1368009C
M2MEM_6_TOPOLOGY : 0x00018000
M2MEM_6_PREFSADCONFIG0 : 0x00000000
M2MEM_6_PREFSADCONFIG1 : 0x00000000
M2MEM_6_PREFETCHSADSTARTADDR0 : 0x00000000
M2MEM_6_PREFETCHSADLIMITADDR0 : 0x00000000
M2MEM_6_PREFETCHSADSTARTADDR1 : 0x00000000
M2MEM_6_PREFETCHSADLIMITADDR1 : 0x00000000
M2MEM_6_PREFETCHSADSTARTADDR2 : 0x00000000
M2MEM_6_PREFETCHSADLIMITADDR2 : 0x00000000
M2MEM_6_SYSFEATURES0 : 0x1368009C
M2MEM_7_TOPOLOGY : 0x00018000
M2MEM_7_PREFSADCONFIG0 : 0x00000000
M2MEM_7_PREFSADCONFIG1 : 0x00000000
M2MEM_7_PREFETCHSADSTARTADDR0 : 0x00000000
M2MEM_7_PREFETCHSADLIMITADDR0 : 0x00000000
M2MEM_7_PREFETCHSADSTARTADDR1 : 0x00000000
M2MEM_7_PREFETCHSADLIMITADDR1 : 0x00000000
M2MEM_7_PREFETCHSADSTARTADDR2 : 0x00000000
M2MEM_7_PREFETCHSADLIMITADDR2 : 0x00000000
M2MEM_7_SYSFEATURES0 : 0x1368009C
M2MEM_8_TOPOLOGY : 0x00032340
M2MEM_8_PREFSADCONFIG0 : 0x00000000
M2MEM_8_PREFSADCONFIG1 : 0x00000000
M2MEM_8_PREFETCHSADSTARTADDR0 : 0x00000000
M2MEM_8_PREFETCHSADLIMITADDR0 : 0x00000000
M2MEM_8_PREFETCHSADSTARTADDR1 : 0x00000000
M2MEM_8_PREFETCHSADLIMITADDR1 : 0x00000000
M2MEM_8_PREFETCHSADSTARTADDR2 : 0x00000000
M2MEM_8_PREFETCHSADLIMITADDR2 : 0x00000000
M2MEM_8_SYSFEATURES0 : 0x1368009C
M2MEM_9_TOPOLOGY : 0x00032340
M2MEM_9_PREFSADCONFIG0 : 0x00000000
M2MEM_9_PREFSADCONFIG1 : 0x00000000
M2MEM_9_PREFETCHSADSTARTADDR0 : 0x00000000
M2MEM_9_PREFETCHSADLIMITADDR0 : 0x00000000
M2MEM_9_PREFETCHSADSTARTADDR1 : 0x00000000
M2MEM_9_PREFETCHSADLIMITADDR1 : 0x00000000
M2MEM_9_PREFETCHSADSTARTADDR2 : 0x00000000
M2MEM_9_PREFETCHSADLIMITADDR2 : 0x00000000
M2MEM_9_SYSFEATURES0 : 0x1368009C
M2MEM_10_TOPOLOGY : 0x00032340
M2MEM_10_PREFSADCONFIG0 : 0x00000000
M2MEM_10_PREFSADCONFIG1 : 0x00000000
M2MEM_10_PREFETCHSADSTARTADDR0 : 0x00000000
M2MEM_10_PREFETCHSADLIMITADDR0 : 0x00000000
M2MEM_10_PREFETCHSADSTARTADDR1 : 0x00000000
M2MEM_10_PREFETCHSADLIMITADDR1 : 0x00000000
M2MEM_10_PREFETCHSADSTARTADDR2 : 0x00000000
M2MEM_10_PREFETCHSADLIMITADDR2 : 0x00000000
M2MEM_10_SYSFEATURES0 : 0x1368009C
M2MEM_11_TOPOLOGY : 0x00032340
M2MEM_11_PREFSADCONFIG0 : 0x00000000
M2MEM_11_PREFSADCONFIG1 : 0x00000000
M2MEM_11_PREFETCHSADSTARTADDR0 : 0x00000000
M2MEM_11_PREFETCHSADLIMITADDR0 : 0x00000000
M2MEM_11_PREFETCHSADSTARTADDR1 : 0x00000000
M2MEM_11_PREFETCHSADLIMITADDR1 : 0x00000000
M2MEM_11_PREFETCHSADSTARTADDR2 : 0x00000000
M2MEM_11_PREFETCHSADLIMITADDR2 : 0x00000000
M2MEM_11_SYSFEATURES0 : 0x1368009C
M2MEM_12_TOPOLOGY : 0x0004C680
M2MEM_12_PREFSADCONFIG0 : 0x00000000
M2MEM_12_PREFSADCONFIG1 : 0x00000000
M2MEM_12_PREFETCHSADSTARTADDR0 : 0x00000000
M2MEM_12_PREFETCHSADLIMITADDR0 : 0x00000000
M2MEM_12_PREFETCHSADSTARTADDR1 : 0x00000000
M2MEM_12_PREFETCHSADLIMITADDR1 : 0x00000000
M2MEM_12_PREFETCHSADSTARTADDR2 : 0x00000000
M2MEM_12_PREFETCHSADLIMITADDR2 : 0x00000000
M2MEM_12_SYSFEATURES0 : 0x1368009C
M2MEM_13_TOPOLOGY : 0x0004C680
M2MEM_13_PREFSADCONFIG0 : 0x00000000
M2MEM_13_PREFSADCONFIG1 : 0x00000000
M2MEM_13_PREFETCHSADSTARTADDR0 : 0x00000000
M2MEM_13_PREFETCHSADLIMITADDR0 : 0x00000000
M2MEM_13_PREFETCHSADSTARTADDR1 : 0x00000000
M2MEM_13_PREFETCHSADLIMITADDR1 : 0x00000000
M2MEM_13_PREFETCHSADSTARTADDR2 : 0x00000000
M2MEM_13_PREFETCHSADLIMITADDR2 : 0x00000000
M2MEM_13_SYSFEATURES0 : 0x1368009C
M2MEM_14_TOPOLOGY : 0x0004C680
M2MEM_14_PREFSADCONFIG0 : 0x00000000
M2MEM_14_PREFSADCONFIG1 : 0x00000000
M2MEM_14_PREFETCHSADSTARTADDR0 : 0x00000000
M2MEM_14_PREFETCHSADLIMITADDR0 : 0x00000000
M2MEM_14_PREFETCHSADSTARTADDR1 : 0x00000000
M2MEM_14_PREFETCHSADLIMITADDR1 : 0x00000000
M2MEM_14_PREFETCHSADSTARTADDR2 : 0x00000000
M2MEM_14_PREFETCHSADLIMITADDR2 : 0x00000000
M2MEM_14_SYSFEATURES0 : 0x1368009C
M2MEM_15_TOPOLOGY : 0x0004C680
M2MEM_15_PREFSADCONFIG0 : 0x00000000
M2MEM_15_PREFSADCONFIG1 : 0x00000000
M2MEM_15_PREFETCHSADSTARTADDR0 : 0x00000000
M2MEM_15_PREFETCHSADLIMITADDR0 : 0x00000000
M2MEM_15_PREFETCHSADSTARTADDR1 : 0x00000000
M2MEM_15_PREFETCHSADLIMITADDR1 : 0x00000000
M2MEM_15_PREFETCHSADSTARTADDR2 : 0x00000000
M2MEM_15_PREFETCHSADLIMITADDR2 : 0x00000000
M2MEM_15_SYSFEATURES0 : 0x1368009C
M2MEM_16_TOPOLOGY : 0x000669C0
M2MEM_16_PREFSADCONFIG0 : 0x00000000
M2MEM_16_PREFSADCONFIG1 : 0x00000000
M2MEM_16_PREFETCHSADSTARTADDR0 : 0x00000000
M2MEM_16_PREFETCHSADLIMITADDR0 : 0x00000000
M2MEM_16_PREFETCHSADSTARTADDR1 : 0x00000000
M2MEM_16_PREFETCHSADLIMITADDR1 : 0x00000000
M2MEM_16_PREFETCHSADSTARTADDR2 : 0x00000000
M2MEM_16_PREFETCHSADLIMITADDR2 : 0x00000000
M2MEM_16_SYSFEATURES0 : 0x1368009C
M2MEM_17_TOPOLOGY : 0x000669C0
M2MEM_17_PREFSADCONFIG0 : 0x00000000
M2MEM_17_PREFSADCONFIG1 : 0x00000000
M2MEM_17_PREFETCHSADSTARTADDR0 : 0x00000000
M2MEM_17_PREFETCHSADLIMITADDR0 : 0x00000000
M2MEM_17_PREFETCHSADSTARTADDR1 : 0x00000000
M2MEM_17_PREFETCHSADLIMITADDR1 : 0x00000000
M2MEM_17_PREFETCHSADSTARTADDR2 : 0x00000000
M2MEM_17_PREFETCHSADLIMITADDR2 : 0x00000000
M2MEM_17_SYSFEATURES0 : 0x1368009C
M2MEM_18_TOPOLOGY : 0x000669C0
M2MEM_18_PREFSADCONFIG0 : 0x00000000
M2MEM_18_PREFSADCONFIG1 : 0x00000000
M2MEM_18_PREFETCHSADSTARTADDR0 : 0x00000000
M2MEM_18_PREFETCHSADLIMITADDR0 : 0x00000000
M2MEM_18_PREFETCHSADSTARTADDR1 : 0x00000000
M2MEM_18_PREFETCHSADLIMITADDR1 : 0x00000000
M2MEM_18_PREFETCHSADSTARTADDR2 : 0x00000000
M2MEM_18_PREFETCHSADLIMITADDR2 : 0x00000000
M2MEM_18_SYSFEATURES0 : 0x1368009C
M2MEM_19_TOPOLOGY : 0x000669C0
M2MEM_19_PREFSADCONFIG0 : 0x00000000
M2MEM_19_PREFSADCONFIG1 : 0x00000000
M2MEM_19_PREFETCHSADSTARTADDR0 : 0x00000000
M2MEM_19_PREFETCHSADLIMITADDR0 : 0x00000000
M2MEM_19_PREFETCHSADSTARTADDR1 : 0x00000000
M2MEM_19_PREFETCHSADLIMITADDR1 : 0x00000000
M2MEM_19_PREFETCHSADSTARTADDR2 : 0x00000000
M2MEM_19_PREFETCHSADLIMITADDR2 : 0x00000000
M2MEM_19_SYSFEATURES0 : 0x1368009C
**** CPU 1: ****
SNC_CONFIG_MS2IDI : 0x0000000F
UNCORE_SNC_CONFIG_MS2IDI : 0x271A0D0D
UMA_CLUSTER_MS2IDI : 0x00000000
XPT_2_ENTRY_MINISAD_TABLE : 0x00000000
XPT_LOCAL_PREFETCH_CONFIG1 : 0x000400BD
XPT_LOCAL_PREFETCH_CONFIG2 : 0x008186A0
XPT_32_ENTRY_MINISAD_TABLE_0 : 0x00000000
XPT_32_ENTRY_MINISAD_TABLE_1 : 0x00000000
XPT_32_ENTRY_MINISAD_TABLE_2 : 0x00000000
XPT_32_ENTRY_MINISAD_TABLE_3 : 0x00000000
XPT_32_ENTRY_MINISAD_TABLE_4 : 0x00000000
XPT_32_ENTRY_MINISAD_TABLE_5 : 0x00000000
XPT_32_ENTRY_PREFETCH_BASE_0 : 0x00000000
XPT_32_ENTRY_PREFETCH_BASE_1 : 0x00000000
XPT_32_ENTRY_PREFETCH_BASE_2 : 0x00000000
XPT_32_ENTRY_PREFETCH_BASE_3 : 0x00000000
XPT_REMOTE_PREFETCH_CONFIG1 : 0x000400BD
XPT_REMOTE_PREFETCH_CONFIG2 : 0x008186A0
XPT_UPI_DECODE_TABLE_0_N0: 0x00000000
XPT_UPI_DECODE_TABLE_0_N1: 0x00000000
XPT_UPI_DECODE_TABLE_1_N0: 0x00000000
XPT_UPI_DECODE_TABLE_1_N1: 0x00000000
XPT_UPI_DECODE_TABLE_2_N0: 0x00000000
XPT_UPI_DECODE_TABLE_2_N1: 0x00000000
XPT_UPI_DECODE_TABLE_3_N0: 0x00000000
XPT_UPI_DECODE_TABLE_3_N1: 0x00000000
KTI_0_SNC_CONFIG_KTI : 0x0000000F
KTI_0_KTIAGCTRL : 0x00101012
KTI_0_KTI_SNC_BASE_1 : 0x0FFF0082
KTI_0_KTI_SNC_BASE_2 : 0x1FE000A2
KTI_0_KTI_SNC_BASE_3 : 0x000000C2
KTI_0_KTI_SNC_BASE_4 : 0x000000E2
KTI_0_KTI_SNC_BASE_5 : 0x00000102
M3KTI 0:
M3KPRECTRL_0 : 0x00000040
M3KPRETL_0 : 0x00000000
KTI_1_SNC_CONFIG_KTI : 0x0000000F
KTI_1_KTIAGCTRL : 0x00101012
KTI_1_KTI_SNC_BASE_1 : 0x0FFF0082
KTI_1_KTI_SNC_BASE_2 : 0x1FE000A2
KTI_1_KTI_SNC_BASE_3 : 0x000000C2
KTI_1_KTI_SNC_BASE_4 : 0x000000E2
KTI_1_KTI_SNC_BASE_5 : 0x00000102
M3KTI 1:
M3KPRECTRL_1 : 0x00000040
M3KPRETL_1 : 0x00000000
KTI_2_SNC_CONFIG_KTI : 0x0000000F
KTI_2_KTIAGCTRL : 0x00101012
KTI_2_KTI_SNC_BASE_1 : 0x0FFF0082
KTI_2_KTI_SNC_BASE_2 : 0x1FE000A2
KTI_2_KTI_SNC_BASE_3 : 0x000000C2
KTI_2_KTI_SNC_BASE_4 : 0x000000E2
KTI_2_KTI_SNC_BASE_5 : 0x00000102
M3KTI 2:
M3KPRECTRL_2 : 0x00000040
M3KPRETL_2 : 0x00000000
KTI_3_SNC_CONFIG_KTI : 0x0000000F
KTI_3_KTIAGCTRL : 0x00101012
KTI_3_KTI_SNC_BASE_1 : 0x0FFF0082
KTI_3_KTI_SNC_BASE_2 : 0x1FE000A2
KTI_3_KTI_SNC_BASE_3 : 0x000000C2
KTI_3_KTI_SNC_BASE_4 : 0x000000E2
KTI_3_KTI_SNC_BASE_5 : 0x00000102
M3KTI 3:
M3KPRECTRL_3 : 0x00000040
M3KPRETL_3 : 0x00000000
CHA_SNC_CONFIG_CHA_PMA : 0x271A0D0F
SNC_CONFIG_IIO_VTD : 0x0000000F
UNCORE_SNC_IIO_VTD : 0x04E6868D
SNC_BASE_1_IIO_VTD : 0x0FFF0082
SNC_BASE_2_IIO_VTD : 0x1FE000A2
SNC_BASE_3_IIO_VTD : 0x000000C2
SNC_BASE_4_IIO_VTD : 0x000000E2
SNC_BASE_5_IIO_VTD : 0x00000102
IIO 1:
IIO_1_SNC_CONFIG_IIO : 0x0000000F
IIO_1_SNC_BASE_1 : 0x0FFF0082
IIO_1_SNC_BASE_2 : 0x1FE000A2
IIO_1_SNC_BASE_3 : 0x000000C2
IIO_1_SNC_BASE_4 : 0x000000E2
IIO_1_SNC_BASE_5 : 0x00000102
IIO 2:
IIO_2_SNC_CONFIG_IIO : 0x0000000F
IIO_2_SNC_BASE_1 : 0x0FFF0082
IIO_2_SNC_BASE_2 : 0x1FE000A2
IIO_2_SNC_BASE_3 : 0x000000C2
IIO_2_SNC_BASE_4 : 0x000000E2
IIO_2_SNC_BASE_5 : 0x00000102
IIO 3:
IIO_3_SNC_CONFIG_IIO : 0x0000000F
IIO_3_SNC_BASE_1 : 0x0FFF0082
IIO_3_SNC_BASE_2 : 0x1FE000A2
IIO_3_SNC_BASE_3 : 0x000000C2
IIO_3_SNC_BASE_4 : 0x000000E2
IIO_3_SNC_BASE_5 : 0x00000102
IIO 4:
IIO_4_SNC_CONFIG_IIO : 0x0000000F
IIO_4_SNC_BASE_1 : 0x0FFF0082
IIO_4_SNC_BASE_2 : 0x1FE000A2
IIO_4_SNC_BASE_3 : 0x000000C2
IIO_4_SNC_BASE_4 : 0x000000E2
IIO_4_SNC_BASE_5 : 0x00000102
IIO 5:
IIO_5_SNC_CONFIG_IIO : 0x0000000F
IIO_5_SNC_BASE_1 : 0x0FFF0082
IIO_5_SNC_BASE_2 : 0x1FE000A2
IIO_5_SNC_BASE_3 : 0x000000C2
IIO_5_SNC_BASE_4 : 0x000000E2
IIO_5_SNC_BASE_5 : 0x00000102
IIO 6:
IIO_6_SNC_CONFIG_IIO : 0x0000000F
IIO_6_SNC_BASE_1 : 0x0FFF0082
IIO_6_SNC_BASE_2 : 0x1FE000A2
IIO_6_SNC_BASE_3 : 0x000000C2
IIO_6_SNC_BASE_4 : 0x000000E2
IIO_6_SNC_BASE_5 : 0x00000102
IIO 8:
IIO_8_SNC_CONFIG_IIO : 0x0000000F
IIO_8_SNC_BASE_1 : 0x0FFF0082
IIO_8_SNC_BASE_2 : 0x1FE000A2
IIO_8_SNC_BASE_3 : 0x000000C2
IIO_8_SNC_BASE_4 : 0x000000E2
IIO_8_SNC_BASE_5 : 0x00000102
IIO 9:
IIO_9_SNC_CONFIG_IIO : 0x0000000F
IIO_9_SNC_BASE_1 : 0x0FFF0082
IIO_9_SNC_BASE_2 : 0x1FE000A2
IIO_9_SNC_BASE_3 : 0x000000C2
IIO_9_SNC_BASE_4 : 0x000000E2
IIO_9_SNC_BASE_5 : 0x00000102
IIO 10:
IIO_10_SNC_CONFIG_IIO : 0x0000000F
IIO_10_SNC_BASE_1 : 0x0FFF0082
IIO_10_SNC_BASE_2 : 0x1FE000A2
IIO_10_SNC_BASE_3 : 0x000000C2
IIO_10_SNC_BASE_4 : 0x000000E2
IIO_10_SNC_BASE_5 : 0x00000102
IIO 11:
IIO_11_SNC_CONFIG_IIO : 0x0000000F
IIO_11_SNC_BASE_1 : 0x0FFF0082
IIO_11_SNC_BASE_2 : 0x1FE000A2
IIO_11_SNC_BASE_3 : 0x000000C2
IIO_11_SNC_BASE_4 : 0x000000E2
IIO_11_SNC_BASE_5 : 0x00000102
M2MEM_0_TOPOLOGY : 0x00018001
M2MEM_0_PREFSADCONFIG0 : 0x00000000
M2MEM_0_PREFSADCONFIG1 : 0x00000000
M2MEM_0_PREFETCHSADSTARTADDR0 : 0x00000000
M2MEM_0_PREFETCHSADLIMITADDR0 : 0x00000000
M2MEM_0_PREFETCHSADSTARTADDR1 : 0x00000000
M2MEM_0_PREFETCHSADLIMITADDR1 : 0x00000000
M2MEM_0_PREFETCHSADSTARTADDR2 : 0x00000000
M2MEM_0_PREFETCHSADLIMITADDR2 : 0x00000000
M2MEM_0_SYSFEATURES0 : 0x1340008D
M2MEM_1_TOPOLOGY : 0x00032341
M2MEM_1_PREFSADCONFIG0 : 0x00000000
M2MEM_1_PREFSADCONFIG1 : 0x00000000
M2MEM_1_PREFETCHSADSTARTADDR0 : 0x00000000
M2MEM_1_PREFETCHSADLIMITADDR0 : 0x00000000
M2MEM_1_PREFETCHSADSTARTADDR1 : 0x00000000
M2MEM_1_PREFETCHSADLIMITADDR1 : 0x00000000
M2MEM_1_PREFETCHSADSTARTADDR2 : 0x00000000
M2MEM_1_PREFETCHSADLIMITADDR2 : 0x00000000
M2MEM_1_SYSFEATURES0 : 0x1340008D
M2MEM_2_TOPOLOGY : 0x0004C681
M2MEM_2_PREFSADCONFIG0 : 0x00000000
M2MEM_2_PREFSADCONFIG1 : 0x00000000
M2MEM_2_PREFETCHSADSTARTADDR0 : 0x00000000
M2MEM_2_PREFETCHSADLIMITADDR0 : 0x00000000
M2MEM_2_PREFETCHSADSTARTADDR1 : 0x00000000
M2MEM_2_PREFETCHSADLIMITADDR1 : 0x00000000
M2MEM_2_PREFETCHSADSTARTADDR2 : 0x00000000
M2MEM_2_PREFETCHSADLIMITADDR2 : 0x00000000
M2MEM_2_SYSFEATURES0 : 0x1340008D
M2MEM_3_TOPOLOGY : 0x000669C1
M2MEM_3_PREFSADCONFIG0 : 0x00000000
M2MEM_3_PREFSADCONFIG1 : 0x00000000
M2MEM_3_PREFETCHSADSTARTADDR0 : 0x00000000
M2MEM_3_PREFETCHSADLIMITADDR0 : 0x00000000
M2MEM_3_PREFETCHSADSTARTADDR1 : 0x00000000
M2MEM_3_PREFETCHSADLIMITADDR1 : 0x00000000
M2MEM_3_PREFETCHSADSTARTADDR2 : 0x00000000
M2MEM_3_PREFETCHSADLIMITADDR2 : 0x00000000
M2MEM_3_SYSFEATURES0 : 0x1340008D
M2MEM_4_TOPOLOGY : 0x00018001
M2MEM_4_PREFSADCONFIG0 : 0x00000000
M2MEM_4_PREFSADCONFIG1 : 0x00000000
M2MEM_4_PREFETCHSADSTARTADDR0 : 0x00000000
M2MEM_4_PREFETCHSADLIMITADDR0 : 0x00000000
M2MEM_4_PREFETCHSADSTARTADDR1 : 0x00000000
M2MEM_4_PREFETCHSADLIMITADDR1 : 0x00000000
M2MEM_4_PREFETCHSADSTARTADDR2 : 0x00000000
M2MEM_4_PREFETCHSADLIMITADDR2 : 0x00000000
M2MEM_4_SYSFEATURES0 : 0x1368009C
M2MEM_5_TOPOLOGY : 0x00018001
M2MEM_5_PREFSADCONFIG0 : 0x00000000
M2MEM_5_PREFSADCONFIG1 : 0x00000000
M2MEM_5_PREFETCHSADSTARTADDR0 : 0x00000000
M2MEM_5_PREFETCHSADLIMITADDR0 : 0x00000000
M2MEM_5_PREFETCHSADSTARTADDR1 : 0x00000000
M2MEM_5_PREFETCHSADLIMITADDR1 : 0x00000000
M2MEM_5_PREFETCHSADSTARTADDR2 : 0x00000000
M2MEM_5_PREFETCHSADLIMITADDR2 : 0x00000000
M2MEM_5_SYSFEATURES0 : 0x1368009C
M2MEM_6_TOPOLOGY : 0x00018001
M2MEM_6_PREFSADCONFIG0 : 0x00000000
M2MEM_6_PREFSADCONFIG1 : 0x00000000
M2MEM_6_PREFETCHSADSTARTADDR0 : 0x00000000
M2MEM_6_PREFETCHSADLIMITADDR0 : 0x00000000
M2MEM_6_PREFETCHSADSTARTADDR1 : 0x00000000
M2MEM_6_PREFETCHSADLIMITADDR1 : 0x00000000
M2MEM_6_PREFETCHSADSTARTADDR2 : 0x00000000
M2MEM_6_PREFETCHSADLIMITADDR2 : 0x00000000
M2MEM_6_SYSFEATURES0 : 0x1368009C
M2MEM_7_TOPOLOGY : 0x00018001
M2MEM_7_PREFSADCONFIG0 : 0x00000000
M2MEM_7_PREFSADCONFIG1 : 0x00000000
M2MEM_7_PREFETCHSADSTARTADDR0 : 0x00000000
M2MEM_7_PREFETCHSADLIMITADDR0 : 0x00000000
M2MEM_7_PREFETCHSADSTARTADDR1 : 0x00000000
M2MEM_7_PREFETCHSADLIMITADDR1 : 0x00000000
M2MEM_7_PREFETCHSADSTARTADDR2 : 0x00000000
M2MEM_7_PREFETCHSADLIMITADDR2 : 0x00000000
M2MEM_7_SYSFEATURES0 : 0x1368009C
M2MEM_8_TOPOLOGY : 0x00032341
M2MEM_8_PREFSADCONFIG0 : 0x00000000
M2MEM_8_PREFSADCONFIG1 : 0x00000000
M2MEM_8_PREFETCHSADSTARTADDR0 : 0x00000000
M2MEM_8_PREFETCHSADLIMITADDR0 : 0x00000000
M2MEM_8_PREFETCHSADSTARTADDR1 : 0x00000000
M2MEM_8_PREFETCHSADLIMITADDR1 : 0x00000000
M2MEM_8_PREFETCHSADSTARTADDR2 : 0x00000000
M2MEM_8_PREFETCHSADLIMITADDR2 : 0x00000000
M2MEM_8_SYSFEATURES0 : 0x1368009C
M2MEM_9_TOPOLOGY : 0x00032341
M2MEM_9_PREFSADCONFIG0 : 0x00000000
M2MEM_9_PREFSADCONFIG1 : 0x00000000
M2MEM_9_PREFETCHSADSTARTADDR0 : 0x00000000
M2MEM_9_PREFETCHSADLIMITADDR0 : 0x00000000
M2MEM_9_PREFETCHSADSTARTADDR1 : 0x00000000
M2MEM_9_PREFETCHSADLIMITADDR1 : 0x00000000
M2MEM_9_PREFETCHSADSTARTADDR2 : 0x00000000
M2MEM_9_PREFETCHSADLIMITADDR2 : 0x00000000
M2MEM_9_SYSFEATURES0 : 0x1368009C
M2MEM_10_TOPOLOGY : 0x00032341
M2MEM_10_PREFSADCONFIG0 : 0x00000000
M2MEM_10_PREFSADCONFIG1 : 0x00000000
M2MEM_10_PREFETCHSADSTARTADDR0 : 0x00000000
M2MEM_10_PREFETCHSADLIMITADDR0 : 0x00000000
M2MEM_10_PREFETCHSADSTARTADDR1 : 0x00000000
M2MEM_10_PREFETCHSADLIMITADDR1 : 0x00000000
M2MEM_10_PREFETCHSADSTARTADDR2 : 0x00000000
M2MEM_10_PREFETCHSADLIMITADDR2 : 0x00000000
M2MEM_10_SYSFEATURES0 : 0x1368009C
M2MEM_11_TOPOLOGY : 0x00032341
M2MEM_11_PREFSADCONFIG0 : 0x00000000
M2MEM_11_PREFSADCONFIG1 : 0x00000000
M2MEM_11_PREFETCHSADSTARTADDR0 : 0x00000000
M2MEM_11_PREFETCHSADLIMITADDR0 : 0x00000000
M2MEM_11_PREFETCHSADSTARTADDR1 : 0x00000000
M2MEM_11_PREFETCHSADLIMITADDR1 : 0x00000000
M2MEM_11_PREFETCHSADSTARTADDR2 : 0x00000000
M2MEM_11_PREFETCHSADLIMITADDR2 : 0x00000000
M2MEM_11_SYSFEATURES0 : 0x1368009C
M2MEM_12_TOPOLOGY : 0x0004C681
M2MEM_12_PREFSADCONFIG0 : 0x00000000
M2MEM_12_PREFSADCONFIG1 : 0x00000000
M2MEM_12_PREFETCHSADSTARTADDR0 : 0x00000000
M2MEM_12_PREFETCHSADLIMITADDR0 : 0x00000000
M2MEM_12_PREFETCHSADSTARTADDR1 : 0x00000000
M2MEM_12_PREFETCHSADLIMITADDR1 : 0x00000000
M2MEM_12_PREFETCHSADSTARTADDR2 : 0x00000000
M2MEM_12_PREFETCHSADLIMITADDR2 : 0x00000000
M2MEM_12_SYSFEATURES0 : 0x1368009C
M2MEM_13_TOPOLOGY : 0x0004C681
M2MEM_13_PREFSADCONFIG0 : 0x00000000
M2MEM_13_PREFSADCONFIG1 : 0x00000000
M2MEM_13_PREFETCHSADSTARTADDR0 : 0x00000000
M2MEM_13_PREFETCHSADLIMITADDR0 : 0x00000000
M2MEM_13_PREFETCHSADSTARTADDR1 : 0x00000000
M2MEM_13_PREFETCHSADLIMITADDR1 : 0x00000000
M2MEM_13_PREFETCHSADSTARTADDR2 : 0x00000000
M2MEM_13_PREFETCHSADLIMITADDR2 : 0x00000000
M2MEM_13_SYSFEATURES0 : 0x1368009C
M2MEM_14_TOPOLOGY : 0x0004C681
M2MEM_14_PREFSADCONFIG0 : 0x00000000
M2MEM_14_PREFSADCONFIG1 : 0x00000000
M2MEM_14_PREFETCHSADSTARTADDR0 : 0x00000000
M2MEM_14_PREFETCHSADLIMITADDR0 : 0x00000000
M2MEM_14_PREFETCHSADSTARTADDR1 : 0x00000000
M2MEM_14_PREFETCHSADLIMITADDR1 : 0x00000000
M2MEM_14_PREFETCHSADSTARTADDR2 : 0x00000000
M2MEM_14_PREFETCHSADLIMITADDR2 : 0x00000000
M2MEM_14_SYSFEATURES0 : 0x1368009C
M2MEM_15_TOPOLOGY : 0x0004C681
M2MEM_15_PREFSADCONFIG0 : 0x00000000
M2MEM_15_PREFSADCONFIG1 : 0x00000000
M2MEM_15_PREFETCHSADSTARTADDR0 : 0x00000000
M2MEM_15_PREFETCHSADLIMITADDR0 : 0x00000000
M2MEM_15_PREFETCHSADSTARTADDR1 : 0x00000000
M2MEM_15_PREFETCHSADLIMITADDR1 : 0x00000000
M2MEM_15_PREFETCHSADSTARTADDR2 : 0x00000000
M2MEM_15_PREFETCHSADLIMITADDR2 : 0x00000000
M2MEM_15_SYSFEATURES0 : 0x1368009C
M2MEM_16_TOPOLOGY : 0x000669C1
M2MEM_16_PREFSADCONFIG0 : 0x00000000
M2MEM_16_PREFSADCONFIG1 : 0x00000000
M2MEM_16_PREFETCHSADSTARTADDR0 : 0x00000000
M2MEM_16_PREFETCHSADLIMITADDR0 : 0x00000000
M2MEM_16_PREFETCHSADSTARTADDR1 : 0x00000000
M2MEM_16_PREFETCHSADLIMITADDR1 : 0x00000000
M2MEM_16_PREFETCHSADSTARTADDR2 : 0x00000000
M2MEM_16_PREFETCHSADLIMITADDR2 : 0x00000000
M2MEM_16_SYSFEATURES0 : 0x1368009C
M2MEM_17_TOPOLOGY : 0x000669C1
M2MEM_17_PREFSADCONFIG0 : 0x00000000
M2MEM_17_PREFSADCONFIG1 : 0x00000000
M2MEM_17_PREFETCHSADSTARTADDR0 : 0x00000000
M2MEM_17_PREFETCHSADLIMITADDR0 : 0x00000000
M2MEM_17_PREFETCHSADSTARTADDR1 : 0x00000000
M2MEM_17_PREFETCHSADLIMITADDR1 : 0x00000000
M2MEM_17_PREFETCHSADSTARTADDR2 : 0x00000000
M2MEM_17_PREFETCHSADLIMITADDR2 : 0x00000000
M2MEM_17_SYSFEATURES0 : 0x1368009C
M2MEM_18_TOPOLOGY : 0x000669C1
M2MEM_18_PREFSADCONFIG0 : 0x00000000
M2MEM_18_PREFSADCONFIG1 : 0x00000000
M2MEM_18_PREFETCHSADSTARTADDR0 : 0x00000000
M2MEM_18_PREFETCHSADLIMITADDR0 : 0x00000000
M2MEM_18_PREFETCHSADSTARTADDR1 : 0x00000000
M2MEM_18_PREFETCHSADLIMITADDR1 : 0x00000000
M2MEM_18_PREFETCHSADSTARTADDR2 : 0x00000000
M2MEM_18_PREFETCHSADLIMITADDR2 : 0x00000000
M2MEM_18_SYSFEATURES0 : 0x1368009C
M2MEM_19_TOPOLOGY : 0x000669C1
M2MEM_19_PREFSADCONFIG0 : 0x00000000
M2MEM_19_PREFSADCONFIG1 : 0x00000000
M2MEM_19_PREFETCHSADSTARTADDR0 : 0x00000000
M2MEM_19_PREFETCHSADLIMITADDR0 : 0x00000000
M2MEM_19_PREFETCHSADSTARTADDR1 : 0x00000000
M2MEM_19_PREFETCHSADLIMITADDR1 : 0x00000000
M2MEM_19_PREFETCHSADSTARTADDR2 : 0x00000000
M2MEM_19_PREFETCHSADLIMITADDR2 : 0x00000000
M2MEM_19_SYSFEATURES0 : 0x1368009C
**** SNC XPT DUMP END ****
Socket 0 AdTransgressCredits: 0x0, BlTransgressCredits: 0x0
Socket 1 AdTransgressCredits: 0x0, BlTransgressCredits: 0x0
MBA2.0 calibration tables
Mbe BW Calibration: 0 (0 - Linear, 1 - Biased, 2 - Legacy)
ProgramSncShadowReg
Socket:0 Base1 0x0FFF0000
Socket:0 Base2 0x1FE00022
Socket:0 Base3 0x00000042
Socket:0 Base4 0x00000062
Socket:0 Base5 0x00000082
Socket:0 UpperBase1 0x00000000
Socket:0 SncConfig 0x0000000A
Socket:1 Base1 0x0FFF0082
Socket:1 Base2 0x1FE000A2
Socket:1 Base3 0x000000C2
Socket:1 Base4 0x000000E2
Socket:1 Base5 0x00000102
Socket:1 UpperBase1 0x00000000
Socket:1 SncConfig 0x0000000A
******* Configure Mesh Mode - END *******
S3M Provisioning SoftStrap Disabled, Exit.
PUcode Patch provisioning/commit flow
S3mPucodeCfrPatchProvisionCommit didn't find suitable CFR image, Exit.
S3M Patch provisioning/commit flow
Get Image :FF800090 11FF4
CFR Patch Provision start...
IFWI integrated S3M CFR patch revision SVN: 00000001, RevID: 0000001E.
S0 S3M_S3MFW_CFR_SVN_N0_S3M_TREG_REG : 00000000
S0 S3M_S3MFW_REVID_N0_S3M_TREG_REG : 00000000
S0 S3M_S3MFW_CFR_SVN_N1_S3M_TREG_REG : 00010001
S0 S3M_S3MFW_REVID_N1_S3M_TREG_REG : 0000001E
Committed region with the latest patch, skip provision.
Socket 0 Can't Provision, Skip.
IFWI integrated S3M CFR patch revision SVN: 00000001, RevID: 0000001E.
S1 S3M_S3MFW_CFR_SVN_N0_S3M_TREG_REG : 00000000
S1 S3M_S3MFW_REVID_N0_S3M_TREG_REG : 00000000
S1 S3M_S3MFW_CFR_SVN_N1_S3M_TREG_REG : 00010001
S1 S3M_S3MFW_REVID_N1_S3M_TREG_REG : 0000001E
Committed region with the latest patch, skip provision.
Socket 1 Can't Provision, Skip.
CFR Patch Commit start...
S0 S3M_S3MFW_CFR_SVN_N0_S3M_TREG_REG : 00000000
S0 S3M_S3MFW_REVID_N0_S3M_TREG_REG : 00000000
Socket 0 can't commit, skip
S1 S3M_S3MFW_CFR_SVN_N0_S3M_TREG_REG : 00000000
S1 S3M_S3MFW_REVID_N0_S3M_TREG_REG : 00000000
Socket 1 can't commit, skip
CFR Patch Provision/Commit Completed.
IIO Early Post Link Training Starting...
[0.1 p1] 00:15:01.0: Link Down!
[0.2 p9] 00:26:01.0: Link Down!
[0.3 p17] 00:37:01.0: Link Down!
[0.4 p25] 00:48:01.0: Link Down!
[0.4 p27] 00:48:03.0: Link Down!
[0.4 p29] 00:48:05.0: Link Down!
[0.4 p31] 00:48:07.0: Link Down!
[0.5 p33] 00:59:01.0: Link Down!
[0.5 p35] 00:59:03.0: Link Down!
[0.5 p37] 00:59:05.0: Link Down!
[0.5 p39] 00:59:07.0: Link Down!
[1.1 p1] 00:97:01.0: Link Down!
[1.2 p9] 00:A7:01.0: Link Down!
[1.3 p17] 00:B7:01.0: Link Down!
[1.4 p25] 00:C7:01.0: Link Down!
[1.4 p27] 00:C7:03.0: Link Down!
[1.4 p29] 00:C7:05.0: Link Down!
[1.4 p31] 00:C7:07.0: Link Down!
[1.5 p33] 00:D7:01.0: Link Down!
[1.5 p35] 00:D7:03.0: Link Down!
[1.5 p37] 00:D7:05.0: Link Down!
[1.5 p39] 00:D7:07.0: Link Down!
[1.6 p41] 00:80:01.0: Link Down!
[1.6 p45] 00:80:05.0: Link Down!
IioLateInitialization for Socket = 0 Start..
[0] IioEarlyPostLinkTrainingPhase Start
[0 p0] DEVCAP2 7117D6 DEVCTL2 0010 -> 0009 -> 0009
CXL_IO_INIT_START
CXL_IO_INIT_END
FBLP_POST_TRAIN_INIT_START
FBLP_POST_TRAIN_INIT_END
[0.0] VT-d initialization, BAR=957FC000
[0.1] VT-d initialization, BAR=9F7FC000
[0.2] VT-d initialization, BAR=A93FC000
[0.3] VT-d initialization, BAR=B2FFC000
[0.4] VT-d initialization, BAR=BCBFC000
[0.5] VT-d initialization, BAR=C67FC000
[0.8] VT-d initialization, BAR=C6FFC000
[0.9] VT-d initialization, BAR=C77FC000
[0.10] VT-d initialization, BAR=C7FFC000
[0.11] VT-d initialization, BAR=C87FC000
IIO_PSF_INIT_START
IIO_PSF_INIT_END
[0] Hide devices; Phase = A
IioLateInitialization for Socket = 1 Start..
[1] IioEarlyPostLinkTrainingPhase Start
CXL_IO_INIT_START
CXL_IO_INIT_END
FBLP_POST_TRAIN_INIT_START
FBLP_POST_TRAIN_INIT_END
[1.1] VT-d initialization, BAR=D97FC000
[1.2] VT-d initialization, BAR=E17FC000
[1.3] VT-d initialization, BAR=E97FC000
[1.4] VT-d initialization, BAR=F17FC000
[1.5] VT-d initialization, BAR=F97FC000
[1.6] VT-d initialization, BAR=D13FC000
[1.8] VT-d initialization, BAR=F9FFC000
[1.9] VT-d initialization, BAR=FA7FC000
[1.10] VT-d initialization, BAR=FAFFC000
[1.11] VT-d initialization, BAR=FB7FC000
IIO_PSF_INIT_START
IIO_PSF_INIT_END
[1] Hide devices; Phase = A
[0.1 p1] 00:15:01.0: Device is not present!
[0.2 p9] 00:26:01.0: Device is not present!
[0.3 p17] 00:37:01.0: Device is not present!
[0.4 p25] 00:48:01.0: Device is not present!
[0.4 p27] 00:48:03.0: Device is not present!
[0.4 p29] 00:48:05.0: Device is not present!
[0.4 p31] 00:48:07.0: Device is not present!
[0.5 p33] 00:59:01.0: Device is not present!
[0.5 p35] 00:59:03.0: Device is not present!
[0.5 p37] 00:59:05.0: Device is not present!
[0.5 p39] 00:59:07.0: Device is not present!
[1.1 p1] 00:97:01.0: Device is not present!
[1.2 p9] 00:A7:01.0: Device is not present!
[1.3 p17] 00:B7:01.0: Device is not present!
[1.4 p25] 00:C7:01.0: Device is not present!
[1.4 p27] 00:C7:03.0: Device is not present!
[1.4 p29] 00:C7:05.0: Device is not present!
[1.4 p31] 00:C7:07.0: Device is not present!
[1.5 p33] 00:D7:01.0: Device is not present!
[1.5 p35] 00:D7:03.0: Device is not present!
[1.5 p37] 00:D7:05.0: Device is not present!
[1.5 p39] 00:D7:07.0: Device is not present!
[1.6 p41] 00:80:01.0: Device is not present!
[1.6 p45] 00:80:05.0: Device is not present!
[IIO](VMD) VMD init registered on endOfPei.
IIO Early Post Link Training Completed!
InstallEfiMemory()
GetMemoryMap: TsegBase: 78000000
GetMemoryMap: TsegRange: 08000000
RequiredMemSize for ACPI = 0xE44000 bytes
Found 0x00000000000A0000 bytes at 0x0000000000000000
Found 0x0000000000060000 bytes at 0x00000000000A0000
Found 0x0000000077700000 bytes at 0x0000000000100000
Found 0x0000000008000000 bytes at 0x0000000078000000
Found 0x0000000000800000 bytes at 0x0000000077800000
Save MemoryMap data into Hob
Building RESOURCE_SYSTEM_MEMORY Hob:
PeiMemoryBaseAddress = 0x629D0000, PeiMemoryLength = 0x14E30000
TOHM:0x0000004080000000
Reset Requested: 0
Pipe Exit starting...
S[01] Waiting on...
S[00] SBSP...
S[01] Waiting on...
Skt1 NEM Tear Down @ 769BB000
Pipe Exit completed! Reset Requested: 0
Enhanced Warning Log:
Checking for Reset Requests...
ResetRequired: 00
ConfigurePsmi () - Trace region size is 0 for all cache types; Socket: 0
ConfigurePsmi () - Trace region size is 0 for all cache types; Socket: 1
None
Continue with system BIOS POST ...
PROGRESS CODE: V03020003 I0
[HECI Transport-1 PEI] Send pkt: 80010020
00: 01
[HECI Transport-1 PEI] Got pkt: 800B0020
00: 81 01 01 14 00 88 00 01 - 00 00 00
[HECI Transport-1 PEI] Send pkt: 80300008
00: 00 00 05 00 1A 00 00 00 - 00 00 00 00 1C 00 00 00
10: 00 00 00 00 00 00 00 00 - 00 00 00 00 00 00 00 00
20: 00 00 00 00 00 00 00 00 - 00 00 00 00 00 00 00 00
[HECI Transport-1 PEI] Got pkt: 80300008
00: 00 00 05 00 1A 00 00 00 - 00 00 00 00 1C 00 00 00
10: 00 00 00 00 00 00 00 02 - 00 00 00 00 00 00 00 00
20: 00 00 00 00 00 00 00 00 - 00 00 00 00 00 00 00 00
Fail to Configure PSYS_CRIT
[HECI Transport-1 PEI] Send pkt: 80140007
00: F2 02 00 00 00 00 00 00 - 00 00 00 00 00 00 00 00
10: 0C 00 00 00
[HECI Transport-1 PEI] Got pkt: 80240007
00: F2 82 00 00 00 00 00 00 - 50 16 00 00 00 00 00 00
10: 0C 00 00 00 00 00 00 02 - 6D 32 FF FF FF FF 6E 11
20: 00 00 08 00
DDR PPR data hub created! Number of entries = 0
HBM PPR data hub created! Number of entries = 0
-> LIB data: Initialize
-> IBB Block Start, Status 0x80000007
IioVmdDisableForPchRpInit: DonePCH Series : EBG PCH
PCH Stepping : B0
[HECI Transport-1 PEI] Send pkt: 80010020
00: 01
[HECI Transport-1 PEI] Got pkt: 800B0020
00: 81 01 01 14 00 88 00 01 - 00 00 00
[HECI Transport-1 PEI] Send pkt: 80300008
00: 00 00 05 00 1A 00 00 00 - 00 00 00 00 1C 00 00 00
10: 00 00 00 00 00 00 00 00 - 00 00 00 00 00 00 00 00
20: 00 00 00 00 00 00 00 00 - 00 00 00 00 00 00 00 00
[HECI Transport-1 PEI] Got pkt: 80300008
00: 00 00 05 00 1A 00 00 00 - 00 00 00 00 1C 00 00 00
10: 00 00 00 00 00 00 00 02 - 00 00 00 00 00 00 00 00
20: 00 00 00 00 00 00 00 00 - 00 00 00 00 00 00 00 00
Fail to Configure PSYS_CRIT
[HECI Transport-1 PEI] Send pkt: 80010020
00: 01
[HECI Transport-1 PEI] Got pkt: 800B0020
00: 81 01 01 14 00 88 00 01 - 00 00 00
[HECI Transport-1 PEI] Send pkt: 80300008
00: 00 00 05 00 1A 00 00 00 - 00 00 00 00 1C 00 00 00
10: 00 00 00 00 00 00 00 00 - 00 00 00 00 00 00 00 00
20: 00 00 00 00 00 00 00 00 - 00 00 00 00 00 00 00 00
[HECI Transport-1 PEI] Got pkt: 80300008
00: 00 00 05 00 1A 00 00 00 - 00 00 00 00 1C 00 00 00
10: 00 00 00 00 00 00 00 02 - 00 00 00 00 00 00 00 00
20: 00 00 00 00 00 00 00 00 - 00 00 00 00 00 00 00 00
Fail to Configure PSYS_CRIT
[HECI Transport-1 PEI] Send pkt: 80140007
00: F2 02 00 00 00 00 00 00 - 00 00 00 00 00 00 00 00
10: 0C 00 00 00
[HECI Transport-1 PEI] Got pkt: 80240007
00: F2 82 00 00 00 00 00 00 - 50 16 00 00 00 00 00 00
10: 0C 00 00 00 00 00 00 02 - 6D 32 FF FF FF FF 6E 11
20: 00 00 08 00
PROGRESS CODE: V03020002 I0
PROGRESS CODE: V03020003 I0
PROGRESS CODE: V03020002 I0
PROGRESS CODE: V03020003 I0
PROGRESS CODE: V03020002 I0
PROGRESS CODE: V03020003 I0
PROGRESS CODE: V03020002 I0
PROGRESS CODE: V03020003 I0
-> LIB data: Already initialized
-> IBB Block End, Status 0x80000007
-> LIB data: Already initialized
-> OBB Block Start, Status 0x80000007
PROGRESS CODE: V03020002 I0
Common PPM policy update, PackageCState:3
PROGRESS CODE: V03020003 I0
PROGRESS CODE: V03020002 I0
PROGRESS CODE: V03020003 I0
PROGRESS CODE: V03020002 I0
PROGRESS CODE: V03020003 I0
PROGRESS CODE: V03020002 I0
PROGRESS CODE: V03020003 I0
PROGRESS CODE: V03020002 I0
PROGRESS CODE: V03020003 I0
PROGRESS CODE: V03020002 I0
[HECI Transport-1 PEI] Send pkt: 80280007
00: FF 03 00 00 02 00 00 00 - 00 00 18 6A 01 00 18 E7
10: 00 00 00 00 00 00 00 00 - 00 00 00 00 00 00 00 00
20: 00 00 00 00 00 00 00 00
[HECI Transport-1 PEI] Got pkt: 80040007
00: FF 83 00 00
PROGRESS CODE: V03020003 I0
PROGRESS CODE: V03020002 I0
PROGRESS CODE: V03020003 I0
PROGRESS CODE: V03020002 I0
PROGRESS CODE: V03020003 I0
PROGRESS CODE: V03020002 I0
PROGRESS CODE: V03020003 I0
PROGRESS CODE: V03020002 I0
!!! Invalid IIO LLC WAYS Bit Mask: 0x00000000
In CryptParallelhash
Return in function 2
ParallelHash256HashAll1(): Calculate code parallel hash failed!
Performance test = 10612644
In CryptParallelhash
Return in function 5
Dump data from 62CC1880, size: 0x3
62CC1880: 01 01 01 | ...
Dump data from 62CC1880, size: 0x3
62CC1880: 01 01 01 | ...
Return in function 6,retrunvalue=1
Dump data from 62ACF888, size: 0x40
62ACF888: CD F1 52 89 B5 4F 62 12 B4 BC 27 05 28 B4 95 26 | ..R..Ob...'.(..&
62ACF898: 00 6D D9 B5 4E 2B 6A DD 1E F6 90 0D DA 39 63 BB | .m..N+j......9c.
62ACF8A8: 33 A7 24 91 F2 36 96 9C A8 AF AE A2 9C 68 2D 47 | 3.$..6.......h-G
62ACF8B8: A3 93 C0 65 B3 8E 29 FA E6 51 A2 09 1C 83 31 10 | ...e..)..Q....1.
Accuracy test = 0
PROGRESS CODE: V03020003 I0
PROGRESS CODE: V03020002 I0
PROGRESS CODE: V03020003 I0
PROGRESS CODE: V03020002 I0
PROGRESS CODE: V03020003 I0
PROGRESS CODE: V03020002 I0
PROGRESS CODE: V03020003 I0
PROGRESS CODE: V03020002 I0
[MP_DISPATCH] MpDispatch4v0_CommonConstructor BEGIN
[MP_DISPATCH] MpDispatch4v0_CommonConstructor END (Success)
[FRU_MKTME] FruCpuFeatureMkTme3v0EntryPoint BEGIN
[FRU_MKTME] FruCpuFeatureMkTme3v0EntryPoint END (Success)
[FRU_SGX] FruCpuFeatureSgx3v0EntryPoint BEGIN
[FRU_SGX] FruCpuFeatureSgx3v0EntryPoint END (Success)
PROGRESS CODE: V03020003 I0
PROGRESS CODE: V03020002 I0
[APP_ADAPTER] AppAdapterMkTme3v0EntryPoint BEGIN
[APP_ADAPTER] AppAdapterMkTme3v0EntryPoint END (Success)
PROGRESS CODE: V03020003 I0
PROGRESS CODE: V03020002 I0
PROGRESS CODE: V03020003 I0
PROGRESS CODE: V03020002 I0
PROGRESS CODE: V03020003 I0
PROGRESS CODE: V03020002 I0
[SGX] SgxEarlyInit entry
IsSgxCapable = 1 Status = Success
IsSgxRequested = 0 Status = Success
IsTdxCapable = 0 Status = Success
IsTdxRequested = 0 Status = Success
IsTdxActivated = 0 Status = Success
SgxMpServicesData()
Thread 0 is BSP of Socket 0
Thread 80 is BSP of Socket 1
System BSP Thread = 000
System BSP Package = 000
[SGX_VAR_MANIFEST] HobSize: 8512, Hash:
[12] [56] [ED] [9C] [D5] [9D] [C8] [1A] [E0] [44] [25] [30] [1B] [26] [71] [76] [DB] [8B] [BF] [5C] [29] [96] [F3] [A2] [58] [29] [7F] [97] [42] [AF] [E0] [C0]
[SGX-DEBUG] GetVariableHelper: VariableName: (SgxRegistrationState), VendorGuid: (2C65F1A3), DataSize: (64), Data: (F)
GetVariable - SgxRegistrationState not found, continue
UefiFwRegistrationState not found in NVRAM!
GetRegistrationVariablesFromNvram Enter
[SGX-DEBUG] GetVariableHelper: VariableName: (SgxRegistrationConfiguration), VendorGuid: (18B3BC81), DataSize: (1520), Data: (F)
GetVariable - SgxRegistrationConfiguration not found, continue
[SGX-DEBUG] GetVariableHelper: VariableName: (SgxUefiRegistrationConfiguration), VendorGuid: (8D4CA9E8), DataSize: (1520), Data: (F)
GetVariable - SgxUefiRegistrationConfiguration not found, continue
[SGX-DEBUG]: Get SgxRegistrationStatus
[SGX-DEBUG] GetVariableHelper: VariableName: (SgxRegistrationStatus), VendorGuid: (F236C5DC), DataSize: (7), Data: (F)
GetVariable - SgxRegistrationStatus not found, continue
[SGX-DEBUG]: Get SgxUefiRegistrationStatus
[SGX-DEBUG] GetVariableHelper: VariableName: (SgxUefiRegistrationStatus), VendorGuid: (CF24D5E9), DataSize: (7), Data: (F)
GetVariable - SgxUefiRegistrationStatus not found, continue
[SGX-DEBUG] Early PrintByteArrays SgxRegistrationStatus:
[00] [00] [00] [00] [00] [00] [00]
[SGX-DEBUG] GetVariableHelper: VariableName: (SgxRegistrationServerResponse), VendorGuid: (89589C7B), DataSize: (10060), Data: (F)
GetVariable - SgxRegistrationServerResponse not found, continue
[SGX-DEBUG] GetVariableHelper: VariableName: (SgxUefiRegistrationServerResponse), VendorGuid: (35D93155), DataSize: (10060), Data: (F)
GetVariable - SgxUefiRegistrationServerResponse not found, continue
RegistrationVariables presence:
RegistrationConfig = 0
RegistrationStatus = 0
RegistrationResponse = 0
[SGX] RestoreKeyBlobsInternalSgxInitDataHobFieldsFromNvram BEGIN
[SGX] RestoreUefiFwKeyBlobsVariable BEGIN
[SGX-DEBUG] GetVariableHelper: VariableName: (SgxKeyBlobs), VendorGuid: (60F76511), DataSize: (14720), Data: (F)
GetVariable - SgxKeyBlobs not found, continue
Error: Unable to get SgxUefiFwKeyBlobs
[SGX] RestoreUefiFwKeyBlobsVariable END
KeyBlobs were NOT restored from SgxUefiFwKeyBlobs!
KeyBlobs were NOT restored from SgxRegistrationPackageInfo contents due to PackageInfoInBandAccess = FALSE!
KeyBlobsExistInNvram = (FALSE)
[SGX] RestoreKeyBlobsInternalSgxInitDataHobFieldsFromNvram END
KeyBlobs were not found in NVRAM. Continue boot...
[SGX-KEYBLOB-PEI-REST] KeyBlob for socket no 0
Present: FALSE
TimeStamp: 0-0-0, 0:0:0:0, Pad1: 0, Pad2: 0, TimeZone: 0, Daylight: 0
KeyBlob:
Header:
SGX UUID:
[00] [00] [00] [00] [00] [00] [00] [00] [00] [00] [00] [00] [00] [00] [00] [00]
CpuSvn:
[00]
Security Properties:
[00] [00] [00] [00]
Prid:
[00] [00] [00] [00] [00] [00] [00] [00] [00] [00] [00] [00] [00] [00] [00] [00]
PlatformEpoch:
[00] [00] [00] [00] [00] [00] [00] [00] [00] [00] [00] [00] [00] [00] [00] [00] [00] [00] [00] [00] [00] [00] [00] [00] [00] [00] [00] [00] [00] [00] [00] [00]
RsakHash:
[00] [00] [00] [00] [00] [00] [00] [00] [00] [00] [00] [00] [00] [00] [00] [00] [00] [00] [00] [00] [00] [00] [00] [00] [00] [00] [00] [00] [00] [00] [00] [00]
RsakHash:
[00] [00] [00] [00] [00] [00] [00] [00] [00] [00] [00] [00] [00] [00] [00] [00] [00] [00] [00] [00] [00] [00] [00] [00] [00] [00] [00] [00] [00] [00] [00] [00]
Pfk1:
[00] [00] [00] [00] [00] [00] [00] [00] [00] [00] [00] [00] [00] [00] [00] [00]
PprResetKey:
[00] [00] [00] [00]
[00] [00] [00] [00]
[00] [00] [00] [00]
[00] [00] [00] [00]
[00] [00] [00] [00]
[00] [00] [00] [00]
[00] [00] [00] [00]
[00] [00] [00] [00]
[00] [00] [00] [00]
[00] [00] [00] [00]
[00] [00] [00] [00]
[00] [00] [00] [00]
[00] [00] [00] [00]
[00] [00] [00] [00]
[00] [00] [00] [00]
[00] [00] [00] [00]
[00] [00] [00] [00]
[00] [00] [00] [00]
[00] [00] [00] [00]
[00] [00] [00] [00]
[00] [00] [00] [00]
[00] [00] [00] [00]
[00] [00] [00] [00]
[00] [00] [00] [00]
[00] [00] [00] [00]
[00] [00] [00] [00]
[00] [00] [00] [00]
[00] [00] [00] [00]
[00] [00] [00] [00]
[00] [00] [00] [00]
[00] [00] [00] [00]
[00] [00] [00] [00]
LastUsedSvn:
[00]
Reserved2:
[00] [00] [00] [00] [00] [00] [00] [00] [00] [00] [00] [00] [00] [00] [00]
TargetPrid:
[00] [00] [00] [00] [00] [00] [00] [00] [00] [00] [00] [00] [00] [00] [00] [00]
PrimaryComms:
[00] [00] [00] [00] [00] [00] [00] [00] [00] [00] [00] [00] [00] [00] [00] [00]
Iv:
[00] [00] [00] [00] [00] [00] [00] [00] [00] [00] [00] [00]
[00] [00] [00] [00] [00] [00] [00] [00] [00] [00] [00] [00]
[00] [00] [00] [00] [00] [00] [00] [00] [00] [00] [00] [00]
[00] [00] [00] [00] [00] [00] [00] [00] [00] [00] [00] [00]
[00] [00] [00] [00] [00] [00] [00] [00] [00] [00] [00] [00]
[00] [00] [00] [00] [00] [00] [00] [00] [00] [00] [00] [00]
[00] [00] [00] [00] [00] [00] [00] [00] [00] [00] [00] [00]
[00] [00] [00] [00] [00] [00] [00] [00] [00] [00] [00] [00]
[00] [00] [00] [00] [00] [00] [00] [00] [00] [00] [00] [00]
[00] [00] [00] [00] [00] [00] [00] [00] [00] [00] [00] [00]
[00] [00] [00] [00] [00] [00] [00] [00] [00] [00] [00] [00]
[00] [00] [00] [00] [00] [00] [00] [00] [00] [00] [00] [00]
[00] [00] [00] [00] [00] [00] [00] [00] [00] [00] [00] [00]
[00] [00] [00] [00] [00] [00] [00] [00] [00] [00] [00] [00]
[00] [00] [00] [00] [00] [00] [00] [00] [00] [00] [00] [00]
[00] [00] [00] [00] [00] [00] [00] [00] [00] [00] [00] [00]
[00] [00] [00] [00] [00] [00] [00] [00] [00] [00] [00] [00]
[00] [00] [00] [00] [00] [00] [00] [00] [00] [00] [00] [00]
[00] [00] [00] [00] [00] [00] [00] [00] [00] [00] [00] [00]
[00] [00] [00] [00] [00] [00] [00] [00] [00] [00] [00] [00]
[00] [00] [00] [00] [00] [00] [00] [00] [00] [00] [00] [00]
[00] [00] [00] [00] [00] [00] [00] [00] [00] [00] [00] [00]
[00] [00] [00] [00] [00] [00] [00] [00] [00] [00] [00] [00]
[00] [00] [00] [00] [00] [00] [00] [00] [00] [00] [00] [00]
[00] [00] [00] [00] [00] [00] [00] [00] [00] [00] [00] [00]
[00] [00] [00] [00] [00] [00] [00] [00] [00] [00] [00] [00]
[00] [00] [00] [00] [00] [00] [00] [00] [00] [00] [00] [00]
[00] [00] [00] [00] [00] [00] [00] [00] [00] [00] [00] [00]
[00] [00] [00] [00] [00] [00] [00] [00] [00] [00] [00] [00]
[00] [00] [00] [00] [00] [00] [00] [00] [00] [00] [00] [00]
[00] [00] [00] [00] [00] [00] [00] [00] [00] [00] [00] [00]
[00] [00] [00] [00] [00] [00] [00] [00] [00] [00] [00] [00]
Mac:
[00] [00] [00] [00] [00] [00] [00] [00] [00] [00] [00] [00] [00] [00] [00] [00]
[00] [00] [00] [00] [00] [00] [00] [00] [00] [00] [00] [00] [00] [00] [00] [00]
[00] [00] [00] [00] [00] [00] [00] [00] [00] [00] [00] [00] [00] [00] [00] [00]
[00] [00] [00] [00] [00] [00] [00] [00] [00] [00] [00] [00] [00] [00] [00] [00]
[00] [00] [00] [00] [00] [00] [00] [00] [00] [00] [00] [00] [00] [00] [00] [00]
[00] [00] [00] [00] [00] [00] [00] [00] [00] [00] [00] [00] [00] [00] [00] [00]
[00] [00] [00] [00] [00] [00] [00] [00] [00] [00] [00] [00] [00] [00] [00] [00]
[00] [00] [00] [00] [00] [00] [00] [00] [00] [00] [00] [00] [00] [00] [00] [00]
[00] [00] [00] [00] [00] [00] [00] [00] [00] [00] [00] [00] [00] [00] [00] [00]
[00] [00] [00] [00] [00] [00] [00] [00] [00] [00] [00] [00] [00] [00] [00] [00]
[00] [00] [00] [00] [00] [00] [00] [00] [00] [00] [00] [00] [00] [00] [00] [00]
[00] [00] [00] [00] [00] [00] [00] [00] [00] [00] [00] [00] [00] [00] [00] [00]
[00] [00] [00] [00] [00] [00] [00] [00] [00] [00] [00] [00] [00] [00] [00] [00]
[00] [00] [00] [00] [00] [00] [00] [00] [00] [00] [00] [00] [00] [00] [00] [00]
[00] [00] [00] [00] [00] [00] [00] [00] [00] [00] [00] [00] [00] [00] [00] [00]
[00] [00] [00] [00] [00] [00] [00] [00] [00] [00] [00] [00] [00] [00] [00] [00]
[00] [00] [00] [00] [00] [00] [00] [00] [00] [00] [00] [00] [00] [00] [00] [00]
[00] [00] [00] [00] [00] [00] [00] [00] [00] [00] [00] [00] [00] [00] [00] [00]
[00] [00] [00] [00] [00] [00] [00] [00] [00] [00] [00] [00] [00] [00] [00] [00]
[00] [00] [00] [00] [00] [00] [00] [00] [00] [00] [00] [00] [00] [00] [00] [00]
[00] [00] [00] [00] [00] [00] [00] [00] [00] [00] [00] [00] [00] [00] [00] [00]
[00] [00] [00] [00] [00] [00] [00] [00] [00] [00] [00] [00] [00] [00] [00] [00]
[00] [00] [00] [00] [00] [00] [00] [00] [00] [00] [00] [00] [00] [00] [00] [00]
[00] [00] [00] [00] [00] [00] [00] [00] [00] [00] [00] [00] [00] [00] [00] [00]
[00] [00] [00] [00] [00] [00] [00] [00] [00] [00] [00] [00] [00] [00] [00] [00]
[00] [00] [00] [00] [00] [00] [00] [00] [00] [00] [00] [00] [00] [00] [00] [00]
[00] [00] [00] [00] [00] [00] [00] [00] [00] [00] [00] [00] [00] [00] [00] [00]
[00] [00] [00] [00] [00] [00] [00] [00] [00] [00] [00] [00] [00] [00] [00] [00]
[00] [00] [00] [00] [00] [00] [00] [00] [00] [00] [00] [00] [00] [00] [00] [00]
[00] [00] [00] [00] [00] [00] [00] [00] [00] [00] [00] [00] [00] [00] [00] [00]
[00] [00] [00] [00] [00] [00] [00] [00] [00] [00] [00] [00] [00] [00] [00] [00]
[00] [00] [00] [00] [00] [00] [00] [00] [00] [00] [00] [00] [00] [00] [00] [00]
IvComm:
[00] [00] [00] [00] [00] [00] [00] [00] [00] [00] [00] [00]
MacComm:
[00] [00] [00] [00] [00] [00] [00] [00] [00] [00] [00] [00] [00] [00] [00] [00]
[SGX-KEYBLOB-PEI-REST] KeyBlob for socket no 1
Present: FALSE
TimeStamp: 0-0-0, 0:0:0:0, Pad1: 0, Pad2: 0, TimeZone: 0, Daylight: 0
KeyBlob:
Header:
SGX UUID:
[00] [00] [00] [00] [00] [00] [00] [00] [00] [00] [00] [00] [00] [00] [00] [00]
CpuSvn:
[00]
Security Properties:
[00] [00] [00] [00]
Prid:
[00] [00] [00] [00] [00] [00] [00] [00] [00] [00] [00] [00] [00] [00] [00] [00]
PlatformEpoch:
[00] [00] [00] [00] [00] [00] [00] [00] [00] [00] [00] [00] [00] [00] [00] [00] [00] [00] [00] [00] [00] [00] [00] [00] [00] [00] [00] [00] [00] [00] [00] [00]
RsakHash:
[00] [00] [00] [00] [00] [00] [00] [00] [00] [00] [00] [00] [00] [00] [00] [00] [00] [00] [00] [00] [00] [00] [00] [00] [00] [00] [00] [00] [00] [00] [00] [00]
RsakHash:
[00] [00] [00] [00] [00] [00] [00] [00] [00] [00] [00] [00] [00] [00] [00] [00] [00] [00] [00] [00] [00] [00] [00] [00] [00] [00] [00] [00] [00] [00] [00] [00]
Pfk1:
[00] [00] [00] [00] [00] [00] [00] [00] [00] [00] [00] [00] [00] [00] [00] [00]
PprResetKey:
[00] [00] [00] [00]
[00] [00] [00] [00]
[00] [00] [00] [00]
[00] [00] [00] [00]
[00] [00] [00] [00]
[00] [00] [00] [00]
[00] [00] [00] [00]
[00] [00] [00] [00]
[00] [00] [00] [00]
[00] [00] [00] [00]
[00] [00] [00] [00]
[00] [00] [00] [00]
[00] [00] [00] [00]
[00] [00] [00] [00]
[00] [00] [00] [00]
[00] [00] [00] [00]
[00] [00] [00] [00]
[00] [00] [00] [00]
[00] [00] [00] [00]
[00] [00] [00] [00]
[00] [00] [00] [00]
[00] [00] [00] [00]
[00] [00] [00] [00]
[00] [00] [00] [00]
[00] [00] [00] [00]
[00] [00] [00] [00]
[00] [00] [00] [00]
[00] [00] [00] [00]
[00] [00] [00] [00]
[00] [00] [00] [00]
[00] [00] [00] [00]
[00] [00] [00] [00]
LastUsedSvn:
[00]
Reserved2:
[00] [00] [00] [00] [00] [00] [00] [00] [00] [00] [00] [00] [00] [00] [00]
TargetPrid:
[00] [00] [00] [00] [00] [00] [00] [00] [00] [00] [00] [00] [00] [00] [00] [00]
PrimaryComms:
[00] [00] [00] [00] [00] [00] [00] [00] [00] [00] [00] [00] [00] [00] [00] [00]
Iv:
[00] [00] [00] [00] [00] [00] [00] [00] [00] [00] [00] [00]
[00] [00] [00] [00] [00] [00] [00] [00] [00] [00] [00] [00]
[00] [00] [00] [00] [00] [00] [00] [00] [00] [00] [00] [00]
[00] [00] [00] [00] [00] [00] [00] [00] [00] [00] [00] [00]
[00] [00] [00] [00] [00] [00] [00] [00] [00] [00] [00] [00]
[00] [00] [00] [00] [00] [00] [00] [00] [00] [00] [00] [00]
[00] [00] [00] [00] [00] [00] [00] [00] [00] [00] [00] [00]
[00] [00] [00] [00] [00] [00] [00] [00] [00] [00] [00] [00]
[00] [00] [00] [00] [00] [00] [00] [00] [00] [00] [00] [00]
[00] [00] [00] [00] [00] [00] [00] [00] [00] [00] [00] [00]
[00] [00] [00] [00] [00] [00] [00] [00] [00] [00] [00] [00]
[00] [00] [00] [00] [00] [00] [00] [00] [00] [00] [00] [00]
[00] [00] [00] [00] [00] [00] [00] [00] [00] [00] [00] [00]
[00] [00] [00] [00] [00] [00] [00] [00] [00] [00] [00] [00]
[00] [00] [00] [00] [00] [00] [00] [00] [00] [00] [00] [00]
[00] [00] [00] [00] [00] [00] [00] [00] [00] [00] [00] [00]
[00] [00] [00] [00] [00] [00] [00] [00] [00] [00] [00] [00]
[00] [00] [00] [00] [00] [00] [00] [00] [00] [00] [00] [00]
[00] [00] [00] [00] [00] [00] [00] [00] [00] [00] [00] [00]
[00] [00] [00] [00] [00] [00] [00] [00] [00] [00] [00] [00]
[00] [00] [00] [00] [00] [00] [00] [00] [00] [00] [00] [00]
[00] [00] [00] [00] [00] [00] [00] [00] [00] [00] [00] [00]
[00] [00] [00] [00] [00] [00] [00] [00] [00] [00] [00] [00]
[00] [00] [00] [00] [00] [00] [00] [00] [00] [00] [00] [00]
[00] [00] [00] [00] [00] [00] [00] [00] [00] [00] [00] [00]
[00] [00] [00] [00] [00] [00] [00] [00] [00] [00] [00] [00]
[00] [00] [00] [00] [00] [00] [00] [00] [00] [00] [00] [00]
[00] [00] [00] [00] [00] [00] [00] [00] [00] [00] [00] [00]
[00] [00] [00] [00] [00] [00] [00] [00] [00] [00] [00] [00]
[00] [00] [00] [00] [00] [00] [00] [00] [00] [00] [00] [00]
[00] [00] [00] [00] [00] [00] [00] [00] [00] [00] [00] [00]
[00] [00] [00] [00] [00] [00] [00] [00] [00] [00] [00] [00]
Mac:
[00] [00] [00] [00] [00] [00] [00] [00] [00] [00] [00] [00] [00] [00] [00] [00]
[00] [00] [00] [00] [00] [00] [00] [00] [00] [00] [00] [00] [00] [00] [00] [00]
[00] [00] [00] [00] [00] [00] [00] [00] [00] [00] [00] [00] [00] [00] [00] [00]
[00] [00] [00] [00] [00] [00] [00] [00] [00] [00] [00] [00] [00] [00] [00] [00]
[00] [00] [00] [00] [00] [00] [00] [00] [00] [00] [00] [00] [00] [00] [00] [00]
[00] [00] [00] [00] [00] [00] [00] [00] [00] [00] [00] [00] [00] [00] [00] [00]
[00] [00] [00] [00] [00] [00] [00] [00] [00] [00] [00] [00] [00] [00] [00] [00]
[00] [00] [00] [00] [00] [00] [00] [00] [00] [00] [00] [00] [00] [00] [00] [00]
[00] [00] [00] [00] [00] [00] [00] [00] [00] [00] [00] [00] [00] [00] [00] [00]
[00] [00] [00] [00] [00] [00] [00] [00] [00] [00] [00] [00] [00] [00] [00] [00]
[00] [00] [00] [00] [00] [00] [00] [00] [00] [00] [00] [00] [00] [00] [00] [00]
[00] [00] [00] [00] [00] [00] [00] [00] [00] [00] [00] [00] [00] [00] [00] [00]
[00] [00] [00] [00] [00] [00] [00] [00] [00] [00] [00] [00] [00] [00] [00] [00]
[00] [00] [00] [00] [00] [00] [00] [00] [00] [00] [00] [00] [00] [00] [00] [00]
[00] [00] [00] [00] [00] [00] [00] [00] [00] [00] [00] [00] [00] [00] [00] [00]
[00] [00] [00] [00] [00] [00] [00] [00] [00] [00] [00] [00] [00] [00] [00] [00]
[00] [00] [00] [00] [00] [00] [00] [00] [00] [00] [00] [00] [00] [00] [00] [00]
[00] [00] [00] [00] [00] [00] [00] [00] [00] [00] [00] [00] [00] [00] [00] [00]
[00] [00] [00] [00] [00] [00] [00] [00] [00] [00] [00] [00] [00] [00] [00] [00]
[00] [00] [00] [00] [00] [00] [00] [00] [00] [00] [00] [00] [00] [00] [00] [00]
[00] [00] [00] [00] [00] [00] [00] [00] [00] [00] [00] [00] [00] [00] [00] [00]
[00] [00] [00] [00] [00] [00] [00] [00] [00] [00] [00] [00] [00] [00] [00] [00]
[00] [00] [00] [00] [00] [00] [00] [00] [00] [00] [00] [00] [00] [00] [00] [00]
[00] [00] [00] [00] [00] [00] [00] [00] [00] [00] [00] [00] [00] [00] [00] [00]
[00] [00] [00] [00] [00] [00] [00] [00] [00] [00] [00] [00] [00] [00] [00] [00]
[00] [00] [00] [00] [00] [00] [00] [00] [00] [00] [00] [00] [00] [00] [00] [00]
[00] [00] [00] [00] [00] [00] [00] [00] [00] [00] [00] [00] [00] [00] [00] [00]
[00] [00] [00] [00] [00] [00] [00] [00] [00] [00] [00] [00] [00] [00] [00] [00]
[00] [00] [00] [00] [00] [00] [00] [00] [00] [00] [00] [00] [00] [00] [00] [00]
[00] [00] [00] [00] [00] [00] [00] [00] [00] [00] [00] [00] [00] [00] [00] [00]
[00] [00] [00] [00] [00] [00] [00] [00] [00] [00] [00] [00] [00] [00] [00] [00]
[00] [00] [00] [00] [00] [00] [00] [00] [00] [00] [00] [00] [00] [00] [00] [00]
IvComm:
[00] [00] [00] [00] [00] [00] [00] [00] [00] [00] [00] [00]
MacComm:
[00] [00] [00] [00] [00] [00] [00] [00] [00] [00] [00] [00] [00] [00] [00] [00]
[SGX-KEYBLOB-PEI-REST] KeyBlob for socket no 2
Present: FALSE
TimeStamp: 0-0-0, 0:0:0:0, Pad1: 0, Pad2: 0, TimeZone: 0, Daylight: 0
KeyBlob:
Header:
SGX UUID:
[00] [00] [00] [00] [00] [00] [00] [00] [00] [00] [00] [00] [00] [00] [00] [00]
CpuSvn:
[00]
Security Properties:
[00] [00] [00] [00]
Prid:
[00] [00] [00] [00] [00] [00] [00] [00] [00] [00] [00] [00] [00] [00] [00] [00]
PlatformEpoch:
[00] [00] [00] [00] [00] [00] [00] [00] [00] [00] [00] [00] [00] [00] [00] [00] [00] [00] [00] [00] [00] [00] [00] [00] [00] [00] [00] [00] [00] [00] [00] [00]
RsakHash:
[00] [00] [00] [00] [00] [00] [00] [00] [00] [00] [00] [00] [00] [00] [00] [00] [00] [00] [00] [00] [00] [00] [00] [00] [00] [00] [00] [00] [00] [00] [00] [00]
RsakHash:
[00] [00] [00] [00] [00] [00] [00] [00] [00] [00] [00] [00] [00] [00] [00] [00] [00] [00] [00] [00] [00] [00] [00] [00] [00] [00] [00] [00] [00] [00] [00] [00]
Pfk1:
[00] [00] [00] [00] [00] [00] [00] [00] [00] [00] [00] [00] [00] [00] [00] [00]
PprResetKey:
[00] [00] [00] [00]
[00] [00] [00] [00]
[00] [00] [00] [00]
[00] [00] [00] [00]
[00] [00] [00] [00]
[00] [00] [00] [00]
[00] [00] [00] [00]
[00] [00] [00] [00]
[00] [00] [00] [00]
[00] [00] [00] [00]
[00] [00] [00] [00]
[00] [00] [00] [00]
[00] [00] [00] [00]
[00] [00] [00] [00]
[00] [00] [00] [00]
[00] [00] [00] [00]
[00] [00] [00] [00]
[00] [00] [00] [00]
[00] [00] [00] [00]
[00] [00] [00] [00]
[00] [00] [00] [00]
[00] [00] [00] [00]
[00] [00] [00] [00]
[00] [00] [00] [00]
[00] [00] [00] [00]
[00] [00] [00] [00]
[00] [00] [00] [00]
[00] [00] [00] [00]
[00] [00] [00] [00]
[00] [00] [00] [00]
[00] [00] [00] [00]
[00] [00] [00] [00]
LastUsedSvn:
[00]
Reserved2:
[00] [00] [00] [00] [00] [00] [00] [00] [00] [00] [00] [00] [00] [00] [00]
TargetPrid:
[00] [00] [00] [00] [00] [00] [00] [00] [00] [00] [00] [00] [00] [00] [00] [00]
PrimaryComms:
[00] [00] [00] [00] [00] [00] [00] [00] [00] [00] [00] [00] [00] [00] [00] [00]
Iv:
[00] [00] [00] [00] [00] [00] [00] [00] [00] [00] [00] [00]
[00] [00] [00] [00] [00] [00] [00] [00] [00] [00] [00] [00]
[00] [00] [00] [00] [00] [00] [00] [00] [00] [00] [00] [00]
[00] [00] [00] [00] [00] [00] [00] [00] [00] [00] [00] [00]
[00] [00] [00] [00] [00] [00] [00] [00] [00] [00] [00] [00]
[00] [00] [00] [00] [00] [00] [00] [00] [00] [00] [00] [00]
[00] [00] [00] [00] [00] [00] [00] [00] [00] [00] [00] [00]
[00] [00] [00] [00] [00] [00] [00] [00] [00] [00] [00] [00]
[00] [00] [00] [00] [00] [00] [00] [00] [00] [00] [00] [00]
[00] [00] [00] [00] [00] [00] [00] [00] [00] [00] [00] [00]
[00] [00] [00] [00] [00] [00] [00] [00] [00] [00] [00] [00]
[00] [00] [00] [00] [00] [00] [00] [00] [00] [00] [00] [00]
[00] [00] [00] [00] [00] [00] [00] [00] [00] [00] [00] [00]
[00] [00] [00] [00] [00] [00] [00] [00] [00] [00] [00] [00]
[00] [00] [00] [00] [00] [00] [00] [00] [00] [00] [00] [00]
[00] [00] [00] [00] [00] [00] [00] [00] [00] [00] [00] [00]
[00] [00] [00] [00] [00] [00] [00] [00] [00] [00] [00] [00]
[00] [00] [00] [00] [00] [00] [00] [00] [00] [00] [00] [00]
[00] [00] [00] [00] [00] [00] [00] [00] [00] [00] [00] [00]
[00] [00] [00] [00] [00] [00] [00] [00] [00] [00] [00] [00]
[00] [00] [00] [00] [00] [00] [00] [00] [00] [00] [00] [00]
[00] [00] [00] [00] [00] [00] [00] [00] [00] [00] [00] [00]
[00] [00] [00] [00] [00] [00] [00] [00] [00] [00] [00] [00]
[00] [00] [00] [00] [00] [00] [00] [00] [00] [00] [00] [00]
[00] [00] [00] [00] [00] [00] [00] [00] [00] [00] [00] [00]
[00] [00] [00] [00] [00] [00] [00] [00] [00] [00] [00] [00]
[00] [00] [00] [00] [00] [00] [00] [00] [00] [00] [00] [00]
[00] [00] [00] [00] [00] [00] [00] [00] [00] [00] [00] [00]
[00] [00] [00] [00] [00] [00] [00] [00] [00] [00] [00] [00]
[00] [00] [00] [00] [00] [00] [00] [00] [00] [00] [00] [00]
[00] [00] [00] [00] [00] [00] [00] [00] [00] [00] [00] [00]
[00] [00] [00] [00] [00] [00] [00] [00] [00] [00] [00] [00]
Mac:
[00] [00] [00] [00] [00] [00] [00] [00] [00] [00] [00] [00] [00] [00] [00] [00]
[00] [00] [00] [00] [00] [00] [00] [00] [00] [00] [00] [00] [00] [00] [00] [00]
[00] [00] [00] [00] [00] [00] [00] [00] [00] [00] [00] [00] [00] [00] [00] [00]
[00] [00] [00] [00] [00] [00] [00] [00] [00] [00] [00] [00] [00] [00] [00] [00]
[00] [00] [00] [00] [00] [00] [00] [00] [00] [00] [00] [00] [00] [00] [00] [00]
[00] [00] [00] [00] [00] [00] [00] [00] [00] [00] [00] [00] [00] [00] [00] [00]
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[00] [00] [00] [00] [00] [00] [00] [00] [00] [00] [00] [00] [00] [00] [00] [00]
[00] [00] [00] [00] [00] [00] [00] [00] [00] [00] [00] [00] [00] [00] [00] [00]
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[00] [00] [00] [00] [00] [00] [00] [00] [00] [00] [00] [00] [00] [00] [00] [00]
[00] [00] [00] [00] [00] [00] [00] [00] [00] [00] [00] [00] [00] [00] [00] [00]
[00] [00] [00] [00] [00] [00] [00] [00] [00] [00] [00] [00] [00] [00] [00] [00]
[00] [00] [00] [00] [00] [00] [00] [00] [00] [00] [00] [00] [00] [00] [00] [00]
[00] [00] [00] [00] [00] [00] [00] [00] [00] [00] [00] [00] [00] [00] [00] [00]
[00] [00] [00] [00] [00] [00] [00] [00] [00] [00] [00] [00] [00] [00] [00] [00]
[00] [00] [00] [00] [00] [00] [00] [00] [00] [00] [00] [00] [00] [00] [00] [00]
[00] [00] [00] [00] [00] [00] [00] [00] [00] [00] [00] [00] [00] [00] [00] [00]
[00] [00] [00] [00] [00] [00] [00] [00] [00] [00] [00] [00] [00] [00] [00] [00]
[00] [00] [00] [00] [00] [00] [00] [00] [00] [00] [00] [00] [00] [00] [00] [00]
[00] [00] [00] [00] [00] [00] [00] [00] [00] [00] [00] [00] [00] [00] [00] [00]
[00] [00] [00] [00] [00] [00] [00] [00] [00] [00] [00] [00] [00] [00] [00] [00]
[00] [00] [00] [00] [00] [00] [00] [00] [00] [00] [00] [00] [00] [00] [00] [00]
[00] [00] [00] [00] [00] [00] [00] [00] [00] [00] [00] [00] [00] [00] [00] [00]
[00] [00] [00] [00] [00] [00] [00] [00] [00] [00] [00] [00] [00] [00] [00] [00]
[00] [00] [00] [00] [00] [00] [00] [00] [00] [00] [00] [00] [00] [00] [00] [00]
[00] [00] [00] [00] [00] [00] [00] [00] [00] [00] [00] [00] [00] [00] [00] [00]
IvComm:
[00] [00] [00] [00] [00] [00] [00] [00] [00] [00] [00] [00]
MacComm:
[00] [00] [00] [00] [00] [00] [00] [00] [00] [00] [00] [00] [00] [00] [00] [00]
[SGX-KEYBLOB-PEI-REST] KeyBlob for socket no 3
Present: FALSE
TimeStamp: 0-0-0, 0:0:0:0, Pad1: 0, Pad2: 0, TimeZone: 0, Daylight: 0
KeyBlob:
Header:
SGX UUID:
[00] [00] [00] [00] [00] [00] [00] [00] [00] [00] [00] [00] [00] [00] [00] [00]
CpuSvn:
[00]
Security Properties:
[00] [00] [00] [00]
Prid:
[00] [00] [00] [00] [00] [00] [00] [00] [00] [00] [00] [00] [00] [00] [00] [00]
PlatformEpoch:
[00] [00] [00] [00] [00] [00] [00] [00] [00] [00] [00] [00] [00] [00] [00] [00] [00] [00] [00] [00] [00] [00] [00] [00] [00] [00] [00] [00] [00] [00] [00] [00]
RsakHash:
[00] [00] [00] [00] [00] [00] [00] [00] [00] [00] [00] [00] [00] [00] [00] [00] [00] [00] [00] [00] [00] [00] [00] [00] [00] [00] [00] [00] [00] [00] [00] [00]
RsakHash:
[00] [00] [00] [00] [00] [00] [00] [00] [00] [00] [00] [00] [00] [00] [00] [00] [00] [00] [00] [00] [00] [00] [00] [00] [00] [00] [00] [00] [00] [00] [00] [00]
Pfk1:
[00] [00] [00] [00] [00] [00] [00] [00] [00] [00] [00] [00] [00] [00] [00] [00]
PprResetKey:
[00] [00] [00] [00]
[00] [00] [00] [00]
[00] [00] [00] [00]
[00] [00] [00] [00]
[00] [00] [00] [00]
[00] [00] [00] [00]
[00] [00] [00] [00]
[00] [00] [00] [00]
[00] [00] [00] [00]
[00] [00] [00] [00]
[00] [00] [00] [00]
[00] [00] [00] [00]
[00] [00] [00] [00]
[00] [00] [00] [00]
[00] [00] [00] [00]
[00] [00] [00] [00]
[00] [00] [00] [00]
[00] [00] [00] [00]
[00] [00] [00] [00]
[00] [00] [00] [00]
[00] [00] [00] [00]
[00] [00] [00] [00]
[00] [00] [00] [00]
[00] [00] [00] [00]
[00] [00] [00] [00]
[00] [00] [00] [00]
[00] [00] [00] [00]
[00] [00] [00] [00]
[00] [00] [00] [00]
[00] [00] [00] [00]
[00] [00] [00] [00]
[00] [00] [00] [00]
LastUsedSvn:
[00]
Reserved2:
[00] [00] [00] [00] [00] [00] [00] [00] [00] [00] [00] [00] [00] [00] [00]
TargetPrid:
[00] [00] [00] [00] [00] [00] [00] [00] [00] [00] [00] [00] [00] [00] [00] [00]
PrimaryComms:
[00] [00] [00] [00] [00] [00] [00] [00] [00] [00] [00] [00] [00] [00] [00] [00]
Iv:
[00] [00] [00] [00] [00] [00] [00] [00] [00] [00] [00] [00]
[00] [00] [00] [00] [00] [00] [00] [00] [00] [00] [00] [00]
[00] [00] [00] [00] [00] [00] [00] [00] [00] [00] [00] [00]
[00] [00] [00] [00] [00] [00] [00] [00] [00] [00] [00] [00]
[00] [00] [00] [00] [00] [00] [00] [00] [00] [00] [00] [00]
[00] [00] [00] [00] [00] [00] [00] [00] [00] [00] [00] [00]
[00] [00] [00] [00] [00] [00] [00] [00] [00] [00] [00] [00]
[00] [00] [00] [00] [00] [00] [00] [00] [00] [00] [00] [00]
[00] [00] [00] [00] [00] [00] [00] [00] [00] [00] [00] [00]
[00] [00] [00] [00] [00] [00] [00] [00] [00] [00] [00] [00]
[00] [00] [00] [00] [00] [00] [00] [00] [00] [00] [00] [00]
[00] [00] [00] [00] [00] [00] [00] [00] [00] [00] [00] [00]
[00] [00] [00] [00] [00] [00] [00] [00] [00] [00] [00] [00]
[00] [00] [00] [00] [00] [00] [00] [00] [00] [00] [00] [00]
[00] [00] [00] [00] [00] [00] [00] [00] [00] [00] [00] [00]
[00] [00] [00] [00] [00] [00] [00] [00] [00] [00] [00] [00]
[00] [00] [00] [00] [00] [00] [00] [00] [00] [00] [00] [00]
[00] [00] [00] [00] [00] [00] [00] [00] [00] [00] [00] [00]
[00] [00] [00] [00] [00] [00] [00] [00] [00] [00] [00] [00]
[00] [00] [00] [00] [00] [00] [00] [00] [00] [00] [00] [00]
[00] [00] [00] [00] [00] [00] [00] [00] [00] [00] [00] [00]
[00] [00] [00] [00] [00] [00] [00] [00] [00] [00] [00] [00]
[00] [00] [00] [00] [00] [00] [00] [00] [00] [00] [00] [00]
[00] [00] [00] [00] [00] [00] [00] [00] [00] [00] [00] [00]
[00] [00] [00] [00] [00] [00] [00] [00] [00] [00] [00] [00]
[00] [00] [00] [00] [00] [00] [00] [00] [00] [00] [00] [00]
[00] [00] [00] [00] [00] [00] [00] [00] [00] [00] [00] [00]
[00] [00] [00] [00] [00] [00] [00] [00] [00] [00] [00] [00]
[00] [00] [00] [00] [00] [00] [00] [00] [00] [00] [00] [00]
[00] [00] [00] [00] [00] [00] [00] [00] [00] [00] [00] [00]
[00] [00] [00] [00] [00] [00] [00] [00] [00] [00] [00] [00]
[00] [00] [00] [00] [00] [00] [00] [00] [00] [00] [00] [00]
Mac:
[00] [00] [00] [00] [00] [00] [00] [00] [00] [00] [00] [00] [00] [00] [00] [00]
[00] [00] [00] [00] [00] [00] [00] [00] [00] [00] [00] [00] [00] [00] [00] [00]
[00] [00] [00] [00] [00] [00] [00] [00] [00] [00] [00] [00] [00] [00] [00] [00]
[00] [00] [00] [00] [00] [00] [00] [00] [00] [00] [00] [00] [00] [00] [00] [00]
[00] [00] [00] [00] [00] [00] [00] [00] [00] [00] [00] [00] [00] [00] [00] [00]
[00] [00] [00] [00] [00] [00] [00] [00] [00] [00] [00] [00] [00] [00] [00] [00]
[00] [00] [00] [00] [00] [00] [00] [00] [00] [00] [00] [00] [00] [00] [00] [00]
[00] [00] [00] [00] [00] [00] [00] [00] [00] [00] [00] [00] [00] [00] [00] [00]
[00] [00] [00] [00] [00] [00] [00] [00] [00] [00] [00] [00] [00] [00] [00] [00]
[00] [00] [00] [00] [00] [00] [00] [00] [00] [00] [00] [00] [00] [00] [00] [00]
[00] [00] [00] [00] [00] [00] [00] [00] [00] [00] [00] [00] [00] [00] [00] [00]
[00] [00] [00] [00] [00] [00] [00] [00] [00] [00] [00] [00] [00] [00] [00] [00]
[00] [00] [00] [00] [00] [00] [00] [00] [00] [00] [00] [00] [00] [00] [00] [00]
[00] [00] [00] [00] [00] [00] [00] [00] [00] [00] [00] [00] [00] [00] [00] [00]
[00] [00] [00] [00] [00] [00] [00] [00] [00] [00] [00] [00] [00] [00] [00] [00]
[00] [00] [00] [00] [00] [00] [00] [00] [00] [00] [00] [00] [00] [00] [00] [00]
[00] [00] [00] [00] [00] [00] [00] [00] [00] [00] [00] [00] [00] [00] [00] [00]
[00] [00] [00] [00] [00] [00] [00] [00] [00] [00] [00] [00] [00] [00] [00] [00]
[00] [00] [00] [00] [00] [00] [00] [00] [00] [00] [00] [00] [00] [00] [00] [00]
[00] [00] [00] [00] [00] [00] [00] [00] [00] [00] [00] [00] [00] [00] [00] [00]
[00] [00] [00] [00] [00] [00] [00] [00] [00] [00] [00] [00] [00] [00] [00] [00]
[00] [00] [00] [00] [00] [00] [00] [00] [00] [00] [00] [00] [00] [00] [00] [00]
[00] [00] [00] [00] [00] [00] [00] [00] [00] [00] [00] [00] [00] [00] [00] [00]
[00] [00] [00] [00] [00] [00] [00] [00] [00] [00] [00] [00] [00] [00] [00] [00]
[00] [00] [00] [00] [00] [00] [00] [00] [00] [00] [00] [00] [00] [00] [00] [00]
[00] [00] [00] [00] [00] [00] [00] [00] [00] [00] [00] [00] [00] [00] [00] [00]
[00] [00] [00] [00] [00] [00] [00] [00] [00] [00] [00] [00] [00] [00] [00] [00]
[00] [00] [00] [00] [00] [00] [00] [00] [00] [00] [00] [00] [00] [00] [00] [00]
[00] [00] [00] [00] [00] [00] [00] [00] [00] [00] [00] [00] [00] [00] [00] [00]
[00] [00] [00] [00] [00] [00] [00] [00] [00] [00] [00] [00] [00] [00] [00] [00]
[00] [00] [00] [00] [00] [00] [00] [00] [00] [00] [00] [00] [00] [00] [00] [00]
[00] [00] [00] [00] [00] [00] [00] [00] [00] [00] [00] [00] [00] [00] [00] [00]
IvComm:
[00] [00] [00] [00] [00] [00] [00] [00] [00] [00] [00] [00]
MacComm:
[00] [00] [00] [00] [00] [00] [00] [00] [00] [00] [00] [00] [00] [00] [00] [00]
[SGX-KEYBLOB-PEI-REST] KeyBlob for socket no 4
Present: FALSE
TimeStamp: 0-0-0, 0:0:0:0, Pad1: 0, Pad2: 0, TimeZone: 0, Daylight: 0
KeyBlob:
Header:
SGX UUID:
[00] [00] [00] [00] [00] [00] [00] [00] [00] [00] [00] [00] [00] [00] [00] [00]
CpuSvn:
[00]
Security Properties:
[00] [00] [00] [00]
Prid:
[00] [00] [00] [00] [00] [00] [00] [00] [00] [00] [00] [00] [00] [00] [00] [00]
PlatformEpoch:
[00] [00] [00] [00] [00] [00] [00] [00] [00] [00] [00] [00] [00] [00] [00] [00] [00] [00] [00] [00] [00] [00] [00] [00] [00] [00] [00] [00] [00] [00] [00] [00]
RsakHash:
[00] [00] [00] [00] [00] [00] [00] [00] [00] [00] [00] [00] [00] [00] [00] [00] [00] [00] [00] [00] [00] [00] [00] [00] [00] [00] [00] [00] [00] [00] [00] [00]
RsakHash:
[00] [00] [00] [00] [00] [00] [00] [00] [00] [00] [00] [00] [00] [00] [00] [00] [00] [00] [00] [00] [00] [00] [00] [00] [00] [00] [00] [00] [00] [00] [00] [00]
Pfk1:
[00] [00] [00] [00] [00] [00] [00] [00] [00] [00] [00] [00] [00] [00] [00] [00]
PprResetKey:
[00] [00] [00] [00]
[00] [00] [00] [00]
[00] [00] [00] [00]
[00] [00] [00] [00]
[00] [00] [00] [00]
[00] [00] [00] [00]
[00] [00] [00] [00]
[00] [00] [00] [00]
[00] [00] [00] [00]
[00] [00] [00] [00]
[00] [00] [00] [00]
[00] [00] [00] [00]
[00] [00] [00] [00]
[00] [00] [00] [00]
[00] [00] [00] [00]
[00] [00] [00] [00]
[00] [00] [00] [00]
[00] [00] [00] [00]
[00] [00] [00] [00]
[00] [00] [00] [00]
[00] [00] [00] [00]
[00] [00] [00] [00]
[00] [00] [00] [00]
[00] [00] [00] [00]
[00] [00] [00] [00]
[00] [00] [00] [00]
[00] [00] [00] [00]
[00] [00] [00] [00]
[00] [00] [00] [00]
[00] [00] [00] [00]
[00] [00] [00] [00]
[00] [00] [00] [00]
LastUsedSvn:
[00]
Reserved2:
[00] [00] [00] [00] [00] [00] [00] [00] [00] [00] [00] [00] [00] [00] [00]
TargetPrid:
[00] [00] [00] [00] [00] [00] [00] [00] [00] [00] [00] [00] [00] [00] [00] [00]
PrimaryComms:
[00] [00] [00] [00] [00] [00] [00] [00] [00] [00] [00] [00] [00] [00] [00] [00]
Iv:
[00] [00] [00] [00] [00] [00] [00] [00] [00] [00] [00] [00]
[00] [00] [00] [00] [00] [00] [00] [00] [00] [00] [00] [00]
[00] [00] [00] [00] [00] [00] [00] [00] [00] [00] [00] [00]
[00] [00] [00] [00] [00] [00] [00] [00] [00] [00] [00] [00]
[00] [00] [00] [00] [00] [00] [00] [00] [00] [00] [00] [00]
[00] [00] [00] [00] [00] [00] [00] [00] [00] [00] [00] [00]
[00] [00] [00] [00] [00] [00] [00] [00] [00] [00] [00] [00]
[00] [00] [00] [00] [00] [00] [00] [00] [00] [00] [00] [00]
[00] [00] [00] [00] [00] [00] [00] [00] [00] [00] [00] [00]
[00] [00] [00] [00] [00] [00] [00] [00] [00] [00] [00] [00]
[00] [00] [00] [00] [00] [00] [00] [00] [00] [00] [00] [00]
[00] [00] [00] [00] [00] [00] [00] [00] [00] [00] [00] [00]
[00] [00] [00] [00] [00] [00] [00] [00] [00] [00] [00] [00]
[00] [00] [00] [00] [00] [00] [00] [00] [00] [00] [00] [00]
[00] [00] [00] [00] [00] [00] [00] [00] [00] [00] [00] [00]
[00] [00] [00] [00] [00] [00] [00] [00] [00] [00] [00] [00]
[00] [00] [00] [00] [00] [00] [00] [00] [00] [00] [00] [00]
[00] [00] [00] [00] [00] [00] [00] [00] [00] [00] [00] [00]
[00] [00] [00] [00] [00] [00] [00] [00] [00] [00] [00] [00]
[00] [00] [00] [00] [00] [00] [00] [00] [00] [00] [00] [00]
[00] [00] [00] [00] [00] [00] [00] [00] [00] [00] [00] [00]
[00] [00] [00] [00] [00] [00] [00] [00] [00] [00] [00] [00]
[00] [00] [00] [00] [00] [00] [00] [00] [00] [00] [00] [00]
[00] [00] [00] [00] [00] [00] [00] [00] [00] [00] [00] [00]
[00] [00] [00] [00] [00] [00] [00] [00] [00] [00] [00] [00]
[00] [00] [00] [00] [00] [00] [00] [00] [00] [00] [00] [00]
[00] [00] [00] [00] [00] [00] [00] [00] [00] [00] [00] [00]
[00] [00] [00] [00] [00] [00] [00] [00] [00] [00] [00] [00]
[00] [00] [00] [00] [00] [00] [00] [00] [00] [00] [00] [00]
[00] [00] [00] [00] [00] [00] [00] [00] [00] [00] [00] [00]
[00] [00] [00] [00] [00] [00] [00] [00] [00] [00] [00] [00]
[00] [00] [00] [00] [00] [00] [00] [00] [00] [00] [00] [00]
Mac:
[00] [00] [00] [00] [00] [00] [00] [00] [00] [00] [00] [00] [00] [00] [00] [00]
[00] [00] [00] [00] [00] [00] [00] [00] [00] [00] [00] [00] [00] [00] [00] [00]
[00] [00] [00] [00] [00] [00] [00] [00] [00] [00] [00] [00] [00] [00] [00] [00]
[00] [00] [00] [00] [00] [00] [00] [00] [00] [00] [00] [00] [00] [00] [00] [00]
[00] [00] [00] [00] [00] [00] [00] [00] [00] [00] [00] [00] [00] [00] [00] [00]
[00] [00] [00] [00] [00] [00] [00] [00] [00] [00] [00] [00] [00] [00] [00] [00]
[00] [00] [00] [00] [00] [00] [00] [00] [00] [00] [00] [00] [00] [00] [00] [00]
[00] [00] [00] [00] [00] [00] [00] [00] [00] [00] [00] [00] [00] [00] [00] [00]
[00] [00] [00] [00] [00] [00] [00] [00] [00] [00] [00] [00] [00] [00] [00] [00]
[00] [00] [00] [00] [00] [00] [00] [00] [00] [00] [00] [00] [00] [00] [00] [00]
[00] [00] [00] [00] [00] [00] [00] [00] [00] [00] [00] [00] [00] [00] [00] [00]
[00] [00] [00] [00] [00] [00] [00] [00] [00] [00] [00] [00] [00] [00] [00] [00]
[00] [00] [00] [00] [00] [00] [00] [00] [00] [00] [00] [00] [00] [00] [00] [00]
[00] [00] [00] [00] [00] [00] [00] [00] [00] [00] [00] [00] [00] [00] [00] [00]
[00] [00] [00] [00] [00] [00] [00] [00] [00] [00] [00] [00] [00] [00] [00] [00]
[00] [00] [00] [00] [00] [00] [00] [00] [00] [00] [00] [00] [00] [00] [00] [00]
[00] [00] [00] [00] [00] [00] [00] [00] [00] [00] [00] [00] [00] [00] [00] [00]
[00] [00] [00] [00] [00] [00] [00] [00] [00] [00] [00] [00] [00] [00] [00] [00]
[00] [00] [00] [00] [00] [00] [00] [00] [00] [00] [00] [00] [00] [00] [00] [00]
[00] [00] [00] [00] [00] [00] [00] [00] [00] [00] [00] [00] [00] [00] [00] [00]
[00] [00] [00] [00] [00] [00] [00] [00] [00] [00] [00] [00] [00] [00] [00] [00]
[00] [00] [00] [00] [00] [00] [00] [00] [00] [00] [00] [00] [00] [00] [00] [00]
[00] [00] [00] [00] [00] [00] [00] [00] [00] [00] [00] [00] [00] [00] [00] [00]
[00] [00] [00] [00] [00] [00] [00] [00] [00] [00] [00] [00] [00] [00] [00] [00]
[00] [00] [00] [00] [00] [00] [00] [00] [00] [00] [00] [00] [00] [00] [00] [00]
[00] [00] [00] [00] [00] [00] [00] [00] [00] [00] [00] [00] [00] [00] [00] [00]
[00] [00] [00] [00] [00] [00] [00] [00] [00] [00] [00] [00] [00] [00] [00] [00]
[00] [00] [00] [00] [00] [00] [00] [00] [00] [00] [00] [00] [00] [00] [00] [00]
[00] [00] [00] [00] [00] [00] [00] [00] [00] [00] [00] [00] [00] [00] [00] [00]
[00] [00] [00] [00] [00] [00] [00] [00] [00] [00] [00] [00] [00] [00] [00] [00]
[00] [00] [00] [00] [00] [00] [00] [00] [00] [00] [00] [00] [00] [00] [00] [00]
[00] [00] [00] [00] [00] [00] [00] [00] [00] [00] [00] [00] [00] [00] [00] [00]
IvComm:
[00] [00] [00] [00] [00] [00] [00] [00] [00] [00] [00] [00]
MacComm:
[00] [00] [00] [00] [00] [00] [00] [00] [00] [00] [00] [00] [00] [00] [00] [00]
[SGX-KEYBLOB-PEI-REST] KeyBlob for socket no 5
Present: FALSE
TimeStamp: 0-0-0, 0:0:0:0, Pad1: 0, Pad2: 0, TimeZone: 0, Daylight: 0
KeyBlob:
Header:
SGX UUID:
[00] [00] [00] [00] [00] [00] [00] [00] [00] [00] [00] [00] [00] [00] [00] [00]
CpuSvn:
[00]
Security Properties:
[00] [00] [00] [00]
Prid:
[00] [00] [00] [00] [00] [00] [00] [00] [00] [00] [00] [00] [00] [00] [00] [00]
PlatformEpoch:
[00] [00] [00] [00] [00] [00] [00] [00] [00] [00] [00] [00] [00] [00] [00] [00] [00] [00] [00] [00] [00] [00] [00] [00] [00] [00] [00] [00] [00] [00] [00] [00]
RsakHash:
[00] [00] [00] [00] [00] [00] [00] [00] [00] [00] [00] [00] [00] [00] [00] [00] [00] [00] [00] [00] [00] [00] [00] [00] [00] [00] [00] [00] [00] [00] [00] [00]
RsakHash:
[00] [00] [00] [00] [00] [00] [00] [00] [00] [00] [00] [00] [00] [00] [00] [00] [00] [00] [00] [00] [00] [00] [00] [00] [00] [00] [00] [00] [00] [00] [00] [00]
Pfk1:
[00] [00] [00] [00] [00] [00] [00] [00] [00] [00] [00] [00] [00] [00] [00] [00]
PprResetKey:
[00] [00] [00] [00]
[00] [00] [00] [00]
[00] [00] [00] [00]
[00] [00] [00] [00]
[00] [00] [00] [00]
[00] [00] [00] [00]
[00] [00] [00] [00]
[00] [00] [00] [00]
[00] [00] [00] [00]
[00] [00] [00] [00]
[00] [00] [00] [00]
[00] [00] [00] [00]
[00] [00] [00] [00]
[00] [00] [00] [00]
[00] [00] [00] [00]
[00] [00] [00] [00]
[00] [00] [00] [00]
[00] [00] [00] [00]
[00] [00] [00] [00]
[00] [00] [00] [00]
[00] [00] [00] [00]
[00] [00] [00] [00]
[00] [00] [00] [00]
[00] [00] [00] [00]
[00] [00] [00] [00]
[00] [00] [00] [00]
[00] [00] [00] [00]
[00] [00] [00] [00]
[00] [00] [00] [00]
[00] [00] [00] [00]
[00] [00] [00] [00]
[00] [00] [00] [00]
LastUsedSvn:
[00]
Reserved2:
[00] [00] [00] [00] [00] [00] [00] [00] [00] [00] [00] [00] [00] [00] [00]
TargetPrid:
[00] [00] [00] [00] [00] [00] [00] [00] [00] [00] [00] [00] [00] [00] [00] [00]
PrimaryComms:
[00] [00] [00] [00] [00] [00] [00] [00] [00] [00] [00] [00] [00] [00] [00] [00]
Iv:
[00] [00] [00] [00] [00] [00] [00] [00] [00] [00] [00] [00]
[00] [00] [00] [00] [00] [00] [00] [00] [00] [00] [00] [00]
[00] [00] [00] [00] [00] [00] [00] [00] [00] [00] [00] [00]
[00] [00] [00] [00] [00] [00] [00] [00] [00] [00] [00] [00]
[00] [00] [00] [00] [00] [00] [00] [00] [00] [00] [00] [00]
[00] [00] [00] [00] [00] [00] [00] [00] [00] [00] [00] [00]
[00] [00] [00] [00] [00] [00] [00] [00] [00] [00] [00] [00]
[00] [00] [00] [00] [00] [00] [00] [00] [00] [00] [00] [00]
[00] [00] [00] [00] [00] [00] [00] [00] [00] [00] [00] [00]
[00] [00] [00] [00] [00] [00] [00] [00] [00] [00] [00] [00]
[00] [00] [00] [00] [00] [00] [00] [00] [00] [00] [00] [00]
[00] [00] [00] [00] [00] [00] [00] [00] [00] [00] [00] [00]
[00] [00] [00] [00] [00] [00] [00] [00] [00] [00] [00] [00]
[00] [00] [00] [00] [00] [00] [00] [00] [00] [00] [00] [00]
[00] [00] [00] [00] [00] [00] [00] [00] [00] [00] [00] [00]
[00] [00] [00] [00] [00] [00] [00] [00] [00] [00] [00] [00]
[00] [00] [00] [00] [00] [00] [00] [00] [00] [00] [00] [00]
[00] [00] [00] [00] [00] [00] [00] [00] [00] [00] [00] [00]
[00] [00] [00] [00] [00] [00] [00] [00] [00] [00] [00] [00]
[00] [00] [00] [00] [00] [00] [00] [00] [00] [00] [00] [00]
[00] [00] [00] [00] [00] [00] [00] [00] [00] [00] [00] [00]
[00] [00] [00] [00] [00] [00] [00] [00] [00] [00] [00] [00]
[00] [00] [00] [00] [00] [00] [00] [00] [00] [00] [00] [00]
[00] [00] [00] [00] [00] [00] [00] [00] [00] [00] [00] [00]
[00] [00] [00] [00] [00] [00] [00] [00] [00] [00] [00] [00]
[00] [00] [00] [00] [00] [00] [00] [00] [00] [00] [00] [00]
[00] [00] [00] [00] [00] [00] [00] [00] [00] [00] [00] [00]
[00] [00] [00] [00] [00] [00] [00] [00] [00] [00] [00] [00]
[00] [00] [00] [00] [00] [00] [00] [00] [00] [00] [00] [00]
[00] [00] [00] [00] [00] [00] [00] [00] [00] [00] [00] [00]
[00] [00] [00] [00] [00] [00] [00] [00] [00] [00] [00] [00]
[00] [00] [00] [00] [00] [00] [00] [00] [00] [00] [00] [00]
Mac:
[00] [00] [00] [00] [00] [00] [00] [00] [00] [00] [00] [00] [00] [00] [00] [00]
[00] [00] [00] [00] [00] [00] [00] [00] [00] [00] [00] [00] [00] [00] [00] [00]
[00] [00] [00] [00] [00] [00] [00] [00] [00] [00] [00] [00] [00] [00] [00] [00]
[00] [00] [00] [00] [00] [00] [00] [00] [00] [00] [00] [00] [00] [00] [00] [00]
[00] [00] [00] [00] [00] [00] [00] [00] [00] [00] [00] [00] [00] [00] [00] [00]
[00] [00] [00] [00] [00] [00] [00] [00] [00] [00] [00] [00] [00] [00] [00] [00]
[00] [00] [00] [00] [00] [00] [00] [00] [00] [00] [00] [00] [00] [00] [00] [00]
[00] [00] [00] [00] [00] [00] [00] [00] [00] [00] [00] [00] [00] [00] [00] [00]
[00] [00] [00] [00] [00] [00] [00] [00] [00] [00] [00] [00] [00] [00] [00] [00]
[00] [00] [00] [00] [00] [00] [00] [00] [00] [00] [00] [00] [00] [00] [00] [00]
[00] [00] [00] [00] [00] [00] [00] [00] [00] [00] [00] [00] [00] [00] [00] [00]
[00] [00] [00] [00] [00] [00] [00] [00] [00] [00] [00] [00] [00] [00] [00] [00]
[00] [00] [00] [00] [00] [00] [00] [00] [00] [00] [00] [00] [00] [00] [00] [00]
[00] [00] [00] [00] [00] [00] [00] [00] [00] [00] [00] [00] [00] [00] [00] [00]
[00] [00] [00] [00] [00] [00] [00] [00] [00] [00] [00] [00] [00] [00] [00] [00]
[00] [00] [00] [00] [00] [00] [00] [00] [00] [00] [00] [00] [00] [00] [00] [00]
[00] [00] [00] [00] [00] [00] [00] [00] [00] [00] [00] [00] [00] [00] [00] [00]
[00] [00] [00] [00] [00] [00] [00] [00] [00] [00] [00] [00] [00] [00] [00] [00]
[00] [00] [00] [00] [00] [00] [00] [00] [00] [00] [00] [00] [00] [00] [00] [00]
[00] [00] [00] [00] [00] [00] [00] [00] [00] [00] [00] [00] [00] [00] [00] [00]
[00] [00] [00] [00] [00] [00] [00] [00] [00] [00] [00] [00] [00] [00] [00] [00]
[00] [00] [00] [00] [00] [00] [00] [00] [00] [00] [00] [00] [00] [00] [00] [00]
[00] [00] [00] [00] [00] [00] [00] [00] [00] [00] [00] [00] [00] [00] [00] [00]
[00] [00] [00] [00] [00] [00] [00] [00] [00] [00] [00] [00] [00] [00] [00] [00]
[00] [00] [00] [00] [00] [00] [00] [00] [00] [00] [00] [00] [00] [00] [00] [00]
[00] [00] [00] [00] [00] [00] [00] [00] [00] [00] [00] [00] [00] [00] [00] [00]
[00] [00] [00] [00] [00] [00] [00] [00] [00] [00] [00] [00] [00] [00] [00] [00]
[00] [00] [00] [00] [00] [00] [00] [00] [00] [00] [00] [00] [00] [00] [00] [00]
[00] [00] [00] [00] [00] [00] [00] [00] [00] [00] [00] [00] [00] [00] [00] [00]
[00] [00] [00] [00] [00] [00] [00] [00] [00] [00] [00] [00] [00] [00] [00] [00]
[00] [00] [00] [00] [00] [00] [00] [00] [00] [00] [00] [00] [00] [00] [00] [00]
[00] [00] [00] [00] [00] [00] [00] [00] [00] [00] [00] [00] [00] [00] [00] [00]
IvComm:
[00] [00] [00] [00] [00] [00] [00] [00] [00] [00] [00] [00]
MacComm:
[00] [00] [00] [00] [00] [00] [00] [00] [00] [00] [00] [00] [00] [00] [00] [00]
[SGX-KEYBLOB-PEI-REST] KeyBlob for socket no 6
Present: FALSE
TimeStamp: 0-0-0, 0:0:0:0, Pad1: 0, Pad2: 0, TimeZone: 0, Daylight: 0
KeyBlob:
Header:
SGX UUID:
[00] [00] [00] [00] [00] [00] [00] [00] [00] [00] [00] [00] [00] [00] [00] [00]
CpuSvn:
[00]
Security Properties:
[00] [00] [00] [00]
Prid:
[00] [00] [00] [00] [00] [00] [00] [00] [00] [00] [00] [00] [00] [00] [00] [00]
PlatformEpoch:
[00] [00] [00] [00] [00] [00] [00] [00] [00] [00] [00] [00] [00] [00] [00] [00] [00] [00] [00] [00] [00] [00] [00] [00] [00] [00] [00] [00] [00] [00] [00] [00]
RsakHash:
[00] [00] [00] [00] [00] [00] [00] [00] [00] [00] [00] [00] [00] [00] [00] [00] [00] [00] [00] [00] [00] [00] [00] [00] [00] [00] [00] [00] [00] [00] [00] [00]
RsakHash:
[00] [00] [00] [00] [00] [00] [00] [00] [00] [00] [00] [00] [00] [00] [00] [00] [00] [00] [00] [00] [00] [00] [00] [00] [00] [00] [00] [00] [00] [00] [00] [00]
Pfk1:
[00] [00] [00] [00] [00] [00] [00] [00] [00] [00] [00] [00] [00] [00] [00] [00]
PprResetKey:
[00] [00] [00] [00]
[00] [00] [00] [00]
[00] [00] [00] [00]
[00] [00] [00] [00]
[00] [00] [00] [00]
[00] [00] [00] [00]
[00] [00] [00] [00]
[00] [00] [00] [00]
[00] [00] [00] [00]
[00] [00] [00] [00]
[00] [00] [00] [00]
[00] [00] [00] [00]
[00] [00] [00] [00]
[00] [00] [00] [00]
[00] [00] [00] [00]
[00] [00] [00] [00]
[00] [00] [00] [00]
[00] [00] [00] [00]
[00] [00] [00] [00]
[00] [00] [00] [00]
[00] [00] [00] [00]
[00] [00] [00] [00]
[00] [00] [00] [00]
[00] [00] [00] [00]
[00] [00] [00] [00]
[00] [00] [00] [00]
[00] [00] [00] [00]
[00] [00] [00] [00]
[00] [00] [00] [00]
[00] [00] [00] [00]
[00] [00] [00] [00]
[00] [00] [00] [00]
LastUsedSvn:
[00]
Reserved2:
[00] [00] [00] [00] [00] [00] [00] [00] [00] [00] [00] [00] [00] [00] [00]
TargetPrid:
[00] [00] [00] [00] [00] [00] [00] [00] [00] [00] [00] [00] [00] [00] [00] [00]
PrimaryComms:
[00] [00] [00] [00] [00] [00] [00] [00] [00] [00] [00] [00] [00] [00] [00] [00]
Iv:
[00] [00] [00] [00] [00] [00] [00] [00] [00] [00] [00] [00]
[00] [00] [00] [00] [00] [00] [00] [00] [00] [00] [00] [00]
[00] [00] [00] [00] [00] [00] [00] [00] [00] [00] [00] [00]
[00] [00] [00] [00] [00] [00] [00] [00] [00] [00] [00] [00]
[00] [00] [00] [00] [00] [00] [00] [00] [00] [00] [00] [00]
[00] [00] [00] [00] [00] [00] [00] [00] [00] [00] [00] [00]
[00] [00] [00] [00] [00] [00] [00] [00] [00] [00] [00] [00]
[00] [00] [00] [00] [00] [00] [00] [00] [00] [00] [00] [00]
[00] [00] [00] [00] [00] [00] [00] [00] [00] [00] [00] [00]
[00] [00] [00] [00] [00] [00] [00] [00] [00] [00] [00] [00]
[00] [00] [00] [00] [00] [00] [00] [00] [00] [00] [00] [00]
[00] [00] [00] [00] [00] [00] [00] [00] [00] [00] [00] [00]
[00] [00] [00] [00] [00] [00] [00] [00] [00] [00] [00] [00]
[00] [00] [00] [00] [00] [00] [00] [00] [00] [00] [00] [00]
[00] [00] [00] [00] [00] [00] [00] [00] [00] [00] [00] [00]
[00] [00] [00] [00] [00] [00] [00] [00] [00] [00] [00] [00]
[00] [00] [00] [00] [00] [00] [00] [00] [00] [00] [00] [00]
[00] [00] [00] [00] [00] [00] [00] [00] [00] [00] [00] [00]
[00] [00] [00] [00] [00] [00] [00] [00] [00] [00] [00] [00]
[00] [00] [00] [00] [00] [00] [00] [00] [00] [00] [00] [00]
[00] [00] [00] [00] [00] [00] [00] [00] [00] [00] [00] [00]
[00] [00] [00] [00] [00] [00] [00] [00] [00] [00] [00] [00]
[00] [00] [00] [00] [00] [00] [00] [00] [00] [00] [00] [00]
[00] [00] [00] [00] [00] [00] [00] [00] [00] [00] [00] [00]
[00] [00] [00] [00] [00] [00] [00] [00] [00] [00] [00] [00]
[00] [00] [00] [00] [00] [00] [00] [00] [00] [00] [00] [00]
[00] [00] [00] [00] [00] [00] [00] [00] [00] [00] [00] [00]
[00] [00] [00] [00] [00] [00] [00] [00] [00] [00] [00] [00]
[00] [00] [00] [00] [00] [00] [00] [00] [00] [00] [00] [00]
[00] [00] [00] [00] [00] [00] [00] [00] [00] [00] [00] [00]
[00] [00] [00] [00] [00] [00] [00] [00] [00] [00] [00] [00]
[00] [00] [00] [00] [00] [00] [00] [00] [00] [00] [00] [00]
Mac:
[00] [00] [00] [00] [00] [00] [00] [00] [00] [00] [00] [00] [00] [00] [00] [00]
[00] [00] [00] [00] [00] [00] [00] [00] [00] [00] [00] [00] [00] [00] [00] [00]
[00] [00] [00] [00] [00] [00] [00] [00] [00] [00] [00] [00] [00] [00] [00] [00]
[00] [00] [00] [00] [00] [00] [00] [00] [00] [00] [00] [00] [00] [00] [00] [00]
[00] [00] [00] [00] [00] [00] [00] [00] [00] [00] [00] [00] [00] [00] [00] [00]
[00] [00] [00] [00] [00] [00] [00] [00] [00] [00] [00] [00] [00] [00] [00] [00]
[00] [00] [00] [00] [00] [00] [00] [00] [00] [00] [00] [00] [00] [00] [00] [00]
[00] [00] [00] [00] [00] [00] [00] [00] [00] [00] [00] [00] [00] [00] [00] [00]
[00] [00] [00] [00] [00] [00] [00] [00] [00] [00] [00] [00] [00] [00] [00] [00]
[00] [00] [00] [00] [00] [00] [00] [00] [00] [00] [00] [00] [00] [00] [00] [00]
[00] [00] [00] [00] [00] [00] [00] [00] [00] [00] [00] [00] [00] [00] [00] [00]
[00] [00] [00] [00] [00] [00] [00] [00] [00] [00] [00] [00] [00] [00] [00] [00]
[00] [00] [00] [00] [00] [00] [00] [00] [00] [00] [00] [00] [00] [00] [00] [00]
[00] [00] [00] [00] [00] [00] [00] [00] [00] [00] [00] [00] [00] [00] [00] [00]
[00] [00] [00] [00] [00] [00] [00] [00] [00] [00] [00] [00] [00] [00] [00] [00]
[00] [00] [00] [00] [00] [00] [00] [00] [00] [00] [00] [00] [00] [00] [00] [00]
[00] [00] [00] [00] [00] [00] [00] [00] [00] [00] [00] [00] [00] [00] [00] [00]
[00] [00] [00] [00] [00] [00] [00] [00] [00] [00] [00] [00] [00] [00] [00] [00]
[00] [00] [00] [00] [00] [00] [00] [00] [00] [00] [00] [00] [00] [00] [00] [00]
[00] [00] [00] [00] [00] [00] [00] [00] [00] [00] [00] [00] [00] [00] [00] [00]
[00] [00] [00] [00] [00] [00] [00] [00] [00] [00] [00] [00] [00] [00] [00] [00]
[00] [00] [00] [00] [00] [00] [00] [00] [00] [00] [00] [00] [00] [00] [00] [00]
[00] [00] [00] [00] [00] [00] [00] [00] [00] [00] [00] [00] [00] [00] [00] [00]
[00] [00] [00] [00] [00] [00] [00] [00] [00] [00] [00] [00] [00] [00] [00] [00]
[00] [00] [00] [00] [00] [00] [00] [00] [00] [00] [00] [00] [00] [00] [00] [00]
[00] [00] [00] [00] [00] [00] [00] [00] [00] [00] [00] [00] [00] [00] [00] [00]
[00] [00] [00] [00] [00] [00] [00] [00] [00] [00] [00] [00] [00] [00] [00] [00]
[00] [00] [00] [00] [00] [00] [00] [00] [00] [00] [00] [00] [00] [00] [00] [00]
[00] [00] [00] [00] [00] [00] [00] [00] [00] [00] [00] [00] [00] [00] [00] [00]
[00] [00] [00] [00] [00] [00] [00] [00] [00] [00] [00] [00] [00] [00] [00] [00]
[00] [00] [00] [00] [00] [00] [00] [00] [00] [00] [00] [00] [00] [00] [00] [00]
[00] [00] [00] [00] [00] [00] [00] [00] [00] [00] [00] [00] [00] [00] [00] [00]
IvComm:
[00] [00] [00] [00] [00] [00] [00] [00] [00] [00] [00] [00]
MacComm:
[00] [00] [00] [00] [00] [00] [00] [00] [00] [00] [00] [00] [00] [00] [00] [00]
[SGX-KEYBLOB-PEI-REST] KeyBlob for socket no 7
Present: FALSE
TimeStamp: 0-0-0, 0:0:0:0, Pad1: 0, Pad2: 0, TimeZone: 0, Daylight: 0
KeyBlob:
Header:
SGX UUID:
[00] [00] [00] [00] [00] [00] [00] [00] [00] [00] [00] [00] [00] [00] [00] [00]
CpuSvn:
[00]
Security Properties:
[00] [00] [00] [00]
Prid:
[00] [00] [00] [00] [00] [00] [00] [00] [00] [00] [00] [00] [00] [00] [00] [00]
PlatformEpoch:
[00] [00] [00] [00] [00] [00] [00] [00] [00] [00] [00] [00] [00] [00] [00] [00] [00] [00] [00] [00] [00] [00] [00] [00] [00] [00] [00] [00] [00] [00] [00] [00]
RsakHash:
[00] [00] [00] [00] [00] [00] [00] [00] [00] [00] [00] [00] [00] [00] [00] [00] [00] [00] [00] [00] [00] [00] [00] [00] [00] [00] [00] [00] [00] [00] [00] [00]
RsakHash:
[00] [00] [00] [00] [00] [00] [00] [00] [00] [00] [00] [00] [00] [00] [00] [00] [00] [00] [00] [00] [00] [00] [00] [00] [00] [00] [00] [00] [00] [00] [00] [00]
Pfk1:
[00] [00] [00] [00] [00] [00] [00] [00] [00] [00] [00] [00] [00] [00] [00] [00]
PprResetKey:
[00] [00] [00] [00]
[00] [00] [00] [00]
[00] [00] [00] [00]
[00] [00] [00] [00]
[00] [00] [00] [00]
[00] [00] [00] [00]
[00] [00] [00] [00]
[00] [00] [00] [00]
[00] [00] [00] [00]
[00] [00] [00] [00]
[00] [00] [00] [00]
[00] [00] [00] [00]
[00] [00] [00] [00]
[00] [00] [00] [00]
[00] [00] [00] [00]
[00] [00] [00] [00]
[00] [00] [00] [00]
[00] [00] [00] [00]
[00] [00] [00] [00]
[00] [00] [00] [00]
[00] [00] [00] [00]
[00] [00] [00] [00]
[00] [00] [00] [00]
[00] [00] [00] [00]
[00] [00] [00] [00]
[00] [00] [00] [00]
[00] [00] [00] [00]
[00] [00] [00] [00]
[00] [00] [00] [00]
[00] [00] [00] [00]
[00] [00] [00] [00]
[00] [00] [00] [00]
LastUsedSvn:
[00]
Reserved2:
[00] [00] [00] [00] [00] [00] [00] [00] [00] [00] [00] [00] [00] [00] [00]
TargetPrid:
[00] [00] [00] [00] [00] [00] [00] [00] [00] [00] [00] [00] [00] [00] [00] [00]
PrimaryComms:
[00] [00] [00] [00] [00] [00] [00] [00] [00] [00] [00] [00] [00] [00] [00] [00]
Iv:
[00] [00] [00] [00] [00] [00] [00] [00] [00] [00] [00] [00]
[00] [00] [00] [00] [00] [00] [00] [00] [00] [00] [00] [00]
[00] [00] [00] [00] [00] [00] [00] [00] [00] [00] [00] [00]
[00] [00] [00] [00] [00] [00] [00] [00] [00] [00] [00] [00]
[00] [00] [00] [00] [00] [00] [00] [00] [00] [00] [00] [00]
[00] [00] [00] [00] [00] [00] [00] [00] [00] [00] [00] [00]
[00] [00] [00] [00] [00] [00] [00] [00] [00] [00] [00] [00]
[00] [00] [00] [00] [00] [00] [00] [00] [00] [00] [00] [00]
[00] [00] [00] [00] [00] [00] [00] [00] [00] [00] [00] [00]
[00] [00] [00] [00] [00] [00] [00] [00] [00] [00] [00] [00]
[00] [00] [00] [00] [00] [00] [00] [00] [00] [00] [00] [00]
[00] [00] [00] [00] [00] [00] [00] [00] [00] [00] [00] [00]
[00] [00] [00] [00] [00] [00] [00] [00] [00] [00] [00] [00]
[00] [00] [00] [00] [00] [00] [00] [00] [00] [00] [00] [00]
[00] [00] [00] [00] [00] [00] [00] [00] [00] [00] [00] [00]
[00] [00] [00] [00] [00] [00] [00] [00] [00] [00] [00] [00]
[00] [00] [00] [00] [00] [00] [00] [00] [00] [00] [00] [00]
[00] [00] [00] [00] [00] [00] [00] [00] [00] [00] [00] [00]
[00] [00] [00] [00] [00] [00] [00] [00] [00] [00] [00] [00]
[00] [00] [00] [00] [00] [00] [00] [00] [00] [00] [00] [00]
[00] [00] [00] [00] [00] [00] [00] [00] [00] [00] [00] [00]
[00] [00] [00] [00] [00] [00] [00] [00] [00] [00] [00] [00]
[00] [00] [00] [00] [00] [00] [00] [00] [00] [00] [00] [00]
[00] [00] [00] [00] [00] [00] [00] [00] [00] [00] [00] [00]
[00] [00] [00] [00] [00] [00] [00] [00] [00] [00] [00] [00]
[00] [00] [00] [00] [00] [00] [00] [00] [00] [00] [00] [00]
[00] [00] [00] [00] [00] [00] [00] [00] [00] [00] [00] [00]
[00] [00] [00] [00] [00] [00] [00] [00] [00] [00] [00] [00]
[00] [00] [00] [00] [00] [00] [00] [00] [00] [00] [00] [00]
[00] [00] [00] [00] [00] [00] [00] [00] [00] [00] [00] [00]
[00] [00] [00] [00] [00] [00] [00] [00] [00] [00] [00] [00]
[00] [00] [00] [00] [00] [00] [00] [00] [00] [00] [00] [00]
Mac:
[00] [00] [00] [00] [00] [00] [00] [00] [00] [00] [00] [00] [00] [00] [00] [00]
[00] [00] [00] [00] [00] [00] [00] [00] [00] [00] [00] [00] [00] [00] [00] [00]
[00] [00] [00] [00] [00] [00] [00] [00] [00] [00] [00] [00] [00] [00] [00] [00]
[00] [00] [00] [00] [00] [00] [00] [00] [00] [00] [00] [00] [00] [00] [00] [00]
[00] [00] [00] [00] [00] [00] [00] [00] [00] [00] [00] [00] [00] [00] [00] [00]
[00] [00] [00] [00] [00] [00] [00] [00] [00] [00] [00] [00] [00] [00] [00] [00]
[00] [00] [00] [00] [00] [00] [00] [00] [00] [00] [00] [00] [00] [00] [00] [00]
[00] [00] [00] [00] [00] [00] [00] [00] [00] [00] [00] [00] [00] [00] [00] [00]
[00] [00] [00] [00] [00] [00] [00] [00] [00] [00] [00] [00] [00] [00] [00] [00]
[00] [00] [00] [00] [00] [00] [00] [00] [00] [00] [00] [00] [00] [00] [00] [00]
[00] [00] [00] [00] [00] [00] [00] [00] [00] [00] [00] [00] [00] [00] [00] [00]
[00] [00] [00] [00] [00] [00] [00] [00] [00] [00] [00] [00] [00] [00] [00] [00]
[00] [00] [00] [00] [00] [00] [00] [00] [00] [00] [00] [00] [00] [00] [00] [00]
[00] [00] [00] [00] [00] [00] [00] [00] [00] [00] [00] [00] [00] [00] [00] [00]
[00] [00] [00] [00] [00] [00] [00] [00] [00] [00] [00] [00] [00] [00] [00] [00]
[00] [00] [00] [00] [00] [00] [00] [00] [00] [00] [00] [00] [00] [00] [00] [00]
[00] [00] [00] [00] [00] [00] [00] [00] [00] [00] [00] [00] [00] [00] [00] [00]
[00] [00] [00] [00] [00] [00] [00] [00] [00] [00] [00] [00] [00] [00] [00] [00]
[00] [00] [00] [00] [00] [00] [00] [00] [00] [00] [00] [00] [00] [00] [00] [00]
[00] [00] [00] [00] [00] [00] [00] [00] [00] [00] [00] [00] [00] [00] [00] [00]
[00] [00] [00] [00] [00] [00] [00] [00] [00] [00] [00] [00] [00] [00] [00] [00]
[00] [00] [00] [00] [00] [00] [00] [00] [00] [00] [00] [00] [00] [00] [00] [00]
[00] [00] [00] [00] [00] [00] [00] [00] [00] [00] [00] [00] [00] [00] [00] [00]
[00] [00] [00] [00] [00] [00] [00] [00] [00] [00] [00] [00] [00] [00] [00] [00]
[00] [00] [00] [00] [00] [00] [00] [00] [00] [00] [00] [00] [00] [00] [00] [00]
[00] [00] [00] [00] [00] [00] [00] [00] [00] [00] [00] [00] [00] [00] [00] [00]
[00] [00] [00] [00] [00] [00] [00] [00] [00] [00] [00] [00] [00] [00] [00] [00]
[00] [00] [00] [00] [00] [00] [00] [00] [00] [00] [00] [00] [00] [00] [00] [00]
[00] [00] [00] [00] [00] [00] [00] [00] [00] [00] [00] [00] [00] [00] [00] [00]
[00] [00] [00] [00] [00] [00] [00] [00] [00] [00] [00] [00] [00] [00] [00] [00]
[00] [00] [00] [00] [00] [00] [00] [00] [00] [00] [00] [00] [00] [00] [00] [00]
[00] [00] [00] [00] [00] [00] [00] [00] [00] [00] [00] [00] [00] [00] [00] [00]
IvComm:
[00] [00] [00] [00] [00] [00] [00] [00] [00] [00] [00] [00]
MacComm:
[00] [00] [00] [00] [00] [00] [00] [00] [00] [00] [00] [00] [00] [00] [00] [00]
SGX disabled, exiting
[SGX] SgxEarlyInit exit: Success
SgxDisabledFlow entry
LockUncoreM2mPrmrrs START
SocketIndex = 0
[SGX] LockUncoreM2mPrmrrs: Sgx M2M_PRMRR_BASE Socket0 Imc0 = 0x0000000000000000
[SGX] LockUncoreM2mPrmrrs: Sgx M2M_PRMRR_MASK Socket0 Imc0 = 0x0000000000000400
[SGX] LockUncoreM2mPrmrrs: Sgx M2M_PRMRR_BASE Socket0 Imc1 = 0x0000000000000000
[SGX] LockUncoreM2mPrmrrs: Sgx M2M_PRMRR_MASK Socket0 Imc1 = 0x0000000000000400
[SGX] LockUncoreM2mPrmrrs: Sgx M2M_PRMRR_BASE Socket0 Imc2 = 0x0000000000000000
[SGX] LockUncoreM2mPrmrrs: Sgx M2M_PRMRR_MASK Socket0 Imc2 = 0x0000000000000400
[SGX] LockUncoreM2mPrmrrs: Sgx M2M_PRMRR_BASE Socket0 Imc3 = 0x0000000000000000
[SGX] LockUncoreM2mPrmrrs: Sgx M2M_PRMRR_MASK Socket0 Imc3 = 0x0000000000000400
SocketIndex = 1
[SGX] LockUncoreM2mPrmrrs: Sgx M2M_PRMRR_BASE Socket1 Imc0 = 0x0000000000000000
[SGX] LockUncoreM2mPrmrrs: Sgx M2M_PRMRR_MASK Socket1 Imc0 = 0x0000000000000400
[SGX] LockUncoreM2mPrmrrs: Sgx M2M_PRMRR_BASE Socket1 Imc1 = 0x0000000000000000
[SGX] LockUncoreM2mPrmrrs: Sgx M2M_PRMRR_MASK Socket1 Imc1 = 0x0000000000000400
[SGX] LockUncoreM2mPrmrrs: Sgx M2M_PRMRR_BASE Socket1 Imc2 = 0x0000000000000000
[SGX] LockUncoreM2mPrmrrs: Sgx M2M_PRMRR_MASK Socket1 Imc2 = 0x0000000000000400
[SGX] LockUncoreM2mPrmrrs: Sgx M2M_PRMRR_BASE Socket1 Imc3 = 0x0000000000000000
[SGX] LockUncoreM2mPrmrrs: Sgx M2M_PRMRR_MASK Socket1 Imc3 = 0x0000000000000400
LockUncoreM2mPrmrrs END
SgxDisabledFlow exit
PROGRESS CODE: V03020003 I0
PROGRESS CODE: V03020002 I0
PEI PPM Initialization Entry
::PEI Power Management CSR, B2P and TPMI Programming
Data received from mailbox: 0x20000802
Data received from mailbox: 0x20000902
InitializeUfsMeshBoostConfig() Not supported or not enabled, Exit
Data received from mailbox: 0x20000802
Data received from mailbox: 0x20000902
InitializeUfsMeshBoostConfig() Not supported or not enabled, Exit
PROGRESS CODE: V03020003 I0
PROGRESS CODE: V03020002 I0
[NEW] FeatureName: AESNI
[NEW] FeatureName: MWAIT
[NEW] FeatureName: ACPI
[NEW] FeatureName: EIST
[NEW] FeatureName: FastStrings
[NEW] FeatureName: Lock Feature Control Register
[NEW] FeatureName: SMX
[NEW] FeatureName: VMX
[NEW] FeatureName: Limit CpuId Maximum Value
[NEW] FeatureName: Machine Check Enable
[NEW] FeatureName: Machine Check Architect
[NEW] FeatureName: MCG_CTL
[NEW] FeatureName: Pending Break
[NEW] FeatureName: C1E
[NEW] FeatureName: X2Apic
[NEW] FeatureName: PPIN
[NEW] FeatureName: LMCE
[NEW] FeatureName: Proc Trace
[OVERRIDE] FeatureName: ACPI
[OVERRIDE] FeatureName: EIST
[OVERRIDE] FeatureName: FastStrings
[OVERRIDE] FeatureName: Lock Feature Control Register
[OVERRIDE] FeatureName: Limit CpuId Maximum Value
[OVERRIDE] FeatureName: Pending Break
[OVERRIDE] FeatureName: C1E
[OVERRIDE] FeatureName: PPIN
[OVERRIDE] FeatureName: LMCE
[OVERRIDE] FeatureName: Proc Trace
[NEW] FeatureName: L1 Next Page Prefetcher
[NEW] FeatureName: DCU Streamer Prefetcher
[NEW] FeatureName: DCU IP Prefetcher
[NEW] FeatureName: Mlc Streamer Prefetcher
[NEW] FeatureName: Mlc Spatial Prefetcher
[NEW] FeatureName: AMP Prefetcher
[NEW] FeatureName: Three Strike Counter
[NEW] FeatureName: DBP-F
[NEW] FeatureName: Energy Performance Bias
[NEW] FeatureName: C State
[NEW] FeatureName: Thermal management
[NEW] FeatureName: SncInit
[NEW] FeatureName: MbmInit
[NEW] FeatureName: IioLlcWays
[NEW] FeatureName: AcSplitLock
[NEW] FeatureName: CrashDataGprs
:IioLlcWays: Socket = 0
Capid5Csr = 0x6700000B iio_llcconfig_en (Bit[1]) = 1
:IioLlcWays: Socket = 1
Capid5Csr = 0x6700000B iio_llcconfig_en (Bit[1]) = 1
Processor Info: Package: 2, MaxCore : 40, MaxThread: 2
P00: Thread Count = 80
P00 C0000, Thread Count = 2
P00 C0001, Thread Count = 2
P00 C0002, Thread Count = 2
P00 C0003, Thread Count = 2
P00 C0004, Thread Count = 2
P00 C0005, Thread Count = 2
P00 C0006, Thread Count = 2
P00 C0007, Thread Count = 2
P00 C0008, Thread Count = 2
P00 C0009, Thread Count = 2
P00 C0010, Thread Count = 2
P00 C0011, Thread Count = 2
P00 C0012, Thread Count = 2
P00 C0013, Thread Count = 2
P00 C0014, Thread Count = 2
P00 C0015, Thread Count = 2
P00 C0016, Thread Count = 2
P00 C0017, Thread Count = 2
P00 C0018, Thread Count = 2
P00 C0019, Thread Count = 2
P00 C0020, Thread Count = 2
P00 C0021, Thread Count = 2
P00 C0022, Thread Count = 2
P00 C0023, Thread Count = 2
P00 C0024, Thread Count = 2
P00 C0025, Thread Count = 2
P00 C0026, Thread Count = 2
P00 C0027, Thread Count = 2
P00 C0028, Thread Count = 2
P00 C0029, Thread Count = 2
P00 C0030, Thread Count = 2
P00 C0031, Thread Count = 2
P00 C0032, Thread Count = 2
P00 C0033, Thread Count = 2
P00 C0034, Thread Count = 2
P00 C0035, Thread Count = 2
P00 C0036, Thread Count = 2
P00 C0037, Thread Count = 2
P00 C0038, Thread Count = 2
P00 C0039, Thread Count = 2
P01: Thread Count = 80
P01 C0000, Thread Count = 2
P01 C0001, Thread Count = 2
P01 C0002, Thread Count = 2
P01 C0003, Thread Count = 2
P01 C0004, Thread Count = 2
P01 C0005, Thread Count = 2
P01 C0006, Thread Count = 2
P01 C0007, Thread Count = 2
P01 C0008, Thread Count = 2
P01 C0009, Thread Count = 2
P01 C0010, Thread Count = 2
P01 C0011, Thread Count = 2
P01 C0012, Thread Count = 2
P01 C0013, Thread Count = 2
P01 C0014, Thread Count = 2
P01 C0015, Thread Count = 2
P01 C0016, Thread Count = 2
P01 C0017, Thread Count = 2
P01 C0018, Thread Count = 2
P01 C0019, Thread Count = 2
P01 C0020, Thread Count = 2
P01 C0021, Thread Count = 2
P01 C0022, Thread Count = 2
P01 C0023, Thread Count = 2
P01 C0024, Thread Count = 2
P01 C0025, Thread Count = 2
P01 C0026, Thread Count = 2
P01 C0027, Thread Count = 2
P01 C0028, Thread Count = 2
P01 C0029, Thread Count = 2
P01 C0030, Thread Count = 2
P01 C0031, Thread Count = 2
P01 C0032, Thread Count = 2
P01 C0033, Thread Count = 2
P01 C0034, Thread Count = 2
P01 C0035, Thread Count = 2
P01 C0036, Thread Count = 2
P01 C0037, Thread Count = 2
P01 C0038, Thread Count = 2
P01 C0039, Thread Count = 2
Last CPU features list...
[Enable ] FeatureName: AESNI
[Enable ] FeatureName: MWAIT
[Unsupport] FeatureName: ACPI
[Enable ] FeatureName: EIST
[Enable ] FeatureName: FastStrings
[Enable ] FeatureName: VMX
[Unsupport] FeatureName: LMCE
[Disable ] FeatureName: SMX
[Unsupport] FeatureName: Lock Feature Control Register
[Unsupport] FeatureName: Limit CpuId Maximum Value
[Enable ] FeatureName: Machine Check Enable
[Enable ] FeatureName: Machine Check Architect
[Unsupport] FeatureName: MCG_CTL
[Unsupport] FeatureName: Pending Break
[Unsupport] FeatureName: C1E
[Enable ] FeatureName: X2Apic
[Enable ] FeatureName: PPIN
[Unsupport] FeatureName: Proc Trace
[Unsupport] FeatureName: L1 Next Page Prefetcher
[Enable ] FeatureName: DCU Streamer Prefetcher
[Enable ] FeatureName: DCU IP Prefetcher
[Enable ] FeatureName: Mlc Streamer Prefetcher
[Enable ] FeatureName: Mlc Spatial Prefetcher
[Disable ] FeatureName: AMP Prefetcher
[Enable ] FeatureName: Three Strike Counter
[Disable ] FeatureName: DBP-F
[Enable ] FeatureName: Energy Performance Bias
[Enable ] FeatureName: C State
[Enable ] FeatureName: Thermal management
[Enable ] FeatureName: SncInit
[Enable ] FeatureName: MbmInit
[Disable ] FeatureName: IioLlcWays
[Unsupport] FeatureName: AcSplitLock
[Unsupport] FeatureName: CrashDataGprs
PcdCpuFeaturesCapability:
D5 31 60 E9 F1 0D 00 00
Origin PcdCpuFeaturesSetting:
D5 70 60 C5 F0 0D 00 00
Final PcdCpuFeaturesSetting:
D5 30 60 C1 F0 0D 00 00
:SNC: Socket = 0, Processor = 0
SncConfigMsr = 0xA
SncBaseCsr [0x0] = 0xFFF0000
SncBaseCsr [0x1] = 0x1FE00022
SncBaseCsr [0x2] = 0x42
SncBaseCsr [0x3] = 0x62
SncBaseCsr [0x4] = 0x82
SncConfigCsr = 0xF
:MBM: S0 Processor = 0, LlcQosMonEnable = 1
ChasPerCluster = 13, ChaThresholdWithinCluster = 12, CorrectionFactorHi = 123 CorrectionFactorLo = 98
Dump final value for PcdCpuFeaturesSetting:
D5 30 60 C1 F0 0D 00 00
RegisterTable->TableLength = 71
Processor: 0000: Index 0000, MSR : 0000013C, Bit Start: 00, Bit Length: 02, Value: 0000000000000001
Processor: 0000: Index 0001, MSR : 000001A0, Bit Start: 18, Bit Length: 01, Value: 0000000000000001
Processor: 0000: Index 0002, SEMAP: Package
Processor: 0000: Index 0003, MSR : 000001A0, Bit Start: 16, Bit Length: 01, Value: 0000000000000001
Processor: 0000: Index 0004, SEMAP: Package
Processor: 0000: Index 0005, SEMAP: Package
Processor: 0000: Index 0006, MSR : 000001A0, Bit Start: 38, Bit Length: 01, Value: 0000000000000000
Processor: 0000: Index 0007, SEMAP: Package
Processor: 0000: Index 0008, MSR : 00000199, Bit Start: 08, Bit Length: 07, Value: 0000000000000011
Processor: 0000: Index 0009, MSR : 000001A0, Bit Start: 00, Bit Length: 01, Value: 0000000000000001
Processor: 0000: Index 0010, MSR : 0000003A, Bit Start: 02, Bit Length: 01, Value: 0000000000000001
Processor: 0000: Index 0011, CR : 00000004, Bit Start: 14, Bit Length: 01, Value: 0000000000000000
Processor: 0000: Index 0012, MSR : 0000003A, Bit Start: 08, Bit Length: 07, Value: 0000000000000000
Processor: 0000: Index 0013, MSR : 0000003A, Bit Start: 15, Bit Length: 01, Value: 0000000000000000
Processor: 0000: Index 0014, MSR : 0000003A, Bit Start: 01, Bit Length: 01, Value: 0000000000000000
Processor: 0000: Index 0015, CR : 00000004, Bit Start: 06, Bit Length: 01, Value: 0000000000000001
Processor: 0000: Index 0016, MSR : 00000400, Bit Start: 00, Bit Length: 64, Value: FFFFFFFFFFFFFFFF
Processor: 0000: Index 0017, MSR : 00000404, Bit Start: 00, Bit Length: 64, Value: FFFFFFFFFFFFFFFF
Processor: 0000: Index 0018, MSR : 00000408, Bit Start: 00, Bit Length: 64, Value: FFFFFFFFFFFFFFFF
Processor: 0000: Index 0019, MSR : 0000040C, Bit Start: 00, Bit Length: 64, Value: FFFFFFFFFFFFFFFF
Processor: 0000: Index 0020, MSR : 00000410, Bit Start: 00, Bit Length: 64, Value: FFFFFFFFFFFFFFFF
Processor: 0000: Index 0021, MSR : 00000414, Bit Start: 00, Bit Length: 64, Value: FFFFFFFFFFFFFFFF
Processor: 0000: Index 0022, MSR : 00000418, Bit Start: 00, Bit Length: 64, Value: FFFFFFFFFFFFFFFF
Processor: 0000: Index 0023, MSR : 0000041C, Bit Start: 00, Bit Length: 64, Value: FFFFFFFFFFFFFFFF
Processor: 0000: Index 0024, MSR : 00000420, Bit Start: 00, Bit Length: 64, Value: FFFFFFFFFFFFFFFF
Processor: 0000: Index 0025, MSR : 00000424, Bit Start: 00, Bit Length: 64, Value: FFFFFFFFFFFFFFFF
Processor: 0000: Index 0026, MSR : 00000428, Bit Start: 00, Bit Length: 64, Value: FFFFFFFFFFFFFFFF
Processor: 0000: Index 0027, MSR : 0000042C, Bit Start: 00, Bit Length: 64, Value: FFFFFFFFFFFFFFFF
Processor: 0000: Index 0028, MSR : 00000430, Bit Start: 00, Bit Length: 64, Value: FFFFFFFFFFFFFFFF
Processor: 0000: Index 0029, MSR : 00000434, Bit Start: 00, Bit Length: 64, Value: FFFFFFFFFFFFFFFF
Processor: 0000: Index 0030, MSR : 00000438, Bit Start: 00, Bit Length: 64, Value: FFFFFFFFFFFFFFFF
Processor: 0000: Index 0031, MSR : 0000043C, Bit Start: 00, Bit Length: 64, Value: FFFFFFFFFFFFFFFF
Processor: 0000: Index 0032, MSR : 00000440, Bit Start: 00, Bit Length: 64, Value: FFFFFFFFFFFFFFFF
Processor: 0000: Index 0033, MSR : 00000444, Bit Start: 00, Bit Length: 64, Value: FFFFFFFFFFFFFFFF
Processor: 0000: Index 0034, MSR : 00000448, Bit Start: 00, Bit Length: 64, Value: FFFFFFFFFFFFFFFF
Processor: 0000: Index 0035, MSR : 0000044C, Bit Start: 00, Bit Length: 64, Value: FFFFFFFFFFFFFFFF
Processor: 0000: Index 0036, MSR : 00000450, Bit Start: 00, Bit Length: 64, Value: FFFFFFFFFFFFFFFF
Processor: 0000: Index 0037, MSR : 00000454, Bit Start: 00, Bit Length: 64, Value: FFFFFFFFFFFFFFFF
Processor: 0000: Index 0038, MSR : 00000458, Bit Start: 00, Bit Length: 64, Value: FFFFFFFFFFFFFFFF
Processor: 0000: Index 0039, MSR : 0000045C, Bit Start: 00, Bit Length: 64, Value: FFFFFFFFFFFFFFFF
Processor: 0000: Index 0040, MSR : 00000460, Bit Start: 00, Bit Length: 64, Value: FFFFFFFFFFFFFFFF
Processor: 0000: Index 0041, MSR : 00000464, Bit Start: 00, Bit Length: 64, Value: FFFFFFFFFFFFFFFF
Processor: 0000: Index 0042, MSR : 00000468, Bit Start: 00, Bit Length: 64, Value: FFFFFFFFFFFFFFFF
Processor: 0000: Index 0043, MSR : 0000046C, Bit Start: 00, Bit Length: 64, Value: FFFFFFFFFFFFFFFF
Processor: 0000: Index 0044, MSR : 00000470, Bit Start: 00, Bit Length: 64, Value: FFFFFFFFFFFFFFFF
Processor: 0000: Index 0045, MSR : 00000474, Bit Start: 00, Bit Length: 64, Value: FFFFFFFFFFFFFFFF
Processor: 0000: Index 0046, MSR : 00000478, Bit Start: 00, Bit Length: 64, Value: FFFFFFFFFFFFFFFF
Processor: 0000: Index 0047, MSR : 0000047C, Bit Start: 00, Bit Length: 64, Value: FFFFFFFFFFFFFFFF
Processor: 0000: Index 0048, MSR : 0000001B, Bit Start: 10, Bit Length: 01, Value: 0000000000000001
Processor: 0000: Index 0049, MSR : 0000004E, Bit Start: 00, Bit Length: 64, Value: 0000000000000002
Processor: 0000: Index 0050, CACHE: 00000000, Bit Start: 00, Bit Length: 01, Value: 0000000000000000
Processor: 0000: Index 0051, MSR : 000001A4, Bit Start: 05, Bit Length: 01, Value: 0000000000000001
Processor: 0000: Index 0052, CACHE: 00000000, Bit Start: 00, Bit Length: 01, Value: 0000000000000001
Processor: 0000: Index 0053, MSR : 000001A4, Bit Start: 11, Bit Length: 01, Value: 0000000000000000
Processor: 0000: Index 0054, MSR : 0000006D, Bit Start: 02, Bit Length: 02, Value: 0000000000000000
Processor: 0000: Index 0055, MSR : 000001FC, Bit Start: 18, Bit Length: 01, Value: 0000000000000001
Processor: 0000: Index 0056, SEMAP: Package
Processor: 0000: Index 0057, MSR : 000001B0, Bit Start: 00, Bit Length: 04, Value: 0000000000000000
Processor: 0000: Index 0058, MSR : 000000E2, Bit Start: 00, Bit Length: 64, Value: 0000000014000403
Processor: 0000: Index 0059, MSR : 000000E4, Bit Start: 00, Bit Length: 64, Value: 0000000000010514
Processor: 0000: Index 0060, MSR : 000001A0, Bit Start: 03, Bit Length: 01, Value: 0000000000000001
Processor: 0000: Index 0061, MSR : 000001AA, Bit Start: 22, Bit Length: 01, Value: 0000000000000001
Processor: 0000: Index 0062, MSR : 000001A2, Bit Start: 00, Bit Length: 64, Value: 0000000080640800
Processor: 0000: Index 0063, MSR : 00000153, Bit Start: 00, Bit Length: 16, Value: 0000000000000000
Processor: 0000: Index 0064, MSR : 00000154, Bit Start: 00, Bit Length: 16, Value: 0000000000000022
Processor: 0000: Index 0065, MSR : 00000155, Bit Start: 00, Bit Length: 16, Value: 0000000000000042
Processor: 0000: Index 0066, MSR : 00000156, Bit Start: 00, Bit Length: 16, Value: 0000000000000062
Processor: 0000: Index 0067, MSR : 00000157, Bit Start: 00, Bit Length: 16, Value: 0000000000000082
Processor: 0000: Index 0068, MSR : 00000159, Bit Start: 00, Bit Length: 30, Value: 0000000000000000
Processor: 0000: Index 0069, MSR : 00000152, Bit Start: 00, Bit Length: 64, Value: 000000000000000A
Processor: 0000: Index 0070, MSR : 00000CA1, Bit Start: 00, Bit Length: 32, Value: 00000000627B0C0D
Dump final value for PcdCpuFeaturesSetting:
D5 30 60 C1 F0 0D 00 00
:SNC: Socket = 0, Processor = 2
SncConfigMsr = 0xA
SncBaseCsr [0x0] = 0xFFF0000
SncBaseCsr [0x1] = 0x1FE00022
SncBaseCsr [0x2] = 0x42
SncBaseCsr [0x3] = 0x62
SncBaseCsr [0x4] = 0x82
SncConfigCsr = 0xF
Dump final value for PcdCpuFeaturesSetting:
D5 30 60 C1 F0 0D 00 00
Dump final value for PcdCpuFeaturesSetting:
D5 30 60 C1 F0 0D 00 00
:SNC: Socket = 0, Processor = 4
SncConfigMsr = 0xA
SncBaseCsr [0x0] = 0xFFF0000
SncBaseCsr [0x1] = 0x1FE00022
SncBaseCsr [0x2] = 0x42
SncBaseCsr [0x3] = 0x62
SncBaseCsr [0x4] = 0x82
SncConfigCsr = 0xF
Dump final value for PcdCpuFeaturesSetting:
D5 30 60 C1 F0 0D 00 00
Dump final value for PcdCpuFeaturesSetting:
D5 30 60 C1 F0 0D 00 00
:SNC: Socket = 0, Processor = 6
SncConfigMsr = 0xA
SncBaseCsr [0x0] = 0xFFF0000
SncBaseCsr [0x1] = 0x1FE00022
SncBaseCsr [0x2] = 0x42
SncBaseCsr [0x3] = 0x62
SncBaseCsr [0x4] = 0x82
SncConfigCsr = 0xF
Dump final value for PcdCpuFeaturesSetting:
D5 30 60 C1 F0 0D 00 00
Dump final value for PcdCpuFeaturesSetting:
D5 30 60 C1 F0 0D 00 00
:SNC: Socket = 0, Processor = 8
SncConfigMsr = 0xA
SncBaseCsr [0x0] = 0xFFF0000
SncBaseCsr [0x1] = 0x1FE00022
SncBaseCsr [0x2] = 0x42
SncBaseCsr [0x3] = 0x62
SncBaseCsr [0x4] = 0x82
SncConfigCsr = 0xF
Dump final value for PcdCpuFeaturesSetting:
D5 30 60 C1 F0 0D 00 00
Dump final value for PcdCpuFeaturesSetting:
D5 30 60 C1 F0 0D 00 00
:SNC: Socket = 0, Processor = 10
SncConfigMsr = 0xA
SncBaseCsr [0x0] = 0xFFF0000
SncBaseCsr [0x1] = 0x1FE00022
SncBaseCsr [0x2] = 0x42
SncBaseCsr [0x3] = 0x62
SncBaseCsr [0x4] = 0x82
SncConfigCsr = 0xF
Dump final value for PcdCpuFeaturesSetting:
D5 30 60 C1 F0 0D 00 00
Dump final value for PcdCpuFeaturesSetting:
D5 30 60 C1 F0 0D 00 00
:SNC: Socket = 0, Processor = 12
SncConfigMsr = 0xA
SncBaseCsr [0x0] = 0xFFF0000
SncBaseCsr [0x1] = 0x1FE00022
SncBaseCsr [0x2] = 0x42
SncBaseCsr [0x3] = 0x62
SncBaseCsr [0x4] = 0x82
SncConfigCsr = 0xF
Dump final value for PcdCpuFeaturesSetting:
D5 30 60 C1 F0 0D 00 00
Dump final value for PcdCpuFeaturesSetting:
D5 30 60 C1 F0 0D 00 00
:SNC: Socket = 0, Processor = 14
SncConfigMsr = 0xA
SncBaseCsr [0x0] = 0xFFF0000
SncBaseCsr [0x1] = 0x1FE00022
SncBaseCsr [0x2] = 0x42
SncBaseCsr [0x3] = 0x62
SncBaseCsr [0x4] = 0x82
SncConfigCsr = 0xF
Dump final value for PcdCpuFeaturesSetting:
D5 30 60 C1 F0 0D 00 00
Dump final value for PcdCpuFeaturesSetting:
D5 30 60 C1 F0 0D 00 00
:SNC: Socket = 0, Processor = 16
SncConfigMsr = 0xA
SncBaseCsr [0x0] = 0xFFF0000
SncBaseCsr [0x1] = 0x1FE00022
SncBaseCsr [0x2] = 0x42
SncBaseCsr [0x3] = 0x62
SncBaseCsr [0x4] = 0x82
SncConfigCsr = 0xF
Dump final value for PcdCpuFeaturesSetting:
D5 30 60 C1 F0 0D 00 00
Dump final value for PcdCpuFeaturesSetting:
D5 30 60 C1 F0 0D 00 00
:SNC: Socket = 0, Processor = 18
SncConfigMsr = 0xA
SncBaseCsr [0x0] = 0xFFF0000
SncBaseCsr [0x1] = 0x1FE00022
SncBaseCsr [0x2] = 0x42
SncBaseCsr [0x3] = 0x62
SncBaseCsr [0x4] = 0x82
SncConfigCsr = 0xF
Dump final value for PcdCpuFeaturesSetting:
D5 30 60 C1 F0 0D 00 00
Dump final value for PcdCpuFeaturesSetting:
D5 30 60 C1 F0 0D 00 00
:SNC: Socket = 0, Processor = 20
SncConfigMsr = 0xA
SncBaseCsr [0x0] = 0xFFF0000
SncBaseCsr [0x1] = 0x1FE00022
SncBaseCsr [0x2] = 0x42
SncBaseCsr [0x3] = 0x62
SncBaseCsr [0x4] = 0x82
SncConfigCsr = 0xF
Dump final value for PcdCpuFeaturesSetting:
D5 30 60 C1 F0 0D 00 00
Dump final value for PcdCpuFeaturesSetting:
D5 30 60 C1 F0 0D 00 00
:SNC: Socket = 0, Processor = 22
SncConfigMsr = 0xA
SncBaseCsr [0x0] = 0xFFF0000
SncBaseCsr [0x1] = 0x1FE00022
SncBaseCsr [0x2] = 0x42
SncBaseCsr [0x3] = 0x62
SncBaseCsr [0x4] = 0x82
SncConfigCsr = 0xF
Dump final value for PcdCpuFeaturesSetting:
D5 30 60 C1 F0 0D 00 00
Dump final value for PcdCpuFeaturesSetting:
D5 30 60 C1 F0 0D 00 00
:SNC: Socket = 0, Processor = 24
SncConfigMsr = 0xA
SncBaseCsr [0x0] = 0xFFF0000
SncBaseCsr [0x1] = 0x1FE00022
SncBaseCsr [0x2] = 0x42
SncBaseCsr [0x3] = 0x62
SncBaseCsr [0x4] = 0x82
SncConfigCsr = 0xF
Dump final value for PcdCpuFeaturesSetting:
D5 30 60 C1 F0 0D 00 00
Dump final value for PcdCpuFeaturesSetting:
D5 30 60 C1 F0 0D 00 00
:SNC: Socket = 0, Processor = 26
SncConfigMsr = 0xA
SncBaseCsr [0x0] = 0xFFF0000
SncBaseCsr [0x1] = 0x1FE00022
SncBaseCsr [0x2] = 0x42
SncBaseCsr [0x3] = 0x62
SncBaseCsr [0x4] = 0x82
SncConfigCsr = 0xF
Dump final value for PcdCpuFeaturesSetting:
D5 30 60 C1 F0 0D 00 00
Dump final value for PcdCpuFeaturesSetting:
D5 30 60 C1 F0 0D 00 00
:SNC: Socket = 0, Processor = 28
SncConfigMsr = 0xA
SncBaseCsr [0x0] = 0xFFF0000
SncBaseCsr [0x1] = 0x1FE00022
SncBaseCsr [0x2] = 0x42
SncBaseCsr [0x3] = 0x62
SncBaseCsr [0x4] = 0x82
SncConfigCsr = 0xF
Dump final value for PcdCpuFeaturesSetting:
D5 30 60 C1 F0 0D 00 00
Dump final value for PcdCpuFeaturesSetting:
D5 30 60 C1 F0 0D 00 00
:SNC: Socket = 0, Processor = 30
SncConfigMsr = 0xA
SncBaseCsr [0x0] = 0xFFF0000
SncBaseCsr [0x1] = 0x1FE00022
SncBaseCsr [0x2] = 0x42
SncBaseCsr [0x3] = 0x62
SncBaseCsr [0x4] = 0x82
SncConfigCsr = 0xF
Dump final value for PcdCpuFeaturesSetting:
D5 30 60 C1 F0 0D 00 00
Dump final value for PcdCpuFeaturesSetting:
D5 30 60 C1 F0 0D 00 00
:SNC: Socket = 0, Processor = 32
SncConfigMsr = 0xA
SncBaseCsr [0x0] = 0xFFF0000
SncBaseCsr [0x1] = 0x1FE00022
SncBaseCsr [0x2] = 0x42
SncBaseCsr [0x3] = 0x62
SncBaseCsr [0x4] = 0x82
SncConfigCsr = 0xF
Dump final value for PcdCpuFeaturesSetting:
D5 30 60 C1 F0 0D 00 00
Dump final value for PcdCpuFeaturesSetting:
D5 30 60 C1 F0 0D 00 00
:SNC: Socket = 0, Processor = 34
SncConfigMsr = 0xA
SncBaseCsr [0x0] = 0xFFF0000
SncBaseCsr [0x1] = 0x1FE00022
SncBaseCsr [0x2] = 0x42
SncBaseCsr [0x3] = 0x62
SncBaseCsr [0x4] = 0x82
SncConfigCsr = 0xF
Dump final value for PcdCpuFeaturesSetting:
D5 30 60 C1 F0 0D 00 00
Dump final value for PcdCpuFeaturesSetting:
D5 30 60 C1 F0 0D 00 00
:SNC: Socket = 0, Processor = 36
SncConfigMsr = 0xA
SncBaseCsr [0x0] = 0xFFF0000
SncBaseCsr [0x1] = 0x1FE00022
SncBaseCsr [0x2] = 0x42
SncBaseCsr [0x3] = 0x62
SncBaseCsr [0x4] = 0x82
SncConfigCsr = 0xF
Dump final value for PcdCpuFeaturesSetting:
D5 30 60 C1 F0 0D 00 00
Dump final value for PcdCpuFeaturesSetting:
D5 30 60 C1 F0 0D 00 00
:SNC: Socket = 0, Processor = 38
SncConfigMsr = 0xA
SncBaseCsr [0x0] = 0xFFF0000
SncBaseCsr [0x1] = 0x1FE00022
SncBaseCsr [0x2] = 0x42
SncBaseCsr [0x3] = 0x62
SncBaseCsr [0x4] = 0x82
SncConfigCsr = 0xF
Dump final value for PcdCpuFeaturesSetting:
D5 30 60 C1 F0 0D 00 00
Dump final value for PcdCpuFeaturesSetting:
D5 30 60 C1 F0 0D 00 00
:SNC: Socket = 0, Processor = 40
SncConfigMsr = 0xA
SncBaseCsr [0x0] = 0xFFF0000
SncBaseCsr [0x1] = 0x1FE00022
SncBaseCsr [0x2] = 0x42
SncBaseCsr [0x3] = 0x62
SncBaseCsr [0x4] = 0x82
SncConfigCsr = 0xF
Dump final value for PcdCpuFeaturesSetting:
D5 30 60 C1 F0 0D 00 00
Dump final value for PcdCpuFeaturesSetting:
D5 30 60 C1 F0 0D 00 00
:SNC: Socket = 0, Processor = 42
SncConfigMsr = 0xA
SncBaseCsr [0x0] = 0xFFF0000
SncBaseCsr [0x1] = 0x1FE00022
SncBaseCsr [0x2] = 0x42
SncBaseCsr [0x3] = 0x62
SncBaseCsr [0x4] = 0x82
SncConfigCsr = 0xF
Dump final value for PcdCpuFeaturesSetting:
D5 30 60 C1 F0 0D 00 00
Dump final value for PcdCpuFeaturesSetting:
D5 30 60 C1 F0 0D 00 00
:SNC: Socket = 0, Processor = 44
SncConfigMsr = 0xA
SncBaseCsr [0x0] = 0xFFF0000
SncBaseCsr [0x1] = 0x1FE00022
SncBaseCsr [0x2] = 0x42
SncBaseCsr [0x3] = 0x62
SncBaseCsr [0x4] = 0x82
SncConfigCsr = 0xF
Dump final value for PcdCpuFeaturesSetting:
D5 30 60 C1 F0 0D 00 00
Dump final value for PcdCpuFeaturesSetting:
D5 30 60 C1 F0 0D 00 00
:SNC: Socket = 0, Processor = 46
SncConfigMsr = 0xA
SncBaseCsr [0x0] = 0xFFF0000
SncBaseCsr [0x1] = 0x1FE00022
SncBaseCsr [0x2] = 0x42
SncBaseCsr [0x3] = 0x62
SncBaseCsr [0x4] = 0x82
SncConfigCsr = 0xF
Dump final value for PcdCpuFeaturesSetting:
D5 30 60 C1 F0 0D 00 00
Dump final value for PcdCpuFeaturesSetting:
D5 30 60 C1 F0 0D 00 00
:SNC: Socket = 0, Processor = 48
SncConfigMsr = 0xA
SncBaseCsr [0x0] = 0xFFF0000
SncBaseCsr [0x1] = 0x1FE00022
SncBaseCsr [0x2] = 0x42
SncBaseCsr [0x3] = 0x62
SncBaseCsr [0x4] = 0x82
SncConfigCsr = 0xF
Dump final value for PcdCpuFeaturesSetting:
D5 30 60 C1 F0 0D 00 00
Dump final value for PcdCpuFeaturesSetting:
D5 30 60 C1 F0 0D 00 00
:SNC: Socket = 0, Processor = 50
SncConfigMsr = 0xA
SncBaseCsr [0x0] = 0xFFF0000
SncBaseCsr [0x1] = 0x1FE00022
SncBaseCsr [0x2] = 0x42
SncBaseCsr [0x3] = 0x62
SncBaseCsr [0x4] = 0x82
SncConfigCsr = 0xF
Dump final value for PcdCpuFeaturesSetting:
D5 30 60 C1 F0 0D 00 00
Dump final value for PcdCpuFeaturesSetting:
D5 30 60 C1 F0 0D 00 00
:SNC: Socket = 0, Processor = 52
SncConfigMsr = 0xA
SncBaseCsr [0x0] = 0xFFF0000
SncBaseCsr [0x1] = 0x1FE00022
SncBaseCsr [0x2] = 0x42
SncBaseCsr [0x3] = 0x62
SncBaseCsr [0x4] = 0x82
SncConfigCsr = 0xF
Dump final value for PcdCpuFeaturesSetting:
D5 30 60 C1 F0 0D 00 00
Dump final value for PcdCpuFeaturesSetting:
D5 30 60 C1 F0 0D 00 00
:SNC: Socket = 0, Processor = 54
SncConfigMsr = 0xA
SncBaseCsr [0x0] = 0xFFF0000
SncBaseCsr [0x1] = 0x1FE00022
SncBaseCsr [0x2] = 0x42
SncBaseCsr [0x3] = 0x62
SncBaseCsr [0x4] = 0x82
SncConfigCsr = 0xF
Dump final value for PcdCpuFeaturesSetting:
D5 30 60 C1 F0 0D 00 00
Dump final value for PcdCpuFeaturesSetting:
D5 30 60 C1 F0 0D 00 00
:SNC: Socket = 0, Processor = 56
SncConfigMsr = 0xA
SncBaseCsr [0x0] = 0xFFF0000
SncBaseCsr [0x1] = 0x1FE00022
SncBaseCsr [0x2] = 0x42
SncBaseCsr [0x3] = 0x62
SncBaseCsr [0x4] = 0x82
SncConfigCsr = 0xF
Dump final value for PcdCpuFeaturesSetting:
D5 30 60 C1 F0 0D 00 00
Dump final value for PcdCpuFeaturesSetting:
D5 30 60 C1 F0 0D 00 00
:SNC: Socket = 0, Processor = 58
SncConfigMsr = 0xA
SncBaseCsr [0x0] = 0xFFF0000
SncBaseCsr [0x1] = 0x1FE00022
SncBaseCsr [0x2] = 0x42
SncBaseCsr [0x3] = 0x62
SncBaseCsr [0x4] = 0x82
SncConfigCsr = 0xF
Dump final value for PcdCpuFeaturesSetting:
D5 30 60 C1 F0 0D 00 00
Dump final value for PcdCpuFeaturesSetting:
D5 30 60 C1 F0 0D 00 00
:SNC: Socket = 0, Processor = 60
SncConfigMsr = 0xA
SncBaseCsr [0x0] = 0xFFF0000
SncBaseCsr [0x1] = 0x1FE00022
SncBaseCsr [0x2] = 0x42
SncBaseCsr [0x3] = 0x62
SncBaseCsr [0x4] = 0x82
SncConfigCsr = 0xF
Dump final value for PcdCpuFeaturesSetting:
D5 30 60 C1 F0 0D 00 00
Dump final value for PcdCpuFeaturesSetting:
D5 30 60 C1 F0 0D 00 00
:SNC: Socket = 0, Processor = 62
SncConfigMsr = 0xA
SncBaseCsr [0x0] = 0xFFF0000
SncBaseCsr [0x1] = 0x1FE00022
SncBaseCsr [0x2] = 0x42
SncBaseCsr [0x3] = 0x62
SncBaseCsr [0x4] = 0x82
SncConfigCsr = 0xF
Dump final value for PcdCpuFeaturesSetting:
D5 30 60 C1 F0 0D 00 00
Dump final value for PcdCpuFeaturesSetting:
D5 30 60 C1 F0 0D 00 00
:SNC: Socket = 0, Processor = 64
SncConfigMsr = 0xA
SncBaseCsr [0x0] = 0xFFF0000
SncBaseCsr [0x1] = 0x1FE00022
SncBaseCsr [0x2] = 0x42
SncBaseCsr [0x3] = 0x62
SncBaseCsr [0x4] = 0x82
SncConfigCsr = 0xF
Dump final value for PcdCpuFeaturesSetting:
D5 30 60 C1 F0 0D 00 00
Dump final value for PcdCpuFeaturesSetting:
D5 30 60 C1 F0 0D 00 00
:SNC: Socket = 0, Processor = 66
SncConfigMsr = 0xA
SncBaseCsr [0x0] = 0xFFF0000
SncBaseCsr [0x1] = 0x1FE00022
SncBaseCsr [0x2] = 0x42
SncBaseCsr [0x3] = 0x62
SncBaseCsr [0x4] = 0x82
SncConfigCsr = 0xF
Dump final value for PcdCpuFeaturesSetting:
D5 30 60 C1 F0 0D 00 00
Dump final value for PcdCpuFeaturesSetting:
D5 30 60 C1 F0 0D 00 00
:SNC: Socket = 0, Processor = 68
SncConfigMsr = 0xA
SncBaseCsr [0x0] = 0xFFF0000
SncBaseCsr [0x1] = 0x1FE00022
SncBaseCsr [0x2] = 0x42
SncBaseCsr [0x3] = 0x62
SncBaseCsr [0x4] = 0x82
SncConfigCsr = 0xF
Dump final value for PcdCpuFeaturesSetting:
D5 30 60 C1 F0 0D 00 00
Dump final value for PcdCpuFeaturesSetting:
D5 30 60 C1 F0 0D 00 00
:SNC: Socket = 0, Processor = 70
SncConfigMsr = 0xA
SncBaseCsr [0x0] = 0xFFF0000
SncBaseCsr [0x1] = 0x1FE00022
SncBaseCsr [0x2] = 0x42
SncBaseCsr [0x3] = 0x62
SncBaseCsr [0x4] = 0x82
SncConfigCsr = 0xF
Dump final value for PcdCpuFeaturesSetting:
D5 30 60 C1 F0 0D 00 00
Dump final value for PcdCpuFeaturesSetting:
D5 30 60 C1 F0 0D 00 00
:SNC: Socket = 0, Processor = 72
SncConfigMsr = 0xA
SncBaseCsr [0x0] = 0xFFF0000
SncBaseCsr [0x1] = 0x1FE00022
SncBaseCsr [0x2] = 0x42
SncBaseCsr [0x3] = 0x62
SncBaseCsr [0x4] = 0x82
SncConfigCsr = 0xF
Dump final value for PcdCpuFeaturesSetting:
D5 30 60 C1 F0 0D 00 00
Dump final value for PcdCpuFeaturesSetting:
D5 30 60 C1 F0 0D 00 00
:SNC: Socket = 0, Processor = 74
SncConfigMsr = 0xA
SncBaseCsr [0x0] = 0xFFF0000
SncBaseCsr [0x1] = 0x1FE00022
SncBaseCsr [0x2] = 0x42
SncBaseCsr [0x3] = 0x62
SncBaseCsr [0x4] = 0x82
SncConfigCsr = 0xF
Dump final value for PcdCpuFeaturesSetting:
D5 30 60 C1 F0 0D 00 00
Dump final value for PcdCpuFeaturesSetting:
D5 30 60 C1 F0 0D 00 00
:SNC: Socket = 0, Processor = 76
SncConfigMsr = 0xA
SncBaseCsr [0x0] = 0xFFF0000
SncBaseCsr [0x1] = 0x1FE00022
SncBaseCsr [0x2] = 0x42
SncBaseCsr [0x3] = 0x62
SncBaseCsr [0x4] = 0x82
SncConfigCsr = 0xF
Dump final value for PcdCpuFeaturesSetting:
D5 30 60 C1 F0 0D 00 00
Dump final value for PcdCpuFeaturesSetting:
D5 30 60 C1 F0 0D 00 00
:SNC: Socket = 0, Processor = 78
SncConfigMsr = 0xA
SncBaseCsr [0x0] = 0xFFF0000
SncBaseCsr [0x1] = 0x1FE00022
SncBaseCsr [0x2] = 0x42
SncBaseCsr [0x3] = 0x62
SncBaseCsr [0x4] = 0x82
SncConfigCsr = 0xF
Dump final value for PcdCpuFeaturesSetting:
D5 30 60 C1 F0 0D 00 00
Dump final value for PcdCpuFeaturesSetting:
D5 30 60 C1 F0 0D 00 00
:SNC: Socket = 1, Processor = 80
SncConfigMsr = 0xA
SncBaseCsr [0x0] = 0xFFF0082
SncBaseCsr [0x1] = 0x1FE000A2
SncBaseCsr [0x2] = 0xC2
SncBaseCsr [0x3] = 0xE2
SncBaseCsr [0x4] = 0x102
SncConfigCsr = 0xF
:MBM: S1 Processor = 80, LlcQosMonEnable = 1
ChasPerCluster = 13, ChaThresholdWithinCluster = 12, CorrectionFactorHi = 123 CorrectionFactorLo = 98
Dump final value for PcdCpuFeaturesSetting:
D5 30 60 C1 F0 0D 00 00
Dump final value for PcdCpuFeaturesSetting:
D5 30 60 C1 F0 0D 00 00
:SNC: Socket = 1, Processor = 82
SncConfigMsr = 0xA
SncBaseCsr [0x0] = 0xFFF0082
SncBaseCsr [0x1] = 0x1FE000A2
SncBaseCsr [0x2] = 0xC2
SncBaseCsr [0x3] = 0xE2
SncBaseCsr [0x4] = 0x102
SncConfigCsr = 0xF
Dump final value for PcdCpuFeaturesSetting:
D5 30 60 C1 F0 0D 00 00
Dump final value for PcdCpuFeaturesSetting:
D5 30 60 C1 F0 0D 00 00
:SNC: Socket = 1, Processor = 84
SncConfigMsr = 0xA
SncBaseCsr [0x0] = 0xFFF0082
SncBaseCsr [0x1] = 0x1FE000A2
SncBaseCsr [0x2] = 0xC2
SncBaseCsr [0x3] = 0xE2
SncBaseCsr [0x4] = 0x102
SncConfigCsr = 0xF
Dump final value for PcdCpuFeaturesSetting:
D5 30 60 C1 F0 0D 00 00
Dump final value for PcdCpuFeaturesSetting:
D5 30 60 C1 F0 0D 00 00
:SNC: Socket = 1, Processor = 86
SncConfigMsr = 0xA
SncBaseCsr [0x0] = 0xFFF0082
SncBaseCsr [0x1] = 0x1FE000A2
SncBaseCsr [0x2] = 0xC2
SncBaseCsr [0x3] = 0xE2
SncBaseCsr [0x4] = 0x102
SncConfigCsr = 0xF
Dump final value for PcdCpuFeaturesSetting:
D5 30 60 C1 F0 0D 00 00
Dump final value for PcdCpuFeaturesSetting:
D5 30 60 C1 F0 0D 00 00
:SNC: Socket = 1, Processor = 88
SncConfigMsr = 0xA
SncBaseCsr [0x0] = 0xFFF0082
SncBaseCsr [0x1] = 0x1FE000A2
SncBaseCsr [0x2] = 0xC2
SncBaseCsr [0x3] = 0xE2
SncBaseCsr [0x4] = 0x102
SncConfigCsr = 0xF
Dump final value for PcdCpuFeaturesSetting:
D5 30 60 C1 F0 0D 00 00
Dump final value for PcdCpuFeaturesSetting:
D5 30 60 C1 F0 0D 00 00
:SNC: Socket = 1, Processor = 90
SncConfigMsr = 0xA
SncBaseCsr [0x0] = 0xFFF0082
SncBaseCsr [0x1] = 0x1FE000A2
SncBaseCsr [0x2] = 0xC2
SncBaseCsr [0x3] = 0xE2
SncBaseCsr [0x4] = 0x102
SncConfigCsr = 0xF
Dump final value for PcdCpuFeaturesSetting:
D5 30 60 C1 F0 0D 00 00
Dump final value for PcdCpuFeaturesSetting:
D5 30 60 C1 F0 0D 00 00
:SNC: Socket = 1, Processor = 92
SncConfigMsr = 0xA
SncBaseCsr [0x0] = 0xFFF0082
SncBaseCsr [0x1] = 0x1FE000A2
SncBaseCsr [0x2] = 0xC2
SncBaseCsr [0x3] = 0xE2
SncBaseCsr [0x4] = 0x102
SncConfigCsr = 0xF
Dump final value for PcdCpuFeaturesSetting:
D5 30 60 C1 F0 0D 00 00
Dump final value for PcdCpuFeaturesSetting:
D5 30 60 C1 F0 0D 00 00
:SNC: Socket = 1, Processor = 94
SncConfigMsr = 0xA
SncBaseCsr [0x0] = 0xFFF0082
SncBaseCsr [0x1] = 0x1FE000A2
SncBaseCsr [0x2] = 0xC2
SncBaseCsr [0x3] = 0xE2
SncBaseCsr [0x4] = 0x102
SncConfigCsr = 0xF
Dump final value for PcdCpuFeaturesSetting:
D5 30 60 C1 F0 0D 00 00
Dump final value for PcdCpuFeaturesSetting:
D5 30 60 C1 F0 0D 00 00
:SNC: Socket = 1, Processor = 96
SncConfigMsr = 0xA
SncBaseCsr [0x0] = 0xFFF0082
SncBaseCsr [0x1] = 0x1FE000A2
SncBaseCsr [0x2] = 0xC2
SncBaseCsr [0x3] = 0xE2
SncBaseCsr [0x4] = 0x102
SncConfigCsr = 0xF
Dump final value for PcdCpuFeaturesSetting:
D5 30 60 C1 F0 0D 00 00
Dump final value for PcdCpuFeaturesSetting:
D5 30 60 C1 F0 0D 00 00
:SNC: Socket = 1, Processor = 98
SncConfigMsr = 0xA
SncBaseCsr [0x0] = 0xFFF0082
SncBaseCsr [0x1] = 0x1FE000A2
SncBaseCsr [0x2] = 0xC2
SncBaseCsr [0x3] = 0xE2
SncBaseCsr [0x4] = 0x102
SncConfigCsr = 0xF
Dump final value for PcdCpuFeaturesSetting:
D5 30 60 C1 F0 0D 00 00
Dump final value for PcdCpuFeaturesSetting:
D5 30 60 C1 F0 0D 00 00
:SNC: Socket = 1, Processor = 100
SncConfigMsr = 0xA
SncBaseCsr [0x0] = 0xFFF0082
SncBaseCsr [0x1] = 0x1FE000A2
SncBaseCsr [0x2] = 0xC2
SncBaseCsr [0x3] = 0xE2
SncBaseCsr [0x4] = 0x102
SncConfigCsr = 0xF
Dump final value for PcdCpuFeaturesSetting:
D5 30 60 C1 F0 0D 00 00
Dump final value for PcdCpuFeaturesSetting:
D5 30 60 C1 F0 0D 00 00
:SNC: Socket = 1, Processor = 102
SncConfigMsr = 0xA
SncBaseCsr [0x0] = 0xFFF0082
SncBaseCsr [0x1] = 0x1FE000A2
SncBaseCsr [0x2] = 0xC2
SncBaseCsr [0x3] = 0xE2
SncBaseCsr [0x4] = 0x102
SncConfigCsr = 0xF
Dump final value for PcdCpuFeaturesSetting:
D5 30 60 C1 F0 0D 00 00
Dump final value for PcdCpuFeaturesSetting:
D5 30 60 C1 F0 0D 00 00
:SNC: Socket = 1, Processor = 104
SncConfigMsr = 0xA
SncBaseCsr [0x0] = 0xFFF0082
SncBaseCsr [0x1] = 0x1FE000A2
SncBaseCsr [0x2] = 0xC2
SncBaseCsr [0x3] = 0xE2
SncBaseCsr [0x4] = 0x102
SncConfigCsr = 0xF
Dump final value for PcdCpuFeaturesSetting:
D5 30 60 C1 F0 0D 00 00
Dump final value for PcdCpuFeaturesSetting:
D5 30 60 C1 F0 0D 00 00
:SNC: Socket = 1, Processor = 106
SncConfigMsr = 0xA
SncBaseCsr [0x0] = 0xFFF0082
SncBaseCsr [0x1] = 0x1FE000A2
SncBaseCsr [0x2] = 0xC2
SncBaseCsr [0x3] = 0xE2
SncBaseCsr [0x4] = 0x102
SncConfigCsr = 0xF
Dump final value for PcdCpuFeaturesSetting:
D5 30 60 C1 F0 0D 00 00
Dump final value for PcdCpuFeaturesSetting:
D5 30 60 C1 F0 0D 00 00
:SNC: Socket = 1, Processor = 108
SncConfigMsr = 0xA
SncBaseCsr [0x0] = 0xFFF0082
SncBaseCsr [0x1] = 0x1FE000A2
SncBaseCsr [0x2] = 0xC2
SncBaseCsr [0x3] = 0xE2
SncBaseCsr [0x4] = 0x102
SncConfigCsr = 0xF
Dump final value for PcdCpuFeaturesSetting:
D5 30 60 C1 F0 0D 00 00
Dump final value for PcdCpuFeaturesSetting:
D5 30 60 C1 F0 0D 00 00
:SNC: Socket = 1, Processor = 110
SncConfigMsr = 0xA
SncBaseCsr [0x0] = 0xFFF0082
SncBaseCsr [0x1] = 0x1FE000A2
SncBaseCsr [0x2] = 0xC2
SncBaseCsr [0x3] = 0xE2
SncBaseCsr [0x4] = 0x102
SncConfigCsr = 0xF
Dump final value for PcdCpuFeaturesSetting:
D5 30 60 C1 F0 0D 00 00
Dump final value for PcdCpuFeaturesSetting:
D5 30 60 C1 F0 0D 00 00
:SNC: Socket = 1, Processor = 112
SncConfigMsr = 0xA
SncBaseCsr [0x0] = 0xFFF0082
SncBaseCsr [0x1] = 0x1FE000A2
SncBaseCsr [0x2] = 0xC2
SncBaseCsr [0x3] = 0xE2
SncBaseCsr [0x4] = 0x102
SncConfigCsr = 0xF
Dump final value for PcdCpuFeaturesSetting:
D5 30 60 C1 F0 0D 00 00
Dump final value for PcdCpuFeaturesSetting:
D5 30 60 C1 F0 0D 00 00
:SNC: Socket = 1, Processor = 114
SncConfigMsr = 0xA
SncBaseCsr [0x0] = 0xFFF0082
SncBaseCsr [0x1] = 0x1FE000A2
SncBaseCsr [0x2] = 0xC2
SncBaseCsr [0x3] = 0xE2
SncBaseCsr [0x4] = 0x102
SncConfigCsr = 0xF
Dump final value for PcdCpuFeaturesSetting:
D5 30 60 C1 F0 0D 00 00
Dump final value for PcdCpuFeaturesSetting:
D5 30 60 C1 F0 0D 00 00
:SNC: Socket = 1, Processor = 116
SncConfigMsr = 0xA
SncBaseCsr [0x0] = 0xFFF0082
SncBaseCsr [0x1] = 0x1FE000A2
SncBaseCsr [0x2] = 0xC2
SncBaseCsr [0x3] = 0xE2
SncBaseCsr [0x4] = 0x102
SncConfigCsr = 0xF
Dump final value for PcdCpuFeaturesSetting:
D5 30 60 C1 F0 0D 00 00
Dump final value for PcdCpuFeaturesSetting:
D5 30 60 C1 F0 0D 00 00
:SNC: Socket = 1, Processor = 118
SncConfigMsr = 0xA
SncBaseCsr [0x0] = 0xFFF0082
SncBaseCsr [0x1] = 0x1FE000A2
SncBaseCsr [0x2] = 0xC2
SncBaseCsr [0x3] = 0xE2
SncBaseCsr [0x4] = 0x102
SncConfigCsr = 0xF
Dump final value for PcdCpuFeaturesSetting:
D5 30 60 C1 F0 0D 00 00
Dump final value for PcdCpuFeaturesSetting:
D5 30 60 C1 F0 0D 00 00
:SNC: Socket = 1, Processor = 120
SncConfigMsr = 0xA
SncBaseCsr [0x0] = 0xFFF0082
SncBaseCsr [0x1] = 0x1FE000A2
SncBaseCsr [0x2] = 0xC2
SncBaseCsr [0x3] = 0xE2
SncBaseCsr [0x4] = 0x102
SncConfigCsr = 0xF
Dump final value for PcdCpuFeaturesSetting:
D5 30 60 C1 F0 0D 00 00
Dump final value for PcdCpuFeaturesSetting:
D5 30 60 C1 F0 0D 00 00
:SNC: Socket = 1, Processor = 122
SncConfigMsr = 0xA
SncBaseCsr [0x0] = 0xFFF0082
SncBaseCsr [0x1] = 0x1FE000A2
SncBaseCsr [0x2] = 0xC2
SncBaseCsr [0x3] = 0xE2
SncBaseCsr [0x4] = 0x102
SncConfigCsr = 0xF
Dump final value for PcdCpuFeaturesSetting:
D5 30 60 C1 F0 0D 00 00
Dump final value for PcdCpuFeaturesSetting:
D5 30 60 C1 F0 0D 00 00
:SNC: Socket = 1, Processor = 124
SncConfigMsr = 0xA
SncBaseCsr [0x0] = 0xFFF0082
SncBaseCsr [0x1] = 0x1FE000A2
SncBaseCsr [0x2] = 0xC2
SncBaseCsr [0x3] = 0xE2
SncBaseCsr [0x4] = 0x102
SncConfigCsr = 0xF
Dump final value for PcdCpuFeaturesSetting:
D5 30 60 C1 F0 0D 00 00
Dump final value for PcdCpuFeaturesSetting:
D5 30 60 C1 F0 0D 00 00
:SNC: Socket = 1, Processor = 126
SncConfigMsr = 0xA
SncBaseCsr [0x0] = 0xFFF0082
SncBaseCsr [0x1] = 0x1FE000A2
SncBaseCsr [0x2] = 0xC2
SncBaseCsr [0x3] = 0xE2
SncBaseCsr [0x4] = 0x102
SncConfigCsr = 0xF
Dump final value for PcdCpuFeaturesSetting:
D5 30 60 C1 F0 0D 00 00
Dump final value for PcdCpuFeaturesSetting:
D5 30 60 C1 F0 0D 00 00
:SNC: Socket = 1, Processor = 128
SncConfigMsr = 0xA
SncBaseCsr [0x0] = 0xFFF0082
SncBaseCsr [0x1] = 0x1FE000A2
SncBaseCsr [0x2] = 0xC2
SncBaseCsr [0x3] = 0xE2
SncBaseCsr [0x4] = 0x102
SncConfigCsr = 0xF
Dump final value for PcdCpuFeaturesSetting:
D5 30 60 C1 F0 0D 00 00
Dump final value for PcdCpuFeaturesSetting:
D5 30 60 C1 F0 0D 00 00
:SNC: Socket = 1, Processor = 130
SncConfigMsr = 0xA
SncBaseCsr [0x0] = 0xFFF0082
SncBaseCsr [0x1] = 0x1FE000A2
SncBaseCsr [0x2] = 0xC2
SncBaseCsr [0x3] = 0xE2
SncBaseCsr [0x4] = 0x102
SncConfigCsr = 0xF
Dump final value for PcdCpuFeaturesSetting:
D5 30 60 C1 F0 0D 00 00
Dump final value for PcdCpuFeaturesSetting:
D5 30 60 C1 F0 0D 00 00
:SNC: Socket = 1, Processor = 132
SncConfigMsr = 0xA
SncBaseCsr [0x0] = 0xFFF0082
SncBaseCsr [0x1] = 0x1FE000A2
SncBaseCsr [0x2] = 0xC2
SncBaseCsr [0x3] = 0xE2
SncBaseCsr [0x4] = 0x102
SncConfigCsr = 0xF
Dump final value for PcdCpuFeaturesSetting:
D5 30 60 C1 F0 0D 00 00
Dump final value for PcdCpuFeaturesSetting:
D5 30 60 C1 F0 0D 00 00
:SNC: Socket = 1, Processor = 134
SncConfigMsr = 0xA
SncBaseCsr [0x0] = 0xFFF0082
SncBaseCsr [0x1] = 0x1FE000A2
SncBaseCsr [0x2] = 0xC2
SncBaseCsr [0x3] = 0xE2
SncBaseCsr [0x4] = 0x102
SncConfigCsr = 0xF
Dump final value for PcdCpuFeaturesSetting:
D5 30 60 C1 F0 0D 00 00
Dump final value for PcdCpuFeaturesSetting:
D5 30 60 C1 F0 0D 00 00
:SNC: Socket = 1, Processor = 136
SncConfigMsr = 0xA
SncBaseCsr [0x0] = 0xFFF0082
SncBaseCsr [0x1] = 0x1FE000A2
SncBaseCsr [0x2] = 0xC2
SncBaseCsr [0x3] = 0xE2
SncBaseCsr [0x4] = 0x102
SncConfigCsr = 0xF
Dump final value for PcdCpuFeaturesSetting:
D5 30 60 C1 F0 0D 00 00
Dump final value for PcdCpuFeaturesSetting:
D5 30 60 C1 F0 0D 00 00
:SNC: Socket = 1, Processor = 138
SncConfigMsr = 0xA
SncBaseCsr [0x0] = 0xFFF0082
SncBaseCsr [0x1] = 0x1FE000A2
SncBaseCsr [0x2] = 0xC2
SncBaseCsr [0x3] = 0xE2
SncBaseCsr [0x4] = 0x102
SncConfigCsr = 0xF
Dump final value for PcdCpuFeaturesSetting:
D5 30 60 C1 F0 0D 00 00
Dump final value for PcdCpuFeaturesSetting:
D5 30 60 C1 F0 0D 00 00
:SNC: Socket = 1, Processor = 140
SncConfigMsr = 0xA
SncBaseCsr [0x0] = 0xFFF0082
SncBaseCsr [0x1] = 0x1FE000A2
SncBaseCsr [0x2] = 0xC2
SncBaseCsr [0x3] = 0xE2
SncBaseCsr [0x4] = 0x102
SncConfigCsr = 0xF
Dump final value for PcdCpuFeaturesSetting:
D5 30 60 C1 F0 0D 00 00
Dump final value for PcdCpuFeaturesSetting:
D5 30 60 C1 F0 0D 00 00
:SNC: Socket = 1, Processor = 142
SncConfigMsr = 0xA
SncBaseCsr [0x0] = 0xFFF0082
SncBaseCsr [0x1] = 0x1FE000A2
SncBaseCsr [0x2] = 0xC2
SncBaseCsr [0x3] = 0xE2
SncBaseCsr [0x4] = 0x102
SncConfigCsr = 0xF
Dump final value for PcdCpuFeaturesSetting:
D5 30 60 C1 F0 0D 00 00
Dump final value for PcdCpuFeaturesSetting:
D5 30 60 C1 F0 0D 00 00
:SNC: Socket = 1, Processor = 144
SncConfigMsr = 0xA
SncBaseCsr [0x0] = 0xFFF0082
SncBaseCsr [0x1] = 0x1FE000A2
SncBaseCsr [0x2] = 0xC2
SncBaseCsr [0x3] = 0xE2
SncBaseCsr [0x4] = 0x102
SncConfigCsr = 0xF
Dump final value for PcdCpuFeaturesSetting:
D5 30 60 C1 F0 0D 00 00
Dump final value for PcdCpuFeaturesSetting:
D5 30 60 C1 F0 0D 00 00
:SNC: Socket = 1, Processor = 146
SncConfigMsr = 0xA
SncBaseCsr [0x0] = 0xFFF0082
SncBaseCsr [0x1] = 0x1FE000A2
SncBaseCsr [0x2] = 0xC2
SncBaseCsr [0x3] = 0xE2
SncBaseCsr [0x4] = 0x102
SncConfigCsr = 0xF
Dump final value for PcdCpuFeaturesSetting:
D5 30 60 C1 F0 0D 00 00
Dump final value for PcdCpuFeaturesSetting:
D5 30 60 C1 F0 0D 00 00
:SNC: Socket = 1, Processor = 148
SncConfigMsr = 0xA
SncBaseCsr [0x0] = 0xFFF0082
SncBaseCsr [0x1] = 0x1FE000A2
SncBaseCsr [0x2] = 0xC2
SncBaseCsr [0x3] = 0xE2
SncBaseCsr [0x4] = 0x102
SncConfigCsr = 0xF
Dump final value for PcdCpuFeaturesSetting:
D5 30 60 C1 F0 0D 00 00
Dump final value for PcdCpuFeaturesSetting:
D5 30 60 C1 F0 0D 00 00
:SNC: Socket = 1, Processor = 150
SncConfigMsr = 0xA
SncBaseCsr [0x0] = 0xFFF0082
SncBaseCsr [0x1] = 0x1FE000A2
SncBaseCsr [0x2] = 0xC2
SncBaseCsr [0x3] = 0xE2
SncBaseCsr [0x4] = 0x102
SncConfigCsr = 0xF
Dump final value for PcdCpuFeaturesSetting:
D5 30 60 C1 F0 0D 00 00
Dump final value for PcdCpuFeaturesSetting:
D5 30 60 C1 F0 0D 00 00
:SNC: Socket = 1, Processor = 152
SncConfigMsr = 0xA
SncBaseCsr [0x0] = 0xFFF0082
SncBaseCsr [0x1] = 0x1FE000A2
SncBaseCsr [0x2] = 0xC2
SncBaseCsr [0x3] = 0xE2
SncBaseCsr [0x4] = 0x102
SncConfigCsr = 0xF
Dump final value for PcdCpuFeaturesSetting:
D5 30 60 C1 F0 0D 00 00
Dump final value for PcdCpuFeaturesSetting:
D5 30 60 C1 F0 0D 00 00
:SNC: Socket = 1, Processor = 154
SncConfigMsr = 0xA
SncBaseCsr [0x0] = 0xFFF0082
SncBaseCsr [0x1] = 0x1FE000A2
SncBaseCsr [0x2] = 0xC2
SncBaseCsr [0x3] = 0xE2
SncBaseCsr [0x4] = 0x102
SncConfigCsr = 0xF
Dump final value for PcdCpuFeaturesSetting:
D5 30 60 C1 F0 0D 00 00
Dump final value for PcdCpuFeaturesSetting:
D5 30 60 C1 F0 0D 00 00
:SNC: Socket = 1, Processor = 156
SncConfigMsr = 0xA
SncBaseCsr [0x0] = 0xFFF0082
SncBaseCsr [0x1] = 0x1FE000A2
SncBaseCsr [0x2] = 0xC2
SncBaseCsr [0x3] = 0xE2
SncBaseCsr [0x4] = 0x102
SncConfigCsr = 0xF
Dump final value for PcdCpuFeaturesSetting:
D5 30 60 C1 F0 0D 00 00
Dump final value for PcdCpuFeaturesSetting:
D5 30 60 C1 F0 0D 00 00
:SNC: Socket = 1, Processor = 158
SncConfigMsr = 0xA
SncBaseCsr [0x0] = 0xFFF0082
SncBaseCsr [0x1] = 0x1FE000A2
SncBaseCsr [0x2] = 0xC2
SncBaseCsr [0x3] = 0xE2
SncBaseCsr [0x4] = 0x102
SncConfigCsr = 0xF
Dump final value for PcdCpuFeaturesSetting:
D5 30 60 C1 F0 0D 00 00
Dump final value for PcdCpuFeaturesSetting:
D5 30 60 C1 F0 0D 00 00
PROGRESS CODE: V03020003 I0
PROGRESS CODE: V03020002 I0
This is VMB data Parse Pei
Locate PPI Status : 0
Get Variable Status : 0 CoreMegaBlock : 0
CoreMegaBlock [0x00000000]
SizeBelow1MB [0x00000000]
SizeAbove1MB [0x00000000]
SizeAbove4GB [0x00000000]
BaseBelow1MB [0x00050000]
BaseAbove1MB [0x00100000]
BaseAbove4GB [100000000]
VMBdataDiscovered Ppi installation status: 0
PROGRESS CODE: V03020003 I0
PROGRESS CODE: V03020002 I0
This is Validation Mega block Pei
Blocks Count : 3
MegaBlocks in PEIM ...
VMB[0] Attr[4]Addr[50000]Size[0]
VMB[1] Attr[4]Addr[100000]Size[0]
VMB[2] Attr[4]Addr[100000000]Size[0]
PROGRESS CODE: V03020003 I0
PROGRESS CODE: V03020002 I0
UbaInitPeim: PlatformType=0x16
UbaInitPeim: PlatformType=0x16
UbaInitPeim: PlatformType=0x16
PROGRESS CODE: V03020003 I0
PROGRESS CODE: V03020002 I0
PROGRESS CODE: V03020003 I0
PROGRESS CODE: V03020002 I0
PROGRESS CODE: V03020003 I0
PROGRESS CODE: V03020002 I0
Lt Disabled - Disabling BIOS lock
FiaMuxRecordsCount = 0
FiaMuxRecordsCount = 0
FiaMuxRecordsCount = 0
PROGRESS CODE: V03020003 I0
ME UMA PostMem: SendDramInitDone (): InitStat = 0
[HECI Transport-1 PEI] Send pkt: 80140007
00: F0 01 00 00 00 00 00 00 - 00 00 00 00 00 00 00 00
10: 00 00 00 00
[HECI Transport-1 PEI] Got pkt: 80240007
00: F0 81 00 00 00 00 00 00 - 00 00 00 00 00 00 00 00
10: 00 00 00 00 00 00 00 00 - 00 00 00 00 00 04 00 00
20: 00 00 00 00
ME UMA PostMem: BiosAction = 4
ME UMA PostMem: MeDramInitDone Complete. Checking for reset...
[HECI Transport-1 PEI] Send pkt: 80010020
00: 01
[HECI Transport-1 PEI] Got pkt: 800B0020
00: 81 01 01 1D 92 9F 33 01 - 00 00 00
[HECI Transport-1 PEI] Send pkt: 80140008
00: 00 00 05 00 1F 00 00 00 - 00 00 00 00 00 00 00 00
10: 00 00 00 00
[HECI Transport-1 PEI] Got pkt: 805E0008
00: 00 00 05 00 1F 00 00 00 - 00 00 00 00 4A 00 00 00
10: 00 00 00 00 18 18 06 00 - 00 06 00 01 06 00 02 06
20: 00 03 56 00 04 56 00 05 - 56 00 06 56 00 07 5C 00
30: 08 7C 00 09 55 00 0A 55 - 00 0B 5B 00 0C 55 00 0D
40: 51 00 0E 51 00 0F 47 00 - 10 07 00 11 47 00 12 07
50: 00 13 47 00 14 07 00 15 - 47 00 16 07 00 17
PeiFiaMuxConfigInit: IOExpanders number = 0
PeiFiaMuxConfigInit: Request ME FIA MUX configuration fail with status = Not Ready
[HECI Control-1 PEI][HECI Transport-1 PEI] Send pkt: 80010020
00: 01
[HECI Transport-1 PEI] Got pkt: 800B0020
00: 81 01 01 1D 92 9F 33 01 - 00 00 00
Detected I/O Expanders: 0
IoExpanderInit - End
SDI#0 has HD-Audio device.
SDI#1 has no HD-Audio device.
SDI#2 has no HD-Audio device.
PROGRESS CODE: V03020002 I0
PROGRESS CODE: V03020003 I0
PROGRESS CODE: V03020002 I0
PROGRESS CODE: V03020003 I0
PROGRESS CODE: V03020002 I0
PROGRESS CODE: V03020003 I0
PROGRESS CODE: V03020002 I0
NearTdpLockOcPeimEntryPoint
BootMode = 0
ProcessorLtsxEnable is disabled
PROGRESS CODE: V03020003 I0
PROGRESS CODE: V03020002 I0
PROGRESS CODE: V03020003 I0
PROGRESS CODE: V03020002 I0
PROGRESS CODE: V03020003 I0
PROGRESS CODE: V03020002 I0
[FRU_TDX] _ProgramSeamrr BEGIN
[IP_CORE_MSR] IpCoreMsr3v0_ProgramSeamrr BEGIN
_InternalProgramSeamrr (Unsupported) (0x000)
_InternalProgramSeamrr (Unsupported) (0x002)
_InternalProgramSeamrr (Unsupported) (0x004)
_InternalProgramSeamrr (Unsupported) (0x006)
_InternalProgramSeamrr (Unsupported) (0x008)
_InternalProgramSeamrr (Unsupported) (0x00A)
_InternalProgramSeamrr (Unsupported) (0x00C)
_InternalProgramSeamrr (Unsupported) (0x00E)
_InternalProgramSeamrr (Unsupported) (0x010)
_InternalProgramSeamrr (Unsupported) (0x012)
_InternalProgramSeamrr (Unsupported) (0x014)
_InternalProgramSeamrr (Unsupported) (0x016)
_InternalProgramSeamrr (Unsupported) (0x018)
_InternalProgramSeamrr (Unsupported) (0x01A)
_InternalProgramSeamrr (Unsupported) (0x01C)
_InternalProgramSeamrr (Unsupported) (0x01E)
_InternalProgramSeamrr (Unsupported) (0x020)
_InternalProgramSeamrr (Unsupported) (0x022)
_InternalProgramSeamrr (Unsupported) (0x024)
_InternalProgramSeamrr (Unsupported) (0x026)
_InternalProgramSeamrr (Unsupported) (0x028)
_InternalProgramSeamrr (Unsupported) (0x02A)
_InternalProgramSeamrr (Unsupported) (0x02C)
_InternalProgramSeamrr (Unsupported) (0x02E)
_InternalProgramSeamrr (Unsupported) (0x030)
_InternalProgramSeamrr (Unsupported) (0x032)
_InternalProgramSeamrr (Unsupported) (0x034)
_InternalProgramSeamrr (Unsupported) (0x036)
_InternalProgramSeamrr (Unsupported) (0x038)
_InternalProgramSeamrr (Unsupported) (0x03A)
_InternalProgramSeamrr (Unsupported) (0x03C)
_InternalProgramSeamrr (Unsupported) (0x03E)
_InternalProgramSeamrr (Unsupported) (0x040)
_InternalProgramSeamrr (Unsupported) (0x042)
_InternalProgramSeamrr (Unsupported) (0x044)
_InternalProgramSeamrr (Unsupported) (0x046)
_InternalProgramSeamrr (Unsupported) (0x048)
_InternalProgramSeamrr (Unsupported) (0x04A)
_InternalProgramSeamrr (Unsupported) (0x04C)
_InternalProgramSeamrr (Unsupported) (0x04E)
_InternalProgramSeamrr (Unsupported) (0x050)
_InternalProgramSeamrr (Unsupported) (0x052)
_InternalProgramSeamrr (Unsupported) (0x054)
_InternalProgramSeamrr (Unsupported) (0x056)
_InternalProgramSeamrr (Unsupported) (0x058)
_InternalProgramSeamrr (Unsupported) (0x05A)
_InternalProgramSeamrr (Unsupported) (0x05C)
_InternalProgramSeamrr (Unsupported) (0x05E)
_InternalProgramSeamrr (Unsupported) (0x060)
_InternalProgramSeamrr (Unsupported) (0x062)
_InternalProgramSeamrr (Unsupported) (0x064)
_InternalProgramSeamrr (Unsupported) (0x066)
_InternalProgramSeamrr (Unsupported) (0x068)
_InternalProgramSeamrr (Unsupported) (0x06A)
_InternalProgramSeamrr (Unsupported) (0x06C)
_InternalProgramSeamrr (Unsupported) (0x06E)
_InternalProgramSeamrr (Unsupported) (0x070)
_InternalProgramSeamrr (Unsupported) (0x072)
_InternalProgramSeamrr (Unsupported) (0x074)
_InternalProgramSeamrr (Unsupported) (0x076)
_InternalProgramSeamrr (Unsupported) (0x078)
_InternalProgramSeamrr (Unsupported) (0x07A)
_InternalProgramSeamrr (Unsupported) (0x07C)
_InternalProgramSeamrr (Unsupported) (0x07E)
_InternalProgramSeamrr (Unsupported) (0x080)
_InternalProgramSeamrr (Unsupported) (0x082)
_InternalProgramSeamrr (Unsupported) (0x084)
_InternalProgramSeamrr (Unsupported) (0x086)
_InternalProgramSeamrr (Unsupported) (0x088)
_InternalProgramSeamrr (Unsupported) (0x08A)
_InternalProgramSeamrr (Unsupported) (0x08C)
_InternalProgramSeamrr (Unsupported) (0x08E)
_InternalProgramSeamrr (Unsupported) (0x090)
_InternalProgramSeamrr (Unsupported) (0x092)
_InternalProgramSeamrr (Unsupported) (0x094)
_InternalProgramSeamrr (Unsupported) (0x096)
_InternalProgramSeamrr (Unsupported) (0x098)
_InternalProgramSeamrr (Unsupported) (0x09A)
_InternalProgramSeamrr (Unsupported) (0x09C)
_InternalProgramSeamrr (Unsupported) (0x09E)
[IP_CORE_MSR] IpCoreMsr3v0_ProgramSeamrr END, Unsupported
[FRU_TDX] _ProgramSeamrr END (Unsupported)PROGRESS CODE: V03020003 I0
PROGRESS CODE: V03020002 I0
PROGRESS CODE: V03020003 I0
PROGRESS CODE: V03021001 I0
[SIO] Current system SIO exist bit:10
PROGRESS CODE: V03040003 I0
PDB = c:\efi\servergen2\intel\Build\EagleStreamRpPkg\DEBUG_VS2015x86\X64\ServerPlatformPkg\Universal\TraceHubStatusCodeHandler\RuntimeDxe\TraceHubStatusCodeHandlerRuntimeDxe\DEBUG\TraceHubStatusCodeHandlerRuntimeDxe.pdb
PROGRESS CODE: V03040002 I0
PROGRESS CODE: V03040003 I0
PDB = c:\efi\servergen2\intel\Build\EagleStreamRpPkg\DEBUG_VS2015x86\X64\ServerPlatformPkg\Universal\StatusCodeHandlerUsb\RuntimeDxe\StatusCodeHandlerRuntimeDxeUsb\DEBUG\StatusCodeHandlerRuntimeDxeUsb.pdb
PROGRESS CODE: V03040002 I0
PROGRESS CODE: V03040003 I0
PDB = c:\efi\servergen2\intel\Build\EagleStreamRpPkg\DEBUG_VS2015x86\X64\MdeModulePkg\Universal\Acpi\FirmwarePerformanceDataTableDxe\FirmwarePerformanceDxe\DEBUG\FirmwarePerformanceDxe.pdb
PROGRESS CODE: V03040002 I0
PROGRESS CODE: V03040003 I0
PDB = c:\efi\servergen2\intel\Build\EagleStreamRpPkg\DEBUG_VS2015x86\X64\ShellPkg\DynamicCommand\DpDynamicCommand\DpDynamicCommand\DEBUG\dpDynamicCommand.pdb
PROGRESS CODE: V03040002 I0
PROGRESS CODE: V03040003 I0
PDB = c:\efi\servergen2\intel\Build\EagleStreamRpPkg\DEBUG_VS2015x86\X64\EagleStreamOpenBoardPkg\Uba\BoardInit\Dxe\BoardInitDxe\DEBUG\BoardInitDxe.pdb
PROGRESS CODE: V03040002 I0
PROGRESS CODE: V03040003 I0
PDB = c:\efi\servergen2\intel\Build\EagleStreamRpPkg\DEBUG_VS2015x86\X64\EagleStreamRpPkg\Platform\Dxe\IioCxl2CedtDevIou\IioCxl2SsdtInstallDxe\DEBUG\IioCxl2SsdtInstallDxe.pdb
PROGRESS CODE: V03040002 I0
PROGRESS CODE: V03040003 I0
PDB = c:\efi\servergen2\intel\Build\EagleStreamRpPkg\DEBUG_VS2015x86\X64\ServerRestrictedPkg\VariableSmi\VariableSmiExportHii\DEBUG\VariableSmiExportHii.pdb
PROGRESS CODE: V03040002 I0
PROGRESS CODE: V03040003 I0
PDB = c:\efi\servergen2\intel\Build\EagleStreamRpPkg\DEBUG_VS2015x86\X64\ServerPlatformPkg\Platform\Dxe\ConsoleBdsUpdateDxe\ConsoleBdsUpdateDxe\DEBUG\ConsoleBdsUpdateDxe.pdb
PROGRESS CODE: V03040002 I0
PROGRESS CODE: V03040003 I0
PDB = c:\efi\servergen2\intel\Build\EagleStreamRpPkg\DEBUG_VS2015x86\X64\PrmPkg\PrmSsdtInstallDxe\PrmSsdtInstallDxe\DEBUG\PrmSsdtInstallDxe.pdb
PROGRESS CODE: V03040002 I0
PROGRESS CODE: V03040003 I0
PDB = c:\efi\servergen2\intel\Build\EagleStreamRpPkg\DEBUG_VS2015x86\X64\ServerPlatformPkg\Features\PrmPlatformSample\PrmSampleSsdtDxe\PrmSampleSsdtDxe\DEBUG\PrmSampleSsdtDxe.pdb
PROGRESS CODE: V03040002 I0
PROGRESS CODE: V03040003 I0
PDB = c:\efi\servergen2\intel\Build\EagleStreamRpPkg\DEBUG_VS2015x86\X64\ServerPlatformPkg\Features\PrmPeLoader\PrmPeLoaderConfigDxe\PrmPeLoaderConfigDxe\DEBUG\PrmPeLoaderConfigDxe.pdb
PROGRESS CODE: V03040002 I0
[PRM CONFIG] Entry
Error: Image at 0006B857000 start failed: Unsupported
PDB = c:\efi\servergen2\intel\Build\EagleStreamRpPkg\DEBUG_VS2015x86\X64\ServerPlatformPkg\Features\PrmPeLoader\PrmPeLoaderConfigDxe\PrmPeLoaderConfigDxe\DEBUG\PrmPeLoaderConfigDxe.pdb
PROGRESS CODE: V03040003 I0
PDB = c:\efi\servergen2\intel\Build\EagleStreamRpPkg\DEBUG_VS2015x86\X64\MdeModulePkg\Universal\SetupBrowserDxe\SetupBrowserDxe\DEBUG\SetupBrowser.pdb
PROGRESS CODE: V03040002 I0
PROGRESS CODE: V03040003 I0
PDB = c:\efi\servergen2\intel\Build\EagleStreamRpPkg\DEBUG_VS2015x86\X64\MdeModulePkg\Universal\SmbiosMeasurementDxe\SmbiosMeasurementDxe\DEBUG\SmbiosMeasurementDxe.pdb
PROGRESS CODE: V03040002 I0
PROGRESS CODE: V03040003 I0
PDB = c:\efi\servergen2\intel\Build\EagleStreamRpPkg\DEBUG_VS2015x86\X64\ServerSiliconPkg\Universal\Dxe\CxlInit\CxlCedt\CxlCedt\DEBUG\CxlCedt.pdb
PROGRESS CODE: V03040002 I0
PROGRESS CODE: V03040003 I0
PDB = c:\efi\servergen2\intel\Build\EagleStreamRpPkg\DEBUG_VS2015x86\X64\ServerSiliconPkg\Universal\Dxe\OobMsmDxe\OobMsmDxe\DEBUG\OobMsmDxeDriver.pdb
PROGRESS CODE: V03040002 I0
PROGRESS CODE: V03040003 I0
PDB = c:\efi\servergen2\intel\Build\EagleStreamRpPkg\DEBUG_VS2015x86\X64\ClientOneSiliconPkg\Product\EagleStream\SiInit\Dxe\SiInitDxe\DEBUG\SiInitDxe.pdb
PROGRESS CODE: V03040002 I0
PROGRESS CODE: V03040003 I0
PDB = c:\efi\servergen2\intel\Build\EagleStreamRpPkg\DEBUG_VS2015x86\X64\ClientOneSiliconPkg\IpBlock\Smbus\Dxe\SmbusDxe\DEBUG\SmbusDxe.pdb
PROGRESS CODE: V03040002 I0
PROGRESS CODE: V03040003 I0
PDB = c:\efi\servergen2\intel\Build\EagleStreamRpPkg\DEBUG_VS2015x86\X64\ClientOneSiliconPkg\IpBlock\Wdt\Dxe\WdtDxe\DEBUG\WdtDxe.pdb
PROGRESS CODE: V03040002 I0
PROGRESS CODE: V03040003 I0
PDB = c:\efi\servergen2\intel\Build\EagleStreamRpPkg\DEBUG_VS2015x86\X64\ClientOneSiliconPkg\IpBlock\Sps\Heci\HeciAccess\DxeSmm\HeciAccessDxe\DEBUG\HeciAccessDxe.pdb
PROGRESS CODE: V03040002 I0
PROGRESS CODE: V03040003 I0
PDB = c:\efi\servergen2\intel\Build\EagleStreamRpPkg\DEBUG_VS2015x86\X64\ClientOneSiliconPkg\Fru\EbgPch\PchInit\GpioV2ProtocolInit\Dxe\GpioV2ProtocolInitDxe\DEBUG\GpioV2ProtocolInitDxe.pdb
PROGRESS CODE: V03040002 I0
PROGRESS CODE: V03040003 I0
PDB = c:\efi\servergen2\intel\Build\EagleStreamRpPkg\DEBUG_VS2015x86\X64\EagleStreamOpenBoardPkg\Uba\UbaMain\Common\Dxe\SystemBoardInfoDxe\SystemBoardInfoDxe\DEBUG\SystemBoardInfo.pdb
PROGRESS CODE: V03040002 I0
PROGRESS CODE: V03040003 I0
PDB = c:\efi\servergen2\intel\Build\EagleStreamRpPkg\DEBUG_VS2015x86\X64\EagleStreamOpenBoardPkg\Uba\UbaMain\Common\Dxe\SystemConfigUpdateDxe\SystemConfigUpdateDxe\DEBUG\SystemConfigUpdate.pdb
PROGRESS CODE: V03040002 I0
PROGRESS CODE: V03040003 I0
PDB = c:\efi\servergen2\intel\Build\EagleStreamRpPkg\DEBUG_VS2015x86\X64\EagleStreamOpenBoardPkg\Uba\UbaMain\TypeArcherCityRP\Dxe\StaticSkuDataDxe\StaticSkuDataDxe\DEBUG\StaticSkuDataDxeArcherCityRP.pdb
PROGRESS CODE: V03040002 I0
PROGRESS CODE: V03040003 I0
PDB = c:\efi\servergen2\intel\Build\EagleStreamRpPkg\DEBUG_VS2015x86\X64\EagleStreamOpenBoardPkg\Uba\UbaMain\TypeArcherCityRP\Dxe\SetupCfgUpdateDxe\SetupCfgUpdateDxe\DEBUG\SetupConfigUpdateDxeArcherCityRP.pdb
PROGRESS CODE: V03040002 I0
PROGRESS CODE: V03040003 I0
PDB = c:\efi\servergen2\intel\Build\EagleStreamRpPkg\DEBUG_VS2015x86\X64\EagleStreamOpenBoardPkg\Uba\UbaMain\TypeArcherCityRP\Dxe\SmbiosDataUpdateDxe\SmbiosDataUpdateDxe\DEBUG\SmbiosDataUpdateDxeArcherCityRP.pdb
PROGRESS CODE: V03040002 I0
UBA:SmbiosDataUpdateEntry Image GUID=09813137-B2A5-4462-8A2A-48F77ECA31BF
PROGRESS CODE: V03040003 I0
PDB = c:\efi\servergen2\intel\Build\EagleStreamRpPkg\DEBUG_VS2015x86\X64\EagleStreamOpenBoardPkg\Uba\UbaMain\TypeArcherCityRP\Dxe\UsbOcUpdateDxe\UsbOcUpdateDxe\DEBUG\UsbOcUpdateDxeArcherCityRP.pdb
PROGRESS CODE: V03040002 I0
PROGRESS CODE: V03040003 I0
PDB = c:\efi\servergen2\intel\Build\EagleStreamRpPkg\DEBUG_VS2015x86\X64\ServerPlatformPkg\Platform\Dxe\PlatformType\PlatformType\DEBUG\PlatformType.pdb
PROGRESS CODE: V03040002 I0
PROGRESS CODE: V03040003 I0
PDB = c:\efi\servergen2\intel\Build\EagleStreamRpPkg\DEBUG_VS2015x86\X64\ServerPlatformPkg\Platform\Dxe\PlatformEarlyDxe\PlatformEarlyDxe\DEBUG\PlatformEarlyDxe.pdb
PROGRESS CODE: V03040002 I0
PROGRESS CODE: V03040003 I0
PDB = c:\efi\servergen2\intel\Build\EagleStreamRpPkg\DEBUG_VS2015x86\X64\ServerPlatformPkg\Platform\Dxe\OtaDxe\OtaDxe\DEBUG\OtaDxeDriver.pdb
PROGRESS CODE: V03040002 I0
[OtaDxe.c] OtaDxeDriverEntry() {
[OtaDxe.c] OtaDxeDriverEntry() -> Create OTA Event
[OtaDxe.c] OtaDxeDriverEntry() -> OTA Event creation: Success
[OtaDxe.c] OtaDxeDriverEntry() } Success
PROGRESS CODE: V03040003 I0
PDB = c:\efi\servergen2\intel\Build\EagleStreamRpPkg\DEBUG_VS2015x86\X64\ServerSecurityPkg\Pfr\Restricted\DebugTool\PxdDxe\DEBUG\PxdDxeDriver.pdb
PROGRESS CODE: V03040002 I0
[PxdDxe.c] PxdDxeDriverEntry() {
[PxdDxe.c] PxdDxeDriverEntry() } Success
PROGRESS CODE: V03040003 I0
PDB = c:\efi\servergen2\intel\Build\EagleStreamRpPkg\DEBUG_VS2015x86\X64\UefiCpuPkg\CpuDxe\CpuDxe\DEBUG\CpuDxe.pdb
PROGRESS CODE: V03040002 I0
ConvertPages: failed to find range A0000 - FFFFF
ConvertPages: failed to find range 77800000 - 7FFFFFFF
ConvertPages: failed to find range FC800000 - FE00FFFF
ConvertPages: failed to find range FE010000 - FE010FFF
ConvertPages: failed to find range FE011000 - FE7FFFFF
ConvertPages: failed to find range FEC00000 - FEC00FFF
ConvertPages: failed to find range FEC80000 - FED00FFF
PROGRESS CODE: V03040003 I0
PDB = c:\efi\servergen2\intel\Build\EagleStreamRpPkg\DEBUG_VS2015x86\X64\ServerPlatformPkg\Features\Bmc\PlatformHookSpiAccess\PlatformHookSpiAccessDxe\DEBUG\PlatformHookSpiAccessDxe.pdb
PROGRESS CODE: V03040002 I0
PROGRESS CODE: V03040003 I0
PDB = c:\efi\servergen2\intel\Build\EagleStreamRpPkg\DEBUG_VS2015x86\X64\MdeModulePkg\Universal\BdsDxe\BdsDxe\DEBUG\BdsDxe.pdb
PROGRESS CODE: V03040002 I0
PROGRESS CODE: V03040003 I0
PDB = c:\efi\servergen2\intel\Build\EagleStreamRpPkg\DEBUG_VS2015x86\X64\ServerPlatformPkg\Platform\Dxe\Hsti\HstiIhvProviderDxe\HstiIhvProviderDxeEGS\DEBUG\HstiIhvProviderDxeEGS.pdb
PROGRESS CODE: V03040002 I0
PROGRESS CODE: V03040003 I0
PDB = c:\efi\servergen2\intel\Build\EagleStreamRpPkg\DEBUG_VS2015x86\X64\MdeModulePkg\Universal\Acpi\S3SaveStateDxe\S3SaveStateDxe\DEBUG\S3SaveStateDxe.pdb
PROGRESS CODE: V03040002 I0
PROGRESS CODE: V03040003 I0
PDB = c:\efi\servergen2\intel\Build\EagleStreamRpPkg\DEBUG_VS2015x86\X64\ServerPlatformPkg\Platform\Dxe\PlatformFirmwareVersionInfoDxe\PlatformFirmwareVersionInfoDxe\DEBUG\PlatformFirmwareVersionInfo.pdb
PROGRESS CODE: V03040002 I0
PROGRESS CODE: V03040003 I0
PDB = c:\efi\servergen2\intel\Build\EagleStreamRpPkg\DEBUG_VS2015x86\X64\ServerPlatformPkg\Features\Acpi\BmcAcpiDxe\BmcAcpiDxe\DEBUG\BmcAcpiDxe.pdb
PROGRESS CODE: V03040002 I0
PROGRESS CODE: V03040003 I0
PDB = c:\efi\servergen2\intel\Build\EagleStreamRpPkg\DEBUG_VS2015x86\X64\ClientOneSiliconPkg\IpBlock\Me\ResetHandler\Dxe\ResetHandler\DEBUG\ResetHandler.pdb
PROGRESS CODE: V03040002 I0
PROGRESS CODE: V03040003 I0
PDB = c:\efi\servergen2\intel\Build\EagleStreamRpPkg\DEBUG_VS2015x86\X64\ServerRasPkg\Driver\Dxe\CrashLogDxe\CrashLogDxe\DEBUG\CrashLogDxe.pdb
PROGRESS CODE: V03040002 I0
Reading CPU 0 WatcherCfgBlk->Data64[0x0] = 0x10000700 address = 0xC6B57000!
Reading CPU 0 WatcherCfgBlk->Data64[0x1] = 0x0 address = 0xC6B57008!
Reading CPU 0 WatcherCfgBlk->Data64[0x0] = 0x10000700 address = 0xC6B57000!
Reading CPU 0 WatcherCfgBlk->Data64[0x1] = 0x0 address = 0xC6B57008!
Writing CPU 0 WatcherCfgBlk->Data64[0x0] = 0x10000700! address = 0xC6B57000
Writing CPU 0 WatcherCfgBlk->Data64[0x1] = 0x0! address = 0xC6B57008
Reading CPU 0 WatcherCfgBlk->Data64[0x0] = 0x10000700 address = 0xC6B57000!
Reading CPU 0 WatcherCfgBlk->Data64[0x1] = 0x0 address = 0xC6B57008!
Reading CPU 1 WatcherCfgBlk->Data64[0x0] = 0x10000700 address = 0xF9B57000!
Reading CPU 1 WatcherCfgBlk->Data64[0x1] = 0x0 address = 0xF9B57008!
Reading CPU 1 WatcherCfgBlk->Data64[0x0] = 0x10000700 address = 0xF9B57000!
Reading CPU 1 WatcherCfgBlk->Data64[0x1] = 0x0 address = 0xF9B57008!
Writing CPU 1 WatcherCfgBlk->Data64[0x0] = 0x10000700! address = 0xF9B57000
Writing CPU 1 WatcherCfgBlk->Data64[0x1] = 0x0! address = 0xF9B57008
Reading CPU 1 WatcherCfgBlk->Data64[0x0] = 0x10000700 address = 0xF9B57000!
Reading CPU 1 WatcherCfgBlk->Data64[0x1] = 0x0 address = 0xF9B57008!
Reading CPU 0 WatcherCfgBlk->Data64[0x0] = 0x10000700 address = 0xC6B57000!
Reading CPU 0 WatcherCfgBlk->Data64[0x1] = 0x0 address = 0xC6B57008!
Socket 0 entry 0 CrashDump_Complete is not set in CPU CrashLog Discovery Header!
Socket 0 entry 1 CrashDump_Complete is not set in CPU CrashLog Discovery Header!
Socket 0 entry 2 CrashDump_Complete is not set in CPU CrashLog Discovery Header!
Socket 0 entry 3 CrashDump_Complete is not set in CPU CrashLog Discovery Header!
Socket 0 entry 4 CrashDump_Complete is not set in CPU CrashLog Discovery Header!
Socket 0 entry 5 CrashDump_Complete is not set in CPU CrashLog Discovery Header!
Socket 0 entry 6 CrashDump_Complete is not set in CPU CrashLog Discovery Header!
Unknown AccessType = F !
can't get CPU CrashLog Region Address and size !
Reading CPU 1 WatcherCfgBlk->Data64[0x0] = 0x10000700 address = 0xF9B57000!
Reading CPU 1 WatcherCfgBlk->Data64[0x1] = 0x0 address = 0xF9B57008!
Socket 1 entry 0 CrashDump_Complete is not set in CPU CrashLog Discovery Header!
Socket 1 entry 1 CrashDump_Complete is not set in CPU CrashLog Discovery Header!
Socket 1 entry 2 CrashDump_Complete is not set in CPU CrashLog Discovery Header!
Socket 1 entry 3 CrashDump_Complete is not set in CPU CrashLog Discovery Header!
Unknown AccessType = F !
can't get CPU CrashLog Region Address and size !
Unknown AccessType = F !
can't get CPU CrashLog Region Address and size !
Unknown AccessType = F !
can't get CPU CrashLog Region Address and size !
Unknown AccessType = F !
can't get CPU CrashLog Region Address and size !
PchCrashLogDiscovery - first DWORD of Record 0 is Zero
PchCrashLogDiscovery - first DWORD of Record 1 is Zero
PchCrashLogDiscovery - first DWORD of Record 2 is Zero
PROGRESS CODE: V03040003 I0
PDB = c:\efi\servergen2\intel\Build\EagleStreamRpPkg\DEBUG_VS2015x86\X64\ServerRasPkg\Driver\Dxe\RasMiscDxe\RasMiscDxe\DEBUG\RasMiscDxe.pdb
PROGRESS CODE: V03040002 I0
PROGRESS CODE: V03040003 I0
PDB = c:\efi\servergen2\intel\Build\EagleStreamRpPkg\DEBUG_VS2015x86\X64\MdeModulePkg\Universal\PlatformDriOverrideDxe\PlatformDriOverrideDxe\DEBUG\PlatDriOverrideDxe.pdb
PROGRESS CODE: V03040002 I0
PROGRESS CODE: V03040003 I0
PDB = c:\efi\servergen2\intel\Build\EagleStreamRpPkg\DEBUG_VS2015x86\X64\MdeModulePkg\Universal\DisplayEngineDxe\DisplayEngineDxe\DEBUG\DisplayEngine.pdb
PROGRESS CODE: V03040002 I0
PROGRESS CODE: V03040003 I0
PDB = c:\efi\servergen2\intel\Build\EagleStreamRpPkg\DEBUG_VS2015x86\X64\NetworkPkg\TlsAuthConfigDxe\TlsAuthConfigDxe\DEBUG\TlsAuthConfigDxe.pdb
PROGRESS CODE: V03040002 I0
PROGRESS CODE: V03040003 I0
PDB = c:\efi\servergen2\intel\Build\EagleStreamRpPkg\DEBUG_VS2015x86\X64\ServerSiliconPkg\Universal\Dxe\CxlInit\MemMap\CxlDxe\DEBUG\CxlDxe.pdb
PROGRESS CODE: V03040002 I0
PROGRESS CODE: V03040003 I0
PDB = c:\efi\servergen2\intel\Build\EagleStreamRpPkg\DEBUG_VS2015x86\X64\ServerSiliconPkg\Universal\Dxe\HbmMemMap\HbmMemMap\DEBUG\HbmMemMap.pdb
PROGRESS CODE: V03040002 I0
PROGRESS CODE: V03040003 I0
PDB = c:\efi\servergen2\intel\Build\EagleStreamRpPkg\DEBUG_VS2015x86\X64\ClientOneSiliconPkg\IpBlock\Me\HeciTransport\DxeSmm\HeciTransportDxe\DEBUG\HeciTransportDxe.pdb
PROGRESS CODE: V03040002 I0
PROGRESS CODE: V03040003 I0
PDB = c:\efi\servergen2\intel\Build\EagleStreamRpPkg\DEBUG_VS2015x86\X64\ServerSiliconPkg\Me\Client\ClientCore\Dxe\ClientCore\DEBUG\ClientCore.pdb
PROGRESS CODE: V03040002 I0
PROGRESS CODE: V03040003 I0
PDB = c:\efi\servergen2\intel\Build\EagleStreamRpPkg\DEBUG_VS2015x86\X64\PcAtChipsetPkg\HpetTimerDxe\HpetTimerDxe\DEBUG\HpetTimerDxe.pdb
PROGRESS CODE: V03040002 I0
PROGRESS CODE: V03040003 I0
PDB = c:\efi\servergen2\intel\Build\EagleStreamRpPkg\DEBUG_VS2015x86\X64\UefiCpuPkg\CpuS3DataDxe\CpuS3DataDxe\DEBUG\CpuS3DataDxe.pdb
PROGRESS CODE: V03040002 I0
PROGRESS CODE: V03040003 I0
PDB = c:\efi\servergen2\intel\Build\EagleStreamRpPkg\DEBUG_VS2015x86\X64\ServerPlatformPkg\Features\Pci\Dxe\PciHostBridge\PciHostBridgeSpr\DEBUG\PciHostBridge.pdb
PROGRESS CODE: V03040002 I0
PROGRESS CODE: V03040003 I0
PDB = c:\efi\servergen2\intel\Build\EagleStreamRpPkg\DEBUG_VS2015x86\X64\ServerPlatformPkg\Platform\Dxe\Hsti\HstiIbvPlatformDxe\HstiIbvPlatformDxe\DEBUG\HstiPlatformDxe.pdb
PROGRESS CODE: V03040002 I0
PROGRESS CODE: V03040003 I0
PDB = c:\efi\servergen2\intel\Build\EagleStreamRpPkg\DEBUG_VS2015x86\X64\ServerPlatformPkg\Features\Cpu\Dxe\GetCpuInfo\GetCpuInfo\DEBUG\GetCpuInfo.pdb
PROGRESS CODE: V03040002 I0
PROGRESS CODE: V03040003 I0
PDB = c:\efi\servergen2\intel\Build\EagleStreamRpPkg\DEBUG_VS2015x86\X64\ServerPlatformPkg\Restricted\Overclocking\NearTDPClearOc\NearTDPClearOc\DEBUG\NearTDPClearOc.pdb
PROGRESS CODE: V03040002 I0
PROGRESS CODE: V03040003 I0
PDB = c:\efi\servergen2\intel\Build\EagleStreamRpPkg\DEBUG_VS2015x86\X64\MicrocodeUpdateFeaturePkg\MicrocodeUtility\MicrocodeUtilityDxe\DEBUG\MicrocodeUtilityDxe.pdb
PROGRESS CODE: V03040002 I0
Microcode utility not supported.
PROGRESS CODE: V03040003 I0
PDB = c:\efi\servergen2\intel\Build\EagleStreamRpPkg\DEBUG_VS2015x86\X64\MicrocodeUpdateFeaturePkg\MicrocodeUtility\MicrocodeUtilityDxe\DEBUG\MicrocodeUtilityDxe.pdb
PROGRESS CODE: V03040002 I0
Microcode utility not supported.
PROGRESS CODE: V03040003 I0
PDB = c:\efi\servergen2\intel\Build\EagleStreamRpPkg\DEBUG_VS2015x86\X64\ClientOneSiliconPkg\Fru\EbgPch\PchInit\Dxe\PchInitDxe\DEBUG\PchInitDxeEbg.pdb
PROGRESS CODE: V03040002 I0
PROGRESS CODE: V03040003 I0
PDB = c:\efi\servergen2\intel\Build\EagleStreamRpPkg\DEBUG_VS2015x86\X64\ServerSiliconPkg\Universal\Smm\Access\SmmAccess\DEBUG\SmmAccess.pdb
PROGRESS CODE: V03040002 I0
PROGRESS CODE: V03040003 I0
PDB = c:\efi\servergen2\intel\Build\EagleStreamRpPkg\DEBUG_VS2015x86\X64\ClientOneSiliconPkg\IpBlock\Sps\Heci\HeciControl\DxeSmm\HeciControlDxe\DEBUG\HeciControlDxe.pdb
PROGRESS CODE: V03040002 I0
Initialization is allowed
Initialization is allowed
PROGRESS CODE: V03040003 I0
PDB = c:\efi\servergen2\intel\Build\EagleStreamRpPkg\DEBUG_VS2015x86\X64\MdeModulePkg\Universal\WatchdogTimerDxe\WatchdogTimer\DEBUG\WatchdogTimer.pdb
PROGRESS CODE: V03040002 I0
PROGRESS CODE: V03040003 I0
PDB = c:\efi\servergen2\intel\Build\EagleStreamRpPkg\DEBUG_VS2015x86\X64\ServerPlatformPkg\Platform\SpiFvbServices\PlatformSpi\DEBUG\FwBlockService.pdb
PROGRESS CODE: V03040002 I0
FvImage on FvHandle 6B21C818 and 769B0518 has the same FvNameGuid 27A72E80-3118-4C0C-8673-AA5B4EFA9613.
FvImage on FvHandle 6B21C398 and 769A6818 has the same FvNameGuid 5A515240-D1F1-4C58-9590-27B1F0E86827.
FvImage on FvHandle 6B21B598 and 769A9A18 has the same FvNameGuid D2C29BA7-3809-480F-9C3D-DE389C61425A.
FvImage on FvHandle 6B200918 and 769B0618 has the same FvNameGuid 6522280D-28F9-4131-ADC4-F40EBFA45864.
PROGRESS CODE: V03040003 I0
PDB = c:\efi\servergen2\intel\Build\EagleStreamRpPkg\DEBUG_VS2015x86\X64\ServerPlatformPkg\Features\Pci\Dxe\PciPlatform\PciPlatform\DEBUG\PciPlatform.pdb
PROGRESS CODE: V03040002 I0
PROGRESS CODE: V03040003 I0
PDB = c:\efi\servergen2\intel\Build\EagleStreamRpPkg\DEBUG_VS2015x86\X64\IntelSiliconPkg\Feature\VTd\IntelVTdDxe\IntelVTdDxe\DEBUG\IntelVTdDxe.pdb
PROGRESS CODE: V03040002 I0
Error: Image at 0006AE3B000 start failed: Unsupported
PDB = c:\efi\servergen2\intel\Build\EagleStreamRpPkg\DEBUG_VS2015x86\X64\IntelSiliconPkg\Feature\VTd\IntelVTdDxe\IntelVTdDxe\DEBUG\IntelVTdDxe.pdb
PROGRESS CODE: V03040003 I0
PDB = c:\efi\servergen2\intel\Build\EagleStreamRpPkg\DEBUG_VS2015x86\X64\ClientOneSiliconPkg\IpBlock\Sps\Heci\HeciLegacyDxe\HeciLegacyDxe\DEBUG\HeciLegacyDxe.pdb
PROGRESS CODE: V03040002 I0
PROGRESS CODE: V03040003 I0
PDB = c:\efi\servergen2\intel\Build\EagleStreamRpPkg\DEBUG_VS2015x86\X64\MdeModulePkg\Core\PiSmmCore\PiSmmIpl\DEBUG\PiSmmIpl.pdb
PROGRESS CODE: V03040002 I0
ConvertPages: failed to find range 78000000 - 7FFFFFFF
PDB = c:\efi\servergen2\intel\Build\EagleStreamRpPkg\DEBUG_VS2015x86\X64\MdeModulePkg\Core\PiSmmCore\PiSmmCore\DEBUG\PiSmmCore.pdb
[SIO] Current system SIO exist bit:10
PROGRESS CODE: V03040003 I0
PDB = c:\efi\servergen2\intel\Build\EagleStreamRpPkg\DEBUG_VS2015x86\X64\ServerSiliconPkg\Universal\Smm\CsrPseudoOffsetInit\CsrPseudoOffsetInitSmm\DEBUG\CsrPseudoOffsetInitSmm.pdb
PDB = c:\efi\servergen2\intel\Build\EagleStreamRpPkg\DEBUG_VS2015x86\X64\ServerSiliconPkg\Universal\Smm\SiliconDataInit\SiliconDataInitSmm\DEBUG\SiliconDataInitSmm.pdb
PDB = c:\efi\servergen2\intel\Build\EagleStreamRpPkg\DEBUG_VS2015x86\X64\ServerSiliconPkg\Universal\Smm\SpdPlatformInfoSmm\SpdPlatformInfoSmm\DEBUG\SpdPlatformInfoSmm.pdb
PDB = c:\efi\servergen2\intel\Build\EagleStreamRpPkg\DEBUG_VS2015x86\X64\MdeModulePkg\Universal\ReportStatusCodeRouter\Smm\ReportStatusCodeRouterSmm\DEBUG\ReportStatusCodeRouterSmm.pdb
PDB = c:\efi\servergen2\intel\Build\EagleStreamRpPkg\DEBUG_VS2015x86\X64\MdeModulePkg\Universal\Variable\RuntimeDxe\VariableSmm\DEBUG\VariableSmm.pdb
PDB = c:\efi\servergen2\intel\Build\EagleStreamRpPkg\DEBUG_VS2015x86\X64\UefiCpuPkg\CpuIo2Smm\CpuIo2Smm\DEBUG\CpuIo2Smm.pdb
PDB = c:\efi\servergen2\intel\Build\EagleStreamRpPkg\DEBUG_VS2015x86\X64\MdeModulePkg\Universal\LockBox\SmmLockBox\SmmLockBox\DEBUG\SmmLockBox.pdb
PDB = c:\efi\servergen2\intel\Build\EagleStreamRpPkg\DEBUG_VS2015x86\X64\CpRcPkg\Universal\RegAccess\Smm\RegAccessSMM\DEBUG\RegAccessSMM.pdb
PDB = c:\efi\servergen2\intel\Build\EagleStreamRpPkg\DEBUG_VS2015x86\X64\ServerPlatformPkg\Universal\TraceHubStatusCodeHandler\Smm\TraceHubStatusCodeHandlerSmm\DEBUG\TraceHubStatusCodeHandlerSmm.pdb
PDB = c:\efi\servergen2\intel\Build\EagleStreamRpPkg\DEBUG_VS2015x86\X64\MdeModulePkg\Universal\Acpi\FirmwarePerformanceDataTableSmm\FirmwarePerformanceSmm\DEBUG\FirmwarePerformanceSmm.pdb
PDB = c:\efi\servergen2\intel\Build\EagleStreamRpPkg\DEBUG_VS2015x86\X64\ServerPlatformPkg\Features\Variable\PlatformVariable\Smm\PlatformSecureVariableSmm\DEBUG\PlatformSecureVariableSmm.pdb
PDB = c:\efi\servergen2\intel\Build\EagleStreamRpPkg\DEBUG_VS2015x86\X64\ServerSiliconPkg\Universal\Dxe\CpuCsrAccess\CpuCsrAccessSMM\DEBUG\CpuCsrAccessSMM.pdb
PDB = c:\efi\servergen2\intel\Build\EagleStreamRpPkg\DEBUG_VS2015x86\X64\ClientOneSiliconPkg\IpBlock\Smbus\Smm\SmbusSmm\DEBUG\SmbusSmm.pdb
PDB = c:\efi\servergen2\intel\Build\EagleStreamRpPkg\DEBUG_VS2015x86\X64\ClientOneSiliconPkg\IpBlock\Sps\Heci\HeciAccess\DxeSmm\HeciAccessSmm\DEBUG\HeciAccessSmm.pdb
PDB = c:\efi\servergen2\intel\Build\EagleStreamRpPkg\DEBUG_VS2015x86\X64\MdeModulePkg\Universal\StatusCodeHandler\Smm\StatusCodeHandlerSmm\DEBUG\StatusCodeHandlerSmm.pdb
PROGRESS CODE: V03070003 I0
PDB = c:\efi\servergen2\intel\Build\EagleStreamRpPkg\DEBUG_VS2015x86\X64\ServerPlatformPkg\Features\Bmc\PlatformHookSpiAccess\PlatformHookSpiAccessSmm\DEBUG\PlatformHookSpiAccessSmm.pdb
PROGRESS CODE: V03070002 I0
PROGRESS CODE: V03070003 I0
PDB = c:\efi\servergen2\intel\Build\EagleStreamRpPkg\DEBUG_VS2015x86\X64\ClientOneSiliconPkg\IpBlock\Me\HeciTransport\DxeSmm\HeciTransportSmm\DEBUG\HeciTransportSmm.pdb
PROGRESS CODE: V03070002 I0
PROGRESS CODE: V03070003 I0
PDB = c:\efi\servergen2\intel\Build\EagleStreamRpPkg\DEBUG_VS2015x86\X64\ClientOneSiliconPkg\IpBlock\Sps\Heci\HeciControl\DxeSmm\HeciControlSmm\DEBUG\HeciControlSmm.pdb
PROGRESS CODE: V03070002 I0
Initialization is allowed
Initialization is allowed
PROGRESS CODE: V03070003 I0
PDB = c:\efi\servergen2\intel\Build\EagleStreamRpPkg\DEBUG_VS2015x86\X64\ServerSiliconPkg\Universal\Dxe\PmemResetNotify\PmemResetNotify\DEBUG\PmemResetNotify.pdb
PROGRESS CODE: V03040002 I0
[PMem](DXE) PMem Always-ON 12v support disabled
[PMem](DXE) PMem reset notification driver init failed (status Aborted)
Error: Image at 00076AD7000 start failed: Aborted
PDB = c:\efi\servergen2\intel\Build\EagleStreamRpPkg\DEBUG_VS2015x86\X64\ServerSiliconPkg\Universal\Dxe\PmemResetNotify\PmemResetNotify\DEBUG\PmemResetNotify.pdb
PROGRESS CODE: V03040003 I0
PDB = c:\efi\servergen2\intel\Build\EagleStreamRpPkg\DEBUG_VS2015x86\X64\ServerSiliconPkg\Universal\Dxe\CrystalRidge\CrystalRidgeMeasurement\DEBUG\CrystalRidgeMeasurement.pdb
PROGRESS CODE: V03040002 I0
PROGRESS CODE: V03040003 I0
PDB = c:\efi\servergen2\intel\Build\EagleStreamRpPkg\DEBUG_VS2015x86\X64\ClientOneSiliconPkg\IpBlock\Spi\Dxe\SpiSmmDxe\DEBUG\SpiDxe.pdb
PROGRESS CODE: V03040002 I0
PROGRESS CODE: V03040003 I0
PDB = c:\efi\servergen2\intel\Build\EagleStreamRpPkg\DEBUG_VS2015x86\X64\ClientOneSiliconPkg\IpBlock\Me\HwAsset\Dxe\HwAssetDxe\DEBUG\HwAssetDxe.pdb
PROGRESS CODE: V03040002 I0
Error: Image at 0006A8CF000 start failed: Unsupported
PDB = c:\efi\servergen2\intel\Build\EagleStreamRpPkg\DEBUG_VS2015x86\X64\ClientOneSiliconPkg\IpBlock\Me\HwAsset\Dxe\HwAssetDxe\DEBUG\HwAssetDxe.pdb
PROGRESS CODE: V03040003 I0
PDB = c:\efi\servergen2\intel\Build\EagleStreamRpPkg\DEBUG_VS2015x86\X64\ClientOneSiliconPkg\IpBlock\Me\Asf\Dxe\AsfDxe\DEBUG\AsfDxe.pdb
PROGRESS CODE: V03040002 I0
Error: Image at 0006A8D3000 start failed: Unsupported
PDB = c:\efi\servergen2\intel\Build\EagleStreamRpPkg\DEBUG_VS2015x86\X64\ClientOneSiliconPkg\IpBlock\Me\Asf\Dxe\AsfDxe\DEBUG\AsfDxe.pdb
PROGRESS CODE: V03040003 I0
PDB = c:\efi\servergen2\intel\Build\EagleStreamRpPkg\DEBUG_VS2015x86\X64\ServerSiliconPkg\Me\Client\BiosExtensionLoader\Dxe\BiosExtensionLoader\DEBUG\BiosExtensionLoader.pdb
PROGRESS CODE: V03040002 I0
Error: Image at 0006A8CF000 start failed: Unsupported
PDB = c:\efi\servergen2\intel\Build\EagleStreamRpPkg\DEBUG_VS2015x86\X64\ServerSiliconPkg\Me\Client\BiosExtensionLoader\Dxe\BiosExtensionLoader\DEBUG\BiosExtensionLoader.pdb
PROGRESS CODE: V03040003 I0
PDB = c:\efi\servergen2\intel\Build\EagleStreamRpPkg\DEBUG_VS2015x86\X64\MdeModulePkg\Universal\Variable\RuntimeDxe\VariableSmmRuntimeDxe\DEBUG\VariableSmmRuntimeDxe.pdb
PROGRESS CODE: V03040002 I0
PROGRESS CODE: V03040003 I0
PDB = c:\efi\servergen2\intel\Build\EagleStreamRpPkg\DEBUG_VS2015x86\X64\MdeModulePkg\Universal\Acpi\BootScriptExecutorDxe\BootScriptExecutorDxe\DEBUG\BootScriptExecutorDxe.pdb
PROGRESS CODE: V03040002 I0
[SIO] Current system SIO exist bit:10
PROGRESS CODE: V03040003 I0
PDB = c:\efi\servergen2\intel\Build\EagleStreamRpPkg\DEBUG_VS2015x86\X64\ServerPlatformPkg\Features\IPMI\GenericIpmi\Dxe\GenericIpmi\DEBUG\GenericIpmi.pdb
PROGRESS CODE: V03040002 I0
[IPMI] mIpmiInstance->KcsTimeoutPeriod: 0x186A0
[IPMI] BMC Device ID: 0x23, firmware version: 2.03 UpdateMode:1
[IPMI] BMC in Forced Update mode, skip waiting for BMC_READY.
PROGRESS CODE: V03040003 I0
PDB = c:\efi\servergen2\intel\Build\EagleStreamRpPkg\DEBUG_VS2015x86\X64\EagleStreamRpPkg\Platform\Dxe\SmbiosRpTable\SmbiosRpTable\DEBUG\SmbiosRpTable.pdb
PROGRESS CODE: V03040002 I0
Allocated Communication Buffer address = 775B9000
Smbios protocol addition (Type 133) returns Success
PROGRESS CODE: V03040003 I0
PDB = c:\efi\servergen2\intel\Build\EagleStreamRpPkg\DEBUG_VS2015x86\X64\ServerPlatformPkg\Features\Cpu\Dxe\PlatformCpuPolicyDxe\PlatformCpuPolicyDxe\DEBUG\PlatformCpuPolicyDxe.pdb
PROGRESS CODE: V03040002 I0
Common PPM policy update, PackageCState:3
PROGRESS CODE: V03040003 I0
PDB = c:\efi\servergen2\intel\Build\EagleStreamRpPkg\DEBUG_VS2015x86\X64\ServerPlatformPkg\Platform\Dxe\PolicyInitDxe\PolicyInitDxe\DEBUG\PolicyInitDxe.pdb
PROGRESS CODE: V03040002 I0
[HECI] DxeMeServerPolicy (MeType is ME_TYPE_SPS)
PROGRESS CODE: V03040003 I0
PDB = c:\efi\servergen2\intel\Build\EagleStreamRpPkg\DEBUG_VS2015x86\X64\SecurityPkg\Tcg\Tcg2Dxe\Tcg2Dxe\DEBUG\Tcg2Dxe.pdb
PROGRESS CODE: V03040002 I0
PROGRESS CODE: V03040003 I0
PDB = c:\efi\servergen2\intel\Build\EagleStreamRpPkg\DEBUG_VS2015x86\X64\ServerPlatformPkg\Platform\Dxe\SmbiosMiscDxe\SmbiosMiscDxe\DEBUG\SmbiosMiscDxe.pdb
PROGRESS CODE: V03040002 I0
PROGRESS CODE: V03040003 I0
PDB = c:\efi\servergen2\intel\Build\EagleStreamRpPkg\DEBUG_VS2015x86\X64\EagleStreamOpenBoardPkg\Platform\Dxe\PlatformVTdSampleDxe\PlatformVTdSampleDxe\DEBUG\PlatformVTdSampleDxe.pdb
PROGRESS CODE: V03040002 I0
PROGRESS CODE: V03040003 I0
PDB = c:\efi\servergen2\intel\Build\EagleStreamRpPkg\DEBUG_VS2015x86\X64\ServerPlatformPkg\Features\Bmc\OsTransparentUpdate\OsTransparentUpdate\DEBUG\OsTransparentUpdate.pdb
PROGRESS CODE: V03040002 I0
PROGRESS CODE: V03040003 I0
PDB = c:\efi\servergen2\intel\Build\EagleStreamRpPkg\DEBUG_VS2015x86\X64\ClientOneSiliconPkg\IpBlock\Sps\Sps\Smm\SpsSmm\DEBUG\SpsSmm.pdb
PROGRESS CODE: V03070002 I0
[HECI Transport-1 SMM] Send pkt: 80040007
00: FF 02 00 00
[HECI Transport-1 SMM] Got pkt: 80140007
00: FF 82 00 00 00 00 06 18 - 00 01 03 00 00 00 06 18
10: 00 01 03 00
HeciBufferClear (): HeciCsrHost 0x806C6C09 (Clear H_RDY)
HeciBufferClear (): HeciCsrHost 0x806C6C01 (CBLength = 128, H_RDY = 0)
[HECI Transport-1 SMM] Send pkt: 80080007
00: 05 02 00 00 00 00 00 00
[HECI Transport-1 SMM] Got pkt: 80180007
00: 05 82 00 00 F4 A2 49 6F - B1 E9 88 C4 00 00 00 00
10: 00 40 1A 00 00 00 00 00
HeciBufferClear (): HeciCsrHost 0x80030309 (Clear H_RDY)
HeciBufferClear (): HeciCsrHost 0x80030301 (CBLength = 128, H_RDY = 0)
PROGRESS CODE: V03070003 I0
PDB = c:\efi\servergen2\intel\Build\EagleStreamRpPkg\DEBUG_VS2015x86\X64\UefiCpuPkg\PiSmmCpuDxeSmm\PiSmmCpuDxeSmm\DEBUG\PiSmmCpuDxeSmm.pdb
PROGRESS CODE: V03070002 I0
PROGRESS CODE: V00011008 I0
PROGRESS CODE: V03070003 I0
PDB = c:\efi\servergen2\intel\Build\EagleStreamRpPkg\DEBUG_VS2015x86\X64\ClientOneSiliconPkg\Pch\PchSmiDispatcher\Smm\PchSmiDispatcherServer\DEBUG\PchSmiDispatcher.pdb
PROGRESS CODE: V03070002 I0
PROGRESS CODE: V03070003 I0
PDB = c:\efi\servergen2\intel\Build\EagleStreamRpPkg\DEBUG_VS2015x86\X64\ClientOneSiliconPkg\IpBlock\Spi\Smm\SpiSmm\DEBUG\SpiSmm.pdb
PROGRESS CODE: V03070002 I0
PROGRESS CODE: V03070003 I0
PDB = c:\efi\servergen2\intel\Build\EagleStreamRpPkg\DEBUG_VS2015x86\X64\ServerPlatformPkg\Platform\DxeSmm\BiosGuard\BiosGuardServices\DEBUG\BiosGuardServices.pdb
PROGRESS CODE: V03070002 I0
PROGRESS CODE: V03070003 I0
PDB = c:\efi\servergen2\intel\Build\EagleStreamRpPkg\DEBUG_VS2015x86\X64\ServerRasPkg\Driver\Smm\RasAcpi\RasAcpi\DEBUG\RasAcpi.pdb
PROGRESS CODE: V03070002 I0
PROGRESS CODE: V03070003 I0
PDB = c:\efi\servergen2\intel\Build\EagleStreamRpPkg\DEBUG_VS2015x86\X64\ServerSiliconPkg\Universal\Smm\OobMsmSmm\OobMsmSmm\DEBUG\OobMsmSmm.pdb
PROGRESS CODE: V03070002 I0
OobMsmSmmDriverEntry(): Enter Entrypoint
PROGRESS CODE: V03070003 I0
PDB = c:\efi\servergen2\intel\Build\EagleStreamRpPkg\DEBUG_VS2015x86\X64\ServerSiliconPkg\Universal\Smm\PlatformResetNotify\PlatformResetNotifySmm\DEBUG\PlatformResetNotifySmm.pdb
PROGRESS CODE: V03070002 I0
PROGRESS CODE: V03070003 I0
PDB = c:\efi\servergen2\intel\Build\EagleStreamRpPkg\DEBUG_VS2015x86\X64\ClientOneSiliconPkg\Pch\PchInit\Smm\PchInitSmm\DEBUG\PchInitSmm.pdb
PROGRESS CODE: V03070002 I0
PROGRESS CODE: V03070003 I0
PDB = c:\efi\servergen2\intel\Build\EagleStreamRpPkg\DEBUG_VS2015x86\X64\ServerSecurityPkg\Pfr\Restricted\DebugTool\PxdSmm\DEBUG\PxdSmmDriver.pdb
PROGRESS CODE: V03070002 I0
[PxdSmm.c] PxdSmmDriverEntry() {
[PxdSmm.c] PxdSmmDriverEntry() } Success
PROGRESS CODE: V03070003 I0
PDB = c:\efi\servergen2\intel\Build\EagleStreamRpPkg\DEBUG_VS2015x86\X64\ServerPlatformPkg\Platform\SpiFvbServices\PlatformSmmSpi\DEBUG\FwBlockServiceSmm.pdb
PROGRESS CODE: V03070002 I0
PROGRESS CODE: V03070003 I0
PDB = c:\efi\servergen2\intel\Build\EagleStreamRpPkg\DEBUG_VS2015x86\X64\ServerRestrictedPkg\VariableSmi\VariableSmiSmm\DEBUG\VariableSmiSmm.pdb
PROGRESS CODE: V03070002 I0
PROGRESS CODE: V03070003 I0
PDB = c:\efi\servergen2\intel\Build\EagleStreamRpPkg\DEBUG_VS2015x86\X64\ServerPlatformPkg\Platform\Dxe\PlatformPowerButton\PlatformPowerButton\DEBUG\PowerButtonHandler.pdb
PROGRESS CODE: V03070002 I0
PROGRESS CODE: V03070003 I0
PDB = c:\efi\servergen2\intel\Build\EagleStreamRpPkg\DEBUG_VS2015x86\X64\SecurityPkg\Tcg\Tcg2Smm\Tcg2Smm\DEBUG\Tcg2Smm.pdb
PROGRESS CODE: V03070002 I0
PROGRESS CODE: V03070003 I0
PDB = c:\efi\servergen2\intel\Build\EagleStreamRpPkg\DEBUG_VS2015x86\X64\UefiCpuPkg\PiSmmCommunication\PiSmmCommunicationSmm\DEBUG\PiSmmCommunicationSmm.pdb
PROGRESS CODE: V03070002 I0
PROGRESS CODE: V03070003 I0
PDB = c:\efi\servergen2\intel\Build\EagleStreamRpPkg\DEBUG_VS2015x86\X64\ServerRasPkg\Driver\Smm\AddressTranslationDsm\AddressTranslationDsm\DEBUG\AddressTranslationDsm.pdb
PROGRESS CODE: V03070002 I0
[GetNmCaching] NM caching Cfg:B OffData:0 IntLv:458
[GetNmCaching] NM caching Cfg:B OffData:0 IntLv:40458
[GetNmCaching] NM caching Cfg:B OffData:0 IntLv:80458
[GetNmCaching] NM caching Cfg:B OffData:0 IntLv:C0458
[GetNmCaching] NM caching Cfg:B OffData:0 IntLv:100458
[GetNmCaching] NM caching Cfg:B OffData:0 IntLv:140458
[GetNmCaching] NM caching Cfg:B OffData:0 IntLv:180458
[GetNmCaching] NM caching Cfg:B OffData:0 IntLv:1C0458
[GetNmCaching] NM caching Cfg:B OffData:80000022 IntLv:458
[GetNmCaching] NM caching Cfg:B OffData:80000022 IntLv:40458
[GetNmCaching] NM caching Cfg:B OffData:80000022 IntLv:80458
[GetNmCaching] NM caching Cfg:B OffData:80000022 IntLv:C0458
[GetNmCaching] NM caching Cfg:B OffData:80000022 IntLv:100458
[GetNmCaching] NM caching Cfg:B OffData:80000022 IntLv:140458
[GetNmCaching] NM caching Cfg:B OffData:80000022 IntLv:180458
[GetNmCaching] NM caching Cfg:B OffData:80000022 IntLv:1C0458
[GetNmCaching] NM caching Cfg:B OffData:80000042 IntLv:458
[GetNmCaching] NM caching Cfg:B OffData:80000042 IntLv:40458
[GetNmCaching] NM caching Cfg:B OffData:80000042 IntLv:80458
[GetNmCaching] NM caching Cfg:B OffData:80000042 IntLv:C0458
[GetNmCaching] NM caching Cfg:B OffData:80000042 IntLv:100458
[GetNmCaching] NM caching Cfg:B OffData:80000042 IntLv:140458
[GetNmCaching] NM caching Cfg:B OffData:80000042 IntLv:180458
[GetNmCaching] NM caching Cfg:B OffData:80000042 IntLv:1C0458
[GetNmCaching] NM caching Cfg:B OffData:80000062 IntLv:458
[GetNmCaching] NM caching Cfg:B OffData:80000062 IntLv:40458
[GetNmCaching] NM caching Cfg:B OffData:80000062 IntLv:80458
[GetNmCaching] NM caching Cfg:B OffData:80000062 IntLv:C0458
[GetNmCaching] NM caching Cfg:B OffData:80000062 IntLv:100458
[GetNmCaching] NM caching Cfg:B OffData:80000062 IntLv:140458
[GetNmCaching] NM caching Cfg:B OffData:80000062 IntLv:180458
[GetNmCaching] NM caching Cfg:B OffData:80000062 IntLv:1C0458
[GetNmCaching] NM caching Cfg:B OffData:80000082 IntLv:458
[GetNmCaching] NM caching Cfg:B OffData:80000082 IntLv:40458
[GetNmCaching] NM caching Cfg:B OffData:80000082 IntLv:80458
[GetNmCaching] NM caching Cfg:B OffData:80000082 IntLv:C0458
[GetNmCaching] NM caching Cfg:B OffData:80000082 IntLv:100458
[GetNmCaching] NM caching Cfg:B OffData:80000082 IntLv:140458
[GetNmCaching] NM caching Cfg:B OffData:80000082 IntLv:180458
[GetNmCaching] NM caching Cfg:B OffData:80000082 IntLv:1C0458
[GetNmCaching] NM caching Cfg:B OffData:800000A2 IntLv:458
[GetNmCaching] NM caching Cfg:B OffData:800000A2 IntLv:40458
[GetNmCaching] NM caching Cfg:B OffData:800000A2 IntLv:80458
[GetNmCaching] NM caching Cfg:B OffData:800000A2 IntLv:C0458
[GetNmCaching] NM caching Cfg:B OffData:800000A2 IntLv:100458
[GetNmCaching] NM caching Cfg:B OffData:800000A2 IntLv:140458
[GetNmCaching] NM caching Cfg:B OffData:800000A2 IntLv:180458
[GetNmCaching] NM caching Cfg:B OffData:800000A2 IntLv:1C0458
[GetNmCaching] NM caching Cfg:B OffData:800000C2 IntLv:458
[GetNmCaching] NM caching Cfg:B OffData:800000C2 IntLv:40458
[GetNmCaching] NM caching Cfg:B OffData:800000C2 IntLv:80458
[GetNmCaching] NM caching Cfg:B OffData:800000C2 IntLv:C0458
[GetNmCaching] NM caching Cfg:B OffData:800000C2 IntLv:100458
[GetNmCaching] NM caching Cfg:B OffData:800000C2 IntLv:140458
[GetNmCaching] NM caching Cfg:B OffData:800000C2 IntLv:180458
[GetNmCaching] NM caching Cfg:B OffData:800000C2 IntLv:1C0458
[GetNmCaching] NM caching Cfg:B OffData:800000E2 IntLv:458
[GetNmCaching] NM caching Cfg:B OffData:800000E2 IntLv:40458
[GetNmCaching] NM caching Cfg:B OffData:800000E2 IntLv:80458
[GetNmCaching] NM caching Cfg:B OffData:800000E2 IntLv:C0458
[GetNmCaching] NM caching Cfg:B OffData:800000E2 IntLv:100458
[GetNmCaching] NM caching Cfg:B OffData:800000E2 IntLv:140458
[GetNmCaching] NM caching Cfg:B OffData:800000E2 IntLv:180458
[GetNmCaching] NM caching Cfg:B OffData:800000E2 IntLv:1C0458
PROGRESS CODE: V03070003 I0
PDB = c:\efi\servergen2\intel\Build\EagleStreamRpPkg\DEBUG_VS2015x86\X64\SmmRuntimeUpdateFeaturePkg\SmmRuntimeUpdate\SmmCodeInjection\DEBUG\SmmRuntimUpdate.pdb
PROGRESS CODE: V03070002 I0
PROGRESS CODE: V03070003 I0
PDB = c:\efi\servergen2\intel\Build\EagleStreamRpPkg\DEBUG_VS2015x86\X64\ServerSiliconPkg\Universal\Dxe\PmemResetNotify\PmemResetNotifySmm\DEBUG\PmemResetNotifySmm.pdb
PROGRESS CODE: V03070002 I0
[PMem](SMM) PMem Always-ON 12v support disabled
[PMem](SMM) PMem reset notification driver init failed (status Aborted)
Error: SMM image at 0007EC2D000 start failed: Aborted
PROGRESS CODE: V03070003 I0
PDB = c:\efi\servergen2\intel\Build\EagleStreamRpPkg\DEBUG_VS2015x86\X64\MdeModulePkg\Universal\FaultTolerantWriteDxe\FaultTolerantWriteSmm\DEBUG\SmmFaultTolerantWriteDxe.pdb
PROGRESS CODE: V03070002 I0
PROGRESS CODE: V03070003 I0
PDB = c:\efi\servergen2\intel\Build\EagleStreamRpPkg\DEBUG_VS2015x86\X64\ServerSiliconPkg\Cpu\SiCpuInit\Dxe\SiCpuInitDxe\DEBUG\SiCpuInitDxe.pdb
PROGRESS CODE: V03040002 I0
GetProcessorInfo - Index - 0
GetProcessorInfo - ProcessorId - 0000000000000000
GetProcessorInfo - StatusFlag - 00000007
GetProcessorInfo - Location.Package - 00000000
GetProcessorInfo - Location.Core - 00000000
GetProcessorInfo - Location.Thread - 00000000
GetProcessorInfo - Location2.Package - 00000000
GetProcessorInfo - Location2.Die - 00000000
GetProcessorInfo - Location2.Tile - 00000000
GetProcessorInfo - Location2.Module - 00000000
GetProcessorInfo - Location2.Core - 00000000
GetProcessorInfo - Location2.Thread - 00000000
GetProcessorInfo - Index - 1
GetProcessorInfo - ProcessorId - 0000000000000001
GetProcessorInfo - StatusFlag - 00000006
GetProcessorInfo - Location.Package - 00000000
GetProcessorInfo - Location.Core - 00000000
GetProcessorInfo - Location.Thread - 00000001
GetProcessorInfo - Location2.Package - 00000000
GetProcessorInfo - Location2.Die - 00000000
GetProcessorInfo - Location2.Tile - 00000000
GetProcessorInfo - Location2.Module - 00000000
GetProcessorInfo - Location2.Core - 00000000
GetProcessorInfo - Location2.Thread - 00000001
GetProcessorInfo - Index - 2
GetProcessorInfo - ProcessorId - 0000000000000002
GetProcessorInfo - StatusFlag - 00000006
GetProcessorInfo - Location.Package - 00000000
GetProcessorInfo - Location.Core - 00000001
GetProcessorInfo - Location.Thread - 00000000
GetProcessorInfo - Location2.Package - 00000000
GetProcessorInfo - Location2.Die - 00000000
GetProcessorInfo - Location2.Tile - 00000000
GetProcessorInfo - Location2.Module - 00000000
GetProcessorInfo - Location2.Core - 00000001
GetProcessorInfo - Location2.Thread - 00000000
GetProcessorInfo - Index - 3
GetProcessorInfo - ProcessorId - 0000000000000003
GetProcessorInfo - StatusFlag - 00000006
GetProcessorInfo - Location.Package - 00000000
GetProcessorInfo - Location.Core - 00000001
GetProcessorInfo - Location.Thread - 00000001
GetProcessorInfo - Location2.Package - 00000000
GetProcessorInfo - Location2.Die - 00000000
GetProcessorInfo - Location2.Tile - 00000000
GetProcessorInfo - Location2.Module - 00000000
GetProcessorInfo - Location2.Core - 00000001
GetProcessorInfo - Location2.Thread - 00000001
GetProcessorInfo - Index - 4
GetProcessorInfo - ProcessorId - 0000000000000004
GetProcessorInfo - StatusFlag - 00000006
GetProcessorInfo - Location.Package - 00000000
GetProcessorInfo - Location.Core - 00000002
GetProcessorInfo - Location.Thread - 00000000
GetProcessorInfo - Location2.Package - 00000000
GetProcessorInfo - Location2.Die - 00000000
GetProcessorInfo - Location2.Tile - 00000000
GetProcessorInfo - Location2.Module - 00000000
GetProcessorInfo - Location2.Core - 00000002
GetProcessorInfo - Location2.Thread - 00000000
GetProcessorInfo - Index - 5
GetProcessorInfo - ProcessorId - 0000000000000005
GetProcessorInfo - StatusFlag - 00000006
GetProcessorInfo - Location.Package - 00000000
GetProcessorInfo - Location.Core - 00000002
GetProcessorInfo - Location.Thread - 00000001
GetProcessorInfo - Location2.Package - 00000000
GetProcessorInfo - Location2.Die - 00000000
GetProcessorInfo - Location2.Tile - 00000000
GetProcessorInfo - Location2.Module - 00000000
GetProcessorInfo - Location2.Core - 00000002
GetProcessorInfo - Location2.Thread - 00000001
GetProcessorInfo - Index - 6
GetProcessorInfo - ProcessorId - 0000000000000006
GetProcessorInfo - StatusFlag - 00000006
GetProcessorInfo - Location.Package - 00000000
GetProcessorInfo - Location.Core - 00000003
GetProcessorInfo - Location.Thread - 00000000
GetProcessorInfo - Location2.Package - 00000000
GetProcessorInfo - Location2.Die - 00000000
GetProcessorInfo - Location2.Tile - 00000000
GetProcessorInfo - Location2.Module - 00000000
GetProcessorInfo - Location2.Core - 00000003
GetProcessorInfo - Location2.Thread - 00000000
GetProcessorInfo - Index - 7
GetProcessorInfo - ProcessorId - 0000000000000007
GetProcessorInfo - StatusFlag - 00000006
GetProcessorInfo - Location.Package - 00000000
GetProcessorInfo - Location.Core - 00000003
GetProcessorInfo - Location.Thread - 00000001
GetProcessorInfo - Location2.Package - 00000000
GetProcessorInfo - Location2.Die - 00000000
GetProcessorInfo - Location2.Tile - 00000000
GetProcessorInfo - Location2.Module - 00000000
GetProcessorInfo - Location2.Core - 00000003
GetProcessorInfo - Location2.Thread - 00000001
GetProcessorInfo - Index - 8
GetProcessorInfo - ProcessorId - 0000000000000008
GetProcessorInfo - StatusFlag - 00000006
GetProcessorInfo - Location.Package - 00000000
GetProcessorInfo - Location.Core - 00000004
GetProcessorInfo - Location.Thread - 00000000
GetProcessorInfo - Location2.Package - 00000000
GetProcessorInfo - Location2.Die - 00000000
GetProcessorInfo - Location2.Tile - 00000000
GetProcessorInfo - Location2.Module - 00000000
GetProcessorInfo - Location2.Core - 00000004
GetProcessorInfo - Location2.Thread - 00000000
GetProcessorInfo - Index - 9
GetProcessorInfo - ProcessorId - 0000000000000009
GetProcessorInfo - StatusFlag - 00000006
GetProcessorInfo - Location.Package - 00000000
GetProcessorInfo - Location.Core - 00000004
GetProcessorInfo - Location.Thread - 00000001
GetProcessorInfo - Location2.Package - 00000000
GetProcessorInfo - Location2.Die - 00000000
GetProcessorInfo - Location2.Tile - 00000000
GetProcessorInfo - Location2.Module - 00000000
GetProcessorInfo - Location2.Core - 00000004
GetProcessorInfo - Location2.Thread - 00000001
GetProcessorInfo - Index - A
GetProcessorInfo - ProcessorId - 000000000000000A
GetProcessorInfo - StatusFlag - 00000006
GetProcessorInfo - Location.Package - 00000000
GetProcessorInfo - Location.Core - 00000005
GetProcessorInfo - Location.Thread - 00000000
GetProcessorInfo - Location2.Package - 00000000
GetProcessorInfo - Location2.Die - 00000000
GetProcessorInfo - Location2.Tile - 00000000
GetProcessorInfo - Location2.Module - 00000000
GetProcessorInfo - Location2.Core - 00000005
GetProcessorInfo - Location2.Thread - 00000000
GetProcessorInfo - Index - B
GetProcessorInfo - ProcessorId - 000000000000000B
GetProcessorInfo - StatusFlag - 00000006
GetProcessorInfo - Location.Package - 00000000
GetProcessorInfo - Location.Core - 00000005
GetProcessorInfo - Location.Thread - 00000001
GetProcessorInfo - Location2.Package - 00000000
GetProcessorInfo - Location2.Die - 00000000
GetProcessorInfo - Location2.Tile - 00000000
GetProcessorInfo - Location2.Module - 00000000
GetProcessorInfo - Location2.Core - 00000005
GetProcessorInfo - Location2.Thread - 00000001
GetProcessorInfo - Index - C
GetProcessorInfo - ProcessorId - 000000000000000C
GetProcessorInfo - StatusFlag - 00000006
GetProcessorInfo - Location.Package - 00000000
GetProcessorInfo - Location.Core - 00000006
GetProcessorInfo - Location.Thread - 00000000
GetProcessorInfo - Location2.Package - 00000000
GetProcessorInfo - Location2.Die - 00000000
GetProcessorInfo - Location2.Tile - 00000000
GetProcessorInfo - Location2.Module - 00000000
GetProcessorInfo - Location2.Core - 00000006
GetProcessorInfo - Location2.Thread - 00000000
GetProcessorInfo - Index - D
GetProcessorInfo - ProcessorId - 000000000000000D
GetProcessorInfo - StatusFlag - 00000006
GetProcessorInfo - Location.Package - 00000000
GetProcessorInfo - Location.Core - 00000006
GetProcessorInfo - Location.Thread - 00000001
GetProcessorInfo - Location2.Package - 00000000
GetProcessorInfo - Location2.Die - 00000000
GetProcessorInfo - Location2.Tile - 00000000
GetProcessorInfo - Location2.Module - 00000000
GetProcessorInfo - Location2.Core - 00000006
GetProcessorInfo - Location2.Thread - 00000001
GetProcessorInfo - Index - E
GetProcessorInfo - ProcessorId - 000000000000000E
GetProcessorInfo - StatusFlag - 00000006
GetProcessorInfo - Location.Package - 00000000
GetProcessorInfo - Location.Core - 00000007
GetProcessorInfo - Location.Thread - 00000000
GetProcessorInfo - Location2.Package - 00000000
GetProcessorInfo - Location2.Die - 00000000
GetProcessorInfo - Location2.Tile - 00000000
GetProcessorInfo - Location2.Module - 00000000
GetProcessorInfo - Location2.Core - 00000007
GetProcessorInfo - Location2.Thread - 00000000
GetProcessorInfo - Index - F
GetProcessorInfo - ProcessorId - 000000000000000F
GetProcessorInfo - StatusFlag - 00000006
GetProcessorInfo - Location.Package - 00000000
GetProcessorInfo - Location.Core - 00000007
GetProcessorInfo - Location.Thread - 00000001
GetProcessorInfo - Location2.Package - 00000000
GetProcessorInfo - Location2.Die - 00000000
GetProcessorInfo - Location2.Tile - 00000000
GetProcessorInfo - Location2.Module - 00000000
GetProcessorInfo - Location2.Core - 00000007
GetProcessorInfo - Location2.Thread - 00000001
GetProcessorInfo - Index - 10
GetProcessorInfo - ProcessorId - 0000000000000010
GetProcessorInfo - StatusFlag - 00000006
GetProcessorInfo - Location.Package - 00000000
GetProcessorInfo - Location.Core - 00000008
GetProcessorInfo - Location.Thread - 00000000
GetProcessorInfo - Location2.Package - 00000000
GetProcessorInfo - Location2.Die - 00000000
GetProcessorInfo - Location2.Tile - 00000000
GetProcessorInfo - Location2.Module - 00000000
GetProcessorInfo - Location2.Core - 00000008
GetProcessorInfo - Location2.Thread - 00000000
GetProcessorInfo - Index - 11
GetProcessorInfo - ProcessorId - 0000000000000011
GetProcessorInfo - StatusFlag - 00000006
GetProcessorInfo - Location.Package - 00000000
GetProcessorInfo - Location.Core - 00000008
GetProcessorInfo - Location.Thread - 00000001
GetProcessorInfo - Location2.Package - 00000000
GetProcessorInfo - Location2.Die - 00000000
GetProcessorInfo - Location2.Tile - 00000000
GetProcessorInfo - Location2.Module - 00000000
GetProcessorInfo - Location2.Core - 00000008
GetProcessorInfo - Location2.Thread - 00000001
GetProcessorInfo - Index - 12
GetProcessorInfo - ProcessorId - 0000000000000012
GetProcessorInfo - StatusFlag - 00000006
GetProcessorInfo - Location.Package - 00000000
GetProcessorInfo - Location.Core - 00000009
GetProcessorInfo - Location.Thread - 00000000
GetProcessorInfo - Location2.Package - 00000000
GetProcessorInfo - Location2.Die - 00000000
GetProcessorInfo - Location2.Tile - 00000000
GetProcessorInfo - Location2.Module - 00000000
GetProcessorInfo - Location2.Core - 00000009
GetProcessorInfo - Location2.Thread - 00000000
GetProcessorInfo - Index - 13
GetProcessorInfo - ProcessorId - 0000000000000013
GetProcessorInfo - StatusFlag - 00000006
GetProcessorInfo - Location.Package - 00000000
GetProcessorInfo - Location.Core - 00000009
GetProcessorInfo - Location.Thread - 00000001
GetProcessorInfo - Location2.Package - 00000000
GetProcessorInfo - Location2.Die - 00000000
GetProcessorInfo - Location2.Tile - 00000000
GetProcessorInfo - Location2.Module - 00000000
GetProcessorInfo - Location2.Core - 00000009
GetProcessorInfo - Location2.Thread - 00000001
GetProcessorInfo - Index - 14
GetProcessorInfo - ProcessorId - 0000000000000014
GetProcessorInfo - StatusFlag - 00000006
GetProcessorInfo - Location.Package - 00000000
GetProcessorInfo - Location.Core - 0000000A
GetProcessorInfo - Location.Thread - 00000000
GetProcessorInfo - Location2.Package - 00000000
GetProcessorInfo - Location2.Die - 00000000
GetProcessorInfo - Location2.Tile - 00000000
GetProcessorInfo - Location2.Module - 00000000
GetProcessorInfo - Location2.Core - 0000000A
GetProcessorInfo - Location2.Thread - 00000000
GetProcessorInfo - Index - 15
GetProcessorInfo - ProcessorId - 0000000000000015
GetProcessorInfo - StatusFlag - 00000006
GetProcessorInfo - Location.Package - 00000000
GetProcessorInfo - Location.Core - 0000000A
GetProcessorInfo - Location.Thread - 00000001
GetProcessorInfo - Location2.Package - 00000000
GetProcessorInfo - Location2.Die - 00000000
GetProcessorInfo - Location2.Tile - 00000000
GetProcessorInfo - Location2.Module - 00000000
GetProcessorInfo - Location2.Core - 0000000A
GetProcessorInfo - Location2.Thread - 00000001
GetProcessorInfo - Index - 16
GetProcessorInfo - ProcessorId - 0000000000000016
GetProcessorInfo - StatusFlag - 00000006
GetProcessorInfo - Location.Package - 00000000
GetProcessorInfo - Location.Core - 0000000B
GetProcessorInfo - Location.Thread - 00000000
GetProcessorInfo - Location2.Package - 00000000
GetProcessorInfo - Location2.Die - 00000000
GetProcessorInfo - Location2.Tile - 00000000
GetProcessorInfo - Location2.Module - 00000000
GetProcessorInfo - Location2.Core - 0000000B
GetProcessorInfo - Location2.Thread - 00000000
GetProcessorInfo - Index - 17
GetProcessorInfo - ProcessorId - 0000000000000017
GetProcessorInfo - StatusFlag - 00000006
GetProcessorInfo - Location.Package - 00000000
GetProcessorInfo - Location.Core - 0000000B
GetProcessorInfo - Location.Thread - 00000001
GetProcessorInfo - Location2.Package - 00000000
GetProcessorInfo - Location2.Die - 00000000
GetProcessorInfo - Location2.Tile - 00000000
GetProcessorInfo - Location2.Module - 00000000
GetProcessorInfo - Location2.Core - 0000000B
GetProcessorInfo - Location2.Thread - 00000001
GetProcessorInfo - Index - 18
GetProcessorInfo - ProcessorId - 0000000000000018
GetProcessorInfo - StatusFlag - 00000006
GetProcessorInfo - Location.Package - 00000000
GetProcessorInfo - Location.Core - 0000000C
GetProcessorInfo - Location.Thread - 00000000
GetProcessorInfo - Location2.Package - 00000000
GetProcessorInfo - Location2.Die - 00000000
GetProcessorInfo - Location2.Tile - 00000000
GetProcessorInfo - Location2.Module - 00000000
GetProcessorInfo - Location2.Core - 0000000C
GetProcessorInfo - Location2.Thread - 00000000
GetProcessorInfo - Index - 19
GetProcessorInfo - ProcessorId - 0000000000000019
GetProcessorInfo - StatusFlag - 00000006
GetProcessorInfo - Location.Package - 00000000
GetProcessorInfo - Location.Core - 0000000C
GetProcessorInfo - Location.Thread - 00000001
GetProcessorInfo - Location2.Package - 00000000
GetProcessorInfo - Location2.Die - 00000000
GetProcessorInfo - Location2.Tile - 00000000
GetProcessorInfo - Location2.Module - 00000000
GetProcessorInfo - Location2.Core - 0000000C
GetProcessorInfo - Location2.Thread - 00000001
GetProcessorInfo - Index - 1A
GetProcessorInfo - ProcessorId - 000000000000001A
GetProcessorInfo - StatusFlag - 00000006
GetProcessorInfo - Location.Package - 00000000
GetProcessorInfo - Location.Core - 0000000D
GetProcessorInfo - Location.Thread - 00000000
GetProcessorInfo - Location2.Package - 00000000
GetProcessorInfo - Location2.Die - 00000000
GetProcessorInfo - Location2.Tile - 00000000
GetProcessorInfo - Location2.Module - 00000000
GetProcessorInfo - Location2.Core - 0000000D
GetProcessorInfo - Location2.Thread - 00000000
GetProcessorInfo - Index - 1B
GetProcessorInfo - ProcessorId - 000000000000001B
GetProcessorInfo - StatusFlag - 00000006
GetProcessorInfo - Location.Package - 00000000
GetProcessorInfo - Location.Core - 0000000D
GetProcessorInfo - Location.Thread - 00000001
GetProcessorInfo - Location2.Package - 00000000
GetProcessorInfo - Location2.Die - 00000000
GetProcessorInfo - Location2.Tile - 00000000
GetProcessorInfo - Location2.Module - 00000000
GetProcessorInfo - Location2.Core - 0000000D
GetProcessorInfo - Location2.Thread - 00000001
GetProcessorInfo - Index - 1C
GetProcessorInfo - ProcessorId - 000000000000001C
GetProcessorInfo - StatusFlag - 00000006
GetProcessorInfo - Location.Package - 00000000
GetProcessorInfo - Location.Core - 0000000E
GetProcessorInfo - Location.Thread - 00000000
GetProcessorInfo - Location2.Package - 00000000
GetProcessorInfo - Location2.Die - 00000000
GetProcessorInfo - Location2.Tile - 00000000
GetProcessorInfo - Location2.Module - 00000000
GetProcessorInfo - Location2.Core - 0000000E
GetProcessorInfo - Location2.Thread - 00000000
GetProcessorInfo - Index - 1D
GetProcessorInfo - ProcessorId - 000000000000001D
GetProcessorInfo - StatusFlag - 00000006
GetProcessorInfo - Location.Package - 00000000
GetProcessorInfo - Location.Core - 0000000E
GetProcessorInfo - Location.Thread - 00000001
GetProcessorInfo - Location2.Package - 00000000
GetProcessorInfo - Location2.Die - 00000000
GetProcessorInfo - Location2.Tile - 00000000
GetProcessorInfo - Location2.Module - 00000000
GetProcessorInfo - Location2.Core - 0000000E
GetProcessorInfo - Location2.Thread - 00000001
GetProcessorInfo - Index - 1E
GetProcessorInfo - ProcessorId - 000000000000001E
GetProcessorInfo - StatusFlag - 00000006
GetProcessorInfo - Location.Package - 00000000
GetProcessorInfo - Location.Core - 0000000F
GetProcessorInfo - Location.Thread - 00000000
GetProcessorInfo - Location2.Package - 00000000
GetProcessorInfo - Location2.Die - 00000000
GetProcessorInfo - Location2.Tile - 00000000
GetProcessorInfo - Location2.Module - 00000000
GetProcessorInfo - Location2.Core - 0000000F
GetProcessorInfo - Location2.Thread - 00000000
GetProcessorInfo - Index - 1F
GetProcessorInfo - ProcessorId - 000000000000001F
GetProcessorInfo - StatusFlag - 00000006
GetProcessorInfo - Location.Package - 00000000
GetProcessorInfo - Location.Core - 0000000F
GetProcessorInfo - Location.Thread - 00000001
GetProcessorInfo - Location2.Package - 00000000
GetProcessorInfo - Location2.Die - 00000000
GetProcessorInfo - Location2.Tile - 00000000
GetProcessorInfo - Location2.Module - 00000000
GetProcessorInfo - Location2.Core - 0000000F
GetProcessorInfo - Location2.Thread - 00000001
GetProcessorInfo - Index - 20
GetProcessorInfo - ProcessorId - 0000000000000020
GetProcessorInfo - StatusFlag - 00000006
GetProcessorInfo - Location.Package - 00000000
GetProcessorInfo - Location.Core - 00000010
GetProcessorInfo - Location.Thread - 00000000
GetProcessorInfo - Location2.Package - 00000000
GetProcessorInfo - Location2.Die - 00000000
GetProcessorInfo - Location2.Tile - 00000000
GetProcessorInfo - Location2.Module - 00000000
GetProcessorInfo - Location2.Core - 00000010
GetProcessorInfo - Location2.Thread - 00000000
GetProcessorInfo - Index - 21
GetProcessorInfo - ProcessorId - 0000000000000021
GetProcessorInfo - StatusFlag - 00000006
GetProcessorInfo - Location.Package - 00000000
GetProcessorInfo - Location.Core - 00000010
GetProcessorInfo - Location.Thread - 00000001
GetProcessorInfo - Location2.Package - 00000000
GetProcessorInfo - Location2.Die - 00000000
GetProcessorInfo - Location2.Tile - 00000000
GetProcessorInfo - Location2.Module - 00000000
GetProcessorInfo - Location2.Core - 00000010
GetProcessorInfo - Location2.Thread - 00000001
GetProcessorInfo - Index - 22
GetProcessorInfo - ProcessorId - 0000000000000022
GetProcessorInfo - StatusFlag - 00000006
GetProcessorInfo - Location.Package - 00000000
GetProcessorInfo - Location.Core - 00000011
GetProcessorInfo - Location.Thread - 00000000
GetProcessorInfo - Location2.Package - 00000000
GetProcessorInfo - Location2.Die - 00000000
GetProcessorInfo - Location2.Tile - 00000000
GetProcessorInfo - Location2.Module - 00000000
GetProcessorInfo - Location2.Core - 00000011
GetProcessorInfo - Location2.Thread - 00000000
GetProcessorInfo - Index - 23
GetProcessorInfo - ProcessorId - 0000000000000023
GetProcessorInfo - StatusFlag - 00000006
GetProcessorInfo - Location.Package - 00000000
GetProcessorInfo - Location.Core - 00000011
GetProcessorInfo - Location.Thread - 00000001
GetProcessorInfo - Location2.Package - 00000000
GetProcessorInfo - Location2.Die - 00000000
GetProcessorInfo - Location2.Tile - 00000000
GetProcessorInfo - Location2.Module - 00000000
GetProcessorInfo - Location2.Core - 00000011
GetProcessorInfo - Location2.Thread - 00000001
GetProcessorInfo - Index - 24
GetProcessorInfo - ProcessorId - 0000000000000024
GetProcessorInfo - StatusFlag - 00000006
GetProcessorInfo - Location.Package - 00000000
GetProcessorInfo - Location.Core - 00000012
GetProcessorInfo - Location.Thread - 00000000
GetProcessorInfo - Location2.Package - 00000000
GetProcessorInfo - Location2.Die - 00000000
GetProcessorInfo - Location2.Tile - 00000000
GetProcessorInfo - Location2.Module - 00000000
GetProcessorInfo - Location2.Core - 00000012
GetProcessorInfo - Location2.Thread - 00000000
GetProcessorInfo - Index - 25
GetProcessorInfo - ProcessorId - 0000000000000025
GetProcessorInfo - StatusFlag - 00000006
GetProcessorInfo - Location.Package - 00000000
GetProcessorInfo - Location.Core - 00000012
GetProcessorInfo - Location.Thread - 00000001
GetProcessorInfo - Location2.Package - 00000000
GetProcessorInfo - Location2.Die - 00000000
GetProcessorInfo - Location2.Tile - 00000000
GetProcessorInfo - Location2.Module - 00000000
GetProcessorInfo - Location2.Core - 00000012
GetProcessorInfo - Location2.Thread - 00000001
GetProcessorInfo - Index - 26
GetProcessorInfo - ProcessorId - 0000000000000026
GetProcessorInfo - StatusFlag - 00000006
GetProcessorInfo - Location.Package - 00000000
GetProcessorInfo - Location.Core - 00000013
GetProcessorInfo - Location.Thread - 00000000
GetProcessorInfo - Location2.Package - 00000000
GetProcessorInfo - Location2.Die - 00000000
GetProcessorInfo - Location2.Tile - 00000000
GetProcessorInfo - Location2.Module - 00000000
GetProcessorInfo - Location2.Core - 00000013
GetProcessorInfo - Location2.Thread - 00000000
GetProcessorInfo - Index - 27
GetProcessorInfo - ProcessorId - 0000000000000027
GetProcessorInfo - StatusFlag - 00000006
GetProcessorInfo - Location.Package - 00000000
GetProcessorInfo - Location.Core - 00000013
GetProcessorInfo - Location.Thread - 00000001
GetProcessorInfo - Location2.Package - 00000000
GetProcessorInfo - Location2.Die - 00000000
GetProcessorInfo - Location2.Tile - 00000000
GetProcessorInfo - Location2.Module - 00000000
GetProcessorInfo - Location2.Core - 00000013
GetProcessorInfo - Location2.Thread - 00000001
GetProcessorInfo - Index - 28
GetProcessorInfo - ProcessorId - 0000000000000028
GetProcessorInfo - StatusFlag - 00000006
GetProcessorInfo - Location.Package - 00000000
GetProcessorInfo - Location.Core - 00000014
GetProcessorInfo - Location.Thread - 00000000
GetProcessorInfo - Location2.Package - 00000000
GetProcessorInfo - Location2.Die - 00000000
GetProcessorInfo - Location2.Tile - 00000000
GetProcessorInfo - Location2.Module - 00000000
GetProcessorInfo - Location2.Core - 00000014
GetProcessorInfo - Location2.Thread - 00000000
GetProcessorInfo - Index - 29
GetProcessorInfo - ProcessorId - 0000000000000029
GetProcessorInfo - StatusFlag - 00000006
GetProcessorInfo - Location.Package - 00000000
GetProcessorInfo - Location.Core - 00000014
GetProcessorInfo - Location.Thread - 00000001
GetProcessorInfo - Location2.Package - 00000000
GetProcessorInfo - Location2.Die - 00000000
GetProcessorInfo - Location2.Tile - 00000000
GetProcessorInfo - Location2.Module - 00000000
GetProcessorInfo - Location2.Core - 00000014
GetProcessorInfo - Location2.Thread - 00000001
GetProcessorInfo - Index - 2A
GetProcessorInfo - ProcessorId - 000000000000002A
GetProcessorInfo - StatusFlag - 00000006
GetProcessorInfo - Location.Package - 00000000
GetProcessorInfo - Location.Core - 00000015
GetProcessorInfo - Location.Thread - 00000000
GetProcessorInfo - Location2.Package - 00000000
GetProcessorInfo - Location2.Die - 00000000
GetProcessorInfo - Location2.Tile - 00000000
GetProcessorInfo - Location2.Module - 00000000
GetProcessorInfo - Location2.Core - 00000015
GetProcessorInfo - Location2.Thread - 00000000
GetProcessorInfo - Index - 2B
GetProcessorInfo - ProcessorId - 000000000000002B
GetProcessorInfo - StatusFlag - 00000006
GetProcessorInfo - Location.Package - 00000000
GetProcessorInfo - Location.Core - 00000015
GetProcessorInfo - Location.Thread - 00000001
GetProcessorInfo - Location2.Package - 00000000
GetProcessorInfo - Location2.Die - 00000000
GetProcessorInfo - Location2.Tile - 00000000
GetProcessorInfo - Location2.Module - 00000000
GetProcessorInfo - Location2.Core - 00000015
GetProcessorInfo - Location2.Thread - 00000001
GetProcessorInfo - Index - 2C
GetProcessorInfo - ProcessorId - 000000000000002C
GetProcessorInfo - StatusFlag - 00000006
GetProcessorInfo - Location.Package - 00000000
GetProcessorInfo - Location.Core - 00000016
GetProcessorInfo - Location.Thread - 00000000
GetProcessorInfo - Location2.Package - 00000000
GetProcessorInfo - Location2.Die - 00000000
GetProcessorInfo - Location2.Tile - 00000000
GetProcessorInfo - Location2.Module - 00000000
GetProcessorInfo - Location2.Core - 00000016
GetProcessorInfo - Location2.Thread - 00000000
GetProcessorInfo - Index - 2D
GetProcessorInfo - ProcessorId - 000000000000002D
GetProcessorInfo - StatusFlag - 00000006
GetProcessorInfo - Location.Package - 00000000
GetProcessorInfo - Location.Core - 00000016
GetProcessorInfo - Location.Thread - 00000001
GetProcessorInfo - Location2.Package - 00000000
GetProcessorInfo - Location2.Die - 00000000
GetProcessorInfo - Location2.Tile - 00000000
GetProcessorInfo - Location2.Module - 00000000
GetProcessorInfo - Location2.Core - 00000016
GetProcessorInfo - Location2.Thread - 00000001
GetProcessorInfo - Index - 2E
GetProcessorInfo - ProcessorId - 000000000000002E
GetProcessorInfo - StatusFlag - 00000006
GetProcessorInfo - Location.Package - 00000000
GetProcessorInfo - Location.Core - 00000017
GetProcessorInfo - Location.Thread - 00000000
GetProcessorInfo - Location2.Package - 00000000
GetProcessorInfo - Location2.Die - 00000000
GetProcessorInfo - Location2.Tile - 00000000
GetProcessorInfo - Location2.Module - 00000000
GetProcessorInfo - Location2.Core - 00000017
GetProcessorInfo - Location2.Thread - 00000000
GetProcessorInfo - Index - 2F
GetProcessorInfo - ProcessorId - 000000000000002F
GetProcessorInfo - StatusFlag - 00000006
GetProcessorInfo - Location.Package - 00000000
GetProcessorInfo - Location.Core - 00000017
GetProcessorInfo - Location.Thread - 00000001
GetProcessorInfo - Location2.Package - 00000000
GetProcessorInfo - Location2.Die - 00000000
GetProcessorInfo - Location2.Tile - 00000000
GetProcessorInfo - Location2.Module - 00000000
GetProcessorInfo - Location2.Core - 00000017
GetProcessorInfo - Location2.Thread - 00000001
GetProcessorInfo - Index - 30
GetProcessorInfo - ProcessorId - 0000000000000030
GetProcessorInfo - StatusFlag - 00000006
GetProcessorInfo - Location.Package - 00000000
GetProcessorInfo - Location.Core - 00000018
GetProcessorInfo - Location.Thread - 00000000
GetProcessorInfo - Location2.Package - 00000000
GetProcessorInfo - Location2.Die - 00000000
GetProcessorInfo - Location2.Tile - 00000000
GetProcessorInfo - Location2.Module - 00000000
GetProcessorInfo - Location2.Core - 00000018
GetProcessorInfo - Location2.Thread - 00000000
GetProcessorInfo - Index - 31
GetProcessorInfo - ProcessorId - 0000000000000031
GetProcessorInfo - StatusFlag - 00000006
GetProcessorInfo - Location.Package - 00000000
GetProcessorInfo - Location.Core - 00000018
GetProcessorInfo - Location.Thread - 00000001
GetProcessorInfo - Location2.Package - 00000000
GetProcessorInfo - Location2.Die - 00000000
GetProcessorInfo - Location2.Tile - 00000000
GetProcessorInfo - Location2.Module - 00000000
GetProcessorInfo - Location2.Core - 00000018
GetProcessorInfo - Location2.Thread - 00000001
GetProcessorInfo - Index - 32
GetProcessorInfo - ProcessorId - 0000000000000032
GetProcessorInfo - StatusFlag - 00000006
GetProcessorInfo - Location.Package - 00000000
GetProcessorInfo - Location.Core - 00000019
GetProcessorInfo - Location.Thread - 00000000
GetProcessorInfo - Location2.Package - 00000000
GetProcessorInfo - Location2.Die - 00000000
GetProcessorInfo - Location2.Tile - 00000000
GetProcessorInfo - Location2.Module - 00000000
GetProcessorInfo - Location2.Core - 00000019
GetProcessorInfo - Location2.Thread - 00000000
GetProcessorInfo - Index - 33
GetProcessorInfo - ProcessorId - 0000000000000033
GetProcessorInfo - StatusFlag - 00000006
GetProcessorInfo - Location.Package - 00000000
GetProcessorInfo - Location.Core - 00000019
GetProcessorInfo - Location.Thread - 00000001
GetProcessorInfo - Location2.Package - 00000000
GetProcessorInfo - Location2.Die - 00000000
GetProcessorInfo - Location2.Tile - 00000000
GetProcessorInfo - Location2.Module - 00000000
GetProcessorInfo - Location2.Core - 00000019
GetProcessorInfo - Location2.Thread - 00000001
GetProcessorInfo - Index - 34
GetProcessorInfo - ProcessorId - 0000000000000034
GetProcessorInfo - StatusFlag - 00000006
GetProcessorInfo - Location.Package - 00000000
GetProcessorInfo - Location.Core - 0000001A
GetProcessorInfo - Location.Thread - 00000000
GetProcessorInfo - Location2.Package - 00000000
GetProcessorInfo - Location2.Die - 00000000
GetProcessorInfo - Location2.Tile - 00000000
GetProcessorInfo - Location2.Module - 00000000
GetProcessorInfo - Location2.Core - 0000001A
GetProcessorInfo - Location2.Thread - 00000000
GetProcessorInfo - Index - 35
GetProcessorInfo - ProcessorId - 0000000000000035
GetProcessorInfo - StatusFlag - 00000006
GetProcessorInfo - Location.Package - 00000000
GetProcessorInfo - Location.Core - 0000001A
GetProcessorInfo - Location.Thread - 00000001
GetProcessorInfo - Location2.Package - 00000000
GetProcessorInfo - Location2.Die - 00000000
GetProcessorInfo - Location2.Tile - 00000000
GetProcessorInfo - Location2.Module - 00000000
GetProcessorInfo - Location2.Core - 0000001A
GetProcessorInfo - Location2.Thread - 00000001
GetProcessorInfo - Index - 36
GetProcessorInfo - ProcessorId - 0000000000000036
GetProcessorInfo - StatusFlag - 00000006
GetProcessorInfo - Location.Package - 00000000
GetProcessorInfo - Location.Core - 0000001B
GetProcessorInfo - Location.Thread - 00000000
GetProcessorInfo - Location2.Package - 00000000
GetProcessorInfo - Location2.Die - 00000000
GetProcessorInfo - Location2.Tile - 00000000
GetProcessorInfo - Location2.Module - 00000000
GetProcessorInfo - Location2.Core - 0000001B
GetProcessorInfo - Location2.Thread - 00000000
GetProcessorInfo - Index - 37
GetProcessorInfo - ProcessorId - 0000000000000037
GetProcessorInfo - StatusFlag - 00000006
GetProcessorInfo - Location.Package - 00000000
GetProcessorInfo - Location.Core - 0000001B
GetProcessorInfo - Location.Thread - 00000001
GetProcessorInfo - Location2.Package - 00000000
GetProcessorInfo - Location2.Die - 00000000
GetProcessorInfo - Location2.Tile - 00000000
GetProcessorInfo - Location2.Module - 00000000
GetProcessorInfo - Location2.Core - 0000001B
GetProcessorInfo - Location2.Thread - 00000001
GetProcessorInfo - Index - 38
GetProcessorInfo - ProcessorId - 0000000000000038
GetProcessorInfo - StatusFlag - 00000006
GetProcessorInfo - Location.Package - 00000000
GetProcessorInfo - Location.Core - 0000001C
GetProcessorInfo - Location.Thread - 00000000
GetProcessorInfo - Location2.Package - 00000000
GetProcessorInfo - Location2.Die - 00000000
GetProcessorInfo - Location2.Tile - 00000000
GetProcessorInfo - Location2.Module - 00000000
GetProcessorInfo - Location2.Core - 0000001C
GetProcessorInfo - Location2.Thread - 00000000
GetProcessorInfo - Index - 39
GetProcessorInfo - ProcessorId - 0000000000000039
GetProcessorInfo - StatusFlag - 00000006
GetProcessorInfo - Location.Package - 00000000
GetProcessorInfo - Location.Core - 0000001C
GetProcessorInfo - Location.Thread - 00000001
GetProcessorInfo - Location2.Package - 00000000
GetProcessorInfo - Location2.Die - 00000000
GetProcessorInfo - Location2.Tile - 00000000
GetProcessorInfo - Location2.Module - 00000000
GetProcessorInfo - Location2.Core - 0000001C
GetProcessorInfo - Location2.Thread - 00000001
GetProcessorInfo - Index - 3A
GetProcessorInfo - ProcessorId - 000000000000003A
GetProcessorInfo - StatusFlag - 00000006
GetProcessorInfo - Location.Package - 00000000
GetProcessorInfo - Location.Core - 0000001D
GetProcessorInfo - Location.Thread - 00000000
GetProcessorInfo - Location2.Package - 00000000
GetProcessorInfo - Location2.Die - 00000000
GetProcessorInfo - Location2.Tile - 00000000
GetProcessorInfo - Location2.Module - 00000000
GetProcessorInfo - Location2.Core - 0000001D
GetProcessorInfo - Location2.Thread - 00000000
GetProcessorInfo - Index - 3B
GetProcessorInfo - ProcessorId - 000000000000003B
GetProcessorInfo - StatusFlag - 00000006
GetProcessorInfo - Location.Package - 00000000
GetProcessorInfo - Location.Core - 0000001D
GetProcessorInfo - Location.Thread - 00000001
GetProcessorInfo - Location2.Package - 00000000
GetProcessorInfo - Location2.Die - 00000000
GetProcessorInfo - Location2.Tile - 00000000
GetProcessorInfo - Location2.Module - 00000000
GetProcessorInfo - Location2.Core - 0000001D
GetProcessorInfo - Location2.Thread - 00000001
GetProcessorInfo - Index - 3C
GetProcessorInfo - ProcessorId - 000000000000003C
GetProcessorInfo - StatusFlag - 00000006
GetProcessorInfo - Location.Package - 00000000
GetProcessorInfo - Location.Core - 0000001E
GetProcessorInfo - Location.Thread - 00000000
GetProcessorInfo - Location2.Package - 00000000
GetProcessorInfo - Location2.Die - 00000000
GetProcessorInfo - Location2.Tile - 00000000
GetProcessorInfo - Location2.Module - 00000000
GetProcessorInfo - Location2.Core - 0000001E
GetProcessorInfo - Location2.Thread - 00000000
GetProcessorInfo - Index - 3D
GetProcessorInfo - ProcessorId - 000000000000003D
GetProcessorInfo - StatusFlag - 00000006
GetProcessorInfo - Location.Package - 00000000
GetProcessorInfo - Location.Core - 0000001E
GetProcessorInfo - Location.Thread - 00000001
GetProcessorInfo - Location2.Package - 00000000
GetProcessorInfo - Location2.Die - 00000000
GetProcessorInfo - Location2.Tile - 00000000
GetProcessorInfo - Location2.Module - 00000000
GetProcessorInfo - Location2.Core - 0000001E
GetProcessorInfo - Location2.Thread - 00000001
GetProcessorInfo - Index - 3E
GetProcessorInfo - ProcessorId - 000000000000003E
GetProcessorInfo - StatusFlag - 00000006
GetProcessorInfo - Location.Package - 00000000
GetProcessorInfo - Location.Core - 0000001F
GetProcessorInfo - Location.Thread - 00000000
GetProcessorInfo - Location2.Package - 00000000
GetProcessorInfo - Location2.Die - 00000000
GetProcessorInfo - Location2.Tile - 00000000
GetProcessorInfo - Location2.Module - 00000000
GetProcessorInfo - Location2.Core - 0000001F
GetProcessorInfo - Location2.Thread - 00000000
GetProcessorInfo - Index - 3F
GetProcessorInfo - ProcessorId - 000000000000003F
GetProcessorInfo - StatusFlag - 00000006
GetProcessorInfo - Location.Package - 00000000
GetProcessorInfo - Location.Core - 0000001F
GetProcessorInfo - Location.Thread - 00000001
GetProcessorInfo - Location2.Package - 00000000
GetProcessorInfo - Location2.Die - 00000000
GetProcessorInfo - Location2.Tile - 00000000
GetProcessorInfo - Location2.Module - 00000000
GetProcessorInfo - Location2.Core - 0000001F
GetProcessorInfo - Location2.Thread - 00000001
GetProcessorInfo - Index - 40
GetProcessorInfo - ProcessorId - 0000000000000040
GetProcessorInfo - StatusFlag - 00000006
GetProcessorInfo - Location.Package - 00000000
GetProcessorInfo - Location.Core - 00000020
GetProcessorInfo - Location.Thread - 00000000
GetProcessorInfo - Location2.Package - 00000000
GetProcessorInfo - Location2.Die - 00000000
GetProcessorInfo - Location2.Tile - 00000000
GetProcessorInfo - Location2.Module - 00000000
GetProcessorInfo - Location2.Core - 00000020
GetProcessorInfo - Location2.Thread - 00000000
GetProcessorInfo - Index - 41
GetProcessorInfo - ProcessorId - 0000000000000041
GetProcessorInfo - StatusFlag - 00000006
GetProcessorInfo - Location.Package - 00000000
GetProcessorInfo - Location.Core - 00000020
GetProcessorInfo - Location.Thread - 00000001
GetProcessorInfo - Location2.Package - 00000000
GetProcessorInfo - Location2.Die - 00000000
GetProcessorInfo - Location2.Tile - 00000000
GetProcessorInfo - Location2.Module - 00000000
GetProcessorInfo - Location2.Core - 00000020
GetProcessorInfo - Location2.Thread - 00000001
GetProcessorInfo - Index - 42
GetProcessorInfo - ProcessorId - 0000000000000042
GetProcessorInfo - StatusFlag - 00000006
GetProcessorInfo - Location.Package - 00000000
GetProcessorInfo - Location.Core - 00000021
GetProcessorInfo - Location.Thread - 00000000
GetProcessorInfo - Location2.Package - 00000000
GetProcessorInfo - Location2.Die - 00000000
GetProcessorInfo - Location2.Tile - 00000000
GetProcessorInfo - Location2.Module - 00000000
GetProcessorInfo - Location2.Core - 00000021
GetProcessorInfo - Location2.Thread - 00000000
GetProcessorInfo - Index - 43
GetProcessorInfo - ProcessorId - 0000000000000043
GetProcessorInfo - StatusFlag - 00000006
GetProcessorInfo - Location.Package - 00000000
GetProcessorInfo - Location.Core - 00000021
GetProcessorInfo - Location.Thread - 00000001
GetProcessorInfo - Location2.Package - 00000000
GetProcessorInfo - Location2.Die - 00000000
GetProcessorInfo - Location2.Tile - 00000000
GetProcessorInfo - Location2.Module - 00000000
GetProcessorInfo - Location2.Core - 00000021
GetProcessorInfo - Location2.Thread - 00000001
GetProcessorInfo - Index - 44
GetProcessorInfo - ProcessorId - 0000000000000044
GetProcessorInfo - StatusFlag - 00000006
GetProcessorInfo - Location.Package - 00000000
GetProcessorInfo - Location.Core - 00000022
GetProcessorInfo - Location.Thread - 00000000
GetProcessorInfo - Location2.Package - 00000000
GetProcessorInfo - Location2.Die - 00000000
GetProcessorInfo - Location2.Tile - 00000000
GetProcessorInfo - Location2.Module - 00000000
GetProcessorInfo - Location2.Core - 00000022
GetProcessorInfo - Location2.Thread - 00000000
GetProcessorInfo - Index - 45
GetProcessorInfo - ProcessorId - 0000000000000045
GetProcessorInfo - StatusFlag - 00000006
GetProcessorInfo - Location.Package - 00000000
GetProcessorInfo - Location.Core - 00000022
GetProcessorInfo - Location.Thread - 00000001
GetProcessorInfo - Location2.Package - 00000000
GetProcessorInfo - Location2.Die - 00000000
GetProcessorInfo - Location2.Tile - 00000000
GetProcessorInfo - Location2.Module - 00000000
GetProcessorInfo - Location2.Core - 00000022
GetProcessorInfo - Location2.Thread - 00000001
GetProcessorInfo - Index - 46
GetProcessorInfo - ProcessorId - 0000000000000046
GetProcessorInfo - StatusFlag - 00000006
GetProcessorInfo - Location.Package - 00000000
GetProcessorInfo - Location.Core - 00000023
GetProcessorInfo - Location.Thread - 00000000
GetProcessorInfo - Location2.Package - 00000000
GetProcessorInfo - Location2.Die - 00000000
GetProcessorInfo - Location2.Tile - 00000000
GetProcessorInfo - Location2.Module - 00000000
GetProcessorInfo - Location2.Core - 00000023
GetProcessorInfo - Location2.Thread - 00000000
GetProcessorInfo - Index - 47
GetProcessorInfo - ProcessorId - 0000000000000047
GetProcessorInfo - StatusFlag - 00000006
GetProcessorInfo - Location.Package - 00000000
GetProcessorInfo - Location.Core - 00000023
GetProcessorInfo - Location.Thread - 00000001
GetProcessorInfo - Location2.Package - 00000000
GetProcessorInfo - Location2.Die - 00000000
GetProcessorInfo - Location2.Tile - 00000000
GetProcessorInfo - Location2.Module - 00000000
GetProcessorInfo - Location2.Core - 00000023
GetProcessorInfo - Location2.Thread - 00000001
GetProcessorInfo - Index - 48
GetProcessorInfo - ProcessorId - 0000000000000048
GetProcessorInfo - StatusFlag - 00000006
GetProcessorInfo - Location.Package - 00000000
GetProcessorInfo - Location.Core - 00000024
GetProcessorInfo - Location.Thread - 00000000
GetProcessorInfo - Location2.Package - 00000000
GetProcessorInfo - Location2.Die - 00000000
GetProcessorInfo - Location2.Tile - 00000000
GetProcessorInfo - Location2.Module - 00000000
GetProcessorInfo - Location2.Core - 00000024
GetProcessorInfo - Location2.Thread - 00000000
GetProcessorInfo - Index - 49
GetProcessorInfo - ProcessorId - 0000000000000049
GetProcessorInfo - StatusFlag - 00000006
GetProcessorInfo - Location.Package - 00000000
GetProcessorInfo - Location.Core - 00000024
GetProcessorInfo - Location.Thread - 00000001
GetProcessorInfo - Location2.Package - 00000000
GetProcessorInfo - Location2.Die - 00000000
GetProcessorInfo - Location2.Tile - 00000000
GetProcessorInfo - Location2.Module - 00000000
GetProcessorInfo - Location2.Core - 00000024
GetProcessorInfo - Location2.Thread - 00000001
GetProcessorInfo - Index - 4A
GetProcessorInfo - ProcessorId - 000000000000004A
GetProcessorInfo - StatusFlag - 00000006
GetProcessorInfo - Location.Package - 00000000
GetProcessorInfo - Location.Core - 00000025
GetProcessorInfo - Location.Thread - 00000000
GetProcessorInfo - Location2.Package - 00000000
GetProcessorInfo - Location2.Die - 00000000
GetProcessorInfo - Location2.Tile - 00000000
GetProcessorInfo - Location2.Module - 00000000
GetProcessorInfo - Location2.Core - 00000025
GetProcessorInfo - Location2.Thread - 00000000
GetProcessorInfo - Index - 4B
GetProcessorInfo - ProcessorId - 000000000000004B
GetProcessorInfo - StatusFlag - 00000006
GetProcessorInfo - Location.Package - 00000000
GetProcessorInfo - Location.Core - 00000025
GetProcessorInfo - Location.Thread - 00000001
GetProcessorInfo - Location2.Package - 00000000
GetProcessorInfo - Location2.Die - 00000000
GetProcessorInfo - Location2.Tile - 00000000
GetProcessorInfo - Location2.Module - 00000000
GetProcessorInfo - Location2.Core - 00000025
GetProcessorInfo - Location2.Thread - 00000001
GetProcessorInfo - Index - 4C
GetProcessorInfo - ProcessorId - 000000000000004C
GetProcessorInfo - StatusFlag - 00000006
GetProcessorInfo - Location.Package - 00000000
GetProcessorInfo - Location.Core - 00000026
GetProcessorInfo - Location.Thread - 00000000
GetProcessorInfo - Location2.Package - 00000000
GetProcessorInfo - Location2.Die - 00000000
GetProcessorInfo - Location2.Tile - 00000000
GetProcessorInfo - Location2.Module - 00000000
GetProcessorInfo - Location2.Core - 00000026
GetProcessorInfo - Location2.Thread - 00000000
GetProcessorInfo - Index - 4D
GetProcessorInfo - ProcessorId - 000000000000004D
GetProcessorInfo - StatusFlag - 00000006
GetProcessorInfo - Location.Package - 00000000
GetProcessorInfo - Location.Core - 00000026
GetProcessorInfo - Location.Thread - 00000001
GetProcessorInfo - Location2.Package - 00000000
GetProcessorInfo - Location2.Die - 00000000
GetProcessorInfo - Location2.Tile - 00000000
GetProcessorInfo - Location2.Module - 00000000
GetProcessorInfo - Location2.Core - 00000026
GetProcessorInfo - Location2.Thread - 00000001
GetProcessorInfo - Index - 4E
GetProcessorInfo - ProcessorId - 000000000000004E
GetProcessorInfo - StatusFlag - 00000006
GetProcessorInfo - Location.Package - 00000000
GetProcessorInfo - Location.Core - 00000027
GetProcessorInfo - Location.Thread - 00000000
GetProcessorInfo - Location2.Package - 00000000
GetProcessorInfo - Location2.Die - 00000000
GetProcessorInfo - Location2.Tile - 00000000
GetProcessorInfo - Location2.Module - 00000000
GetProcessorInfo - Location2.Core - 00000027
GetProcessorInfo - Location2.Thread - 00000000
GetProcessorInfo - Index - 4F
GetProcessorInfo - ProcessorId - 000000000000004F
GetProcessorInfo - StatusFlag - 00000006
GetProcessorInfo - Location.Package - 00000000
GetProcessorInfo - Location.Core - 00000027
GetProcessorInfo - Location.Thread - 00000001
GetProcessorInfo - Location2.Package - 00000000
GetProcessorInfo - Location2.Die - 00000000
GetProcessorInfo - Location2.Tile - 00000000
GetProcessorInfo - Location2.Module - 00000000
GetProcessorInfo - Location2.Core - 00000027
GetProcessorInfo - Location2.Thread - 00000001
GetProcessorInfo - Index - 50
GetProcessorInfo - ProcessorId - 0000000000000080
GetProcessorInfo - StatusFlag - 00000006
GetProcessorInfo - Location.Package - 00000001
GetProcessorInfo - Location.Core - 00000000
GetProcessorInfo - Location.Thread - 00000000
GetProcessorInfo - Location2.Package - 00000001
GetProcessorInfo - Location2.Die - 00000000
GetProcessorInfo - Location2.Tile - 00000000
GetProcessorInfo - Location2.Module - 00000000
GetProcessorInfo - Location2.Core - 00000000
GetProcessorInfo - Location2.Thread - 00000000
GetProcessorInfo - Index - 51
GetProcessorInfo - ProcessorId - 0000000000000081
GetProcessorInfo - StatusFlag - 00000006
GetProcessorInfo - Location.Package - 00000001
GetProcessorInfo - Location.Core - 00000000
GetProcessorInfo - Location.Thread - 00000001
GetProcessorInfo - Location2.Package - 00000001
GetProcessorInfo - Location2.Die - 00000000
GetProcessorInfo - Location2.Tile - 00000000
GetProcessorInfo - Location2.Module - 00000000
GetProcessorInfo - Location2.Core - 00000000
GetProcessorInfo - Location2.Thread - 00000001
GetProcessorInfo - Index - 52
GetProcessorInfo - ProcessorId - 0000000000000082
GetProcessorInfo - StatusFlag - 00000006
GetProcessorInfo - Location.Package - 00000001
GetProcessorInfo - Location.Core - 00000001
GetProcessorInfo - Location.Thread - 00000000
GetProcessorInfo - Location2.Package - 00000001
GetProcessorInfo - Location2.Die - 00000000
GetProcessorInfo - Location2.Tile - 00000000
GetProcessorInfo - Location2.Module - 00000000
GetProcessorInfo - Location2.Core - 00000001
GetProcessorInfo - Location2.Thread - 00000000
GetProcessorInfo - Index - 53
GetProcessorInfo - ProcessorId - 0000000000000083
GetProcessorInfo - StatusFlag - 00000006
GetProcessorInfo - Location.Package - 00000001
GetProcessorInfo - Location.Core - 00000001
GetProcessorInfo - Location.Thread - 00000001
GetProcessorInfo - Location2.Package - 00000001
GetProcessorInfo - Location2.Die - 00000000
GetProcessorInfo - Location2.Tile - 00000000
GetProcessorInfo - Location2.Module - 00000000
GetProcessorInfo - Location2.Core - 00000001
GetProcessorInfo - Location2.Thread - 00000001
GetProcessorInfo - Index - 54
GetProcessorInfo - ProcessorId - 0000000000000084
GetProcessorInfo - StatusFlag - 00000006
GetProcessorInfo - Location.Package - 00000001
GetProcessorInfo - Location.Core - 00000002
GetProcessorInfo - Location.Thread - 00000000
GetProcessorInfo - Location2.Package - 00000001
GetProcessorInfo - Location2.Die - 00000000
GetProcessorInfo - Location2.Tile - 00000000
GetProcessorInfo - Location2.Module - 00000000
GetProcessorInfo - Location2.Core - 00000002
GetProcessorInfo - Location2.Thread - 00000000
GetProcessorInfo - Index - 55
GetProcessorInfo - ProcessorId - 0000000000000085
GetProcessorInfo - StatusFlag - 00000006
GetProcessorInfo - Location.Package - 00000001
GetProcessorInfo - Location.Core - 00000002
GetProcessorInfo - Location.Thread - 00000001
GetProcessorInfo - Location2.Package - 00000001
GetProcessorInfo - Location2.Die - 00000000
GetProcessorInfo - Location2.Tile - 00000000
GetProcessorInfo - Location2.Module - 00000000
GetProcessorInfo - Location2.Core - 00000002
GetProcessorInfo - Location2.Thread - 00000001
GetProcessorInfo - Index - 56
GetProcessorInfo - ProcessorId - 0000000000000086
GetProcessorInfo - StatusFlag - 00000006
GetProcessorInfo - Location.Package - 00000001
GetProcessorInfo - Location.Core - 00000003
GetProcessorInfo - Location.Thread - 00000000
GetProcessorInfo - Location2.Package - 00000001
GetProcessorInfo - Location2.Die - 00000000
GetProcessorInfo - Location2.Tile - 00000000
GetProcessorInfo - Location2.Module - 00000000
GetProcessorInfo - Location2.Core - 00000003
GetProcessorInfo - Location2.Thread - 00000000
GetProcessorInfo - Index - 57
GetProcessorInfo - ProcessorId - 0000000000000087
GetProcessorInfo - StatusFlag - 00000006
GetProcessorInfo - Location.Package - 00000001
GetProcessorInfo - Location.Core - 00000003
GetProcessorInfo - Location.Thread - 00000001
GetProcessorInfo - Location2.Package - 00000001
GetProcessorInfo - Location2.Die - 00000000
GetProcessorInfo - Location2.Tile - 00000000
GetProcessorInfo - Location2.Module - 00000000
GetProcessorInfo - Location2.Core - 00000003
GetProcessorInfo - Location2.Thread - 00000001
GetProcessorInfo - Index - 58
GetProcessorInfo - ProcessorId - 0000000000000088
GetProcessorInfo - StatusFlag - 00000006
GetProcessorInfo - Location.Package - 00000001
GetProcessorInfo - Location.Core - 00000004
GetProcessorInfo - Location.Thread - 00000000
GetProcessorInfo - Location2.Package - 00000001
GetProcessorInfo - Location2.Die - 00000000
GetProcessorInfo - Location2.Tile - 00000000
GetProcessorInfo - Location2.Module - 00000000
GetProcessorInfo - Location2.Core - 00000004
GetProcessorInfo - Location2.Thread - 00000000
GetProcessorInfo - Index - 59
GetProcessorInfo - ProcessorId - 0000000000000089
GetProcessorInfo - StatusFlag - 00000006
GetProcessorInfo - Location.Package - 00000001
GetProcessorInfo - Location.Core - 00000004
GetProcessorInfo - Location.Thread - 00000001
GetProcessorInfo - Location2.Package - 00000001
GetProcessorInfo - Location2.Die - 00000000
GetProcessorInfo - Location2.Tile - 00000000
GetProcessorInfo - Location2.Module - 00000000
GetProcessorInfo - Location2.Core - 00000004
GetProcessorInfo - Location2.Thread - 00000001
GetProcessorInfo - Index - 5A
GetProcessorInfo - ProcessorId - 000000000000008A
GetProcessorInfo - StatusFlag - 00000006
GetProcessorInfo - Location.Package - 00000001
GetProcessorInfo - Location.Core - 00000005
GetProcessorInfo - Location.Thread - 00000000
GetProcessorInfo - Location2.Package - 00000001
GetProcessorInfo - Location2.Die - 00000000
GetProcessorInfo - Location2.Tile - 00000000
GetProcessorInfo - Location2.Module - 00000000
GetProcessorInfo - Location2.Core - 00000005
GetProcessorInfo - Location2.Thread - 00000000
GetProcessorInfo - Index - 5B
GetProcessorInfo - ProcessorId - 000000000000008B
GetProcessorInfo - StatusFlag - 00000006
GetProcessorInfo - Location.Package - 00000001
GetProcessorInfo - Location.Core - 00000005
GetProcessorInfo - Location.Thread - 00000001
GetProcessorInfo - Location2.Package - 00000001
GetProcessorInfo - Location2.Die - 00000000
GetProcessorInfo - Location2.Tile - 00000000
GetProcessorInfo - Location2.Module - 00000000
GetProcessorInfo - Location2.Core - 00000005
GetProcessorInfo - Location2.Thread - 00000001
GetProcessorInfo - Index - 5C
GetProcessorInfo - ProcessorId - 000000000000008C
GetProcessorInfo - StatusFlag - 00000006
GetProcessorInfo - Location.Package - 00000001
GetProcessorInfo - Location.Core - 00000006
GetProcessorInfo - Location.Thread - 00000000
GetProcessorInfo - Location2.Package - 00000001
GetProcessorInfo - Location2.Die - 00000000
GetProcessorInfo - Location2.Tile - 00000000
GetProcessorInfo - Location2.Module - 00000000
GetProcessorInfo - Location2.Core - 00000006
GetProcessorInfo - Location2.Thread - 00000000
GetProcessorInfo - Index - 5D
GetProcessorInfo - ProcessorId - 000000000000008D
GetProcessorInfo - StatusFlag - 00000006
GetProcessorInfo - Location.Package - 00000001
GetProcessorInfo - Location.Core - 00000006
GetProcessorInfo - Location.Thread - 00000001
GetProcessorInfo - Location2.Package - 00000001
GetProcessorInfo - Location2.Die - 00000000
GetProcessorInfo - Location2.Tile - 00000000
GetProcessorInfo - Location2.Module - 00000000
GetProcessorInfo - Location2.Core - 00000006
GetProcessorInfo - Location2.Thread - 00000001
GetProcessorInfo - Index - 5E
GetProcessorInfo - ProcessorId - 000000000000008E
GetProcessorInfo - StatusFlag - 00000006
GetProcessorInfo - Location.Package - 00000001
GetProcessorInfo - Location.Core - 00000007
GetProcessorInfo - Location.Thread - 00000000
GetProcessorInfo - Location2.Package - 00000001
GetProcessorInfo - Location2.Die - 00000000
GetProcessorInfo - Location2.Tile - 00000000
GetProcessorInfo - Location2.Module - 00000000
GetProcessorInfo - Location2.Core - 00000007
GetProcessorInfo - Location2.Thread - 00000000
GetProcessorInfo - Index - 5F
GetProcessorInfo - ProcessorId - 000000000000008F
GetProcessorInfo - StatusFlag - 00000006
GetProcessorInfo - Location.Package - 00000001
GetProcessorInfo - Location.Core - 00000007
GetProcessorInfo - Location.Thread - 00000001
GetProcessorInfo - Location2.Package - 00000001
GetProcessorInfo - Location2.Die - 00000000
GetProcessorInfo - Location2.Tile - 00000000
GetProcessorInfo - Location2.Module - 00000000
GetProcessorInfo - Location2.Core - 00000007
GetProcessorInfo - Location2.Thread - 00000001
GetProcessorInfo - Index - 60
GetProcessorInfo - ProcessorId - 0000000000000090
GetProcessorInfo - StatusFlag - 00000006
GetProcessorInfo - Location.Package - 00000001
GetProcessorInfo - Location.Core - 00000008
GetProcessorInfo - Location.Thread - 00000000
GetProcessorInfo - Location2.Package - 00000001
GetProcessorInfo - Location2.Die - 00000000
GetProcessorInfo - Location2.Tile - 00000000
GetProcessorInfo - Location2.Module - 00000000
GetProcessorInfo - Location2.Core - 00000008
GetProcessorInfo - Location2.Thread - 00000000
GetProcessorInfo - Index - 61
GetProcessorInfo - ProcessorId - 0000000000000091
GetProcessorInfo - StatusFlag - 00000006
GetProcessorInfo - Location.Package - 00000001
GetProcessorInfo - Location.Core - 00000008
GetProcessorInfo - Location.Thread - 00000001
GetProcessorInfo - Location2.Package - 00000001
GetProcessorInfo - Location2.Die - 00000000
GetProcessorInfo - Location2.Tile - 00000000
GetProcessorInfo - Location2.Module - 00000000
GetProcessorInfo - Location2.Core - 00000008
GetProcessorInfo - Location2.Thread - 00000001
GetProcessorInfo - Index - 62
GetProcessorInfo - ProcessorId - 0000000000000092
GetProcessorInfo - StatusFlag - 00000006
GetProcessorInfo - Location.Package - 00000001
GetProcessorInfo - Location.Core - 00000009
GetProcessorInfo - Location.Thread - 00000000
GetProcessorInfo - Location2.Package - 00000001
GetProcessorInfo - Location2.Die - 00000000
GetProcessorInfo - Location2.Tile - 00000000
GetProcessorInfo - Location2.Module - 00000000
GetProcessorInfo - Location2.Core - 00000009
GetProcessorInfo - Location2.Thread - 00000000
GetProcessorInfo - Index - 63
GetProcessorInfo - ProcessorId - 0000000000000093
GetProcessorInfo - StatusFlag - 00000006
GetProcessorInfo - Location.Package - 00000001
GetProcessorInfo - Location.Core - 00000009
GetProcessorInfo - Location.Thread - 00000001
GetProcessorInfo - Location2.Package - 00000001
GetProcessorInfo - Location2.Die - 00000000
GetProcessorInfo - Location2.Tile - 00000000
GetProcessorInfo - Location2.Module - 00000000
GetProcessorInfo - Location2.Core - 00000009
GetProcessorInfo - Location2.Thread - 00000001
GetProcessorInfo - Index - 64
GetProcessorInfo - ProcessorId - 0000000000000094
GetProcessorInfo - StatusFlag - 00000006
GetProcessorInfo - Location.Package - 00000001
GetProcessorInfo - Location.Core - 0000000A
GetProcessorInfo - Location.Thread - 00000000
GetProcessorInfo - Location2.Package - 00000001
GetProcessorInfo - Location2.Die - 00000000
GetProcessorInfo - Location2.Tile - 00000000
GetProcessorInfo - Location2.Module - 00000000
GetProcessorInfo - Location2.Core - 0000000A
GetProcessorInfo - Location2.Thread - 00000000
GetProcessorInfo - Index - 65
GetProcessorInfo - ProcessorId - 0000000000000095
GetProcessorInfo - StatusFlag - 00000006
GetProcessorInfo - Location.Package - 00000001
GetProcessorInfo - Location.Core - 0000000A
GetProcessorInfo - Location.Thread - 00000001
GetProcessorInfo - Location2.Package - 00000001
GetProcessorInfo - Location2.Die - 00000000
GetProcessorInfo - Location2.Tile - 00000000
GetProcessorInfo - Location2.Module - 00000000
GetProcessorInfo - Location2.Core - 0000000A
GetProcessorInfo - Location2.Thread - 00000001
GetProcessorInfo - Index - 66
GetProcessorInfo - ProcessorId - 0000000000000096
GetProcessorInfo - StatusFlag - 00000006
GetProcessorInfo - Location.Package - 00000001
GetProcessorInfo - Location.Core - 0000000B
GetProcessorInfo - Location.Thread - 00000000
GetProcessorInfo - Location2.Package - 00000001
GetProcessorInfo - Location2.Die - 00000000
GetProcessorInfo - Location2.Tile - 00000000
GetProcessorInfo - Location2.Module - 00000000
GetProcessorInfo - Location2.Core - 0000000B
GetProcessorInfo - Location2.Thread - 00000000
GetProcessorInfo - Index - 67
GetProcessorInfo - ProcessorId - 0000000000000097
GetProcessorInfo - StatusFlag - 00000006
GetProcessorInfo - Location.Package - 00000001
GetProcessorInfo - Location.Core - 0000000B
GetProcessorInfo - Location.Thread - 00000001
GetProcessorInfo - Location2.Package - 00000001
GetProcessorInfo - Location2.Die - 00000000
GetProcessorInfo - Location2.Tile - 00000000
GetProcessorInfo - Location2.Module - 00000000
GetProcessorInfo - Location2.Core - 0000000B
GetProcessorInfo - Location2.Thread - 00000001
GetProcessorInfo - Index - 68
GetProcessorInfo - ProcessorId - 0000000000000098
GetProcessorInfo - StatusFlag - 00000006
GetProcessorInfo - Location.Package - 00000001
GetProcessorInfo - Location.Core - 0000000C
GetProcessorInfo - Location.Thread - 00000000
GetProcessorInfo - Location2.Package - 00000001
GetProcessorInfo - Location2.Die - 00000000
GetProcessorInfo - Location2.Tile - 00000000
GetProcessorInfo - Location2.Module - 00000000
GetProcessorInfo - Location2.Core - 0000000C
GetProcessorInfo - Location2.Thread - 00000000
GetProcessorInfo - Index - 69
GetProcessorInfo - ProcessorId - 0000000000000099
GetProcessorInfo - StatusFlag - 00000006
GetProcessorInfo - Location.Package - 00000001
GetProcessorInfo - Location.Core - 0000000C
GetProcessorInfo - Location.Thread - 00000001
GetProcessorInfo - Location2.Package - 00000001
GetProcessorInfo - Location2.Die - 00000000
GetProcessorInfo - Location2.Tile - 00000000
GetProcessorInfo - Location2.Module - 00000000
GetProcessorInfo - Location2.Core - 0000000C
GetProcessorInfo - Location2.Thread - 00000001
GetProcessorInfo - Index - 6A
GetProcessorInfo - ProcessorId - 000000000000009A
GetProcessorInfo - StatusFlag - 00000006
GetProcessorInfo - Location.Package - 00000001
GetProcessorInfo - Location.Core - 0000000D
GetProcessorInfo - Location.Thread - 00000000
GetProcessorInfo - Location2.Package - 00000001
GetProcessorInfo - Location2.Die - 00000000
GetProcessorInfo - Location2.Tile - 00000000
GetProcessorInfo - Location2.Module - 00000000
GetProcessorInfo - Location2.Core - 0000000D
GetProcessorInfo - Location2.Thread - 00000000
GetProcessorInfo - Index - 6B
GetProcessorInfo - ProcessorId - 000000000000009B
GetProcessorInfo - StatusFlag - 00000006
GetProcessorInfo - Location.Package - 00000001
GetProcessorInfo - Location.Core - 0000000D
GetProcessorInfo - Location.Thread - 00000001
GetProcessorInfo - Location2.Package - 00000001
GetProcessorInfo - Location2.Die - 00000000
GetProcessorInfo - Location2.Tile - 00000000
GetProcessorInfo - Location2.Module - 00000000
GetProcessorInfo - Location2.Core - 0000000D
GetProcessorInfo - Location2.Thread - 00000001
GetProcessorInfo - Index - 6C
GetProcessorInfo - ProcessorId - 000000000000009C
GetProcessorInfo - StatusFlag - 00000006
GetProcessorInfo - Location.Package - 00000001
GetProcessorInfo - Location.Core - 0000000E
GetProcessorInfo - Location.Thread - 00000000
GetProcessorInfo - Location2.Package - 00000001
GetProcessorInfo - Location2.Die - 00000000
GetProcessorInfo - Location2.Tile - 00000000
GetProcessorInfo - Location2.Module - 00000000
GetProcessorInfo - Location2.Core - 0000000E
GetProcessorInfo - Location2.Thread - 00000000
GetProcessorInfo - Index - 6D
GetProcessorInfo - ProcessorId - 000000000000009D
GetProcessorInfo - StatusFlag - 00000006
GetProcessorInfo - Location.Package - 00000001
GetProcessorInfo - Location.Core - 0000000E
GetProcessorInfo - Location.Thread - 00000001
GetProcessorInfo - Location2.Package - 00000001
GetProcessorInfo - Location2.Die - 00000000
GetProcessorInfo - Location2.Tile - 00000000
GetProcessorInfo - Location2.Module - 00000000
GetProcessorInfo - Location2.Core - 0000000E
GetProcessorInfo - Location2.Thread - 00000001
GetProcessorInfo - Index - 6E
GetProcessorInfo - ProcessorId - 000000000000009E
GetProcessorInfo - StatusFlag - 00000006
GetProcessorInfo - Location.Package - 00000001
GetProcessorInfo - Location.Core - 0000000F
GetProcessorInfo - Location.Thread - 00000000
GetProcessorInfo - Location2.Package - 00000001
GetProcessorInfo - Location2.Die - 00000000
GetProcessorInfo - Location2.Tile - 00000000
GetProcessorInfo - Location2.Module - 00000000
GetProcessorInfo - Location2.Core - 0000000F
GetProcessorInfo - Location2.Thread - 00000000
GetProcessorInfo - Index - 6F
GetProcessorInfo - ProcessorId - 000000000000009F
GetProcessorInfo - StatusFlag - 00000006
GetProcessorInfo - Location.Package - 00000001
GetProcessorInfo - Location.Core - 0000000F
GetProcessorInfo - Location.Thread - 00000001
GetProcessorInfo - Location2.Package - 00000001
GetProcessorInfo - Location2.Die - 00000000
GetProcessorInfo - Location2.Tile - 00000000
GetProcessorInfo - Location2.Module - 00000000
GetProcessorInfo - Location2.Core - 0000000F
GetProcessorInfo - Location2.Thread - 00000001
GetProcessorInfo - Index - 70
GetProcessorInfo - ProcessorId - 00000000000000A0
GetProcessorInfo - StatusFlag - 00000006
GetProcessorInfo - Location.Package - 00000001
GetProcessorInfo - Location.Core - 00000010
GetProcessorInfo - Location.Thread - 00000000
GetProcessorInfo - Location2.Package - 00000001
GetProcessorInfo - Location2.Die - 00000000
GetProcessorInfo - Location2.Tile - 00000000
GetProcessorInfo - Location2.Module - 00000000
GetProcessorInfo - Location2.Core - 00000010
GetProcessorInfo - Location2.Thread - 00000000
GetProcessorInfo - Index - 71
GetProcessorInfo - ProcessorId - 00000000000000A1
GetProcessorInfo - StatusFlag - 00000006
GetProcessorInfo - Location.Package - 00000001
GetProcessorInfo - Location.Core - 00000010
GetProcessorInfo - Location.Thread - 00000001
GetProcessorInfo - Location2.Package - 00000001
GetProcessorInfo - Location2.Die - 00000000
GetProcessorInfo - Location2.Tile - 00000000
GetProcessorInfo - Location2.Module - 00000000
GetProcessorInfo - Location2.Core - 00000010
GetProcessorInfo - Location2.Thread - 00000001
GetProcessorInfo - Index - 72
GetProcessorInfo - ProcessorId - 00000000000000A2
GetProcessorInfo - StatusFlag - 00000006
GetProcessorInfo - Location.Package - 00000001
GetProcessorInfo - Location.Core - 00000011
GetProcessorInfo - Location.Thread - 00000000
GetProcessorInfo - Location2.Package - 00000001
GetProcessorInfo - Location2.Die - 00000000
GetProcessorInfo - Location2.Tile - 00000000
GetProcessorInfo - Location2.Module - 00000000
GetProcessorInfo - Location2.Core - 00000011
GetProcessorInfo - Location2.Thread - 00000000
GetProcessorInfo - Index - 73
GetProcessorInfo - ProcessorId - 00000000000000A3
GetProcessorInfo - StatusFlag - 00000006
GetProcessorInfo - Location.Package - 00000001
GetProcessorInfo - Location.Core - 00000011
GetProcessorInfo - Location.Thread - 00000001
GetProcessorInfo - Location2.Package - 00000001
GetProcessorInfo - Location2.Die - 00000000
GetProcessorInfo - Location2.Tile - 00000000
GetProcessorInfo - Location2.Module - 00000000
GetProcessorInfo - Location2.Core - 00000011
GetProcessorInfo - Location2.Thread - 00000001
GetProcessorInfo - Index - 74
GetProcessorInfo - ProcessorId - 00000000000000A4
GetProcessorInfo - StatusFlag - 00000006
GetProcessorInfo - Location.Package - 00000001
GetProcessorInfo - Location.Core - 00000012
GetProcessorInfo - Location.Thread - 00000000
GetProcessorInfo - Location2.Package - 00000001
GetProcessorInfo - Location2.Die - 00000000
GetProcessorInfo - Location2.Tile - 00000000
GetProcessorInfo - Location2.Module - 00000000
GetProcessorInfo - Location2.Core - 00000012
GetProcessorInfo - Location2.Thread - 00000000
GetProcessorInfo - Index - 75
GetProcessorInfo - ProcessorId - 00000000000000A5
GetProcessorInfo - StatusFlag - 00000006
GetProcessorInfo - Location.Package - 00000001
GetProcessorInfo - Location.Core - 00000012
GetProcessorInfo - Location.Thread - 00000001
GetProcessorInfo - Location2.Package - 00000001
GetProcessorInfo - Location2.Die - 00000000
GetProcessorInfo - Location2.Tile - 00000000
GetProcessorInfo - Location2.Module - 00000000
GetProcessorInfo - Location2.Core - 00000012
GetProcessorInfo - Location2.Thread - 00000001
GetProcessorInfo - Index - 76
GetProcessorInfo - ProcessorId - 00000000000000A6
GetProcessorInfo - StatusFlag - 00000006
GetProcessorInfo - Location.Package - 00000001
GetProcessorInfo - Location.Core - 00000013
GetProcessorInfo - Location.Thread - 00000000
GetProcessorInfo - Location2.Package - 00000001
GetProcessorInfo - Location2.Die - 00000000
GetProcessorInfo - Location2.Tile - 00000000
GetProcessorInfo - Location2.Module - 00000000
GetProcessorInfo - Location2.Core - 00000013
GetProcessorInfo - Location2.Thread - 00000000
GetProcessorInfo - Index - 77
GetProcessorInfo - ProcessorId - 00000000000000A7
GetProcessorInfo - StatusFlag - 00000006
GetProcessorInfo - Location.Package - 00000001
GetProcessorInfo - Location.Core - 00000013
GetProcessorInfo - Location.Thread - 00000001
GetProcessorInfo - Location2.Package - 00000001
GetProcessorInfo - Location2.Die - 00000000
GetProcessorInfo - Location2.Tile - 00000000
GetProcessorInfo - Location2.Module - 00000000
GetProcessorInfo - Location2.Core - 00000013
GetProcessorInfo - Location2.Thread - 00000001
GetProcessorInfo - Index - 78
GetProcessorInfo - ProcessorId - 00000000000000A8
GetProcessorInfo - StatusFlag - 00000006
GetProcessorInfo - Location.Package - 00000001
GetProcessorInfo - Location.Core - 00000014
GetProcessorInfo - Location.Thread - 00000000
GetProcessorInfo - Location2.Package - 00000001
GetProcessorInfo - Location2.Die - 00000000
GetProcessorInfo - Location2.Tile - 00000000
GetProcessorInfo - Location2.Module - 00000000
GetProcessorInfo - Location2.Core - 00000014
GetProcessorInfo - Location2.Thread - 00000000
GetProcessorInfo - Index - 79
GetProcessorInfo - ProcessorId - 00000000000000A9
GetProcessorInfo - StatusFlag - 00000006
GetProcessorInfo - Location.Package - 00000001
GetProcessorInfo - Location.Core - 00000014
GetProcessorInfo - Location.Thread - 00000001
GetProcessorInfo - Location2.Package - 00000001
GetProcessorInfo - Location2.Die - 00000000
GetProcessorInfo - Location2.Tile - 00000000
GetProcessorInfo - Location2.Module - 00000000
GetProcessorInfo - Location2.Core - 00000014
GetProcessorInfo - Location2.Thread - 00000001
GetProcessorInfo - Index - 7A
GetProcessorInfo - ProcessorId - 00000000000000AA
GetProcessorInfo - StatusFlag - 00000006
GetProcessorInfo - Location.Package - 00000001
GetProcessorInfo - Location.Core - 00000015
GetProcessorInfo - Location.Thread - 00000000
GetProcessorInfo - Location2.Package - 00000001
GetProcessorInfo - Location2.Die - 00000000
GetProcessorInfo - Location2.Tile - 00000000
GetProcessorInfo - Location2.Module - 00000000
GetProcessorInfo - Location2.Core - 00000015
GetProcessorInfo - Location2.Thread - 00000000
GetProcessorInfo - Index - 7B
GetProcessorInfo - ProcessorId - 00000000000000AB
GetProcessorInfo - StatusFlag - 00000006
GetProcessorInfo - Location.Package - 00000001
GetProcessorInfo - Location.Core - 00000015
GetProcessorInfo - Location.Thread - 00000001
GetProcessorInfo - Location2.Package - 00000001
GetProcessorInfo - Location2.Die - 00000000
GetProcessorInfo - Location2.Tile - 00000000
GetProcessorInfo - Location2.Module - 00000000
GetProcessorInfo - Location2.Core - 00000015
GetProcessorInfo - Location2.Thread - 00000001
GetProcessorInfo - Index - 7C
GetProcessorInfo - ProcessorId - 00000000000000AC
GetProcessorInfo - StatusFlag - 00000006
GetProcessorInfo - Location.Package - 00000001
GetProcessorInfo - Location.Core - 00000016
GetProcessorInfo - Location.Thread - 00000000
GetProcessorInfo - Location2.Package - 00000001
GetProcessorInfo - Location2.Die - 00000000
GetProcessorInfo - Location2.Tile - 00000000
GetProcessorInfo - Location2.Module - 00000000
GetProcessorInfo - Location2.Core - 00000016
GetProcessorInfo - Location2.Thread - 00000000
GetProcessorInfo - Index - 7D
GetProcessorInfo - ProcessorId - 00000000000000AD
GetProcessorInfo - StatusFlag - 00000006
GetProcessorInfo - Location.Package - 00000001
GetProcessorInfo - Location.Core - 00000016
GetProcessorInfo - Location.Thread - 00000001
GetProcessorInfo - Location2.Package - 00000001
GetProcessorInfo - Location2.Die - 00000000
GetProcessorInfo - Location2.Tile - 00000000
GetProcessorInfo - Location2.Module - 00000000
GetProcessorInfo - Location2.Core - 00000016
GetProcessorInfo - Location2.Thread - 00000001
GetProcessorInfo - Index - 7E
GetProcessorInfo - ProcessorId - 00000000000000AE
GetProcessorInfo - StatusFlag - 00000006
GetProcessorInfo - Location.Package - 00000001
GetProcessorInfo - Location.Core - 00000017
GetProcessorInfo - Location.Thread - 00000000
GetProcessorInfo - Location2.Package - 00000001
GetProcessorInfo - Location2.Die - 00000000
GetProcessorInfo - Location2.Tile - 00000000
GetProcessorInfo - Location2.Module - 00000000
GetProcessorInfo - Location2.Core - 00000017
GetProcessorInfo - Location2.Thread - 00000000
GetProcessorInfo - Index - 7F
GetProcessorInfo - ProcessorId - 00000000000000AF
GetProcessorInfo - StatusFlag - 00000006
GetProcessorInfo - Location.Package - 00000001
GetProcessorInfo - Location.Core - 00000017
GetProcessorInfo - Location.Thread - 00000001
GetProcessorInfo - Location2.Package - 00000001
GetProcessorInfo - Location2.Die - 00000000
GetProcessorInfo - Location2.Tile - 00000000
GetProcessorInfo - Location2.Module - 00000000
GetProcessorInfo - Location2.Core - 00000017
GetProcessorInfo - Location2.Thread - 00000001
GetProcessorInfo - Index - 80
GetProcessorInfo - ProcessorId - 00000000000000B0
GetProcessorInfo - StatusFlag - 00000006
GetProcessorInfo - Location.Package - 00000001
GetProcessorInfo - Location.Core - 00000018
GetProcessorInfo - Location.Thread - 00000000
GetProcessorInfo - Location2.Package - 00000001
GetProcessorInfo - Location2.Die - 00000000
GetProcessorInfo - Location2.Tile - 00000000
GetProcessorInfo - Location2.Module - 00000000
GetProcessorInfo - Location2.Core - 00000018
GetProcessorInfo - Location2.Thread - 00000000
GetProcessorInfo - Index - 81
GetProcessorInfo - ProcessorId - 00000000000000B1
GetProcessorInfo - StatusFlag - 00000006
GetProcessorInfo - Location.Package - 00000001
GetProcessorInfo - Location.Core - 00000018
GetProcessorInfo - Location.Thread - 00000001
GetProcessorInfo - Location2.Package - 00000001
GetProcessorInfo - Location2.Die - 00000000
GetProcessorInfo - Location2.Tile - 00000000
GetProcessorInfo - Location2.Module - 00000000
GetProcessorInfo - Location2.Core - 00000018
GetProcessorInfo - Location2.Thread - 00000001
GetProcessorInfo - Index - 82
GetProcessorInfo - ProcessorId - 00000000000000B2
GetProcessorInfo - StatusFlag - 00000006
GetProcessorInfo - Location.Package - 00000001
GetProcessorInfo - Location.Core - 00000019
GetProcessorInfo - Location.Thread - 00000000
GetProcessorInfo - Location2.Package - 00000001
GetProcessorInfo - Location2.Die - 00000000
GetProcessorInfo - Location2.Tile - 00000000
GetProcessorInfo - Location2.Module - 00000000
GetProcessorInfo - Location2.Core - 00000019
GetProcessorInfo - Location2.Thread - 00000000
GetProcessorInfo - Index - 83
GetProcessorInfo - ProcessorId - 00000000000000B3
GetProcessorInfo - StatusFlag - 00000006
GetProcessorInfo - Location.Package - 00000001
GetProcessorInfo - Location.Core - 00000019
GetProcessorInfo - Location.Thread - 00000001
GetProcessorInfo - Location2.Package - 00000001
GetProcessorInfo - Location2.Die - 00000000
GetProcessorInfo - Location2.Tile - 00000000
GetProcessorInfo - Location2.Module - 00000000
GetProcessorInfo - Location2.Core - 00000019
GetProcessorInfo - Location2.Thread - 00000001
GetProcessorInfo - Index - 84
GetProcessorInfo - ProcessorId - 00000000000000B4
GetProcessorInfo - StatusFlag - 00000006
GetProcessorInfo - Location.Package - 00000001
GetProcessorInfo - Location.Core - 0000001A
GetProcessorInfo - Location.Thread - 00000000
GetProcessorInfo - Location2.Package - 00000001
GetProcessorInfo - Location2.Die - 00000000
GetProcessorInfo - Location2.Tile - 00000000
GetProcessorInfo - Location2.Module - 00000000
GetProcessorInfo - Location2.Core - 0000001A
GetProcessorInfo - Location2.Thread - 00000000
GetProcessorInfo - Index - 85
GetProcessorInfo - ProcessorId - 00000000000000B5
GetProcessorInfo - StatusFlag - 00000006
GetProcessorInfo - Location.Package - 00000001
GetProcessorInfo - Location.Core - 0000001A
GetProcessorInfo - Location.Thread - 00000001
GetProcessorInfo - Location2.Package - 00000001
GetProcessorInfo - Location2.Die - 00000000
GetProcessorInfo - Location2.Tile - 00000000
GetProcessorInfo - Location2.Module - 00000000
GetProcessorInfo - Location2.Core - 0000001A
GetProcessorInfo - Location2.Thread - 00000001
GetProcessorInfo - Index - 86
GetProcessorInfo - ProcessorId - 00000000000000B6
GetProcessorInfo - StatusFlag - 00000006
GetProcessorInfo - Location.Package - 00000001
GetProcessorInfo - Location.Core - 0000001B
GetProcessorInfo - Location.Thread - 00000000
GetProcessorInfo - Location2.Package - 00000001
GetProcessorInfo - Location2.Die - 00000000
GetProcessorInfo - Location2.Tile - 00000000
GetProcessorInfo - Location2.Module - 00000000
GetProcessorInfo - Location2.Core - 0000001B
GetProcessorInfo - Location2.Thread - 00000000
GetProcessorInfo - Index - 87
GetProcessorInfo - ProcessorId - 00000000000000B7
GetProcessorInfo - StatusFlag - 00000006
GetProcessorInfo - Location.Package - 00000001
GetProcessorInfo - Location.Core - 0000001B
GetProcessorInfo - Location.Thread - 00000001
GetProcessorInfo - Location2.Package - 00000001
GetProcessorInfo - Location2.Die - 00000000
GetProcessorInfo - Location2.Tile - 00000000
GetProcessorInfo - Location2.Module - 00000000
GetProcessorInfo - Location2.Core - 0000001B
GetProcessorInfo - Location2.Thread - 00000001
GetProcessorInfo - Index - 88
GetProcessorInfo - ProcessorId - 00000000000000B8
GetProcessorInfo - StatusFlag - 00000006
GetProcessorInfo - Location.Package - 00000001
GetProcessorInfo - Location.Core - 0000001C
GetProcessorInfo - Location.Thread - 00000000
GetProcessorInfo - Location2.Package - 00000001
GetProcessorInfo - Location2.Die - 00000000
GetProcessorInfo - Location2.Tile - 00000000
GetProcessorInfo - Location2.Module - 00000000
GetProcessorInfo - Location2.Core - 0000001C
GetProcessorInfo - Location2.Thread - 00000000
GetProcessorInfo - Index - 89
GetProcessorInfo - ProcessorId - 00000000000000B9
GetProcessorInfo - StatusFlag - 00000006
GetProcessorInfo - Location.Package - 00000001
GetProcessorInfo - Location.Core - 0000001C
GetProcessorInfo - Location.Thread - 00000001
GetProcessorInfo - Location2.Package - 00000001
GetProcessorInfo - Location2.Die - 00000000
GetProcessorInfo - Location2.Tile - 00000000
GetProcessorInfo - Location2.Module - 00000000
GetProcessorInfo - Location2.Core - 0000001C
GetProcessorInfo - Location2.Thread - 00000001
GetProcessorInfo - Index - 8A
GetProcessorInfo - ProcessorId - 00000000000000BA
GetProcessorInfo - StatusFlag - 00000006
GetProcessorInfo - Location.Package - 00000001
GetProcessorInfo - Location.Core - 0000001D
GetProcessorInfo - Location.Thread - 00000000
GetProcessorInfo - Location2.Package - 00000001
GetProcessorInfo - Location2.Die - 00000000
GetProcessorInfo - Location2.Tile - 00000000
GetProcessorInfo - Location2.Module - 00000000
GetProcessorInfo - Location2.Core - 0000001D
GetProcessorInfo - Location2.Thread - 00000000
GetProcessorInfo - Index - 8B
GetProcessorInfo - ProcessorId - 00000000000000BB
GetProcessorInfo - StatusFlag - 00000006
GetProcessorInfo - Location.Package - 00000001
GetProcessorInfo - Location.Core - 0000001D
GetProcessorInfo - Location.Thread - 00000001
GetProcessorInfo - Location2.Package - 00000001
GetProcessorInfo - Location2.Die - 00000000
GetProcessorInfo - Location2.Tile - 00000000
GetProcessorInfo - Location2.Module - 00000000
GetProcessorInfo - Location2.Core - 0000001D
GetProcessorInfo - Location2.Thread - 00000001
GetProcessorInfo - Index - 8C
GetProcessorInfo - ProcessorId - 00000000000000BC
GetProcessorInfo - StatusFlag - 00000006
GetProcessorInfo - Location.Package - 00000001
GetProcessorInfo - Location.Core - 0000001E
GetProcessorInfo - Location.Thread - 00000000
GetProcessorInfo - Location2.Package - 00000001
GetProcessorInfo - Location2.Die - 00000000
GetProcessorInfo - Location2.Tile - 00000000
GetProcessorInfo - Location2.Module - 00000000
GetProcessorInfo - Location2.Core - 0000001E
GetProcessorInfo - Location2.Thread - 00000000
GetProcessorInfo - Index - 8D
GetProcessorInfo - ProcessorId - 00000000000000BD
GetProcessorInfo - StatusFlag - 00000006
GetProcessorInfo - Location.Package - 00000001
GetProcessorInfo - Location.Core - 0000001E
GetProcessorInfo - Location.Thread - 00000001
GetProcessorInfo - Location2.Package - 00000001
GetProcessorInfo - Location2.Die - 00000000
GetProcessorInfo - Location2.Tile - 00000000
GetProcessorInfo - Location2.Module - 00000000
GetProcessorInfo - Location2.Core - 0000001E
GetProcessorInfo - Location2.Thread - 00000001
GetProcessorInfo - Index - 8E
GetProcessorInfo - ProcessorId - 00000000000000BE
GetProcessorInfo - StatusFlag - 00000006
GetProcessorInfo - Location.Package - 00000001
GetProcessorInfo - Location.Core - 0000001F
GetProcessorInfo - Location.Thread - 00000000
GetProcessorInfo - Location2.Package - 00000001
GetProcessorInfo - Location2.Die - 00000000
GetProcessorInfo - Location2.Tile - 00000000
GetProcessorInfo - Location2.Module - 00000000
GetProcessorInfo - Location2.Core - 0000001F
GetProcessorInfo - Location2.Thread - 00000000
GetProcessorInfo - Index - 8F
GetProcessorInfo - ProcessorId - 00000000000000BF
GetProcessorInfo - StatusFlag - 00000006
GetProcessorInfo - Location.Package - 00000001
GetProcessorInfo - Location.Core - 0000001F
GetProcessorInfo - Location.Thread - 00000001
GetProcessorInfo - Location2.Package - 00000001
GetProcessorInfo - Location2.Die - 00000000
GetProcessorInfo - Location2.Tile - 00000000
GetProcessorInfo - Location2.Module - 00000000
GetProcessorInfo - Location2.Core - 0000001F
GetProcessorInfo - Location2.Thread - 00000001
GetProcessorInfo - Index - 90
GetProcessorInfo - ProcessorId - 00000000000000C0
GetProcessorInfo - StatusFlag - 00000006
GetProcessorInfo - Location.Package - 00000001
GetProcessorInfo - Location.Core - 00000020
GetProcessorInfo - Location.Thread - 00000000
GetProcessorInfo - Location2.Package - 00000001
GetProcessorInfo - Location2.Die - 00000000
GetProcessorInfo - Location2.Tile - 00000000
GetProcessorInfo - Location2.Module - 00000000
GetProcessorInfo - Location2.Core - 00000020
GetProcessorInfo - Location2.Thread - 00000000
GetProcessorInfo - Index - 91
GetProcessorInfo - ProcessorId - 00000000000000C1
GetProcessorInfo - StatusFlag - 00000006
GetProcessorInfo - Location.Package - 00000001
GetProcessorInfo - Location.Core - 00000020
GetProcessorInfo - Location.Thread - 00000001
GetProcessorInfo - Location2.Package - 00000001
GetProcessorInfo - Location2.Die - 00000000
GetProcessorInfo - Location2.Tile - 00000000
GetProcessorInfo - Location2.Module - 00000000
GetProcessorInfo - Location2.Core - 00000020
GetProcessorInfo - Location2.Thread - 00000001
GetProcessorInfo - Index - 92
GetProcessorInfo - ProcessorId - 00000000000000C2
GetProcessorInfo - StatusFlag - 00000006
GetProcessorInfo - Location.Package - 00000001
GetProcessorInfo - Location.Core - 00000021
GetProcessorInfo - Location.Thread - 00000000
GetProcessorInfo - Location2.Package - 00000001
GetProcessorInfo - Location2.Die - 00000000
GetProcessorInfo - Location2.Tile - 00000000
GetProcessorInfo - Location2.Module - 00000000
GetProcessorInfo - Location2.Core - 00000021
GetProcessorInfo - Location2.Thread - 00000000
GetProcessorInfo - Index - 93
GetProcessorInfo - ProcessorId - 00000000000000C3
GetProcessorInfo - StatusFlag - 00000006
GetProcessorInfo - Location.Package - 00000001
GetProcessorInfo - Location.Core - 00000021
GetProcessorInfo - Location.Thread - 00000001
GetProcessorInfo - Location2.Package - 00000001
GetProcessorInfo - Location2.Die - 00000000
GetProcessorInfo - Location2.Tile - 00000000
GetProcessorInfo - Location2.Module - 00000000
GetProcessorInfo - Location2.Core - 00000021
GetProcessorInfo - Location2.Thread - 00000001
GetProcessorInfo - Index - 94
GetProcessorInfo - ProcessorId - 00000000000000C4
GetProcessorInfo - StatusFlag - 00000006
GetProcessorInfo - Location.Package - 00000001
GetProcessorInfo - Location.Core - 00000022
GetProcessorInfo - Location.Thread - 00000000
GetProcessorInfo - Location2.Package - 00000001
GetProcessorInfo - Location2.Die - 00000000
GetProcessorInfo - Location2.Tile - 00000000
GetProcessorInfo - Location2.Module - 00000000
GetProcessorInfo - Location2.Core - 00000022
GetProcessorInfo - Location2.Thread - 00000000
GetProcessorInfo - Index - 95
GetProcessorInfo - ProcessorId - 00000000000000C5
GetProcessorInfo - StatusFlag - 00000006
GetProcessorInfo - Location.Package - 00000001
GetProcessorInfo - Location.Core - 00000022
GetProcessorInfo - Location.Thread - 00000001
GetProcessorInfo - Location2.Package - 00000001
GetProcessorInfo - Location2.Die - 00000000
GetProcessorInfo - Location2.Tile - 00000000
GetProcessorInfo - Location2.Module - 00000000
GetProcessorInfo - Location2.Core - 00000022
GetProcessorInfo - Location2.Thread - 00000001
GetProcessorInfo - Index - 96
GetProcessorInfo - ProcessorId - 00000000000000C6
GetProcessorInfo - StatusFlag - 00000006
GetProcessorInfo - Location.Package - 00000001
GetProcessorInfo - Location.Core - 00000023
GetProcessorInfo - Location.Thread - 00000000
GetProcessorInfo - Location2.Package - 00000001
GetProcessorInfo - Location2.Die - 00000000
GetProcessorInfo - Location2.Tile - 00000000
GetProcessorInfo - Location2.Module - 00000000
GetProcessorInfo - Location2.Core - 00000023
GetProcessorInfo - Location2.Thread - 00000000
GetProcessorInfo - Index - 97
GetProcessorInfo - ProcessorId - 00000000000000C7
GetProcessorInfo - StatusFlag - 00000006
GetProcessorInfo - Location.Package - 00000001
GetProcessorInfo - Location.Core - 00000023
GetProcessorInfo - Location.Thread - 00000001
GetProcessorInfo - Location2.Package - 00000001
GetProcessorInfo - Location2.Die - 00000000
GetProcessorInfo - Location2.Tile - 00000000
GetProcessorInfo - Location2.Module - 00000000
GetProcessorInfo - Location2.Core - 00000023
GetProcessorInfo - Location2.Thread - 00000001
GetProcessorInfo - Index - 98
GetProcessorInfo - ProcessorId - 00000000000000C8
GetProcessorInfo - StatusFlag - 00000006
GetProcessorInfo - Location.Package - 00000001
GetProcessorInfo - Location.Core - 00000024
GetProcessorInfo - Location.Thread - 00000000
GetProcessorInfo - Location2.Package - 00000001
GetProcessorInfo - Location2.Die - 00000000
GetProcessorInfo - Location2.Tile - 00000000
GetProcessorInfo - Location2.Module - 00000000
GetProcessorInfo - Location2.Core - 00000024
GetProcessorInfo - Location2.Thread - 00000000
GetProcessorInfo - Index - 99
GetProcessorInfo - ProcessorId - 00000000000000C9
GetProcessorInfo - StatusFlag - 00000006
GetProcessorInfo - Location.Package - 00000001
GetProcessorInfo - Location.Core - 00000024
GetProcessorInfo - Location.Thread - 00000001
GetProcessorInfo - Location2.Package - 00000001
GetProcessorInfo - Location2.Die - 00000000
GetProcessorInfo - Location2.Tile - 00000000
GetProcessorInfo - Location2.Module - 00000000
GetProcessorInfo - Location2.Core - 00000024
GetProcessorInfo - Location2.Thread - 00000001
GetProcessorInfo - Index - 9A
GetProcessorInfo - ProcessorId - 00000000000000CA
GetProcessorInfo - StatusFlag - 00000006
GetProcessorInfo - Location.Package - 00000001
GetProcessorInfo - Location.Core - 00000025
GetProcessorInfo - Location.Thread - 00000000
GetProcessorInfo - Location2.Package - 00000001
GetProcessorInfo - Location2.Die - 00000000
GetProcessorInfo - Location2.Tile - 00000000
GetProcessorInfo - Location2.Module - 00000000
GetProcessorInfo - Location2.Core - 00000025
GetProcessorInfo - Location2.Thread - 00000000
GetProcessorInfo - Index - 9B
GetProcessorInfo - ProcessorId - 00000000000000CB
GetProcessorInfo - StatusFlag - 00000006
GetProcessorInfo - Location.Package - 00000001
GetProcessorInfo - Location.Core - 00000025
GetProcessorInfo - Location.Thread - 00000001
GetProcessorInfo - Location2.Package - 00000001
GetProcessorInfo - Location2.Die - 00000000
GetProcessorInfo - Location2.Tile - 00000000
GetProcessorInfo - Location2.Module - 00000000
GetProcessorInfo - Location2.Core - 00000025
GetProcessorInfo - Location2.Thread - 00000001
GetProcessorInfo - Index - 9C
GetProcessorInfo - ProcessorId - 00000000000000CC
GetProcessorInfo - StatusFlag - 00000006
GetProcessorInfo - Location.Package - 00000001
GetProcessorInfo - Location.Core - 00000026
GetProcessorInfo - Location.Thread - 00000000
GetProcessorInfo - Location2.Package - 00000001
GetProcessorInfo - Location2.Die - 00000000
GetProcessorInfo - Location2.Tile - 00000000
GetProcessorInfo - Location2.Module - 00000000
GetProcessorInfo - Location2.Core - 00000026
GetProcessorInfo - Location2.Thread - 00000000
GetProcessorInfo - Index - 9D
GetProcessorInfo - ProcessorId - 00000000000000CD
GetProcessorInfo - StatusFlag - 00000006
GetProcessorInfo - Location.Package - 00000001
GetProcessorInfo - Location.Core - 00000026
GetProcessorInfo - Location.Thread - 00000001
GetProcessorInfo - Location2.Package - 00000001
GetProcessorInfo - Location2.Die - 00000000
GetProcessorInfo - Location2.Tile - 00000000
GetProcessorInfo - Location2.Module - 00000000
GetProcessorInfo - Location2.Core - 00000026
GetProcessorInfo - Location2.Thread - 00000001
GetProcessorInfo - Index - 9E
GetProcessorInfo - ProcessorId - 00000000000000CE
GetProcessorInfo - StatusFlag - 00000006
GetProcessorInfo - Location.Package - 00000001
GetProcessorInfo - Location.Core - 00000027
GetProcessorInfo - Location.Thread - 00000000
GetProcessorInfo - Location2.Package - 00000001
GetProcessorInfo - Location2.Die - 00000000
GetProcessorInfo - Location2.Tile - 00000000
GetProcessorInfo - Location2.Module - 00000000
GetProcessorInfo - Location2.Core - 00000027
GetProcessorInfo - Location2.Thread - 00000000
GetProcessorInfo - Index - 9F
GetProcessorInfo - ProcessorId - 00000000000000CF
GetProcessorInfo - StatusFlag - 00000006
GetProcessorInfo - Location.Package - 00000001
GetProcessorInfo - Location.Core - 00000027
GetProcessorInfo - Location.Thread - 00000001
GetProcessorInfo - Location2.Package - 00000001
GetProcessorInfo - Location2.Die - 00000000
GetProcessorInfo - Location2.Tile - 00000000
GetProcessorInfo - Location2.Module - 00000000
GetProcessorInfo - Location2.Core - 00000027
GetProcessorInfo - Location2.Thread - 00000001
mCpuConfigLibConfigContextBuffer->NumberOfProcessors = A0
mCpuConfigLibConfigContextBuffer->BspNumber = 0
SMBIOS Package[0] - Processor[0]
SMBIOS Package[1] - Processor[80]
CPU[000]: ThreadCountOfPackage=80 ThreadCountOfDie=80 ThreadCountOfCore=2
CPU[080]: ThreadCountOfPackage=80 ThreadCountOfDie=80 ThreadCountOfCore=2
PROGRESS CODE: V03040003 I0
PDB = c:\efi\servergen2\intel\Build\EagleStreamRpPkg\DEBUG_VS2015x86\X64\ServerSecurityPkg\Tdx\TdxDxe\TdxDxe\DEBUG\TdxDxe.pdb
PROGRESS CODE: V03040002 I0
[MP_DISPATCH] MpDispatch4v0_CommonConstructor BEGIN
[MP_DISPATCH] MpDispatch4v0_CommonConstructor END (Success)
[TDX_LATE] TdxDxeEntryPoint BEGIN
TDX not capable
[TDX_LATE] TdxDxeEntryPoint END (Unsupported)
[MP_DISPATCH] MpDispatch4v0_CommonDestructor BEGIN
[MP_DISPATCH] MpDispatch4v0_CommonDestructor END (Success)
Error: Image at 0006A263000 start failed: Unsupported
PDB = c:\efi\servergen2\intel\Build\EagleStreamRpPkg\DEBUG_VS2015x86\X64\ServerSecurityPkg\Tdx\TdxDxe\TdxDxe\DEBUG\TdxDxe.pdb
PROGRESS CODE: V03040003 I0
PDB = c:\efi\servergen2\intel\Build\EagleStreamRpPkg\DEBUG_VS2015x86\X64\ServerSiliconPkg\Iio\Dxe\IioInit\IioInitSpr\DEBUG\IioInit.pdb
PROGRESS CODE: V03040002 I0
[IIO](TH) Trace Hub requested memory Size is 0. Not allocating memory.
[IIO](TH) PCH Trace Hub not accessible. Disabled.
[IIO](TH) ERROR Failed to configure PCH Trace Hub. Status= Not Ready
ERROR: IioTraceHubInitialize failed. Status= Not Ready
[IIO](SPK) IioSpkSocketInitialize: SocketId: 0
[IIO](SPK) IioSpkSocketInitialize: SocketId: 1
[0.1 p1] 00:15:01.0: Device is not present!
[0.2 p9] 00:26:01.0: Device is not present!
[0.3 p17] 00:37:01.0: Device is not present!
[0.4 p25] 00:48:01.0: Device is not present!
[0.4 p27] 00:48:03.0: Device is not present!
[0.4 p29] 00:48:05.0: Device is not present!
[0.4 p31] 00:48:07.0: Device is not present!
[0.5 p33] 00:59:01.0: Device is not present!
[0.5 p35] 00:59:03.0: Device is not present!
[0.5 p37] 00:59:05.0: Device is not present!
[0.5 p39] 00:59:07.0: Device is not present!
[1.1 p1] 00:97:01.0: Device is not present!
[1.2 p9] 00:A7:01.0: Device is not present!
[1.3 p17] 00:B7:01.0: Device is not present!
[1.4 p25] 00:C7:01.0: Device is not present!
[1.4 p27] 00:C7:03.0: Device is not present!
[1.4 p29] 00:C7:05.0: Device is not present!
[1.4 p31] 00:C7:07.0: Device is not present!
[1.5 p33] 00:D7:01.0: Device is not present!
[1.5 p35] 00:D7:03.0: Device is not present!
[1.5 p37] 00:D7:05.0: Device is not present!
[1.5 p39] 00:D7:07.0: Device is not present!
[1.6 p41] 00:80:01.0: Device is not present!
[1.6 p45] 00:80:05.0: Device is not present!
PROGRESS CODE: V03040003 I0
PDB = c:\efi\servergen2\intel\Build\EagleStreamRpPkg\DEBUG_VS2015x86\X64\ClientOneSiliconPkg\IpBlock\Sps\Sps\Dxe\SpsDxe\DEBUG\SpsDxe.pdb
PROGRESS CODE: V03040002 I0
[HECI Transport-1 DXE] Send pkt: 812E0007
00: 11 00 00 00 01 80 0B 00 - 00 00 00 00 02 00 50 00
10: 50 00 A0 00 00 11 81 FD - 2C 08 05 00 00 80 23 11
20: 10 0F 0E 0D 0C 0B 0A 09 - 08 00 00 00 00 00 0B 23
30: 11 10 0F 0E 0D 0C 0B 0A - 09 08 00 00 00 00 00 00
40: 00 00 00 00 00 00 00 00 - 00 00 00 00 00 00 00 00
50: 00 00 00 00 00 00 00 00 - 00 00 00 00 00 00 00 00
60: 00 00 00 00 00 00 00 00 - 00 00 00 00 00 00 00 00
70: 00 00 00 00 00 00 00 00 - 00 00 00 00 00 00 00 00
80: 00 00 00 00 00 00 00 00 - 00 00 00 00 00 00 00 00
90: 00 00 00 00 00 00 00 00 - 00 00 00 00 00 00 00 00
A0: 00 00 00 00 00 00 00 00 - 00 00 00 00 00 00 00 00
B0: 00 00 00 00 00 00 00 00 - 00 00 00 00 00 00 00 00
C0: 00 00 00 00 00 00 00 00 - 00 00 00 00 00 00 00 00
D0: 00 00 00 00 00 00 00 00 - 00 00 00 00 00 00 00 00
E0: 00 00 00 00 00 00 00 00 - 00 00 00 00 00 00 00 00
F0: 00 00 00 00 00 00 00 00 - 00 00 00 00 00 00 00 00
00: 00 00 00 00 00 00 00 00 - 00 00 00 00 00 00 00 00
10: 00 00 00 00 00 00 00 00 - 00 00 00 00 00 00 00 00
20: 00 00 00 00 00 00 00 00 - 00 00 00 00 00 00
[HECI Transport-1 DXE] Got pkt: 80080007
00: 11 80 00 00 00 00 00 00
PROGRESS CODE: V03040003 I0
PDB = c:\efi\servergen2\intel\Build\EagleStreamRpPkg\DEBUG_VS2015x86\X64\ClientOneSiliconPkg\IpBlock\MeIgnition\Dxe\MeIgnitionDxe\DEBUG\MeIgnitionDxe.pdb
PROGRESS CODE: V03040002 I0
PROGRESS CODE: V03040003 I0
PDB = c:\efi\servergen2\intel\Build\EagleStreamRpPkg\DEBUG_VS2015x86\X64\ClientOneSiliconPkg\IpBlock\Me\MeFwDowngrade\Dxe\MeFwDowngrade\DEBUG\MeFwDowngrade.pdb
PROGRESS CODE: V03040002 I0
Error: Image at 0006A252000 start failed: Unsupported
PDB = c:\efi\servergen2\intel\Build\EagleStreamRpPkg\DEBUG_VS2015x86\X64\ClientOneSiliconPkg\IpBlock\Me\MeFwDowngrade\Dxe\MeFwDowngrade\DEBUG\MeFwDowngrade.pdb
PROGRESS CODE: V03040003 I0
PDB = c:\efi\servergen2\intel\Build\EagleStreamRpPkg\DEBUG_VS2015x86\X64\ClientOneSiliconPkg\IpBlock\Me\MeSmbiosDxe\MeSmbiosDxe\DEBUG\MeSmbiosDxe.pdb
PROGRESS CODE: V03040002 I0
Error: Image at 0006A269000 start failed: Unsupported
PDB = c:\efi\servergen2\intel\Build\EagleStreamRpPkg\DEBUG_VS2015x86\X64\ClientOneSiliconPkg\IpBlock\Me\MeSmbiosDxe\MeSmbiosDxe\DEBUG\MeSmbiosDxe.pdb
PROGRESS CODE: V03040003 I0
PDB = c:\efi\servergen2\intel\Build\EagleStreamRpPkg\DEBUG_VS2015x86\X64\ServerPlatformPkg\Features\Me\Client\MeSmbiosUpdateConfigDxe\MeSmbiosUpdateConfigDxe\DEBUG\MeSmbiosUpdateConfig.pdb
PROGRESS CODE: V03040002 I0
Error: Image at 0006A268000 start failed: Unsupported
PDB = c:\efi\servergen2\intel\Build\EagleStreamRpPkg\DEBUG_VS2015x86\X64\ServerPlatformPkg\Features\Me\Client\MeSmbiosUpdateConfigDxe\MeSmbiosUpdateConfigDxe\DEBUG\MeSmbiosUpdateConfig.pdb
PROGRESS CODE: V03040003 I0
PDB = c:\efi\servergen2\intel\Build\EagleStreamRpPkg\DEBUG_VS2015x86\X64\ServerPlatformPkg\Features\Me\MeExtMeasurement\Dxe\MeExtMeasurement\DEBUG\MeExtMeasurement.pdb
PROGRESS CODE: V03040002 I0
MeExtMeasurementEntryPoint: not Me Type
PROGRESS CODE: V03040003 I0
PDB = c:\efi\servergen2\intel\Build\EagleStreamRpPkg\DEBUG_VS2015x86\X64\ServerPlatformPkg\Features\Me\Client\Amt\AmtSaveMebxConfigDxe\AmtSaveMebxConfigDxe\DEBUG\AmtSaveMebxConfig.pdb
PROGRESS CODE: V03040002 I0
Error: Image at 0006A259000 start failed: Unsupported
PDB = c:\efi\servergen2\intel\Build\EagleStreamRpPkg\DEBUG_VS2015x86\X64\ServerPlatformPkg\Features\Me\Client\Amt\AmtSaveMebxConfigDxe\AmtSaveMebxConfigDxe\DEBUG\AmtSaveMebxConfig.pdb
PROGRESS CODE: V03040003 I0
PDB = c:\efi\servergen2\intel\Build\EagleStreamRpPkg\DEBUG_VS2015x86\X64\XmlCliFeaturePkg\XmlCliCommon\Dxe\XmlCliCommonDxe\DEBUG\XmlCliCommonDxe.pdb
PROGRESS CODE: V03040002 I0
PROGRESS CODE: V03040003 I0
PDB = c:\efi\servergen2\intel\Build\EagleStreamRpPkg\DEBUG_VS2015x86\X64\ServerSecurityPkg\Pfr\DxeSmm\PfrDxe\DEBUG\PfrDxeDriver.pdb
PROGRESS CODE: V03040002 I0
PROGRESS CODE: V03040003 I0
PDB = c:\efi\servergen2\intel\Build\EagleStreamRpPkg\DEBUG_VS2015x86\X64\PcAtChipsetPkg\PcatRealTimeClockRuntimeDxe\PcatRealTimeClockRuntimeDxe\DEBUG\PcRtc.pdb
PROGRESS CODE: V03040002 I0
ERROR: C40000002:V0306000A I0 378D7B65-8DA9-4773-B6E4-A47826A833E1
PROGRESS CODE: V03040003 I0
PDB = c:\efi\servergen2\intel\Build\EagleStreamRpPkg\DEBUG_VS2015x86\X64\SecurityPkg\VariableAuthenticated\SecureBootConfigDxe\SecureBootConfigDxe\DEBUG\SecureBootConfigDxe.pdb
PROGRESS CODE: V03040002 I0
PROGRESS CODE: V03040003 I0
PDB = c:\efi\servergen2\intel\Build\EagleStreamRpPkg\DEBUG_VS2015x86\X64\MdeModulePkg\Universal\MonotonicCounterRuntimeDxe\MonotonicCounterRuntimeDxe\DEBUG\MonotonicCounterRuntimeDxe.pdb
PROGRESS CODE: V03040002 I0
PROGRESS CODE: V03040003 I0
PDB = c:\efi\servergen2\intel\Build\EagleStreamRpPkg\DEBUG_VS2015x86\X64\MdeModulePkg\Universal\CapsuleRuntimeDxe\CapsuleRuntimeDxe\DEBUG\CapsuleRuntimeDxe.pdb
PROGRESS CODE: V03040002 I0
PROGRESS CODE: V03040003 I0
PDB = c:\efi\servergen2\intel\Build\EagleStreamRpPkg\DEBUG_VS2015x86\X64\SecurityPkg\Tcg\MemoryOverwriteControl\TcgMor\DEBUG\TcgMor.pdb
PROGRESS CODE: V03040002 I0
PROGRESS CODE: V03040003 I0
PDB = c:\efi\servergen2\intel\Build\EagleStreamRpPkg\DEBUG_VS2015x86\X64\SecurityPkg\Tcg\Tcg2Config\Tcg2ConfigDxe\DEBUG\Tcg2ConfigDxe.pdb
PROGRESS CODE: V03040002 I0
PROGRESS CODE: V03040003 I0
PDB = c:\efi\servergen2\intel\Build\EagleStreamRpPkg\DEBUG_VS2015x86\X64\SecurityPkg\Tcg\Tcg2Acpi\Tcg2Acpi\DEBUG\Tcg2Acpi.pdb
PROGRESS CODE: V03040002 I0
PROGRESS CODE: V03040003 I0
PDB = c:\efi\servergen2\intel\Build\EagleStreamRpPkg\DEBUG_VS2015x86\X64\ServerPlatformPkg\Platform\Dxe\Tcg2PlatformDxe\Tcg2PlatformDxe\DEBUG\Tcg2PlatformDxe.pdb
PROGRESS CODE: V03040002 I0
Failed to locate gEfiDxeSmmReadyToLockProtocolGuid.
PROGRESS CODE: V03040003 I0
PDB = c:\efi\servergen2\intel\Build\EagleStreamRpPkg\DEBUG_VS2015x86\X64\IntelSiliconPkg\Feature\PcieSecurity\IntelPciDeviceSecurityDxe\IntelPciDeviceSecurityDxe\DEBUG\IntelPciDeviceSecurityDxe.pdb
PROGRESS CODE: V03040002 I0
PROGRESS CODE: V03040003 I0
PDB = c:\efi\servergen2\intel\Build\EagleStreamRpPkg\DEBUG_VS2015x86\X64\ServerPlatformPkg\Platform\Dxe\MemorySubClass\MemorySubClass\DEBUG\MemorySubClass.pdb
PROGRESS CODE: V03040002 I0
PROGRESS CODE: V03040003 I0
PDB = c:\efi\servergen2\intel\Build\EagleStreamRpPkg\DEBUG_VS2015x86\X64\ServerPlatformPkg\Platform\Dxe\EmulationDfxSetup\EmulationDfxSetup\DEBUG\EmulationDfxSetup.pdb
PROGRESS CODE: V03040002 I0
PROGRESS CODE: V03040003 I0
PDB = c:\efi\servergen2\intel\Build\EagleStreamRpPkg\DEBUG_VS2015x86\X64\ServerRasPkg\Driver\Dxe\IioRasInit\IioRasInit\DEBUG\IioRasInit.pdb
PROGRESS CODE: V03040002 I0
PROGRESS CODE: V03040003 I0
PDB = c:\efi\servergen2\intel\Build\EagleStreamRpPkg\DEBUG_VS2015x86\X64\ServerRasPkg\Driver\Dxe\AddressTranslationDxe\AddressTranslationDxe\DEBUG\AddressTranslationDxe.pdb
PROGRESS CODE: V03040002 I0
PROGRESS CODE: V03040003 I0
PDB = c:\efi\servergen2\intel\Build\EagleStreamRpPkg\DEBUG_VS2015x86\X64\ServerPlatformPkg\Features\PrmAddrTransDsmConfigDxe\PrmAddrTransDsmConfigDxe\DEBUG\PrmAddrTransDsmConfigDxe.pdb
PROGRESS CODE: V03040002 I0
PROGRESS CODE: V03040003 I0
PDB = c:\efi\servergen2\intel\Build\EagleStreamRpPkg\DEBUG_VS2015x86\X64\ServerPlatformPkg\Features\PrmAddrTransDsm\PrmAddrTransDsm\DEBUG\PrmAddrTransDsm.pdb
PROGRESS CODE: V03040002 I0
PROGRESS CODE: V03040003 I0
PDB = c:\efi\servergen2\intel\Build\EagleStreamRpPkg\DEBUG_VS2015x86\X64\XmlCliFeaturePkg\XmlCliCommon\Smm\XmlCliCommonSmm\DEBUG\XmlCliCommonSmm.pdb
PROGRESS CODE: V03070002 I0
PROGRESS CODE: V03070003 I0
PDB = c:\efi\servergen2\intel\Build\EagleStreamRpPkg\DEBUG_VS2015x86\X64\ServerSecurityPkg\Pfr\DxeSmm\PfrSmm\DEBUG\PfrSmmDriver.pdb
PROGRESS CODE: V03070002 I0
PROGRESS CODE: V03070003 I0
PDB = c:\efi\servergen2\intel\Build\EagleStreamRpPkg\DEBUG_VS2015x86\X64\UserAuthFeaturePkg\UserAuthenticationDxeSmm\UserAuthenticationSmm\DEBUG\UserAuthenticationSmm.pdb
PROGRESS CODE: V03070002 I0
PROGRESS CODE: V03070003 I0
PDB = c:\efi\servergen2\intel\Build\EagleStreamRpPkg\DEBUG_VS2015x86\X64\ServerRasPkg\Driver\Smm\MemTopology\MemTopology\DEBUG\MemTopology.pdb
PROGRESS CODE: V03070002 I0
PROGRESS CODE: V03070003 I0
PDB = c:\efi\servergen2\intel\Build\EagleStreamRpPkg\DEBUG_VS2015x86\X64\ServerRasPkg\PolicySample\PolicySample\DEBUG\PolicySampleDriver.pdb
PROGRESS CODE: V03070002 I0
InitializePolicyData
Enable Poison when 2LM is enabled
CxlMefnEn: 0x0
PROGRESS CODE: V03070003 I0
PDB = c:\efi\servergen2\intel\Build\EagleStreamRpPkg\DEBUG_VS2015x86\X64\ServerRasPkg\Driver\Smm\PartialMirrorHandler\PartialMirrorHandler\DEBUG\PartialMirrorHandler.pdb
PROGRESS CODE: V03070002 I0
PROGRESS CODE: V03070003 I0
PDB = c:\efi\servergen2\intel\Build\EagleStreamRpPkg\DEBUG_VS2015x86\X64\ServerRasPkg\Driver\Smm\Gen2\ImcErrorHandler\ImcErrorHandler\DEBUG\ImcErrorHandler.pdb
PROGRESS CODE: V03070002 I0
[ImcErrorHandler][CrystalRidgeLib] Failed to locate protocol: Not Found
InitializeImcErrorHandler start!
[imc] initialization start!
[PCLS]: InitPclsSparing()... Start
[PCLS]: Register CheckAndHandlePclsSparing()...
[imc] initialization start!
[imc] ConfigSystemRetryRegister start!
[imc] ImcCorrectableErrorEnable start!
PMemEccModeInit
[imc] initialization start!
[imc] ConfigSystemRetryRegister start!
[imc] ImcCorrectableErrorEnable start!
PMemEccModeInit
aend!
PROGRESS CODE: V03070003 I0
PDB = c:\efi\servergen2\intel\Build\EagleStreamRpPkg\DEBUG_VS2015x86\X64\ServerRasPkg\Driver\Smm\Gen2\ProcessorErrorHandler\ProcessorErrorHandler\DEBUG\ProcessorErrorHandler.pdb
PROGRESS CODE: V03070002 I0
[IEH] Start IEH initialization!
[IEH] Search all IEH device in the system
CXL Stack found, CxlValid 0x0, Cxl11CompatibilityMode 0x0
CXL Stack found, CxlValid 0x0, Cxl11CompatibilityMode 0x0
CXL Stack found, CxlValid 0x0, Cxl11CompatibilityMode 0x0
CXL Stack found, CxlValid 0x0, Cxl11CompatibilityMode 0x0
CXL Stack found, CxlValid 0x0, Cxl11CompatibilityMode 0x0
CXL Stack found, CxlValid 0x0, Cxl11CompatibilityMode 0x0
CXL Stack found, CxlValid 0x0, Cxl11CompatibilityMode 0x0
CXL Stack found, CxlValid 0x0, Cxl11CompatibilityMode 0x0
CXL Stack found, CxlValid 0x0, Cxl11CompatibilityMode 0x0
CXL Stack found, CxlValid 0x0, Cxl11CompatibilityMode 0x0
CXL Stack found, CxlValid 0x0, Cxl11CompatibilityMode 0x0
CXL Stack found, CxlValid 0x0, Cxl11CompatibilityMode 0x0
[IEH]-------------- Print created IEH tree -----------
socket:0x0 Bus:0x7E Dev:0x0 Func:0x3 -- Max Bit Index:0x1D BitIndex :0x0 DevCount on this bit :0x1,
ShareIdx:0x0 socket:0x0 Bus:0x7E Dev:0x0 Func:0x3 -- BitIndex :0x1 DevCount on this bit :0x1,
ShareIdx:0x0 socket:0x0 Bus:0x0 Dev:0x14 Func:0x4 -- BitIndex :0x0 DevCount on this bit :0x1,
ShareIdx:0x0 socket:0x0 Bus:0x0 Dev:0x14 Func:0x4 -- BitIndex :0x1 DevCount on this bit :0x1,
ShareIdx:0x0 socket:0x0 Bus:0x0 Dev:0x14 Func:0x0 -- BitIndex :0x2 DevCount on this bit :0x1,
ShareIdx:0x0 socket:0x0 Bus:0x0 Dev:0x1F Func:0x0 -- BitIndex :0x3 DevCount on this bit :0x1,
ShareIdx:0x0 socket:0x0 Bus:0x0 Dev:0x8 Func:0x0 -- BitIndex :0x4 DevCount on this bit :0x1,
ShareIdx:0x0 socket:0x0 Bus:0x0 Dev:0x9 Func:0x0 -- BitIndex :0x5 DevCount on this bit :0x1,
ShareIdx:0x0 socket:0x0 Bus:0x0 Dev:0xA Func:0x0 -- BitIndex :0x6 DevCount on this bit :0x1,
ShareIdx:0x0 socket:0x0 Bus:0x0 Dev:0xB Func:0x0 -- BitIndex :0x7 DevCount on this bit :0x1,
ShareIdx:0x0 socket:0x0 Bus:0x0 Dev:0xC Func:0x0 -- BitIndex :0x8 DevCount on this bit :0x1,
ShareIdx:0x0 socket:0x0 Bus:0x0 Dev:0xD Func:0x0 -- BitIndex :0x9 DevCount on this bit :0x1,
ShareIdx:0x0 socket:0x0 Bus:0x0 Dev:0xE Func:0x0 -- BitIndex :0xA DevCount on this bit :0x1,
ShareIdx:0x0 socket:0x0 Bus:0x0 Dev:0xF Func:0x0 -- BitIndex :0xB DevCount on this bit :0x1,
ShareIdx:0x0 socket:0x0 Bus:0x0 Dev:0x10 Func:0x0 -- BitIndex :0xC DevCount on this bit :0x1,
ShareIdx:0x0 socket:0x0 Bus:0x0 Dev:0x11 Func:0x0 -- BitIndex :0xD DevCount on this bit :0x1,
ShareIdx:0x0 socket:0x0 Bus:0x0 Dev:0x12 Func:0x0 -- BitIndex :0xE DevCount on this bit :0x1,
ShareIdx:0x0 socket:0x0 Bus:0x0 Dev:0x13 Func:0x0 -- BitIndex :0xF DevCount on this bit :0x1,
ShareIdx:0x0 socket:0x0 Bus:0x0 Dev:0x1A Func:0x0 -- BitIndex :0x10 DevCount on this bit :0x1,
ShareIdx:0x0 socket:0x0 Bus:0x0 Dev:0x1B Func:0x0 -- BitIndex :0x11 DevCount on this bit :0x1,
ShareIdx:0x0 socket:0x0 Bus:0x0 Dev:0x1C Func:0x0 -- BitIndex :0x12 DevCount on this bit :0x1,
ShareIdx:0x0 socket:0x0 Bus:0x0 Dev:0x1D Func:0x0 -- BitIndex :0x13 DevCount on this bit :0x1,
ShareIdx:0x0 socket:0x0 Bus:0x0 Dev:0x1F Func:0x7 -- BitIndex :0x14 DevCount on this bit :0x1,
ShareIdx:0x0 socket:0x0 Bus:0x0 Dev:0x1F Func:0x4 -- BitIndex :0x15 DevCount on this bit :0x1,
ShareIdx:0x0 socket:0x0 Bus:0x0 Dev:0x1F Func:0x0 -- BitIndex :0x16 DevCount on this bit :0x1,
ShareIdx:0x0 socket:0x0 Bus:0x0 Dev:0x17 Func:0x0 -- BitIndex :0x17 DevCount on this bit :0x1,
ShareIdx:0x0 socket:0x0 Bus:0x0 Dev:0x18 Func:0x0 -- BitIndex :0x18 DevCount on this bit :0x1,
ShareIdx:0x0 socket:0x0 Bus:0x0 Dev:0x19 Func:0x0 -- BitIndex :0x19 DevCount on this bit :0x1,
ShareIdx:0x0 socket:0x0 Bus:0x0 Dev:0x1F Func:0x6 -- BitIndex :0x1A DevCount on this bit :0x1,
ShareIdx:0x0 socket:0x0 Bus:0x0 Dev:0x1F Func:0x3 -- BitIndex :0x1B DevCount on this bit :0x1,
ShareIdx:0x0 socket:0x0 Bus:0x0 Dev:0x16 Func:0x0 -- BitIndex :0x1C DevCount on this bit :0x1,
ShareIdx:0x0 socket:0x0 Bus:0x0 Dev:0x0 Func:0x0 -- BitIndex :0x1D DevCount on this bit :0x1,
ShareIdx:0x0 socket:0x0 Bus:0x0 Dev:0x1 Func:0x0 -- BitIndex :0x1E DevCount on this bit :0x1,
ShareIdx:0x0 socket:0x0 Bus:0x0 Dev:0x0 Func:0x0 -- BitIndex :0x1F DevCount on this bit :0x1,
ShareIdx:0x0 socket:0x0 Bus:0x0 Dev:0x0 Func:0x0 -- BitIndex :0x2 DevCount on this bit :0x1,
ShareIdx:0x0 socket:0x0 Bus:0x6A Dev:0x0 Func:0x4 -- BitIndex :0x0 DevCount on this bit :0xA,
ShareIdx:0x0 socket:0x0 Bus:0x6A Dev:0x0 Func:0x4 -- ShareIdx:0x1 socket:0x0 Bus:0x6A Dev:0x0 Func:0x4 -- PSF Dino ShareIdx:0x2 socket:0x0 Bus:0x6A Dev:0x0 Func:0x4 -- PSF HCx ShareIdx:0x3 socket:0x0 Bus:0x6A Dev:0x1 Func:0x0 -- ShareIdx:0x4 socket:0x0 Bus:0x6A Dev:0x2 Func:0x0 -- ShareIdx:0x5 socket:0x0 Bus:0x6A Dev:0x3 Func:0x0 -- ShareIdx:0x6 socket:0x0 Bus:0x6A Dev:0x3 Func:0x1 -- ShareIdx:0x7 socket:0x0 Bus:0x6A Dev:0x3 Func:0x2 -- ShareIdx:0x8 socket:0x0 Bus:0x6B Dev:0x0 Func:0x0 -- ShareIdx:0x9 socket:0x0 Bus:0x6D Dev:0x0 Func:0x0 -- BitIndex :0x1 DevCount on this bit :0x3,
ShareIdx:0x0 socket:0x0 Bus:0x6A Dev:0x0 Func:0x0 -- ShareIdx:0x1 socket:0x0 Bus:0x6A Dev:0x0 Func:0x1 -- ShareIdx:0x2 socket:0x0 Bus:0x6A Dev:0x0 Func:0x2 -- BitIndex :0x3 DevCount on this bit :0x1,
ShareIdx:0x0 socket:0x0 Bus:0x0 Dev:0x0 Func:0x4 -- BitIndex :0x0 DevCount on this bit :0x7,
ShareIdx:0x0 socket:0x0 Bus:0x0 Dev:0x0 Func:0x4 -- ShareIdx:0x1 socket:0x0 Bus:0x0 Dev:0x0 Func:0x4 -- PSF PCIE Pi5 ShareIdx:0x2 socket:0x0 Bus:0x0 Dev:0x0 Func:0x4 -- PCIE GEN4 DMI Pi5 ShareIdx:0x3 socket:0x0 Bus:0x0 Dev:0x0 Func:0x4 -- PCIE GEN5 IAL Pi5 (CXL) ShareIdx:0x4 socket:0x0 Bus:0x0 Dev:0x0 Func:0x4 -- SPD I3C Bus ShareIdx:0x5 socket:0x0 Bus:0x0 Dev:0x0 Func:0x4 -- SPD I3C Bus ShareIdx:0x6 socket:0x0 Bus:0x0 Dev:0x0 Func:0x4 -- CXP SMBUS BitIndex :0x1 DevCount on this bit :0x3,
ShareIdx:0x0 socket:0x0 Bus:0x0 Dev:0x0 Func:0x0 -- ShareIdx:0x1 socket:0x0 Bus:0x0 Dev:0x0 Func:0x1 -- ShareIdx:0x2 socket:0x0 Bus:0x0 Dev:0x0 Func:0x2 -- BitIndex :0x2 DevCount on this bit :0x1,
ShareIdx:0x0 socket:0x0 Bus:0x0 Dev:0x8 Func:0x0 -- BitIndex :0x3 DevCount on this bit :0x1,
ShareIdx:0x0 socket:0x0 Bus:0x0 Dev:0x6 Func:0x0 -- BitIndex :0x4 DevCount on this bit :0x1,
ShareIdx:0x0 socket:0x0 Bus:0x0 Dev:0x4 Func:0x0 -- BitIndex :0x5 DevCount on this bit :0x1,
ShareIdx:0x0 socket:0x0 Bus:0x0 Dev:0x2 Func:0x0 -- BitIndex :0x6 DevCount on this bit :0x1,
ShareIdx:0x0 socket:0x0 Bus:0x0 Dev:0x1 Func:0x0 -- BitIndex :0x7 DevCount on this bit :0x1,
ShareIdx:0x0 socket:0x0 Bus:0x0 Dev:0x3 Func:0x0 -- BitIndex :0x8 DevCount on this bit :0x1,
ShareIdx:0x0 socket:0x0 Bus:0x0 Dev:0x5 Func:0x0 -- BitIndex :0x9 DevCount on this bit :0x1,
ShareIdx:0x0 socket:0x0 Bus:0x0 Dev:0x7 Func:0x0 -- BitIndex :0xA DevCount on this bit :0x1,
Skip Invalid Node
BitIndex :0x4 DevCount on this bit :0x1,
ShareIdx:0x0 socket:0x0 Bus:0x15 Dev:0x0 Func:0x4 -- BitIndex :0x0 DevCount on this bit :0x4,
ShareIdx:0x0 socket:0x0 Bus:0x15 Dev:0x0 Func:0x4 -- ShareIdx:0x1 socket:0x0 Bus:0x15 Dev:0x0 Func:0x4 -- PSF PCIE Pi5 ShareIdx:0x2 socket:0x0 Bus:0x15 Dev:0x0 Func:0x4 -- PCIE GEN4 DMI Pi5 ShareIdx:0x3 socket:0x0 Bus:0x15 Dev:0x0 Func:0x4 -- PCIE GEN5 IAL Pi5 (CXL) BitIndex :0x1 DevCount on this bit :0x3,
ShareIdx:0x0 socket:0x0 Bus:0x15 Dev:0x0 Func:0x0 -- ShareIdx:0x1 socket:0x0 Bus:0x15 Dev:0x0 Func:0x1 -- ShareIdx:0x2 socket:0x0 Bus:0x15 Dev:0x0 Func:0x2 -- BitIndex :0x2 DevCount on this bit :0x1,
ShareIdx:0x0 socket:0x0 Bus:0x15 Dev:0x8 Func:0x0 -- BitIndex :0x3 DevCount on this bit :0x1,
ShareIdx:0x0 socket:0x0 Bus:0x15 Dev:0x6 Func:0x0 -- BitIndex :0x4 DevCount on this bit :0x1,
ShareIdx:0x0 socket:0x0 Bus:0x15 Dev:0x4 Func:0x0 -- BitIndex :0x5 DevCount on this bit :0x1,
ShareIdx:0x0 socket:0x0 Bus:0x15 Dev:0x2 Func:0x0 -- BitIndex :0x6 DevCount on this bit :0x1,
ShareIdx:0x0 socket:0x0 Bus:0x15 Dev:0x1 Func:0x0 -- BitIndex :0x7 DevCount on this bit :0x1,
ShareIdx:0x0 socket:0x0 Bus:0x15 Dev:0x3 Func:0x0 -- BitIndex :0x8 DevCount on this bit :0x1,
ShareIdx:0x0 socket:0x0 Bus:0x15 Dev:0x5 Func:0x0 -- BitIndex :0x9 DevCount on this bit :0x1,
ShareIdx:0x0 socket:0x0 Bus:0x15 Dev:0x7 Func:0x0 -- BitIndex :0x5 DevCount on this bit :0x1,
ShareIdx:0x0 socket:0x0 Bus:0x6F Dev:0x0 Func:0x4 -- BitIndex :0x0 DevCount on this bit :0xA,
ShareIdx:0x0 socket:0x0 Bus:0x6F Dev:0x0 Func:0x4 -- ShareIdx:0x1 socket:0x0 Bus:0x6F Dev:0x0 Func:0x4 -- PSF Dino ShareIdx:0x2 socket:0x0 Bus:0x6F Dev:0x0 Func:0x4 -- PSF HCx ShareIdx:0x3 socket:0x0 Bus:0x6F Dev:0x1 Func:0x0 -- ShareIdx:0x4 socket:0x0 Bus:0x6F Dev:0x2 Func:0x0 -- ShareIdx:0x5 socket:0x0 Bus:0x6F Dev:0x3 Func:0x0 -- ShareIdx:0x6 socket:0x0 Bus:0x6F Dev:0x3 Func:0x1 -- ShareIdx:0x7 socket:0x0 Bus:0x6F Dev:0x3 Func:0x2 -- ShareIdx:0x8 socket:0x0 Bus:0x70 Dev:0x0 Func:0x0 -- ShareIdx:0x9 socket:0x0 Bus:0x72 Dev:0x0 Func:0x0 -- BitIndex :0x1 DevCount on this bit :0x3,
ShareIdx:0x0 socket:0x0 Bus:0x6F Dev:0x0 Func:0x0 -- ShareIdx:0x1 socket:0x0 Bus:0x6F Dev:0x0 Func:0x1 -- ShareIdx:0x2 socket:0x0 Bus:0x6F Dev:0x0 Func:0x2 -- BitIndex :0x6 DevCount on this bit :0x1,
Skip Invalid Node
BitIndex :0x7 DevCount on this bit :0x1,
ShareIdx:0x0 socket:0x0 Bus:0x59 Dev:0x0 Func:0x4 -- BitIndex :0x0 DevCount on this bit :0x4,
ShareIdx:0x0 socket:0x0 Bus:0x59 Dev:0x0 Func:0x4 -- ShareIdx:0x1 socket:0x0 Bus:0x59 Dev:0x0 Func:0x4 -- PSF PCIE Pi5 ShareIdx:0x2 socket:0x0 Bus:0x59 Dev:0x0 Func:0x4 -- PCIE GEN4 DMI Pi5 ShareIdx:0x3 socket:0x0 Bus:0x59 Dev:0x0 Func:0x4 -- PCIE GEN5 IAL Pi5 (CXL) BitIndex :0x1 DevCount on this bit :0x3,
ShareIdx:0x0 socket:0x0 Bus:0x59 Dev:0x0 Func:0x0 -- ShareIdx:0x1 socket:0x0 Bus:0x59 Dev:0x0 Func:0x1 -- ShareIdx:0x2 socket:0x0 Bus:0x59 Dev:0x0 Func:0x2 -- BitIndex :0x2 DevCount on this bit :0x1,
ShareIdx:0x0 socket:0x0 Bus:0x59 Dev:0x8 Func:0x0 -- BitIndex :0x3 DevCount on this bit :0x1,
ShareIdx:0x0 socket:0x0 Bus:0x59 Dev:0x6 Func:0x0 -- BitIndex :0x4 DevCount on this bit :0x1,
ShareIdx:0x0 socket:0x0 Bus:0x59 Dev:0x4 Func:0x0 -- BitIndex :0x5 DevCount on this bit :0x1,
ShareIdx:0x0 socket:0x0 Bus:0x59 Dev:0x2 Func:0x0 -- BitIndex :0x6 DevCount on this bit :0x1,
ShareIdx:0x0 socket:0x0 Bus:0x59 Dev:0x1 Func:0x0 -- BitIndex :0x7 DevCount on this bit :0x1,
ShareIdx:0x0 socket:0x0 Bus:0x59 Dev:0x3 Func:0x0 -- BitIndex :0x8 DevCount on this bit :0x1,
ShareIdx:0x0 socket:0x0 Bus:0x59 Dev:0x5 Func:0x0 -- BitIndex :0x9 DevCount on this bit :0x1,
ShareIdx:0x0 socket:0x0 Bus:0x59 Dev:0x7 Func:0x0 -- BitIndex :0x8 DevCount on this bit :0x1,
ShareIdx:0x0 socket:0x0 Bus:0x74 Dev:0x0 Func:0x4 -- BitIndex :0x0 DevCount on this bit :0xA,
ShareIdx:0x0 socket:0x0 Bus:0x74 Dev:0x0 Func:0x4 -- ShareIdx:0x1 socket:0x0 Bus:0x74 Dev:0x0 Func:0x4 -- PSF Dino ShareIdx:0x2 socket:0x0 Bus:0x74 Dev:0x0 Func:0x4 -- PSF HCx ShareIdx:0x3 socket:0x0 Bus:0x74 Dev:0x1 Func:0x0 -- ShareIdx:0x4 socket:0x0 Bus:0x74 Dev:0x2 Func:0x0 -- ShareIdx:0x5 socket:0x0 Bus:0x74 Dev:0x3 Func:0x0 -- ShareIdx:0x6 socket:0x0 Bus:0x74 Dev:0x3 Func:0x1 -- ShareIdx:0x7 socket:0x0 Bus:0x74 Dev:0x3 Func:0x2 -- ShareIdx:0x8 socket:0x0 Bus:0x75 Dev:0x0 Func:0x0 -- ShareIdx:0x9 socket:0x0 Bus:0x77 Dev:0x0 Func:0x0 -- BitIndex :0x1 DevCount on this bit :0x3,
ShareIdx:0x0 socket:0x0 Bus:0x74 Dev:0x0 Func:0x0 -- ShareIdx:0x1 socket:0x0 Bus:0x74 Dev:0x0 Func:0x1 -- ShareIdx:0x2 socket:0x0 Bus:0x74 Dev:0x0 Func:0x2 -- BitIndex :0x9 DevCount on this bit :0x1,
ShareIdx:0x0 socket:0x0 Bus:0x37 Dev:0x0 Func:0x4 -- BitIndex :0x0 DevCount on this bit :0x4,
ShareIdx:0x0 socket:0x0 Bus:0x37 Dev:0x0 Func:0x4 -- ShareIdx:0x1 socket:0x0 Bus:0x37 Dev:0x0 Func:0x4 -- PSF PCIE Pi5 ShareIdx:0x2 socket:0x0 Bus:0x37 Dev:0x0 Func:0x4 -- PCIE GEN4 DMI Pi5 ShareIdx:0x3 socket:0x0 Bus:0x37 Dev:0x0 Func:0x4 -- PCIE GEN5 IAL Pi5 (CXL) BitIndex :0x1 DevCount on this bit :0x3,
ShareIdx:0x0 socket:0x0 Bus:0x37 Dev:0x0 Func:0x0 -- ShareIdx:0x1 socket:0x0 Bus:0x37 Dev:0x0 Func:0x1 -- ShareIdx:0x2 socket:0x0 Bus:0x37 Dev:0x0 Func:0x2 -- BitIndex :0x2 DevCount on this bit :0x1,
ShareIdx:0x0 socket:0x0 Bus:0x37 Dev:0x8 Func:0x0 -- BitIndex :0x3 DevCount on this bit :0x1,
ShareIdx:0x0 socket:0x0 Bus:0x37 Dev:0x6 Func:0x0 -- BitIndex :0x4 DevCount on this bit :0x1,
ShareIdx:0x0 socket:0x0 Bus:0x37 Dev:0x4 Func:0x0 -- BitIndex :0x5 DevCount on this bit :0x1,
ShareIdx:0x0 socket:0x0 Bus:0x37 Dev:0x2 Func:0x0 -- BitIndex :0x6 DevCount on this bit :0x1,
ShareIdx:0x0 socket:0x0 Bus:0x37 Dev:0x1 Func:0x0 -- BitIndex :0x7 DevCount on this bit :0x1,
ShareIdx:0x0 socket:0x0 Bus:0x37 Dev:0x3 Func:0x0 -- BitIndex :0x8 DevCount on this bit :0x1,
ShareIdx:0x0 socket:0x0 Bus:0x37 Dev:0x5 Func:0x0 -- BitIndex :0x9 DevCount on this bit :0x1,
ShareIdx:0x0 socket:0x0 Bus:0x37 Dev:0x7 Func:0x0 -- BitIndex :0xA DevCount on this bit :0x1,
ShareIdx:0x0 socket:0x0 Bus:0x26 Dev:0x0 Func:0x4 -- BitIndex :0x0 DevCount on this bit :0x4,
ShareIdx:0x0 socket:0x0 Bus:0x26 Dev:0x0 Func:0x4 -- ShareIdx:0x1 socket:0x0 Bus:0x26 Dev:0x0 Func:0x4 -- PSF PCIE Pi5 ShareIdx:0x2 socket:0x0 Bus:0x26 Dev:0x0 Func:0x4 -- PCIE GEN4 DMI Pi5 ShareIdx:0x3 socket:0x0 Bus:0x26 Dev:0x0 Func:0x4 -- PCIE GEN5 IAL Pi5 (CXL) BitIndex :0x1 DevCount on this bit :0x3,
ShareIdx:0x0 socket:0x0 Bus:0x26 Dev:0x0 Func:0x0 -- ShareIdx:0x1 socket:0x0 Bus:0x26 Dev:0x0 Func:0x1 -- ShareIdx:0x2 socket:0x0 Bus:0x26 Dev:0x0 Func:0x2 -- BitIndex :0x2 DevCount on this bit :0x1,
ShareIdx:0x0 socket:0x0 Bus:0x26 Dev:0x8 Func:0x0 -- BitIndex :0x3 DevCount on this bit :0x1,
ShareIdx:0x0 socket:0x0 Bus:0x26 Dev:0x6 Func:0x0 -- BitIndex :0x4 DevCount on this bit :0x1,
ShareIdx:0x0 socket:0x0 Bus:0x26 Dev:0x4 Func:0x0 -- BitIndex :0x5 DevCount on this bit :0x1,
ShareIdx:0x0 socket:0x0 Bus:0x26 Dev:0x2 Func:0x0 -- BitIndex :0x6 DevCount on this bit :0x1,
ShareIdx:0x0 socket:0x0 Bus:0x26 Dev:0x1 Func:0x0 -- BitIndex :0x7 DevCount on this bit :0x1,
ShareIdx:0x0 socket:0x0 Bus:0x26 Dev:0x3 Func:0x0 -- BitIndex :0x8 DevCount on this bit :0x1,
ShareIdx:0x0 socket:0x0 Bus:0x26 Dev:0x5 Func:0x0 -- BitIndex :0x9 DevCount on this bit :0x1,
ShareIdx:0x0 socket:0x0 Bus:0x26 Dev:0x7 Func:0x0 -- BitIndex :0xB DevCount on this bit :0x1,
ShareIdx:0x0 socket:0x0 Bus:0x79 Dev:0x0 Func:0x4 -- BitIndex :0x0 DevCount on this bit :0xA,
ShareIdx:0x0 socket:0x0 Bus:0x79 Dev:0x0 Func:0x4 -- ShareIdx:0x1 socket:0x0 Bus:0x79 Dev:0x0 Func:0x4 -- PSF Dino ShareIdx:0x2 socket:0x0 Bus:0x79 Dev:0x0 Func:0x4 -- PSF HCx ShareIdx:0x3 socket:0x0 Bus:0x79 Dev:0x1 Func:0x0 -- ShareIdx:0x4 socket:0x0 Bus:0x79 Dev:0x2 Func:0x0 -- ShareIdx:0x5 socket:0x0 Bus:0x79 Dev:0x3 Func:0x0 -- ShareIdx:0x6 socket:0x0 Bus:0x79 Dev:0x3 Func:0x1 -- ShareIdx:0x7 socket:0x0 Bus:0x79 Dev:0x3 Func:0x2 -- ShareIdx:0x8 socket:0x0 Bus:0x7A Dev:0x0 Func:0x0 -- ShareIdx:0x9 socket:0x0 Bus:0x7C Dev:0x0 Func:0x0 -- BitIndex :0x1 DevCount on this bit :0x3,
ShareIdx:0x0 socket:0x0 Bus:0x79 Dev:0x0 Func:0x0 -- ShareIdx:0x1 socket:0x0 Bus:0x79 Dev:0x0 Func:0x1 -- ShareIdx:0x2 socket:0x0 Bus:0x79 Dev:0x0 Func:0x2 -- BitIndex :0xC DevCount on this bit :0x1,
Skip Invalid Node
BitIndex :0xD DevCount on this bit :0x1,
ShareIdx:0x0 socket:0x0 Bus:0x48 Dev:0x0 Func:0x4 -- BitIndex :0x0 DevCount on this bit :0x4,
ShareIdx:0x0 socket:0x0 Bus:0x48 Dev:0x0 Func:0x4 -- ShareIdx:0x1 socket:0x0 Bus:0x48 Dev:0x0 Func:0x4 -- PSF PCIE Pi5 ShareIdx:0x2 socket:0x0 Bus:0x48 Dev:0x0 Func:0x4 -- PCIE GEN4 DMI Pi5 ShareIdx:0x3 socket:0x0 Bus:0x48 Dev:0x0 Func:0x4 -- PCIE GEN5 IAL Pi5 (CXL) BitIndex :0x1 DevCount on this bit :0x3,
ShareIdx:0x0 socket:0x0 Bus:0x48 Dev:0x0 Func:0x0 -- ShareIdx:0x1 socket:0x0 Bus:0x48 Dev:0x0 Func:0x1 -- ShareIdx:0x2 socket:0x0 Bus:0x48 Dev:0x0 Func:0x2 -- BitIndex :0x2 DevCount on this bit :0x1,
ShareIdx:0x0 socket:0x0 Bus:0x48 Dev:0x8 Func:0x0 -- BitIndex :0x3 DevCount on this bit :0x1,
ShareIdx:0x0 socket:0x0 Bus:0x48 Dev:0x6 Func:0x0 -- BitIndex :0x4 DevCount on this bit :0x1,
ShareIdx:0x0 socket:0x0 Bus:0x48 Dev:0x4 Func:0x0 -- BitIndex :0x5 DevCount on this bit :0x1,
ShareIdx:0x0 socket:0x0 Bus:0x48 Dev:0x2 Func:0x0 -- BitIndex :0x6 DevCount on this bit :0x1,
ShareIdx:0x0 socket:0x0 Bus:0x48 Dev:0x1 Func:0x0 -- BitIndex :0x7 DevCount on this bit :0x1,
ShareIdx:0x0 socket:0x0 Bus:0x48 Dev:0x3 Func:0x0 -- BitIndex :0x8 DevCount on this bit :0x1,
ShareIdx:0x0 socket:0x0 Bus:0x48 Dev:0x5 Func:0x0 -- BitIndex :0x9 DevCount on this bit :0x1,
ShareIdx:0x0 socket:0x0 Bus:0x48 Dev:0x7 Func:0x0 -- BitIndex :0xE DevCount on this bit :0x0,
BitIndex :0xF DevCount on this bit :0x0,
BitIndex :0x10 DevCount on this bit :0x0,
BitIndex :0x11 DevCount on this bit :0x0,
BitIndex :0x12 DevCount on this bit :0x0,
BitIndex :0x13 DevCount on this bit :0x0,
BitIndex :0x14 DevCount on this bit :0x0,
BitIndex :0x15 DevCount on this bit :0x0,
BitIndex :0x16 DevCount on this bit :0x4,
ShareIdx:0x0 socket:0x0 Bus:0x7E Dev:0x0 Func:0x0 -- ShareIdx:0x1 socket:0x0 Bus:0x7E Dev:0x0 Func:0x0 -- ShareIdx:0x2 socket:0x0 Bus:0x7E Dev:0x0 Func:0x0 -- ShareIdx:0x3 socket:0x0 Bus:0x7E Dev:0x0 Func:0x0 -- BitIndex :0x17 DevCount on this bit :0x4,
ShareIdx:0x0 socket:0x0 Bus:0x7E Dev:0x0 Func:0x0 -- ShareIdx:0x1 socket:0x0 Bus:0x7E Dev:0x0 Func:0x0 -- ShareIdx:0x2 socket:0x0 Bus:0x7E Dev:0x0 Func:0x0 -- ShareIdx:0x3 socket:0x0 Bus:0x7E Dev:0x0 Func:0x0 -- BitIndex :0x18 DevCount on this bit :0x4,
ShareIdx:0x0 socket:0x0 Bus:0x7E Dev:0x0 Func:0x0 -- ShareIdx:0x1 socket:0x0 Bus:0x7E Dev:0x0 Func:0x0 -- ShareIdx:0x2 socket:0x0 Bus:0x7E Dev:0x0 Func:0x0 -- ShareIdx:0x3 socket:0x0 Bus:0x7E Dev:0x0 Func:0x0 -- BitIndex :0x19 DevCount on this bit :0x4,
ShareIdx:0x0 socket:0x0 Bus:0x7E Dev:0x0 Func:0x0 -- ShareIdx:0x1 socket:0x0 Bus:0x7E Dev:0x0 Func:0x0 -- ShareIdx:0x2 socket:0x0 Bus:0x7E Dev:0x0 Func:0x0 -- ShareIdx:0x3 socket:0x0 Bus:0x7E Dev:0x0 Func:0x0 -- BitIndex :0x1A DevCount on this bit :0x4,
ShareIdx:0x0 socket:0x0 Bus:0x7E Dev:0x0 Func:0x0 -- ShareIdx:0x1 socket:0x0 Bus:0x7E Dev:0x0 Func:0x0 -- ShareIdx:0x2 socket:0x0 Bus:0x7E Dev:0x0 Func:0x0 -- ShareIdx:0x3 socket:0x0 Bus:0x7E Dev:0x0 Func:0x0 -- BitIndex :0x1B DevCount on this bit :0x4,
ShareIdx:0x0 socket:0x0 Bus:0x7E Dev:0x0 Func:0x0 -- ShareIdx:0x1 socket:0x0 Bus:0x7E Dev:0x0 Func:0x0 -- ShareIdx:0x2 socket:0x0 Bus:0x7E Dev:0x0 Func:0x0 -- ShareIdx:0x3 socket:0x0 Bus:0x7E Dev:0x0 Func:0x0 -- BitIndex :0x1C DevCount on this bit :0x4,
ShareIdx:0x0 socket:0x0 Bus:0x7E Dev:0x0 Func:0x0 -- ShareIdx:0x1 socket:0x0 Bus:0x7E Dev:0x0 Func:0x0 -- ShareIdx:0x2 socket:0x0 Bus:0x7E Dev:0x0 Func:0x0 -- ShareIdx:0x3 socket:0x0 Bus:0x7E Dev:0x0 Func:0x0 -- BitIndex :0x1D DevCount on this bit :0x4,
ShareIdx:0x0 socket:0x0 Bus:0x7E Dev:0x0 Func:0x0 -- ShareIdx:0x1 socket:0x0 Bus:0x7E Dev:0x0 Func:0x0 -- ShareIdx:0x2 socket:0x0 Bus:0x7E Dev:0x0 Func:0x0 -- ShareIdx:0x3 socket:0x0 Bus:0x7E Dev:0x0 Func:0x0 -- socket:0x1 Bus:0xFE Dev:0x0 Func:0x3 -- Max Bit Index:0x1D BitIndex :0x0 DevCount on this bit :0x1,
ShareIdx:0x0 socket:0x1 Bus:0xFE Dev:0x0 Func:0x3 -- BitIndex :0x1 DevCount on this bit :0x1,
Skip Invalid Node
BitIndex :0x2 DevCount on this bit :0x1,
ShareIdx:0x0 socket:0x1 Bus:0xE7 Dev:0x0 Func:0x4 -- BitIndex :0x0 DevCount on this bit :0xA,
ShareIdx:0x0 socket:0x1 Bus:0xE7 Dev:0x0 Func:0x4 -- ShareIdx:0x1 socket:0x1 Bus:0xE7 Dev:0x0 Func:0x4 -- PSF Dino ShareIdx:0x2 socket:0x1 Bus:0xE7 Dev:0x0 Func:0x4 -- PSF HCx ShareIdx:0x3 socket:0x1 Bus:0xE7 Dev:0x1 Func:0x0 -- ShareIdx:0x4 socket:0x1 Bus:0xE7 Dev:0x2 Func:0x0 -- ShareIdx:0x5 socket:0x1 Bus:0xE7 Dev:0x3 Func:0x0 -- ShareIdx:0x6 socket:0x1 Bus:0xE7 Dev:0x3 Func:0x1 -- ShareIdx:0x7 socket:0x1 Bus:0xE7 Dev:0x3 Func:0x2 -- ShareIdx:0x8 socket:0x1 Bus:0xE8 Dev:0x0 Func:0x0 -- ShareIdx:0x9 socket:0x1 Bus:0xEA Dev:0x0 Func:0x0 -- BitIndex :0x1 DevCount on this bit :0x3,
ShareIdx:0x0 socket:0x1 Bus:0xE7 Dev:0x0 Func:0x0 -- ShareIdx:0x1 socket:0x1 Bus:0xE7 Dev:0x0 Func:0x1 -- ShareIdx:0x2 socket:0x1 Bus:0xE7 Dev:0x0 Func:0x2 -- BitIndex :0x3 DevCount on this bit :0x1,
ShareIdx:0x0 socket:0x1 Bus:0x80 Dev:0x0 Func:0x4 -- BitIndex :0x0 DevCount on this bit :0x7,
ShareIdx:0x0 socket:0x1 Bus:0x80 Dev:0x0 Func:0x4 -- ShareIdx:0x1 socket:0x1 Bus:0x80 Dev:0x0 Func:0x4 -- PSF PCIE Pi5 ShareIdx:0x2 socket:0x1 Bus:0x80 Dev:0x0 Func:0x4 -- PCIE GEN4 DMI Pi5 ShareIdx:0x3 socket:0x1 Bus:0x80 Dev:0x0 Func:0x4 -- PCIE GEN5 IAL Pi5 (CXL) ShareIdx:0x4 socket:0x1 Bus:0x80 Dev:0x0 Func:0x4 -- SPD I3C Bus ShareIdx:0x5 socket:0x1 Bus:0x80 Dev:0x0 Func:0x4 -- SPD I3C Bus ShareIdx:0x6 socket:0x1 Bus:0x80 Dev:0x0 Func:0x4 -- CXP SMBUS BitIndex :0x1 DevCount on this bit :0x3,
ShareIdx:0x0 socket:0x1 Bus:0x80 Dev:0x0 Func:0x0 -- ShareIdx:0x1 socket:0x1 Bus:0x80 Dev:0x0 Func:0x1 -- ShareIdx:0x2 socket:0x1 Bus:0x80 Dev:0x0 Func:0x2 -- BitIndex :0x2 DevCount on this bit :0x1,
ShareIdx:0x0 socket:0x1 Bus:0x80 Dev:0x8 Func:0x0 -- BitIndex :0x3 DevCount on this bit :0x1,
ShareIdx:0x0 socket:0x1 Bus:0x80 Dev:0x6 Func:0x0 -- BitIndex :0x4 DevCount on this bit :0x1,
ShareIdx:0x0 socket:0x1 Bus:0x80 Dev:0x4 Func:0x0 -- BitIndex :0x5 DevCount on this bit :0x1,
ShareIdx:0x0 socket:0x1 Bus:0x80 Dev:0x2 Func:0x0 -- BitIndex :0x6 DevCount on this bit :0x1,
ShareIdx:0x0 socket:0x1 Bus:0x80 Dev:0x1 Func:0x0 -- BitIndex :0x7 DevCount on this bit :0x1,
ShareIdx:0x0 socket:0x1 Bus:0x80 Dev:0x3 Func:0x0 -- BitIndex :0x8 DevCount on this bit :0x1,
ShareIdx:0x0 socket:0x1 Bus:0x80 Dev:0x5 Func:0x0 -- BitIndex :0x9 DevCount on this bit :0x1,
ShareIdx:0x0 socket:0x1 Bus:0x80 Dev:0x7 Func:0x0 -- BitIndex :0xA DevCount on this bit :0x1,
Skip Invalid Node
BitIndex :0x4 DevCount on this bit :0x1,
ShareIdx:0x0 socket:0x1 Bus:0x97 Dev:0x0 Func:0x4 -- BitIndex :0x0 DevCount on this bit :0x4,
ShareIdx:0x0 socket:0x1 Bus:0x97 Dev:0x0 Func:0x4 -- ShareIdx:0x1 socket:0x1 Bus:0x97 Dev:0x0 Func:0x4 -- PSF PCIE Pi5 ShareIdx:0x2 socket:0x1 Bus:0x97 Dev:0x0 Func:0x4 -- PCIE GEN4 DMI Pi5 ShareIdx:0x3 socket:0x1 Bus:0x97 Dev:0x0 Func:0x4 -- PCIE GEN5 IAL Pi5 (CXL) BitIndex :0x1 DevCount on this bit :0x3,
ShareIdx:0x0 socket:0x1 Bus:0x97 Dev:0x0 Func:0x0 -- ShareIdx:0x1 socket:0x1 Bus:0x97 Dev:0x0 Func:0x1 -- ShareIdx:0x2 socket:0x1 Bus:0x97 Dev:0x0 Func:0x2 -- BitIndex :0x2 DevCount on this bit :0x1,
ShareIdx:0x0 socket:0x1 Bus:0x97 Dev:0x8 Func:0x0 -- BitIndex :0x3 DevCount on this bit :0x1,
ShareIdx:0x0 socket:0x1 Bus:0x97 Dev:0x6 Func:0x0 -- BitIndex :0x4 DevCount on this bit :0x1,
ShareIdx:0x0 socket:0x1 Bus:0x97 Dev:0x4 Func:0x0 -- BitIndex :0x5 DevCount on this bit :0x1,
ShareIdx:0x0 socket:0x1 Bus:0x97 Dev:0x2 Func:0x0 -- BitIndex :0x6 DevCount on this bit :0x1,
ShareIdx:0x0 socket:0x1 Bus:0x97 Dev:0x1 Func:0x0 -- BitIndex :0x7 DevCount on this bit :0x1,
ShareIdx:0x0 socket:0x1 Bus:0x97 Dev:0x3 Func:0x0 -- BitIndex :0x8 DevCount on this bit :0x1,
ShareIdx:0x0 socket:0x1 Bus:0x97 Dev:0x5 Func:0x0 -- BitIndex :0x9 DevCount on this bit :0x1,
ShareIdx:0x0 socket:0x1 Bus:0x97 Dev:0x7 Func:0x0 -- BitIndex :0x5 DevCount on this bit :0x1,
ShareIdx:0x0 socket:0x1 Bus:0xEC Dev:0x0 Func:0x4 -- BitIndex :0x0 DevCount on this bit :0xA,
ShareIdx:0x0 socket:0x1 Bus:0xEC Dev:0x0 Func:0x4 -- ShareIdx:0x1 socket:0x1 Bus:0xEC Dev:0x0 Func:0x4 -- PSF Dino ShareIdx:0x2 socket:0x1 Bus:0xEC Dev:0x0 Func:0x4 -- PSF HCx ShareIdx:0x3 socket:0x1 Bus:0xEC Dev:0x1 Func:0x0 -- ShareIdx:0x4 socket:0x1 Bus:0xEC Dev:0x2 Func:0x0 -- ShareIdx:0x5 socket:0x1 Bus:0xEC Dev:0x3 Func:0x0 -- ShareIdx:0x6 socket:0x1 Bus:0xEC Dev:0x3 Func:0x1 -- ShareIdx:0x7 socket:0x1 Bus:0xEC Dev:0x3 Func:0x2 -- ShareIdx:0x8 socket:0x1 Bus:0xED Dev:0x0 Func:0x0 -- ShareIdx:0x9 socket:0x1 Bus:0xEF Dev:0x0 Func:0x0 -- BitIndex :0x1 DevCount on this bit :0x3,
ShareIdx:0x0 socket:0x1 Bus:0xEC Dev:0x0 Func:0x0 -- ShareIdx:0x1 socket:0x1 Bus:0xEC Dev:0x0 Func:0x1 -- ShareIdx:0x2 socket:0x1 Bus:0xEC Dev:0x0 Func:0x2 -- BitIndex :0x6 DevCount on this bit :0x1,
Skip Invalid Node
BitIndex :0x7 DevCount on this bit :0x1,
ShareIdx:0x0 socket:0x1 Bus:0xD7 Dev:0x0 Func:0x4 -- BitIndex :0x0 DevCount on this bit :0x4,
ShareIdx:0x0 socket:0x1 Bus:0xD7 Dev:0x0 Func:0x4 -- ShareIdx:0x1 socket:0x1 Bus:0xD7 Dev:0x0 Func:0x4 -- PSF PCIE Pi5 ShareIdx:0x2 socket:0x1 Bus:0xD7 Dev:0x0 Func:0x4 -- PCIE GEN4 DMI Pi5 ShareIdx:0x3 socket:0x1 Bus:0xD7 Dev:0x0 Func:0x4 -- PCIE GEN5 IAL Pi5 (CXL) BitIndex :0x1 DevCount on this bit :0x3,
ShareIdx:0x0 socket:0x1 Bus:0xD7 Dev:0x0 Func:0x0 -- ShareIdx:0x1 socket:0x1 Bus:0xD7 Dev:0x0 Func:0x1 -- ShareIdx:0x2 socket:0x1 Bus:0xD7 Dev:0x0 Func:0x2 -- BitIndex :0x2 DevCount on this bit :0x1,
ShareIdx:0x0 socket:0x1 Bus:0xD7 Dev:0x8 Func:0x0 -- BitIndex :0x3 DevCount on this bit :0x1,
ShareIdx:0x0 socket:0x1 Bus:0xD7 Dev:0x6 Func:0x0 -- BitIndex :0x4 DevCount on this bit :0x1,
ShareIdx:0x0 socket:0x1 Bus:0xD7 Dev:0x4 Func:0x0 -- BitIndex :0x5 DevCount on this bit :0x1,
ShareIdx:0x0 socket:0x1 Bus:0xD7 Dev:0x2 Func:0x0 -- BitIndex :0x6 DevCount on this bit :0x1,
ShareIdx:0x0 socket:0x1 Bus:0xD7 Dev:0x1 Func:0x0 -- BitIndex :0x7 DevCount on this bit :0x1,
ShareIdx:0x0 socket:0x1 Bus:0xD7 Dev:0x3 Func:0x0 -- BitIndex :0x8 DevCount on this bit :0x1,
ShareIdx:0x0 socket:0x1 Bus:0xD7 Dev:0x5 Func:0x0 -- BitIndex :0x9 DevCount on this bit :0x1,
ShareIdx:0x0 socket:0x1 Bus:0xD7 Dev:0x7 Func:0x0 -- BitIndex :0x8 DevCount on this bit :0x1,
ShareIdx:0x0 socket:0x1 Bus:0xF1 Dev:0x0 Func:0x4 -- BitIndex :0x0 DevCount on this bit :0xA,
ShareIdx:0x0 socket:0x1 Bus:0xF1 Dev:0x0 Func:0x4 -- ShareIdx:0x1 socket:0x1 Bus:0xF1 Dev:0x0 Func:0x4 -- PSF Dino ShareIdx:0x2 socket:0x1 Bus:0xF1 Dev:0x0 Func:0x4 -- PSF HCx ShareIdx:0x3 socket:0x1 Bus:0xF1 Dev:0x1 Func:0x0 -- ShareIdx:0x4 socket:0x1 Bus:0xF1 Dev:0x2 Func:0x0 -- ShareIdx:0x5 socket:0x1 Bus:0xF1 Dev:0x3 Func:0x0 -- ShareIdx:0x6 socket:0x1 Bus:0xF1 Dev:0x3 Func:0x1 -- ShareIdx:0x7 socket:0x1 Bus:0xF1 Dev:0x3 Func:0x2 -- ShareIdx:0x8 socket:0x1 Bus:0xF2 Dev:0x0 Func:0x0 -- ShareIdx:0x9 socket:0x1 Bus:0xF4 Dev:0x0 Func:0x0 -- BitIndex :0x1 DevCount on this bit :0x3,
ShareIdx:0x0 socket:0x1 Bus:0xF1 Dev:0x0 Func:0x0 -- ShareIdx:0x1 socket:0x1 Bus:0xF1 Dev:0x0 Func:0x1 -- ShareIdx:0x2 socket:0x1 Bus:0xF1 Dev:0x0 Func:0x2 -- BitIndex :0x9 DevCount on this bit :0x1,
ShareIdx:0x0 socket:0x1 Bus:0xB7 Dev:0x0 Func:0x4 -- BitIndex :0x0 DevCount on this bit :0x4,
ShareIdx:0x0 socket:0x1 Bus:0xB7 Dev:0x0 Func:0x4 -- ShareIdx:0x1 socket:0x1 Bus:0xB7 Dev:0x0 Func:0x4 -- PSF PCIE Pi5 ShareIdx:0x2 socket:0x1 Bus:0xB7 Dev:0x0 Func:0x4 -- PCIE GEN4 DMI Pi5 ShareIdx:0x3 socket:0x1 Bus:0xB7 Dev:0x0 Func:0x4 -- PCIE GEN5 IAL Pi5 (CXL) BitIndex :0x1 DevCount on this bit :0x3,
ShareIdx:0x0 socket:0x1 Bus:0xB7 Dev:0x0 Func:0x0 -- ShareIdx:0x1 socket:0x1 Bus:0xB7 Dev:0x0 Func:0x1 -- ShareIdx:0x2 socket:0x1 Bus:0xB7 Dev:0x0 Func:0x2 -- BitIndex :0x2 DevCount on this bit :0x1,
ShareIdx:0x0 socket:0x1 Bus:0xB7 Dev:0x8 Func:0x0 -- BitIndex :0x3 DevCount on this bit :0x1,
ShareIdx:0x0 socket:0x1 Bus:0xB7 Dev:0x6 Func:0x0 -- BitIndex :0x4 DevCount on this bit :0x1,
ShareIdx:0x0 socket:0x1 Bus:0xB7 Dev:0x4 Func:0x0 -- BitIndex :0x5 DevCount on this bit :0x1,
ShareIdx:0x0 socket:0x1 Bus:0xB7 Dev:0x2 Func:0x0 -- BitIndex :0x6 DevCount on this bit :0x1,
ShareIdx:0x0 socket:0x1 Bus:0xB7 Dev:0x1 Func:0x0 -- BitIndex :0x7 DevCount on this bit :0x1,
ShareIdx:0x0 socket:0x1 Bus:0xB7 Dev:0x3 Func:0x0 -- BitIndex :0x8 DevCount on this bit :0x1,
ShareIdx:0x0 socket:0x1 Bus:0xB7 Dev:0x5 Func:0x0 -- BitIndex :0x9 DevCount on this bit :0x1,
ShareIdx:0x0 socket:0x1 Bus:0xB7 Dev:0x7 Func:0x0 -- BitIndex :0xA DevCount on this bit :0x1,
ShareIdx:0x0 socket:0x1 Bus:0xA7 Dev:0x0 Func:0x4 -- BitIndex :0x0 DevCount on this bit :0x4,
ShareIdx:0x0 socket:0x1 Bus:0xA7 Dev:0x0 Func:0x4 -- ShareIdx:0x1 socket:0x1 Bus:0xA7 Dev:0x0 Func:0x4 -- PSF PCIE Pi5 ShareIdx:0x2 socket:0x1 Bus:0xA7 Dev:0x0 Func:0x4 -- PCIE GEN4 DMI Pi5 ShareIdx:0x3 socket:0x1 Bus:0xA7 Dev:0x0 Func:0x4 -- PCIE GEN5 IAL Pi5 (CXL) BitIndex :0x1 DevCount on this bit :0x3,
ShareIdx:0x0 socket:0x1 Bus:0xA7 Dev:0x0 Func:0x0 -- ShareIdx:0x1 socket:0x1 Bus:0xA7 Dev:0x0 Func:0x1 -- ShareIdx:0x2 socket:0x1 Bus:0xA7 Dev:0x0 Func:0x2 -- BitIndex :0x2 DevCount on this bit :0x1,
ShareIdx:0x0 socket:0x1 Bus:0xA7 Dev:0x8 Func:0x0 -- BitIndex :0x3 DevCount on this bit :0x1,
ShareIdx:0x0 socket:0x1 Bus:0xA7 Dev:0x6 Func:0x0 -- BitIndex :0x4 DevCount on this bit :0x1,
ShareIdx:0x0 socket:0x1 Bus:0xA7 Dev:0x4 Func:0x0 -- BitIndex :0x5 DevCount on this bit :0x1,
ShareIdx:0x0 socket:0x1 Bus:0xA7 Dev:0x2 Func:0x0 -- BitIndex :0x6 DevCount on this bit :0x1,
ShareIdx:0x0 socket:0x1 Bus:0xA7 Dev:0x1 Func:0x0 -- BitIndex :0x7 DevCount on this bit :0x1,
ShareIdx:0x0 socket:0x1 Bus:0xA7 Dev:0x3 Func:0x0 -- BitIndex :0x8 DevCount on this bit :0x1,
ShareIdx:0x0 socket:0x1 Bus:0xA7 Dev:0x5 Func:0x0 -- BitIndex :0x9 DevCount on this bit :0x1,
ShareIdx:0x0 socket:0x1 Bus:0xA7 Dev:0x7 Func:0x0 -- BitIndex :0xB DevCount on this bit :0x1,
ShareIdx:0x0 socket:0x1 Bus:0xF6 Dev:0x0 Func:0x4 -- BitIndex :0x0 DevCount on this bit :0xA,
ShareIdx:0x0 socket:0x1 Bus:0xF6 Dev:0x0 Func:0x4 -- ShareIdx:0x1 socket:0x1 Bus:0xF6 Dev:0x0 Func:0x4 -- PSF Dino ShareIdx:0x2 socket:0x1 Bus:0xF6 Dev:0x0 Func:0x4 -- PSF HCx ShareIdx:0x3 socket:0x1 Bus:0xF6 Dev:0x1 Func:0x0 -- ShareIdx:0x4 socket:0x1 Bus:0xF6 Dev:0x2 Func:0x0 -- ShareIdx:0x5 socket:0x1 Bus:0xF6 Dev:0x3 Func:0x0 -- ShareIdx:0x6 socket:0x1 Bus:0xF6 Dev:0x3 Func:0x1 -- ShareIdx:0x7 socket:0x1 Bus:0xF6 Dev:0x3 Func:0x2 -- ShareIdx:0x8 socket:0x1 Bus:0xF7 Dev:0x0 Func:0x0 -- ShareIdx:0x9 socket:0x1 Bus:0xF9 Dev:0x0 Func:0x0 -- BitIndex :0x1 DevCount on this bit :0x3,
ShareIdx:0x0 socket:0x1 Bus:0xF6 Dev:0x0 Func:0x0 -- ShareIdx:0x1 socket:0x1 Bus:0xF6 Dev:0x0 Func:0x1 -- ShareIdx:0x2 socket:0x1 Bus:0xF6 Dev:0x0 Func:0x2 -- BitIndex :0xC DevCount on this bit :0x1,
Skip Invalid Node
BitIndex :0xD DevCount on this bit :0x1,
ShareIdx:0x0 socket:0x1 Bus:0xC7 Dev:0x0 Func:0x4 -- BitIndex :0x0 DevCount on this bit :0x4,
ShareIdx:0x0 socket:0x1 Bus:0xC7 Dev:0x0 Func:0x4 -- ShareIdx:0x1 socket:0x1 Bus:0xC7 Dev:0x0 Func:0x4 -- PSF PCIE Pi5 ShareIdx:0x2 socket:0x1 Bus:0xC7 Dev:0x0 Func:0x4 -- PCIE GEN4 DMI Pi5 ShareIdx:0x3 socket:0x1 Bus:0xC7 Dev:0x0 Func:0x4 -- PCIE GEN5 IAL Pi5 (CXL) BitIndex :0x1 DevCount on this bit :0x3,
ShareIdx:0x0 socket:0x1 Bus:0xC7 Dev:0x0 Func:0x0 -- ShareIdx:0x1 socket:0x1 Bus:0xC7 Dev:0x0 Func:0x1 -- ShareIdx:0x2 socket:0x1 Bus:0xC7 Dev:0x0 Func:0x2 -- BitIndex :0x2 DevCount on this bit :0x1,
ShareIdx:0x0 socket:0x1 Bus:0xC7 Dev:0x8 Func:0x0 -- BitIndex :0x3 DevCount on this bit :0x1,
ShareIdx:0x0 socket:0x1 Bus:0xC7 Dev:0x6 Func:0x0 -- BitIndex :0x4 DevCount on this bit :0x1,
ShareIdx:0x0 socket:0x1 Bus:0xC7 Dev:0x4 Func:0x0 -- BitIndex :0x5 DevCount on this bit :0x1,
ShareIdx:0x0 socket:0x1 Bus:0xC7 Dev:0x2 Func:0x0 -- BitIndex :0x6 DevCount on this bit :0x1,
ShareIdx:0x0 socket:0x1 Bus:0xC7 Dev:0x1 Func:0x0 -- BitIndex :0x7 DevCount on this bit :0x1,
ShareIdx:0x0 socket:0x1 Bus:0xC7 Dev:0x3 Func:0x0 -- BitIndex :0x8 DevCount on this bit :0x1,
ShareIdx:0x0 socket:0x1 Bus:0xC7 Dev:0x5 Func:0x0 -- BitIndex :0x9 DevCount on this bit :0x1,
ShareIdx:0x0 socket:0x1 Bus:0xC7 Dev:0x7 Func:0x0 -- BitIndex :0xE DevCount on this bit :0x0,
BitIndex :0xF DevCount on this bit :0x0,
BitIndex :0x10 DevCount on this bit :0x0,
BitIndex :0x11 DevCount on this bit :0x0,
BitIndex :0x12 DevCount on this bit :0x0,
BitIndex :0x13 DevCount on this bit :0x0,
BitIndex :0x14 DevCount on this bit :0x0,
BitIndex :0x15 DevCount on this bit :0x0,
BitIndex :0x16 DevCount on this bit :0x4,
ShareIdx:0x0 socket:0x1 Bus:0xFE Dev:0x0 Func:0x0 -- ShareIdx:0x1 socket:0x1 Bus:0xFE Dev:0x0 Func:0x0 -- ShareIdx:0x2 socket:0x1 Bus:0xFE Dev:0x0 Func:0x0 -- ShareIdx:0x3 socket:0x1 Bus:0xFE Dev:0x0 Func:0x0 -- BitIndex :0x17 DevCount on this bit :0x4,
ShareIdx:0x0 socket:0x1 Bus:0xFE Dev:0x0 Func:0x0 -- ShareIdx:0x1 socket:0x1 Bus:0xFE Dev:0x0 Func:0x0 -- ShareIdx:0x2 socket:0x1 Bus:0xFE Dev:0x0 Func:0x0 -- ShareIdx:0x3 socket:0x1 Bus:0xFE Dev:0x0 Func:0x0 -- BitIndex :0x18 DevCount on this bit :0x4,
ShareIdx:0x0 socket:0x1 Bus:0xFE Dev:0x0 Func:0x0 -- ShareIdx:0x1 socket:0x1 Bus:0xFE Dev:0x0 Func:0x0 -- ShareIdx:0x2 socket:0x1 Bus:0xFE Dev:0x0 Func:0x0 -- ShareIdx:0x3 socket:0x1 Bus:0xFE Dev:0x0 Func:0x0 -- BitIndex :0x19 DevCount on this bit :0x4,
ShareIdx:0x0 socket:0x1 Bus:0xFE Dev:0x0 Func:0x0 -- ShareIdx:0x1 socket:0x1 Bus:0xFE Dev:0x0 Func:0x0 -- ShareIdx:0x2 socket:0x1 Bus:0xFE Dev:0x0 Func:0x0 -- ShareIdx:0x3 socket:0x1 Bus:0xFE Dev:0x0 Func:0x0 -- BitIndex :0x1A DevCount on this bit :0x4,
ShareIdx:0x0 socket:0x1 Bus:0xFE Dev:0x0 Func:0x0 -- ShareIdx:0x1 socket:0x1 Bus:0xFE Dev:0x0 Func:0x0 -- ShareIdx:0x2 socket:0x1 Bus:0xFE Dev:0x0 Func:0x0 -- ShareIdx:0x3 socket:0x1 Bus:0xFE Dev:0x0 Func:0x0 -- BitIndex :0x1B DevCount on this bit :0x4,
ShareIdx:0x0 socket:0x1 Bus:0xFE Dev:0x0 Func:0x0 -- ShareIdx:0x1 socket:0x1 Bus:0xFE Dev:0x0 Func:0x0 -- ShareIdx:0x2 socket:0x1 Bus:0xFE Dev:0x0 Func:0x0 -- ShareIdx:0x3 socket:0x1 Bus:0xFE Dev:0x0 Func:0x0 -- BitIndex :0x1C DevCount on this bit :0x4,
ShareIdx:0x0 socket:0x1 Bus:0xFE Dev:0x0 Func:0x0 -- ShareIdx:0x1 socket:0x1 Bus:0xFE Dev:0x0 Func:0x0 -- ShareIdx:0x2 socket:0x1 Bus:0xFE Dev:0x0 Func:0x0 -- ShareIdx:0x3 socket:0x1 Bus:0xFE Dev:0x0 Func:0x0 -- BitIndex :0x1D DevCount on this bit :0x4,
ShareIdx:0x0 socket:0x1 Bus:0xFE Dev:0x0 Func:0x0 -- ShareIdx:0x1 socket:0x1 Bus:0xFE Dev:0x0 Func:0x0 -- ShareIdx:0x2 socket:0x1 Bus:0xFE Dev:0x0 Func:0x0 -- ShareIdx:0x3 socket:0x1 Bus:0xFE Dev:0x0 Func:0x0 -- [ProcessorErrorHandler][CrystalRidgeLib] Failed to locate protocol: Not Found
[Mca]Entering InitializeProcessorErrHandler (0x7E82AEB8)
[Mca]Allocate Cpu Error Data structure at 7E7FA018
[Mca][Cap] EmcaGen1Cap=0x1
[Mca][Cap] EmcaGen2Cap=0x1
[Mca][Cap] LmceCap=0x1
[Mca][Setup] SystemErrorEn=0x1
[Mca][Setup] PoisonEn=0x1
[Mca][Setup] ViralEn=0x0
[Mca][Setup] CloakingEn=0x0
[Mca][Setup] FatalErrSpinLoopEn=0x0
[Mca][Setup] EmcaEn=0x1
[Mca][Setup] CsmiEn=0x2
[Mca][Setup] MsmiEn=0x2
[Mca][Setup] LmceEn=0x1
[Mca][Setup] MsmiBankBitFieldEn=0xFFFFFFFF
[Mca][Setup] CsmiBankBitFieldEn=0xFFFFFFFF
[Mca][Setup] EmcaSetFwUpdate=0x0
[Mca][Setup] OscEn=0x0
[Mca][Setup] mMode=0x2
[Mca][Setup] mProcessorRasSetup.UboxErrorMask=0
[Mca][Setup] mProcessorRasSetup.ShutdownSuppression=1
[Mca]Register MCA error handler Success
[Mca]Installing MCE Handler...
[Mca]SmiMcaHandler Address = 7E8322B4
[Mca]Enable MCA reporting
[Mca]EnableEmca2UncorrectableError
[Mca]Enable CSMI Gen2
[Mca]Enable LMCE
[Mca]System Cloaking is disabled.
[RasMisc] ConfigureShutdownSuppression!
PROGRESS CODE: V03070003 I0
PDB = c:\efi\servergen2\intel\Build\EagleStreamRpPkg\DEBUG_VS2015x86\X64\ServerRasPkg\Driver\Smm\Gen2\RasMisc\RasMisc\DEBUG\RASMiscDriver.pdb
PROGRESS CODE: V03070002 I0
[RASMiscDriver][CrystalRidgeLib] Failed to locate protocol: Not Found
[RasMisc] EnableSystemViralAndPoison!
[IIO VIRAL & POISON] Config Socket:0x0
[Config IIO Viral & Poison] Satallite IEH on BitIdx:0x2
[Config IIO Viral & Poison] Satallite IEH on BitIdx:0x3
[Config IIO Viral & Poison Stack] Device on BitIdx:0x2 doesn't exist
[Config IIO Viral & Poison Stack] Device on BitIdx:0x3 doesn't exist
[Config IIO Viral & Poison Stack] Device on BitIdx:0x4 doesn't exist
[Config IIO Viral & Poison Stack] Device on BitIdx:0x5 doesn't exist
[Config IIO Viral & Poison Stack] Device on BitIdx:0x6 doesn't exist
[Config IIO Viral & Poison Stack] Device on BitIdx:0x7 doesn't exist
[Config IIO Viral & Poison Stack] Device on BitIdx:0x8 doesn't exist
[Config IIO Viral & Poison Stack] Device on BitIdx:0x9 doesn't exist
[Config IIO Viral & Poison] Satallite IEH on BitIdx:0x4
[Config IIO Viral & Poison Stack] Device on BitIdx:0x2 doesn't exist
[Config IIO Viral & Poison Stack] Device on BitIdx:0x3 doesn't exist
[Config IIO Viral & Poison Stack] Device on BitIdx:0x4 doesn't exist
[Config IIO Viral & Poison Stack] Device on BitIdx:0x5 doesn't exist
[Config IIO Viral & Poison Stack] Device on BitIdx:0x6 doesn't exist
[Config IIO Viral & Poison Stack] Device on BitIdx:0x7 doesn't exist
[Config IIO Viral & Poison Stack] Device on BitIdx:0x8 doesn't exist
[Config IIO Viral & Poison Stack] Device on BitIdx:0x9 doesn't exist
[Config IIO Viral & Poison] Satallite IEH on BitIdx:0x5
[Config IIO Viral & Poison] Satallite IEH on BitIdx:0x7
[Config IIO Viral & Poison Stack] Device on BitIdx:0x2 doesn't exist
[Config IIO Viral & Poison Stack] Device on BitIdx:0x3 doesn't exist
[Config IIO Viral & Poison Stack] Device on BitIdx:0x4 doesn't exist
[Config IIO Viral & Poison Stack] Device on BitIdx:0x5 doesn't exist
[Config IIO Viral & Poison Stack] Device on BitIdx:0x6 doesn't exist
[Config IIO Viral & Poison Stack] Device on BitIdx:0x7 doesn't exist
[Config IIO Viral & Poison Stack] Device on BitIdx:0x8 doesn't exist
[Config IIO Viral & Poison Stack] Device on BitIdx:0x9 doesn't exist
[Config IIO Viral & Poison] Satallite IEH on BitIdx:0x8
[Config IIO Viral & Poison] Satallite IEH on BitIdx:0x9
[Config IIO Viral & Poison Stack] Device on BitIdx:0x2 doesn't exist
[Config IIO Viral & Poison Stack] Device on BitIdx:0x3 doesn't exist
[Config IIO Viral & Poison Stack] Device on BitIdx:0x4 doesn't exist
[Config IIO Viral & Poison Stack] Device on BitIdx:0x5 doesn't exist
[Config IIO Viral & Poison Stack] Device on BitIdx:0x6 doesn't exist
[Config IIO Viral & Poison Stack] Device on BitIdx:0x7 doesn't exist
[Config IIO Viral & Poison Stack] Device on BitIdx:0x8 doesn't exist
[Config IIO Viral & Poison Stack] Device on BitIdx:0x9 doesn't exist
[Config IIO Viral & Poison] Satallite IEH on BitIdx:0xA
[Config IIO Viral & Poison Stack] Device on BitIdx:0x2 doesn't exist
[Config IIO Viral & Poison Stack] Device on BitIdx:0x3 doesn't exist
[Config IIO Viral & Poison Stack] Device on BitIdx:0x4 doesn't exist
[Config IIO Viral & Poison Stack] Device on BitIdx:0x5 doesn't exist
[Config IIO Viral & Poison Stack] Device on BitIdx:0x6 doesn't exist
[Config IIO Viral & Poison Stack] Device on BitIdx:0x7 doesn't exist
[Config IIO Viral & Poison Stack] Device on BitIdx:0x8 doesn't exist
[Config IIO Viral & Poison Stack] Device on BitIdx:0x9 doesn't exist
[Config IIO Viral & Poison] Satallite IEH on BitIdx:0xB
[Config IIO Viral & Poison] Satallite IEH on BitIdx:0xD
[Config IIO Viral & Poison Stack] Device on BitIdx:0x2 doesn't exist
[Config IIO Viral & Poison Stack] Device on BitIdx:0x3 doesn't exist
[Config IIO Viral & Poison Stack] Device on BitIdx:0x4 doesn't exist
[Config IIO Viral & Poison Stack] Device on BitIdx:0x5 doesn't exist
[Config IIO Viral & Poison Stack] Device on BitIdx:0x6 doesn't exist
[Config IIO Viral & Poison Stack] Device on BitIdx:0x7 doesn't exist
[Config IIO Viral & Poison Stack] Device on BitIdx:0x8 doesn't exist
[Config IIO Viral & Poison Stack] Device on BitIdx:0x9 doesn't exist
[IIO VIRAL & POISON] Config Socket:0x0 End
[IIO VIRAL & POISON] Config Socket:0x1
[Config IIO Viral & Poison] Satallite IEH on BitIdx:0x2
[Config IIO Viral & Poison] Satallite IEH on BitIdx:0x3
[Config IIO Viral & Poison Stack] Device on BitIdx:0x2 doesn't exist
[Config IIO Viral & Poison Stack] Device on BitIdx:0x3 doesn't exist
[Config IIO Viral & Poison Stack] Device on BitIdx:0x4 doesn't exist
[Config IIO Viral & Poison Stack] Device on BitIdx:0x5 doesn't exist
[Config IIO Viral & Poison Stack] Device on BitIdx:0x6 doesn't exist
[Config IIO Viral & Poison Stack] Device on BitIdx:0x7 doesn't exist
[Config IIO Viral & Poison Stack] Device on BitIdx:0x8 doesn't exist
[Config IIO Viral & Poison Stack] Device on BitIdx:0x9 doesn't exist
[Config IIO Viral & Poison Stack] Device on BitIdx:0xA doesn't exist
[Config IIO Viral & Poison] Satallite IEH on BitIdx:0x4
[Config IIO Viral & Poison Stack] Device on BitIdx:0x2 doesn't exist
[Config IIO Viral & Poison Stack] Device on BitIdx:0x3 doesn't exist
[Config IIO Viral & Poison Stack] Device on BitIdx:0x4 doesn't exist
[Config IIO Viral & Poison Stack] Device on BitIdx:0x5 doesn't exist
[Config IIO Viral & Poison Stack] Device on BitIdx:0x6 doesn't exist
[Config IIO Viral & Poison Stack] Device on BitIdx:0x7 doesn't exist
[Config IIO Viral & Poison Stack] Device on BitIdx:0x8 doesn't exist
[Config IIO Viral & Poison Stack] Device on BitIdx:0x9 doesn't exist
[Config IIO Viral & Poison] Satallite IEH on BitIdx:0x5
[Config IIO Viral & Poison] Satallite IEH on BitIdx:0x7
[Config IIO Viral & Poison Stack] Device on BitIdx:0x2 doesn't exist
[Config IIO Viral & Poison Stack] Device on BitIdx:0x3 doesn't exist
[Config IIO Viral & Poison Stack] Device on BitIdx:0x4 doesn't exist
[Config IIO Viral & Poison Stack] Device on BitIdx:0x5 doesn't exist
[Config IIO Viral & Poison Stack] Device on BitIdx:0x6 doesn't exist
[Config IIO Viral & Poison Stack] Device on BitIdx:0x7 doesn't exist
[Config IIO Viral & Poison Stack] Device on BitIdx:0x8 doesn't exist
[Config IIO Viral & Poison Stack] Device on BitIdx:0x9 doesn't exist
[Config IIO Viral & Poison] Satallite IEH on BitIdx:0x8
[Config IIO Viral & Poison] Satallite IEH on BitIdx:0x9
[Config IIO Viral & Poison Stack] Device on BitIdx:0x2 doesn't exist
[Config IIO Viral & Poison Stack] Device on BitIdx:0x3 doesn't exist
[Config IIO Viral & Poison Stack] Device on BitIdx:0x4 doesn't exist
[Config IIO Viral & Poison Stack] Device on BitIdx:0x5 doesn't exist
[Config IIO Viral & Poison Stack] Device on BitIdx:0x6 doesn't exist
[Config IIO Viral & Poison Stack] Device on BitIdx:0x7 doesn't exist
[Config IIO Viral & Poison Stack] Device on BitIdx:0x8 doesn't exist
[Config IIO Viral & Poison Stack] Device on BitIdx:0x9 doesn't exist
[Config IIO Viral & Poison] Satallite IEH on BitIdx:0xA
[Config IIO Viral & Poison Stack] Device on BitIdx:0x2 doesn't exist
[Config IIO Viral & Poison Stack] Device on BitIdx:0x3 doesn't exist
[Config IIO Viral & Poison Stack] Device on BitIdx:0x4 doesn't exist
[Config IIO Viral & Poison Stack] Device on BitIdx:0x5 doesn't exist
[Config IIO Viral & Poison Stack] Device on BitIdx:0x6 doesn't exist
[Config IIO Viral & Poison Stack] Device on BitIdx:0x7 doesn't exist
[Config IIO Viral & Poison Stack] Device on BitIdx:0x8 doesn't exist
[Config IIO Viral & Poison Stack] Device on BitIdx:0x9 doesn't exist
[Config IIO Viral & Poison] Satallite IEH on BitIdx:0xB
[Config IIO Viral & Poison] Satallite IEH on BitIdx:0xD
[Config IIO Viral & Poison Stack] Device on BitIdx:0x2 doesn't exist
[Config IIO Viral & Poison Stack] Device on BitIdx:0x3 doesn't exist
[Config IIO Viral & Poison Stack] Device on BitIdx:0x4 doesn't exist
[Config IIO Viral & Poison Stack] Device on BitIdx:0x5 doesn't exist
[Config IIO Viral & Poison Stack] Device on BitIdx:0x6 doesn't exist
[Config IIO Viral & Poison Stack] Device on BitIdx:0x7 doesn't exist
[Config IIO Viral & Poison Stack] Device on BitIdx:0x8 doesn't exist
[Config IIO Viral & Poison Stack] Device on BitIdx:0x9 doesn't exist
[IIO VIRAL & POISON] Config Socket:0x1 End
PROGRESS CODE: V03070003 I0
PDB = c:\efi\servergen2\intel\Build\EagleStreamRpPkg\DEBUG_VS2015x86\X64\ServerRasPkg\Driver\Smm\CrashLogSmm\CrashLogSmm\DEBUG\CrashLogSmm.pdb
PROGRESS CODE: V03070002 I0
CrashLog Entry Point
Failed to locate CpuCrashLogRecordRegionProtocol !
Failed to locate PchCrashLogRecordRegionProtocol !
CrashLog is not present. Skip BERT creation
Error: SMM image at 0007E7BE000 start failed: Not Ready
PROGRESS CODE: V03070003 I0
PDB = c:\efi\servergen2\intel\Build\EagleStreamRpPkg\DEBUG_VS2015x86\X64\ServerRasPkg\Driver\Smm\WheaErrorInj\WheaErrorInj\DEBUG\WheaErrorInj2.pdb
PROGRESS CODE: V03070002 I0
[WheaErrorInj2][CrystalRidgeLib] Failed to locate protocol: Not Found
WHEA Error Injection is not enabled in Setup
PROGRESS CODE: V03070003 I0
PDB = c:\efi\servergen2\intel\Build\EagleStreamRpPkg\DEBUG_VS2015x86\X64\ServerRasPkg\Driver\Smm\WheaLastBootError\WheaLastBootError\DEBUG\WheaLastBootError.pdb
PROGRESS CODE: V03070002 I0
[WheaLastBootError][CrystalRidgeLib] Failed to locate protocol: Not Found
dump ACPI table
42 45 52 54 30 0 0 0 1 0 49 4E 54 45 4C 20 49
4E 54 45 4C 20 49 44 1 0 0 0 49 4E 54 4C 1
0 0 0 0 80 4 0 18 80 C4 76 0 0 0 0
[WHEAINIT] start to install WHEA ACPI tables
[WHEAINIT] install WHEA ACPI tables status:Success
PROGRESS CODE: V03070003 I0
PDB = c:\efi\servergen2\intel\Build\EagleStreamRpPkg\DEBUG_VS2015x86\X64\ServerRasPkg\Driver\Smm\WheaERST\WheaERST\DEBUG\WheaERST.pdb
PROGRESS CODE: V03070002 I0
dump ACPI table
45 52 53 54 30 2 0 0 1 0 49 4E 54 45 4C 20 49
4E 54 45 4C 20 49 44 1 0 0 0 49 4E 54 4C 1
0 0 0 30 0 0 0 0 0 0 0 10 0 0 0 0
3 0 0 0 40 0 4 18 50 C4 76 0 0 0 0 2
0 0 0 0 0 0 0 FF FF 0 0 0 0 0 0 1
3 0 0 0 40 0 4 18 50 C4 76 0 0 0 0 1
0 0 0 0 0 0 0 FF FF 0 0 0 0 0 0 2
3 0 0 0 40 0 4 18 50 C4 76 0 0 0 0 3
0 0 0 0 0 0 0 FF FF 0 0 0 0 0 0 3
4 1 0 0 40 0 4 18 50 C4 76 0 0 0 0 0
0 0 0 0 0 0 0 FF FF 0 0 0 0 0 0 4
2 0 0 0 40 0 4 30 50 C4 76 0 0 0 0 0
0 0 0 0 0 0 0 FF FF FF FF 0 0 0 0 5
3 0 0 1 8 0 1 B2 0 0 0 0 0 0 0 9C
0 0 0 0 0 0 0 FF FF 0 0 0 0 0 0 6
1 0 0 0 40 0 4 40 50 C4 76 0 0 0 0 1
0 0 0 0 0 0 0 1 0 0 0 0 0 0 0 7
0 0 0 0 40 0 4 38 50 C4 76 0 0 0 0 0
0 0 0 0 0 0 0 FF FF FF FF 0 0 0 0 8
0 0 0 0 40 0 4 70 50 C4 76 0 0 0 0 0
0 0 0 0 0 0 0 FF FF FF FF FF FF FF FF 9
2 0 0 0 40 0 4 20 50 C4 76 0 0 0 0 0
0 0 0 0 0 0 0 FF FF FF FF FF FF FF FF A
0 0 0 0 40 0 4 48 50 C4 76 0 0 0 0 0
0 0 0 0 0 0 0 FF FF FF FF 0 0 0 0 B
3 0 0 0 40 0 4 18 50 C4 76 0 0 0 0 F
0 0 0 0 0 0 0 FF FF 0 0 0 0 0 0 C
0 0 0 0 40 0 4 28 50 C4 76 0 0 0 0 0
0 0 0 0 0 0 0 FF FF FF FF 0 0 0 0 D
0 0 0 0 40 0 4 50 50 C4 76 0 0 0 0 0
0 0 0 0 0 0 0 FF FF FF FF FF FF FF FF E
0 0 0 0 40 0 4 58 50 C4 76 0 0 0 0 0
0 0 0 0 0 0 0 FF FF FF FF FF FF FF FF F
0 0 0 0 40 0 4 60 50 C4 76 0 0 0 0 0
0 0 0 0 0 0 0 FF FF FF FF FF FF FF FF
[WHEAINIT] start to install WHEA ACPI tables
[WHEAINIT] install WHEA ACPI tables status:Success
PROGRESS CODE: V03070003 I0
PDB = c:\efi\servergen2\intel\Build\EagleStreamRpPkg\DEBUG_VS2015x86\X64\ServerRasPkg\Driver\Smm\EnhancedMcaErrorLog\EnhancedMcaErrorLog\DEBUG\EnhancedMcaErrorLog.pdb
PROGRESS CODE: V03070002 I0
InitializEnhancedMcaErrorLogger++
EmcaEn: 1, ElogEn: 1, ElogIgnOptin: 0, ElogCorrErrEn: 1, ElogMemErrEn: 1, ElogProcErrEn: 1
EmcaL1DirAddr = 0x76C24000
InitializEnhancedMcaErrorLogger--, Success
PROGRESS CODE: V03070003 I0
PDB = c:\efi\servergen2\intel\Build\EagleStreamRpPkg\DEBUG_VS2015x86\X64\ServerRasPkg\Driver\Smm\PprVlsErrorLogListener\PprVlsErrorLogListener\DEBUG\PprVlsErrorLogListener.pdb
PROGRESS CODE: V03070002 I0
[PprVlsErrorLogListener][CrystalRidgeLib] Failed to locate protocol: Not Found
PROGRESS CODE: V03070003 I0
PDB = c:\efi\servergen2\intel\Build\EagleStreamRpPkg\DEBUG_VS2015x86\X64\ServerRasPkg\Driver\Smm\McBankErrorInjection\McBankErrorInjection\DEBUG\McBankErrorInjection.pdb
PROGRESS CODE: V03070002 I0
PROGRESS CODE: V03070003 I0
PDB = c:\efi\servergen2\intel\Build\EagleStreamRpPkg\DEBUG_VS2015x86\X64\ServerRasPkg\Driver\Smm\ErrorControl\ErrorControl\DEBUG\ErrorControl.pdb
PROGRESS CODE: V03070002 I0
PROGRESS CODE: V03070003 I0
PDB = c:\efi\servergen2\intel\Build\EagleStreamRpPkg\DEBUG_VS2015x86\X64\ServerSiliconPkg\Cpu\PowerManagement\PpmInitializeDxe\PpmInitializeDxe\DEBUG\PpmInitializeDxe.pdb
PROGRESS CODE: V03040002 I0
DXE PPM Initialization Entry
PROGRESS CODE: V03040003 I0
PDB = c:\efi\servergen2\intel\Build\EagleStreamRpPkg\DEBUG_VS2015x86\X64\ServerSiliconPkg\Universal\Dxe\CrystalRidge\CrystalRidge\DEBUG\CrystalRidge.pdb
PROGRESS CODE: V03040002 I0
No PMems, Crystal Ridge Driver is not going to be loaded.
PROGRESS CODE: V03040003 I0
PDB = c:\efi\servergen2\intel\Build\EagleStreamRpPkg\DEBUG_VS2015x86\X64\ClientOneSiliconPkg\IpBlock\Amt\Sol\Dxe\SerialOverLan\DEBUG\SerialOverLan.pdb
PROGRESS CODE: V03040002 I0
Error: Image at 00068F52000 start failed: Unsupported
PDB = c:\efi\servergen2\intel\Build\EagleStreamRpPkg\DEBUG_VS2015x86\X64\ClientOneSiliconPkg\IpBlock\Amt\Sol\Dxe\SerialOverLan\DEBUG\SerialOverLan.pdb
PROGRESS CODE: V03040003 I0
PDB = c:\efi\servergen2\intel\Build\EagleStreamRpPkg\DEBUG_VS2015x86\X64\ServerPlatformPkg\Features\Me\Client\MePolicyHelper\MePolicyHelper\DEBUG\MePolicyHelper.pdb
PROGRESS CODE: V03040002 I0
PROGRESS CODE: V03040003 I0
PDB = c:\efi\servergen2\intel\Build\EagleStreamRpPkg\DEBUG_VS2015x86\X64\XmlCliFeaturePkg\XmlCliRestricted\Dxe\XmlCliDxe\DEBUG\XmlCliDxe.pdb
PROGRESS CODE: V03040002 I0
PROGRESS CODE: V03040003 I0
PDB = d:\dde\63d22spr\intel\Build\EagleStreamRpPkg\DEBUG_VS2015x86\X64\ServerSecurityPkg\Pfr\Restricted\DebugTool\IShellCommand\IShellCommands\DEBUG\IShellCommands.pdb
PROGRESS CODE: V03040002 I0
PROGRESS CODE: V03040003 I0
PDB = c:\efi\servergen2\intel\Build\EagleStreamRpPkg\DEBUG_VS2015x86\X64\ServerPlatformPkg\Universal\PiPilotIII\PiPilotIIIDxe\DEBUG\PiPilotIIIDxe.pdb
PROGRESS CODE: V03040002 I0
PROGRESS CODE: V03040003 I0
PDB = c:\efi\servergen2\intel\Build\EagleStreamRpPkg\DEBUG_VS2015x86\X64\ServerPlatformPkg\Universal\PiAst2500\PiAst2500Dxe\DEBUG\PiAst2500Dxe.pdb
PROGRESS CODE: V03040002 I0
PROGRESS CODE: V03040003 I0
PDB = c:\efi\servergen2\intel\Build\EagleStreamRpPkg\DEBUG_VS2015x86\X64\FatPkg\EnhancedFatDxe\Fat\DEBUG\Fat.pdb
PROGRESS CODE: V03040002 I0
PROGRESS CODE: V03040003 I0
PDB = c:\efi\servergen2\intel\Build\EagleStreamRpPkg\DEBUG_VS2015x86\X64\ServerPlatformPkg\Platform\IsaHostController\IsaHostControllerDxe\DEBUG\IsaHostControllerDxe.pdb
PROGRESS CODE: V03040002 I0
PROGRESS CODE: V03040003 I0
PDB = c:\efi\servergen2\intel\Build\EagleStreamRpPkg\DEBUG_VS2015x86\X64\ServerPlatformPkg\Features\Sata\SataController\SataController\DEBUG\SataController.pdb
PROGRESS CODE: V03040002 I0
PROGRESS CODE: V03040003 I0
PDB = c:\efi\servergen2\intel\Build\EagleStreamRpPkg\DEBUG_VS2015x86\X64\MdeModulePkg\Bus\Pci\PciBusDxe\PciBusDxe\DEBUG\PciBusDxe.pdb
PROGRESS CODE: V03040002 I0
PROGRESS CODE: V03040003 I0
PDB = c:\efi\servergen2\intel\Build\EagleStreamRpPkg\DEBUG_VS2015x86\X64\ServerPlatformPkg\Features\Acpi\Dxe\AcpiPlatform\AcpiPlatformSpr\DEBUG\AcpiPlatform.pdb
PROGRESS CODE: V03040002 I0
PROGRESS CODE: V03048503 I0
Locate mFruRedirProtocol failed Not Found
ACPI MCFG table @ address 0x68F59398
Multi-Seg Support = 0
Number of Segments (sockets): 1
Table Length = 0x3C
Segment[ 0].BaseAddress = 80000000
Segment[ 0].PciSegmentGroupNumber = 0
Segment[ 0].StartBusNumber = 0
Segment[ 0].EndBusNumber = FF
Xhci TableHeader->OemTableId = 6E5F6878
[ACPI](KEYP) Not found any PCIe/CXL/NTB port
ExternSbExpected: 1787424408, ExternSbFound: 1787260952
ExternSbExpected: 0, ExternSbFound: 1993134098
PROGRESS CODE: V03040003 I0
PDB = c:\efi\servergen2\intel\Build\EagleStreamRpPkg\DEBUG_VS2015x86\X64\ServerPlatformPkg\Features\Acpi\Dxe\AcpiVtd\AcpiVTD\DEBUG\AcpiVTD.pdb
PROGRESS CODE: V03040002 I0
PROGRESS CODE: V03040003 I0
PDB = c:\efi\servergen2\intel\Build\EagleStreamRpPkg\DEBUG_VS2015x86\X64\OvmfPkg\QemuVideoDxe\QemuVideoDxe\DEBUG\QemuVideoDxe.pdb
PROGRESS CODE: V03040002 I0
PROGRESS CODE: V03040003 I0
PDB = c:\efi\servergen2\intel\Build\EagleStreamRpPkg\DEBUG_VS2015x86\X64\MdeModulePkg\Bus\Pci\XhciDxe\XhciDxe\DEBUG\XhciDxe.pdb
PROGRESS CODE: V03040002 I0
PROGRESS CODE: V03040003 I0
PDB = c:\efi\servergen2\intel\Build\EagleStreamRpPkg\DEBUG_VS2015x86\X64\MdeModulePkg\Bus\Pci\EhciDxe\EhciDxe\DEBUG\EhciDxe.pdb
PROGRESS CODE: V03040002 I0
PROGRESS CODE: V03040003 I0
PDB = c:\efi\servergen2\intel\Build\EagleStreamRpPkg\DEBUG_VS2015x86\X64\MdeModulePkg\Bus\Usb\UsbKbDxe\UsbKbDxe\DEBUG\UsbKbDxe.pdb
PROGRESS CODE: V03040002 I0
PROGRESS CODE: V03040003 I0
PDB = c:\efi\servergen2\intel\Build\EagleStreamRpPkg\DEBUG_VS2015x86\X64\MdeModulePkg\Bus\Usb\UsbMassStorageDxe\UsbMassStorageDxe\DEBUG\UsbMassStorageDxe.pdb
PROGRESS CODE: V03040002 I0
PROGRESS CODE: V03040003 I0
PDB = c:\efi\servergen2\intel\Build\EagleStreamRpPkg\DEBUG_VS2015x86\X64\MdeModulePkg\Bus\Usb\UsbMouseDxe\UsbMouseDxe\DEBUG\UsbMouseDxe.pdb
PROGRESS CODE: V03040002 I0
PROGRESS CODE: V03040003 I0
PDB = c:\efi\servergen2\intel\Build\EagleStreamRpPkg\DEBUG_VS2015x86\X64\MdeModulePkg\Bus\Pci\UhciDxe\UhciDxe\DEBUG\UhciDxe.pdb
PROGRESS CODE: V03040002 I0
PROGRESS CODE: V03040003 I0
PDB = c:\efi\servergen2\intel\Build\EagleStreamRpPkg\DEBUG_VS2015x86\X64\MdeModulePkg\Bus\Usb\UsbBusDxe\UsbBusDxe\DEBUG\UsbBusDxe.pdb
PROGRESS CODE: V03040002 I0
PROGRESS CODE: V03040003 I0
PDB = c:\efi\servergen2\intel\Build\EagleStreamRpPkg\DEBUG_VS2015x86\X64\MdeModulePkg\Bus\Pci\EhciDxe\EhciDxe\DEBUG\EhciDxe.pdb
PROGRESS CODE: V03040002 I0
PROGRESS CODE: V03040003 I0
PDB = c:\efi\servergen2\intel\Build\EagleStreamRpPkg\DEBUG_VS2015x86\X64\MdeModulePkg\Bus\Usb\UsbKbDxe\UsbKbDxe\DEBUG\UsbKbDxe.pdb
PROGRESS CODE: V03040002 I0
PROGRESS CODE: V03040003 I0
PDB = c:\efi\servergen2\intel\Build\EagleStreamRpPkg\DEBUG_VS2015x86\X64\MdeModulePkg\Bus\Usb\UsbMassStorageDxe\UsbMassStorageDxe\DEBUG\UsbMassStorageDxe.pdb
PROGRESS CODE: V03040002 I0
PROGRESS CODE: V03040003 I0
PDB = c:\efi\servergen2\intel\Build\EagleStreamRpPkg\DEBUG_VS2015x86\X64\MdeModulePkg\Bus\Usb\UsbMouseDxe\UsbMouseDxe\DEBUG\UsbMouseDxe.pdb
PROGRESS CODE: V03040002 I0
PROGRESS CODE: V03040003 I0
PDB = c:\efi\servergen2\intel\Build\EagleStreamRpPkg\DEBUG_VS2015x86\X64\MdeModulePkg\Bus\Pci\UhciDxe\UhciDxe\DEBUG\UhciDxe.pdb
PROGRESS CODE: V03040002 I0
PROGRESS CODE: V03040003 I0
PDB = c:\efi\servergen2\intel\Build\EagleStreamRpPkg\DEBUG_VS2015x86\X64\MdeModulePkg\Bus\Usb\UsbBusDxe\UsbBusDxe\DEBUG\UsbBusDxe.pdb
PROGRESS CODE: V03040002 I0
PROGRESS CODE: V03040003 I0
PDB = c:\efi\servergen2\intel\Build\EagleStreamRpPkg\DEBUG_VS2015x86\X64\MdeModulePkg\Bus\Scsi\ScsiBusDxe\ScsiBusDxe\DEBUG\ScsiBus.pdb
PROGRESS CODE: V03040002 I0
PROGRESS CODE: V03040003 I0
PDB = c:\efi\servergen2\intel\Build\EagleStreamRpPkg\DEBUG_VS2015x86\X64\MdeModulePkg\Bus\Scsi\ScsiDiskDxe\ScsiDiskDxe\DEBUG\ScsiDisk.pdb
PROGRESS CODE: V03040002 I0
PROGRESS CODE: V03040003 I0
PDB = c:\efi\servergen2\intel\Build\EagleStreamRpPkg\DEBUG_VS2015x86\X64\MdeModulePkg\Bus\Pci\NvmExpressDxe\NvmExpressDxe\DEBUG\NvmExpressDxe.pdb
PROGRESS CODE: V03040002 I0
PROGRESS CODE: V03040003 I0
PDB = c:\efi\servergen2\intel\Build\EagleStreamRpPkg\DEBUG_VS2015x86\X64\MdeModulePkg\Universal\Disk\UnicodeCollation\EnglishDxe\EnglishDxe\DEBUG\EnglishDxe.pdb
PROGRESS CODE: V03040002 I0
PROGRESS CODE: V03040003 I0
PDB = c:\efi\servergen2\intel\Build\EagleStreamRpPkg\DEBUG_VS2015x86\X64\MdeModulePkg\Universal\Console\ConPlatformDxe\ConPlatformDxe\DEBUG\ConPlatformDxe.pdb
PROGRESS CODE: V03040002 I0
PROGRESS CODE: V03040003 I0
PDB = c:\efi\servergen2\intel\Build\EagleStreamRpPkg\DEBUG_VS2015x86\X64\MdeModulePkg\Universal\Console\ConSplitterDxe\ConSplitterDxe\DEBUG\ConSplitterDxe.pdb
PROGRESS CODE: V03040002 I0
PROGRESS CODE: V03040003 I0
PDB = c:\efi\servergen2\intel\Build\EagleStreamRpPkg\DEBUG_VS2015x86\X64\MdeModulePkg\Universal\Console\GraphicsConsoleDxe\GraphicsConsoleDxe\DEBUG\GraphicsConsoleDxe.pdb
PROGRESS CODE: V03040002 I0
PROGRESS CODE: V03040003 I0
PDB = c:\efi\servergen2\intel\Build\EagleStreamRpPkg\DEBUG_VS2015x86\X64\MdeModulePkg\Universal\Console\TerminalDxe\TerminalDxe\DEBUG\TerminalDxe.pdb
PROGRESS CODE: V03040002 I0
PROGRESS CODE: V03040003 I0
PDB = c:\efi\servergen2\intel\Build\EagleStreamRpPkg\DEBUG_VS2015x86\X64\MdeModulePkg\Universal\Disk\DiskIoDxe\DiskIoDxe\DEBUG\DiskIoDxe.pdb
PROGRESS CODE: V03040002 I0
PROGRESS CODE: V03040003 I0
PDB = c:\efi\servergen2\intel\Build\EagleStreamRpPkg\DEBUG_VS2015x86\X64\MdeModulePkg\Universal\Disk\PartitionDxe\PartitionDxe\DEBUG\PartitionDxe.pdb
PROGRESS CODE: V03040002 I0
PROGRESS CODE: V03040003 I0
PDB = c:\efi\servergen2\intel\Build\EagleStreamRpPkg\DEBUG_VS2015x86\X64\MdeModulePkg\Bus\Isa\IsaBusDxe\IsaBusDxe\DEBUG\IsaBusDxe.pdb
PROGRESS CODE: V03040002 I0
PROGRESS CODE: V03040003 I0
PDB = c:\efi\servergen2\intel\Build\EagleStreamRpPkg\DEBUG_VS2015x86\X64\MdeModulePkg\Bus\Pci\PciSioSerialDxe\PciSioSerialDxe\DEBUG\PciSioSerialDxe.pdb
PROGRESS CODE: V03040002 I0
PROGRESS CODE: V03040003 I0
PDB = c:\efi\servergen2\intel\Build\EagleStreamRpPkg\DEBUG_VS2015x86\X64\MdeModulePkg\Bus\Isa\Ps2KeyboardDxe\Ps2KeyboardDxe\DEBUG\Ps2KeyboardDxe.pdb
PROGRESS CODE: V03040002 I0
PROGRESS CODE: V03040003 I0
PDB = c:\efi\servergen2\intel\Build\EagleStreamRpPkg\DEBUG_VS2015x86\X64\MdeModulePkg\Bus\Isa\Ps2MouseDxe\Ps2MouseDxe\DEBUG\Ps2MouseDxe.pdb
PROGRESS CODE: V03040002 I0
PROGRESS CODE: V03040003 I0
PDB = c:\efi\servergen2\intel\Build\EagleStreamRpPkg\DEBUG_VS2015x86\X64\MdeModulePkg\Bus\Ata\AtaBusDxe\AtaBusDxe\DEBUG\AtaBusDxe.pdb
PROGRESS CODE: V03040002 I0
PROGRESS CODE: V03040003 I0
PDB = c:\efi\servergen2\intel\Build\EagleStreamRpPkg\DEBUG_VS2015x86\X64\MdeModulePkg\Bus\Ata\AtaAtapiPassThru\AtaAtapiPassThru\DEBUG\AtaAtapiPassThruDxe.pdb
PROGRESS CODE: V03040002 I0
PROGRESS CODE: V03040003 I0
PDB = c:\efi\servergen2\intel\Build\EagleStreamRpPkg\DEBUG_VS2015x86\X64\NetworkPkg\SnpDxe\SnpDxe\DEBUG\SnpDxe.pdb
PROGRESS CODE: V03040002 I0
PROGRESS CODE: V03040003 I0
PDB = c:\efi\servergen2\intel\Build\EagleStreamRpPkg\DEBUG_VS2015x86\X64\NetworkPkg\VlanConfigDxe\VlanConfigDxe\DEBUG\VlanConfigDxe.pdb
PROGRESS CODE: V03040002 I0
PROGRESS CODE: V03040003 I0
PDB = c:\efi\servergen2\intel\Build\EagleStreamRpPkg\DEBUG_VS2015x86\X64\NetworkPkg\MnpDxe\MnpDxe\DEBUG\MnpDxe.pdb
PROGRESS CODE: V03040002 I0
PROGRESS CODE: V03040003 I0
PDB = c:\efi\servergen2\intel\Build\EagleStreamRpPkg\DEBUG_VS2015x86\X64\NetworkPkg\ArpDxe\ArpDxe\DEBUG\ArpDxe.pdb
PROGRESS CODE: V03040002 I0
PROGRESS CODE: V03040003 I0
PDB = c:\efi\servergen2\intel\Build\EagleStreamRpPkg\DEBUG_VS2015x86\X64\NetworkPkg\Dhcp4Dxe\Dhcp4Dxe\DEBUG\Dhcp4Dxe.pdb
PROGRESS CODE: V03040002 I0
PROGRESS CODE: V03040003 I0
PDB = c:\efi\servergen2\intel\Build\EagleStreamRpPkg\DEBUG_VS2015x86\X64\NetworkPkg\Ip4Dxe\Ip4Dxe\DEBUG\Ip4Dxe.pdb
PROGRESS CODE: V03040002 I0
PROGRESS CODE: V03040003 I0
PDB = c:\efi\servergen2\intel\Build\EagleStreamRpPkg\DEBUG_VS2015x86\X64\NetworkPkg\Udp4Dxe\Udp4Dxe\DEBUG\Udp4Dxe.pdb
PROGRESS CODE: V03040002 I0
PROGRESS CODE: V03040003 I0
PDB = c:\efi\servergen2\intel\Build\EagleStreamRpPkg\DEBUG_VS2015x86\X64\NetworkPkg\Mtftp4Dxe\Mtftp4Dxe\DEBUG\Mtftp4Dxe.pdb
PROGRESS CODE: V03040002 I0
PROGRESS CODE: V03040003 I0
PDB = c:\efi\servergen2\intel\Build\EagleStreamRpPkg\DEBUG_VS2015x86\X64\NetworkPkg\Dhcp6Dxe\Dhcp6Dxe\DEBUG\Dhcp6Dxe.pdb
PROGRESS CODE: V03040002 I0
PROGRESS CODE: V03040003 I0
PDB = c:\efi\servergen2\intel\Build\EagleStreamRpPkg\DEBUG_VS2015x86\X64\NetworkPkg\Ip6Dxe\Ip6Dxe\DEBUG\Ip6Dxe.pdb
PROGRESS CODE: V03040002 I0
PROGRESS CODE: V03040003 I0
PDB = c:\efi\servergen2\intel\Build\EagleStreamRpPkg\DEBUG_VS2015x86\X64\NetworkPkg\Udp6Dxe\Udp6Dxe\DEBUG\Udp6Dxe.pdb
PROGRESS CODE: V03040002 I0
PROGRESS CODE: V03040003 I0
PDB = c:\efi\servergen2\intel\Build\EagleStreamRpPkg\DEBUG_VS2015x86\X64\NetworkPkg\Mtftp6Dxe\Mtftp6Dxe\DEBUG\Mtftp6Dxe.pdb
PROGRESS CODE: V03040002 I0
PROGRESS CODE: V03040003 I0
PDB = c:\efi\servergen2\intel\Build\EagleStreamRpPkg\DEBUG_VS2015x86\X64\NetworkPkg\TcpDxe\TcpDxe\DEBUG\TcpDxe.pdb
PROGRESS CODE: V03040002 I0
PROGRESS CODE: V03040003 I0
PDB = c:\efi\servergen2\intel\Build\EagleStreamRpPkg\DEBUG_VS2015x86\X64\NetworkPkg\UefiPxeBcDxe\UefiPxeBcDxe\DEBUG\UefiPxeBcDxe.pdb
PROGRESS CODE: V03040002 I0
PROGRESS CODE: V03040003 I0
PDB = c:\efi\servergen2\intel\Build\EagleStreamRpPkg\DEBUG_VS2015x86\X64\NetworkPkg\TlsDxe\TlsDxe\DEBUG\TlsDxe.pdb
PROGRESS CODE: V03040002 I0
PROGRESS CODE: V03040003 I0
PDB = c:\efi\servergen2\intel\Build\EagleStreamRpPkg\DEBUG_VS2015x86\X64\NetworkPkg\DnsDxe\DnsDxe\DEBUG\DnsDxe.pdb
PROGRESS CODE: V03040002 I0
PROGRESS CODE: V03040003 I0
PDB = c:\efi\servergen2\intel\Build\EagleStreamRpPkg\DEBUG_VS2015x86\X64\NetworkPkg\HttpDxe\HttpDxe\DEBUG\HttpDxe.pdb
PROGRESS CODE: V03040002 I0
PROGRESS CODE: V03040003 I0
PDB = c:\efi\servergen2\intel\Build\EagleStreamRpPkg\DEBUG_VS2015x86\X64\NetworkPkg\HttpBootDxe\HttpBootDxe\DEBUG\HttpBootDxe.pdb
PROGRESS CODE: V03040002 I0
PROGRESS CODE: V03040003 I0
PROGRESS CODE: V03040002 I0
PROGRESS CODE: V03040003 I0
PROGRESS CODE: V03040002 I0
PROGRESS CODE: V03040003 I0
PROGRESS CODE: V03040002 I0
PROGRESS CODE: V03040003 I0
PROGRESS CODE: V03040002 I0
PROGRESS CODE: V03040003 I0
PDB = d:\qba1\workspace\39189\vmd_uefi\Build\MdeModule\DEBUG_VS2012x86\X64\MdeModulePkg\Bus\Pci\VmdDxe\VmdDxe\DEBUG\VmdDxe.pdb
PROGRESS CODE: V03040002 I0
PROGRESS CODE: V03040003 I0
PROGRESS CODE: V03040002 I0
PROGRESS CODE: V03040003 I0
PDB = c:\efi\servergen2\intel\Build\EagleStreamRpPkg\DEBUG_VS2015x86\X64\XmlCliFeaturePkg\XmlCliRestricted\Smm\XmlCliSmm\DEBUG\XmlCliSmm.pdb
PROGRESS CODE: V03070002 I0
PROGRESS CODE: V03070003 I0
PDB = c:\efi\servergen2\intel\Build\EagleStreamRpPkg\DEBUG_VS2015x86\X64\ServerPlatformPkg\Features\Acpi\DxeSmm\AcpiSmm\AcpiSmmPlatform\DEBUG\AcpiSmmPlatform.pdb
PROGRESS CODE: V03070002 I0
PROGRESS CODE: V03070003 I0
PDB = c:\efi\servergen2\intel\Build\EagleStreamRpPkg\DEBUG_VS2015x86\X64\ServerPlatformPkg\Restricted\SMIFlashSigned\SMIFlashSigned\DEBUG\SmiFlashSigned.pdb
PROGRESS CODE: V03070002 I0
PROGRESS CODE: V03070003 I0
PDB = c:\efi\servergen2\intel\Build\EagleStreamRpPkg\DEBUG_VS2015x86\X64\ServerRasPkg\Driver\Smm\Gen2\IioErrorHandler\IioErrorHandler\DEBUG\IioErrorHandler.pdb
PROGRESS CODE: V03070002 I0
MailBox->IioInitPar.CxlMefnEn = 0x0
PROGRESS CODE: V03070003 I0
PDB = c:\efi\servergen2\intel\Build\EagleStreamRpPkg\DEBUG_VS2015x86\X64\ServerRasPkg\Driver\Smm\WheaErrorLogListener\WheaErrorLogListener\DEBUG\WheaErrorLogListener.pdb
PROGRESS CODE: V03070002 I0
[HEST] Current source counter:1 table length:68 buffer address:76BEF018
[HEST] Current source counter:2 table length:A8 buffer address:76BEA018
[HEST] Current source counter:3 table length:D8 buffer address:0
[HEST] Current source counter:4 table length:104 buffer address:0
[HEST] Current source counter:5 table length:13C buffer address:0
dump ACPI table
48 45 53 54 3C 1 0 0 1 0 49 4E 54 45 4C 20 49
4E 54 45 4C 20 49 44 1 0 0 0 49 4E 54 4C 1
0 0 0 5 0 0 0 9 0 0 0 FF FF 0 1 1
0 0 0 F 0 0 0 F8 1F 0 0 0 40 0 4 18
F0 BE 76 0 0 0 0 3 1C 0 0 0 0 0 0 0
0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0
0 0 0 0 20 0 0 9 0 1 0 FF FF 0 1 1
0 0 0 1 0 0 0 F8 1F 0 0 0 40 0 4 18
A0 BE 76 0 0 0 0 4 1C 0 0 0 0 0 0 0
0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0
0 0 0 0 20 0 0 6 0 2 0 0 0 3 0 1
0 0 0 1 0 0 0 0 0 0 0 0 0 0 0 0
0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0
0 0 0 0 0 0 0 7 0 3 0 0 0 3 0 1
0 0 0 1 0 0 0 0 0 0 0 0 0 0 0 0
0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0
0 0 0 8 0 4 0 0 0 3 0 1 0 0 0 1
0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0
0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0
0 0 0 0 0 0 0 0 0 0 0
[WHEAINIT] start to install WHEA ACPI tables
[WHEAINIT] install WHEA ACPI tables status:Success
PROGRESS CODE: V03070003 I0
PDB = c:\efi\servergen2\intel\Build\EagleStreamRpPkg\DEBUG_VS2015x86\X64\ServerSecurityPkg\Mktme\MktmeLateInit\MktmeLateInit\DEBUG\MktmeLateInit.pdb
PROGRESS CODE: V03040002 I0
PROGRESS CODE: V03040003 I0
PDB = c:\efi\servergen2\intel\Build\EagleStreamRpPkg\DEBUG_VS2015x86\X64\ServerSecurityPkg\Sgx\SgxLateInit\Spr\SgxLateInit\DEBUG\SgxLateInitSPR.pdb
PROGRESS CODE: V03040002 I0
[SGX] SgxLateInitEntryPoint entry
SgxMpServicesData()
Thread 0 is BSP of Socket 0
Thread 80 is BSP of Socket 1
System BSP Thread = 000
System BSP Package = 000
[SGX] GetActmManifestHobArray BEGIN
Found ActmDimmManifestHob[0] = 0x70CA9788!
Found ActmDimmManifestHob[1] = 0x70CA9908!
[SGX] GetActmManifestHobArray END (Success)
[SGX] UpdateSocketSetupOptions Start
[SGX] UpdateSocketSetupOptions exit: Success
TDX: GuidHob pointer is NULL
GetVariableHelper - SgxRegistrationConfiguration not found in NVRAM, continue
GetVariableHelper - SgxUefiRegistrationConfiguration not found in NVRAM, continue
[SGX] Create RegistrationConfiguration from defaults.
SetRegistrationServerAddress: SgxRegistrationConfig->SgxRegServerInfo.Url = https://sbx.api.trustedservices.intel.com:443
[SGX] Update UpdateRegistrationConfigFlags
GetVariableHelper - SgxPlatformManifest not found in NVRAM, continue
GetVariableHelper - SgxUefiRegistrationServerRequest not found in NVRAM, continue
[SGX-DEBUG]: Get SgxRegistrationStatus
GetVariableHelper - SgxRegistrationStatus not found in NVRAM, continue
[SGX-DEBUG]: Get SgxUefiRegistrationStatus
GetVariableHelper - SgxUefiRegistrationStatus not found in NVRAM, continue
Warning: SGX is disabled on this system
[SGX] SgxDisabled_SgxLateInit: Success
[SGX] SgxErrorCode = 0x0
[SGX] PreviousStateVariablesSaving BEGIN
GetVariableHelper - SgxRegistrationServerResponse not found in NVRAM, continue
[SGX] SgxLateInit exit: Success
PROGRESS CODE: V03040003 I0
PDB = c:\efi\servergen2\intel\Build\EagleStreamRpPkg\DEBUG_VS2015x86\X64\ServerPlatformPkg\Platform\Dxe\S3NvramSave\S3NvramSave\DEBUG\S3NvramSave.pdb
PROGRESS CODE: V03040002 I0
Save data to NVRAM for socket_0_nvram_data / socket_0_nvram_data - = Saved
Save data to NVRAM for socket_1_nvram_data / socket_1_nvram_data - = Saved
Save data to NVRAM for socket_2_nvram_data / socket_2_nvram_data - = HOB not found or not populated
Save data to NVRAM for socket_3_nvram_data / socket_3_nvram_data - = HOB not found or not populatedPROGRESS CODE: V03040003 I0
PDB = c:\efi\servergen2\intel\Build\EagleStreamRpPkg\DEBUG_VS2015x86\X64\ServerPlatformPkg\Platform\Dxe\UncoreMiscDxe\UncoreMiscDxe\DEBUG\UncoreMiscDxe.pdb
PROGRESS CODE: V03040002 I0
PROGRESS CODE: V03040003 I0
PDB = c:\efi\servergen2\intel\Build\EagleStreamRpPkg\DEBUG_VS2015x86\X64\ServerPlatformPkg\Platform\Dxe\ReserveMemory\ReserveMem\DEBUG\ReserveMem.pdb
PROGRESS CODE: V03040002 I0
PROGRESS CODE: V03040003 I0
PDB = c:\efi\servergen2\intel\Build\EagleStreamRpPkg\DEBUG_VS2015x86\X64\ServerSecurityPkg\Universal\GetSec\Dxe\TxtDxe\DEBUG\TxtDxe.pdb
PROGRESS CODE: V03040002 I0
TXT is disabled
[TXT] DriverEntry: Exit
PROGRESS CODE: V03040003 I0
PDB = c:\efi\servergen2\intel\Build\EagleStreamRpPkg\DEBUG_VS2015x86\X64\UserAuthFeaturePkg\UserAuthenticationDxeSmm\UserAuthenticationDxe\DEBUG\UserAuthenticationDxe.pdb
PROGRESS CODE: V03040002 I0
PROGRESS CODE: V03040003 I0
PDB = c:\efi\servergen2\intel\Build\EagleStreamRpPkg\DEBUG_VS2015x86\X64\EagleStreamRpPkg\Platform\Dxe\Setup\DxePlatform\DEBUG\Platform.pdb
PROGRESS CODE: V03040002 I0
Is CMOS Bad = 1
[HECI Transport-1 DXE] Send pkt: 80040007
00: FF 02 00 00
[HECI Transport-1 DXE] Got pkt: 80140007
00: FF 82 00 00 00 00 06 18 - 00 01 03 00 00 00 06 18
10: 00 01 03 00
[HECI Transport-1 DXE] Send pkt: 80140008
00: 00 00 05 00 1F 00 00 00 - 00 00 00 00 00 00 00 00
10: 00 00 00 00
[HECI Transport-1 DXE] Got pkt: 805E0008
00: 00 00 05 00 1F 00 00 00 - 00 00 00 00 4A 00 00 00
10: 00 00 00 00 18 18 06 00 - 00 06 00 01 06 00 02 06
20: 00 03 56 00 04 56 00 05 - 56 00 06 56 00 07 5C 00
30: 08 7C 00 09 55 00 0A 55 - 00 0B 5B 00 0C 55 00 0D
40: 51 00 0E 51 00 0F 47 00 - 10 07 00 11 47 00 12 07
50: 00 13 47 00 14 07 00 15 - 47 00 16 07 00 17
PROGRESS CODE: V03040003 I0
PDB = c:\efi\servergen2\intel\Build\EagleStreamRpPkg\DEBUG_VS2015x86\X64\ServerPlatformPkg\Platform\Dxe\SocketSetup\SocketSetup\DEBUG\SocketSetup.pdb
PROGRESS CODE: V03040002 I0
PROGRESS CODE: V03040003 I0
PROGRESS CODE: V03041001 I0
PROGRESS CODE: V03051005 I0
PROGRESS CODE: V02010000 I0
PROGRESS CODE: V02011000 I0
PROGRESS CODE: V02011000 I0
PROGRESS CODE: V02011000 I0
PROGRESS CODE: V02011000 I0
PROGRESS CODE: V02011000 I0
PROGRESS CODE: V02011000 I0
PROGRESS CODE: V02011000 I0
PROGRESS CODE: V02011000 I0
PROGRESS CODE: V02011000 I0
PROGRESS CODE: V02011000 I0
PROGRESS CODE: V02011000 I0
PROGRESS CODE: V02011000 I0
PROGRESS CODE: V02011000 I0
PROGRESS CODE: V02011000 I0
PROGRESS CODE: V02011000 I0
PROGRESS CODE: V02011000 I0
PROGRESS CODE: V02011000 I0
PROGRESS CODE: V02011000 I0
PROGRESS CODE: V02011000 I0
PROGRESS CODE: V02011000 I0
PROGRESS CODE: V02011000 I0
PROGRESS CODE: V02011000 I0
PROGRESS CODE: V02011000 I0
PROGRESS CODE: V02011000 I0
PROGRESS CODE: V02011000 I0
PROGRESS CODE: V02011000 I0
PROGRESS CODE: V02011000 I0
PROGRESS CODE: V02011000 I0
PROGRESS CODE: V02011000 I0
PROGRESS CODE: V02011000 I0
PROGRESS CODE: V02011000 I0
PROGRESS CODE: V02011000 I0
PROGRESS CODE: V02011000 I0
PROGRESS CODE: V02011000 I0
PROGRESS CODE: V02011000 I0
PROGRESS CODE: V02011000 I0
PROGRESS CODE: V02011000 I0
PROGRESS CODE: V02011000 I0
PROGRESS CODE: V02011000 I0
PROGRESS CODE: V02011000 I0
PROGRESS CODE: V02011001 I0
Calling IoatInitBootEvent IioIndex: 0
IOAT_INIT_BOOT_EVENT_START
DSA init IioIndex : 0 InstId : 0
IAX init IioIndex : 0 InstId : 0
DSA init IioIndex : 0 InstId : 1
IAX init IioIndex : 0 InstId : 1
DSA init IioIndex : 0 InstId : 2
IAX init IioIndex : 0 InstId : 2
DSA init IioIndex : 0 InstId : 3
IAX init IioIndex : 0 InstId : 3
IOAT_INIT_BOOT_EVENT_END
Calling IioDisableLinkPorts IioIndex: 0
[0] Hide devices; Phase = B
Calling IoatInitBootEvent IioIndex: 1
IOAT_INIT_BOOT_EVENT_START
DSA init IioIndex : 1 InstId : 0
IAX init IioIndex : 1 InstId : 0
DSA init IioIndex : 1 InstId : 1
IAX init IioIndex : 1 InstId : 1
DSA init IioIndex : 1 InstId : 2
IAX init IioIndex : 1 InstId : 2
DSA init IioIndex : 1 InstId : 3
IAX init IioIndex : 1 InstId : 3
IOAT_INIT_BOOT_EVENT_END
Calling IioDisableLinkPorts IioIndex: 1
[1] Hide devices; Phase = B
PROGRESS CODE: V02010004 I0
PROGRESS CODE: V02010004 I0
PROGRESS CODE: V02010004 I0
[OOBMSM] BMC: Expected VID_DID = 0x11501A03
[OOBMSM] BMC: Bus[0x2]:Dev[0x0]:Fun[0x0]
[OOBMSM] PCH-PMT: Bus[0x0]:Dev[0x14]:Fun[0x6]
[GPIO Conflict Check] Identified conflict on pad GPIO_GPP_B12 (actual: 0x3, expected: 0x9)
[GPIO Conflict Check] Identified conflict on pad GPIO_GPP_B13 (actual: 0x3, expected: 0x9)
[GPIO Conflict Check] Identified conflict on pad GPIO_GPP_B14 (actual: 0x3, expected: 0x9)
[GPIO Conflict Check] Identified conflict on pad GPIO_GPP_B15 (actual: 0x3, expected: 0x9)
[OtaDxe.c] OtaEventHandler() {
[OOB] ExecuteOobOneTouchRequest() {
[LT EXISTS register at 0xFED30010]: 0x0000000000000000
TXT Supported Bitmap 0x0000
TXT Enabled Bitmap 0x0000
[LT EMIF register at 0xFED30200]: 0x1D003000, Bit28:27 = 0x03, Bit24:22 = 0x04
[LT FTIF register at 0xFED30800]: 0x0000000000052000, Bit18:16 = 0x05
TPM Supported Bitmap 0x0002
TPM2.0 PS NV Index 0x01C10103: Not Defined, Not Written, Not Write-Protected
TPM2.0 AUX NV Index 0x01C10102: Not Defined, Not Written, Not Write-Protected
TPM2.0 PO NV Index 0x01C10106: Not Defined, Not Written, Not Write-Protected
TPM2.0 Provisioned? No
TPM2.0 Ownership Claimed? No
TPM Enabled Bitmap 0x0002, TPM Usage Bitmap 0x0004
[IA32_TME_CAPABILITY MSR 981h] = 0x000007F7 80000003
[IA32_TME_ACTIVATE MSR 982h] = 0x00000000 00000001
[IA32_TME_MTRRCAP MSR FEh] = 0x00000000 00007D0A
TME/MK-TME/TDX: Supported Bitmap 0xC000, Enabled Bitmap 0x0000
[IA32_FEATURE_CONTROL MSR 3Ah] = 0x00000000 00100004
SGX Supported Bitmap 0x1000
SGX Enabled Bitmap 0x0000
-> PFR Support Bitmap: 0x0000, PFR Enabled Bitmap: 0x0000
PFR State: 0x0000, Recovery Count: 0x00, Last Recovery Reason 0x00
Panic Event Count: 0x00, Last Panic Reason 0x00
[OOB] ExecuteOobOneTouchRequest() -> Non-Volatile Storage Supported? Yes
ME Non-Volatile Storage: Supported
EFI Non-Volatile Storage: Supported
Maximum size of OOB Non-Volatile Storage: 0x00008400 bytes
[OOB] ExecuteOobOneTouchRequest() -> Allocate Memory for NV Storage Data (Total 0x00021000 bytes): Success
[HECI Transport-1 DXE] Send pkt: 800B0023
00: 00 00 00 00 00 00 00 00 - 00 00 00
[HECI Transport-1 DXE] Got pkt: 80040023
00: 00 80 02 00
[SPS] ERROR: ME Storage Service operation status: 2
[OOB] ExecuteOobOneTouchRequest() -> Use Default Use-Case 0x01 (OOB NV Storage Data Not used)
[OOB] ExecuteOobOneTouchRequest() -> Input OOB Data to process: Size = 0x00000044 bytes
----------------------------------------------------------------------
Offset 00 01 02 03 04 05 06 07 08 09 0A 0B 0C 0D 0E 0F
----------------------------------------------------------------------
0000 24 4F 58 50 44 00 20 00 01 DB 01 FF 00 00 00 00
0010 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00
0020 02 24 00 00 80 7E F8 83 06 00 00 00 00 00 00 00
0030 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00
0040 00 00 00 00
----------------------------------------------------------------------
[OOB] ExecuteOobOneTouchRequest() -> Updated State 0x30100000, Fatal Error 0x00000000
[OOB] ExecuteOobOneTouchRequest() -> OOB Data after processing
OOB Data after processing (before updating Checksum, State): Size = 0x00000044 bytes
----------------------------------------------------------------------
Offset 00 01 02 03 04 05 06 07 08 09 0A 0B 0C 0D 0E 0F
----------------------------------------------------------------------
0000 24 4F 58 50 44 00 20 00 02 DB 81 00 03 00 02 D0
0010 02 00 00 00 00 00 03 00 04 00 00 00 00 00 00 00
0020 02 24 00 00 E8 7E F8 83 06 00 00 00 00 00 00 00
0030 00 00 00 00 00 7F 00 07 00 00 00 00 00 00 00 00
0040 00 00 00 00
----------------------------------------------------------------------
[OOB] ExecuteOobOneTouchRequest() -> Write OOB Data, if necessary
State Non-Zero OR OOB Data modified
OOB input data size <> 0 AND valid input signature: Generate OOB Output Data
[OOB] ExecuteOobOneTouchRequest() -> OOB Output Data Size = 0x00000044 bytes, State = 0x30107900
----------------------------------------------------------------------
Offset 00 01 02 03 04 05 06 07 08 09 0A 0B 0C 0D 0E 0F
----------------------------------------------------------------------
0000 50 58 4F 24 44 00 20 00 02 D4 81 00 03 00 02 D0
0010 02 00 00 79 10 30 03 00 04 00 00 00 00 00 00 00
0020 02 24 00 00 E8 7E F8 83 06 00 00 00 00 00 00 00
0030 00 00 00 00 00 7F 00 07 00 00 00 00 00 00 00 00
0040 00 00 00 00
----------------------------------------------------------------------
Write OOB Output Data ->
[HECI Transport-1 DXE] Send pkt: 804F0023
00: 01 00 00 00 00 00 00 00 - 00 00 00 50 58 4F 24 44
10: 00 20 00 02 D4 81 00 03 - 00 02 D0 02 00 00 79 10
20: 30 03 00 04 00 00 00 00 - 00 00 00 02 24 00 00 E8
30: 7E F8 83 06 00 00 00 00 - 00 00 00 00 00 00 00 00
40: 7F 00 07 00 00 00 00 00 - 00 00 00 00 00 00 00
[HECI Transport-1 DXE] Got pkt: 80040023
00: 01 80 00 00
[OOB] ExecuteOobOneTouchRequest() -> Updated State: 0x30107900, Fatal Error: 0x00000000
[OOB-SMBIOS] GenerateSmbiosStructuresOTA() { Generate OTA SMBIOS Structures
[OOB-SMBIOS] AddOemStructureOTA() { Add OEM Structure Type-168 (0xA8)
Allocate memory for OEM Structure: Success
Form OEM Structure
[OOB-SMBIOS] AddStringAndAdd2Smbios() { Add String and Add Structure to SMBIOS
[OOB-SMBIOS] Unicode2AsciizString() { Convert Unicode string to ASCIIZ String
[OOB-SMBIOS] Unicode2AsciizString() } Success, ASCIIZ String length (including NULL) = 0x0020
Add Formed Structure to other SMBIOS structures, Handle before adding 0xFFFE
Structure addition to SMBIOS: EFI Status 0x00000000, Handle after adding 0x0048 -> Success
******** Formed SMBIOS Structure Data, Length 0x50
----------------------------------------------------------------------
Offset 00 01 02 03 04 05 06 07 08 09 0A 0B 0C 0D 0E 0F
----------------------------------------------------------------------
0000 A8 2F 48 00 01 00 01 02 03 00 02 D0 02 00 04 00
0010 7E F8 83 06 00 00 00 00 00 00 00 00 00 00 00 00
0020 7F 00 07 00 00 00 00 00 00 00 00 00 00 00 00 4D
0030 65 6D 62 65 72 3A 20 4F 54 41 20 47 65 6E 65 72
0040 61 6C 20 49 6E 66 6F 72 6D 61 74 69 6F 6E 00 00
----------------------------------------------------------------------
[OOB-SMBIOS] AddStringAndAdd2Smbios() } Success, Handle of added Structure = 0x0048
[OOB-SMBIOS] AddOemStructureOTA() } Success
[OOB-SMBIOS] AddGroupAssociationStructureOTA() { Add Group Association Structure Type-14 (0x0E)
Allocate memory for Group Association Structure: Success
Form Group Association Structure
[OOB-SMBIOS] AddStringAndAdd2Smbios() { Add String and Add Structure to SMBIOS
[OOB-SMBIOS] Unicode2AsciizString() { Convert Unicode string to ASCIIZ String
[OOB-SMBIOS] Unicode2AsciizString() } Success, ASCIIZ String length (including NULL) = 0x0022
Add Formed Structure to other SMBIOS structures, Handle before adding 0xFFFE
Structure addition to SMBIOS: EFI Status 0x00000000, Handle after adding 0x0049 -> Success
******** Formed SMBIOS Structure Data, Length 0x2B
----------------------------------------------------------------------
Offset 00 01 02 03 04 05 06 07 08 09 0A 0B 0C 0D 0E 0F
----------------------------------------------------------------------
0000 0E 08 49 00 01 A8 48 00 47 72 6F 75 70 3A 20 4F
0010 6E 65 20 54 6F 75 63 68 20 41 63 74 69 76 61 74
0020 69 6F 6E 20 28 4F 54 41 29 00 00
----------------------------------------------------------------------
[OOB-SMBIOS] AddStringAndAdd2Smbios() } Success, Handle of added Structure = 0x0049
[OOB-SMBIOS] AddGroupAssociationStructureOTA() } Success
[OOB-SMBIOS] GenerateSmbiosStructuresOTA() } Success
[OOB] ExecuteOobOneTouchRequest() -> Clear, Deallocate Memory used for OOB Data
Clear Memory used for OOB Data
Deallocate Memory used for OOB Data
Clear, Deallocate Memory used for Platform Information
[OOB] ExecuteOobOneTouchRequest() -> No task to perform OR Reset not required for the performed task
[OOB] ExecuteOobOneTouchRequest() }
[OtaDxe.c] OtaEventHandler() }
Console redirection ENABLED
Console redirection ENABLED
PROGRESS CODE: V03050000 I0
NfitTableUpdateProtocol is not installed.
No Table for current platform
No Table for current platform
:INIT - BIOS_RESET_CPL: Set CPL3 on #S1 into BIOS_RESET_CPL_PCU_FUN1_REG
:PM - Successfully got ACK CPL3 on #S1
:INIT - BIOS_RESET_CPL: Set CPL4 on #S1 into BIOS_RESET_CPL_PCU_FUN1_REG
:PM - Successfully got ACK CPL4 on #S1
:INIT - BIOS_RESET_CPL: Set CPL3 on #S0 into BIOS_RESET_CPL_PCU_FUN1_REG
:PM - Successfully got ACK CPL3 on #S0
:INIT - BIOS_RESET_CPL: Set CPL4 on #S0 into BIOS_RESET_CPL_PCU_FUN1_REG
:PM - Successfully got ACK CPL4 on #S0
DXE PPM Config Complete
[HECI Transport-1 DXE] Send pkt: 80040007
00: 0A 05 00 00
[HECI Transport-1 DXE] Got pkt: 80040007
00: 0A 85 00 00
IioSecureOnEndOfDxe...
Lock the CXL.Arb-Mux secured register if there is any CXL port
Lock the CXL.Arb-Mux secured register if there is any CXL port
[IEH INIT] Init Socket:0x0
[Init Global IEH] on Skt:0x0
[Init Satallite IEH] on BitIdx:0x1
[Init Satallite IEH] S:0 B:0x0 D:0x14 F:0x4
[Init Satallite IEH] Device on BitIdx:0x3 doesn't exist
[Init Satallite IEH] Device on BitIdx:0x4 doesn't exist
[Init Satallite IEH] Device on BitIdx:0x5 doesn't exist
[Init Satallite IEH] Device on BitIdx:0x6 doesn't exist
[Init Satallite IEH] Device on BitIdx:0x7 doesn't exist
[Init Satallite IEH] Device on BitIdx:0x9 doesn't exist
[Init Satallite IEH] Device on BitIdx:0xB doesn't exist
[Init Satallite IEH] Device on BitIdx:0xC doesn't exist
[Init Satallite IEH] Device on BitIdx:0xD doesn't exist
[Init Satallite IEH] Device on BitIdx:0xE doesn't exist
[Init Satallite IEH] Device on BitIdx:0xF doesn't exist
[Init Satallite IEH] Device on BitIdx:0x10 doesn't exist
[Init Satallite IEH] Device on BitIdx:0x11 doesn't exist
[Init Satallite IEH] Device on BitIdx:0x12 doesn't exist
[Init Satallite IEH] Device on BitIdx:0x13 doesn't exist
[Init Satallite IEH] Device on BitIdx:0x17 doesn't exist
[Init Satallite IEH] Device on BitIdx:0x18 doesn't exist
[Init Satallite IEH] Device on BitIdx:0x19 doesn't exist
[Init Satallite IEH] Device on BitIdx:0x1D doesn't exist
Clear IEH Global Error Status before enabling IEH error...
[Init Satallite IEH] S:0 B:0x0 D:0x14 F:0x4 End
[Init Satallite IEH] on BitIdx:0x2
[Init Satallite IEH] S:0 B:0x6A D:0x0 F:0x4
PSF Dino PSF HCx Clear IEH Global Error Status before enabling IEH error...
[Init Satallite IEH] S:0 B:0x6A D:0x0 F:0x4 End
[Init Satallite IEH] on BitIdx:0x3
[Init Satallite IEH] S:0 B:0x0 D:0x0 F:0x4
PSF PCIE Pi5 PCIE GEN4 DMI Pi5 PCIE GEN5 IAL Pi5 (CXL) SPD I3C Bus SPD I3C Bus CXP SMBUS [Init Satallite IEH] Device on BitIdx:0x2 doesn't exist
[Init Satallite IEH] Device on BitIdx:0x3 doesn't exist
[Init Satallite IEH] Device on BitIdx:0x4 doesn't exist
[Init Satallite IEH] Device on BitIdx:0x5 doesn't exist
[Init Satallite IEH] Device on BitIdx:0x6 doesn't exist
[Init Satallite IEH] Device on BitIdx:0x7 doesn't exist
[Init Satallite IEH] Device on BitIdx:0x8 doesn't exist
[Init Satallite IEH] Device on BitIdx:0x9 doesn't exist
Clear IEH Global Error Status before enabling IEH error...
[Init Satallite IEH] S:0 B:0x0 D:0x0 F:0x4 End
[Init Satallite IEH] on BitIdx:0x4
[Init Satallite IEH] S:0 B:0x15 D:0x0 F:0x4
PSF PCIE Pi5 PCIE GEN4 DMI Pi5 PCIE GEN5 IAL Pi5 (CXL) [Init Satallite IEH] Device on BitIdx:0x2 doesn't exist
[Init Satallite IEH] Device on BitIdx:0x3 doesn't exist
[Init Satallite IEH] Device on BitIdx:0x4 doesn't exist
[Init Satallite IEH] Device on BitIdx:0x5 doesn't exist
[Init Satallite IEH] Device on BitIdx:0x6 doesn't exist
[Init Satallite IEH] Device on BitIdx:0x7 doesn't exist
[Init Satallite IEH] Device on BitIdx:0x8 doesn't exist
[Init Satallite IEH] Device on BitIdx:0x9 doesn't exist
Clear IEH Global Error Status before enabling IEH error...
[Init Satallite IEH] S:0 B:0x15 D:0x0 F:0x4 End
[Init Satallite IEH] on BitIdx:0x5
[Init Satallite IEH] S:0 B:0x6F D:0x0 F:0x4
PSF Dino PSF HCx Clear IEH Global Error Status before enabling IEH error...
[Init Satallite IEH] S:0 B:0x6F D:0x0 F:0x4 End
[Init Satallite IEH] on BitIdx:0x7
[Init Satallite IEH] S:0 B:0x59 D:0x0 F:0x4
PSF PCIE Pi5 PCIE GEN4 DMI Pi5 PCIE GEN5 IAL Pi5 (CXL) [Init Satallite IEH] Device on BitIdx:0x2 doesn't exist
[Init Satallite IEH] Device on BitIdx:0x3 doesn't exist
[Init Satallite IEH] Device on BitIdx:0x4 doesn't exist
[Init Satallite IEH] Device on BitIdx:0x5 doesn't exist
[Init Satallite IEH] Device on BitIdx:0x6 doesn't exist
[Init Satallite IEH] Device on BitIdx:0x7 doesn't exist
[Init Satallite IEH] Device on BitIdx:0x8 doesn't exist
[Init Satallite IEH] Device on BitIdx:0x9 doesn't exist
Clear IEH Global Error Status before enabling IEH error...
[Init Satallite IEH] S:0 B:0x59 D:0x0 F:0x4 End
[Init Satallite IEH] on BitIdx:0x8
[Init Satallite IEH] S:0 B:0x74 D:0x0 F:0x4
PSF Dino PSF HCx Clear IEH Global Error Status before enabling IEH error...
[Init Satallite IEH] S:0 B:0x74 D:0x0 F:0x4 End
[Init Satallite IEH] on BitIdx:0x9
[Init Satallite IEH] S:0 B:0x37 D:0x0 F:0x4
PSF PCIE Pi5 PCIE GEN4 DMI Pi5 PCIE GEN5 IAL Pi5 (CXL) [Init Satallite IEH] Device on BitIdx:0x2 doesn't exist
[Init Satallite IEH] Device on BitIdx:0x3 doesn't exist
[Init Satallite IEH] Device on BitIdx:0x4 doesn't exist
[Init Satallite IEH] Device on BitIdx:0x5 doesn't exist
[Init Satallite IEH] Device on BitIdx:0x6 doesn't exist
[Init Satallite IEH] Device on BitIdx:0x7 doesn't exist
[Init Satallite IEH] Device on BitIdx:0x8 doesn't exist
[Init Satallite IEH] Device on BitIdx:0x9 doesn't exist
Clear IEH Global Error Status before enabling IEH error...
[Init Satallite IEH] S:0 B:0x37 D:0x0 F:0x4 End
[Init Satallite IEH] on BitIdx:0xA
[Init Satallite IEH] S:0 B:0x26 D:0x0 F:0x4
PSF PCIE Pi5 PCIE GEN4 DMI Pi5 PCIE GEN5 IAL Pi5 (CXL) [Init Satallite IEH] Device on BitIdx:0x2 doesn't exist
[Init Satallite IEH] Device on BitIdx:0x3 doesn't exist
[Init Satallite IEH] Device on BitIdx:0x4 doesn't exist
[Init Satallite IEH] Device on BitIdx:0x5 doesn't exist
[Init Satallite IEH] Device on BitIdx:0x6 doesn't exist
[Init Satallite IEH] Device on BitIdx:0x7 doesn't exist
[Init Satallite IEH] Device on BitIdx:0x8 doesn't exist
[Init Satallite IEH] Device on BitIdx:0x9 doesn't exist
Clear IEH Global Error Status before enabling IEH error...
[Init Satallite IEH] S:0 B:0x26 D:0x0 F:0x4 End
[Init Satallite IEH] on BitIdx:0xB
[Init Satallite IEH] S:0 B:0x79 D:0x0 F:0x4
PSF Dino PSF HCx Clear IEH Global Error Status before enabling IEH error...
[Init Satallite IEH] S:0 B:0x79 D:0x0 F:0x4 End
[Init Satallite IEH] on BitIdx:0xD
[Init Satallite IEH] S:0 B:0x48 D:0x0 F:0x4
PSF PCIE Pi5 PCIE GEN4 DMI Pi5 PCIE GEN5 IAL Pi5 (CXL) [Init Satallite IEH] Device on BitIdx:0x2 doesn't exist
[Init Satallite IEH] Device on BitIdx:0x3 doesn't exist
[Init Satallite IEH] Device on BitIdx:0x4 doesn't exist
[Init Satallite IEH] Device on BitIdx:0x5 doesn't exist
[Init Satallite IEH] Device on BitIdx:0x6 doesn't exist
[Init Satallite IEH] Device on BitIdx:0x7 doesn't exist
[Init Satallite IEH] Device on BitIdx:0x8 doesn't exist
[Init Satallite IEH] Device on BitIdx:0x9 doesn't exist
Clear IEH Global Error Status before enabling IEH error...
[Init Satallite IEH] S:0 B:0x48 D:0x0 F:0x4 End
Clear IEH Global Error Status before enabling IEH errors
[IEH INIT] Init Socket:0x0 End
[IEH INIT] Init Socket:0x1
[Init Global IEH] on Skt:0x1
[Init Satallite IEH] on BitIdx:0x2
[Init Satallite IEH] S:1 B:0xE7 D:0x0 F:0x4
PSF Dino PSF HCx Clear IEH Global Error Status before enabling IEH error...
[Init Satallite IEH] S:1 B:0xE7 D:0x0 F:0x4 End
[Init Satallite IEH] on BitIdx:0x3
[Init Satallite IEH] S:1 B:0x80 D:0x0 F:0x4
PSF PCIE Pi5 PCIE GEN4 DMI Pi5 PCIE GEN5 IAL Pi5 (CXL) SPD I3C Bus SPD I3C Bus CXP SMBUS [Init Satallite IEH] Device on BitIdx:0x2 doesn't exist
[Init Satallite IEH] Device on BitIdx:0x3 doesn't exist
[Init Satallite IEH] Device on BitIdx:0x4 doesn't exist
[Init Satallite IEH] Device on BitIdx:0x5 doesn't exist
[Init Satallite IEH] Device on BitIdx:0x6 doesn't exist
[Init Satallite IEH] Device on BitIdx:0x7 doesn't exist
[Init Satallite IEH] Device on BitIdx:0x8 doesn't exist
[Init Satallite IEH] Device on BitIdx:0x9 doesn't exist
[Init Satallite IEH] Device on BitIdx:0xA doesn't exist
Clear IEH Global Error Status before enabling IEH error...
[Init Satallite IEH] S:1 B:0x80 D:0x0 F:0x4 End
[Init Satallite IEH] on BitIdx:0x4
[Init Satallite IEH] S:1 B:0x97 D:0x0 F:0x4
PSF PCIE Pi5 PCIE GEN4 DMI Pi5 PCIE GEN5 IAL Pi5 (CXL) [Init Satallite IEH] Device on BitIdx:0x2 doesn't exist
[Init Satallite IEH] Device on BitIdx:0x3 doesn't exist
[Init Satallite IEH] Device on BitIdx:0x4 doesn't exist
[Init Satallite IEH] Device on BitIdx:0x5 doesn't exist
[Init Satallite IEH] Device on BitIdx:0x6 doesn't exist
[Init Satallite IEH] Device on BitIdx:0x7 doesn't exist
[Init Satallite IEH] Device on BitIdx:0x8 doesn't exist
[Init Satallite IEH] Device on BitIdx:0x9 doesn't exist
Clear IEH Global Error Status before enabling IEH error...
[Init Satallite IEH] S:1 B:0x97 D:0x0 F:0x4 End
[Init Satallite IEH] on BitIdx:0x5
[Init Satallite IEH] S:1 B:0xEC D:0x0 F:0x4
PSF Dino PSF HCx Clear IEH Global Error Status before enabling IEH error...
[Init Satallite IEH] S:1 B:0xEC D:0x0 F:0x4 End
[Init Satallite IEH] on BitIdx:0x7
[Init Satallite IEH] S:1 B:0xD7 D:0x0 F:0x4
PSF PCIE Pi5 PCIE GEN4 DMI Pi5 PCIE GEN5 IAL Pi5 (CXL) [Init Satallite IEH] Device on BitIdx:0x2 doesn't exist
[Init Satallite IEH] Device on BitIdx:0x3 doesn't exist
[Init Satallite IEH] Device on BitIdx:0x4 doesn't exist
[Init Satallite IEH] Device on BitIdx:0x5 doesn't exist
[Init Satallite IEH] Device on BitIdx:0x6 doesn't exist
[Init Satallite IEH] Device on BitIdx:0x7 doesn't exist
[Init Satallite IEH] Device on BitIdx:0x8 doesn't exist
[Init Satallite IEH] Device on BitIdx:0x9 doesn't exist
Clear IEH Global Error Status before enabling IEH error...
[Init Satallite IEH] S:1 B:0xD7 D:0x0 F:0x4 End
[Init Satallite IEH] on BitIdx:0x8
[Init Satallite IEH] S:1 B:0xF1 D:0x0 F:0x4
PSF Dino PSF HCx Clear IEH Global Error Status before enabling IEH error...
[Init Satallite IEH] S:1 B:0xF1 D:0x0 F:0x4 End
[Init Satallite IEH] on BitIdx:0x9
[Init Satallite IEH] S:1 B:0xB7 D:0x0 F:0x4
PSF PCIE Pi5 PCIE GEN4 DMI Pi5 PCIE GEN5 IAL Pi5 (CXL) [Init Satallite IEH] Device on BitIdx:0x2 doesn't exist
[Init Satallite IEH] Device on BitIdx:0x3 doesn't exist
[Init Satallite IEH] Device on BitIdx:0x4 doesn't exist
[Init Satallite IEH] Device on BitIdx:0x5 doesn't exist
[Init Satallite IEH] Device on BitIdx:0x6 doesn't exist
[Init Satallite IEH] Device on BitIdx:0x7 doesn't exist
[Init Satallite IEH] Device on BitIdx:0x8 doesn't exist
[Init Satallite IEH] Device on BitIdx:0x9 doesn't exist
Clear IEH Global Error Status before enabling IEH error...
[Init Satallite IEH] S:1 B:0xB7 D:0x0 F:0x4 End
[Init Satallite IEH] on BitIdx:0xA
[Init Satallite IEH] S:1 B:0xA7 D:0x0 F:0x4
PSF PCIE Pi5 PCIE GEN4 DMI Pi5 PCIE GEN5 IAL Pi5 (CXL) [Init Satallite IEH] Device on BitIdx:0x2 doesn't exist
[Init Satallite IEH] Device on BitIdx:0x3 doesn't exist
[Init Satallite IEH] Device on BitIdx:0x4 doesn't exist
[Init Satallite IEH] Device on BitIdx:0x5 doesn't exist
[Init Satallite IEH] Device on BitIdx:0x6 doesn't exist
[Init Satallite IEH] Device on BitIdx:0x7 doesn't exist
[Init Satallite IEH] Device on BitIdx:0x8 doesn't exist
[Init Satallite IEH] Device on BitIdx:0x9 doesn't exist
Clear IEH Global Error Status before enabling IEH error...
[Init Satallite IEH] S:1 B:0xA7 D:0x0 F:0x4 End
[Init Satallite IEH] on BitIdx:0xB
[Init Satallite IEH] S:1 B:0xF6 D:0x0 F:0x4
PSF Dino PSF HCx Clear IEH Global Error Status before enabling IEH error...
[Init Satallite IEH] S:1 B:0xF6 D:0x0 F:0x4 End
[Init Satallite IEH] on BitIdx:0xD
[Init Satallite IEH] S:1 B:0xC7 D:0x0 F:0x4
PSF PCIE Pi5 PCIE GEN4 DMI Pi5 PCIE GEN5 IAL Pi5 (CXL) [Init Satallite IEH] Device on BitIdx:0x2 doesn't exist
[Init Satallite IEH] Device on BitIdx:0x3 doesn't exist
[Init Satallite IEH] Device on BitIdx:0x4 doesn't exist
[Init Satallite IEH] Device on BitIdx:0x5 doesn't exist
[Init Satallite IEH] Device on BitIdx:0x6 doesn't exist
[Init Satallite IEH] Device on BitIdx:0x7 doesn't exist
[Init Satallite IEH] Device on BitIdx:0x8 doesn't exist
[Init Satallite IEH] Device on BitIdx:0x9 doesn't exist
Clear IEH Global Error Status before enabling IEH error...
[Init Satallite IEH] S:1 B:0xC7 D:0x0 F:0x4 End
Clear IEH Global Error Status before enabling IEH errors
[IEH INIT] Init Socket:0x1 End
AddMicrocodeSmbiosTable: No valid Utility installed.
AddMicrocodeSmbiosTable: MicrocodeStagingRegion is 1.
AddMicrocodeSmbiosTable: UtilityStagingRegion is FFFF.
All AfterEndOfDxeEvent callbacks have returned successfully
PDB = c:\efi\servergen2\intel\Build\EagleStreamRpPkg\DEBUG_VS2015x86\X64\MdeModulePkg\Universal\Acpi\BootScriptExecutorDxe\BootScriptExecutorDxe\DEBUG\BootScriptExecutorDxe.pdb
[SIO] Current system SIO exist bit:10
IioSecureOnReadyToLock...
MSR_BIOS_DONE[0x151] 0x00000000 -> 0x00000003
PROGRESS CODE: V02010000 I0
PROGRESS CODE: V02010004 I0
PROGRESS CODE: V02010004 I0
PROGRESS CODE: V02010004 I0
[SGX] SgxAfterPlatformLocksCallback entry
[SGX] PrepareMcheckBiosParamInfo BEGIN
PopulateBiosParamInfoCreationPolicy: BiosParamInfoCreationPolicy = 0x0
Error: BiosParamInfoCreationPolicy is not initialized
[SGX] PrepareMcheckBiosParamInfo END
[SGX] UpdateRegistrationPackageInfo BEGIN
[SGX] UpdateRegistrationPackageInfo END
[SGX] StatusVariable: update ErrorCode from BIOS: 19
ExposeAllScenariosSgxRegistrationUefiVariables Enter
Expose variable [SgxRegistrationConfiguration]:
SetVariable: Success
ExposeToOsRuntime: 1
ReadOnlyOsRuntime: 0
ExposeAllScenariosSgxRegistrationUefiVariables: SgxRegistrationConfig->SgxRegServerInfo.Url = https://sbx.api.trustedservices.intel.com:443
RegistrationRequestType 0
Expose variable [SgxRegistrationServerRequest]:
SetVariable: Success
ExposeToOsRuntime: 1
ReadOnlyOsRuntime: 1
SgxRegistrationPackageInfo SHA256 sum:
[BB] [EC] [C9] [F0] [69] [34] [92] [3B] [63] [74] [71] [F4] [F7] [75] [C4] [BA] [B1] [BD] [29] [53] [56] [F9] [A1] [DE] [B7] [06] [65] [3B] [6D] [FF] [F7] [E7]
Expose variable [SgxRegistrationPackageInfo]:
SetVariable: Success
ExposeToOsRuntime: 0
ReadOnlyOsRuntime: 0
[SGX-DEBUG] Late PrintByteArrays SgxRegistrationStatus:
[01] [00] [03] [00] [02] [00] [19]
Expose variable [SgxRegistrationStatus]:
SetVariable: Success
ExposeToOsRuntime: 1
ReadOnlyOsRuntime: 0
Success to expose Registration Variables, exiting...
[SGX] SgxAfterPlatformLocksCallback exit: success
[SGX] DeallocateMcheckBiosParamInfo BEGIN
Verbose: BiosParamInfo already deallocated
[SGX] DeallocateMcheckBiosParamInfo END
PROGRESS CODE: V0300850B I0
PROGRESS CODE: V01050004 I0
PROGRESS CODE: V01050003 I0
PROGRESS CODE: V01050001 I0
PROGRESS CODE: V01040001 I0
PROGRESS CODE: V01050001 I0
PROGRESS CODE: V02020000 I0
PROGRESS CODE: V02020004 I0
PROGRESS CODE: V02020003 I0
TranslateBmpToGopBlt: BmpHeader->Char fields incorrect
PROGRESS CODE: V02020006 I0
UsbEnumerateNewDev: failed to reset port 2 - Time out
PROGRESS CODE: V02020000 I0
PROGRESS CODE: V01010004 I0
PROGRESS CODE: V01010003 I0
PROGRESS CODE: V01010006 I0
PROGRESS CODE: V01010001 I0
PROGRESS CODE: V01011001 I0
PROGRESS CODE: V02020006 I0
PROGRESS CODE: V02010000 I0
PROGRESS CODE: V02010004 I0
PROGRESS CODE: V02010004 I0
PROGRESS CODE: V02010004 I0
PROGRESS CODE: V02020000 I0
PROGRESS CODE: V02010004 I0
PROGRESS CODE: V02010004 I0
PROGRESS CODE: V02081000 I0
PROGRESS CODE: V02081003 I0
PROGRESS CODE: V01070004 I0
PROGRESS CODE: V02080000 I0
PROGRESS CODE: V02080003 I0
PROGRESS CODE: V02080004 I0
PROGRESS CODE: V02070000 I0
PROGRESS CODE: V02070003 I0
PROGRESS CODE: V01050004 I0
PROGRESS CODE: V01050004 I0
PROGRESS CODE: V01050003 I0
PROGRESS CODE: V01050001 I0
PROGRESS CODE: V01040001 I0
PROGRESS CODE: V01050001 I0
PROGRESS CODE: V02010000 I0
PROGRESS CODE: V02010004 I0
PROGRESS CODE: V02010004 I0
PROGRESS CODE: V02010004 I0
PROGRESS CODE: V02010000 I0
PROGRESS CODE: V02010004 I0
PROGRESS CODE: V02010004 I0
PROGRESS CODE: V02010004 I0
PROGRESS CODE: V02010000 I0
PROGRESS CODE: V02010004 I0
PROGRESS CODE: V02010004 I0
PROGRESS CODE: V02010004 I0
PROGRESS CODE: V02010000 I0
PROGRESS CODE: V02010004 I0
PROGRESS CODE: V02010004 I0
PROGRESS CODE: V02010004 I0
PROGRESS CODE: V02010000 I0
PROGRESS CODE: V02010004 I0
PROGRESS CODE: V02010004 I0
PROGRESS CODE: V02010004 I0
PROGRESS CODE: V02010000 I0
PROGRESS CODE: V02010004 I0
PROGRESS CODE: V02010004 I0
PROGRESS CODE: V02010004 I0
PROGRESS CODE: V02010000 I0
PROGRESS CODE: V02010004 I0
PROGRESS CODE: V02010004 I0
PROGRESS CODE: V02010004 I0
PROGRESS CODE: V02010000 I0
PROGRESS CODE: V02010004 I0
PROGRESS CODE: V02010004 I0
PROGRESS CODE: V02010004 I0
PROGRESS CODE: V02010000 I0
PROGRESS CODE: V02010004 I0
PROGRESS CODE: V02010004 I0
PROGRESS CODE: V02010004 I0
PROGRESS CODE: V02010000 I0
PROGRESS CODE: V02010004 I0
PROGRESS CODE: V02010004 I0
PROGRESS CODE: V02010004 I0
PROGRESS CODE: V02010000 I0
PROGRESS CODE: V02010004 I0
PROGRESS CODE: V02010004 I0
PROGRESS CODE: V02010004 I0
PROGRESS CODE: V02010000 I0
PROGRESS CODE: V02010004 I0
PROGRESS CODE: V02010004 I0
PROGRESS CODE: V02010004 I0
PROGRESS CODE: V02010000 I0
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PROGRESS CODE: V02020000 I0
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PROGRESS CODE: V01050004 I0
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PDB = c:\efi\servergen2\intel\Build\EagleStreamRpPkg\DEBUG_VS2015x86\X64\ServerPlatformPkg\Features\Me\MeSps\Sps\PtuLoader\PtuLoader\DEBUG\PtuLoader.pdb
PROGRESS CODE: V03040002 I0
PROGRESS CODE: V03040003 I0
PDB = c:\efi\servergen2\intel\Build\EagleStreamRpPkg\DEBUG_VS2015x86\X64\ServerPlatformPkg\Features\Me\MeSps\Sps\Acpi\SpsAcpiHooks\DEBUG\SpsAcpiHooks.pdb
PROGRESS CODE: V03040002 I0
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PROGRESS CODE: V02010000 I0
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PROGRESS CODE: V02020000 I0
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PROGRESS CODE: V01050004 I0
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PROGRESS CODE: V02020000 I0
PROGRESS CODE: V02080000 I0
PROGRESS CODE: V02080003 I0
PROGRESS CODE: V02070000 I0
PROGRESS CODE: V02070003 I0
PROGRESS CODE: V01050004 I0
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PROGRESS CODE: V02020000 I0
Press [Enter] to directly boot.
Press [F2] to enter setup and select boot options.
Press [F7] to show boot menu options.
Copyright (c) 2006-2022, Intel Corporation.
S0 S3M_S3MFW_CFR_SVN_N0_S3M_TREG_REG : 00000000
S0 S3M_S3MFW_REVID_N0_S3M_TREG_REG : 00000000
S0 S3M_S3MFW_CFR_SVN_N1_S3M_TREG_REG : 00010001
S0 S3M_S3MFW_REVID_N1_S3M_TREG_REG : 0000001E
S0 S3M_PUCODE_CFR_SVN_N0_S3M_TREG_REG: 00000000
S0 S3M_PUCODE_REVID_N0_S3M_TREG_REG : 00000000
S0 S3M_PUCODE_CFR_SVN_N1_S3M_TREG_REG: 00010001
S0 S3M_PUCODE_REVID_N1_S3M_TREG_REG : 130000C0
S1 S3M_S3MFW_CFR_SVN_N0_S3M_TREG_REG : 00000000
S1 S3M_S3MFW_REVID_N0_S3M_TREG_REG : 00000000
S1 S3M_S3MFW_CFR_SVN_N1_S3M_TREG_REG : 00010001
S1 S3M_S3MFW_REVID_N1_S3M_TREG_REG : 0000001E
S1 S3M_PUCODE_CFR_SVN_N0_S3M_TREG_REG: 00000000
S1 S3M_PUCODE_REVID_N0_S3M_TREG_REG : 00000000
S1 S3M_PUCODE_CFR_SVN_N1_S3M_TREG_REG: 00010001
S1 S3M_PUCODE_REVID_N1_S3M_TREG_REG : 130000C0
SocketIioConfigPtr->IioHcxType 0.0= 0
SocketIioConfigPtr->IioHcxType 0.1= 0
SocketIioConfigPtr->IioHcxType 0.2= 0
SocketIioConfigPtr->IioHcxType 0.3= 0
SocketIioConfigPtr->IioHcxType 0.4= 0
SocketIioConfigPtr->IioHcxType 0.5= 0
SocketIioConfigPtr->IioHcxType 0.6= 0
SocketIioConfigPtr->IioHcxType 0.7= 0
SocketIioConfigPtr->IioHcxType 0.8= 0
SocketIioConfigPtr->IioHcxType 0.9= 0
SocketIioConfigPtr->IioHcxType 0.A= 0
SocketIioConfigPtr->IioHcxType 0.B= 0
SocketIioConfigPtr->IioHcxType 1.0= 0
SocketIioConfigPtr->IioHcxType 1.1= 0
SocketIioConfigPtr->IioHcxType 1.2= 0
SocketIioConfigPtr->IioHcxType 1.3= 0
SocketIioConfigPtr->IioHcxType 1.4= 0
SocketIioConfigPtr->IioHcxType 1.5= 0
SocketIioConfigPtr->IioHcxType 1.6= 0
SocketIioConfigPtr->IioHcxType 1.7= 0
SocketIioConfigPtr->IioHcxType 1.8= 0
SocketIioConfigPtr->IioHcxType 1.9= 0
SocketIioConfigPtr->IioHcxType 1.A= 0
SocketIioConfigPtr->IioHcxType 1.B= 0
SocketIioConfigPtr->IioHcxType 2.0= 0
SocketIioConfigPtr->IioHcxType 2.1= 0
SocketIioConfigPtr->IioHcxType 2.2= 0
SocketIioConfigPtr->IioHcxType 2.3= 0
SocketIioConfigPtr->IioHcxType 2.4= 0
SocketIioConfigPtr->IioHcxType 2.5= 0
SocketIioConfigPtr->IioHcxType 2.6= 0
SocketIioConfigPtr->IioHcxType 2.7= 0
SocketIioConfigPtr->IioHcxType 2.8= 0
SocketIioConfigPtr->IioHcxType 2.9= 0
SocketIioConfigPtr->IioHcxType 2.A= 0
SocketIioConfigPtr->IioHcxType 2.B= 0
SocketIioConfigPtr->IioHcxType 3.0= 0
SocketIioConfigPtr->IioHcxType 3.1= 0
SocketIioConfigPtr->IioHcxType 3.2= 0
SocketIioConfigPtr->IioHcxType 3.3= 0
SocketIioConfigPtr->IioHcxType 3.4= 0
SocketIioConfigPtr->IioHcxType 3.5= 0
SocketIioConfigPtr->IioHcxType 3.6= 0
SocketIioConfigPtr->IioHcxType 3.7= 0
SocketIioConfigPtr->IioHcxType 3.8= 0
SocketIioConfigPtr->IioHcxType 3.9= 0
SocketIioConfigPtr->IioHcxType 3.A= 0
SocketIioConfigPtr->IioHcxType 3.B= 0
PROGRESS CODE: V03051007 I0
DebugModeIndicator = 1
InitData -> Protocol not found
CheckpointSend 0x09? No
-> Ready To Boot: Pause Resume Complete = 0x00 0x00 0x00
[HECI Transport-1 DXE] Send pkt: 80040007
00: FF 0C 00 00
[HECI Transport-1 DXE] Got pkt: 80080007
00: FF 8C 00 00 00 00 00 00
IioSecureOnOnReadyToBoot...
IOAT_INIT_READY_TO_BOOT_START
IOAT_INIT_READY_TO_BOOT_END
IOAT_INIT_READY_TO_BOOT_START
IOAT_INIT_READY_TO_BOOT_END
SmmInstallProtocolInterface: 6E057ECF-FA99-4F39-95BC-59F9921D17E4 0
[HECI Transport-1 DXE] Send pkt: 80040007
00: FF 02 00 00
[HECI Transport-1 DXE] Got pkt: 80140007
00: FF 82 00 00 00 00 06 18 - 00 01 03 00 00 00 06 18
10: 00 01 03 00
TPM Location configured (expected values: dTPM = 0x5 = 0x5
Value at TPM Base Address (0xFED40000) = 0xA1
HierarchyChangeAuth: Response Code error! 0x000009A2
PROGRESS CODE: V03051001 I0
PROGRESS CODE: V03058000 I0
PDB = bootmgfw.pdb
PROGRESS CODE: V03058001 I0
Windows Boot Manager Choose an operating system to start, or press TAB to select a tool: (Use the arrow keys to highlight your choice, then press ENTER.) Windows Server To specify an advanced option for this choice, press F8. Seconds until the highlighted choice will be started automatically: Tools: Windows Memory Diagnostic ENTER=Choose TAB=Menu ESC=Cancel Windows Server> To specify an advanced option for this choice, press F8. 5 PROGRESS CODE: V01040001 I0
PROGRESS CODE: V01050001 I0
PROGRESS CODE: V01010001 I0
PROGRESS CODE: V01011000 I0
PDB = bootmgfw.pdb
PROGRESS CODE: V03058000 I0
PDB = c:\efi\servergen2\intel\Build\EagleStreamRpPkg\DEBUG_VS2015x86\X64\ServerPlatformPkg\Applications\UiApp\UiApp\DEBUG\UiApp.pdb
PROGRESS CODE: V03058001 I0
PROGRESS CODE: V03050007 I0
[ME] MeOnEnterSetup() called
[HECI] Set MeType in MeOnEnterSetup (MeType is ME_TYPE_SPS)
[HECI Transport-1 DXE] Send pkt: 804D0007
00: 0A 02 00 00 2F 68 6F 6D - 65 2F 68 6F 74 68 61 6D
10: 2F 64 62 67 5F 64 61 6D - 5F 72 65 71 00 00 00 00
20: 00 00 00 00 00 00 00 00 - 00 00 00 00 00 00 00 00
30: 00 00 00 00 00 00 00 00 - 00 00 00 00 00 00 00 00
40: 00 00 00 00 00 00 00 00 - 01 00 00 00 00
[HECI Transport-1 DXE] Got pkt: 80090007
00: 0A 82 00 00 01 00 00 00 - 01
PROGRESS CODE: V03050006 I0
EAGLESTREAMGenuine Intel(R) CPU 0000%@1.70 GHzEGSDCRB1.ZHI.0091.D15.2211010626262144 MB RAMCopyright (c) 2006-2022, Intel Corporation >EDKII Menu >Boot Manager Menu >Boot Maintenance Manager Continue Reset ^v=Move Highlight <Enter>=Select Entry This selection will take you to the EDKII_MENU >EDKII Menu >Boot Manager Menu >Boot Maintenance Manager Continue Reset ^v=Move Highlight <Enter>=Select Entry This selection will take you to the EDKII_MENU This selection will take you to the EDKII_MENU This selection will take you to the EDKII_MENU This selection will take you to the EDKII_MENU This selection will take you to the EDKII_MENU PROGRESS CODE: V02020006 I0
>EDKII Menu ^v=Move Highlight <Enter>=Select Entry >Boot Manager Menu This selection will take you to the Boot Manager PROGRESS CODE: V02020000 I0
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PROGRESS CODE: V02080000 I0
PROGRESS CODE: V02080003 I0
PROGRESS CODE: V02070000 I0
PROGRESS CODE: V02070003 I0
PROGRESS CODE: V01050004 I0
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PROGRESS CODE: V02010000 I0
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PROGRESS CODE: V02020000 I0
PROGRESS CODE: V02080000 I0
PROGRESS CODE: V02080003 I0
PROGRESS CODE: V02070000 I0
PROGRESS CODE: V02070003 I0
PROGRESS CODE: V01050004 I0
PROGRESS CODE: V01050004 I0
PROGRESS CODE: V01050004 I0
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PROGRESS CODE: V02020000 I0
/------------------------------------------------------------------------------\|| Boot Manager Menu \------------------------------------------------------------------------------//------------------------------------------------------------------------------\||||\------------------------------------------------------------------------------/Copyright (c) 2006-2022, Intel Corporation Boot Manager Menu UEFI WDC WD1005VBYZ-02RRWB2 WD-WMC6N0K69VYL UEFI Internal Shell UEFI Kingston DataTraveler 3.0 E0D55E62C78DF4C0D8A414B9 Use the <^> and <v> keys to choose a boot option, the <Enter> key to select a boot option, and the <Esc> key to exit the Boot Manager Menu. Esc=Exit ^v=Move Highlight <Enter>=Select Entry Device Path : PciRoot(0x0)/Pci(0x17, 0x0)/Sata(0x0,0xFFFF,0 x0) UEFI WDC WD1005VBYZ-02RRWB2 WD-WMC6N0K69VYL Esc=Exit ^v=Move Highlight <Enter>=Select Entry UEFI Internal Shell Device Path : Fv(CDBB7B35-6833-4ED6- 9AB2-57D2ACDDF6F0)/FvF ile(7C04A583-9E3E-4F1C -AD65-E05268D0B4D1) UEFI Internal Shell Esc=Exit ^v=Move Highlight <Enter>=Select Entry UEFI Kingston DataTraveler 3.0 E0D55E62C78DF4C0D8A414B9 Device Path : PciRoot(0x0)/Pci(0x14, 0x0)/USB(0x5,0x0) IioSecureOnOnReadyToBoot...
PROGRESS CODE: V03051001 I0
ERROR: C40000002:V03051002 I0 7B257ABF-B5EC-42D5-A4CD-8E291E1F7B39 70DA6590
Press any key to continue...PROGRESS CODE: V03050006 I0
EAGLESTREAMGenuine Intel(R) CPU 0000%@1.70 GHzEGSDCRB1.ZHI.0091.D15.2211010626262144 MB RAMCopyright (c) 2006-2022, Intel Corporation >EDKII Menu >Boot Manager Menu >Boot Maintenance Manager Continue Reset ^v=Move Highlight <Enter>=Select Entry This selection will take you to the EDKII_MENU >EDKII Menu ^v=Move Highlight <Enter>=Select Entry >Boot Manager Menu This selection will take you to the Boot Manager /------------------------------------------------------------------------------\|| Boot Manager Menu \------------------------------------------------------------------------------//------------------------------------------------------------------------------\||||\------------------------------------------------------------------------------/Copyright (c) 2006-2022, Intel Corporation Boot Manager Menu UEFI WDC WD1005VBYZ-02RRWB2 WD-WMC6N0K69VYL UEFI Internal Shell UEFI Kingston DataTraveler 3.0 E0D55E62C78DF4C0D8A414B9 Use the <^> and <v> keys to choose a boot option, the <Enter> key to select a boot option, and the <Esc> key to exit the Boot Manager Menu. Esc=Exit ^v=Move Highlight <Enter>=Select Entry Device Path : PciRoot(0x0)/Pci(0x17, 0x0)/Sata(0x0,0xFFFF,0 x0) UEFI WDC WD1005VBYZ-02RRWB2 WD-WMC6N0K69VYL Esc=Exit ^v=Move Highlight <Enter>=Select Entry UEFI Internal Shell Device Path : Fv(CDBB7B35-6833-4ED6- 9AB2-57D2ACDDF6F0)/FvF ile(7C04A583-9E3E-4F1C -AD65-E05268D0B4D1) IioSecureOnOnReadyToBoot...
PROGRESS CODE: V03051001 I0
PROGRESS CODE: V03058000 I0
PDB = c:\efi\servergen2\intel\Build\EagleStreamRpPkg\DEBUG_VS2015x86\X64\ShellPkg\Application\Shell\Shell\DEBUG\Shell.pdb
PROGRESS CODE: V03058001 I0
UEFI Interactive Shell v2.2
EDK II
UEFI v2.70 (EDK II, 0x00010000)
Mapping table
FS1: Alias(s):HD1a65535a2:;BLK4:
PciRoot(0x0)/Pci(0x17,0x0)/Sata(0x0,0xFFFF,0x0)/HD(2,GPT,901ED09D-0CC1-4B78-A258-58391A5D6567,0xDC800,0x82000)
FS0: Alias(s):HD0f0b:;BLK1:
PciRoot(0x0)/Pci(0x14,0x0)/USB(0x5,0x0)/HD(1,MBR,0x2EBE6405,0x3F,0x39A2C81)
BLK2: Alias(s):
PciRoot(0x0)/Pci(0x17,0x0)/Sata(0x0,0xFFFF,0x0)
BLK3: Alias(s):
PciRoot(0x0)/Pci(0x17,0x0)/Sata(0x0,0xFFFF,0x0)/HD(1,GPT,07AE39FD-788D-490A-B7F2-D61CC80B130F,0x800,0xDC000)
BLK5: Alias(s):
PciRoot(0x0)/Pci(0x17,0x0)/Sata(0x0,0xFFFF,0x0)/HD(3,GPT,83E10836-37FC-4554-9CC3-71A59B1794AB,0x15E800,0x40000)
BLK6: Alias(s):
PciRoot(0x0)/Pci(0x17,0x0)/Sata(0x0,0xFFFF,0x0)/HD(4,GPT,9A20A927-C8F3-4053-9E5E-2807F07E38FD,0x19E800,0x1BD85800)
BLK0: Alias(s):
PciRoot(0x0)/Pci(0x14,0x0)/USB(0x5,0x0)
Press ESC in 5 seconds to skip startup.nsh or any other key to continue.Press ESC in 4 seconds to skip startup.nsh or any other key to continue.Press ESC in 3 seconds to skip startup.nsh or any other key to continue.Press ESC in 2 seconds to skip startup.nsh or any other key to continue.Press ESC in 1 seconds to skip startup.nsh or any other key to continue.
Shell> fs0:
FS0:\> ls
Directory of: FS0:\
01/01/1998 00:30 <DIR> 16,384 efi
06/10/2022 12:05 287,776 XmlCliKnobs.efi
11/01/2022 13:34 <DIR> 16,384 zhihao
1 File(s) 287,776 bytes
2 Dir(s)
FS0:\> zh cd zzhihao
FS0:\zhihao\> ls
Directory of: FS0:\zhihao\
11/01/2022 13:34 <DIR> 16,384 .
11/01/2022 13:34 <DIR> 0 ..
11/01/2022 14:32 67,108,864 EGSDCRB1.ZHI.0091.D15.2211010626_Pa0320_SPR_EBG_SPS.bin
10/28/2022 14:31 16,736 TestAppLib.efi
11/01/2022 13:28 11,200 TestAppprotocol.efi
3 File(s) 67,136,800 bytes
2 Dir(s)
FS0:\zhihao\> teTestAppLib.efi egEGSDCRB1.ZHI.0091.D15.2211010626_Pa0320_SPR_EBG_SPS.bin
PDB = c:\efi\servergen2\intel\Build\EagleStreamRpPkg\DEBUG_VS2015x86\X64\EagleStreamRpPkg\Applications\TestApp\TestApp\DEBUG\TestApp.pdb
In CryptParallelhash
Dump data from 67B86618, size: 0x100
67B86618: 01 01 01 01 01 01 01 01 01 01 01 01 01 01 01 01 | ................
67B86628: 01 01 01 01 01 01 01 01 01 01 01 01 01 01 01 01 | ................
67B86638: 01 01 01 01 01 01 01 01 01 01 01 01 01 01 01 01 | ................
67B86648: 01 01 01 01 01 01 01 01 01 01 01 01 01 01 01 01 | ................
67B86658: 01 01 01 01 01 01 01 01 01 01 01 01 01 01 01 01 | ................
67B86668: 01 01 01 01 01 01 01 01 01 01 01 01 01 01 01 01 | ................
67B86678: 01 01 01 01 01 01 01 01 01 01 01 01 01 01 01 01 | ................
67B86688: 01 01 01 01 01 01 01 01 01 01 01 01 01 01 01 01 | ................
67B86698: 01 01 01 01 01 01 01 01 01 01 01 01 01 01 01 01 | ................
67B866A8: 01 01 01 01 01 01 01 01 01 01 01 01 01 01 01 01 | ................
67B866B8: 01 01 01 01 01 01 01 01 01 01 01 01 01 01 01 01 | ................
67B866C8: 01 01 01 01 01 01 01 01 01 01 01 01 01 01 01 01 | ................
67B866D8: 01 01 01 01 01 01 01 01 01 01 01 01 01 01 01 01 | ................
67B866E8: 01 01 01 01 01 01 01 01 01 01 01 01 01 01 01 01 | ................
67B866F8: 01 01 01 01 01 01 01 01 01 01 01 01 01 01 01 01 | ................
67B86708: 01 01 01 01 01 01 01 01 01 01 01 01 01 01 01 01 | ................
Dump data from 67B86618, size: 0x100
67B86618: 01 01 01 01 01 01 01 01 01 01 01 01 01 01 01 01 | ................
67B86628: 01 01 01 01 01 01 01 01 01 01 01 01 01 01 01 01 | ................
67B86638: 01 01 01 01 01 01 01 01 01 01 01 01 01 01 01 01 | ................
67B86648: 01 01 01 01 01 01 01 01 01 01 01 01 01 01 01 01 | ................
67B86658: 01 01 01 01 01 01 01 01 01 01 01 01 01 01 01 01 | ................
67B86668: 01 01 01 01 01 01 01 01 01 01 01 01 01 01 01 01 | ................
67B86678: 01 01 01 01 01 01 01 01 01 01 01 01 01 01 01 01 | ................
67B86688: 01 01 01 01 01 01 01 01 01 01 01 01 01 01 01 01 | ................
67B86698: 01 01 01 01 01 01 01 01 01 01 01 01 01 01 01 01 | ................
67B866A8: 01 01 01 01 01 01 01 01 01 01 01 01 01 01 01 01 | ................
67B866B8: 01 01 01 01 01 01 01 01 01 01 01 01 01 01 01 01 | ................
67B866C8: 01 01 01 01 01 01 01 01 01 01 01 01 01 01 01 01 | ................
67B866D8: 01 01 01 01 01 01 01 01 01 01 01 01 01 01 01 01 | ................
67B866E8: 01 01 01 01 01 01 01 01 01 01 01 01 01 01 01 01 | ................
67B866F8: 01 01 01 01 01 01 01 01 01 01 01 01 01 01 01 01 | ................
67B86708: 01 01 01 01 01 01 01 01 01 01 01 01 01 01 01 01 | ................
Return in function 6,retrunvalue=1
Performance test = 267769636
In CryptParallelhash
Dump data from 67B86B18, size: 0x3
67B86B18: 01 01 01 | ...
Dump data from 67B86B18, size: 0x3
67B86B18: 01 01 01 | ...
Return in function 6,retrunvalue=1
Dump data from 70DA63A0, size: 0x40
70DA63A0: BC 1E F1 24 DA 34 49 5E 94 8E AD 20 7D D9 84 22 | ...$.4I^... }.."
70DA63B0: 35 DA 43 2D 2B BC 54 B4 C1 10 E6 4C 45 11 05 53 | 5.C-+.T....LE..S
70DA63C0: 1B 7F 2A 3E 0C E0 55 C0 28 05 E7 C2 DE 1F B7 46 | ..*>..U.(......F
70DA63D0: AF 97 A1 DD 01 F4 3B 82 4E 31 B8 76 12 41 04 29 | ......;.N1.v.A.)
Accuracy test = 0
PDB = c:\efi\servergen2\intel\Build\EagleStreamRpPkg\DEBUG_VS2015x86\X64\EagleStreamRpPkg\Applications\TestApp\TestApp\DEBUG\TestApp.pdb
FS0:\zhihao\> tesTestAppLib.efii i i i i pTestAppprotocol.efi eEGSDCRB1.ZHI.0091.D15.2211010626_Pa0320_SPR_EBG_SPS.bin
PDB = c:\efi\servergen2\intel\Build\EagleStreamRpPkg\DEBUG_VS2015x86\X64\EagleStreamRpPkg\Applications\TestApp\TestApp\DEBUG\TestApp.pdb
[DxeCryptLib] Failed to locate Crypto Protocol. Status = Not Found
ASSERT_EFI_ERROR (Status = Not Found)
DXE_ASSERT!: [TestApp] C:\efi\ServerGen2\Edk2\CryptoPkg\Library\BaseCryptLibOnProtocolPpi\DxeCryptLib.c (62): !(((INTN)(RETURN_STATUS)(Status)) < 0)
ÿPROGRESS CODE: V03020003 I0
PROGRESS CODE: V03020002 I0
PROGRESS CODE: V03020003 I0
PROGRESS CODE: V03020002 I0
PROGRESS CODE: V03020003 I0
PROGRESS CODE: V03020002 I0
PROGRESS CODE: V03020003 I0
PROGRESS CODE: V03020002 I0
[IPMI PEI] BMC Device ID: 0x23, firmware version: 2.03 UpdateMode:1
[IPMI] BMC in Forced Update mode, skip waiting for BMC_READY.
PROGRESS CODE: V03020003 I0
PROGRESS CODE: V03020002 I0
PROGRESS CODE: V03020003 I0
PROGRESS CODE: V03020002 I0
InstallHeciTransportPpis, start
InstallHeciTransportPpis, end
[HECI CONTROL PEI] HECI Transport found: 2
[HECI Control-1 PEI]: ERROR: HeciControlSendAndReceiveSinglePch() : Heci 1 is not initialized
HECI: ME type not recognized (MEFS1: 0x00000355, MEFS2: 0x80504006)
Initialization is allowed
[HECI Transport-1 PEI] Send pkt: 80040007
00: F0 11 00 00
[HECI Transport-1 PEI] Got pkt: 80080007
00: F0 91 00 00 09 00 00 00
HECI: Create MeType HOB for ME: 1
HECI: Set MeType HOB info to: 1
[HECI] [ME] (MeType is ME_TYPE_SPS)
Initialization is allowed
PROGRESS CODE: V03020003 I0
PROGRESS CODE: V03020002 I0
PROGRESS CODE: V03020003 I0
PROGRESS CODE: V03020002 I0
IioVmdDisableForPchRpInit: DonePCH Series : EBG PCH
PCH Stepping : B0
PROGRESS CODE: V03020003 I0
PROGRESS CODE: V03020002 I0
PROGRESS CODE: V03020003 I0
PROGRESS CODE: V03020002 I0
PROGRESS CODE: V03020003 I0
PROGRESS CODE: V03020002 I0
UbaInitPeim: PlatformType=0x16
UbaInitPeim: PlatformType=0x16
UbaInitPeim: PlatformType=0x16
UbaInitPeim: PlatformType=0x16
PROGRESS CODE: V03020003 I0
PROGRESS CODE: V03020002 I0
PROGRESS CODE: V03020003 I0
PROGRESS CODE: V03020002 I0
UBA:GpioTable size 0x9CC, blocks: 0xD1.
UBA: Start ConfigureGpio().
UBA: ConfigureGpio() end.
Unable to read FlashSecOvrdVal
FiaMuxRecordsCount = 0
[HECI] PeiMeServerPolicy (MeType is ME_TYPE_SPS)
Can't finde more CFR image in CFR FV - Not Found!
PPR Variable not found or CRC mismatch - Status: 0x8000000E, Crc: 0x0, calc. Crc: 0x0!
UpdatePeiSecurityPolicy: Create Status=Success
FIT not found, skip LT-SX
Platform Type = 22
Bios ID: EGSDCRB1.ZHI.0091.D15.2211010657
PROGRESS CODE: V03020003 I0
[HECI Transport-1 PEI] Send pkt: 80010020
00: 01
[HECI Transport-1 PEI] Got pkt: 800B0020
00: 81 01 01 14 00 88 00 01 - 00 00 00
[HECI Transport-1 PEI] Send pkt: 80300008
00: 00 00 05 00 1A 00 00 00 - 00 00 00 00 1C 00 00 00
10: 00 00 00 00 00 00 00 00 - 00 00 00 00 00 00 00 00
20: 00 00 00 00 00 00 00 00 - 00 00 00 00 00 00 00 00
[HECI Transport-1 PEI] Got pkt: 80300008
00: 00 00 05 00 1A 00 00 00 - 00 00 00 00 1C 00 00 00
10: 00 00 00 00 00 00 00 02 - 00 00 00 00 00 00 00 00
20: 00 00 00 00 00 00 00 00 - 00 00 00 00 00 00 00 00
Fail to Configure PSYS_CRIT
PROGRESS CODE: V03020002 I0
PROGRESS CODE: V03020003 I0
PROGRESS CODE: V03020002 I0
PROGRESS CODE: V03020003 I0
PROGRESS CODE: V03020002 I0
PROGRESS CODE: V03020003 I0
PROGRESS CODE: V03020002 I0
PROGRESS CODE: V03020003 I0
PROGRESS CODE: V03020002 I0
LtStatusRegister[0xFED30000] = 0x0000000000000003
LtExtendedStatusError[0xFED30008] = 0x0000000000000000
BootGuardBootStatus[0xFED300A0] = 0x0000000000000000
BootGuardAcmError[0xFED30328] = 0x0000000000000000
BootGuardLtExists[0xFED30010] = 0x0000000000000000
BootGuardLtCrash[0xFED30030] = 0x0000000000000000
MSR_DEBUG_INTERFACE[0x00000C80] = 0x0000000080000001
MSR_BOOT_GUARD_SACM_INFO[0x0000013A] = 0x0000000C00000000
AcmPolicyStatus = 0x0, IsTxtFailedWithScrtm 0
None of BtG/TXT is enabled or TXT failed with scrtm.
PROGRESS CODE: V03020003 I0
PROGRESS CODE: V03020002 I0
PROGRESS CODE: V03020003 I0
PROGRESS CODE: V03020002 I0
InitializeDefaultData()
[Enter] Initialize Reference Code Policy!
>>> Print the default settings of Reference Code Policy! Begin >>>
ReferenceCodePolicyPtr->NumaEn = 1
ReferenceCodePolicyPtr->UmaBasedClustering = 0
<<< Print the default settings of Reference Code Policy! End <<<
[Exit] Initialize Reference Code Policy!
SBSP socket = 0
InitializePlatformData()
InstallPpi MrcHooksServicesPpiDesc Status = 00000000
CacheMrcHooksServicesPpi in HOST: Host->MrcHooksServicesPpi = FFEA57C0
InstallPpi MrcHooksChipServicesPpiDesc Status = 00000000
CacheMrcChipHooksServicesPpi in HOST: Host->MrcHooksChipServicesPpi = FFEA5820
PROGRESS CODE: V030F100B I0
LoadNvramData: LoadSysInfoNvram failed, Status = Not Found
[HECI Transport-1 PEI] Send pkt: 80100007
00: F0 0C 00 00 DF FF FF FF - FF FF FF FF 00 00 00 00
[HECI Transport-1 PEI] Got pkt: 80100007
00: F0 8C 00 00 00 00 00 00 - 00 00 00 00 00 00 00 00
MeUmaConfigureRequestedSegmentSize: Exiting (Status = Success)
GetEmulationMemFlows: Simics $mrc value = 0
memFlows = 0xFFFFFFFF, memFlowsExt = 0xFFBF7FFF, memFlowsExt2 = 0xBF9E1F7F, memFlowsExt3 = 0xFFFFFFFF
Emulation Value is: 0!
Running on hardware
SPR processor detected
Warning: Newer CPU Stepping 4 detected
RC Version: 1.1.1.01BC
sizeof sysHost = 363776
SsaLoader - Entry
SsaLoader - Exit
KTI Init starting...
******* KTI Setup Structure *******
Bus Ratio (per socket): S0: 1 S1: 1 S2: 1 S3: 1
D2KCreditConfig: 0 [1:Low,2:Med,3:High]
SnoopThrottleConfig: 0 [0:Dis,1:Low,2:Med,3:High,4:Auto]
LegacyVgaSoc: 0
LegacyVgaStack: 0
P2pRelaxedOrdering: 0
DebugPrintLevel: 15
DegradePrecedence: 0
Degrade4SPreference: 0 (4SFullyConnect)
KtiLinkSpeedMode: 1 (FAST)
DfxWarmResetEliminationEn: 0
KtiLinkSpeed: 127 (MAX_SUPPORTED)
KtiAdaptationEn: 2 (UNKNOWN)
KtiAdaptationSpeed: 127 (MAX_SUPPORTED)
KtiLinkL0pEn: 2 (AUTO)
KtiLinkL1En: 2 (AUTO)
KtiFailoverEn: 2 (AUTO)
KtiLbEn: 0
SncEn: 15 (AUTO)
IoDcMode: 1 (AUTO)
DirectoryModeEn: 2
XptPrefetchEn: 2
KtiPrefetchEn: 2
XptRemotePrefetchEn: 2
RdCurForXptPrefetchEn: 2
StaleAtoSOptEn: 2
LLCDeadLineAlloc: 1
OppoLLC2SfMigrationEn: 0 (MANUAL)
MbeBWCalChoice: 3 [0:Linear,1:Biased,2:Legacy,3:Auto]
PmmMbaBWDownscale: 0 [0:1x,1:1/2x,2:1/4x,3:1/8x]
CxlMbaBWDownscale: 0 [0:1x,1:1/2x,2:1/4x,3:1/8x]
RemoteTargetMbaBWDownscale 0 [0:1x,1:1/2x,2:1/4x,3:1/8x]
SplitLock: 0
DdrtQosMode: 0
ClockModulationEn: 2 (AUTO)
KtiFpgaEnable (per socket): S0: 2 S1: 2 S2: 2 S3: 2
StackDisableBitMap (per socket): S0: 0x0 S1: 0x0 S2: 0x0 S3: 0x0
KtiCrcMode: 0 (16BIT)
KtiCpuSktHotPlugEn: 0
KtiCpuSktHotPlugTopology: 0 (4S)
KtiSkuMismatchCheck: 1
MctpBusOwner: 0 (PCH SPS as Bus Owner (Proxy))
KtiPortDisable (per port):
S0:0 0 0 0
S1:0 0 0 0
S2:0 0 0 0
S3:0 0 0 0
KtiLinkVnaOverride (per port):
S0:254 254 254 254
S1:254 254 254 254
S2:254 254 254 254
S3:254 254 254 254
KtiLinkSpeed (per port):
S0:7 7 7 7
S1:7 7 7 7
S2:7 7 7 7
S3:7 7 7 7
Rsvd (per port):
S0:0 0 0 0
S1:0 0 0 0
S2:0 0 0 0
S3:0 0 0 0
**KTI Setup Structure DfxParms **
DfxHaltLinkFailReset: 2 (AUTO)
DfxKtiMaxInitAbort: 2 (AUTO)
DfxLlcShareDrdCrd 2 (AUTO)
DfxBiasFwdMode: 5 (AUTO)
DfxSnoopFanoutEn: 2 (AUTO)
DfxHitMeEn: 2 (AUTO)
DfxFrcfwdinv 2 (AUTO)
DfxDbpEnable 2 (AUTO)
DfxCleanEvictAlwaysLive: 2 (AUTO)
DfxModifiedEvictAlwaysLive: 2 (AUTO)
DfxOsbEn 2 (AUTO)
DfxHitMeRfoDirsEn 2 (AUTO)
DfxGateOsbIodcAllocEn 2 (AUTO)
DfxDualLinksInterleavingMode 2 (AUTO)
DfxSystemDegradeMode: 1
DfxVn1En: 2 (AUTO)
DfxD2cEn: 2 (AUTO)
DfxD2kEn: 2 (AUTO)
DfxLockPrimary: 4 (AUTO)
DfxOsbLocRd: 2 (AUTO)
DfxOsbLocRdCur: 2 (AUTO)
DfxOsbRmtRd: 2 (AUTO)
DfxM3KtiCountMismatchEn: 2 (AUTO)
DfxSnoopFanoutChaInterleaveEn: 2 (AUTO)
DfxXptFifoEnabledCredit: 0x5
DfxMdfisTrainingEn: 2 (AUTO)
DfxClippedFreq: 23
DfxLlpEndcntClipped: 650
DfxLlpEndcntNonClipped: 576
DfxCxlSecLvl: 3 (AUTO)
DfxCxlStcge: 2 (AUTO)
DfxCxlSdcge: 2 (AUTO)
DfxCxlDlcge: 2 (AUTO)
DfxCxlLtcge: 2 (AUTO)
DfxCxlVid: 2 (AUTO)
DfxIioDfxEnabled: 0 (MANUAL)
DfxHqmEn: 2 (AUTO)
DfxRsfEnabledForDram: 2 (AUTO)
DfxS3mSoftStrap: 2 (AUTO)
DfxPmonConfig: 3 (AUTO)
DfxM2IosfPmonAccessControl: 2 (AUTO)
DfxMaxCache: 256 (AUTO)
DfxMaxCacheAtomic: 256 (AUTO)
DfxCtagEntryAvailMask: 256 (AUTO)
DfxXptPrefetchEn: 2 (AUTO)
DfxPrqBlockEn: 2 (AUTO)
DfxAeg0CounterLowVal: 65535 (AUTO)
DfxAeg0CounterHighVal: 65535 (AUTO)
DfxCrcMode (per port):
S0:2 (AUTO) 2 (AUTO) 2 (AUTO) 2 (AUTO)
S1:2 (AUTO) 2 (AUTO) 2 (AUTO) 2 (AUTO)
S2:2 (AUTO) 2 (AUTO) 2 (AUTO) 2 (AUTO)
S3:2 (AUTO) 2 (AUTO) 2 (AUTO) 2 (AUTO)
DfxL0pEnable (per port):
S0:2 (AUTO) 2 (AUTO) 2 (AUTO) 2 (AUTO)
S1:2 (AUTO) 2 (AUTO) 2 (AUTO) 2 (AUTO)
S2:2 (AUTO) 2 (AUTO) 2 (AUTO) 2 (AUTO)
S3:2 (AUTO) 2 (AUTO) 2 (AUTO) 2 (AUTO)
DfxL1Enable (per port):
S0:2 (AUTO) 2 (AUTO) 2 (AUTO) 2 (AUTO)
S1:2 (AUTO) 2 (AUTO) 2 (AUTO) 2 (AUTO)
S2:2 (AUTO) 2 (AUTO) 2 (AUTO) 2 (AUTO)
S3:2 (AUTO) 2 (AUTO) 2 (AUTO) 2 (AUTO)
DfxKtiFailoverEn (per port):
S0:2 (AUTO) 2 (AUTO) 2 (AUTO) 2 (AUTO)
S1:2 (AUTO) 2 (AUTO) 2 (AUTO) 2 (AUTO)
S2:2 (AUTO) 2 (AUTO) 2 (AUTO) 2 (AUTO)
S3:2 (AUTO) 2 (AUTO) 2 (AUTO) 2 (AUTO)
**Common Setup Structure**
mmCfgBase: 6 (AUTO)
mmCfgSize: 6 (AUTO)
mmiohBase: 0x00002000
CpuPaLimit: 0
mmiohSize: 3 (64GB per stack)
numaEn: 1
UmaClustering: 4
isocEn: 0
dcaEn: 0
**Common Var Structure **
resetRequired: 0
state: 0
numCpus: 0
socketPresentBitMap: 0x01
mmCfgBase: 0x80000000
meRequestedSize: 0
******* Collecting Early System Information - START *******
SBSP Socket: 0 Ways: 0x01 Ras: 0x06 Stepping: 0x04 DieCount: 4 Chop: XCC
Total Chas: 52 Cha List Map:
Cha List[0]: 0xBFCFF9FF
Cha List[1]: 0x0FEBFBFF
Total M3Kti: 04 Total KtiAgent: 04 Total M2M: 20 M2M list map: 0x000FFFFF
Current bus numbers:
Socket | Ins00 | Ins01 | Ins02 | Ins03 | Ins04 | Ins05 | Ins06 | Ins07 | Ins08 | Ins09 | Ins0A | Ins0B | Rsvd | Ubox0 | Ubox1 | LastBus | Seg
-----------------------------------------------------------------------------------------------------------------------------------------------
0 | 0x00 | 0x11 | 0x12 | 0x13 | 0x14 | 0x15 | 0x16 | 0x17 | 0x18 | 0x19 | 0x1A | 0x1B | --- | 0x1E | 0x1F | 0x1F | 0
1 | 0x20 | 0x21 | 0x22 | 0x23 | 0x24 | 0x25 | 0x26 | 0x27 | 0x28 | 0x29 | 0x2A | 0x2B | --- | 0x3E | 0x3F | 0x3F | 0
2 | 0x40 | 0x41 | 0x42 | 0x43 | 0x44 | 0x45 | 0x46 | 0x47 | 0x48 | 0x49 | 0x4A | 0x4B | --- | 0x5E | 0x5F | 0x5F | 0
3 | 0x60 | 0x61 | 0x62 | 0x63 | 0x64 | 0x65 | 0x66 | 0x67 | 0x68 | 0x69 | 0x6A | 0x6B | --- | 0x7E | 0x7F | 0x7F | 0
-----------------------------------------------------------------------------------------------------------------------------------------------
Assuming maximal config: TotCpus: 4 CpuList: 0x0F
Default UpiInterleaveMode: 0
Reset Type: Cold Reset
******* Collecting Early System Information - END *******
(Spr) UpiIpWrInit
MaxSocket 4, MaxKtiPort 4
UpiIpWrSingleInit
IpUpiIpInit(UpiAgent[0][0]):
UpiIpWrSingleInit
IpUpiIpInit(UpiAgent[0][1]):
UpiIpWrSingleInit
IpUpiIpInit(UpiAgent[0][2]):
UpiIpWrSingleInit
IpUpiIpInit(UpiAgent[0][3]):
UpiIpWrSingleInit
IpUpiIpInit(UpiAgent[1][0]):
UpiIpWrSingleInit
IpUpiIpInit(UpiAgent[1][1]):
UpiIpWrSingleInit
IpUpiIpInit(UpiAgent[1][2]):
UpiIpWrSingleInit
IpUpiIpInit(UpiAgent[1][3]):
UpiIpWrSingleInit
IpUpiIpInit(UpiAgent[2][0]):
UpiIpWrSingleInit
IpUpiIpInit(UpiAgent[2][1]):
UpiIpWrSingleInit
IpUpiIpInit(UpiAgent[2][2]):
UpiIpWrSingleInit
IpUpiIpInit(UpiAgent[2][3]):
UpiIpWrSingleInit
IpUpiIpInit(UpiAgent[3][0]):
UpiIpWrSingleInit
IpUpiIpInit(UpiAgent[3][1]):
UpiIpWrSingleInit
IpUpiIpInit(UpiAgent[3][2]):
UpiIpWrSingleInit
IpUpiIpInit(UpiAgent[3][3]):
******* Setting up Minimum Path - START *******
Constructing SBSP minimum path Topology Tree
--------------------------------------------
Adding SBSP (CPU0) to the tree
CPU0 Link Exchange
: LEP0(0,CPU1) Socket 0 Port 0:Primary - Peer Socket 1 Port 0 Secondary
: LEP1(1,CPU1) Socket 0 Port 1:Primary - Peer Socket 1 Port 1 Secondary
: LEP2(2,CPU1) Socket 0 Port 2:Primary - Peer Socket 1 Port 2 Secondary
: LEP3(3,CPU1) Socket 0 Port 3:Primary - Peer Socket 1 Port 3 Secondary
Adding CPU1 to the tree
Setting path between SBSP and CPU1.
In SBSP setting route to CPU1 using port 0.
In CPU1 using port 0 to set the M2UPCIe0 route.
CPU1 Link Exchange
: LEP0(0,CPU0) : LEP1(1,CPU0) : LEP2(2,CPU0) : LEP3(3,CPU0)
Setting boot path for CPU1
In CPU1 setting Cbo route to port 0
Socket[2] is removed
Socket[3] is removed
SBSP Minimum Path Tree
----------------------
Index Socket ParentPort Hop ParentIndex
00 CPU0 -- 0 --
01 CPU1 00 1 00
******* Setting up Minimum Path - END *******
******* Check for KTI Topology Degradation - START *******
Link Exchange Parameter
-----------------------
CPU0 : LEP0(0:CPU1) : LEP1(1:CPU1) : LEP2(2:CPU1) : LEP3(3:CPU1)
CPU1 : LEP0(0:CPU0) : LEP1(1:CPU0) : LEP2(2:CPU0) : LEP3(3:CPU0)
Already Reduced to Supported Topology
System will be treated 2S4L Configuration
******* Check for KTI Topology Degradation - END *******
******* Enable UBOX MMIO Addr Range - START *******
Current Bars:
Socket | SCF | PCU | MEM0 | MEM1 | MEM2 | MEM3 | MEM4 | MEM5 | MEM6 | MEM7 | SBREG |
-------------------------------------------------------------------------------------------------------------------------------------------------------
0 | 0xF8000000 | 0xF8200000 | 0xF8280000 | 0xF8300000 | 0xF8380000 | 0xF8400000 | 0xF8480000 | 0xF8500000 | 0xF8580000 | 0xF8600000 | 0xF8680000 |
1 | 0xF8800000 | 0xF8A00000 | 0xF8A80000 | 0xF8B00000 | 0xF8B80000 | 0xF8C00000 | 0xF8C80000 | 0xF8D00000 | 0xF8D80000 | 0xF8E00000 | 0xF8E80000 |
2 | 0xF9000000 | 0xF9200000 | 0xF9280000 | 0xF9300000 | 0xF9380000 | 0xF9400000 | 0xF9480000 | 0xF9500000 | 0xF9580000 | 0xF9600000 | 0xF9680000 |
3 | 0xF9800000 | 0xF9A00000 | 0xF9A80000 | 0xF9B00000 | 0xF9B80000 | 0xF9C00000 | 0xF9C80000 | 0xF9D00000 | 0xF9D80000 | 0xF9E00000 | 0xF9E80000 |
-------------------------------------------------------------------------------------------------------------------------------------------------------
******* Enable UBOX MMIO Addr Range - END *******
******* Process Straps Config - START *******
S3M Read SoftStrap Disabled, Exit.
******* Process Straps Config - END *******
******* Detecting IIO count - START *******
Socket 0 Stack Bitmap:F3F.
Stack Instance Bitmap:F3F.
IioCount: 10.
B2HotCount(LS): 00.
Socket 1 Stack Bitmap:F3F.
Stack Instance Bitmap:F3F.
IioCount: 10.
B2HotCount(LS): 00.
******* Detecting IIO count - END *******
******* Disable UBOX MMIO Addr Range - START *******
Current Bars:
Socket | SCF | PCU | MEM0 | MEM1 | MEM2 | MEM3 | MEM4 | MEM5 | MEM6 | MEM7 | SBREG |
-------------------------------------------------------------------------------------------------------------------------------------------------------
0 | 0x00000000 | 0x00000000 | 0x00000000 | 0x00000000 | 0x00000000 | 0x00000000 | 0x00000000 | 0x00000000 | 0x00000000 | 0x00000000 | 0x00000000 |
1 | 0x00000000 | 0x00000000 | 0x00000000 | 0x00000000 | 0x00000000 | 0x00000000 | 0x00000000 | 0x00000000 | 0x00000000 | 0x00000000 | 0x00000000 |
2 | 0x00000000 | 0x00000000 | 0x00000000 | 0x00000000 | 0x00000000 | 0x00000000 | 0x00000000 | 0x00000000 | 0x00000000 | 0x00000000 | 0x00000000 |
3 | 0x00000000 | 0x00000000 | 0x00000000 | 0x00000000 | 0x00000000 | 0x00000000 | 0x00000000 | 0x00000000 | 0x00000000 | 0x00000000 | 0x00000000 |
-------------------------------------------------------------------------------------------------------------------------------------------------------
******* Disable UBOX MMIO Addr Range - END *******
******* Checking KTIRC Input Structure - START *******
Desired MMCFG Config: Base = 0x80000000, Size = 0x10000000
OutSncPrefetchEn=4, OutSncEn=4
IpUpiGetCapability(UpiAgent[0][0], id=12):
IpUpiVersionSpecificConfigurationEnabled: unknown ID=2
IpWrError 0 49
IpUpiGetCapability(UpiAgent[0][0], id=7):
IpUpiGetCapability(UpiAgent[0][0], id=9):
IpUpiGetCapability(UpiAgent[0][0], id=10):
IpUpiGetCapability(UpiAgent[0][0], id=8):
IpUpiGetCapability(UpiAgent[0][1], id=12):
IpUpiVersionSpecificConfigurationEnabled: unknown ID=2
IpWrError 0 49
IpUpiGetCapability(UpiAgent[0][1], id=7):
IpUpiGetCapability(UpiAgent[0][1], id=9):
IpUpiGetCapability(UpiAgent[0][1], id=10):
IpUpiGetCapability(UpiAgent[0][1], id=8):
IpUpiGetCapability(UpiAgent[0][2], id=12):
IpUpiVersionSpecificConfigurationEnabled: unknown ID=2
IpWrError 0 49
IpUpiGetCapability(UpiAgent[0][2], id=7):
IpUpiGetCapability(UpiAgent[0][2], id=9):
IpUpiGetCapability(UpiAgent[0][2], id=10):
IpUpiGetCapability(UpiAgent[0][2], id=8):
IpUpiGetCapability(UpiAgent[0][3], id=12):
IpUpiVersionSpecificConfigurationEnabled: unknown ID=2
IpWrError 0 49
IpUpiGetCapability(UpiAgent[0][3], id=7):
IpUpiGetCapability(UpiAgent[0][3], id=9):
IpUpiGetCapability(UpiAgent[0][3], id=10):
IpUpiGetCapability(UpiAgent[0][3], id=8):
IpUpiGetCapability(UpiAgent[1][0], id=12):
IpUpiVersionSpecificConfigurationEnabled: unknown ID=2
IpWrError 0 49
IpUpiGetCapability(UpiAgent[1][0], id=7):
IpUpiGetCapability(UpiAgent[1][0], id=9):
IpUpiGetCapability(UpiAgent[1][0], id=10):
IpUpiGetCapability(UpiAgent[1][0], id=8):
IpUpiGetCapability(UpiAgent[1][1], id=12):
IpUpiVersionSpecificConfigurationEnabled: unknown ID=2
IpWrError 0 49
IpUpiGetCapability(UpiAgent[1][1], id=7):
IpUpiGetCapability(UpiAgent[1][1], id=9):
IpUpiGetCapability(UpiAgent[1][1], id=10):
IpUpiGetCapability(UpiAgent[1][1], id=8):
IpUpiGetCapability(UpiAgent[1][2], id=12):
IpUpiVersionSpecificConfigurationEnabled: unknown ID=2
IpWrError 0 49
IpUpiGetCapability(UpiAgent[1][2], id=7):
IpUpiGetCapability(UpiAgent[1][2], id=9):
IpUpiGetCapability(UpiAgent[1][2], id=10):
IpUpiGetCapability(UpiAgent[1][2], id=8):
IpUpiGetCapability(UpiAgent[1][3], id=12):
IpUpiVersionSpecificConfigurationEnabled: unknown ID=2
IpWrError 0 49
IpUpiGetCapability(UpiAgent[1][3], id=7):
IpUpiGetCapability(UpiAgent[1][3], id=9):
IpUpiGetCapability(UpiAgent[1][3], id=10):
IpUpiGetCapability(UpiAgent[1][3], id=8):
****** Selecting KTI freq. - START ******
Max supported KTI Speed requested: 16.0 GT/s
Selected KTI Freq is 16.0 GT/s
****** Selecting KTI freq. - END ******
MaxAddress=52
******* Checking KTIRC Input Structure - END *******
******* KTI NVRAM Verification - START *******
----------Update Kti Nvram in COLD BOOT ----------
******* KTI NVRAM Verification - END *******
******* Calculate Resource Allocation - START *******
S0 - AddressMap.hi=209F
S1 - AddressMap.hi=21BF
BitPos=2E
CPU Resource Allocation
--------------------------------------------------------------------------------------------------------------------------------------------------------------
| StkId | Seg | Bus | Io | IoApic | Mmiol | Mmioh | StkBmp |
--------------------------------------------------------------------------------------------------------------------------------------------------------------
CPU0 | | 0 | 0x00 - 0x7F | 0x0000 - 0x9FFF | 0xFEC00000 - 0xFECFFFFF | 0x90000000 - 0xC8FFFFFF | 0x00002000 00000000 - 0x0000209F FFFFFFFF | 0xF3F |
Ins00 | 0x00 | 0 | 0x00 - 0x14 | 0x0000 - 0x3FFF | 0xFEC00000 - 0xFECFFFFF | 0x90000000 - 0x957FFFFF | 0x00002000 00000000 - 0x0000200F FFFFFFFF | |
Ins01 | 0x01 | 0 | 0x15 - 0x25 | 0x4000 - 0x5FFF | 0xFFFFFFFF - 0x00000000 | 0x95800000 - 0x9F7FFFFF | 0x00002010 00000000 - 0x0000201F FFFFFFFF | |
Ins02 | 0x04 | 0 | 0x26 - 0x36 | 0x6000 - 0x6FFF | 0xFFFFFFFF - 0x00000000 | 0x9F800000 - 0xA93FFFFF | 0x00002020 00000000 - 0x0000202F FFFFFFFF | |
Ins03 | 0x03 | 0 | 0x37 - 0x47 | 0x7000 - 0x7FFF | 0xFFFFFFFF - 0x00000000 | 0xA9400000 - 0xB2FFFFFF | 0x00002030 00000000 - 0x0000203F FFFFFFFF | |
Ins04 | 0x05 | 0 | 0x48 - 0x58 | 0x8000 - 0x8FFF | 0xFFFFFFFF - 0x00000000 | 0xB3000000 - 0xBCBFFFFF | 0x00002040 00000000 - 0x0000204F FFFFFFFF | |
Ins05 | 0x02 | 0 | 0x59 - 0x69 | 0x9000 - 0x9FFF | 0xFFFFFFFF - 0x00000000 | 0xBCC00000 - 0xC67FFFFF | 0x00002050 00000000 - 0x0000205F FFFFFFFF | |
Ins06 | 0x06 | 0 | 0xFF - 0x00 | 0xFFFF - 0x0000 | 0xFFFFFFFF - 0x00000000 | 0xFFFFFFFF - 0x00000000 | 0xFFFFFFFF FFFFFFFF - 0x00000000 00000000 | |
Ins07 | 0x07 | 0 | 0xFF - 0x00 | 0xFFFF - 0x0000 | 0xFFFFFFFF - 0x00000000 | 0xFFFFFFFF - 0x00000000 | 0xFFFFFFFF FFFFFFFF - 0x00000000 00000000 | |
Ins08 | 0x08 | 0 | 0x6A - 0x6E | 0xFFFF - 0x0000 | 0xFFFFFFFF - 0x00000000 | 0xC6800000 - 0xC6FFFFFF | 0x00002060 00000000 - 0x0000206F FFFFFFFF | |
Ins09 | 0x09 | 0 | 0x6F - 0x73 | 0xFFFF - 0x0000 | 0xFFFFFFFF - 0x00000000 | 0xC7000000 - 0xC77FFFFF | 0x00002070 00000000 - 0x0000207F FFFFFFFF | |
Ins10 | 0x0A | 0 | 0x74 - 0x78 | 0xFFFF - 0x0000 | 0xFFFFFFFF - 0x00000000 | 0xC7800000 - 0xC7FFFFFF | 0x00002080 00000000 - 0x0000208F FFFFFFFF | |
Ins11 | 0x0B | 0 | 0x79 - 0x7D | 0xFFFF - 0x0000 | 0xFFFFFFFF - 0x00000000 | 0xC8000000 - 0xC87FFFFF | 0x00002090 00000000 - 0x0000209F FFFFFFFF | |
Rsvd | 0x0C | 0 | 0xFB - 0xFD | 0xFFFF - 0x0000 | 0xFFFFFFFF - 0x00000000 | 0xFFFFFFFF - 0x00000000 | 0xFFFFFFFF FFFFFFFF - 0x00000000 00000000 | |
Ubox | 0x0D | 0 | 0x7E - 0x7F | 0xFFFF - 0x0000 | 0xFFFFFFFF - 0x00000000 | 0xC8800000 - 0xC8FFFFFF | 0xFFFFFFFF FFFFFFFF - 0x00000000 00000000 | |
CPU1 | | 0 | 0x80 - 0xFF | 0xA000 - 0xFFFF | 0xFFFFFFFF - 0x00000000 | 0xC9000000 - 0xFBFFFFFF | 0x000020A0 00000000 - 0x0000213F FFFFFFFF | 0xF3F |
Ins00 | 0x00 | 0 | 0x80 - 0x96 | 0xA000 - 0xAFFF | 0xFFFFFFFF - 0x00000000 | 0xC9000000 - 0xD13FFFFF | 0x000020A0 00000000 - 0x000020AF FFFFFFFF | |
Ins01 | 0x01 | 0 | 0x97 - 0xA6 | 0xB000 - 0xBFFF | 0xFFFFFFFF - 0x00000000 | 0xD1400000 - 0xD97FFFFF | 0x000020B0 00000000 - 0x000020BF FFFFFFFF | |
Ins02 | 0x04 | 0 | 0xA7 - 0xB6 | 0xC000 - 0xCFFF | 0xFFFFFFFF - 0x00000000 | 0xD9800000 - 0xE17FFFFF | 0x000020C0 00000000 - 0x000020CF FFFFFFFF | |
Ins03 | 0x03 | 0 | 0xB7 - 0xC6 | 0xD000 - 0xDFFF | 0xFFFFFFFF - 0x00000000 | 0xE1800000 - 0xE97FFFFF | 0x000020D0 00000000 - 0x000020DF FFFFFFFF | |
Ins04 | 0x05 | 0 | 0xC7 - 0xD6 | 0xE000 - 0xEFFF | 0xFFFFFFFF - 0x00000000 | 0xE9800000 - 0xF17FFFFF | 0x000020E0 00000000 - 0x000020EF FFFFFFFF | |
Ins05 | 0x02 | 0 | 0xD7 - 0xE6 | 0xF000 - 0xFFFF | 0xFFFFFFFF - 0x00000000 | 0xF1800000 - 0xF97FFFFF | 0x000020F0 00000000 - 0x000020FF FFFFFFFF | |
Ins06 | 0x06 | 0 | 0xFF - 0x00 | 0xFFFF - 0x0000 | 0xFFFFFFFF - 0x00000000 | 0xFFFFFFFF - 0x00000000 | 0xFFFFFFFF FFFFFFFF - 0x00000000 00000000 | |
Ins07 | 0x07 | 0 | 0xFF - 0x00 | 0xFFFF - 0x0000 | 0xFFFFFFFF - 0x00000000 | 0xFFFFFFFF - 0x00000000 | 0xFFFFFFFF FFFFFFFF - 0x00000000 00000000 | |
Ins08 | 0x08 | 0 | 0xE7 - 0xEB | 0xFFFF - 0x0000 | 0xFFFFFFFF - 0x00000000 | 0xF9800000 - 0xF9FFFFFF | 0x00002100 00000000 - 0x0000210F FFFFFFFF | |
Ins09 | 0x09 | 0 | 0xEC - 0xF0 | 0xFFFF - 0x0000 | 0xFFFFFFFF - 0x00000000 | 0xFA000000 - 0xFA7FFFFF | 0x00002110 00000000 - 0x0000211F FFFFFFFF | |
Ins10 | 0x0A | 0 | 0xF1 - 0xF5 | 0xFFFF - 0x0000 | 0xFFFFFFFF - 0x00000000 | 0xFA800000 - 0xFAFFFFFF | 0x00002120 00000000 - 0x0000212F FFFFFFFF | |
Ins11 | 0x0B | 0 | 0xF6 - 0xFA | 0xFFFF - 0x0000 | 0xFFFFFFFF - 0x00000000 | 0xFB000000 - 0xFB7FFFFF | 0x00002130 00000000 - 0x0000213F FFFFFFFF | |
Rsvd | 0x0C | 0 | 0xFB - 0xFD | 0xFFFF - 0x0000 | 0xFFFFFFFF - 0x00000000 | 0xFFFFFFFF - 0x00000000 | 0xFFFFFFFF FFFFFFFF - 0x00000000 00000000 | |
Ubox | 0x0D | 0 | 0xFE - 0xFF | 0xFFFF - 0x0000 | 0xFFFFFFFF - 0x00000000 | 0xFB800000 - 0xFBFFFFFF | 0xFFFFFFFF FFFFFFFF - 0x00000000 00000000 | |
******* Calculate Resource Allocation - END *******
******* Sync Up PBSPs - START *******
Setting Ubox Sticky to save KTI topology to 0x000000000000FF03
Verifying if the remote socket(s) checked-in.
Inter-socket CSR access En request POST_RESET_WARM reset
packageBspStepping[0]=4
packageBspStepping[1]=4
******* Sync Up PBSPs - END *******
******* Program Mmcfg and bus numbers - START *******
Initiate S1 update
KtiVar->MmCfgBase = 0x80000000
KtiVar->segmentSocket[0] = 0x00
KtiVar->SocketFirstBus[0] = 0x00
KtiVar->SocketLastBus[0] = 0x7F
KtiVar->SocketMmCfgBase[0]= 0x80000000
KtiVar->segmentSocket[1] = 0x00
KtiVar->SocketFirstBus[1] = 0x80
KtiVar->SocketLastBus[1] = 0xFF
KtiVar->SocketMmCfgBase[1]= 0x80000000
Current bus numbers:
Socket | Ins00 | Ins01 | Ins02 | Ins03 | Ins04 | Ins05 | Ins06 | Ins07 | Ins08 | Ins09 | Ins0A | Ins0B | Rsvd | Ubox0 | Ubox1 | LastBus | Seg
-----------------------------------------------------------------------------------------------------------------------------------------------
0 | 0x00 | 0x15 | 0x26 | 0x37 | 0x48 | 0x59 | --- | --- | 0x6A | 0x6F | 0x74 | 0x79 | --- | 0x7E | 0x7F | 0x7F | 0
1 | 0x80 | 0x97 | 0xA7 | 0xB7 | 0xC7 | 0xD7 | --- | --- | 0xE7 | 0xEC | 0xF1 | 0xF6 | --- | 0xFE | 0xFF | 0xFF | 0
-----------------------------------------------------------------------------------------------------------------------------------------------
Wait for S1 to update
Change in Cache size request POST_RESET_WARM reset
Change in Cache size request POST_RESET_WARM reset
Change in Cache size request POST_RESET_WARM reset
Change in Cache size request POST_RESET_WARM reset
Change in Cache size request POST_RESET_WARM reset
Change in Cache size request POST_RESET_WARM reset
Change in Cache size request POST_RESET_WARM reset
Change in Cache size request POST_RESET_WARM reset
Change in Cache size request POST_RESET_WARM reset
Change in Cache size request POST_RESET_WARM reset
Change in Cache size request POST_RESET_WARM reset
Change in Cache size request POST_RESET_WARM reset
Change in Cache size request POST_RESET_WARM reset
Change in Cache size request POST_RESET_WARM reset
Change in Cache size request POST_RESET_WARM reset
Change in Cache size request POST_RESET_WARM reset
Change in Cache size request POST_RESET_WARM reset
Change in Cache size request POST_RESET_WARM reset
Change in Cache size request POST_RESET_WARM reset
Change in Cache size request POST_RESET_WARM reset
******* Program Mmcfg and bus numbers - END *******
Current Bars:
Socket | SCF | PCU | MEM0 | MEM1 | MEM2 | MEM3 | MEM4 | MEM5 | MEM6 | MEM7 | SBREG |
-------------------------------------------------------------------------------------------------------------------------------------------------------
0 | 0xC8800000 | 0xC8A00000 | 0xC8A80000 | 0xC8B00000 | 0xC8B80000 | 0xC8C00000 | 0xC8C80000 | 0xC8D00000 | 0xC8D80000 | 0xC8E00000 | 0xC8E80000 |
1 | 0xFB800000 | 0xFBA00000 | 0xFBA80000 | 0xFBB00000 | 0xFBB80000 | 0xFBC00000 | 0xFBC80000 | 0xFBD00000 | 0xFBD80000 | 0xFBE00000 | 0xFBE80000 |
-------------------------------------------------------------------------------------------------------------------------------------------------------
******* Programming Misc CSRs before WR - START *******
******* Programming Misc CSRs before WR - END *******
******* Pre-work before MDFIS Training *******
S0 S3M_S3MFW_CFR_SVN_N0_S3M_TREG_REG : 00000000
S0 S3M_S3MFW_REVID_N0_S3M_TREG_REG : 00000000
S0 S3M_S3MFW_CFR_SVN_N1_S3M_TREG_REG : 00010001
S0 S3M_S3MFW_REVID_N1_S3M_TREG_REG : 0000001E
******* Mdfs Sweep Training START *******
Get Uncore P0 Ratio = 24, Uncore Pm Ratio = 8
Dispatching command to notify Pbsp S1 to go to halt state
Send the Pipe data to S1 Successfully!
Mdfs training send command to pcode
All PBSPs resume from halt START
All PBSPs resume from halt END
Dispatching command to notify Pbsp S1 to go to halt state
Send the Pipe data to S1 Successfully!
Mdfs training send command to pcode
All PBSPs resume from halt START
All PBSPs resume from halt END
Dispatching command to notify Pbsp S1 to go to halt state
Send the Pipe data to S1 Successfully!
Mdfs training send command to pcode
All PBSPs resume from halt START
All PBSPs resume from halt END
******* Mdfs Sweep Training END *******
******* Post-work after MDFIS Training *******
******* Full Speed Transition - START *******
IpUpiVersionSpecificConfigurationEnabled: unknown ID=5
IpWrError 0 49
IpUpiVersionSpecificConfigurationEnabled: unknown ID=5
IpWrError 0 49
IpUpiVersionSpecificConfigurationEnabled: unknown ID=5
IpWrError 0 49
IpUpiVersionSpecificConfigurationEnabled: unknown ID=5
IpWrError 0 49
IpUpiVersionSpecificConfigurationEnabled: unknown ID=5
IpWrError 0 49
IpUpiVersionSpecificConfigurationEnabled: unknown ID=5
IpWrError 0 49
IpUpiVersionSpecificConfigurationEnabled: unknown ID=5
IpWrError 0 49
IpUpiVersionSpecificConfigurationEnabled: unknown ID=5
IpWrError 0 49
Skip UPI speed transition as there is a comming reset!
******* Full Speed Transition - END *******
******* Programming Credits - START *******
SPR M2IOSF -> M2UPI credit value: 34 is bigger than 31, force it to 31.
SPR M2IOSF -> M2UPI credit value: 34 is bigger than 31, force it to 31.
SPR M2IOSF -> M2UPI credit value: 34 is bigger than 31, force it to 31.
SPR M2IOSF -> M2UPI credit value: 34 is bigger than 31, force it to 31.
SPR M2IOSF -> M2UPI credit value: 50 is bigger than 31, force it to 31.
SPR M2IOSF -> M2UPI credit value: 50 is bigger than 31, force it to 31.
SPR M2IOSF -> M2UPI credit value: 33 is bigger than 31, force it to 31.
SPR M2IOSF -> M2UPI credit value: 49 is bigger than 31, force it to 31.
SPR M2IOSF -> M2UPI credit value: 33 is bigger than 31, force it to 31.
SPR M2IOSF -> M2UPI credit value: 49 is bigger than 31, force it to 31.
SPR M2IOSF -> M2UPI credit value: 34 is bigger than 31, force it to 31.
SPR M2IOSF -> M2UPI credit value: 34 is bigger than 31, force it to 31.
SPR M2IOSF -> M2UPI credit value: 34 is bigger than 31, force it to 31.
SPR M2IOSF -> M2UPI credit value: 34 is bigger than 31, force it to 31.
SPR M2IOSF -> M2UPI credit value: 50 is bigger than 31, force it to 31.
SPR M2IOSF -> M2UPI credit value: 50 is bigger than 31, force it to 31.
SPR M2IOSF -> M2UPI credit value: 33 is bigger than 31, force it to 31.
SPR M2IOSF -> M2UPI credit value: 49 is bigger than 31, force it to 31.
SPR M2IOSF -> M2UPI credit value: 33 is bigger than 31, force it to 31.
SPR M2IOSF -> M2UPI credit value: 49 is bigger than 31, force it to 31.
Mesh Credit Program request POST_RESET_WARM reset
******* Programming Credits - END *******
******* Pcu Misc Config - START *******
******* Pcu Misc Config - END *******
Setup Uncore Misc:
Write Socket 0 GLOBAL_PKG_C_S_CONTROL_REGISTER = 4
Write Socket 1 GLOBAL_PKG_C_S_CONTROL_REGISTER = 100
:INIT - BIOS_RESET_CPL: Set CPL1 on #S1
:INIT - BIOS_RESET_CPL: Set CPL1 on #S0
Initalize DMI RCRB region.
SetRcrbBar (): RcrbBase = 0x90000000
Warning: Created a Memory Hole: 0x90002000 ~ 0x9001FFFF
MEMBAR0: Base = 0x90020000, Size = 0x20000
Socket: 0;DMI MemBar locates on 0x90020000, Size: 0x20000
ProgramNumOfChaPerCluster
ProgramNumOfChaPerCluster
*******SOCKET1 STACKID SWAPPING - START *******
*******SOCKET1 STACKID SWAPPING - END *******
Current bus numbers:
Socket | Ins00 | Ins01 | Ins02 | Ins03 | Ins04 | Ins05 | Ins06 | Ins07 | Ins08 | Ins09 | Ins0A | Ins0B | Rsvd | Ubox0 | Ubox1 | LastBus | Seg
-----------------------------------------------------------------------------------------------------------------------------------------------
0 | 0x00 | 0x15 | 0x26 | 0x37 | 0x48 | 0x59 | --- | --- | 0x6A | 0x6F | 0x74 | 0x79 | --- | 0x7E | 0x7F | 0x7F | 0
1 | --- | 0x97 | 0xA7 | 0xB7 | 0xC7 | 0xD7 | 0x80 | --- | 0xE7 | 0xEC | 0xF1 | 0xF6 | --- | 0xFE | 0xFF | 0xFF | 0
-----------------------------------------------------------------------------------------------------------------------------------------------
Get FM_PCIE_FV_BIF_EN Status = Success, GpioVal = 0
**KTI Output Structure **
OutD2KCreditConfig: 0 [1:Low,2:Med,3:High]
SnoopThrottleConfig: 0 [0:Dis,1:Low,2:Med,3:High,4:Auto]
OutUpiAffinityEn for CHA and M2M: 0
OutTwoSktTopology : 5
OutM2iosfToUpiAffinity: 1
OutPmonConfig: 2 [1:Reduced,2:Full,3:Auto,0:Disabled]
OutM2IosfPmonAccessControl: 0 [0:Restricted,1:Full,2:Auto]
OutD2kEn: 0
OutLegacyVgaSoc: 0
OutLegacyVgaStack: 0
OutIsocEn: 0
OutHitMeEn: 1
OutSncEn: 4 (SNC4)
OutUmaClustering: 0
OutSysDirectoryModeEn: 1
OutKtiPrefetch: 0
OutXptPrefetch: 0
OutXptRemotePrefetch: 0
OutSncPrefetchEn: 4
OutSncGbAlignRequired: 0
OutIsRouteThrough: 0
OutStaleAtoSOptEn: 2
OutSystemRasType: 6 (ADVANCED)
OutIoDcMode: 5 (IODC_EN_REM_INVITOM_AND_WCILF)
KtiCurrentLinkSpeedMode: 0 (SLOW)
OutKtiLinkSpeed: 2 (16.0)
OutKtiLinkL0pEn: 0 (DISABLED)
OutKtiLinkL1En: 1 (ENABLED)
OutKtiFailoverEn: 1 (ENABLED)
OutKtiCrcMode: 0 (16BIT)
OutBoardVsCpuConflict: 0x0
OutKtiAdaptationEnable: 0x0
OutKtiPerLinkL1En (per port):
S0:0 0 0 0
S1:0 0 0 0
S2:0 0 0 0
S3:0 0 0 0
PchPresentBitMap: 0x01
OutKtiFpgaPresent (per socket): S0: 0 S1: 0 S2: 0 S3: 0
OutKtiFpgaEnable (per socket): S0: 0 S1: 0 S2: 0 S3: 0
OutFpgaHomeAgent (per socket): S0: 0 S1: 0 S2: 0 S3: 0
OutFpgaCacheAgent (per socket): S0: 0 S1: 0 S2: 0 S3: 0
OutStackDisableBitMap (per socket): S0: 0x0 S1: 0x0 S2: 0x0 S3: 0x0
mmCfgBase: 0x80000000
mmCfgSize: 0x10000000
mmiolBase: 0x90000000
mmiolSize: 0x6C000000
mmiohBase: 0x00002000
lowGap : 0x20
SecondaryNodeBitMap: 0x00
CpuPaLimit: 0
KtiInternalGlobal:
->SnoopFanoutEn: 0
->SysOsbEn: 1
->D2cEn: 1
->D2kEn: 0
->SnoopFilter: 0
->DualLinksInterleavingMode: 2
->UpiInterleaveMode: 2
->EightSocketTopology: 0
->SnoopFanoutChaInterleaveEn: 0
KtiLinkVnaOverride (per port - final values):
S0:254 254 254 254
S1:254 254 254 254
S2:254 254 254 254
S3:254 254 254 254
IIO STACK rootbus ID mapping table
Stack ID | Root Bus ID
0 ------- 0
1 ------- 1
2 ------- 2
3 ------- 3
4 ------- 4
5 ------- 5
6 ------- 6
7 ------- 7
8 ------- 8
9 ------- 9
10 ------- 10
11 ------- 11
OutDfxPrqBlockEn: 0
OutDfxAeg0CounterLowVal: 40
OutDfxAeg0CounterHighVal: 60
**KTI Output Structure End**
******* KTIRC Exit *******
KTI Init completed! Reset Requested: 2
IIO EarlyLink Init Start.
HcxType[0] = NONE
[IIO](VMD) [0] VMD disabled for RPs init.
MS2IOSF Traffic Controller Credits: Recipe Revision v1.11
Program HW_INIT using SB access
Program HW_INIT using SB access
Program HW_INIT using SB access
Program HW_INIT using SB access
Program HW_INIT using SB access
Program HW_INIT using SB access
Program HW_INIT using SB access
Program HW_INIT using SB access
Program HW_INIT using SB access
[0] Cpxsmb enabled
WARNING: Platform does not support uplink port!
HcxType[1] = NONE
[IIO](VMD) [1] VMD disabled for RPs init.
MS2IOSF Traffic Controller Credits: Recipe Revision v1.11
Program HW_INIT using SB access
Program HW_INIT using SB access
Program HW_INIT using SB access
Program HW_INIT using SB access
Program HW_INIT using SB access
Program HW_INIT using SB access
Program HW_INIT using SB access
Program HW_INIT using SB access
Program HW_INIT using SB access
Program HW_INIT using SB access
[1] Cpxsmb enabled
IIO EarlyLink Init completed! Reset Requested: 2
RC debug buffering, compression, and sync ready
Pipe Init starting...
Pass PIPE_DISPATCH_SYNCH_PSYSHOST to socket 1
Pass PeiPipeFollowerInit
CAR MEM Range 0xFE800000 - 0xFE97A14F
Pass pointer to Host: 0xFE800014
Sending address of Memory Policy: 0xFE96FF80
Pass boot mode 0
Send data buffer
Send data dwordcount 5E854
Send data...complete
CAR MEM Range2 0xFE9DC000 - 0xFE9DFFFF
Send data buffer
Send data dwordcount 1000
Send data...complete
Send data buffer
Send data dwordcount 18F
Send data...complete
N1 Checked into Pipe
Pipe Init completed! Reset Requested: 2
CPU Feature Early Config starting...
CpuInit Start
CpuUncoreInit()
: Get UncoreRatioLimit MaxClrRatio: 24, MinClrRatio: 8, UncoreRatioLimit.Uint32 = 0x818
: Get UncoreRatioLimit MaxClrRatio: 24, MinClrRatio: 8, UncoreRatioLimit.Uint32 = 0x818
:UFS: Update BIOS_SPARE2_PCU Bit[20] = 0 on S0
Write Socket 0 MSR_UNCORE_RATIO_LIMIT.MinClrRatio [14:8] = 8, MSR_UNCORE_RATIO_LIMIT.MaxClrRatio [6:0] = 24
:UFS: Update BIOS_SPARE2_PCU Bit[20] = 0 on S1
Write Socket 1 MSR_UNCORE_RATIO_LIMIT.MinClrRatio [14:8] = 8, MSR_UNCORE_RATIO_LIMIT.MaxClrRatio [6:0] = 24
Get socket PPIN
: PPIN = 22E546CB1AD8E915
Get socket PPIN
: PPIN = 22E548CB80015B4D
:: ProgramProcessorFlexRatio()
:: System Capable : AVX SST-CP SST-BF
1 1 0
:: SstPpCapableSystem : LevelEnableMask MaxLevel
0 00 00
S0_0 FusedCoresMask = 0x0DABBB6EAF4EE9DB FusedCoreCount = 40
GetAllConfigTdpLevels() Enter
S0_0 ConfigTdpLevel(0) IssCoreMask = 0x0DABBB6EAF4EE9DB IssCoreCount = 40
GetAllConfigTdpLevels() Exit
:: S0 MaxRatio : MinRatio : MinOpRatio : ConfigTdpMaxLevel
17 08 05 02
:: S0 Current SST-PP Level : Current SST-PP Lock
00 0
Level : PkgTDP : SSE P1 : AVX2 P1 : AVX3 P1 : Core Count
0 : 000350 : 000017 : 000014 : 000011 : 040, [0] 40
3 : 000000 : 000000 : 000000 : 000000 : 000, [0] 00
4 : 000000 : 000000 : 000000 : 000000 : 000, [0] 00
Level : Turbo Ratio Limit - SSE P1 : AVX2 P1 : AVX3 P1
0 : - : 181818191A1E2023 : 17171718191E2023 : 16161617171D1F22
3 : - : 0000000000000000 : 0000000000000000 : 0000000000000000
4 : - : 0000000000000000 : 0000000000000000 : 0000000000000000
Level : TJMax : CoreMask
0 : 100 : [0] 0DABBB6EAF4EE9DB
3 : 000 : [0] 0000000000000000
4 : 000 : [0] 0000000000000000
Level : SstBf - P1_Hi : P1_Lo : CoreMask
0 : 0000 : 0000 : [0] 0000000000000000
3 : 0000 : 0000 : [0] 0000000000000000
4 : 0000 : 0000 : [0] 0000000000000000
Core Ratio Info
Level : P0 : P1 : Pn : Pm
0 : 000035 : 000017 : 000008 : 000005
3 : 000000 : 000000 : 000000 : 000000
4 : 000000 : 000000 : 000000 : 000000
Uncore Ratio Info
Level : P0 : P1 : Pn : Pm
0 : 000024 : 000014 : 000008 : 000008
3 : 000000 : 000000 : 000000 : 000000
4 : 000000 : 000000 : 000000 : 000000
S1_0 FusedCoresMask = 0x0DB9772F6F4EE9DB FusedCoreCount = 40
GetAllConfigTdpLevels() Enter
S1_0 ConfigTdpLevel(0) IssCoreMask = 0x0DB9772F6F4EE9DB IssCoreCount = 40
GetAllConfigTdpLevels() Exit
:: S1 MaxRatio : MinRatio : MinOpRatio : ConfigTdpMaxLevel
17 08 05 02
:: S1 Current SST-PP Level : Current SST-PP Lock
00 0
Level : PkgTDP : SSE P1 : AVX2 P1 : AVX3 P1 : Core Count
0 : 000350 : 000017 : 000014 : 000011 : 040, [0] 40
3 : 000000 : 000000 : 000000 : 000000 : 000, [0] 00
4 : 000000 : 000000 : 000000 : 000000 : 000, [0] 00
Level : Turbo Ratio Limit - SSE P1 : AVX2 P1 : AVX3 P1
0 : - : 181818191A1E2023 : 17171718191E2023 : 16161617171D1F22
3 : - : 0000000000000000 : 0000000000000000 : 0000000000000000
4 : - : 0000000000000000 : 0000000000000000 : 0000000000000000
Level : TJMax : CoreMask
0 : 100 : [0] 0DB9772F6F4EE9DB
3 : 000 : [0] 0000000000000000
4 : 000 : [0] 0000000000000000
Level : SstBf - P1_Hi : P1_Lo : CoreMask
0 : 0000 : 0000 : [0] 0000000000000000
3 : 0000 : 0000 : [0] 0000000000000000
4 : 0000 : 0000 : [0] 0000000000000000
Core Ratio Info
Level : P0 : P1 : Pn : Pm
0 : 000035 : 000017 : 000008 : 000005
3 : 000000 : 000000 : 000000 : 000000
4 : 000000 : 000000 : 000000 : 000000
Uncore Ratio Info
Level : P0 : P1 : Pn : Pm
0 : 000024 : 000014 : 000008 : 000008
3 : 000000 : 000000 : 000000 : 000000
4 : 000000 : 000000 : 000000 : 000000
:: CommonMaxRatio : CommonMinRatio : Target Ratio
17 08 17
:: IssTdpLevel : AvxP1Level
00 00
:: TargetRatio: 17 is ready (RatioChangeFlag: 0), SstPpCurrentLevel: 0
:: SetActiveCoresAndLpEnableDisable()
:: S0_0 BIST_FAILURE_LOCAL_MASK = 0000000000000000
:: S0 setup input disable = 0000000000000000
:: S0_0 AvailCoresMask = 0DABBB6EAF4EE9DB
:: S0_0 ResolvedCoresMask = 0DABBB6EAF4EE9DB
:: S0_0 DesiredCoresCurrent = 0000000000000000
:: S0_0 BistResultMask = 0000000000000000
:: S0_0 CoreDisableReqMask = 0000000000000000
:: S0_0 NumberOfCoresDisabledMask = 0000000000000000
:: CheckCpuBist = 1
:: CoreFailover = 1
[s0_0] MaxLpEnable = 0, LpCapable = 1, MaxLpEnable knob = 0, Lock Status = 0
S0_0 MaxEnabledCores = 0
S0_0 FusedCoreCount = 40
S0_0 NonSparingCoresMask= FFFFFFFFFFFFFFFF
:: S0_0 DesiredCoresNew = 0000000000000000
:: S1_0 BIST_FAILURE_LOCAL_MASK = 0000000000000000
:: S1 setup input disable = 0000000000000000
:: S1_0 AvailCoresMask = 0DB9772F6F4EE9DB
:: S1_0 ResolvedCoresMask = 0DB9772F6F4EE9DB
:: S1_0 DesiredCoresCurrent = 0000000000000000
:: S1_0 BistResultMask = 0000000000000000
:: S1_0 CoreDisableReqMask = 0000000000000000
:: S1_0 NumberOfCoresDisabledMask = 0000000000000000
:: CheckCpuBist = 1
:: CoreFailover = 1
[s1_0] MaxLpEnable = 0, LpCapable = 1, MaxLpEnable knob = 0, Lock Status = 0
S1_0 MaxEnabledCores = 0
S1_0 FusedCoreCount = 40
S1_0 NonSparingCoresMask= FFFFFFFFFFFFFFFF
:: S1_0 DesiredCoresNew = 0000000000000000
CPUMISC Current S 0:
ITBM is not supported
CPUMISC Current S 1:
ITBM is not supported
CPU Feature Early Config completed! Reset Requested: 2
[CSR PCI BAR Access] Address:0xFFFFFFFF000000D4; PCI Cmd: 0xFFFF
START_MRC_RUN
Detect ColdBootSlowRequiredFlag and will force slow cold boot.
N0: Bus Instance = 0; I2C speed = 3; I3C speed = 2; Bus mode = 0
N0: Bus Instance = 1; I2C speed = 3; I3C speed = 2; Bus mode = 0
N0: Bus Instance = 0; I2C speed = 3; I3C speed = 2; Bus mode = 1
N0: Bus Instance = 0; I2C speed = 3; I3C speed = 2; Bus mode = 1
N0: Bus Instance = 0; I2C speed = 3; I3C speed = 2; Bus mode = 1
N0: Bus Instance = 0; I2C speed = 3; I3C speed = 2; Bus mode = 1
N0: Bus Instance = 0; I2C speed = 3; I3C speed = 2; Bus mode = 1
N0: Bus Instance = 0; I2C speed = 3; I3C speed = 2; Bus mode = 1
N0: Bus Instance = 1; I2C speed = 3; I3C speed = 2; Bus mode = 1
N0: Bus Instance = 1; I2C speed = 3; I3C speed = 2; Bus mode = 1
N0: Bus Instance = 1; I2C speed = 3; I3C speed = 2; Bus mode = 1
N0: Bus Instance = 1; I2C speed = 3; I3C speed = 2; Bus mode = 1
N0: Bus Instance = 1; I2C speed = 3; I3C speed = 2; Bus mode = 1
N0: Bus Instance = 1; I2C speed = 3; I3C speed = 2; Bus mode = 1
N0: Bus Instance = 0; I2C speed = 3; I3C speed = 2; Bus mode = 0
N0: Bus Instance = 0; I2C speed = 3; I3C speed = 2; Bus mode = 0
N0: Bus Instance = 0; I2C speed = 3; I3C speed = 2; Bus mode = 0
N0: Bus Instance = 0; I2C speed = 3; I3C speed = 2; Bus mode = 0
N0: Bus Instance = 0; I2C speed = 3; I3C speed = 2; Bus mode = 0
N0: Bus Instance = 0; I2C speed = 3; I3C speed = 2; Bus mode = 0
N0: Bus Instance = 1; I2C speed = 3; I3C speed = 2; Bus mode = 0
N0: Bus Instance = 1; I2C speed = 3; I3C speed = 2; Bus mode = 0
N0: Bus Instance = 1; I2C speed = 3; I3C speed = 2; Bus mode = 0
N0: Bus Instance = 1; I2C speed = 3; I3C speed = 2; Bus mode = 0
N0: Bus Instance = 1; I2C speed = 3; I3C speed = 2; Bus mode = 0
N0: Bus Instance = 1; I2C speed = 3; I3C speed = 2; Bus mode = 0
N0: Dimm changed.
Processors changed.
Get socket PPIN
: PPIN = 22E546CB1AD8E915
setupChanged: 1
Clearing the MRC NVRAM structure.
bootMode = NormalBoot
subBootMode = ColdBoot
[ScktId: 0] Parallel Mode Dispatch -- Started
Dispatch N1 for MemInit
N1 Entering MRC
Detect ColdBootSlowRequiredFlag and will force slow cold boot.
N1: Bus Instance = 0; I2C speed = 3; I3C speed = 2; Bus mode = 0
N1: Bus Instance = 1; I2C speed = 3; I3C speed = 2; Bus mode = 0
N1: Bus Instance = 0; I2C speed = 3; I3C speed = 2; Bus mode = 1
N1: Bus Instance = 0; I2C speed = 3; I3C speed = 2; Bus mode = 1
N1: Bus Instance = 0; I2C speed = 3; I3C speed = 2; Bus mode = 1
N1: Bus Instance = 0; I2C speed = 3; I3C speed = 2; Bus mode = 1
N1: Bus Instance = 0; I2C speed = 3; I3C speed = 2; Bus mode = 1
N1: Bus Instance = 0; I2C speed = 3; I3C speed = 2; Bus mode = 1
N1: Bus Instance = 1; I2C speed = 3; I3C speed = 2; Bus mode = 1
N1: Bus Instance = 1; I2C speed = 3; I3C speed = 2; Bus mode = 1
N1: Bus Instance = 1; I2C speed = 3; I3C speed = 2; Bus mode = 1
N1: Bus Instance = 1; I2C speed = 3; I3C speed = 2; Bus mode = 1
N1: Bus Instance = 1; I2C speed = 3; I3C speed = 2; Bus mode = 1
N1: Bus Instance = 1; I2C speed = 3; I3C speed = 2; Bus mode = 1
N1: Bus Instance = 0; I2C speed = 3; I3C speed = 2; Bus mode = 0
N1: Bus Instance = 0; I2C speed = 3; I3C speed = 2; Bus mode = 0
N1: Bus Instance = 0; I2C speed = 3; I3C speed = 2; Bus mode = 0
N1: Bus Instance = 0; I2C speed = 3; I3C speed = 2; Bus mode = 0
N1: Bus Instance = 0; I2C speed = 3; I3C speed = 2; Bus mode = 0
N1: Bus Instance = 0; I2C speed = 3; I3C speed = 2; Bus mode = 0
N1: Bus Instance = 1; I2C speed = 3; I3C speed = 2; Bus mode = 0
N1: Bus Instance = 1; I2C speed = 3; I3C speed = 2; Bus mode = 0
N1: Bus Instance = 1; I2C speed = 3; I3C speed = 2; Bus mode = 0
N1: Bus Instance = 1; I2C speed = 3; I3C speed = 2; Bus mode = 0
N1: Bus Instance = 1; I2C speed = 3; I3C speed = 2; Bus mode = 0
N1: Bus Instance = 1; I2C speed = 3; I3C speed = 2; Bus mode = 0
N1: Dimm changed.
Get socket PPIN
: PPIN = 22E548CB80015B4D
setupChanged: 1
Clearing the MRC NVRAM structure.
bootMode = NormalBoot
subBootMode = ColdBoot
[ScktId: 1] Parallel Mode Dispatch -- Started
[ScktId: 1] Parallel Mode Dispatch - 4ms
[ScktId: 0] Parallel Mode Dispatch - 203ms
[ScktId: 1] Pipe Sync AP Boot Mode -- Started
[ScktId: 0] Pipe Sync AP Boot Mode -- Started
[ScktId: 0] Pipe Sync AP Boot Mode - 9ms
[ScktId: 1] Pipe Sync AP Boot Mode - 13ms
N1 Checked into Pipe
[ScktId: 0] Select Boot Mode -- Started
DetermineBootMode: ColdBoot
[ScktId: 0] Select Boot Mode - 8ms
[ScktId: 1] Pipe Sync SBSP Boot Mode -- Started
[ScktId: 0] Pipe Sync SBSP Boot Mode -- Started
[ScktId: 1] Pipe Sync SBSP Boot Mode - 9ms
[ScktId: 0] Pipe Sync SBSP Boot Mode - 9ms
[ScktId: 1] Init Structures Late -- Started
[ScktId: 0] Init Structures Late -- Started
[ScktId: 1] Init Structures Late - 8ms
[ScktId: 0] Init Structures Late - 8ms
[ScktId: 1] Detect DIMM Configuration -- Started
[ScktId: 0] Detect DIMM Configuration -- Started
N1: Bus Instance = 0; I2C speed = 3; I3C speed = 2; Bus mode = 0
N0: Bus Instance = 0; I2C speed = 3; I3C speed = 2; Bus mode = 0
N1: Bus Instance = 0; I2C speed = 3; I3C speed = 2; Bus mode = 0
N0: Bus Instance = 0; I2C speed = 3; I3C speed = 2; Bus mode = 0
N1: Bus Instance = 0; I2C speed = 3; I3C speed = 2; Bus mode = 0
N0: Bus Instance = 0; I2C speed = 3; I3C speed = 2; Bus mode = 0
N1: Bus Instance = 0; I2C speed = 3; I3C speed = 2; Bus mode = 0
N1: Bus Instance = 0; I2C speed = 3; I3C speed = 2; Bus mode = 0
N0: Bus Instance = 0; I2C speed = 3; I3C speed = 2; Bus mode = 0
N1: Bus Instance = 0; I2C speed = 3; I3C speed = 2; Bus mode = 0
N0: Bus Instance = 0; I2C speed = 3; I3C speed = 2; Bus mode = 0
N0: Bus Instance = 0; I2C speed = 3; I3C speed = 2; Bus mode = 0
N1: Bus Instance = 1; I2C speed = 3; I3C speed = 2; Bus mode = 0
N1: Bus Instance = 1; I2C speed = 3; I3C speed = 2; Bus mode = 0
N0: Bus Instance = 1; I2C speed = 3; I3C speed = 2; Bus mode = 0
N1: Bus Instance = 1; I2C speed = 3; I3C speed = 2; Bus mode = 0
N0: Bus Instance = 1; I2C speed = 3; I3C speed = 2; Bus mode = 0
N0: Bus Instance = 1; I2C speed = 3; I3C speed = 2; Bus mode = 0
N1: Bus Instance = 1; I2C speed = 3; I3C speed = 2; Bus mode = 0
N1: Bus Instance = 1; I2C speed = 3; I3C speed = 2; Bus mode = 0
N0: Bus Instance = 1; I2C speed = 3; I3C speed = 2; Bus mode = 0
N1: Bus Instance = 1; I2C speed = 3; I3C speed = 2; Bus mode = 0
N0: Bus Instance = 1; I2C speed = 3; I3C speed = 2; Bus mode = 0
[ScktId: 1] Detect DIMM Configuration - 299ms
N0: Bus Instance = 1; I2C speed = 3; I3C speed = 2; Bus mode = 0
[ScktId: 1] Pipe Sync AP Data -- Started
[ScktId: 0] Detect DIMM Configuration - 312ms
[ScktId: 0] Pipe Sync AP Data -- Started
[ScktId: 0] Pipe Sync AP Data - 19ms
[ScktId: 1] Pipe Sync AP Data - 34ms
N1 Checked into Pipe
[ScktId: 0] Check POR Compatibility -- Started
[ScktId: 0] Check POR Compatibility - 6ms
N1 Checked into Pipe
[ScktId: 0] HBM Init Clock -- Started
PCU: API - Command->0xA6, sending data -> 0x0000F260
PCU: API - Command->0xA6, sending data -> 0x0000F260
[ScktId: 0] HBM Init Clock - 16ms
N1 Checked into Pipe
[ScktId: 0] Initialize clocks for all MemSs -- Started
N0: Platform segment mapping found. UseServerPor: 1; SegmentType: 7; ChopType: 3; PlatformSegment: 0
N0: Platform segment mapping found. UseServerPor: 1; SegmentType: 7; ChopType: 3; PlatformSegment: 0
N0: Platform segment mapping found. UseServerPor: 1; SegmentType: 7; ChopType: 3; PlatformSegment: 0
N0: Platform segment mapping found. UseServerPor: 1; SegmentType: 7; ChopType: 3; PlatformSegment: 0
N0: Platform segment mapping found. UseServerPor: 1; SegmentType: 7; ChopType: 3; PlatformSegment: 0
N0: Platform segment mapping found. UseServerPor: 1; SegmentType: 7; ChopType: 3; PlatformSegment: 0
N0: Platform segment mapping found. UseServerPor: 1; SegmentType: 7; ChopType: 3; PlatformSegment: 0
N0: Platform segment mapping found. UseServerPor: 1; SegmentType: 7; ChopType: 3; PlatformSegment: 0
Reset requested: non-MRC
PCU: API - Command->0xA6, sending data -> 0x8000F170
Reset requested: non-MRC
PCU: API - Command->0xA6, sending data -> 0x8000F170
[ScktId: 0] Initialize clocks for all MemSs - 103ms
[ScktId: 1] Pipe Sync SBSP Data -- Started
[ScktId: 0] Pipe Sync SBSP Data -- Started
[ScktId: 1] Pipe Sync SBSP Data - 22ms
[ScktId: 0] Pipe Sync SBSP Data - 22ms
[ScktId: 1] Unlock Memory -- Started
[ScktId: 0] Unlock Memory -- Started
[ScktId: 1] Unlock Memory - 7ms
[ScktId: 0] Unlock Memory - 7ms
[ScktId: 1] Pipe Sync AP Data -- Started
[ScktId: 0] Pipe Sync AP Data -- Started
[ScktId: 0] Pipe Sync AP Data - 23ms
[ScktId: 1] Pipe Sync AP Data - 26ms
[ScktId: 0] HBM Pre-Training -- Started
[ScktId: 1] HBM Pre-Training -- Started
HBMIO flows: set to 0xFFFFFF7F!
HBMIO flows: set to 0xFFFFFF7F!
Get socket PPIN
Get socket PPIN
: PPIN = 22E546CB1AD8E915
: PPIN = 22E548CB80015B4D
HBM frequency = 3200MHz
HBM frequency = 3200MHz
Socket0 HbmIo0, HW Rev: 0x110, FW Rev: 0x2180, Patch ID: 0x0, Unique ID: 0x18, Product ID: 0x2
Socket1 HbmIo0, HW Rev: 0x110, FW Rev: 0x2180, Patch ID: 0x0, Unique ID: 0x18, Product ID: 0x2
Socket0 HbmIo1, HW Rev: 0x110, FW Rev: 0x2180, Patch ID: 0x0, Unique ID: 0x18, Product ID: 0x2
Socket1 HbmIo1, HW Rev: 0x110, FW Rev: 0x2180, Patch ID: 0x0, Unique ID: 0x18, Product ID: 0x2
Socket0 HbmIo2, HW Rev: 0x110, FW Rev: 0x2180, Patch ID: 0x0, Unique ID: 0x18, Product ID: 0x2
Socket1 HbmIo2, HW Rev: 0x110, FW Rev: 0x2180, Patch ID: 0x0, Unique ID: 0x18, Product ID: 0x2
Socket0 HbmIo3, HW Rev: 0x110, FW Rev: 0x2180, Patch ID: 0x0, Unique ID: 0x18, Product ID: 0x2
Socket1 HbmIo3, HW Rev: 0x110, FW Rev: 0x2180, Patch ID: 0x0, Unique ID: 0x18, Product ID: 0x2
[ScktId: 0] HBM Pre-Training - 117ms
[ScktId: 1] HBM Pre-Training - 125ms
[ScktId: 0] AP HBM Information -- Started
[ScktId: 1] AP HBM Information -- Started
[ScktId: 0] AP HBM Information - 13ms
[ScktId: 1] AP HBM Information - 9ms
[ScktId: 0] Pipe Sync SBSP Status -- Started
[ScktId: 1] Pipe Sync SBSP Status -- Started
[ScktId: 1] Pipe Sync SBSP Status - 8ms
[ScktId: 0] Pipe Sync SBSP Status - 12ms
-- EXIT, status = MRC_STATUS_RESET_REQUIRED
-- EXIT, status = MRC_STATUS_RESET_REQUIRED
Total MRC time = 810ms
Total MRC time = 1013ms
STOP_MRC_RUN
Final Rc Heap usage:
******* Configure Mesh Mode - START *******
Configure Socket 0 2LM Hash -Enabled
Configure Socket 0 2LM Hash on KTI and IIO-Enabled
Configure Socket 1 2LM Hash -Enabled
Configure Socket 1 2LM Hash on KTI and IIO-Enabled
Socket 0 Mc 0 channel 0 enabled 1
Socket 0 Mc 0 Ch 0 maxDimm 1 Dimm = 0 numRanks= 1 TechIndex = 3 DimmSize 0x80
Memory Size = 0x80
Socket 0 has 1st 4G memory on Channel 0
Socket 0 Mc 0 channel 1 enabled 0
Socket 0 Mc 1 channel 2 enabled 1
Socket 0 Mc 1 Ch 0 maxDimm 1 Dimm = 0 numRanks= 1 TechIndex = 3 DimmSize 0x80
Memory Size = 0x80
Socket 0 Mc 1 channel 3 enabled 0
Socket 0 Mc 2 channel 4 enabled 1
Socket 0 Mc 2 Ch 0 maxDimm 1 Dimm = 0 numRanks= 1 TechIndex = 3 DimmSize 0x80
Memory Size = 0x80
Socket 0 Mc 2 channel 5 enabled 0
Socket 0 Mc 3 channel 6 enabled 1
Socket 0 Mc 3 Ch 0 maxDimm 1 Dimm = 0 numRanks= 1 TechIndex = 3 DimmSize 0x80
Memory Size = 0x80
Socket 0 Mc 3 channel 7 enabled 0
MaxHbmIo: 4 MemInfo->SncInfo[0].NumOfHbmioEnabled: 4
Socket 1 Mc 0 channel 0 enabled 1
Socket 1 Mc 0 Ch 0 maxDimm 1 Dimm = 0 numRanks= 1 TechIndex = 3 DimmSize 0x80
Memory Size = 0x80
Socket 1 Mc 0 channel 1 enabled 0
Socket 1 Mc 1 channel 2 enabled 1
Socket 1 Mc 1 Ch 0 maxDimm 1 Dimm = 0 numRanks= 1 TechIndex = 3 DimmSize 0x80
Memory Size = 0x80
Socket 1 Mc 1 channel 3 enabled 0
Socket 1 Mc 2 channel 4 enabled 1
Socket 1 Mc 2 Ch 0 maxDimm 1 Dimm = 0 numRanks= 1 TechIndex = 3 DimmSize 0x80
Memory Size = 0x80
Socket 1 Mc 2 channel 5 enabled 0
Socket 1 Mc 3 channel 6 enabled 1
Socket 1 Mc 3 Ch 0 maxDimm 1 Dimm = 0 numRanks= 1 TechIndex = 3 DimmSize 0x80
Memory Size = 0x80
Socket 1 Mc 3 channel 7 enabled 0
MaxHbmIo: 4 MemInfo->SncInfo[1].NumOfHbmioEnabled: 4
Socket 0
S0: SNC_Base_1 = 0000 GB
S0: SNC_Base_2 = 0004 GB
S0: SNC_Base_3 = 0004 GB
S0: SNC_Base_4 = 0004 GB
S0: SNC_Base_5 = 0004 GB
Socket 1
S1: SNC_Base_1 = 0004 GB
S1: SNC_Base_2 = 0004 GB
S1: SNC_Base_3 = 0004 GB
S1: SNC_Base_4 = 0004 GB
S1: SNC_Base_5 = 0004 GB
ProgramSncShadowReg
Socket:0 Base1 0x0FFF0000
Socket:0 Base2 0x1FE00004
Socket:0 Base3 0x00000004
Socket:0 Base4 0x00000004
Socket:0 Base5 0x00000004
Socket:0 UpperBase1 0x00000000
Socket:0 SncConfig 0x0000000A
Socket:1 Base1 0x0FFF0004
Socket:1 Base2 0x1FE00004
Socket:1 Base3 0x00000004
Socket:1 Base4 0x00000004
Socket:1 Base5 0x00000004
Socket:1 UpperBase1 0x00000000
Socket:1 SncConfig 0x0000000A
******* Configure Mesh Mode - END *******
S3M Provisioning SoftStrap Disabled, Exit.
PUcode Patch provisioning/commit flow
S3mPucodeCfrPatchProvisionCommit didn't find suitable CFR image, Exit.
S3M Patch provisioning/commit flow
Get Image :FF800090 11FF4
CFR Patch Provision start...
IFWI integrated S3M CFR patch revision SVN: 00000001, RevID: 0000001E.
S0 S3M_S3MFW_CFR_SVN_N0_S3M_TREG_REG : 00000000
S0 S3M_S3MFW_REVID_N0_S3M_TREG_REG : 00000000
S0 S3M_S3MFW_CFR_SVN_N1_S3M_TREG_REG : 00010001
S0 S3M_S3MFW_REVID_N1_S3M_TREG_REG : 0000001E
Committed region with the latest patch, skip provision.
Socket 0 Can't Provision, Skip.
IFWI integrated S3M CFR patch revision SVN: 00000001, RevID: 0000001E.
S1 S3M_S3MFW_CFR_SVN_N0_S3M_TREG_REG : 00000000
S1 S3M_S3MFW_REVID_N0_S3M_TREG_REG : 00000000
S1 S3M_S3MFW_CFR_SVN_N1_S3M_TREG_REG : 00010001
S1 S3M_S3MFW_REVID_N1_S3M_TREG_REG : 0000001E
Committed region with the latest patch, skip provision.
Socket 1 Can't Provision, Skip.
CFR Patch Commit start...
S0 S3M_S3MFW_CFR_SVN_N0_S3M_TREG_REG : 00000000
S0 S3M_S3MFW_REVID_N0_S3M_TREG_REG : 00000000
Socket 0 can't commit, skip
S1 S3M_S3MFW_CFR_SVN_N0_S3M_TREG_REG : 00000000
S1 S3M_S3MFW_REVID_N0_S3M_TREG_REG : 00000000
Socket 1 can't commit, skip
CFR Patch Provision/Commit Completed.
Reset Requested: 2
Pipe Exit starting...
Pipe Exit completed! Reset Requested: 2
Enhanced Warning Log:
Checking for Reset Requests...
ResetRequired: 02
[HECI Transport-1 PEI] Send pkt: 80040007
00: F3 01 00 00
[HECI Transport-1 PEI] Got pkt: 80050007
00: F3 81 00 00 00
Issue WARM RESET!
PROGRESS CODE: V03020003 I0
PROGRESS CODE: V03020002 I0
PROGRESS CODE: V03020003 I0
PROGRESS CODE: V03020002 I0
PROGRESS CODE: V03020003 I0
PROGRESS CODE: V03020002 I0
PROGRESS CODE: V03020003 I0
PROGRESS CODE: V03020002 I0
[IPMI PEI] BMC Device ID: 0x23, firmware version: 2.03 UpdateMode:1
[IPMI] BMC in Forced Update mode, skip waiting for BMC_READY.
PROGRESS CODE: V03020003 I0
PROGRESS CODE: V03020002 I0
PROGRESS CODE: V03020003 I0
PROGRESS CODE: V03020002 I0
InstallHeciTransportPpis, start
InstallHeciTransportPpis, end
[HECI CONTROL PEI] HECI Transport found: 2
[HECI Control-1 PEI]: ERROR: HeciControlSendAndReceiveSinglePch() : Heci 1 is not initialized
HECI: ME type not recognized (MEFS1: 0x00000355, MEFS2: 0x80508006)
Initialization is allowed
[HECI Transport-1 PEI] Send pkt: 80040007
00: F0 11 00 00
[HECI Transport-1 PEI] Got pkt: 80080007
00: F0 91 00 00 09 00 00 00
HECI: Create MeType HOB for ME: 1
HECI: Set MeType HOB info to: 1
[HECI] [ME] (MeType is ME_TYPE_SPS)
Initialization is allowed
PROGRESS CODE: V03020003 I0
PROGRESS CODE: V03020002 I0
PROGRESS CODE: V03020003 I0
PROGRESS CODE: V03020002 I0
IioVmdDisableForPchRpInit: DonePCH Series : EBG PCH
PCH Stepping : B0
PROGRESS CODE: V03020003 I0
PROGRESS CODE: V03020002 I0
PROGRESS CODE: V03020003 I0
PROGRESS CODE: V03020002 I0
PROGRESS CODE: V03020003 I0
PROGRESS CODE: V03020002 I0
UbaInitPeim: PlatformType=0x16
UbaInitPeim: PlatformType=0x16
UbaInitPeim: PlatformType=0x16
UbaInitPeim: PlatformType=0x16
PROGRESS CODE: V03020003 I0
PROGRESS CODE: V03020002 I0
PROGRESS CODE: V03020003 I0
PROGRESS CODE: V03020002 I0
UBA:GpioTable size 0x9CC, blocks: 0xD1.
UBA: Start ConfigureGpio().
UBA: ConfigureGpio() end.
Unable to read FlashSecOvrdVal
FiaMuxRecordsCount = 0
[HECI] PeiMeServerPolicy (MeType is ME_TYPE_SPS)
Can't finde more CFR image in CFR FV - Not Found!
PPR Variable not found or CRC mismatch - Status: 0x8000000E, Crc: 0x0, calc. Crc: 0x0!
UpdatePeiSecurityPolicy: Create Status=Success
FIT not found, skip LT-SX
Platform Type = 22
Bios ID: EGSDCRB1.ZHI.0091.D15.2211010657
PROGRESS CODE: V03020003 I0
[HECI Transport-1 PEI] Send pkt: 80010020
00: 01
[HECI Transport-1 PEI] Got pkt: 800B0020
00: 81 01 01 14 00 88 00 01 - 00 00 00
[HECI Transport-1 PEI] Send pkt: 80300008
00: 00 00 05 00 1A 00 00 00 - 00 00 00 00 1C 00 00 00
10: 00 00 00 00 00 00 00 00 - 00 00 00 00 00 00 00 00
20: 00 00 00 00 00 00 00 00 - 00 00 00 00 00 00 00 00
[HECI Transport-1 PEI] Got pkt: 80300008
00: 00 00 05 00 1A 00 00 00 - 00 00 00 00 1C 00 00 00
10: 00 00 00 00 00 00 00 02 - 00 00 00 00 00 00 00 00
20: 00 00 00 00 00 00 00 00 - 00 00 00 00 00 00 00 00
Fail to Configure PSYS_CRIT
PROGRESS CODE: V03020002 I0
PROGRESS CODE: V03020003 I0
PROGRESS CODE: V03020002 I0
PROGRESS CODE: V03020003 I0
PROGRESS CODE: V03020002 I0
PROGRESS CODE: V03020003 I0
PROGRESS CODE: V03020002 I0
PROGRESS CODE: V03020003 I0
PROGRESS CODE: V03020002 I0
LtStatusRegister[0xFED30000] = 0x0000000000000003
LtExtendedStatusError[0xFED30008] = 0x0000000000000000
BootGuardBootStatus[0xFED300A0] = 0x0000000000000000
BootGuardAcmError[0xFED30328] = 0x0000000000000000
BootGuardLtExists[0xFED30010] = 0x0000000000000000
BootGuardLtCrash[0xFED30030] = 0x0000000000000000
MSR_DEBUG_INTERFACE[0x00000C80] = 0x0000000080000001
MSR_BOOT_GUARD_SACM_INFO[0x0000013A] = 0x0000000C00000000
AcmPolicyStatus = 0x0, IsTxtFailedWithScrtm 0
None of BtG/TXT is enabled or TXT failed with scrtm.
PROGRESS CODE: V03020003 I0
PROGRESS CODE: V03020002 I0
PROGRESS CODE: V03020003 I0
PROGRESS CODE: V03020002 I0
InitializeDefaultData()
[Enter] Initialize Reference Code Policy!
>>> Print the default settings of Reference Code Policy! Begin >>>
ReferenceCodePolicyPtr->NumaEn = 1
ReferenceCodePolicyPtr->UmaBasedClustering = 0
<<< Print the default settings of Reference Code Policy! End <<<
[Exit] Initialize Reference Code Policy!
SBSP socket = 0
InitializePlatformData()
InstallPpi MrcHooksServicesPpiDesc Status = 00000000
CacheMrcHooksServicesPpi in HOST: Host->MrcHooksServicesPpi = FFEA57C0
InstallPpi MrcHooksChipServicesPpiDesc Status = 00000000
CacheMrcChipHooksServicesPpi in HOST: Host->MrcHooksChipServicesPpi = FFEA5820
PROGRESS CODE: V030F100B I0
LoadNvramData: LoadSysInfoNvram failed, Status = Not Found
[HECI Transport-1 PEI] Send pkt: 80100007
00: F0 0C 00 00 DF FF FF FF - FF FF FF FF 00 00 00 00
[HECI Transport-1 PEI] Got pkt: 80100007
00: F0 8C 00 00 00 00 00 00 - 00 00 00 00 00 00 00 00
MeUmaConfigureRequestedSegmentSize: Exiting (Status = Success)
GetEmulationMemFlows: Simics $mrc value = 0
memFlows = 0xFFFFFFFF, memFlowsExt = 0xFFBF7FFF, memFlowsExt2 = 0xBF9E1F7F, memFlowsExt3 = 0xFFFFFFFF
Emulation Value is: 0!
Running on hardware
SPR processor detected
Warning: Newer CPU Stepping 4 detected
RC Version: 1.1.1.01BC
sizeof sysHost = 363776
SsaLoader - Entry
SsaLoader - Exit
KTI Init starting...
******* KTI Setup Structure *******
Bus Ratio (per socket): S0: 1 S1: 1 S2: 1 S3: 1
D2KCreditConfig: 0 [1:Low,2:Med,3:High]
SnoopThrottleConfig: 0 [0:Dis,1:Low,2:Med,3:High,4:Auto]
LegacyVgaSoc: 0
LegacyVgaStack: 0
P2pRelaxedOrdering: 0
DebugPrintLevel: 15
DegradePrecedence: 0
Degrade4SPreference: 0 (4SFullyConnect)
KtiLinkSpeedMode: 1 (FAST)
DfxWarmResetEliminationEn: 0
KtiLinkSpeed: 127 (MAX_SUPPORTED)
KtiAdaptationEn: 2 (UNKNOWN)
KtiAdaptationSpeed: 127 (MAX_SUPPORTED)
KtiLinkL0pEn: 2 (AUTO)
KtiLinkL1En: 2 (AUTO)
KtiFailoverEn: 2 (AUTO)
KtiLbEn: 0
SncEn: 15 (AUTO)
IoDcMode: 1 (AUTO)
DirectoryModeEn: 2
XptPrefetchEn: 2
KtiPrefetchEn: 2
XptRemotePrefetchEn: 2
RdCurForXptPrefetchEn: 2
StaleAtoSOptEn: 2
LLCDeadLineAlloc: 1
OppoLLC2SfMigrationEn: 0 (MANUAL)
MbeBWCalChoice: 3 [0:Linear,1:Biased,2:Legacy,3:Auto]
PmmMbaBWDownscale: 0 [0:1x,1:1/2x,2:1/4x,3:1/8x]
CxlMbaBWDownscale: 0 [0:1x,1:1/2x,2:1/4x,3:1/8x]
RemoteTargetMbaBWDownscale 0 [0:1x,1:1/2x,2:1/4x,3:1/8x]
SplitLock: 0
DdrtQosMode: 0
ClockModulationEn: 2 (AUTO)
KtiFpgaEnable (per socket): S0: 2 S1: 2 S2: 2 S3: 2
StackDisableBitMap (per socket): S0: 0x0 S1: 0x0 S2: 0x0 S3: 0x0
KtiCrcMode: 0 (16BIT)
KtiCpuSktHotPlugEn: 0
KtiCpuSktHotPlugTopology: 0 (4S)
KtiSkuMismatchCheck: 1
MctpBusOwner: 0 (PCH SPS as Bus Owner (Proxy))
KtiPortDisable (per port):
S0:0 0 0 0
S1:0 0 0 0
S2:0 0 0 0
S3:0 0 0 0
KtiLinkVnaOverride (per port):
S0:254 254 254 254
S1:254 254 254 254
S2:254 254 254 254
S3:254 254 254 254
KtiLinkSpeed (per port):
S0:7 7 7 7
S1:7 7 7 7
S2:7 7 7 7
S3:7 7 7 7
Rsvd (per port):
S0:0 0 0 0
S1:0 0 0 0
S2:0 0 0 0
S3:0 0 0 0
**KTI Setup Structure DfxParms **
DfxHaltLinkFailReset: 2 (AUTO)
DfxKtiMaxInitAbort: 2 (AUTO)
DfxLlcShareDrdCrd 2 (AUTO)
DfxBiasFwdMode: 5 (AUTO)
DfxSnoopFanoutEn: 2 (AUTO)
DfxHitMeEn: 2 (AUTO)
DfxFrcfwdinv 2 (AUTO)
DfxDbpEnable 2 (AUTO)
DfxCleanEvictAlwaysLive: 2 (AUTO)
DfxModifiedEvictAlwaysLive: 2 (AUTO)
DfxOsbEn 2 (AUTO)
DfxHitMeRfoDirsEn 2 (AUTO)
DfxGateOsbIodcAllocEn 2 (AUTO)
DfxDualLinksInterleavingMode 2 (AUTO)
DfxSystemDegradeMode: 1
DfxVn1En: 2 (AUTO)
DfxD2cEn: 2 (AUTO)
DfxD2kEn: 2 (AUTO)
DfxLockPrimary: 4 (AUTO)
DfxOsbLocRd: 2 (AUTO)
DfxOsbLocRdCur: 2 (AUTO)
DfxOsbRmtRd: 2 (AUTO)
DfxM3KtiCountMismatchEn: 2 (AUTO)
DfxSnoopFanoutChaInterleaveEn: 2 (AUTO)
DfxXptFifoEnabledCredit: 0x5
DfxMdfisTrainingEn: 2 (AUTO)
DfxClippedFreq: 23
DfxLlpEndcntClipped: 650
DfxLlpEndcntNonClipped: 576
DfxCxlSecLvl: 3 (AUTO)
DfxCxlStcge: 2 (AUTO)
DfxCxlSdcge: 2 (AUTO)
DfxCxlDlcge: 2 (AUTO)
DfxCxlLtcge: 2 (AUTO)
DfxCxlVid: 2 (AUTO)
DfxIioDfxEnabled: 0 (MANUAL)
DfxHqmEn: 2 (AUTO)
DfxRsfEnabledForDram: 2 (AUTO)
DfxS3mSoftStrap: 2 (AUTO)
DfxPmonConfig: 3 (AUTO)
DfxM2IosfPmonAccessControl: 2 (AUTO)
DfxMaxCache: 256 (AUTO)
DfxMaxCacheAtomic: 256 (AUTO)
DfxCtagEntryAvailMask: 256 (AUTO)
DfxXptPrefetchEn: 2 (AUTO)
DfxPrqBlockEn: 2 (AUTO)
DfxAeg0CounterLowVal: 65535 (AUTO)
DfxAeg0CounterHighVal: 65535 (AUTO)
DfxCrcMode (per port):
S0:2 (AUTO) 2 (AUTO) 2 (AUTO) 2 (AUTO)
S1:2 (AUTO) 2 (AUTO) 2 (AUTO) 2 (AUTO)
S2:2 (AUTO) 2 (AUTO) 2 (AUTO) 2 (AUTO)
S3:2 (AUTO) 2 (AUTO) 2 (AUTO) 2 (AUTO)
DfxL0pEnable (per port):
S0:2 (AUTO) 2 (AUTO) 2 (AUTO) 2 (AUTO)
S1:2 (AUTO) 2 (AUTO) 2 (AUTO) 2 (AUTO)
S2:2 (AUTO) 2 (AUTO) 2 (AUTO) 2 (AUTO)
S3:2 (AUTO) 2 (AUTO) 2 (AUTO) 2 (AUTO)
DfxL1Enable (per port):
S0:2 (AUTO) 2 (AUTO) 2 (AUTO) 2 (AUTO)
S1:2 (AUTO) 2 (AUTO) 2 (AUTO) 2 (AUTO)
S2:2 (AUTO) 2 (AUTO) 2 (AUTO) 2 (AUTO)
S3:2 (AUTO) 2 (AUTO) 2 (AUTO) 2 (AUTO)
DfxKtiFailoverEn (per port):
S0:2 (AUTO) 2 (AUTO) 2 (AUTO) 2 (AUTO)
S1:2 (AUTO) 2 (AUTO) 2 (AUTO) 2 (AUTO)
S2:2 (AUTO) 2 (AUTO) 2 (AUTO) 2 (AUTO)
S3:2 (AUTO) 2 (AUTO) 2 (AUTO) 2 (AUTO)
**Common Setup Structure**
mmCfgBase: 6 (AUTO)
mmCfgSize: 6 (AUTO)
mmiohBase: 0x00002000
CpuPaLimit: 0
mmiohSize: 3 (64GB per stack)
numaEn: 1
UmaClustering: 4
isocEn: 0
dcaEn: 0
**Common Var Structure **
resetRequired: 0
state: 0
numCpus: 0
socketPresentBitMap: 0x01
mmCfgBase: 0x80000000
meRequestedSize: 0
******* Collecting Early System Information - START *******
SBSP Socket: 0 Ways: 0x01 Ras: 0x06 Stepping: 0x04 DieCount: 4 Chop: XCC
Total Chas: 52 Cha List Map:
Cha List[0]: 0xBFCFF9FF
Cha List[1]: 0x0FEBFBFF
Total M3Kti: 04 Total KtiAgent: 04 Total M2M: 20 M2M list map: 0x000FFFFF
Current bus numbers:
Socket | Ins00 | Ins01 | Ins02 | Ins03 | Ins04 | Ins05 | Ins06 | Ins07 | Ins08 | Ins09 | Ins0A | Ins0B | Rsvd | Ubox0 | Ubox1 | LastBus | Seg
-----------------------------------------------------------------------------------------------------------------------------------------------
0 | 0x00 | 0x11 | 0x12 | 0x13 | 0x14 | 0x15 | 0x16 | 0x17 | 0x18 | 0x19 | 0x1A | 0x1B | --- | 0x1E | 0x1F | 0x1F | 0
1 | 0x20 | 0x21 | 0x22 | 0x23 | 0x24 | 0x25 | 0x26 | 0x27 | 0x28 | 0x29 | 0x2A | 0x2B | --- | 0x3E | 0x3F | 0x3F | 0
2 | 0x40 | 0x41 | 0x42 | 0x43 | 0x44 | 0x45 | 0x46 | 0x47 | 0x48 | 0x49 | 0x4A | 0x4B | --- | 0x5E | 0x5F | 0x5F | 0
3 | 0x60 | 0x61 | 0x62 | 0x63 | 0x64 | 0x65 | 0x66 | 0x67 | 0x68 | 0x69 | 0x6A | 0x6B | --- | 0x7E | 0x7F | 0x7F | 0
-----------------------------------------------------------------------------------------------------------------------------------------------
Assuming maximal config: TotCpus: 4 CpuList: 0x0F
Default UpiInterleaveMode: 0
Reset Type: Warm Reset
******* Collecting Early System Information - END *******
(Spr) UpiIpWrInit
MaxSocket 4, MaxKtiPort 4
UpiIpWrSingleInit
IpUpiIpInit(UpiAgent[0][0]):
UpiIpWrSingleInit
IpUpiIpInit(UpiAgent[0][1]):
UpiIpWrSingleInit
IpUpiIpInit(UpiAgent[0][2]):
UpiIpWrSingleInit
IpUpiIpInit(UpiAgent[0][3]):
UpiIpWrSingleInit
IpUpiIpInit(UpiAgent[1][0]):
UpiIpWrSingleInit
IpUpiIpInit(UpiAgent[1][1]):
UpiIpWrSingleInit
IpUpiIpInit(UpiAgent[1][2]):
UpiIpWrSingleInit
IpUpiIpInit(UpiAgent[1][3]):
UpiIpWrSingleInit
IpUpiIpInit(UpiAgent[2][0]):
UpiIpWrSingleInit
IpUpiIpInit(UpiAgent[2][1]):
UpiIpWrSingleInit
IpUpiIpInit(UpiAgent[2][2]):
UpiIpWrSingleInit
IpUpiIpInit(UpiAgent[2][3]):
UpiIpWrSingleInit
IpUpiIpInit(UpiAgent[3][0]):
UpiIpWrSingleInit
IpUpiIpInit(UpiAgent[3][1]):
UpiIpWrSingleInit
IpUpiIpInit(UpiAgent[3][2]):
UpiIpWrSingleInit
IpUpiIpInit(UpiAgent[3][3]):
******* Setting up Minimum Path - START *******
Constructing SBSP minimum path Topology Tree
--------------------------------------------
Adding SBSP (CPU0) to the tree
CPU0 Link Exchange
: LEP0(0,CPU1) Socket 0 Port 0:Primary - Peer Socket 1 Port 0 Secondary
: LEP1(1,CPU1) Socket 0 Port 1:Primary - Peer Socket 1 Port 1 Secondary
: LEP2(2,CPU1) Socket 0 Port 2:Primary - Peer Socket 1 Port 2 Secondary
: LEP3(3,CPU1) Socket 0 Port 3:Primary - Peer Socket 1 Port 3 Secondary
Adding CPU1 to the tree
Setting path between SBSP and CPU1.
In SBSP setting route to CPU1 using port 0.
In CPU1 using port 0 to set the M2UPCIe0 route.
CPU1 Link Exchange
: LEP0(0,CPU0) : LEP1(1,CPU0) : LEP2(2,CPU0) : LEP3(3,CPU0)
Setting boot path for CPU1
In CPU1 setting Cbo route to port 0
Socket[2] is removed
Socket[3] is removed
SBSP Minimum Path Tree
----------------------
Index Socket ParentPort Hop ParentIndex
00 CPU0 -- 0 --
01 CPU1 00 1 00
******* Setting up Minimum Path - END *******
******* Check for KTI Topology Degradation - START *******
Link Exchange Parameter
-----------------------
CPU0 : LEP0(0:CPU1) : LEP1(1:CPU1) : LEP2(2:CPU1) : LEP3(3:CPU1)
CPU1 : LEP0(0:CPU0) : LEP1(1:CPU0) : LEP2(2:CPU0) : LEP3(3:CPU0)
Already Reduced to Supported Topology
System will be treated 2S4L Configuration
******* Check for KTI Topology Degradation - END *******
******* Enable UBOX MMIO Addr Range - START *******
Current Bars:
Socket | SCF | PCU | MEM0 | MEM1 | MEM2 | MEM3 | MEM4 | MEM5 | MEM6 | MEM7 | SBREG |
-------------------------------------------------------------------------------------------------------------------------------------------------------
0 | 0xF8000000 | 0xF8200000 | 0xF8280000 | 0xF8300000 | 0xF8380000 | 0xF8400000 | 0xF8480000 | 0xF8500000 | 0xF8580000 | 0xF8600000 | 0xF8680000 |
1 | 0xF8800000 | 0xF8A00000 | 0xF8A80000 | 0xF8B00000 | 0xF8B80000 | 0xF8C00000 | 0xF8C80000 | 0xF8D00000 | 0xF8D80000 | 0xF8E00000 | 0xF8E80000 |
2 | 0xF9000000 | 0xF9200000 | 0xF9280000 | 0xF9300000 | 0xF9380000 | 0xF9400000 | 0xF9480000 | 0xF9500000 | 0xF9580000 | 0xF9600000 | 0xF9680000 |
3 | 0xF9800000 | 0xF9A00000 | 0xF9A80000 | 0xF9B00000 | 0xF9B80000 | 0xF9C00000 | 0xF9C80000 | 0xF9D00000 | 0xF9D80000 | 0xF9E00000 | 0xF9E80000 |
-------------------------------------------------------------------------------------------------------------------------------------------------------
******* Enable UBOX MMIO Addr Range - END *******
******* Process Straps Config - START *******
S3M Read SoftStrap Disabled, Exit.
******* Process Straps Config - END *******
******* Detecting IIO count - START *******
Socket 0 Stack Bitmap:F3F.
Stack Instance Bitmap:F3F.
IioCount: 10.
B2HotCount(LS): 00.
Socket 1 Stack Bitmap:F3F.
Stack Instance Bitmap:F3F.
IioCount: 10.
B2HotCount(LS): 00.
******* Detecting IIO count - END *******
******* Disable UBOX MMIO Addr Range - START *******
Current Bars:
Socket | SCF | PCU | MEM0 | MEM1 | MEM2 | MEM3 | MEM4 | MEM5 | MEM6 | MEM7 | SBREG |
-------------------------------------------------------------------------------------------------------------------------------------------------------
0 | 0x00000000 | 0x00000000 | 0x00000000 | 0x00000000 | 0x00000000 | 0x00000000 | 0x00000000 | 0x00000000 | 0x00000000 | 0x00000000 | 0x00000000 |
1 | 0x00000000 | 0x00000000 | 0x00000000 | 0x00000000 | 0x00000000 | 0x00000000 | 0x00000000 | 0x00000000 | 0x00000000 | 0x00000000 | 0x00000000 |
2 | 0x00000000 | 0x00000000 | 0x00000000 | 0x00000000 | 0x00000000 | 0x00000000 | 0x00000000 | 0x00000000 | 0x00000000 | 0x00000000 | 0x00000000 |
3 | 0x00000000 | 0x00000000 | 0x00000000 | 0x00000000 | 0x00000000 | 0x00000000 | 0x00000000 | 0x00000000 | 0x00000000 | 0x00000000 | 0x00000000 |
-------------------------------------------------------------------------------------------------------------------------------------------------------
******* Disable UBOX MMIO Addr Range - END *******
******* Checking KTIRC Input Structure - START *******
Desired MMCFG Config: Base = 0x80000000, Size = 0x10000000
OutSncPrefetchEn=4, OutSncEn=4
IpUpiGetCapability(UpiAgent[0][0], id=12):
IpUpiVersionSpecificConfigurationEnabled: unknown ID=2
IpWrError 0 49
IpUpiGetCapability(UpiAgent[0][0], id=7):
IpUpiGetCapability(UpiAgent[0][0], id=9):
IpUpiGetCapability(UpiAgent[0][0], id=10):
IpUpiGetCapability(UpiAgent[0][0], id=8):
IpUpiGetCapability(UpiAgent[0][1], id=12):
IpUpiVersionSpecificConfigurationEnabled: unknown ID=2
IpWrError 0 49
IpUpiGetCapability(UpiAgent[0][1], id=7):
IpUpiGetCapability(UpiAgent[0][1], id=9):
IpUpiGetCapability(UpiAgent[0][1], id=10):
IpUpiGetCapability(UpiAgent[0][1], id=8):
IpUpiGetCapability(UpiAgent[0][2], id=12):
IpUpiVersionSpecificConfigurationEnabled: unknown ID=2
IpWrError 0 49
IpUpiGetCapability(UpiAgent[0][2], id=7):
IpUpiGetCapability(UpiAgent[0][2], id=9):
IpUpiGetCapability(UpiAgent[0][2], id=10):
IpUpiGetCapability(UpiAgent[0][2], id=8):
IpUpiGetCapability(UpiAgent[0][3], id=12):
IpUpiVersionSpecificConfigurationEnabled: unknown ID=2
IpWrError 0 49
IpUpiGetCapability(UpiAgent[0][3], id=7):
IpUpiGetCapability(UpiAgent[0][3], id=9):
IpUpiGetCapability(UpiAgent[0][3], id=10):
IpUpiGetCapability(UpiAgent[0][3], id=8):
IpUpiGetCapability(UpiAgent[1][0], id=12):
IpUpiVersionSpecificConfigurationEnabled: unknown ID=2
IpWrError 0 49
IpUpiGetCapability(UpiAgent[1][0], id=7):
IpUpiGetCapability(UpiAgent[1][0], id=9):
IpUpiGetCapability(UpiAgent[1][0], id=10):
IpUpiGetCapability(UpiAgent[1][0], id=8):
IpUpiGetCapability(UpiAgent[1][1], id=12):
IpUpiVersionSpecificConfigurationEnabled: unknown ID=2
IpWrError 0 49
IpUpiGetCapability(UpiAgent[1][1], id=7):
IpUpiGetCapability(UpiAgent[1][1], id=9):
IpUpiGetCapability(UpiAgent[1][1], id=10):
IpUpiGetCapability(UpiAgent[1][1], id=8):
IpUpiGetCapability(UpiAgent[1][2], id=12):
IpUpiVersionSpecificConfigurationEnabled: unknown ID=2
IpWrError 0 49
IpUpiGetCapability(UpiAgent[1][2], id=7):
IpUpiGetCapability(UpiAgent[1][2], id=9):
IpUpiGetCapability(UpiAgent[1][2], id=10):
IpUpiGetCapability(UpiAgent[1][2], id=8):
IpUpiGetCapability(UpiAgent[1][3], id=12):
IpUpiVersionSpecificConfigurationEnabled: unknown ID=2
IpWrError 0 49
IpUpiGetCapability(UpiAgent[1][3], id=7):
IpUpiGetCapability(UpiAgent[1][3], id=9):
IpUpiGetCapability(UpiAgent[1][3], id=10):
IpUpiGetCapability(UpiAgent[1][3], id=8):
****** Selecting KTI freq. - START ******
Max supported KTI Speed requested: 16.0 GT/s
Selected KTI Freq is 16.0 GT/s
****** Selecting KTI freq. - END ******
MaxAddress=52
******* Checking KTIRC Input Structure - END *******
******* KTI NVRAM Verification - START *******
******* KTI NVRAM Verification - END *******
******* Calculate Resource Allocation - START *******
S0 - AddressMap.hi=209F
S1 - AddressMap.hi=21BF
BitPos=2E
CPU Resource Allocation
--------------------------------------------------------------------------------------------------------------------------------------------------------------
| StkId | Seg | Bus | Io | IoApic | Mmiol | Mmioh | StkBmp |
--------------------------------------------------------------------------------------------------------------------------------------------------------------
CPU0 | | 0 | 0x00 - 0x7F | 0x0000 - 0x9FFF | 0xFEC00000 - 0xFECFFFFF | 0x90000000 - 0xC8FFFFFF | 0x00002000 00000000 - 0x0000209F FFFFFFFF | 0xF3F |
Ins00 | 0x00 | 0 | 0x00 - 0x14 | 0x0000 - 0x3FFF | 0xFEC00000 - 0xFECFFFFF | 0x90000000 - 0x957FFFFF | 0x00002000 00000000 - 0x0000200F FFFFFFFF | |
Ins01 | 0x01 | 0 | 0x15 - 0x25 | 0x4000 - 0x5FFF | 0xFFFFFFFF - 0x00000000 | 0x95800000 - 0x9F7FFFFF | 0x00002010 00000000 - 0x0000201F FFFFFFFF | |
Ins02 | 0x04 | 0 | 0x26 - 0x36 | 0x6000 - 0x6FFF | 0xFFFFFFFF - 0x00000000 | 0x9F800000 - 0xA93FFFFF | 0x00002020 00000000 - 0x0000202F FFFFFFFF | |
Ins03 | 0x03 | 0 | 0x37 - 0x47 | 0x7000 - 0x7FFF | 0xFFFFFFFF - 0x00000000 | 0xA9400000 - 0xB2FFFFFF | 0x00002030 00000000 - 0x0000203F FFFFFFFF | |
Ins04 | 0x05 | 0 | 0x48 - 0x58 | 0x8000 - 0x8FFF | 0xFFFFFFFF - 0x00000000 | 0xB3000000 - 0xBCBFFFFF | 0x00002040 00000000 - 0x0000204F FFFFFFFF | |
Ins05 | 0x02 | 0 | 0x59 - 0x69 | 0x9000 - 0x9FFF | 0xFFFFFFFF - 0x00000000 | 0xBCC00000 - 0xC67FFFFF | 0x00002050 00000000 - 0x0000205F FFFFFFFF | |
Ins06 | 0x06 | 0 | 0xFF - 0x00 | 0xFFFF - 0x0000 | 0xFFFFFFFF - 0x00000000 | 0xFFFFFFFF - 0x00000000 | 0xFFFFFFFF FFFFFFFF - 0x00000000 00000000 | |
Ins07 | 0x07 | 0 | 0xFF - 0x00 | 0xFFFF - 0x0000 | 0xFFFFFFFF - 0x00000000 | 0xFFFFFFFF - 0x00000000 | 0xFFFFFFFF FFFFFFFF - 0x00000000 00000000 | |
Ins08 | 0x08 | 0 | 0x6A - 0x6E | 0xFFFF - 0x0000 | 0xFFFFFFFF - 0x00000000 | 0xC6800000 - 0xC6FFFFFF | 0x00002060 00000000 - 0x0000206F FFFFFFFF | |
Ins09 | 0x09 | 0 | 0x6F - 0x73 | 0xFFFF - 0x0000 | 0xFFFFFFFF - 0x00000000 | 0xC7000000 - 0xC77FFFFF | 0x00002070 00000000 - 0x0000207F FFFFFFFF | |
Ins10 | 0x0A | 0 | 0x74 - 0x78 | 0xFFFF - 0x0000 | 0xFFFFFFFF - 0x00000000 | 0xC7800000 - 0xC7FFFFFF | 0x00002080 00000000 - 0x0000208F FFFFFFFF | |
Ins11 | 0x0B | 0 | 0x79 - 0x7D | 0xFFFF - 0x0000 | 0xFFFFFFFF - 0x00000000 | 0xC8000000 - 0xC87FFFFF | 0x00002090 00000000 - 0x0000209F FFFFFFFF | |
Rsvd | 0x0C | 0 | 0xFB - 0xFD | 0xFFFF - 0x0000 | 0xFFFFFFFF - 0x00000000 | 0xFFFFFFFF - 0x00000000 | 0xFFFFFFFF FFFFFFFF - 0x00000000 00000000 | |
Ubox | 0x0D | 0 | 0x7E - 0x7F | 0xFFFF - 0x0000 | 0xFFFFFFFF - 0x00000000 | 0xC8800000 - 0xC8FFFFFF | 0xFFFFFFFF FFFFFFFF - 0x00000000 00000000 | |
CPU1 | | 0 | 0x80 - 0xFF | 0xA000 - 0xFFFF | 0xFFFFFFFF - 0x00000000 | 0xC9000000 - 0xFBFFFFFF | 0x000020A0 00000000 - 0x0000213F FFFFFFFF | 0xF3F |
Ins00 | 0x00 | 0 | 0x80 - 0x96 | 0xA000 - 0xAFFF | 0xFFFFFFFF - 0x00000000 | 0xC9000000 - 0xD13FFFFF | 0x000020A0 00000000 - 0x000020AF FFFFFFFF | |
Ins01 | 0x01 | 0 | 0x97 - 0xA6 | 0xB000 - 0xBFFF | 0xFFFFFFFF - 0x00000000 | 0xD1400000 - 0xD97FFFFF | 0x000020B0 00000000 - 0x000020BF FFFFFFFF | |
Ins02 | 0x04 | 0 | 0xA7 - 0xB6 | 0xC000 - 0xCFFF | 0xFFFFFFFF - 0x00000000 | 0xD9800000 - 0xE17FFFFF | 0x000020C0 00000000 - 0x000020CF FFFFFFFF | |
Ins03 | 0x03 | 0 | 0xB7 - 0xC6 | 0xD000 - 0xDFFF | 0xFFFFFFFF - 0x00000000 | 0xE1800000 - 0xE97FFFFF | 0x000020D0 00000000 - 0x000020DF FFFFFFFF | |
Ins04 | 0x05 | 0 | 0xC7 - 0xD6 | 0xE000 - 0xEFFF | 0xFFFFFFFF - 0x00000000 | 0xE9800000 - 0xF17FFFFF | 0x000020E0 00000000 - 0x000020EF FFFFFFFF | |
Ins05 | 0x02 | 0 | 0xD7 - 0xE6 | 0xF000 - 0xFFFF | 0xFFFFFFFF - 0x00000000 | 0xF1800000 - 0xF97FFFFF | 0x000020F0 00000000 - 0x000020FF FFFFFFFF | |
Ins06 | 0x06 | 0 | 0xFF - 0x00 | 0xFFFF - 0x0000 | 0xFFFFFFFF - 0x00000000 | 0xFFFFFFFF - 0x00000000 | 0xFFFFFFFF FFFFFFFF - 0x00000000 00000000 | |
Ins07 | 0x07 | 0 | 0xFF - 0x00 | 0xFFFF - 0x0000 | 0xFFFFFFFF - 0x00000000 | 0xFFFFFFFF - 0x00000000 | 0xFFFFFFFF FFFFFFFF - 0x00000000 00000000 | |
Ins08 | 0x08 | 0 | 0xE7 - 0xEB | 0xFFFF - 0x0000 | 0xFFFFFFFF - 0x00000000 | 0xF9800000 - 0xF9FFFFFF | 0x00002100 00000000 - 0x0000210F FFFFFFFF | |
Ins09 | 0x09 | 0 | 0xEC - 0xF0 | 0xFFFF - 0x0000 | 0xFFFFFFFF - 0x00000000 | 0xFA000000 - 0xFA7FFFFF | 0x00002110 00000000 - 0x0000211F FFFFFFFF | |
Ins10 | 0x0A | 0 | 0xF1 - 0xF5 | 0xFFFF - 0x0000 | 0xFFFFFFFF - 0x00000000 | 0xFA800000 - 0xFAFFFFFF | 0x00002120 00000000 - 0x0000212F FFFFFFFF | |
Ins11 | 0x0B | 0 | 0xF6 - 0xFA | 0xFFFF - 0x0000 | 0xFFFFFFFF - 0x00000000 | 0xFB000000 - 0xFB7FFFFF | 0x00002130 00000000 - 0x0000213F FFFFFFFF | |
Rsvd | 0x0C | 0 | 0xFB - 0xFD | 0xFFFF - 0x0000 | 0xFFFFFFFF - 0x00000000 | 0xFFFFFFFF - 0x00000000 | 0xFFFFFFFF FFFFFFFF - 0x00000000 00000000 | |
Ubox | 0x0D | 0 | 0xFE - 0xFF | 0xFFFF - 0x0000 | 0xFFFFFFFF - 0x00000000 | 0xFB800000 - 0xFBFFFFFF | 0xFFFFFFFF FFFFFFFF - 0x00000000 00000000 | |
******* Calculate Resource Allocation - END *******
******* Check for KTI Topology change across reset - START *******
******* Check for KTI Topology change across reset - END *******
******* Sync Up PBSPs - START *******
Setting Ubox Sticky to save KTI topology to 0x000000000000FF03
Verifying if the remote socket(s) checked-in.
packageBspStepping[0]=4
packageBspStepping[1]=4
******* Sync Up PBSPs - END *******
******* Program Mmcfg and bus numbers - START *******
Initiate S1 update
KtiVar->MmCfgBase = 0x80000000
KtiVar->segmentSocket[0] = 0x00
KtiVar->SocketFirstBus[0] = 0x00
KtiVar->SocketLastBus[0] = 0x7F
KtiVar->SocketMmCfgBase[0]= 0x80000000
KtiVar->segmentSocket[1] = 0x00
KtiVar->SocketFirstBus[1] = 0x80
KtiVar->SocketLastBus[1] = 0xFF
KtiVar->SocketMmCfgBase[1]= 0x80000000
Current bus numbers:
Socket | Ins00 | Ins01 | Ins02 | Ins03 | Ins04 | Ins05 | Ins06 | Ins07 | Ins08 | Ins09 | Ins0A | Ins0B | Rsvd | Ubox0 | Ubox1 | LastBus | Seg
-----------------------------------------------------------------------------------------------------------------------------------------------
0 | 0x00 | 0x15 | 0x26 | 0x37 | 0x48 | 0x59 | --- | --- | 0x6A | 0x6F | 0x74 | 0x79 | --- | 0x7E | 0x7F | 0x7F | 0
1 | 0x80 | 0x97 | 0xA7 | 0xB7 | 0xC7 | 0xD7 | --- | --- | 0xE7 | 0xEC | 0xF1 | 0xF6 | --- | 0xFE | 0xFF | 0xFF | 0
-----------------------------------------------------------------------------------------------------------------------------------------------
Wait for S1 to update
******* Program Mmcfg and bus numbers - END *******
Current Bars:
Socket | SCF | PCU | MEM0 | MEM1 | MEM2 | MEM3 | MEM4 | MEM5 | MEM6 | MEM7 | SBREG |
-------------------------------------------------------------------------------------------------------------------------------------------------------
0 | 0xC8800000 | 0xC8A00000 | 0xC8A80000 | 0xC8B00000 | 0xC8B80000 | 0xC8C00000 | 0xC8C80000 | 0xC8D00000 | 0xC8D80000 | 0xC8E00000 | 0xC8E80000 |
1 | 0xFB800000 | 0xFBA00000 | 0xFBA80000 | 0xFBB00000 | 0xFBB80000 | 0xFBC00000 | 0xFBC80000 | 0xFBD00000 | 0xFBD80000 | 0xFBE00000 | 0xFBE80000 |
-------------------------------------------------------------------------------------------------------------------------------------------------------
******* Full Speed Transition - START *******
Clearing KTI DFX Locks
****** S0p0 Program Eparams - START ******
S0 P0's Preset Coeff table, all lane table size: 0x0; per lane table size: 0x10
Per Lane Preset coeffcients Index table located for Socket 0 Link 0, RedriverStatus: 0
Socket 0 Port 0 : EPARAM entry programmed
IpUpiSetTxCoefficient(UpiAgent[0][0]): 4B01
****** S0p0 Program Eparams - END ******
****** S0p0 Program UniPhy Recipe - START ******
Socket 0 Port 0 : UPI EV Recipe v2.009 programmed
****** S0p0 Program UniPhy Recipe - END ******
IpUpiGetCapability(UpiAgent[0][0], id=12):
IpUpiVersionSpecificConfigurationEnabled: unknown ID=2
IpWrError 0 49
IpUpiSpeedChangePart1(UpiAgent[0][0]):
IpUpiVersionSpecificConfigurationEnabled: unknown ID=1
IpWrError 0 49
IpUpiVersionSpecificConfigurationEnabled: unknown ID=3
IpWrError 0 49
IpUpiVersionSpecificConfigurationEnabled: unknown ID=4
IpWrError 0 49
IpUpiVersionSpecificConfigurationEnabled: unknown ID=6
IpWrError 0 49
IpUpiDfxSetValue(0, 4, 0x8A)
****** S0p1 Program Eparams - START ******
S0 P1's Preset Coeff table, all lane table size: 0x0; per lane table size: 0x10
Per Lane Preset coeffcients Index table located for Socket 0 Link 1, RedriverStatus: 0
Socket 0 Port 1 : EPARAM entry programmed
IpUpiSetTxCoefficient(UpiAgent[0][1]): 4B01
****** S0p1 Program Eparams - END ******
****** S0p1 Program UniPhy Recipe - START ******
Socket 0 Port 1 : UPI EV Recipe v2.009 programmed
****** S0p1 Program UniPhy Recipe - END ******
IpUpiGetCapability(UpiAgent[0][1], id=12):
IpUpiVersionSpecificConfigurationEnabled: unknown ID=2
IpWrError 0 49
IpUpiSpeedChangePart1(UpiAgent[0][1]):
IpUpiVersionSpecificConfigurationEnabled: unknown ID=1
IpWrError 0 49
IpUpiVersionSpecificConfigurationEnabled: unknown ID=3
IpWrError 0 49
IpUpiVersionSpecificConfigurationEnabled: unknown ID=4
IpWrError 0 49
IpUpiVersionSpecificConfigurationEnabled: unknown ID=6
IpWrError 0 49
IpUpiDfxSetValue(0, 4, 0x8A)
****** S0p2 Program Eparams - START ******
S0 P2's Preset Coeff table, all lane table size: 0x0; per lane table size: 0x10
Per Lane Preset coeffcients Index table located for Socket 0 Link 2, RedriverStatus: 0
Socket 0 Port 2 : EPARAM entry programmed
IpUpiSetTxCoefficient(UpiAgent[0][2]): 4B01
****** S0p2 Program Eparams - END ******
****** S0p2 Program UniPhy Recipe - START ******
Socket 0 Port 2 : UPI EV Recipe v2.009 programmed
****** S0p2 Program UniPhy Recipe - END ******
IpUpiGetCapability(UpiAgent[0][2], id=12):
IpUpiVersionSpecificConfigurationEnabled: unknown ID=2
IpWrError 0 49
IpUpiSpeedChangePart1(UpiAgent[0][2]):
IpUpiVersionSpecificConfigurationEnabled: unknown ID=1
IpWrError 0 49
IpUpiVersionSpecificConfigurationEnabled: unknown ID=3
IpWrError 0 49
IpUpiVersionSpecificConfigurationEnabled: unknown ID=4
IpWrError 0 49
IpUpiVersionSpecificConfigurationEnabled: unknown ID=6
IpWrError 0 49
IpUpiDfxSetValue(0, 4, 0x8A)
****** S0p3 Program Eparams - START ******
S0 P3's Preset Coeff table, all lane table size: 0x0; per lane table size: 0x10
Per Lane Preset coeffcients Index table located for Socket 0 Link 3, RedriverStatus: 0
Socket 0 Port 3 : EPARAM entry programmed
IpUpiSetTxCoefficient(UpiAgent[0][3]): 4B01
****** S0p3 Program Eparams - END ******
****** S0p3 Program UniPhy Recipe - START ******
Socket 0 Port 3 : UPI EV Recipe v2.009 programmed
****** S0p3 Program UniPhy Recipe - END ******
IpUpiGetCapability(UpiAgent[0][3], id=12):
IpUpiVersionSpecificConfigurationEnabled: unknown ID=2
IpWrError 0 49
IpUpiSpeedChangePart1(UpiAgent[0][3]):
IpUpiVersionSpecificConfigurationEnabled: unknown ID=1
IpWrError 0 49
IpUpiVersionSpecificConfigurationEnabled: unknown ID=3
IpWrError 0 49
IpUpiVersionSpecificConfigurationEnabled: unknown ID=4
IpWrError 0 49
IpUpiVersionSpecificConfigurationEnabled: unknown ID=6
IpWrError 0 49
IpUpiDfxSetValue(0, 4, 0x8A)
****** S1p0 Program Eparams - START ******
S1 P0's Preset Coeff table, all lane table size: 0x0; per lane table size: 0x10
Per Lane Preset coeffcients Index table located for Socket 1 Link 0, RedriverStatus: 0
Socket 1 Port 0 : EPARAM entry programmed
IpUpiSetTxCoefficient(UpiAgent[1][0]): 4B01
****** S1p0 Program Eparams - END ******
****** S1p0 Program UniPhy Recipe - START ******
Socket 1 Port 0 : UPI EV Recipe v2.009 programmed
****** S1p0 Program UniPhy Recipe - END ******
IpUpiGetCapability(UpiAgent[1][0], id=12):
IpUpiVersionSpecificConfigurationEnabled: unknown ID=2
IpWrError 0 49
IpUpiSpeedChangePart1(UpiAgent[1][0]):
IpUpiVersionSpecificConfigurationEnabled: unknown ID=1
IpWrError 0 49
IpUpiVersionSpecificConfigurationEnabled: unknown ID=3
IpWrError 0 49
IpUpiVersionSpecificConfigurationEnabled: unknown ID=4
IpWrError 0 49
IpUpiVersionSpecificConfigurationEnabled: unknown ID=6
IpWrError 0 49
IpUpiDfxSetValue(0, 4, 0x8A)
****** S1p1 Program Eparams - START ******
S1 P1's Preset Coeff table, all lane table size: 0x0; per lane table size: 0x10
Per Lane Preset coeffcients Index table located for Socket 1 Link 1, RedriverStatus: 0
Socket 1 Port 1 : EPARAM entry programmed
IpUpiSetTxCoefficient(UpiAgent[1][1]): 4B01
****** S1p1 Program Eparams - END ******
****** S1p1 Program UniPhy Recipe - START ******
Socket 1 Port 1 : UPI EV Recipe v2.009 programmed
****** S1p1 Program UniPhy Recipe - END ******
IpUpiGetCapability(UpiAgent[1][1], id=12):
IpUpiVersionSpecificConfigurationEnabled: unknown ID=2
IpWrError 0 49
IpUpiSpeedChangePart1(UpiAgent[1][1]):
IpUpiVersionSpecificConfigurationEnabled: unknown ID=1
IpWrError 0 49
IpUpiVersionSpecificConfigurationEnabled: unknown ID=3
IpWrError 0 49
IpUpiVersionSpecificConfigurationEnabled: unknown ID=4
IpWrError 0 49
IpUpiVersionSpecificConfigurationEnabled: unknown ID=6
IpWrError 0 49
IpUpiDfxSetValue(0, 4, 0x8A)
****** S1p2 Program Eparams - START ******
S1 P2's Preset Coeff table, all lane table size: 0x0; per lane table size: 0x10
Per Lane Preset coeffcients Index table located for Socket 1 Link 2, RedriverStatus: 0
Socket 1 Port 2 : EPARAM entry programmed
IpUpiSetTxCoefficient(UpiAgent[1][2]): 4B01
****** S1p2 Program Eparams - END ******
****** S1p2 Program UniPhy Recipe - START ******
Socket 1 Port 2 : UPI EV Recipe v2.009 programmed
****** S1p2 Program UniPhy Recipe - END ******
IpUpiGetCapability(UpiAgent[1][2], id=12):
IpUpiVersionSpecificConfigurationEnabled: unknown ID=2
IpWrError 0 49
IpUpiSpeedChangePart1(UpiAgent[1][2]):
IpUpiVersionSpecificConfigurationEnabled: unknown ID=1
IpWrError 0 49
IpUpiVersionSpecificConfigurationEnabled: unknown ID=3
IpWrError 0 49
IpUpiVersionSpecificConfigurationEnabled: unknown ID=4
IpWrError 0 49
IpUpiVersionSpecificConfigurationEnabled: unknown ID=6
IpWrError 0 49
IpUpiDfxSetValue(0, 4, 0x8A)
****** S1p3 Program Eparams - START ******
S1 P3's Preset Coeff table, all lane table size: 0x0; per lane table size: 0x10
Per Lane Preset coeffcients Index table located for Socket 1 Link 3, RedriverStatus: 0
Socket 1 Port 3 : EPARAM entry programmed
IpUpiSetTxCoefficient(UpiAgent[1][3]): 4B01
****** S1p3 Program Eparams - END ******
****** S1p3 Program UniPhy Recipe - START ******
Socket 1 Port 3 : UPI EV Recipe v2.009 programmed
****** S1p3 Program UniPhy Recipe - END ******
IpUpiGetCapability(UpiAgent[1][3], id=12):
IpUpiVersionSpecificConfigurationEnabled: unknown ID=2
IpWrError 0 49
IpUpiSpeedChangePart1(UpiAgent[1][3]):
IpUpiVersionSpecificConfigurationEnabled: unknown ID=1
IpWrError 0 49
IpUpiVersionSpecificConfigurationEnabled: unknown ID=3
IpWrError 0 49
IpUpiVersionSpecificConfigurationEnabled: unknown ID=4
IpWrError 0 49
IpUpiVersionSpecificConfigurationEnabled: unknown ID=6
IpWrError 0 49
IpUpiDfxSetValue(0, 4, 0x8A)
Dispatching the APs to do Kti Speed Transition.
Dispatching the AP 1's for switching to the AllLinksRatio: 14141414IpUpiSpeedChangePart2(UpiAgent[0][0]):
IpUpiSpeedChangePart2a(UpiAgent[0][0]):
IpUpiSpeedChangePart2b(UpiAgent[0][0]):
IpUpiSpeedChangePart2(UpiAgent[0][1]):
IpUpiSpeedChangePart2a(UpiAgent[0][1]):
IpUpiSpeedChangePart2b(UpiAgent[0][1]):
IpUpiSpeedChangePart2(UpiAgent[0][2]):
IpUpiSpeedChangePart2a(UpiAgent[0][2]):
IpUpiSpeedChangePart2b(UpiAgent[0][2]):
IpUpiSpeedChangePart2(UpiAgent[0][3]):
IpUpiSpeedChangePart2a(UpiAgent[0][3]):
IpUpiSpeedChangePart2b(UpiAgent[0][3]):
IpUpiSpeedChangePart3(UpiAgent[0][0]):
IpUpiSpeedChangePart3(UpiAgent[0][1]):
IpUpiSpeedChangePart3(UpiAgent[0][2]):
IpUpiSpeedChangePart3(UpiAgent[0][3]):
Socket 0 KTI Link 0 Freq is currently 16.0GT.
Socket 0 KTI Link 1 Freq is currently 16.0GT.
Socket 0 KTI Link 2 Freq is currently 16.0GT.
Socket 0 KTI Link 3 Freq is currently 16.0GT.
Socket 1 KTI Link 0 Freq is currently 16.0GT.
Socket 1 KTI Link 1 Freq is currently 16.0GT.
Socket 1 KTI Link 2 Freq is currently 16.0GT.
Socket 1 KTI Link 3 Freq is currently 16.0GT.
******* Full Speed Transition - END *******
******* Phy/Link Updates On Warm Reset - START *******
******* Phy/Link Updates On Warm Reset - END *******
******* Topology Discovery and Optimum Route Calculation - START *******
Locating the Rings Present in the Topology
No Rings Found
Constructing Topology Tree
Adjacency Table
----------------
S0 P0 VN0 TX (00) : S1 P0 VN0 RX (17)
S0 P0 VN0 RX (01) :
S1 P0 VN0 TX (16) : S0 P0 VN0 RX (01)
S1 P0 VN0 RX (17) :
Checking for Deadlock...
CPU0 Topology Tree
-------------------
Index Socket ParentSocket ParentPort ParentIndex Hop XOR
00 CPU0 -- -- -- 0 --
01 CPU1 CPU0 00 00 1 0
CPU1 Topology Tree
-------------------
Index Socket ParentSocket ParentPort ParentIndex Hop XOR
00 CPU1 -- -- -- 0 --
01 CPU0 CPU1 00 00 1 0
"S0 P0 VN0 TX" -> "S1 P0 VN0 RX";
"S1 P0 VN0 TX" -> "S0 P0 VN0 RX";
Calculating Route for CPU0
Calculating Route for CPU1
CPU0 Routing Table (UPI_ROUTING_TABLE*_CHA)
----------------------------------------------------
DestSocket Port
CPU1 0
1
2
3
CPU1 Routing Table (UPI_ROUTING_TABLE*_CHA)
----------------------------------------------------
DestSocket Port
CPU0 0
1
2
3
CPU0 M3KTI Route Table (M3KKRT*_M3KTI_MAIN_REG)
----------------------------------------------------------------
InPort M3KtiNum CPU0 CPU1 CPU2 CPU3 CPU4 CPU5 CPU6 CPU7
0 0 3 0 - -
1 1 3 0 - -
2 2 3 0 - -
3 3 3 0 - -
CPU1 M3KTI Route Table (M3KKRT*_M3KTI_MAIN_REG)
----------------------------------------------------------------
InPort M3KtiNum CPU0 CPU1 CPU2 CPU3 CPU4 CPU5 CPU6 CPU7
0 0 0 3 - -
1 1 0 3 - -
2 2 0 3 - -
3 3 0 3 - -
******* Topology Discovery and Optimum Route Calculation - END *******
******* Program Final IO SAD Setting - START *******
Current Bars:
Socket | SCF | PCU | MEM0 | MEM1 | MEM2 | MEM3 | MEM4 | MEM5 | MEM6 | MEM7 | SBREG |
-------------------------------------------------------------------------------------------------------------------------------------------------------
0 | 0xC8800000 | 0xC8A00000 | 0xC8A80000 | 0xC8B00000 | 0xC8B80000 | 0xC8C00000 | 0xC8C80000 | 0xC8D00000 | 0xC8D80000 | 0xC8E00000 | 0xC8E80000 |
1 | 0xFB800000 | 0xFBA00000 | 0xFBA80000 | 0xFBB00000 | 0xFBB80000 | 0xFBC00000 | 0xFBC80000 | 0xFBD00000 | 0xFBD80000 | 0xFBE00000 | 0xFBE80000 |
-------------------------------------------------------------------------------------------------------------------------------------------------------
******* Program Final IO SAD Setting - END *******
******* Program Optimum Route Table Settings - START *******
[WARNING]: S0 StackIdx:0 Read of side band register R2PGNCTRL returned 0
[WARNING]: S0 StackIdx:1 Read of side band register R2PGNCTRL returned 0
[WARNING]: S0 StackIdx:2 Read of side band register R2PGNCTRL returned 0
[WARNING]: S0 StackIdx:3 Read of side band register R2PGNCTRL returned 0
[WARNING]: S0 StackIdx:4 Read of side band register R2PGNCTRL returned 0
[WARNING]: S0 StackIdx:5 Read of side band register R2PGNCTRL returned 0
[WARNING]: S0 StackIdx:8 Read of side band register R2PGNCTRL returned 0
[WARNING]: S0 StackIdx:9 Read of side band register R2PGNCTRL returned 0
[WARNING]: S0 StackIdx:10 Read of side band register R2PGNCTRL returned 0
[WARNING]: S0 StackIdx:11 Read of side band register R2PGNCTRL returned 0
[WARNING]: S1 StackIdx:0 Read of side band register R2PGNCTRL returned 0
[WARNING]: S1 StackIdx:1 Read of side band register R2PGNCTRL returned 0
[WARNING]: S1 StackIdx:2 Read of side band register R2PGNCTRL returned 0
[WARNING]: S1 StackIdx:3 Read of side band register R2PGNCTRL returned 0
[WARNING]: S1 StackIdx:4 Read of side band register R2PGNCTRL returned 0
[WARNING]: S1 StackIdx:5 Read of side band register R2PGNCTRL returned 0
[WARNING]: S1 StackIdx:8 Read of side band register R2PGNCTRL returned 0
[WARNING]: S1 StackIdx:9 Read of side band register R2PGNCTRL returned 0
[WARNING]: S1 StackIdx:10 Read of side band register R2PGNCTRL returned 0
[WARNING]: S1 StackIdx:11 Read of side band register R2PGNCTRL returned 0
******* Program Optimum Route Table Settings - END *******
******* Program Misc. KTI Parameters - START *******
Dispatching the AP 1's for m2upi meshcreditupdate: FBE8000F
******* Program Misc. KTI Parameters - END *******
******* Program System Coherency Registers - START *******
******* Program System Coherency Registers - END *******
******* Check for S3 Resume - START *******
******* Check for S3 Resume - END *******
******* SNC Misc and Recovery - START *******
OutNumOfCluster = 4, FullSncEnable=1, SncIndEnable=1, NumClusters=3
OutNumOfCluster = 4, FullSncEnable=1, SncIndEnable=1, NumClusters=3
******* SNC Misc and Recovery - END *******
******* Collect Previous Boot Error - START *******
******* Collect Previous Boot Error - END *******
Setup Uncore Misc:
Write Socket 0 GLOBAL_PKG_C_S_CONTROL_REGISTER = 4
Write Socket 1 GLOBAL_PKG_C_S_CONTROL_REGISTER = 100
:INIT - BIOS_RESET_CPL: Set CPL1 on #S1
:INIT - BIOS_RESET_CPL: Set CPL1 on #S0
Initalize DMI RCRB region.
SetRcrbBar (): RcrbBase = 0x90000000
Warning: Created a Memory Hole: 0x90002000 ~ 0x9001FFFF
MEMBAR0: Base = 0x90020000, Size = 0x20000
Socket: 0;DMI MemBar locates on 0x90020000, Size: 0x20000
ProgramSncConfigureInChaBeforeMemoryReady
Socket0: NumOfCluster=4, UmaEn=0, BaseChaOfCluster1=13, BaseChaOfCluster2=26, BaseChaOfCluster3=39
Socket1: NumOfCluster=4, UmaEn=0, BaseChaOfCluster1=13, BaseChaOfCluster2=26, BaseChaOfCluster3=39
******* Configure M2IOSF P2P Credits - START *******
Soc 0, Shared P2P BL VNA credits: 59595959, 5959, 59595959, 61616161.
Soc 1, Shared P2P BL VNA credits: 59595959, 5959, 59595959, 61616161.
******* Configure M2IOSF P2P Credits - END *******
*******SOCKET1 STACKID SWAPPING - START *******
*******SOCKET1 STACKID SWAPPING - END *******
Current bus numbers:
Socket | Ins00 | Ins01 | Ins02 | Ins03 | Ins04 | Ins05 | Ins06 | Ins07 | Ins08 | Ins09 | Ins0A | Ins0B | Rsvd | Ubox0 | Ubox1 | LastBus | Seg
-----------------------------------------------------------------------------------------------------------------------------------------------
0 | 0x00 | 0x15 | 0x26 | 0x37 | 0x48 | 0x59 | --- | --- | 0x6A | 0x6F | 0x74 | 0x79 | --- | 0x7E | 0x7F | 0x7F | 0
1 | --- | 0x97 | 0xA7 | 0xB7 | 0xC7 | 0xD7 | 0x80 | --- | 0xE7 | 0xEC | 0xF1 | 0xF6 | --- | 0xFE | 0xFF | 0xFF | 0
-----------------------------------------------------------------------------------------------------------------------------------------------
Get FM_PCIE_FV_BIF_EN Status = Success, GpioVal = 0
******* Initialize CXL - START *******
CXL: IIO EarlyLink Init Start.
HcxType[0] = NONE
[IIO](VMD) [0] VMD disabled for RPs init.
Program HW_INIT using SB access
Program HW_INIT using SB access
Program HW_INIT using SB access
Program HW_INIT using SB access
Program HW_INIT using SB access
Program HW_INIT using SB access
Program HW_INIT using SB access
Program HW_INIT using SB access
Program HW_INIT using SB access
[0] Cpxsmb enabled
MS2IOSF_BANK_DECODER_INIT_START
MS2IOSF BankDecoder: TableSize 119, Recipe Revision 1.16
Hiding DSA Psf1DsaConfig: 0
Hiding DSA Psf1DsaConfig: 0
Hiding DSA Psf1DsaConfig: 0
Hiding DSA Psf1DsaConfig: 0
Hiding DSA Psf1DsaConfig: 100
Hiding DSA Psf1DsaConfig: 100
Hiding DSA Psf1DsaConfig: 100
Hiding DSA Psf1DsaConfig: 100
Hiding DSA Psf1DsaConfig: 100
Hiding DSA Psf1DsaConfig: 100
Hiding DSA Psf1DsaConfig: 100
Hiding DSA Psf1DsaConfig: 100
Hiding DSA Psf1DsaConfig: 100
Hiding DSA Psf1DsaConfig: 100
Hiding DSA Psf1DsaConfig: 100
Hiding DSA Psf1DsaConfig: 100
Hiding DSA Psf1DsaConfig: 100
Hiding DSA Psf1DsaConfig: 100
Hiding DSA Psf1DsaConfig: 100
Hiding DSA Psf1DsaConfig: 100
Hiding DSA Psf1DsaConfig: 100
Hiding DSA Psf1DsaConfig: 100
Hiding DSA Psf1DsaConfig: 100
Hiding DSA Psf1DsaConfig: 100
Hiding DSA Psf1DsaConfig: 100
Hiding DSA Psf1DsaConfig: 100
Hiding DSA Psf1DsaConfig: 100
Hiding DSA Psf1DsaConfig: 100
Hiding DSA Psf1DsaConfig: 100
Hiding DSA Psf1DsaConfig: 100
Hiding DSA Psf1DsaConfig: 100
Hiding DSA Psf1DsaConfig: 100
Hiding DSA Psf1DsaConfig: 100
Hiding DSA Psf1DsaConfig: 100
Hiding DSA Psf1DsaConfig: 100
Hiding DSA Psf1DsaConfig: 100
Hiding DSA Psf1DsaConfig: 100
Hiding DSA Psf1DsaConfig: 100
Hiding DSA Psf1DsaConfig: 100
Hiding DSA Psf1DsaConfig: 100
Hiding DSA Psf1DsaConfig: 100
Hiding DSA Psf1DsaConfig: 100
Hiding DSA Psf1DsaConfig: 100
Hiding DSA Psf1DsaConfig: 100
Hiding DSA Psf1DsaConfig: 100
Hiding DSA Psf1DsaConfig: 100
Hiding DSA Psf1DsaConfig: 100
Hiding DSA Psf1DsaConfig: 100
Hiding DSA Psf1DsaConfig: 100
Hiding DSA Psf1DsaConfig: 100
Hiding DSA Psf1DsaConfig: 100
Hiding DSA Psf1DsaConfig: 100
Hiding DSA Psf1DsaConfig: 100
Hiding DSA Psf1DsaConfig: 100
Hiding DSA Psf1DsaConfig: 100
Hiding DSA Psf1DsaConfig: 100
Hiding IAX Psf1IaxConfig: 0
Hiding IAX Psf1IaxConfig: 0
Hiding IAX Psf1IaxConfig: 0
Hiding IAX Psf1IaxConfig: 0
Hiding IAX Psf1IaxConfig: 100
Hiding IAX Psf1IaxConfig: 100
Hiding IAX Psf1IaxConfig: 100
Hiding IAX Psf1IaxConfig: 100
Hiding IAX Psf1IaxConfig: 100
Hiding IAX Psf1IaxConfig: 100
Hiding IAX Psf1IaxConfig: 100
Hiding IAX Psf1IaxConfig: 100
Hiding IAX Psf1IaxConfig: 100
Hiding IAX Psf1IaxConfig: 100
Hiding IAX Psf1IaxConfig: 100
Hiding IAX Psf1IaxConfig: 100
Hiding IAX Psf1IaxConfig: 100
Hiding IAX Psf1IaxConfig: 100
Hiding IAX Psf1IaxConfig: 100
Hiding IAX Psf1IaxConfig: 100
Hiding IAX Psf1IaxConfig: 100
Hiding IAX Psf1IaxConfig: 100
Hiding IAX Psf1IaxConfig: 100
Hiding IAX Psf1IaxConfig: 100
Hiding IAX Psf1IaxConfig: 100
Hiding IAX Psf1IaxConfig: 100
Hiding IAX Psf1IaxConfig: 100
Hiding IAX Psf1IaxConfig: 100
Hiding IAX Psf1IaxConfig: 100
Hiding IAX Psf1IaxConfig: 100
Hiding IAX Psf1IaxConfig: 100
Hiding IAX Psf1IaxConfig: 100
Hiding IAX Psf1IaxConfig: 100
Hiding IAX Psf1IaxConfig: 100
Hiding IAX Psf1IaxConfig: 100
Hiding IAX Psf1IaxConfig: 100
Hiding IAX Psf1IaxConfig: 100
Hiding IAX Psf1IaxConfig: 100
Hiding IAX Psf1IaxConfig: 100
Hiding IAX Psf1IaxConfig: 100
Hiding IAX Psf1IaxConfig: 100
Hiding IAX Psf1IaxConfig: 100
Hiding IAX Psf1IaxConfig: 100
Hiding IAX Psf1IaxConfig: 100
Hiding IAX Psf1IaxConfig: 100
Hiding IAX Psf1IaxConfig: 100
Hiding IAX Psf1IaxConfig: 100
Hiding IAX Psf1IaxConfig: 100
Hiding IAX Psf1IaxConfig: 100
Hiding IAX Psf1IaxConfig: 100
Hiding IAX Psf1IaxConfig: 100
Hiding IAX Psf1IaxConfig: 100
Hiding IAX Psf1IaxConfig: 100
Hiding IAX Psf1IaxConfig: 100
Hiding IAX Psf1IaxConfig: 100
Hiding IAX Psf1IaxConfig: 100
MS2IOSF_BANK_DECODER_INIT_END
[0 p0] DMI device is enabled
[0.1 p1] 00:15:01.0: PCI device 8086:352A is enabled
[0.1 p2] 00:15:02.0: PCI device FFFF:FFFF is disabled (not present)
[0.1 p3] 00:15:03.0: PCI device FFFF:FFFF is disabled (not present)
[0.1 p4] 00:15:04.0: PCI device FFFF:FFFF is disabled (not present)
[0.1 p5] 00:15:05.0: PCI device FFFF:FFFF is disabled (not present)
[0.1 p6] 00:15:06.0: PCI device FFFF:FFFF is disabled (not present)
[0.1 p7] 00:15:07.0: PCI device FFFF:FFFF is disabled (not present)
[0.1 p8] 00:15:08.0: PCI device FFFF:FFFF is disabled (not present)
[0.2 p9] 00:26:01.0: PCI device 8086:352A is enabled
[0.2 p10] 00:26:02.0: PCI device FFFF:FFFF is disabled (not present)
[0.2 p11] 00:26:03.0: PCI device FFFF:FFFF is disabled (not present)
[0.2 p12] 00:26:04.0: PCI device FFFF:FFFF is disabled (not present)
[0.2 p13] 00:26:05.0: PCI device FFFF:FFFF is disabled (not present)
[0.2 p14] 00:26:06.0: PCI device FFFF:FFFF is disabled (not present)
[0.2 p15] 00:26:07.0: PCI device FFFF:FFFF is disabled (not present)
[0.2 p16] 00:26:08.0: PCI device FFFF:FFFF is disabled (not present)
[0.3 p17] 00:37:01.0: PCI device 8086:352A is enabled
[0.3 p18] 00:37:02.0: PCI device FFFF:FFFF is disabled (not present)
[0.3 p19] 00:37:03.0: PCI device FFFF:FFFF is disabled (not present)
[0.3 p20] 00:37:04.0: PCI device FFFF:FFFF is disabled (not present)
[0.3 p21] 00:37:05.0: PCI device FFFF:FFFF is disabled (not present)
[0.3 p22] 00:37:06.0: PCI device FFFF:FFFF is disabled (not present)
[0.3 p23] 00:37:07.0: PCI device FFFF:FFFF is disabled (not present)
[0.3 p24] 00:37:08.0: PCI device FFFF:FFFF is disabled (not present)
[0.4 p25] 00:48:01.0: PCI device 8086:352A is enabled
[0.4 p26] 00:48:02.0: PCI device FFFF:FFFF is disabled (not present)
[0.4 p27] 00:48:03.0: PCI device 8086:352B is enabled
[0.4 p28] 00:48:04.0: PCI device FFFF:FFFF is disabled (not present)
[0.4 p29] 00:48:05.0: PCI device 8086:352C is enabled
[0.4 p30] 00:48:06.0: PCI device FFFF:FFFF is disabled (not present)
[0.4 p31] 00:48:07.0: PCI device 8086:352D is enabled
[0.4 p32] 00:48:08.0: PCI device FFFF:FFFF is disabled (not present)
[0.5 p33] 00:59:01.0: PCI device 8086:352A is enabled
[0.5 p34] 00:59:02.0: PCI device FFFF:FFFF is disabled (not present)
[0.5 p35] 00:59:03.0: PCI device 8086:352B is enabled
[0.5 p36] 00:59:04.0: PCI device FFFF:FFFF is disabled (not present)
[0.5 p37] 00:59:05.0: PCI device 8086:352C is enabled
[0.5 p38] 00:59:06.0: PCI device FFFF:FFFF is disabled (not present)
[0.5 p39] 00:59:07.0: PCI device 8086:352D is enabled
[0.5 p40] 00:59:08.0: PCI device FFFF:FFFF is disabled (not present)
WARNING: Platform does not support uplink port!
HcxType[1] = NONE
[IIO](VMD) [1] VMD disabled for RPs init.
Program HW_INIT using SB access
Program HW_INIT using SB access
Program HW_INIT using SB access
Program HW_INIT using SB access
Program HW_INIT using SB access
Program HW_INIT using SB access
Program HW_INIT using SB access
Program HW_INIT using SB access
Program HW_INIT using SB access
Program HW_INIT using SB access
[1] Cpxsmb enabled
MS2IOSF_BANK_DECODER_INIT_START
MS2IOSF BankDecoder: TableSize 119, Recipe Revision 1.16
Hiding DSA Psf1DsaConfig: 0
Hiding DSA Psf1DsaConfig: 0
Hiding DSA Psf1DsaConfig: 0
Hiding DSA Psf1DsaConfig: 0
Hiding DSA Psf1DsaConfig: 100
Hiding DSA Psf1DsaConfig: 100
Hiding DSA Psf1DsaConfig: 100
Hiding DSA Psf1DsaConfig: 100
Hiding DSA Psf1DsaConfig: 100
Hiding DSA Psf1DsaConfig: 100
Hiding DSA Psf1DsaConfig: 100
Hiding DSA Psf1DsaConfig: 100
Hiding DSA Psf1DsaConfig: 100
Hiding DSA Psf1DsaConfig: 100
Hiding DSA Psf1DsaConfig: 100
Hiding DSA Psf1DsaConfig: 100
Hiding DSA Psf1DsaConfig: 100
Hiding DSA Psf1DsaConfig: 100
Hiding DSA Psf1DsaConfig: 100
Hiding DSA Psf1DsaConfig: 100
Hiding DSA Psf1DsaConfig: 100
Hiding DSA Psf1DsaConfig: 100
Hiding DSA Psf1DsaConfig: 100
Hiding DSA Psf1DsaConfig: 100
Hiding DSA Psf1DsaConfig: 100
Hiding DSA Psf1DsaConfig: 100
Hiding DSA Psf1DsaConfig: 100
Hiding DSA Psf1DsaConfig: 100
Hiding DSA Psf1DsaConfig: 100
Hiding DSA Psf1DsaConfig: 100
Hiding DSA Psf1DsaConfig: 100
Hiding DSA Psf1DsaConfig: 100
Hiding DSA Psf1DsaConfig: 100
Hiding DSA Psf1DsaConfig: 100
Hiding DSA Psf1DsaConfig: 100
Hiding DSA Psf1DsaConfig: 100
Hiding DSA Psf1DsaConfig: 100
Hiding DSA Psf1DsaConfig: 100
Hiding DSA Psf1DsaConfig: 100
Hiding DSA Psf1DsaConfig: 100
Hiding DSA Psf1DsaConfig: 100
Hiding DSA Psf1DsaConfig: 100
Hiding DSA Psf1DsaConfig: 100
Hiding DSA Psf1DsaConfig: 100
Hiding DSA Psf1DsaConfig: 100
Hiding DSA Psf1DsaConfig: 100
Hiding DSA Psf1DsaConfig: 100
Hiding DSA Psf1DsaConfig: 100
Hiding DSA Psf1DsaConfig: 100
Hiding DSA Psf1DsaConfig: 100
Hiding DSA Psf1DsaConfig: 100
Hiding DSA Psf1DsaConfig: 100
Hiding DSA Psf1DsaConfig: 100
Hiding DSA Psf1DsaConfig: 100
Hiding DSA Psf1DsaConfig: 100
Hiding DSA Psf1DsaConfig: 100
Hiding IAX Psf1IaxConfig: 0
Hiding IAX Psf1IaxConfig: 0
Hiding IAX Psf1IaxConfig: 0
Hiding IAX Psf1IaxConfig: 0
Hiding IAX Psf1IaxConfig: 100
Hiding IAX Psf1IaxConfig: 100
Hiding IAX Psf1IaxConfig: 100
Hiding IAX Psf1IaxConfig: 100
Hiding IAX Psf1IaxConfig: 100
Hiding IAX Psf1IaxConfig: 100
Hiding IAX Psf1IaxConfig: 100
Hiding IAX Psf1IaxConfig: 100
Hiding IAX Psf1IaxConfig: 100
Hiding IAX Psf1IaxConfig: 100
Hiding IAX Psf1IaxConfig: 100
Hiding IAX Psf1IaxConfig: 100
Hiding IAX Psf1IaxConfig: 100
Hiding IAX Psf1IaxConfig: 100
Hiding IAX Psf1IaxConfig: 100
Hiding IAX Psf1IaxConfig: 100
Hiding IAX Psf1IaxConfig: 100
Hiding IAX Psf1IaxConfig: 100
Hiding IAX Psf1IaxConfig: 100
Hiding IAX Psf1IaxConfig: 100
Hiding IAX Psf1IaxConfig: 100
Hiding IAX Psf1IaxConfig: 100
Hiding IAX Psf1IaxConfig: 100
Hiding IAX Psf1IaxConfig: 100
Hiding IAX Psf1IaxConfig: 100
Hiding IAX Psf1IaxConfig: 100
Hiding IAX Psf1IaxConfig: 100
Hiding IAX Psf1IaxConfig: 100
Hiding IAX Psf1IaxConfig: 100
Hiding IAX Psf1IaxConfig: 100
Hiding IAX Psf1IaxConfig: 100
Hiding IAX Psf1IaxConfig: 100
Hiding IAX Psf1IaxConfig: 100
Hiding IAX Psf1IaxConfig: 100
Hiding IAX Psf1IaxConfig: 100
Hiding IAX Psf1IaxConfig: 100
Hiding IAX Psf1IaxConfig: 100
Hiding IAX Psf1IaxConfig: 100
Hiding IAX Psf1IaxConfig: 100
Hiding IAX Psf1IaxConfig: 100
Hiding IAX Psf1IaxConfig: 100
Hiding IAX Psf1IaxConfig: 100
Hiding IAX Psf1IaxConfig: 100
Hiding IAX Psf1IaxConfig: 100
Hiding IAX Psf1IaxConfig: 100
Hiding IAX Psf1IaxConfig: 100
Hiding IAX Psf1IaxConfig: 100
Hiding IAX Psf1IaxConfig: 100
Hiding IAX Psf1IaxConfig: 100
Hiding IAX Psf1IaxConfig: 100
Hiding IAX Psf1IaxConfig: 100
Hiding IAX Psf1IaxConfig: 100
MS2IOSF_BANK_DECODER_INIT_END
[1.1 p1] 00:97:01.0: PCI device 8086:352A is enabled
[1.1 p2] 00:97:02.0: PCI device FFFF:FFFF is disabled (not present)
[1.1 p3] 00:97:03.0: PCI device FFFF:FFFF is disabled (not present)
[1.1 p4] 00:97:04.0: PCI device FFFF:FFFF is disabled (not present)
[1.1 p5] 00:97:05.0: PCI device FFFF:FFFF is disabled (not present)
[1.1 p6] 00:97:06.0: PCI device FFFF:FFFF is disabled (not present)
[1.1 p7] 00:97:07.0: PCI device FFFF:FFFF is disabled (not present)
[1.1 p8] 00:97:08.0: PCI device FFFF:FFFF is disabled (not present)
[1.2 p9] 00:A7:01.0: PCI device 8086:352A is enabled
[1.2 p10] 00:A7:02.0: PCI device FFFF:FFFF is disabled (not present)
[1.2 p11] 00:A7:03.0: PCI device FFFF:FFFF is disabled (not present)
[1.2 p12] 00:A7:04.0: PCI device FFFF:FFFF is disabled (not present)
[1.2 p13] 00:A7:05.0: PCI device FFFF:FFFF is disabled (not present)
[1.2 p14] 00:A7:06.0: PCI device FFFF:FFFF is disabled (not present)
[1.2 p15] 00:A7:07.0: PCI device FFFF:FFFF is disabled (not present)
[1.2 p16] 00:A7:08.0: PCI device FFFF:FFFF is disabled (not present)
[1.3 p17] 00:B7:01.0: PCI device 8086:352A is enabled
[1.3 p18] 00:B7:02.0: PCI device FFFF:FFFF is disabled (not present)
[1.3 p19] 00:B7:03.0: PCI device FFFF:FFFF is disabled (not present)
[1.3 p20] 00:B7:04.0: PCI device FFFF:FFFF is disabled (not present)
[1.3 p21] 00:B7:05.0: PCI device FFFF:FFFF is disabled (not present)
[1.3 p22] 00:B7:06.0: PCI device FFFF:FFFF is disabled (not present)
[1.3 p23] 00:B7:07.0: PCI device FFFF:FFFF is disabled (not present)
[1.3 p24] 00:B7:08.0: PCI device FFFF:FFFF is disabled (not present)
[1.4 p25] 00:C7:01.0: PCI device 8086:352A is enabled
[1.4 p26] 00:C7:02.0: PCI device FFFF:FFFF is disabled (not present)
[1.4 p27] 00:C7:03.0: PCI device 8086:352B is enabled
[1.4 p28] 00:C7:04.0: PCI device FFFF:FFFF is disabled (not present)
[1.4 p29] 00:C7:05.0: PCI device 8086:352C is enabled
[1.4 p30] 00:C7:06.0: PCI device FFFF:FFFF is disabled (not present)
[1.4 p31] 00:C7:07.0: PCI device 8086:352D is enabled
[1.4 p32] 00:C7:08.0: PCI device FFFF:FFFF is disabled (not present)
[1.5 p33] 00:D7:01.0: PCI device 8086:352A is enabled
[1.5 p34] 00:D7:02.0: PCI device FFFF:FFFF is disabled (not present)
[1.5 p35] 00:D7:03.0: PCI device 8086:352B is enabled
[1.5 p36] 00:D7:04.0: PCI device FFFF:FFFF is disabled (not present)
[1.5 p37] 00:D7:05.0: PCI device 8086:352C is enabled
[1.5 p38] 00:D7:06.0: PCI device FFFF:FFFF is disabled (not present)
[1.5 p39] 00:D7:07.0: PCI device 8086:352D is enabled
[1.5 p40] 00:D7:08.0: PCI device FFFF:FFFF is disabled (not present)
[1.6 p41] 00:80:01.0: PCI device 8086:352A is enabled
[1.6 p42] 00:80:02.0: PCI device FFFF:FFFF is disabled (not present)
[1.6 p43] 00:80:03.0: PCI device FFFF:FFFF is disabled (not present)
[1.6 p44] 00:80:04.0: PCI device FFFF:FFFF is disabled (not present)
[1.6 p45] 00:80:05.0: PCI device 8086:352C is enabled
[1.6 p46] 00:80:06.0: PCI device FFFF:FFFF is disabled (not present)
[1.6 p47] 00:80:07.0: PCI device FFFF:FFFF is disabled (not present)
[1.6 p48] 00:80:08.0: PCI device FFFF:FFFF is disabled (not present)
Calling IioEarlyIntiazeEntry Start
[0] IioAllocateMmioResource: Seg=0, MaxStackPerSocket=12
[0.0] Temp BUS: 0x00 -> 0x00 | MMIOL: 0x90122000 -> 0x957FFFFF
[0.1] Temp BUS: 0x15 -> 0x15 | MMIOL: 0x95900000 -> 0x9F7FFFFF
[0.2] Temp BUS: 0x26 -> 0x26 | MMIOL: 0x9F900000 -> 0xA93FFFFF
[0.3] Temp BUS: 0x37 -> 0x37 | MMIOL: 0xA9500000 -> 0xB2FFFFFF
[0.4] Temp BUS: 0x48 -> 0x48 | MMIOL: 0xB3100000 -> 0xBCBFFFFF
[0.5] Temp BUS: 0x59 -> 0x59 | MMIOL: 0xBCD00000 -> 0xC67FFFFF
[0.8] Temp BUS: 0x6A -> 0x6A | MMIOL: 0xC6900000 -> 0xC6FFFFFF
[0.9] Temp BUS: 0x6F -> 0x6F | MMIOL: 0xC7100000 -> 0xC77FFFFF
[0.10] Temp BUS: 0x74 -> 0x74 | MMIOL: 0xC7900000 -> 0xC7FFFFFF
[0.11] Temp BUS: 0x79 -> 0x79 | MMIOL: 0xC8100000 -> 0xC87FFFFF
[0] IIO Early Link Training Starting...
Recipy decompressing...
Socket[0] Stack[0] Program RX recipe values START...
Program recipe revision 2.009 (Info : 1.5:, len 2556)
[0] Program RX recipe values END
Recipy decompressing...
Socket[0] Stack[1] Program RX recipe values START...
Program recipe revision 2.009 (Info : 1.5:, len 2966)
[0] Program RX recipe values END
Socket[0] Stack[2] Program RX recipe values START...
Program recipe revision 2.009 (Info : 1.5:, len 2966)
[0] Program RX recipe values END
Socket[0] Stack[3] Program RX recipe values START...
Program recipe revision 2.009 (Info : 1.5:, len 2966)
[0] Program RX recipe values END
Socket[0] Stack[4] Program RX recipe values START...
Program recipe revision 2.009 (Info : 1.5:, len 2966)
[0] Program RX recipe values END
Socket[0] Stack[5] Program RX recipe values START...
Program recipe revision 2.009 (Info : 1.5:, len 2966)
[0] Program RX recipe values END
CXL_IO_PRE_TRAIN_INIT_START
CXL_IO_PRE_TRAIN_INIT_END
FBLP_PRE_TRAIN_INIT_START
FBLP_PRE_TRAIN_INIT_END
[0 p0] IioDmiLinkInit
[0 p0] DMI link speed vector IIO 0xF, PCH 0x7 -> target speed 3
[0] IIO Early Link Training Completed!
[1] IioAllocateMmioResource: Seg=0, MaxStackPerSocket=12
[1.1] Temp BUS: 0x97 -> 0x97 | MMIOL: 0xD1500000 -> 0xD97FFFFF
[1.2] Temp BUS: 0xA7 -> 0xA7 | MMIOL: 0xD9900000 -> 0xE17FFFFF
[1.3] Temp BUS: 0xB7 -> 0xB7 | MMIOL: 0xE1900000 -> 0xE97FFFFF
[1.4] Temp BUS: 0xC7 -> 0xC7 | MMIOL: 0xE9900000 -> 0xF17FFFFF
[1.5] Temp BUS: 0xD7 -> 0xD7 | MMIOL: 0xF1900000 -> 0xF97FFFFF
[1.6] Temp BUS: 0x80 -> 0x80 | MMIOL: 0xC9100000 -> 0xD13FFFFF
[1.8] Temp BUS: 0xE7 -> 0xE7 | MMIOL: 0xF9900000 -> 0xF9FFFFFF
[1.9] Temp BUS: 0xEC -> 0xEC | MMIOL: 0xFA100000 -> 0xFA7FFFFF
[1.10] Temp BUS: 0xF1 -> 0xF1 | MMIOL: 0xFA900000 -> 0xFAFFFFFF
[1.11] Temp BUS: 0xF6 -> 0xF6 | MMIOL: 0xFB100000 -> 0xFB7FFFFF
[1] IIO Early Link Training Starting...
Recipy decompressing...
Recipy decompressing...
Socket[1] Stack[1] Program RX recipe values START...
Program recipe revision 2.009 (Info : 1.5:, len 2966)
[1] Program RX recipe values END
Socket[1] Stack[2] Program RX recipe values START...
Program recipe revision 2.009 (Info : 1.5:, len 2966)
[1] Program RX recipe values END
Socket[1] Stack[3] Program RX recipe values START...
Program recipe revision 2.009 (Info : 1.5:, len 2966)
[1] Program RX recipe values END
Socket[1] Stack[4] Program RX recipe values START...
Program recipe revision 2.009 (Info : 1.5:, len 2966)
[1] Program RX recipe values END
Socket[1] Stack[5] Program RX recipe values START...
Program recipe revision 2.009 (Info : 1.5:, len 2966)
[1] Program RX recipe values END
Socket[1] Stack[6] Program RX recipe values START...
Program recipe revision 2.009 (Info : 1.5:, len 2966)
[1] Program RX recipe values END
CXL_IO_PRE_TRAIN_INIT_START
CXL_IO_PRE_TRAIN_INIT_END
FBLP_PRE_TRAIN_INIT_START
FBLP_PRE_TRAIN_INIT_END
[1] IIO Early Link Training Completed!
IIO CXL Status Socket 0:
[0.1] NotTrained
[0.2] NotTrained
[0.3] NotTrained
[0.4] NotSupportCxlMode
[0.5] NotSupportCxlMode
[0.6] NotSupportCxlMode
[0.7] NotSupportCxlMode
IIO CXL Status Socket 1:
[1.1] NotTrained
[1.2] NotTrained
[1.3] NotTrained
[1.4] NotSupportCxlMode
[1.5] NotSupportCxlMode
[1.6] NotSupportCxlMode
[1.7] NotSupportCxlMode
CXL_NOTIFY_PCODE_START
CXL_NOTIFY_PCODE_END
IIO Early Link Tc/Vc Configuration Start
Final Tc/VC mapping:
[0] Program TC/VC mapping on IIO side
[0] Program/Poll TC/VC mapping on PCH side
Poll TC/VC mapping on IIO side
IIO Early Link Tc/Vc Configuration End
Calling IioEarlyIntiazeEntry Stop
******* Initialize CXL - END *******
******* OOBMSM PreMem Configure - START *******
******* UncoreEnablePeciAccess - START *******
******* UncoreEnablePeciAccess - END *******
******* OOBMSM PreMem Configure - END *******
**KTI Output Structure **
OutD2KCreditConfig: 0 [1:Low,2:Med,3:High]
SnoopThrottleConfig: 0 [0:Dis,1:Low,2:Med,3:High,4:Auto]
OutUpiAffinityEn for CHA and M2M: 0
OutTwoSktTopology : 5
OutM2iosfToUpiAffinity: 1
OutPmonConfig: 2 [1:Reduced,2:Full,3:Auto,0:Disabled]
OutM2IosfPmonAccessControl: 0 [0:Restricted,1:Full,2:Auto]
OutD2kEn: 0
OutLegacyVgaSoc: 0
OutLegacyVgaStack: 0
OutIsocEn: 0
OutHitMeEn: 1
OutSncEn: 4 (SNC4)
OutUmaClustering: 0
OutSysDirectoryModeEn: 1
OutKtiPrefetch: 0
OutXptPrefetch: 0
OutXptRemotePrefetch: 0
OutSncPrefetchEn: 4
OutSncGbAlignRequired: 1
OutIsRouteThrough: 0
OutStaleAtoSOptEn: 2
OutSystemRasType: 6 (ADVANCED)
OutIoDcMode: 5 (IODC_EN_REM_INVITOM_AND_WCILF)
KtiCurrentLinkSpeedMode: 1 (FAST)
OutKtiLinkSpeed: 2 (16.0)
OutKtiLinkL0pEn: 0 (DISABLED)
OutKtiLinkL1En: 1 (ENABLED)
OutKtiFailoverEn: 1 (ENABLED)
OutKtiCrcMode: 0 (16BIT)
OutBoardVsCpuConflict: 0x0
OutKtiAdaptationEnable: 0x0
OutKtiPerLinkL1En (per port):
S0:1 1 1 1
S1:1 1 1 1
S2:0 0 0 0
S3:0 0 0 0
PchPresentBitMap: 0x01
OutKtiFpgaPresent (per socket): S0: 0 S1: 0 S2: 0 S3: 0
OutKtiFpgaEnable (per socket): S0: 0 S1: 0 S2: 0 S3: 0
OutFpgaHomeAgent (per socket): S0: 0 S1: 0 S2: 0 S3: 0
OutFpgaCacheAgent (per socket): S0: 0 S1: 0 S2: 0 S3: 0
OutStackDisableBitMap (per socket): S0: 0x0 S1: 0x0 S2: 0x0 S3: 0x0
mmCfgBase: 0x80000000
mmCfgSize: 0x10000000
mmiolBase: 0x90000000
mmiolSize: 0x6C000000
mmiohBase: 0x00002000
lowGap : 0x20
SecondaryNodeBitMap: 0x00
CpuPaLimit: 0
KtiInternalGlobal:
->SnoopFanoutEn: 0
->SysOsbEn: 1
->D2cEn: 1
->D2kEn: 0
->SnoopFilter: 0
->DualLinksInterleavingMode: 2
->UpiInterleaveMode: 2
->EightSocketTopology: 0
->SnoopFanoutChaInterleaveEn: 0
KtiLinkVnaOverride (per port - final values):
S0:138 138 138 138
S1:138 138 138 138
S2:254 254 254 254
S3:254 254 254 254
IIO STACK rootbus ID mapping table
Stack ID | Root Bus ID
0 ------- 0
1 ------- 1
2 ------- 2
3 ------- 3
4 ------- 4
5 ------- 5
6 ------- 6
7 ------- 7
8 ------- 8
9 ------- 9
10 ------- 10
11 ------- 11
OutDfxPrqBlockEn: 0
OutDfxAeg0CounterLowVal: 40
OutDfxAeg0CounterHighVal: 60
**KTI Output Structure End**
******* KTIRC Exit *******
KTI Init completed! Reset Requested: 0
RC debug buffering, compression, and sync ready
Pipe Init starting...
Pass PIPE_DISPATCH_SYNCH_PSYSHOST to socket 1
Pass PeiPipeFollowerInit
CAR MEM Range 0xFE800000 - 0xFE983B67
Pass pointer to Host: 0xFE800014
Sending address of Memory Policy: 0xFE96FF80
Pass boot mode 0
Send data buffer
Send data dwordcount 60EDA
Send data...complete
CAR MEM Range2 0xFE9DC000 - 0xFE9DFFFF
Send data buffer
Send data dwordcount 1000
Send data...complete
Send data buffer
Send data dwordcount 18F
Send data...complete
N1 Checked into Pipe
Pipe Init completed! Reset Requested: 0
CPU Feature Early Config starting...
CpuInit Start
CpuUncoreInit()
: Get UncoreRatioLimit MaxClrRatio: 24, MinClrRatio: 8, UncoreRatioLimit.Uint32 = 0x818
: Get UncoreRatioLimit MaxClrRatio: 24, MinClrRatio: 8, UncoreRatioLimit.Uint32 = 0x818
:UFS: Update BIOS_SPARE2_PCU Bit[20] = 0 on S0
Write Socket 0 MSR_UNCORE_RATIO_LIMIT.MinClrRatio [14:8] = 8, MSR_UNCORE_RATIO_LIMIT.MaxClrRatio [6:0] = 24
:UFS: Update BIOS_SPARE2_PCU Bit[20] = 0 on S1
Write Socket 1 MSR_UNCORE_RATIO_LIMIT.MinClrRatio [14:8] = 8, MSR_UNCORE_RATIO_LIMIT.MaxClrRatio [6:0] = 24
Get socket PPIN
: PPIN = 22E546CB1AD8E915
Get socket PPIN
: PPIN = 22E548CB80015B4D
:: ProgramProcessorFlexRatio()
:: System Capable : AVX SST-CP SST-BF
1 1 0
:: SstPpCapableSystem : LevelEnableMask MaxLevel
0 00 00
S0_0 FusedCoresMask = 0x0DABBB6EAF4EE9DB FusedCoreCount = 40
GetAllConfigTdpLevels() Enter
S0_0 ConfigTdpLevel(0) IssCoreMask = 0x0DABBB6EAF4EE9DB IssCoreCount = 40
GetAllConfigTdpLevels() Exit
:: S0 MaxRatio : MinRatio : MinOpRatio : ConfigTdpMaxLevel
17 08 05 02
:: S0 Current SST-PP Level : Current SST-PP Lock
00 0
Level : PkgTDP : SSE P1 : AVX2 P1 : AVX3 P1 : Core Count
0 : 000350 : 000017 : 000014 : 000011 : 040, [0] 40
3 : 000000 : 000000 : 000000 : 000000 : 000, [0] 00
4 : 000000 : 000000 : 000000 : 000000 : 000, [0] 00
Level : Turbo Ratio Limit - SSE P1 : AVX2 P1 : AVX3 P1
0 : - : 181818191A1E2023 : 17171718191E2023 : 16161617171D1F22
3 : - : 0000000000000000 : 0000000000000000 : 0000000000000000
4 : - : 0000000000000000 : 0000000000000000 : 0000000000000000
Level : TJMax : CoreMask
0 : 100 : [0] 0DABBB6EAF4EE9DB
3 : 000 : [0] 0000000000000000
4 : 000 : [0] 0000000000000000
Level : SstBf - P1_Hi : P1_Lo : CoreMask
0 : 0000 : 0000 : [0] 0000000000000000
3 : 0000 : 0000 : [0] 0000000000000000
4 : 0000 : 0000 : [0] 0000000000000000
Core Ratio Info
Level : P0 : P1 : Pn : Pm
0 : 000035 : 000017 : 000008 : 000005
3 : 000000 : 000000 : 000000 : 000000
4 : 000000 : 000000 : 000000 : 000000
Uncore Ratio Info
Level : P0 : P1 : Pn : Pm
0 : 000024 : 000014 : 000008 : 000008
3 : 000000 : 000000 : 000000 : 000000
4 : 000000 : 000000 : 000000 : 000000
S1_0 FusedCoresMask = 0x0DB9772F6F4EE9DB FusedCoreCount = 40
GetAllConfigTdpLevels() Enter
S1_0 ConfigTdpLevel(0) IssCoreMask = 0x0DB9772F6F4EE9DB IssCoreCount = 40
GetAllConfigTdpLevels() Exit
:: S1 MaxRatio : MinRatio : MinOpRatio : ConfigTdpMaxLevel
17 08 05 02
:: S1 Current SST-PP Level : Current SST-PP Lock
00 0
Level : PkgTDP : SSE P1 : AVX2 P1 : AVX3 P1 : Core Count
0 : 000350 : 000017 : 000014 : 000011 : 040, [0] 40
3 : 000000 : 000000 : 000000 : 000000 : 000, [0] 00
4 : 000000 : 000000 : 000000 : 000000 : 000, [0] 00
Level : Turbo Ratio Limit - SSE P1 : AVX2 P1 : AVX3 P1
0 : - : 181818191A1E2023 : 17171718191E2023 : 16161617171D1F22
3 : - : 0000000000000000 : 0000000000000000 : 0000000000000000
4 : - : 0000000000000000 : 0000000000000000 : 0000000000000000
Level : TJMax : CoreMask
0 : 100 : [0] 0DB9772F6F4EE9DB
3 : 000 : [0] 0000000000000000
4 : 000 : [0] 0000000000000000
Level : SstBf - P1_Hi : P1_Lo : CoreMask
0 : 0000 : 0000 : [0] 0000000000000000
3 : 0000 : 0000 : [0] 0000000000000000
4 : 0000 : 0000 : [0] 0000000000000000
Core Ratio Info
Level : P0 : P1 : Pn : Pm
0 : 000035 : 000017 : 000008 : 000005
3 : 000000 : 000000 : 000000 : 000000
4 : 000000 : 000000 : 000000 : 000000
Uncore Ratio Info
Level : P0 : P1 : Pn : Pm
0 : 000024 : 000014 : 000008 : 000008
3 : 000000 : 000000 : 000000 : 000000
4 : 000000 : 000000 : 000000 : 000000
:: CommonMaxRatio : CommonMinRatio : Target Ratio
17 08 17
:: IssTdpLevel : AvxP1Level
00 00
:: TargetRatio: 17 is ready (RatioChangeFlag: 0), SstPpCurrentLevel: 0
:: SetActiveCoresAndLpEnableDisable()
:: S0_0 BIST_FAILURE_LOCAL_MASK = 0000000000000000
:: S0 setup input disable = 0000000000000000
:: S0_0 AvailCoresMask = 0DABBB6EAF4EE9DB
:: S0_0 ResolvedCoresMask = 0DABBB6EAF4EE9DB
:: S0_0 DesiredCoresCurrent = 0000000000000000
:: S0_0 BistResultMask = 0000000000000000
:: S0_0 CoreDisableReqMask = 0000000000000000
:: S0_0 NumberOfCoresDisabledMask = 0000000000000000
:: CheckCpuBist = 1
:: CoreFailover = 1
[s0_0] MaxLpEnable = 0, LpCapable = 1, MaxLpEnable knob = 0, Lock Status = 0
S0_0 MaxEnabledCores = 0
S0_0 FusedCoreCount = 40
S0_0 NonSparingCoresMask= FFFFFFFFFFFFFFFF
:: S0_0 DesiredCoresNew = 0000000000000000
:: S1_0 BIST_FAILURE_LOCAL_MASK = 0000000000000000
:: S1 setup input disable = 0000000000000000
:: S1_0 AvailCoresMask = 0DB9772F6F4EE9DB
:: S1_0 ResolvedCoresMask = 0DB9772F6F4EE9DB
:: S1_0 DesiredCoresCurrent = 0000000000000000
:: S1_0 BistResultMask = 0000000000000000
:: S1_0 CoreDisableReqMask = 0000000000000000
:: S1_0 NumberOfCoresDisabledMask = 0000000000000000
:: CheckCpuBist = 1
:: CoreFailover = 1
[s1_0] MaxLpEnable = 0, LpCapable = 1, MaxLpEnable knob = 0, Lock Status = 0
S1_0 MaxEnabledCores = 0
S1_0 FusedCoreCount = 40
S1_0 NonSparingCoresMask= FFFFFFFFFFFFFFFF
:: S1_0 DesiredCoresNew = 0000000000000000
CPUMISC Current S 0:
ITBM is not supported
CPUMISC Current S 1:
ITBM is not supported
CPU Feature Early Config completed! Reset Requested: 0
PrevBootErrors: No Memory MCA Error Found
PrevBootErrors - Valid MCA UC entries: 0
[CSR PCI BAR Access] Address:0xFFFFFFFF000000D4; PCI Cmd: 0xFFFF
[CSR PCI BAR Access] Address:0xFFFFFFFF000000D4; PCI Cmd: 0xFFFF
START_MRC_RUN
Detect ColdBootSlowRequiredFlag and will force slow cold boot.
N0: Bus Instance = 0; I2C speed = 3; I3C speed = 2; Bus mode = 0
N0: Bus Instance = 1; I2C speed = 3; I3C speed = 2; Bus mode = 0
N0: Bus Instance = 0; I2C speed = 3; I3C speed = 2; Bus mode = 1
N0: Bus Instance = 0; I2C speed = 3; I3C speed = 2; Bus mode = 1
N0: Bus Instance = 0; I2C speed = 3; I3C speed = 2; Bus mode = 1
N0: Bus Instance = 0; I2C speed = 3; I3C speed = 2; Bus mode = 1
N0: Bus Instance = 0; I2C speed = 3; I3C speed = 2; Bus mode = 1
N0: Bus Instance = 0; I2C speed = 3; I3C speed = 2; Bus mode = 1
N0: Bus Instance = 1; I2C speed = 3; I3C speed = 2; Bus mode = 1
N0: Bus Instance = 1; I2C speed = 3; I3C speed = 2; Bus mode = 1
N0: Bus Instance = 1; I2C speed = 3; I3C speed = 2; Bus mode = 1
N0: Bus Instance = 1; I2C speed = 3; I3C speed = 2; Bus mode = 1
N0: Bus Instance = 1; I2C speed = 3; I3C speed = 2; Bus mode = 1
N0: Bus Instance = 1; I2C speed = 3; I3C speed = 2; Bus mode = 1
N0: Bus Instance = 0; I2C speed = 3; I3C speed = 2; Bus mode = 0
N0: Bus Instance = 0; I2C speed = 3; I3C speed = 2; Bus mode = 0
N0: Bus Instance = 0; I2C speed = 3; I3C speed = 2; Bus mode = 0
N0: Bus Instance = 0; I2C speed = 3; I3C speed = 2; Bus mode = 0
N0: Bus Instance = 0; I2C speed = 3; I3C speed = 2; Bus mode = 0
N0: Bus Instance = 0; I2C speed = 3; I3C speed = 2; Bus mode = 0
N0: Bus Instance = 1; I2C speed = 3; I3C speed = 2; Bus mode = 0
N0: Bus Instance = 1; I2C speed = 3; I3C speed = 2; Bus mode = 0
N0: Bus Instance = 1; I2C speed = 3; I3C speed = 2; Bus mode = 0
N0: Bus Instance = 1; I2C speed = 3; I3C speed = 2; Bus mode = 0
N0: Bus Instance = 1; I2C speed = 3; I3C speed = 2; Bus mode = 0
N0: Bus Instance = 1; I2C speed = 3; I3C speed = 2; Bus mode = 0
N0: Dimm changed.
Processors changed.
Get socket PPIN
: PPIN = 22E546CB1AD8E915
setupChanged: 1
Clearing the MRC NVRAM structure.
bootMode = NormalBoot
subBootMode = ColdBoot
[ScktId: 0] Parallel Mode Dispatch -- Started
Dispatch N1 for MemInit
N1 Entering MRC
Detect ColdBootSlowRequiredFlag and will force slow cold boot.
N1: Bus Instance = 0; I2C speed = 3; I3C speed = 2; Bus mode = 0
N1: Bus Instance = 1; I2C speed = 3; I3C speed = 2; Bus mode = 0
N1: Bus Instance = 0; I2C speed = 3; I3C speed = 2; Bus mode = 1
N1: Bus Instance = 0; I2C speed = 3; I3C speed = 2; Bus mode = 1
N1: Bus Instance = 0; I2C speed = 3; I3C speed = 2; Bus mode = 1
N1: Bus Instance = 0; I2C speed = 3; I3C speed = 2; Bus mode = 1
N1: Bus Instance = 0; I2C speed = 3; I3C speed = 2; Bus mode = 1
N1: Bus Instance = 0; I2C speed = 3; I3C speed = 2; Bus mode = 1
N1: Bus Instance = 1; I2C speed = 3; I3C speed = 2; Bus mode = 1
N1: Bus Instance = 1; I2C speed = 3; I3C speed = 2; Bus mode = 1
N1: Bus Instance = 1; I2C speed = 3; I3C speed = 2; Bus mode = 1
N1: Bus Instance = 1; I2C speed = 3; I3C speed = 2; Bus mode = 1
N1: Bus Instance = 1; I2C speed = 3; I3C speed = 2; Bus mode = 1
N1: Bus Instance = 1; I2C speed = 3; I3C speed = 2; Bus mode = 1
N1: Bus Instance = 0; I2C speed = 3; I3C speed = 2; Bus mode = 0
N1: Bus Instance = 0; I2C speed = 3; I3C speed = 2; Bus mode = 0
N1: Bus Instance = 0; I2C speed = 3; I3C speed = 2; Bus mode = 0
N1: Bus Instance = 0; I2C speed = 3; I3C speed = 2; Bus mode = 0
N1: Bus Instance = 0; I2C speed = 3; I3C speed = 2; Bus mode = 0
N1: Bus Instance = 0; I2C speed = 3; I3C speed = 2; Bus mode = 0
N1: Bus Instance = 1; I2C speed = 3; I3C speed = 2; Bus mode = 0
N1: Bus Instance = 1; I2C speed = 3; I3C speed = 2; Bus mode = 0
N1: Bus Instance = 1; I2C speed = 3; I3C speed = 2; Bus mode = 0
N1: Bus Instance = 1; I2C speed = 3; I3C speed = 2; Bus mode = 0
N1: Bus Instance = 1; I2C speed = 3; I3C speed = 2; Bus mode = 0
N1: Bus Instance = 1; I2C speed = 3; I3C speed = 2; Bus mode = 0
N1: Dimm changed.
Get socket PPIN
: PPIN = 22E548CB80015B4D
setupChanged: 1
Clearing the MRC NVRAM structure.
bootMode = NormalBoot
subBootMode = ColdBoot
[ScktId: 1] Parallel Mode Dispatch -- Started
[ScktId: 0] Parallel Mode Dispatch - 203ms
[ScktId: 1] Parallel Mode Dispatch - 4ms
[ScktId: 0] Pipe Sync AP Boot Mode -- Started
[ScktId: 1] Pipe Sync AP Boot Mode -- Started
[ScktId: 0] Pipe Sync AP Boot Mode - 13ms
[ScktId: 1] Pipe Sync AP Boot Mode - 9ms
N1 Checked into Pipe
[ScktId: 0] Select Boot Mode -- Started
DetermineBootMode: ColdBoot
[ScktId: 0] Select Boot Mode - 8ms
[ScktId: 1] Pipe Sync SBSP Boot Mode -- Started
[ScktId: 0] Pipe Sync SBSP Boot Mode -- Started
[ScktId: 1] Pipe Sync SBSP Boot Mode - 9ms
[ScktId: 0] Pipe Sync SBSP Boot Mode - 9ms
[ScktId: 1] Init Structures Late -- Started
[ScktId: 0] Init Structures Late -- Started
[ScktId: 1] Init Structures Late - 8ms
[ScktId: 0] Init Structures Late - 8ms
[ScktId: 1] Detect DIMM Configuration -- Started
[ScktId: 0] Detect DIMM Configuration -- Started
N1: Bus Instance = 0; I2C speed = 3; I3C speed = 2; Bus mode = 0
N0: Bus Instance = 0; I2C speed = 3; I3C speed = 2; Bus mode = 0
N1: Bus Instance = 0; I2C speed = 3; I3C speed = 2; Bus mode = 0
N0: Bus Instance = 0; I2C speed = 3; I3C speed = 2; Bus mode = 0
N1: Bus Instance = 0; I2C speed = 3; I3C speed = 2; Bus mode = 0
N0: Bus Instance = 0; I2C speed = 3; I3C speed = 2; Bus mode = 0
N1: Bus Instance = 0; I2C speed = 3; I3C speed = 2; Bus mode = 0
N0: Bus Instance = 0; I2C speed = 3; I3C speed = 2; Bus mode = 0
N1: Bus Instance = 0; I2C speed = 3; I3C speed = 2; Bus mode = 0
N0: Bus Instance = 0; I2C speed = 3; I3C speed = 2; Bus mode = 0
N1: Bus Instance = 0; I2C speed = 3; I3C speed = 2; Bus mode = 0
N0: Bus Instance = 0; I2C speed = 3; I3C speed = 2; Bus mode = 0
N1: Bus Instance = 1; I2C speed = 3; I3C speed = 2; Bus mode = 0
N0: Bus Instance = 1; I2C speed = 3; I3C speed = 2; Bus mode = 0
N1: Bus Instance = 1; I2C speed = 3; I3C speed = 2; Bus mode = 0
N0: Bus Instance = 1; I2C speed = 3; I3C speed = 2; Bus mode = 0
N1: Bus Instance = 1; I2C speed = 3; I3C speed = 2; Bus mode = 0
N0: Bus Instance = 1; I2C speed = 3; I3C speed = 2; Bus mode = 0
N1: Bus Instance = 1; I2C speed = 3; I3C speed = 2; Bus mode = 0
N0: Bus Instance = 1; I2C speed = 3; I3C speed = 2; Bus mode = 0
N1: Bus Instance = 1; I2C speed = 3; I3C speed = 2; Bus mode = 0
N0: Bus Instance = 1; I2C speed = 3; I3C speed = 2; Bus mode = 0
N1: Bus Instance = 1; I2C speed = 3; I3C speed = 2; Bus mode = 0
N0: Bus Instance = 1; I2C speed = 3; I3C speed = 2; Bus mode = 0
[ScktId: 1] Detect DIMM Configuration - 320ms
[ScktId: 0] Detect DIMM Configuration - 322ms
[ScktId: 1] Pipe Sync AP Data -- Started
[ScktId: 0] Pipe Sync AP Data -- Started
[ScktId: 0] Pipe Sync AP Data - 21ms
[ScktId: 1] Pipe Sync AP Data - 26ms
N1 Checked into Pipe
[ScktId: 0] Check POR Compatibility -- Started
[ScktId: 0] Check POR Compatibility - 6ms
N1 Checked into Pipe
[ScktId: 0] HBM Init Clock -- Started
[ScktId: 0] HBM Init Clock - 5ms
N1 Checked into Pipe
[ScktId: 0] Initialize clocks for all MemSs -- Started
N0: Platform segment mapping found. UseServerPor: 1; SegmentType: 7; ChopType: 3; PlatformSegment: 0
N0: Platform segment mapping found. UseServerPor: 1; SegmentType: 7; ChopType: 3; PlatformSegment: 0
N0: Platform segment mapping found. UseServerPor: 1; SegmentType: 7; ChopType: 3; PlatformSegment: 0
N0: Platform segment mapping found. UseServerPor: 1; SegmentType: 7; ChopType: 3; PlatformSegment: 0
N0: Platform segment mapping found. UseServerPor: 1; SegmentType: 7; ChopType: 3; PlatformSegment: 0
N0: Platform segment mapping found. UseServerPor: 1; SegmentType: 7; ChopType: 3; PlatformSegment: 0
N0: Platform segment mapping found. UseServerPor: 1; SegmentType: 7; ChopType: 3; PlatformSegment: 0
N0: Platform segment mapping found. UseServerPor: 1; SegmentType: 7; ChopType: 3; PlatformSegment: 0
Memory behind processor 0 running at DDR-4800
Memory behind processor 1 running at DDR-4800
[ScktId: 0] Initialize clocks for all MemSs - 96ms
[ScktId: 1] Pipe Sync SBSP Data -- Started
[ScktId: 0] Pipe Sync SBSP Data -- Started
[ScktId: 1] Pipe Sync SBSP Data - 21ms
[ScktId: 0] Pipe Sync SBSP Data - 21ms
[ScktId: 1] Unlock Memory -- Started
[ScktId: 0] Unlock Memory -- Started
[ScktId: 1] Unlock Memory - 7ms
[ScktId: 0] Unlock Memory - 7ms
[ScktId: 1] Pipe Sync AP Data -- Started
[ScktId: 0] Pipe Sync AP Data -- Started
[ScktId: 0] Pipe Sync AP Data - 21ms
[ScktId: 1] Pipe Sync AP Data - 24ms
[ScktId: 0] HBM Pre-Training -- Started
[ScktId: 1] HBM Pre-Training -- Started
HBMIO flows: set to 0xFFFFFF7F!
HBMIO flows: set to 0xFFFFFF7F!
Get socket PPIN
Get socket PPIN
: PPIN = 22E546CB1AD8E915
: PPIN = 22E548CB80015B4D
HBM frequency = 3200MHz
HBM frequency = 3200MHz
Hbm Policy Option: DisableRefreshPostpone = 0
Socket1 HbmIo0, HW Rev: 0x110, FW Rev: 0x2180, Patch ID: 0x0, Unique ID: 0x18, Product ID: 0x2
Hbm Policy Option: RefreshMode = 1
Socket1 HbmIo1, HW Rev: 0x110, FW Rev: 0x2180, Patch ID: 0x0, Unique ID: 0x18, Product ID: 0x2
Socket0 HbmIo0, HW Rev: 0x110, FW Rev: 0x2180, Patch ID: 0x0, Unique ID: 0x18, Product ID: 0x2
Socket1 HbmIo2, HW Rev: 0x110, FW Rev: 0x2180, Patch ID: 0x0, Unique ID: 0x18, Product ID: 0x2
Socket0 HbmIo1, HW Rev: 0x110, FW Rev: 0x2180, Patch ID: 0x0, Unique ID: 0x18, Product ID: 0x2
Socket1 HbmIo3, HW Rev: 0x110, FW Rev: 0x2180, Patch ID: 0x0, Unique ID: 0x18, Product ID: 0x2
Socket0 HbmIo2, HW Rev: 0x110, FW Rev: 0x2180, Patch ID: 0x0, Unique ID: 0x18, Product ID: 0x2
[ScktId: 1] HBM Pre-Training - 109ms
Socket0 HbmIo3, HW Rev: 0x110, FW Rev: 0x2180, Patch ID: 0x0, Unique ID: 0x18, Product ID: 0x2
[ScktId: 1] AP HBM Information -- Started
[ScktId: 0] HBM Pre-Training - 141ms
[ScktId: 0] AP HBM Information -- Started
[ScktId: 0] AP HBM Information - 5ms
[ScktId: 1] AP HBM Information - 25ms
[ScktId: 0] Pipe Sync SBSP Status -- Started
[ScktId: 1] Pipe Sync SBSP Status -- Started
[ScktId: 1] Pipe Sync SBSP Status - 8ms
[ScktId: 0] Pipe Sync SBSP Status - 12ms
[ScktId: 1] Check XMP -- Started
[ScktId: 0] Check XMP -- Started
[ScktId: 1] Check XMP - 7ms
[ScktId: 0] Check XMP - 6ms
N1 Checked into Pipe
[ScktId: 0] Set Vdd -- Started
[ScktId: 0] Set Vdd - 5ms
[ScktId: 1] Power on Memory -- Started
[ScktId: 0] Power on Memory -- Started
N1.C00.D0: PMIC in Secure Mode, PMIC voltage programming aborted!
N0.C00.D0: PMIC in Secure Mode, PMIC voltage programming aborted!
N1.C02.D0: PMIC in Secure Mode, PMIC voltage programming aborted!
N0.C02.D0: PMIC in Secure Mode, PMIC voltage programming aborted!
N1.C04.D0: PMIC in Secure Mode, PMIC voltage programming aborted!
N0.C04.D0: PMIC in Secure Mode, PMIC voltage programming aborted!
N1.C06.D0: PMIC in Secure Mode, PMIC voltage programming aborted!
N0.C06.D0: PMIC in Secure Mode, PMIC voltage programming aborted!
[ScktId: 1] Power on Memory - 216ms
[ScktId: 0] Power on Memory - 223ms
[ScktId: 1] Ddrio Power Status Check -- Started
[ScktId: 0] Ddrio Power Status Check -- Started
[ScktId: 1] Ddrio Power Status Check - 8ms
[ScktId: 0] Ddrio Power Status Check - 9ms
[ScktId: 1] Pipe Sync AP Data -- Started
[ScktId: 0] Pipe Sync AP Data -- Started
[ScktId: 0] Pipe Sync AP Data - 21ms
[ScktId: 1] Pipe Sync AP Data - 25ms
N1 Checked into Pipe
[ScktId: 0] Configure DIMM Ranks -- Started
[ScktId: 0] Configure DIMM Ranks - 6ms
[ScktId: 1] Pipe Sync SBSP Data -- Started
[ScktId: 0] Pipe Sync SBSP Data -- Started
[ScktId: 1] Pipe Sync SBSP Data - 21ms
[ScktId: 0] Pipe Sync SBSP Data - 21ms
[ScktId: 1] Initialize Throttling Early -- Started
[ScktId: 0] Initialize Throttling Early -- Started
[ScktId: 1] Initialize Throttling Early - 9ms
[ScktId: 0] Initialize Throttling Early - 10ms
[ScktId: 1] Initialize Memory -- Started
[ScktId: 0] Initialize Memory -- Started
[ScktId: 1] Initialize Memory - 8ms
[ScktId: 0] Initialize Memory - 8ms
[ScktId: 1] Gather SPD Data -- Started
[ScktId: 0] Gather SPD Data -- Started
N1: Bus Instance = 0; I2C speed = 3; I3C speed = 2; Bus mode = 0
N0: Bus Instance = 0; I2C speed = 3; I3C speed = 2; Bus mode = 0
N1: Bus Instance = 0; I2C speed = 3; I3C speed = 2; Bus mode = 1
N0: Bus Instance = 0; I2C speed = 3; I3C speed = 2; Bus mode = 1
N1: I3C Instance 0: Switch to I3C mode - Status = Success
N0: I3C Instance 0: Switch to I3C mode - Status = Success
N1: Bus Instance = 1; I2C speed = 3; I3C speed = 2; Bus mode = 0
N0: Bus Instance = 1; I2C speed = 3; I3C speed = 2; Bus mode = 0
N1: Bus Instance = 1; I2C speed = 3; I3C speed = 2; Bus mode = 1
N0: Bus Instance = 1; I2C speed = 3; I3C speed = 2; Bus mode = 1
N1: I3C Instance 1: Switch to I3C mode - Status = Success
N0: I3C Instance 1: Switch to I3C mode - Status = Success
[ScktId: 1] Gather SPD Data - 86ms
[ScktId: 1] Socket DIMM Information -- Started
[ScktId: 0] Gather SPD Data - 88ms
==========================================================================================================================================================================
START_SOCKET_1_DIMMINFO_TABLE
SPR Ex - Socket 2S
==========================================================================================================================================================================
S| Channel 0 | Channel 1 | Channel 2 | Channel 3 | Channel 4 | Channel 5 | Channel 6 | Channel 7 |
==========================================================================================================================================================================
0| DIMM: Micron | Not installed | DIMM: Micron | Not installed | DIMM: Micron | Not installed | DIMM: Micron | Not installed |
| DRAM: Micron | | DRAM: Micron | | DRAM: Micron | | DRAM: Micron | |
| RCD: IDT | | RCD: IDT | | RCD: IDT | | RCD: IDT | |
|RCD Rev: 0x33 | |RCD Rev: 0x33 | |RCD Rev: 0x33 | |RCD Rev: 0x33 | |
| DB Ven: N/A | | DB Ven: N/A | | DB Ven: N/A | | DB Ven: N/A | |
| DB Rev: N/A | | DB Rev: N/A | | DB Rev: N/A | | DB Rev: N/A | |
| PMIC: MPS | | PMIC: MPS | | PMIC: MPS | | PMIC: MPS | |
|PMICRev: 0x12 | |PMICRev: 0x12 | |PMICRev: 0x12 | |PMICRev: 0x12 | |
|SPD Dev: IDT | |SPD Dev: IDT | |SPD Dev: IDT | |SPD Dev: IDT | |
|Dev Rev: 0x21 | |Dev Rev: 0x21 | |Dev Rev: 0x21 | |Dev Rev: 0x21 | |
| SPD BL: 0.9 | | SPD BL: 0.9 | | SPD BL: 0.9 | | SPD BL: 0.9 | |
| TSOD: IDT | | TSOD: IDT | | TSOD: IDT | | TSOD: IDT | |
|TSODRev: 0x12 | |TSODRev: 0x12 | |TSODRev: 0x12 | |TSODRev: 0x12 | |
| | | | | | | | |
| 32GB( 16Gbx4 SR)| | 32GB( 16Gbx4 SR)| | 32GB( 16Gbx4 SR)| | 32GB( 16Gbx4 SR)| |
| DDR5 RDIMM R/C-F | | DDR5 RDIMM R/C-F | | DDR5 RDIMM R/C-F | | DDR5 RDIMM R/C-F | |
| 4800 39-39-39 | | 4800 39-39-39 | | 4800 39-39-39 | | 4800 39-39-39 | |
| ww51 2021 | | ww51 2021 | | ww51 2021 | | ww51 2021 | |
|MTC18F1045S1PC48BA2 | |MTC18F1045S1PC48BA2 | |MTC18F1045S1PC48BA2 | |MTC18F1045S1PC48BA2 | |
| | | | | | | | |
|0x002C0F2151336C7DD8| |0x002C0F2151336C7E17| |0x002C0F2151336C7DDA| |0x002C0F2151336C7E33| |
| | | | | | | | |
--------------------------------------------------------------------------------------------------------------------------------------------------------------------------
1| Not installed | Not installed | Not installed | Not installed | Not installed | Not installed | Not installed | Not installed |
--------------------------------------------------------------------------------------------------------------------------------------------------------------------------
STOP_SOCKET_1_DIMMINFO_TABLE
==========================================================================================================================================================================
[ScktId: 0] Socket DIMM Information -- Started
[ScktId: 1] Socket DIMM Information - 580ms
==========================================================================================================================================================================
START_SOCKET_0_DIMMINFO_TABLE
SPR Ex - Socket 2S
==========================================================================================================================================================================
S| Channel 0 | Channel 1 | Channel 2 | Channel 3 | Channel 4 | Channel 5 | Channel 6 | Channel 7 |
==========================================================================================================================================================================
0| DIMM: Micron | Not installed | DIMM: Micron | Not installed | DIMM: Micron | Not installed | DIMM: Micron | Not installed |
| DRAM: Micron | | DRAM: Micron | | DRAM: Micron | | DRAM: Micron | |
| RCD: IDT | | RCD: IDT | | RCD: IDT | | RCD: IDT | |
|RCD Rev: 0x33 | |RCD Rev: 0x33 | |RCD Rev: 0x33 | |RCD Rev: 0x33 | |
| DB Ven: N/A | | DB Ven: N/A | | DB Ven: N/A | | DB Ven: N/A | |
| DB Rev: N/A | | DB Rev: N/A | | DB Rev: N/A | | DB Rev: N/A | |
| PMIC: MPS | | PMIC: MPS | | PMIC: MPS | | PMIC: MPS | |
|PMICRev: 0x12 | |PMICRev: 0x12 | |PMICRev: 0x12 | |PMICRev: 0x12 | |
|SPD Dev: IDT | |SPD Dev: IDT | |SPD Dev: IDT | |SPD Dev: IDT | |
|Dev Rev: 0x21 | |Dev Rev: 0x21 | |Dev Rev: 0x21 | |Dev Rev: 0x21 | |
| SPD BL: 0.9 | | SPD BL: 0.9 | | SPD BL: 0.9 | | SPD BL: 0.9 | |
| TSOD: IDT | | TSOD: IDT | | TSOD: IDT | | TSOD: IDT | |
|TSODRev: 0x12 | |TSODRev: 0x12 | |TSODRev: 0x12 | |TSODRev: 0x12 | |
| | | | | | | | |
| 32GB( 16Gbx4 SR)| | 32GB( 16Gbx4 SR)| | 32GB( 16Gbx4 SR)| | 32GB( 16Gbx4 SR)| |
| DDR5 RDIMM R/C-F | | DDR5 RDIMM R/C-F | | DDR5 RDIMM R/C-F | | DDR5 RDIMM R/C-F | |
| 4800 39-39-39 | | 4800 39-39-39 | | 4800 39-39-39 | | 4800 39-39-39 | |
| ww51 2021 | | ww51 2021 | | ww51 2021 | | ww51 2021 | |
|MTC18F1045S1PC48BA2 | |MTC18F1045S1PC48BA2 | |MTC18F1045S1PC48BA2 | |MTC18F1045S1PC48BA2 | |
| | | | | | | | |
|0x002C0F2151336C7E2C| |0x002C0F2151336C7E24| |0x002C0F2151336C7E3A| |0x002C0F2151336C7E3F| |
| | | | | | | | |
--------------------------------------------------------------------------------------------------------------------------------------------------------------------------
1| Not installed | Not installed | Not installed | Not installed | Not installed | Not installed | Not installed | Not installed |
--------------------------------------------------------------------------------------------------------------------------------------------------------------------------
STOP_SOCKET_0_DIMMINFO_TABLE
==========================================================================================================================================================================
[ScktId: 1] Early Configuration -- Started
[ScktId: 0] Socket DIMM Information - 1153ms
N1.C00: MCSCRAMBLE_SEED_SEL_MCDDC_DP_REG access function - average write latency = 419 ns
[ScktId: 0] Early Configuration -- Started
N1.C01: MCSCRAMBLE_SEED_SEL_MCDDC_DP_REG access function - average write latency = 400 ns
N0.C00: MCSCRAMBLE_SEED_SEL_MCDDC_DP_REG access function - average write latency = 333 ns
N1.C02: MCSCRAMBLE_SEED_SEL_MCDDC_DP_REG access function - average write latency = 510 ns
N0.C01: MCSCRAMBLE_SEED_SEL_MCDDC_DP_REG access function - average write latency = 348 ns
N1.C03: MCSCRAMBLE_SEED_SEL_MCDDC_DP_REG access function - average write latency = 523 ns
N0.C02: MCSCRAMBLE_SEED_SEL_MCDDC_DP_REG access function - average write latency = 438 ns
N1.C04: MCSCRAMBLE_SEED_SEL_MCDDC_DP_REG access function - average write latency = 561 ns
N0.C03: MCSCRAMBLE_SEED_SEL_MCDDC_DP_REG access function - average write latency = 440 ns
N1.C05: MCSCRAMBLE_SEED_SEL_MCDDC_DP_REG access function - average write latency = 583 ns
N0.C04: MCSCRAMBLE_SEED_SEL_MCDDC_DP_REG access function - average write latency = 526 ns
N1.C06: MCSCRAMBLE_SEED_SEL_MCDDC_DP_REG access function - average write latency = 686 ns
N0.C05: MCSCRAMBLE_SEED_SEL_MCDDC_DP_REG access function - average write latency = 509 ns
N1.C07: MCSCRAMBLE_SEED_SEL_MCDDC_DP_REG access function - average write latency = 675 ns
N0.C06: MCSCRAMBLE_SEED_SEL_MCDDC_DP_REG access function - average write latency = 624 ns
N1.C00: MCSCRAMBLE_SEED_SEL_MCDDC_DP_REG access function - average read latency = 372 ns
N0.C07: MCSCRAMBLE_SEED_SEL_MCDDC_DP_REG access function - average write latency = 605 ns
N1.C01: MCSCRAMBLE_SEED_SEL_MCDDC_DP_REG access function - average read latency = 360 ns
N0.C00: MCSCRAMBLE_SEED_SEL_MCDDC_DP_REG access function - average read latency = 318 ns
N1.C02: MCSCRAMBLE_SEED_SEL_MCDDC_DP_REG access function - average read latency = 462 ns
N0.C01: MCSCRAMBLE_SEED_SEL_MCDDC_DP_REG access function - average read latency = 330 ns
N1.C03: MCSCRAMBLE_SEED_SEL_MCDDC_DP_REG access function - average read latency = 473 ns
N0.C02: MCSCRAMBLE_SEED_SEL_MCDDC_DP_REG access function - average read latency = 416 ns
N1.C04: MCSCRAMBLE_SEED_SEL_MCDDC_DP_REG access function - average read latency = 525 ns
N0.C03: MCSCRAMBLE_SEED_SEL_MCDDC_DP_REG access function - average read latency = 418 ns
N1.C05: MCSCRAMBLE_SEED_SEL_MCDDC_DP_REG access function - average read latency = 536 ns
N0.C04: MCSCRAMBLE_SEED_SEL_MCDDC_DP_REG access function - average read latency = 501 ns
N1.C06: MCSCRAMBLE_SEED_SEL_MCDDC_DP_REG access function - average read latency = 637 ns
N0.C05: MCSCRAMBLE_SEED_SEL_MCDDC_DP_REG access function - average read latency = 489 ns
N1.C07: MCSCRAMBLE_SEED_SEL_MCDDC_DP_REG access function - average read latency = 627 ns
N0.C06: MCSCRAMBLE_SEED_SEL_MCDDC_DP_REG access function - average read latency = 599 ns
S1 TME CPUID = 1
S1 TmeActivated = 0
S1 TME CPUID = 1
S1 TmeActivated = 0
N0.C07: MCSCRAMBLE_SEED_SEL_MCDDC_DP_REG access function - average read latency = 584 ns
S1 TME CPUID = 1
S0 TME CPUID = 1
S1 TmeActivated = 0
S0 TmeActivated = 0
S1 TME CPUID = 1
S0 TME CPUID = 1
S1 TmeActivated = 0
S0 TmeActivated = 0
tRRDD -- MinVal = 0x2, value = 0x0, adjusted to MinVal.
S0 TME CPUID = 1
tWWDD -- MinVal = 0x2, value = 0x0, adjusted to MinVal.
S0 TmeActivated = 0
tRWDD -- MinVal = 0x2, value = 0x0, adjusted to MinVal.
S0 TME CPUID = 1
tWRDD -- MinVal = 0x2, value = 0x0, adjusted to MinVal.
S0 TmeActivated = 0
tRRDS -- MinVal = 0x2, value = 0x0, adjusted to MinVal.
tRRDD -- MinVal = 0x2, value = 0x0, adjusted to MinVal.
tWWDS -- MinVal = 0x2, value = 0x0, adjusted to MinVal.
tWWDD -- MinVal = 0x2, value = 0x0, adjusted to MinVal.
tRWDS -- MinVal = 0x2, value = 0x0, adjusted to MinVal.
tRWDD -- MinVal = 0x2, value = 0x0, adjusted to MinVal.
tRRDS -- MinVal = 0x2, value = 0x0, adjusted to MinVal.
tWRDD -- MinVal = 0x2, value = 0x0, adjusted to MinVal.
tRRDD -- MinVal = 0x2, value = 0x0, adjusted to MinVal.
tRRDS -- MinVal = 0x2, value = 0x0, adjusted to MinVal.
tWWDD -- MinVal = 0x2, value = 0x0, adjusted to MinVal.
tWWDS -- MinVal = 0x2, value = 0x0, adjusted to MinVal.
tRWDD -- MinVal = 0x2, value = 0x0, adjusted to MinVal.
tRWDS -- MinVal = 0x2, value = 0x0, adjusted to MinVal.
tWRDD -- MinVal = 0x2, value = 0x0, adjusted to MinVal.
tRRDS -- MinVal = 0x2, value = 0x0, adjusted to MinVal.
tRRDS -- MinVal = 0x2, value = 0x0, adjusted to MinVal.
tRRDD -- MinVal = 0x2, value = 0x0, adjusted to MinVal.
tWWDS -- MinVal = 0x2, value = 0x0, adjusted to MinVal.
tWWDD -- MinVal = 0x2, value = 0x0, adjusted to MinVal.
tRWDS -- MinVal = 0x2, value = 0x0, adjusted to MinVal.
tRWDD -- MinVal = 0x2, value = 0x0, adjusted to MinVal.
tRRDS -- MinVal = 0x2, value = 0x0, adjusted to MinVal.
tWRDD -- MinVal = 0x2, value = 0x0, adjusted to MinVal.
tRRDD -- MinVal = 0x2, value = 0x0, adjusted to MinVal.
tRRDS -- MinVal = 0x2, value = 0x0, adjusted to MinVal.
tWWDD -- MinVal = 0x2, value = 0x0, adjusted to MinVal.
tWWDS -- MinVal = 0x2, value = 0x0, adjusted to MinVal.
tRWDD -- MinVal = 0x2, value = 0x0, adjusted to MinVal.
tRWDS -- MinVal = 0x2, value = 0x0, adjusted to MinVal.
tWRDD -- MinVal = 0x2, value = 0x0, adjusted to MinVal.
tRRDS -- MinVal = 0x2, value = 0x0, adjusted to MinVal.
tRRDS -- MinVal = 0x2, value = 0x0, adjusted to MinVal.
tRRDD -- MinVal = 0x2, value = 0x0, adjusted to MinVal.
tWWDS -- MinVal = 0x2, value = 0x0, adjusted to MinVal.
tWWDD -- MinVal = 0x2, value = 0x0, adjusted to MinVal.
tRWDS -- MinVal = 0x2, value = 0x0, adjusted to MinVal.
tRWDD -- MinVal = 0x2, value = 0x0, adjusted to MinVal.
tRRDS -- MinVal = 0x2, value = 0x0, adjusted to MinVal.
tWRDD -- MinVal = 0x2, value = 0x0, adjusted to MinVal.
tRRDD -- MinVal = 0x2, value = 0x0, adjusted to MinVal.
tRRDS -- MinVal = 0x2, value = 0x0, adjusted to MinVal.
tWWDD -- MinVal = 0x2, value = 0x0, adjusted to MinVal.
tWWDS -- MinVal = 0x2, value = 0x0, adjusted to MinVal.
tRWDD -- MinVal = 0x2, value = 0x0, adjusted to MinVal.
tRWDS -- MinVal = 0x2, value = 0x0, adjusted to MinVal.
tWRDD -- MinVal = 0x2, value = 0x0, adjusted to MinVal.
tRRDS -- MinVal = 0x2, value = 0x0, adjusted to MinVal.
tRRDS -- MinVal = 0x2, value = 0x0, adjusted to MinVal.
tRRDD -- MinVal = 0x2, value = 0x0, adjusted to MinVal.
tWWDS -- MinVal = 0x2, value = 0x0, adjusted to MinVal.
tWWDD -- MinVal = 0x2, value = 0x0, adjusted to MinVal.
tRWDS -- MinVal = 0x2, value = 0x0, adjusted to MinVal.
tRWDD -- MinVal = 0x2, value = 0x0, adjusted to MinVal.
tRRDS -- MinVal = 0x2, value = 0x0, adjusted to MinVal.
tWRDD -- MinVal = 0x2, value = 0x0, adjusted to MinVal.
[ScktId: 1] Early Configuration - 1273ms
tRRDS -- MinVal = 0x2, value = 0x0, adjusted to MinVal.
[ScktId: 1] DDRIO Initialization -- Started
tWWDS -- MinVal = 0x2, value = 0x0, adjusted to MinVal.
tRWDS -- MinVal = 0x2, value = 0x0, adjusted to MinVal.
tRRDS -- MinVal = 0x2, value = 0x0, adjusted to MinVal.
[ScktId: 0] Early Configuration - 728ms
[ScktId: 0] DDRIO Initialization -- Started
[ScktId: 1] DDRIO Initialization - 38ms
[ScktId: 1] DDRIO Initialization Late -- Started
DfxTimingOverride10nm Starts
[ScktId: 1] DDRIO Initialization Late - 17ms
[ScktId: 0] DDRIO Initialization - 32ms
[ScktId: 1] Pipe Sync AP Data -- Started
[ScktId: 0] DDRIO Initialization Late -- Started
DfxTimingOverride10nm Starts
[ScktId: 0] DDRIO Initialization Late - 20ms
[ScktId: 0] Pipe Sync AP Data -- Started
[ScktId: 0] Pipe Sync AP Data - 17ms
[ScktId: 1] Pipe Sync AP Data - 46ms
[ScktId: 0] Pipe Sync AP Smbus Mode -- Started
[ScktId: 1] Pipe Sync AP Smbus Mode -- Started
[ScktId: 1] Pipe Sync AP Smbus Mode - 9ms
[ScktId: 0] Pipe Sync AP Smbus Mode - 13ms
[ScktId: 1] Pipe Sync AP Reset Status -- Started
[ScktId: 0] Pipe Sync AP Reset Status -- Started
[ScktId: 0] Pipe Sync AP Reset Status - 9ms
[ScktId: 1] Pipe Sync AP Reset Status - 13ms
[ScktId: 0] Pipe Sync SBSP Status -- Started
[ScktId: 1] Pipe Sync SBSP Status -- Started
[ScktId: 1] Pipe Sync SBSP Status - 8ms
[ScktId: 0] Pipe Sync SBSP Status - 13ms
[ScktId: 1] DDR Training -- Started
[ScktId: 0] DDR Training -- Started
[ScktId: 1] Pre-Training Initialization -- Started
[ScktId: 0] Pre-Training Initialization -- Started
N1: Bus Instance = 0; I2C speed = 3; I3C speed = 2; Bus mode = 0
N0: Bus Instance = 0; I2C speed = 3; I3C speed = 2; Bus mode = 0
N1: Bus Instance = 0; I2C speed = 3; I3C speed = 2; Bus mode = 1
N0: Bus Instance = 0; I2C speed = 3; I3C speed = 2; Bus mode = 1
N1: I3C Instance 0: Switch to I3C mode - Status = Success
N0: I3C Instance 0: Switch to I3C mode - Status = Success
N1: Bus Instance = 1; I2C speed = 3; I3C speed = 2; Bus mode = 0
N0: Bus Instance = 1; I2C speed = 3; I3C speed = 2; Bus mode = 0
N1: Bus Instance = 1; I2C speed = 3; I3C speed = 2; Bus mode = 1
N0: Bus Instance = 1; I2C speed = 3; I3C speed = 2; Bus mode = 1
N1: I3C Instance 1: Switch to I3C mode - Status = Success
N0: I3C Instance 1: Switch to I3C mode - Status = Success
Socket 1 - Sending 3 NOPS sequence to exit clockstop.
[ScktId: 1] Pre-Training Initialization - 104ms
Socket 0 - Sending 3 NOPS sequence to exit clockstop.
[ScktId: 1] Host CS Training -- Started
[ScktId: 0] Pre-Training Initialization - 111ms
[ScktId: 0] Host CS Training -- Started
N0: Bus Instance = 0; I2C speed = 3; I3C speed = 2; Bus mode = 0
N0: Bus Instance = 0; I2C speed = 3; I3C speed = 2; Bus mode = 1
N1: Bus Instance = 0; I2C speed = 3; I3C speed = 2; Bus mode = 0
N0: I3C Instance 0: Switch to I3C mode - Status = Success
N1: Bus Instance = 0; I2C speed = 3; I3C speed = 2; Bus mode = 1
N0: Bus Instance = 1; I2C speed = 3; I3C speed = 2; Bus mode = 0
N1: I3C Instance 0: Switch to I3C mode - Status = Success
N0: Bus Instance = 1; I2C speed = 3; I3C speed = 2; Bus mode = 1
N1: Bus Instance = 1; I2C speed = 3; I3C speed = 2; Bus mode = 0
N0: I3C Instance 1: Switch to I3C mode - Status = Success
N1: Bus Instance = 1; I2C speed = 3; I3C speed = 2; Bus mode = 1
N1: I3C Instance 1: Switch to I3C mode - Status = Success
[ScktId: 0] Host CS Training - 218ms
[ScktId: 0] Host CA Training Simple -- Started
[ScktId: 1] Host CS Training - 244ms
[ScktId: 1] Host CA Training Simple -- Started
[ScktId: 0] Host CA Training Simple - 341ms
[ScktId: 0] RCD DCA DFE Training -- Started
[ScktId: 1] Host CA Training Simple - 372ms
[ScktId: 1] RCD DCA DFE Training -- Started
[ScktId: 0] RCD DCA DFE Training - 3663ms
[ScktId: 0] Host CA Training Complex -- Started
[ScktId: 0] Host CA Training Complex - 162ms
[ScktId: 0] RCD DCA Slew Rate Training -- Started
[ScktId: 0] RCD DCA Slew Rate Training - 4ms
[ScktId: 0] RCD DCA TCO Training -- Started
[ScktId: 1] RCD DCA DFE Training - 4096ms
[ScktId: 1] Host CA Training Complex -- Started
[ScktId: 0] RCD DCA TCO Training - 553ms
[ScktId: 0] RCD DCA/DCK Duty Cycle Training -- Started
[ScktId: 1] Host CA Training Complex - 171ms
[ScktId: 0] RCD DCA/DCK Duty Cycle Training - 410ms
[ScktId: 1] RCD DCA Slew Rate Training -- Started
[ScktId: 0] Re-center Host CA Training -- Started
[ScktId: 1] RCD DCA Slew Rate Training - 10ms
[ScktId: 1] RCD DCA TCO Training -- Started
[ScktId: 0] Re-center Host CA Training - 170ms
[ScktId: 0] CA temperature compensation -- Started
[ScktId: 0] CA temperature compensation - 5ms
[ScktId: 0] BCOM Training -- Started
[ScktId: 0] BCOM Training - 3ms
[ScktId: 0] RCD QCS Training -- Started
[ScktId: 0] RCD QCS Training - 104ms
[ScktId: 0] RCD QCA Training -- Started
[ScktId: 0] RCD QCA Training - 323ms
[ScktId: 0] PBA Enumeration -- Started
[ScktId: 0] PBA Enumeration - 3ms
[ScktId: 0] REQ Training -- Started
[ScktId: 0] REQ Training - 3ms
[ScktId: 1] RCD DCA TCO Training - 625ms
[ScktId: 0] MDQS Receive Enable Training -- Started
[ScktId: 1] RCD DCA/DCK Duty Cycle Training -- Started
[ScktId: 0] MDQS Receive Enable Training - 9ms
[ScktId: 0] MDQS Read Delay Training -- Started
[ScktId: 1] RCD DCA/DCK Duty Cycle Training - 466ms
[ScktId: 0] MDQS Read Delay Training - 456ms
[ScktId: 1] Re-center Host CA Training -- Started
[ScktId: 0] Receive Enable Training -- Started
[ScktId: 0] Receive Enable Training - 24ms
[ScktId: 0] Read Dq Dqs: Coarse Read DQ/DQS -- Started
[ScktId: 1] Re-center Host CA Training - 179ms
[ScktId: 1] CA temperature compensation -- Started
[ScktId: 1] CA temperature compensation - 5ms
[ScktId: 1] BCOM Training -- Started
[ScktId: 1] BCOM Training - 3ms
[ScktId: 1] RCD QCS Training -- Started
[ScktId: 1] RCD QCS Training - 112ms
[ScktId: 1] RCD QCA Training -- Started
[ScktId: 0] Read Dq Dqs: Coarse Read DQ/DQS - 341ms
[ScktId: 1] RCD QCA Training - 349ms
[ScktId: 0] Read Dq Dqs: Swizzle Discovery -- Started
[ScktId: 1] PBA Enumeration -- Started
[ScktId: 0] Read Dq Dqs: Swizzle Discovery - 10ms
[ScktId: 1] PBA Enumeration - 9ms
[ScktId: 0] Read Dq Dqs: Pre-DFE Read 2D Centering -- Started
[ScktId: 1] REQ Training -- Started
[ScktId: 1] REQ Training - 9ms
[ScktId: 1] MDQS Receive Enable Training -- Started
[ScktId: 1] MDQS Receive Enable Training - 5ms
[ScktId: 1] MDQS Read Delay Training -- Started
[ScktId: 1] MDQS Read Delay Training - 4ms
[ScktId: 1] Receive Enable Training -- Started
[ScktId: 1] Receive Enable Training - 22ms
[ScktId: 1] Read Dq Dqs: Coarse Read DQ/DQS -- Started
[ScktId: 0] Read Dq Dqs: Pre-DFE Read 2D Centering - 93ms
[ScktId: 0] Read Dq Dqs: Duty Cycle Adjuster -- Started
[ScktId: 0] Read Dq Dqs: Duty Cycle Adjuster - 5ms
[ScktId: 0] Read Dq Dqs: Read DFE Training -- Started
[ScktId: 1] Read Dq Dqs: Coarse Read DQ/DQS - 372ms
[ScktId: 1] Read Dq Dqs: Swizzle Discovery -- Started
[ScktId: 1] Read Dq Dqs: Swizzle Discovery - 6ms
[ScktId: 1] Read Dq Dqs: Pre-DFE Read 2D Centering -- Started
[ScktId: 1] Read Dq Dqs: Pre-DFE Read 2D Centering - 95ms
[ScktId: 1] Read Dq Dqs: Duty Cycle Adjuster -- Started
[ScktId: 1] Read Dq Dqs: Duty Cycle Adjuster - 5ms
[ScktId: 1] Read Dq Dqs: Read DFE Training -- Started
[ScktId: 0] Read Dq Dqs: Read DFE Training - 3362ms
[ScktId: 0] Read Dq Dqs: Post-DFE Read 2D Centering -- Started
[ScktId: 0] Read Dq Dqs: Post-DFE Read 2D Centering - 628ms
[ScktId: 0] Switch to DDRT2 Mode -- Started
[ScktId: 0] Switch to DDRT2 Mode - 4ms
[ScktId: 0] Buffer DRAM Write Leveling Training -- Started
[ScktId: 0] Buffer DRAM Write Leveling Training - 5ms
[ScktId: 0] Buffer Write Delay Training -- Started
[ScktId: 0] Buffer Write Delay Training - 5ms
[ScktId: 0] Write Leveling Training -- Started
[ScktId: 0] Write Leveling Training - 95ms
[ScktId: 0] Write Dq Dqs: Coarse Write DQ/DQS -- Started
[ScktId: 1] Read Dq Dqs: Read DFE Training - 3693ms
[ScktId: 1] Read Dq Dqs: Post-DFE Read 2D Centering -- Started
[ScktId: 0] Write Dq Dqs: Coarse Write DQ/DQS - 540ms
[ScktId: 0] Write Dq Dqs: Pre-DFE Write 2D Centering -- Started
N0.C00.D0.R0: High = 19 - Low = -25
N0.C00: Composite High = 19 - Composite Low = -25
N0.C02.D0.R0: High = 18 - Low = -22
N0.C02: Composite High = 18 - Composite Low = -22
N0.C04.D0.R0: High = 22 - Low = -22
N0.C04: Composite High = 22 - Composite Low = -22
[ScktId: 1] Read Dq Dqs: Post-DFE Read 2D Centering - 684ms
N0.C06.D0.R0: High = 18 - Low = -20
[ScktId: 1] Switch to DDRT2 Mode -- Started
N0.C06: Composite High = 18 - Composite Low = -20
[ScktId: 1] Switch to DDRT2 Mode - 7ms
N0: Get eye height
[ScktId: 1] Buffer DRAM Write Leveling Training -- Started
N0: Low: -20 High: 18
[ScktId: 1] Buffer DRAM Write Leveling Training - 7ms
N0: Eye height = 38
[ScktId: 1] Buffer Write Delay Training -- Started
N0: Timing Limited
[ScktId: 1] Buffer Write Delay Training - 7ms
[ScktId: 1] Write Leveling Training -- Started
[ScktId: 0] Write Dq Dqs: Pre-DFE Write 2D Centering - 304ms
[ScktId: 0] Write Dq Dqs: Slew Rate DQ -- Started
[ScktId: 0] Write Dq Dqs: Slew Rate DQ - 4ms
[ScktId: 1] Write Leveling Training - 103ms
[ScktId: 0] Write Dq Dqs: TCO DQ -- Started
[ScktId: 1] Write Dq Dqs: Coarse Write DQ/DQS -- Started
[ScktId: 0] Write Dq Dqs: TCO DQ - 8ms
[ScktId: 0] Write Dq Dqs: Write DFE Training -- Started
[ScktId: 1] Write Dq Dqs: Coarse Write DQ/DQS - 612ms
[ScktId: 1] Write Dq Dqs: Pre-DFE Write 2D Centering -- Started
N1.C00.D0.R0: High = 22 - Low = -22
N1.C00: Composite High = 22 - Composite Low = -22
N1.C02.D0.R0: High = 18 - Low = -23
N1.C02: Composite High = 18 - Composite Low = -23
N1.C04.D0.R0: High = 19 - Low = -22
N1.C04: Composite High = 19 - Composite Low = -22
N1.C06.D0.R0: High = 20 - Low = -20
N1.C06: Composite High = 20 - Composite Low = -20
N1: Get eye height
N1: Low: -20 High: 18
N1: Eye height = 38
N1: Timing Limited
[ScktId: 1] Write Dq Dqs: Pre-DFE Write 2D Centering - 305ms
[ScktId: 1] Write Dq Dqs: Slew Rate DQ -- Started
[ScktId: 1] Write Dq Dqs: Slew Rate DQ - 4ms
[ScktId: 1] Write Dq Dqs: TCO DQ -- Started
[ScktId: 1] Write Dq Dqs: TCO DQ - 4ms
[ScktId: 1] Write Dq Dqs: Write DFE Training -- Started
[ScktId: 0] Write Dq Dqs: Write DFE Training - 4228ms
[ScktId: 0] Buffer Write DFE Training -- Started
[ScktId: 0] Buffer Write DFE Training - 4ms
[ScktId: 0] Write Dq Dqs: Write ODT Latency Training -- Started
[ScktId: 0] Write Dq Dqs: Write ODT Latency Training - 8ms
[ScktId: 0] Command Normalization -- Started
[ScktId: 0] Command Normalization - 20ms
[ScktId: 0] Write Dq Dqs: Post-DFE Write 2D Centering -- Started
N0.C00.D0.R0: High = 20 - Low = -21
N0.C00: Composite High = 20 - Composite Low = -21
N0.C02.D0.R0: High = 21 - Low = -21
N0.C02: Composite High = 21 - Composite Low = -21
N0.C04.D0.R0: High = 22 - Low = -21
N0.C04: Composite High = 22 - Composite Low = -21
N0.C06.D0.R0: High = 19 - Low = -21
N0.C06: Composite High = 19 - Composite Low = -21
N0: Get eye height
N0: Low: -21 High: 19
N0: Eye height = 40
N0: Timing Limited
[ScktId: 1] Write Dq Dqs: Write DFE Training - 4612ms
[ScktId: 1] Buffer Write DFE Training -- Started
[ScktId: 1] Buffer Write DFE Training - 4ms
[ScktId: 1] Write Dq Dqs: Write ODT Latency Training -- Started
[ScktId: 1] Write Dq Dqs: Write ODT Latency Training - 8ms
[ScktId: 1] Command Normalization -- Started
[ScktId: 1] Command Normalization - 22ms
[ScktId: 1] Write Dq Dqs: Post-DFE Write 2D Centering -- Started
N1.C00.D0.R0: High = 21 - Low = -21
N1.C00: Composite High = 21 - Composite Low = -21
N1.C02.D0.R0: High = 20 - Low = -20
N1.C02: Composite High = 20 - Composite Low = -20
N1.C04.D0.R0: High = 21 - Low = -21
N1.C04: Composite High = 21 - Composite Low = -21
N1.C06.D0.R0: High = 19 - Low = -21
N1.C06: Composite High = 19 - Composite Low = -21
N1: Get eye height
N1: Low: -20 High: 19
[ScktId: 0] Write Dq Dqs: Post-DFE Write 2D Centering - 1704ms
N1: Eye height = 39
[ScktId: 0] Initialize Tx DQ Periodic Retraining -- Started
N1: Timing Limited
[ScktId: 0] Initialize Tx DQ Periodic Retraining - 9ms
[ScktId: 0] Read Dq Dqs: Post-DFE Read 2D Centering Late -- Started
[ScktId: 1] Write Dq Dqs: Post-DFE Write 2D Centering - 1652ms
[ScktId: 1] Initialize Tx DQ Periodic Retraining -- Started
[ScktId: 1] Initialize Tx DQ Periodic Retraining - 7ms
[ScktId: 1] Read Dq Dqs: Post-DFE Read 2D Centering Late -- Started
[ScktId: 0] Read Dq Dqs: Post-DFE Read 2D Centering Late - 12501ms
[ScktId: 0] Initialize Rx DQS Periodic Retraining -- Started
[ScktId: 0] Initialize Rx DQS Periodic Retraining - 6ms
[ScktId: 0] MemSweepTester -- Started
[ScktId: 0] MemSweepTester - 3ms
[ScktId: 0] PPR Flow -- Started
Calling PostPackageRepair
[ScktId: 0] PPR Flow - 6ms
[ScktId: 0] Roundtrip Latency Optimization -- Started
[ScktId: 0] Roundtrip Latency Optimization - 836ms
[ScktId: 0] Turnarounds Training -- Started
[ScktId: 1] Read Dq Dqs: Post-DFE Read 2D Centering Late - 12384ms
[ScktId: 1] Initialize Rx DQS Periodic Retraining -- Started
[ScktId: 1] Initialize Rx DQS Periodic Retraining - 6ms
[ScktId: 1] MemSweepTester -- Started
[ScktId: 1] MemSweepTester - 3ms
[ScktId: 1] PPR Flow -- Started
Calling PostPackageRepair
[ScktId: 1] PPR Flow - 6ms
[ScktId: 1] Roundtrip Latency Optimization -- Started
[ScktId: 0] Turnarounds Training - 522ms
Total MRC time = 32454ms
[ScktId: 0] DDR Training - 32464ms
[ScktId: 0] Pipe Sync AP Smbus Mode -- Started
[ScktId: 1] Roundtrip Latency Optimization - 868ms
[ScktId: 1] Turnarounds Training -- Started
[ScktId: 1] Turnarounds Training - 536ms
Total MRC time = 33650ms
[ScktId: 1] DDR Training - 33661ms
[ScktId: 1] Pipe Sync AP Smbus Mode -- Started
[ScktId: 0] Pipe Sync AP Smbus Mode - 1197ms
[ScktId: 1] Pipe Sync AP Smbus Mode - 4ms
[ScktId: 0] Display Training Results -- Started
[ScktId: 1] Display Training Results -- Started
[ScktId: 0] Display Training Results - 105ms
[ScktId: 1] Display Training Results - 205ms
[ScktId: 0] Check Training Results -- Started
[ScktId: 1] Check Training Results -- Started
[ScktId: 0] Check Training Results - 9ms
[ScktId: 1] Check Training Results - 9ms
[ScktId: 0] HBM Training -- Started
[ScktId: 1] HBM Training -- Started
HbmioMailbox -In Mailbox Full Prod Training (Cold Reset)
HbmioMailbox -In Mailbox Full Prod Training (Cold Reset)
Executing full_prod_training on Socket 0, HBMIO 0
Executing full_prod_training on Socket 1, HBMIO 0
Training result: return_data0 = 0x0, return_data1 = 0xB00
Training result: return_data0 = 0x0, return_data1 = 0xB00
Executing full_prod_training on Socket 0, HBMIO 1
Executing full_prod_training on Socket 1, HBMIO 1
Training result: return_data0 = 0x0, return_data1 = 0xB00
Training result: return_data0 = 0x0, return_data1 = 0xB00
Executing full_prod_training on Socket 0, HBMIO 2
Executing full_prod_training on Socket 1, HBMIO 2
Training result: return_data0 = 0x0, return_data1 = 0xB00
Training result: return_data0 = 0x0, return_data1 = 0xB00
Executing full_prod_training on Socket 0, HBMIO 3
Executing full_prod_training on Socket 1, HBMIO 3
Training result: return_data0 = 0x0, return_data1 = 0xB00
Training result: return_data0 = 0x0, return_data1 = 0xB00
Socket0 HbmCh0, PI Code:
Socket1 HbmCh0, PI Code:
DWord DQ: txdq_pi0_code = 0x1, txdq_pi1_code = 0x41
DWord DQ: txdq_pi0_code = 0x1, txdq_pi1_code = 0x41
DWord DQS: dqs_pi0_code = 0x20, dqs_pi1_code = 0x60
DWord DQS: dqs_pi0_code = 0x20, dqs_pi1_code = 0x60
AWord DQ: txdq_pi0_code = 0x7E, txdq_pi1_code = 0x3E
AWord DQ: txdq_pi0_code = 0x0, txdq_pi1_code = 0x40
AWord DQS: dqs_pi0_code = 0x20, dqs_pi1_code = 0x60
AWord DQS: dqs_pi0_code = 0x20, dqs_pi1_code = 0x60
Socket0 HbmCh1, PI Code:
Socket1 HbmCh1, PI Code:
DWord DQ: txdq_pi0_code = 0x0, txdq_pi1_code = 0x40
DWord DQ: txdq_pi0_code = 0x2, txdq_pi1_code = 0x42
DWord DQS: dqs_pi0_code = 0x20, dqs_pi1_code = 0x60
DWord DQS: dqs_pi0_code = 0x20, dqs_pi1_code = 0x60
AWord DQ: txdq_pi0_code = 0x7F, txdq_pi1_code = 0x3F
AWord DQ: txdq_pi0_code = 0x7E, txdq_pi1_code = 0x3E
AWord DQS: dqs_pi0_code = 0x20, dqs_pi1_code = 0x60
AWord DQS: dqs_pi0_code = 0x20, dqs_pi1_code = 0x60
Socket0 HbmCh2, PI Code:
Socket1 HbmCh2, PI Code:
DWord DQ: txdq_pi0_code = 0x1, txdq_pi1_code = 0x41
DWord DQ: txdq_pi0_code = 0x0, txdq_pi1_code = 0x40
DWord DQS: dqs_pi0_code = 0x20, dqs_pi1_code = 0x60
DWord DQS: dqs_pi0_code = 0x20, dqs_pi1_code = 0x60
AWord DQ: txdq_pi0_code = 0x7F, txdq_pi1_code = 0x3F
AWord DQ: txdq_pi0_code = 0x7F, txdq_pi1_code = 0x3F
AWord DQS: dqs_pi0_code = 0x20, dqs_pi1_code = 0x60
AWord DQS: dqs_pi0_code = 0x20, dqs_pi1_code = 0x60
Socket0 HbmCh3, PI Code:
Socket1 HbmCh3, PI Code:
DWord DQ: txdq_pi0_code = 0x1, txdq_pi1_code = 0x41
DWord DQ: txdq_pi0_code = 0x7F, txdq_pi1_code = 0x3F
DWord DQS: dqs_pi0_code = 0x20, dqs_pi1_code = 0x60
DWord DQS: dqs_pi0_code = 0x20, dqs_pi1_code = 0x60
AWord DQ: txdq_pi0_code = 0x7F, txdq_pi1_code = 0x3F
AWord DQ: txdq_pi0_code = 0x7F, txdq_pi1_code = 0x3F
AWord DQS: dqs_pi0_code = 0x20, dqs_pi1_code = 0x60
AWord DQS: dqs_pi0_code = 0x20, dqs_pi1_code = 0x60
Socket0 HbmCh4, PI Code:
Socket1 HbmCh4, PI Code:
DWord DQ: txdq_pi0_code = 0x2, txdq_pi1_code = 0x42
DWord DQ: txdq_pi0_code = 0x2, txdq_pi1_code = 0x42
DWord DQS: dqs_pi0_code = 0x20, dqs_pi1_code = 0x60
DWord DQS: dqs_pi0_code = 0x20, dqs_pi1_code = 0x60
AWord DQ: txdq_pi0_code = 0x7F, txdq_pi1_code = 0x3F
AWord DQ: txdq_pi0_code = 0x7F, txdq_pi1_code = 0x3F
AWord DQS: dqs_pi0_code = 0x20, dqs_pi1_code = 0x60
AWord DQS: dqs_pi0_code = 0x20, dqs_pi1_code = 0x60
Socket0 HbmCh5, PI Code:
Socket1 HbmCh5, PI Code:
DWord DQ: txdq_pi0_code = 0x1, txdq_pi1_code = 0x41
DWord DQ: txdq_pi0_code = 0x1, txdq_pi1_code = 0x41
DWord DQS: dqs_pi0_code = 0x20, dqs_pi1_code = 0x60
DWord DQS: dqs_pi0_code = 0x20, dqs_pi1_code = 0x60
AWord DQ: txdq_pi0_code = 0x7F, txdq_pi1_code = 0x3F
AWord DQ: txdq_pi0_code = 0x7E, txdq_pi1_code = 0x3E
AWord DQS: dqs_pi0_code = 0x20, dqs_pi1_code = 0x60
AWord DQS: dqs_pi0_code = 0x20, dqs_pi1_code = 0x60
Socket0 HbmCh6, PI Code:
Socket1 HbmCh6, PI Code:
DWord DQ: txdq_pi0_code = 0x2, txdq_pi1_code = 0x42
DWord DQ: txdq_pi0_code = 0x1, txdq_pi1_code = 0x41
DWord DQS: dqs_pi0_code = 0x20, dqs_pi1_code = 0x60
DWord DQS: dqs_pi0_code = 0x20, dqs_pi1_code = 0x60
AWord DQ: txdq_pi0_code = 0x7E, txdq_pi1_code = 0x3E
AWord DQ: txdq_pi0_code = 0x7F, txdq_pi1_code = 0x3F
AWord DQS: dqs_pi0_code = 0x20, dqs_pi1_code = 0x60
AWord DQS: dqs_pi0_code = 0x20, dqs_pi1_code = 0x60
Socket0 HbmCh7, PI Code:
Socket1 HbmCh7, PI Code:
DWord DQ: txdq_pi0_code = 0x1, txdq_pi1_code = 0x41
DWord DQ: txdq_pi0_code = 0x0, txdq_pi1_code = 0x40
DWord DQS: dqs_pi0_code = 0x20, dqs_pi1_code = 0x60
DWord DQS: dqs_pi0_code = 0x20, dqs_pi1_code = 0x60
AWord DQ: txdq_pi0_code = 0x7E, txdq_pi1_code = 0x3E
AWord DQ: txdq_pi0_code = 0x7E, txdq_pi1_code = 0x3E
AWord DQS: dqs_pi0_code = 0x20, dqs_pi1_code = 0x60
AWord DQS: dqs_pi0_code = 0x20, dqs_pi1_code = 0x60
Socket0 HbmCh8, PI Code:
Socket1 HbmCh8, PI Code:
DWord DQ: txdq_pi0_code = 0x0, txdq_pi1_code = 0x40
DWord DQ: txdq_pi0_code = 0x0, txdq_pi1_code = 0x40
DWord DQS: dqs_pi0_code = 0x20, dqs_pi1_code = 0x60
DWord DQS: dqs_pi0_code = 0x20, dqs_pi1_code = 0x60
AWord DQ: txdq_pi0_code = 0x0, txdq_pi1_code = 0x40
AWord DQ: txdq_pi0_code = 0x7F, txdq_pi1_code = 0x3F
AWord DQS: dqs_pi0_code = 0x20, dqs_pi1_code = 0x60
AWord DQS: dqs_pi0_code = 0x20, dqs_pi1_code = 0x60
Socket0 HbmCh9, PI Code:
Socket1 HbmCh9, PI Code:
DWord DQ: txdq_pi0_code = 0x0, txdq_pi1_code = 0x40
DWord DQ: txdq_pi0_code = 0x1, txdq_pi1_code = 0x41
DWord DQS: dqs_pi0_code = 0x20, dqs_pi1_code = 0x60
DWord DQS: dqs_pi0_code = 0x20, dqs_pi1_code = 0x60
AWord DQ: txdq_pi0_code = 0x0, txdq_pi1_code = 0x40
AWord DQ: txdq_pi0_code = 0x1, txdq_pi1_code = 0x41
AWord DQS: dqs_pi0_code = 0x20, dqs_pi1_code = 0x60
AWord DQS: dqs_pi0_code = 0x20, dqs_pi1_code = 0x60
Socket0 HbmCh10, PI Code:
Socket1 HbmCh10, PI Code:
DWord DQ: txdq_pi0_code = 0x1, txdq_pi1_code = 0x41
DWord DQ: txdq_pi0_code = 0x0, txdq_pi1_code = 0x40
DWord DQS: dqs_pi0_code = 0x20, dqs_pi1_code = 0x60
DWord DQS: dqs_pi0_code = 0x20, dqs_pi1_code = 0x60
AWord DQ: txdq_pi0_code = 0x0, txdq_pi1_code = 0x40
AWord DQ: txdq_pi0_code = 0x0, txdq_pi1_code = 0x40
AWord DQS: dqs_pi0_code = 0x20, dqs_pi1_code = 0x60
AWord DQS: dqs_pi0_code = 0x20, dqs_pi1_code = 0x60
Socket0 HbmCh11, PI Code:
Socket1 HbmCh11, PI Code:
DWord DQ: txdq_pi0_code = 0x1, txdq_pi1_code = 0x41
DWord DQ: txdq_pi0_code = 0x1, txdq_pi1_code = 0x41
DWord DQS: dqs_pi0_code = 0x20, dqs_pi1_code = 0x60
DWord DQS: dqs_pi0_code = 0x20, dqs_pi1_code = 0x60
AWord DQ: txdq_pi0_code = 0x0, txdq_pi1_code = 0x40
AWord DQ: txdq_pi0_code = 0x0, txdq_pi1_code = 0x40
AWord DQS: dqs_pi0_code = 0x20, dqs_pi1_code = 0x60
AWord DQS: dqs_pi0_code = 0x20, dqs_pi1_code = 0x60
Socket0 HbmCh12, PI Code:
Socket1 HbmCh12, PI Code:
DWord DQ: txdq_pi0_code = 0x1, txdq_pi1_code = 0x41
DWord DQ: txdq_pi0_code = 0x0, txdq_pi1_code = 0x40
DWord DQS: dqs_pi0_code = 0x20, dqs_pi1_code = 0x60
DWord DQS: dqs_pi0_code = 0x20, dqs_pi1_code = 0x60
AWord DQ: txdq_pi0_code = 0x0, txdq_pi1_code = 0x40
AWord DQ: txdq_pi0_code = 0x7F, txdq_pi1_code = 0x3F
AWord DQS: dqs_pi0_code = 0x20, dqs_pi1_code = 0x60
AWord DQS: dqs_pi0_code = 0x20, dqs_pi1_code = 0x60
Socket0 HbmCh13, PI Code:
Socket1 HbmCh13, PI Code:
DWord DQ: txdq_pi0_code = 0x1, txdq_pi1_code = 0x41
DWord DQ: txdq_pi0_code = 0x1, txdq_pi1_code = 0x41
DWord DQS: dqs_pi0_code = 0x20, dqs_pi1_code = 0x60
DWord DQS: dqs_pi0_code = 0x20, dqs_pi1_code = 0x60
AWord DQ: txdq_pi0_code = 0x7F, txdq_pi1_code = 0x3F
AWord DQ: txdq_pi0_code = 0x7F, txdq_pi1_code = 0x3F
AWord DQS: dqs_pi0_code = 0x20, dqs_pi1_code = 0x60
AWord DQS: dqs_pi0_code = 0x20, dqs_pi1_code = 0x60
Socket0 HbmCh14, PI Code:
Socket1 HbmCh14, PI Code:
DWord DQ: txdq_pi0_code = 0x1, txdq_pi1_code = 0x41
DWord DQ: txdq_pi0_code = 0x1, txdq_pi1_code = 0x41
DWord DQS: dqs_pi0_code = 0x20, dqs_pi1_code = 0x60
DWord DQS: dqs_pi0_code = 0x20, dqs_pi1_code = 0x60
AWord DQ: txdq_pi0_code = 0x7F, txdq_pi1_code = 0x3F
AWord DQ: txdq_pi0_code = 0x7E, txdq_pi1_code = 0x3E
AWord DQS: dqs_pi0_code = 0x20, dqs_pi1_code = 0x60
AWord DQS: dqs_pi0_code = 0x20, dqs_pi1_code = 0x60
Socket0 HbmCh15, PI Code:
Socket1 HbmCh15, PI Code:
DWord DQ: txdq_pi0_code = 0x3, txdq_pi1_code = 0x43
DWord DQ: txdq_pi0_code = 0x1, txdq_pi1_code = 0x41
DWord DQS: dqs_pi0_code = 0x20, dqs_pi1_code = 0x60
DWord DQS: dqs_pi0_code = 0x20, dqs_pi1_code = 0x60
AWord DQ: txdq_pi0_code = 0x7F, txdq_pi1_code = 0x3F
AWord DQ: txdq_pi0_code = 0x7F, txdq_pi1_code = 0x3F
AWord DQS: dqs_pi0_code = 0x20, dqs_pi1_code = 0x60
AWord DQS: dqs_pi0_code = 0x20, dqs_pi1_code = 0x60
Socket0 HbmCh16, PI Code:
Socket1 HbmCh16, PI Code:
DWord DQ: txdq_pi0_code = 0x1, txdq_pi1_code = 0x41
DWord DQ: txdq_pi0_code = 0x1, txdq_pi1_code = 0x41
DWord DQS: dqs_pi0_code = 0x20, dqs_pi1_code = 0x60
DWord DQS: dqs_pi0_code = 0x20, dqs_pi1_code = 0x60
AWord DQ: txdq_pi0_code = 0x0, txdq_pi1_code = 0x40
AWord DQ: txdq_pi0_code = 0x0, txdq_pi1_code = 0x40
AWord DQS: dqs_pi0_code = 0x20, dqs_pi1_code = 0x60
AWord DQS: dqs_pi0_code = 0x20, dqs_pi1_code = 0x60
Socket0 HbmCh17, PI Code:
Socket1 HbmCh17, PI Code:
DWord DQ: txdq_pi0_code = 0x0, txdq_pi1_code = 0x40
DWord DQ: txdq_pi0_code = 0x1, txdq_pi1_code = 0x41
DWord DQS: dqs_pi0_code = 0x20, dqs_pi1_code = 0x60
DWord DQS: dqs_pi0_code = 0x20, dqs_pi1_code = 0x60
AWord DQ: txdq_pi0_code = 0x7F, txdq_pi1_code = 0x3F
AWord DQ: txdq_pi0_code = 0x0, txdq_pi1_code = 0x40
AWord DQS: dqs_pi0_code = 0x20, dqs_pi1_code = 0x60
AWord DQS: dqs_pi0_code = 0x20, dqs_pi1_code = 0x60
Socket0 HbmCh18, PI Code:
Socket1 HbmCh18, PI Code:
DWord DQ: txdq_pi0_code = 0x1, txdq_pi1_code = 0x41
DWord DQ: txdq_pi0_code = 0x2, txdq_pi1_code = 0x42
DWord DQS: dqs_pi0_code = 0x20, dqs_pi1_code = 0x60
DWord DQS: dqs_pi0_code = 0x20, dqs_pi1_code = 0x60
AWord DQ: txdq_pi0_code = 0x7F, txdq_pi1_code = 0x3F
AWord DQ: txdq_pi0_code = 0x0, txdq_pi1_code = 0x40
AWord DQS: dqs_pi0_code = 0x20, dqs_pi1_code = 0x60
AWord DQS: dqs_pi0_code = 0x20, dqs_pi1_code = 0x60
Socket0 HbmCh19, PI Code:
Socket1 HbmCh19, PI Code:
DWord DQ: txdq_pi0_code = 0x0, txdq_pi1_code = 0x40
DWord DQ: txdq_pi0_code = 0x0, txdq_pi1_code = 0x40
DWord DQS: dqs_pi0_code = 0x20, dqs_pi1_code = 0x60
DWord DQS: dqs_pi0_code = 0x20, dqs_pi1_code = 0x60
AWord DQ: txdq_pi0_code = 0x7E, txdq_pi1_code = 0x3E
AWord DQ: txdq_pi0_code = 0x7E, txdq_pi1_code = 0x3E
AWord DQS: dqs_pi0_code = 0x20, dqs_pi1_code = 0x60
AWord DQS: dqs_pi0_code = 0x20, dqs_pi1_code = 0x60
Socket0 HbmCh20, PI Code:
Socket1 HbmCh20, PI Code:
DWord DQ: txdq_pi0_code = 0x2, txdq_pi1_code = 0x42
DWord DQ: txdq_pi0_code = 0x3, txdq_pi1_code = 0x43
DWord DQS: dqs_pi0_code = 0x20, dqs_pi1_code = 0x60
DWord DQS: dqs_pi0_code = 0x20, dqs_pi1_code = 0x60
AWord DQ: txdq_pi0_code = 0x7F, txdq_pi1_code = 0x3F
AWord DQ: txdq_pi0_code = 0x7F, txdq_pi1_code = 0x3F
AWord DQS: dqs_pi0_code = 0x20, dqs_pi1_code = 0x60
AWord DQS: dqs_pi0_code = 0x20, dqs_pi1_code = 0x60
Socket0 HbmCh21, PI Code:
Socket1 HbmCh21, PI Code:
DWord DQ: txdq_pi0_code = 0x1, txdq_pi1_code = 0x41
DWord DQ: txdq_pi0_code = 0x3, txdq_pi1_code = 0x43
DWord DQS: dqs_pi0_code = 0x20, dqs_pi1_code = 0x60
DWord DQS: dqs_pi0_code = 0x20, dqs_pi1_code = 0x60
AWord DQ: txdq_pi0_code = 0x7E, txdq_pi1_code = 0x3E
AWord DQ: txdq_pi0_code = 0x7F, txdq_pi1_code = 0x3F
AWord DQS: dqs_pi0_code = 0x20, dqs_pi1_code = 0x60
AWord DQS: dqs_pi0_code = 0x20, dqs_pi1_code = 0x60
Socket0 HbmCh22, PI Code:
Socket1 HbmCh22, PI Code:
DWord DQ: txdq_pi0_code = 0x2, txdq_pi1_code = 0x42
DWord DQ: txdq_pi0_code = 0x3, txdq_pi1_code = 0x43
DWord DQS: dqs_pi0_code = 0x20, dqs_pi1_code = 0x60
DWord DQS: dqs_pi0_code = 0x20, dqs_pi1_code = 0x60
AWord DQ: txdq_pi0_code = 0x7F, txdq_pi1_code = 0x3F
AWord DQ: txdq_pi0_code = 0x7F, txdq_pi1_code = 0x3F
AWord DQS: dqs_pi0_code = 0x20, dqs_pi1_code = 0x60
AWord DQS: dqs_pi0_code = 0x20, dqs_pi1_code = 0x60
Socket0 HbmCh23, PI Code:
Socket1 HbmCh23, PI Code:
DWord DQ: txdq_pi0_code = 0x2, txdq_pi1_code = 0x42
DWord DQ: txdq_pi0_code = 0x0, txdq_pi1_code = 0x40
DWord DQS: dqs_pi0_code = 0x20, dqs_pi1_code = 0x60
DWord DQS: dqs_pi0_code = 0x20, dqs_pi1_code = 0x60
AWord DQ: txdq_pi0_code = 0x7E, txdq_pi1_code = 0x3E
AWord DQ: txdq_pi0_code = 0x7E, txdq_pi1_code = 0x3E
AWord DQS: dqs_pi0_code = 0x20, dqs_pi1_code = 0x60
AWord DQS: dqs_pi0_code = 0x20, dqs_pi1_code = 0x60
Socket0 HbmCh24, PI Code:
Socket1 HbmCh24, PI Code:
DWord DQ: txdq_pi0_code = 0x0, txdq_pi1_code = 0x40
DWord DQ: txdq_pi0_code = 0x7F, txdq_pi1_code = 0x3F
DWord DQS: dqs_pi0_code = 0x20, dqs_pi1_code = 0x60
DWord DQS: dqs_pi0_code = 0x20, dqs_pi1_code = 0x60
AWord DQ: txdq_pi0_code = 0x7D, txdq_pi1_code = 0x3D
AWord DQ: txdq_pi0_code = 0x7F, txdq_pi1_code = 0x3F
AWord DQS: dqs_pi0_code = 0x20, dqs_pi1_code = 0x60
AWord DQS: dqs_pi0_code = 0x20, dqs_pi1_code = 0x60
Socket0 HbmCh25, PI Code:
Socket1 HbmCh25, PI Code:
DWord DQ: txdq_pi0_code = 0x0, txdq_pi1_code = 0x40
DWord DQ: txdq_pi0_code = 0x0, txdq_pi1_code = 0x40
DWord DQS: dqs_pi0_code = 0x20, dqs_pi1_code = 0x60
DWord DQS: dqs_pi0_code = 0x20, dqs_pi1_code = 0x60
AWord DQ: txdq_pi0_code = 0x0, txdq_pi1_code = 0x40
AWord DQ: txdq_pi0_code = 0x1, txdq_pi1_code = 0x41
AWord DQS: dqs_pi0_code = 0x20, dqs_pi1_code = 0x60
AWord DQS: dqs_pi0_code = 0x20, dqs_pi1_code = 0x60
Socket0 HbmCh26, PI Code:
Socket1 HbmCh26, PI Code:
DWord DQ: txdq_pi0_code = 0x7F, txdq_pi1_code = 0x3F
DWord DQ: txdq_pi0_code = 0x0, txdq_pi1_code = 0x40
DWord DQS: dqs_pi0_code = 0x20, dqs_pi1_code = 0x60
DWord DQS: dqs_pi0_code = 0x20, dqs_pi1_code = 0x60
AWord DQ: txdq_pi0_code = 0x7F, txdq_pi1_code = 0x3F
AWord DQ: txdq_pi0_code = 0x0, txdq_pi1_code = 0x40
AWord DQS: dqs_pi0_code = 0x20, dqs_pi1_code = 0x60
AWord DQS: dqs_pi0_code = 0x20, dqs_pi1_code = 0x60
Socket0 HbmCh27, PI Code:
Socket1 HbmCh27, PI Code:
DWord DQ: txdq_pi0_code = 0x7F, txdq_pi1_code = 0x3F
DWord DQ: txdq_pi0_code = 0x7F, txdq_pi1_code = 0x3F
DWord DQS: dqs_pi0_code = 0x20, dqs_pi1_code = 0x60
DWord DQS: dqs_pi0_code = 0x20, dqs_pi1_code = 0x60
AWord DQ: txdq_pi0_code = 0x0, txdq_pi1_code = 0x40
AWord DQ: txdq_pi0_code = 0x7F, txdq_pi1_code = 0x3F
AWord DQS: dqs_pi0_code = 0x20, dqs_pi1_code = 0x60
AWord DQS: dqs_pi0_code = 0x20, dqs_pi1_code = 0x60
Socket0 HbmCh28, PI Code:
Socket1 HbmCh28, PI Code:
DWord DQ: txdq_pi0_code = 0x2, txdq_pi1_code = 0x42
DWord DQ: txdq_pi0_code = 0x0, txdq_pi1_code = 0x40
DWord DQS: dqs_pi0_code = 0x20, dqs_pi1_code = 0x60
DWord DQS: dqs_pi0_code = 0x20, dqs_pi1_code = 0x60
AWord DQ: txdq_pi0_code = 0x7E, txdq_pi1_code = 0x3E
AWord DQ: txdq_pi0_code = 0x7E, txdq_pi1_code = 0x3E
AWord DQS: dqs_pi0_code = 0x20, dqs_pi1_code = 0x60
AWord DQS: dqs_pi0_code = 0x20, dqs_pi1_code = 0x60
Socket0 HbmCh29, PI Code:
Socket1 HbmCh29, PI Code:
DWord DQ: txdq_pi0_code = 0x1, txdq_pi1_code = 0x41
DWord DQ: txdq_pi0_code = 0x2, txdq_pi1_code = 0x42
DWord DQS: dqs_pi0_code = 0x20, dqs_pi1_code = 0x60
DWord DQS: dqs_pi0_code = 0x20, dqs_pi1_code = 0x60
AWord DQ: txdq_pi0_code = 0x7D, txdq_pi1_code = 0x3D
AWord DQ: txdq_pi0_code = 0x7E, txdq_pi1_code = 0x3E
AWord DQS: dqs_pi0_code = 0x20, dqs_pi1_code = 0x60
AWord DQS: dqs_pi0_code = 0x20, dqs_pi1_code = 0x60
Socket0 HbmCh30, PI Code:
Socket1 HbmCh30, PI Code:
DWord DQ: txdq_pi0_code = 0x1, txdq_pi1_code = 0x41
DWord DQ: txdq_pi0_code = 0x1, txdq_pi1_code = 0x41
DWord DQS: dqs_pi0_code = 0x20, dqs_pi1_code = 0x60
DWord DQS: dqs_pi0_code = 0x20, dqs_pi1_code = 0x60
AWord DQ: txdq_pi0_code = 0x7E, txdq_pi1_code = 0x3E
AWord DQ: txdq_pi0_code = 0x7D, txdq_pi1_code = 0x3D
AWord DQS: dqs_pi0_code = 0x20, dqs_pi1_code = 0x60
AWord DQS: dqs_pi0_code = 0x20, dqs_pi1_code = 0x60
Socket0 HbmCh31, PI Code:
Socket1 HbmCh31, PI Code:
DWord DQ: txdq_pi0_code = 0x2, txdq_pi1_code = 0x42
DWord DQ: txdq_pi0_code = 0x7F, txdq_pi1_code = 0x3F
DWord DQS: dqs_pi0_code = 0x20, dqs_pi1_code = 0x60
DWord DQS: dqs_pi0_code = 0x20, dqs_pi1_code = 0x60
AWord DQ: txdq_pi0_code = 0x7E, txdq_pi1_code = 0x3E
AWord DQ: txdq_pi0_code = 0x7F, txdq_pi1_code = 0x3F
AWord DQS: dqs_pi0_code = 0x20, dqs_pi1_code = 0x60
AWord DQS: dqs_pi0_code = 0x20, dqs_pi1_code = 0x60
Socket0 HbmIo0, HbmPhyCfg0Fuse = 0xF2099D47, HbmPhyCfg1Fuse = 0x26C8A033
Socket1 HbmIo0, HbmPhyCfg0Fuse = 0xF2099D47, HbmPhyCfg1Fuse = 0x26C8A033
Socket0 HbmIo1, HbmPhyCfg0Fuse = 0xF2099D47, HbmPhyCfg1Fuse = 0x26C8A833
Socket1 HbmIo1, HbmPhyCfg0Fuse = 0xF2099D47, HbmPhyCfg1Fuse = 0x26C8A833
Socket0 HbmIo2, HbmPhyCfg0Fuse = 0xF2099D47, HbmPhyCfg1Fuse = 0x26C8A833
Socket1 HbmIo2, HbmPhyCfg0Fuse = 0xF2099D47, HbmPhyCfg1Fuse = 0x26C8A833
Socket0 HbmIo3, HbmPhyCfg0Fuse = 0xF2099D47, HbmPhyCfg1Fuse = 0x26C8A033
Socket1 HbmIo3, HbmPhyCfg0Fuse = 0xF2099D47, HbmPhyCfg1Fuse = 0x26C8A033
Socket0 HbmCh0, AWordReadTiming = 0x83E59423, AWordWriteTiming = 0x1D3400A5
Socket1 HbmCh0, AWordReadTiming = 0x83E59423, AWordWriteTiming = 0x1D3400A5
Socket0 HbmCh1, AWordReadTiming = 0x83E59423, AWordWriteTiming = 0x1D3400A5
Socket1 HbmCh1, AWordReadTiming = 0x83E59423, AWordWriteTiming = 0x1D3400A5
Socket0 HbmCh2, AWordReadTiming = 0x83E59423, AWordWriteTiming = 0x1D3400A5
Socket1 HbmCh2, AWordReadTiming = 0x83E59423, AWordWriteTiming = 0x1D3400A5
Socket0 HbmCh3, AWordReadTiming = 0x83E59423, AWordWriteTiming = 0x1D3400A5
Socket1 HbmCh3, AWordReadTiming = 0x83E59423, AWordWriteTiming = 0x1D3400A5
Socket0 HbmCh4, AWordReadTiming = 0x83E59423, AWordWriteTiming = 0x1D3400A5
Socket1 HbmCh4, AWordReadTiming = 0x83E59423, AWordWriteTiming = 0x1D3400A5
Socket0 HbmCh5, AWordReadTiming = 0x83E59423, AWordWriteTiming = 0x1D3400A5
Socket1 HbmCh5, AWordReadTiming = 0x83E59423, AWordWriteTiming = 0x1D3400A5
Socket0 HbmCh6, AWordReadTiming = 0x83E59423, AWordWriteTiming = 0x1D3400A5
Socket1 HbmCh6, AWordReadTiming = 0x83E59423, AWordWriteTiming = 0x1D3400A5
Socket0 HbmCh7, AWordReadTiming = 0x83E59423, AWordWriteTiming = 0x1D3400A5
Socket1 HbmCh7, AWordReadTiming = 0x83E59423, AWordWriteTiming = 0x1D3400A5
Socket0 HbmCh8, AWordReadTiming = 0x83E59423, AWordWriteTiming = 0x1D3400A5
Socket1 HbmCh8, AWordReadTiming = 0x83E59423, AWordWriteTiming = 0x1D3400A5
Socket0 HbmCh9, AWordReadTiming = 0x83E59423, AWordWriteTiming = 0x1D3400A5
Socket1 HbmCh9, AWordReadTiming = 0x83E59423, AWordWriteTiming = 0x1D3400A5
Socket0 HbmCh10, AWordReadTiming = 0x83E59423, AWordWriteTiming = 0x1D3400A5
Socket1 HbmCh10, AWordReadTiming = 0x83E59423, AWordWriteTiming = 0x1D3400A5
Socket0 HbmCh11, AWordReadTiming = 0x83E59423, AWordWriteTiming = 0x1D3400A5
Socket1 HbmCh11, AWordReadTiming = 0x83E59423, AWordWriteTiming = 0x1D3400A5
Socket0 HbmCh12, AWordReadTiming = 0x83E59423, AWordWriteTiming = 0x1D3400A5
Socket1 HbmCh12, AWordReadTiming = 0x83E59423, AWordWriteTiming = 0x1D3400A5
Socket0 HbmCh13, AWordReadTiming = 0x83E59423, AWordWriteTiming = 0x1D3400A5
Socket1 HbmCh13, AWordReadTiming = 0x83E59423, AWordWriteTiming = 0x1D3400A5
Socket0 HbmCh14, AWordReadTiming = 0x83E59423, AWordWriteTiming = 0x1D3400A5
Socket1 HbmCh14, AWordReadTiming = 0x83E59423, AWordWriteTiming = 0x1D3400A5
Socket0 HbmCh15, AWordReadTiming = 0x83E59423, AWordWriteTiming = 0x1D3400A5
Socket1 HbmCh15, AWordReadTiming = 0x83E59423, AWordWriteTiming = 0x1D3400A5
Socket0 HbmCh16, AWordReadTiming = 0x83E59423, AWordWriteTiming = 0x1D3400A5
Socket1 HbmCh16, AWordReadTiming = 0x83E59423, AWordWriteTiming = 0x1D3400A5
Socket0 HbmCh17, AWordReadTiming = 0x83E59423, AWordWriteTiming = 0x1D3400A5
Socket1 HbmCh17, AWordReadTiming = 0x83E59423, AWordWriteTiming = 0x1D3400A5
Socket0 HbmCh18, AWordReadTiming = 0x83E59423, AWordWriteTiming = 0x1D3400A5
Socket1 HbmCh18, AWordReadTiming = 0x83E59423, AWordWriteTiming = 0x1D3400A5
Socket0 HbmCh19, AWordReadTiming = 0x83E59423, AWordWriteTiming = 0x1D3400A5
Socket1 HbmCh19, AWordReadTiming = 0x83E59423, AWordWriteTiming = 0x1D3400A5
Socket0 HbmCh20, AWordReadTiming = 0x83E59423, AWordWriteTiming = 0x1D3400A5
Socket1 HbmCh20, AWordReadTiming = 0x83E59423, AWordWriteTiming = 0x1D3400A5
Socket0 HbmCh21, AWordReadTiming = 0x83E59423, AWordWriteTiming = 0x1D3400A5
Socket1 HbmCh21, AWordReadTiming = 0x83E59423, AWordWriteTiming = 0x1D3400A5
Socket0 HbmCh22, AWordReadTiming = 0x83E59423, AWordWriteTiming = 0x1D3400A5
Socket1 HbmCh22, AWordReadTiming = 0x83E59423, AWordWriteTiming = 0x1D3400A5
Socket0 HbmCh23, AWordReadTiming = 0x83E59423, AWordWriteTiming = 0x1D3400A5
Socket1 HbmCh23, AWordReadTiming = 0x83E59423, AWordWriteTiming = 0x1D3400A5
Socket0 HbmCh24, AWordReadTiming = 0x83E59423, AWordWriteTiming = 0x1D3400A5
Socket1 HbmCh24, AWordReadTiming = 0x83E59423, AWordWriteTiming = 0x1D3400A5
Socket0 HbmCh25, AWordReadTiming = 0x83E59423, AWordWriteTiming = 0x1D3400A5
Socket1 HbmCh25, AWordReadTiming = 0x83E59423, AWordWriteTiming = 0x1D3400A5
Socket0 HbmCh26, AWordReadTiming = 0x83E59423, AWordWriteTiming = 0x1D3400A5
Socket1 HbmCh26, AWordReadTiming = 0x83E59423, AWordWriteTiming = 0x1D3400A5
Socket0 HbmCh27, AWordReadTiming = 0x83E59423, AWordWriteTiming = 0x1D3400A5
Socket1 HbmCh27, AWordReadTiming = 0x83E59423, AWordWriteTiming = 0x1D3400A5
Socket0 HbmCh28, AWordReadTiming = 0x83E59423, AWordWriteTiming = 0x1D3400A5
Socket1 HbmCh28, AWordReadTiming = 0x83E59423, AWordWriteTiming = 0x1D3400A5
Socket0 HbmCh29, AWordReadTiming = 0x83E59423, AWordWriteTiming = 0x1D3400A5
Socket1 HbmCh29, AWordReadTiming = 0x83E59423, AWordWriteTiming = 0x1D3400A5
Socket0 HbmCh30, AWordReadTiming = 0x83E59423, AWordWriteTiming = 0x1D3400A5
Socket1 HbmCh30, AWordReadTiming = 0x83E59423, AWordWriteTiming = 0x1D3400A5
Socket0 HbmCh31, AWordReadTiming = 0x83E59423, AWordWriteTiming = 0x1D3400A5
Socket1 HbmCh31, AWordReadTiming = 0x83E59423, AWordWriteTiming = 0x1D3400A5
Socket0 HbmIo0, UcRamEccLog0 = 0x0, UcRamEccLog1 = 0x0
Socket1 HbmIo0, UcRamEccLog0 = 0x0, UcRamEccLog1 = 0x0
Socket0 HbmIo1, UcRamEccLog0 = 0x0, UcRamEccLog1 = 0x0
Socket1 HbmIo1, UcRamEccLog0 = 0x0, UcRamEccLog1 = 0x0
Socket0 HbmIo2, UcRamEccLog0 = 0x0, UcRamEccLog1 = 0x0
Socket1 HbmIo2, UcRamEccLog0 = 0x0, UcRamEccLog1 = 0x0
Socket0 HbmIo3, UcRamEccLog0 = 0x0, UcRamEccLog1 = 0x0
Socket1 HbmIo3, UcRamEccLog0 = 0x0, UcRamEccLog1 = 0x0
Socket0 HbmIo0, UcScratchPad0 = 0x60000000, UcScratchPad1 = 0x40000006, UcScratchPad2 = 0x0
Socket1 HbmIo0, UcScratchPad0 = 0x60000000, UcScratchPad1 = 0x40000006, UcScratchPad2 = 0x0
Socket0 HbmIo1, UcScratchPad0 = 0x60000000, UcScratchPad1 = 0x40000006, UcScratchPad2 = 0x0
Socket1 HbmIo1, UcScratchPad0 = 0x60000000, UcScratchPad1 = 0x40000006, UcScratchPad2 = 0x0
Socket0 HbmIo2, UcScratchPad0 = 0x60000000, UcScratchPad1 = 0x40000006, UcScratchPad2 = 0x0
Socket1 HbmIo2, UcScratchPad0 = 0x60000000, UcScratchPad1 = 0x40000006, UcScratchPad2 = 0x0
Socket0 HbmIo3, UcScratchPad0 = 0x60000000, UcScratchPad1 = 0x40000006, UcScratchPad2 = 0x0
Socket1 HbmIo3, UcScratchPad0 = 0x60000000, UcScratchPad1 = 0x40000006, UcScratchPad2 = 0x0
HbmioMailbox -IEEE 1500 Read Device ID for Socket 0 HbmIoId 0
HbmioMailbox -IEEE 1500 Read Device ID for Socket 1 HbmIoId 0
HBM: DeviceIdData = {0x3389FFC3, 0xA0A80431, 0x0003A1D0}
HBM: DeviceIdData = {0xAAE9FFC3, 0xA0A80400, 0x0003A1D0}
HbmioMailbox -IEEE 1500 Read Device ID for Socket 0 HbmIoId 1
HbmioMailbox -IEEE 1500 Read Device ID for Socket 1 HbmIoId 1
HBM: DeviceIdData = {0x2309FFC3, 0xA0A80431, 0x0003A1D0}
HBM: DeviceIdData = {0xAE09FFC3, 0xA0A80400, 0x0003A1D0}
HbmioMailbox -IEEE 1500 Read Device ID for Socket 0 HbmIoId 2
HbmioMailbox -IEEE 1500 Read Device ID for Socket 1 HbmIoId 2
HBM: DeviceIdData = {0x3DC9FFC3, 0xA0A80431, 0x0003A1D0}
HBM: DeviceIdData = {0xA271FFC3, 0xA0A80400, 0x0003A1D0}
HbmioMailbox -IEEE 1500 Read Device ID for Socket 0 HbmIoId 3
HbmioMailbox -IEEE 1500 Read Device ID for Socket 1 HbmIoId 3
HBM: DeviceIdData = {0x2669FFC3, 0xA0A00020, 0x0003A1D0}
HBM: DeviceIdData = {0xB299FFC3, 0xA0A80400, 0x0003A1D0}
| HBM Socket:0 Display Device Info |
| Field | HBMIO MODULE 0 | HBMIO MODULE 1 | HBMIO MODULE 2 | HBMIO MODULE 3 |
|Module Enable | ENABLED | ENABLED | ENABLED | ENABLED |
|Model num | 43 | 43 | 43 | 43 |
|Stack High | 8 | 8 | 8 | 8 |
|Channel enable| 11111111 | 11111111 | 11111111 | 11111111 |
|Address Mode | Pseudo Ch | Pseudo Ch | Pseudo Ch | Pseudo Ch |
|Serial number | 02010C4CE2 | 02010C48C2 | 02010C4F72 | 000008099A |
|Manuf. Week | WW10 | WW10 | WW10 | WW10 |
|Manuf. Year | 2021 | 2021 | 2021 | 2021 |
|Manuf. loc | 000D | 000D | 000D | 000D |
|Manuf. ID | SAMSUNG | SAMSUNG | SAMSUNG | SAMSUNG |
|Density | 16 Gbit | 16 Gbit | 16 Gbit | 16 Gbit |
|ECC | ECC | ECC | ECC | ECC |
|Gen2 Test | Supported | Supported | Supported | Supported |
| HBM Socket:1 Display Device Info |
| Field | HBMIO MODULE 0 | HBMIO MODULE 1 | HBMIO MODULE 2 | HBMIO MODULE 3 |
|Module Enable | ENABLED | ENABLED | ENABLED | ENABLED |
|Model num | 43 | 43 | 43 | 43 |
|Stack High | 8 | 8 | 8 | 8 |
|Channel enable| 11111111 | 11111111 | 11111111 | 11111111 |
|Address Mode | Pseudo Ch | Pseudo Ch | Pseudo Ch | Pseudo Ch |
|Serial number | 0201002ABA | 0201002B82 | 020100289C | 0201002CA6 |
|Manuf. Week | WW10 | WW10 | WW10 | WW10 |
|Manuf. Year | 2021 | 2021 | 2021 | 2021 |
|Manuf. loc | 000D | 000D | 000D | 000D |
|Manuf. ID | SAMSUNG | SAMSUNG | SAMSUNG | SAMSUNG |
|Density | 16 Gbit | 16 Gbit | 16 Gbit | 16 Gbit |
|ECC | ECC | ECC | ECC | ECC |
|Gen2 Test | Supported | Supported | Supported | Supported |
N0: DDR and HBM memory populated!
N1: DDR and HBM memory populated!
[ScktId: 0] HBM Training - 2916ms
[ScktId: 1] HBM Training - 2916ms
[ScktId: 0] HBM PPR Flow -- Started
[ScktId: 1] HBM PPR Flow -- Started
[ScktId: 0] HBM PPR Flow - 6ms
[ScktId: 1] HBM PPR Flow - 7ms
[ScktId: 0] HBM mBIST Flow -- Started
[ScktId: 1] HBM mBIST Flow -- Started
[ScktId: 0] HBM mBIST Flow - 6ms
[ScktId: 1] HBM mBIST Flow - 7ms
[ScktId: 0] HBM ReTraining -- Started
[ScktId: 1] HBM ReTraining -- Started
[ScktId: 0] HBM ReTraining - 7ms
[ScktId: 1] HBM ReTraining - 7ms
[ScktId: 0] AP HBM Information -- Started
[ScktId: 1] AP HBM Information -- Started
[ScktId: 0] AP HBM Information - 12ms
[ScktId: 1] AP HBM Information - 9ms
[ScktId: 0] Post-Training Initialization -- Started
[ScktId: 1] Post-Training Initialization -- Started
[ScktId: 0] Post-Training Initialization - 9ms
[ScktId: 1] Post-Training Initialization - 10ms
[ScktId: 0] Pipe Sync AP Pre SSA Data -- Started
[ScktId: 1] Pipe Sync AP Pre SSA Data -- Started
[ScktId: 0] Pipe Sync AP Pre SSA Data - 27ms
[ScktId: 1] Pipe Sync AP Pre SSA Data - 23ms
[ScktId: 0] Enable RX Retraining -- Started
[ScktId: 1] Enable RX Retraining -- Started
[ScktId: 0] Enable RX Retraining - 8ms
[ScktId: 1] Enable RX Retraining - 8ms
[ScktId: 0] Enable TX Retraining -- Started
[ScktId: 1] Enable TX Retraining -- Started
[ScktId: 0] Enable TX Retraining - 521ms
[ScktId: 0] Rank Margin Test -- Started
[ScktId: 1] Enable TX Retraining - 521ms
[ScktId: 0] Rank Margin Test - 3ms
[ScktId: 1] Rank Margin Test -- Started
[ScktId: 0] Pipe Sync SBSP Post SSA Data -- Started
[ScktId: 1] Rank Margin Test - 7ms
[ScktId: 1] Pipe Sync SBSP Post SSA Data -- Started
[ScktId: 1] Pipe Sync SBSP Post SSA Data - 5ms
[ScktId: 0] Pipe Sync SBSP Post SSA Data - 17ms
[ScktId: 1] Pipe Sync AP Pre I/O Health Check Data -- Started
[ScktId: 0] Pipe Sync AP Pre I/O Health Check Data -- Started
[ScktId: 0] Pipe Sync AP Pre I/O Health Check Data - 25ms
[ScktId: 1] Pipe Sync AP Pre I/O Health Check Data - 30ms
[ScktId: 0] Perform I/O Health Check -- Started
[ScktId: 1] Perform I/O Health Check -- Started
I/O Health Check Passed
[ScktId: 0] Perform I/O Health Check - 1604ms
I/O Health Check Passed
[ScktId: 0] Pipe Sync SBSP Post I/O Heath Check -- Started
[ScktId: 1] Perform I/O Health Check - 1606ms
[ScktId: 1] Pipe Sync SBSP Post I/O Heath Check -- Started
[ScktId: 0] Pipe Sync SBSP Post I/O Heath Check - 18ms
[ScktId: 1] Pipe Sync SBSP Post I/O Heath Check - 5ms
N1 Checked into Pipe
[ScktId: 0] Check I/O Health Check Status -- Started
[ScktId: 0] Check I/O Health Check Status - 7ms
[ScktId: 1] Offset training results -- Started
[ScktId: 0] Offset training results -- Started
[ScktId: 1] Offset training results - 4ms
[ScktId: 0] Offset training results - 9ms
[ScktId: 1] HBM Post-Training -- Started
[ScktId: 0] HBM Post-Training -- Started
N1.C00: HBM Density: 10 N0.C00: HBM Density: 10 N1.C00: Column Address width: 0; N0.C00: Column Address width: 0; N1.C00: Row Address width: 3; N0.C00: Row Address width: 3; N1.C00: Number of banks: 2
N0.C00: Number of banks: 2
N1.C08: HBM Density: 10 N0.C08: HBM Density: 10 N1.C08: Column Address width: 0; N0.C08: Column Address width: 0; N1.C08: Row Address width: 3; N0.C08: Row Address width: 3; N1.C08: Number of banks: 2
N0.C08: Number of banks: 2
N1.C16: HBM Density: 10 N0.C16: HBM Density: 10 N1.C16: Column Address width: 0; N0.C16: Column Address width: 0; N1.C16: Row Address width: 3; N0.C16: Row Address width: 3; N1.C16: Number of banks: 2
N0.C16: Number of banks: 2
N1.C24: HBM Density: 10 N0.C24: HBM Density: 10 N1.C24: Column Address width: 0; N0.C24: Column Address width: 0; N1.C24: Row Address width: 3; N0.C24: Row Address width: 3; N1.C24: Number of banks: 2
N0.C24: Number of banks: 2
MemHotOutputOnlyOpt set to :0
MemHotOutputOnlyOpt set to :0
Socket 1 Ch 0 - CkeLl0.Data = 0x10000080
Socket 1 Ch 0 - CkeLl1.Data = 0x10000260
Socket 1 Ch 0 - CkeLl2.Data = 0x10000230
Socket 1 Ch 0 - CkeLl3.Data = 0x10000230
Socket 1 Ch 0 - PkgcCke.Data = 0x10000230
Socket 0 Ch 0 - CkeLl0.Data = 0x10000080
Socket 0 Ch 0 - CkeLl1.Data = 0x10000260
Socket 0 Ch 0 - CkeLl2.Data = 0x10000230
Socket 0 Ch 0 - CkeLl3.Data = 0x10000230
Socket 0 Ch 0 - PkgcCke.Data = 0x10000230
LpModePmControlN0.Data Original = 0x8806C
LpModePmControlN0.Data Original = 0x8806C
LpModePmControlN1.Data Original = 0x0
LpModePmControlN1.Data Original = 0x0
LpModePmControlN0.Data New = 0xC3F4206B
LpModePmControlN0.Data New = 0xC3F4206B
LpModePmControlN1.Data New = 0x87
LpModePmControlN1.Data New = 0x87
N1.C00: HBM Tcrftp.t_rfc = 0xA for density 0x00000001
N0.C00: HBM Tcrftp.t_rfc = 0xA for density 0x00000000
Socket 1 Ch 1 - CkeLl0.Data = 0x10000080
Socket 1 Ch 1 - CkeLl1.Data = 0x10000260
Socket 1 Ch 1 - CkeLl2.Data = 0x10000230
Socket 1 Ch 1 - CkeLl3.Data = 0x10000230
Socket 1 Ch 1 - PkgcCke.Data = 0x10000230
Socket 0 Ch 1 - CkeLl0.Data = 0x10000080
Socket 0 Ch 1 - CkeLl1.Data = 0x10000260
Socket 0 Ch 1 - CkeLl2.Data = 0x10000230
Socket 0 Ch 1 - CkeLl3.Data = 0x10000230
Socket 0 Ch 1 - PkgcCke.Data = 0x10000230
LpModePmControlN0.Data Original = 0x8806C
LpModePmControlN0.Data Original = 0x8806C
LpModePmControlN1.Data Original = 0x0
LpModePmControlN1.Data Original = 0x0
LpModePmControlN0.Data New = 0xC3F4206B
LpModePmControlN0.Data New = 0xC3F4206B
LpModePmControlN1.Data New = 0x87
LpModePmControlN1.Data New = 0x87
N1.C01: HBM Tcrftp.t_rfc = 0xA for density 0x00000001
N0.C01: HBM Tcrftp.t_rfc = 0xA for density 0x00000000
Socket 1 Ch 2 - CkeLl0.Data = 0x10000080
Socket 1 Ch 2 - CkeLl1.Data = 0x10000260
Socket 1 Ch 2 - CkeLl2.Data = 0x10000230
Socket 1 Ch 2 - CkeLl3.Data = 0x10000230
Socket 1 Ch 2 - PkgcCke.Data = 0x10000230
Socket 0 Ch 2 - CkeLl0.Data = 0x10000080
Socket 0 Ch 2 - CkeLl1.Data = 0x10000260
Socket 0 Ch 2 - CkeLl2.Data = 0x10000230
Socket 0 Ch 2 - CkeLl3.Data = 0x10000230
Socket 0 Ch 2 - PkgcCke.Data = 0x10000230
LpModePmControlN0.Data Original = 0x8806C
LpModePmControlN0.Data Original = 0x8806C
LpModePmControlN1.Data Original = 0x0
LpModePmControlN1.Data Original = 0x0
LpModePmControlN0.Data New = 0xC3F4206B
LpModePmControlN0.Data New = 0xC3F4206B
LpModePmControlN1.Data New = 0x87
LpModePmControlN1.Data New = 0x87
N1.C02: HBM Tcrftp.t_rfc = 0xA for density 0x00000001
N0.C02: HBM Tcrftp.t_rfc = 0xA for density 0x00000000
Socket 1 Ch 3 - CkeLl0.Data = 0x10000080
Socket 1 Ch 3 - CkeLl1.Data = 0x10000260
Socket 1 Ch 3 - CkeLl2.Data = 0x10000230
Socket 1 Ch 3 - CkeLl3.Data = 0x10000230
Socket 1 Ch 3 - PkgcCke.Data = 0x10000230
Socket 0 Ch 3 - CkeLl0.Data = 0x10000080
Socket 0 Ch 3 - CkeLl1.Data = 0x10000260
Socket 0 Ch 3 - CkeLl2.Data = 0x10000230
Socket 0 Ch 3 - CkeLl3.Data = 0x10000230
Socket 0 Ch 3 - PkgcCke.Data = 0x10000230
LpModePmControlN0.Data Original = 0x8806C
LpModePmControlN0.Data Original = 0x8806C
LpModePmControlN1.Data Original = 0x0
LpModePmControlN1.Data Original = 0x0
LpModePmControlN0.Data New = 0xC3F4206B
LpModePmControlN0.Data New = 0xC3F4206B
LpModePmControlN1.Data New = 0x87
LpModePmControlN1.Data New = 0x87
N1.C03: HBM Tcrftp.t_rfc = 0xA for density 0x00000001
N0.C03: HBM Tcrftp.t_rfc = 0xA for density 0x00000000
Socket 1 Ch 4 - CkeLl0.Data = 0x10000080
Socket 1 Ch 4 - CkeLl1.Data = 0x10000260
Socket 1 Ch 4 - CkeLl2.Data = 0x10000230
Socket 1 Ch 4 - CkeLl3.Data = 0x10000230
Socket 1 Ch 4 - PkgcCke.Data = 0x10000230
Socket 0 Ch 4 - CkeLl0.Data = 0x10000080
Socket 0 Ch 4 - CkeLl1.Data = 0x10000260
Socket 0 Ch 4 - CkeLl2.Data = 0x10000230
Socket 0 Ch 4 - CkeLl3.Data = 0x10000230
Socket 0 Ch 4 - PkgcCke.Data = 0x10000230
LpModePmControlN0.Data Original = 0x8806C
LpModePmControlN0.Data Original = 0x8806C
LpModePmControlN1.Data Original = 0x0
LpModePmControlN1.Data Original = 0x0
LpModePmControlN0.Data New = 0xC3F4206B
LpModePmControlN0.Data New = 0xC3F4206B
LpModePmControlN1.Data New = 0x87
LpModePmControlN1.Data New = 0x87
N1.C04: HBM Tcrftp.t_rfc = 0xA for density 0x00000001
N0.C04: HBM Tcrftp.t_rfc = 0xA for density 0x00000000
Socket 1 Ch 5 - CkeLl0.Data = 0x10000080
Socket 1 Ch 5 - CkeLl1.Data = 0x10000260
Socket 1 Ch 5 - CkeLl2.Data = 0x10000230
Socket 1 Ch 5 - CkeLl3.Data = 0x10000230
Socket 1 Ch 5 - PkgcCke.Data = 0x10000230
Socket 0 Ch 5 - CkeLl0.Data = 0x10000080
Socket 0 Ch 5 - CkeLl1.Data = 0x10000260
Socket 0 Ch 5 - CkeLl2.Data = 0x10000230
Socket 0 Ch 5 - CkeLl3.Data = 0x10000230
Socket 0 Ch 5 - PkgcCke.Data = 0x10000230
LpModePmControlN0.Data Original = 0x8806C
LpModePmControlN0.Data Original = 0x8806C
LpModePmControlN1.Data Original = 0x0
LpModePmControlN1.Data Original = 0x0
LpModePmControlN0.Data New = 0xC3F4206B
LpModePmControlN0.Data New = 0xC3F4206B
LpModePmControlN1.Data New = 0x87
LpModePmControlN1.Data New = 0x87
N1.C05: HBM Tcrftp.t_rfc = 0xA for density 0x00000001
N0.C05: HBM Tcrftp.t_rfc = 0xA for density 0x00000000
Socket 1 Ch 6 - CkeLl0.Data = 0x10000080
Socket 1 Ch 6 - CkeLl1.Data = 0x10000260
Socket 1 Ch 6 - CkeLl2.Data = 0x10000230
Socket 1 Ch 6 - CkeLl3.Data = 0x10000230
Socket 1 Ch 6 - PkgcCke.Data = 0x10000230
Socket 0 Ch 6 - CkeLl0.Data = 0x10000080
Socket 0 Ch 6 - CkeLl1.Data = 0x10000260
Socket 0 Ch 6 - CkeLl2.Data = 0x10000230
Socket 0 Ch 6 - CkeLl3.Data = 0x10000230
Socket 0 Ch 6 - PkgcCke.Data = 0x10000230
LpModePmControlN0.Data Original = 0x8806C
LpModePmControlN0.Data Original = 0x8806C
LpModePmControlN1.Data Original = 0x0
LpModePmControlN1.Data Original = 0x0
LpModePmControlN0.Data New = 0xC3F4206B
LpModePmControlN0.Data New = 0xC3F4206B
LpModePmControlN1.Data New = 0x87
LpModePmControlN1.Data New = 0x87
N1.C06: HBM Tcrftp.t_rfc = 0xA for density 0x00000001
N0.C06: HBM Tcrftp.t_rfc = 0xA for density 0x00000000
Socket 1 Ch 7 - CkeLl0.Data = 0x10000080
Socket 1 Ch 7 - CkeLl1.Data = 0x10000260
Socket 1 Ch 7 - CkeLl2.Data = 0x10000230
Socket 1 Ch 7 - CkeLl3.Data = 0x10000230
Socket 1 Ch 7 - PkgcCke.Data = 0x10000230
Socket 0 Ch 7 - CkeLl0.Data = 0x10000080
Socket 0 Ch 7 - CkeLl1.Data = 0x10000260
Socket 0 Ch 7 - CkeLl2.Data = 0x10000230
Socket 0 Ch 7 - CkeLl3.Data = 0x10000230
Socket 0 Ch 7 - PkgcCke.Data = 0x10000230
LpModePmControlN0.Data Original = 0x8806C
LpModePmControlN0.Data Original = 0x8806C
LpModePmControlN1.Data Original = 0x0
LpModePmControlN1.Data Original = 0x0
LpModePmControlN0.Data New = 0xC3F4206B
LpModePmControlN0.Data New = 0xC3F4206B
LpModePmControlN1.Data New = 0x87
LpModePmControlN1.Data New = 0x87
N1.C07: HBM Tcrftp.t_rfc = 0xA for density 0x00000001
N0.C07: HBM Tcrftp.t_rfc = 0xA for density 0x00000000
Socket 1 Ch 8 - CkeLl0.Data = 0x10000080
Socket 1 Ch 8 - CkeLl1.Data = 0x10000260
Socket 1 Ch 8 - CkeLl2.Data = 0x10000230
Socket 1 Ch 8 - CkeLl3.Data = 0x10000230
Socket 1 Ch 8 - PkgcCke.Data = 0x10000230
Socket 0 Ch 8 - CkeLl0.Data = 0x10000080
Socket 0 Ch 8 - CkeLl1.Data = 0x10000260
Socket 0 Ch 8 - CkeLl2.Data = 0x10000230
Socket 0 Ch 8 - CkeLl3.Data = 0x10000230
Socket 0 Ch 8 - PkgcCke.Data = 0x10000230
LpModePmControlN0.Data Original = 0x8806C
LpModePmControlN0.Data Original = 0x8806C
LpModePmControlN1.Data Original = 0x0
LpModePmControlN1.Data Original = 0x0
LpModePmControlN0.Data New = 0xC3F4206B
LpModePmControlN0.Data New = 0xC3F4206B
LpModePmControlN1.Data New = 0x87
LpModePmControlN1.Data New = 0x87
N1.C08: HBM Tcrftp.t_rfc = 0xA for density 0x00000001
N0.C08: HBM Tcrftp.t_rfc = 0xA for density 0x00000000
Socket 1 Ch 9 - CkeLl0.Data = 0x10000080
Socket 1 Ch 9 - CkeLl1.Data = 0x10000260
Socket 1 Ch 9 - CkeLl2.Data = 0x10000230
Socket 1 Ch 9 - CkeLl3.Data = 0x10000230
Socket 1 Ch 9 - PkgcCke.Data = 0x10000230
Socket 0 Ch 9 - CkeLl0.Data = 0x10000080
Socket 0 Ch 9 - CkeLl1.Data = 0x10000260
Socket 0 Ch 9 - CkeLl2.Data = 0x10000230
Socket 0 Ch 9 - CkeLl3.Data = 0x10000230
Socket 0 Ch 9 - PkgcCke.Data = 0x10000230
LpModePmControlN0.Data Original = 0x8806C
LpModePmControlN0.Data Original = 0x8806C
LpModePmControlN1.Data Original = 0x0
LpModePmControlN1.Data Original = 0x0
LpModePmControlN0.Data New = 0xC3F4206B
LpModePmControlN0.Data New = 0xC3F4206B
LpModePmControlN1.Data New = 0x87
LpModePmControlN1.Data New = 0x87
N1.C09: HBM Tcrftp.t_rfc = 0xA for density 0x00000001
N0.C09: HBM Tcrftp.t_rfc = 0xA for density 0x00000000
Socket 1 Ch 10 - CkeLl0.Data = 0x10000080
Socket 1 Ch 10 - CkeLl1.Data = 0x10000260
Socket 1 Ch 10 - CkeLl2.Data = 0x10000230
Socket 1 Ch 10 - CkeLl3.Data = 0x10000230
Socket 1 Ch 10 - PkgcCke.Data = 0x10000230
Socket 0 Ch 10 - CkeLl0.Data = 0x10000080
Socket 0 Ch 10 - CkeLl1.Data = 0x10000260
Socket 0 Ch 10 - CkeLl2.Data = 0x10000230
Socket 0 Ch 10 - CkeLl3.Data = 0x10000230
Socket 0 Ch 10 - PkgcCke.Data = 0x10000230
LpModePmControlN0.Data Original = 0x8806C
LpModePmControlN0.Data Original = 0x8806C
LpModePmControlN1.Data Original = 0x0
LpModePmControlN1.Data Original = 0x0
LpModePmControlN0.Data New = 0xC3F4206B
LpModePmControlN0.Data New = 0xC3F4206B
LpModePmControlN1.Data New = 0x87
LpModePmControlN1.Data New = 0x87
N1.C10: HBM Tcrftp.t_rfc = 0xA for density 0x00000001
N0.C10: HBM Tcrftp.t_rfc = 0xA for density 0x00000000
Socket 1 Ch 11 - CkeLl0.Data = 0x10000080
Socket 1 Ch 11 - CkeLl1.Data = 0x10000260
Socket 1 Ch 11 - CkeLl2.Data = 0x10000230
Socket 1 Ch 11 - CkeLl3.Data = 0x10000230
Socket 1 Ch 11 - PkgcCke.Data = 0x10000230
Socket 0 Ch 11 - CkeLl0.Data = 0x10000080
Socket 0 Ch 11 - CkeLl1.Data = 0x10000260
Socket 0 Ch 11 - CkeLl2.Data = 0x10000230
Socket 0 Ch 11 - CkeLl3.Data = 0x10000230
Socket 0 Ch 11 - PkgcCke.Data = 0x10000230
LpModePmControlN0.Data Original = 0x8806C
LpModePmControlN0.Data Original = 0x8806C
LpModePmControlN1.Data Original = 0x0
LpModePmControlN1.Data Original = 0x0
LpModePmControlN0.Data New = 0xC3F4206B
LpModePmControlN0.Data New = 0xC3F4206B
LpModePmControlN1.Data New = 0x87
LpModePmControlN1.Data New = 0x87
N1.C11: HBM Tcrftp.t_rfc = 0xA for density 0x00000001
N0.C11: HBM Tcrftp.t_rfc = 0xA for density 0x00000000
Socket 1 Ch 12 - CkeLl0.Data = 0x10000080
Socket 1 Ch 12 - CkeLl1.Data = 0x10000260
Socket 1 Ch 12 - CkeLl2.Data = 0x10000230
Socket 1 Ch 12 - CkeLl3.Data = 0x10000230
Socket 1 Ch 12 - PkgcCke.Data = 0x10000230
Socket 0 Ch 12 - CkeLl0.Data = 0x10000080
Socket 0 Ch 12 - CkeLl1.Data = 0x10000260
Socket 0 Ch 12 - CkeLl2.Data = 0x10000230
Socket 0 Ch 12 - CkeLl3.Data = 0x10000230
Socket 0 Ch 12 - PkgcCke.Data = 0x10000230
LpModePmControlN0.Data Original = 0x8806C
LpModePmControlN0.Data Original = 0x8806C
LpModePmControlN1.Data Original = 0x0
LpModePmControlN1.Data Original = 0x0
LpModePmControlN0.Data New = 0xC3F4206B
LpModePmControlN0.Data New = 0xC3F4206B
LpModePmControlN1.Data New = 0x87
LpModePmControlN1.Data New = 0x87
N1.C12: HBM Tcrftp.t_rfc = 0xA for density 0x00000001
N0.C12: HBM Tcrftp.t_rfc = 0xA for density 0x00000000
Socket 1 Ch 13 - CkeLl0.Data = 0x10000080
Socket 1 Ch 13 - CkeLl1.Data = 0x10000260
Socket 1 Ch 13 - CkeLl2.Data = 0x10000230
Socket 1 Ch 13 - CkeLl3.Data = 0x10000230
Socket 1 Ch 13 - PkgcCke.Data = 0x10000230
Socket 0 Ch 13 - CkeLl0.Data = 0x10000080
Socket 0 Ch 13 - CkeLl1.Data = 0x10000260
Socket 0 Ch 13 - CkeLl2.Data = 0x10000230
Socket 0 Ch 13 - CkeLl3.Data = 0x10000230
Socket 0 Ch 13 - PkgcCke.Data = 0x10000230
LpModePmControlN0.Data Original = 0x8806C
LpModePmControlN0.Data Original = 0x8806C
LpModePmControlN1.Data Original = 0x0
LpModePmControlN1.Data Original = 0x0
LpModePmControlN0.Data New = 0xC3F4206B
LpModePmControlN0.Data New = 0xC3F4206B
LpModePmControlN1.Data New = 0x87
LpModePmControlN1.Data New = 0x87
N1.C13: HBM Tcrftp.t_rfc = 0xA for density 0x00000001
N0.C13: HBM Tcrftp.t_rfc = 0xA for density 0x00000000
Socket 1 Ch 14 - CkeLl0.Data = 0x10000080
Socket 1 Ch 14 - CkeLl1.Data = 0x10000260
Socket 1 Ch 14 - CkeLl2.Data = 0x10000230
Socket 1 Ch 14 - CkeLl3.Data = 0x10000230
Socket 1 Ch 14 - PkgcCke.Data = 0x10000230
Socket 0 Ch 14 - CkeLl0.Data = 0x10000080
Socket 0 Ch 14 - CkeLl1.Data = 0x10000260
Socket 0 Ch 14 - CkeLl2.Data = 0x10000230
Socket 0 Ch 14 - CkeLl3.Data = 0x10000230
Socket 0 Ch 14 - PkgcCke.Data = 0x10000230
LpModePmControlN0.Data Original = 0x8806C
LpModePmControlN0.Data Original = 0x8806C
LpModePmControlN1.Data Original = 0x0
LpModePmControlN1.Data Original = 0x0
LpModePmControlN0.Data New = 0xC3F4206B
LpModePmControlN0.Data New = 0xC3F4206B
LpModePmControlN1.Data New = 0x87
LpModePmControlN1.Data New = 0x87
N1.C14: HBM Tcrftp.t_rfc = 0xA for density 0x00000001
N0.C14: HBM Tcrftp.t_rfc = 0xA for density 0x00000000
Socket 1 Ch 15 - CkeLl0.Data = 0x10000080
Socket 1 Ch 15 - CkeLl1.Data = 0x10000260
Socket 1 Ch 15 - CkeLl2.Data = 0x10000230
Socket 1 Ch 15 - CkeLl3.Data = 0x10000230
Socket 1 Ch 15 - PkgcCke.Data = 0x10000230
Socket 0 Ch 15 - CkeLl0.Data = 0x10000080
Socket 0 Ch 15 - CkeLl1.Data = 0x10000260
Socket 0 Ch 15 - CkeLl2.Data = 0x10000230
Socket 0 Ch 15 - CkeLl3.Data = 0x10000230
Socket 0 Ch 15 - PkgcCke.Data = 0x10000230
LpModePmControlN0.Data Original = 0x8806C
LpModePmControlN0.Data Original = 0x8806C
LpModePmControlN1.Data Original = 0x0
LpModePmControlN1.Data Original = 0x0
LpModePmControlN0.Data New = 0xC3F4206B
LpModePmControlN0.Data New = 0xC3F4206B
LpModePmControlN1.Data New = 0x87
LpModePmControlN1.Data New = 0x87
N1.C15: HBM Tcrftp.t_rfc = 0xA for density 0x00000001
N0.C15: HBM Tcrftp.t_rfc = 0xA for density 0x00000000
Socket 1 Ch 16 - CkeLl0.Data = 0x10000080
Socket 1 Ch 16 - CkeLl1.Data = 0x10000260
Socket 1 Ch 16 - CkeLl2.Data = 0x10000230
Socket 1 Ch 16 - CkeLl3.Data = 0x10000230
Socket 1 Ch 16 - PkgcCke.Data = 0x10000230
Socket 0 Ch 16 - CkeLl0.Data = 0x10000080
Socket 0 Ch 16 - CkeLl1.Data = 0x10000260
Socket 0 Ch 16 - CkeLl2.Data = 0x10000230
Socket 0 Ch 16 - CkeLl3.Data = 0x10000230
Socket 0 Ch 16 - PkgcCke.Data = 0x10000230
LpModePmControlN0.Data Original = 0x8806C
LpModePmControlN0.Data Original = 0x8806C
LpModePmControlN1.Data Original = 0x0
LpModePmControlN1.Data Original = 0x0
LpModePmControlN0.Data New = 0xC3F4206B
LpModePmControlN0.Data New = 0xC3F4206B
LpModePmControlN1.Data New = 0x87
LpModePmControlN1.Data New = 0x87
N1.C16: HBM Tcrftp.t_rfc = 0xA for density 0x00000001
N0.C16: HBM Tcrftp.t_rfc = 0xA for density 0x00000000
Socket 1 Ch 17 - CkeLl0.Data = 0x10000080
Socket 1 Ch 17 - CkeLl1.Data = 0x10000260
Socket 1 Ch 17 - CkeLl2.Data = 0x10000230
Socket 1 Ch 17 - CkeLl3.Data = 0x10000230
Socket 1 Ch 17 - PkgcCke.Data = 0x10000230
Socket 0 Ch 17 - CkeLl0.Data = 0x10000080
Socket 0 Ch 17 - CkeLl1.Data = 0x10000260
Socket 0 Ch 17 - CkeLl2.Data = 0x10000230
Socket 0 Ch 17 - CkeLl3.Data = 0x10000230
Socket 0 Ch 17 - PkgcCke.Data = 0x10000230
LpModePmControlN0.Data Original = 0x8806C
LpModePmControlN0.Data Original = 0x8806C
LpModePmControlN1.Data Original = 0x0
LpModePmControlN1.Data Original = 0x0
LpModePmControlN0.Data New = 0xC3F4206B
LpModePmControlN0.Data New = 0xC3F4206B
LpModePmControlN1.Data New = 0x87
LpModePmControlN1.Data New = 0x87
N1.C17: HBM Tcrftp.t_rfc = 0xA for density 0x00000001
N0.C17: HBM Tcrftp.t_rfc = 0xA for density 0x00000000
Socket 1 Ch 18 - CkeLl0.Data = 0x10000080
Socket 1 Ch 18 - CkeLl1.Data = 0x10000260
Socket 1 Ch 18 - CkeLl2.Data = 0x10000230
Socket 1 Ch 18 - CkeLl3.Data = 0x10000230
Socket 1 Ch 18 - PkgcCke.Data = 0x10000230
Socket 0 Ch 18 - CkeLl0.Data = 0x10000080
Socket 0 Ch 18 - CkeLl1.Data = 0x10000260
Socket 0 Ch 18 - CkeLl2.Data = 0x10000230
Socket 0 Ch 18 - CkeLl3.Data = 0x10000230
Socket 0 Ch 18 - PkgcCke.Data = 0x10000230
LpModePmControlN0.Data Original = 0x8806C
LpModePmControlN0.Data Original = 0x8806C
LpModePmControlN1.Data Original = 0x0
LpModePmControlN1.Data Original = 0x0
LpModePmControlN0.Data New = 0xC3F4206B
LpModePmControlN0.Data New = 0xC3F4206B
LpModePmControlN1.Data New = 0x87
LpModePmControlN1.Data New = 0x87
N1.C18: HBM Tcrftp.t_rfc = 0xA for density 0x00000001
N0.C18: HBM Tcrftp.t_rfc = 0xA for density 0x00000000
Socket 1 Ch 19 - CkeLl0.Data = 0x10000080
Socket 1 Ch 19 - CkeLl1.Data = 0x10000260
Socket 1 Ch 19 - CkeLl2.Data = 0x10000230
Socket 1 Ch 19 - CkeLl3.Data = 0x10000230
Socket 1 Ch 19 - PkgcCke.Data = 0x10000230
Socket 0 Ch 19 - CkeLl0.Data = 0x10000080
Socket 0 Ch 19 - CkeLl1.Data = 0x10000260
Socket 0 Ch 19 - CkeLl2.Data = 0x10000230
Socket 0 Ch 19 - CkeLl3.Data = 0x10000230
Socket 0 Ch 19 - PkgcCke.Data = 0x10000230
LpModePmControlN0.Data Original = 0x8806C
LpModePmControlN0.Data Original = 0x8806C
LpModePmControlN1.Data Original = 0x0
LpModePmControlN1.Data Original = 0x0
LpModePmControlN0.Data New = 0xC3F4206B
LpModePmControlN0.Data New = 0xC3F4206B
LpModePmControlN1.Data New = 0x87
LpModePmControlN1.Data New = 0x87
N1.C19: HBM Tcrftp.t_rfc = 0xA for density 0x00000001
N0.C19: HBM Tcrftp.t_rfc = 0xA for density 0x00000000
Socket 1 Ch 20 - CkeLl0.Data = 0x10000080
Socket 1 Ch 20 - CkeLl1.Data = 0x10000260
Socket 1 Ch 20 - CkeLl2.Data = 0x10000230
Socket 1 Ch 20 - CkeLl3.Data = 0x10000230
Socket 1 Ch 20 - PkgcCke.Data = 0x10000230
Socket 0 Ch 20 - CkeLl0.Data = 0x10000080
Socket 0 Ch 20 - CkeLl1.Data = 0x10000260
Socket 0 Ch 20 - CkeLl2.Data = 0x10000230
Socket 0 Ch 20 - CkeLl3.Data = 0x10000230
Socket 0 Ch 20 - PkgcCke.Data = 0x10000230
LpModePmControlN0.Data Original = 0x8806C
LpModePmControlN0.Data Original = 0x8806C
LpModePmControlN1.Data Original = 0x0
LpModePmControlN1.Data Original = 0x0
LpModePmControlN0.Data New = 0xC3F4206B
LpModePmControlN0.Data New = 0xC3F4206B
LpModePmControlN1.Data New = 0x87
LpModePmControlN1.Data New = 0x87
N1.C20: HBM Tcrftp.t_rfc = 0xA for density 0x00000001
N0.C20: HBM Tcrftp.t_rfc = 0xA for density 0x00000000
Socket 1 Ch 21 - CkeLl0.Data = 0x10000080
Socket 1 Ch 21 - CkeLl1.Data = 0x10000260
Socket 1 Ch 21 - CkeLl2.Data = 0x10000230
Socket 1 Ch 21 - CkeLl3.Data = 0x10000230
Socket 1 Ch 21 - PkgcCke.Data = 0x10000230
Socket 0 Ch 21 - CkeLl0.Data = 0x10000080
Socket 0 Ch 21 - CkeLl1.Data = 0x10000260
Socket 0 Ch 21 - CkeLl2.Data = 0x10000230
Socket 0 Ch 21 - CkeLl3.Data = 0x10000230
Socket 0 Ch 21 - PkgcCke.Data = 0x10000230
LpModePmControlN0.Data Original = 0x8806C
LpModePmControlN0.Data Original = 0x8806C
LpModePmControlN1.Data Original = 0x0
LpModePmControlN1.Data Original = 0x0
LpModePmControlN0.Data New = 0xC3F4206B
LpModePmControlN0.Data New = 0xC3F4206B
LpModePmControlN1.Data New = 0x87
LpModePmControlN1.Data New = 0x87
N1.C21: HBM Tcrftp.t_rfc = 0xA for density 0x00000001
N0.C21: HBM Tcrftp.t_rfc = 0xA for density 0x00000000
Socket 1 Ch 22 - CkeLl0.Data = 0x10000080
Socket 1 Ch 22 - CkeLl1.Data = 0x10000260
Socket 1 Ch 22 - CkeLl2.Data = 0x10000230
Socket 1 Ch 22 - CkeLl3.Data = 0x10000230
Socket 1 Ch 22 - PkgcCke.Data = 0x10000230
Socket 0 Ch 22 - CkeLl0.Data = 0x10000080
Socket 0 Ch 22 - CkeLl1.Data = 0x10000260
Socket 0 Ch 22 - CkeLl2.Data = 0x10000230
Socket 0 Ch 22 - CkeLl3.Data = 0x10000230
Socket 0 Ch 22 - PkgcCke.Data = 0x10000230
LpModePmControlN0.Data Original = 0x8806C
LpModePmControlN0.Data Original = 0x8806C
LpModePmControlN1.Data Original = 0x0
LpModePmControlN1.Data Original = 0x0
LpModePmControlN0.Data New = 0xC3F4206B
LpModePmControlN0.Data New = 0xC3F4206B
LpModePmControlN1.Data New = 0x87
LpModePmControlN1.Data New = 0x87
N1.C22: HBM Tcrftp.t_rfc = 0xA for density 0x00000001
N0.C22: HBM Tcrftp.t_rfc = 0xA for density 0x00000000
Socket 1 Ch 23 - CkeLl0.Data = 0x10000080
Socket 1 Ch 23 - CkeLl1.Data = 0x10000260
Socket 1 Ch 23 - CkeLl2.Data = 0x10000230
Socket 1 Ch 23 - CkeLl3.Data = 0x10000230
Socket 1 Ch 23 - PkgcCke.Data = 0x10000230
Socket 0 Ch 23 - CkeLl0.Data = 0x10000080
Socket 0 Ch 23 - CkeLl1.Data = 0x10000260
Socket 0 Ch 23 - CkeLl2.Data = 0x10000230
Socket 0 Ch 23 - CkeLl3.Data = 0x10000230
Socket 0 Ch 23 - PkgcCke.Data = 0x10000230
LpModePmControlN0.Data Original = 0x8806C
LpModePmControlN0.Data Original = 0x8806C
LpModePmControlN1.Data Original = 0x0
LpModePmControlN1.Data Original = 0x0
LpModePmControlN0.Data New = 0xC3F4206B
LpModePmControlN0.Data New = 0xC3F4206B
LpModePmControlN1.Data New = 0x87
LpModePmControlN1.Data New = 0x87
N1.C23: HBM Tcrftp.t_rfc = 0xA for density 0x00000001
N0.C23: HBM Tcrftp.t_rfc = 0xA for density 0x00000000
Socket 1 Ch 24 - CkeLl0.Data = 0x10000080
Socket 1 Ch 24 - CkeLl1.Data = 0x10000260
Socket 1 Ch 24 - CkeLl2.Data = 0x10000230
Socket 1 Ch 24 - CkeLl3.Data = 0x10000230
Socket 1 Ch 24 - PkgcCke.Data = 0x10000230
Socket 0 Ch 24 - CkeLl0.Data = 0x10000080
Socket 0 Ch 24 - CkeLl1.Data = 0x10000260
Socket 0 Ch 24 - CkeLl2.Data = 0x10000230
Socket 0 Ch 24 - CkeLl3.Data = 0x10000230
Socket 0 Ch 24 - PkgcCke.Data = 0x10000230
LpModePmControlN0.Data Original = 0x8806C
LpModePmControlN0.Data Original = 0x8806C
LpModePmControlN1.Data Original = 0x0
LpModePmControlN1.Data Original = 0x0
LpModePmControlN0.Data New = 0xC3F4206B
LpModePmControlN0.Data New = 0xC3F4206B
LpModePmControlN1.Data New = 0x87
LpModePmControlN1.Data New = 0x87
N1.C24: HBM Tcrftp.t_rfc = 0xA for density 0x00000001
N0.C24: HBM Tcrftp.t_rfc = 0xA for density 0x00000000
Socket 1 Ch 25 - CkeLl0.Data = 0x10000080
Socket 1 Ch 25 - CkeLl1.Data = 0x10000260
Socket 1 Ch 25 - CkeLl2.Data = 0x10000230
Socket 1 Ch 25 - CkeLl3.Data = 0x10000230
Socket 1 Ch 25 - PkgcCke.Data = 0x10000230
Socket 0 Ch 25 - CkeLl0.Data = 0x10000080
Socket 0 Ch 25 - CkeLl1.Data = 0x10000260
Socket 0 Ch 25 - CkeLl2.Data = 0x10000230
Socket 0 Ch 25 - CkeLl3.Data = 0x10000230
Socket 0 Ch 25 - PkgcCke.Data = 0x10000230
LpModePmControlN0.Data Original = 0x8806C
LpModePmControlN0.Data Original = 0x8806C
LpModePmControlN1.Data Original = 0x0
LpModePmControlN1.Data Original = 0x0
LpModePmControlN0.Data New = 0xC3F4206B
LpModePmControlN0.Data New = 0xC3F4206B
LpModePmControlN1.Data New = 0x87
LpModePmControlN1.Data New = 0x87
N1.C25: HBM Tcrftp.t_rfc = 0xA for density 0x00000001
N0.C25: HBM Tcrftp.t_rfc = 0xA for density 0x00000000
Socket 1 Ch 26 - CkeLl0.Data = 0x10000080
Socket 1 Ch 26 - CkeLl1.Data = 0x10000260
Socket 1 Ch 26 - CkeLl2.Data = 0x10000230
Socket 1 Ch 26 - CkeLl3.Data = 0x10000230
Socket 1 Ch 26 - PkgcCke.Data = 0x10000230
Socket 0 Ch 26 - CkeLl0.Data = 0x10000080
Socket 0 Ch 26 - CkeLl1.Data = 0x10000260
Socket 0 Ch 26 - CkeLl2.Data = 0x10000230
Socket 0 Ch 26 - CkeLl3.Data = 0x10000230
Socket 0 Ch 26 - PkgcCke.Data = 0x10000230
LpModePmControlN0.Data Original = 0x8806C
LpModePmControlN0.Data Original = 0x8806C
LpModePmControlN1.Data Original = 0x0
LpModePmControlN1.Data Original = 0x0
LpModePmControlN0.Data New = 0xC3F4206B
LpModePmControlN0.Data New = 0xC3F4206B
LpModePmControlN1.Data New = 0x87
LpModePmControlN1.Data New = 0x87
N1.C26: HBM Tcrftp.t_rfc = 0xA for density 0x00000001
N0.C26: HBM Tcrftp.t_rfc = 0xA for density 0x00000000
Socket 1 Ch 27 - CkeLl0.Data = 0x10000080
Socket 1 Ch 27 - CkeLl1.Data = 0x10000260
Socket 1 Ch 27 - CkeLl2.Data = 0x10000230
Socket 1 Ch 27 - CkeLl3.Data = 0x10000230
Socket 1 Ch 27 - PkgcCke.Data = 0x10000230
Socket 0 Ch 27 - CkeLl0.Data = 0x10000080
Socket 0 Ch 27 - CkeLl1.Data = 0x10000260
Socket 0 Ch 27 - CkeLl2.Data = 0x10000230
Socket 0 Ch 27 - CkeLl3.Data = 0x10000230
Socket 0 Ch 27 - PkgcCke.Data = 0x10000230
LpModePmControlN0.Data Original = 0x8806C
LpModePmControlN0.Data Original = 0x8806C
LpModePmControlN1.Data Original = 0x0
LpModePmControlN1.Data Original = 0x0
LpModePmControlN0.Data New = 0xC3F4206B
LpModePmControlN0.Data New = 0xC3F4206B
LpModePmControlN1.Data New = 0x87
LpModePmControlN1.Data New = 0x87
N1.C27: HBM Tcrftp.t_rfc = 0xA for density 0x00000001
N0.C27: HBM Tcrftp.t_rfc = 0xA for density 0x00000000
Socket 1 Ch 28 - CkeLl0.Data = 0x10000080
Socket 1 Ch 28 - CkeLl1.Data = 0x10000260
Socket 1 Ch 28 - CkeLl2.Data = 0x10000230
Socket 1 Ch 28 - CkeLl3.Data = 0x10000230
Socket 1 Ch 28 - PkgcCke.Data = 0x10000230
Socket 0 Ch 28 - CkeLl0.Data = 0x10000080
Socket 0 Ch 28 - CkeLl1.Data = 0x10000260
Socket 0 Ch 28 - CkeLl2.Data = 0x10000230
Socket 0 Ch 28 - CkeLl3.Data = 0x10000230
Socket 0 Ch 28 - PkgcCke.Data = 0x10000230
LpModePmControlN0.Data Original = 0x8806C
LpModePmControlN0.Data Original = 0x8806C
LpModePmControlN1.Data Original = 0x0
LpModePmControlN1.Data Original = 0x0
LpModePmControlN0.Data New = 0xC3F4206B
LpModePmControlN0.Data New = 0xC3F4206B
LpModePmControlN1.Data New = 0x87
LpModePmControlN1.Data New = 0x87
N1.C28: HBM Tcrftp.t_rfc = 0xA for density 0x00000001
N0.C28: HBM Tcrftp.t_rfc = 0xA for density 0x00000000
Socket 1 Ch 29 - CkeLl0.Data = 0x10000080
Socket 1 Ch 29 - CkeLl1.Data = 0x10000260
Socket 1 Ch 29 - CkeLl2.Data = 0x10000230
Socket 1 Ch 29 - CkeLl3.Data = 0x10000230
Socket 1 Ch 29 - PkgcCke.Data = 0x10000230
Socket 0 Ch 29 - CkeLl0.Data = 0x10000080
Socket 0 Ch 29 - CkeLl1.Data = 0x10000260
Socket 0 Ch 29 - CkeLl2.Data = 0x10000230
Socket 0 Ch 29 - CkeLl3.Data = 0x10000230
Socket 0 Ch 29 - PkgcCke.Data = 0x10000230
LpModePmControlN0.Data Original = 0x8806C
LpModePmControlN0.Data Original = 0x8806C
LpModePmControlN1.Data Original = 0x0
LpModePmControlN1.Data Original = 0x0
LpModePmControlN0.Data New = 0xC3F4206B
LpModePmControlN0.Data New = 0xC3F4206B
LpModePmControlN1.Data New = 0x87
LpModePmControlN1.Data New = 0x87
N1.C29: HBM Tcrftp.t_rfc = 0xA for density 0x00000001
N0.C29: HBM Tcrftp.t_rfc = 0xA for density 0x00000000
Socket 1 Ch 30 - CkeLl0.Data = 0x10000080
Socket 1 Ch 30 - CkeLl1.Data = 0x10000260
Socket 1 Ch 30 - CkeLl2.Data = 0x10000230
Socket 1 Ch 30 - CkeLl3.Data = 0x10000230
Socket 1 Ch 30 - PkgcCke.Data = 0x10000230
Socket 0 Ch 30 - CkeLl0.Data = 0x10000080
Socket 0 Ch 30 - CkeLl1.Data = 0x10000260
Socket 0 Ch 30 - CkeLl2.Data = 0x10000230
Socket 0 Ch 30 - CkeLl3.Data = 0x10000230
Socket 0 Ch 30 - PkgcCke.Data = 0x10000230
LpModePmControlN0.Data Original = 0x8806C
LpModePmControlN0.Data Original = 0x8806C
LpModePmControlN1.Data Original = 0x0
LpModePmControlN1.Data Original = 0x0
LpModePmControlN0.Data New = 0xC3F4206B
LpModePmControlN0.Data New = 0xC3F4206B
LpModePmControlN1.Data New = 0x87
LpModePmControlN1.Data New = 0x87
N1.C30: HBM Tcrftp.t_rfc = 0xA for density 0x00000001
N0.C30: HBM Tcrftp.t_rfc = 0xA for density 0x00000000
Socket 1 Ch 31 - CkeLl0.Data = 0x10000080
Socket 1 Ch 31 - CkeLl1.Data = 0x10000260
Socket 1 Ch 31 - CkeLl2.Data = 0x10000230
Socket 1 Ch 31 - CkeLl3.Data = 0x10000230
Socket 1 Ch 31 - PkgcCke.Data = 0x10000230
Socket 0 Ch 31 - CkeLl0.Data = 0x10000080
Socket 0 Ch 31 - CkeLl1.Data = 0x10000260
Socket 0 Ch 31 - CkeLl2.Data = 0x10000230
Socket 0 Ch 31 - CkeLl3.Data = 0x10000230
Socket 0 Ch 31 - PkgcCke.Data = 0x10000230
LpModePmControlN0.Data Original = 0x8806C
LpModePmControlN0.Data Original = 0x8806C
LpModePmControlN1.Data Original = 0x0
LpModePmControlN1.Data Original = 0x0
LpModePmControlN0.Data New = 0xC3F4206B
LpModePmControlN0.Data New = 0xC3F4206B
LpModePmControlN1.Data New = 0x87
LpModePmControlN1.Data New = 0x87
N1.C31: HBM Tcrftp.t_rfc = 0xA for density 0x00000001
N0.C31: HBM Tcrftp.t_rfc = 0xA for density 0x00000000
[ScktId: 1] HBM Post-Training - 2817ms
[ScktId: 0] HBM Post-Training - 2818ms
[ScktId: 1] MemTest -- Started
[ScktId: 0] MemTest -- Started
N1: MemTestScram Starts
N0: MemTestScram Starts
...N1:
MemTestScram TestType 10 Ends
.TestType 10 Latency = 2 sec
N0:
MemTestScram TestType 10 Ends
[ScktId: 1] MemTest - 2031ms
TestType 10 Latency = 2 sec
[ScktId: 1] Pipe Sync AP Final Error Sync -- Started
[ScktId: 0] MemTest - 2036ms
[ScktId: 0] Pipe Sync AP Final Error Sync -- Started
[ScktId: 1] Pipe Sync AP Final Error Sync - 16ms
[ScktId: 0] Pipe Sync AP Final Error Sync - 5ms
[ScktId: 1] Late Configuration -- Started
[ScktId: 0] Late Configuration -- Started
S1 TME CPUID = 1
S0 TME CPUID = 1
S1 TmeActivated = 0
S0 TmeActivated = 0
S1 TME CPUID = 1
S0 TME CPUID = 1
S1 TmeActivated = 0
S0 TmeActivated = 0
S1 TME CPUID = 1
S0 TME CPUID = 1
S1 TmeActivated = 0
S0 TmeActivated = 0
S1 TME CPUID = 1
S0 TME CPUID = 1
S1 TmeActivated = 0
S0 TmeActivated = 0
[ScktId: 1] Late Configuration - 41ms
[ScktId: 0] Late Configuration - 38ms
[ScktId: 1] Initialize Memory RAS before refresh enable -- Started
[ScktId: 0] Initialize Memory RAS before refresh enable -- Started
[ScktId: 1] Initialize Memory RAS before refresh enable - 12ms
[ScktId: 0] Initialize Memory RAS before refresh enable - 15ms
[ScktId: 1] Initialize Throttling -- Started
[ScktId: 0] Initialize Throttling -- Started
Data received from mailbox: 0x20000002
N1: McId = 0, VR SVID = 10
N1: McId = 1, VR SVID = 10
N1: McId = 2, VR SVID = 10
N1: McId = 3, VR SVID = 10
Data received from mailbox: 0x20000002
N0: McId = 0, VR SVID = 10
N0: McId = 1, VR SVID = 10
N0: McId = 2, VR SVID = 10
N0: McId = 3, VR SVID = 10
[ScktId: 1] Initialize Throttling - 31ms
[ScktId: 0] Initialize Throttling - 40ms
[ScktId: 1] Publish ACTM DIMM Manifest -- Started
[ScktId: 0] Publish ACTM DIMM Manifest -- Started
[ScktId: 0] Publish ACTM DIMM Manifest - 10ms
[ScktId: 1] Publish ACTM DIMM Manifest - 14ms
[ScktId: 0] Setup SVL and Scrambling -- Started
[ScktId: 1] Setup SVL and Scrambling -- Started
[ScktId: 0] Setup SVL and Scrambling - 9ms
[ScktId: 1] Setup SVL and Scrambling - 9ms
N1 Checked into Pipe
[ScktId: 0] Mem ALIAS Check -- Started
[ScktId: 0] Mem ALIAS Check - 6ms
[ScktId: 1] Switch to Cpgc Out Of Order Mode -- Started
[ScktId: 0] Switch to Cpgc Out Of Order Mode -- Started
[ScktId: 1] Switch to Cpgc Out Of Order Mode - 5ms
[ScktId: 0] Switch to Cpgc Out Of Order Mode - 11ms
[ScktId: 1] Enable Host Refresh -- Started
[ScktId: 0] Enable Host Refresh -- Started
C00: REFRESH_SYNC_TIME_PerCh= 7800
C00: REFRESH_SYNC_TIME_PerCh= 7800
C02: REFRESH_SYNC_TIME_PerCh= 7800
C02: REFRESH_SYNC_TIME_PerCh= 7800
C04: REFRESH_SYNC_TIME_PerCh= 7800
C04: REFRESH_SYNC_TIME_PerCh= 7800
C06: REFRESH_SYNC_TIME_PerCh= 7800
C06: REFRESH_SYNC_TIME_PerCh= 7800
C00: HostRefreshStartTime= 7800
C00: HostRefreshStartTime= 7800
C02: HostRefreshStartTime= 7755
C02: HostRefreshStartTime= 7748
C04: HostRefreshStartTime= 7775
C04: HostRefreshStartTime= 7756
C06: HostRefreshStartTime= 7738
C06: HostRefreshStartTime= 7751
EnableHostRefresh Start Write Time diff[2]=457 ns
EnableHostRefresh Start Write Time diff[2]=275 ns
EnableHostRefresh Start Write Time diff[4]=507 ns
EnableHostRefresh Start Write Time diff[4]=342 ns
EnableHostRefresh Start Write Time diff[6]=578 ns
EnableHostRefresh Start Write Time diff[6]=428 ns
[ScktId: 1] Enable Host Refresh - 92ms
[ScktId: 0] Enable Host Refresh - 91ms
[ScktId: 1] MemInit -- Started
[ScktId: 0] MemInit -- Started
.[ScktId: 0] MemInit - 1219ms
.[ScktId: 0] HBM Mem Test -- Started
[ScktId: 1] MemInit - 1226ms
SetCpgcCurrentTechType: MemTechType = 1
[ScktId: 1] HBM Mem Test -- Started
SetCpgcCurrentTechType: MemTechType = 1
...TestType 10 Latency = 0 sec
.TestType 10 Latency = 0 sec
...TestType 10 Latency = 0 sec
.TestType 10 Latency = 0 sec
...TestType 10 Latency = 0 sec
.TestType 10 Latency = 0 sec
...TestType 10 Latency = 0 sec
SetCpgcCurrentTechType: MemTechType = 0
[ScktId: 0] HBM Mem Test - 1185ms
.[ScktId: 0] HBM Setup Scrambling -- Started
TestType 10 Latency = 0 sec
[ScktId: 0] HBM Setup Scrambling - 4ms
SetCpgcCurrentTechType: MemTechType = 0
[ScktId: 0] AP HBM Information -- Started
[ScktId: 1] HBM Mem Test - 1197ms
[ScktId: 1] HBM Setup Scrambling -- Started
[ScktId: 1] HBM Setup Scrambling - 4ms
[ScktId: 1] AP HBM Information -- Started
[ScktId: 0] AP HBM Information - 25ms
[ScktId: 1] AP HBM Information - 5ms
N1 Checked into Pipe
[ScktId: 0] HBM Fault Resilient Boot -- Started
[ScktId: 0] HBM Fault Resilient Boot - 6ms
N1 Checked into Pipe
[ScktId: 0] HBM Reset System -- Started
[ScktId: 0] HBM Reset System - 6ms
[ScktId: 1] SBSP HBM Information -- Started
[ScktId: 0] SBSP HBM Information -- Started
[ScktId: 1] SBSP HBM Information - 9ms
[ScktId: 0] SBSP HBM Information - 9ms
[ScktId: 1] HBM Mem Init -- Started
[ScktId: 0] HBM Mem Init -- Started
SetCpgcCurrentTechType: MemTechType = 1
SetCpgcCurrentTechType: MemTechType = 1
.TestType 9 Latency = 0 sec
SetCpgcCurrentTechType: MemTechType = 0
.[ScktId: 1] HBM Mem Init - 706ms
TestType 9 Latency = 0 sec
[ScktId: 1] Pipe Sync AP NVRAM Data -- Started
SetCpgcCurrentTechType: MemTechType = 0
[ScktId: 0] HBM Mem Init - 716ms
[ScktId: 0] Pipe Sync AP NVRAM Data -- Started
[ScktId: 0] Pipe Sync AP NVRAM Data - 17ms
[ScktId: 1] Pipe Sync AP NVRAM Data - 32ms
N1 Checked into Pipe
[ScktId: 0] Check Memory Topology -- Started
GetPorTablePtr - Using SPR HBM Matrix
[ScktId: 0] Check Memory Topology - 10ms
[ScktId: 1] Pipe Sync AP Final Error Sync -- Started
[ScktId: 0] Pipe Sync AP Final Error Sync -- Started
[ScktId: 1] Pipe Sync AP Final Error Sync - 10ms
[ScktId: 0] Pipe Sync AP Final Error Sync - 10ms
N1 Checked into Pipe
[ScktId: 0] Check Ras Support After MemInit -- Started
[ScktId: 0] Check Ras Support After MemInit - 7ms
N1 Checked into Pipe
[ScktId: 0] Initialize Memory Map -- Started
N0.C00.D0: Memory Found!
N0.C02.D0: Memory Found!
N0.C04.D0: Memory Found!
N0.C06.D0: Memory Found!
N1.C00.D0: Memory Found!
N1.C02.D0: Memory Found!
N1.C04.D0: Memory Found!
N1.C06.D0: Memory Found!
sizeof (MEMORY_MAP_HOST) = 66360
***BEGIN MEMORY MAPPING***
mmiohbasefrom setup: 2000 MMIOH base = 80000 (64mb)
Silicon capability does not support persistent modes, forcing to non-persistent mode.
Silicon capability does not support persistent modes, forcing to non-persistent mode.
PMem mgmt Driver is available..
CXL: Socket 0 Stack 0, CXL device not found
CXL: Socket 0 Stack 1, CXL device not found
CXL: Socket 0 Stack 2, CXL device not found
CXL: Socket 0 Stack 3, CXL device not found
CXL: Socket 0 Stack 4, CXL device not found
CXL: Socket 0 Stack 5, CXL device not found
CXL: Socket 0 Stack 6, CXL device not found
CXL: Socket 0 Stack 7, CXL device not found
CXL: Socket 1 Stack 0, CXL device not found
CXL: Socket 1 Stack 1, CXL device not found
CXL: Socket 1 Stack 2, CXL device not found
CXL: Socket 1 Stack 3, CXL device not found
CXL: Socket 1 Stack 4, CXL device not found
CXL: Socket 1 Stack 5, CXL device not found
CXL: Socket 1 Stack 6, CXL device not found
CXL: Socket 1 Stack 7, CXL device not found
N0: HBM: MemSizePerStack: 0x100 (64MB), StackValidBitMask: 0xF
N0: Hbm size = 1024
N1: HBM: MemSizePerStack: 0x100 (64MB), StackValidBitMask: 0xF
N1: Hbm size = 1024
Total Hbm size = 2048
N0.C00.D0.R0: ranksize = 200, NVranksize = 0 (rank enabled)
N0.C02.D0.R0: ranksize = 200, NVranksize = 0 (rank enabled)
N0.C04.D0.R0: ranksize = 200, NVranksize = 0 (rank enabled)
N0.C06.D0.R0: ranksize = 200, NVranksize = 0 (rank enabled)
N1.C00.D0.R0: ranksize = 200, NVranksize = 0 (rank enabled)
N1.C02.D0.R0: ranksize = 200, NVranksize = 0 (rank enabled)
N1.C04.D0.R0: ranksize = 200, NVranksize = 0 (rank enabled)
N1.C06.D0.R0: ranksize = 200, NVranksize = 0 (rank enabled)
N0: Total mem size = 2048; mem size = 2048; per size = 0
N1: Total mem size = 4096; mem size = 2048; per size = 0
^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^
Platform DIMM Configuration(num_chunks(chunk_size))
^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^
Socket : 0
Channel : 0 DDR Size : 512(64MB) PMem volatile Size : 0(64MB) PMem non volatile Size : 0(64MB) NVDIMM-N Memory Size : 0(64MB)
Channel : 1 DDR Size : 0(64MB) PMem volatile Size : 0(64MB) PMem non volatile Size : 0(64MB) NVDIMM-N Memory Size : 0(64MB)
Channel : 2 DDR Size : 512(64MB) PMem volatile Size : 0(64MB) PMem non volatile Size : 0(64MB) NVDIMM-N Memory Size : 0(64MB)
Channel : 3 DDR Size : 0(64MB) PMem volatile Size : 0(64MB) PMem non volatile Size : 0(64MB) NVDIMM-N Memory Size : 0(64MB)
Channel : 4 DDR Size : 512(64MB) PMem volatile Size : 0(64MB) PMem non volatile Size : 0(64MB) NVDIMM-N Memory Size : 0(64MB)
Channel : 5 DDR Size : 0(64MB) PMem volatile Size : 0(64MB) PMem non volatile Size : 0(64MB) NVDIMM-N Memory Size : 0(64MB)
Channel : 6 DDR Size : 512(64MB) PMem volatile Size : 0(64MB) PMem non volatile Size : 0(64MB) NVDIMM-N Memory Size : 0(64MB)
Channel : 7 DDR Size : 0(64MB) PMem volatile Size : 0(64MB) PMem non volatile Size : 0(64MB) NVDIMM-N Memory Size : 0(64MB)
Socket : 1
Channel : 0 DDR Size : 512(64MB) PMem volatile Size : 0(64MB) PMem non volatile Size : 0(64MB) NVDIMM-N Memory Size : 0(64MB)
Channel : 1 DDR Size : 0(64MB) PMem volatile Size : 0(64MB) PMem non volatile Size : 0(64MB) NVDIMM-N Memory Size : 0(64MB)
Channel : 2 DDR Size : 512(64MB) PMem volatile Size : 0(64MB) PMem non volatile Size : 0(64MB) NVDIMM-N Memory Size : 0(64MB)
Channel : 3 DDR Size : 0(64MB) PMem volatile Size : 0(64MB) PMem non volatile Size : 0(64MB) NVDIMM-N Memory Size : 0(64MB)
Channel : 4 DDR Size : 512(64MB) PMem volatile Size : 0(64MB) PMem non volatile Size : 0(64MB) NVDIMM-N Memory Size : 0(64MB)
Channel : 5 DDR Size : 0(64MB) PMem volatile Size : 0(64MB) PMem non volatile Size : 0(64MB) NVDIMM-N Memory Size : 0(64MB)
Channel : 6 DDR Size : 512(64MB) PMem volatile Size : 0(64MB) PMem non volatile Size : 0(64MB) NVDIMM-N Memory Size : 0(64MB)
Channel : 7 DDR Size : 0(64MB) PMem volatile Size : 0(64MB) PMem non volatile Size : 0(64MB) NVDIMM-N Memory Size : 0(64MB)
N0: Memory population doesn't support SGX
System Memory Population doesn't support SGX
CollectCpuPrmSizeBitmap BEGIN
CollectCpuPrmSizeBitmap ProtectedMemValidBitMask = 0x000000FFF0000000
tCollectCpuPrmSizeBitmap END
SGX Status 0 PrmrrSize 0
PrmrrCountRequested 8 PrmrrCountPerPackage 4
Value set for Channel Interleave to 3
Value set for Imc Interleave to 4
Checkpoint Code: Socket 0, 0xBB, 0x03, 0x0000
N0: Map 2LM (HBM/DDR)
N0: Map 2LM (HBM/DDR)
N0: Map 2LM (HBM/DDR)
N0: Map 2LM (HBM/DDR)
N0: ClusterId 0 SadCount = 2
N0: ClusterId 1 SadCount = 1
N0: ClusterId 2 SadCount = 1
N0: ClusterId 3 SadCount = 1
N0: Adding NXM at ClusterId 1 SadIndex 17
N0: Adding NXM at ClusterId 2 SadIndex 33
N0: Adding NXM at ClusterId 3 SadIndex 49
N1: Map 2LM (HBM/DDR)
N1: Map 2LM (HBM/DDR)
N1: Map 2LM (HBM/DDR)
N1: Map 2LM (HBM/DDR)
N1: ClusterId 0 SadCount = 1
N1: ClusterId 1 SadCount = 1
N1: ClusterId 2 SadCount = 1
N1: ClusterId 3 SadCount = 1
N0: Not an FPGA Socket
N1: Not an FPGA Socket
N2: Not an FPGA Socket
N3: Not an FPGA Socket
AdjustMemAddrMapForMirror: In the function
N0:
Mirroring population not met
Checkpoint Code: Socket 0, 0xBB, 0x04, 0x0000
HBM: CreateHbmTadRules
Checkpoint Code: Socket 0, 0xBB, 0x05, 0x0000
PMem mgmt Driver is available..
CXL: Socket 0 Stack 0, CXL device not found
CXL: Socket 0 Stack 1, CXL device not found
CXL: Socket 0 Stack 2, CXL device not found
CXL: Socket 0 Stack 3, CXL device not found
CXL: Socket 0 Stack 4, CXL device not found
CXL: Socket 0 Stack 5, CXL device not found
CXL: Socket 0 Stack 6, CXL device not found
CXL: Socket 0 Stack 7, CXL device not found
CXL: Socket 1 Stack 0, CXL device not found
CXL: Socket 1 Stack 1, CXL device not found
CXL: Socket 1 Stack 2, CXL device not found
CXL: Socket 1 Stack 3, CXL device not found
CXL: Socket 1 Stack 4, CXL device not found
CXL: Socket 1 Stack 5, CXL device not found
CXL: Socket 1 Stack 6, CXL device not found
CXL: Socket 1 Stack 7, CXL device not found
N0: HBM: MemSizePerStack: 0x100 (64MB), StackValidBitMask: 0xF
N0: Hbm size = 1024
N1: HBM: MemSizePerStack: 0x100 (64MB), StackValidBitMask: 0xF
N1: Hbm size = 1024
Total Hbm size = 2048
N0.C00.D0.R0: ranksize = 200, NVranksize = 0 (rank enabled)
N0.C02.D0.R0: ranksize = 200, NVranksize = 0 (rank enabled)
N0.C04.D0.R0: ranksize = 200, NVranksize = 0 (rank enabled)
N0.C06.D0.R0: ranksize = 200, NVranksize = 0 (rank enabled)
N1.C00.D0.R0: ranksize = 200, NVranksize = 0 (rank enabled)
N1.C02.D0.R0: ranksize = 200, NVranksize = 0 (rank enabled)
N1.C04.D0.R0: ranksize = 200, NVranksize = 0 (rank enabled)
N1.C06.D0.R0: ranksize = 200, NVranksize = 0 (rank enabled)
N0: Total mem size = 2048; mem size = 2048; per size = 0
N1: Total mem size = 4096; mem size = 2048; per size = 0
N0: Memory population doesn't support SGX
System Memory Population doesn't support SGX
CollectCpuPrmSizeBitmap BEGIN
CollectCpuPrmSizeBitmap ProtectedMemValidBitMask = 0x000000FFF0000000
tCollectCpuPrmSizeBitmap END
SGX Status 0 PrmrrSize 0
PrmrrCountRequested 8 PrmrrCountPerPackage 4
Value set for Channel Interleave to 3
Value set for Imc Interleave to 4
Checkpoint Code: Socket 0, 0xBB, 0x03, 0x0000
N0: Map 2LM (HBM/DDR)
N0: Map 2LM (HBM/DDR)
N0: Map 2LM (HBM/DDR)
N0: Map 2LM (HBM/DDR)
N0: ClusterId 0 SadCount = 2
N0: ClusterId 1 SadCount = 1
N0: ClusterId 2 SadCount = 1
N0: ClusterId 3 SadCount = 1
N0: Adding NXM at ClusterId 1 SadIndex 17
N0: Adding NXM at ClusterId 2 SadIndex 33
N0: Adding NXM at ClusterId 3 SadIndex 49
N1: Map 2LM (HBM/DDR)
N1: Map 2LM (HBM/DDR)
N1: Map 2LM (HBM/DDR)
N1: Map 2LM (HBM/DDR)
N1: ClusterId 0 SadCount = 1
N1: ClusterId 1 SadCount = 1
N1: ClusterId 2 SadCount = 1
N1: ClusterId 3 SadCount = 1
N0: Not an FPGA Socket
N1: Not an FPGA Socket
N2: Not an FPGA Socket
N3: Not an FPGA Socket
AdjustMemAddrMapForMirror: In the function
N0:
Mirroring population not met
Checkpoint Code: Socket 0, 0xBB, 0x04, 0x0000
HBM: CreateHbmTadRules
Checkpoint Code: Socket 0, 0xBB, 0x05, 0x0000
********SAD table for socket 0*******
Type Base Limit Ways McIntBitmap ChIntBitmap[MC00] FmChIntBitmap[MC00] ChIntBitmap[MC01] FmChIntBitmap[MC01] ChIntBitmap[MC02] FmChIntBitmap[MC02] ChIntBitmap[MC03] FmChIntBitmap[MC03] Granularity Tgtgranularity Attr Cluster
HBM 2LM DDR 0x00000 0x00040 1 1 3 1 3 0 3 0 3 0 1 1 3 0
HBM 2LM DDR 0x00040 0x00220 1 1 3 1 3 0 3 0 3 0 1 1 3 0
HBM 2LM DDR 0x00220 0x00420 1 2 3 0 3 1 3 0 3 0 1 1 3 1
NXM 0x00420 0x00420 0 0 0 0 0 0 0 0 0 0 0 0 0 1
HBM 2LM DDR 0x00420 0x00620 1 4 3 0 3 0 3 1 3 0 1 1 3 2
NXM 0x00620 0x00620 0 0 0 0 0 0 0 0 0 0 0 0 0 2
HBM 2LM DDR 0x00620 0x00820 1 8 3 0 3 0 3 0 3 1 1 1 3 3
NXM 0x00820 0x00820 0 0 0 0 0 0 0 0 0 0 0 0 0 3
<<SAD Interleave List>>
1 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0
1 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0
0 1 0 0 0 0 0 0 0 0 0 0 0 0 0 0
0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0
0 0 1 0 0 0 0 0 0 0 0 0 0 0 0 0
0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0
0 0 0 1 0 0 0 0 0 0 0 0 0 0 0 0
0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0
********SAD table for socket 1*******
Type Base Limit Ways McIntBitmap ChIntBitmap[MC00] FmChIntBitmap[MC00] ChIntBitmap[MC01] FmChIntBitmap[MC01] ChIntBitmap[MC02] FmChIntBitmap[MC02] ChIntBitmap[MC03] FmChIntBitmap[MC03] Granularity Tgtgranularity Attr Cluster
HBM 2LM DDR 0x00820 0x00A20 1 1 3 1 3 0 3 0 3 0 1 1 3 0
HBM 2LM DDR 0x00A20 0x00C20 1 2 3 0 3 1 3 0 3 0 1 1 3 1
HBM 2LM DDR 0x00C20 0x00E20 1 4 3 0 3 0 3 1 3 0 1 1 3 2
HBM 2LM DDR 0x00E20 0x01020 1 8 3 0 3 0 3 0 3 1 1 1 3 3
<<SAD Interleave List>>
0 0 0 0 1 0 0 0 0 0 0 0 0 0 0 0
0 0 0 0 0 1 0 0 0 0 0 0 0 0 0 0
0 0 0 0 0 0 1 0 0 0 0 0 0 0 0 0
0 0 0 0 0 0 0 1 0 0 0 0 0 0 0 0
</SADTable>
*******TAD Table for socket 0 Mc 0*******
Enable SadID Limit SktWays TargetGran ChGran NmTadIndex FmTadIndex
1 0 0x00020 1 1 1 0 0
1 1 0x00220 1 1 1 0 0
</TADTable>
*******TAD Table for socket 0 Mc 1*******
Enable SadID Limit SktWays TargetGran ChGran NmTadIndex FmTadIndex
1 16 0x00420 1 1 1 0 0
</TADTable>
*******TAD Table for socket 0 Mc 2*******
Enable SadID Limit SktWays TargetGran ChGran NmTadIndex FmTadIndex
1 32 0x00620 1 1 1 0 0
</TADTable>
*******TAD Table for socket 0 Mc 3*******
Enable SadID Limit SktWays TargetGran ChGran NmTadIndex FmTadIndex
1 48 0x00820 1 1 1 0 0
</TADTable>
*******TAD Table for Socket 0 Stack 0*******
Enable SadID Limit SktWays TargetGran ChGran
1 0 0x00000 1 1 1
</TADTable>
*******TAD Table for Socket 0 Stack 1*******
Enable SadID Limit SktWays TargetGran ChGran
1 16 0x00000 1 1 1
</TADTable>
*******TAD Table for Socket 0 Stack 2*******
Enable SadID Limit SktWays TargetGran ChGran
1 32 0x00000 1 1 1
</TADTable>
*******TAD Table for Socket 0 Stack 3*******
Enable SadID Limit SktWays TargetGran ChGran
1 48 0x00000 1 1 1
</TADTable>
*******TAD Table for socket 1 Mc 0*******
Enable SadID Limit SktWays TargetGran ChGran NmTadIndex FmTadIndex
1 0 0x00A20 1 1 1 0 0
</TADTable>
*******TAD Table for socket 1 Mc 1*******
Enable SadID Limit SktWays TargetGran ChGran NmTadIndex FmTadIndex
1 16 0x00C20 1 1 1 0 0
</TADTable>
*******TAD Table for socket 1 Mc 2*******
Enable SadID Limit SktWays TargetGran ChGran NmTadIndex FmTadIndex
1 32 0x00E20 1 1 1 0 0
</TADTable>
*******TAD Table for socket 1 Mc 3*******
Enable SadID Limit SktWays TargetGran ChGran NmTadIndex FmTadIndex
1 48 0x01020 1 1 1 0 0
</TADTable>
*******TAD Table for Socket 1 Stack 0*******
Enable SadID Limit SktWays TargetGran ChGran
1 0 0x00000 1 1 1
</TADTable>
*******TAD Table for Socket 1 Stack 1*******
Enable SadID Limit SktWays TargetGran ChGran
1 16 0x00000 1 1 1
</TADTable>
*******TAD Table for Socket 1 Stack 2*******
Enable SadID Limit SktWays TargetGran ChGran
1 32 0x00000 1 1 1
</TADTable>
*******TAD Table for Socket 1 Stack 3*******
Enable SadID Limit SktWays TargetGran ChGran
1 48 0x00000 1 1 1
</TADTable>
Checkpoint Code: Socket 0, 0xBB, 0x06, 0x0000
^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^
Write CHA Remote SAD CSRs for Socket: 0
^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^
En Base Limit NodeId Attr
1 0x00820 0x0101F 0x1 0x3
^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^
Write CHA SAD CSRs for Socket: 0
^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^
CHA unlock DRAM cluster 0 snc_lock bits: 0xE
Program Channel Interleaves
rt0_interleave_mode: 7
rt1_interleave_shift: 7
rt2_interleave_shift: 2
Program CSRs for SAD Rule 0 (HBM 2LM DDR)
En Limit Mode Attr NMCacheable
1 0x0003F 0x1 0x3 1
Interleave List: 0x0000000088888888
Single Target: H0 Index 0
DRAM_RULE_CFG2: cxl_accelerator_mem Durable_mem_en cxl_mem_expander NXM
0 0 0 0
TgtRt: 00 ChnRt: 00
Program CSRs for SAD Rule 1 (HBM 2LM DDR)
En Limit Mode Attr NMCacheable
1 0x0021F 0x1 0x3 1
Interleave List: 0x0000000088888888
Single Target: H0 Index 0
DRAM_RULE_CFG2: cxl_accelerator_mem Durable_mem_en cxl_mem_expander NXM
0 0 0 0
TgtRt: 00 ChnRt: 00
Program target config: 00000000
Program channel config: 00000000
Program Mode config.
H0 DramRt0Mode0Cfg: 00000036
H0 DramRt0Mode1Cfg: 00000000
H1 DramRt0Mode0Cfg: 00000000
H1 DramRt0Mode1Cfg: 00000000
H0 DramRt1Mode0Cfg: 00000000
H0 DramRt1Mode1Cfg: 00000000
H1 DramRt1Mode0Cfg: 00000000
H1 DramRt1Mode1Cfg: 00000000
H0 DramRt2Mode0Cfg: 00000000
H0 DramRt2Mode1Cfg: 00000000
H1 DramRt2Mode0Cfg: 00000000
H1 DramRt2Mode1Cfg: 00000000
CHA unlock DRAM cluster 1 snc_lock bits: 0xD
Program Channel Interleaves
rt0_interleave_mode: 7
rt1_interleave_shift: 7
rt2_interleave_shift: 2
Program CSRs for SAD Rule 0 (HBM 2LM DDR)
En Limit Mode Attr NMCacheable
1 0x0041F 0x1 0x3 1
Interleave List: 0x0000000088888888
Single Target: H0 Index 0
DRAM_RULE_CFG2: cxl_accelerator_mem Durable_mem_en cxl_mem_expander NXM
0 0 0 0
TgtRt: 00 ChnRt: 00
Program CSRs for SAD Rule 1 (NXM)
En Limit Mode Attr NMCacheable
1 0x0041F 0x0 0x0 0
Interleave List: 0xFFFFFFFFFFFFFFFF
DRAM_RULE_CFG2: cxl_accelerator_mem Durable_mem_en cxl_mem_expander NXM
0 0 0 1
Program target config: 00000000
Program channel config: 00000000
Program Mode config.
H0 DramRt0Mode0Cfg: 00000006
H0 DramRt0Mode1Cfg: 00000000
H1 DramRt0Mode0Cfg: 00000000
H1 DramRt0Mode1Cfg: 00000000
H0 DramRt1Mode0Cfg: 00000000
H0 DramRt1Mode1Cfg: 00000000
H1 DramRt1Mode0Cfg: 00000000
H1 DramRt1Mode1Cfg: 00000000
H0 DramRt2Mode0Cfg: 00000000
H0 DramRt2Mode1Cfg: 00000000
H1 DramRt2Mode0Cfg: 00000000
H1 DramRt2Mode1Cfg: 00000000
CHA unlock DRAM cluster 2 snc_lock bits: 0xB
Program Channel Interleaves
rt0_interleave_mode: 7
rt1_interleave_shift: 7
rt2_interleave_shift: 2
Program CSRs for SAD Rule 0 (HBM 2LM DDR)
En Limit Mode Attr NMCacheable
1 0x0061F 0x1 0x3 1
Interleave List: 0x0000000088888888
Single Target: H0 Index 0
DRAM_RULE_CFG2: cxl_accelerator_mem Durable_mem_en cxl_mem_expander NXM
0 0 0 0
TgtRt: 00 ChnRt: 00
Program CSRs for SAD Rule 1 (NXM)
En Limit Mode Attr NMCacheable
1 0x0061F 0x0 0x0 0
Interleave List: 0xFFFFFFFFFFFFFFFF
DRAM_RULE_CFG2: cxl_accelerator_mem Durable_mem_en cxl_mem_expander NXM
0 0 0 1
Program target config: 00000000
Program channel config: 00000000
Program Mode config.
H0 DramRt0Mode0Cfg: 00000006
H0 DramRt0Mode1Cfg: 00000000
H1 DramRt0Mode0Cfg: 00000000
H1 DramRt0Mode1Cfg: 00000000
H0 DramRt1Mode0Cfg: 00000000
H0 DramRt1Mode1Cfg: 00000000
H1 DramRt1Mode0Cfg: 00000000
H1 DramRt1Mode1Cfg: 00000000
H0 DramRt2Mode0Cfg: 00000000
H0 DramRt2Mode1Cfg: 00000000
H1 DramRt2Mode0Cfg: 00000000
H1 DramRt2Mode1Cfg: 00000000
CHA unlock DRAM cluster 3 snc_lock bits: 0x7
Program Channel Interleaves
rt0_interleave_mode: 7
rt1_interleave_shift: 7
rt2_interleave_shift: 2
Program CSRs for SAD Rule 0 (HBM 2LM DDR)
En Limit Mode Attr NMCacheable
1 0x0081F 0x1 0x3 1
Interleave List: 0x0000000088888888
Single Target: H0 Index 0
DRAM_RULE_CFG2: cxl_accelerator_mem Durable_mem_en cxl_mem_expander NXM
0 0 0 0
TgtRt: 00 ChnRt: 00
Program CSRs for SAD Rule 1 (NXM)
En Limit Mode Attr NMCacheable
1 0x0081F 0x0 0x0 0
Interleave List: 0xFFFFFFFFFFFFFFFF
DRAM_RULE_CFG2: cxl_accelerator_mem Durable_mem_en cxl_mem_expander NXM
0 0 0 1
Program target config: 00000000
Program channel config: 00000000
Program Mode config.
H0 DramRt0Mode0Cfg: 00000006
H0 DramRt0Mode1Cfg: 00000000
H1 DramRt0Mode0Cfg: 00000000
H1 DramRt0Mode1Cfg: 00000000
H0 DramRt1Mode0Cfg: 00000000
H0 DramRt1Mode1Cfg: 00000000
H1 DramRt1Mode0Cfg: 00000000
H1 DramRt1Mode1Cfg: 00000000
H0 DramRt2Mode0Cfg: 00000000
H0 DramRt2Mode1Cfg: 00000000
H1 DramRt2Mode0Cfg: 00000000
H1 DramRt2Mode1Cfg: 00000000
CHA lock all DRAM clusters snc_lock bits: 0xF
^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^
Write Route Table CSRs for Socket: 0
^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^
CSR: Cluster 0 H0_CH_ROUTE_TABLE_0 - 0x0 0x1 0x0 0x1 0x0 0x1 0x0 0x1
CSR: Cluster 0 H0_TGT_ROUTE_TABLE_0 - 0x4 0x4 0x5 0x5 0x6 0x6 0x7 0x7
CSR: Cluster 0 H1_CH_ROUTE_TABLE_0 - 0x0 0x0 0x0 0x0 0x0 0x0 0x0 0x0
CSR: Cluster 0 H1_TGT_ROUTE_TABLE_0 - 0x0 0x0 0x0 0x0 0x0 0x0 0x0 0x0
CSR: Cluster 1 H0_CH_ROUTE_TABLE_0 - 0x0 0x1 0x0 0x1 0x0 0x1 0x0 0x1
CSR: Cluster 1 H0_TGT_ROUTE_TABLE_0 - 0x4 0x4 0x5 0x5 0x6 0x6 0x7 0x7
CSR: Cluster 1 H1_CH_ROUTE_TABLE_0 - 0x0 0x0 0x0 0x0 0x0 0x0 0x0 0x0
CSR: Cluster 1 H1_TGT_ROUTE_TABLE_0 - 0x0 0x0 0x0 0x0 0x0 0x0 0x0 0x0
CSR: Cluster 2 H0_CH_ROUTE_TABLE_0 - 0x0 0x1 0x0 0x1 0x0 0x1 0x0 0x1
CSR: Cluster 2 H0_TGT_ROUTE_TABLE_0 - 0x7 0x7 0x6 0x6 0x5 0x5 0x4 0x4
CSR: Cluster 2 H1_CH_ROUTE_TABLE_0 - 0x0 0x0 0x0 0x0 0x0 0x0 0x0 0x0
CSR: Cluster 2 H1_TGT_ROUTE_TABLE_0 - 0x0 0x0 0x0 0x0 0x0 0x0 0x0 0x0
CSR: Cluster 3 H0_CH_ROUTE_TABLE_0 - 0x0 0x1 0x0 0x1 0x0 0x1 0x0 0x1
CSR: Cluster 3 H0_TGT_ROUTE_TABLE_0 - 0x7 0x7 0x6 0x6 0x5 0x5 0x4 0x4
CSR: Cluster 3 H1_CH_ROUTE_TABLE_0 - 0x0 0x0 0x0 0x0 0x0 0x0 0x0 0x0
CSR: Cluster 3 H1_TGT_ROUTE_TABLE_0 - 0x0 0x0 0x0 0x0 0x0 0x0 0x0 0x0
^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^
Write MESH2MEM CSRs for Socket: 0
^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^
Memory Controller : 0
------------------------
DEFEATURES0_M2MEM_MAIN_REG
wrcmpfromnm: 1
MODE_M2MEM_MAIN_REG
nmcaching:0x1 pmem:0x0 blockregion:0x0 in-tile caching: 0x1
Memory Controller : 1
------------------------
DEFEATURES0_M2MEM_MAIN_REG
wrcmpfromnm: 1
MODE_M2MEM_MAIN_REG
nmcaching:0x1 pmem:0x0 blockregion:0x0 in-tile caching: 0x1
Memory Controller : 2
------------------------
DEFEATURES0_M2MEM_MAIN_REG
wrcmpfromnm: 1
MODE_M2MEM_MAIN_REG
nmcaching:0x1 pmem:0x0 blockregion:0x0 in-tile caching: 0x1
Memory Controller : 3
------------------------
DEFEATURES0_M2MEM_MAIN_REG
wrcmpfromnm: 1
MODE_M2MEM_MAIN_REG
nmcaching:0x1 pmem:0x0 blockregion:0x0 in-tile caching: 0x1
MC: 0
tadid:0x0 tadvld:0x1 pmemvld:0x0 blkvld:0x0 ddr4tadid:0x0 ddrttadid:0x0 ddr4:0x1 nmcacheablevld:0x0 mirror:0x0 secondary1st:0x0 frcnpwr:0x0 spare:0x0 addresslimit[51:26]:0x1F nonpersistentfm:0x1
MC: 0
tadid:0x1 tadvld:0x1 pmemvld:0x0 blkvld:0x0 ddr4tadid:0x1 ddrttadid:0x0 ddr4:0x1 nmcacheablevld:0x0 mirror:0x0 secondary1st:0x0 frcnpwr:0x0 spare:0x0 addresslimit[51:26]:0x21F nonpersistentfm:0x1
MC: 1
tadid:0x0 tadvld:0x1 pmemvld:0x0 blkvld:0x0 ddr4tadid:0x0 ddrttadid:0x0 ddr4:0x1 nmcacheablevld:0x0 mirror:0x0 secondary1st:0x0 frcnpwr:0x0 spare:0x0 addresslimit[51:26]:0x41F nonpersistentfm:0x1
MC: 2
tadid:0x0 tadvld:0x1 pmemvld:0x0 blkvld:0x0 ddr4tadid:0x0 ddrttadid:0x0 ddr4:0x1 nmcacheablevld:0x0 mirror:0x0 secondary1st:0x0 frcnpwr:0x0 spare:0x0 addresslimit[51:26]:0x61F nonpersistentfm:0x1
MC: 3
tadid:0x0 tadvld:0x1 pmemvld:0x0 blkvld:0x0 ddr4tadid:0x0 ddrttadid:0x0 ddr4:0x1 nmcacheablevld:0x0 mirror:0x0 secondary1st:0x0 frcnpwr:0x0 spare:0x0 addresslimit[51:26]:0x81F nonpersistentfm:0x1
Programs feature registers for MC 0
Programs feature registers for MC 1
Programs feature registers for MC 2
Programs feature registers for MC 3
^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^
Write HBM MESH2MEM CSRs for Socket: 0
^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^
HBM Stack: 0
Mesh2Mem misc: nmcaching: 1 wrcmpfromnm: 1
Mesh2Mem TAD: tadid:0x0 ddrtadid:0x0 nmcacheablevld:0x1 addresslimit[51:26]:0x21F
HBM Stack: 1
Mesh2Mem misc: nmcaching: 1 wrcmpfromnm: 1
Mesh2Mem TAD: tadid:0x0 ddrtadid:0x0 nmcacheablevld:0x1 addresslimit[51:26]:0x41F
HBM Stack: 2
Mesh2Mem misc: nmcaching: 1 wrcmpfromnm: 1
Mesh2Mem TAD: tadid:0x0 ddrtadid:0x0 nmcacheablevld:0x1 addresslimit[51:26]:0x61F
HBM Stack: 3
Mesh2Mem misc: nmcaching: 1 wrcmpfromnm: 1
Mesh2Mem TAD: tadid:0x0 ddrtadid:0x0 nmcacheablevld:0x1 addresslimit[51:26]:0x81F
Programs feature registers for MC 0
N0.C00: CSR : SYSFEATURES0_MC_2LM_REG: 0x10
N0.C01: CSR : SYSFEATURES0_MC_2LM_REG: 0x10
Programs feature registers for MC 1
N0.C00: CSR : SYSFEATURES0_MC_2LM_REG: 0x10
N0.C01: CSR : SYSFEATURES0_MC_2LM_REG: 0x10
Programs feature registers for MC 2
N0.C00: CSR : SYSFEATURES0_MC_2LM_REG: 0x10
N0.C01: CSR : SYSFEATURES0_MC_2LM_REG: 0x10
Programs feature registers for MC 3
N0.C00: CSR : SYSFEATURES0_MC_2LM_REG: 0x10
N0.C01: CSR : SYSFEATURES0_MC_2LM_REG: 0x10
Programs feature registers for MC 4
N0.C00: CSR : SYSFEATURES0_MC_2LM_REG: 0x10
N0.C01: CSR : SYSFEATURES0_MC_2LM_REG: 0x10
Programs feature registers for MC 5
N0.C00: CSR : SYSFEATURES0_MC_2LM_REG: 0x10
N0.C01: CSR : SYSFEATURES0_MC_2LM_REG: 0x10
Programs feature registers for MC 6
N0.C00: CSR : SYSFEATURES0_MC_2LM_REG: 0x10
N0.C01: CSR : SYSFEATURES0_MC_2LM_REG: 0x10
Programs feature registers for MC 7
N0.C00: CSR : SYSFEATURES0_MC_2LM_REG: 0x10
N0.C01: CSR : SYSFEATURES0_MC_2LM_REG: 0x10
Programs feature registers for MC 8
N0.C00: CSR : SYSFEATURES0_MC_2LM_REG: 0x10
N0.C01: CSR : SYSFEATURES0_MC_2LM_REG: 0x10
Programs feature registers for MC 9
N0.C00: CSR : SYSFEATURES0_MC_2LM_REG: 0x10
N0.C01: CSR : SYSFEATURES0_MC_2LM_REG: 0x10
Programs feature registers for MC 10
N0.C00: CSR : SYSFEATURES0_MC_2LM_REG: 0x10
N0.C01: CSR : SYSFEATURES0_MC_2LM_REG: 0x10
Programs feature registers for MC 11
N0.C00: CSR : SYSFEATURES0_MC_2LM_REG: 0x10
N0.C01: CSR : SYSFEATURES0_MC_2LM_REG: 0x10
Programs feature registers for MC 12
N0.C00: CSR : SYSFEATURES0_MC_2LM_REG: 0x10
N0.C01: CSR : SYSFEATURES0_MC_2LM_REG: 0x10
Programs feature registers for MC 13
N0.C00: CSR : SYSFEATURES0_MC_2LM_REG: 0x10
N0.C01: CSR : SYSFEATURES0_MC_2LM_REG: 0x10
Programs feature registers for MC 14
N0.C00: CSR : SYSFEATURES0_MC_2LM_REG: 0x10
N0.C01: CSR : SYSFEATURES0_MC_2LM_REG: 0x10
Programs feature registers for MC 15
N0.C00: CSR : SYSFEATURES0_MC_2LM_REG: 0x10
N0.C01: CSR : SYSFEATURES0_MC_2LM_REG: 0x10
Checkpoint Code: Socket 0, 0xBB, 0x07, 0x0000
^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^
Write TAD CSRs for Socket: 0
^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^
Write Patrol and Sparing CSR's for MC 0
C00: TADWAYNESS[0]:
target_lid: 0 chn_lid: 0 tad_limit: 0x1F
C00: TADBASE[0]:
mirror_en: 0 en_failover: 0 ign_ptrl_uc: 0 base: 0x0
C00: TADWAYNESS[1]:
target_lid: 0 chn_lid: 0 tad_limit: 0x21F
C00: TADBASE[1]:
mirror_en: 0 en_failover: 0 ign_ptrl_uc: 0 base: 0x40
NM_DRAM_RULE[0]:
rule_enable: 1 limit: 0x3F nm_chn_ways: 0 nm_chn_gran: 1 nm_target_ways: 0 nm_gran_eq: 0 nm_chn_l2pid: 0x00FFFFF8
Logical Ch Id: 0 1 2 3 4 5 6 7
Physical Ch Id: 0 7 7 7 7 7 7 7
C00: NM_DRAM_RULE[0]:
NM_DRAM_RULE[1]:
rule_enable: 1 limit: 0x21F nm_chn_ways: 0 nm_chn_gran: 1 nm_target_ways: 0 nm_gran_eq: 0 nm_chn_l2pid: 0x00FFFFF8
Logical Ch Id: 0 1 2 3 4 5 6 7
Physical Ch Id: 0 7 7 7 7 7 7 7
C00: NM_DRAM_RULE[1]:
Write 1LM Decoder CSR's for MC 0
C00: TADCHNILVOFFSET[0]:
target_ways: 0 chn_ways: 0 target_gran: 1 chn_gran: 1 tad_offset: 0x0 tad_offset_sign: 0
C00: TADCHNILVOFFSET[1]:
target_ways: 0 chn_ways: 0 target_gran: 1 chn_gran: 1 tad_offset: 0x20 tad_offset_sign: 0
C00: MCNMCACHINGCFG:
mcnmcachingenb: 0 mcpmemenb: 0 mcnmcachingpmemwt: 0
C01: MCNMCACHINGCFG:
mcnmcachingenb: 0 mcpmemenb: 0 mcnmcachingpmemwt: 0
Write Patrol and Sparing CSR's for MC 1
C00: TADWAYNESS[0]:
target_lid: 0 chn_lid: 0 tad_limit: 0x41F
C00: TADBASE[0]:
mirror_en: 0 en_failover: 0 ign_ptrl_uc: 0 base: 0x220
NM_DRAM_RULE[0]:
rule_enable: 1 limit: 0x41F nm_chn_ways: 0 nm_chn_gran: 1 nm_target_ways: 0 nm_gran_eq: 0 nm_chn_l2pid: 0x00FFFFF8
Logical Ch Id: 0 1 2 3 4 5 6 7
Physical Ch Id: 0 7 7 7 7 7 7 7
C00: NM_DRAM_RULE[0]:
Write 1LM Decoder CSR's for MC 1
C00: TADCHNILVOFFSET[0]:
target_ways: 0 chn_ways: 0 target_gran: 1 chn_gran: 1 tad_offset: 0x220 tad_offset_sign: 0
C00: MCNMCACHINGCFG:
mcnmcachingenb: 0 mcpmemenb: 0 mcnmcachingpmemwt: 0
C01: MCNMCACHINGCFG:
mcnmcachingenb: 0 mcpmemenb: 0 mcnmcachingpmemwt: 0
Write Patrol and Sparing CSR's for MC 2
C00: TADWAYNESS[0]:
target_lid: 0 chn_lid: 0 tad_limit: 0x61F
C00: TADBASE[0]:
mirror_en: 0 en_failover: 0 ign_ptrl_uc: 0 base: 0x420
NM_DRAM_RULE[0]:
rule_enable: 1 limit: 0x61F nm_chn_ways: 0 nm_chn_gran: 1 nm_target_ways: 0 nm_gran_eq: 0 nm_chn_l2pid: 0x00FFFFF8
Logical Ch Id: 0 1 2 3 4 5 6 7
Physical Ch Id: 0 7 7 7 7 7 7 7
C00: NM_DRAM_RULE[0]:
Write 1LM Decoder CSR's for MC 2
C00: TADCHNILVOFFSET[0]:
target_ways: 0 chn_ways: 0 target_gran: 1 chn_gran: 1 tad_offset: 0x420 tad_offset_sign: 0
C00: MCNMCACHINGCFG:
mcnmcachingenb: 0 mcpmemenb: 0 mcnmcachingpmemwt: 0
C01: MCNMCACHINGCFG:
mcnmcachingenb: 0 mcpmemenb: 0 mcnmcachingpmemwt: 0
Write Patrol and Sparing CSR's for MC 3
C00: TADWAYNESS[0]:
target_lid: 0 chn_lid: 0 tad_limit: 0x81F
C00: TADBASE[0]:
mirror_en: 0 en_failover: 0 ign_ptrl_uc: 0 base: 0x620
NM_DRAM_RULE[0]:
rule_enable: 1 limit: 0x81F nm_chn_ways: 0 nm_chn_gran: 1 nm_target_ways: 0 nm_gran_eq: 0 nm_chn_l2pid: 0x00FFFFF8
Logical Ch Id: 0 1 2 3 4 5 6 7
Physical Ch Id: 0 7 7 7 7 7 7 7
C00: NM_DRAM_RULE[0]:
Write 1LM Decoder CSR's for MC 3
C00: TADCHNILVOFFSET[0]:
target_ways: 0 chn_ways: 0 target_gran: 1 chn_gran: 1 tad_offset: 0x620 tad_offset_sign: 0
C00: MCNMCACHINGCFG:
mcnmcachingenb: 0 mcpmemenb: 0 mcnmcachingpmemwt: 0
C01: MCNMCACHINGCFG:
mcnmcachingenb: 0 mcpmemenb: 0 mcnmcachingpmemwt: 0
Write Patrol and Sparing TAD range CSR's for HBM Stack 0 MC 0
C00: TADWAYNESS[0]:
target_lid: 0 chn_lid: 0 tad_limit: 0x1F
C00: TADBASE[0]:
mirror_en: 0 en_failover: 0 ign_ptrl_uc: 0 base: 0x0
C01: TADWAYNESS[0]:
target_lid: 0 chn_lid: 1 tad_limit: 0x1F
C01: TADBASE[0]:
mirror_en: 0 en_failover: 0 ign_ptrl_uc: 0 base: 0x0
Write Patrol and Sparing TAD range CSR's for HBM Stack 0 MC 1
C00: TADWAYNESS[0]:
target_lid: 0 chn_lid: 2 tad_limit: 0x1F
C00: TADBASE[0]:
mirror_en: 0 en_failover: 0 ign_ptrl_uc: 0 base: 0x0
C01: TADWAYNESS[0]:
target_lid: 0 chn_lid: 3 tad_limit: 0x1F
C01: TADBASE[0]:
mirror_en: 0 en_failover: 0 ign_ptrl_uc: 0 base: 0x0
Write Patrol and Sparing TAD range CSR's for HBM Stack 0 MC 2
C00: TADWAYNESS[0]:
target_lid: 0 chn_lid: 4 tad_limit: 0x1F
C00: TADBASE[0]:
mirror_en: 0 en_failover: 0 ign_ptrl_uc: 0 base: 0x0
C01: TADWAYNESS[0]:
target_lid: 0 chn_lid: 5 tad_limit: 0x1F
C01: TADBASE[0]:
mirror_en: 0 en_failover: 0 ign_ptrl_uc: 0 base: 0x0
Write Patrol and Sparing TAD range CSR's for HBM Stack 0 MC 3
C00: TADWAYNESS[0]:
target_lid: 0 chn_lid: 6 tad_limit: 0x1F
C00: TADBASE[0]:
mirror_en: 0 en_failover: 0 ign_ptrl_uc: 0 base: 0x0
C01: TADWAYNESS[0]:
target_lid: 0 chn_lid: 7 tad_limit: 0x1F
C01: TADBASE[0]:
mirror_en: 0 en_failover: 0 ign_ptrl_uc: 0 base: 0x0
Write Hbm Nm Caching Tad CSR's for HBM Stack 0 MC 0
C00: MCNMCACHINGCFG 2LM TAD:
nmcachingtaden: 1 nmcachingtad: 0
C01: MCNMCACHINGCFG 2LM TAD:
nmcachingtaden: 1 nmcachingtad: 0
Write Hbm Nm Caching Tad CSR's for HBM Stack 0 MC 1
C00: MCNMCACHINGCFG 2LM TAD:
nmcachingtaden: 1 nmcachingtad: 0
C01: MCNMCACHINGCFG 2LM TAD:
nmcachingtaden: 1 nmcachingtad: 0
Write Hbm Nm Caching Tad CSR's for HBM Stack 0 MC 2
C00: MCNMCACHINGCFG 2LM TAD:
nmcachingtaden: 1 nmcachingtad: 0
C01: MCNMCACHINGCFG 2LM TAD:
nmcachingtaden: 1 nmcachingtad: 0
Write Hbm Nm Caching Tad CSR's for HBM Stack 0 MC 3
C00: MCNMCACHINGCFG 2LM TAD:
nmcachingtaden: 1 nmcachingtad: 0
C01: MCNMCACHINGCFG 2LM TAD:
nmcachingtaden: 1 nmcachingtad: 0
Write 1LM Decoder CSR's for HBM Stack 0 MC 0
C00: TADCHNILVOFFSET[0]:
target_ways: 0 chn_ways: 0 target_gran: 1 chn_gran: 1 tad_offset: 0x0 tad_offset_sign: 0
C01: TADCHNILVOFFSET[0]:
target_ways: 0 chn_ways: 0 target_gran: 1 chn_gran: 1 tad_offset: 0x0 tad_offset_sign: 0
Write 1LM Decoder CSR's for HBM Stack 0 MC 1
C00: TADCHNILVOFFSET[0]:
target_ways: 0 chn_ways: 0 target_gran: 1 chn_gran: 1 tad_offset: 0x0 tad_offset_sign: 0
C01: TADCHNILVOFFSET[0]:
target_ways: 0 chn_ways: 0 target_gran: 1 chn_gran: 1 tad_offset: 0x0 tad_offset_sign: 0
Write 1LM Decoder CSR's for HBM Stack 0 MC 2
C00: TADCHNILVOFFSET[0]:
target_ways: 0 chn_ways: 0 target_gran: 1 chn_gran: 1 tad_offset: 0x0 tad_offset_sign: 0
C01: TADCHNILVOFFSET[0]:
target_ways: 0 chn_ways: 0 target_gran: 1 chn_gran: 1 tad_offset: 0x0 tad_offset_sign: 0
Write 1LM Decoder CSR's for HBM Stack 0 MC 3
C00: TADCHNILVOFFSET[0]:
target_ways: 0 chn_ways: 0 target_gran: 1 chn_gran: 1 tad_offset: 0x0 tad_offset_sign: 0
C01: TADCHNILVOFFSET[0]:
target_ways: 0 chn_ways: 0 target_gran: 1 chn_gran: 1 tad_offset: 0x0 tad_offset_sign: 0
Write MCNMCACHINGCFG for HBM Stack 0 MC 0
C00: MCNMCACHINGCFG:
mcnmcachingenb: 1 mcpmemenb: 0 mcnmcachingpmemwt: 0
C01: MCNMCACHINGCFG:
mcnmcachingenb: 1 mcpmemenb: 0 mcnmcachingpmemwt: 0
Write MCNMCACHINGCFG for HBM Stack 0 MC 1
C00: MCNMCACHINGCFG:
mcnmcachingenb: 1 mcpmemenb: 0 mcnmcachingpmemwt: 0
C01: MCNMCACHINGCFG:
mcnmcachingenb: 1 mcpmemenb: 0 mcnmcachingpmemwt: 0
Write MCNMCACHINGCFG for HBM Stack 0 MC 2
C00: MCNMCACHINGCFG:
mcnmcachingenb: 1 mcpmemenb: 0 mcnmcachingpmemwt: 0
C01: MCNMCACHINGCFG:
mcnmcachingenb: 1 mcpmemenb: 0 mcnmcachingpmemwt: 0
Write MCNMCACHINGCFG for HBM Stack 0 MC 3
C00: MCNMCACHINGCFG:
mcnmcachingenb: 1 mcpmemenb: 0 mcnmcachingpmemwt: 0
C01: MCNMCACHINGCFG:
mcnmcachingenb: 1 mcpmemenb: 0 mcnmcachingpmemwt: 0
Write 2LM NM Decoder CSR's for HBM Stack 0 MC 0
C00: MCNMCACHINGINTLV:
nm_target_ways: 0 nm_chn_ways: 3 nm_target_lid: 0 nm_target_gran: 1 nm_chn_gran: 1 nm_chn_lid: 0
C00: MCNMCACHINGCFG_MC_2LM_REG:
en_2way: 0 prefer_way_sel: 0 chn_cap: 0xB nm_ratio_chn_cap: 0
C00: MCNMCACHINGOFFSET:
mcnmcachingoffsetlower: 0x0 mcnmcachingoffset: 0x0 mcnmcachingoffseten: 0
C01: MCNMCACHINGINTLV:
nm_target_ways: 0 nm_chn_ways: 3 nm_target_lid: 0 nm_target_gran: 1 nm_chn_gran: 1 nm_chn_lid: 1
C01: MCNMCACHINGCFG_MC_2LM_REG:
en_2way: 0 prefer_way_sel: 0 chn_cap: 0xB nm_ratio_chn_cap: 0
C01: MCNMCACHINGOFFSET:
mcnmcachingoffsetlower: 0x0 mcnmcachingoffset: 0x0 mcnmcachingoffseten: 0
Write 2LM NM Decoder CSR's for HBM Stack 0 MC 1
C00: MCNMCACHINGINTLV:
nm_target_ways: 0 nm_chn_ways: 3 nm_target_lid: 0 nm_target_gran: 1 nm_chn_gran: 1 nm_chn_lid: 2
C00: MCNMCACHINGCFG_MC_2LM_REG:
en_2way: 0 prefer_way_sel: 0 chn_cap: 0xB nm_ratio_chn_cap: 0
C00: MCNMCACHINGOFFSET:
mcnmcachingoffsetlower: 0x0 mcnmcachingoffset: 0x0 mcnmcachingoffseten: 0
C01: MCNMCACHINGINTLV:
nm_target_ways: 0 nm_chn_ways: 3 nm_target_lid: 0 nm_target_gran: 1 nm_chn_gran: 1 nm_chn_lid: 3
C01: MCNMCACHINGCFG_MC_2LM_REG:
en_2way: 0 prefer_way_sel: 0 chn_cap: 0xB nm_ratio_chn_cap: 0
C01: MCNMCACHINGOFFSET:
mcnmcachingoffsetlower: 0x0 mcnmcachingoffset: 0x0 mcnmcachingoffseten: 0
Write 2LM NM Decoder CSR's for HBM Stack 0 MC 2
C00: MCNMCACHINGINTLV:
nm_target_ways: 0 nm_chn_ways: 3 nm_target_lid: 0 nm_target_gran: 1 nm_chn_gran: 1 nm_chn_lid: 4
C00: MCNMCACHINGCFG_MC_2LM_REG:
en_2way: 0 prefer_way_sel: 0 chn_cap: 0xB nm_ratio_chn_cap: 0
C00: MCNMCACHINGOFFSET:
mcnmcachingoffsetlower: 0x0 mcnmcachingoffset: 0x0 mcnmcachingoffseten: 0
C01: MCNMCACHINGINTLV:
nm_target_ways: 0 nm_chn_ways: 3 nm_target_lid: 0 nm_target_gran: 1 nm_chn_gran: 1 nm_chn_lid: 5
C01: MCNMCACHINGCFG_MC_2LM_REG:
en_2way: 0 prefer_way_sel: 0 chn_cap: 0xB nm_ratio_chn_cap: 0
C01: MCNMCACHINGOFFSET:
mcnmcachingoffsetlower: 0x0 mcnmcachingoffset: 0x0 mcnmcachingoffseten: 0
Write 2LM NM Decoder CSR's for HBM Stack 0 MC 3
C00: MCNMCACHINGINTLV:
nm_target_ways: 0 nm_chn_ways: 3 nm_target_lid: 0 nm_target_gran: 1 nm_chn_gran: 1 nm_chn_lid: 6
C00: MCNMCACHINGCFG_MC_2LM_REG:
en_2way: 0 prefer_way_sel: 0 chn_cap: 0xB nm_ratio_chn_cap: 0
C00: MCNMCACHINGOFFSET:
mcnmcachingoffsetlower: 0x0 mcnmcachingoffset: 0x0 mcnmcachingoffseten: 0
C01: MCNMCACHINGINTLV:
nm_target_ways: 0 nm_chn_ways: 3 nm_target_lid: 0 nm_target_gran: 1 nm_chn_gran: 1 nm_chn_lid: 7
C01: MCNMCACHINGCFG_MC_2LM_REG:
en_2way: 0 prefer_way_sel: 0 chn_cap: 0xB nm_ratio_chn_cap: 0
C01: MCNMCACHINGOFFSET:
mcnmcachingoffsetlower: 0x0 mcnmcachingoffset: 0x0 mcnmcachingoffseten: 0
Write 2LM FM Decoder CSR's for HBM Stack 0 MC 0 TAD 0
C00: DRAM_RULE[0]:
rule_enable: 1 limit: 0x3F fm_target: 0 fm_chn_ways: 0 fm_chn_gran: 1 fm_target_ways: 0 fm_gran_eq: 0 fm_chn_l2pid: 0x00000000
C01: DRAM_RULE[0]:
rule_enable: 1 limit: 0x3F fm_target: 0 fm_chn_ways: 0 fm_chn_gran: 1 fm_target_ways: 0 fm_gran_eq: 0 fm_chn_l2pid: 0x00000000
Write 2LM FM Decoder CSR's for HBM Stack 0 MC 1 TAD 0
C00: DRAM_RULE[0]:
rule_enable: 1 limit: 0x3F fm_target: 0 fm_chn_ways: 0 fm_chn_gran: 1 fm_target_ways: 0 fm_gran_eq: 0 fm_chn_l2pid: 0x00000000
C01: DRAM_RULE[0]:
rule_enable: 1 limit: 0x3F fm_target: 0 fm_chn_ways: 0 fm_chn_gran: 1 fm_target_ways: 0 fm_gran_eq: 0 fm_chn_l2pid: 0x00000000
Write 2LM FM Decoder CSR's for HBM Stack 0 MC 2 TAD 0
C00: DRAM_RULE[0]:
rule_enable: 1 limit: 0x3F fm_target: 0 fm_chn_ways: 0 fm_chn_gran: 1 fm_target_ways: 0 fm_gran_eq: 0 fm_chn_l2pid: 0x00000000
C01: DRAM_RULE[0]:
rule_enable: 1 limit: 0x3F fm_target: 0 fm_chn_ways: 0 fm_chn_gran: 1 fm_target_ways: 0 fm_gran_eq: 0 fm_chn_l2pid: 0x00000000
Write 2LM FM Decoder CSR's for HBM Stack 0 MC 3 TAD 0
C00: DRAM_RULE[0]:
rule_enable: 1 limit: 0x3F fm_target: 0 fm_chn_ways: 0 fm_chn_gran: 1 fm_target_ways: 0 fm_gran_eq: 0 fm_chn_l2pid: 0x00000000
C01: DRAM_RULE[0]:
rule_enable: 1 limit: 0x3F fm_target: 0 fm_chn_ways: 0 fm_chn_gran: 1 fm_target_ways: 0 fm_gran_eq: 0 fm_chn_l2pid: 0x00000000
Write 2LM FM Decoder CSR's for HBM Stack 0 MC 0 TAD 1
C00: DRAM_RULE[1]:
rule_enable: 1 limit: 0x21F fm_target: 0 fm_chn_ways: 0 fm_chn_gran: 1 fm_target_ways: 0 fm_gran_eq: 0 fm_chn_l2pid: 0x00000000
C01: DRAM_RULE[1]:
rule_enable: 1 limit: 0x21F fm_target: 0 fm_chn_ways: 0 fm_chn_gran: 1 fm_target_ways: 0 fm_gran_eq: 0 fm_chn_l2pid: 0x00000000
Write 2LM FM Decoder CSR's for HBM Stack 0 MC 1 TAD 1
C00: DRAM_RULE[1]:
rule_enable: 1 limit: 0x21F fm_target: 0 fm_chn_ways: 0 fm_chn_gran: 1 fm_target_ways: 0 fm_gran_eq: 0 fm_chn_l2pid: 0x00000000
C01: DRAM_RULE[1]:
rule_enable: 1 limit: 0x21F fm_target: 0 fm_chn_ways: 0 fm_chn_gran: 1 fm_target_ways: 0 fm_gran_eq: 0 fm_chn_l2pid: 0x00000000
Write 2LM FM Decoder CSR's for HBM Stack 0 MC 2 TAD 1
C00: DRAM_RULE[1]:
rule_enable: 1 limit: 0x21F fm_target: 0 fm_chn_ways: 0 fm_chn_gran: 1 fm_target_ways: 0 fm_gran_eq: 0 fm_chn_l2pid: 0x00000000
C01: DRAM_RULE[1]:
rule_enable: 1 limit: 0x21F fm_target: 0 fm_chn_ways: 0 fm_chn_gran: 1 fm_target_ways: 0 fm_gran_eq: 0 fm_chn_l2pid: 0x00000000
Write 2LM FM Decoder CSR's for HBM Stack 0 MC 3 TAD 1
C00: DRAM_RULE[1]:
rule_enable: 1 limit: 0x21F fm_target: 0 fm_chn_ways: 0 fm_chn_gran: 1 fm_target_ways: 0 fm_gran_eq: 0 fm_chn_l2pid: 0x00000000
C01: DRAM_RULE[1]:
rule_enable: 1 limit: 0x21F fm_target: 0 fm_chn_ways: 0 fm_chn_gran: 1 fm_target_ways: 0 fm_gran_eq: 0 fm_chn_l2pid: 0x00000000
Write Patrol and Sparing TAD range CSR's for HBM Stack 1 MC 0
C00: TADWAYNESS[0]:
target_lid: 0 chn_lid: 0 tad_limit: 0x1F
C00: TADBASE[0]:
mirror_en: 0 en_failover: 0 ign_ptrl_uc: 0 base: 0x0
C01: TADWAYNESS[0]:
target_lid: 0 chn_lid: 1 tad_limit: 0x1F
C01: TADBASE[0]:
mirror_en: 0 en_failover: 0 ign_ptrl_uc: 0 base: 0x0
Write Patrol and Sparing TAD range CSR's for HBM Stack 1 MC 1
C00: TADWAYNESS[0]:
target_lid: 0 chn_lid: 2 tad_limit: 0x1F
C00: TADBASE[0]:
mirror_en: 0 en_failover: 0 ign_ptrl_uc: 0 base: 0x0
C01: TADWAYNESS[0]:
target_lid: 0 chn_lid: 3 tad_limit: 0x1F
C01: TADBASE[0]:
mirror_en: 0 en_failover: 0 ign_ptrl_uc: 0 base: 0x0
Write Patrol and Sparing TAD range CSR's for HBM Stack 1 MC 2
C00: TADWAYNESS[0]:
target_lid: 0 chn_lid: 4 tad_limit: 0x1F
C00: TADBASE[0]:
mirror_en: 0 en_failover: 0 ign_ptrl_uc: 0 base: 0x0
C01: TADWAYNESS[0]:
target_lid: 0 chn_lid: 5 tad_limit: 0x1F
C01: TADBASE[0]:
mirror_en: 0 en_failover: 0 ign_ptrl_uc: 0 base: 0x0
Write Patrol and Sparing TAD range CSR's for HBM Stack 1 MC 3
C00: TADWAYNESS[0]:
target_lid: 0 chn_lid: 6 tad_limit: 0x1F
C00: TADBASE[0]:
mirror_en: 0 en_failover: 0 ign_ptrl_uc: 0 base: 0x0
C01: TADWAYNESS[0]:
target_lid: 0 chn_lid: 7 tad_limit: 0x1F
C01: TADBASE[0]:
mirror_en: 0 en_failover: 0 ign_ptrl_uc: 0 base: 0x0
Write Hbm Nm Caching Tad CSR's for HBM Stack 1 MC 0
C00: MCNMCACHINGCFG 2LM TAD:
nmcachingtaden: 1 nmcachingtad: 0
C01: MCNMCACHINGCFG 2LM TAD:
nmcachingtaden: 1 nmcachingtad: 0
Write Hbm Nm Caching Tad CSR's for HBM Stack 1 MC 1
C00: MCNMCACHINGCFG 2LM TAD:
nmcachingtaden: 1 nmcachingtad: 0
C01: MCNMCACHINGCFG 2LM TAD:
nmcachingtaden: 1 nmcachingtad: 0
Write Hbm Nm Caching Tad CSR's for HBM Stack 1 MC 2
C00: MCNMCACHINGCFG 2LM TAD:
nmcachingtaden: 1 nmcachingtad: 0
C01: MCNMCACHINGCFG 2LM TAD:
nmcachingtaden: 1 nmcachingtad: 0
Write Hbm Nm Caching Tad CSR's for HBM Stack 1 MC 3
C00: MCNMCACHINGCFG 2LM TAD:
nmcachingtaden: 1 nmcachingtad: 0
C01: MCNMCACHINGCFG 2LM TAD:
nmcachingtaden: 1 nmcachingtad: 0
Write 1LM Decoder CSR's for HBM Stack 1 MC 0
C00: TADCHNILVOFFSET[0]:
target_ways: 0 chn_ways: 0 target_gran: 1 chn_gran: 1 tad_offset: 0x0 tad_offset_sign: 0
C01: TADCHNILVOFFSET[0]:
target_ways: 0 chn_ways: 0 target_gran: 1 chn_gran: 1 tad_offset: 0x0 tad_offset_sign: 0
Write 1LM Decoder CSR's for HBM Stack 1 MC 1
C00: TADCHNILVOFFSET[0]:
target_ways: 0 chn_ways: 0 target_gran: 1 chn_gran: 1 tad_offset: 0x0 tad_offset_sign: 0
C01: TADCHNILVOFFSET[0]:
target_ways: 0 chn_ways: 0 target_gran: 1 chn_gran: 1 tad_offset: 0x0 tad_offset_sign: 0
Write 1LM Decoder CSR's for HBM Stack 1 MC 2
C00: TADCHNILVOFFSET[0]:
target_ways: 0 chn_ways: 0 target_gran: 1 chn_gran: 1 tad_offset: 0x0 tad_offset_sign: 0
C01: TADCHNILVOFFSET[0]:
target_ways: 0 chn_ways: 0 target_gran: 1 chn_gran: 1 tad_offset: 0x0 tad_offset_sign: 0
Write 1LM Decoder CSR's for HBM Stack 1 MC 3
C00: TADCHNILVOFFSET[0]:
target_ways: 0 chn_ways: 0 target_gran: 1 chn_gran: 1 tad_offset: 0x0 tad_offset_sign: 0
C01: TADCHNILVOFFSET[0]:
target_ways: 0 chn_ways: 0 target_gran: 1 chn_gran: 1 tad_offset: 0x0 tad_offset_sign: 0
Write MCNMCACHINGCFG for HBM Stack 1 MC 0
C00: MCNMCACHINGCFG:
mcnmcachingenb: 1 mcpmemenb: 0 mcnmcachingpmemwt: 0
C01: MCNMCACHINGCFG:
mcnmcachingenb: 1 mcpmemenb: 0 mcnmcachingpmemwt: 0
Write MCNMCACHINGCFG for HBM Stack 1 MC 1
C00: MCNMCACHINGCFG:
mcnmcachingenb: 1 mcpmemenb: 0 mcnmcachingpmemwt: 0
C01: MCNMCACHINGCFG:
mcnmcachingenb: 1 mcpmemenb: 0 mcnmcachingpmemwt: 0
Write MCNMCACHINGCFG for HBM Stack 1 MC 2
C00: MCNMCACHINGCFG:
mcnmcachingenb: 1 mcpmemenb: 0 mcnmcachingpmemwt: 0
C01: MCNMCACHINGCFG:
mcnmcachingenb: 1 mcpmemenb: 0 mcnmcachingpmemwt: 0
Write MCNMCACHINGCFG for HBM Stack 1 MC 3
C00: MCNMCACHINGCFG:
mcnmcachingenb: 1 mcpmemenb: 0 mcnmcachingpmemwt: 0
C01: MCNMCACHINGCFG:
mcnmcachingenb: 1 mcpmemenb: 0 mcnmcachingpmemwt: 0
Write 2LM NM Decoder CSR's for HBM Stack 1 MC 0
C00: CSR for force_lat bit : AMAP_MC_MAIN_REG: 0x52
C00: MCNMCACHINGINTLV:
nm_target_ways: 0 nm_chn_ways: 3 nm_target_lid: 0 nm_target_gran: 1 nm_chn_gran: 1 nm_chn_lid: 0
C00: MCNMCACHINGCFG_MC_2LM_REG:
en_2way: 0 prefer_way_sel: 0 chn_cap: 0xB nm_ratio_chn_cap: 0
C00: MCNMCACHINGOFFSET:
mcnmcachingoffsetlower: 0x2 mcnmcachingoffset: 0x1 mcnmcachingoffseten: 1
C01: CSR for force_lat bit : AMAP_MC_MAIN_REG: 0x52
C01: MCNMCACHINGINTLV:
nm_target_ways: 0 nm_chn_ways: 3 nm_target_lid: 0 nm_target_gran: 1 nm_chn_gran: 1 nm_chn_lid: 1
C01: MCNMCACHINGCFG_MC_2LM_REG:
en_2way: 0 prefer_way_sel: 0 chn_cap: 0xB nm_ratio_chn_cap: 0
C01: MCNMCACHINGOFFSET:
mcnmcachingoffsetlower: 0x2 mcnmcachingoffset: 0x1 mcnmcachingoffseten: 1
Write 2LM NM Decoder CSR's for HBM Stack 1 MC 1
C00: CSR for force_lat bit : AMAP_MC_MAIN_REG: 0x52
C00: MCNMCACHINGINTLV:
nm_target_ways: 0 nm_chn_ways: 3 nm_target_lid: 0 nm_target_gran: 1 nm_chn_gran: 1 nm_chn_lid: 2
C00: MCNMCACHINGCFG_MC_2LM_REG:
en_2way: 0 prefer_way_sel: 0 chn_cap: 0xB nm_ratio_chn_cap: 0
C00: MCNMCACHINGOFFSET:
mcnmcachingoffsetlower: 0x2 mcnmcachingoffset: 0x1 mcnmcachingoffseten: 1
C01: CSR for force_lat bit : AMAP_MC_MAIN_REG: 0x52
C01: MCNMCACHINGINTLV:
nm_target_ways: 0 nm_chn_ways: 3 nm_target_lid: 0 nm_target_gran: 1 nm_chn_gran: 1 nm_chn_lid: 3
C01: MCNMCACHINGCFG_MC_2LM_REG:
en_2way: 0 prefer_way_sel: 0 chn_cap: 0xB nm_ratio_chn_cap: 0
C01: MCNMCACHINGOFFSET:
mcnmcachingoffsetlower: 0x2 mcnmcachingoffset: 0x1 mcnmcachingoffseten: 1
Write 2LM NM Decoder CSR's for HBM Stack 1 MC 2
C00: CSR for force_lat bit : AMAP_MC_MAIN_REG: 0x52
C00: MCNMCACHINGINTLV:
nm_target_ways: 0 nm_chn_ways: 3 nm_target_lid: 0 nm_target_gran: 1 nm_chn_gran: 1 nm_chn_lid: 4
C00: MCNMCACHINGCFG_MC_2LM_REG:
en_2way: 0 prefer_way_sel: 0 chn_cap: 0xB nm_ratio_chn_cap: 0
C00: MCNMCACHINGOFFSET:
mcnmcachingoffsetlower: 0x2 mcnmcachingoffset: 0x1 mcnmcachingoffseten: 1
C01: CSR for force_lat bit : AMAP_MC_MAIN_REG: 0x52
C01: MCNMCACHINGINTLV:
nm_target_ways: 0 nm_chn_ways: 3 nm_target_lid: 0 nm_target_gran: 1 nm_chn_gran: 1 nm_chn_lid: 5
C01: MCNMCACHINGCFG_MC_2LM_REG:
en_2way: 0 prefer_way_sel: 0 chn_cap: 0xB nm_ratio_chn_cap: 0
C01: MCNMCACHINGOFFSET:
mcnmcachingoffsetlower: 0x2 mcnmcachingoffset: 0x1 mcnmcachingoffseten: 1
Write 2LM NM Decoder CSR's for HBM Stack 1 MC 3
C00: CSR for force_lat bit : AMAP_MC_MAIN_REG: 0x52
C00: MCNMCACHINGINTLV:
nm_target_ways: 0 nm_chn_ways: 3 nm_target_lid: 0 nm_target_gran: 1 nm_chn_gran: 1 nm_chn_lid: 6
C00: MCNMCACHINGCFG_MC_2LM_REG:
en_2way: 0 prefer_way_sel: 0 chn_cap: 0xB nm_ratio_chn_cap: 0
C00: MCNMCACHINGOFFSET:
mcnmcachingoffsetlower: 0x2 mcnmcachingoffset: 0x1 mcnmcachingoffseten: 1
C01: CSR for force_lat bit : AMAP_MC_MAIN_REG: 0x52
C01: MCNMCACHINGINTLV:
nm_target_ways: 0 nm_chn_ways: 3 nm_target_lid: 0 nm_target_gran: 1 nm_chn_gran: 1 nm_chn_lid: 7
C01: MCNMCACHINGCFG_MC_2LM_REG:
en_2way: 0 prefer_way_sel: 0 chn_cap: 0xB nm_ratio_chn_cap: 0
C01: MCNMCACHINGOFFSET:
mcnmcachingoffsetlower: 0x2 mcnmcachingoffset: 0x1 mcnmcachingoffseten: 1
Write 2LM FM Decoder CSR's for HBM Stack 1 MC 0 TAD 0
C00: DRAM_RULE[0]:
rule_enable: 1 limit: 0x41F fm_target: 0 fm_chn_ways: 0 fm_chn_gran: 1 fm_target_ways: 0 fm_gran_eq: 0 fm_chn_l2pid: 0x00000000
C01: DRAM_RULE[0]:
rule_enable: 1 limit: 0x41F fm_target: 0 fm_chn_ways: 0 fm_chn_gran: 1 fm_target_ways: 0 fm_gran_eq: 0 fm_chn_l2pid: 0x00000000
Write 2LM FM Decoder CSR's for HBM Stack 1 MC 1 TAD 0
C00: DRAM_RULE[0]:
rule_enable: 1 limit: 0x41F fm_target: 0 fm_chn_ways: 0 fm_chn_gran: 1 fm_target_ways: 0 fm_gran_eq: 0 fm_chn_l2pid: 0x00000000
C01: DRAM_RULE[0]:
rule_enable: 1 limit: 0x41F fm_target: 0 fm_chn_ways: 0 fm_chn_gran: 1 fm_target_ways: 0 fm_gran_eq: 0 fm_chn_l2pid: 0x00000000
Write 2LM FM Decoder CSR's for HBM Stack 1 MC 2 TAD 0
C00: DRAM_RULE[0]:
rule_enable: 1 limit: 0x41F fm_target: 0 fm_chn_ways: 0 fm_chn_gran: 1 fm_target_ways: 0 fm_gran_eq: 0 fm_chn_l2pid: 0x00000000
C01: DRAM_RULE[0]:
rule_enable: 1 limit: 0x41F fm_target: 0 fm_chn_ways: 0 fm_chn_gran: 1 fm_target_ways: 0 fm_gran_eq: 0 fm_chn_l2pid: 0x00000000
Write 2LM FM Decoder CSR's for HBM Stack 1 MC 3 TAD 0
C00: DRAM_RULE[0]:
rule_enable: 1 limit: 0x41F fm_target: 0 fm_chn_ways: 0 fm_chn_gran: 1 fm_target_ways: 0 fm_gran_eq: 0 fm_chn_l2pid: 0x00000000
C01: DRAM_RULE[0]:
rule_enable: 1 limit: 0x41F fm_target: 0 fm_chn_ways: 0 fm_chn_gran: 1 fm_target_ways: 0 fm_gran_eq: 0 fm_chn_l2pid: 0x00000000
Write Patrol and Sparing TAD range CSR's for HBM Stack 2 MC 0
C00: TADWAYNESS[0]:
target_lid: 0 chn_lid: 0 tad_limit: 0x1F
C00: TADBASE[0]:
mirror_en: 0 en_failover: 0 ign_ptrl_uc: 0 base: 0x0
C01: TADWAYNESS[0]:
target_lid: 0 chn_lid: 1 tad_limit: 0x1F
C01: TADBASE[0]:
mirror_en: 0 en_failover: 0 ign_ptrl_uc: 0 base: 0x0
Write Patrol and Sparing TAD range CSR's for HBM Stack 2 MC 1
C00: TADWAYNESS[0]:
target_lid: 0 chn_lid: 2 tad_limit: 0x1F
C00: TADBASE[0]:
mirror_en: 0 en_failover: 0 ign_ptrl_uc: 0 base: 0x0
C01: TADWAYNESS[0]:
target_lid: 0 chn_lid: 3 tad_limit: 0x1F
C01: TADBASE[0]:
mirror_en: 0 en_failover: 0 ign_ptrl_uc: 0 base: 0x0
Write Patrol and Sparing TAD range CSR's for HBM Stack 2 MC 2
C00: TADWAYNESS[0]:
target_lid: 0 chn_lid: 4 tad_limit: 0x1F
C00: TADBASE[0]:
mirror_en: 0 en_failover: 0 ign_ptrl_uc: 0 base: 0x0
C01: TADWAYNESS[0]:
target_lid: 0 chn_lid: 5 tad_limit: 0x1F
C01: TADBASE[0]:
mirror_en: 0 en_failover: 0 ign_ptrl_uc: 0 base: 0x0
Write Patrol and Sparing TAD range CSR's for HBM Stack 2 MC 3
C00: TADWAYNESS[0]:
target_lid: 0 chn_lid: 6 tad_limit: 0x1F
C00: TADBASE[0]:
mirror_en: 0 en_failover: 0 ign_ptrl_uc: 0 base: 0x0
C01: TADWAYNESS[0]:
target_lid: 0 chn_lid: 7 tad_limit: 0x1F
C01: TADBASE[0]:
mirror_en: 0 en_failover: 0 ign_ptrl_uc: 0 base: 0x0
Write Hbm Nm Caching Tad CSR's for HBM Stack 2 MC 0
C00: MCNMCACHINGCFG 2LM TAD:
nmcachingtaden: 1 nmcachingtad: 0
C01: MCNMCACHINGCFG 2LM TAD:
nmcachingtaden: 1 nmcachingtad: 0
Write Hbm Nm Caching Tad CSR's for HBM Stack 2 MC 1
C00: MCNMCACHINGCFG 2LM TAD:
nmcachingtaden: 1 nmcachingtad: 0
C01: MCNMCACHINGCFG 2LM TAD:
nmcachingtaden: 1 nmcachingtad: 0
Write Hbm Nm Caching Tad CSR's for HBM Stack 2 MC 2
C00: MCNMCACHINGCFG 2LM TAD:
nmcachingtaden: 1 nmcachingtad: 0
C01: MCNMCACHINGCFG 2LM TAD:
nmcachingtaden: 1 nmcachingtad: 0
Write Hbm Nm Caching Tad CSR's for HBM Stack 2 MC 3
C00: MCNMCACHINGCFG 2LM TAD:
nmcachingtaden: 1 nmcachingtad: 0
C01: MCNMCACHINGCFG 2LM TAD:
nmcachingtaden: 1 nmcachingtad: 0
Write 1LM Decoder CSR's for HBM Stack 2 MC 0
C00: TADCHNILVOFFSET[0]:
target_ways: 0 chn_ways: 0 target_gran: 1 chn_gran: 1 tad_offset: 0x0 tad_offset_sign: 0
C01: TADCHNILVOFFSET[0]:
target_ways: 0 chn_ways: 0 target_gran: 1 chn_gran: 1 tad_offset: 0x0 tad_offset_sign: 0
Write 1LM Decoder CSR's for HBM Stack 2 MC 1
C00: TADCHNILVOFFSET[0]:
target_ways: 0 chn_ways: 0 target_gran: 1 chn_gran: 1 tad_offset: 0x0 tad_offset_sign: 0
C01: TADCHNILVOFFSET[0]:
target_ways: 0 chn_ways: 0 target_gran: 1 chn_gran: 1 tad_offset: 0x0 tad_offset_sign: 0
Write 1LM Decoder CSR's for HBM Stack 2 MC 2
C00: TADCHNILVOFFSET[0]:
target_ways: 0 chn_ways: 0 target_gran: 1 chn_gran: 1 tad_offset: 0x0 tad_offset_sign: 0
C01: TADCHNILVOFFSET[0]:
target_ways: 0 chn_ways: 0 target_gran: 1 chn_gran: 1 tad_offset: 0x0 tad_offset_sign: 0
Write 1LM Decoder CSR's for HBM Stack 2 MC 3
C00: TADCHNILVOFFSET[0]:
target_ways: 0 chn_ways: 0 target_gran: 1 chn_gran: 1 tad_offset: 0x0 tad_offset_sign: 0
C01: TADCHNILVOFFSET[0]:
target_ways: 0 chn_ways: 0 target_gran: 1 chn_gran: 1 tad_offset: 0x0 tad_offset_sign: 0
Write MCNMCACHINGCFG for HBM Stack 2 MC 0
C00: MCNMCACHINGCFG:
mcnmcachingenb: 1 mcpmemenb: 0 mcnmcachingpmemwt: 0
C01: MCNMCACHINGCFG:
mcnmcachingenb: 1 mcpmemenb: 0 mcnmcachingpmemwt: 0
Write MCNMCACHINGCFG for HBM Stack 2 MC 1
C00: MCNMCACHINGCFG:
mcnmcachingenb: 1 mcpmemenb: 0 mcnmcachingpmemwt: 0
C01: MCNMCACHINGCFG:
mcnmcachingenb: 1 mcpmemenb: 0 mcnmcachingpmemwt: 0
Write MCNMCACHINGCFG for HBM Stack 2 MC 2
C00: MCNMCACHINGCFG:
mcnmcachingenb: 1 mcpmemenb: 0 mcnmcachingpmemwt: 0
C01: MCNMCACHINGCFG:
mcnmcachingenb: 1 mcpmemenb: 0 mcnmcachingpmemwt: 0
Write MCNMCACHINGCFG for HBM Stack 2 MC 3
C00: MCNMCACHINGCFG:
mcnmcachingenb: 1 mcpmemenb: 0 mcnmcachingpmemwt: 0
C01: MCNMCACHINGCFG:
mcnmcachingenb: 1 mcpmemenb: 0 mcnmcachingpmemwt: 0
Write 2LM NM Decoder CSR's for HBM Stack 2 MC 0
C00: CSR for force_lat bit : AMAP_MC_MAIN_REG: 0x52
C00: MCNMCACHINGINTLV:
nm_target_ways: 0 nm_chn_ways: 3 nm_target_lid: 0 nm_target_gran: 1 nm_chn_gran: 1 nm_chn_lid: 0
C00: MCNMCACHINGCFG_MC_2LM_REG:
en_2way: 0 prefer_way_sel: 0 chn_cap: 0xB nm_ratio_chn_cap: 0
C00: MCNMCACHINGOFFSET:
mcnmcachingoffsetlower: 0x2 mcnmcachingoffset: 0x2 mcnmcachingoffseten: 1
C01: CSR for force_lat bit : AMAP_MC_MAIN_REG: 0x52
C01: MCNMCACHINGINTLV:
nm_target_ways: 0 nm_chn_ways: 3 nm_target_lid: 0 nm_target_gran: 1 nm_chn_gran: 1 nm_chn_lid: 1
C01: MCNMCACHINGCFG_MC_2LM_REG:
en_2way: 0 prefer_way_sel: 0 chn_cap: 0xB nm_ratio_chn_cap: 0
C01: MCNMCACHINGOFFSET:
mcnmcachingoffsetlower: 0x2 mcnmcachingoffset: 0x2 mcnmcachingoffseten: 1
Write 2LM NM Decoder CSR's for HBM Stack 2 MC 1
C00: CSR for force_lat bit : AMAP_MC_MAIN_REG: 0x52
C00: MCNMCACHINGINTLV:
nm_target_ways: 0 nm_chn_ways: 3 nm_target_lid: 0 nm_target_gran: 1 nm_chn_gran: 1 nm_chn_lid: 2
C00: MCNMCACHINGCFG_MC_2LM_REG:
en_2way: 0 prefer_way_sel: 0 chn_cap: 0xB nm_ratio_chn_cap: 0
C00: MCNMCACHINGOFFSET:
mcnmcachingoffsetlower: 0x2 mcnmcachingoffset: 0x2 mcnmcachingoffseten: 1
C01: CSR for force_lat bit : AMAP_MC_MAIN_REG: 0x52
C01: MCNMCACHINGINTLV:
nm_target_ways: 0 nm_chn_ways: 3 nm_target_lid: 0 nm_target_gran: 1 nm_chn_gran: 1 nm_chn_lid: 3
C01: MCNMCACHINGCFG_MC_2LM_REG:
en_2way: 0 prefer_way_sel: 0 chn_cap: 0xB nm_ratio_chn_cap: 0
C01: MCNMCACHINGOFFSET:
mcnmcachingoffsetlower: 0x2 mcnmcachingoffset: 0x2 mcnmcachingoffseten: 1
Write 2LM NM Decoder CSR's for HBM Stack 2 MC 2
C00: CSR for force_lat bit : AMAP_MC_MAIN_REG: 0x52
C00: MCNMCACHINGINTLV:
nm_target_ways: 0 nm_chn_ways: 3 nm_target_lid: 0 nm_target_gran: 1 nm_chn_gran: 1 nm_chn_lid: 4
C00: MCNMCACHINGCFG_MC_2LM_REG:
en_2way: 0 prefer_way_sel: 0 chn_cap: 0xB nm_ratio_chn_cap: 0
C00: MCNMCACHINGOFFSET:
mcnmcachingoffsetlower: 0x2 mcnmcachingoffset: 0x2 mcnmcachingoffseten: 1
C01: CSR for force_lat bit : AMAP_MC_MAIN_REG: 0x52
C01: MCNMCACHINGINTLV:
nm_target_ways: 0 nm_chn_ways: 3 nm_target_lid: 0 nm_target_gran: 1 nm_chn_gran: 1 nm_chn_lid: 5
C01: MCNMCACHINGCFG_MC_2LM_REG:
en_2way: 0 prefer_way_sel: 0 chn_cap: 0xB nm_ratio_chn_cap: 0
C01: MCNMCACHINGOFFSET:
mcnmcachingoffsetlower: 0x2 mcnmcachingoffset: 0x2 mcnmcachingoffseten: 1
Write 2LM NM Decoder CSR's for HBM Stack 2 MC 3
C00: CSR for force_lat bit : AMAP_MC_MAIN_REG: 0x52
C00: MCNMCACHINGINTLV:
nm_target_ways: 0 nm_chn_ways: 3 nm_target_lid: 0 nm_target_gran: 1 nm_chn_gran: 1 nm_chn_lid: 6
C00: MCNMCACHINGCFG_MC_2LM_REG:
en_2way: 0 prefer_way_sel: 0 chn_cap: 0xB nm_ratio_chn_cap: 0
C00: MCNMCACHINGOFFSET:
mcnmcachingoffsetlower: 0x2 mcnmcachingoffset: 0x2 mcnmcachingoffseten: 1
C01: CSR for force_lat bit : AMAP_MC_MAIN_REG: 0x52
C01: MCNMCACHINGINTLV:
nm_target_ways: 0 nm_chn_ways: 3 nm_target_lid: 0 nm_target_gran: 1 nm_chn_gran: 1 nm_chn_lid: 7
C01: MCNMCACHINGCFG_MC_2LM_REG:
en_2way: 0 prefer_way_sel: 0 chn_cap: 0xB nm_ratio_chn_cap: 0
C01: MCNMCACHINGOFFSET:
mcnmcachingoffsetlower: 0x2 mcnmcachingoffset: 0x2 mcnmcachingoffseten: 1
Write 2LM FM Decoder CSR's for HBM Stack 2 MC 0 TAD 0
C00: DRAM_RULE[0]:
rule_enable: 1 limit: 0x61F fm_target: 0 fm_chn_ways: 0 fm_chn_gran: 1 fm_target_ways: 0 fm_gran_eq: 0 fm_chn_l2pid: 0x00000000
C01: DRAM_RULE[0]:
rule_enable: 1 limit: 0x61F fm_target: 0 fm_chn_ways: 0 fm_chn_gran: 1 fm_target_ways: 0 fm_gran_eq: 0 fm_chn_l2pid: 0x00000000
Write 2LM FM Decoder CSR's for HBM Stack 2 MC 1 TAD 0
C00: DRAM_RULE[0]:
rule_enable: 1 limit: 0x61F fm_target: 0 fm_chn_ways: 0 fm_chn_gran: 1 fm_target_ways: 0 fm_gran_eq: 0 fm_chn_l2pid: 0x00000000
C01: DRAM_RULE[0]:
rule_enable: 1 limit: 0x61F fm_target: 0 fm_chn_ways: 0 fm_chn_gran: 1 fm_target_ways: 0 fm_gran_eq: 0 fm_chn_l2pid: 0x00000000
Write 2LM FM Decoder CSR's for HBM Stack 2 MC 2 TAD 0
C00: DRAM_RULE[0]:
rule_enable: 1 limit: 0x61F fm_target: 0 fm_chn_ways: 0 fm_chn_gran: 1 fm_target_ways: 0 fm_gran_eq: 0 fm_chn_l2pid: 0x00000000
C01: DRAM_RULE[0]:
rule_enable: 1 limit: 0x61F fm_target: 0 fm_chn_ways: 0 fm_chn_gran: 1 fm_target_ways: 0 fm_gran_eq: 0 fm_chn_l2pid: 0x00000000
Write 2LM FM Decoder CSR's for HBM Stack 2 MC 3 TAD 0
C00: DRAM_RULE[0]:
rule_enable: 1 limit: 0x61F fm_target: 0 fm_chn_ways: 0 fm_chn_gran: 1 fm_target_ways: 0 fm_gran_eq: 0 fm_chn_l2pid: 0x00000000
C01: DRAM_RULE[0]:
rule_enable: 1 limit: 0x61F fm_target: 0 fm_chn_ways: 0 fm_chn_gran: 1 fm_target_ways: 0 fm_gran_eq: 0 fm_chn_l2pid: 0x00000000
Write Patrol and Sparing TAD range CSR's for HBM Stack 3 MC 0
C00: TADWAYNESS[0]:
target_lid: 0 chn_lid: 0 tad_limit: 0x1F
C00: TADBASE[0]:
mirror_en: 0 en_failover: 0 ign_ptrl_uc: 0 base: 0x0
C01: TADWAYNESS[0]:
target_lid: 0 chn_lid: 1 tad_limit: 0x1F
C01: TADBASE[0]:
mirror_en: 0 en_failover: 0 ign_ptrl_uc: 0 base: 0x0
Write Patrol and Sparing TAD range CSR's for HBM Stack 3 MC 1
C00: TADWAYNESS[0]:
target_lid: 0 chn_lid: 2 tad_limit: 0x1F
C00: TADBASE[0]:
mirror_en: 0 en_failover: 0 ign_ptrl_uc: 0 base: 0x0
C01: TADWAYNESS[0]:
target_lid: 0 chn_lid: 3 tad_limit: 0x1F
C01: TADBASE[0]:
mirror_en: 0 en_failover: 0 ign_ptrl_uc: 0 base: 0x0
Write Patrol and Sparing TAD range CSR's for HBM Stack 3 MC 2
C00: TADWAYNESS[0]:
target_lid: 0 chn_lid: 4 tad_limit: 0x1F
C00: TADBASE[0]:
mirror_en: 0 en_failover: 0 ign_ptrl_uc: 0 base: 0x0
C01: TADWAYNESS[0]:
target_lid: 0 chn_lid: 5 tad_limit: 0x1F
C01: TADBASE[0]:
mirror_en: 0 en_failover: 0 ign_ptrl_uc: 0 base: 0x0
Write Patrol and Sparing TAD range CSR's for HBM Stack 3 MC 3
C00: TADWAYNESS[0]:
target_lid: 0 chn_lid: 6 tad_limit: 0x1F
C00: TADBASE[0]:
mirror_en: 0 en_failover: 0 ign_ptrl_uc: 0 base: 0x0
C01: TADWAYNESS[0]:
target_lid: 0 chn_lid: 7 tad_limit: 0x1F
C01: TADBASE[0]:
mirror_en: 0 en_failover: 0 ign_ptrl_uc: 0 base: 0x0
Write Hbm Nm Caching Tad CSR's for HBM Stack 3 MC 0
C00: MCNMCACHINGCFG 2LM TAD:
nmcachingtaden: 1 nmcachingtad: 0
C01: MCNMCACHINGCFG 2LM TAD:
nmcachingtaden: 1 nmcachingtad: 0
Write Hbm Nm Caching Tad CSR's for HBM Stack 3 MC 1
C00: MCNMCACHINGCFG 2LM TAD:
nmcachingtaden: 1 nmcachingtad: 0
C01: MCNMCACHINGCFG 2LM TAD:
nmcachingtaden: 1 nmcachingtad: 0
Write Hbm Nm Caching Tad CSR's for HBM Stack 3 MC 2
C00: MCNMCACHINGCFG 2LM TAD:
nmcachingtaden: 1 nmcachingtad: 0
C01: MCNMCACHINGCFG 2LM TAD:
nmcachingtaden: 1 nmcachingtad: 0
Write Hbm Nm Caching Tad CSR's for HBM Stack 3 MC 3
C00: MCNMCACHINGCFG 2LM TAD:
nmcachingtaden: 1 nmcachingtad: 0
C01: MCNMCACHINGCFG 2LM TAD:
nmcachingtaden: 1 nmcachingtad: 0
Write 1LM Decoder CSR's for HBM Stack 3 MC 0
C00: TADCHNILVOFFSET[0]:
target_ways: 0 chn_ways: 0 target_gran: 1 chn_gran: 1 tad_offset: 0x0 tad_offset_sign: 0
C01: TADCHNILVOFFSET[0]:
target_ways: 0 chn_ways: 0 target_gran: 1 chn_gran: 1 tad_offset: 0x0 tad_offset_sign: 0
Write 1LM Decoder CSR's for HBM Stack 3 MC 1
C00: TADCHNILVOFFSET[0]:
target_ways: 0 chn_ways: 0 target_gran: 1 chn_gran: 1 tad_offset: 0x0 tad_offset_sign: 0
C01: TADCHNILVOFFSET[0]:
target_ways: 0 chn_ways: 0 target_gran: 1 chn_gran: 1 tad_offset: 0x0 tad_offset_sign: 0
Write 1LM Decoder CSR's for HBM Stack 3 MC 2
C00: TADCHNILVOFFSET[0]:
target_ways: 0 chn_ways: 0 target_gran: 1 chn_gran: 1 tad_offset: 0x0 tad_offset_sign: 0
C01: TADCHNILVOFFSET[0]:
target_ways: 0 chn_ways: 0 target_gran: 1 chn_gran: 1 tad_offset: 0x0 tad_offset_sign: 0
Write 1LM Decoder CSR's for HBM Stack 3 MC 3
C00: TADCHNILVOFFSET[0]:
target_ways: 0 chn_ways: 0 target_gran: 1 chn_gran: 1 tad_offset: 0x0 tad_offset_sign: 0
C01: TADCHNILVOFFSET[0]:
target_ways: 0 chn_ways: 0 target_gran: 1 chn_gran: 1 tad_offset: 0x0 tad_offset_sign: 0
Write MCNMCACHINGCFG for HBM Stack 3 MC 0
C00: MCNMCACHINGCFG:
mcnmcachingenb: 1 mcpmemenb: 0 mcnmcachingpmemwt: 0
C01: MCNMCACHINGCFG:
mcnmcachingenb: 1 mcpmemenb: 0 mcnmcachingpmemwt: 0
Write MCNMCACHINGCFG for HBM Stack 3 MC 1
C00: MCNMCACHINGCFG:
mcnmcachingenb: 1 mcpmemenb: 0 mcnmcachingpmemwt: 0
C01: MCNMCACHINGCFG:
mcnmcachingenb: 1 mcpmemenb: 0 mcnmcachingpmemwt: 0
Write MCNMCACHINGCFG for HBM Stack 3 MC 2
C00: MCNMCACHINGCFG:
mcnmcachingenb: 1 mcpmemenb: 0 mcnmcachingpmemwt: 0
C01: MCNMCACHINGCFG:
mcnmcachingenb: 1 mcpmemenb: 0 mcnmcachingpmemwt: 0
Write MCNMCACHINGCFG for HBM Stack 3 MC 3
C00: MCNMCACHINGCFG:
mcnmcachingenb: 1 mcpmemenb: 0 mcnmcachingpmemwt: 0
C01: MCNMCACHINGCFG:
mcnmcachingenb: 1 mcpmemenb: 0 mcnmcachingpmemwt: 0
Write 2LM NM Decoder CSR's for HBM Stack 3 MC 0
C00: CSR for force_lat bit : AMAP_MC_MAIN_REG: 0x52
C00: MCNMCACHINGINTLV:
nm_target_ways: 0 nm_chn_ways: 3 nm_target_lid: 0 nm_target_gran: 1 nm_chn_gran: 1 nm_chn_lid: 0
C00: MCNMCACHINGCFG_MC_2LM_REG:
en_2way: 0 prefer_way_sel: 0 chn_cap: 0xB nm_ratio_chn_cap: 0
C00: MCNMCACHINGOFFSET:
mcnmcachingoffsetlower: 0x2 mcnmcachingoffset: 0x3 mcnmcachingoffseten: 1
C01: CSR for force_lat bit : AMAP_MC_MAIN_REG: 0x52
C01: MCNMCACHINGINTLV:
nm_target_ways: 0 nm_chn_ways: 3 nm_target_lid: 0 nm_target_gran: 1 nm_chn_gran: 1 nm_chn_lid: 1
C01: MCNMCACHINGCFG_MC_2LM_REG:
en_2way: 0 prefer_way_sel: 0 chn_cap: 0xB nm_ratio_chn_cap: 0
C01: MCNMCACHINGOFFSET:
mcnmcachingoffsetlower: 0x2 mcnmcachingoffset: 0x3 mcnmcachingoffseten: 1
Write 2LM NM Decoder CSR's for HBM Stack 3 MC 1
C00: CSR for force_lat bit : AMAP_MC_MAIN_REG: 0x52
C00: MCNMCACHINGINTLV:
nm_target_ways: 0 nm_chn_ways: 3 nm_target_lid: 0 nm_target_gran: 1 nm_chn_gran: 1 nm_chn_lid: 2
C00: MCNMCACHINGCFG_MC_2LM_REG:
en_2way: 0 prefer_way_sel: 0 chn_cap: 0xB nm_ratio_chn_cap: 0
C00: MCNMCACHINGOFFSET:
mcnmcachingoffsetlower: 0x2 mcnmcachingoffset: 0x3 mcnmcachingoffseten: 1
C01: CSR for force_lat bit : AMAP_MC_MAIN_REG: 0x52
C01: MCNMCACHINGINTLV:
nm_target_ways: 0 nm_chn_ways: 3 nm_target_lid: 0 nm_target_gran: 1 nm_chn_gran: 1 nm_chn_lid: 3
C01: MCNMCACHINGCFG_MC_2LM_REG:
en_2way: 0 prefer_way_sel: 0 chn_cap: 0xB nm_ratio_chn_cap: 0
C01: MCNMCACHINGOFFSET:
mcnmcachingoffsetlower: 0x2 mcnmcachingoffset: 0x3 mcnmcachingoffseten: 1
Write 2LM NM Decoder CSR's for HBM Stack 3 MC 2
C00: CSR for force_lat bit : AMAP_MC_MAIN_REG: 0x52
C00: MCNMCACHINGINTLV:
nm_target_ways: 0 nm_chn_ways: 3 nm_target_lid: 0 nm_target_gran: 1 nm_chn_gran: 1 nm_chn_lid: 4
C00: MCNMCACHINGCFG_MC_2LM_REG:
en_2way: 0 prefer_way_sel: 0 chn_cap: 0xB nm_ratio_chn_cap: 0
C00: MCNMCACHINGOFFSET:
mcnmcachingoffsetlower: 0x2 mcnmcachingoffset: 0x3 mcnmcachingoffseten: 1
C01: CSR for force_lat bit : AMAP_MC_MAIN_REG: 0x52
C01: MCNMCACHINGINTLV:
nm_target_ways: 0 nm_chn_ways: 3 nm_target_lid: 0 nm_target_gran: 1 nm_chn_gran: 1 nm_chn_lid: 5
C01: MCNMCACHINGCFG_MC_2LM_REG:
en_2way: 0 prefer_way_sel: 0 chn_cap: 0xB nm_ratio_chn_cap: 0
C01: MCNMCACHINGOFFSET:
mcnmcachingoffsetlower: 0x2 mcnmcachingoffset: 0x3 mcnmcachingoffseten: 1
Write 2LM NM Decoder CSR's for HBM Stack 3 MC 3
C00: CSR for force_lat bit : AMAP_MC_MAIN_REG: 0x52
C00: MCNMCACHINGINTLV:
nm_target_ways: 0 nm_chn_ways: 3 nm_target_lid: 0 nm_target_gran: 1 nm_chn_gran: 1 nm_chn_lid: 6
C00: MCNMCACHINGCFG_MC_2LM_REG:
en_2way: 0 prefer_way_sel: 0 chn_cap: 0xB nm_ratio_chn_cap: 0
C00: MCNMCACHINGOFFSET:
mcnmcachingoffsetlower: 0x2 mcnmcachingoffset: 0x3 mcnmcachingoffseten: 1
C01: CSR for force_lat bit : AMAP_MC_MAIN_REG: 0x52
C01: MCNMCACHINGINTLV:
nm_target_ways: 0 nm_chn_ways: 3 nm_target_lid: 0 nm_target_gran: 1 nm_chn_gran: 1 nm_chn_lid: 7
C01: MCNMCACHINGCFG_MC_2LM_REG:
en_2way: 0 prefer_way_sel: 0 chn_cap: 0xB nm_ratio_chn_cap: 0
C01: MCNMCACHINGOFFSET:
mcnmcachingoffsetlower: 0x2 mcnmcachingoffset: 0x3 mcnmcachingoffseten: 1
Write 2LM FM Decoder CSR's for HBM Stack 3 MC 0 TAD 0
C00: DRAM_RULE[0]:
rule_enable: 1 limit: 0x81F fm_target: 0 fm_chn_ways: 0 fm_chn_gran: 1 fm_target_ways: 0 fm_gran_eq: 0 fm_chn_l2pid: 0x00000000
C01: DRAM_RULE[0]:
rule_enable: 1 limit: 0x81F fm_target: 0 fm_chn_ways: 0 fm_chn_gran: 1 fm_target_ways: 0 fm_gran_eq: 0 fm_chn_l2pid: 0x00000000
Write 2LM FM Decoder CSR's for HBM Stack 3 MC 1 TAD 0
C00: DRAM_RULE[0]:
rule_enable: 1 limit: 0x81F fm_target: 0 fm_chn_ways: 0 fm_chn_gran: 1 fm_target_ways: 0 fm_gran_eq: 0 fm_chn_l2pid: 0x00000000
C01: DRAM_RULE[0]:
rule_enable: 1 limit: 0x81F fm_target: 0 fm_chn_ways: 0 fm_chn_gran: 1 fm_target_ways: 0 fm_gran_eq: 0 fm_chn_l2pid: 0x00000000
Write 2LM FM Decoder CSR's for HBM Stack 3 MC 2 TAD 0
C00: DRAM_RULE[0]:
rule_enable: 1 limit: 0x81F fm_target: 0 fm_chn_ways: 0 fm_chn_gran: 1 fm_target_ways: 0 fm_gran_eq: 0 fm_chn_l2pid: 0x00000000
C01: DRAM_RULE[0]:
rule_enable: 1 limit: 0x81F fm_target: 0 fm_chn_ways: 0 fm_chn_gran: 1 fm_target_ways: 0 fm_gran_eq: 0 fm_chn_l2pid: 0x00000000
Write 2LM FM Decoder CSR's for HBM Stack 3 MC 3 TAD 0
C00: DRAM_RULE[0]:
rule_enable: 1 limit: 0x81F fm_target: 0 fm_chn_ways: 0 fm_chn_gran: 1 fm_target_ways: 0 fm_gran_eq: 0 fm_chn_l2pid: 0x00000000
C01: DRAM_RULE[0]:
rule_enable: 1 limit: 0x81F fm_target: 0 fm_chn_ways: 0 fm_chn_gran: 1 fm_target_ways: 0 fm_gran_eq: 0 fm_chn_l2pid: 0x00000000
Checkpoint Code: Socket 0, 0xBB, 0x08, 0x0000
^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^
Write RIR CSRs for Socket: 0
^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^
Channel - 0
RIRWAYNESSLIMIT_0_MC_MAIN_REG
rir_val: 1 rir_limit: 0x1F rir_way: 0x0
RIRILV0OFFSET_0_MC_MAIN_REG
rir_rnk_tgt0: 0x0 rir_offset0: 0x0
RIRILV1OFFSET_0_MC_MAIN_REG
rir_rnk_tgt0: 0x0 rir_offset0: 0x0
RIRILV2OFFSET_0_MC_MAIN_REG
rir_rnk_tgt0: 0x0 rir_offset0: 0x0
RIRILV3OFFSET_0_MC_MAIN_REG
rir_rnk_tgt0: 0x0 rir_offset0: 0x0
RIRILV4OFFSET_0_MC_MAIN_REG
rir_rnk_tgt0: 0x0 rir_offset0: 0x0
RIRILV5OFFSET_0_MC_MAIN_REG
rir_rnk_tgt0: 0x0 rir_offset0: 0x0
RIRILV6OFFSET_0_MC_MAIN_REG
rir_rnk_tgt0: 0x0 rir_offset0: 0x0
RIRILV7OFFSET_0_MC_MAIN_REG
rir_rnk_tgt0: 0x0 rir_offset0: 0x0
RIRWAYNESSLIMIT_1_MC_MAIN_REG
rir_val: 0 rir_limit: 0x1F rir_way: 0x0
RIRILV0OFFSET_1_MC_MAIN_REG
rir_rnk_tgt0: 0x0 rir_offset0: 0x0
RIRILV1OFFSET_1_MC_MAIN_REG
rir_rnk_tgt0: 0x0 rir_offset0: 0x0
RIRILV2OFFSET_1_MC_MAIN_REG
rir_rnk_tgt0: 0x0 rir_offset0: 0x0
RIRILV3OFFSET_1_MC_MAIN_REG
rir_rnk_tgt0: 0x0 rir_offset0: 0x0
RIRILV4OFFSET_1_MC_MAIN_REG
rir_rnk_tgt0: 0x0 rir_offset0: 0x0
RIRILV5OFFSET_1_MC_MAIN_REG
rir_rnk_tgt0: 0x0 rir_offset0: 0x0
RIRILV6OFFSET_1_MC_MAIN_REG
rir_rnk_tgt0: 0x0 rir_offset0: 0x0
RIRILV7OFFSET_1_MC_MAIN_REG
rir_rnk_tgt0: 0x0 rir_offset0: 0x0
RIRWAYNESSLIMIT_2_MC_MAIN_REG
rir_val: 0 rir_limit: 0x1F rir_way: 0x0
RIRILV0OFFSET_2_MC_MAIN_REG
rir_rnk_tgt0: 0x0 rir_offset0: 0x0
RIRILV1OFFSET_2_MC_MAIN_REG
rir_rnk_tgt0: 0x0 rir_offset0: 0x0
RIRILV2OFFSET_2_MC_MAIN_REG
rir_rnk_tgt0: 0x0 rir_offset0: 0x0
RIRILV3OFFSET_2_MC_MAIN_REG
rir_rnk_tgt0: 0x0 rir_offset0: 0x0
RIRILV4OFFSET_2_MC_MAIN_REG
rir_rnk_tgt0: 0x0 rir_offset0: 0x0
RIRILV5OFFSET_2_MC_MAIN_REG
rir_rnk_tgt0: 0x0 rir_offset0: 0x0
RIRILV6OFFSET_2_MC_MAIN_REG
rir_rnk_tgt0: 0x0 rir_offset0: 0x0
RIRILV7OFFSET_2_MC_MAIN_REG
rir_rnk_tgt0: 0x0 rir_offset0: 0x0
RIRWAYNESSLIMIT_3_MC_MAIN_REG
rir_val: 0 rir_limit: 0x1F rir_way: 0x0
RIRILV0OFFSET_3_MC_MAIN_REG
rir_rnk_tgt0: 0x0 rir_offset0: 0x0
RIRILV1OFFSET_3_MC_MAIN_REG
rir_rnk_tgt0: 0x0 rir_offset0: 0x0
RIRILV2OFFSET_3_MC_MAIN_REG
rir_rnk_tgt0: 0x0 rir_offset0: 0x0
RIRILV3OFFSET_3_MC_MAIN_REG
rir_rnk_tgt0: 0x0 rir_offset0: 0x0
RIRILV4OFFSET_3_MC_MAIN_REG
rir_rnk_tgt0: 0x0 rir_offset0: 0x0
RIRILV5OFFSET_3_MC_MAIN_REG
rir_rnk_tgt0: 0x0 rir_offset0: 0x0
RIRILV6OFFSET_3_MC_MAIN_REG
rir_rnk_tgt0: 0x0 rir_offset0: 0x0
RIRILV7OFFSET_3_MC_MAIN_REG
rir_rnk_tgt0: 0x0 rir_offset0: 0x0
Channel - 2
RIRWAYNESSLIMIT_0_MC_MAIN_REG
rir_val: 1 rir_limit: 0x1F rir_way: 0x0
RIRILV0OFFSET_0_MC_MAIN_REG
rir_rnk_tgt0: 0x0 rir_offset0: 0x0
RIRILV1OFFSET_0_MC_MAIN_REG
rir_rnk_tgt0: 0x0 rir_offset0: 0x0
RIRILV2OFFSET_0_MC_MAIN_REG
rir_rnk_tgt0: 0x0 rir_offset0: 0x0
RIRILV3OFFSET_0_MC_MAIN_REG
rir_rnk_tgt0: 0x0 rir_offset0: 0x0
RIRILV4OFFSET_0_MC_MAIN_REG
rir_rnk_tgt0: 0x0 rir_offset0: 0x0
RIRILV5OFFSET_0_MC_MAIN_REG
rir_rnk_tgt0: 0x0 rir_offset0: 0x0
RIRILV6OFFSET_0_MC_MAIN_REG
rir_rnk_tgt0: 0x0 rir_offset0: 0x0
RIRILV7OFFSET_0_MC_MAIN_REG
rir_rnk_tgt0: 0x0 rir_offset0: 0x0
RIRWAYNESSLIMIT_1_MC_MAIN_REG
rir_val: 0 rir_limit: 0x1F rir_way: 0x0
RIRILV0OFFSET_1_MC_MAIN_REG
rir_rnk_tgt0: 0x0 rir_offset0: 0x0
RIRILV1OFFSET_1_MC_MAIN_REG
rir_rnk_tgt0: 0x0 rir_offset0: 0x0
RIRILV2OFFSET_1_MC_MAIN_REG
rir_rnk_tgt0: 0x0 rir_offset0: 0x0
RIRILV3OFFSET_1_MC_MAIN_REG
rir_rnk_tgt0: 0x0 rir_offset0: 0x0
RIRILV4OFFSET_1_MC_MAIN_REG
rir_rnk_tgt0: 0x0 rir_offset0: 0x0
RIRILV5OFFSET_1_MC_MAIN_REG
rir_rnk_tgt0: 0x0 rir_offset0: 0x0
RIRILV6OFFSET_1_MC_MAIN_REG
rir_rnk_tgt0: 0x0 rir_offset0: 0x0
RIRILV7OFFSET_1_MC_MAIN_REG
rir_rnk_tgt0: 0x0 rir_offset0: 0x0
RIRWAYNESSLIMIT_2_MC_MAIN_REG
rir_val: 0 rir_limit: 0x1F rir_way: 0x0
RIRILV0OFFSET_2_MC_MAIN_REG
rir_rnk_tgt0: 0x0 rir_offset0: 0x0
RIRILV1OFFSET_2_MC_MAIN_REG
rir_rnk_tgt0: 0x0 rir_offset0: 0x0
RIRILV2OFFSET_2_MC_MAIN_REG
rir_rnk_tgt0: 0x0 rir_offset0: 0x0
RIRILV3OFFSET_2_MC_MAIN_REG
rir_rnk_tgt0: 0x0 rir_offset0: 0x0
RIRILV4OFFSET_2_MC_MAIN_REG
rir_rnk_tgt0: 0x0 rir_offset0: 0x0
RIRILV5OFFSET_2_MC_MAIN_REG
rir_rnk_tgt0: 0x0 rir_offset0: 0x0
RIRILV6OFFSET_2_MC_MAIN_REG
rir_rnk_tgt0: 0x0 rir_offset0: 0x0
RIRILV7OFFSET_2_MC_MAIN_REG
rir_rnk_tgt0: 0x0 rir_offset0: 0x0
RIRWAYNESSLIMIT_3_MC_MAIN_REG
rir_val: 0 rir_limit: 0x1F rir_way: 0x0
RIRILV0OFFSET_3_MC_MAIN_REG
rir_rnk_tgt0: 0x0 rir_offset0: 0x0
RIRILV1OFFSET_3_MC_MAIN_REG
rir_rnk_tgt0: 0x0 rir_offset0: 0x0
RIRILV2OFFSET_3_MC_MAIN_REG
rir_rnk_tgt0: 0x0 rir_offset0: 0x0
RIRILV3OFFSET_3_MC_MAIN_REG
rir_rnk_tgt0: 0x0 rir_offset0: 0x0
RIRILV4OFFSET_3_MC_MAIN_REG
rir_rnk_tgt0: 0x0 rir_offset0: 0x0
RIRILV5OFFSET_3_MC_MAIN_REG
rir_rnk_tgt0: 0x0 rir_offset0: 0x0
RIRILV6OFFSET_3_MC_MAIN_REG
rir_rnk_tgt0: 0x0 rir_offset0: 0x0
RIRILV7OFFSET_3_MC_MAIN_REG
rir_rnk_tgt0: 0x0 rir_offset0: 0x0
Channel - 4
RIRWAYNESSLIMIT_0_MC_MAIN_REG
rir_val: 1 rir_limit: 0x1F rir_way: 0x0
RIRILV0OFFSET_0_MC_MAIN_REG
rir_rnk_tgt0: 0x0 rir_offset0: 0x0
RIRILV1OFFSET_0_MC_MAIN_REG
rir_rnk_tgt0: 0x0 rir_offset0: 0x0
RIRILV2OFFSET_0_MC_MAIN_REG
rir_rnk_tgt0: 0x0 rir_offset0: 0x0
RIRILV3OFFSET_0_MC_MAIN_REG
rir_rnk_tgt0: 0x0 rir_offset0: 0x0
RIRILV4OFFSET_0_MC_MAIN_REG
rir_rnk_tgt0: 0x0 rir_offset0: 0x0
RIRILV5OFFSET_0_MC_MAIN_REG
rir_rnk_tgt0: 0x0 rir_offset0: 0x0
RIRILV6OFFSET_0_MC_MAIN_REG
rir_rnk_tgt0: 0x0 rir_offset0: 0x0
RIRILV7OFFSET_0_MC_MAIN_REG
rir_rnk_tgt0: 0x0 rir_offset0: 0x0
RIRWAYNESSLIMIT_1_MC_MAIN_REG
rir_val: 0 rir_limit: 0x1F rir_way: 0x0
RIRILV0OFFSET_1_MC_MAIN_REG
rir_rnk_tgt0: 0x0 rir_offset0: 0x0
RIRILV1OFFSET_1_MC_MAIN_REG
rir_rnk_tgt0: 0x0 rir_offset0: 0x0
RIRILV2OFFSET_1_MC_MAIN_REG
rir_rnk_tgt0: 0x0 rir_offset0: 0x0
RIRILV3OFFSET_1_MC_MAIN_REG
rir_rnk_tgt0: 0x0 rir_offset0: 0x0
RIRILV4OFFSET_1_MC_MAIN_REG
rir_rnk_tgt0: 0x0 rir_offset0: 0x0
RIRILV5OFFSET_1_MC_MAIN_REG
rir_rnk_tgt0: 0x0 rir_offset0: 0x0
RIRILV6OFFSET_1_MC_MAIN_REG
rir_rnk_tgt0: 0x0 rir_offset0: 0x0
RIRILV7OFFSET_1_MC_MAIN_REG
rir_rnk_tgt0: 0x0 rir_offset0: 0x0
RIRWAYNESSLIMIT_2_MC_MAIN_REG
rir_val: 0 rir_limit: 0x1F rir_way: 0x0
RIRILV0OFFSET_2_MC_MAIN_REG
rir_rnk_tgt0: 0x0 rir_offset0: 0x0
RIRILV1OFFSET_2_MC_MAIN_REG
rir_rnk_tgt0: 0x0 rir_offset0: 0x0
RIRILV2OFFSET_2_MC_MAIN_REG
rir_rnk_tgt0: 0x0 rir_offset0: 0x0
RIRILV3OFFSET_2_MC_MAIN_REG
rir_rnk_tgt0: 0x0 rir_offset0: 0x0
RIRILV4OFFSET_2_MC_MAIN_REG
rir_rnk_tgt0: 0x0 rir_offset0: 0x0
RIRILV5OFFSET_2_MC_MAIN_REG
rir_rnk_tgt0: 0x0 rir_offset0: 0x0
RIRILV6OFFSET_2_MC_MAIN_REG
rir_rnk_tgt0: 0x0 rir_offset0: 0x0
RIRILV7OFFSET_2_MC_MAIN_REG
rir_rnk_tgt0: 0x0 rir_offset0: 0x0
RIRWAYNESSLIMIT_3_MC_MAIN_REG
rir_val: 0 rir_limit: 0x1F rir_way: 0x0
RIRILV0OFFSET_3_MC_MAIN_REG
rir_rnk_tgt0: 0x0 rir_offset0: 0x0
RIRILV1OFFSET_3_MC_MAIN_REG
rir_rnk_tgt0: 0x0 rir_offset0: 0x0
RIRILV2OFFSET_3_MC_MAIN_REG
rir_rnk_tgt0: 0x0 rir_offset0: 0x0
RIRILV3OFFSET_3_MC_MAIN_REG
rir_rnk_tgt0: 0x0 rir_offset0: 0x0
RIRILV4OFFSET_3_MC_MAIN_REG
rir_rnk_tgt0: 0x0 rir_offset0: 0x0
RIRILV5OFFSET_3_MC_MAIN_REG
rir_rnk_tgt0: 0x0 rir_offset0: 0x0
RIRILV6OFFSET_3_MC_MAIN_REG
rir_rnk_tgt0: 0x0 rir_offset0: 0x0
RIRILV7OFFSET_3_MC_MAIN_REG
rir_rnk_tgt0: 0x0 rir_offset0: 0x0
Channel - 6
RIRWAYNESSLIMIT_0_MC_MAIN_REG
rir_val: 1 rir_limit: 0x1F rir_way: 0x0
RIRILV0OFFSET_0_MC_MAIN_REG
rir_rnk_tgt0: 0x0 rir_offset0: 0x0
RIRILV1OFFSET_0_MC_MAIN_REG
rir_rnk_tgt0: 0x0 rir_offset0: 0x0
RIRILV2OFFSET_0_MC_MAIN_REG
rir_rnk_tgt0: 0x0 rir_offset0: 0x0
RIRILV3OFFSET_0_MC_MAIN_REG
rir_rnk_tgt0: 0x0 rir_offset0: 0x0
RIRILV4OFFSET_0_MC_MAIN_REG
rir_rnk_tgt0: 0x0 rir_offset0: 0x0
RIRILV5OFFSET_0_MC_MAIN_REG
rir_rnk_tgt0: 0x0 rir_offset0: 0x0
RIRILV6OFFSET_0_MC_MAIN_REG
rir_rnk_tgt0: 0x0 rir_offset0: 0x0
RIRILV7OFFSET_0_MC_MAIN_REG
rir_rnk_tgt0: 0x0 rir_offset0: 0x0
RIRWAYNESSLIMIT_1_MC_MAIN_REG
rir_val: 0 rir_limit: 0x1F rir_way: 0x0
RIRILV0OFFSET_1_MC_MAIN_REG
rir_rnk_tgt0: 0x0 rir_offset0: 0x0
RIRILV1OFFSET_1_MC_MAIN_REG
rir_rnk_tgt0: 0x0 rir_offset0: 0x0
RIRILV2OFFSET_1_MC_MAIN_REG
rir_rnk_tgt0: 0x0 rir_offset0: 0x0
RIRILV3OFFSET_1_MC_MAIN_REG
rir_rnk_tgt0: 0x0 rir_offset0: 0x0
RIRILV4OFFSET_1_MC_MAIN_REG
rir_rnk_tgt0: 0x0 rir_offset0: 0x0
RIRILV5OFFSET_1_MC_MAIN_REG
rir_rnk_tgt0: 0x0 rir_offset0: 0x0
RIRILV6OFFSET_1_MC_MAIN_REG
rir_rnk_tgt0: 0x0 rir_offset0: 0x0
RIRILV7OFFSET_1_MC_MAIN_REG
rir_rnk_tgt0: 0x0 rir_offset0: 0x0
RIRWAYNESSLIMIT_2_MC_MAIN_REG
rir_val: 0 rir_limit: 0x1F rir_way: 0x0
RIRILV0OFFSET_2_MC_MAIN_REG
rir_rnk_tgt0: 0x0 rir_offset0: 0x0
RIRILV1OFFSET_2_MC_MAIN_REG
rir_rnk_tgt0: 0x0 rir_offset0: 0x0
RIRILV2OFFSET_2_MC_MAIN_REG
rir_rnk_tgt0: 0x0 rir_offset0: 0x0
RIRILV3OFFSET_2_MC_MAIN_REG
rir_rnk_tgt0: 0x0 rir_offset0: 0x0
RIRILV4OFFSET_2_MC_MAIN_REG
rir_rnk_tgt0: 0x0 rir_offset0: 0x0
RIRILV5OFFSET_2_MC_MAIN_REG
rir_rnk_tgt0: 0x0 rir_offset0: 0x0
RIRILV6OFFSET_2_MC_MAIN_REG
rir_rnk_tgt0: 0x0 rir_offset0: 0x0
RIRILV7OFFSET_2_MC_MAIN_REG
rir_rnk_tgt0: 0x0 rir_offset0: 0x0
RIRWAYNESSLIMIT_3_MC_MAIN_REG
rir_val: 0 rir_limit: 0x1F rir_way: 0x0
RIRILV0OFFSET_3_MC_MAIN_REG
rir_rnk_tgt0: 0x0 rir_offset0: 0x0
RIRILV1OFFSET_3_MC_MAIN_REG
rir_rnk_tgt0: 0x0 rir_offset0: 0x0
RIRILV2OFFSET_3_MC_MAIN_REG
rir_rnk_tgt0: 0x0 rir_offset0: 0x0
RIRILV3OFFSET_3_MC_MAIN_REG
rir_rnk_tgt0: 0x0 rir_offset0: 0x0
RIRILV4OFFSET_3_MC_MAIN_REG
rir_rnk_tgt0: 0x0 rir_offset0: 0x0
RIRILV5OFFSET_3_MC_MAIN_REG
rir_rnk_tgt0: 0x0 rir_offset0: 0x0
RIRILV6OFFSET_3_MC_MAIN_REG
rir_rnk_tgt0: 0x0 rir_offset0: 0x0
RIRILV7OFFSET_3_MC_MAIN_REG
rir_rnk_tgt0: 0x0 rir_offset0: 0x0
^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^
Write CHA CSRs for Socket: 0
^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^
TWO_LM_CONFIG_CHA_PMA_REG
enable: 0x1 mask: 0x3F mask_hi: 0x0
HA_COH_CHABC_SAD1_REG
dis_spec_rd: 0x0
lowMemBase: 0x0
lowMemSize: 0x20
highMemBase: 0x40
highMemSize: 0xFE0
TOLM: 0x1F
TOHM: 0x101F
C00: CSR for wait4bothhalves bit: AMAP_MC_MAIN_REG: 0x49
C00: CSR for wait4bothhalves bit: AMAP_MC_MAIN_REG: 0x49
C00: CSR for wait4bothhalves bit: AMAP_MC_MAIN_REG: 0x49
C00: CSR for wait4bothhalves bit: AMAP_MC_MAIN_REG: 0x49
Checkpoint Code: Socket 0, 0xBB, 0x06, 0x0001
^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^
Write CHA Remote SAD CSRs for Socket: 1
^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^
En Base Limit NodeId Attr
1 0x00000 0x0081F 0x0 0x3
^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^
Write CHA SAD CSRs for Socket: 1
^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^
CHA unlock DRAM cluster 0 snc_lock bits: 0xE
Program Channel Interleaves
rt0_interleave_mode: 7
rt1_interleave_shift: 7
rt2_interleave_shift: 2
Program CSRs for SAD Rule 0 (HBM 2LM DDR)
En Limit Mode Attr NMCacheable
1 0x00A1F 0x1 0x3 1
Interleave List: 0x0000000088888888
Single Target: H0 Index 0
DRAM_RULE_CFG2: cxl_accelerator_mem Durable_mem_en cxl_mem_expander NXM
0 0 0 0
TgtRt: 00 ChnRt: 00
Program target config: 00000000
Program channel config: 00000000
Program Mode config.
H0 DramRt0Mode0Cfg: 00000006
H0 DramRt0Mode1Cfg: 00000000
H1 DramRt0Mode0Cfg: 00000000
H1 DramRt0Mode1Cfg: 00000000
H0 DramRt1Mode0Cfg: 00000000
H0 DramRt1Mode1Cfg: 00000000
H1 DramRt1Mode0Cfg: 00000000
H1 DramRt1Mode1Cfg: 00000000
H0 DramRt2Mode0Cfg: 00000000
H0 DramRt2Mode1Cfg: 00000000
H1 DramRt2Mode0Cfg: 00000000
H1 DramRt2Mode1Cfg: 00000000
CHA unlock DRAM cluster 1 snc_lock bits: 0xD
Program Channel Interleaves
rt0_interleave_mode: 7
rt1_interleave_shift: 7
rt2_interleave_shift: 2
Program CSRs for SAD Rule 0 (HBM 2LM DDR)
En Limit Mode Attr NMCacheable
1 0x00C1F 0x1 0x3 1
Interleave List: 0x0000000088888888
Single Target: H0 Index 0
DRAM_RULE_CFG2: cxl_accelerator_mem Durable_mem_en cxl_mem_expander NXM
0 0 0 0
TgtRt: 00 ChnRt: 00
Program target config: 00000000
Program channel config: 00000000
Program Mode config.
H0 DramRt0Mode0Cfg: 00000006
H0 DramRt0Mode1Cfg: 00000000
H1 DramRt0Mode0Cfg: 00000000
H1 DramRt0Mode1Cfg: 00000000
H0 DramRt1Mode0Cfg: 00000000
H0 DramRt1Mode1Cfg: 00000000
H1 DramRt1Mode0Cfg: 00000000
H1 DramRt1Mode1Cfg: 00000000
H0 DramRt2Mode0Cfg: 00000000
H0 DramRt2Mode1Cfg: 00000000
H1 DramRt2Mode0Cfg: 00000000
H1 DramRt2Mode1Cfg: 00000000
CHA unlock DRAM cluster 2 snc_lock bits: 0xB
Program Channel Interleaves
rt0_interleave_mode: 7
rt1_interleave_shift: 7
rt2_interleave_shift: 2
Program CSRs for SAD Rule 0 (HBM 2LM DDR)
En Limit Mode Attr NMCacheable
1 0x00E1F 0x1 0x3 1
Interleave List: 0x0000000088888888
Single Target: H0 Index 0
DRAM_RULE_CFG2: cxl_accelerator_mem Durable_mem_en cxl_mem_expander NXM
0 0 0 0
TgtRt: 00 ChnRt: 00
Program target config: 00000000
Program channel config: 00000000
Program Mode config.
H0 DramRt0Mode0Cfg: 00000006
H0 DramRt0Mode1Cfg: 00000000
H1 DramRt0Mode0Cfg: 00000000
H1 DramRt0Mode1Cfg: 00000000
H0 DramRt1Mode0Cfg: 00000000
H0 DramRt1Mode1Cfg: 00000000
H1 DramRt1Mode0Cfg: 00000000
H1 DramRt1Mode1Cfg: 00000000
H0 DramRt2Mode0Cfg: 00000000
H0 DramRt2Mode1Cfg: 00000000
H1 DramRt2Mode0Cfg: 00000000
H1 DramRt2Mode1Cfg: 00000000
CHA unlock DRAM cluster 3 snc_lock bits: 0x7
Program Channel Interleaves
rt0_interleave_mode: 7
rt1_interleave_shift: 7
rt2_interleave_shift: 2
Program CSRs for SAD Rule 0 (HBM 2LM DDR)
En Limit Mode Attr NMCacheable
1 0x0101F 0x1 0x3 1
Interleave List: 0x0000000088888888
Single Target: H0 Index 0
DRAM_RULE_CFG2: cxl_accelerator_mem Durable_mem_en cxl_mem_expander NXM
0 0 0 0
TgtRt: 00 ChnRt: 00
Program target config: 00000000
Program channel config: 00000000
Program Mode config.
H0 DramRt0Mode0Cfg: 00000006
H0 DramRt0Mode1Cfg: 00000000
H1 DramRt0Mode0Cfg: 00000000
H1 DramRt0Mode1Cfg: 00000000
H0 DramRt1Mode0Cfg: 00000000
H0 DramRt1Mode1Cfg: 00000000
H1 DramRt1Mode0Cfg: 00000000
H1 DramRt1Mode1Cfg: 00000000
H0 DramRt2Mode0Cfg: 00000000
H0 DramRt2Mode1Cfg: 00000000
H1 DramRt2Mode0Cfg: 00000000
H1 DramRt2Mode1Cfg: 00000000
CHA lock all DRAM clusters snc_lock bits: 0xF
^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^
Write Route Table CSRs for Socket: 1
^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^
CSR: Cluster 0 H0_CH_ROUTE_TABLE_0 - 0x0 0x1 0x0 0x1 0x0 0x1 0x0 0x1
CSR: Cluster 0 H0_TGT_ROUTE_TABLE_0 - 0x4 0x4 0x5 0x5 0x6 0x6 0x7 0x7
CSR: Cluster 0 H1_CH_ROUTE_TABLE_0 - 0x0 0x0 0x0 0x0 0x0 0x0 0x0 0x0
CSR: Cluster 0 H1_TGT_ROUTE_TABLE_0 - 0x0 0x0 0x0 0x0 0x0 0x0 0x0 0x0
CSR: Cluster 1 H0_CH_ROUTE_TABLE_0 - 0x0 0x1 0x0 0x1 0x0 0x1 0x0 0x1
CSR: Cluster 1 H0_TGT_ROUTE_TABLE_0 - 0x4 0x4 0x5 0x5 0x6 0x6 0x7 0x7
CSR: Cluster 1 H1_CH_ROUTE_TABLE_0 - 0x0 0x0 0x0 0x0 0x0 0x0 0x0 0x0
CSR: Cluster 1 H1_TGT_ROUTE_TABLE_0 - 0x0 0x0 0x0 0x0 0x0 0x0 0x0 0x0
CSR: Cluster 2 H0_CH_ROUTE_TABLE_0 - 0x0 0x1 0x0 0x1 0x0 0x1 0x0 0x1
CSR: Cluster 2 H0_TGT_ROUTE_TABLE_0 - 0x7 0x7 0x6 0x6 0x5 0x5 0x4 0x4
CSR: Cluster 2 H1_CH_ROUTE_TABLE_0 - 0x0 0x0 0x0 0x0 0x0 0x0 0x0 0x0
CSR: Cluster 2 H1_TGT_ROUTE_TABLE_0 - 0x0 0x0 0x0 0x0 0x0 0x0 0x0 0x0
CSR: Cluster 3 H0_CH_ROUTE_TABLE_0 - 0x0 0x1 0x0 0x1 0x0 0x1 0x0 0x1
CSR: Cluster 3 H0_TGT_ROUTE_TABLE_0 - 0x7 0x7 0x6 0x6 0x5 0x5 0x4 0x4
CSR: Cluster 3 H1_CH_ROUTE_TABLE_0 - 0x0 0x0 0x0 0x0 0x0 0x0 0x0 0x0
CSR: Cluster 3 H1_TGT_ROUTE_TABLE_0 - 0x0 0x0 0x0 0x0 0x0 0x0 0x0 0x0
^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^
Write MESH2MEM CSRs for Socket: 1
^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^
Memory Controller : 0
------------------------
DEFEATURES0_M2MEM_MAIN_REG
wrcmpfromnm: 1
MODE_M2MEM_MAIN_REG
nmcaching:0x1 pmem:0x0 blockregion:0x0 in-tile caching: 0x1
Memory Controller : 1
------------------------
DEFEATURES0_M2MEM_MAIN_REG
wrcmpfromnm: 1
MODE_M2MEM_MAIN_REG
nmcaching:0x1 pmem:0x0 blockregion:0x0 in-tile caching: 0x1
Memory Controller : 2
------------------------
DEFEATURES0_M2MEM_MAIN_REG
wrcmpfromnm: 1
MODE_M2MEM_MAIN_REG
nmcaching:0x1 pmem:0x0 blockregion:0x0 in-tile caching: 0x1
Memory Controller : 3
------------------------
DEFEATURES0_M2MEM_MAIN_REG
wrcmpfromnm: 1
MODE_M2MEM_MAIN_REG
nmcaching:0x1 pmem:0x0 blockregion:0x0 in-tile caching: 0x1
MC: 0
tadid:0x0 tadvld:0x1 pmemvld:0x0 blkvld:0x0 ddr4tadid:0x0 ddrttadid:0x0 ddr4:0x1 nmcacheablevld:0x0 mirror:0x0 secondary1st:0x0 frcnpwr:0x0 spare:0x0 addresslimit[51:26]:0xA1F nonpersistentfm:0x1
MC: 1
tadid:0x0 tadvld:0x1 pmemvld:0x0 blkvld:0x0 ddr4tadid:0x0 ddrttadid:0x0 ddr4:0x1 nmcacheablevld:0x0 mirror:0x0 secondary1st:0x0 frcnpwr:0x0 spare:0x0 addresslimit[51:26]:0xC1F nonpersistentfm:0x1
MC: 2
tadid:0x0 tadvld:0x1 pmemvld:0x0 blkvld:0x0 ddr4tadid:0x0 ddrttadid:0x0 ddr4:0x1 nmcacheablevld:0x0 mirror:0x0 secondary1st:0x0 frcnpwr:0x0 spare:0x0 addresslimit[51:26]:0xE1F nonpersistentfm:0x1
MC: 3
tadid:0x0 tadvld:0x1 pmemvld:0x0 blkvld:0x0 ddr4tadid:0x0 ddrttadid:0x0 ddr4:0x1 nmcacheablevld:0x0 mirror:0x0 secondary1st:0x0 frcnpwr:0x0 spare:0x0 addresslimit[51:26]:0x101F nonpersistentfm:0x1
Programs feature registers for MC 0
Programs feature registers for MC 1
Programs feature registers for MC 2
Programs feature registers for MC 3
^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^
Write HBM MESH2MEM CSRs for Socket: 1
^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^
HBM Stack: 0
Mesh2Mem misc: nmcaching: 1 wrcmpfromnm: 1
Mesh2Mem TAD: tadid:0x0 ddrtadid:0x0 nmcacheablevld:0x1 addresslimit[51:26]:0xA1F
HBM Stack: 1
Mesh2Mem misc: nmcaching: 1 wrcmpfromnm: 1
Mesh2Mem TAD: tadid:0x0 ddrtadid:0x0 nmcacheablevld:0x1 addresslimit[51:26]:0xC1F
HBM Stack: 2
Mesh2Mem misc: nmcaching: 1 wrcmpfromnm: 1
Mesh2Mem TAD: tadid:0x0 ddrtadid:0x0 nmcacheablevld:0x1 addresslimit[51:26]:0xE1F
HBM Stack: 3
Mesh2Mem misc: nmcaching: 1 wrcmpfromnm: 1
Mesh2Mem TAD: tadid:0x0 ddrtadid:0x0 nmcacheablevld:0x1 addresslimit[51:26]:0x101F
Programs feature registers for MC 0
N1.C00: CSR : SYSFEATURES0_MC_2LM_REG: 0x10
N1.C01: CSR : SYSFEATURES0_MC_2LM_REG: 0x10
Programs feature registers for MC 1
N1.C00: CSR : SYSFEATURES0_MC_2LM_REG: 0x10
N1.C01: CSR : SYSFEATURES0_MC_2LM_REG: 0x10
Programs feature registers for MC 2
N1.C00: CSR : SYSFEATURES0_MC_2LM_REG: 0x10
N1.C01: CSR : SYSFEATURES0_MC_2LM_REG: 0x10
Programs feature registers for MC 3
N1.C00: CSR : SYSFEATURES0_MC_2LM_REG: 0x10
N1.C01: CSR : SYSFEATURES0_MC_2LM_REG: 0x10
Programs feature registers for MC 4
N1.C00: CSR : SYSFEATURES0_MC_2LM_REG: 0x10
N1.C01: CSR : SYSFEATURES0_MC_2LM_REG: 0x10
Programs feature registers for MC 5
N1.C00: CSR : SYSFEATURES0_MC_2LM_REG: 0x10
N1.C01: CSR : SYSFEATURES0_MC_2LM_REG: 0x10
Programs feature registers for MC 6
N1.C00: CSR : SYSFEATURES0_MC_2LM_REG: 0x10
N1.C01: CSR : SYSFEATURES0_MC_2LM_REG: 0x10
Programs feature registers for MC 7
N1.C00: CSR : SYSFEATURES0_MC_2LM_REG: 0x10
N1.C01: CSR : SYSFEATURES0_MC_2LM_REG: 0x10
Programs feature registers for MC 8
N1.C00: CSR : SYSFEATURES0_MC_2LM_REG: 0x10
N1.C01: CSR : SYSFEATURES0_MC_2LM_REG: 0x10
Programs feature registers for MC 9
N1.C00: CSR : SYSFEATURES0_MC_2LM_REG: 0x10
N1.C01: CSR : SYSFEATURES0_MC_2LM_REG: 0x10
Programs feature registers for MC 10
N1.C00: CSR : SYSFEATURES0_MC_2LM_REG: 0x10
N1.C01: CSR : SYSFEATURES0_MC_2LM_REG: 0x10
Programs feature registers for MC 11
N1.C00: CSR : SYSFEATURES0_MC_2LM_REG: 0x10
N1.C01: CSR : SYSFEATURES0_MC_2LM_REG: 0x10
Programs feature registers for MC 12
N1.C00: CSR : SYSFEATURES0_MC_2LM_REG: 0x10
N1.C01: CSR : SYSFEATURES0_MC_2LM_REG: 0x10
Programs feature registers for MC 13
N1.C00: CSR : SYSFEATURES0_MC_2LM_REG: 0x10
N1.C01: CSR : SYSFEATURES0_MC_2LM_REG: 0x10
Programs feature registers for MC 14
N1.C00: CSR : SYSFEATURES0_MC_2LM_REG: 0x10
N1.C01: CSR : SYSFEATURES0_MC_2LM_REG: 0x10
Programs feature registers for MC 15
N1.C00: CSR : SYSFEATURES0_MC_2LM_REG: 0x10
N1.C01: CSR : SYSFEATURES0_MC_2LM_REG: 0x10
Checkpoint Code: Socket 0, 0xBB, 0x07, 0x0001
^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^
Write TAD CSRs for Socket: 1
^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^
Write Patrol and Sparing CSR's for MC 0
C00: TADWAYNESS[0]:
target_lid: 0 chn_lid: 0 tad_limit: 0xA1F
C00: TADBASE[0]:
mirror_en: 0 en_failover: 0 ign_ptrl_uc: 0 base: 0x820
NM_DRAM_RULE[0]:
rule_enable: 1 limit: 0xA1F nm_chn_ways: 0 nm_chn_gran: 1 nm_target_ways: 0 nm_gran_eq: 0 nm_chn_l2pid: 0x00FFFFF8
Logical Ch Id: 0 1 2 3 4 5 6 7
Physical Ch Id: 0 7 7 7 7 7 7 7
C00: NM_DRAM_RULE[0]:
Write 1LM Decoder CSR's for MC 0
C00: TADCHNILVOFFSET[0]:
target_ways: 0 chn_ways: 0 target_gran: 1 chn_gran: 1 tad_offset: 0x820 tad_offset_sign: 0
C00: MCNMCACHINGCFG:
mcnmcachingenb: 0 mcpmemenb: 0 mcnmcachingpmemwt: 0
C01: MCNMCACHINGCFG:
mcnmcachingenb: 0 mcpmemenb: 0 mcnmcachingpmemwt: 0
Write Patrol and Sparing CSR's for MC 1
C00: TADWAYNESS[0]:
target_lid: 0 chn_lid: 0 tad_limit: 0xC1F
C00: TADBASE[0]:
mirror_en: 0 en_failover: 0 ign_ptrl_uc: 0 base: 0xA20
NM_DRAM_RULE[0]:
rule_enable: 1 limit: 0xC1F nm_chn_ways: 0 nm_chn_gran: 1 nm_target_ways: 0 nm_gran_eq: 0 nm_chn_l2pid: 0x00FFFFF8
Logical Ch Id: 0 1 2 3 4 5 6 7
Physical Ch Id: 0 7 7 7 7 7 7 7
C00: NM_DRAM_RULE[0]:
Write 1LM Decoder CSR's for MC 1
C00: TADCHNILVOFFSET[0]:
target_ways: 0 chn_ways: 0 target_gran: 1 chn_gran: 1 tad_offset: 0xA20 tad_offset_sign: 0
C00: MCNMCACHINGCFG:
mcnmcachingenb: 0 mcpmemenb: 0 mcnmcachingpmemwt: 0
C01: MCNMCACHINGCFG:
mcnmcachingenb: 0 mcpmemenb: 0 mcnmcachingpmemwt: 0
Write Patrol and Sparing CSR's for MC 2
C00: TADWAYNESS[0]:
target_lid: 0 chn_lid: 0 tad_limit: 0xE1F
C00: TADBASE[0]:
mirror_en: 0 en_failover: 0 ign_ptrl_uc: 0 base: 0xC20
NM_DRAM_RULE[0]:
rule_enable: 1 limit: 0xE1F nm_chn_ways: 0 nm_chn_gran: 1 nm_target_ways: 0 nm_gran_eq: 0 nm_chn_l2pid: 0x00FFFFF8
Logical Ch Id: 0 1 2 3 4 5 6 7
Physical Ch Id: 0 7 7 7 7 7 7 7
C00: NM_DRAM_RULE[0]:
Write 1LM Decoder CSR's for MC 2
C00: TADCHNILVOFFSET[0]:
target_ways: 0 chn_ways: 0 target_gran: 1 chn_gran: 1 tad_offset: 0xC20 tad_offset_sign: 0
C00: MCNMCACHINGCFG:
mcnmcachingenb: 0 mcpmemenb: 0 mcnmcachingpmemwt: 0
C01: MCNMCACHINGCFG:
mcnmcachingenb: 0 mcpmemenb: 0 mcnmcachingpmemwt: 0
Write Patrol and Sparing CSR's for MC 3
C00: TADWAYNESS[0]:
target_lid: 0 chn_lid: 0 tad_limit: 0x101F
C00: TADBASE[0]:
mirror_en: 0 en_failover: 0 ign_ptrl_uc: 0 base: 0xE20
NM_DRAM_RULE[0]:
rule_enable: 1 limit: 0x101F nm_chn_ways: 0 nm_chn_gran: 1 nm_target_ways: 0 nm_gran_eq: 0 nm_chn_l2pid: 0x00FFFFF8
Logical Ch Id: 0 1 2 3 4 5 6 7
Physical Ch Id: 0 7 7 7 7 7 7 7
C00: NM_DRAM_RULE[0]:
Write 1LM Decoder CSR's for MC 3
C00: TADCHNILVOFFSET[0]:
target_ways: 0 chn_ways: 0 target_gran: 1 chn_gran: 1 tad_offset: 0xE20 tad_offset_sign: 0
C00: MCNMCACHINGCFG:
mcnmcachingenb: 0 mcpmemenb: 0 mcnmcachingpmemwt: 0
C01: MCNMCACHINGCFG:
mcnmcachingenb: 0 mcpmemenb: 0 mcnmcachingpmemwt: 0
Write Patrol and Sparing TAD range CSR's for HBM Stack 0 MC 0
C00: TADWAYNESS[0]:
target_lid: 0 chn_lid: 0 tad_limit: 0x1F
C00: TADBASE[0]:
mirror_en: 0 en_failover: 0 ign_ptrl_uc: 0 base: 0x0
C01: TADWAYNESS[0]:
target_lid: 0 chn_lid: 1 tad_limit: 0x1F
C01: TADBASE[0]:
mirror_en: 0 en_failover: 0 ign_ptrl_uc: 0 base: 0x0
Write Patrol and Sparing TAD range CSR's for HBM Stack 0 MC 1
C00: TADWAYNESS[0]:
target_lid: 0 chn_lid: 2 tad_limit: 0x1F
C00: TADBASE[0]:
mirror_en: 0 en_failover: 0 ign_ptrl_uc: 0 base: 0x0
C01: TADWAYNESS[0]:
target_lid: 0 chn_lid: 3 tad_limit: 0x1F
C01: TADBASE[0]:
mirror_en: 0 en_failover: 0 ign_ptrl_uc: 0 base: 0x0
Write Patrol and Sparing TAD range CSR's for HBM Stack 0 MC 2
C00: TADWAYNESS[0]:
target_lid: 0 chn_lid: 4 tad_limit: 0x1F
C00: TADBASE[0]:
mirror_en: 0 en_failover: 0 ign_ptrl_uc: 0 base: 0x0
C01: TADWAYNESS[0]:
target_lid: 0 chn_lid: 5 tad_limit: 0x1F
C01: TADBASE[0]:
mirror_en: 0 en_failover: 0 ign_ptrl_uc: 0 base: 0x0
Write Patrol and Sparing TAD range CSR's for HBM Stack 0 MC 3
C00: TADWAYNESS[0]:
target_lid: 0 chn_lid: 6 tad_limit: 0x1F
C00: TADBASE[0]:
mirror_en: 0 en_failover: 0 ign_ptrl_uc: 0 base: 0x0
C01: TADWAYNESS[0]:
target_lid: 0 chn_lid: 7 tad_limit: 0x1F
C01: TADBASE[0]:
mirror_en: 0 en_failover: 0 ign_ptrl_uc: 0 base: 0x0
Write Hbm Nm Caching Tad CSR's for HBM Stack 0 MC 0
C00: MCNMCACHINGCFG 2LM TAD:
nmcachingtaden: 1 nmcachingtad: 0
C01: MCNMCACHINGCFG 2LM TAD:
nmcachingtaden: 1 nmcachingtad: 0
Write Hbm Nm Caching Tad CSR's for HBM Stack 0 MC 1
C00: MCNMCACHINGCFG 2LM TAD:
nmcachingtaden: 1 nmcachingtad: 0
C01: MCNMCACHINGCFG 2LM TAD:
nmcachingtaden: 1 nmcachingtad: 0
Write Hbm Nm Caching Tad CSR's for HBM Stack 0 MC 2
C00: MCNMCACHINGCFG 2LM TAD:
nmcachingtaden: 1 nmcachingtad: 0
C01: MCNMCACHINGCFG 2LM TAD:
nmcachingtaden: 1 nmcachingtad: 0
Write Hbm Nm Caching Tad CSR's for HBM Stack 0 MC 3
C00: MCNMCACHINGCFG 2LM TAD:
nmcachingtaden: 1 nmcachingtad: 0
C01: MCNMCACHINGCFG 2LM TAD:
nmcachingtaden: 1 nmcachingtad: 0
Write 1LM Decoder CSR's for HBM Stack 0 MC 0
C00: TADCHNILVOFFSET[0]:
target_ways: 0 chn_ways: 0 target_gran: 1 chn_gran: 1 tad_offset: 0x0 tad_offset_sign: 0
C01: TADCHNILVOFFSET[0]:
target_ways: 0 chn_ways: 0 target_gran: 1 chn_gran: 1 tad_offset: 0x0 tad_offset_sign: 0
Write 1LM Decoder CSR's for HBM Stack 0 MC 1
C00: TADCHNILVOFFSET[0]:
target_ways: 0 chn_ways: 0 target_gran: 1 chn_gran: 1 tad_offset: 0x0 tad_offset_sign: 0
C01: TADCHNILVOFFSET[0]:
target_ways: 0 chn_ways: 0 target_gran: 1 chn_gran: 1 tad_offset: 0x0 tad_offset_sign: 0
Write 1LM Decoder CSR's for HBM Stack 0 MC 2
C00: TADCHNILVOFFSET[0]:
target_ways: 0 chn_ways: 0 target_gran: 1 chn_gran: 1 tad_offset: 0x0 tad_offset_sign: 0
C01: TADCHNILVOFFSET[0]:
target_ways: 0 chn_ways: 0 target_gran: 1 chn_gran: 1 tad_offset: 0x0 tad_offset_sign: 0
Write 1LM Decoder CSR's for HBM Stack 0 MC 3
C00: TADCHNILVOFFSET[0]:
target_ways: 0 chn_ways: 0 target_gran: 1 chn_gran: 1 tad_offset: 0x0 tad_offset_sign: 0
C01: TADCHNILVOFFSET[0]:
target_ways: 0 chn_ways: 0 target_gran: 1 chn_gran: 1 tad_offset: 0x0 tad_offset_sign: 0
Write MCNMCACHINGCFG for HBM Stack 0 MC 0
C00: MCNMCACHINGCFG:
mcnmcachingenb: 1 mcpmemenb: 0 mcnmcachingpmemwt: 0
C01: MCNMCACHINGCFG:
mcnmcachingenb: 1 mcpmemenb: 0 mcnmcachingpmemwt: 0
Write MCNMCACHINGCFG for HBM Stack 0 MC 1
C00: MCNMCACHINGCFG:
mcnmcachingenb: 1 mcpmemenb: 0 mcnmcachingpmemwt: 0
C01: MCNMCACHINGCFG:
mcnmcachingenb: 1 mcpmemenb: 0 mcnmcachingpmemwt: 0
Write MCNMCACHINGCFG for HBM Stack 0 MC 2
C00: MCNMCACHINGCFG:
mcnmcachingenb: 1 mcpmemenb: 0 mcnmcachingpmemwt: 0
C01: MCNMCACHINGCFG:
mcnmcachingenb: 1 mcpmemenb: 0 mcnmcachingpmemwt: 0
Write MCNMCACHINGCFG for HBM Stack 0 MC 3
C00: MCNMCACHINGCFG:
mcnmcachingenb: 1 mcpmemenb: 0 mcnmcachingpmemwt: 0
C01: MCNMCACHINGCFG:
mcnmcachingenb: 1 mcpmemenb: 0 mcnmcachingpmemwt: 0
Write 2LM NM Decoder CSR's for HBM Stack 0 MC 0
C00: CSR for force_lat bit : AMAP_MC_MAIN_REG: 0x52
C00: MCNMCACHINGINTLV:
nm_target_ways: 0 nm_chn_ways: 3 nm_target_lid: 0 nm_target_gran: 1 nm_chn_gran: 1 nm_chn_lid: 0
C00: MCNMCACHINGCFG_MC_2LM_REG:
en_2way: 0 prefer_way_sel: 0 chn_cap: 0xB nm_ratio_chn_cap: 0
C00: MCNMCACHINGOFFSET:
mcnmcachingoffsetlower: 0x2 mcnmcachingoffset: 0x4 mcnmcachingoffseten: 1
C01: CSR for force_lat bit : AMAP_MC_MAIN_REG: 0x52
C01: MCNMCACHINGINTLV:
nm_target_ways: 0 nm_chn_ways: 3 nm_target_lid: 0 nm_target_gran: 1 nm_chn_gran: 1 nm_chn_lid: 1
C01: MCNMCACHINGCFG_MC_2LM_REG:
en_2way: 0 prefer_way_sel: 0 chn_cap: 0xB nm_ratio_chn_cap: 0
C01: MCNMCACHINGOFFSET:
mcnmcachingoffsetlower: 0x2 mcnmcachingoffset: 0x4 mcnmcachingoffseten: 1
Write 2LM NM Decoder CSR's for HBM Stack 0 MC 1
C00: CSR for force_lat bit : AMAP_MC_MAIN_REG: 0x52
C00: MCNMCACHINGINTLV:
nm_target_ways: 0 nm_chn_ways: 3 nm_target_lid: 0 nm_target_gran: 1 nm_chn_gran: 1 nm_chn_lid: 2
C00: MCNMCACHINGCFG_MC_2LM_REG:
en_2way: 0 prefer_way_sel: 0 chn_cap: 0xB nm_ratio_chn_cap: 0
C00: MCNMCACHINGOFFSET:
mcnmcachingoffsetlower: 0x2 mcnmcachingoffset: 0x4 mcnmcachingoffseten: 1
C01: CSR for force_lat bit : AMAP_MC_MAIN_REG: 0x52
C01: MCNMCACHINGINTLV:
nm_target_ways: 0 nm_chn_ways: 3 nm_target_lid: 0 nm_target_gran: 1 nm_chn_gran: 1 nm_chn_lid: 3
C01: MCNMCACHINGCFG_MC_2LM_REG:
en_2way: 0 prefer_way_sel: 0 chn_cap: 0xB nm_ratio_chn_cap: 0
C01: MCNMCACHINGOFFSET:
mcnmcachingoffsetlower: 0x2 mcnmcachingoffset: 0x4 mcnmcachingoffseten: 1
Write 2LM NM Decoder CSR's for HBM Stack 0 MC 2
C00: CSR for force_lat bit : AMAP_MC_MAIN_REG: 0x52
C00: MCNMCACHINGINTLV:
nm_target_ways: 0 nm_chn_ways: 3 nm_target_lid: 0 nm_target_gran: 1 nm_chn_gran: 1 nm_chn_lid: 4
C00: MCNMCACHINGCFG_MC_2LM_REG:
en_2way: 0 prefer_way_sel: 0 chn_cap: 0xB nm_ratio_chn_cap: 0
C00: MCNMCACHINGOFFSET:
mcnmcachingoffsetlower: 0x2 mcnmcachingoffset: 0x4 mcnmcachingoffseten: 1
C01: CSR for force_lat bit : AMAP_MC_MAIN_REG: 0x52
C01: MCNMCACHINGINTLV:
nm_target_ways: 0 nm_chn_ways: 3 nm_target_lid: 0 nm_target_gran: 1 nm_chn_gran: 1 nm_chn_lid: 5
C01: MCNMCACHINGCFG_MC_2LM_REG:
en_2way: 0 prefer_way_sel: 0 chn_cap: 0xB nm_ratio_chn_cap: 0
C01: MCNMCACHINGOFFSET:
mcnmcachingoffsetlower: 0x2 mcnmcachingoffset: 0x4 mcnmcachingoffseten: 1
Write 2LM NM Decoder CSR's for HBM Stack 0 MC 3
C00: CSR for force_lat bit : AMAP_MC_MAIN_REG: 0x52
C00: MCNMCACHINGINTLV:
nm_target_ways: 0 nm_chn_ways: 3 nm_target_lid: 0 nm_target_gran: 1 nm_chn_gran: 1 nm_chn_lid: 6
C00: MCNMCACHINGCFG_MC_2LM_REG:
en_2way: 0 prefer_way_sel: 0 chn_cap: 0xB nm_ratio_chn_cap: 0
C00: MCNMCACHINGOFFSET:
mcnmcachingoffsetlower: 0x2 mcnmcachingoffset: 0x4 mcnmcachingoffseten: 1
C01: CSR for force_lat bit : AMAP_MC_MAIN_REG: 0x52
C01: MCNMCACHINGINTLV:
nm_target_ways: 0 nm_chn_ways: 3 nm_target_lid: 0 nm_target_gran: 1 nm_chn_gran: 1 nm_chn_lid: 7
C01: MCNMCACHINGCFG_MC_2LM_REG:
en_2way: 0 prefer_way_sel: 0 chn_cap: 0xB nm_ratio_chn_cap: 0
C01: MCNMCACHINGOFFSET:
mcnmcachingoffsetlower: 0x2 mcnmcachingoffset: 0x4 mcnmcachingoffseten: 1
Write 2LM FM Decoder CSR's for HBM Stack 0 MC 0 TAD 0
C00: DRAM_RULE[0]:
rule_enable: 1 limit: 0xA1F fm_target: 0 fm_chn_ways: 0 fm_chn_gran: 1 fm_target_ways: 0 fm_gran_eq: 0 fm_chn_l2pid: 0x00000000
C01: DRAM_RULE[0]:
rule_enable: 1 limit: 0xA1F fm_target: 0 fm_chn_ways: 0 fm_chn_gran: 1 fm_target_ways: 0 fm_gran_eq: 0 fm_chn_l2pid: 0x00000000
Write 2LM FM Decoder CSR's for HBM Stack 0 MC 1 TAD 0
C00: DRAM_RULE[0]:
rule_enable: 1 limit: 0xA1F fm_target: 0 fm_chn_ways: 0 fm_chn_gran: 1 fm_target_ways: 0 fm_gran_eq: 0 fm_chn_l2pid: 0x00000000
C01: DRAM_RULE[0]:
rule_enable: 1 limit: 0xA1F fm_target: 0 fm_chn_ways: 0 fm_chn_gran: 1 fm_target_ways: 0 fm_gran_eq: 0 fm_chn_l2pid: 0x00000000
Write 2LM FM Decoder CSR's for HBM Stack 0 MC 2 TAD 0
C00: DRAM_RULE[0]:
rule_enable: 1 limit: 0xA1F fm_target: 0 fm_chn_ways: 0 fm_chn_gran: 1 fm_target_ways: 0 fm_gran_eq: 0 fm_chn_l2pid: 0x00000000
C01: DRAM_RULE[0]:
rule_enable: 1 limit: 0xA1F fm_target: 0 fm_chn_ways: 0 fm_chn_gran: 1 fm_target_ways: 0 fm_gran_eq: 0 fm_chn_l2pid: 0x00000000
Write 2LM FM Decoder CSR's for HBM Stack 0 MC 3 TAD 0
C00: DRAM_RULE[0]:
rule_enable: 1 limit: 0xA1F fm_target: 0 fm_chn_ways: 0 fm_chn_gran: 1 fm_target_ways: 0 fm_gran_eq: 0 fm_chn_l2pid: 0x00000000
C01: DRAM_RULE[0]:
rule_enable: 1 limit: 0xA1F fm_target: 0 fm_chn_ways: 0 fm_chn_gran: 1 fm_target_ways: 0 fm_gran_eq: 0 fm_chn_l2pid: 0x00000000
Write Patrol and Sparing TAD range CSR's for HBM Stack 1 MC 0
C00: TADWAYNESS[0]:
target_lid: 0 chn_lid: 0 tad_limit: 0x1F
C00: TADBASE[0]:
mirror_en: 0 en_failover: 0 ign_ptrl_uc: 0 base: 0x0
C01: TADWAYNESS[0]:
target_lid: 0 chn_lid: 1 tad_limit: 0x1F
C01: TADBASE[0]:
mirror_en: 0 en_failover: 0 ign_ptrl_uc: 0 base: 0x0
Write Patrol and Sparing TAD range CSR's for HBM Stack 1 MC 1
C00: TADWAYNESS[0]:
target_lid: 0 chn_lid: 2 tad_limit: 0x1F
C00: TADBASE[0]:
mirror_en: 0 en_failover: 0 ign_ptrl_uc: 0 base: 0x0
C01: TADWAYNESS[0]:
target_lid: 0 chn_lid: 3 tad_limit: 0x1F
C01: TADBASE[0]:
mirror_en: 0 en_failover: 0 ign_ptrl_uc: 0 base: 0x0
Write Patrol and Sparing TAD range CSR's for HBM Stack 1 MC 2
C00: TADWAYNESS[0]:
target_lid: 0 chn_lid: 4 tad_limit: 0x1F
C00: TADBASE[0]:
mirror_en: 0 en_failover: 0 ign_ptrl_uc: 0 base: 0x0
C01: TADWAYNESS[0]:
target_lid: 0 chn_lid: 5 tad_limit: 0x1F
C01: TADBASE[0]:
mirror_en: 0 en_failover: 0 ign_ptrl_uc: 0 base: 0x0
Write Patrol and Sparing TAD range CSR's for HBM Stack 1 MC 3
C00: TADWAYNESS[0]:
target_lid: 0 chn_lid: 6 tad_limit: 0x1F
C00: TADBASE[0]:
mirror_en: 0 en_failover: 0 ign_ptrl_uc: 0 base: 0x0
C01: TADWAYNESS[0]:
target_lid: 0 chn_lid: 7 tad_limit: 0x1F
C01: TADBASE[0]:
mirror_en: 0 en_failover: 0 ign_ptrl_uc: 0 base: 0x0
Write Hbm Nm Caching Tad CSR's for HBM Stack 1 MC 0
C00: MCNMCACHINGCFG 2LM TAD:
nmcachingtaden: 1 nmcachingtad: 0
C01: MCNMCACHINGCFG 2LM TAD:
nmcachingtaden: 1 nmcachingtad: 0
Write Hbm Nm Caching Tad CSR's for HBM Stack 1 MC 1
C00: MCNMCACHINGCFG 2LM TAD:
nmcachingtaden: 1 nmcachingtad: 0
C01: MCNMCACHINGCFG 2LM TAD:
nmcachingtaden: 1 nmcachingtad: 0
Write Hbm Nm Caching Tad CSR's for HBM Stack 1 MC 2
C00: MCNMCACHINGCFG 2LM TAD:
nmcachingtaden: 1 nmcachingtad: 0
C01: MCNMCACHINGCFG 2LM TAD:
nmcachingtaden: 1 nmcachingtad: 0
Write Hbm Nm Caching Tad CSR's for HBM Stack 1 MC 3
C00: MCNMCACHINGCFG 2LM TAD:
nmcachingtaden: 1 nmcachingtad: 0
C01: MCNMCACHINGCFG 2LM TAD:
nmcachingtaden: 1 nmcachingtad: 0
Write 1LM Decoder CSR's for HBM Stack 1 MC 0
C00: TADCHNILVOFFSET[0]:
target_ways: 0 chn_ways: 0 target_gran: 1 chn_gran: 1 tad_offset: 0x0 tad_offset_sign: 0
C01: TADCHNILVOFFSET[0]:
target_ways: 0 chn_ways: 0 target_gran: 1 chn_gran: 1 tad_offset: 0x0 tad_offset_sign: 0
Write 1LM Decoder CSR's for HBM Stack 1 MC 1
C00: TADCHNILVOFFSET[0]:
target_ways: 0 chn_ways: 0 target_gran: 1 chn_gran: 1 tad_offset: 0x0 tad_offset_sign: 0
C01: TADCHNILVOFFSET[0]:
target_ways: 0 chn_ways: 0 target_gran: 1 chn_gran: 1 tad_offset: 0x0 tad_offset_sign: 0
Write 1LM Decoder CSR's for HBM Stack 1 MC 2
C00: TADCHNILVOFFSET[0]:
target_ways: 0 chn_ways: 0 target_gran: 1 chn_gran: 1 tad_offset: 0x0 tad_offset_sign: 0
C01: TADCHNILVOFFSET[0]:
target_ways: 0 chn_ways: 0 target_gran: 1 chn_gran: 1 tad_offset: 0x0 tad_offset_sign: 0
Write 1LM Decoder CSR's for HBM Stack 1 MC 3
C00: TADCHNILVOFFSET[0]:
target_ways: 0 chn_ways: 0 target_gran: 1 chn_gran: 1 tad_offset: 0x0 tad_offset_sign: 0
C01: TADCHNILVOFFSET[0]:
target_ways: 0 chn_ways: 0 target_gran: 1 chn_gran: 1 tad_offset: 0x0 tad_offset_sign: 0
Write MCNMCACHINGCFG for HBM Stack 1 MC 0
C00: MCNMCACHINGCFG:
mcnmcachingenb: 1 mcpmemenb: 0 mcnmcachingpmemwt: 0
C01: MCNMCACHINGCFG:
mcnmcachingenb: 1 mcpmemenb: 0 mcnmcachingpmemwt: 0
Write MCNMCACHINGCFG for HBM Stack 1 MC 1
C00: MCNMCACHINGCFG:
mcnmcachingenb: 1 mcpmemenb: 0 mcnmcachingpmemwt: 0
C01: MCNMCACHINGCFG:
mcnmcachingenb: 1 mcpmemenb: 0 mcnmcachingpmemwt: 0
Write MCNMCACHINGCFG for HBM Stack 1 MC 2
C00: MCNMCACHINGCFG:
mcnmcachingenb: 1 mcpmemenb: 0 mcnmcachingpmemwt: 0
C01: MCNMCACHINGCFG:
mcnmcachingenb: 1 mcpmemenb: 0 mcnmcachingpmemwt: 0
Write MCNMCACHINGCFG for HBM Stack 1 MC 3
C00: MCNMCACHINGCFG:
mcnmcachingenb: 1 mcpmemenb: 0 mcnmcachingpmemwt: 0
C01: MCNMCACHINGCFG:
mcnmcachingenb: 1 mcpmemenb: 0 mcnmcachingpmemwt: 0
Write 2LM NM Decoder CSR's for HBM Stack 1 MC 0
C00: CSR for force_lat bit : AMAP_MC_MAIN_REG: 0x52
C00: MCNMCACHINGINTLV:
nm_target_ways: 0 nm_chn_ways: 3 nm_target_lid: 0 nm_target_gran: 1 nm_chn_gran: 1 nm_chn_lid: 0
C00: MCNMCACHINGCFG_MC_2LM_REG:
en_2way: 0 prefer_way_sel: 0 chn_cap: 0xB nm_ratio_chn_cap: 0
C00: MCNMCACHINGOFFSET:
mcnmcachingoffsetlower: 0x2 mcnmcachingoffset: 0x5 mcnmcachingoffseten: 1
C01: CSR for force_lat bit : AMAP_MC_MAIN_REG: 0x52
C01: MCNMCACHINGINTLV:
nm_target_ways: 0 nm_chn_ways: 3 nm_target_lid: 0 nm_target_gran: 1 nm_chn_gran: 1 nm_chn_lid: 1
C01: MCNMCACHINGCFG_MC_2LM_REG:
en_2way: 0 prefer_way_sel: 0 chn_cap: 0xB nm_ratio_chn_cap: 0
C01: MCNMCACHINGOFFSET:
mcnmcachingoffsetlower: 0x2 mcnmcachingoffset: 0x5 mcnmcachingoffseten: 1
Write 2LM NM Decoder CSR's for HBM Stack 1 MC 1
C00: CSR for force_lat bit : AMAP_MC_MAIN_REG: 0x52
C00: MCNMCACHINGINTLV:
nm_target_ways: 0 nm_chn_ways: 3 nm_target_lid: 0 nm_target_gran: 1 nm_chn_gran: 1 nm_chn_lid: 2
C00: MCNMCACHINGCFG_MC_2LM_REG:
en_2way: 0 prefer_way_sel: 0 chn_cap: 0xB nm_ratio_chn_cap: 0
C00: MCNMCACHINGOFFSET:
mcnmcachingoffsetlower: 0x2 mcnmcachingoffset: 0x5 mcnmcachingoffseten: 1
C01: CSR for force_lat bit : AMAP_MC_MAIN_REG: 0x52
C01: MCNMCACHINGINTLV:
nm_target_ways: 0 nm_chn_ways: 3 nm_target_lid: 0 nm_target_gran: 1 nm_chn_gran: 1 nm_chn_lid: 3
C01: MCNMCACHINGCFG_MC_2LM_REG:
en_2way: 0 prefer_way_sel: 0 chn_cap: 0xB nm_ratio_chn_cap: 0
C01: MCNMCACHINGOFFSET:
mcnmcachingoffsetlower: 0x2 mcnmcachingoffset: 0x5 mcnmcachingoffseten: 1
Write 2LM NM Decoder CSR's for HBM Stack 1 MC 2
C00: CSR for force_lat bit : AMAP_MC_MAIN_REG: 0x52
C00: MCNMCACHINGINTLV:
nm_target_ways: 0 nm_chn_ways: 3 nm_target_lid: 0 nm_target_gran: 1 nm_chn_gran: 1 nm_chn_lid: 4
C00: MCNMCACHINGCFG_MC_2LM_REG:
en_2way: 0 prefer_way_sel: 0 chn_cap: 0xB nm_ratio_chn_cap: 0
C00: MCNMCACHINGOFFSET:
mcnmcachingoffsetlower: 0x2 mcnmcachingoffset: 0x5 mcnmcachingoffseten: 1
C01: CSR for force_lat bit : AMAP_MC_MAIN_REG: 0x52
C01: MCNMCACHINGINTLV:
nm_target_ways: 0 nm_chn_ways: 3 nm_target_lid: 0 nm_target_gran: 1 nm_chn_gran: 1 nm_chn_lid: 5
C01: MCNMCACHINGCFG_MC_2LM_REG:
en_2way: 0 prefer_way_sel: 0 chn_cap: 0xB nm_ratio_chn_cap: 0
C01: MCNMCACHINGOFFSET:
mcnmcachingoffsetlower: 0x2 mcnmcachingoffset: 0x5 mcnmcachingoffseten: 1
Write 2LM NM Decoder CSR's for HBM Stack 1 MC 3
C00: CSR for force_lat bit : AMAP_MC_MAIN_REG: 0x52
C00: MCNMCACHINGINTLV:
nm_target_ways: 0 nm_chn_ways: 3 nm_target_lid: 0 nm_target_gran: 1 nm_chn_gran: 1 nm_chn_lid: 6
C00: MCNMCACHINGCFG_MC_2LM_REG:
en_2way: 0 prefer_way_sel: 0 chn_cap: 0xB nm_ratio_chn_cap: 0
C00: MCNMCACHINGOFFSET:
mcnmcachingoffsetlower: 0x2 mcnmcachingoffset: 0x5 mcnmcachingoffseten: 1
C01: CSR for force_lat bit : AMAP_MC_MAIN_REG: 0x52
C01: MCNMCACHINGINTLV:
nm_target_ways: 0 nm_chn_ways: 3 nm_target_lid: 0 nm_target_gran: 1 nm_chn_gran: 1 nm_chn_lid: 7
C01: MCNMCACHINGCFG_MC_2LM_REG:
en_2way: 0 prefer_way_sel: 0 chn_cap: 0xB nm_ratio_chn_cap: 0
C01: MCNMCACHINGOFFSET:
mcnmcachingoffsetlower: 0x2 mcnmcachingoffset: 0x5 mcnmcachingoffseten: 1
Write 2LM FM Decoder CSR's for HBM Stack 1 MC 0 TAD 0
C00: DRAM_RULE[0]:
rule_enable: 1 limit: 0xC1F fm_target: 0 fm_chn_ways: 0 fm_chn_gran: 1 fm_target_ways: 0 fm_gran_eq: 0 fm_chn_l2pid: 0x00000000
C01: DRAM_RULE[0]:
rule_enable: 1 limit: 0xC1F fm_target: 0 fm_chn_ways: 0 fm_chn_gran: 1 fm_target_ways: 0 fm_gran_eq: 0 fm_chn_l2pid: 0x00000000
Write 2LM FM Decoder CSR's for HBM Stack 1 MC 1 TAD 0
C00: DRAM_RULE[0]:
rule_enable: 1 limit: 0xC1F fm_target: 0 fm_chn_ways: 0 fm_chn_gran: 1 fm_target_ways: 0 fm_gran_eq: 0 fm_chn_l2pid: 0x00000000
C01: DRAM_RULE[0]:
rule_enable: 1 limit: 0xC1F fm_target: 0 fm_chn_ways: 0 fm_chn_gran: 1 fm_target_ways: 0 fm_gran_eq: 0 fm_chn_l2pid: 0x00000000
Write 2LM FM Decoder CSR's for HBM Stack 1 MC 2 TAD 0
C00: DRAM_RULE[0]:
rule_enable: 1 limit: 0xC1F fm_target: 0 fm_chn_ways: 0 fm_chn_gran: 1 fm_target_ways: 0 fm_gran_eq: 0 fm_chn_l2pid: 0x00000000
C01: DRAM_RULE[0]:
rule_enable: 1 limit: 0xC1F fm_target: 0 fm_chn_ways: 0 fm_chn_gran: 1 fm_target_ways: 0 fm_gran_eq: 0 fm_chn_l2pid: 0x00000000
Write 2LM FM Decoder CSR's for HBM Stack 1 MC 3 TAD 0
C00: DRAM_RULE[0]:
rule_enable: 1 limit: 0xC1F fm_target: 0 fm_chn_ways: 0 fm_chn_gran: 1 fm_target_ways: 0 fm_gran_eq: 0 fm_chn_l2pid: 0x00000000
C01: DRAM_RULE[0]:
rule_enable: 1 limit: 0xC1F fm_target: 0 fm_chn_ways: 0 fm_chn_gran: 1 fm_target_ways: 0 fm_gran_eq: 0 fm_chn_l2pid: 0x00000000
Write Patrol and Sparing TAD range CSR's for HBM Stack 2 MC 0
C00: TADWAYNESS[0]:
target_lid: 0 chn_lid: 0 tad_limit: 0x1F
C00: TADBASE[0]:
mirror_en: 0 en_failover: 0 ign_ptrl_uc: 0 base: 0x0
C01: TADWAYNESS[0]:
target_lid: 0 chn_lid: 1 tad_limit: 0x1F
C01: TADBASE[0]:
mirror_en: 0 en_failover: 0 ign_ptrl_uc: 0 base: 0x0
Write Patrol and Sparing TAD range CSR's for HBM Stack 2 MC 1
C00: TADWAYNESS[0]:
target_lid: 0 chn_lid: 2 tad_limit: 0x1F
C00: TADBASE[0]:
mirror_en: 0 en_failover: 0 ign_ptrl_uc: 0 base: 0x0
C01: TADWAYNESS[0]:
target_lid: 0 chn_lid: 3 tad_limit: 0x1F
C01: TADBASE[0]:
mirror_en: 0 en_failover: 0 ign_ptrl_uc: 0 base: 0x0
Write Patrol and Sparing TAD range CSR's for HBM Stack 2 MC 2
C00: TADWAYNESS[0]:
target_lid: 0 chn_lid: 4 tad_limit: 0x1F
C00: TADBASE[0]:
mirror_en: 0 en_failover: 0 ign_ptrl_uc: 0 base: 0x0
C01: TADWAYNESS[0]:
target_lid: 0 chn_lid: 5 tad_limit: 0x1F
C01: TADBASE[0]:
mirror_en: 0 en_failover: 0 ign_ptrl_uc: 0 base: 0x0
Write Patrol and Sparing TAD range CSR's for HBM Stack 2 MC 3
C00: TADWAYNESS[0]:
target_lid: 0 chn_lid: 6 tad_limit: 0x1F
C00: TADBASE[0]:
mirror_en: 0 en_failover: 0 ign_ptrl_uc: 0 base: 0x0
C01: TADWAYNESS[0]:
target_lid: 0 chn_lid: 7 tad_limit: 0x1F
C01: TADBASE[0]:
mirror_en: 0 en_failover: 0 ign_ptrl_uc: 0 base: 0x0
Write Hbm Nm Caching Tad CSR's for HBM Stack 2 MC 0
C00: MCNMCACHINGCFG 2LM TAD:
nmcachingtaden: 1 nmcachingtad: 0
C01: MCNMCACHINGCFG 2LM TAD:
nmcachingtaden: 1 nmcachingtad: 0
Write Hbm Nm Caching Tad CSR's for HBM Stack 2 MC 1
C00: MCNMCACHINGCFG 2LM TAD:
nmcachingtaden: 1 nmcachingtad: 0
C01: MCNMCACHINGCFG 2LM TAD:
nmcachingtaden: 1 nmcachingtad: 0
Write Hbm Nm Caching Tad CSR's for HBM Stack 2 MC 2
C00: MCNMCACHINGCFG 2LM TAD:
nmcachingtaden: 1 nmcachingtad: 0
C01: MCNMCACHINGCFG 2LM TAD:
nmcachingtaden: 1 nmcachingtad: 0
Write Hbm Nm Caching Tad CSR's for HBM Stack 2 MC 3
C00: MCNMCACHINGCFG 2LM TAD:
nmcachingtaden: 1 nmcachingtad: 0
C01: MCNMCACHINGCFG 2LM TAD:
nmcachingtaden: 1 nmcachingtad: 0
Write 1LM Decoder CSR's for HBM Stack 2 MC 0
C00: TADCHNILVOFFSET[0]:
target_ways: 0 chn_ways: 0 target_gran: 1 chn_gran: 1 tad_offset: 0x0 tad_offset_sign: 0
C01: TADCHNILVOFFSET[0]:
target_ways: 0 chn_ways: 0 target_gran: 1 chn_gran: 1 tad_offset: 0x0 tad_offset_sign: 0
Write 1LM Decoder CSR's for HBM Stack 2 MC 1
C00: TADCHNILVOFFSET[0]:
target_ways: 0 chn_ways: 0 target_gran: 1 chn_gran: 1 tad_offset: 0x0 tad_offset_sign: 0
C01: TADCHNILVOFFSET[0]:
target_ways: 0 chn_ways: 0 target_gran: 1 chn_gran: 1 tad_offset: 0x0 tad_offset_sign: 0
Write 1LM Decoder CSR's for HBM Stack 2 MC 2
C00: TADCHNILVOFFSET[0]:
target_ways: 0 chn_ways: 0 target_gran: 1 chn_gran: 1 tad_offset: 0x0 tad_offset_sign: 0
C01: TADCHNILVOFFSET[0]:
target_ways: 0 chn_ways: 0 target_gran: 1 chn_gran: 1 tad_offset: 0x0 tad_offset_sign: 0
Write 1LM Decoder CSR's for HBM Stack 2 MC 3
C00: TADCHNILVOFFSET[0]:
target_ways: 0 chn_ways: 0 target_gran: 1 chn_gran: 1 tad_offset: 0x0 tad_offset_sign: 0
C01: TADCHNILVOFFSET[0]:
target_ways: 0 chn_ways: 0 target_gran: 1 chn_gran: 1 tad_offset: 0x0 tad_offset_sign: 0
Write MCNMCACHINGCFG for HBM Stack 2 MC 0
C00: MCNMCACHINGCFG:
mcnmcachingenb: 1 mcpmemenb: 0 mcnmcachingpmemwt: 0
C01: MCNMCACHINGCFG:
mcnmcachingenb: 1 mcpmemenb: 0 mcnmcachingpmemwt: 0
Write MCNMCACHINGCFG for HBM Stack 2 MC 1
C00: MCNMCACHINGCFG:
mcnmcachingenb: 1 mcpmemenb: 0 mcnmcachingpmemwt: 0
C01: MCNMCACHINGCFG:
mcnmcachingenb: 1 mcpmemenb: 0 mcnmcachingpmemwt: 0
Write MCNMCACHINGCFG for HBM Stack 2 MC 2
C00: MCNMCACHINGCFG:
mcnmcachingenb: 1 mcpmemenb: 0 mcnmcachingpmemwt: 0
C01: MCNMCACHINGCFG:
mcnmcachingenb: 1 mcpmemenb: 0 mcnmcachingpmemwt: 0
Write MCNMCACHINGCFG for HBM Stack 2 MC 3
C00: MCNMCACHINGCFG:
mcnmcachingenb: 1 mcpmemenb: 0 mcnmcachingpmemwt: 0
C01: MCNMCACHINGCFG:
mcnmcachingenb: 1 mcpmemenb: 0 mcnmcachingpmemwt: 0
Write 2LM NM Decoder CSR's for HBM Stack 2 MC 0
C00: CSR for force_lat bit : AMAP_MC_MAIN_REG: 0x52
C00: MCNMCACHINGINTLV:
nm_target_ways: 0 nm_chn_ways: 3 nm_target_lid: 0 nm_target_gran: 1 nm_chn_gran: 1 nm_chn_lid: 0
C00: MCNMCACHINGCFG_MC_2LM_REG:
en_2way: 0 prefer_way_sel: 0 chn_cap: 0xB nm_ratio_chn_cap: 0
C00: MCNMCACHINGOFFSET:
mcnmcachingoffsetlower: 0x2 mcnmcachingoffset: 0x6 mcnmcachingoffseten: 1
C01: CSR for force_lat bit : AMAP_MC_MAIN_REG: 0x52
C01: MCNMCACHINGINTLV:
nm_target_ways: 0 nm_chn_ways: 3 nm_target_lid: 0 nm_target_gran: 1 nm_chn_gran: 1 nm_chn_lid: 1
C01: MCNMCACHINGCFG_MC_2LM_REG:
en_2way: 0 prefer_way_sel: 0 chn_cap: 0xB nm_ratio_chn_cap: 0
C01: MCNMCACHINGOFFSET:
mcnmcachingoffsetlower: 0x2 mcnmcachingoffset: 0x6 mcnmcachingoffseten: 1
Write 2LM NM Decoder CSR's for HBM Stack 2 MC 1
C00: CSR for force_lat bit : AMAP_MC_MAIN_REG: 0x52
C00: MCNMCACHINGINTLV:
nm_target_ways: 0 nm_chn_ways: 3 nm_target_lid: 0 nm_target_gran: 1 nm_chn_gran: 1 nm_chn_lid: 2
C00: MCNMCACHINGCFG_MC_2LM_REG:
en_2way: 0 prefer_way_sel: 0 chn_cap: 0xB nm_ratio_chn_cap: 0
C00: MCNMCACHINGOFFSET:
mcnmcachingoffsetlower: 0x2 mcnmcachingoffset: 0x6 mcnmcachingoffseten: 1
C01: CSR for force_lat bit : AMAP_MC_MAIN_REG: 0x52
C01: MCNMCACHINGINTLV:
nm_target_ways: 0 nm_chn_ways: 3 nm_target_lid: 0 nm_target_gran: 1 nm_chn_gran: 1 nm_chn_lid: 3
C01: MCNMCACHINGCFG_MC_2LM_REG:
en_2way: 0 prefer_way_sel: 0 chn_cap: 0xB nm_ratio_chn_cap: 0
C01: MCNMCACHINGOFFSET:
mcnmcachingoffsetlower: 0x2 mcnmcachingoffset: 0x6 mcnmcachingoffseten: 1
Write 2LM NM Decoder CSR's for HBM Stack 2 MC 2
C00: CSR for force_lat bit : AMAP_MC_MAIN_REG: 0x52
C00: MCNMCACHINGINTLV:
nm_target_ways: 0 nm_chn_ways: 3 nm_target_lid: 0 nm_target_gran: 1 nm_chn_gran: 1 nm_chn_lid: 4
C00: MCNMCACHINGCFG_MC_2LM_REG:
en_2way: 0 prefer_way_sel: 0 chn_cap: 0xB nm_ratio_chn_cap: 0
C00: MCNMCACHINGOFFSET:
mcnmcachingoffsetlower: 0x2 mcnmcachingoffset: 0x6 mcnmcachingoffseten: 1
C01: CSR for force_lat bit : AMAP_MC_MAIN_REG: 0x52
C01: MCNMCACHINGINTLV:
nm_target_ways: 0 nm_chn_ways: 3 nm_target_lid: 0 nm_target_gran: 1 nm_chn_gran: 1 nm_chn_lid: 5
C01: MCNMCACHINGCFG_MC_2LM_REG:
en_2way: 0 prefer_way_sel: 0 chn_cap: 0xB nm_ratio_chn_cap: 0
C01: MCNMCACHINGOFFSET:
mcnmcachingoffsetlower: 0x2 mcnmcachingoffset: 0x6 mcnmcachingoffseten: 1
Write 2LM NM Decoder CSR's for HBM Stack 2 MC 3
C00: CSR for force_lat bit : AMAP_MC_MAIN_REG: 0x52
C00: MCNMCACHINGINTLV:
nm_target_ways: 0 nm_chn_ways: 3 nm_target_lid: 0 nm_target_gran: 1 nm_chn_gran: 1 nm_chn_lid: 6
C00: MCNMCACHINGCFG_MC_2LM_REG:
en_2way: 0 prefer_way_sel: 0 chn_cap: 0xB nm_ratio_chn_cap: 0
C00: MCNMCACHINGOFFSET:
mcnmcachingoffsetlower: 0x2 mcnmcachingoffset: 0x6 mcnmcachingoffseten: 1
C01: CSR for force_lat bit : AMAP_MC_MAIN_REG: 0x52
C01: MCNMCACHINGINTLV:
nm_target_ways: 0 nm_chn_ways: 3 nm_target_lid: 0 nm_target_gran: 1 nm_chn_gran: 1 nm_chn_lid: 7
C01: MCNMCACHINGCFG_MC_2LM_REG:
en_2way: 0 prefer_way_sel: 0 chn_cap: 0xB nm_ratio_chn_cap: 0
C01: MCNMCACHINGOFFSET:
mcnmcachingoffsetlower: 0x2 mcnmcachingoffset: 0x6 mcnmcachingoffseten: 1
Write 2LM FM Decoder CSR's for HBM Stack 2 MC 0 TAD 0
C00: DRAM_RULE[0]:
rule_enable: 1 limit: 0xE1F fm_target: 0 fm_chn_ways: 0 fm_chn_gran: 1 fm_target_ways: 0 fm_gran_eq: 0 fm_chn_l2pid: 0x00000000
C01: DRAM_RULE[0]:
rule_enable: 1 limit: 0xE1F fm_target: 0 fm_chn_ways: 0 fm_chn_gran: 1 fm_target_ways: 0 fm_gran_eq: 0 fm_chn_l2pid: 0x00000000
Write 2LM FM Decoder CSR's for HBM Stack 2 MC 1 TAD 0
C00: DRAM_RULE[0]:
rule_enable: 1 limit: 0xE1F fm_target: 0 fm_chn_ways: 0 fm_chn_gran: 1 fm_target_ways: 0 fm_gran_eq: 0 fm_chn_l2pid: 0x00000000
C01: DRAM_RULE[0]:
rule_enable: 1 limit: 0xE1F fm_target: 0 fm_chn_ways: 0 fm_chn_gran: 1 fm_target_ways: 0 fm_gran_eq: 0 fm_chn_l2pid: 0x00000000
Write 2LM FM Decoder CSR's for HBM Stack 2 MC 2 TAD 0
C00: DRAM_RULE[0]:
rule_enable: 1 limit: 0xE1F fm_target: 0 fm_chn_ways: 0 fm_chn_gran: 1 fm_target_ways: 0 fm_gran_eq: 0 fm_chn_l2pid: 0x00000000
C01: DRAM_RULE[0]:
rule_enable: 1 limit: 0xE1F fm_target: 0 fm_chn_ways: 0 fm_chn_gran: 1 fm_target_ways: 0 fm_gran_eq: 0 fm_chn_l2pid: 0x00000000
Write 2LM FM Decoder CSR's for HBM Stack 2 MC 3 TAD 0
C00: DRAM_RULE[0]:
rule_enable: 1 limit: 0xE1F fm_target: 0 fm_chn_ways: 0 fm_chn_gran: 1 fm_target_ways: 0 fm_gran_eq: 0 fm_chn_l2pid: 0x00000000
C01: DRAM_RULE[0]:
rule_enable: 1 limit: 0xE1F fm_target: 0 fm_chn_ways: 0 fm_chn_gran: 1 fm_target_ways: 0 fm_gran_eq: 0 fm_chn_l2pid: 0x00000000
Write Patrol and Sparing TAD range CSR's for HBM Stack 3 MC 0
C00: TADWAYNESS[0]:
target_lid: 0 chn_lid: 0 tad_limit: 0x1F
C00: TADBASE[0]:
mirror_en: 0 en_failover: 0 ign_ptrl_uc: 0 base: 0x0
C01: TADWAYNESS[0]:
target_lid: 0 chn_lid: 1 tad_limit: 0x1F
C01: TADBASE[0]:
mirror_en: 0 en_failover: 0 ign_ptrl_uc: 0 base: 0x0
Write Patrol and Sparing TAD range CSR's for HBM Stack 3 MC 1
C00: TADWAYNESS[0]:
target_lid: 0 chn_lid: 2 tad_limit: 0x1F
C00: TADBASE[0]:
mirror_en: 0 en_failover: 0 ign_ptrl_uc: 0 base: 0x0
C01: TADWAYNESS[0]:
target_lid: 0 chn_lid: 3 tad_limit: 0x1F
C01: TADBASE[0]:
mirror_en: 0 en_failover: 0 ign_ptrl_uc: 0 base: 0x0
Write Patrol and Sparing TAD range CSR's for HBM Stack 3 MC 2
C00: TADWAYNESS[0]:
target_lid: 0 chn_lid: 4 tad_limit: 0x1F
C00: TADBASE[0]:
mirror_en: 0 en_failover: 0 ign_ptrl_uc: 0 base: 0x0
C01: TADWAYNESS[0]:
target_lid: 0 chn_lid: 5 tad_limit: 0x1F
C01: TADBASE[0]:
mirror_en: 0 en_failover: 0 ign_ptrl_uc: 0 base: 0x0
Write Patrol and Sparing TAD range CSR's for HBM Stack 3 MC 3
C00: TADWAYNESS[0]:
target_lid: 0 chn_lid: 6 tad_limit: 0x1F
C00: TADBASE[0]:
mirror_en: 0 en_failover: 0 ign_ptrl_uc: 0 base: 0x0
C01: TADWAYNESS[0]:
target_lid: 0 chn_lid: 7 tad_limit: 0x1F
C01: TADBASE[0]:
mirror_en: 0 en_failover: 0 ign_ptrl_uc: 0 base: 0x0
Write Hbm Nm Caching Tad CSR's for HBM Stack 3 MC 0
C00: MCNMCACHINGCFG 2LM TAD:
nmcachingtaden: 1 nmcachingtad: 0
C01: MCNMCACHINGCFG 2LM TAD:
nmcachingtaden: 1 nmcachingtad: 0
Write Hbm Nm Caching Tad CSR's for HBM Stack 3 MC 1
C00: MCNMCACHINGCFG 2LM TAD:
nmcachingtaden: 1 nmcachingtad: 0
C01: MCNMCACHINGCFG 2LM TAD:
nmcachingtaden: 1 nmcachingtad: 0
Write Hbm Nm Caching Tad CSR's for HBM Stack 3 MC 2
C00: MCNMCACHINGCFG 2LM TAD:
nmcachingtaden: 1 nmcachingtad: 0
C01: MCNMCACHINGCFG 2LM TAD:
nmcachingtaden: 1 nmcachingtad: 0
Write Hbm Nm Caching Tad CSR's for HBM Stack 3 MC 3
C00: MCNMCACHINGCFG 2LM TAD:
nmcachingtaden: 1 nmcachingtad: 0
C01: MCNMCACHINGCFG 2LM TAD:
nmcachingtaden: 1 nmcachingtad: 0
Write 1LM Decoder CSR's for HBM Stack 3 MC 0
C00: TADCHNILVOFFSET[0]:
target_ways: 0 chn_ways: 0 target_gran: 1 chn_gran: 1 tad_offset: 0x0 tad_offset_sign: 0
C01: TADCHNILVOFFSET[0]:
target_ways: 0 chn_ways: 0 target_gran: 1 chn_gran: 1 tad_offset: 0x0 tad_offset_sign: 0
Write 1LM Decoder CSR's for HBM Stack 3 MC 1
C00: TADCHNILVOFFSET[0]:
target_ways: 0 chn_ways: 0 target_gran: 1 chn_gran: 1 tad_offset: 0x0 tad_offset_sign: 0
C01: TADCHNILVOFFSET[0]:
target_ways: 0 chn_ways: 0 target_gran: 1 chn_gran: 1 tad_offset: 0x0 tad_offset_sign: 0
Write 1LM Decoder CSR's for HBM Stack 3 MC 2
C00: TADCHNILVOFFSET[0]:
target_ways: 0 chn_ways: 0 target_gran: 1 chn_gran: 1 tad_offset: 0x0 tad_offset_sign: 0
C01: TADCHNILVOFFSET[0]:
target_ways: 0 chn_ways: 0 target_gran: 1 chn_gran: 1 tad_offset: 0x0 tad_offset_sign: 0
Write 1LM Decoder CSR's for HBM Stack 3 MC 3
C00: TADCHNILVOFFSET[0]:
target_ways: 0 chn_ways: 0 target_gran: 1 chn_gran: 1 tad_offset: 0x0 tad_offset_sign: 0
C01: TADCHNILVOFFSET[0]:
target_ways: 0 chn_ways: 0 target_gran: 1 chn_gran: 1 tad_offset: 0x0 tad_offset_sign: 0
Write MCNMCACHINGCFG for HBM Stack 3 MC 0
C00: MCNMCACHINGCFG:
mcnmcachingenb: 1 mcpmemenb: 0 mcnmcachingpmemwt: 0
C01: MCNMCACHINGCFG:
mcnmcachingenb: 1 mcpmemenb: 0 mcnmcachingpmemwt: 0
Write MCNMCACHINGCFG for HBM Stack 3 MC 1
C00: MCNMCACHINGCFG:
mcnmcachingenb: 1 mcpmemenb: 0 mcnmcachingpmemwt: 0
C01: MCNMCACHINGCFG:
mcnmcachingenb: 1 mcpmemenb: 0 mcnmcachingpmemwt: 0
Write MCNMCACHINGCFG for HBM Stack 3 MC 2
C00: MCNMCACHINGCFG:
mcnmcachingenb: 1 mcpmemenb: 0 mcnmcachingpmemwt: 0
C01: MCNMCACHINGCFG:
mcnmcachingenb: 1 mcpmemenb: 0 mcnmcachingpmemwt: 0
Write MCNMCACHINGCFG for HBM Stack 3 MC 3
C00: MCNMCACHINGCFG:
mcnmcachingenb: 1 mcpmemenb: 0 mcnmcachingpmemwt: 0
C01: MCNMCACHINGCFG:
mcnmcachingenb: 1 mcpmemenb: 0 mcnmcachingpmemwt: 0
Write 2LM NM Decoder CSR's for HBM Stack 3 MC 0
C00: CSR for force_lat bit : AMAP_MC_MAIN_REG: 0x52
C00: MCNMCACHINGINTLV:
nm_target_ways: 0 nm_chn_ways: 3 nm_target_lid: 0 nm_target_gran: 1 nm_chn_gran: 1 nm_chn_lid: 0
C00: MCNMCACHINGCFG_MC_2LM_REG:
en_2way: 0 prefer_way_sel: 0 chn_cap: 0xB nm_ratio_chn_cap: 0
C00: MCNMCACHINGOFFSET:
mcnmcachingoffsetlower: 0x2 mcnmcachingoffset: 0x7 mcnmcachingoffseten: 1
C01: CSR for force_lat bit : AMAP_MC_MAIN_REG: 0x52
C01: MCNMCACHINGINTLV:
nm_target_ways: 0 nm_chn_ways: 3 nm_target_lid: 0 nm_target_gran: 1 nm_chn_gran: 1 nm_chn_lid: 1
C01: MCNMCACHINGCFG_MC_2LM_REG:
en_2way: 0 prefer_way_sel: 0 chn_cap: 0xB nm_ratio_chn_cap: 0
C01: MCNMCACHINGOFFSET:
mcnmcachingoffsetlower: 0x2 mcnmcachingoffset: 0x7 mcnmcachingoffseten: 1
Write 2LM NM Decoder CSR's for HBM Stack 3 MC 1
C00: CSR for force_lat bit : AMAP_MC_MAIN_REG: 0x52
C00: MCNMCACHINGINTLV:
nm_target_ways: 0 nm_chn_ways: 3 nm_target_lid: 0 nm_target_gran: 1 nm_chn_gran: 1 nm_chn_lid: 2
C00: MCNMCACHINGCFG_MC_2LM_REG:
en_2way: 0 prefer_way_sel: 0 chn_cap: 0xB nm_ratio_chn_cap: 0
C00: MCNMCACHINGOFFSET:
mcnmcachingoffsetlower: 0x2 mcnmcachingoffset: 0x7 mcnmcachingoffseten: 1
C01: CSR for force_lat bit : AMAP_MC_MAIN_REG: 0x52
C01: MCNMCACHINGINTLV:
nm_target_ways: 0 nm_chn_ways: 3 nm_target_lid: 0 nm_target_gran: 1 nm_chn_gran: 1 nm_chn_lid: 3
C01: MCNMCACHINGCFG_MC_2LM_REG:
en_2way: 0 prefer_way_sel: 0 chn_cap: 0xB nm_ratio_chn_cap: 0
C01: MCNMCACHINGOFFSET:
mcnmcachingoffsetlower: 0x2 mcnmcachingoffset: 0x7 mcnmcachingoffseten: 1
Write 2LM NM Decoder CSR's for HBM Stack 3 MC 2
C00: CSR for force_lat bit : AMAP_MC_MAIN_REG: 0x52
C00: MCNMCACHINGINTLV:
nm_target_ways: 0 nm_chn_ways: 3 nm_target_lid: 0 nm_target_gran: 1 nm_chn_gran: 1 nm_chn_lid: 4
C00: MCNMCACHINGCFG_MC_2LM_REG:
en_2way: 0 prefer_way_sel: 0 chn_cap: 0xB nm_ratio_chn_cap: 0
C00: MCNMCACHINGOFFSET:
mcnmcachingoffsetlower: 0x2 mcnmcachingoffset: 0x7 mcnmcachingoffseten: 1
C01: CSR for force_lat bit : AMAP_MC_MAIN_REG: 0x52
C01: MCNMCACHINGINTLV:
nm_target_ways: 0 nm_chn_ways: 3 nm_target_lid: 0 nm_target_gran: 1 nm_chn_gran: 1 nm_chn_lid: 5
C01: MCNMCACHINGCFG_MC_2LM_REG:
en_2way: 0 prefer_way_sel: 0 chn_cap: 0xB nm_ratio_chn_cap: 0
C01: MCNMCACHINGOFFSET:
mcnmcachingoffsetlower: 0x2 mcnmcachingoffset: 0x7 mcnmcachingoffseten: 1
Write 2LM NM Decoder CSR's for HBM Stack 3 MC 3
C00: CSR for force_lat bit : AMAP_MC_MAIN_REG: 0x52
C00: MCNMCACHINGINTLV:
nm_target_ways: 0 nm_chn_ways: 3 nm_target_lid: 0 nm_target_gran: 1 nm_chn_gran: 1 nm_chn_lid: 6
C00: MCNMCACHINGCFG_MC_2LM_REG:
en_2way: 0 prefer_way_sel: 0 chn_cap: 0xB nm_ratio_chn_cap: 0
C00: MCNMCACHINGOFFSET:
mcnmcachingoffsetlower: 0x2 mcnmcachingoffset: 0x7 mcnmcachingoffseten: 1
C01: CSR for force_lat bit : AMAP_MC_MAIN_REG: 0x52
C01: MCNMCACHINGINTLV:
nm_target_ways: 0 nm_chn_ways: 3 nm_target_lid: 0 nm_target_gran: 1 nm_chn_gran: 1 nm_chn_lid: 7
C01: MCNMCACHINGCFG_MC_2LM_REG:
en_2way: 0 prefer_way_sel: 0 chn_cap: 0xB nm_ratio_chn_cap: 0
C01: MCNMCACHINGOFFSET:
mcnmcachingoffsetlower: 0x2 mcnmcachingoffset: 0x7 mcnmcachingoffseten: 1
Write 2LM FM Decoder CSR's for HBM Stack 3 MC 0 TAD 0
C00: DRAM_RULE[0]:
rule_enable: 1 limit: 0x101F fm_target: 0 fm_chn_ways: 0 fm_chn_gran: 1 fm_target_ways: 0 fm_gran_eq: 0 fm_chn_l2pid: 0x00000000
C01: DRAM_RULE[0]:
rule_enable: 1 limit: 0x101F fm_target: 0 fm_chn_ways: 0 fm_chn_gran: 1 fm_target_ways: 0 fm_gran_eq: 0 fm_chn_l2pid: 0x00000000
Write 2LM FM Decoder CSR's for HBM Stack 3 MC 1 TAD 0
C00: DRAM_RULE[0]:
rule_enable: 1 limit: 0x101F fm_target: 0 fm_chn_ways: 0 fm_chn_gran: 1 fm_target_ways: 0 fm_gran_eq: 0 fm_chn_l2pid: 0x00000000
C01: DRAM_RULE[0]:
rule_enable: 1 limit: 0x101F fm_target: 0 fm_chn_ways: 0 fm_chn_gran: 1 fm_target_ways: 0 fm_gran_eq: 0 fm_chn_l2pid: 0x00000000
Write 2LM FM Decoder CSR's for HBM Stack 3 MC 2 TAD 0
C00: DRAM_RULE[0]:
rule_enable: 1 limit: 0x101F fm_target: 0 fm_chn_ways: 0 fm_chn_gran: 1 fm_target_ways: 0 fm_gran_eq: 0 fm_chn_l2pid: 0x00000000
C01: DRAM_RULE[0]:
rule_enable: 1 limit: 0x101F fm_target: 0 fm_chn_ways: 0 fm_chn_gran: 1 fm_target_ways: 0 fm_gran_eq: 0 fm_chn_l2pid: 0x00000000
Write 2LM FM Decoder CSR's for HBM Stack 3 MC 3 TAD 0
C00: DRAM_RULE[0]:
rule_enable: 1 limit: 0x101F fm_target: 0 fm_chn_ways: 0 fm_chn_gran: 1 fm_target_ways: 0 fm_gran_eq: 0 fm_chn_l2pid: 0x00000000
C01: DRAM_RULE[0]:
rule_enable: 1 limit: 0x101F fm_target: 0 fm_chn_ways: 0 fm_chn_gran: 1 fm_target_ways: 0 fm_gran_eq: 0 fm_chn_l2pid: 0x00000000
Checkpoint Code: Socket 0, 0xBB, 0x08, 0x0001
^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^
Write RIR CSRs for Socket: 1
^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^
Channel - 0
RIRWAYNESSLIMIT_0_MC_MAIN_REG
rir_val: 1 rir_limit: 0x1F rir_way: 0x0
RIRILV0OFFSET_0_MC_MAIN_REG
rir_rnk_tgt0: 0x0 rir_offset0: 0x0
RIRILV1OFFSET_0_MC_MAIN_REG
rir_rnk_tgt0: 0x0 rir_offset0: 0x0
RIRILV2OFFSET_0_MC_MAIN_REG
rir_rnk_tgt0: 0x0 rir_offset0: 0x0
RIRILV3OFFSET_0_MC_MAIN_REG
rir_rnk_tgt0: 0x0 rir_offset0: 0x0
RIRILV4OFFSET_0_MC_MAIN_REG
rir_rnk_tgt0: 0x0 rir_offset0: 0x0
RIRILV5OFFSET_0_MC_MAIN_REG
rir_rnk_tgt0: 0x0 rir_offset0: 0x0
RIRILV6OFFSET_0_MC_MAIN_REG
rir_rnk_tgt0: 0x0 rir_offset0: 0x0
RIRILV7OFFSET_0_MC_MAIN_REG
rir_rnk_tgt0: 0x0 rir_offset0: 0x0
RIRWAYNESSLIMIT_1_MC_MAIN_REG
rir_val: 0 rir_limit: 0x1F rir_way: 0x0
RIRILV0OFFSET_1_MC_MAIN_REG
rir_rnk_tgt0: 0x0 rir_offset0: 0x0
RIRILV1OFFSET_1_MC_MAIN_REG
rir_rnk_tgt0: 0x0 rir_offset0: 0x0
RIRILV2OFFSET_1_MC_MAIN_REG
rir_rnk_tgt0: 0x0 rir_offset0: 0x0
RIRILV3OFFSET_1_MC_MAIN_REG
rir_rnk_tgt0: 0x0 rir_offset0: 0x0
RIRILV4OFFSET_1_MC_MAIN_REG
rir_rnk_tgt0: 0x0 rir_offset0: 0x0
RIRILV5OFFSET_1_MC_MAIN_REG
rir_rnk_tgt0: 0x0 rir_offset0: 0x0
RIRILV6OFFSET_1_MC_MAIN_REG
rir_rnk_tgt0: 0x0 rir_offset0: 0x0
RIRILV7OFFSET_1_MC_MAIN_REG
rir_rnk_tgt0: 0x0 rir_offset0: 0x0
RIRWAYNESSLIMIT_2_MC_MAIN_REG
rir_val: 0 rir_limit: 0x1F rir_way: 0x0
RIRILV0OFFSET_2_MC_MAIN_REG
rir_rnk_tgt0: 0x0 rir_offset0: 0x0
RIRILV1OFFSET_2_MC_MAIN_REG
rir_rnk_tgt0: 0x0 rir_offset0: 0x0
RIRILV2OFFSET_2_MC_MAIN_REG
rir_rnk_tgt0: 0x0 rir_offset0: 0x0
RIRILV3OFFSET_2_MC_MAIN_REG
rir_rnk_tgt0: 0x0 rir_offset0: 0x0
RIRILV4OFFSET_2_MC_MAIN_REG
rir_rnk_tgt0: 0x0 rir_offset0: 0x0
RIRILV5OFFSET_2_MC_MAIN_REG
rir_rnk_tgt0: 0x0 rir_offset0: 0x0
RIRILV6OFFSET_2_MC_MAIN_REG
rir_rnk_tgt0: 0x0 rir_offset0: 0x0
RIRILV7OFFSET_2_MC_MAIN_REG
rir_rnk_tgt0: 0x0 rir_offset0: 0x0
RIRWAYNESSLIMIT_3_MC_MAIN_REG
rir_val: 0 rir_limit: 0x1F rir_way: 0x0
RIRILV0OFFSET_3_MC_MAIN_REG
rir_rnk_tgt0: 0x0 rir_offset0: 0x0
RIRILV1OFFSET_3_MC_MAIN_REG
rir_rnk_tgt0: 0x0 rir_offset0: 0x0
RIRILV2OFFSET_3_MC_MAIN_REG
rir_rnk_tgt0: 0x0 rir_offset0: 0x0
RIRILV3OFFSET_3_MC_MAIN_REG
rir_rnk_tgt0: 0x0 rir_offset0: 0x0
RIRILV4OFFSET_3_MC_MAIN_REG
rir_rnk_tgt0: 0x0 rir_offset0: 0x0
RIRILV5OFFSET_3_MC_MAIN_REG
rir_rnk_tgt0: 0x0 rir_offset0: 0x0
RIRILV6OFFSET_3_MC_MAIN_REG
rir_rnk_tgt0: 0x0 rir_offset0: 0x0
RIRILV7OFFSET_3_MC_MAIN_REG
rir_rnk_tgt0: 0x0 rir_offset0: 0x0
Channel - 2
RIRWAYNESSLIMIT_0_MC_MAIN_REG
rir_val: 1 rir_limit: 0x1F rir_way: 0x0
RIRILV0OFFSET_0_MC_MAIN_REG
rir_rnk_tgt0: 0x0 rir_offset0: 0x0
RIRILV1OFFSET_0_MC_MAIN_REG
rir_rnk_tgt0: 0x0 rir_offset0: 0x0
RIRILV2OFFSET_0_MC_MAIN_REG
rir_rnk_tgt0: 0x0 rir_offset0: 0x0
RIRILV3OFFSET_0_MC_MAIN_REG
rir_rnk_tgt0: 0x0 rir_offset0: 0x0
RIRILV4OFFSET_0_MC_MAIN_REG
rir_rnk_tgt0: 0x0 rir_offset0: 0x0
RIRILV5OFFSET_0_MC_MAIN_REG
rir_rnk_tgt0: 0x0 rir_offset0: 0x0
RIRILV6OFFSET_0_MC_MAIN_REG
rir_rnk_tgt0: 0x0 rir_offset0: 0x0
RIRILV7OFFSET_0_MC_MAIN_REG
rir_rnk_tgt0: 0x0 rir_offset0: 0x0
RIRWAYNESSLIMIT_1_MC_MAIN_REG
rir_val: 0 rir_limit: 0x1F rir_way: 0x0
RIRILV0OFFSET_1_MC_MAIN_REG
rir_rnk_tgt0: 0x0 rir_offset0: 0x0
RIRILV1OFFSET_1_MC_MAIN_REG
rir_rnk_tgt0: 0x0 rir_offset0: 0x0
RIRILV2OFFSET_1_MC_MAIN_REG
rir_rnk_tgt0: 0x0 rir_offset0: 0x0
RIRILV3OFFSET_1_MC_MAIN_REG
rir_rnk_tgt0: 0x0 rir_offset0: 0x0
RIRILV4OFFSET_1_MC_MAIN_REG
rir_rnk_tgt0: 0x0 rir_offset0: 0x0
RIRILV5OFFSET_1_MC_MAIN_REG
rir_rnk_tgt0: 0x0 rir_offset0: 0x0
RIRILV6OFFSET_1_MC_MAIN_REG
rir_rnk_tgt0: 0x0 rir_offset0: 0x0
RIRILV7OFFSET_1_MC_MAIN_REG
rir_rnk_tgt0: 0x0 rir_offset0: 0x0
RIRWAYNESSLIMIT_2_MC_MAIN_REG
rir_val: 0 rir_limit: 0x1F rir_way: 0x0
RIRILV0OFFSET_2_MC_MAIN_REG
rir_rnk_tgt0: 0x0 rir_offset0: 0x0
RIRILV1OFFSET_2_MC_MAIN_REG
rir_rnk_tgt0: 0x0 rir_offset0: 0x0
RIRILV2OFFSET_2_MC_MAIN_REG
rir_rnk_tgt0: 0x0 rir_offset0: 0x0
RIRILV3OFFSET_2_MC_MAIN_REG
rir_rnk_tgt0: 0x0 rir_offset0: 0x0
RIRILV4OFFSET_2_MC_MAIN_REG
rir_rnk_tgt0: 0x0 rir_offset0: 0x0
RIRILV5OFFSET_2_MC_MAIN_REG
rir_rnk_tgt0: 0x0 rir_offset0: 0x0
RIRILV6OFFSET_2_MC_MAIN_REG
rir_rnk_tgt0: 0x0 rir_offset0: 0x0
RIRILV7OFFSET_2_MC_MAIN_REG
rir_rnk_tgt0: 0x0 rir_offset0: 0x0
RIRWAYNESSLIMIT_3_MC_MAIN_REG
rir_val: 0 rir_limit: 0x1F rir_way: 0x0
RIRILV0OFFSET_3_MC_MAIN_REG
rir_rnk_tgt0: 0x0 rir_offset0: 0x0
RIRILV1OFFSET_3_MC_MAIN_REG
rir_rnk_tgt0: 0x0 rir_offset0: 0x0
RIRILV2OFFSET_3_MC_MAIN_REG
rir_rnk_tgt0: 0x0 rir_offset0: 0x0
RIRILV3OFFSET_3_MC_MAIN_REG
rir_rnk_tgt0: 0x0 rir_offset0: 0x0
RIRILV4OFFSET_3_MC_MAIN_REG
rir_rnk_tgt0: 0x0 rir_offset0: 0x0
RIRILV5OFFSET_3_MC_MAIN_REG
rir_rnk_tgt0: 0x0 rir_offset0: 0x0
RIRILV6OFFSET_3_MC_MAIN_REG
rir_rnk_tgt0: 0x0 rir_offset0: 0x0
RIRILV7OFFSET_3_MC_MAIN_REG
rir_rnk_tgt0: 0x0 rir_offset0: 0x0
Channel - 4
RIRWAYNESSLIMIT_0_MC_MAIN_REG
rir_val: 1 rir_limit: 0x1F rir_way: 0x0
RIRILV0OFFSET_0_MC_MAIN_REG
rir_rnk_tgt0: 0x0 rir_offset0: 0x0
RIRILV1OFFSET_0_MC_MAIN_REG
rir_rnk_tgt0: 0x0 rir_offset0: 0x0
RIRILV2OFFSET_0_MC_MAIN_REG
rir_rnk_tgt0: 0x0 rir_offset0: 0x0
RIRILV3OFFSET_0_MC_MAIN_REG
rir_rnk_tgt0: 0x0 rir_offset0: 0x0
RIRILV4OFFSET_0_MC_MAIN_REG
rir_rnk_tgt0: 0x0 rir_offset0: 0x0
RIRILV5OFFSET_0_MC_MAIN_REG
rir_rnk_tgt0: 0x0 rir_offset0: 0x0
RIRILV6OFFSET_0_MC_MAIN_REG
rir_rnk_tgt0: 0x0 rir_offset0: 0x0
RIRILV7OFFSET_0_MC_MAIN_REG
rir_rnk_tgt0: 0x0 rir_offset0: 0x0
RIRWAYNESSLIMIT_1_MC_MAIN_REG
rir_val: 0 rir_limit: 0x1F rir_way: 0x0
RIRILV0OFFSET_1_MC_MAIN_REG
rir_rnk_tgt0: 0x0 rir_offset0: 0x0
RIRILV1OFFSET_1_MC_MAIN_REG
rir_rnk_tgt0: 0x0 rir_offset0: 0x0
RIRILV2OFFSET_1_MC_MAIN_REG
rir_rnk_tgt0: 0x0 rir_offset0: 0x0
RIRILV3OFFSET_1_MC_MAIN_REG
rir_rnk_tgt0: 0x0 rir_offset0: 0x0
RIRILV4OFFSET_1_MC_MAIN_REG
rir_rnk_tgt0: 0x0 rir_offset0: 0x0
RIRILV5OFFSET_1_MC_MAIN_REG
rir_rnk_tgt0: 0x0 rir_offset0: 0x0
RIRILV6OFFSET_1_MC_MAIN_REG
rir_rnk_tgt0: 0x0 rir_offset0: 0x0
RIRILV7OFFSET_1_MC_MAIN_REG
rir_rnk_tgt0: 0x0 rir_offset0: 0x0
RIRWAYNESSLIMIT_2_MC_MAIN_REG
rir_val: 0 rir_limit: 0x1F rir_way: 0x0
RIRILV0OFFSET_2_MC_MAIN_REG
rir_rnk_tgt0: 0x0 rir_offset0: 0x0
RIRILV1OFFSET_2_MC_MAIN_REG
rir_rnk_tgt0: 0x0 rir_offset0: 0x0
RIRILV2OFFSET_2_MC_MAIN_REG
rir_rnk_tgt0: 0x0 rir_offset0: 0x0
RIRILV3OFFSET_2_MC_MAIN_REG
rir_rnk_tgt0: 0x0 rir_offset0: 0x0
RIRILV4OFFSET_2_MC_MAIN_REG
rir_rnk_tgt0: 0x0 rir_offset0: 0x0
RIRILV5OFFSET_2_MC_MAIN_REG
rir_rnk_tgt0: 0x0 rir_offset0: 0x0
RIRILV6OFFSET_2_MC_MAIN_REG
rir_rnk_tgt0: 0x0 rir_offset0: 0x0
RIRILV7OFFSET_2_MC_MAIN_REG
rir_rnk_tgt0: 0x0 rir_offset0: 0x0
RIRWAYNESSLIMIT_3_MC_MAIN_REG
rir_val: 0 rir_limit: 0x1F rir_way: 0x0
RIRILV0OFFSET_3_MC_MAIN_REG
rir_rnk_tgt0: 0x0 rir_offset0: 0x0
RIRILV1OFFSET_3_MC_MAIN_REG
rir_rnk_tgt0: 0x0 rir_offset0: 0x0
RIRILV2OFFSET_3_MC_MAIN_REG
rir_rnk_tgt0: 0x0 rir_offset0: 0x0
RIRILV3OFFSET_3_MC_MAIN_REG
rir_rnk_tgt0: 0x0 rir_offset0: 0x0
RIRILV4OFFSET_3_MC_MAIN_REG
rir_rnk_tgt0: 0x0 rir_offset0: 0x0
RIRILV5OFFSET_3_MC_MAIN_REG
rir_rnk_tgt0: 0x0 rir_offset0: 0x0
RIRILV6OFFSET_3_MC_MAIN_REG
rir_rnk_tgt0: 0x0 rir_offset0: 0x0
RIRILV7OFFSET_3_MC_MAIN_REG
rir_rnk_tgt0: 0x0 rir_offset0: 0x0
Channel - 6
RIRWAYNESSLIMIT_0_MC_MAIN_REG
rir_val: 1 rir_limit: 0x1F rir_way: 0x0
RIRILV0OFFSET_0_MC_MAIN_REG
rir_rnk_tgt0: 0x0 rir_offset0: 0x0
RIRILV1OFFSET_0_MC_MAIN_REG
rir_rnk_tgt0: 0x0 rir_offset0: 0x0
RIRILV2OFFSET_0_MC_MAIN_REG
rir_rnk_tgt0: 0x0 rir_offset0: 0x0
RIRILV3OFFSET_0_MC_MAIN_REG
rir_rnk_tgt0: 0x0 rir_offset0: 0x0
RIRILV4OFFSET_0_MC_MAIN_REG
rir_rnk_tgt0: 0x0 rir_offset0: 0x0
RIRILV5OFFSET_0_MC_MAIN_REG
rir_rnk_tgt0: 0x0 rir_offset0: 0x0
RIRILV6OFFSET_0_MC_MAIN_REG
rir_rnk_tgt0: 0x0 rir_offset0: 0x0
RIRILV7OFFSET_0_MC_MAIN_REG
rir_rnk_tgt0: 0x0 rir_offset0: 0x0
RIRWAYNESSLIMIT_1_MC_MAIN_REG
rir_val: 0 rir_limit: 0x1F rir_way: 0x0
RIRILV0OFFSET_1_MC_MAIN_REG
rir_rnk_tgt0: 0x0 rir_offset0: 0x0
RIRILV1OFFSET_1_MC_MAIN_REG
rir_rnk_tgt0: 0x0 rir_offset0: 0x0
RIRILV2OFFSET_1_MC_MAIN_REG
rir_rnk_tgt0: 0x0 rir_offset0: 0x0
RIRILV3OFFSET_1_MC_MAIN_REG
rir_rnk_tgt0: 0x0 rir_offset0: 0x0
RIRILV4OFFSET_1_MC_MAIN_REG
rir_rnk_tgt0: 0x0 rir_offset0: 0x0
RIRILV5OFFSET_1_MC_MAIN_REG
rir_rnk_tgt0: 0x0 rir_offset0: 0x0
RIRILV6OFFSET_1_MC_MAIN_REG
rir_rnk_tgt0: 0x0 rir_offset0: 0x0
RIRILV7OFFSET_1_MC_MAIN_REG
rir_rnk_tgt0: 0x0 rir_offset0: 0x0
RIRWAYNESSLIMIT_2_MC_MAIN_REG
rir_val: 0 rir_limit: 0x1F rir_way: 0x0
RIRILV0OFFSET_2_MC_MAIN_REG
rir_rnk_tgt0: 0x0 rir_offset0: 0x0
RIRILV1OFFSET_2_MC_MAIN_REG
rir_rnk_tgt0: 0x0 rir_offset0: 0x0
RIRILV2OFFSET_2_MC_MAIN_REG
rir_rnk_tgt0: 0x0 rir_offset0: 0x0
RIRILV3OFFSET_2_MC_MAIN_REG
rir_rnk_tgt0: 0x0 rir_offset0: 0x0
RIRILV4OFFSET_2_MC_MAIN_REG
rir_rnk_tgt0: 0x0 rir_offset0: 0x0
RIRILV5OFFSET_2_MC_MAIN_REG
rir_rnk_tgt0: 0x0 rir_offset0: 0x0
RIRILV6OFFSET_2_MC_MAIN_REG
rir_rnk_tgt0: 0x0 rir_offset0: 0x0
RIRILV7OFFSET_2_MC_MAIN_REG
rir_rnk_tgt0: 0x0 rir_offset0: 0x0
RIRWAYNESSLIMIT_3_MC_MAIN_REG
rir_val: 0 rir_limit: 0x1F rir_way: 0x0
RIRILV0OFFSET_3_MC_MAIN_REG
rir_rnk_tgt0: 0x0 rir_offset0: 0x0
RIRILV1OFFSET_3_MC_MAIN_REG
rir_rnk_tgt0: 0x0 rir_offset0: 0x0
RIRILV2OFFSET_3_MC_MAIN_REG
rir_rnk_tgt0: 0x0 rir_offset0: 0x0
RIRILV3OFFSET_3_MC_MAIN_REG
rir_rnk_tgt0: 0x0 rir_offset0: 0x0
RIRILV4OFFSET_3_MC_MAIN_REG
rir_rnk_tgt0: 0x0 rir_offset0: 0x0
RIRILV5OFFSET_3_MC_MAIN_REG
rir_rnk_tgt0: 0x0 rir_offset0: 0x0
RIRILV6OFFSET_3_MC_MAIN_REG
rir_rnk_tgt0: 0x0 rir_offset0: 0x0
RIRILV7OFFSET_3_MC_MAIN_REG
rir_rnk_tgt0: 0x0 rir_offset0: 0x0
^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^
Write CHA CSRs for Socket: 1
^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^
TWO_LM_CONFIG_CHA_PMA_REG
enable: 0x1 mask: 0x3F mask_hi: 0x0
HA_COH_CHABC_SAD1_REG
dis_spec_rd: 0x0
lowMemBase: 0x0
lowMemSize: 0x20
highMemBase: 0x40
highMemSize: 0xFE0
TOLM: 0x1F
TOHM: 0x101F
C00: CSR for wait4bothhalves bit: AMAP_MC_MAIN_REG: 0x49
C00: CSR for wait4bothhalves bit: AMAP_MC_MAIN_REG: 0x49
C00: CSR for wait4bothhalves bit: AMAP_MC_MAIN_REG: 0x49
C00: CSR for wait4bothhalves bit: AMAP_MC_MAIN_REG: 0x49
M2mTwoWayCache: Enable 0 NonPreferredWayMask 0x001 PreferredReadFirst 1
M2mTwoWayCache: Enable 0 NonPreferredWayMask 0x001 PreferredReadFirst 1
SGX memory map status: 1
ValidPrmrrBitMap: 0x0
PrmrrCountPerPackage: 4
CPU encryptable range count: 0
Enter MemReservePsmiBuffers
Volatile memory mode not in 1LM, cannot allocate PSMI buffers.
Memory could not be reserved for PSMI buffers
N0:
<AdjustMemorySizeFieldsforMirror>
N1:
<AdjustMemorySizeFieldsforMirror>
N2:
<AdjustMemorySizeFieldsforMirror>
N3:
<AdjustMemorySizeFieldsforMirror>
N0: Total NM size:0x20
N0: SktTotMemMapSPA:0x0
N0: PMem performance knobs override disabled
N1: Total NM size:0x20
N1: SktTotMemMapSPA:0x0
N1: PMem performance knobs override disabled
DDR clustering mode is SNC4
[ScktId: 0] Initialize Memory Map - 16854ms
[ScktId: 1] Pipe Sync SBSP Variable Data -- Started
[ScktId: 0] Pipe Sync SBSP Variable Data -- Started
[ScktId: 1] Pipe Sync SBSP Variable Data - 15ms
[ScktId: 0] Pipe Sync SBSP Variable Data - 15ms
[ScktId: 1] Pipe Sync SBSP Memory Mode -- Started
[ScktId: 0] Pipe Sync SBSP Memory Mode -- Started
[ScktId: 1] Pipe Sync SBSP Memory Mode - 41ms
[ScktId: 0] Pipe Sync SBSP Memory Mode - 36ms
N1 Checked into Pipe
[ScktId: 0] TME Init Flow -- Started
[TME] Error: There is no TME encryptable memory ranges present in the system. Disabling TME...
[TME] 2lm detected! Disabling TME.
[ScktId: 0] TME Init Flow - 21ms
[ScktId: 1] Pipe Sync AP Final Error Sync -- Started
[ScktId: 0] Pipe Sync AP Final Error Sync -- Started
[ScktId: 1] Pipe Sync AP Final Error Sync - 10ms
[ScktId: 0] Pipe Sync AP Final Error Sync - 10ms
[ScktId: 1] MK-TME Flow -- Started
[ScktId: 0] MK-TME Flow -- Started
[ScktId: 1] MK-TME Flow - 12ms
[ScktId: 0] MK-TME Flow - 7ms
[ScktId: 1] Pipe Sync AP Final Error Sync -- Started
[ScktId: 0] Pipe Sync AP Final Error Sync -- Started
[ScktId: 1] Pipe Sync AP Final Error Sync - 13ms
[ScktId: 0] Pipe Sync AP Final Error Sync - 10ms
[ScktId: 1] TME Flow - PROGRAM_MSRS -- Started
[ScktId: 0] TME Flow - PROGRAM_MSRS -- Started
[ScktId: 1] TME Flow - PROGRAM_MSRS - 14ms
[ScktId: 0] TME Flow - PROGRAM_MSRS - 9ms
[ScktId: 1] Pipe Sync AP Final Error Sync -- Started
[ScktId: 0] Pipe Sync AP Final Error Sync -- Started
[ScktId: 1] Pipe Sync AP Final Error Sync - 14ms
[ScktId: 0] Pipe Sync AP Final Error Sync - 10ms
[ScktId: 1] SGX PreMem Check Capability MT -- Started
[ScktId: 0] SGX PreMem Check Capability MT -- Started
IsSafCapSupportedMt: MSR_FUSA_CAPABILITIES SafCap.Uint32 0xFE970AB800000011
[ScktId: 1] SGX PreMem Check Capability MT - 24ms
[ScktId: 0] SGX PreMem Check Capability MT - 19ms
[ScktId: 1] Pipe Sync AP Final Error Sync -- Started
[ScktId: 0] Pipe Sync AP Final Error Sync -- Started
[ScktId: 0] Pipe Sync AP Final Error Sync - 10ms
[ScktId: 1] Pipe Sync AP Final Error Sync - 15ms
[ScktId: 0] SGX PreMem Init -- Started
[ScktId: 1] SGX PreMem Init -- Started
[SGX] SgxPreMemInitSbsp BEGIN
[SGX] VerifyFeatureControl BEGIN
[SGX] MSR_IA32_FEATURE_CONTROL 0x0000000000000000
[SGX] SecurityPolicy.EnableSgx 0 SecurityPolicy.SgxLaunchControlEnable 1
[SGX] VerifyFeatureControl END
[SGX] VerifyHardwarePreconditions BEGIN
[SGX] VerifyHardwarePreconditions END
[ScktId: 1] SGX PreMem Init - 38ms
Error: GetSgxPrmrrData (Unsupported), continue...
[ScktId: 1] Pipe Sync AP Final Error Sync -- Started
Memory configuration is NOT valid for SGX!
SgxErrorCode = 0x19
[SGX] SgxPreMemInitSbsp END
[ScktId: 0] SGX PreMem Init - 66ms
[ScktId: 0] Pipe Sync AP Final Error Sync -- Started
[ScktId: 0] Pipe Sync AP Final Error Sync - 5ms
[ScktId: 1] Pipe Sync AP Final Error Sync - 28ms
[ScktId: 0] HBM Normal Mode -- Started
[ScktId: 1] HBM Normal Mode -- Started
HbmioMailbox - Disabling HBMIO uController
HbmioMailbox - Disabling HBMIO uController
Executing uc_halt on Socket 0, HBMIO 0
Executing uc_halt on Socket 1, HBMIO 0
Executing uc_halt on Socket 0, HBMIO 1
Executing uc_halt on Socket 1, HBMIO 1
Executing uc_halt on Socket 0, HBMIO 2
Executing uc_halt on Socket 1, HBMIO 2
Executing uc_halt on Socket 0, HBMIO 3
Executing uc_halt on Socket 1, HBMIO 3
Cmi Option Auto Selected
Cmi Option Auto Selected
[ScktId: 0] HBM Normal Mode - 55ms
[ScktId: 1] HBM Normal Mode - 53ms
[ScktId: 0] AP HBM Information -- Started
[ScktId: 1] AP HBM Information -- Started
[ScktId: 0] AP HBM Information - 13ms
[ScktId: 1] AP HBM Information - 9ms
[ScktId: 0] Switch to Normal Mode -- Started
[ScktId: 1] Switch to Normal Mode -- Started
S0 TME CPUID = 1
S1 TME CPUID = 1
S0 TmeActivated = 0
S1 TmeActivated = 0
S0 TME CPUID = 1
S1 TME CPUID = 1
S0 TmeActivated = 0
S1 TmeActivated = 0
S0 TME CPUID = 1
S1 TME CPUID = 1
S0 TmeActivated = 0
S1 TmeActivated = 0
S0 TME CPUID = 1
S1 TME CPUID = 1
S0 TmeActivated = 0
S1 TmeActivated = 0
S0 TME CPUID = 1
S1 TME CPUID = 1
S0 TmeActivated = 0
S1 TmeActivated = 0
S0 TME CPUID = 1
S1 TME CPUID = 1
S0 TmeActivated = 0
S1 TmeActivated = 0
S0 TME CPUID = 1
S1 TME CPUID = 1
S0 TmeActivated = 0
S1 TmeActivated = 0
S0 TME CPUID = 1
S1 TME CPUID = 1
S0 TmeActivated = 0
S1 TmeActivated = 0
S0 TME CPUID = 1
S1 TME CPUID = 1
S0 IntegrityActivated = 0
S1 IntegrityActivated = 0
DDRT-Link-Failure-WA-Applied: err_ack_timer_limit = 0xF0
DDRT-Link-Failure-WA-Applied: err_ack_timer_limit = 0xF0
DDRT-Link-Failure-WA-Applied: err_ack_cnt_limit = 0x0
DDRT-Link-Failure-WA-Applied: err_ack_cnt_limit = 0x0
DDRT-Link-Failure-WA-Applied: err_ack_timer_limit = 0xF0
DDRT-Link-Failure-WA-Applied: err_ack_timer_limit = 0xF0
DDRT-Link-Failure-WA-Applied: err_ack_cnt_limit = 0x0
DDRT-Link-Failure-WA-Applied: err_ack_cnt_limit = 0x0
DDRT-Link-Failure-WA-Applied: err_ack_timer_limit = 0xF0
DDRT-Link-Failure-WA-Applied: err_ack_timer_limit = 0xF0
DDRT-Link-Failure-WA-Applied: err_ack_cnt_limit = 0x0
DDRT-Link-Failure-WA-Applied: err_ack_cnt_limit = 0x0
DDRT-Link-Failure-WA-Applied: err_ack_timer_limit = 0xF0
DDRT-Link-Failure-WA-Applied: err_ack_timer_limit = 0xF0
DDRT-Link-Failure-WA-Applied: err_ack_cnt_limit = 0x0
DDRT-Link-Failure-WA-Applied: err_ack_cnt_limit = 0x0
LpModePmControlN0.Data Original = 0x88063
LpModePmControlN0.Data Original = 0x88063
LpModePmControlN1.Data Original = 0x71D00
LpModePmControlN1.Data Original = 0x71D00
LpModePmControlN0.Bits.datadllwakeuptime = 0x3
LpModePmControlN0.Bits.datadllwakeuptime = 0x3
LpModePmControlN1.Bits.datadllwakeuptime = 0x6
LpModePmControlN1.Bits.datadllwakeuptime = 0x6
MininalTclByHCLK = 0x13
MininalTclByHCLK = 0x13
LpModePmControlN0.Bits.lpmode_block_rd = 0x8
LpModePmControlN0.Bits.lpmode_block_rd = 0x8
LpModePmControlN0.Data New = 0xC1088063
LpModePmControlN0.Data New = 0xC1088063
LpModePmControlN1.Data New = 0x71D86
LpModePmControlN1.Data New = 0x71D86
LpModePmControlN0.Data Original = 0x88063
LpModePmControlN0.Data Original = 0x88063
LpModePmControlN1.Data Original = 0x71D00
LpModePmControlN1.Data Original = 0x71D00
LpModePmControlN0.Bits.datadllwakeuptime = 0x3
LpModePmControlN0.Bits.datadllwakeuptime = 0x3
LpModePmControlN1.Bits.datadllwakeuptime = 0x6
LpModePmControlN1.Bits.datadllwakeuptime = 0x6
MininalTclByHCLK = 0x13
MininalTclByHCLK = 0x13
LpModePmControlN0.Bits.lpmode_block_rd = 0x8
LpModePmControlN0.Bits.lpmode_block_rd = 0x8
LpModePmControlN0.Data New = 0xC1088063
LpModePmControlN0.Data New = 0xC1088063
LpModePmControlN1.Data New = 0x71D86
LpModePmControlN1.Data New = 0x71D86
LpModePmControlN0.Data Original = 0x88063
LpModePmControlN0.Data Original = 0x88063
LpModePmControlN1.Data Original = 0x71D00
LpModePmControlN1.Data Original = 0x71D00
LpModePmControlN0.Bits.datadllwakeuptime = 0x3
LpModePmControlN0.Bits.datadllwakeuptime = 0x3
LpModePmControlN1.Bits.datadllwakeuptime = 0x6
LpModePmControlN1.Bits.datadllwakeuptime = 0x6
MininalTclByHCLK = 0x13
MininalTclByHCLK = 0x13
LpModePmControlN0.Bits.lpmode_block_rd = 0x8
LpModePmControlN0.Bits.lpmode_block_rd = 0x8
LpModePmControlN0.Data New = 0xC1088063
LpModePmControlN0.Data New = 0xC1088063
LpModePmControlN1.Data New = 0x71D86
LpModePmControlN1.Data New = 0x71D86
LpModePmControlN0.Data Original = 0x88063
LpModePmControlN0.Data Original = 0x88063
LpModePmControlN1.Data Original = 0x71D00
LpModePmControlN1.Data Original = 0x71D00
LpModePmControlN0.Bits.datadllwakeuptime = 0x3
LpModePmControlN0.Bits.datadllwakeuptime = 0x3
LpModePmControlN1.Bits.datadllwakeuptime = 0x6
LpModePmControlN1.Bits.datadllwakeuptime = 0x6
MininalTclByHCLK = 0x13
MininalTclByHCLK = 0x13
LpModePmControlN0.Bits.lpmode_block_rd = 0x8
LpModePmControlN0.Bits.lpmode_block_rd = 0x8
LpModePmControlN0.Data New = 0xC1088063
LpModePmControlN0.Data New = 0xC1088063
LpModePmControlN1.Data New = 0x71D86
LpModePmControlN1.Data New = 0x71D86
[ScktId: 0] Switch to Normal Mode - 435ms
[ScktId: 1] Switch to Normal Mode - 435ms
[ScktId: 0] Init CMI Credit Programming -- Started
[ScktId: 1] Init CMI Credit Programming -- Started
Cmi Option Auto Selected
Cmi Option Auto Selected
MemMc Cmi Data Version: 1
MemMc Cmi Data Version: 1
S0 TME CPUID = 1
S1 TME CPUID = 1
S0 TmeActivated = 0
S1 TmeActivated = 0
TmeEnabled: 0
TmeEnabled: 0
TwoLmEnabled: 0
TwoLmEnabled: 0
2LM_XTILE: 0
2LM_XTILE: 0
CMI Credit Data for CPU Stepping: Ex and Later
CMI Credit Data for CPU Stepping: Ex and Later
S0 TME CPUID = 1
S1 TME CPUID = 1
S0 TmeActivated = 0
S1 TmeActivated = 0
TmeEnabled: 0
TmeEnabled: 0
TwoLmEnabled: 0
TwoLmEnabled: 0
2LM_XTILE: 0
2LM_XTILE: 0
CMI Credit Data for CPU Stepping: Ex and Later
CMI Credit Data for CPU Stepping: Ex and Later
S0 TME CPUID = 1
S1 TME CPUID = 1
S0 TmeActivated = 0
S1 TmeActivated = 0
TmeEnabled: 0
TmeEnabled: 0
TwoLmEnabled: 0
TwoLmEnabled: 0
2LM_XTILE: 0
2LM_XTILE: 0
CMI Credit Data for CPU Stepping: Ex and Later
CMI Credit Data for CPU Stepping: Ex and Later
S0 TME CPUID = 1
S1 TME CPUID = 1
S0 TmeActivated = 0
S1 TmeActivated = 0
TmeEnabled: 0
TmeEnabled: 0
TwoLmEnabled: 0
TwoLmEnabled: 0
2LM_XTILE: 0
2LM_XTILE: 0
CMI Credit Data for CPU Stepping: Ex and Later
CMI Credit Data for CPU Stepping: Ex and Later
S0 TME CPUID = 1
S1 TME CPUID = 1
S0 TmeActivated = 0
S1 TmeActivated = 0
TmeEnabled: 0
TmeEnabled: 0
TwoLmEnabled: 0
TwoLmEnabled: 0
2LM_XTILE: 0
2LM_XTILE: 0
CMI Credit Data for CPU Stepping: Ex and Later
CMI Credit Data for CPU Stepping: Ex and Later
S0 TME CPUID = 1
S1 TME CPUID = 1
S0 TmeActivated = 0
S1 TmeActivated = 0
TmeEnabled: 0
TmeEnabled: 0
TwoLmEnabled: 0
TwoLmEnabled: 0
2LM_XTILE: 0
2LM_XTILE: 0
CMI Credit Data for CPU Stepping: Ex and Later
CMI Credit Data for CPU Stepping: Ex and Later
S0 TME CPUID = 1
S1 TME CPUID = 1
S0 TmeActivated = 0
S1 TmeActivated = 0
TmeEnabled: 0
TmeEnabled: 0
TwoLmEnabled: 0
TwoLmEnabled: 0
2LM_XTILE: 0
2LM_XTILE: 0
CMI Credit Data for CPU Stepping: Ex and Later
CMI Credit Data for CPU Stepping: Ex and Later
S0 TME CPUID = 1
S1 TME CPUID = 1
S0 TmeActivated = 0
S1 TmeActivated = 0
TmeEnabled: 0
TmeEnabled: 0
TwoLmEnabled: 0
TwoLmEnabled: 0
2LM_XTILE: 0
2LM_XTILE: 0
CMI Credit Data for CPU Stepping: Ex and Later
CMI Credit Data for CPU Stepping: Ex and Later
S0 TME CPUID = 1
S1 TME CPUID = 1
S0 TmeActivated = 0
S1 TmeActivated = 0
TmeEnabled: 0
TmeEnabled: 0
TwoLmEnabled: 0
TwoLmEnabled: 0
2LM_XTILE: 0
2LM_XTILE: 0
CMI Credit Data for CPU Stepping: Ex and Later
CMI Credit Data for CPU Stepping: Ex and Later
S0 TME CPUID = 1
S1 TME CPUID = 1
S0 TmeActivated = 0
S1 TmeActivated = 0
TmeEnabled: 0
TmeEnabled: 0
TwoLmEnabled: 0
TwoLmEnabled: 0
2LM_XTILE: 0
2LM_XTILE: 0
CMI Credit Data for CPU Stepping: Ex and Later
CMI Credit Data for CPU Stepping: Ex and Later
S0 TME CPUID = 1
S1 TME CPUID = 1
S0 TmeActivated = 0
S1 TmeActivated = 0
TmeEnabled: 0
TmeEnabled: 0
TwoLmEnabled: 0
TwoLmEnabled: 0
2LM_XTILE: 0
2LM_XTILE: 0
CMI Credit Data for CPU Stepping: Ex and Later
CMI Credit Data for CPU Stepping: Ex and Later
S0 TME CPUID = 1
S1 TME CPUID = 1
S0 TmeActivated = 0
S1 TmeActivated = 0
TmeEnabled: 0
TmeEnabled: 0
TwoLmEnabled: 0
TwoLmEnabled: 0
2LM_XTILE: 0
2LM_XTILE: 0
CMI Credit Data for CPU Stepping: Ex and Later
CMI Credit Data for CPU Stepping: Ex and Later
S0 TME CPUID = 1
S1 TME CPUID = 1
S0 TmeActivated = 0
S1 TmeActivated = 0
TmeEnabled: 0
TmeEnabled: 0
TwoLmEnabled: 0
TwoLmEnabled: 0
2LM_XTILE: 0
2LM_XTILE: 0
CMI Credit Data for CPU Stepping: Ex and Later
CMI Credit Data for CPU Stepping: Ex and Later
S0 TME CPUID = 1
S1 TME CPUID = 1
S0 TmeActivated = 0
S1 TmeActivated = 0
TmeEnabled: 0
TmeEnabled: 0
TwoLmEnabled: 0
TwoLmEnabled: 0
2LM_XTILE: 0
2LM_XTILE: 0
CMI Credit Data for CPU Stepping: Ex and Later
CMI Credit Data for CPU Stepping: Ex and Later
S0 TME CPUID = 1
S1 TME CPUID = 1
S0 TmeActivated = 0
S1 TmeActivated = 0
TmeEnabled: 0
TmeEnabled: 0
TwoLmEnabled: 0
TwoLmEnabled: 0
2LM_XTILE: 0
2LM_XTILE: 0
CMI Credit Data for CPU Stepping: Ex and Later
CMI Credit Data for CPU Stepping: Ex and Later
S0 TME CPUID = 1
S1 TME CPUID = 1
S0 TmeActivated = 0
S1 TmeActivated = 0
TmeEnabled: 0
TmeEnabled: 0
TwoLmEnabled: 0
TwoLmEnabled: 0
2LM_XTILE: 0
2LM_XTILE: 0
CMI Credit Data for CPU Stepping: Ex and Later
CMI Credit Data for CPU Stepping: Ex and Later
S0 TME CPUID = 1
S1 TME CPUID = 1
S0 TmeActivated = 0
S1 TmeActivated = 0
TmeEnabled: 0
TmeEnabled: 0
TwoLmEnabled: 0
TwoLmEnabled: 0
2LM_XTILE: 0
2LM_XTILE: 0
CMI Credit Data for CPU Stepping: Ex and Later
CMI Credit Data for CPU Stepping: Ex and Later
S0 TME CPUID = 1
S1 TME CPUID = 1
S0 TmeActivated = 0
S1 TmeActivated = 0
TmeEnabled: 0
TmeEnabled: 0
TwoLmEnabled: 0
TwoLmEnabled: 0
2LM_XTILE: 0
2LM_XTILE: 0
CMI Credit Data for CPU Stepping: Ex and Later
CMI Credit Data for CPU Stepping: Ex and Later
S0 TME CPUID = 1
S1 TME CPUID = 1
S0 TmeActivated = 0
S1 TmeActivated = 0
TmeEnabled: 0
TmeEnabled: 0
TwoLmEnabled: 0
TwoLmEnabled: 0
2LM_XTILE: 0
2LM_XTILE: 0
CMI Credit Data for CPU Stepping: Ex and Later
CMI Credit Data for CPU Stepping: Ex and Later
S0 TME CPUID = 1
S1 TME CPUID = 1
S0 TmeActivated = 0
S1 TmeActivated = 0
TmeEnabled: 0
TmeEnabled: 0
TwoLmEnabled: 0
TwoLmEnabled: 0
2LM_XTILE: 0
2LM_XTILE: 0
CMI Credit Data for CPU Stepping: Ex and Later
CMI Credit Data for CPU Stepping: Ex and Later
S0 TME CPUID = 1
S1 TME CPUID = 1
S0 TmeActivated = 0
S1 TmeActivated = 0
TmeEnabled: 0
TmeEnabled: 0
TwoLmEnabled: 0
TwoLmEnabled: 0
2LM_XTILE: 0
2LM_XTILE: 0
CMI Credit Data for CPU Stepping: Ex and Later
CMI Credit Data for CPU Stepping: Ex and Later
S0 TME CPUID = 1
S1 TME CPUID = 1
S0 TmeActivated = 0
S1 TmeActivated = 0
TmeEnabled: 0
TmeEnabled: 0
TwoLmEnabled: 0
TwoLmEnabled: 0
2LM_XTILE: 0
2LM_XTILE: 0
CMI Credit Data for CPU Stepping: Ex and Later
CMI Credit Data for CPU Stepping: Ex and Later
S0 TME CPUID = 1
S1 TME CPUID = 1
S0 TmeActivated = 0
S1 TmeActivated = 0
TmeEnabled: 0
TmeEnabled: 0
TwoLmEnabled: 0
TwoLmEnabled: 0
2LM_XTILE: 0
2LM_XTILE: 0
CMI Credit Data for CPU Stepping: Ex and Later
CMI Credit Data for CPU Stepping: Ex and Later
S0 TME CPUID = 1
S1 TME CPUID = 1
S0 TmeActivated = 0
S1 TmeActivated = 0
TmeEnabled: 0
TmeEnabled: 0
TwoLmEnabled: 0
TwoLmEnabled: 0
2LM_XTILE: 0
2LM_XTILE: 0
CMI Credit Data for CPU Stepping: Ex and Later
CMI Credit Data for CPU Stepping: Ex and Later
S0 TME CPUID = 1
S1 TME CPUID = 1
S0 TmeActivated = 0
S1 TmeActivated = 0
TmeEnabled: 0
TmeEnabled: 0
TwoLmEnabled: 0
TwoLmEnabled: 0
2LM_XTILE: 0
2LM_XTILE: 0
CMI Credit Data for CPU Stepping: Ex and Later
CMI Credit Data for CPU Stepping: Ex and Later
S0 TME CPUID = 1
S1 TME CPUID = 1
S0 TmeActivated = 0
S1 TmeActivated = 0
TmeEnabled: 0
TmeEnabled: 0
TwoLmEnabled: 0
TwoLmEnabled: 0
2LM_XTILE: 0
2LM_XTILE: 0
CMI Credit Data for CPU Stepping: Ex and Later
CMI Credit Data for CPU Stepping: Ex and Later
S0 TME CPUID = 1
S1 TME CPUID = 1
S0 TmeActivated = 0
S1 TmeActivated = 0
TmeEnabled: 0
TmeEnabled: 0
TwoLmEnabled: 0
TwoLmEnabled: 0
2LM_XTILE: 0
2LM_XTILE: 0
CMI Credit Data for CPU Stepping: Ex and Later
CMI Credit Data for CPU Stepping: Ex and Later
S0 TME CPUID = 1
S1 TME CPUID = 1
S0 TmeActivated = 0
S1 TmeActivated = 0
TmeEnabled: 0
TmeEnabled: 0
TwoLmEnabled: 0
TwoLmEnabled: 0
2LM_XTILE: 0
2LM_XTILE: 0
CMI Credit Data for CPU Stepping: Ex and Later
CMI Credit Data for CPU Stepping: Ex and Later
S0 TME CPUID = 1
S1 TME CPUID = 1
S0 TmeActivated = 0
S1 TmeActivated = 0
TmeEnabled: 0
TmeEnabled: 0
TwoLmEnabled: 0
TwoLmEnabled: 0
2LM_XTILE: 0
2LM_XTILE: 0
CMI Credit Data for CPU Stepping: Ex and Later
CMI Credit Data for CPU Stepping: Ex and Later
S0 TME CPUID = 1
S1 TME CPUID = 1
S0 TmeActivated = 0
S1 TmeActivated = 0
TmeEnabled: 0
TmeEnabled: 0
TwoLmEnabled: 0
TwoLmEnabled: 0
2LM_XTILE: 0
2LM_XTILE: 0
CMI Credit Data for CPU Stepping: Ex and Later
CMI Credit Data for CPU Stepping: Ex and Later
S0 TME CPUID = 1
S1 TME CPUID = 1
S0 TmeActivated = 0
S1 TmeActivated = 0
TmeEnabled: 0
TmeEnabled: 0
TwoLmEnabled: 0
TwoLmEnabled: 0
2LM_XTILE: 0
2LM_XTILE: 0
CMI Credit Data for CPU Stepping: Ex and Later
CMI Credit Data for CPU Stepping: Ex and Later
S0 TME CPUID = 1
S1 TME CPUID = 1
S0 TmeActivated = 0
S1 TmeActivated = 0
TmeEnabled: 0
TmeEnabled: 0
TwoLmEnabled: 0
TwoLmEnabled: 0
2LM_XTILE: 0
2LM_XTILE: 0
CMI Credit Data for CPU Stepping: Ex and Later
CMI Credit Data for CPU Stepping: Ex and Later
S0 TME CPUID = 1
S1 TME CPUID = 1
S0 TmeActivated = 0
S1 TmeActivated = 0
TmeEnabled: 0
TmeEnabled: 0
TwoLmEnabled: 0
TwoLmEnabled: 0
2LM_XTILE: 0
2LM_XTILE: 0
CMI Credit Data for CPU Stepping: Ex and Later
CMI Credit Data for CPU Stepping: Ex and Later
S0 TME CPUID = 1
S1 TME CPUID = 1
S0 TmeActivated = 0
S1 TmeActivated = 0
TmeEnabled: 0
TmeEnabled: 0
TwoLmEnabled: 0
TwoLmEnabled: 0
2LM_XTILE: 0
2LM_XTILE: 0
CMI Credit Data for CPU Stepping: Ex and Later
CMI Credit Data for CPU Stepping: Ex and Later
S0 TME CPUID = 1
S1 TME CPUID = 1
S0 TmeActivated = 0
S1 TmeActivated = 0
TmeEnabled: 0
TmeEnabled: 0
TwoLmEnabled: 0
TwoLmEnabled: 0
2LM_XTILE: 0
2LM_XTILE: 0
CMI Credit Data for CPU Stepping: Ex and Later
CMI Credit Data for CPU Stepping: Ex and Later
S0 TME CPUID = 1
S1 TME CPUID = 1
S0 TmeActivated = 0
S1 TmeActivated = 0
TmeEnabled: 0
TmeEnabled: 0
TwoLmEnabled: 0
TwoLmEnabled: 0
2LM_XTILE: 0
2LM_XTILE: 0
CMI Credit Data for CPU Stepping: Ex and Later
CMI Credit Data for CPU Stepping: Ex and Later
Mesh2Mem CMI Data Version: 1
Mesh2Mem CMI Data Version: 1
S0 TME CPUID = 1
S1 TME CPUID = 1
S0 TmeActivated = 0
S1 TmeActivated = 0
TmeEnabled: 0
TmeEnabled: 0
TwoLmEnabled: 0
TwoLmEnabled: 0
2LM_XTILE: 0
2LM_XTILE: 0
CMI Credit Data for CPU Stepping: Ex and Later
CMI Credit Data for CPU Stepping: Ex and Later
S0 TME CPUID = 1
S1 TME CPUID = 1
S0 TmeActivated = 0
S1 TmeActivated = 0
TmeEnabled: 0
TmeEnabled: 0
TwoLmEnabled: 0
TwoLmEnabled: 0
2LM_XTILE: 0
2LM_XTILE: 0
CMI Credit Data for CPU Stepping: Ex and Later
CMI Credit Data for CPU Stepping: Ex and Later
S0 TME CPUID = 1
S1 TME CPUID = 1
S0 TmeActivated = 0
S1 TmeActivated = 0
TmeEnabled: 0
TmeEnabled: 0
TwoLmEnabled: 0
TwoLmEnabled: 0
2LM_XTILE: 0
2LM_XTILE: 0
CMI Credit Data for CPU Stepping: Ex and Later
CMI Credit Data for CPU Stepping: Ex and Later
S0 TME CPUID = 1
S1 TME CPUID = 1
S0 TmeActivated = 0
S1 TmeActivated = 0
McTme CMI Data Version: 1
McTme CMI Data Version: 1
S0 TME CPUID = 1
S1 TME CPUID = 1
S0 TmeActivated = 0
S1 TmeActivated = 0
TmeEnabled: 0
TmeEnabled: 0
TwoLmEnabled: 0
TwoLmEnabled: 0
2LM_XTILE: 0
2LM_XTILE: 0
CMI Credit Data for CPU Stepping: Ex and Later
CMI Credit Data for CPU Stepping: Ex and Later
S0 TME CPUID = 1
S1 TME CPUID = 1
S0 TmeActivated = 0
S1 TmeActivated = 0
TmeEnabled: 0
TmeEnabled: 0
TwoLmEnabled: 0
TwoLmEnabled: 0
2LM_XTILE: 0
2LM_XTILE: 0
CMI Credit Data for CPU Stepping: Ex and Later
CMI Credit Data for CPU Stepping: Ex and Later
S0 TME CPUID = 1
S1 TME CPUID = 1
S0 TmeActivated = 0
S1 TmeActivated = 0
TmeEnabled: 0
TmeEnabled: 0
TwoLmEnabled: 0
TwoLmEnabled: 0
2LM_XTILE: 0
2LM_XTILE: 0
CMI Credit Data for CPU Stepping: Ex and Later
CMI Credit Data for CPU Stepping: Ex and Later
S0 TME CPUID = 1
S1 TME CPUID = 1
S0 TmeActivated = 0
S1 TmeActivated = 0
TmeEnabled: 0
TmeEnabled: 0
TwoLmEnabled: 0
TwoLmEnabled: 0
2LM_XTILE: 0
2LM_XTILE: 0
CMI Credit Data for CPU Stepping: Ex and Later
CMI Credit Data for CPU Stepping: Ex and Later
S0 TME CPUID = 1
S1 TME CPUID = 1
S0 TmeActivated = 0
S1 TmeActivated = 0
TmeEnabled: 0
TmeEnabled: 0
TwoLmEnabled: 0
TwoLmEnabled: 0
2LM_XTILE: 0
2LM_XTILE: 0
CMI Credit Data for CPU Stepping: Ex and Later
CMI Credit Data for CPU Stepping: Ex and Later
Mesh2Mem CMI Data Version: 1
Mesh2Mem CMI Data Version: 1
S0 TME CPUID = 1
S1 TME CPUID = 1
S0 TmeActivated = 0
S1 TmeActivated = 0
TmeEnabled: 0
TmeEnabled: 0
TwoLmEnabled: 0
TwoLmEnabled: 0
2LM_XTILE: 0
2LM_XTILE: 0
CMI Credit Data for CPU Stepping: Ex and Later
CMI Credit Data for CPU Stepping: Ex and Later
S0 TME CPUID = 1
S1 TME CPUID = 1
S0 TmeActivated = 0
S1 TmeActivated = 0
TmeEnabled: 0
TmeEnabled: 0
TwoLmEnabled: 0
TwoLmEnabled: 0
2LM_XTILE: 0
2LM_XTILE: 0
CMI Credit Data for CPU Stepping: Ex and Later
CMI Credit Data for CPU Stepping: Ex and Later
S0 TME CPUID = 1
S1 TME CPUID = 1
S0 TmeActivated = 0
S1 TmeActivated = 0
TmeEnabled: 0
TmeEnabled: 0
TwoLmEnabled: 0
TwoLmEnabled: 0
2LM_XTILE: 0
2LM_XTILE: 0
CMI Credit Data for CPU Stepping: Ex and Later
CMI Credit Data for CPU Stepping: Ex and Later
S0 TME CPUID = 1
S1 TME CPUID = 1
S0 TmeActivated = 0
S1 TmeActivated = 0
S0 TME CPUID = 1
S1 TME CPUID = 1
S0 TmeActivated = 0
S1 TmeActivated = 0
TmeEnabled: 0
TmeEnabled: 0
TwoLmEnabled: 0
TwoLmEnabled: 0
2LM_XTILE: 0
2LM_XTILE: 0
CMI Credit Data for CPU Stepping: Ex and Later
CMI Credit Data for CPU Stepping: Ex and Later
S0 TME CPUID = 1
S1 TME CPUID = 1
S0 TmeActivated = 0
S1 TmeActivated = 0
TmeEnabled: 0
TmeEnabled: 0
TwoLmEnabled: 0
TwoLmEnabled: 0
2LM_XTILE: 0
2LM_XTILE: 0
CMI Credit Data for CPU Stepping: Ex and Later
CMI Credit Data for CPU Stepping: Ex and Later
S0 TME CPUID = 1
S1 TME CPUID = 1
S0 TmeActivated = 0
S1 TmeActivated = 0
TmeEnabled: 0
TmeEnabled: 0
TwoLmEnabled: 0
TwoLmEnabled: 0
2LM_XTILE: 0
2LM_XTILE: 0
CMI Credit Data for CPU Stepping: Ex and Later
CMI Credit Data for CPU Stepping: Ex and Later
S0 TME CPUID = 1
S1 TME CPUID = 1
S0 TmeActivated = 0
S1 TmeActivated = 0
TmeEnabled: 0
TmeEnabled: 0
TwoLmEnabled: 0
TwoLmEnabled: 0
2LM_XTILE: 0
2LM_XTILE: 0
CMI Credit Data for CPU Stepping: Ex and Later
CMI Credit Data for CPU Stepping: Ex and Later
S0 TME CPUID = 1
S1 TME CPUID = 1
S0 TmeActivated = 0
S1 TmeActivated = 0
TmeEnabled: 0
TmeEnabled: 0
TwoLmEnabled: 0
TwoLmEnabled: 0
2LM_XTILE: 0
2LM_XTILE: 0
CMI Credit Data for CPU Stepping: Ex and Later
CMI Credit Data for CPU Stepping: Ex and Later
Mesh2Mem CMI Data Version: 1
Mesh2Mem CMI Data Version: 1
S0 TME CPUID = 1
S1 TME CPUID = 1
S0 TmeActivated = 0
S1 TmeActivated = 0
TmeEnabled: 0
TmeEnabled: 0
TwoLmEnabled: 0
TwoLmEnabled: 0
2LM_XTILE: 0
2LM_XTILE: 0
CMI Credit Data for CPU Stepping: Ex and Later
CMI Credit Data for CPU Stepping: Ex and Later
S0 TME CPUID = 1
S1 TME CPUID = 1
S0 TmeActivated = 0
S1 TmeActivated = 0
TmeEnabled: 0
TmeEnabled: 0
TwoLmEnabled: 0
TwoLmEnabled: 0
2LM_XTILE: 0
2LM_XTILE: 0
CMI Credit Data for CPU Stepping: Ex and Later
CMI Credit Data for CPU Stepping: Ex and Later
S0 TME CPUID = 1
S1 TME CPUID = 1
S0 TmeActivated = 0
S1 TmeActivated = 0
TmeEnabled: 0
TmeEnabled: 0
TwoLmEnabled: 0
TwoLmEnabled: 0
2LM_XTILE: 0
2LM_XTILE: 0
CMI Credit Data for CPU Stepping: Ex and Later
CMI Credit Data for CPU Stepping: Ex and Later
S0 TME CPUID = 1
S1 TME CPUID = 1
S0 TmeActivated = 0
S1 TmeActivated = 0
S0 TME CPUID = 1
S1 TME CPUID = 1
S0 TmeActivated = 0
S1 TmeActivated = 0
TmeEnabled: 0
TmeEnabled: 0
TwoLmEnabled: 0
TwoLmEnabled: 0
2LM_XTILE: 0
2LM_XTILE: 0
CMI Credit Data for CPU Stepping: Ex and Later
CMI Credit Data for CPU Stepping: Ex and Later
S0 TME CPUID = 1
S1 TME CPUID = 1
S0 TmeActivated = 0
S1 TmeActivated = 0
TmeEnabled: 0
TmeEnabled: 0
TwoLmEnabled: 0
TwoLmEnabled: 0
2LM_XTILE: 0
2LM_XTILE: 0
CMI Credit Data for CPU Stepping: Ex and Later
CMI Credit Data for CPU Stepping: Ex and Later
S0 TME CPUID = 1
S1 TME CPUID = 1
S0 TmeActivated = 0
S1 TmeActivated = 0
TmeEnabled: 0
TmeEnabled: 0
TwoLmEnabled: 0
TwoLmEnabled: 0
2LM_XTILE: 0
2LM_XTILE: 0
CMI Credit Data for CPU Stepping: Ex and Later
CMI Credit Data for CPU Stepping: Ex and Later
S0 TME CPUID = 1
S1 TME CPUID = 1
S0 TmeActivated = 0
S1 TmeActivated = 0
TmeEnabled: 0
TmeEnabled: 0
TwoLmEnabled: 0
TwoLmEnabled: 0
2LM_XTILE: 0
2LM_XTILE: 0
CMI Credit Data for CPU Stepping: Ex and Later
CMI Credit Data for CPU Stepping: Ex and Later
S0 TME CPUID = 1
S1 TME CPUID = 1
S0 TmeActivated = 0
S1 TmeActivated = 0
TmeEnabled: 0
TmeEnabled: 0
TwoLmEnabled: 0
TwoLmEnabled: 0
2LM_XTILE: 0
2LM_XTILE: 0
CMI Credit Data for CPU Stepping: Ex and Later
CMI Credit Data for CPU Stepping: Ex and Later
Mesh2Mem CMI Data Version: 1
Mesh2Mem CMI Data Version: 1
S0 TME CPUID = 1
S1 TME CPUID = 1
S0 TmeActivated = 0
S1 TmeActivated = 0
TmeEnabled: 0
TmeEnabled: 0
TwoLmEnabled: 0
TwoLmEnabled: 0
2LM_XTILE: 0
2LM_XTILE: 0
CMI Credit Data for CPU Stepping: Ex and Later
CMI Credit Data for CPU Stepping: Ex and Later
S0 TME CPUID = 1
S1 TME CPUID = 1
S0 TmeActivated = 0
S1 TmeActivated = 0
TmeEnabled: 0
TmeEnabled: 0
TwoLmEnabled: 0
TwoLmEnabled: 0
2LM_XTILE: 0
2LM_XTILE: 0
CMI Credit Data for CPU Stepping: Ex and Later
CMI Credit Data for CPU Stepping: Ex and Later
S0 TME CPUID = 1
S1 TME CPUID = 1
S0 TmeActivated = 0
S1 TmeActivated = 0
TmeEnabled: 0
TmeEnabled: 0
TwoLmEnabled: 0
TwoLmEnabled: 0
2LM_XTILE: 0
2LM_XTILE: 0
CMI Credit Data for CPU Stepping: Ex and Later
CMI Credit Data for CPU Stepping: Ex and Later
S0 TME CPUID = 1
S1 TME CPUID = 1
S0 TmeActivated = 0
S1 TmeActivated = 0
S0 TME CPUID = 1
S1 TME CPUID = 1
S0 TmeActivated = 0
S1 TmeActivated = 0
TmeEnabled: 0
TmeEnabled: 0
TwoLmEnabled: 0
TwoLmEnabled: 0
2LM_XTILE: 0
2LM_XTILE: 0
CMI Credit Data for CPU Stepping: Ex and Later
CMI Credit Data for CPU Stepping: Ex and Later
S0 TME CPUID = 1
S1 TME CPUID = 1
S0 TmeActivated = 0
S1 TmeActivated = 0
TmeEnabled: 0
TmeEnabled: 0
TwoLmEnabled: 0
TwoLmEnabled: 0
2LM_XTILE: 0
2LM_XTILE: 0
CMI Credit Data for CPU Stepping: Ex and Later
CMI Credit Data for CPU Stepping: Ex and Later
S0 TME CPUID = 1
S1 TME CPUID = 1
S0 TmeActivated = 0
S1 TmeActivated = 0
TmeEnabled: 0
TmeEnabled: 0
TwoLmEnabled: 0
TwoLmEnabled: 0
2LM_XTILE: 0
2LM_XTILE: 0
CMI Credit Data for CPU Stepping: Ex and Later
CMI Credit Data for CPU Stepping: Ex and Later
S0 TME CPUID = 1
S1 TME CPUID = 1
S0 TmeActivated = 0
S1 TmeActivated = 0
TmeEnabled: 0
TmeEnabled: 0
TwoLmEnabled: 0
TwoLmEnabled: 0
2LM_XTILE: 0
2LM_XTILE: 0
CMI Credit Data for CPU Stepping: Ex and Later
CMI Credit Data for CPU Stepping: Ex and Later
S0 TME CPUID = 1
S1 TME CPUID = 1
S0 TmeActivated = 0
S1 TmeActivated = 0
TmeEnabled: 0
TmeEnabled: 0
TwoLmEnabled: 0
TwoLmEnabled: 0
2LM_XTILE: 0
2LM_XTILE: 0
CMI Credit Data for CPU Stepping: Ex and Later
CMI Credit Data for CPU Stepping: Ex and Later
S0 TME CPUID = 1
S1 TME CPUID = 1
S0 TmeActivated = 0
S1 TmeActivated = 0
S0 TME CPUID = 1
S1 TME CPUID = 1
S0 TmeActivated = 0
S1 TmeActivated = 0
S0 TME CPUID = 1
S1 TME CPUID = 1
S0 TmeActivated = 0
S1 TmeActivated = 0
S0 TME CPUID = 1
S1 TME CPUID = 1
S0 TmeActivated = 0
S1 TmeActivated = 0
S0 TME CPUID = 1
S1 TME CPUID = 1
S0 TmeActivated = 0
S1 TmeActivated = 0
S0 TME CPUID = 1
S1 TME CPUID = 1
S0 TmeActivated = 0
S1 TmeActivated = 0
S0 TME CPUID = 1
S1 TME CPUID = 1
S0 TmeActivated = 0
S1 TmeActivated = 0
S0 TME CPUID = 1
S1 TME CPUID = 1
S0 TmeActivated = 0
S1 TmeActivated = 0
[ScktId: 0] Init CMI Credit Programming - 1904ms
[ScktId: 1] Init CMI Credit Programming - 1902ms
[ScktId: 0] Program TME Cfg register for SGX/TDX -- Started
[ScktId: 1] Program TME Cfg register for SGX/TDX -- Started
DisableTdxTdMismatchBit return fail: Aborted
DisableTdxTdMismatchBit return fail: Aborted
[ScktId: 1] Program TME Cfg register for SGX/TDX - 17ms
[ScktId: 0] Program TME Cfg register for SGX/TDX - 26ms
[ScktId: 1] Pipe Sync AP Final Error Sync -- Started
[ScktId: 0] Pipe Sync AP Final Error Sync -- Started
[ScktId: 1] Pipe Sync AP Final Error Sync - 16ms
[ScktId: 0] Pipe Sync AP Final Error Sync - 10ms
N1 Checked into Pipe
[ScktId: 0] Initialize ADR -- Started
[ScktId: 0] Initialize ADR - 5ms
N1 Checked into Pipe
[ScktId: 0] Set RAS Configuration -- Started
N0: ProbabilisticTargetedRowRefreshInit Enable
SetPatrolScrub execution on Skt 0
N0: ScrubFactor: 86400, MemSize: 20, Scrub Interval:29E8
N0: ScrubFactor: 86400, MemSize: 20, Scrub Interval:29E8
N0: ScrubFactor: 86400, MemSize: 20, Scrub Interval:29E8
N0: ScrubFactor: 86400, MemSize: 20, Scrub Interval:29E8
N0: ScrubFactor: 86400, MemSize: 20, Scrub Interval:29E8
N0: ScrubFactor: 86400, MemSize: 20, Scrub Interval:29E8
N0: ScrubFactor: 86400, MemSize: 20, Scrub Interval:29E8
N0: ScrubFactor: 86400, MemSize: 20, Scrub Interval:29E8
N0: ScrubFactor: 86400, MemSize: 20, Scrub Interval:29E8
N0: ScrubFactor: 86400, MemSize: 20, Scrub Interval:29E8
N0: ScrubFactor: 86400, MemSize: 20, Scrub Interval:29E8
N0: ScrubFactor: 86400, MemSize: 20, Scrub Interval:29E8
N0: ScrubFactor: 86400, MemSize: 20, Scrub Interval:29E8
N0: ScrubFactor: 86400, MemSize: 20, Scrub Interval:29E8
N0: ScrubFactor: 86400, MemSize: 20, Scrub Interval:29E8
N0: ScrubFactor: 86400, MemSize: 20, Scrub Interval:29E8
[imc] ConfigSystemRetryRegister start
N1: ProbabilisticTargetedRowRefreshInit Enable
SetPatrolScrub execution on Skt 1
N1: ScrubFactor: 86400, MemSize: 20, Scrub Interval:29E8
N1: ScrubFactor: 86400, MemSize: 20, Scrub Interval:29E8
N1: ScrubFactor: 86400, MemSize: 20, Scrub Interval:29E8
N1: ScrubFactor: 86400, MemSize: 20, Scrub Interval:29E8
N1: ScrubFactor: 86400, MemSize: 20, Scrub Interval:29E8
N1: ScrubFactor: 86400, MemSize: 20, Scrub Interval:29E8
N1: ScrubFactor: 86400, MemSize: 20, Scrub Interval:29E8
N1: ScrubFactor: 86400, MemSize: 20, Scrub Interval:29E8
N1: ScrubFactor: 86400, MemSize: 20, Scrub Interval:29E8
N1: ScrubFactor: 86400, MemSize: 20, Scrub Interval:29E8
N1: ScrubFactor: 86400, MemSize: 20, Scrub Interval:29E8
N1: ScrubFactor: 86400, MemSize: 20, Scrub Interval:29E8
N1: ScrubFactor: 86400, MemSize: 20, Scrub Interval:29E8
N1: ScrubFactor: 86400, MemSize: 20, Scrub Interval:29E8
N1: ScrubFactor: 86400, MemSize: 20, Scrub Interval:29E8
N1: ScrubFactor: 86400, MemSize: 20, Scrub Interval:29E8
[imc] ConfigSystemRetryRegister start
SetRASConfig End
[ScktId: 0] Set RAS Configuration - 213ms
N1 Checked into Pipe
[ScktId: 0] Memory Late -- Started
[ScktId: 0] Memory Late - 5ms
[ScktId: 1] Print All Stats -- Started
[ScktId: 0] Print All Stats -- Started
Performance statistics for socket 1
FmcMaxCached = 0
FmcCachedReads = 0
MRC Phase | PCI | PCI | Polling |JEDEC | FixedDelay | Vref | CPGC | SMBUS | SMBUS | MRS | Duration | GetSysHostPointer
| Read | Write | Count | | Time | Count | Count | Read | Write | Write | Time | Calls
--------------------------------------------------------------------------------------------------------------------------------------------
Total Stats | 94101646| 16960209| 62938830 | 1| 2391 | 766684 | 556477 | 3264 | 33316 | 132621 | 52027 | 0 |
PreMrc | 67899| 174374| 1223 | 0| 1 | 0 | 32 | 56 | 24 | 16 | 12 | 0 |
PipeSync | 319487| 152491| 0 | 0| 0 | 0 | 0 | 0 | 0 | 0 | 522 | 0 |
InitStructLate | 13041| 3| 0 | 0| 0 | 0 | 0 | 0 | 0 | 0 | 8 | 0 |
DetectDimmConfig | 269473| 13527| 79773 | 0| 0 | 0 | 0 | 2236 | 2204 | 0 | 320 | 0 |
UnlockMemRegs | 11858| 5| 0 | 0| 0 | 0 | 0 | 0 | 0 | 0 | 7 | 0 |
HBM Pre-Training | 135750| 1707| 0 | 0| 0 | 0 | 0 | 0 | 0 | 0 | 109 | 0 |
ConfigXmp | 12437| 1| 0 | 0| 0 | 0 | 0 | 0 | 0 | 0 | 7 | 0 |
SetPmicVdd | 60206| 85| 460 | 0| 166 | 0 | 0 | 16 | 8 | 0 | 216 | 0 |
EarlyDdrTherm | 11955| 107| 0 | 0| 0 | 0 | 0 | 0 | 0 | 0 | 9 | 0 |
EarlyInitMem | 14231| 1| 0 | 0| 0 | 0 | 0 | 0 | 0 | 0 | 8 | 0 |
HBM Training | 4338928| 236| 0 | 0| 57 | 0 | 0 | 0 | 0 | 0 | 2916 | 0 |
HBM PostPkgRepair | 10945| 1| 0 | 0| 0 | 0 | 0 | 0 | 0 | 0 | 7 | 0 |
HBM Mem BIST | 11545| 1| 0 | 0| 0 | 0 | 0 | 0 | 0 | 0 | 7 | 0 |
HBM ReTraining | 11544| 1| 0 | 0| 0 | 0 | 0 | 0 | 0 | 0 | 7 | 0 |
GatherSPDData | 122697| 817| 2863 | 0| 0 | 0 | 0 | 256 | 4 | 0 | 86 | 0 |
DisplayDimmInfo | 10690| 2| 0 | 0| 0 | 0 | 0 | 0 | 0 | 0 | 580 | 0 |
ChannelEarlyConfig | 2600441| 80597| 176 | 0| 0 | 0 | 0 | 16 | 0 | 0 | 1273 | 0 |
DdrioPowerStatusCheck| 10955| 1| 0 | 0| 0 | 0 | 0 | 0 | 0 | 0 | 8 | 0 |
InitDdrioInterface | 29555| 3706| 0 | 0| 24 | 0 | 0 | 0 | 0 | 0 | 55 | 0 |
X-Over Calib | 732| 398| 0 | 0| 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 |
RcompStaticLeg | 166| 352| 0 | 0| 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 |
DdrPreTrainingInit | 121598| 744| 299 | 1| 16 | 0 | 0 | 0 | 32 | 16 | 104 | 0 |
CsClockEarly | 257773| 189277| 3593 | 0| 26 | 0 | 20 | 16 | 376 | 120 | 244 | 0 |
CaClockEarlySimple | 316194| 350194| 31522 | 0| 20 | 0 | 32 | 192 | 3220 | 3152 | 372 | 0 |
CaClockEarlyComplex| 100361| 78032| 32095 | 0| 5 | 0 | 32 | 192 | 3296 | 3232 | 171 | 0 |
CaClkEarCompRecent | 121772| 78733| 31973 | 0| 5 | 0 | 32 | 192 | 3284 | 3220 | 179 | 0 |
DcaSlewRate | 15698| 1| 0 | 0| 0 | 0 | 0 | 0 | 0 | 0 | 10 | 0 |
RcdDcaDckDutyCycle | 495517| 602311| 2323 | 0| 33 | 0 | 32 | 0 | 260 | 260 | 466 | 0 |
Lrdimm Bcom Train | 2| 1| 0 | 0| 0 | 0 | 0 | 0 | 0 | 0 | 3 | 0 |
DcaDfeTraining | 4335730| 4339202| 76290 | 0| 398 | 0 | 98800 | 0 | 8604 | 3276 | 4096 | 0 |
BsCsClockEarly | 68387| 42085| 21317 | 0| 4 | 0 | 472 | 16 | 2340 | 2320 | 112 | 0 |
BsCaClockEarly | 253714| 138195| 60684 | 0| 8 | 0 | 77 | 0 | 6776 | 6816 | 349 | 0 |
Lrdimm Pba Enu Id | 16288| 1| 0 | 0| 0 | 0 | 0 | 0 | 0 | 0 | 9 | 0 |
Early Req Clk Train| 18670| 2| 0 | 0| 0 | 0 | 0 | 0 | 0 | 0 | 9 | 0 |
LRDIMM RX | 4| 2| 0 | 0| 0 | 0 | 0 | 0 | 0 | 0 | 9 | 0 |
Receive Enable | 20230| 17339| 1686 | 0| 0 | 0 | 570 | 0 | 0 | 8 | 22 | 0 |
Rd Dq/Dqs | 450128| 304588| 56798 | 0| 11 | 44 | 7776 | 0 | 0 | 32 | 372 | 0 |
Swizzle Discovery | 1408| 2422| 48 | 0| 0 | 0 | 48 | 0 | 0 | 32 | 6 | 0 |
Dram Duty Cycle Adj| 2| 1| 0 | 0| 0 | 0 | 0 | 0 | 0 | 0 | 5 | 0 |
RdDqDqsDfeCentering| 69536| 68723| 30420 | 0| 3 | 10148 | 2616 | 0 | 0 | 364 | 95 | 0 |
READ DFE | 3437516| 2702113| 1907674 | 0| 202 | 574896 | 126956 | 0 | 0 | 25320 | 3693 | 0 |
Rx Dq/Dqs Post Dfe | 602885| 524867| 321945 | 0| 39 | 43776 | 24160 | 0 | 0 | 5220 | 684 | 0 |
Periodic Rx Retrain| 89| 21| 0 | 0| 0 | 0 | 0 | 0 | 0 | 0 | 6 | 0 |
Switch DDRT2 Mode | 10969| 33| 0 | 0| 0 | 0 | 0 | 0 | 0 | 0 | 7 | 0 |
LRDIMM TX | 6207| 1| 0 | 0| 0 | 0 | 0 | 0 | 0 | 0 | 7 | 0 |
Write Leveling | 58075| 82456| 4656 | 0| 19 | 0 | 1856 | 0 | 0 | 160 | 103 | 0 |
Wr Dq/Dqs | 472377| 732423| 50688 | 0| 8 | 48 | 17140 | 0 | 0 | 244 | 612 | 0 |
Tx DQ Slew Rate | 2| 1| 0 | 0| 0 | 0 | 0 | 0 | 0 | 0 | 4 | 0 |
WrDqDqsDfeCentering| 134030| 301444| 6144 | 0| 37 | 2596 | 15191 | 0 | 0 | 4381 | 305 | 0 |
PostPkgRepair | 8| 4| 0 | 0| 0 | 0 | 0 | 0 | 0 | 0 | 6 | 0 |
LRDIMM Bs Write | 5915| 1| 0 | 0| 0 | 0 | 0 | 0 | 0 | 0 | 7 | 0 |
DCA TCO | 539652| 609080| 25791 | 0| 31 | 0 | 240 | 0 | 2880 | 2880 | 625 | 0 |
TCO_DQDQS | 2| 1| 0 | 0| 0 | 0 | 0 | 0 | 0 | 0 | 4 | 0 |
TX ODT | 1302| 3393| 0 | 0| 0 | 0 | 216 | 0 | 0 | 72 | 8 | 0 |
WRITE DFE | 5406817| 4012310| 3691239 | 0| 659 | 110840 | 213346 | 0 | 0 | 65010 | 4612 | 0 |
WRITE DB DFE | 2| 1| 0 | 0| 0 | 0 | 0 | 0 | 0 | 0 | 4 | 0 |
Tx Dq/Dqs Post Dfe | 4059685| 316485| 3886979 | 0| 46 | 7292 | 15669 | 0 | 0 | 4479 | 1652 | 0 |
Read Post Dfe Late | 34616717| 659464| 34247215 | 0| 20 | 13092 | 18179 | 0 | 0 | 0 | 12384 | 0 |
MemSweepTester | 2| 1| 0 | 0| 0 | 0 | 0 | 0 | 0 | 0 | 3 | 0 |
Periodic Tx Retrain| 1338| 1629| 24 | 0| 0 | 0 | 16 | 0 | 0 | 4 | 7 | 0 |
Round Trip Opt | 2437670| 29439| 2410176 | 0| 1 | 0 | 1396 | 0 | 0 | 0 | 868 | 0 |
TurnaroundTrain | 1325903| 114821| 1274107 | 0| 18 | 3232 | 5905 | 0 | 0 | 1719 | 536 | 0 |
DisplayResults | 394515| 157746| 5832 | 0| 3 | 360 | 3384 | 0 | 0 | 0 | 205 | 0 |
PostTrainingInit | 15874| 373| 0 | 0| 0 | 0 | 4 | 0 | 0 | 4 | 10 | 0 |
One Time TxRt | 14156| 913| 24 | 0| 512 | 0 | 8 | 0 | 0 | 0 | 521 | 0 |
ExecuteSsaRmt | 10658| 2| 0 | 0| 0 | 0 | 0 | 0 | 0 | 0 | 7 | 0 |
Offset training | 2| 1| 0 | 0| 0 | 0 | 0 | 0 | 0 | 0 | 4 | 0 |
HBM Post-Training | 4283436| 2834| 0 | 0| 0 | 0 | 0 | 0 | 0 | 0 | 2817 | 0 |
LateConfig | 67137| 331| 40 | 0| 0 | 0 | 12 | 4 | 0 | 12 | 41 | 0 |
InitThrottling | 33323| 211| 352 | 0| 0 | 0 | 0 | 32 | 0 | 0 | 31 | 0 |
MEMTEST | 5990848| 4405| 5970576 | 0| 0 | 0 | 60 | 8 | 0 | 12 | 2031 | 0 |
HBM Mem Test | 2461939| 18443| 2413252 | 0| 0 | 0 | 256 | 0 | 0 | 0 | 1197 | 0 |
HBM Scrambling | 66| 65| 0 | 0| 0 | 0 | 0 | 0 | 0 | 0 | 4 | 0 |
HBM Mem Init | 1460247| 2985| 1435954 | 0| 0 | 0 | 32 | 0 | 0 | 0 | 706 | 0 |
Pub DIMM Manifest | 12854| 252| 264 | 0| 0 | 0 | 0 | 24 | 0 | 0 | 14 | 0 |
SvlAndScrambling | 14522| 5| 0 | 0| 0 | 0 | 0 | 0 | 0 | 0 | 9 | 0 |
CpgcOutOfOrderMode | 50| 45| 0 | 0| 0 | 0 | 0 | 0 | 0 | 0 | 5 | 0 |
EnableHostRefresh | 140849| 104| 0 | 0| 0 | 0 | 0 | 0 | 0 | 0 | 92 | 0 |
MEMINIT | 2992575| 1311| 2973727 | 0| 0 | 0 | 16 | 0 | 0 | 0 | 1226 | 0 |
CmiCreditProg | 2917031| 581| 0 | 0| 0 | 0 | 0 | 0 | 0 | 0 | 1902 | 0 |
HBM Normal Mode | 79136| 1275| 0 | 0| 0 | 0 | 0 | 0 | 0 | 0 | 53 | 0 |
Normal Mode | 661133| 1037| 136 | 0| 0 | 0 | 0 | 8 | 8 | 0 | 435 | 0 |
CallTableOverhead | 2708795| 591| 0 | 0| 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 |
Normalize CMD | 20458| 18714| 1680 | 0| 0 | 0 | 592 | 0 | 0 | 24 | 22 | 0 |
No Zone 0 | 2| 2| 0 | 0| 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 |
No Zone 1 | 0| 1| 0 | 0| 0 | 0 | 0 | 0 | 0 | 0 | 4 | 0 |
No Zone 2 | 8211| 1| 0 | 0| 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 |
No Zone 3 | 0| 3| 0 | 0| 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 |
No Zone 4 | 0| 3| 0 | 0| 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 |
No Zone 5 | 0| 3| 0 | 0| 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 |
No Zone 6 | 0| 1| 0 | 0| 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 |
No Zone 7 | 1| 0| 0 | 0| 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 |
No Zone 8 | 0| 1| 0 | 0| 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 |
No Zone 9 | 1969118| 16538| 1876812 | 0| 2 | 360 | 1304 | 0 | 0 | 216 | 1764 | 0 |
Performance statistics for socket 0
FmcMaxCached = 0
FmcCachedReads = 0
MRC Phase | PCI | PCI | Polling |JEDEC | FixedDelay | Vref | CPGC | SMBUS | SMBUS | MRS | Duration | GetSysHostPointer
| Read | Write | Count | | Time | Count | Count | Read | Write | Write | Time | Calls
--------------------------------------------------------------------------------------------------------------------------------------------
Total Stats | 109041503| 16964709| 61730910 | 1| 2395 | 751880 | 557008 | 3264 | 33472 | 133245 | 69630 | 0 |
PreMrc | 149785| 189846| 1262 | 0| 1 | 0 | 32 | 56 | 24 | 16 | 25 | 0 |
PipeSync | 633401| 130845| 0 | 0| 0 | 0 | 0 | 0 | 0 | 0 | 440 | 0 |
SelectBootMode | 11257| 5| 0 | 0| 0 | 0 | 0 | 0 | 0 | 0 | 8 | 0 |
InitStructLate | 22976| 3| 0 | 0| 0 | 0 | 0 | 0 | 0 | 0 | 8 | 0 |
DetectDimmConfig | 421932| 13527| 82120 | 0| 0 | 0 | 0 | 2236 | 2204 | 0 | 322 | 0 |
CheckPor | 11258| 4| 0 | 0| 0 | 0 | 0 | 0 | 0 | 0 | 6 | 0 |
HBM Init Clock | 11195| 4| 0 | 0| 0 | 0 | 0 | 0 | 0 | 0 | 5 | 0 |
Clock Init | 11247| 28| 0 | 0| 0 | 0 | 0 | 0 | 0 | 0 | 96 | 0 |
UnlockMemRegs | 19398| 5| 0 | 0| 0 | 0 | 0 | 0 | 0 | 0 | 7 | 0 |
HBM Pre-Training | 360606| 1709| 0 | 0| 0 | 0 | 0 | 0 | 0 | 0 | 141 | 0 |
ConfigXmp | 17356| 1| 0 | 0| 0 | 0 | 0 | 0 | 0 | 0 | 6 | 0 |
SetClkVdd | 11249| 44| 0 | 0| 0 | 0 | 0 | 0 | 0 | 0 | 5 | 0 |
SetPmicVdd | 136952| 85| 472 | 0| 166 | 0 | 0 | 16 | 8 | 0 | 223 | 0 |
CheckDimmRanks | 11273| 36| 0 | 0| 0 | 0 | 0 | 0 | 0 | 0 | 6 | 0 |
EarlyDdrTherm | 26652| 107| 0 | 0| 0 | 0 | 0 | 0 | 0 | 0 | 10 | 0 |
EarlyInitMem | 21426| 1| 0 | 0| 0 | 0 | 0 | 0 | 0 | 0 | 8 | 0 |
HBM Training | 7483487| 236| 0 | 0| 58 | 0 | 0 | 0 | 0 | 0 | 2916 | 0 |
HBM PostPkgRepair | 17859| 1| 0 | 0| 0 | 0 | 0 | 0 | 0 | 0 | 6 | 0 |
HBM Mem BIST | 16350| 1| 0 | 0| 0 | 0 | 0 | 0 | 0 | 0 | 6 | 0 |
HBM ReTraining | 17370| 1| 0 | 0| 0 | 0 | 0 | 0 | 0 | 0 | 7 | 0 |
GatherSPDData | 220014| 817| 2865 | 0| 0 | 0 | 0 | 256 | 4 | 0 | 88 | 0 |
DisplayDimmInfo | 3040635| 2| 0 | 0| 0 | 0 | 0 | 0 | 0 | 0 | 1153 | 0 |
ChannelEarlyConfig | 1611758| 80597| 176 | 0| 0 | 0 | 0 | 16 | 0 | 0 | 728 | 0 |
DdrioPowerStatusCheck| 25000| 1| 0 | 0| 0 | 0 | 0 | 0 | 0 | 0 | 9 | 0 |
InitDdrioInterface | 33984| 3709| 0 | 0| 24 | 0 | 0 | 0 | 0 | 0 | 52 | 0 |
X-Over Calib | 732| 398| 0 | 0| 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 |
RcompStaticLeg | 179| 352| 0 | 0| 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 |
DdrPreTrainingInit | 244211| 744| 301 | 1| 16 | 0 | 0 | 0 | 32 | 16 | 111 | 0 |
CsClockEarly | 282971| 189277| 3621 | 0| 26 | 0 | 20 | 16 | 376 | 120 | 218 | 0 |
CaClockEarlySimple | 317476| 350882| 32100 | 0| 20 | 0 | 32 | 192 | 3268 | 3200 | 341 | 0 |
CaClockEarlyComplex| 101914| 78867| 32820 | 0| 5 | 0 | 32 | 192 | 3348 | 3284 | 162 | 0 |
CaClkEarCompRecent | 141142| 79366| 32748 | 0| 5 | 0 | 32 | 192 | 3340 | 3276 | 170 | 0 |
DcaSlewRate | 2| 1| 0 | 0| 0 | 0 | 0 | 0 | 0 | 0 | 4 | 0 |
RcdDcaDckDutyCycle | 465726| 602303| 2340 | 0| 33 | 0 | 32 | 0 | 260 | 260 | 410 | 0 |
Lrdimm Bcom Train | 2| 1| 0 | 0| 0 | 0 | 0 | 0 | 0 | 0 | 3 | 0 |
DcaDfeTraining | 4336876| 4339202| 77436 | 0| 398 | 0 | 98800 | 0 | 8604 | 3276 | 3663 | 0 |
BsCsClockEarly | 68462| 42085| 21392 | 0| 4 | 0 | 472 | 16 | 2340 | 2320 | 104 | 0 |
BsCaClockEarly | 254014| 138195| 60984 | 0| 8 | 0 | 77 | 0 | 6776 | 6816 | 323 | 0 |
Lrdimm Pba Enu Id | 2| 1| 0 | 0| 0 | 0 | 0 | 0 | 0 | 0 | 3 | 0 |
Early Req Clk Train| 4| 2| 0 | 0| 0 | 0 | 0 | 0 | 0 | 0 | 3 | 0 |
LRDIMM RX | 2401429| 2| 0 | 0| 0 | 0 | 0 | 0 | 0 | 0 | 465 | 0 |
Receive Enable | 46250| 17335| 1686 | 0| 0 | 0 | 570 | 0 | 0 | 8 | 24 | 0 |
Rd Dq/Dqs | 450476| 304582| 57146 | 0| 11 | 44 | 7776 | 0 | 0 | 32 | 341 | 0 |
Swizzle Discovery | 20755| 2422| 48 | 0| 0 | 0 | 48 | 0 | 0 | 32 | 10 | 0 |
Dram Duty Cycle Adj| 2| 1| 0 | 0| 0 | 0 | 0 | 0 | 0 | 0 | 5 | 0 |
RdDqDqsDfeCentering| 87054| 68623| 29939 | 0| 3 | 10280 | 2624 | 0 | 0 | 364 | 93 | 0 |
READ DFE | 3294937| 2669702| 1789947 | 0| 201 | 558044 | 125648 | 0 | 0 | 25320 | 3362 | 0 |
Rx Dq/Dqs Post Dfe | 591046| 523116| 311398 | 0| 39 | 43912 | 24092 | 0 | 0 | 5220 | 628 | 0 |
Periodic Rx Retrain| 95| 21| 0 | 0| 0 | 0 | 0 | 0 | 0 | 0 | 6 | 0 |
Switch DDRT2 Mode | 10| 33| 0 | 0| 0 | 0 | 0 | 0 | 0 | 0 | 4 | 0 |
LRDIMM TX | 2| 1| 0 | 0| 0 | 0 | 0 | 0 | 0 | 0 | 5 | 0 |
Write Leveling | 58075| 82465| 4656 | 0| 19 | 0 | 1856 | 0 | 0 | 160 | 95 | 0 |
Wr Dq/Dqs | 459058| 732418| 50688 | 0| 8 | 48 | 17140 | 0 | 0 | 244 | 540 | 0 |
Tx DQ Slew Rate | 2| 1| 0 | 0| 0 | 0 | 0 | 0 | 0 | 0 | 4 | 0 |
WrDqDqsDfeCentering| 293000| 301406| 6120 | 0| 36 | 2308 | 15237 | 0 | 0 | 4399 | 304 | 0 |
PostPkgRepair | 8| 4| 0 | 0| 0 | 0 | 0 | 0 | 0 | 0 | 6 | 0 |
LRDIMM Bs Write | 2| 1| 0 | 0| 0 | 0 | 0 | 0 | 0 | 0 | 5 | 0 |
DCA TCO | 471326| 610767| 25920 | 0| 31 | 0 | 240 | 0 | 2880 | 2880 | 553 | 0 |
TCO_DQDQS | 22981| 1| 0 | 0| 0 | 0 | 0 | 0 | 0 | 0 | 8 | 0 |
TX ODT | 1302| 3393| 0 | 0| 0 | 0 | 216 | 0 | 0 | 72 | 8 | 0 |
WRITE DFE | 5314156| 4036757| 3585460 | 0| 664 | 110820 | 214743 | 0 | 0 | 65421 | 4228 | 0 |
WRITE DB DFE | 2| 1| 0 | 0| 0 | 0 | 0 | 0 | 0 | 0 | 4 | 0 |
Tx Dq/Dqs Post Dfe | 4137035| 324531| 3997329 | 0| 47 | 7792 | 15959 | 0 | 0 | 4525 | 1704 | 0 |
Read Post Dfe Late | 33463519| 664145| 33089849 | 0| 20 | 14752 | 18417 | 0 | 0 | 0 | 12501 | 0 |
MemSweepTester | 2| 1| 0 | 0| 0 | 0 | 0 | 0 | 0 | 0 | 3 | 0 |
Periodic Tx Retrain| 12046| 1629| 24 | 0| 0 | 0 | 16 | 0 | 0 | 4 | 9 | 0 |
Round Trip Opt | 2245691| 27663| 2219109 | 0| 1 | 0 | 1348 | 0 | 0 | 0 | 836 | 0 |
TurnaroundTrain | 1257702| 114123| 1206192 | 0| 18 | 3160 | 5880 | 0 | 0 | 1712 | 522 | 0 |
DisplayResults | 147485| 157746| 5832 | 0| 3 | 360 | 3384 | 0 | 0 | 0 | 105 | 0 |
PostTrainingInit | 19586| 373| 0 | 0| 0 | 0 | 4 | 0 | 0 | 4 | 9 | 0 |
One Time TxRt | 21375| 913| 24 | 0| 512 | 0 | 8 | 0 | 0 | 0 | 521 | 0 |
ExecuteSsaRmt | 4| 2| 0 | 0| 0 | 0 | 0 | 0 | 0 | 0 | 3 | 0 |
Offset training | 24510| 1| 0 | 0| 0 | 0 | 0 | 0 | 0 | 0 | 9 | 0 |
HBM Post-Training | 7449935| 2834| 0 | 0| 0 | 0 | 0 | 0 | 0 | 0 | 2818 | 0 |
LateConfig | 101084| 331| 41 | 0| 0 | 0 | 12 | 4 | 0 | 12 | 38 | 0 |
InitThrottling | 108467| 211| 352 | 0| 0 | 0 | 0 | 32 | 0 | 0 | 40 | 0 |
MEMTEST | 5738025| 4405| 5675885 | 0| 0 | 0 | 60 | 8 | 0 | 12 | 2036 | 0 |
HBM Mem Test | 2568874| 18443| 2543944 | 0| 0 | 0 | 256 | 0 | 0 | 0 | 1185 | 0 |
HBM Scrambling | 536| 65| 0 | 0| 0 | 0 | 0 | 0 | 0 | 0 | 4 | 0 |
HBMFaultResilientBoot| 11208| 4| 0 | 0| 0 | 0 | 0 | 0 | 0 | 0 | 6 | 0 |
HBM Reset System | 11166| 4| 0 | 0| 0 | 0 | 0 | 0 | 0 | 0 | 6 | 0 |
HBM Mem Init | 1624438| 2985| 1526400 | 0| 0 | 0 | 32 | 0 | 0 | 0 | 716 | 0 |
Pub DIMM Manifest | 26506| 163| 264 | 0| 0 | 0 | 0 | 24 | 0 | 0 | 10 | 0 |
SvlAndScrambling | 23999| 5| 0 | 0| 0 | 0 | 0 | 0 | 0 | 0 | 9 | 0 |
Mem ALIAS Check | 11257| 4| 0 | 0| 0 | 0 | 0 | 0 | 0 | 0 | 6 | 0 |
CpgcOutOfOrderMode | 29162| 45| 0 | 0| 0 | 0 | 0 | 0 | 0 | 0 | 11 | 0 |
EnableHostRefresh | 241881| 104| 0 | 0| 0 | 0 | 0 | 0 | 0 | 0 | 91 | 0 |
MEMINIT | 3439169| 1311| 3422382 | 0| 0 | 0 | 16 | 0 | 0 | 0 | 1219 | 0 |
CmiCreditProg | 5009464| 581| 0 | 0| 0 | 0 | 0 | 0 | 0 | 0 | 1904 | 0 |
CheckRasPostMrc | 11516| 148| 0 | 0| 0 | 0 | 0 | 0 | 0 | 0 | 7 | 0 |
MemLate | 11242| 47| 0 | 0| 0 | 0 | 0 | 0 | 0 | 0 | 5 | 0 |
Memory Mapping | 17865| 5369| 0 | 0| 0 | 0 | 0 | 0 | 0 | 0 | 16854 | 0 |
HBM Normal Mode | 148086| 1275| 0 | 0| 0 | 0 | 0 | 0 | 0 | 0 | 55 | 0 |
Normal Mode | 1139480| 1037| 136 | 0| 0 | 0 | 0 | 8 | 8 | 0 | 435 | 0 |
InitAdr | 11194| 4| 0 | 0| 0 | 0 | 0 | 0 | 0 | 0 | 5 | 0 |
RAS Config | 14183| 2031| 0 | 0| 0 | 0 | 0 | 0 | 0 | 0 | 213 | 0 |
CallTableOverhead | 3866852| 301| 0 | 0| 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 |
Normalize CMD | 20494| 18736| 1683 | 0| 0 | 0 | 593 | 0 | 0 | 24 | 20 | 0 |
No Zone 0 | 6| 5| 0 | 0| 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 |
No Zone 1 | 0| 1| 0 | 0| 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 |
No Zone 2 | 0| 0| 0 | 0| 0 | 0 | 0 | 0 | 0 | 0 | 203 | 0 |
No Zone 3 | 8571| 2| 0 | 0| 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 |
No Zone 4 | 1| 0| 0 | 0| 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 |
No Zone 5 | 0| 2| 0 | 0| 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 |
No Zone 6 | 1| 0| 0 | 0| 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 |
No Zone 7 | 0| 2| 0 | 0| 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 |
No Zone 8 | 1| 0| 0 | 0| 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 |
No Zone 9 | 1997784| 16784| 1827819 | 0| 2 | 360 | 1304 | 0 | 0 | 216 | 3018 | 0 |
[ScktId: 1] Print All Stats - 3220ms
[ScktId: 0] Print All Stats - 3220ms
[ScktId: 1] Print Performance Settings -- Started
[ScktId: 0] Print Performance Settings -- Started
[ScktId: 1] Print Performance Settings - 9ms
[ScktId: 0] Print Performance Settings - 11ms
N1 Checked into Pipe
[ScktId: 0] DIMM Information After MRC -- Started
======================================================================================
START_DIMMINFO_SYSTEM_TABLE
======================================================================================
| Socket 0 | Socket 1 | Socket 2 | Socket 3 | System |
======================================================================================
Active Memory | 128GB | 128GB | N/A | N/A | 256GB |
DDR Freq | | | | | DDR5-4800 |
Ch0 CL-RCD-RP-CMD |40-39-39-1n |40-39-39-1n | | | |
Ch2 CL-RCD-RP-CMD |40-39-39-1n |40-39-39-1n | | | |
Ch4 CL-RCD-RP-CMD |40-39-39-1n |40-39-39-1n | | | |
Ch6 CL-RCD-RP-CMD |40-39-39-1n |40-39-39-1n | | | |
DDR Vdd | 1.145V | 1.145V | N/A | N/A | |
ECC Checking | | | | | On |
Patrol/Demand Scrub | | | | | Off |
RAS Mode | | | | | Indep |
Paging Policy | | | | | Closed |
Data Scrambling | | | | | On |
CCMRC Revision | | | | | 00.50.00 |
RC Version | | | | | 1.1.1.01BC |
======================================================================================
STOP_DIMMINFO_SYSTEM_TABLE
======================================================================================
[ScktId: 0] DIMM Information After MRC - 195ms
N1 Checked into Pipe
[ScktId: 0] DDR Reset Loop -- Started
[ScktId: 0] DDR Reset Loop - 5ms
[ScktId: 1] Pipe Sync AP Final Error Sync -- Started
[ScktId: 0] Pipe Sync AP Final Error Sync -- Started
[ScktId: 1] Pipe Sync AP Final Error Sync - 10ms
[ScktId: 0] Pipe Sync AP Final Error Sync - 10ms
Total MRC time = 74355ms
Total MRC time = 74559ms
STOP_MRC_RUN
Final Rc Heap usage:
******* Configure Mesh Mode - START *******
Configure Socket 0 2LM Hash on KTI and IIO-Enabled
Configure Socket 1 2LM Hash on KTI and IIO-Enabled
Socket 0 Tolm 20
SADEntry Local Base Limit Cluster Ways NmChWays ImcIntBitmap NmImcIntBitmap Mc0ChIntMap Mc1ChIntMap Mc2ChIntMap Mc3ChIntMap Type
0 1 0x0000000 0x0000040 0 1 8 0x1 0x1 0x3 0x3 0x3 0x3 2LM HBM cache DDR Granularity=256B IntGranularity=2
MemInfo->imcBitmap[0][MC_TECH_DDR]=0x1 McBitmapPerCluster[0]=0x1 XorDefeature[socket=0]=0
Ways[socket=0][cluster=0]=8
1 1 0x0000040 0x0000220 0 1 8 0x1 0x1 0x3 0x3 0x3 0x3 2LM HBM cache DDR Granularity=256B IntGranularity=2
MemInfo->imcBitmap[0][MC_TECH_DDR]=0x1 XorDefeature[socket=0]=0
Ways[socket=0][cluster=0]=8
16 1 0x0000220 0x0000420 1 1 8 0x2 0x2 0x3 0x3 0x3 0x3 2LM HBM cache DDR Granularity=256B IntGranularity=2
MemInfo->imcBitmap[0][MC_TECH_DDR]=0x3 McBitmapPerCluster[1]=0x2 XorDefeature[socket=0]=0
Ways[socket=0][cluster=1]=8
17 0 0x0000420 0x0000420 1 0 0 0x0 0x0 0x0 0x0 0x0 0x0 NXM Granularity=Unknown
32 1 0x0000420 0x0000620 2 1 8 0x4 0x4 0x3 0x3 0x3 0x3 2LM HBM cache DDR Granularity=256B IntGranularity=2
MemInfo->imcBitmap[0][MC_TECH_DDR]=0x7 McBitmapPerCluster[2]=0x4 XorDefeature[socket=0]=0
Ways[socket=0][cluster=2]=8
33 0 0x0000620 0x0000620 2 0 0 0x0 0x0 0x0 0x0 0x0 0x0 NXM Granularity=Unknown
48 1 0x0000620 0x0000820 3 1 8 0x8 0x8 0x3 0x3 0x3 0x3 2LM HBM cache DDR Granularity=256B IntGranularity=2
MemInfo->imcBitmap[0][MC_TECH_DDR]=0xF McBitmapPerCluster[3]=0x8 XorDefeature[socket=0]=0
Ways[socket=0][cluster=3]=8
49 0 0x0000820 0x0000820 3 0 0 0x0 0x0 0x0 0x0 0x0 0x0 NXM Granularity=Unknown
MC-Cluster InterleaveEn PrefetchEn Membase MemLimit
0 0 0 0x0000000 0x0000220
NumOfMcEnabled=1, NumOfMcPerCluster=1
1 0 0 0x0000220 0x0000420
NumOfMcEnabled=2, NumOfMcPerCluster=1
2 0 0 0x0000420 0x0000620
NumOfMcEnabled=3, NumOfMcPerCluster=1
3 0 0 0x0000620 0x0000820
NumOfMcEnabled=4, NumOfMcPerCluster=1
Number of clusters = 4
Socket 1 Tolm 20
SADEntry Local Base Limit Cluster Ways NmChWays ImcIntBitmap NmImcIntBitmap Mc0ChIntMap Mc1ChIntMap Mc2ChIntMap Mc3ChIntMap Type
0 1 0x0000820 0x0000A20 0 1 8 0x1 0x1 0x3 0x3 0x3 0x3 2LM HBM cache DDR Granularity=256B IntGranularity=2
MemInfo->imcBitmap[1][MC_TECH_DDR]=0x1 McBitmapPerCluster[0]=0x1 XorDefeature[socket=1]=0
Ways[socket=1][cluster=0]=8
16 1 0x0000A20 0x0000C20 1 1 8 0x2 0x2 0x3 0x3 0x3 0x3 2LM HBM cache DDR Granularity=256B IntGranularity=2
MemInfo->imcBitmap[1][MC_TECH_DDR]=0x3 McBitmapPerCluster[1]=0x2 XorDefeature[socket=1]=0
Ways[socket=1][cluster=1]=8
32 1 0x0000C20 0x0000E20 2 1 8 0x4 0x4 0x3 0x3 0x3 0x3 2LM HBM cache DDR Granularity=256B IntGranularity=2
MemInfo->imcBitmap[1][MC_TECH_DDR]=0x7 McBitmapPerCluster[2]=0x4 XorDefeature[socket=1]=0
Ways[socket=1][cluster=2]=8
48 1 0x0000E20 0x0001020 3 1 8 0x8 0x8 0x3 0x3 0x3 0x3 2LM HBM cache DDR Granularity=256B IntGranularity=2
MemInfo->imcBitmap[1][MC_TECH_DDR]=0xF McBitmapPerCluster[3]=0x8 XorDefeature[socket=1]=0
Ways[socket=1][cluster=3]=8
MC-Cluster InterleaveEn PrefetchEn Membase MemLimit
0 0 0 0x0000820 0x0000A20
NumOfMcEnabled=1, NumOfMcPerCluster=1
1 0 0 0x0000A20 0x0000C20
NumOfMcEnabled=2, NumOfMcPerCluster=1
2 0 0 0x0000C20 0x0000E20
NumOfMcEnabled=3, NumOfMcPerCluster=1
3 0 0 0x0000E20 0x0001020
NumOfMcEnabled=4, NumOfMcPerCluster=1
Number of clusters = 4
Socket 0
SNC_Base_1 = 0000 GB
SNC_Base_2 = 0034 GB
SNC_Base_3 = 0066 GB
SNC_Base_4 = 0098 GB
SNC_Base_5 = 0130 GB
Socket 1
SNC_Base_1 = 0130 GB
SNC_Base_2 = 0162 GB
SNC_Base_3 = 0194 GB
SNC_Base_4 = 0226 GB
SNC_Base_5 = 0258 GB
Socket 0 XPT and KTI prefetch Disabled
Programming credits for clustering mode
Socket 1 XPT and KTI prefetch Disabled
Programming credits for clustering mode
[SDSi] Init for Socket[0] - Begin
[VSEC] VSEC discovery - S:B:D:F = 0x0:0x6A:0x3:0x1, VidDid = 0x09A78086
VsecId: 0x00000041 SDSI VSEC capability offset: 0x00000160
[OOBMSM] InitOobMsmBar() Enter
Socket[0], OobMsm.Func[1], BAR[1]
Disable MSE and BME
Original StsCmdReg Value = 0x00100006
BarSize: 0x00040000
BarBase: 0xC6B40000(Already assigned)
Enable MSE and BME
[OOBMSM] InitOobMsmBar() Exit
SDSi MMIO Layout Address = 0xC6B42000
SdsiMmio.Ppin Address = 0xC6B42408, Value = 0x22E546CB1AD8E915
[OOBMSM] InitOobMsmBar() Enter
Socket[0], OobMsm.Func[1], BAR[0]
Disable MSE and BME
Original StsCmdReg Value = 0x00100006
BarSize: 0x00002000
BarBase: 0xC6B00000(Already assigned)
Enable MSE and BME
[OOBMSM] InitOobMsmBar() Exit
PMon Bar0 address: 0xC6B00000
Global Discovery State at address: 0xC6B00000
Access Type|Max Blocks|Block Stride|Type ||GlobalControlAddr||NumBlockStatusBits|GblCtrStatAddr
[63:62] |[25:16] |[15:8] |[7:0]||[63:0] ||[23:8] |[7:0]
0 |221 |4 |5 ||0x2FF0 ||209 |0xE
Unit Discovery State at address: 0xC6B00020
Access Type|UnitStatus Offset|Counter0 Offset|Ctrl Width|Ctrl0 Offset|Num Ctrl Regs||UnitCounterControlAddr||Gbl Stat Pos|Unit ID|UnitType|Offset
[63:62] |[39:32] |[31:24] |[23:16] |[15:8] |[7:0] ||[63:0] ||[47:32] |[31:16]|[15:0]|
UNIT_TYPE_CHA
0 |0x01 |0x08 |48 |0x02 |4 ||0x00002000 || 0 | 0 |0|0x0040
UNIT_TYPE_CHA
0 |0x01 |0x08 |48 |0x02 |4 ||0x00002010 || 1 | 1 |0|0x0060
UNIT_TYPE_CHA
0 |0x01 |0x08 |48 |0x02 |4 ||0x00002020 || 2 | 2 |0|0x0080
UNIT_TYPE_CHA
0 |0x01 |0x08 |48 |0x02 |4 ||0x00002030 || 3 | 3 |0|0x00A0
UNIT_TYPE_CHA
0 |0x01 |0x08 |48 |0x02 |4 ||0x00002040 || 4 | 4 |0|0x00C0
UNIT_TYPE_CHA
0 |0x01 |0x08 |48 |0x02 |4 ||0x00002050 || 5 | 5 |0|0x00E0
UNIT_TYPE_CHA
0 |0x01 |0x08 |48 |0x02 |4 ||0x00002060 || 6 | 6 |0|0x0100
UNIT_TYPE_CHA
0 |0x01 |0x08 |48 |0x02 |4 ||0x00002070 || 7 | 7 |0|0x0120
UNIT_TYPE_CHA
0 |0x01 |0x08 |48 |0x02 |4 ||0x00002080 || 8 | 8 |0|0x0140
UNIT_TYPE_CHA
0 |0x01 |0x08 |48 |0x02 |4 ||0x00002090 || 9 | 9 |0|0x0160
UNIT_TYPE_CHA
0 |0x01 |0x08 |48 |0x02 |4 ||0x000020A0 ||10 |10 |0|0x0180
UNIT_TYPE_CHA
0 |0x01 |0x08 |48 |0x02 |4 ||0x000020B0 ||11 |11 |0|0x01A0
UNIT_TYPE_CHA
0 |0x01 |0x08 |48 |0x02 |4 ||0x000020C0 ||12 |12 |0|0x01C0
UNIT_TYPE_CHA
0 |0x01 |0x08 |48 |0x02 |4 ||0x000020D0 ||13 |13 |0|0x01E0
UNIT_TYPE_CHA
0 |0x01 |0x08 |48 |0x02 |4 ||0x000020E0 ||14 |14 |0|0x0200
UNIT_TYPE_CHA
0 |0x01 |0x08 |48 |0x02 |4 ||0x000020F0 ||15 |15 |0|0x0220
UNIT_TYPE_CHA
0 |0x01 |0x08 |48 |0x02 |4 ||0x00002100 ||16 |16 |0|0x0240
UNIT_TYPE_CHA
0 |0x01 |0x08 |48 |0x02 |4 ||0x00002110 ||17 |17 |0|0x0260
UNIT_TYPE_CHA
0 |0x01 |0x08 |48 |0x02 |4 ||0x00002120 ||18 |18 |0|0x0280
UNIT_TYPE_CHA
0 |0x01 |0x08 |48 |0x02 |4 ||0x00002130 ||19 |19 |0|0x02A0
UNIT_TYPE_CHA
0 |0x01 |0x08 |48 |0x02 |4 ||0x00002140 ||20 |20 |0|0x02C0
UNIT_TYPE_CHA
0 |0x01 |0x08 |48 |0x02 |4 ||0x00002150 ||21 |21 |0|0x02E0
UNIT_TYPE_CHA
0 |0x01 |0x08 |48 |0x02 |4 ||0x00002160 ||22 |22 |0|0x0300
UNIT_TYPE_CHA
0 |0x01 |0x08 |48 |0x02 |4 ||0x00002170 ||23 |23 |0|0x0320
UNIT_TYPE_CHA
0 |0x01 |0x08 |48 |0x02 |4 ||0x00002180 ||24 |24 |0|0x0340
UNIT_TYPE_CHA
0 |0x01 |0x08 |48 |0x02 |4 ||0x00002190 ||25 |25 |0|0x0360
UNIT_TYPE_CHA
0 |0x01 |0x08 |48 |0x02 |4 ||0x000021A0 ||26 |26 |0|0x0380
UNIT_TYPE_CHA
0 |0x01 |0x08 |48 |0x02 |4 ||0x000021B0 ||27 |27 |0|0x03A0
UNIT_TYPE_CHA
0 |0x01 |0x08 |48 |0x02 |4 ||0x000021C0 ||28 |28 |0|0x03C0
UNIT_TYPE_CHA
0 |0x01 |0x08 |48 |0x02 |4 ||0x000021D0 ||29 |29 |0|0x03E0
UNIT_TYPE_CHA
0 |0x01 |0x08 |48 |0x02 |4 ||0x000021E0 ||30 |30 |0|0x0400
UNIT_TYPE_CHA
0 |0x01 |0x08 |48 |0x02 |4 ||0x000021F0 ||31 |31 |0|0x0420
UNIT_TYPE_CHA
0 |0x01 |0x08 |48 |0x02 |4 ||0x00002200 ||32 |32 |0|0x0440
UNIT_TYPE_CHA
0 |0x01 |0x08 |48 |0x02 |4 ||0x00002210 ||33 |33 |0|0x0460
UNIT_TYPE_CHA
0 |0x01 |0x08 |48 |0x02 |4 ||0x00002220 ||34 |34 |0|0x0480
UNIT_TYPE_CHA
0 |0x01 |0x08 |48 |0x02 |4 ||0x00002230 ||35 |35 |0|0x04A0
UNIT_TYPE_CHA
0 |0x01 |0x08 |48 |0x02 |4 ||0x00002240 ||36 |36 |0|0x04C0
UNIT_TYPE_CHA
0 |0x01 |0x08 |48 |0x02 |4 ||0x00002250 ||37 |37 |0|0x04E0
UNIT_TYPE_CHA
0 |0x01 |0x08 |48 |0x02 |4 ||0x00002260 ||38 |38 |0|0x0500
UNIT_TYPE_CHA
0 |0x01 |0x08 |48 |0x02 |4 ||0x00002270 ||39 |39 |0|0x0520
UNIT_TYPE_CHA
0 |0x01 |0x08 |48 |0x02 |4 ||0x00002280 ||40 |40 |0|0x0540
UNIT_TYPE_CHA
0 |0x01 |0x08 |48 |0x02 |4 ||0x00002290 ||41 |41 |0|0x0560
UNIT_TYPE_CHA
0 |0x01 |0x08 |48 |0x02 |4 ||0x000022A0 ||42 |42 |0|0x0580
UNIT_TYPE_CHA
0 |0x01 |0x08 |48 |0x02 |4 ||0x000022B0 ||43 |43 |0|0x05A0
UNIT_TYPE_CHA
0 |0x01 |0x08 |48 |0x02 |4 ||0x000022C0 ||44 |44 |0|0x05C0
UNIT_TYPE_CHA
0 |0x01 |0x08 |48 |0x02 |4 ||0x000022D0 ||45 |45 |0|0x05E0
UNIT_TYPE_CHA
0 |0x01 |0x08 |48 |0x02 |4 ||0x000022E0 ||46 |46 |0|0x0600
UNIT_TYPE_CHA
0 |0x01 |0x08 |48 |0x02 |4 ||0x000022F0 ||47 |47 |0|0x0620
UNIT_TYPE_CHA
0 |0x01 |0x08 |48 |0x02 |4 ||0x00002300 ||48 |48 |0|0x0640
UNIT_TYPE_CHA
0 |0x01 |0x08 |48 |0x02 |4 ||0x00002310 ||49 |49 |0|0x0660
UNIT_TYPE_CHA
0 |0x01 |0x08 |48 |0x02 |4 ||0x00002320 ||50 |50 |0|0x0680
UNIT_TYPE_CHA
0 |0x01 |0x08 |48 |0x02 |4 ||0x00002330 ||51 |51 |0|0x06A0
UNIT_TYPE_CHA
0 |0x01 |0x08 |48 |0x02 |4 ||0x00002340 ||52 |52 |0|0x06C0
UNIT_TYPE_CHA
0 |0x01 |0x08 |48 |0x02 |4 ||0x00002350 ||53 |53 |0|0x06E0
UNIT_TYPE_CHA
0 |0x01 |0x08 |48 |0x02 |4 ||0x00002360 ||54 |54 |0|0x0700
UNIT_TYPE_CHA
0 |0x01 |0x08 |48 |0x02 |4 ||0x00002370 ||55 |55 |0|0x0720
UNIT_TYPE_CHA
0 |0x01 |0x08 |48 |0x02 |4 ||0x00002380 ||56 |56 |0|0x0740
UNIT_TYPE_CHA
0 |0x01 |0x08 |48 |0x02 |4 ||0x00002390 ||57 |57 |0|0x0760
UNIT_TYPE_CHA
0 |0x01 |0x08 |48 |0x02 |4 ||0x000023A0 ||58 |58 |0|0x0780
UNIT_TYPE_CHA
0 |0x01 |0x08 |48 |0x02 |4 ||0x000023B0 ||59 |59 |0|0x07A0
UNIT_TYPE_TC
0 |0x01 |0x08 |48 |0x02 |4 ||0x00003000 ||100 | 0 |1|0x0C60
UNIT_TYPE_TC
0 |0x01 |0x08 |48 |0x02 |4 ||0x00003010 ||101 | 1 |1|0x0CC0
UNIT_TYPE_TC
0 |0x01 |0x08 |48 |0x02 |4 ||0x00003020 ||102 | 2 |1|0x0D20
UNIT_TYPE_TC
0 |0x01 |0x08 |48 |0x02 |4 ||0x00003030 ||103 | 3 |1|0x0D80
UNIT_TYPE_TC
0 |0x00 |0x00 | 0 |0x00 |0 ||0x00000000 || 0 | 0 |0|0x0DE0
UNIT_TYPE_TC
0 |0x01 |0x08 |48 |0x02 |4 ||0x00003040 ||105 | 5 |1|0x0E40
UNIT_TYPE_TC
0 |0x01 |0x08 |48 |0x02 |4 ||0x00003050 ||106 | 6 |1|0x0EA0
UNIT_TYPE_TC
0 |0x01 |0x08 |48 |0x02 |4 ||0x00003060 ||107 | 7 |1|0x0F00
UNIT_TYPE_TC
0 |0x01 |0x08 |48 |0x02 |4 ||0x00003070 ||108 | 8 |1|0x0F60
UNIT_TYPE_TC
0 |0x01 |0x08 |48 |0x02 |4 ||0x00003080 ||109 | 9 |1|0x0FC0
UNIT_TYPE_TC
0 |0x00 |0x00 | 0 |0x00 |0 ||0x00000000 || 0 | 0 |0|0x1020
UNIT_TYPE_TC
0 |0x01 |0x08 |48 |0x02 |4 ||0x00003090 ||111 |11 |1|0x1080
UNIT_TYPE_IRP
0 |0x01 |0x08 |48 |0x02 |2 ||0x00003400 ||112 | 0 |2|0x0C80
UNIT_TYPE_IRP
0 |0x01 |0x08 |48 |0x02 |2 ||0x00003410 ||113 | 1 |2|0x0CE0
UNIT_TYPE_IRP
0 |0x01 |0x08 |48 |0x02 |2 ||0x00003420 ||114 | 2 |2|0x0D40
UNIT_TYPE_IRP
0 |0x01 |0x08 |48 |0x02 |2 ||0x00003430 ||115 | 3 |2|0x0DA0
UNIT_TYPE_IRP
0 |0x00 |0x00 | 0 |0x00 |0 ||0x00000000 || 0 | 0 |0|0x0E00
UNIT_TYPE_IRP
0 |0x01 |0x08 |48 |0x02 |2 ||0x00003440 ||117 | 5 |2|0x0E60
UNIT_TYPE_IRP
0 |0x01 |0x08 |48 |0x02 |2 ||0x00003450 ||118 | 6 |2|0x0EC0
UNIT_TYPE_IRP
0 |0x01 |0x08 |48 |0x02 |2 ||0x00003460 ||119 | 7 |2|0x0F20
UNIT_TYPE_IRP
0 |0x01 |0x08 |48 |0x02 |2 ||0x00003470 ||120 | 8 |2|0x0F80
UNIT_TYPE_IRP
0 |0x01 |0x08 |48 |0x02 |2 ||0x00003480 ||121 | 9 |2|0x0FE0
UNIT_TYPE_IRP
0 |0x00 |0x00 | 0 |0x00 |0 ||0x00000000 || 0 | 0 |0|0x1040
UNIT_TYPE_IRP
0 |0x01 |0x08 |48 |0x02 |2 ||0x00003490 ||123 |11 |2|0x10A0
UNIT_TYPE_M2PCIE
0 |0x01 |0x08 |48 |0x02 |4 ||0x00003200 ||124 | 0 |3|0x0C40
UNIT_TYPE_M2PCIE
0 |0x01 |0x08 |48 |0x02 |4 ||0x00003210 ||125 | 1 |3|0x0CA0
UNIT_TYPE_M2PCIE
0 |0x01 |0x08 |48 |0x02 |4 ||0x00003220 ||126 | 2 |3|0x0D00
UNIT_TYPE_M2PCIE
0 |0x01 |0x08 |48 |0x02 |4 ||0x00003230 ||127 | 3 |3|0x0D60
UNIT_TYPE_M2PCIE
0 |0x00 |0x00 | 0 |0x00 |0 ||0x00000000 || 0 | 0 |0|0x0DC0
UNIT_TYPE_M2PCIE
0 |0x01 |0x08 |48 |0x02 |4 ||0x00003240 ||129 | 5 |3|0x0E20
UNIT_TYPE_M2PCIE
0 |0x01 |0x08 |48 |0x02 |4 ||0x00003250 ||130 | 6 |3|0x0E80
UNIT_TYPE_M2PCIE
0 |0x01 |0x08 |48 |0x02 |4 ||0x00003260 ||131 | 7 |3|0x0EE0
UNIT_TYPE_M2PCIE
0 |0x01 |0x08 |48 |0x02 |4 ||0x00003270 ||132 | 8 |3|0x0F40
UNIT_TYPE_M2PCIE
0 |0x01 |0x08 |48 |0x02 |4 ||0x00003280 ||133 | 9 |3|0x0FA0
UNIT_TYPE_M2PCIE
0 |0x00 |0x00 | 0 |0x00 |0 ||0x00000000 || 0 | 0 |0|0x1000
UNIT_TYPE_M2PCIE
0 |0x01 |0x08 |48 |0x02 |4 ||0x00003290 ||135 |11 |3|0x1060
UNIT_TYPE_PCU
0 |0x01 |0x08 |48 |0x02 |4 ||0x00002FC0 ||136 | 0 |4|0x0020
UNIT_TYPE_MC
1 |0x5C |0x08 |48 |0x40 |4 ||0xC8AA2800 ||138 | 0 |6|0x08C0
UNIT_TYPE_MC
1 |0x5C |0x08 |48 |0x40 |4 ||0xC8AAA800 ||139 | 1 |6|0x08E0
UNIT_TYPE_MC
1 |0x5C |0x08 |48 |0x40 |4 ||0xC8B22800 ||140 | 2 |6|0x0900
UNIT_TYPE_MC
1 |0x5C |0x08 |48 |0x40 |4 ||0xC8B2A800 ||141 | 3 |6|0x0920
UNIT_TYPE_MC
1 |0x5C |0x08 |48 |0x40 |4 ||0xC8BA2800 ||142 | 4 |6|0x0940
UNIT_TYPE_MC
1 |0x5C |0x08 |48 |0x40 |4 ||0xC8BAA800 ||143 | 5 |6|0x0960
UNIT_TYPE_MC
1 |0x5C |0x08 |48 |0x40 |4 ||0xC8C22800 ||144 | 6 |6|0x0980
UNIT_TYPE_MC
1 |0x5C |0x08 |48 |0x40 |4 ||0xC8C2A800 ||145 | 7 |6|0x09A0
UNIT_TYPE_M2M
2 |0x70 |0x08 |48 |0x30 |4 ||0x87E60438 ||146 | 0 |7|0x09C0
UNIT_TYPE_M2M
2 |0x70 |0x08 |48 |0x30 |4 ||0x87E68438 ||147 | 1 |7|0x09E0
UNIT_TYPE_M2M
2 |0x70 |0x08 |48 |0x30 |4 ||0x87E70438 ||148 | 2 |7|0x0A00
UNIT_TYPE_M2M
2 |0x70 |0x08 |48 |0x30 |4 ||0x87E78438 ||149 | 3 |7|0x0A20
UNIT_TYPE_M2M
2 |0x70 |0x08 |48 |0x30 |4 ||0x87E80438 ||150 | 4 |7|0x0A40
UNIT_TYPE_M2M
2 |0x70 |0x08 |48 |0x30 |4 ||0x87E88438 ||151 | 5 |7|0x0A60
UNIT_TYPE_M2M
2 |0x70 |0x08 |48 |0x30 |4 ||0x87E90438 ||152 | 6 |7|0x0A80
UNIT_TYPE_M2M
2 |0x70 |0x08 |48 |0x30 |4 ||0x87E98438 ||153 | 7 |7|0x0AA0
UNIT_TYPE_M2M
2 |0x70 |0x08 |48 |0x30 |4 ||0x87EA0438 ||154 | 8 |7|0x0AC0
UNIT_TYPE_M2M
2 |0x70 |0x08 |48 |0x30 |4 ||0x87EA8438 ||155 | 9 |7|0x0AE0
UNIT_TYPE_M2M
2 |0x70 |0x08 |48 |0x30 |4 ||0x87EB0438 ||156 |10 |7|0x0B00
UNIT_TYPE_M2M
2 |0x70 |0x08 |48 |0x30 |4 ||0x87EB8438 ||157 |11 |7|0x0B20
UNIT_TYPE_M2M
2 |0x70 |0x08 |48 |0x30 |4 ||0x87EC0438 ||158 |12 |7|0x0B40
UNIT_TYPE_M2M
2 |0x70 |0x08 |48 |0x30 |4 ||0x87EC8438 ||159 |13 |7|0x0B60
UNIT_TYPE_M2M
2 |0x70 |0x08 |48 |0x30 |4 ||0x87ED0438 ||160 |14 |7|0x0B80
UNIT_TYPE_M2M
2 |0x70 |0x08 |48 |0x30 |4 ||0x87ED8438 ||161 |15 |7|0x0BA0
UNIT_TYPE_M2M
2 |0x70 |0x08 |48 |0x30 |4 ||0x87EE0438 ||162 |16 |7|0x0BC0
UNIT_TYPE_M2M
2 |0x70 |0x08 |48 |0x30 |4 ||0x87EE8438 ||163 |17 |7|0x0BE0
UNIT_TYPE_M2M
2 |0x70 |0x08 |48 |0x30 |4 ||0x87EF0438 ||164 |18 |7|0x0C00
UNIT_TYPE_M2M
2 |0x70 |0x08 |48 |0x30 |4 ||0x87EF8438 ||165 |19 |7|0x0C20
UNIT_TYPE_UPI_LL
2 |0x64 |0x08 |48 |0x38 |4 ||0x87E09318 ||166 | 0 |8|0x07E0
UNIT_TYPE_UPI_LL
2 |0x64 |0x08 |48 |0x38 |4 ||0x87E11318 ||167 | 1 |8|0x0820
UNIT_TYPE_UPI_LL
2 |0x64 |0x08 |48 |0x38 |4 ||0x87E19318 ||168 | 2 |8|0x0860
UNIT_TYPE_UPI_LL
2 |0x64 |0x08 |48 |0x38 |4 ||0x87E21318 ||169 | 3 |8|0x08A0
UNIT_TYPE_M3UPI
2 |0x58 |0x08 |48 |0x38 |4 ||0x87E290A0 ||170 | 0 |9|0x07C0
UNIT_TYPE_M3UPI
2 |0x58 |0x08 |48 |0x38 |4 ||0x87E310A0 ||171 | 1 |9|0x0800
UNIT_TYPE_M3UPI
2 |0x58 |0x08 |48 |0x38 |4 ||0x87E390A0 ||172 | 2 |9|0x0840
UNIT_TYPE_M3UPI
2 |0x58 |0x08 |48 |0x38 |4 ||0x87E410A0 ||173 | 3 |9|0x0880
UNIT_TYPE_MDF
0 |0x01 |0x08 |48 |0x02 |4 ||0x00002840 ||60 | 0 |11|0x12C0
UNIT_TYPE_MDF
0 |0x01 |0x08 |48 |0x02 |4 ||0x00002850 ||61 | 1 |11|0x12E0
UNIT_TYPE_MDF
0 |0x01 |0x08 |48 |0x02 |4 ||0x00002860 ||62 | 2 |11|0x1300
UNIT_TYPE_MDF
0 |0x01 |0x08 |48 |0x02 |4 ||0x00002870 ||63 | 3 |11|0x1320
UNIT_TYPE_MDF
0 |0x01 |0x08 |48 |0x02 |4 ||0x00002880 ||64 | 4 |11|0x1340
UNIT_TYPE_MDF
0 |0x01 |0x08 |48 |0x02 |4 ||0x00002890 ||65 | 5 |11|0x1360
UNIT_TYPE_MDF
0 |0x01 |0x08 |48 |0x02 |4 ||0x000028E0 ||66 | 6 |11|0x1380
UNIT_TYPE_MDF
0 |0x01 |0x08 |48 |0x02 |4 ||0x000028F0 ||67 | 7 |11|0x13A0
UNIT_TYPE_MDF
0 |0x01 |0x08 |48 |0x02 |4 ||0x00002900 ||68 | 8 |11|0x13C0
UNIT_TYPE_MDF
0 |0x01 |0x08 |48 |0x02 |4 ||0x00002910 ||69 | 9 |11|0x13E0
UNIT_TYPE_MDF
0 |0x01 |0x08 |48 |0x02 |4 ||0x00002920 ||70 |10 |11|0x1400
UNIT_TYPE_MDF
0 |0x01 |0x08 |48 |0x02 |4 ||0x00002930 ||71 |11 |11|0x1420
UNIT_TYPE_MDF
0 |0x01 |0x08 |48 |0x02 |4 ||0x00002980 ||72 |12 |11|0x1440
UNIT_TYPE_MDF
0 |0x01 |0x08 |48 |0x02 |4 ||0x00002990 ||73 |13 |11|0x1460
UNIT_TYPE_MDF
0 |0x01 |0x08 |48 |0x02 |4 ||0x000029A0 ||74 |14 |11|0x1480
UNIT_TYPE_MDF
0 |0x01 |0x08 |48 |0x02 |4 ||0x000029B0 ||75 |15 |11|0x14A0
UNIT_TYPE_MDF
0 |0x01 |0x08 |48 |0x02 |4 ||0x000029C0 ||76 |16 |11|0x14C0
UNIT_TYPE_MDF
0 |0x01 |0x08 |48 |0x02 |4 ||0x000029D0 ||77 |17 |11|0x14E0
UNIT_TYPE_MDF
0 |0x01 |0x08 |48 |0x02 |4 ||0x00002A20 ||78 |18 |11|0x1500
UNIT_TYPE_MDF
0 |0x01 |0x08 |48 |0x02 |4 ||0x00002A30 ||79 |19 |11|0x1520
UNIT_TYPE_MDF
0 |0x01 |0x08 |48 |0x02 |4 ||0x00002A40 ||80 |20 |11|0x1540
UNIT_TYPE_MDF
0 |0x01 |0x08 |48 |0x02 |4 ||0x00002A50 ||81 |21 |11|0x1560
UNIT_TYPE_MDF
0 |0x01 |0x08 |48 |0x02 |4 ||0x00002A60 ||82 |22 |11|0x1580
UNIT_TYPE_MDF
0 |0x01 |0x08 |48 |0x02 |4 ||0x00002A70 ||83 |23 |11|0x15A0
UNIT_TYPE_MDF
0 |0x01 |0x08 |48 |0x02 |4 ||0x00002800 ||84 |24 |11|0x15C0
UNIT_TYPE_MDF
0 |0x01 |0x08 |48 |0x02 |4 ||0x00002810 ||85 |25 |11|0x15E0
UNIT_TYPE_MDF
0 |0x01 |0x08 |48 |0x02 |4 ||0x00002820 ||86 |26 |11|0x1600
UNIT_TYPE_MDF
0 |0x01 |0x08 |48 |0x02 |4 ||0x00002830 ||87 |27 |11|0x1620
UNIT_TYPE_MDF
0 |0x01 |0x08 |48 |0x02 |4 ||0x000028A0 ||88 |28 |11|0x1640
UNIT_TYPE_MDF
0 |0x01 |0x08 |48 |0x02 |4 ||0x000028B0 ||89 |29 |11|0x1660
UNIT_TYPE_MDF
0 |0x01 |0x08 |48 |0x02 |4 ||0x000028C0 ||90 |30 |11|0x1680
UNIT_TYPE_MDF
0 |0x01 |0x08 |48 |0x02 |4 ||0x000028D0 ||91 |31 |11|0x16A0
UNIT_TYPE_MDF
0 |0x01 |0x08 |48 |0x02 |4 ||0x00002970 ||92 |32 |11|0x16C0
UNIT_TYPE_MDF
0 |0x01 |0x08 |48 |0x02 |4 ||0x00002960 ||93 |33 |11|0x16E0
UNIT_TYPE_MDF
0 |0x01 |0x08 |48 |0x02 |4 ||0x00002950 ||94 |34 |11|0x1700
UNIT_TYPE_MDF
0 |0x01 |0x08 |48 |0x02 |4 ||0x00002940 ||95 |35 |11|0x1720
UNIT_TYPE_MDF
0 |0x01 |0x08 |48 |0x02 |4 ||0x00002A10 ||96 |36 |11|0x1740
UNIT_TYPE_MDF
0 |0x01 |0x08 |48 |0x02 |4 ||0x00002A00 ||97 |37 |11|0x1760
UNIT_TYPE_MDF
0 |0x01 |0x08 |48 |0x02 |4 ||0x000029F0 ||98 |38 |11|0x1780
UNIT_TYPE_MDF
0 |0x01 |0x08 |48 |0x02 |4 ||0x000029E0 ||99 |39 |11|0x17A0
UNIT_TYPE_IAL_0
0 |0x00 |0x00 | 0 |0x00 |0 ||0x00000000 || 0 | 0 |0|0x10C0
UNIT_TYPE_IAL_0
0 |0x00 |0x00 | 0 |0x00 |0 ||0x00000000 || 0 | 0 |0|0x1100
UNIT_TYPE_IAL_0
0 |0x00 |0x00 | 0 |0x00 |0 ||0x00000000 || 0 | 0 |0|0x1140
UNIT_TYPE_IAL_0
0 |0x00 |0x00 | 0 |0x00 |0 ||0x00000000 || 0 | 0 |0|0x1180
UNIT_TYPE_IAL_0
0 |0x00 |0x00 | 0 |0x00 |0 ||0x00000000 || 0 | 0 |0|0x11C0
UNIT_TYPE_IAL_0
0 |0x00 |0x00 | 0 |0x00 |0 ||0x00000000 || 0 | 0 |0|0x1200
UNIT_TYPE_IAL_0
0 |0x00 |0x00 | 0 |0x00 |0 ||0x00000000 || 0 | 0 |0|0x1240
UNIT_TYPE_IAL_0
0 |0x00 |0x00 | 0 |0x00 |0 ||0x00000000 || 0 | 0 |0|0x1280
UNIT_TYPE_IAL_1
0 |0x00 |0x00 | 0 |0x00 |0 ||0x00000000 || 0 | 0 |0|0x10E0
UNIT_TYPE_IAL_1
0 |0x00 |0x00 | 0 |0x00 |0 ||0x00000000 || 0 | 0 |0|0x1120
UNIT_TYPE_IAL_1
0 |0x00 |0x00 | 0 |0x00 |0 ||0x00000000 || 0 | 0 |0|0x1160
UNIT_TYPE_IAL_1
0 |0x00 |0x00 | 0 |0x00 |0 ||0x00000000 || 0 | 0 |0|0x11A0
UNIT_TYPE_IAL_1
0 |0x00 |0x00 | 0 |0x00 |0 ||0x00000000 || 0 | 0 |0|0x11E0
UNIT_TYPE_IAL_1
0 |0x00 |0x00 | 0 |0x00 |0 ||0x00000000 || 0 | 0 |0|0x1220
UNIT_TYPE_IAL_1
0 |0x00 |0x00 | 0 |0x00 |0 ||0x00000000 || 0 | 0 |0|0x1260
UNIT_TYPE_IAL_1
0 |0x00 |0x00 | 0 |0x00 |0 ||0x00000000 || 0 | 0 |0|0x12A0
UNIT_TYPE_HBM
1 |0x5C |0x08 |48 |0x40 |4 ||0xC8941C00 ||190 | 0 |14|0x17C0
UNIT_TYPE_HBM
1 |0x5C |0x08 |48 |0x40 |4 ||0xC8945C00 ||191 | 1 |14|0x17E0
UNIT_TYPE_HBM
1 |0x5C |0x08 |48 |0x40 |4 ||0xC894AC00 ||192 | 2 |14|0x1800
UNIT_TYPE_HBM
1 |0x5C |0x08 |48 |0x40 |4 ||0xC894EC00 ||193 | 3 |14|0x1820
UNIT_TYPE_HBM
1 |0x5C |0x08 |48 |0x40 |4 ||0xC8953C00 ||194 | 4 |14|0x1840
UNIT_TYPE_HBM
1 |0x5C |0x08 |48 |0x40 |4 ||0xC8957C00 ||195 | 5 |14|0x1860
UNIT_TYPE_HBM
1 |0x5C |0x08 |48 |0x40 |4 ||0xC895CC00 ||196 | 6 |14|0x1880
UNIT_TYPE_HBM
1 |0x5C |0x08 |48 |0x40 |4 ||0xC8960C00 ||197 | 7 |14|0x18A0
UNIT_TYPE_HBM
1 |0x5C |0x08 |48 |0x40 |4 ||0xC8965C00 ||198 | 8 |14|0x18C0
UNIT_TYPE_HBM
1 |0x5C |0x08 |48 |0x40 |4 ||0xC8969C00 ||199 | 9 |14|0x18E0
UNIT_TYPE_HBM
1 |0x5C |0x08 |48 |0x40 |4 ||0xC896EC00 ||200 |10 |14|0x1900
UNIT_TYPE_HBM
1 |0x5C |0x08 |48 |0x40 |4 ||0xC8972C00 ||201 |11 |14|0x1920
UNIT_TYPE_HBM
1 |0x5C |0x08 |48 |0x40 |4 ||0xC8977C00 ||202 |12 |14|0x1940
UNIT_TYPE_HBM
1 |0x5C |0x08 |48 |0x40 |4 ||0xC897BC00 ||203 |13 |14|0x1960
UNIT_TYPE_HBM
1 |0x5C |0x08 |48 |0x40 |4 ||0xC8980C00 ||204 |14 |14|0x1980
UNIT_TYPE_HBM
1 |0x5C |0x08 |48 |0x40 |4 ||0xC8984C00 ||205 |15 |14|0x19A0
UNIT_TYPE_HBM
1 |0x5C |0x08 |48 |0x40 |4 ||0xC8989C00 ||206 |16 |14|0x19C0
UNIT_TYPE_HBM
1 |0x5C |0x08 |48 |0x40 |4 ||0xC898DC00 ||207 |17 |14|0x19E0
UNIT_TYPE_HBM
1 |0x5C |0x08 |48 |0x40 |4 ||0xC8992C00 ||208 |18 |14|0x1A00
UNIT_TYPE_HBM
1 |0x5C |0x08 |48 |0x40 |4 ||0xC8996C00 ||209 |19 |14|0x1A20
UNIT_TYPE_HBM
1 |0x5C |0x08 |48 |0x40 |4 ||0xC899BC00 ||210 |20 |14|0x1A40
UNIT_TYPE_HBM
1 |0x5C |0x08 |48 |0x40 |4 ||0xC899FC00 ||211 |21 |14|0x1A60
UNIT_TYPE_HBM
1 |0x5C |0x08 |48 |0x40 |4 ||0xC89A4C00 ||212 |22 |14|0x1A80
UNIT_TYPE_HBM
1 |0x5C |0x08 |48 |0x40 |4 ||0xC89A8C00 ||213 |23 |14|0x1AA0
UNIT_TYPE_HBM
1 |0x5C |0x08 |48 |0x40 |4 ||0xC89ADC00 ||214 |24 |14|0x1AC0
UNIT_TYPE_HBM
1 |0x5C |0x08 |48 |0x40 |4 ||0xC89B1C00 ||215 |25 |14|0x1AE0
UNIT_TYPE_HBM
1 |0x5C |0x08 |48 |0x40 |4 ||0xC89B6C00 ||216 |26 |14|0x1B00
UNIT_TYPE_HBM
1 |0x5C |0x08 |48 |0x40 |4 ||0xC89BAC00 ||217 |27 |14|0x1B20
UNIT_TYPE_HBM
1 |0x5C |0x08 |48 |0x40 |4 ||0xC89BFC00 ||218 |28 |14|0x1B40
UNIT_TYPE_HBM
1 |0x5C |0x08 |48 |0x40 |4 ||0xC89C3C00 ||219 |29 |14|0x1B60
UNIT_TYPE_HBM
1 |0x5C |0x08 |48 |0x40 |4 ||0xC89C8C00 ||220 |30 |14|0x1B80
UNIT_TYPE_HBM
1 |0x5C |0x08 |48 |0x40 |4 ||0xC89CCC00 ||221 |31 |14|0x1BA0
[OOBMSM] InitOobMsmBar() Enter
Socket[0], OobMsm.Func[2], BAR[0]
Disable MSE and BME
Original StsCmdReg Value = 0x00100004
BarSize: 0x00200000
BarBase: 0xC6C00000(Already assigned)
Enable MSE and BME
[OOBMSM] InitOobMsmBar() Exit
SPK Bar0 address: 0xC6C00000
SPK instance 0: BAR offset: 0x00058000
SPK SNC Base Address 1: 0x0FFF0000
SPK SNC Base Address 2: 0x1FE00022
SPK SNC Base Address 3: 0x00000042
SPK SNC Base Address 4: 0x00000062
SPK SNC Base Address 5: 0x00000082
SPK SNC Upper Base Address: 0x00000000
SPK_SNC_CONFIG: 0x0000000F
SPK_UNCORE_SNC_CONFIG: NumChaPerCluster:13, BaseChaCluster1:13, BaseChaCluster2:26, BaseChaCluster3:39
SPK_UMA_CLUSTER_CFG: UmaClusterEn: 0, XorDefeatur: 0
SPK instance 1: BAR offset: 0x00059000
SPK SNC Base Address 1: 0x0FFF0000
SPK SNC Base Address 2: 0x1FE00022
SPK SNC Base Address 3: 0x00000042
SPK SNC Base Address 4: 0x00000062
SPK SNC Base Address 5: 0x00000082
SPK SNC Upper Base Address: 0x00000000
SPK_SNC_CONFIG: 0x0000000F
SPK_UNCORE_SNC_CONFIG: NumChaPerCluster:13, BaseChaCluster1:13, BaseChaCluster2:26, BaseChaCluster3:39
SPK_UMA_CLUSTER_CFG: UmaClusterEn: 0, XorDefeatur: 0
SPK instance 2: BAR offset: 0x0005A000
SPK SNC Base Address 1: 0x0FFF0000
SPK SNC Base Address 2: 0x1FE00022
SPK SNC Base Address 3: 0x00000042
SPK SNC Base Address 4: 0x00000062
SPK SNC Base Address 5: 0x00000082
SPK SNC Upper Base Address: 0x00000000
SPK_SNC_CONFIG: 0x0000000F
SPK_UNCORE_SNC_CONFIG: NumChaPerCluster:13, BaseChaCluster1:13, BaseChaCluster2:26, BaseChaCluster3:39
SPK_UMA_CLUSTER_CFG: UmaClusterEn: 0, XorDefeatur: 0
SPK instance 3: BAR offset: 0x0005B000
SPK SNC Base Address 1: 0x0FFF0000
SPK SNC Base Address 2: 0x1FE00022
SPK SNC Base Address 3: 0x00000042
SPK SNC Base Address 4: 0x00000062
SPK SNC Base Address 5: 0x00000082
SPK SNC Upper Base Address: 0x00000000
SPK_SNC_CONFIG: 0x0000000F
SPK_UNCORE_SNC_CONFIG: NumChaPerCluster:13, BaseChaCluster1:13, BaseChaCluster2:26, BaseChaCluster3:39
SPK_UMA_CLUSTER_CFG: UmaClusterEn: 0, XorDefeatur: 0
SPK instance 4: BAR offset: 0x0005C000
SPK SNC Base Address 1: 0x0FFF0000
SPK SNC Base Address 2: 0x1FE00022
SPK SNC Base Address 3: 0x00000042
SPK SNC Base Address 4: 0x00000062
SPK SNC Base Address 5: 0x00000082
SPK SNC Upper Base Address: 0x00000000
SPK_SNC_CONFIG: 0x0000000F
SPK_UNCORE_SNC_CONFIG: NumChaPerCluster:13, BaseChaCluster1:13, BaseChaCluster2:26, BaseChaCluster3:39
SPK_UMA_CLUSTER_CFG: UmaClusterEn: 0, XorDefeatur: 0
SPK instance 5: BAR offset: 0x0005D000
SPK SNC Base Address 1: 0x0FFF0000
SPK SNC Base Address 2: 0x1FE00022
SPK SNC Base Address 3: 0x00000042
SPK SNC Base Address 4: 0x00000062
SPK SNC Base Address 5: 0x00000082
SPK SNC Upper Base Address: 0x00000000
SPK_SNC_CONFIG: 0x0000000F
SPK_UNCORE_SNC_CONFIG: NumChaPerCluster:13, BaseChaCluster1:13, BaseChaCluster2:26, BaseChaCluster3:39
SPK_UMA_CLUSTER_CFG: UmaClusterEn: 0, XorDefeatur: 0
SPK instance 6: BAR offset: 0x0005E000
SPK SNC Base Address 1: 0x0FFF0000
SPK SNC Base Address 2: 0x1FE00022
SPK SNC Base Address 3: 0x00000042
SPK SNC Base Address 4: 0x00000062
SPK SNC Base Address 5: 0x00000082
SPK SNC Upper Base Address: 0x00000000
SPK_SNC_CONFIG: 0x0000000F
SPK_UNCORE_SNC_CONFIG: NumChaPerCluster:13, BaseChaCluster1:13, BaseChaCluster2:26, BaseChaCluster3:39
SPK_UMA_CLUSTER_CFG: UmaClusterEn: 0, XorDefeatur: 0
SPK instance 7: BAR offset: 0x0005F000
SPK SNC Base Address 1: 0x0FFF0000
SPK SNC Base Address 2: 0x1FE00022
SPK SNC Base Address 3: 0x00000042
SPK SNC Base Address 4: 0x00000062
SPK SNC Base Address 5: 0x00000082
SPK SNC Upper Base Address: 0x00000000
SPK_SNC_CONFIG: 0x0000000F
SPK_UNCORE_SNC_CONFIG: NumChaPerCluster:13, BaseChaCluster1:13, BaseChaCluster2:26, BaseChaCluster3:39
SPK_UMA_CLUSTER_CFG: UmaClusterEn: 0, XorDefeatur: 0
SPK instance 8: BAR offset: 0x00060000
SPK SNC Base Address 1: 0x0FFF0000
SPK SNC Base Address 2: 0x1FE00022
SPK SNC Base Address 3: 0x00000042
SPK SNC Base Address 4: 0x00000062
SPK SNC Base Address 5: 0x00000082
SPK SNC Upper Base Address: 0x00000000
SPK_SNC_CONFIG: 0x0000000F
SPK_UNCORE_SNC_CONFIG: NumChaPerCluster:13, BaseChaCluster1:13, BaseChaCluster2:26, BaseChaCluster3:39
SPK_UMA_CLUSTER_CFG: UmaClusterEn: 0, XorDefeatur: 0
SPK instance 9: BAR offset: 0x00061000
SPK SNC Base Address 1: 0x0FFF0000
SPK SNC Base Address 2: 0x1FE00022
SPK SNC Base Address 3: 0x00000042
SPK SNC Base Address 4: 0x00000062
SPK SNC Base Address 5: 0x00000082
SPK SNC Upper Base Address: 0x00000000
SPK_SNC_CONFIG: 0x0000000F
SPK_UNCORE_SNC_CONFIG: NumChaPerCluster:13, BaseChaCluster1:13, BaseChaCluster2:26, BaseChaCluster3:39
SPK_UMA_CLUSTER_CFG: UmaClusterEn: 0, XorDefeatur: 0
SPK instance 10: BAR offset: 0x00062000
SPK SNC Base Address 1: 0x0FFF0000
SPK SNC Base Address 2: 0x1FE00022
SPK SNC Base Address 3: 0x00000042
SPK SNC Base Address 4: 0x00000062
SPK SNC Base Address 5: 0x00000082
SPK SNC Upper Base Address: 0x00000000
SPK_SNC_CONFIG: 0x0000000F
SPK_UNCORE_SNC_CONFIG: NumChaPerCluster:13, BaseChaCluster1:13, BaseChaCluster2:26, BaseChaCluster3:39
SPK_UMA_CLUSTER_CFG: UmaClusterEn: 0, XorDefeatur: 0
SPK instance 11: BAR offset: 0x00063000
SPK SNC Base Address 1: 0x0FFF0000
SPK SNC Base Address 2: 0x1FE00022
SPK SNC Base Address 3: 0x00000042
SPK SNC Base Address 4: 0x00000062
SPK SNC Base Address 5: 0x00000082
SPK SNC Upper Base Address: 0x00000000
SPK_SNC_CONFIG: 0x0000000F
SPK_UNCORE_SNC_CONFIG: NumChaPerCluster:13, BaseChaCluster1:13, BaseChaCluster2:26, BaseChaCluster3:39
SPK_UMA_CLUSTER_CFG: UmaClusterEn: 0, XorDefeatur: 0
SPK instance 12: BAR offset: 0x00070000
SPK SNC Base Address 1: 0x0FFF0000
SPK SNC Base Address 2: 0x1FE00022
SPK SNC Base Address 3: 0x00000042
SPK SNC Base Address 4: 0x00000062
SPK SNC Base Address 5: 0x00000082
SPK SNC Upper Base Address: 0x00000000
SPK_SNC_CONFIG: 0x0000000F
SPK_UNCORE_SNC_CONFIG: NumChaPerCluster:13, BaseChaCluster1:13, BaseChaCluster2:26, BaseChaCluster3:39
SPK_UMA_CLUSTER_CFG: UmaClusterEn: 0, XorDefeatur: 0
SPK instance 13: BAR offset: 0x00071000
SPK SNC Base Address 1: 0x0FFF0000
SPK SNC Base Address 2: 0x1FE00022
SPK SNC Base Address 3: 0x00000042
SPK SNC Base Address 4: 0x00000062
SPK SNC Base Address 5: 0x00000082
SPK SNC Upper Base Address: 0x00000000
SPK_SNC_CONFIG: 0x0000000F
SPK_UNCORE_SNC_CONFIG: NumChaPerCluster:13, BaseChaCluster1:13, BaseChaCluster2:26, BaseChaCluster3:39
SPK_UMA_CLUSTER_CFG: UmaClusterEn: 0, XorDefeatur: 0
SPK instance 14: BAR offset: 0x00072000
SPK SNC Base Address 1: 0x0FFF0000
SPK SNC Base Address 2: 0x1FE00022
SPK SNC Base Address 3: 0x00000042
SPK SNC Base Address 4: 0x00000062
SPK SNC Base Address 5: 0x00000082
SPK SNC Upper Base Address: 0x00000000
SPK_SNC_CONFIG: 0x0000000F
SPK_UNCORE_SNC_CONFIG: NumChaPerCluster:13, BaseChaCluster1:13, BaseChaCluster2:26, BaseChaCluster3:39
SPK_UMA_CLUSTER_CFG: UmaClusterEn: 0, XorDefeatur: 0
SPK instance 15: BAR offset: 0x00073000
SPK SNC Base Address 1: 0x0FFF0000
SPK SNC Base Address 2: 0x1FE00022
SPK SNC Base Address 3: 0x00000042
SPK SNC Base Address 4: 0x00000062
SPK SNC Base Address 5: 0x00000082
SPK SNC Upper Base Address: 0x00000000
SPK_SNC_CONFIG: 0x0000000F
SPK_UNCORE_SNC_CONFIG: NumChaPerCluster:13, BaseChaCluster1:13, BaseChaCluster2:26, BaseChaCluster3:39
SPK_UMA_CLUSTER_CFG: UmaClusterEn: 0, XorDefeatur: 0
[SDSi] Init for Socket[1] - Begin
[VSEC] VSEC discovery - S:B:D:F = 0x0:0xE7:0x3:0x1, VidDid = 0x09A78086
VsecId: 0x00000041 SDSI VSEC capability offset: 0x00000160
[OOBMSM] InitOobMsmBar() Enter
Socket[1], OobMsm.Func[1], BAR[1]
Disable MSE and BME
Original StsCmdReg Value = 0x00100006
BarSize: 0x00040000
BarBase: 0xF9B40000(Already assigned)
Enable MSE and BME
[OOBMSM] InitOobMsmBar() Exit
SDSi MMIO Layout Address = 0xF9B42000
SdsiMmio.Ppin Address = 0xF9B42408, Value = 0x22E548CB80015B4D
[OOBMSM] InitOobMsmBar() Enter
Socket[1], OobMsm.Func[1], BAR[0]
Disable MSE and BME
Original StsCmdReg Value = 0x00100006
BarSize: 0x00002000
BarBase: 0xF9B00000(Already assigned)
Enable MSE and BME
[OOBMSM] InitOobMsmBar() Exit
PMon Bar0 address: 0xF9B00000
Global Discovery State at address: 0xF9B00000
Access Type|Max Blocks|Block Stride|Type ||GlobalControlAddr||NumBlockStatusBits|GblCtrStatAddr
[63:62] |[25:16] |[15:8] |[7:0]||[63:0] ||[23:8] |[7:0]
0 |221 |4 |5 ||0x2FF0 ||209 |0xE
Unit Discovery State at address: 0xF9B00020
Access Type|UnitStatus Offset|Counter0 Offset|Ctrl Width|Ctrl0 Offset|Num Ctrl Regs||UnitCounterControlAddr||Gbl Stat Pos|Unit ID|UnitType|Offset
[63:62] |[39:32] |[31:24] |[23:16] |[15:8] |[7:0] ||[63:0] ||[47:32] |[31:16]|[15:0]|
UNIT_TYPE_CHA
0 |0x01 |0x08 |48 |0x02 |4 ||0x00002000 || 0 | 0 |0|0x0040
UNIT_TYPE_CHA
0 |0x01 |0x08 |48 |0x02 |4 ||0x00002010 || 1 | 1 |0|0x0060
UNIT_TYPE_CHA
0 |0x01 |0x08 |48 |0x02 |4 ||0x00002020 || 2 | 2 |0|0x0080
UNIT_TYPE_CHA
0 |0x01 |0x08 |48 |0x02 |4 ||0x00002030 || 3 | 3 |0|0x00A0
UNIT_TYPE_CHA
0 |0x01 |0x08 |48 |0x02 |4 ||0x00002040 || 4 | 4 |0|0x00C0
UNIT_TYPE_CHA
0 |0x01 |0x08 |48 |0x02 |4 ||0x00002050 || 5 | 5 |0|0x00E0
UNIT_TYPE_CHA
0 |0x01 |0x08 |48 |0x02 |4 ||0x00002060 || 6 | 6 |0|0x0100
UNIT_TYPE_CHA
0 |0x01 |0x08 |48 |0x02 |4 ||0x00002070 || 7 | 7 |0|0x0120
UNIT_TYPE_CHA
0 |0x01 |0x08 |48 |0x02 |4 ||0x00002080 || 8 | 8 |0|0x0140
UNIT_TYPE_CHA
0 |0x01 |0x08 |48 |0x02 |4 ||0x00002090 || 9 | 9 |0|0x0160
UNIT_TYPE_CHA
0 |0x01 |0x08 |48 |0x02 |4 ||0x000020A0 ||10 |10 |0|0x0180
UNIT_TYPE_CHA
0 |0x01 |0x08 |48 |0x02 |4 ||0x000020B0 ||11 |11 |0|0x01A0
UNIT_TYPE_CHA
0 |0x01 |0x08 |48 |0x02 |4 ||0x000020C0 ||12 |12 |0|0x01C0
UNIT_TYPE_CHA
0 |0x01 |0x08 |48 |0x02 |4 ||0x000020D0 ||13 |13 |0|0x01E0
UNIT_TYPE_CHA
0 |0x01 |0x08 |48 |0x02 |4 ||0x000020E0 ||14 |14 |0|0x0200
UNIT_TYPE_CHA
0 |0x01 |0x08 |48 |0x02 |4 ||0x000020F0 ||15 |15 |0|0x0220
UNIT_TYPE_CHA
0 |0x01 |0x08 |48 |0x02 |4 ||0x00002100 ||16 |16 |0|0x0240
UNIT_TYPE_CHA
0 |0x01 |0x08 |48 |0x02 |4 ||0x00002110 ||17 |17 |0|0x0260
UNIT_TYPE_CHA
0 |0x01 |0x08 |48 |0x02 |4 ||0x00002120 ||18 |18 |0|0x0280
UNIT_TYPE_CHA
0 |0x01 |0x08 |48 |0x02 |4 ||0x00002130 ||19 |19 |0|0x02A0
UNIT_TYPE_CHA
0 |0x01 |0x08 |48 |0x02 |4 ||0x00002140 ||20 |20 |0|0x02C0
UNIT_TYPE_CHA
0 |0x01 |0x08 |48 |0x02 |4 ||0x00002150 ||21 |21 |0|0x02E0
UNIT_TYPE_CHA
0 |0x01 |0x08 |48 |0x02 |4 ||0x00002160 ||22 |22 |0|0x0300
UNIT_TYPE_CHA
0 |0x01 |0x08 |48 |0x02 |4 ||0x00002170 ||23 |23 |0|0x0320
UNIT_TYPE_CHA
0 |0x01 |0x08 |48 |0x02 |4 ||0x00002180 ||24 |24 |0|0x0340
UNIT_TYPE_CHA
0 |0x01 |0x08 |48 |0x02 |4 ||0x00002190 ||25 |25 |0|0x0360
UNIT_TYPE_CHA
0 |0x01 |0x08 |48 |0x02 |4 ||0x000021A0 ||26 |26 |0|0x0380
UNIT_TYPE_CHA
0 |0x01 |0x08 |48 |0x02 |4 ||0x000021B0 ||27 |27 |0|0x03A0
UNIT_TYPE_CHA
0 |0x01 |0x08 |48 |0x02 |4 ||0x000021C0 ||28 |28 |0|0x03C0
UNIT_TYPE_CHA
0 |0x01 |0x08 |48 |0x02 |4 ||0x000021D0 ||29 |29 |0|0x03E0
UNIT_TYPE_CHA
0 |0x01 |0x08 |48 |0x02 |4 ||0x000021E0 ||30 |30 |0|0x0400
UNIT_TYPE_CHA
0 |0x01 |0x08 |48 |0x02 |4 ||0x000021F0 ||31 |31 |0|0x0420
UNIT_TYPE_CHA
0 |0x01 |0x08 |48 |0x02 |4 ||0x00002200 ||32 |32 |0|0x0440
UNIT_TYPE_CHA
0 |0x01 |0x08 |48 |0x02 |4 ||0x00002210 ||33 |33 |0|0x0460
UNIT_TYPE_CHA
0 |0x01 |0x08 |48 |0x02 |4 ||0x00002220 ||34 |34 |0|0x0480
UNIT_TYPE_CHA
0 |0x01 |0x08 |48 |0x02 |4 ||0x00002230 ||35 |35 |0|0x04A0
UNIT_TYPE_CHA
0 |0x01 |0x08 |48 |0x02 |4 ||0x00002240 ||36 |36 |0|0x04C0
UNIT_TYPE_CHA
0 |0x01 |0x08 |48 |0x02 |4 ||0x00002250 ||37 |37 |0|0x04E0
UNIT_TYPE_CHA
0 |0x01 |0x08 |48 |0x02 |4 ||0x00002260 ||38 |38 |0|0x0500
UNIT_TYPE_CHA
0 |0x01 |0x08 |48 |0x02 |4 ||0x00002270 ||39 |39 |0|0x0520
UNIT_TYPE_CHA
0 |0x01 |0x08 |48 |0x02 |4 ||0x00002280 ||40 |40 |0|0x0540
UNIT_TYPE_CHA
0 |0x01 |0x08 |48 |0x02 |4 ||0x00002290 ||41 |41 |0|0x0560
UNIT_TYPE_CHA
0 |0x01 |0x08 |48 |0x02 |4 ||0x000022A0 ||42 |42 |0|0x0580
UNIT_TYPE_CHA
0 |0x01 |0x08 |48 |0x02 |4 ||0x000022B0 ||43 |43 |0|0x05A0
UNIT_TYPE_CHA
0 |0x01 |0x08 |48 |0x02 |4 ||0x000022C0 ||44 |44 |0|0x05C0
UNIT_TYPE_CHA
0 |0x01 |0x08 |48 |0x02 |4 ||0x000022D0 ||45 |45 |0|0x05E0
UNIT_TYPE_CHA
0 |0x01 |0x08 |48 |0x02 |4 ||0x000022E0 ||46 |46 |0|0x0600
UNIT_TYPE_CHA
0 |0x01 |0x08 |48 |0x02 |4 ||0x000022F0 ||47 |47 |0|0x0620
UNIT_TYPE_CHA
0 |0x01 |0x08 |48 |0x02 |4 ||0x00002300 ||48 |48 |0|0x0640
UNIT_TYPE_CHA
0 |0x01 |0x08 |48 |0x02 |4 ||0x00002310 ||49 |49 |0|0x0660
UNIT_TYPE_CHA
0 |0x01 |0x08 |48 |0x02 |4 ||0x00002320 ||50 |50 |0|0x0680
UNIT_TYPE_CHA
0 |0x01 |0x08 |48 |0x02 |4 ||0x00002330 ||51 |51 |0|0x06A0
UNIT_TYPE_CHA
0 |0x01 |0x08 |48 |0x02 |4 ||0x00002340 ||52 |52 |0|0x06C0
UNIT_TYPE_CHA
0 |0x01 |0x08 |48 |0x02 |4 ||0x00002350 ||53 |53 |0|0x06E0
UNIT_TYPE_CHA
0 |0x01 |0x08 |48 |0x02 |4 ||0x00002360 ||54 |54 |0|0x0700
UNIT_TYPE_CHA
0 |0x01 |0x08 |48 |0x02 |4 ||0x00002370 ||55 |55 |0|0x0720
UNIT_TYPE_CHA
0 |0x01 |0x08 |48 |0x02 |4 ||0x00002380 ||56 |56 |0|0x0740
UNIT_TYPE_CHA
0 |0x01 |0x08 |48 |0x02 |4 ||0x00002390 ||57 |57 |0|0x0760
UNIT_TYPE_CHA
0 |0x01 |0x08 |48 |0x02 |4 ||0x000023A0 ||58 |58 |0|0x0780
UNIT_TYPE_CHA
0 |0x01 |0x08 |48 |0x02 |4 ||0x000023B0 ||59 |59 |0|0x07A0
UNIT_TYPE_TC
0 |0x01 |0x08 |48 |0x02 |4 ||0x00003000 ||100 | 0 |1|0x0C60
UNIT_TYPE_TC
0 |0x01 |0x08 |48 |0x02 |4 ||0x00003010 ||101 | 1 |1|0x0CC0
UNIT_TYPE_TC
0 |0x01 |0x08 |48 |0x02 |4 ||0x00003020 ||102 | 2 |1|0x0D20
UNIT_TYPE_TC
0 |0x01 |0x08 |48 |0x02 |4 ||0x00003030 ||103 | 3 |1|0x0D80
UNIT_TYPE_TC
0 |0x00 |0x00 | 0 |0x00 |0 ||0x00000000 || 0 | 0 |0|0x0DE0
UNIT_TYPE_TC
0 |0x01 |0x08 |48 |0x02 |4 ||0x00003040 ||105 | 5 |1|0x0E40
UNIT_TYPE_TC
0 |0x01 |0x08 |48 |0x02 |4 ||0x00003050 ||106 | 6 |1|0x0EA0
UNIT_TYPE_TC
0 |0x01 |0x08 |48 |0x02 |4 ||0x00003060 ||107 | 7 |1|0x0F00
UNIT_TYPE_TC
0 |0x01 |0x08 |48 |0x02 |4 ||0x00003070 ||108 | 8 |1|0x0F60
UNIT_TYPE_TC
0 |0x01 |0x08 |48 |0x02 |4 ||0x00003080 ||109 | 9 |1|0x0FC0
UNIT_TYPE_TC
0 |0x00 |0x00 | 0 |0x00 |0 ||0x00000000 || 0 | 0 |0|0x1020
UNIT_TYPE_TC
0 |0x01 |0x08 |48 |0x02 |4 ||0x00003090 ||111 |11 |1|0x1080
UNIT_TYPE_IRP
0 |0x01 |0x08 |48 |0x02 |2 ||0x00003400 ||112 | 0 |2|0x0C80
UNIT_TYPE_IRP
0 |0x01 |0x08 |48 |0x02 |2 ||0x00003410 ||113 | 1 |2|0x0CE0
UNIT_TYPE_IRP
0 |0x01 |0x08 |48 |0x02 |2 ||0x00003420 ||114 | 2 |2|0x0D40
UNIT_TYPE_IRP
0 |0x01 |0x08 |48 |0x02 |2 ||0x00003430 ||115 | 3 |2|0x0DA0
UNIT_TYPE_IRP
0 |0x00 |0x00 | 0 |0x00 |0 ||0x00000000 || 0 | 0 |0|0x0E00
UNIT_TYPE_IRP
0 |0x01 |0x08 |48 |0x02 |2 ||0x00003440 ||117 | 5 |2|0x0E60
UNIT_TYPE_IRP
0 |0x01 |0x08 |48 |0x02 |2 ||0x00003450 ||118 | 6 |2|0x0EC0
UNIT_TYPE_IRP
0 |0x01 |0x08 |48 |0x02 |2 ||0x00003460 ||119 | 7 |2|0x0F20
UNIT_TYPE_IRP
0 |0x01 |0x08 |48 |0x02 |2 ||0x00003470 ||120 | 8 |2|0x0F80
UNIT_TYPE_IRP
0 |0x01 |0x08 |48 |0x02 |2 ||0x00003480 ||121 | 9 |2|0x0FE0
UNIT_TYPE_IRP
0 |0x00 |0x00 | 0 |0x00 |0 ||0x00000000 || 0 | 0 |0|0x1040
UNIT_TYPE_IRP
0 |0x01 |0x08 |48 |0x02 |2 ||0x00003490 ||123 |11 |2|0x10A0
UNIT_TYPE_M2PCIE
0 |0x01 |0x08 |48 |0x02 |4 ||0x00003200 ||124 | 0 |3|0x0C40
UNIT_TYPE_M2PCIE
0 |0x01 |0x08 |48 |0x02 |4 ||0x00003210 ||125 | 1 |3|0x0CA0
UNIT_TYPE_M2PCIE
0 |0x01 |0x08 |48 |0x02 |4 ||0x00003220 ||126 | 2 |3|0x0D00
UNIT_TYPE_M2PCIE
0 |0x01 |0x08 |48 |0x02 |4 ||0x00003230 ||127 | 3 |3|0x0D60
UNIT_TYPE_M2PCIE
0 |0x00 |0x00 | 0 |0x00 |0 ||0x00000000 || 0 | 0 |0|0x0DC0
UNIT_TYPE_M2PCIE
0 |0x01 |0x08 |48 |0x02 |4 ||0x00003240 ||129 | 5 |3|0x0E20
UNIT_TYPE_M2PCIE
0 |0x01 |0x08 |48 |0x02 |4 ||0x00003250 ||130 | 6 |3|0x0E80
UNIT_TYPE_M2PCIE
0 |0x01 |0x08 |48 |0x02 |4 ||0x00003260 ||131 | 7 |3|0x0EE0
UNIT_TYPE_M2PCIE
0 |0x01 |0x08 |48 |0x02 |4 ||0x00003270 ||132 | 8 |3|0x0F40
UNIT_TYPE_M2PCIE
0 |0x01 |0x08 |48 |0x02 |4 ||0x00003280 ||133 | 9 |3|0x0FA0
UNIT_TYPE_M2PCIE
0 |0x00 |0x00 | 0 |0x00 |0 ||0x00000000 || 0 | 0 |0|0x1000
UNIT_TYPE_M2PCIE
0 |0x01 |0x08 |48 |0x02 |4 ||0x00003290 ||135 |11 |3|0x1060
UNIT_TYPE_PCU
0 |0x01 |0x08 |48 |0x02 |4 ||0x00002FC0 ||136 | 0 |4|0x0020
UNIT_TYPE_MC
1 |0x5C |0x08 |48 |0x40 |4 ||0xFBAA2800 ||138 | 0 |6|0x08C0
UNIT_TYPE_MC
1 |0x5C |0x08 |48 |0x40 |4 ||0xFBAAA800 ||139 | 1 |6|0x08E0
UNIT_TYPE_MC
1 |0x5C |0x08 |48 |0x40 |4 ||0xFBB22800 ||140 | 2 |6|0x0900
UNIT_TYPE_MC
1 |0x5C |0x08 |48 |0x40 |4 ||0xFBB2A800 ||141 | 3 |6|0x0920
UNIT_TYPE_MC
1 |0x5C |0x08 |48 |0x40 |4 ||0xFBBA2800 ||142 | 4 |6|0x0940
UNIT_TYPE_MC
1 |0x5C |0x08 |48 |0x40 |4 ||0xFBBAA800 ||143 | 5 |6|0x0960
UNIT_TYPE_MC
1 |0x5C |0x08 |48 |0x40 |4 ||0xFBC22800 ||144 | 6 |6|0x0980
UNIT_TYPE_MC
1 |0x5C |0x08 |48 |0x40 |4 ||0xFBC2A800 ||145 | 7 |6|0x09A0
UNIT_TYPE_M2M
2 |0x70 |0x08 |48 |0x30 |4 ||0x8FE60438 ||146 | 0 |7|0x09C0
UNIT_TYPE_M2M
2 |0x70 |0x08 |48 |0x30 |4 ||0x8FE68438 ||147 | 1 |7|0x09E0
UNIT_TYPE_M2M
2 |0x70 |0x08 |48 |0x30 |4 ||0x8FE70438 ||148 | 2 |7|0x0A00
UNIT_TYPE_M2M
2 |0x70 |0x08 |48 |0x30 |4 ||0x8FE78438 ||149 | 3 |7|0x0A20
UNIT_TYPE_M2M
2 |0x70 |0x08 |48 |0x30 |4 ||0x8FE80438 ||150 | 4 |7|0x0A40
UNIT_TYPE_M2M
2 |0x70 |0x08 |48 |0x30 |4 ||0x8FE88438 ||151 | 5 |7|0x0A60
UNIT_TYPE_M2M
2 |0x70 |0x08 |48 |0x30 |4 ||0x8FE90438 ||152 | 6 |7|0x0A80
UNIT_TYPE_M2M
2 |0x70 |0x08 |48 |0x30 |4 ||0x8FE98438 ||153 | 7 |7|0x0AA0
UNIT_TYPE_M2M
2 |0x70 |0x08 |48 |0x30 |4 ||0x8FEA0438 ||154 | 8 |7|0x0AC0
UNIT_TYPE_M2M
2 |0x70 |0x08 |48 |0x30 |4 ||0x8FEA8438 ||155 | 9 |7|0x0AE0
UNIT_TYPE_M2M
2 |0x70 |0x08 |48 |0x30 |4 ||0x8FEB0438 ||156 |10 |7|0x0B00
UNIT_TYPE_M2M
2 |0x70 |0x08 |48 |0x30 |4 ||0x8FEB8438 ||157 |11 |7|0x0B20
UNIT_TYPE_M2M
2 |0x70 |0x08 |48 |0x30 |4 ||0x8FEC0438 ||158 |12 |7|0x0B40
UNIT_TYPE_M2M
2 |0x70 |0x08 |48 |0x30 |4 ||0x8FEC8438 ||159 |13 |7|0x0B60
UNIT_TYPE_M2M
2 |0x70 |0x08 |48 |0x30 |4 ||0x8FED0438 ||160 |14 |7|0x0B80
UNIT_TYPE_M2M
2 |0x70 |0x08 |48 |0x30 |4 ||0x8FED8438 ||161 |15 |7|0x0BA0
UNIT_TYPE_M2M
2 |0x70 |0x08 |48 |0x30 |4 ||0x8FEE0438 ||162 |16 |7|0x0BC0
UNIT_TYPE_M2M
2 |0x70 |0x08 |48 |0x30 |4 ||0x8FEE8438 ||163 |17 |7|0x0BE0
UNIT_TYPE_M2M
2 |0x70 |0x08 |48 |0x30 |4 ||0x8FEF0438 ||164 |18 |7|0x0C00
UNIT_TYPE_M2M
2 |0x70 |0x08 |48 |0x30 |4 ||0x8FEF8438 ||165 |19 |7|0x0C20
UNIT_TYPE_UPI_LL
2 |0x64 |0x08 |48 |0x38 |4 ||0x8FE09318 ||166 | 0 |8|0x07E0
UNIT_TYPE_UPI_LL
2 |0x64 |0x08 |48 |0x38 |4 ||0x8FE11318 ||167 | 1 |8|0x0820
UNIT_TYPE_UPI_LL
2 |0x64 |0x08 |48 |0x38 |4 ||0x8FE19318 ||168 | 2 |8|0x0860
UNIT_TYPE_UPI_LL
2 |0x64 |0x08 |48 |0x38 |4 ||0x8FE21318 ||169 | 3 |8|0x08A0
UNIT_TYPE_M3UPI
2 |0x58 |0x08 |48 |0x38 |4 ||0x8FE290A0 ||170 | 0 |9|0x07C0
UNIT_TYPE_M3UPI
2 |0x58 |0x08 |48 |0x38 |4 ||0x8FE310A0 ||171 | 1 |9|0x0800
UNIT_TYPE_M3UPI
2 |0x58 |0x08 |48 |0x38 |4 ||0x8FE390A0 ||172 | 2 |9|0x0840
UNIT_TYPE_M3UPI
2 |0x58 |0x08 |48 |0x38 |4 ||0x8FE410A0 ||173 | 3 |9|0x0880
UNIT_TYPE_MDF
0 |0x01 |0x08 |48 |0x02 |4 ||0x00002840 ||60 | 0 |11|0x12C0
UNIT_TYPE_MDF
0 |0x01 |0x08 |48 |0x02 |4 ||0x00002850 ||61 | 1 |11|0x12E0
UNIT_TYPE_MDF
0 |0x01 |0x08 |48 |0x02 |4 ||0x00002860 ||62 | 2 |11|0x1300
UNIT_TYPE_MDF
0 |0x01 |0x08 |48 |0x02 |4 ||0x00002870 ||63 | 3 |11|0x1320
UNIT_TYPE_MDF
0 |0x01 |0x08 |48 |0x02 |4 ||0x00002880 ||64 | 4 |11|0x1340
UNIT_TYPE_MDF
0 |0x01 |0x08 |48 |0x02 |4 ||0x00002890 ||65 | 5 |11|0x1360
UNIT_TYPE_MDF
0 |0x01 |0x08 |48 |0x02 |4 ||0x000028E0 ||66 | 6 |11|0x1380
UNIT_TYPE_MDF
0 |0x01 |0x08 |48 |0x02 |4 ||0x000028F0 ||67 | 7 |11|0x13A0
UNIT_TYPE_MDF
0 |0x01 |0x08 |48 |0x02 |4 ||0x00002900 ||68 | 8 |11|0x13C0
UNIT_TYPE_MDF
0 |0x01 |0x08 |48 |0x02 |4 ||0x00002910 ||69 | 9 |11|0x13E0
UNIT_TYPE_MDF
0 |0x01 |0x08 |48 |0x02 |4 ||0x00002920 ||70 |10 |11|0x1400
UNIT_TYPE_MDF
0 |0x01 |0x08 |48 |0x02 |4 ||0x00002930 ||71 |11 |11|0x1420
UNIT_TYPE_MDF
0 |0x01 |0x08 |48 |0x02 |4 ||0x00002980 ||72 |12 |11|0x1440
UNIT_TYPE_MDF
0 |0x01 |0x08 |48 |0x02 |4 ||0x00002990 ||73 |13 |11|0x1460
UNIT_TYPE_MDF
0 |0x01 |0x08 |48 |0x02 |4 ||0x000029A0 ||74 |14 |11|0x1480
UNIT_TYPE_MDF
0 |0x01 |0x08 |48 |0x02 |4 ||0x000029B0 ||75 |15 |11|0x14A0
UNIT_TYPE_MDF
0 |0x01 |0x08 |48 |0x02 |4 ||0x000029C0 ||76 |16 |11|0x14C0
UNIT_TYPE_MDF
0 |0x01 |0x08 |48 |0x02 |4 ||0x000029D0 ||77 |17 |11|0x14E0
UNIT_TYPE_MDF
0 |0x01 |0x08 |48 |0x02 |4 ||0x00002A20 ||78 |18 |11|0x1500
UNIT_TYPE_MDF
0 |0x01 |0x08 |48 |0x02 |4 ||0x00002A30 ||79 |19 |11|0x1520
UNIT_TYPE_MDF
0 |0x01 |0x08 |48 |0x02 |4 ||0x00002A40 ||80 |20 |11|0x1540
UNIT_TYPE_MDF
0 |0x01 |0x08 |48 |0x02 |4 ||0x00002A50 ||81 |21 |11|0x1560
UNIT_TYPE_MDF
0 |0x01 |0x08 |48 |0x02 |4 ||0x00002A60 ||82 |22 |11|0x1580
UNIT_TYPE_MDF
0 |0x01 |0x08 |48 |0x02 |4 ||0x00002A70 ||83 |23 |11|0x15A0
UNIT_TYPE_MDF
0 |0x01 |0x08 |48 |0x02 |4 ||0x00002800 ||84 |24 |11|0x15C0
UNIT_TYPE_MDF
0 |0x01 |0x08 |48 |0x02 |4 ||0x00002810 ||85 |25 |11|0x15E0
UNIT_TYPE_MDF
0 |0x01 |0x08 |48 |0x02 |4 ||0x00002820 ||86 |26 |11|0x1600
UNIT_TYPE_MDF
0 |0x01 |0x08 |48 |0x02 |4 ||0x00002830 ||87 |27 |11|0x1620
UNIT_TYPE_MDF
0 |0x01 |0x08 |48 |0x02 |4 ||0x000028A0 ||88 |28 |11|0x1640
UNIT_TYPE_MDF
0 |0x01 |0x08 |48 |0x02 |4 ||0x000028B0 ||89 |29 |11|0x1660
UNIT_TYPE_MDF
0 |0x01 |0x08 |48 |0x02 |4 ||0x000028C0 ||90 |30 |11|0x1680
UNIT_TYPE_MDF
0 |0x01 |0x08 |48 |0x02 |4 ||0x000028D0 ||91 |31 |11|0x16A0
UNIT_TYPE_MDF
0 |0x01 |0x08 |48 |0x02 |4 ||0x00002970 ||92 |32 |11|0x16C0
UNIT_TYPE_MDF
0 |0x01 |0x08 |48 |0x02 |4 ||0x00002960 ||93 |33 |11|0x16E0
UNIT_TYPE_MDF
0 |0x01 |0x08 |48 |0x02 |4 ||0x00002950 ||94 |34 |11|0x1700
UNIT_TYPE_MDF
0 |0x01 |0x08 |48 |0x02 |4 ||0x00002940 ||95 |35 |11|0x1720
UNIT_TYPE_MDF
0 |0x01 |0x08 |48 |0x02 |4 ||0x00002A10 ||96 |36 |11|0x1740
UNIT_TYPE_MDF
0 |0x01 |0x08 |48 |0x02 |4 ||0x00002A00 ||97 |37 |11|0x1760
UNIT_TYPE_MDF
0 |0x01 |0x08 |48 |0x02 |4 ||0x000029F0 ||98 |38 |11|0x1780
UNIT_TYPE_MDF
0 |0x01 |0x08 |48 |0x02 |4 ||0x000029E0 ||99 |39 |11|0x17A0
UNIT_TYPE_IAL_0
0 |0x00 |0x00 | 0 |0x00 |0 ||0x00000000 || 0 | 0 |0|0x10C0
UNIT_TYPE_IAL_0
0 |0x00 |0x00 | 0 |0x00 |0 ||0x00000000 || 0 | 0 |0|0x1100
UNIT_TYPE_IAL_0
0 |0x00 |0x00 | 0 |0x00 |0 ||0x00000000 || 0 | 0 |0|0x1140
UNIT_TYPE_IAL_0
0 |0x00 |0x00 | 0 |0x00 |0 ||0x00000000 || 0 | 0 |0|0x1180
UNIT_TYPE_IAL_0
0 |0x00 |0x00 | 0 |0x00 |0 ||0x00000000 || 0 | 0 |0|0x11C0
UNIT_TYPE_IAL_0
0 |0x00 |0x00 | 0 |0x00 |0 ||0x00000000 || 0 | 0 |0|0x1200
UNIT_TYPE_IAL_0
0 |0x00 |0x00 | 0 |0x00 |0 ||0x00000000 || 0 | 0 |0|0x1240
UNIT_TYPE_IAL_0
0 |0x00 |0x00 | 0 |0x00 |0 ||0x00000000 || 0 | 0 |0|0x1280
UNIT_TYPE_IAL_1
0 |0x00 |0x00 | 0 |0x00 |0 ||0x00000000 || 0 | 0 |0|0x10E0
UNIT_TYPE_IAL_1
0 |0x00 |0x00 | 0 |0x00 |0 ||0x00000000 || 0 | 0 |0|0x1120
UNIT_TYPE_IAL_1
0 |0x00 |0x00 | 0 |0x00 |0 ||0x00000000 || 0 | 0 |0|0x1160
UNIT_TYPE_IAL_1
0 |0x00 |0x00 | 0 |0x00 |0 ||0x00000000 || 0 | 0 |0|0x11A0
UNIT_TYPE_IAL_1
0 |0x00 |0x00 | 0 |0x00 |0 ||0x00000000 || 0 | 0 |0|0x11E0
UNIT_TYPE_IAL_1
0 |0x00 |0x00 | 0 |0x00 |0 ||0x00000000 || 0 | 0 |0|0x1220
UNIT_TYPE_IAL_1
0 |0x00 |0x00 | 0 |0x00 |0 ||0x00000000 || 0 | 0 |0|0x1260
UNIT_TYPE_IAL_1
0 |0x00 |0x00 | 0 |0x00 |0 ||0x00000000 || 0 | 0 |0|0x12A0
UNIT_TYPE_HBM
1 |0x5C |0x08 |48 |0x40 |4 ||0xFB941C00 ||190 | 0 |14|0x17C0
UNIT_TYPE_HBM
1 |0x5C |0x08 |48 |0x40 |4 ||0xFB945C00 ||191 | 1 |14|0x17E0
UNIT_TYPE_HBM
1 |0x5C |0x08 |48 |0x40 |4 ||0xFB94AC00 ||192 | 2 |14|0x1800
UNIT_TYPE_HBM
1 |0x5C |0x08 |48 |0x40 |4 ||0xFB94EC00 ||193 | 3 |14|0x1820
UNIT_TYPE_HBM
1 |0x5C |0x08 |48 |0x40 |4 ||0xFB953C00 ||194 | 4 |14|0x1840
UNIT_TYPE_HBM
1 |0x5C |0x08 |48 |0x40 |4 ||0xFB957C00 ||195 | 5 |14|0x1860
UNIT_TYPE_HBM
1 |0x5C |0x08 |48 |0x40 |4 ||0xFB95CC00 ||196 | 6 |14|0x1880
UNIT_TYPE_HBM
1 |0x5C |0x08 |48 |0x40 |4 ||0xFB960C00 ||197 | 7 |14|0x18A0
UNIT_TYPE_HBM
1 |0x5C |0x08 |48 |0x40 |4 ||0xFB965C00 ||198 | 8 |14|0x18C0
UNIT_TYPE_HBM
1 |0x5C |0x08 |48 |0x40 |4 ||0xFB969C00 ||199 | 9 |14|0x18E0
UNIT_TYPE_HBM
1 |0x5C |0x08 |48 |0x40 |4 ||0xFB96EC00 ||200 |10 |14|0x1900
UNIT_TYPE_HBM
1 |0x5C |0x08 |48 |0x40 |4 ||0xFB972C00 ||201 |11 |14|0x1920
UNIT_TYPE_HBM
1 |0x5C |0x08 |48 |0x40 |4 ||0xFB977C00 ||202 |12 |14|0x1940
UNIT_TYPE_HBM
1 |0x5C |0x08 |48 |0x40 |4 ||0xFB97BC00 ||203 |13 |14|0x1960
UNIT_TYPE_HBM
1 |0x5C |0x08 |48 |0x40 |4 ||0xFB980C00 ||204 |14 |14|0x1980
UNIT_TYPE_HBM
1 |0x5C |0x08 |48 |0x40 |4 ||0xFB984C00 ||205 |15 |14|0x19A0
UNIT_TYPE_HBM
1 |0x5C |0x08 |48 |0x40 |4 ||0xFB989C00 ||206 |16 |14|0x19C0
UNIT_TYPE_HBM
1 |0x5C |0x08 |48 |0x40 |4 ||0xFB98DC00 ||207 |17 |14|0x19E0
UNIT_TYPE_HBM
1 |0x5C |0x08 |48 |0x40 |4 ||0xFB992C00 ||208 |18 |14|0x1A00
UNIT_TYPE_HBM
1 |0x5C |0x08 |48 |0x40 |4 ||0xFB996C00 ||209 |19 |14|0x1A20
UNIT_TYPE_HBM
1 |0x5C |0x08 |48 |0x40 |4 ||0xFB99BC00 ||210 |20 |14|0x1A40
UNIT_TYPE_HBM
1 |0x5C |0x08 |48 |0x40 |4 ||0xFB99FC00 ||211 |21 |14|0x1A60
UNIT_TYPE_HBM
1 |0x5C |0x08 |48 |0x40 |4 ||0xFB9A4C00 ||212 |22 |14|0x1A80
UNIT_TYPE_HBM
1 |0x5C |0x08 |48 |0x40 |4 ||0xFB9A8C00 ||213 |23 |14|0x1AA0
UNIT_TYPE_HBM
1 |0x5C |0x08 |48 |0x40 |4 ||0xFB9ADC00 ||214 |24 |14|0x1AC0
UNIT_TYPE_HBM
1 |0x5C |0x08 |48 |0x40 |4 ||0xFB9B1C00 ||215 |25 |14|0x1AE0
UNIT_TYPE_HBM
1 |0x5C |0x08 |48 |0x40 |4 ||0xFB9B6C00 ||216 |26 |14|0x1B00
UNIT_TYPE_HBM
1 |0x5C |0x08 |48 |0x40 |4 ||0xFB9BAC00 ||217 |27 |14|0x1B20
UNIT_TYPE_HBM
1 |0x5C |0x08 |48 |0x40 |4 ||0xFB9BFC00 ||218 |28 |14|0x1B40
UNIT_TYPE_HBM
1 |0x5C |0x08 |48 |0x40 |4 ||0xFB9C3C00 ||219 |29 |14|0x1B60
UNIT_TYPE_HBM
1 |0x5C |0x08 |48 |0x40 |4 ||0xFB9C8C00 ||220 |30 |14|0x1B80
UNIT_TYPE_HBM
1 |0x5C |0x08 |48 |0x40 |4 ||0xFB9CCC00 ||221 |31 |14|0x1BA0
[OOBMSM] InitOobMsmBar() Enter
Socket[1], OobMsm.Func[2], BAR[0]
Disable MSE and BME
Original StsCmdReg Value = 0x00100004
BarSize: 0x00200000
BarBase: 0xF9C00000(Already assigned)
Enable MSE and BME
[OOBMSM] InitOobMsmBar() Exit
SPK Bar0 address: 0xF9C00000
SPK instance 0: BAR offset: 0x00058000
SPK SNC Base Address 1: 0x0FFF0082
SPK SNC Base Address 2: 0x1FE000A2
SPK SNC Base Address 3: 0x000000C2
SPK SNC Base Address 4: 0x000000E2
SPK SNC Base Address 5: 0x00000102
SPK SNC Upper Base Address: 0x00000000
SPK_SNC_CONFIG: 0x0000000F
SPK_UNCORE_SNC_CONFIG: NumChaPerCluster:13, BaseChaCluster1:13, BaseChaCluster2:26, BaseChaCluster3:39
SPK_UMA_CLUSTER_CFG: UmaClusterEn: 0, XorDefeatur: 0
SPK instance 1: BAR offset: 0x00059000
SPK SNC Base Address 1: 0x0FFF0082
SPK SNC Base Address 2: 0x1FE000A2
SPK SNC Base Address 3: 0x000000C2
SPK SNC Base Address 4: 0x000000E2
SPK SNC Base Address 5: 0x00000102
SPK SNC Upper Base Address: 0x00000000
SPK_SNC_CONFIG: 0x0000000F
SPK_UNCORE_SNC_CONFIG: NumChaPerCluster:13, BaseChaCluster1:13, BaseChaCluster2:26, BaseChaCluster3:39
SPK_UMA_CLUSTER_CFG: UmaClusterEn: 0, XorDefeatur: 0
SPK instance 2: BAR offset: 0x0005A000
SPK SNC Base Address 1: 0x0FFF0082
SPK SNC Base Address 2: 0x1FE000A2
SPK SNC Base Address 3: 0x000000C2
SPK SNC Base Address 4: 0x000000E2
SPK SNC Base Address 5: 0x00000102
SPK SNC Upper Base Address: 0x00000000
SPK_SNC_CONFIG: 0x0000000F
SPK_UNCORE_SNC_CONFIG: NumChaPerCluster:13, BaseChaCluster1:13, BaseChaCluster2:26, BaseChaCluster3:39
SPK_UMA_CLUSTER_CFG: UmaClusterEn: 0, XorDefeatur: 0
SPK instance 3: BAR offset: 0x0005B000
SPK SNC Base Address 1: 0x0FFF0082
SPK SNC Base Address 2: 0x1FE000A2
SPK SNC Base Address 3: 0x000000C2
SPK SNC Base Address 4: 0x000000E2
SPK SNC Base Address 5: 0x00000102
SPK SNC Upper Base Address: 0x00000000
SPK_SNC_CONFIG: 0x0000000F
SPK_UNCORE_SNC_CONFIG: NumChaPerCluster:13, BaseChaCluster1:13, BaseChaCluster2:26, BaseChaCluster3:39
SPK_UMA_CLUSTER_CFG: UmaClusterEn: 0, XorDefeatur: 0
SPK instance 4: BAR offset: 0x0005C000
SPK SNC Base Address 1: 0x0FFF0082
SPK SNC Base Address 2: 0x1FE000A2
SPK SNC Base Address 3: 0x000000C2
SPK SNC Base Address 4: 0x000000E2
SPK SNC Base Address 5: 0x00000102
SPK SNC Upper Base Address: 0x00000000
SPK_SNC_CONFIG: 0x0000000F
SPK_UNCORE_SNC_CONFIG: NumChaPerCluster:13, BaseChaCluster1:13, BaseChaCluster2:26, BaseChaCluster3:39
SPK_UMA_CLUSTER_CFG: UmaClusterEn: 0, XorDefeatur: 0
SPK instance 5: BAR offset: 0x0005D000
SPK SNC Base Address 1: 0x0FFF0082
SPK SNC Base Address 2: 0x1FE000A2
SPK SNC Base Address 3: 0x000000C2
SPK SNC Base Address 4: 0x000000E2
SPK SNC Base Address 5: 0x00000102
SPK SNC Upper Base Address: 0x00000000
SPK_SNC_CONFIG: 0x0000000F
SPK_UNCORE_SNC_CONFIG: NumChaPerCluster:13, BaseChaCluster1:13, BaseChaCluster2:26, BaseChaCluster3:39
SPK_UMA_CLUSTER_CFG: UmaClusterEn: 0, XorDefeatur: 0
SPK instance 6: BAR offset: 0x0005E000
SPK SNC Base Address 1: 0x0FFF0082
SPK SNC Base Address 2: 0x1FE000A2
SPK SNC Base Address 3: 0x000000C2
SPK SNC Base Address 4: 0x000000E2
SPK SNC Base Address 5: 0x00000102
SPK SNC Upper Base Address: 0x00000000
SPK_SNC_CONFIG: 0x0000000F
SPK_UNCORE_SNC_CONFIG: NumChaPerCluster:13, BaseChaCluster1:13, BaseChaCluster2:26, BaseChaCluster3:39
SPK_UMA_CLUSTER_CFG: UmaClusterEn: 0, XorDefeatur: 0
SPK instance 7: BAR offset: 0x0005F000
SPK SNC Base Address 1: 0x0FFF0082
SPK SNC Base Address 2: 0x1FE000A2
SPK SNC Base Address 3: 0x000000C2
SPK SNC Base Address 4: 0x000000E2
SPK SNC Base Address 5: 0x00000102
SPK SNC Upper Base Address: 0x00000000
SPK_SNC_CONFIG: 0x0000000F
SPK_UNCORE_SNC_CONFIG: NumChaPerCluster:13, BaseChaCluster1:13, BaseChaCluster2:26, BaseChaCluster3:39
SPK_UMA_CLUSTER_CFG: UmaClusterEn: 0, XorDefeatur: 0
SPK instance 8: BAR offset: 0x00060000
SPK SNC Base Address 1: 0x0FFF0082
SPK SNC Base Address 2: 0x1FE000A2
SPK SNC Base Address 3: 0x000000C2
SPK SNC Base Address 4: 0x000000E2
SPK SNC Base Address 5: 0x00000102
SPK SNC Upper Base Address: 0x00000000
SPK_SNC_CONFIG: 0x0000000F
SPK_UNCORE_SNC_CONFIG: NumChaPerCluster:13, BaseChaCluster1:13, BaseChaCluster2:26, BaseChaCluster3:39
SPK_UMA_CLUSTER_CFG: UmaClusterEn: 0, XorDefeatur: 0
SPK instance 9: BAR offset: 0x00061000
SPK SNC Base Address 1: 0x0FFF0082
SPK SNC Base Address 2: 0x1FE000A2
SPK SNC Base Address 3: 0x000000C2
SPK SNC Base Address 4: 0x000000E2
SPK SNC Base Address 5: 0x00000102
SPK SNC Upper Base Address: 0x00000000
SPK_SNC_CONFIG: 0x0000000F
SPK_UNCORE_SNC_CONFIG: NumChaPerCluster:13, BaseChaCluster1:13, BaseChaCluster2:26, BaseChaCluster3:39
SPK_UMA_CLUSTER_CFG: UmaClusterEn: 0, XorDefeatur: 0
SPK instance 10: BAR offset: 0x00062000
SPK SNC Base Address 1: 0x0FFF0082
SPK SNC Base Address 2: 0x1FE000A2
SPK SNC Base Address 3: 0x000000C2
SPK SNC Base Address 4: 0x000000E2
SPK SNC Base Address 5: 0x00000102
SPK SNC Upper Base Address: 0x00000000
SPK_SNC_CONFIG: 0x0000000F
SPK_UNCORE_SNC_CONFIG: NumChaPerCluster:13, BaseChaCluster1:13, BaseChaCluster2:26, BaseChaCluster3:39
SPK_UMA_CLUSTER_CFG: UmaClusterEn: 0, XorDefeatur: 0
SPK instance 11: BAR offset: 0x00063000
SPK SNC Base Address 1: 0x0FFF0082
SPK SNC Base Address 2: 0x1FE000A2
SPK SNC Base Address 3: 0x000000C2
SPK SNC Base Address 4: 0x000000E2
SPK SNC Base Address 5: 0x00000102
SPK SNC Upper Base Address: 0x00000000
SPK_SNC_CONFIG: 0x0000000F
SPK_UNCORE_SNC_CONFIG: NumChaPerCluster:13, BaseChaCluster1:13, BaseChaCluster2:26, BaseChaCluster3:39
SPK_UMA_CLUSTER_CFG: UmaClusterEn: 0, XorDefeatur: 0
SPK instance 12: BAR offset: 0x00070000
SPK SNC Base Address 1: 0x0FFF0082
SPK SNC Base Address 2: 0x1FE000A2
SPK SNC Base Address 3: 0x000000C2
SPK SNC Base Address 4: 0x000000E2
SPK SNC Base Address 5: 0x00000102
SPK SNC Upper Base Address: 0x00000000
SPK_SNC_CONFIG: 0x0000000F
SPK_UNCORE_SNC_CONFIG: NumChaPerCluster:13, BaseChaCluster1:13, BaseChaCluster2:26, BaseChaCluster3:39
SPK_UMA_CLUSTER_CFG: UmaClusterEn: 0, XorDefeatur: 0
SPK instance 13: BAR offset: 0x00071000
SPK SNC Base Address 1: 0x0FFF0082
SPK SNC Base Address 2: 0x1FE000A2
SPK SNC Base Address 3: 0x000000C2
SPK SNC Base Address 4: 0x000000E2
SPK SNC Base Address 5: 0x00000102
SPK SNC Upper Base Address: 0x00000000
SPK_SNC_CONFIG: 0x0000000F
SPK_UNCORE_SNC_CONFIG: NumChaPerCluster:13, BaseChaCluster1:13, BaseChaCluster2:26, BaseChaCluster3:39
SPK_UMA_CLUSTER_CFG: UmaClusterEn: 0, XorDefeatur: 0
SPK instance 14: BAR offset: 0x00072000
SPK SNC Base Address 1: 0x0FFF0082
SPK SNC Base Address 2: 0x1FE000A2
SPK SNC Base Address 3: 0x000000C2
SPK SNC Base Address 4: 0x000000E2
SPK SNC Base Address 5: 0x00000102
SPK SNC Upper Base Address: 0x00000000
SPK_SNC_CONFIG: 0x0000000F
SPK_UNCORE_SNC_CONFIG: NumChaPerCluster:13, BaseChaCluster1:13, BaseChaCluster2:26, BaseChaCluster3:39
SPK_UMA_CLUSTER_CFG: UmaClusterEn: 0, XorDefeatur: 0
SPK instance 15: BAR offset: 0x00073000
SPK SNC Base Address 1: 0x0FFF0082
SPK SNC Base Address 2: 0x1FE000A2
SPK SNC Base Address 3: 0x000000C2
SPK SNC Base Address 4: 0x000000E2
SPK SNC Base Address 5: 0x00000102
SPK SNC Upper Base Address: 0x00000000
SPK_SNC_CONFIG: 0x0000000F
SPK_UNCORE_SNC_CONFIG: NumChaPerCluster:13, BaseChaCluster1:13, BaseChaCluster2:26, BaseChaCluster3:39
SPK_UMA_CLUSTER_CFG: UmaClusterEn: 0, XorDefeatur: 0
**** SNC XPT DUMP START ****
**** CPU 0: ****
SNC_CONFIG_MS2IDI : 0x0000000F
UNCORE_SNC_CONFIG_MS2IDI : 0x271A0D0D
UMA_CLUSTER_MS2IDI : 0x00000000
XPT_2_ENTRY_MINISAD_TABLE : 0x00000000
XPT_LOCAL_PREFETCH_CONFIG1 : 0x000400BD
XPT_LOCAL_PREFETCH_CONFIG2 : 0x008186A0
XPT_32_ENTRY_MINISAD_TABLE_0 : 0x00000000
XPT_32_ENTRY_MINISAD_TABLE_1 : 0x00000000
XPT_32_ENTRY_MINISAD_TABLE_2 : 0x00000000
XPT_32_ENTRY_MINISAD_TABLE_3 : 0x00000000
XPT_32_ENTRY_MINISAD_TABLE_4 : 0x00000000
XPT_32_ENTRY_MINISAD_TABLE_5 : 0x00000000
XPT_32_ENTRY_PREFETCH_BASE_0 : 0x00000000
XPT_32_ENTRY_PREFETCH_BASE_1 : 0x00000000
XPT_32_ENTRY_PREFETCH_BASE_2 : 0x00000000
XPT_32_ENTRY_PREFETCH_BASE_3 : 0x00000000
XPT_REMOTE_PREFETCH_CONFIG1 : 0x000400BD
XPT_REMOTE_PREFETCH_CONFIG2 : 0x008186A0
XPT_UPI_DECODE_TABLE_0_N0: 0x00000000
XPT_UPI_DECODE_TABLE_0_N1: 0x00000000
XPT_UPI_DECODE_TABLE_1_N0: 0x00000000
XPT_UPI_DECODE_TABLE_1_N1: 0x00000000
XPT_UPI_DECODE_TABLE_2_N0: 0x00000000
XPT_UPI_DECODE_TABLE_2_N1: 0x00000000
XPT_UPI_DECODE_TABLE_3_N0: 0x00000000
XPT_UPI_DECODE_TABLE_3_N1: 0x00000000
KTI_0_SNC_CONFIG_KTI : 0x0000000F
KTI_0_KTIAGCTRL : 0x00101012
KTI_0_KTI_SNC_BASE_1 : 0x0FFF0000
KTI_0_KTI_SNC_BASE_2 : 0x1FE00022
KTI_0_KTI_SNC_BASE_3 : 0x00000042
KTI_0_KTI_SNC_BASE_4 : 0x00000062
KTI_0_KTI_SNC_BASE_5 : 0x00000082
M3KTI 0:
M3KPRECTRL_0 : 0x00000040
M3KPRETL_0 : 0x00000000
KTI_1_SNC_CONFIG_KTI : 0x0000000F
KTI_1_KTIAGCTRL : 0x00101012
KTI_1_KTI_SNC_BASE_1 : 0x0FFF0000
KTI_1_KTI_SNC_BASE_2 : 0x1FE00022
KTI_1_KTI_SNC_BASE_3 : 0x00000042
KTI_1_KTI_SNC_BASE_4 : 0x00000062
KTI_1_KTI_SNC_BASE_5 : 0x00000082
M3KTI 1:
M3KPRECTRL_1 : 0x00000040
M3KPRETL_1 : 0x00000000
KTI_2_SNC_CONFIG_KTI : 0x0000000F
KTI_2_KTIAGCTRL : 0x00101012
KTI_2_KTI_SNC_BASE_1 : 0x0FFF0000
KTI_2_KTI_SNC_BASE_2 : 0x1FE00022
KTI_2_KTI_SNC_BASE_3 : 0x00000042
KTI_2_KTI_SNC_BASE_4 : 0x00000062
KTI_2_KTI_SNC_BASE_5 : 0x00000082
M3KTI 2:
M3KPRECTRL_2 : 0x00000040
M3KPRETL_2 : 0x00000000
KTI_3_SNC_CONFIG_KTI : 0x0000000F
KTI_3_KTIAGCTRL : 0x00101012
KTI_3_KTI_SNC_BASE_1 : 0x0FFF0000
KTI_3_KTI_SNC_BASE_2 : 0x1FE00022
KTI_3_KTI_SNC_BASE_3 : 0x00000042
KTI_3_KTI_SNC_BASE_4 : 0x00000062
KTI_3_KTI_SNC_BASE_5 : 0x00000082
M3KTI 3:
M3KPRECTRL_3 : 0x00000040
M3KPRETL_3 : 0x00000000
CHA_SNC_CONFIG_CHA_PMA : 0x271A0D0F
SNC_CONFIG_IIO_VTD : 0x0000000F
UNCORE_SNC_IIO_VTD : 0x04E6868D
SNC_BASE_1_IIO_VTD : 0x0FFF0000
SNC_BASE_2_IIO_VTD : 0x1FE00022
SNC_BASE_3_IIO_VTD : 0x00000042
SNC_BASE_4_IIO_VTD : 0x00000062
SNC_BASE_5_IIO_VTD : 0x00000082
IIO 0:
IIO_0_SNC_CONFIG_IIO : 0x0000000F
IIO_0_SNC_BASE_1 : 0x0FFF0000
IIO_0_SNC_BASE_2 : 0x1FE00022
IIO_0_SNC_BASE_3 : 0x00000042
IIO_0_SNC_BASE_4 : 0x00000062
IIO_0_SNC_BASE_5 : 0x00000082
IIO 1:
IIO_1_SNC_CONFIG_IIO : 0x0000000F
IIO_1_SNC_BASE_1 : 0x0FFF0000
IIO_1_SNC_BASE_2 : 0x1FE00022
IIO_1_SNC_BASE_3 : 0x00000042
IIO_1_SNC_BASE_4 : 0x00000062
IIO_1_SNC_BASE_5 : 0x00000082
IIO 2:
IIO_2_SNC_CONFIG_IIO : 0x0000000F
IIO_2_SNC_BASE_1 : 0x0FFF0000
IIO_2_SNC_BASE_2 : 0x1FE00022
IIO_2_SNC_BASE_3 : 0x00000042
IIO_2_SNC_BASE_4 : 0x00000062
IIO_2_SNC_BASE_5 : 0x00000082
IIO 3:
IIO_3_SNC_CONFIG_IIO : 0x0000000F
IIO_3_SNC_BASE_1 : 0x0FFF0000
IIO_3_SNC_BASE_2 : 0x1FE00022
IIO_3_SNC_BASE_3 : 0x00000042
IIO_3_SNC_BASE_4 : 0x00000062
IIO_3_SNC_BASE_5 : 0x00000082
IIO 4:
IIO_4_SNC_CONFIG_IIO : 0x0000000F
IIO_4_SNC_BASE_1 : 0x0FFF0000
IIO_4_SNC_BASE_2 : 0x1FE00022
IIO_4_SNC_BASE_3 : 0x00000042
IIO_4_SNC_BASE_4 : 0x00000062
IIO_4_SNC_BASE_5 : 0x00000082
IIO 5:
IIO_5_SNC_CONFIG_IIO : 0x0000000F
IIO_5_SNC_BASE_1 : 0x0FFF0000
IIO_5_SNC_BASE_2 : 0x1FE00022
IIO_5_SNC_BASE_3 : 0x00000042
IIO_5_SNC_BASE_4 : 0x00000062
IIO_5_SNC_BASE_5 : 0x00000082
IIO 8:
IIO_8_SNC_CONFIG_IIO : 0x0000000F
IIO_8_SNC_BASE_1 : 0x0FFF0000
IIO_8_SNC_BASE_2 : 0x1FE00022
IIO_8_SNC_BASE_3 : 0x00000042
IIO_8_SNC_BASE_4 : 0x00000062
IIO_8_SNC_BASE_5 : 0x00000082
IIO 9:
IIO_9_SNC_CONFIG_IIO : 0x0000000F
IIO_9_SNC_BASE_1 : 0x0FFF0000
IIO_9_SNC_BASE_2 : 0x1FE00022
IIO_9_SNC_BASE_3 : 0x00000042
IIO_9_SNC_BASE_4 : 0x00000062
IIO_9_SNC_BASE_5 : 0x00000082
IIO 10:
IIO_10_SNC_CONFIG_IIO : 0x0000000F
IIO_10_SNC_BASE_1 : 0x0FFF0000
IIO_10_SNC_BASE_2 : 0x1FE00022
IIO_10_SNC_BASE_3 : 0x00000042
IIO_10_SNC_BASE_4 : 0x00000062
IIO_10_SNC_BASE_5 : 0x00000082
IIO 11:
IIO_11_SNC_CONFIG_IIO : 0x0000000F
IIO_11_SNC_BASE_1 : 0x0FFF0000
IIO_11_SNC_BASE_2 : 0x1FE00022
IIO_11_SNC_BASE_3 : 0x00000042
IIO_11_SNC_BASE_4 : 0x00000062
IIO_11_SNC_BASE_5 : 0x00000082
M2MEM_0_TOPOLOGY : 0x00018000
M2MEM_0_PREFSADCONFIG0 : 0x00000000
M2MEM_0_PREFSADCONFIG1 : 0x00000000
M2MEM_0_PREFETCHSADSTARTADDR0 : 0x00000000
M2MEM_0_PREFETCHSADLIMITADDR0 : 0x00000000
M2MEM_0_PREFETCHSADSTARTADDR1 : 0x00000000
M2MEM_0_PREFETCHSADLIMITADDR1 : 0x00000000
M2MEM_0_PREFETCHSADSTARTADDR2 : 0x00000000
M2MEM_0_PREFETCHSADLIMITADDR2 : 0x00000000
M2MEM_0_SYSFEATURES0 : 0x1340008D
M2MEM_1_TOPOLOGY : 0x00032340
M2MEM_1_PREFSADCONFIG0 : 0x00000000
M2MEM_1_PREFSADCONFIG1 : 0x00000000
M2MEM_1_PREFETCHSADSTARTADDR0 : 0x00000000
M2MEM_1_PREFETCHSADLIMITADDR0 : 0x00000000
M2MEM_1_PREFETCHSADSTARTADDR1 : 0x00000000
M2MEM_1_PREFETCHSADLIMITADDR1 : 0x00000000
M2MEM_1_PREFETCHSADSTARTADDR2 : 0x00000000
M2MEM_1_PREFETCHSADLIMITADDR2 : 0x00000000
M2MEM_1_SYSFEATURES0 : 0x1340008D
M2MEM_2_TOPOLOGY : 0x0004C680
M2MEM_2_PREFSADCONFIG0 : 0x00000000
M2MEM_2_PREFSADCONFIG1 : 0x00000000
M2MEM_2_PREFETCHSADSTARTADDR0 : 0x00000000
M2MEM_2_PREFETCHSADLIMITADDR0 : 0x00000000
M2MEM_2_PREFETCHSADSTARTADDR1 : 0x00000000
M2MEM_2_PREFETCHSADLIMITADDR1 : 0x00000000
M2MEM_2_PREFETCHSADSTARTADDR2 : 0x00000000
M2MEM_2_PREFETCHSADLIMITADDR2 : 0x00000000
M2MEM_2_SYSFEATURES0 : 0x1340008D
M2MEM_3_TOPOLOGY : 0x000669C0
M2MEM_3_PREFSADCONFIG0 : 0x00000000
M2MEM_3_PREFSADCONFIG1 : 0x00000000
M2MEM_3_PREFETCHSADSTARTADDR0 : 0x00000000
M2MEM_3_PREFETCHSADLIMITADDR0 : 0x00000000
M2MEM_3_PREFETCHSADSTARTADDR1 : 0x00000000
M2MEM_3_PREFETCHSADLIMITADDR1 : 0x00000000
M2MEM_3_PREFETCHSADSTARTADDR2 : 0x00000000
M2MEM_3_PREFETCHSADLIMITADDR2 : 0x00000000
M2MEM_3_SYSFEATURES0 : 0x1340008D
M2MEM_4_TOPOLOGY : 0x00018000
M2MEM_4_PREFSADCONFIG0 : 0x00000000
M2MEM_4_PREFSADCONFIG1 : 0x00000000
M2MEM_4_PREFETCHSADSTARTADDR0 : 0x00000000
M2MEM_4_PREFETCHSADLIMITADDR0 : 0x00000000
M2MEM_4_PREFETCHSADSTARTADDR1 : 0x00000000
M2MEM_4_PREFETCHSADLIMITADDR1 : 0x00000000
M2MEM_4_PREFETCHSADSTARTADDR2 : 0x00000000
M2MEM_4_PREFETCHSADLIMITADDR2 : 0x00000000
M2MEM_4_SYSFEATURES0 : 0x1368009C
M2MEM_5_TOPOLOGY : 0x00018000
M2MEM_5_PREFSADCONFIG0 : 0x00000000
M2MEM_5_PREFSADCONFIG1 : 0x00000000
M2MEM_5_PREFETCHSADSTARTADDR0 : 0x00000000
M2MEM_5_PREFETCHSADLIMITADDR0 : 0x00000000
M2MEM_5_PREFETCHSADSTARTADDR1 : 0x00000000
M2MEM_5_PREFETCHSADLIMITADDR1 : 0x00000000
M2MEM_5_PREFETCHSADSTARTADDR2 : 0x00000000
M2MEM_5_PREFETCHSADLIMITADDR2 : 0x00000000
M2MEM_5_SYSFEATURES0 : 0x1368009C
M2MEM_6_TOPOLOGY : 0x00018000
M2MEM_6_PREFSADCONFIG0 : 0x00000000
M2MEM_6_PREFSADCONFIG1 : 0x00000000
M2MEM_6_PREFETCHSADSTARTADDR0 : 0x00000000
M2MEM_6_PREFETCHSADLIMITADDR0 : 0x00000000
M2MEM_6_PREFETCHSADSTARTADDR1 : 0x00000000
M2MEM_6_PREFETCHSADLIMITADDR1 : 0x00000000
M2MEM_6_PREFETCHSADSTARTADDR2 : 0x00000000
M2MEM_6_PREFETCHSADLIMITADDR2 : 0x00000000
M2MEM_6_SYSFEATURES0 : 0x1368009C
M2MEM_7_TOPOLOGY : 0x00018000
M2MEM_7_PREFSADCONFIG0 : 0x00000000
M2MEM_7_PREFSADCONFIG1 : 0x00000000
M2MEM_7_PREFETCHSADSTARTADDR0 : 0x00000000
M2MEM_7_PREFETCHSADLIMITADDR0 : 0x00000000
M2MEM_7_PREFETCHSADSTARTADDR1 : 0x00000000
M2MEM_7_PREFETCHSADLIMITADDR1 : 0x00000000
M2MEM_7_PREFETCHSADSTARTADDR2 : 0x00000000
M2MEM_7_PREFETCHSADLIMITADDR2 : 0x00000000
M2MEM_7_SYSFEATURES0 : 0x1368009C
M2MEM_8_TOPOLOGY : 0x00032340
M2MEM_8_PREFSADCONFIG0 : 0x00000000
M2MEM_8_PREFSADCONFIG1 : 0x00000000
M2MEM_8_PREFETCHSADSTARTADDR0 : 0x00000000
M2MEM_8_PREFETCHSADLIMITADDR0 : 0x00000000
M2MEM_8_PREFETCHSADSTARTADDR1 : 0x00000000
M2MEM_8_PREFETCHSADLIMITADDR1 : 0x00000000
M2MEM_8_PREFETCHSADSTARTADDR2 : 0x00000000
M2MEM_8_PREFETCHSADLIMITADDR2 : 0x00000000
M2MEM_8_SYSFEATURES0 : 0x1368009C
M2MEM_9_TOPOLOGY : 0x00032340
M2MEM_9_PREFSADCONFIG0 : 0x00000000
M2MEM_9_PREFSADCONFIG1 : 0x00000000
M2MEM_9_PREFETCHSADSTARTADDR0 : 0x00000000
M2MEM_9_PREFETCHSADLIMITADDR0 : 0x00000000
M2MEM_9_PREFETCHSADSTARTADDR1 : 0x00000000
M2MEM_9_PREFETCHSADLIMITADDR1 : 0x00000000
M2MEM_9_PREFETCHSADSTARTADDR2 : 0x00000000
M2MEM_9_PREFETCHSADLIMITADDR2 : 0x00000000
M2MEM_9_SYSFEATURES0 : 0x1368009C
M2MEM_10_TOPOLOGY : 0x00032340
M2MEM_10_PREFSADCONFIG0 : 0x00000000
M2MEM_10_PREFSADCONFIG1 : 0x00000000
M2MEM_10_PREFETCHSADSTARTADDR0 : 0x00000000
M2MEM_10_PREFETCHSADLIMITADDR0 : 0x00000000
M2MEM_10_PREFETCHSADSTARTADDR1 : 0x00000000
M2MEM_10_PREFETCHSADLIMITADDR1 : 0x00000000
M2MEM_10_PREFETCHSADSTARTADDR2 : 0x00000000
M2MEM_10_PREFETCHSADLIMITADDR2 : 0x00000000
M2MEM_10_SYSFEATURES0 : 0x1368009C
M2MEM_11_TOPOLOGY : 0x00032340
M2MEM_11_PREFSADCONFIG0 : 0x00000000
M2MEM_11_PREFSADCONFIG1 : 0x00000000
M2MEM_11_PREFETCHSADSTARTADDR0 : 0x00000000
M2MEM_11_PREFETCHSADLIMITADDR0 : 0x00000000
M2MEM_11_PREFETCHSADSTARTADDR1 : 0x00000000
M2MEM_11_PREFETCHSADLIMITADDR1 : 0x00000000
M2MEM_11_PREFETCHSADSTARTADDR2 : 0x00000000
M2MEM_11_PREFETCHSADLIMITADDR2 : 0x00000000
M2MEM_11_SYSFEATURES0 : 0x1368009C
M2MEM_12_TOPOLOGY : 0x0004C680
M2MEM_12_PREFSADCONFIG0 : 0x00000000
M2MEM_12_PREFSADCONFIG1 : 0x00000000
M2MEM_12_PREFETCHSADSTARTADDR0 : 0x00000000
M2MEM_12_PREFETCHSADLIMITADDR0 : 0x00000000
M2MEM_12_PREFETCHSADSTARTADDR1 : 0x00000000
M2MEM_12_PREFETCHSADLIMITADDR1 : 0x00000000
M2MEM_12_PREFETCHSADSTARTADDR2 : 0x00000000
M2MEM_12_PREFETCHSADLIMITADDR2 : 0x00000000
M2MEM_12_SYSFEATURES0 : 0x1368009C
M2MEM_13_TOPOLOGY : 0x0004C680
M2MEM_13_PREFSADCONFIG0 : 0x00000000
M2MEM_13_PREFSADCONFIG1 : 0x00000000
M2MEM_13_PREFETCHSADSTARTADDR0 : 0x00000000
M2MEM_13_PREFETCHSADLIMITADDR0 : 0x00000000
M2MEM_13_PREFETCHSADSTARTADDR1 : 0x00000000
M2MEM_13_PREFETCHSADLIMITADDR1 : 0x00000000
M2MEM_13_PREFETCHSADSTARTADDR2 : 0x00000000
M2MEM_13_PREFETCHSADLIMITADDR2 : 0x00000000
M2MEM_13_SYSFEATURES0 : 0x1368009C
M2MEM_14_TOPOLOGY : 0x0004C680
M2MEM_14_PREFSADCONFIG0 : 0x00000000
M2MEM_14_PREFSADCONFIG1 : 0x00000000
M2MEM_14_PREFETCHSADSTARTADDR0 : 0x00000000
M2MEM_14_PREFETCHSADLIMITADDR0 : 0x00000000
M2MEM_14_PREFETCHSADSTARTADDR1 : 0x00000000
M2MEM_14_PREFETCHSADLIMITADDR1 : 0x00000000
M2MEM_14_PREFETCHSADSTARTADDR2 : 0x00000000
M2MEM_14_PREFETCHSADLIMITADDR2 : 0x00000000
M2MEM_14_SYSFEATURES0 : 0x1368009C
M2MEM_15_TOPOLOGY : 0x0004C680
M2MEM_15_PREFSADCONFIG0 : 0x00000000
M2MEM_15_PREFSADCONFIG1 : 0x00000000
M2MEM_15_PREFETCHSADSTARTADDR0 : 0x00000000
M2MEM_15_PREFETCHSADLIMITADDR0 : 0x00000000
M2MEM_15_PREFETCHSADSTARTADDR1 : 0x00000000
M2MEM_15_PREFETCHSADLIMITADDR1 : 0x00000000
M2MEM_15_PREFETCHSADSTARTADDR2 : 0x00000000
M2MEM_15_PREFETCHSADLIMITADDR2 : 0x00000000
M2MEM_15_SYSFEATURES0 : 0x1368009C
M2MEM_16_TOPOLOGY : 0x000669C0
M2MEM_16_PREFSADCONFIG0 : 0x00000000
M2MEM_16_PREFSADCONFIG1 : 0x00000000
M2MEM_16_PREFETCHSADSTARTADDR0 : 0x00000000
M2MEM_16_PREFETCHSADLIMITADDR0 : 0x00000000
M2MEM_16_PREFETCHSADSTARTADDR1 : 0x00000000
M2MEM_16_PREFETCHSADLIMITADDR1 : 0x00000000
M2MEM_16_PREFETCHSADSTARTADDR2 : 0x00000000
M2MEM_16_PREFETCHSADLIMITADDR2 : 0x00000000
M2MEM_16_SYSFEATURES0 : 0x1368009C
M2MEM_17_TOPOLOGY : 0x000669C0
M2MEM_17_PREFSADCONFIG0 : 0x00000000
M2MEM_17_PREFSADCONFIG1 : 0x00000000
M2MEM_17_PREFETCHSADSTARTADDR0 : 0x00000000
M2MEM_17_PREFETCHSADLIMITADDR0 : 0x00000000
M2MEM_17_PREFETCHSADSTARTADDR1 : 0x00000000
M2MEM_17_PREFETCHSADLIMITADDR1 : 0x00000000
M2MEM_17_PREFETCHSADSTARTADDR2 : 0x00000000
M2MEM_17_PREFETCHSADLIMITADDR2 : 0x00000000
M2MEM_17_SYSFEATURES0 : 0x1368009C
M2MEM_18_TOPOLOGY : 0x000669C0
M2MEM_18_PREFSADCONFIG0 : 0x00000000
M2MEM_18_PREFSADCONFIG1 : 0x00000000
M2MEM_18_PREFETCHSADSTARTADDR0 : 0x00000000
M2MEM_18_PREFETCHSADLIMITADDR0 : 0x00000000
M2MEM_18_PREFETCHSADSTARTADDR1 : 0x00000000
M2MEM_18_PREFETCHSADLIMITADDR1 : 0x00000000
M2MEM_18_PREFETCHSADSTARTADDR2 : 0x00000000
M2MEM_18_PREFETCHSADLIMITADDR2 : 0x00000000
M2MEM_18_SYSFEATURES0 : 0x1368009C
M2MEM_19_TOPOLOGY : 0x000669C0
M2MEM_19_PREFSADCONFIG0 : 0x00000000
M2MEM_19_PREFSADCONFIG1 : 0x00000000
M2MEM_19_PREFETCHSADSTARTADDR0 : 0x00000000
M2MEM_19_PREFETCHSADLIMITADDR0 : 0x00000000
M2MEM_19_PREFETCHSADSTARTADDR1 : 0x00000000
M2MEM_19_PREFETCHSADLIMITADDR1 : 0x00000000
M2MEM_19_PREFETCHSADSTARTADDR2 : 0x00000000
M2MEM_19_PREFETCHSADLIMITADDR2 : 0x00000000
M2MEM_19_SYSFEATURES0 : 0x1368009C
**** CPU 1: ****
SNC_CONFIG_MS2IDI : 0x0000000F
UNCORE_SNC_CONFIG_MS2IDI : 0x271A0D0D
UMA_CLUSTER_MS2IDI : 0x00000000
XPT_2_ENTRY_MINISAD_TABLE : 0x00000000
XPT_LOCAL_PREFETCH_CONFIG1 : 0x000400BD
XPT_LOCAL_PREFETCH_CONFIG2 : 0x008186A0
XPT_32_ENTRY_MINISAD_TABLE_0 : 0x00000000
XPT_32_ENTRY_MINISAD_TABLE_1 : 0x00000000
XPT_32_ENTRY_MINISAD_TABLE_2 : 0x00000000
XPT_32_ENTRY_MINISAD_TABLE_3 : 0x00000000
XPT_32_ENTRY_MINISAD_TABLE_4 : 0x00000000
XPT_32_ENTRY_MINISAD_TABLE_5 : 0x00000000
XPT_32_ENTRY_PREFETCH_BASE_0 : 0x00000000
XPT_32_ENTRY_PREFETCH_BASE_1 : 0x00000000
XPT_32_ENTRY_PREFETCH_BASE_2 : 0x00000000
XPT_32_ENTRY_PREFETCH_BASE_3 : 0x00000000
XPT_REMOTE_PREFETCH_CONFIG1 : 0x000400BD
XPT_REMOTE_PREFETCH_CONFIG2 : 0x008186A0
XPT_UPI_DECODE_TABLE_0_N0: 0x00000000
XPT_UPI_DECODE_TABLE_0_N1: 0x00000000
XPT_UPI_DECODE_TABLE_1_N0: 0x00000000
XPT_UPI_DECODE_TABLE_1_N1: 0x00000000
XPT_UPI_DECODE_TABLE_2_N0: 0x00000000
XPT_UPI_DECODE_TABLE_2_N1: 0x00000000
XPT_UPI_DECODE_TABLE_3_N0: 0x00000000
XPT_UPI_DECODE_TABLE_3_N1: 0x00000000
KTI_0_SNC_CONFIG_KTI : 0x0000000F
KTI_0_KTIAGCTRL : 0x00101012
KTI_0_KTI_SNC_BASE_1 : 0x0FFF0082
KTI_0_KTI_SNC_BASE_2 : 0x1FE000A2
KTI_0_KTI_SNC_BASE_3 : 0x000000C2
KTI_0_KTI_SNC_BASE_4 : 0x000000E2
KTI_0_KTI_SNC_BASE_5 : 0x00000102
M3KTI 0:
M3KPRECTRL_0 : 0x00000040
M3KPRETL_0 : 0x00000000
KTI_1_SNC_CONFIG_KTI : 0x0000000F
KTI_1_KTIAGCTRL : 0x00101012
KTI_1_KTI_SNC_BASE_1 : 0x0FFF0082
KTI_1_KTI_SNC_BASE_2 : 0x1FE000A2
KTI_1_KTI_SNC_BASE_3 : 0x000000C2
KTI_1_KTI_SNC_BASE_4 : 0x000000E2
KTI_1_KTI_SNC_BASE_5 : 0x00000102
M3KTI 1:
M3KPRECTRL_1 : 0x00000040
M3KPRETL_1 : 0x00000000
KTI_2_SNC_CONFIG_KTI : 0x0000000F
KTI_2_KTIAGCTRL : 0x00101012
KTI_2_KTI_SNC_BASE_1 : 0x0FFF0082
KTI_2_KTI_SNC_BASE_2 : 0x1FE000A2
KTI_2_KTI_SNC_BASE_3 : 0x000000C2
KTI_2_KTI_SNC_BASE_4 : 0x000000E2
KTI_2_KTI_SNC_BASE_5 : 0x00000102
M3KTI 2:
M3KPRECTRL_2 : 0x00000040
M3KPRETL_2 : 0x00000000
KTI_3_SNC_CONFIG_KTI : 0x0000000F
KTI_3_KTIAGCTRL : 0x00101012
KTI_3_KTI_SNC_BASE_1 : 0x0FFF0082
KTI_3_KTI_SNC_BASE_2 : 0x1FE000A2
KTI_3_KTI_SNC_BASE_3 : 0x000000C2
KTI_3_KTI_SNC_BASE_4 : 0x000000E2
KTI_3_KTI_SNC_BASE_5 : 0x00000102
M3KTI 3:
M3KPRECTRL_3 : 0x00000040
M3KPRETL_3 : 0x00000000
CHA_SNC_CONFIG_CHA_PMA : 0x271A0D0F
SNC_CONFIG_IIO_VTD : 0x0000000F
UNCORE_SNC_IIO_VTD : 0x04E6868D
SNC_BASE_1_IIO_VTD : 0x0FFF0082
SNC_BASE_2_IIO_VTD : 0x1FE000A2
SNC_BASE_3_IIO_VTD : 0x000000C2
SNC_BASE_4_IIO_VTD : 0x000000E2
SNC_BASE_5_IIO_VTD : 0x00000102
IIO 1:
IIO_1_SNC_CONFIG_IIO : 0x0000000F
IIO_1_SNC_BASE_1 : 0x0FFF0082
IIO_1_SNC_BASE_2 : 0x1FE000A2
IIO_1_SNC_BASE_3 : 0x000000C2
IIO_1_SNC_BASE_4 : 0x000000E2
IIO_1_SNC_BASE_5 : 0x00000102
IIO 2:
IIO_2_SNC_CONFIG_IIO : 0x0000000F
IIO_2_SNC_BASE_1 : 0x0FFF0082
IIO_2_SNC_BASE_2 : 0x1FE000A2
IIO_2_SNC_BASE_3 : 0x000000C2
IIO_2_SNC_BASE_4 : 0x000000E2
IIO_2_SNC_BASE_5 : 0x00000102
IIO 3:
IIO_3_SNC_CONFIG_IIO : 0x0000000F
IIO_3_SNC_BASE_1 : 0x0FFF0082
IIO_3_SNC_BASE_2 : 0x1FE000A2
IIO_3_SNC_BASE_3 : 0x000000C2
IIO_3_SNC_BASE_4 : 0x000000E2
IIO_3_SNC_BASE_5 : 0x00000102
IIO 4:
IIO_4_SNC_CONFIG_IIO : 0x0000000F
IIO_4_SNC_BASE_1 : 0x0FFF0082
IIO_4_SNC_BASE_2 : 0x1FE000A2
IIO_4_SNC_BASE_3 : 0x000000C2
IIO_4_SNC_BASE_4 : 0x000000E2
IIO_4_SNC_BASE_5 : 0x00000102
IIO 5:
IIO_5_SNC_CONFIG_IIO : 0x0000000F
IIO_5_SNC_BASE_1 : 0x0FFF0082
IIO_5_SNC_BASE_2 : 0x1FE000A2
IIO_5_SNC_BASE_3 : 0x000000C2
IIO_5_SNC_BASE_4 : 0x000000E2
IIO_5_SNC_BASE_5 : 0x00000102
IIO 6:
IIO_6_SNC_CONFIG_IIO : 0x0000000F
IIO_6_SNC_BASE_1 : 0x0FFF0082
IIO_6_SNC_BASE_2 : 0x1FE000A2
IIO_6_SNC_BASE_3 : 0x000000C2
IIO_6_SNC_BASE_4 : 0x000000E2
IIO_6_SNC_BASE_5 : 0x00000102
IIO 8:
IIO_8_SNC_CONFIG_IIO : 0x0000000F
IIO_8_SNC_BASE_1 : 0x0FFF0082
IIO_8_SNC_BASE_2 : 0x1FE000A2
IIO_8_SNC_BASE_3 : 0x000000C2
IIO_8_SNC_BASE_4 : 0x000000E2
IIO_8_SNC_BASE_5 : 0x00000102
IIO 9:
IIO_9_SNC_CONFIG_IIO : 0x0000000F
IIO_9_SNC_BASE_1 : 0x0FFF0082
IIO_9_SNC_BASE_2 : 0x1FE000A2
IIO_9_SNC_BASE_3 : 0x000000C2
IIO_9_SNC_BASE_4 : 0x000000E2
IIO_9_SNC_BASE_5 : 0x00000102
IIO 10:
IIO_10_SNC_CONFIG_IIO : 0x0000000F
IIO_10_SNC_BASE_1 : 0x0FFF0082
IIO_10_SNC_BASE_2 : 0x1FE000A2
IIO_10_SNC_BASE_3 : 0x000000C2
IIO_10_SNC_BASE_4 : 0x000000E2
IIO_10_SNC_BASE_5 : 0x00000102
IIO 11:
IIO_11_SNC_CONFIG_IIO : 0x0000000F
IIO_11_SNC_BASE_1 : 0x0FFF0082
IIO_11_SNC_BASE_2 : 0x1FE000A2
IIO_11_SNC_BASE_3 : 0x000000C2
IIO_11_SNC_BASE_4 : 0x000000E2
IIO_11_SNC_BASE_5 : 0x00000102
M2MEM_0_TOPOLOGY : 0x00018001
M2MEM_0_PREFSADCONFIG0 : 0x00000000
M2MEM_0_PREFSADCONFIG1 : 0x00000000
M2MEM_0_PREFETCHSADSTARTADDR0 : 0x00000000
M2MEM_0_PREFETCHSADLIMITADDR0 : 0x00000000
M2MEM_0_PREFETCHSADSTARTADDR1 : 0x00000000
M2MEM_0_PREFETCHSADLIMITADDR1 : 0x00000000
M2MEM_0_PREFETCHSADSTARTADDR2 : 0x00000000
M2MEM_0_PREFETCHSADLIMITADDR2 : 0x00000000
M2MEM_0_SYSFEATURES0 : 0x1340008D
M2MEM_1_TOPOLOGY : 0x00032341
M2MEM_1_PREFSADCONFIG0 : 0x00000000
M2MEM_1_PREFSADCONFIG1 : 0x00000000
M2MEM_1_PREFETCHSADSTARTADDR0 : 0x00000000
M2MEM_1_PREFETCHSADLIMITADDR0 : 0x00000000
M2MEM_1_PREFETCHSADSTARTADDR1 : 0x00000000
M2MEM_1_PREFETCHSADLIMITADDR1 : 0x00000000
M2MEM_1_PREFETCHSADSTARTADDR2 : 0x00000000
M2MEM_1_PREFETCHSADLIMITADDR2 : 0x00000000
M2MEM_1_SYSFEATURES0 : 0x1340008D
M2MEM_2_TOPOLOGY : 0x0004C681
M2MEM_2_PREFSADCONFIG0 : 0x00000000
M2MEM_2_PREFSADCONFIG1 : 0x00000000
M2MEM_2_PREFETCHSADSTARTADDR0 : 0x00000000
M2MEM_2_PREFETCHSADLIMITADDR0 : 0x00000000
M2MEM_2_PREFETCHSADSTARTADDR1 : 0x00000000
M2MEM_2_PREFETCHSADLIMITADDR1 : 0x00000000
M2MEM_2_PREFETCHSADSTARTADDR2 : 0x00000000
M2MEM_2_PREFETCHSADLIMITADDR2 : 0x00000000
M2MEM_2_SYSFEATURES0 : 0x1340008D
M2MEM_3_TOPOLOGY : 0x000669C1
M2MEM_3_PREFSADCONFIG0 : 0x00000000
M2MEM_3_PREFSADCONFIG1 : 0x00000000
M2MEM_3_PREFETCHSADSTARTADDR0 : 0x00000000
M2MEM_3_PREFETCHSADLIMITADDR0 : 0x00000000
M2MEM_3_PREFETCHSADSTARTADDR1 : 0x00000000
M2MEM_3_PREFETCHSADLIMITADDR1 : 0x00000000
M2MEM_3_PREFETCHSADSTARTADDR2 : 0x00000000
M2MEM_3_PREFETCHSADLIMITADDR2 : 0x00000000
M2MEM_3_SYSFEATURES0 : 0x1340008D
M2MEM_4_TOPOLOGY : 0x00018001
M2MEM_4_PREFSADCONFIG0 : 0x00000000
M2MEM_4_PREFSADCONFIG1 : 0x00000000
M2MEM_4_PREFETCHSADSTARTADDR0 : 0x00000000
M2MEM_4_PREFETCHSADLIMITADDR0 : 0x00000000
M2MEM_4_PREFETCHSADSTARTADDR1 : 0x00000000
M2MEM_4_PREFETCHSADLIMITADDR1 : 0x00000000
M2MEM_4_PREFETCHSADSTARTADDR2 : 0x00000000
M2MEM_4_PREFETCHSADLIMITADDR2 : 0x00000000
M2MEM_4_SYSFEATURES0 : 0x1368009C
M2MEM_5_TOPOLOGY : 0x00018001
M2MEM_5_PREFSADCONFIG0 : 0x00000000
M2MEM_5_PREFSADCONFIG1 : 0x00000000
M2MEM_5_PREFETCHSADSTARTADDR0 : 0x00000000
M2MEM_5_PREFETCHSADLIMITADDR0 : 0x00000000
M2MEM_5_PREFETCHSADSTARTADDR1 : 0x00000000
M2MEM_5_PREFETCHSADLIMITADDR1 : 0x00000000
M2MEM_5_PREFETCHSADSTARTADDR2 : 0x00000000
M2MEM_5_PREFETCHSADLIMITADDR2 : 0x00000000
M2MEM_5_SYSFEATURES0 : 0x1368009C
M2MEM_6_TOPOLOGY : 0x00018001
M2MEM_6_PREFSADCONFIG0 : 0x00000000
M2MEM_6_PREFSADCONFIG1 : 0x00000000
M2MEM_6_PREFETCHSADSTARTADDR0 : 0x00000000
M2MEM_6_PREFETCHSADLIMITADDR0 : 0x00000000
M2MEM_6_PREFETCHSADSTARTADDR1 : 0x00000000
M2MEM_6_PREFETCHSADLIMITADDR1 : 0x00000000
M2MEM_6_PREFETCHSADSTARTADDR2 : 0x00000000
M2MEM_6_PREFETCHSADLIMITADDR2 : 0x00000000
M2MEM_6_SYSFEATURES0 : 0x1368009C
M2MEM_7_TOPOLOGY : 0x00018001
M2MEM_7_PREFSADCONFIG0 : 0x00000000
M2MEM_7_PREFSADCONFIG1 : 0x00000000
M2MEM_7_PREFETCHSADSTARTADDR0 : 0x00000000
M2MEM_7_PREFETCHSADLIMITADDR0 : 0x00000000
M2MEM_7_PREFETCHSADSTARTADDR1 : 0x00000000
M2MEM_7_PREFETCHSADLIMITADDR1 : 0x00000000
M2MEM_7_PREFETCHSADSTARTADDR2 : 0x00000000
M2MEM_7_PREFETCHSADLIMITADDR2 : 0x00000000
M2MEM_7_SYSFEATURES0 : 0x1368009C
M2MEM_8_TOPOLOGY : 0x00032341
M2MEM_8_PREFSADCONFIG0 : 0x00000000
M2MEM_8_PREFSADCONFIG1 : 0x00000000
M2MEM_8_PREFETCHSADSTARTADDR0 : 0x00000000
M2MEM_8_PREFETCHSADLIMITADDR0 : 0x00000000
M2MEM_8_PREFETCHSADSTARTADDR1 : 0x00000000
M2MEM_8_PREFETCHSADLIMITADDR1 : 0x00000000
M2MEM_8_PREFETCHSADSTARTADDR2 : 0x00000000
M2MEM_8_PREFETCHSADLIMITADDR2 : 0x00000000
M2MEM_8_SYSFEATURES0 : 0x1368009C
M2MEM_9_TOPOLOGY : 0x00032341
M2MEM_9_PREFSADCONFIG0 : 0x00000000
M2MEM_9_PREFSADCONFIG1 : 0x00000000
M2MEM_9_PREFETCHSADSTARTADDR0 : 0x00000000
M2MEM_9_PREFETCHSADLIMITADDR0 : 0x00000000
M2MEM_9_PREFETCHSADSTARTADDR1 : 0x00000000
M2MEM_9_PREFETCHSADLIMITADDR1 : 0x00000000
M2MEM_9_PREFETCHSADSTARTADDR2 : 0x00000000
M2MEM_9_PREFETCHSADLIMITADDR2 : 0x00000000
M2MEM_9_SYSFEATURES0 : 0x1368009C
M2MEM_10_TOPOLOGY : 0x00032341
M2MEM_10_PREFSADCONFIG0 : 0x00000000
M2MEM_10_PREFSADCONFIG1 : 0x00000000
M2MEM_10_PREFETCHSADSTARTADDR0 : 0x00000000
M2MEM_10_PREFETCHSADLIMITADDR0 : 0x00000000
M2MEM_10_PREFETCHSADSTARTADDR1 : 0x00000000
M2MEM_10_PREFETCHSADLIMITADDR1 : 0x00000000
M2MEM_10_PREFETCHSADSTARTADDR2 : 0x00000000
M2MEM_10_PREFETCHSADLIMITADDR2 : 0x00000000
M2MEM_10_SYSFEATURES0 : 0x1368009C
M2MEM_11_TOPOLOGY : 0x00032341
M2MEM_11_PREFSADCONFIG0 : 0x00000000
M2MEM_11_PREFSADCONFIG1 : 0x00000000
M2MEM_11_PREFETCHSADSTARTADDR0 : 0x00000000
M2MEM_11_PREFETCHSADLIMITADDR0 : 0x00000000
M2MEM_11_PREFETCHSADSTARTADDR1 : 0x00000000
M2MEM_11_PREFETCHSADLIMITADDR1 : 0x00000000
M2MEM_11_PREFETCHSADSTARTADDR2 : 0x00000000
M2MEM_11_PREFETCHSADLIMITADDR2 : 0x00000000
M2MEM_11_SYSFEATURES0 : 0x1368009C
M2MEM_12_TOPOLOGY : 0x0004C681
M2MEM_12_PREFSADCONFIG0 : 0x00000000
M2MEM_12_PREFSADCONFIG1 : 0x00000000
M2MEM_12_PREFETCHSADSTARTADDR0 : 0x00000000
M2MEM_12_PREFETCHSADLIMITADDR0 : 0x00000000
M2MEM_12_PREFETCHSADSTARTADDR1 : 0x00000000
M2MEM_12_PREFETCHSADLIMITADDR1 : 0x00000000
M2MEM_12_PREFETCHSADSTARTADDR2 : 0x00000000
M2MEM_12_PREFETCHSADLIMITADDR2 : 0x00000000
M2MEM_12_SYSFEATURES0 : 0x1368009C
M2MEM_13_TOPOLOGY : 0x0004C681
M2MEM_13_PREFSADCONFIG0 : 0x00000000
M2MEM_13_PREFSADCONFIG1 : 0x00000000
M2MEM_13_PREFETCHSADSTARTADDR0 : 0x00000000
M2MEM_13_PREFETCHSADLIMITADDR0 : 0x00000000
M2MEM_13_PREFETCHSADSTARTADDR1 : 0x00000000
M2MEM_13_PREFETCHSADLIMITADDR1 : 0x00000000
M2MEM_13_PREFETCHSADSTARTADDR2 : 0x00000000
M2MEM_13_PREFETCHSADLIMITADDR2 : 0x00000000
M2MEM_13_SYSFEATURES0 : 0x1368009C
M2MEM_14_TOPOLOGY : 0x0004C681
M2MEM_14_PREFSADCONFIG0 : 0x00000000
M2MEM_14_PREFSADCONFIG1 : 0x00000000
M2MEM_14_PREFETCHSADSTARTADDR0 : 0x00000000
M2MEM_14_PREFETCHSADLIMITADDR0 : 0x00000000
M2MEM_14_PREFETCHSADSTARTADDR1 : 0x00000000
M2MEM_14_PREFETCHSADLIMITADDR1 : 0x00000000
M2MEM_14_PREFETCHSADSTARTADDR2 : 0x00000000
M2MEM_14_PREFETCHSADLIMITADDR2 : 0x00000000
M2MEM_14_SYSFEATURES0 : 0x1368009C
M2MEM_15_TOPOLOGY : 0x0004C681
M2MEM_15_PREFSADCONFIG0 : 0x00000000
M2MEM_15_PREFSADCONFIG1 : 0x00000000
M2MEM_15_PREFETCHSADSTARTADDR0 : 0x00000000
M2MEM_15_PREFETCHSADLIMITADDR0 : 0x00000000
M2MEM_15_PREFETCHSADSTARTADDR1 : 0x00000000
M2MEM_15_PREFETCHSADLIMITADDR1 : 0x00000000
M2MEM_15_PREFETCHSADSTARTADDR2 : 0x00000000
M2MEM_15_PREFETCHSADLIMITADDR2 : 0x00000000
M2MEM_15_SYSFEATURES0 : 0x1368009C
M2MEM_16_TOPOLOGY : 0x000669C1
M2MEM_16_PREFSADCONFIG0 : 0x00000000
M2MEM_16_PREFSADCONFIG1 : 0x00000000
M2MEM_16_PREFETCHSADSTARTADDR0 : 0x00000000
M2MEM_16_PREFETCHSADLIMITADDR0 : 0x00000000
M2MEM_16_PREFETCHSADSTARTADDR1 : 0x00000000
M2MEM_16_PREFETCHSADLIMITADDR1 : 0x00000000
M2MEM_16_PREFETCHSADSTARTADDR2 : 0x00000000
M2MEM_16_PREFETCHSADLIMITADDR2 : 0x00000000
M2MEM_16_SYSFEATURES0 : 0x1368009C
M2MEM_17_TOPOLOGY : 0x000669C1
M2MEM_17_PREFSADCONFIG0 : 0x00000000
M2MEM_17_PREFSADCONFIG1 : 0x00000000
M2MEM_17_PREFETCHSADSTARTADDR0 : 0x00000000
M2MEM_17_PREFETCHSADLIMITADDR0 : 0x00000000
M2MEM_17_PREFETCHSADSTARTADDR1 : 0x00000000
M2MEM_17_PREFETCHSADLIMITADDR1 : 0x00000000
M2MEM_17_PREFETCHSADSTARTADDR2 : 0x00000000
M2MEM_17_PREFETCHSADLIMITADDR2 : 0x00000000
M2MEM_17_SYSFEATURES0 : 0x1368009C
M2MEM_18_TOPOLOGY : 0x000669C1
M2MEM_18_PREFSADCONFIG0 : 0x00000000
M2MEM_18_PREFSADCONFIG1 : 0x00000000
M2MEM_18_PREFETCHSADSTARTADDR0 : 0x00000000
M2MEM_18_PREFETCHSADLIMITADDR0 : 0x00000000
M2MEM_18_PREFETCHSADSTARTADDR1 : 0x00000000
M2MEM_18_PREFETCHSADLIMITADDR1 : 0x00000000
M2MEM_18_PREFETCHSADSTARTADDR2 : 0x00000000
M2MEM_18_PREFETCHSADLIMITADDR2 : 0x00000000
M2MEM_18_SYSFEATURES0 : 0x1368009C
M2MEM_19_TOPOLOGY : 0x000669C1
M2MEM_19_PREFSADCONFIG0 : 0x00000000
M2MEM_19_PREFSADCONFIG1 : 0x00000000
M2MEM_19_PREFETCHSADSTARTADDR0 : 0x00000000
M2MEM_19_PREFETCHSADLIMITADDR0 : 0x00000000
M2MEM_19_PREFETCHSADSTARTADDR1 : 0x00000000
M2MEM_19_PREFETCHSADLIMITADDR1 : 0x00000000
M2MEM_19_PREFETCHSADSTARTADDR2 : 0x00000000
M2MEM_19_PREFETCHSADLIMITADDR2 : 0x00000000
M2MEM_19_SYSFEATURES0 : 0x1368009C
**** SNC XPT DUMP END ****
Socket 0 AdTransgressCredits: 0x0, BlTransgressCredits: 0x0
Socket 1 AdTransgressCredits: 0x0, BlTransgressCredits: 0x0
MBA2.0 calibration tables
Mbe BW Calibration: 0 (0 - Linear, 1 - Biased, 2 - Legacy)
ProgramSncShadowReg
Socket:0 Base1 0x0FFF0000
Socket:0 Base2 0x1FE00022
Socket:0 Base3 0x00000042
Socket:0 Base4 0x00000062
Socket:0 Base5 0x00000082
Socket:0 UpperBase1 0x00000000
Socket:0 SncConfig 0x0000000A
Socket:1 Base1 0x0FFF0082
Socket:1 Base2 0x1FE000A2
Socket:1 Base3 0x000000C2
Socket:1 Base4 0x000000E2
Socket:1 Base5 0x00000102
Socket:1 UpperBase1 0x00000000
Socket:1 SncConfig 0x0000000A
******* Configure Mesh Mode - END *******
S3M Provisioning SoftStrap Disabled, Exit.
PUcode Patch provisioning/commit flow
S3mPucodeCfrPatchProvisionCommit didn't find suitable CFR image, Exit.
S3M Patch provisioning/commit flow
Get Image :FF800090 11FF4
CFR Patch Provision start...
IFWI integrated S3M CFR patch revision SVN: 00000001, RevID: 0000001E.
S0 S3M_S3MFW_CFR_SVN_N0_S3M_TREG_REG : 00000000
S0 S3M_S3MFW_REVID_N0_S3M_TREG_REG : 00000000
S0 S3M_S3MFW_CFR_SVN_N1_S3M_TREG_REG : 00010001
S0 S3M_S3MFW_REVID_N1_S3M_TREG_REG : 0000001E
Committed region with the latest patch, skip provision.
Socket 0 Can't Provision, Skip.
IFWI integrated S3M CFR patch revision SVN: 00000001, RevID: 0000001E.
S1 S3M_S3MFW_CFR_SVN_N0_S3M_TREG_REG : 00000000
S1 S3M_S3MFW_REVID_N0_S3M_TREG_REG : 00000000
S1 S3M_S3MFW_CFR_SVN_N1_S3M_TREG_REG : 00010001
S1 S3M_S3MFW_REVID_N1_S3M_TREG_REG : 0000001E
Committed region with the latest patch, skip provision.
Socket 1 Can't Provision, Skip.
CFR Patch Commit start...
S0 S3M_S3MFW_CFR_SVN_N0_S3M_TREG_REG : 00000000
S0 S3M_S3MFW_REVID_N0_S3M_TREG_REG : 00000000
Socket 0 can't commit, skip
S1 S3M_S3MFW_CFR_SVN_N0_S3M_TREG_REG : 00000000
S1 S3M_S3MFW_REVID_N0_S3M_TREG_REG : 00000000
Socket 1 can't commit, skip
CFR Patch Provision/Commit Completed.
IIO Early Post Link Training Starting...
[0.1 p1] 00:15:01.0: Link Down!
[0.2 p9] 00:26:01.0: Link Down!
[0.3 p17] 00:37:01.0: Link Down!
[0.4 p25] 00:48:01.0: Link Down!
[0.4 p27] 00:48:03.0: Link Down!
[0.4 p29] 00:48:05.0: Link Down!
[0.4 p31] 00:48:07.0: Link Down!
[0.5 p33] 00:59:01.0: Link Down!
[0.5 p35] 00:59:03.0: Link Down!
[0.5 p37] 00:59:05.0: Link Down!
[0.5 p39] 00:59:07.0: Link Down!
[1.1 p1] 00:97:01.0: Link Down!
[1.2 p9] 00:A7:01.0: Link Down!
[1.3 p17] 00:B7:01.0: Link Down!
[1.4 p25] 00:C7:01.0: Link Down!
[1.4 p27] 00:C7:03.0: Link Down!
[1.4 p29] 00:C7:05.0: Link Down!
[1.4 p31] 00:C7:07.0: Link Down!
[1.5 p33] 00:D7:01.0: Link Down!
[1.5 p35] 00:D7:03.0: Link Down!
[1.5 p37] 00:D7:05.0: Link Down!
[1.5 p39] 00:D7:07.0: Link Down!
[1.6 p41] 00:80:01.0: Link Down!
[1.6 p45] 00:80:05.0: Link Down!
IioLateInitialization for Socket = 0 Start..
[0] IioEarlyPostLinkTrainingPhase Start
[0 p0] DEVCAP2 7117D6 DEVCTL2 0010 -> 0009 -> 0009
CXL_IO_INIT_START
CXL_IO_INIT_END
FBLP_POST_TRAIN_INIT_START
FBLP_POST_TRAIN_INIT_END
[0.0] VT-d initialization, BAR=957FC000
[0.1] VT-d initialization, BAR=9F7FC000
[0.2] VT-d initialization, BAR=A93FC000
[0.3] VT-d initialization, BAR=B2FFC000
[0.4] VT-d initialization, BAR=BCBFC000
[0.5] VT-d initialization, BAR=C67FC000
[0.8] VT-d initialization, BAR=C6FFC000
[0.9] VT-d initialization, BAR=C77FC000
[0.10] VT-d initialization, BAR=C7FFC000
[0.11] VT-d initialization, BAR=C87FC000
IIO_PSF_INIT_START
IIO_PSF_INIT_END
[0] Hide devices; Phase = A
IioLateInitialization for Socket = 1 Start..
[1] IioEarlyPostLinkTrainingPhase Start
CXL_IO_INIT_START
CXL_IO_INIT_END
FBLP_POST_TRAIN_INIT_START
FBLP_POST_TRAIN_INIT_END
[1.1] VT-d initialization, BAR=D97FC000
[1.2] VT-d initialization, BAR=E17FC000
[1.3] VT-d initialization, BAR=E97FC000
[1.4] VT-d initialization, BAR=F17FC000
[1.5] VT-d initialization, BAR=F97FC000
[1.6] VT-d initialization, BAR=D13FC000
[1.8] VT-d initialization, BAR=F9FFC000
[1.9] VT-d initialization, BAR=FA7FC000
[1.10] VT-d initialization, BAR=FAFFC000
[1.11] VT-d initialization, BAR=FB7FC000
IIO_PSF_INIT_START
IIO_PSF_INIT_END
[1] Hide devices; Phase = A
[0.1 p1] 00:15:01.0: Device is not present!
[0.2 p9] 00:26:01.0: Device is not present!
[0.3 p17] 00:37:01.0: Device is not present!
[0.4 p25] 00:48:01.0: Device is not present!
[0.4 p27] 00:48:03.0: Device is not present!
[0.4 p29] 00:48:05.0: Device is not present!
[0.4 p31] 00:48:07.0: Device is not present!
[0.5 p33] 00:59:01.0: Device is not present!
[0.5 p35] 00:59:03.0: Device is not present!
[0.5 p37] 00:59:05.0: Device is not present!
[0.5 p39] 00:59:07.0: Device is not present!
[1.1 p1] 00:97:01.0: Device is not present!
[1.2 p9] 00:A7:01.0: Device is not present!
[1.3 p17] 00:B7:01.0: Device is not present!
[1.4 p25] 00:C7:01.0: Device is not present!
[1.4 p27] 00:C7:03.0: Device is not present!
[1.4 p29] 00:C7:05.0: Device is not present!
[1.4 p31] 00:C7:07.0: Device is not present!
[1.5 p33] 00:D7:01.0: Device is not present!
[1.5 p35] 00:D7:03.0: Device is not present!
[1.5 p37] 00:D7:05.0: Device is not present!
[1.5 p39] 00:D7:07.0: Device is not present!
[1.6 p41] 00:80:01.0: Device is not present!
[1.6 p45] 00:80:05.0: Device is not present!
[IIO](VMD) VMD init registered on endOfPei.
IIO Early Post Link Training Completed!
InstallEfiMemory()
GetMemoryMap: TsegBase: 78000000
GetMemoryMap: TsegRange: 08000000
RequiredMemSize for ACPI = 0xE44000 bytes
Found 0x00000000000A0000 bytes at 0x0000000000000000
Found 0x0000000000060000 bytes at 0x00000000000A0000
Found 0x0000000077700000 bytes at 0x0000000000100000
Found 0x0000000008000000 bytes at 0x0000000078000000
Found 0x0000000000800000 bytes at 0x0000000077800000
Save MemoryMap data into Hob
Building RESOURCE_SYSTEM_MEMORY Hob:
PeiMemoryBaseAddress = 0x629D0000, PeiMemoryLength = 0x14E30000
TOHM:0x0000004080000000
Reset Requested: 0
Pipe Exit starting...
S[01] Waiting on...
S[00] SBSP...
S[01] Waiting on...
Skt1 NEM Tear Down @ 769BB000
Pipe Exit completed! Reset Requested: 0
Enhanced Warning Log:
Checking for Reset Requests...
ResetRequired: 00
ConfigurePsmi () - Trace region size is 0 for all cache types; Socket: 0
ConfigurePsmi () - Trace region size is 0 for all cache types; Socket: 1
None
Continue with system BIOS POST ...
PROGRESS CODE: V03020003 I0
[HECI Transport-1 PEI] Send pkt: 80010020
00: 01
[HECI Transport-1 PEI] Got pkt: 800B0020
00: 81 01 01 14 00 88 00 01 - 00 00 00
[HECI Transport-1 PEI] Send pkt: 80300008
00: 00 00 05 00 1A 00 00 00 - 00 00 00 00 1C 00 00 00
10: 00 00 00 00 00 00 00 00 - 00 00 00 00 00 00 00 00
20: 00 00 00 00 00 00 00 00 - 00 00 00 00 00 00 00 00
[HECI Transport-1 PEI] Got pkt: 80300008
00: 00 00 05 00 1A 00 00 00 - 00 00 00 00 1C 00 00 00
10: 00 00 00 00 00 00 00 02 - 00 00 00 00 00 00 00 00
20: 00 00 00 00 00 00 00 00 - 00 00 00 00 00 00 00 00
Fail to Configure PSYS_CRIT
[HECI Transport-1 PEI] Send pkt: 80140007
00: F2 02 00 00 00 00 00 00 - 00 00 00 00 00 00 00 00
10: 0C 00 00 00
[HECI Transport-1 PEI] Got pkt: 80240007
00: F2 82 00 00 00 00 00 00 - 50 16 00 00 00 00 00 00
10: 0C 00 00 00 00 00 00 02 - 6D 32 FF FF FF FF 6E 11
20: 00 00 08 00
DDR PPR data hub created! Number of entries = 0
HBM PPR data hub created! Number of entries = 0
-> LIB data: Initialize
-> IBB Block Start, Status 0x80000007
IioVmdDisableForPchRpInit: DonePCH Series : EBG PCH
PCH Stepping : B0
[HECI Transport-1 PEI] Send pkt: 80010020
00: 01
[HECI Transport-1 PEI] Got pkt: 800B0020
00: 81 01 01 14 00 88 00 01 - 00 00 00
[HECI Transport-1 PEI] Send pkt: 80300008
00: 00 00 05 00 1A 00 00 00 - 00 00 00 00 1C 00 00 00
10: 00 00 00 00 00 00 00 00 - 00 00 00 00 00 00 00 00
20: 00 00 00 00 00 00 00 00 - 00 00 00 00 00 00 00 00
[HECI Transport-1 PEI] Got pkt: 80300008
00: 00 00 05 00 1A 00 00 00 - 00 00 00 00 1C 00 00 00
10: 00 00 00 00 00 00 00 02 - 00 00 00 00 00 00 00 00
20: 00 00 00 00 00 00 00 00 - 00 00 00 00 00 00 00 00
Fail to Configure PSYS_CRIT
[HECI Transport-1 PEI] Send pkt: 80010020
00: 01
[HECI Transport-1 PEI] Got pkt: 800B0020
00: 81 01 01 14 00 88 00 01 - 00 00 00
[HECI Transport-1 PEI] Send pkt: 80300008
00: 00 00 05 00 1A 00 00 00 - 00 00 00 00 1C 00 00 00
10: 00 00 00 00 00 00 00 00 - 00 00 00 00 00 00 00 00
20: 00 00 00 00 00 00 00 00 - 00 00 00 00 00 00 00 00
[HECI Transport-1 PEI] Got pkt: 80300008
00: 00 00 05 00 1A 00 00 00 - 00 00 00 00 1C 00 00 00
10: 00 00 00 00 00 00 00 02 - 00 00 00 00 00 00 00 00
20: 00 00 00 00 00 00 00 00 - 00 00 00 00 00 00 00 00
Fail to Configure PSYS_CRIT
[HECI Transport-1 PEI] Send pkt: 80140007
00: F2 02 00 00 00 00 00 00 - 00 00 00 00 00 00 00 00
10: 0C 00 00 00
[HECI Transport-1 PEI] Got pkt: 80240007
00: F2 82 00 00 00 00 00 00 - 50 16 00 00 00 00 00 00
10: 0C 00 00 00 00 00 00 02 - 6D 32 FF FF FF FF 6E 11
20: 00 00 08 00
PROGRESS CODE: V03020002 I0
PROGRESS CODE: V03020003 I0
PROGRESS CODE: V03020002 I0
PROGRESS CODE: V03020003 I0
PROGRESS CODE: V03020002 I0
PROGRESS CODE: V03020003 I0
PROGRESS CODE: V03020002 I0
PROGRESS CODE: V03020003 I0
-> LIB data: Already initialized
-> IBB Block End, Status 0x80000007
-> LIB data: Already initialized
-> OBB Block Start, Status 0x80000007
PROGRESS CODE: V03020002 I0
Common PPM policy update, PackageCState:3
PROGRESS CODE: V03020003 I0
PROGRESS CODE: V03020002 I0
PROGRESS CODE: V03020003 I0
PROGRESS CODE: V03020002 I0
PROGRESS CODE: V03020003 I0
PROGRESS CODE: V03020002 I0
PROGRESS CODE: V03020003 I0
PROGRESS CODE: V03020002 I0
PROGRESS CODE: V03020003 I0
PROGRESS CODE: V03020002 I0
[HECI Transport-1 PEI] Send pkt: 80280007
00: FF 03 00 00 02 00 00 00 - 00 00 18 6A 01 00 18 E7
10: 00 00 00 00 00 00 00 00 - 00 00 00 00 00 00 00 00
20: 00 00 00 00 00 00 00 00
[HECI Transport-1 PEI] Got pkt: 80040007
00: FF 83 00 00
PROGRESS CODE: V03020003 I0
PROGRESS CODE: V03020002 I0
PROGRESS CODE: V03020003 I0
PROGRESS CODE: V03020002 I0
PROGRESS CODE: V03020003 I0
PROGRESS CODE: V03020002 I0
PROGRESS CODE: V03020003 I0
PROGRESS CODE: V03020002 I0
!!! Invalid IIO LLC WAYS Bit Mask: 0x00000000
In CryptParallelhash
Return in function 2
ParallelHash256HashAll1(): Calculate code parallel hash failed!
Performance test = 10609696
In CryptParallelhash
Return in function 5
Dump data from 62CC1880, size: 0x3
62CC1880: 01 01 01 | ...
Dump data from 62CC1880, size: 0x3
62CC1880: 01 01 01 | ...
Return in function 6,retrunvalue=1
Dump data from 62ACF888, size: 0x40
62ACF888: CD F1 52 89 B5 4F 62 12 B4 BC 27 05 28 B4 95 26 | ..R..Ob...'.(..&
62ACF898: 00 6D D9 B5 4E 2B 6A DD 1E F6 90 0D DA 39 63 BB | .m..N+j......9c.
62ACF8A8: 33 A7 24 91 F2 36 96 9C A8 AF AE A2 9C 68 2D 47 | 3.$..6.......h-G
62ACF8B8: A3 93 C0 65 B3 8E 29 FA E6 51 A2 09 1C 83 31 10 | ...e..)..Q....1.
Accuracy test = 0
PROGRESS CODE: V03020003 I0
PROGRESS CODE: V03020002 I0
PROGRESS CODE: V03020003 I0
PROGRESS CODE: V03020002 I0
PROGRESS CODE: V03020003 I0
PROGRESS CODE: V03020002 I0
PROGRESS CODE: V03020003 I0
PROGRESS CODE: V03020002 I0
[MP_DISPATCH] MpDispatch4v0_CommonConstructor BEGIN
[MP_DISPATCH] MpDispatch4v0_CommonConstructor END (Success)
[FRU_MKTME] FruCpuFeatureMkTme3v0EntryPoint BEGIN
[FRU_MKTME] FruCpuFeatureMkTme3v0EntryPoint END (Success)
[FRU_SGX] FruCpuFeatureSgx3v0EntryPoint BEGIN
[FRU_SGX] FruCpuFeatureSgx3v0EntryPoint END (Success)
PROGRESS CODE: V03020003 I0
PROGRESS CODE: V03020002 I0
[APP_ADAPTER] AppAdapterMkTme3v0EntryPoint BEGIN
[APP_ADAPTER] AppAdapterMkTme3v0EntryPoint END (Success)
PROGRESS CODE: V03020003 I0
PROGRESS CODE: V03020002 I0
PROGRESS CODE: V03020003 I0
PROGRESS CODE: V03020002 I0
PROGRESS CODE: V03020003 I0
PROGRESS CODE: V03020002 I0
[SGX] SgxEarlyInit entry
IsSgxCapable = 1 Status = Success
IsSgxRequested = 0 Status = Success
IsTdxCapable = 0 Status = Success
IsTdxRequested = 0 Status = Success
IsTdxActivated = 0 Status = Success
SgxMpServicesData()
Thread 0 is BSP of Socket 0
Thread 80 is BSP of Socket 1
System BSP Thread = 000
System BSP Package = 000
[SGX_VAR_MANIFEST] HobSize: 8512, Hash:
[12] [56] [ED] [9C] [D5] [9D] [C8] [1A] [E0] [44] [25] [30] [1B] [26] [71] [76] [DB] [8B] [BF] [5C] [29] [96] [F3] [A2] [58] [29] [7F] [97] [42] [AF] [E0] [C0]
[SGX-DEBUG] GetVariableHelper: VariableName: (SgxRegistrationState), VendorGuid: (2C65F1A3), DataSize: (64), Data: (F)
GetVariable - SgxRegistrationState not found, continue
UefiFwRegistrationState not found in NVRAM!
GetRegistrationVariablesFromNvram Enter
[SGX-DEBUG] GetVariableHelper: VariableName: (SgxRegistrationConfiguration), VendorGuid: (18B3BC81), DataSize: (1520), Data: (F)
GetVariable - SgxRegistrationConfiguration not found, continue
[SGX-DEBUG] GetVariableHelper: VariableName: (SgxUefiRegistrationConfiguration), VendorGuid: (8D4CA9E8), DataSize: (1520), Data: (F)
GetVariable - SgxUefiRegistrationConfiguration not found, continue
[SGX-DEBUG]: Get SgxRegistrationStatus
[SGX-DEBUG] GetVariableHelper: VariableName: (SgxRegistrationStatus), VendorGuid: (F236C5DC), DataSize: (7), Data: (F)
GetVariable - SgxRegistrationStatus not found, continue
[SGX-DEBUG]: Get SgxUefiRegistrationStatus
[SGX-DEBUG] GetVariableHelper: VariableName: (SgxUefiRegistrationStatus), VendorGuid: (CF24D5E9), DataSize: (7), Data: (F)
GetVariable - SgxUefiRegistrationStatus not found, continue
[SGX-DEBUG] Early PrintByteArrays SgxRegistrationStatus:
[00] [00] [00] [00] [00] [00] [00]
[SGX-DEBUG] GetVariableHelper: VariableName: (SgxRegistrationServerResponse), VendorGuid: (89589C7B), DataSize: (10060), Data: (F)
GetVariable - SgxRegistrationServerResponse not found, continue
[SGX-DEBUG] GetVariableHelper: VariableName: (SgxUefiRegistrationServerResponse), VendorGuid: (35D93155), DataSize: (10060), Data: (F)
GetVariable - SgxUefiRegistrationServerResponse not found, continue
RegistrationVariables presence:
RegistrationConfig = 0
RegistrationStatus = 0
RegistrationResponse = 0
[SGX] RestoreKeyBlobsInternalSgxInitDataHobFieldsFromNvram BEGIN
[SGX] RestoreUefiFwKeyBlobsVariable BEGIN
[SGX-DEBUG] GetVariableHelper: VariableName: (SgxKeyBlobs), VendorGuid: (60F76511), DataSize: (14720), Data: (F)
GetVariable - SgxKeyBlobs not found, continue
Error: Unable to get SgxUefiFwKeyBlobs
[SGX] RestoreUefiFwKeyBlobsVariable END
KeyBlobs were NOT restored from SgxUefiFwKeyBlobs!
KeyBlobs were NOT restored from SgxRegistrationPackageInfo contents due to PackageInfoInBandAccess = FALSE!
KeyBlobsExistInNvram = (FALSE)
[SGX] RestoreKeyBlobsInternalSgxInitDataHobFieldsFromNvram END
KeyBlobs were not found in NVRAM. Continue boot...
[SGX-KEYBLOB-PEI-REST] KeyBlob for socket no 0
Present: FALSE
TimeStamp: 0-0-0, 0:0:0:0, Pad1: 0, Pad2: 0, TimeZone: 0, Daylight: 0
KeyBlob:
Header:
SGX UUID:
[00] [00] [00] [00] [00] [00] [00] [00] [00] [00] [00] [00] [00] [00] [00] [00]
CpuSvn:
[00]
Security Properties:
[00] [00] [00] [00]
Prid:
[00] [00] [00] [00] [00] [00] [00] [00] [00] [00] [00] [00] [00] [00] [00] [00]
PlatformEpoch:
[00] [00] [00] [00] [00] [00] [00] [00] [00] [00] [00] [00] [00] [00] [00] [00] [00] [00] [00] [00] [00] [00] [00] [00] [00] [00] [00] [00] [00] [00] [00] [00]
RsakHash:
[00] [00] [00] [00] [00] [00] [00] [00] [00] [00] [00] [00] [00] [00] [00] [00] [00] [00] [00] [00] [00] [00] [00] [00] [00] [00] [00] [00] [00] [00] [00] [00]
RsakHash:
[00] [00] [00] [00] [00] [00] [00] [00] [00] [00] [00] [00] [00] [00] [00] [00] [00] [00] [00] [00] [00] [00] [00] [00] [00] [00] [00] [00] [00] [00] [00] [00]
Pfk1:
[00] [00] [00] [00] [00] [00] [00] [00] [00] [00] [00] [00] [00] [00] [00] [00]
PprResetKey:
[00] [00] [00] [00]
[00] [00] [00] [00]
[00] [00] [00] [00]
[00] [00] [00] [00]
[00] [00] [00] [00]
[00] [00] [00] [00]
[00] [00] [00] [00]
[00] [00] [00] [00]
[00] [00] [00] [00]
[00] [00] [00] [00]
[00] [00] [00] [00]
[00] [00] [00] [00]
[00] [00] [00] [00]
[00] [00] [00] [00]
[00] [00] [00] [00]
[00] [00] [00] [00]
[00] [00] [00] [00]
[00] [00] [00] [00]
[00] [00] [00] [00]
[00] [00] [00] [00]
[00] [00] [00] [00]
[00] [00] [00] [00]
[00] [00] [00] [00]
[00] [00] [00] [00]
[00] [00] [00] [00]
[00] [00] [00] [00]
[00] [00] [00] [00]
[00] [00] [00] [00]
[00] [00] [00] [00]
[00] [00] [00] [00]
[00] [00] [00] [00]
[00] [00] [00] [00]
LastUsedSvn:
[00]
Reserved2:
[00] [00] [00] [00] [00] [00] [00] [00] [00] [00] [00] [00] [00] [00] [00]
TargetPrid:
[00] [00] [00] [00] [00] [00] [00] [00] [00] [00] [00] [00] [00] [00] [00] [00]
PrimaryComms:
[00] [00] [00] [00] [00] [00] [00] [00] [00] [00] [00] [00] [00] [00] [00] [00]
Iv:
[00] [00] [00] [00] [00] [00] [00] [00] [00] [00] [00] [00]
[00] [00] [00] [00] [00] [00] [00] [00] [00] [00] [00] [00]
[00] [00] [00] [00] [00] [00] [00] [00] [00] [00] [00] [00]
[00] [00] [00] [00] [00] [00] [00] [00] [00] [00] [00] [00]
[00] [00] [00] [00] [00] [00] [00] [00] [00] [00] [00] [00]
[00] [00] [00] [00] [00] [00] [00] [00] [00] [00] [00] [00]
[00] [00] [00] [00] [00] [00] [00] [00] [00] [00] [00] [00]
[00] [00] [00] [00] [00] [00] [00] [00] [00] [00] [00] [00]
[00] [00] [00] [00] [00] [00] [00] [00] [00] [00] [00] [00]
[00] [00] [00] [00] [00] [00] [00] [00] [00] [00] [00] [00]
[00] [00] [00] [00] [00] [00] [00] [00] [00] [00] [00] [00]
[00] [00] [00] [00] [00] [00] [00] [00] [00] [00] [00] [00]
[00] [00] [00] [00] [00] [00] [00] [00] [00] [00] [00] [00]
[00] [00] [00] [00] [00] [00] [00] [00] [00] [00] [00] [00]
[00] [00] [00] [00] [00] [00] [00] [00] [00] [00] [00] [00]
[00] [00] [00] [00] [00] [00] [00] [00] [00] [00] [00] [00]
[00] [00] [00] [00] [00] [00] [00] [00] [00] [00] [00] [00]
[00] [00] [00] [00] [00] [00] [00] [00] [00] [00] [00] [00]
[00] [00] [00] [00] [00] [00] [00] [00] [00] [00] [00] [00]
[00] [00] [00] [00] [00] [00] [00] [00] [00] [00] [00] [00]
[00] [00] [00] [00] [00] [00] [00] [00] [00] [00] [00] [00]
[00] [00] [00] [00] [00] [00] [00] [00] [00] [00] [00] [00]
[00] [00] [00] [00] [00] [00] [00] [00] [00] [00] [00] [00]
[00] [00] [00] [00] [00] [00] [00] [00] [00] [00] [00] [00]
[00] [00] [00] [00] [00] [00] [00] [00] [00] [00] [00] [00]
[00] [00] [00] [00] [00] [00] [00] [00] [00] [00] [00] [00]
[00] [00] [00] [00] [00] [00] [00] [00] [00] [00] [00] [00]
[00] [00] [00] [00] [00] [00] [00] [00] [00] [00] [00] [00]
[00] [00] [00] [00] [00] [00] [00] [00] [00] [00] [00] [00]
[00] [00] [00] [00] [00] [00] [00] [00] [00] [00] [00] [00]
[00] [00] [00] [00] [00] [00] [00] [00] [00] [00] [00] [00]
[00] [00] [00] [00] [00] [00] [00] [00] [00] [00] [00] [00]
Mac:
[00] [00] [00] [00] [00] [00] [00] [00] [00] [00] [00] [00] [00] [00] [00] [00]
[00] [00] [00] [00] [00] [00] [00] [00] [00] [00] [00] [00] [00] [00] [00] [00]
[00] [00] [00] [00] [00] [00] [00] [00] [00] [00] [00] [00] [00] [00] [00] [00]
[00] [00] [00] [00] [00] [00] [00] [00] [00] [00] [00] [00] [00] [00] [00] [00]
[00] [00] [00] [00] [00] [00] [00] [00] [00] [00] [00] [00] [00] [00] [00] [00]
[00] [00] [00] [00] [00] [00] [00] [00] [00] [00] [00] [00] [00] [00] [00] [00]
[00] [00] [00] [00] [00] [00] [00] [00] [00] [00] [00] [00] [00] [00] [00] [00]
[00] [00] [00] [00] [00] [00] [00] [00] [00] [00] [00] [00] [00] [00] [00] [00]
[00] [00] [00] [00] [00] [00] [00] [00] [00] [00] [00] [00] [00] [00] [00] [00]
[00] [00] [00] [00] [00] [00] [00] [00] [00] [00] [00] [00] [00] [00] [00] [00]
[00] [00] [00] [00] [00] [00] [00] [00] [00] [00] [00] [00] [00] [00] [00] [00]
[00] [00] [00] [00] [00] [00] [00] [00] [00] [00] [00] [00] [00] [00] [00] [00]
[00] [00] [00] [00] [00] [00] [00] [00] [00] [00] [00] [00] [00] [00] [00] [00]
[00] [00] [00] [00] [00] [00] [00] [00] [00] [00] [00] [00] [00] [00] [00] [00]
[00] [00] [00] [00] [00] [00] [00] [00] [00] [00] [00] [00] [00] [00] [00] [00]
[00] [00] [00] [00] [00] [00] [00] [00] [00] [00] [00] [00] [00] [00] [00] [00]
[00] [00] [00] [00] [00] [00] [00] [00] [00] [00] [00] [00] [00] [00] [00] [00]
[00] [00] [00] [00] [00] [00] [00] [00] [00] [00] [00] [00] [00] [00] [00] [00]
[00] [00] [00] [00] [00] [00] [00] [00] [00] [00] [00] [00] [00] [00] [00] [00]
[00] [00] [00] [00] [00] [00] [00] [00] [00] [00] [00] [00] [00] [00] [00] [00]
[00] [00] [00] [00] [00] [00] [00] [00] [00] [00] [00] [00] [00] [00] [00] [00]
[00] [00] [00] [00] [00] [00] [00] [00] [00] [00] [00] [00] [00] [00] [00] [00]
[00] [00] [00] [00] [00] [00] [00] [00] [00] [00] [00] [00] [00] [00] [00] [00]
[00] [00] [00] [00] [00] [00] [00] [00] [00] [00] [00] [00] [00] [00] [00] [00]
[00] [00] [00] [00] [00] [00] [00] [00] [00] [00] [00] [00] [00] [00] [00] [00]
[00] [00] [00] [00] [00] [00] [00] [00] [00] [00] [00] [00] [00] [00] [00] [00]
[00] [00] [00] [00] [00] [00] [00] [00] [00] [00] [00] [00] [00] [00] [00] [00]
[00] [00] [00] [00] [00] [00] [00] [00] [00] [00] [00] [00] [00] [00] [00] [00]
[00] [00] [00] [00] [00] [00] [00] [00] [00] [00] [00] [00] [00] [00] [00] [00]
[00] [00] [00] [00] [00] [00] [00] [00] [00] [00] [00] [00] [00] [00] [00] [00]
[00] [00] [00] [00] [00] [00] [00] [00] [00] [00] [00] [00] [00] [00] [00] [00]
[00] [00] [00] [00] [00] [00] [00] [00] [00] [00] [00] [00] [00] [00] [00] [00]
IvComm:
[00] [00] [00] [00] [00] [00] [00] [00] [00] [00] [00] [00]
MacComm:
[00] [00] [00] [00] [00] [00] [00] [00] [00] [00] [00] [00] [00] [00] [00] [00]
[SGX-KEYBLOB-PEI-REST] KeyBlob for socket no 1
Present: FALSE
TimeStamp: 0-0-0, 0:0:0:0, Pad1: 0, Pad2: 0, TimeZone: 0, Daylight: 0
KeyBlob:
Header:
SGX UUID:
[00] [00] [00] [00] [00] [00] [00] [00] [00] [00] [00] [00] [00] [00] [00] [00]
CpuSvn:
[00]
Security Properties:
[00] [00] [00] [00]
Prid:
[00] [00] [00] [00] [00] [00] [00] [00] [00] [00] [00] [00] [00] [00] [00] [00]
PlatformEpoch:
[00] [00] [00] [00] [00] [00] [00] [00] [00] [00] [00] [00] [00] [00] [00] [00] [00] [00] [00] [00] [00] [00] [00] [00] [00] [00] [00] [00] [00] [00] [00] [00]
RsakHash:
[00] [00] [00] [00] [00] [00] [00] [00] [00] [00] [00] [00] [00] [00] [00] [00] [00] [00] [00] [00] [00] [00] [00] [00] [00] [00] [00] [00] [00] [00] [00] [00]
RsakHash:
[00] [00] [00] [00] [00] [00] [00] [00] [00] [00] [00] [00] [00] [00] [00] [00] [00] [00] [00] [00] [00] [00] [00] [00] [00] [00] [00] [00] [00] [00] [00] [00]
Pfk1:
[00] [00] [00] [00] [00] [00] [00] [00] [00] [00] [00] [00] [00] [00] [00] [00]
PprResetKey:
[00] [00] [00] [00]
[00] [00] [00] [00]
[00] [00] [00] [00]
[00] [00] [00] [00]
[00] [00] [00] [00]
[00] [00] [00] [00]
[00] [00] [00] [00]
[00] [00] [00] [00]
[00] [00] [00] [00]
[00] [00] [00] [00]
[00] [00] [00] [00]
[00] [00] [00] [00]
[00] [00] [00] [00]
[00] [00] [00] [00]
[00] [00] [00] [00]
[00] [00] [00] [00]
[00] [00] [00] [00]
[00] [00] [00] [00]
[00] [00] [00] [00]
[00] [00] [00] [00]
[00] [00] [00] [00]
[00] [00] [00] [00]
[00] [00] [00] [00]
[00] [00] [00] [00]
[00] [00] [00] [00]
[00] [00] [00] [00]
[00] [00] [00] [00]
[00] [00] [00] [00]
[00] [00] [00] [00]
[00] [00] [00] [00]
[00] [00] [00] [00]
[00] [00] [00] [00]
LastUsedSvn:
[00]
Reserved2:
[00] [00] [00] [00] [00] [00] [00] [00] [00] [00] [00] [00] [00] [00] [00]
TargetPrid:
[00] [00] [00] [00] [00] [00] [00] [00] [00] [00] [00] [00] [00] [00] [00] [00]
PrimaryComms:
[00] [00] [00] [00] [00] [00] [00] [00] [00] [00] [00] [00] [00] [00] [00] [00]
Iv:
[00] [00] [00] [00] [00] [00] [00] [00] [00] [00] [00] [00]
[00] [00] [00] [00] [00] [00] [00] [00] [00] [00] [00] [00]
[00] [00] [00] [00] [00] [00] [00] [00] [00] [00] [00] [00]
[00] [00] [00] [00] [00] [00] [00] [00] [00] [00] [00] [00]
[00] [00] [00] [00] [00] [00] [00] [00] [00] [00] [00] [00]
[00] [00] [00] [00] [00] [00] [00] [00] [00] [00] [00] [00]
[00] [00] [00] [00] [00] [00] [00] [00] [00] [00] [00] [00]
[00] [00] [00] [00] [00] [00] [00] [00] [00] [00] [00] [00]
[00] [00] [00] [00] [00] [00] [00] [00] [00] [00] [00] [00]
[00] [00] [00] [00] [00] [00] [00] [00] [00] [00] [00] [00]
[00] [00] [00] [00] [00] [00] [00] [00] [00] [00] [00] [00]
[00] [00] [00] [00] [00] [00] [00] [00] [00] [00] [00] [00]
[00] [00] [00] [00] [00] [00] [00] [00] [00] [00] [00] [00]
[00] [00] [00] [00] [00] [00] [00] [00] [00] [00] [00] [00]
[00] [00] [00] [00] [00] [00] [00] [00] [00] [00] [00] [00]
[00] [00] [00] [00] [00] [00] [00] [00] [00] [00] [00] [00]
[00] [00] [00] [00] [00] [00] [00] [00] [00] [00] [00] [00]
[00] [00] [00] [00] [00] [00] [00] [00] [00] [00] [00] [00]
[00] [00] [00] [00] [00] [00] [00] [00] [00] [00] [00] [00]
[00] [00] [00] [00] [00] [00] [00] [00] [00] [00] [00] [00]
[00] [00] [00] [00] [00] [00] [00] [00] [00] [00] [00] [00]
[00] [00] [00] [00] [00] [00] [00] [00] [00] [00] [00] [00]
[00] [00] [00] [00] [00] [00] [00] [00] [00] [00] [00] [00]
[00] [00] [00] [00] [00] [00] [00] [00] [00] [00] [00] [00]
[00] [00] [00] [00] [00] [00] [00] [00] [00] [00] [00] [00]
[00] [00] [00] [00] [00] [00] [00] [00] [00] [00] [00] [00]
[00] [00] [00] [00] [00] [00] [00] [00] [00] [00] [00] [00]
[00] [00] [00] [00] [00] [00] [00] [00] [00] [00] [00] [00]
[00] [00] [00] [00] [00] [00] [00] [00] [00] [00] [00] [00]
[00] [00] [00] [00] [00] [00] [00] [00] [00] [00] [00] [00]
[00] [00] [00] [00] [00] [00] [00] [00] [00] [00] [00] [00]
[00] [00] [00] [00] [00] [00] [00] [00] [00] [00] [00] [00]
Mac:
[00] [00] [00] [00] [00] [00] [00] [00] [00] [00] [00] [00] [00] [00] [00] [00]
[00] [00] [00] [00] [00] [00] [00] [00] [00] [00] [00] [00] [00] [00] [00] [00]
[00] [00] [00] [00] [00] [00] [00] [00] [00] [00] [00] [00] [00] [00] [00] [00]
[00] [00] [00] [00] [00] [00] [00] [00] [00] [00] [00] [00] [00] [00] [00] [00]
[00] [00] [00] [00] [00] [00] [00] [00] [00] [00] [00] [00] [00] [00] [00] [00]
[00] [00] [00] [00] [00] [00] [00] [00] [00] [00] [00] [00] [00] [00] [00] [00]
[00] [00] [00] [00] [00] [00] [00] [00] [00] [00] [00] [00] [00] [00] [00] [00]
[00] [00] [00] [00] [00] [00] [00] [00] [00] [00] [00] [00] [00] [00] [00] [00]
[00] [00] [00] [00] [00] [00] [00] [00] [00] [00] [00] [00] [00] [00] [00] [00]
[00] [00] [00] [00] [00] [00] [00] [00] [00] [00] [00] [00] [00] [00] [00] [00]
[00] [00] [00] [00] [00] [00] [00] [00] [00] [00] [00] [00] [00] [00] [00] [00]
[00] [00] [00] [00] [00] [00] [00] [00] [00] [00] [00] [00] [00] [00] [00] [00]
[00] [00] [00] [00] [00] [00] [00] [00] [00] [00] [00] [00] [00] [00] [00] [00]
[00] [00] [00] [00] [00] [00] [00] [00] [00] [00] [00] [00] [00] [00] [00] [00]
[00] [00] [00] [00] [00] [00] [00] [00] [00] [00] [00] [00] [00] [00] [00] [00]
[00] [00] [00] [00] [00] [00] [00] [00] [00] [00] [00] [00] [00] [00] [00] [00]
[00] [00] [00] [00] [00] [00] [00] [00] [00] [00] [00] [00] [00] [00] [00] [00]
[00] [00] [00] [00] [00] [00] [00] [00] [00] [00] [00] [00] [00] [00] [00] [00]
[00] [00] [00] [00] [00] [00] [00] [00] [00] [00] [00] [00] [00] [00] [00] [00]
[00] [00] [00] [00] [00] [00] [00] [00] [00] [00] [00] [00] [00] [00] [00] [00]
[00] [00] [00] [00] [00] [00] [00] [00] [00] [00] [00] [00] [00] [00] [00] [00]
[00] [00] [00] [00] [00] [00] [00] [00] [00] [00] [00] [00] [00] [00] [00] [00]
[00] [00] [00] [00] [00] [00] [00] [00] [00] [00] [00] [00] [00] [00] [00] [00]
[00] [00] [00] [00] [00] [00] [00] [00] [00] [00] [00] [00] [00] [00] [00] [00]
[00] [00] [00] [00] [00] [00] [00] [00] [00] [00] [00] [00] [00] [00] [00] [00]
[00] [00] [00] [00] [00] [00] [00] [00] [00] [00] [00] [00] [00] [00] [00] [00]
[00] [00] [00] [00] [00] [00] [00] [00] [00] [00] [00] [00] [00] [00] [00] [00]
[00] [00] [00] [00] [00] [00] [00] [00] [00] [00] [00] [00] [00] [00] [00] [00]
[00] [00] [00] [00] [00] [00] [00] [00] [00] [00] [00] [00] [00] [00] [00] [00]
[00] [00] [00] [00] [00] [00] [00] [00] [00] [00] [00] [00] [00] [00] [00] [00]
[00] [00] [00] [00] [00] [00] [00] [00] [00] [00] [00] [00] [00] [00] [00] [00]
[00] [00] [00] [00] [00] [00] [00] [00] [00] [00] [00] [00] [00] [00] [00] [00]
IvComm:
[00] [00] [00] [00] [00] [00] [00] [00] [00] [00] [00] [00]
MacComm:
[00] [00] [00] [00] [00] [00] [00] [00] [00] [00] [00] [00] [00] [00] [00] [00]
[SGX-KEYBLOB-PEI-REST] KeyBlob for socket no 2
Present: FALSE
TimeStamp: 0-0-0, 0:0:0:0, Pad1: 0, Pad2: 0, TimeZone: 0, Daylight: 0
KeyBlob:
Header:
SGX UUID:
[00] [00] [00] [00] [00] [00] [00] [00] [00] [00] [00] [00] [00] [00] [00] [00]
CpuSvn:
[00]
Security Properties:
[00] [00] [00] [00]
Prid:
[00] [00] [00] [00] [00] [00] [00] [00] [00] [00] [00] [00] [00] [00] [00] [00]
PlatformEpoch:
[00] [00] [00] [00] [00] [00] [00] [00] [00] [00] [00] [00] [00] [00] [00] [00] [00] [00] [00] [00] [00] [00] [00] [00] [00] [00] [00] [00] [00] [00] [00] [00]
RsakHash:
[00] [00] [00] [00] [00] [00] [00] [00] [00] [00] [00] [00] [00] [00] [00] [00] [00] [00] [00] [00] [00] [00] [00] [00] [00] [00] [00] [00] [00] [00] [00] [00]
RsakHash:
[00] [00] [00] [00] [00] [00] [00] [00] [00] [00] [00] [00] [00] [00] [00] [00] [00] [00] [00] [00] [00] [00] [00] [00] [00] [00] [00] [00] [00] [00] [00] [00]
Pfk1:
[00] [00] [00] [00] [00] [00] [00] [00] [00] [00] [00] [00] [00] [00] [00] [00]
PprResetKey:
[00] [00] [00] [00]
[00] [00] [00] [00]
[00] [00] [00] [00]
[00] [00] [00] [00]
[00] [00] [00] [00]
[00] [00] [00] [00]
[00] [00] [00] [00]
[00] [00] [00] [00]
[00] [00] [00] [00]
[00] [00] [00] [00]
[00] [00] [00] [00]
[00] [00] [00] [00]
[00] [00] [00] [00]
[00] [00] [00] [00]
[00] [00] [00] [00]
[00] [00] [00] [00]
[00] [00] [00] [00]
[00] [00] [00] [00]
[00] [00] [00] [00]
[00] [00] [00] [00]
[00] [00] [00] [00]
[00] [00] [00] [00]
[00] [00] [00] [00]
[00] [00] [00] [00]
[00] [00] [00] [00]
[00] [00] [00] [00]
[00] [00] [00] [00]
[00] [00] [00] [00]
[00] [00] [00] [00]
[00] [00] [00] [00]
[00] [00] [00] [00]
[00] [00] [00] [00]
LastUsedSvn:
[00]
Reserved2:
[00] [00] [00] [00] [00] [00] [00] [00] [00] [00] [00] [00] [00] [00] [00]
TargetPrid:
[00] [00] [00] [00] [00] [00] [00] [00] [00] [00] [00] [00] [00] [00] [00] [00]
PrimaryComms:
[00] [00] [00] [00] [00] [00] [00] [00] [00] [00] [00] [00] [00] [00] [00] [00]
Iv:
[00] [00] [00] [00] [00] [00] [00] [00] [00] [00] [00] [00]
[00] [00] [00] [00] [00] [00] [00] [00] [00] [00] [00] [00]
[00] [00] [00] [00] [00] [00] [00] [00] [00] [00] [00] [00]
[00] [00] [00] [00] [00] [00] [00] [00] [00] [00] [00] [00]
[00] [00] [00] [00] [00] [00] [00] [00] [00] [00] [00] [00]
[00] [00] [00] [00] [00] [00] [00] [00] [00] [00] [00] [00]
[00] [00] [00] [00] [00] [00] [00] [00] [00] [00] [00] [00]
[00] [00] [00] [00] [00] [00] [00] [00] [00] [00] [00] [00]
[00] [00] [00] [00] [00] [00] [00] [00] [00] [00] [00] [00]
[00] [00] [00] [00] [00] [00] [00] [00] [00] [00] [00] [00]
[00] [00] [00] [00] [00] [00] [00] [00] [00] [00] [00] [00]
[00] [00] [00] [00] [00] [00] [00] [00] [00] [00] [00] [00]
[00] [00] [00] [00] [00] [00] [00] [00] [00] [00] [00] [00]
[00] [00] [00] [00] [00] [00] [00] [00] [00] [00] [00] [00]
[00] [00] [00] [00] [00] [00] [00] [00] [00] [00] [00] [00]
[00] [00] [00] [00] [00] [00] [00] [00] [00] [00] [00] [00]
[00] [00] [00] [00] [00] [00] [00] [00] [00] [00] [00] [00]
[00] [00] [00] [00] [00] [00] [00] [00] [00] [00] [00] [00]
[00] [00] [00] [00] [00] [00] [00] [00] [00] [00] [00] [00]
[00] [00] [00] [00] [00] [00] [00] [00] [00] [00] [00] [00]
[00] [00] [00] [00] [00] [00] [00] [00] [00] [00] [00] [00]
[00] [00] [00] [00] [00] [00] [00] [00] [00] [00] [00] [00]
[00] [00] [00] [00] [00] [00] [00] [00] [00] [00] [00] [00]
[00] [00] [00] [00] [00] [00] [00] [00] [00] [00] [00] [00]
[00] [00] [00] [00] [00] [00] [00] [00] [00] [00] [00] [00]
[00] [00] [00] [00] [00] [00] [00] [00] [00] [00] [00] [00]
[00] [00] [00] [00] [00] [00] [00] [00] [00] [00] [00] [00]
[00] [00] [00] [00] [00] [00] [00] [00] [00] [00] [00] [00]
[00] [00] [00] [00] [00] [00] [00] [00] [00] [00] [00] [00]
[00] [00] [00] [00] [00] [00] [00] [00] [00] [00] [00] [00]
[00] [00] [00] [00] [00] [00] [00] [00] [00] [00] [00] [00]
[00] [00] [00] [00] [00] [00] [00] [00] [00] [00] [00] [00]
Mac:
[00] [00] [00] [00] [00] [00] [00] [00] [00] [00] [00] [00] [00] [00] [00] [00]
[00] [00] [00] [00] [00] [00] [00] [00] [00] [00] [00] [00] [00] [00] [00] [00]
[00] [00] [00] [00] [00] [00] [00] [00] [00] [00] [00] [00] [00] [00] [00] [00]
[00] [00] [00] [00] [00] [00] [00] [00] [00] [00] [00] [00] [00] [00] [00] [00]
[00] [00] [00] [00] [00] [00] [00] [00] [00] [00] [00] [00] [00] [00] [00] [00]
[00] [00] [00] [00] [00] [00] [00] [00] [00] [00] [00] [00] [00] [00] [00] [00]
[00] [00] [00] [00] [00] [00] [00] [00] [00] [00] [00] [00] [00] [00] [00] [00]
[00] [00] [00] [00] [00] [00] [00] [00] [00] [00] [00] [00] [00] [00] [00] [00]
[00] [00] [00] [00] [00] [00] [00] [00] [00] [00] [00] [00] [00] [00] [00] [00]
[00] [00] [00] [00] [00] [00] [00] [00] [00] [00] [00] [00] [00] [00] [00] [00]
[00] [00] [00] [00] [00] [00] [00] [00] [00] [00] [00] [00] [00] [00] [00] [00]
[00] [00] [00] [00] [00] [00] [00] [00] [00] [00] [00] [00] [00] [00] [00] [00]
[00] [00] [00] [00] [00] [00] [00] [00] [00] [00] [00] [00] [00] [00] [00] [00]
[00] [00] [00] [00] [00] [00] [00] [00] [00] [00] [00] [00] [00] [00] [00] [00]
[00] [00] [00] [00] [00] [00] [00] [00] [00] [00] [00] [00] [00] [00] [00] [00]
[00] [00] [00] [00] [00] [00] [00] [00] [00] [00] [00] [00] [00] [00] [00] [00]
[00] [00] [00] [00] [00] [00] [00] [00] [00] [00] [00] [00] [00] [00] [00] [00]
[00] [00] [00] [00] [00] [00] [00] [00] [00] [00] [00] [00] [00] [00] [00] [00]
[00] [00] [00] [00] [00] [00] [00] [00] [00] [00] [00] [00] [00] [00] [00] [00]
[00] [00] [00] [00] [00] [00] [00] [00] [00] [00] [00] [00] [00] [00] [00] [00]
[00] [00] [00] [00] [00] [00] [00] [00] [00] [00] [00] [00] [00] [00] [00] [00]
[00] [00] [00] [00] [00] [00] [00] [00] [00] [00] [00] [00] [00] [00] [00] [00]
[00] [00] [00] [00] [00] [00] [00] [00] [00] [00] [00] [00] [00] [00] [00] [00]
[00] [00] [00] [00] [00] [00] [00] [00] [00] [00] [00] [00] [00] [00] [00] [00]
[00] [00] [00] [00] [00] [00] [00] [00] [00] [00] [00] [00] [00] [00] [00] [00]
[00] [00] [00] [00] [00] [00] [00] [00] [00] [00] [00] [00] [00] [00] [00] [00]
[00] [00] [00] [00] [00] [00] [00] [00] [00] [00] [00] [00] [00] [00] [00] [00]
[00] [00] [00] [00] [00] [00] [00] [00] [00] [00] [00] [00] [00] [00] [00] [00]
[00] [00] [00] [00] [00] [00] [00] [00] [00] [00] [00] [00] [00] [00] [00] [00]
[00] [00] [00] [00] [00] [00] [00] [00] [00] [00] [00] [00] [00] [00] [00] [00]
[00] [00] [00] [00] [00] [00] [00] [00] [00] [00] [00] [00] [00] [00] [00] [00]
[00] [00] [00] [00] [00] [00] [00] [00] [00] [00] [00] [00] [00] [00] [00] [00]
IvComm:
[00] [00] [00] [00] [00] [00] [00] [00] [00] [00] [00] [00]
MacComm:
[00] [00] [00] [00] [00] [00] [00] [00] [00] [00] [00] [00] [00] [00] [00] [00]
[SGX-KEYBLOB-PEI-REST] KeyBlob for socket no 3
Present: FALSE
TimeStamp: 0-0-0, 0:0:0:0, Pad1: 0, Pad2: 0, TimeZone: 0, Daylight: 0
KeyBlob:
Header:
SGX UUID:
[00] [00] [00] [00] [00] [00] [00] [00] [00] [00] [00] [00] [00] [00] [00] [00]
CpuSvn:
[00]
Security Properties:
[00] [00] [00] [00]
Prid:
[00] [00] [00] [00] [00] [00] [00] [00] [00] [00] [00] [00] [00] [00] [00] [00]
PlatformEpoch:
[00] [00] [00] [00] [00] [00] [00] [00] [00] [00] [00] [00] [00] [00] [00] [00] [00] [00] [00] [00] [00] [00] [00] [00] [00] [00] [00] [00] [00] [00] [00] [00]
RsakHash:
[00] [00] [00] [00] [00] [00] [00] [00] [00] [00] [00] [00] [00] [00] [00] [00] [00] [00] [00] [00] [00] [00] [00] [00] [00] [00] [00] [00] [00] [00] [00] [00]
RsakHash:
[00] [00] [00] [00] [00] [00] [00] [00] [00] [00] [00] [00] [00] [00] [00] [00] [00] [00] [00] [00] [00] [00] [00] [00] [00] [00] [00] [00] [00] [00] [00] [00]
Pfk1:
[00] [00] [00] [00] [00] [00] [00] [00] [00] [00] [00] [00] [00] [00] [00] [00]
PprResetKey:
[00] [00] [00] [00]
[00] [00] [00] [00]
[00] [00] [00] [00]
[00] [00] [00] [00]
[00] [00] [00] [00]
[00] [00] [00] [00]
[00] [00] [00] [00]
[00] [00] [00] [00]
[00] [00] [00] [00]
[00] [00] [00] [00]
[00] [00] [00] [00]
[00] [00] [00] [00]
[00] [00] [00] [00]
[00] [00] [00] [00]
[00] [00] [00] [00]
[00] [00] [00] [00]
[00] [00] [00] [00]
[00] [00] [00] [00]
[00] [00] [00] [00]
[00] [00] [00] [00]
[00] [00] [00] [00]
[00] [00] [00] [00]
[00] [00] [00] [00]
[00] [00] [00] [00]
[00] [00] [00] [00]
[00] [00] [00] [00]
[00] [00] [00] [00]
[00] [00] [00] [00]
[00] [00] [00] [00]
[00] [00] [00] [00]
[00] [00] [00] [00]
[00] [00] [00] [00]
LastUsedSvn:
[00]
Reserved2:
[00] [00] [00] [00] [00] [00] [00] [00] [00] [00] [00] [00] [00] [00] [00]
TargetPrid:
[00] [00] [00] [00] [00] [00] [00] [00] [00] [00] [00] [00] [00] [00] [00] [00]
PrimaryComms:
[00] [00] [00] [00] [00] [00] [00] [00] [00] [00] [00] [00] [00] [00] [00] [00]
Iv:
[00] [00] [00] [00] [00] [00] [00] [00] [00] [00] [00] [00]
[00] [00] [00] [00] [00] [00] [00] [00] [00] [00] [00] [00]
[00] [00] [00] [00] [00] [00] [00] [00] [00] [00] [00] [00]
[00] [00] [00] [00] [00] [00] [00] [00] [00] [00] [00] [00]
[00] [00] [00] [00] [00] [00] [00] [00] [00] [00] [00] [00]
[00] [00] [00] [00] [00] [00] [00] [00] [00] [00] [00] [00]
[00] [00] [00] [00] [00] [00] [00] [00] [00] [00] [00] [00]
[00] [00] [00] [00] [00] [00] [00] [00] [00] [00] [00] [00]
[00] [00] [00] [00] [00] [00] [00] [00] [00] [00] [00] [00]
[00] [00] [00] [00] [00] [00] [00] [00] [00] [00] [00] [00]
[00] [00] [00] [00] [00] [00] [00] [00] [00] [00] [00] [00]
[00] [00] [00] [00] [00] [00] [00] [00] [00] [00] [00] [00]
[00] [00] [00] [00] [00] [00] [00] [00] [00] [00] [00] [00]
[00] [00] [00] [00] [00] [00] [00] [00] [00] [00] [00] [00]
[00] [00] [00] [00] [00] [00] [00] [00] [00] [00] [00] [00]
[00] [00] [00] [00] [00] [00] [00] [00] [00] [00] [00] [00]
[00] [00] [00] [00] [00] [00] [00] [00] [00] [00] [00] [00]
[00] [00] [00] [00] [00] [00] [00] [00] [00] [00] [00] [00]
[00] [00] [00] [00] [00] [00] [00] [00] [00] [00] [00] [00]
[00] [00] [00] [00] [00] [00] [00] [00] [00] [00] [00] [00]
[00] [00] [00] [00] [00] [00] [00] [00] [00] [00] [00] [00]
[00] [00] [00] [00] [00] [00] [00] [00] [00] [00] [00] [00]
[00] [00] [00] [00] [00] [00] [00] [00] [00] [00] [00] [00]
[00] [00] [00] [00] [00] [00] [00] [00] [00] [00] [00] [00]
[00] [00] [00] [00] [00] [00] [00] [00] [00] [00] [00] [00]
[00] [00] [00] [00] [00] [00] [00] [00] [00] [00] [00] [00]
[00] [00] [00] [00] [00] [00] [00] [00] [00] [00] [00] [00]
[00] [00] [00] [00] [00] [00] [00] [00] [00] [00] [00] [00]
[00] [00] [00] [00] [00] [00] [00] [00] [00] [00] [00] [00]
[00] [00] [00] [00] [00] [00] [00] [00] [00] [00] [00] [00]
[00] [00] [00] [00] [00] [00] [00] [00] [00] [00] [00] [00]
[00] [00] [00] [00] [00] [00] [00] [00] [00] [00] [00] [00]
Mac:
[00] [00] [00] [00] [00] [00] [00] [00] [00] [00] [00] [00] [00] [00] [00] [00]
[00] [00] [00] [00] [00] [00] [00] [00] [00] [00] [00] [00] [00] [00] [00] [00]
[00] [00] [00] [00] [00] [00] [00] [00] [00] [00] [00] [00] [00] [00] [00] [00]
[00] [00] [00] [00] [00] [00] [00] [00] [00] [00] [00] [00] [00] [00] [00] [00]
[00] [00] [00] [00] [00] [00] [00] [00] [00] [00] [00] [00] [00] [00] [00] [00]
[00] [00] [00] [00] [00] [00] [00] [00] [00] [00] [00] [00] [00] [00] [00] [00]
[00] [00] [00] [00] [00] [00] [00] [00] [00] [00] [00] [00] [00] [00] [00] [00]
[00] [00] [00] [00] [00] [00] [00] [00] [00] [00] [00] [00] [00] [00] [00] [00]
[00] [00] [00] [00] [00] [00] [00] [00] [00] [00] [00] [00] [00] [00] [00] [00]
[00] [00] [00] [00] [00] [00] [00] [00] [00] [00] [00] [00] [00] [00] [00] [00]
[00] [00] [00] [00] [00] [00] [00] [00] [00] [00] [00] [00] [00] [00] [00] [00]
[00] [00] [00] [00] [00] [00] [00] [00] [00] [00] [00] [00] [00] [00] [00] [00]
[00] [00] [00] [00] [00] [00] [00] [00] [00] [00] [00] [00] [00] [00] [00] [00]
[00] [00] [00] [00] [00] [00] [00] [00] [00] [00] [00] [00] [00] [00] [00] [00]
[00] [00] [00] [00] [00] [00] [00] [00] [00] [00] [00] [00] [00] [00] [00] [00]
[00] [00] [00] [00] [00] [00] [00] [00] [00] [00] [00] [00] [00] [00] [00] [00]
[00] [00] [00] [00] [00] [00] [00] [00] [00] [00] [00] [00] [00] [00] [00] [00]
[00] [00] [00] [00] [00] [00] [00] [00] [00] [00] [00] [00] [00] [00] [00] [00]
[00] [00] [00] [00] [00] [00] [00] [00] [00] [00] [00] [00] [00] [00] [00] [00]
[00] [00] [00] [00] [00] [00] [00] [00] [00] [00] [00] [00] [00] [00] [00] [00]
[00] [00] [00] [00] [00] [00] [00] [00] [00] [00] [00] [00] [00] [00] [00] [00]
[00] [00] [00] [00] [00] [00] [00] [00] [00] [00] [00] [00] [00] [00] [00] [00]
[00] [00] [00] [00] [00] [00] [00] [00] [00] [00] [00] [00] [00] [00] [00] [00]
[00] [00] [00] [00] [00] [00] [00] [00] [00] [00] [00] [00] [00] [00] [00] [00]
[00] [00] [00] [00] [00] [00] [00] [00] [00] [00] [00] [00] [00] [00] [00] [00]
[00] [00] [00] [00] [00] [00] [00] [00] [00] [00] [00] [00] [00] [00] [00] [00]
[00] [00] [00] [00] [00] [00] [00] [00] [00] [00] [00] [00] [00] [00] [00] [00]
[00] [00] [00] [00] [00] [00] [00] [00] [00] [00] [00] [00] [00] [00] [00] [00]
[00] [00] [00] [00] [00] [00] [00] [00] [00] [00] [00] [00] [00] [00] [00] [00]
[00] [00] [00] [00] [00] [00] [00] [00] [00] [00] [00] [00] [00] [00] [00] [00]
[00] [00] [00] [00] [00] [00] [00] [00] [00] [00] [00] [00] [00] [00] [00] [00]
[00] [00] [00] [00] [00] [00] [00] [00] [00] [00] [00] [00] [00] [00] [00] [00]
IvComm:
[00] [00] [00] [00] [00] [00] [00] [00] [00] [00] [00] [00]
MacComm:
[00] [00] [00] [00] [00] [00] [00] [00] [00] [00] [00] [00] [00] [00] [00] [00]
[SGX-KEYBLOB-PEI-REST] KeyBlob for socket no 4
Present: FALSE
TimeStamp: 0-0-0, 0:0:0:0, Pad1: 0, Pad2: 0, TimeZone: 0, Daylight: 0
KeyBlob:
Header:
SGX UUID:
[00] [00] [00] [00] [00] [00] [00] [00] [00] [00] [00] [00] [00] [00] [00] [00]
CpuSvn:
[00]
Security Properties:
[00] [00] [00] [00]
Prid:
[00] [00] [00] [00] [00] [00] [00] [00] [00] [00] [00] [00] [00] [00] [00] [00]
PlatformEpoch:
[00] [00] [00] [00] [00] [00] [00] [00] [00] [00] [00] [00] [00] [00] [00] [00] [00] [00] [00] [00] [00] [00] [00] [00] [00] [00] [00] [00] [00] [00] [00] [00]
RsakHash:
[00] [00] [00] [00] [00] [00] [00] [00] [00] [00] [00] [00] [00] [00] [00] [00] [00] [00] [00] [00] [00] [00] [00] [00] [00] [00] [00] [00] [00] [00] [00] [00]
RsakHash:
[00] [00] [00] [00] [00] [00] [00] [00] [00] [00] [00] [00] [00] [00] [00] [00] [00] [00] [00] [00] [00] [00] [00] [00] [00] [00] [00] [00] [00] [00] [00] [00]
Pfk1:
[00] [00] [00] [00] [00] [00] [00] [00] [00] [00] [00] [00] [00] [00] [00] [00]
PprResetKey:
[00] [00] [00] [00]
[00] [00] [00] [00]
[00] [00] [00] [00]
[00] [00] [00] [00]
[00] [00] [00] [00]
[00] [00] [00] [00]
[00] [00] [00] [00]
[00] [00] [00] [00]
[00] [00] [00] [00]
[00] [00] [00] [00]
[00] [00] [00] [00]
[00] [00] [00] [00]
[00] [00] [00] [00]
[00] [00] [00] [00]
[00] [00] [00] [00]
[00] [00] [00] [00]
[00] [00] [00] [00]
[00] [00] [00] [00]
[00] [00] [00] [00]
[00] [00] [00] [00]
[00] [00] [00] [00]
[00] [00] [00] [00]
[00] [00] [00] [00]
[00] [00] [00] [00]
[00] [00] [00] [00]
[00] [00] [00] [00]
[00] [00] [00] [00]
[00] [00] [00] [00]
[00] [00] [00] [00]
[00] [00] [00] [00]
[00] [00] [00] [00]
[00] [00] [00] [00]
LastUsedSvn:
[00]
Reserved2:
[00] [00] [00] [00] [00] [00] [00] [00] [00] [00] [00] [00] [00] [00] [00]
TargetPrid:
[00] [00] [00] [00] [00] [00] [00] [00] [00] [00] [00] [00] [00] [00] [00] [00]
PrimaryComms:
[00] [00] [00] [00] [00] [00] [00] [00] [00] [00] [00] [00] [00] [00] [00] [00]
Iv:
[00] [00] [00] [00] [00] [00] [00] [00] [00] [00] [00] [00]
[00] [00] [00] [00] [00] [00] [00] [00] [00] [00] [00] [00]
[00] [00] [00] [00] [00] [00] [00] [00] [00] [00] [00] [00]
[00] [00] [00] [00] [00] [00] [00] [00] [00] [00] [00] [00]
[00] [00] [00] [00] [00] [00] [00] [00] [00] [00] [00] [00]
[00] [00] [00] [00] [00] [00] [00] [00] [00] [00] [00] [00]
[00] [00] [00] [00] [00] [00] [00] [00] [00] [00] [00] [00]
[00] [00] [00] [00] [00] [00] [00] [00] [00] [00] [00] [00]
[00] [00] [00] [00] [00] [00] [00] [00] [00] [00] [00] [00]
[00] [00] [00] [00] [00] [00] [00] [00] [00] [00] [00] [00]
[00] [00] [00] [00] [00] [00] [00] [00] [00] [00] [00] [00]
[00] [00] [00] [00] [00] [00] [00] [00] [00] [00] [00] [00]
[00] [00] [00] [00] [00] [00] [00] [00] [00] [00] [00] [00]
[00] [00] [00] [00] [00] [00] [00] [00] [00] [00] [00] [00]
[00] [00] [00] [00] [00] [00] [00] [00] [00] [00] [00] [00]
[00] [00] [00] [00] [00] [00] [00] [00] [00] [00] [00] [00]
[00] [00] [00] [00] [00] [00] [00] [00] [00] [00] [00] [00]
[00] [00] [00] [00] [00] [00] [00] [00] [00] [00] [00] [00]
[00] [00] [00] [00] [00] [00] [00] [00] [00] [00] [00] [00]
[00] [00] [00] [00] [00] [00] [00] [00] [00] [00] [00] [00]
[00] [00] [00] [00] [00] [00] [00] [00] [00] [00] [00] [00]
[00] [00] [00] [00] [00] [00] [00] [00] [00] [00] [00] [00]
[00] [00] [00] [00] [00] [00] [00] [00] [00] [00] [00] [00]
[00] [00] [00] [00] [00] [00] [00] [00] [00] [00] [00] [00]
[00] [00] [00] [00] [00] [00] [00] [00] [00] [00] [00] [00]
[00] [00] [00] [00] [00] [00] [00] [00] [00] [00] [00] [00]
[00] [00] [00] [00] [00] [00] [00] [00] [00] [00] [00] [00]
[00] [00] [00] [00] [00] [00] [00] [00] [00] [00] [00] [00]
[00] [00] [00] [00] [00] [00] [00] [00] [00] [00] [00] [00]
[00] [00] [00] [00] [00] [00] [00] [00] [00] [00] [00] [00]
[00] [00] [00] [00] [00] [00] [00] [00] [00] [00] [00] [00]
[00] [00] [00] [00] [00] [00] [00] [00] [00] [00] [00] [00]
Mac:
[00] [00] [00] [00] [00] [00] [00] [00] [00] [00] [00] [00] [00] [00] [00] [00]
[00] [00] [00] [00] [00] [00] [00] [00] [00] [00] [00] [00] [00] [00] [00] [00]
[00] [00] [00] [00] [00] [00] [00] [00] [00] [00] [00] [00] [00] [00] [00] [00]
[00] [00] [00] [00] [00] [00] [00] [00] [00] [00] [00] [00] [00] [00] [00] [00]
[00] [00] [00] [00] [00] [00] [00] [00] [00] [00] [00] [00] [00] [00] [00] [00]
[00] [00] [00] [00] [00] [00] [00] [00] [00] [00] [00] [00] [00] [00] [00] [00]
[00] [00] [00] [00] [00] [00] [00] [00] [00] [00] [00] [00] [00] [00] [00] [00]
[00] [00] [00] [00] [00] [00] [00] [00] [00] [00] [00] [00] [00] [00] [00] [00]
[00] [00] [00] [00] [00] [00] [00] [00] [00] [00] [00] [00] [00] [00] [00] [00]
[00] [00] [00] [00] [00] [00] [00] [00] [00] [00] [00] [00] [00] [00] [00] [00]
[00] [00] [00] [00] [00] [00] [00] [00] [00] [00] [00] [00] [00] [00] [00] [00]
[00] [00] [00] [00] [00] [00] [00] [00] [00] [00] [00] [00] [00] [00] [00] [00]
[00] [00] [00] [00] [00] [00] [00] [00] [00] [00] [00] [00] [00] [00] [00] [00]
[00] [00] [00] [00] [00] [00] [00] [00] [00] [00] [00] [00] [00] [00] [00] [00]
[00] [00] [00] [00] [00] [00] [00] [00] [00] [00] [00] [00] [00] [00] [00] [00]
[00] [00] [00] [00] [00] [00] [00] [00] [00] [00] [00] [00] [00] [00] [00] [00]
[00] [00] [00] [00] [00] [00] [00] [00] [00] [00] [00] [00] [00] [00] [00] [00]
[00] [00] [00] [00] [00] [00] [00] [00] [00] [00] [00] [00] [00] [00] [00] [00]
[00] [00] [00] [00] [00] [00] [00] [00] [00] [00] [00] [00] [00] [00] [00] [00]
[00] [00] [00] [00] [00] [00] [00] [00] [00] [00] [00] [00] [00] [00] [00] [00]
[00] [00] [00] [00] [00] [00] [00] [00] [00] [00] [00] [00] [00] [00] [00] [00]
[00] [00] [00] [00] [00] [00] [00] [00] [00] [00] [00] [00] [00] [00] [00] [00]
[00] [00] [00] [00] [00] [00] [00] [00] [00] [00] [00] [00] [00] [00] [00] [00]
[00] [00] [00] [00] [00] [00] [00] [00] [00] [00] [00] [00] [00] [00] [00] [00]
[00] [00] [00] [00] [00] [00] [00] [00] [00] [00] [00] [00] [00] [00] [00] [00]
[00] [00] [00] [00] [00] [00] [00] [00] [00] [00] [00] [00] [00] [00] [00] [00]
[00] [00] [00] [00] [00] [00] [00] [00] [00] [00] [00] [00] [00] [00] [00] [00]
[00] [00] [00] [00] [00] [00] [00] [00] [00] [00] [00] [00] [00] [00] [00] [00]
[00] [00] [00] [00] [00] [00] [00] [00] [00] [00] [00] [00] [00] [00] [00] [00]
[00] [00] [00] [00] [00] [00] [00] [00] [00] [00] [00] [00] [00] [00] [00] [00]
[00] [00] [00] [00] [00] [00] [00] [00] [00] [00] [00] [00] [00] [00] [00] [00]
[00] [00] [00] [00] [00] [00] [00] [00] [00] [00] [00] [00] [00] [00] [00] [00]
IvComm:
[00] [00] [00] [00] [00] [00] [00] [00] [00] [00] [00] [00]
MacComm:
[00] [00] [00] [00] [00] [00] [00] [00] [00] [00] [00] [00] [00] [00] [00] [00]
[SGX-KEYBLOB-PEI-REST] KeyBlob for socket no 5
Present: FALSE
TimeStamp: 0-0-0, 0:0:0:0, Pad1: 0, Pad2: 0, TimeZone: 0, Daylight: 0
KeyBlob:
Header:
SGX UUID:
[00] [00] [00] [00] [00] [00] [00] [00] [00] [00] [00] [00] [00] [00] [00] [00]
CpuSvn:
[00]
Security Properties:
[00] [00] [00] [00]
Prid:
[00] [00] [00] [00] [00] [00] [00] [00] [00] [00] [00] [00] [00] [00] [00] [00]
PlatformEpoch:
[00] [00] [00] [00] [00] [00] [00] [00] [00] [00] [00] [00] [00] [00] [00] [00] [00] [00] [00] [00] [00] [00] [00] [00] [00] [00] [00] [00] [00] [00] [00] [00]
RsakHash:
[00] [00] [00] [00] [00] [00] [00] [00] [00] [00] [00] [00] [00] [00] [00] [00] [00] [00] [00] [00] [00] [00] [00] [00] [00] [00] [00] [00] [00] [00] [00] [00]
RsakHash:
[00] [00] [00] [00] [00] [00] [00] [00] [00] [00] [00] [00] [00] [00] [00] [00] [00] [00] [00] [00] [00] [00] [00] [00] [00] [00] [00] [00] [00] [00] [00] [00]
Pfk1:
[00] [00] [00] [00] [00] [00] [00] [00] [00] [00] [00] [00] [00] [00] [00] [00]
PprResetKey:
[00] [00] [00] [00]
[00] [00] [00] [00]
[00] [00] [00] [00]
[00] [00] [00] [00]
[00] [00] [00] [00]
[00] [00] [00] [00]
[00] [00] [00] [00]
[00] [00] [00] [00]
[00] [00] [00] [00]
[00] [00] [00] [00]
[00] [00] [00] [00]
[00] [00] [00] [00]
[00] [00] [00] [00]
[00] [00] [00] [00]
[00] [00] [00] [00]
[00] [00] [00] [00]
[00] [00] [00] [00]
[00] [00] [00] [00]
[00] [00] [00] [00]
[00] [00] [00] [00]
[00] [00] [00] [00]
[00] [00] [00] [00]
[00] [00] [00] [00]
[00] [00] [00] [00]
[00] [00] [00] [00]
[00] [00] [00] [00]
[00] [00] [00] [00]
[00] [00] [00] [00]
[00] [00] [00] [00]
[00] [00] [00] [00]
[00] [00] [00] [00]
[00] [00] [00] [00]
LastUsedSvn:
[00]
Reserved2:
[00] [00] [00] [00] [00] [00] [00] [00] [00] [00] [00] [00] [00] [00] [00]
TargetPrid:
[00] [00] [00] [00] [00] [00] [00] [00] [00] [00] [00] [00] [00] [00] [00] [00]
PrimaryComms:
[00] [00] [00] [00] [00] [00] [00] [00] [00] [00] [00] [00] [00] [00] [00] [00]
Iv:
[00] [00] [00] [00] [00] [00] [00] [00] [00] [00] [00] [00]
[00] [00] [00] [00] [00] [00] [00] [00] [00] [00] [00] [00]
[00] [00] [00] [00] [00] [00] [00] [00] [00] [00] [00] [00]
[00] [00] [00] [00] [00] [00] [00] [00] [00] [00] [00] [00]
[00] [00] [00] [00] [00] [00] [00] [00] [00] [00] [00] [00]
[00] [00] [00] [00] [00] [00] [00] [00] [00] [00] [00] [00]
[00] [00] [00] [00] [00] [00] [00] [00] [00] [00] [00] [00]
[00] [00] [00] [00] [00] [00] [00] [00] [00] [00] [00] [00]
[00] [00] [00] [00] [00] [00] [00] [00] [00] [00] [00] [00]
[00] [00] [00] [00] [00] [00] [00] [00] [00] [00] [00] [00]
[00] [00] [00] [00] [00] [00] [00] [00] [00] [00] [00] [00]
[00] [00] [00] [00] [00] [00] [00] [00] [00] [00] [00] [00]
[00] [00] [00] [00] [00] [00] [00] [00] [00] [00] [00] [00]
[00] [00] [00] [00] [00] [00] [00] [00] [00] [00] [00] [00]
[00] [00] [00] [00] [00] [00] [00] [00] [00] [00] [00] [00]
[00] [00] [00] [00] [00] [00] [00] [00] [00] [00] [00] [00]
[00] [00] [00] [00] [00] [00] [00] [00] [00] [00] [00] [00]
[00] [00] [00] [00] [00] [00] [00] [00] [00] [00] [00] [00]
[00] [00] [00] [00] [00] [00] [00] [00] [00] [00] [00] [00]
[00] [00] [00] [00] [00] [00] [00] [00] [00] [00] [00] [00]
[00] [00] [00] [00] [00] [00] [00] [00] [00] [00] [00] [00]
[00] [00] [00] [00] [00] [00] [00] [00] [00] [00] [00] [00]
[00] [00] [00] [00] [00] [00] [00] [00] [00] [00] [00] [00]
[00] [00] [00] [00] [00] [00] [00] [00] [00] [00] [00] [00]
[00] [00] [00] [00] [00] [00] [00] [00] [00] [00] [00] [00]
[00] [00] [00] [00] [00] [00] [00] [00] [00] [00] [00] [00]
[00] [00] [00] [00] [00] [00] [00] [00] [00] [00] [00] [00]
[00] [00] [00] [00] [00] [00] [00] [00] [00] [00] [00] [00]
[00] [00] [00] [00] [00] [00] [00] [00] [00] [00] [00] [00]
[00] [00] [00] [00] [00] [00] [00] [00] [00] [00] [00] [00]
[00] [00] [00] [00] [00] [00] [00] [00] [00] [00] [00] [00]
[00] [00] [00] [00] [00] [00] [00] [00] [00] [00] [00] [00]
Mac:
[00] [00] [00] [00] [00] [00] [00] [00] [00] [00] [00] [00] [00] [00] [00] [00]
[00] [00] [00] [00] [00] [00] [00] [00] [00] [00] [00] [00] [00] [00] [00] [00]
[00] [00] [00] [00] [00] [00] [00] [00] [00] [00] [00] [00] [00] [00] [00] [00]
[00] [00] [00] [00] [00] [00] [00] [00] [00] [00] [00] [00] [00] [00] [00] [00]
[00] [00] [00] [00] [00] [00] [00] [00] [00] [00] [00] [00] [00] [00] [00] [00]
[00] [00] [00] [00] [00] [00] [00] [00] [00] [00] [00] [00] [00] [00] [00] [00]
[00] [00] [00] [00] [00] [00] [00] [00] [00] [00] [00] [00] [00] [00] [00] [00]
[00] [00] [00] [00] [00] [00] [00] [00] [00] [00] [00] [00] [00] [00] [00] [00]
[00] [00] [00] [00] [00] [00] [00] [00] [00] [00] [00] [00] [00] [00] [00] [00]
[00] [00] [00] [00] [00] [00] [00] [00] [00] [00] [00] [00] [00] [00] [00] [00]
[00] [00] [00] [00] [00] [00] [00] [00] [00] [00] [00] [00] [00] [00] [00] [00]
[00] [00] [00] [00] [00] [00] [00] [00] [00] [00] [00] [00] [00] [00] [00] [00]
[00] [00] [00] [00] [00] [00] [00] [00] [00] [00] [00] [00] [00] [00] [00] [00]
[00] [00] [00] [00] [00] [00] [00] [00] [00] [00] [00] [00] [00] [00] [00] [00]
[00] [00] [00] [00] [00] [00] [00] [00] [00] [00] [00] [00] [00] [00] [00] [00]
[00] [00] [00] [00] [00] [00] [00] [00] [00] [00] [00] [00] [00] [00] [00] [00]
[00] [00] [00] [00] [00] [00] [00] [00] [00] [00] [00] [00] [00] [00] [00] [00]
[00] [00] [00] [00] [00] [00] [00] [00] [00] [00] [00] [00] [00] [00] [00] [00]
[00] [00] [00] [00] [00] [00] [00] [00] [00] [00] [00] [00] [00] [00] [00] [00]
[00] [00] [00] [00] [00] [00] [00] [00] [00] [00] [00] [00] [00] [00] [00] [00]
[00] [00] [00] [00] [00] [00] [00] [00] [00] [00] [00] [00] [00] [00] [00] [00]
[00] [00] [00] [00] [00] [00] [00] [00] [00] [00] [00] [00] [00] [00] [00] [00]
[00] [00] [00] [00] [00] [00] [00] [00] [00] [00] [00] [00] [00] [00] [00] [00]
[00] [00] [00] [00] [00] [00] [00] [00] [00] [00] [00] [00] [00] [00] [00] [00]
[00] [00] [00] [00] [00] [00] [00] [00] [00] [00] [00] [00] [00] [00] [00] [00]
[00] [00] [00] [00] [00] [00] [00] [00] [00] [00] [00] [00] [00] [00] [00] [00]
[00] [00] [00] [00] [00] [00] [00] [00] [00] [00] [00] [00] [00] [00] [00] [00]
[00] [00] [00] [00] [00] [00] [00] [00] [00] [00] [00] [00] [00] [00] [00] [00]
[00] [00] [00] [00] [00] [00] [00] [00] [00] [00] [00] [00] [00] [00] [00] [00]
[00] [00] [00] [00] [00] [00] [00] [00] [00] [00] [00] [00] [00] [00] [00] [00]
[00] [00] [00] [00] [00] [00] [00] [00] [00] [00] [00] [00] [00] [00] [00] [00]
[00] [00] [00] [00] [00] [00] [00] [00] [00] [00] [00] [00] [00] [00] [00] [00]
IvComm:
[00] [00] [00] [00] [00] [00] [00] [00] [00] [00] [00] [00]
MacComm:
[00] [00] [00] [00] [00] [00] [00] [00] [00] [00] [00] [00] [00] [00] [00] [00]
[SGX-KEYBLOB-PEI-REST] KeyBlob for socket no 6
Present: FALSE
TimeStamp: 0-0-0, 0:0:0:0, Pad1: 0, Pad2: 0, TimeZone: 0, Daylight: 0
KeyBlob:
Header:
SGX UUID:
[00] [00] [00] [00] [00] [00] [00] [00] [00] [00] [00] [00] [00] [00] [00] [00]
CpuSvn:
[00]
Security Properties:
[00] [00] [00] [00]
Prid:
[00] [00] [00] [00] [00] [00] [00] [00] [00] [00] [00] [00] [00] [00] [00] [00]
PlatformEpoch:
[00] [00] [00] [00] [00] [00] [00] [00] [00] [00] [00] [00] [00] [00] [00] [00] [00] [00] [00] [00] [00] [00] [00] [00] [00] [00] [00] [00] [00] [00] [00] [00]
RsakHash:
[00] [00] [00] [00] [00] [00] [00] [00] [00] [00] [00] [00] [00] [00] [00] [00] [00] [00] [00] [00] [00] [00] [00] [00] [00] [00] [00] [00] [00] [00] [00] [00]
RsakHash:
[00] [00] [00] [00] [00] [00] [00] [00] [00] [00] [00] [00] [00] [00] [00] [00] [00] [00] [00] [00] [00] [00] [00] [00] [00] [00] [00] [00] [00] [00] [00] [00]
Pfk1:
[00] [00] [00] [00] [00] [00] [00] [00] [00] [00] [00] [00] [00] [00] [00] [00]
PprResetKey:
[00] [00] [00] [00]
[00] [00] [00] [00]
[00] [00] [00] [00]
[00] [00] [00] [00]
[00] [00] [00] [00]
[00] [00] [00] [00]
[00] [00] [00] [00]
[00] [00] [00] [00]
[00] [00] [00] [00]
[00] [00] [00] [00]
[00] [00] [00] [00]
[00] [00] [00] [00]
[00] [00] [00] [00]
[00] [00] [00] [00]
[00] [00] [00] [00]
[00] [00] [00] [00]
[00] [00] [00] [00]
[00] [00] [00] [00]
[00] [00] [00] [00]
[00] [00] [00] [00]
[00] [00] [00] [00]
[00] [00] [00] [00]
[00] [00] [00] [00]
[00] [00] [00] [00]
[00] [00] [00] [00]
[00] [00] [00] [00]
[00] [00] [00] [00]
[00] [00] [00] [00]
[00] [00] [00] [00]
[00] [00] [00] [00]
[00] [00] [00] [00]
[00] [00] [00] [00]
LastUsedSvn:
[00]
Reserved2:
[00] [00] [00] [00] [00] [00] [00] [00] [00] [00] [00] [00] [00] [00] [00]
TargetPrid:
[00] [00] [00] [00] [00] [00] [00] [00] [00] [00] [00] [00] [00] [00] [00] [00]
PrimaryComms:
[00] [00] [00] [00] [00] [00] [00] [00] [00] [00] [00] [00] [00] [00] [00] [00]
Iv:
[00] [00] [00] [00] [00] [00] [00] [00] [00] [00] [00] [00]
[00] [00] [00] [00] [00] [00] [00] [00] [00] [00] [00] [00]
[00] [00] [00] [00] [00] [00] [00] [00] [00] [00] [00] [00]
[00] [00] [00] [00] [00] [00] [00] [00] [00] [00] [00] [00]
[00] [00] [00] [00] [00] [00] [00] [00] [00] [00] [00] [00]
[00] [00] [00] [00] [00] [00] [00] [00] [00] [00] [00] [00]
[00] [00] [00] [00] [00] [00] [00] [00] [00] [00] [00] [00]
[00] [00] [00] [00] [00] [00] [00] [00] [00] [00] [00] [00]
[00] [00] [00] [00] [00] [00] [00] [00] [00] [00] [00] [00]
[00] [00] [00] [00] [00] [00] [00] [00] [00] [00] [00] [00]
[00] [00] [00] [00] [00] [00] [00] [00] [00] [00] [00] [00]
[00] [00] [00] [00] [00] [00] [00] [00] [00] [00] [00] [00]
[00] [00] [00] [00] [00] [00] [00] [00] [00] [00] [00] [00]
[00] [00] [00] [00] [00] [00] [00] [00] [00] [00] [00] [00]
[00] [00] [00] [00] [00] [00] [00] [00] [00] [00] [00] [00]
[00] [00] [00] [00] [00] [00] [00] [00] [00] [00] [00] [00]
[00] [00] [00] [00] [00] [00] [00] [00] [00] [00] [00] [00]
[00] [00] [00] [00] [00] [00] [00] [00] [00] [00] [00] [00]
[00] [00] [00] [00] [00] [00] [00] [00] [00] [00] [00] [00]
[00] [00] [00] [00] [00] [00] [00] [00] [00] [00] [00] [00]
[00] [00] [00] [00] [00] [00] [00] [00] [00] [00] [00] [00]
[00] [00] [00] [00] [00] [00] [00] [00] [00] [00] [00] [00]
[00] [00] [00] [00] [00] [00] [00] [00] [00] [00] [00] [00]
[00] [00] [00] [00] [00] [00] [00] [00] [00] [00] [00] [00]
[00] [00] [00] [00] [00] [00] [00] [00] [00] [00] [00] [00]
[00] [00] [00] [00] [00] [00] [00] [00] [00] [00] [00] [00]
[00] [00] [00] [00] [00] [00] [00] [00] [00] [00] [00] [00]
[00] [00] [00] [00] [00] [00] [00] [00] [00] [00] [00] [00]
[00] [00] [00] [00] [00] [00] [00] [00] [00] [00] [00] [00]
[00] [00] [00] [00] [00] [00] [00] [00] [00] [00] [00] [00]
[00] [00] [00] [00] [00] [00] [00] [00] [00] [00] [00] [00]
[00] [00] [00] [00] [00] [00] [00] [00] [00] [00] [00] [00]
Mac:
[00] [00] [00] [00] [00] [00] [00] [00] [00] [00] [00] [00] [00] [00] [00] [00]
[00] [00] [00] [00] [00] [00] [00] [00] [00] [00] [00] [00] [00] [00] [00] [00]
[00] [00] [00] [00] [00] [00] [00] [00] [00] [00] [00] [00] [00] [00] [00] [00]
[00] [00] [00] [00] [00] [00] [00] [00] [00] [00] [00] [00] [00] [00] [00] [00]
[00] [00] [00] [00] [00] [00] [00] [00] [00] [00] [00] [00] [00] [00] [00] [00]
[00] [00] [00] [00] [00] [00] [00] [00] [00] [00] [00] [00] [00] [00] [00] [00]
[00] [00] [00] [00] [00] [00] [00] [00] [00] [00] [00] [00] [00] [00] [00] [00]
[00] [00] [00] [00] [00] [00] [00] [00] [00] [00] [00] [00] [00] [00] [00] [00]
[00] [00] [00] [00] [00] [00] [00] [00] [00] [00] [00] [00] [00] [00] [00] [00]
[00] [00] [00] [00] [00] [00] [00] [00] [00] [00] [00] [00] [00] [00] [00] [00]
[00] [00] [00] [00] [00] [00] [00] [00] [00] [00] [00] [00] [00] [00] [00] [00]
[00] [00] [00] [00] [00] [00] [00] [00] [00] [00] [00] [00] [00] [00] [00] [00]
[00] [00] [00] [00] [00] [00] [00] [00] [00] [00] [00] [00] [00] [00] [00] [00]
[00] [00] [00] [00] [00] [00] [00] [00] [00] [00] [00] [00] [00] [00] [00] [00]
[00] [00] [00] [00] [00] [00] [00] [00] [00] [00] [00] [00] [00] [00] [00] [00]
[00] [00] [00] [00] [00] [00] [00] [00] [00] [00] [00] [00] [00] [00] [00] [00]
[00] [00] [00] [00] [00] [00] [00] [00] [00] [00] [00] [00] [00] [00] [00] [00]
[00] [00] [00] [00] [00] [00] [00] [00] [00] [00] [00] [00] [00] [00] [00] [00]
[00] [00] [00] [00] [00] [00] [00] [00] [00] [00] [00] [00] [00] [00] [00] [00]
[00] [00] [00] [00] [00] [00] [00] [00] [00] [00] [00] [00] [00] [00] [00] [00]
[00] [00] [00] [00] [00] [00] [00] [00] [00] [00] [00] [00] [00] [00] [00] [00]
[00] [00] [00] [00] [00] [00] [00] [00] [00] [00] [00] [00] [00] [00] [00] [00]
[00] [00] [00] [00] [00] [00] [00] [00] [00] [00] [00] [00] [00] [00] [00] [00]
[00] [00] [00] [00] [00] [00] [00] [00] [00] [00] [00] [00] [00] [00] [00] [00]
[00] [00] [00] [00] [00] [00] [00] [00] [00] [00] [00] [00] [00] [00] [00] [00]
[00] [00] [00] [00] [00] [00] [00] [00] [00] [00] [00] [00] [00] [00] [00] [00]
[00] [00] [00] [00] [00] [00] [00] [00] [00] [00] [00] [00] [00] [00] [00] [00]
[00] [00] [00] [00] [00] [00] [00] [00] [00] [00] [00] [00] [00] [00] [00] [00]
[00] [00] [00] [00] [00] [00] [00] [00] [00] [00] [00] [00] [00] [00] [00] [00]
[00] [00] [00] [00] [00] [00] [00] [00] [00] [00] [00] [00] [00] [00] [00] [00]
[00] [00] [00] [00] [00] [00] [00] [00] [00] [00] [00] [00] [00] [00] [00] [00]
[00] [00] [00] [00] [00] [00] [00] [00] [00] [00] [00] [00] [00] [00] [00] [00]
IvComm:
[00] [00] [00] [00] [00] [00] [00] [00] [00] [00] [00] [00]
MacComm:
[00] [00] [00] [00] [00] [00] [00] [00] [00] [00] [00] [00] [00] [00] [00] [00]
[SGX-KEYBLOB-PEI-REST] KeyBlob for socket no 7
Present: FALSE
TimeStamp: 0-0-0, 0:0:0:0, Pad1: 0, Pad2: 0, TimeZone: 0, Daylight: 0
KeyBlob:
Header:
SGX UUID:
[00] [00] [00] [00] [00] [00] [00] [00] [00] [00] [00] [00] [00] [00] [00] [00]
CpuSvn:
[00]
Security Properties:
[00] [00] [00] [00]
Prid:
[00] [00] [00] [00] [00] [00] [00] [00] [00] [00] [00] [00] [00] [00] [00] [00]
PlatformEpoch:
[00] [00] [00] [00] [00] [00] [00] [00] [00] [00] [00] [00] [00] [00] [00] [00] [00] [00] [00] [00] [00] [00] [00] [00] [00] [00] [00] [00] [00] [00] [00] [00]
RsakHash:
[00] [00] [00] [00] [00] [00] [00] [00] [00] [00] [00] [00] [00] [00] [00] [00] [00] [00] [00] [00] [00] [00] [00] [00] [00] [00] [00] [00] [00] [00] [00] [00]
RsakHash:
[00] [00] [00] [00] [00] [00] [00] [00] [00] [00] [00] [00] [00] [00] [00] [00] [00] [00] [00] [00] [00] [00] [00] [00] [00] [00] [00] [00] [00] [00] [00] [00]
Pfk1:
[00] [00] [00] [00] [00] [00] [00] [00] [00] [00] [00] [00] [00] [00] [00] [00]
PprResetKey:
[00] [00] [00] [00]
[00] [00] [00] [00]
[00] [00] [00] [00]
[00] [00] [00] [00]
[00] [00] [00] [00]
[00] [00] [00] [00]
[00] [00] [00] [00]
[00] [00] [00] [00]
[00] [00] [00] [00]
[00] [00] [00] [00]
[00] [00] [00] [00]
[00] [00] [00] [00]
[00] [00] [00] [00]
[00] [00] [00] [00]
[00] [00] [00] [00]
[00] [00] [00] [00]
[00] [00] [00] [00]
[00] [00] [00] [00]
[00] [00] [00] [00]
[00] [00] [00] [00]
[00] [00] [00] [00]
[00] [00] [00] [00]
[00] [00] [00] [00]
[00] [00] [00] [00]
[00] [00] [00] [00]
[00] [00] [00] [00]
[00] [00] [00] [00]
[00] [00] [00] [00]
[00] [00] [00] [00]
[00] [00] [00] [00]
[00] [00] [00] [00]
[00] [00] [00] [00]
LastUsedSvn:
[00]
Reserved2:
[00] [00] [00] [00] [00] [00] [00] [00] [00] [00] [00] [00] [00] [00] [00]
TargetPrid:
[00] [00] [00] [00] [00] [00] [00] [00] [00] [00] [00] [00] [00] [00] [00] [00]
PrimaryComms:
[00] [00] [00] [00] [00] [00] [00] [00] [00] [00] [00] [00] [00] [00] [00] [00]
Iv:
[00] [00] [00] [00] [00] [00] [00] [00] [00] [00] [00] [00]
[00] [00] [00] [00] [00] [00] [00] [00] [00] [00] [00] [00]
[00] [00] [00] [00] [00] [00] [00] [00] [00] [00] [00] [00]
[00] [00] [00] [00] [00] [00] [00] [00] [00] [00] [00] [00]
[00] [00] [00] [00] [00] [00] [00] [00] [00] [00] [00] [00]
[00] [00] [00] [00] [00] [00] [00] [00] [00] [00] [00] [00]
[00] [00] [00] [00] [00] [00] [00] [00] [00] [00] [00] [00]
[00] [00] [00] [00] [00] [00] [00] [00] [00] [00] [00] [00]
[00] [00] [00] [00] [00] [00] [00] [00] [00] [00] [00] [00]
[00] [00] [00] [00] [00] [00] [00] [00] [00] [00] [00] [00]
[00] [00] [00] [00] [00] [00] [00] [00] [00] [00] [00] [00]
[00] [00] [00] [00] [00] [00] [00] [00] [00] [00] [00] [00]
[00] [00] [00] [00] [00] [00] [00] [00] [00] [00] [00] [00]
[00] [00] [00] [00] [00] [00] [00] [00] [00] [00] [00] [00]
[00] [00] [00] [00] [00] [00] [00] [00] [00] [00] [00] [00]
[00] [00] [00] [00] [00] [00] [00] [00] [00] [00] [00] [00]
[00] [00] [00] [00] [00] [00] [00] [00] [00] [00] [00] [00]
[00] [00] [00] [00] [00] [00] [00] [00] [00] [00] [00] [00]
[00] [00] [00] [00] [00] [00] [00] [00] [00] [00] [00] [00]
[00] [00] [00] [00] [00] [00] [00] [00] [00] [00] [00] [00]
[00] [00] [00] [00] [00] [00] [00] [00] [00] [00] [00] [00]
[00] [00] [00] [00] [00] [00] [00] [00] [00] [00] [00] [00]
[00] [00] [00] [00] [00] [00] [00] [00] [00] [00] [00] [00]
[00] [00] [00] [00] [00] [00] [00] [00] [00] [00] [00] [00]
[00] [00] [00] [00] [00] [00] [00] [00] [00] [00] [00] [00]
[00] [00] [00] [00] [00] [00] [00] [00] [00] [00] [00] [00]
[00] [00] [00] [00] [00] [00] [00] [00] [00] [00] [00] [00]
[00] [00] [00] [00] [00] [00] [00] [00] [00] [00] [00] [00]
[00] [00] [00] [00] [00] [00] [00] [00] [00] [00] [00] [00]
[00] [00] [00] [00] [00] [00] [00] [00] [00] [00] [00] [00]
[00] [00] [00] [00] [00] [00] [00] [00] [00] [00] [00] [00]
[00] [00] [00] [00] [00] [00] [00] [00] [00] [00] [00] [00]
Mac:
[00] [00] [00] [00] [00] [00] [00] [00] [00] [00] [00] [00] [00] [00] [00] [00]
[00] [00] [00] [00] [00] [00] [00] [00] [00] [00] [00] [00] [00] [00] [00] [00]
[00] [00] [00] [00] [00] [00] [00] [00] [00] [00] [00] [00] [00] [00] [00] [00]
[00] [00] [00] [00] [00] [00] [00] [00] [00] [00] [00] [00] [00] [00] [00] [00]
[00] [00] [00] [00] [00] [00] [00] [00] [00] [00] [00] [00] [00] [00] [00] [00]
[00] [00] [00] [00] [00] [00] [00] [00] [00] [00] [00] [00] [00] [00] [00] [00]
[00] [00] [00] [00] [00] [00] [00] [00] [00] [00] [00] [00] [00] [00] [00] [00]
[00] [00] [00] [00] [00] [00] [00] [00] [00] [00] [00] [00] [00] [00] [00] [00]
[00] [00] [00] [00] [00] [00] [00] [00] [00] [00] [00] [00] [00] [00] [00] [00]
[00] [00] [00] [00] [00] [00] [00] [00] [00] [00] [00] [00] [00] [00] [00] [00]
[00] [00] [00] [00] [00] [00] [00] [00] [00] [00] [00] [00] [00] [00] [00] [00]
[00] [00] [00] [00] [00] [00] [00] [00] [00] [00] [00] [00] [00] [00] [00] [00]
[00] [00] [00] [00] [00] [00] [00] [00] [00] [00] [00] [00] [00] [00] [00] [00]
[00] [00] [00] [00] [00] [00] [00] [00] [00] [00] [00] [00] [00] [00] [00] [00]
[00] [00] [00] [00] [00] [00] [00] [00] [00] [00] [00] [00] [00] [00] [00] [00]
[00] [00] [00] [00] [00] [00] [00] [00] [00] [00] [00] [00] [00] [00] [00] [00]
[00] [00] [00] [00] [00] [00] [00] [00] [00] [00] [00] [00] [00] [00] [00] [00]
[00] [00] [00] [00] [00] [00] [00] [00] [00] [00] [00] [00] [00] [00] [00] [00]
[00] [00] [00] [00] [00] [00] [00] [00] [00] [00] [00] [00] [00] [00] [00] [00]
[00] [00] [00] [00] [00] [00] [00] [00] [00] [00] [00] [00] [00] [00] [00] [00]
[00] [00] [00] [00] [00] [00] [00] [00] [00] [00] [00] [00] [00] [00] [00] [00]
[00] [00] [00] [00] [00] [00] [00] [00] [00] [00] [00] [00] [00] [00] [00] [00]
[00] [00] [00] [00] [00] [00] [00] [00] [00] [00] [00] [00] [00] [00] [00] [00]
[00] [00] [00] [00] [00] [00] [00] [00] [00] [00] [00] [00] [00] [00] [00] [00]
[00] [00] [00] [00] [00] [00] [00] [00] [00] [00] [00] [00] [00] [00] [00] [00]
[00] [00] [00] [00] [00] [00] [00] [00] [00] [00] [00] [00] [00] [00] [00] [00]
[00] [00] [00] [00] [00] [00] [00] [00] [00] [00] [00] [00] [00] [00] [00] [00]
[00] [00] [00] [00] [00] [00] [00] [00] [00] [00] [00] [00] [00] [00] [00] [00]
[00] [00] [00] [00] [00] [00] [00] [00] [00] [00] [00] [00] [00] [00] [00] [00]
[00] [00] [00] [00] [00] [00] [00] [00] [00] [00] [00] [00] [00] [00] [00] [00]
[00] [00] [00] [00] [00] [00] [00] [00] [00] [00] [00] [00] [00] [00] [00] [00]
[00] [00] [00] [00] [00] [00] [00] [00] [00] [00] [00] [00] [00] [00] [00] [00]
IvComm:
[00] [00] [00] [00] [00] [00] [00] [00] [00] [00] [00] [00]
MacComm:
[00] [00] [00] [00] [00] [00] [00] [00] [00] [00] [00] [00] [00] [00] [00] [00]
SGX disabled, exiting
[SGX] SgxEarlyInit exit: Success
SgxDisabledFlow entry
LockUncoreM2mPrmrrs START
SocketIndex = 0
[SGX] LockUncoreM2mPrmrrs: Sgx M2M_PRMRR_BASE Socket0 Imc0 = 0x0000000000000000
[SGX] LockUncoreM2mPrmrrs: Sgx M2M_PRMRR_MASK Socket0 Imc0 = 0x0000000000000400
[SGX] LockUncoreM2mPrmrrs: Sgx M2M_PRMRR_BASE Socket0 Imc1 = 0x0000000000000000
[SGX] LockUncoreM2mPrmrrs: Sgx M2M_PRMRR_MASK Socket0 Imc1 = 0x0000000000000400
[SGX] LockUncoreM2mPrmrrs: Sgx M2M_PRMRR_BASE Socket0 Imc2 = 0x0000000000000000
[SGX] LockUncoreM2mPrmrrs: Sgx M2M_PRMRR_MASK Socket0 Imc2 = 0x0000000000000400
[SGX] LockUncoreM2mPrmrrs: Sgx M2M_PRMRR_BASE Socket0 Imc3 = 0x0000000000000000
[SGX] LockUncoreM2mPrmrrs: Sgx M2M_PRMRR_MASK Socket0 Imc3 = 0x0000000000000400
SocketIndex = 1
[SGX] LockUncoreM2mPrmrrs: Sgx M2M_PRMRR_BASE Socket1 Imc0 = 0x0000000000000000
[SGX] LockUncoreM2mPrmrrs: Sgx M2M_PRMRR_MASK Socket1 Imc0 = 0x0000000000000400
[SGX] LockUncoreM2mPrmrrs: Sgx M2M_PRMRR_BASE Socket1 Imc1 = 0x0000000000000000
[SGX] LockUncoreM2mPrmrrs: Sgx M2M_PRMRR_MASK Socket1 Imc1 = 0x0000000000000400
[SGX] LockUncoreM2mPrmrrs: Sgx M2M_PRMRR_BASE Socket1 Imc2 = 0x0000000000000000
[SGX] LockUncoreM2mPrmrrs: Sgx M2M_PRMRR_MASK Socket1 Imc2 = 0x0000000000000400
[SGX] LockUncoreM2mPrmrrs: Sgx M2M_PRMRR_BASE Socket1 Imc3 = 0x0000000000000000
[SGX] LockUncoreM2mPrmrrs: Sgx M2M_PRMRR_MASK Socket1 Imc3 = 0x0000000000000400
LockUncoreM2mPrmrrs END
SgxDisabledFlow exit
PROGRESS CODE: V03020003 I0
PROGRESS CODE: V03020002 I0
PEI PPM Initialization Entry
::PEI Power Management CSR, B2P and TPMI Programming
Data received from mailbox: 0x20000802
Data received from mailbox: 0x20000902
InitializeUfsMeshBoostConfig() Not supported or not enabled, Exit
Data received from mailbox: 0x20000802
Data received from mailbox: 0x20000902
InitializeUfsMeshBoostConfig() Not supported or not enabled, Exit
PROGRESS CODE: V03020003 I0
PROGRESS CODE: V03020002 I0
[NEW] FeatureName: AESNI
[NEW] FeatureName: MWAIT
[NEW] FeatureName: ACPI
[NEW] FeatureName: EIST
[NEW] FeatureName: FastStrings
[NEW] FeatureName: Lock Feature Control Register
[NEW] FeatureName: SMX
[NEW] FeatureName: VMX
[NEW] FeatureName: Limit CpuId Maximum Value
[NEW] FeatureName: Machine Check Enable
[NEW] FeatureName: Machine Check Architect
[NEW] FeatureName: MCG_CTL
[NEW] FeatureName: Pending Break
[NEW] FeatureName: C1E
[NEW] FeatureName: X2Apic
[NEW] FeatureName: PPIN
[NEW] FeatureName: LMCE
[NEW] FeatureName: Proc Trace
[OVERRIDE] FeatureName: ACPI
[OVERRIDE] FeatureName: EIST
[OVERRIDE] FeatureName: FastStrings
[OVERRIDE] FeatureName: Lock Feature Control Register
[OVERRIDE] FeatureName: Limit CpuId Maximum Value
[OVERRIDE] FeatureName: Pending Break
[OVERRIDE] FeatureName: C1E
[OVERRIDE] FeatureName: PPIN
[OVERRIDE] FeatureName: LMCE
[OVERRIDE] FeatureName: Proc Trace
[NEW] FeatureName: L1 Next Page Prefetcher
[NEW] FeatureName: DCU Streamer Prefetcher
[NEW] FeatureName: DCU IP Prefetcher
[NEW] FeatureName: Mlc Streamer Prefetcher
[NEW] FeatureName: Mlc Spatial Prefetcher
[NEW] FeatureName: AMP Prefetcher
[NEW] FeatureName: Three Strike Counter
[NEW] FeatureName: DBP-F
[NEW] FeatureName: Energy Performance Bias
[NEW] FeatureName: C State
[NEW] FeatureName: Thermal management
[NEW] FeatureName: SncInit
[NEW] FeatureName: MbmInit
[NEW] FeatureName: IioLlcWays
[NEW] FeatureName: AcSplitLock
[NEW] FeatureName: CrashDataGprs
:IioLlcWays: Socket = 0
Capid5Csr = 0x6700000B iio_llcconfig_en (Bit[1]) = 1
:IioLlcWays: Socket = 1
Capid5Csr = 0x6700000B iio_llcconfig_en (Bit[1]) = 1
Processor Info: Package: 2, MaxCore : 40, MaxThread: 2
P00: Thread Count = 80
P00 C0000, Thread Count = 2
P00 C0001, Thread Count = 2
P00 C0002, Thread Count = 2
P00 C0003, Thread Count = 2
P00 C0004, Thread Count = 2
P00 C0005, Thread Count = 2
P00 C0006, Thread Count = 2
P00 C0007, Thread Count = 2
P00 C0008, Thread Count = 2
P00 C0009, Thread Count = 2
P00 C0010, Thread Count = 2
P00 C0011, Thread Count = 2
P00 C0012, Thread Count = 2
P00 C0013, Thread Count = 2
P00 C0014, Thread Count = 2
P00 C0015, Thread Count = 2
P00 C0016, Thread Count = 2
P00 C0017, Thread Count = 2
P00 C0018, Thread Count = 2
P00 C0019, Thread Count = 2
P00 C0020, Thread Count = 2
P00 C0021, Thread Count = 2
P00 C0022, Thread Count = 2
P00 C0023, Thread Count = 2
P00 C0024, Thread Count = 2
P00 C0025, Thread Count = 2
P00 C0026, Thread Count = 2
P00 C0027, Thread Count = 2
P00 C0028, Thread Count = 2
P00 C0029, Thread Count = 2
P00 C0030, Thread Count = 2
P00 C0031, Thread Count = 2
P00 C0032, Thread Count = 2
P00 C0033, Thread Count = 2
P00 C0034, Thread Count = 2
P00 C0035, Thread Count = 2
P00 C0036, Thread Count = 2
P00 C0037, Thread Count = 2
P00 C0038, Thread Count = 2
P00 C0039, Thread Count = 2
P01: Thread Count = 80
P01 C0000, Thread Count = 2
P01 C0001, Thread Count = 2
P01 C0002, Thread Count = 2
P01 C0003, Thread Count = 2
P01 C0004, Thread Count = 2
P01 C0005, Thread Count = 2
P01 C0006, Thread Count = 2
P01 C0007, Thread Count = 2
P01 C0008, Thread Count = 2
P01 C0009, Thread Count = 2
P01 C0010, Thread Count = 2
P01 C0011, Thread Count = 2
P01 C0012, Thread Count = 2
P01 C0013, Thread Count = 2
P01 C0014, Thread Count = 2
P01 C0015, Thread Count = 2
P01 C0016, Thread Count = 2
P01 C0017, Thread Count = 2
P01 C0018, Thread Count = 2
P01 C0019, Thread Count = 2
P01 C0020, Thread Count = 2
P01 C0021, Thread Count = 2
P01 C0022, Thread Count = 2
P01 C0023, Thread Count = 2
P01 C0024, Thread Count = 2
P01 C0025, Thread Count = 2
P01 C0026, Thread Count = 2
P01 C0027, Thread Count = 2
P01 C0028, Thread Count = 2
P01 C0029, Thread Count = 2
P01 C0030, Thread Count = 2
P01 C0031, Thread Count = 2
P01 C0032, Thread Count = 2
P01 C0033, Thread Count = 2
P01 C0034, Thread Count = 2
P01 C0035, Thread Count = 2
P01 C0036, Thread Count = 2
P01 C0037, Thread Count = 2
P01 C0038, Thread Count = 2
P01 C0039, Thread Count = 2
Last CPU features list...
[Enable ] FeatureName: AESNI
[Enable ] FeatureName: MWAIT
[Unsupport] FeatureName: ACPI
[Enable ] FeatureName: EIST
[Enable ] FeatureName: FastStrings
[Enable ] FeatureName: VMX
[Unsupport] FeatureName: LMCE
[Disable ] FeatureName: SMX
[Unsupport] FeatureName: Lock Feature Control Register
[Unsupport] FeatureName: Limit CpuId Maximum Value
[Enable ] FeatureName: Machine Check Enable
[Enable ] FeatureName: Machine Check Architect
[Unsupport] FeatureName: MCG_CTL
[Unsupport] FeatureName: Pending Break
[Unsupport] FeatureName: C1E
[Enable ] FeatureName: X2Apic
[Enable ] FeatureName: PPIN
[Unsupport] FeatureName: Proc Trace
[Unsupport] FeatureName: L1 Next Page Prefetcher
[Enable ] FeatureName: DCU Streamer Prefetcher
[Enable ] FeatureName: DCU IP Prefetcher
[Enable ] FeatureName: Mlc Streamer Prefetcher
[Enable ] FeatureName: Mlc Spatial Prefetcher
[Disable ] FeatureName: AMP Prefetcher
[Enable ] FeatureName: Three Strike Counter
[Disable ] FeatureName: DBP-F
[Enable ] FeatureName: Energy Performance Bias
[Enable ] FeatureName: C State
[Enable ] FeatureName: Thermal management
[Enable ] FeatureName: SncInit
[Enable ] FeatureName: MbmInit
[Disable ] FeatureName: IioLlcWays
[Unsupport] FeatureName: AcSplitLock
[Unsupport] FeatureName: CrashDataGprs
PcdCpuFeaturesCapability:
D5 31 60 E9 F1 0D 00 00
Origin PcdCpuFeaturesSetting:
D5 70 60 C5 F0 0D 00 00
Final PcdCpuFeaturesSetting:
D5 30 60 C1 F0 0D 00 00
:SNC: Socket = 0, Processor = 0
SncConfigMsr = 0xA
SncBaseCsr [0x0] = 0xFFF0000
SncBaseCsr [0x1] = 0x1FE00022
SncBaseCsr [0x2] = 0x42
SncBaseCsr [0x3] = 0x62
SncBaseCsr [0x4] = 0x82
SncConfigCsr = 0xF
:MBM: S0 Processor = 0, LlcQosMonEnable = 1
ChasPerCluster = 13, ChaThresholdWithinCluster = 12, CorrectionFactorHi = 123 CorrectionFactorLo = 98
Dump final value for PcdCpuFeaturesSetting:
D5 30 60 C1 F0 0D 00 00
RegisterTable->TableLength = 71
Processor: 0000: Index 0000, MSR : 0000013C, Bit Start: 00, Bit Length: 02, Value: 0000000000000001
Processor: 0000: Index 0001, MSR : 000001A0, Bit Start: 18, Bit Length: 01, Value: 0000000000000001
Processor: 0000: Index 0002, SEMAP: Package
Processor: 0000: Index 0003, MSR : 000001A0, Bit Start: 16, Bit Length: 01, Value: 0000000000000001
Processor: 0000: Index 0004, SEMAP: Package
Processor: 0000: Index 0005, SEMAP: Package
Processor: 0000: Index 0006, MSR : 000001A0, Bit Start: 38, Bit Length: 01, Value: 0000000000000000
Processor: 0000: Index 0007, SEMAP: Package
Processor: 0000: Index 0008, MSR : 00000199, Bit Start: 08, Bit Length: 07, Value: 0000000000000011
Processor: 0000: Index 0009, MSR : 000001A0, Bit Start: 00, Bit Length: 01, Value: 0000000000000001
Processor: 0000: Index 0010, MSR : 0000003A, Bit Start: 02, Bit Length: 01, Value: 0000000000000001
Processor: 0000: Index 0011, CR : 00000004, Bit Start: 14, Bit Length: 01, Value: 0000000000000000
Processor: 0000: Index 0012, MSR : 0000003A, Bit Start: 08, Bit Length: 07, Value: 0000000000000000
Processor: 0000: Index 0013, MSR : 0000003A, Bit Start: 15, Bit Length: 01, Value: 0000000000000000
Processor: 0000: Index 0014, MSR : 0000003A, Bit Start: 01, Bit Length: 01, Value: 0000000000000000
Processor: 0000: Index 0015, CR : 00000004, Bit Start: 06, Bit Length: 01, Value: 0000000000000001
Processor: 0000: Index 0016, MSR : 00000400, Bit Start: 00, Bit Length: 64, Value: FFFFFFFFFFFFFFFF
Processor: 0000: Index 0017, MSR : 00000404, Bit Start: 00, Bit Length: 64, Value: FFFFFFFFFFFFFFFF
Processor: 0000: Index 0018, MSR : 00000408, Bit Start: 00, Bit Length: 64, Value: FFFFFFFFFFFFFFFF
Processor: 0000: Index 0019, MSR : 0000040C, Bit Start: 00, Bit Length: 64, Value: FFFFFFFFFFFFFFFF
Processor: 0000: Index 0020, MSR : 00000410, Bit Start: 00, Bit Length: 64, Value: FFFFFFFFFFFFFFFF
Processor: 0000: Index 0021, MSR : 00000414, Bit Start: 00, Bit Length: 64, Value: FFFFFFFFFFFFFFFF
Processor: 0000: Index 0022, MSR : 00000418, Bit Start: 00, Bit Length: 64, Value: FFFFFFFFFFFFFFFF
Processor: 0000: Index 0023, MSR : 0000041C, Bit Start: 00, Bit Length: 64, Value: FFFFFFFFFFFFFFFF
Processor: 0000: Index 0024, MSR : 00000420, Bit Start: 00, Bit Length: 64, Value: FFFFFFFFFFFFFFFF
Processor: 0000: Index 0025, MSR : 00000424, Bit Start: 00, Bit Length: 64, Value: FFFFFFFFFFFFFFFF
Processor: 0000: Index 0026, MSR : 00000428, Bit Start: 00, Bit Length: 64, Value: FFFFFFFFFFFFFFFF
Processor: 0000: Index 0027, MSR : 0000042C, Bit Start: 00, Bit Length: 64, Value: FFFFFFFFFFFFFFFF
Processor: 0000: Index 0028, MSR : 00000430, Bit Start: 00, Bit Length: 64, Value: FFFFFFFFFFFFFFFF
Processor: 0000: Index 0029, MSR : 00000434, Bit Start: 00, Bit Length: 64, Value: FFFFFFFFFFFFFFFF
Processor: 0000: Index 0030, MSR : 00000438, Bit Start: 00, Bit Length: 64, Value: FFFFFFFFFFFFFFFF
Processor: 0000: Index 0031, MSR : 0000043C, Bit Start: 00, Bit Length: 64, Value: FFFFFFFFFFFFFFFF
Processor: 0000: Index 0032, MSR : 00000440, Bit Start: 00, Bit Length: 64, Value: FFFFFFFFFFFFFFFF
Processor: 0000: Index 0033, MSR : 00000444, Bit Start: 00, Bit Length: 64, Value: FFFFFFFFFFFFFFFF
Processor: 0000: Index 0034, MSR : 00000448, Bit Start: 00, Bit Length: 64, Value: FFFFFFFFFFFFFFFF
Processor: 0000: Index 0035, MSR : 0000044C, Bit Start: 00, Bit Length: 64, Value: FFFFFFFFFFFFFFFF
Processor: 0000: Index 0036, MSR : 00000450, Bit Start: 00, Bit Length: 64, Value: FFFFFFFFFFFFFFFF
Processor: 0000: Index 0037, MSR : 00000454, Bit Start: 00, Bit Length: 64, Value: FFFFFFFFFFFFFFFF
Processor: 0000: Index 0038, MSR : 00000458, Bit Start: 00, Bit Length: 64, Value: FFFFFFFFFFFFFFFF
Processor: 0000: Index 0039, MSR : 0000045C, Bit Start: 00, Bit Length: 64, Value: FFFFFFFFFFFFFFFF
Processor: 0000: Index 0040, MSR : 00000460, Bit Start: 00, Bit Length: 64, Value: FFFFFFFFFFFFFFFF
Processor: 0000: Index 0041, MSR : 00000464, Bit Start: 00, Bit Length: 64, Value: FFFFFFFFFFFFFFFF
Processor: 0000: Index 0042, MSR : 00000468, Bit Start: 00, Bit Length: 64, Value: FFFFFFFFFFFFFFFF
Processor: 0000: Index 0043, MSR : 0000046C, Bit Start: 00, Bit Length: 64, Value: FFFFFFFFFFFFFFFF
Processor: 0000: Index 0044, MSR : 00000470, Bit Start: 00, Bit Length: 64, Value: FFFFFFFFFFFFFFFF
Processor: 0000: Index 0045, MSR : 00000474, Bit Start: 00, Bit Length: 64, Value: FFFFFFFFFFFFFFFF
Processor: 0000: Index 0046, MSR : 00000478, Bit Start: 00, Bit Length: 64, Value: FFFFFFFFFFFFFFFF
Processor: 0000: Index 0047, MSR : 0000047C, Bit Start: 00, Bit Length: 64, Value: FFFFFFFFFFFFFFFF
Processor: 0000: Index 0048, MSR : 0000001B, Bit Start: 10, Bit Length: 01, Value: 0000000000000001
Processor: 0000: Index 0049, MSR : 0000004E, Bit Start: 00, Bit Length: 64, Value: 0000000000000002
Processor: 0000: Index 0050, CACHE: 00000000, Bit Start: 00, Bit Length: 01, Value: 0000000000000000
Processor: 0000: Index 0051, MSR : 000001A4, Bit Start: 05, Bit Length: 01, Value: 0000000000000001
Processor: 0000: Index 0052, CACHE: 00000000, Bit Start: 00, Bit Length: 01, Value: 0000000000000001
Processor: 0000: Index 0053, MSR : 000001A4, Bit Start: 11, Bit Length: 01, Value: 0000000000000000
Processor: 0000: Index 0054, MSR : 0000006D, Bit Start: 02, Bit Length: 02, Value: 0000000000000000
Processor: 0000: Index 0055, MSR : 000001FC, Bit Start: 18, Bit Length: 01, Value: 0000000000000001
Processor: 0000: Index 0056, SEMAP: Package
Processor: 0000: Index 0057, MSR : 000001B0, Bit Start: 00, Bit Length: 04, Value: 0000000000000000
Processor: 0000: Index 0058, MSR : 000000E2, Bit Start: 00, Bit Length: 64, Value: 0000000014000403
Processor: 0000: Index 0059, MSR : 000000E4, Bit Start: 00, Bit Length: 64, Value: 0000000000010514
Processor: 0000: Index 0060, MSR : 000001A0, Bit Start: 03, Bit Length: 01, Value: 0000000000000001
Processor: 0000: Index 0061, MSR : 000001AA, Bit Start: 22, Bit Length: 01, Value: 0000000000000001
Processor: 0000: Index 0062, MSR : 000001A2, Bit Start: 00, Bit Length: 64, Value: 0000000080640800
Processor: 0000: Index 0063, MSR : 00000153, Bit Start: 00, Bit Length: 16, Value: 0000000000000000
Processor: 0000: Index 0064, MSR : 00000154, Bit Start: 00, Bit Length: 16, Value: 0000000000000022
Processor: 0000: Index 0065, MSR : 00000155, Bit Start: 00, Bit Length: 16, Value: 0000000000000042
Processor: 0000: Index 0066, MSR : 00000156, Bit Start: 00, Bit Length: 16, Value: 0000000000000062
Processor: 0000: Index 0067, MSR : 00000157, Bit Start: 00, Bit Length: 16, Value: 0000000000000082
Processor: 0000: Index 0068, MSR : 00000159, Bit Start: 00, Bit Length: 30, Value: 0000000000000000
Processor: 0000: Index 0069, MSR : 00000152, Bit Start: 00, Bit Length: 64, Value: 000000000000000A
Processor: 0000: Index 0070, MSR : 00000CA1, Bit Start: 00, Bit Length: 32, Value: 00000000627B0C0D
Dump final value for PcdCpuFeaturesSetting:
D5 30 60 C1 F0 0D 00 00
:SNC: Socket = 0, Processor = 2
SncConfigMsr = 0xA
SncBaseCsr [0x0] = 0xFFF0000
SncBaseCsr [0x1] = 0x1FE00022
SncBaseCsr [0x2] = 0x42
SncBaseCsr [0x3] = 0x62
SncBaseCsr [0x4] = 0x82
SncConfigCsr = 0xF
Dump final value for PcdCpuFeaturesSetting:
D5 30 60 C1 F0 0D 00 00
Dump final value for PcdCpuFeaturesSetting:
D5 30 60 C1 F0 0D 00 00
:SNC: Socket = 0, Processor = 4
SncConfigMsr = 0xA
SncBaseCsr [0x0] = 0xFFF0000
SncBaseCsr [0x1] = 0x1FE00022
SncBaseCsr [0x2] = 0x42
SncBaseCsr [0x3] = 0x62
SncBaseCsr [0x4] = 0x82
SncConfigCsr = 0xF
Dump final value for PcdCpuFeaturesSetting:
D5 30 60 C1 F0 0D 00 00
Dump final value for PcdCpuFeaturesSetting:
D5 30 60 C1 F0 0D 00 00
:SNC: Socket = 0, Processor = 6
SncConfigMsr = 0xA
SncBaseCsr [0x0] = 0xFFF0000
SncBaseCsr [0x1] = 0x1FE00022
SncBaseCsr [0x2] = 0x42
SncBaseCsr [0x3] = 0x62
SncBaseCsr [0x4] = 0x82
SncConfigCsr = 0xF
Dump final value for PcdCpuFeaturesSetting:
D5 30 60 C1 F0 0D 00 00
Dump final value for PcdCpuFeaturesSetting:
D5 30 60 C1 F0 0D 00 00
:SNC: Socket = 0, Processor = 8
SncConfigMsr = 0xA
SncBaseCsr [0x0] = 0xFFF0000
SncBaseCsr [0x1] = 0x1FE00022
SncBaseCsr [0x2] = 0x42
SncBaseCsr [0x3] = 0x62
SncBaseCsr [0x4] = 0x82
SncConfigCsr = 0xF
Dump final value for PcdCpuFeaturesSetting:
D5 30 60 C1 F0 0D 00 00
Dump final value for PcdCpuFeaturesSetting:
D5 30 60 C1 F0 0D 00 00
:SNC: Socket = 0, Processor = 10
SncConfigMsr = 0xA
SncBaseCsr [0x0] = 0xFFF0000
SncBaseCsr [0x1] = 0x1FE00022
SncBaseCsr [0x2] = 0x42
SncBaseCsr [0x3] = 0x62
SncBaseCsr [0x4] = 0x82
SncConfigCsr = 0xF
Dump final value for PcdCpuFeaturesSetting:
D5 30 60 C1 F0 0D 00 00
Dump final value for PcdCpuFeaturesSetting:
D5 30 60 C1 F0 0D 00 00
:SNC: Socket = 0, Processor = 12
SncConfigMsr = 0xA
SncBaseCsr [0x0] = 0xFFF0000
SncBaseCsr [0x1] = 0x1FE00022
SncBaseCsr [0x2] = 0x42
SncBaseCsr [0x3] = 0x62
SncBaseCsr [0x4] = 0x82
SncConfigCsr = 0xF
Dump final value for PcdCpuFeaturesSetting:
D5 30 60 C1 F0 0D 00 00
Dump final value for PcdCpuFeaturesSetting:
D5 30 60 C1 F0 0D 00 00
:SNC: Socket = 0, Processor = 14
SncConfigMsr = 0xA
SncBaseCsr [0x0] = 0xFFF0000
SncBaseCsr [0x1] = 0x1FE00022
SncBaseCsr [0x2] = 0x42
SncBaseCsr [0x3] = 0x62
SncBaseCsr [0x4] = 0x82
SncConfigCsr = 0xF
Dump final value for PcdCpuFeaturesSetting:
D5 30 60 C1 F0 0D 00 00
Dump final value for PcdCpuFeaturesSetting:
D5 30 60 C1 F0 0D 00 00
:SNC: Socket = 0, Processor = 16
SncConfigMsr = 0xA
SncBaseCsr [0x0] = 0xFFF0000
SncBaseCsr [0x1] = 0x1FE00022
SncBaseCsr [0x2] = 0x42
SncBaseCsr [0x3] = 0x62
SncBaseCsr [0x4] = 0x82
SncConfigCsr = 0xF
Dump final value for PcdCpuFeaturesSetting:
D5 30 60 C1 F0 0D 00 00
Dump final value for PcdCpuFeaturesSetting:
D5 30 60 C1 F0 0D 00 00
:SNC: Socket = 0, Processor = 18
SncConfigMsr = 0xA
SncBaseCsr [0x0] = 0xFFF0000
SncBaseCsr [0x1] = 0x1FE00022
SncBaseCsr [0x2] = 0x42
SncBaseCsr [0x3] = 0x62
SncBaseCsr [0x4] = 0x82
SncConfigCsr = 0xF
Dump final value for PcdCpuFeaturesSetting:
D5 30 60 C1 F0 0D 00 00
Dump final value for PcdCpuFeaturesSetting:
D5 30 60 C1 F0 0D 00 00
:SNC: Socket = 0, Processor = 20
SncConfigMsr = 0xA
SncBaseCsr [0x0] = 0xFFF0000
SncBaseCsr [0x1] = 0x1FE00022
SncBaseCsr [0x2] = 0x42
SncBaseCsr [0x3] = 0x62
SncBaseCsr [0x4] = 0x82
SncConfigCsr = 0xF
Dump final value for PcdCpuFeaturesSetting:
D5 30 60 C1 F0 0D 00 00
Dump final value for PcdCpuFeaturesSetting:
D5 30 60 C1 F0 0D 00 00
:SNC: Socket = 0, Processor = 22
SncConfigMsr = 0xA
SncBaseCsr [0x0] = 0xFFF0000
SncBaseCsr [0x1] = 0x1FE00022
SncBaseCsr [0x2] = 0x42
SncBaseCsr [0x3] = 0x62
SncBaseCsr [0x4] = 0x82
SncConfigCsr = 0xF
Dump final value for PcdCpuFeaturesSetting:
D5 30 60 C1 F0 0D 00 00
Dump final value for PcdCpuFeaturesSetting:
D5 30 60 C1 F0 0D 00 00
:SNC: Socket = 0, Processor = 24
SncConfigMsr = 0xA
SncBaseCsr [0x0] = 0xFFF0000
SncBaseCsr [0x1] = 0x1FE00022
SncBaseCsr [0x2] = 0x42
SncBaseCsr [0x3] = 0x62
SncBaseCsr [0x4] = 0x82
SncConfigCsr = 0xF
Dump final value for PcdCpuFeaturesSetting:
D5 30 60 C1 F0 0D 00 00
Dump final value for PcdCpuFeaturesSetting:
D5 30 60 C1 F0 0D 00 00
:SNC: Socket = 0, Processor = 26
SncConfigMsr = 0xA
SncBaseCsr [0x0] = 0xFFF0000
SncBaseCsr [0x1] = 0x1FE00022
SncBaseCsr [0x2] = 0x42
SncBaseCsr [0x3] = 0x62
SncBaseCsr [0x4] = 0x82
SncConfigCsr = 0xF
Dump final value for PcdCpuFeaturesSetting:
D5 30 60 C1 F0 0D 00 00
Dump final value for PcdCpuFeaturesSetting:
D5 30 60 C1 F0 0D 00 00
:SNC: Socket = 0, Processor = 28
SncConfigMsr = 0xA
SncBaseCsr [0x0] = 0xFFF0000
SncBaseCsr [0x1] = 0x1FE00022
SncBaseCsr [0x2] = 0x42
SncBaseCsr [0x3] = 0x62
SncBaseCsr [0x4] = 0x82
SncConfigCsr = 0xF
Dump final value for PcdCpuFeaturesSetting:
D5 30 60 C1 F0 0D 00 00
Dump final value for PcdCpuFeaturesSetting:
D5 30 60 C1 F0 0D 00 00
:SNC: Socket = 0, Processor = 30
SncConfigMsr = 0xA
SncBaseCsr [0x0] = 0xFFF0000
SncBaseCsr [0x1] = 0x1FE00022
SncBaseCsr [0x2] = 0x42
SncBaseCsr [0x3] = 0x62
SncBaseCsr [0x4] = 0x82
SncConfigCsr = 0xF
Dump final value for PcdCpuFeaturesSetting:
D5 30 60 C1 F0 0D 00 00
Dump final value for PcdCpuFeaturesSetting:
D5 30 60 C1 F0 0D 00 00
:SNC: Socket = 0, Processor = 32
SncConfigMsr = 0xA
SncBaseCsr [0x0] = 0xFFF0000
SncBaseCsr [0x1] = 0x1FE00022
SncBaseCsr [0x2] = 0x42
SncBaseCsr [0x3] = 0x62
SncBaseCsr [0x4] = 0x82
SncConfigCsr = 0xF
Dump final value for PcdCpuFeaturesSetting:
D5 30 60 C1 F0 0D 00 00
Dump final value for PcdCpuFeaturesSetting:
D5 30 60 C1 F0 0D 00 00
:SNC: Socket = 0, Processor = 34
SncConfigMsr = 0xA
SncBaseCsr [0x0] = 0xFFF0000
SncBaseCsr [0x1] = 0x1FE00022
SncBaseCsr [0x2] = 0x42
SncBaseCsr [0x3] = 0x62
SncBaseCsr [0x4] = 0x82
SncConfigCsr = 0xF
Dump final value for PcdCpuFeaturesSetting:
D5 30 60 C1 F0 0D 00 00
Dump final value for PcdCpuFeaturesSetting:
D5 30 60 C1 F0 0D 00 00
:SNC: Socket = 0, Processor = 36
SncConfigMsr = 0xA
SncBaseCsr [0x0] = 0xFFF0000
SncBaseCsr [0x1] = 0x1FE00022
SncBaseCsr [0x2] = 0x42
SncBaseCsr [0x3] = 0x62
SncBaseCsr [0x4] = 0x82
SncConfigCsr = 0xF
Dump final value for PcdCpuFeaturesSetting:
D5 30 60 C1 F0 0D 00 00
Dump final value for PcdCpuFeaturesSetting:
D5 30 60 C1 F0 0D 00 00
:SNC: Socket = 0, Processor = 38
SncConfigMsr = 0xA
SncBaseCsr [0x0] = 0xFFF0000
SncBaseCsr [0x1] = 0x1FE00022
SncBaseCsr [0x2] = 0x42
SncBaseCsr [0x3] = 0x62
SncBaseCsr [0x4] = 0x82
SncConfigCsr = 0xF
Dump final value for PcdCpuFeaturesSetting:
D5 30 60 C1 F0 0D 00 00
Dump final value for PcdCpuFeaturesSetting:
D5 30 60 C1 F0 0D 00 00
:SNC: Socket = 0, Processor = 40
SncConfigMsr = 0xA
SncBaseCsr [0x0] = 0xFFF0000
SncBaseCsr [0x1] = 0x1FE00022
SncBaseCsr [0x2] = 0x42
SncBaseCsr [0x3] = 0x62
SncBaseCsr [0x4] = 0x82
SncConfigCsr = 0xF
Dump final value for PcdCpuFeaturesSetting:
D5 30 60 C1 F0 0D 00 00
Dump final value for PcdCpuFeaturesSetting:
D5 30 60 C1 F0 0D 00 00
:SNC: Socket = 0, Processor = 42
SncConfigMsr = 0xA
SncBaseCsr [0x0] = 0xFFF0000
SncBaseCsr [0x1] = 0x1FE00022
SncBaseCsr [0x2] = 0x42
SncBaseCsr [0x3] = 0x62
SncBaseCsr [0x4] = 0x82
SncConfigCsr = 0xF
Dump final value for PcdCpuFeaturesSetting:
D5 30 60 C1 F0 0D 00 00
Dump final value for PcdCpuFeaturesSetting:
D5 30 60 C1 F0 0D 00 00
:SNC: Socket = 0, Processor = 44
SncConfigMsr = 0xA
SncBaseCsr [0x0] = 0xFFF0000
SncBaseCsr [0x1] = 0x1FE00022
SncBaseCsr [0x2] = 0x42
SncBaseCsr [0x3] = 0x62
SncBaseCsr [0x4] = 0x82
SncConfigCsr = 0xF
Dump final value for PcdCpuFeaturesSetting:
D5 30 60 C1 F0 0D 00 00
Dump final value for PcdCpuFeaturesSetting:
D5 30 60 C1 F0 0D 00 00
:SNC: Socket = 0, Processor = 46
SncConfigMsr = 0xA
SncBaseCsr [0x0] = 0xFFF0000
SncBaseCsr [0x1] = 0x1FE00022
SncBaseCsr [0x2] = 0x42
SncBaseCsr [0x3] = 0x62
SncBaseCsr [0x4] = 0x82
SncConfigCsr = 0xF
Dump final value for PcdCpuFeaturesSetting:
D5 30 60 C1 F0 0D 00 00
Dump final value for PcdCpuFeaturesSetting:
D5 30 60 C1 F0 0D 00 00
:SNC: Socket = 0, Processor = 48
SncConfigMsr = 0xA
SncBaseCsr [0x0] = 0xFFF0000
SncBaseCsr [0x1] = 0x1FE00022
SncBaseCsr [0x2] = 0x42
SncBaseCsr [0x3] = 0x62
SncBaseCsr [0x4] = 0x82
SncConfigCsr = 0xF
Dump final value for PcdCpuFeaturesSetting:
D5 30 60 C1 F0 0D 00 00
Dump final value for PcdCpuFeaturesSetting:
D5 30 60 C1 F0 0D 00 00
:SNC: Socket = 0, Processor = 50
SncConfigMsr = 0xA
SncBaseCsr [0x0] = 0xFFF0000
SncBaseCsr [0x1] = 0x1FE00022
SncBaseCsr [0x2] = 0x42
SncBaseCsr [0x3] = 0x62
SncBaseCsr [0x4] = 0x82
SncConfigCsr = 0xF
Dump final value for PcdCpuFeaturesSetting:
D5 30 60 C1 F0 0D 00 00
Dump final value for PcdCpuFeaturesSetting:
D5 30 60 C1 F0 0D 00 00
:SNC: Socket = 0, Processor = 52
SncConfigMsr = 0xA
SncBaseCsr [0x0] = 0xFFF0000
SncBaseCsr [0x1] = 0x1FE00022
SncBaseCsr [0x2] = 0x42
SncBaseCsr [0x3] = 0x62
SncBaseCsr [0x4] = 0x82
SncConfigCsr = 0xF
Dump final value for PcdCpuFeaturesSetting:
D5 30 60 C1 F0 0D 00 00
Dump final value for PcdCpuFeaturesSetting:
D5 30 60 C1 F0 0D 00 00
:SNC: Socket = 0, Processor = 54
SncConfigMsr = 0xA
SncBaseCsr [0x0] = 0xFFF0000
SncBaseCsr [0x1] = 0x1FE00022
SncBaseCsr [0x2] = 0x42
SncBaseCsr [0x3] = 0x62
SncBaseCsr [0x4] = 0x82
SncConfigCsr = 0xF
Dump final value for PcdCpuFeaturesSetting:
D5 30 60 C1 F0 0D 00 00
Dump final value for PcdCpuFeaturesSetting:
D5 30 60 C1 F0 0D 00 00
:SNC: Socket = 0, Processor = 56
SncConfigMsr = 0xA
SncBaseCsr [0x0] = 0xFFF0000
SncBaseCsr [0x1] = 0x1FE00022
SncBaseCsr [0x2] = 0x42
SncBaseCsr [0x3] = 0x62
SncBaseCsr [0x4] = 0x82
SncConfigCsr = 0xF
Dump final value for PcdCpuFeaturesSetting:
D5 30 60 C1 F0 0D 00 00
Dump final value for PcdCpuFeaturesSetting:
D5 30 60 C1 F0 0D 00 00
:SNC: Socket = 0, Processor = 58
SncConfigMsr = 0xA
SncBaseCsr [0x0] = 0xFFF0000
SncBaseCsr [0x1] = 0x1FE00022
SncBaseCsr [0x2] = 0x42
SncBaseCsr [0x3] = 0x62
SncBaseCsr [0x4] = 0x82
SncConfigCsr = 0xF
Dump final value for PcdCpuFeaturesSetting:
D5 30 60 C1 F0 0D 00 00
Dump final value for PcdCpuFeaturesSetting:
D5 30 60 C1 F0 0D 00 00
:SNC: Socket = 0, Processor = 60
SncConfigMsr = 0xA
SncBaseCsr [0x0] = 0xFFF0000
SncBaseCsr [0x1] = 0x1FE00022
SncBaseCsr [0x2] = 0x42
SncBaseCsr [0x3] = 0x62
SncBaseCsr [0x4] = 0x82
SncConfigCsr = 0xF
Dump final value for PcdCpuFeaturesSetting:
D5 30 60 C1 F0 0D 00 00
Dump final value for PcdCpuFeaturesSetting:
D5 30 60 C1 F0 0D 00 00
:SNC: Socket = 0, Processor = 62
SncConfigMsr = 0xA
SncBaseCsr [0x0] = 0xFFF0000
SncBaseCsr [0x1] = 0x1FE00022
SncBaseCsr [0x2] = 0x42
SncBaseCsr [0x3] = 0x62
SncBaseCsr [0x4] = 0x82
SncConfigCsr = 0xF
Dump final value for PcdCpuFeaturesSetting:
D5 30 60 C1 F0 0D 00 00
Dump final value for PcdCpuFeaturesSetting:
D5 30 60 C1 F0 0D 00 00
:SNC: Socket = 0, Processor = 64
SncConfigMsr = 0xA
SncBaseCsr [0x0] = 0xFFF0000
SncBaseCsr [0x1] = 0x1FE00022
SncBaseCsr [0x2] = 0x42
SncBaseCsr [0x3] = 0x62
SncBaseCsr [0x4] = 0x82
SncConfigCsr = 0xF
Dump final value for PcdCpuFeaturesSetting:
D5 30 60 C1 F0 0D 00 00
Dump final value for PcdCpuFeaturesSetting:
D5 30 60 C1 F0 0D 00 00
:SNC: Socket = 0, Processor = 66
SncConfigMsr = 0xA
SncBaseCsr [0x0] = 0xFFF0000
SncBaseCsr [0x1] = 0x1FE00022
SncBaseCsr [0x2] = 0x42
SncBaseCsr [0x3] = 0x62
SncBaseCsr [0x4] = 0x82
SncConfigCsr = 0xF
Dump final value for PcdCpuFeaturesSetting:
D5 30 60 C1 F0 0D 00 00
Dump final value for PcdCpuFeaturesSetting:
D5 30 60 C1 F0 0D 00 00
:SNC: Socket = 0, Processor = 68
SncConfigMsr = 0xA
SncBaseCsr [0x0] = 0xFFF0000
SncBaseCsr [0x1] = 0x1FE00022
SncBaseCsr [0x2] = 0x42
SncBaseCsr [0x3] = 0x62
SncBaseCsr [0x4] = 0x82
SncConfigCsr = 0xF
Dump final value for PcdCpuFeaturesSetting:
D5 30 60 C1 F0 0D 00 00
Dump final value for PcdCpuFeaturesSetting:
D5 30 60 C1 F0 0D 00 00
:SNC: Socket = 0, Processor = 70
SncConfigMsr = 0xA
SncBaseCsr [0x0] = 0xFFF0000
SncBaseCsr [0x1] = 0x1FE00022
SncBaseCsr [0x2] = 0x42
SncBaseCsr [0x3] = 0x62
SncBaseCsr [0x4] = 0x82
SncConfigCsr = 0xF
Dump final value for PcdCpuFeaturesSetting:
D5 30 60 C1 F0 0D 00 00
Dump final value for PcdCpuFeaturesSetting:
D5 30 60 C1 F0 0D 00 00
:SNC: Socket = 0, Processor = 72
SncConfigMsr = 0xA
SncBaseCsr [0x0] = 0xFFF0000
SncBaseCsr [0x1] = 0x1FE00022
SncBaseCsr [0x2] = 0x42
SncBaseCsr [0x3] = 0x62
SncBaseCsr [0x4] = 0x82
SncConfigCsr = 0xF
Dump final value for PcdCpuFeaturesSetting:
D5 30 60 C1 F0 0D 00 00
Dump final value for PcdCpuFeaturesSetting:
D5 30 60 C1 F0 0D 00 00
:SNC: Socket = 0, Processor = 74
SncConfigMsr = 0xA
SncBaseCsr [0x0] = 0xFFF0000
SncBaseCsr [0x1] = 0x1FE00022
SncBaseCsr [0x2] = 0x42
SncBaseCsr [0x3] = 0x62
SncBaseCsr [0x4] = 0x82
SncConfigCsr = 0xF
Dump final value for PcdCpuFeaturesSetting:
D5 30 60 C1 F0 0D 00 00
Dump final value for PcdCpuFeaturesSetting:
D5 30 60 C1 F0 0D 00 00
:SNC: Socket = 0, Processor = 76
SncConfigMsr = 0xA
SncBaseCsr [0x0] = 0xFFF0000
SncBaseCsr [0x1] = 0x1FE00022
SncBaseCsr [0x2] = 0x42
SncBaseCsr [0x3] = 0x62
SncBaseCsr [0x4] = 0x82
SncConfigCsr = 0xF
Dump final value for PcdCpuFeaturesSetting:
D5 30 60 C1 F0 0D 00 00
Dump final value for PcdCpuFeaturesSetting:
D5 30 60 C1 F0 0D 00 00
:SNC: Socket = 0, Processor = 78
SncConfigMsr = 0xA
SncBaseCsr [0x0] = 0xFFF0000
SncBaseCsr [0x1] = 0x1FE00022
SncBaseCsr [0x2] = 0x42
SncBaseCsr [0x3] = 0x62
SncBaseCsr [0x4] = 0x82
SncConfigCsr = 0xF
Dump final value for PcdCpuFeaturesSetting:
D5 30 60 C1 F0 0D 00 00
Dump final value for PcdCpuFeaturesSetting:
D5 30 60 C1 F0 0D 00 00
:SNC: Socket = 1, Processor = 80
SncConfigMsr = 0xA
SncBaseCsr [0x0] = 0xFFF0082
SncBaseCsr [0x1] = 0x1FE000A2
SncBaseCsr [0x2] = 0xC2
SncBaseCsr [0x3] = 0xE2
SncBaseCsr [0x4] = 0x102
SncConfigCsr = 0xF
:MBM: S1 Processor = 80, LlcQosMonEnable = 1
ChasPerCluster = 13, ChaThresholdWithinCluster = 12, CorrectionFactorHi = 123 CorrectionFactorLo = 98
Dump final value for PcdCpuFeaturesSetting:
D5 30 60 C1 F0 0D 00 00
Dump final value for PcdCpuFeaturesSetting:
D5 30 60 C1 F0 0D 00 00
:SNC: Socket = 1, Processor = 82
SncConfigMsr = 0xA
SncBaseCsr [0x0] = 0xFFF0082
SncBaseCsr [0x1] = 0x1FE000A2
SncBaseCsr [0x2] = 0xC2
SncBaseCsr [0x3] = 0xE2
SncBaseCsr [0x4] = 0x102
SncConfigCsr = 0xF
Dump final value for PcdCpuFeaturesSetting:
D5 30 60 C1 F0 0D 00 00
Dump final value for PcdCpuFeaturesSetting:
D5 30 60 C1 F0 0D 00 00
:SNC: Socket = 1, Processor = 84
SncConfigMsr = 0xA
SncBaseCsr [0x0] = 0xFFF0082
SncBaseCsr [0x1] = 0x1FE000A2
SncBaseCsr [0x2] = 0xC2
SncBaseCsr [0x3] = 0xE2
SncBaseCsr [0x4] = 0x102
SncConfigCsr = 0xF
Dump final value for PcdCpuFeaturesSetting:
D5 30 60 C1 F0 0D 00 00
Dump final value for PcdCpuFeaturesSetting:
D5 30 60 C1 F0 0D 00 00
:SNC: Socket = 1, Processor = 86
SncConfigMsr = 0xA
SncBaseCsr [0x0] = 0xFFF0082
SncBaseCsr [0x1] = 0x1FE000A2
SncBaseCsr [0x2] = 0xC2
SncBaseCsr [0x3] = 0xE2
SncBaseCsr [0x4] = 0x102
SncConfigCsr = 0xF
Dump final value for PcdCpuFeaturesSetting:
D5 30 60 C1 F0 0D 00 00
Dump final value for PcdCpuFeaturesSetting:
D5 30 60 C1 F0 0D 00 00
:SNC: Socket = 1, Processor = 88
SncConfigMsr = 0xA
SncBaseCsr [0x0] = 0xFFF0082
SncBaseCsr [0x1] = 0x1FE000A2
SncBaseCsr [0x2] = 0xC2
SncBaseCsr [0x3] = 0xE2
SncBaseCsr [0x4] = 0x102
SncConfigCsr = 0xF
Dump final value for PcdCpuFeaturesSetting:
D5 30 60 C1 F0 0D 00 00
Dump final value for PcdCpuFeaturesSetting:
D5 30 60 C1 F0 0D 00 00
:SNC: Socket = 1, Processor = 90
SncConfigMsr = 0xA
SncBaseCsr [0x0] = 0xFFF0082
SncBaseCsr [0x1] = 0x1FE000A2
SncBaseCsr [0x2] = 0xC2
SncBaseCsr [0x3] = 0xE2
SncBaseCsr [0x4] = 0x102
SncConfigCsr = 0xF
Dump final value for PcdCpuFeaturesSetting:
D5 30 60 C1 F0 0D 00 00
Dump final value for PcdCpuFeaturesSetting:
D5 30 60 C1 F0 0D 00 00
:SNC: Socket = 1, Processor = 92
SncConfigMsr = 0xA
SncBaseCsr [0x0] = 0xFFF0082
SncBaseCsr [0x1] = 0x1FE000A2
SncBaseCsr [0x2] = 0xC2
SncBaseCsr [0x3] = 0xE2
SncBaseCsr [0x4] = 0x102
SncConfigCsr = 0xF
Dump final value for PcdCpuFeaturesSetting:
D5 30 60 C1 F0 0D 00 00
Dump final value for PcdCpuFeaturesSetting:
D5 30 60 C1 F0 0D 00 00
:SNC: Socket = 1, Processor = 94
SncConfigMsr = 0xA
SncBaseCsr [0x0] = 0xFFF0082
SncBaseCsr [0x1] = 0x1FE000A2
SncBaseCsr [0x2] = 0xC2
SncBaseCsr [0x3] = 0xE2
SncBaseCsr [0x4] = 0x102
SncConfigCsr = 0xF
Dump final value for PcdCpuFeaturesSetting:
D5 30 60 C1 F0 0D 00 00
Dump final value for PcdCpuFeaturesSetting:
D5 30 60 C1 F0 0D 00 00
:SNC: Socket = 1, Processor = 96
SncConfigMsr = 0xA
SncBaseCsr [0x0] = 0xFFF0082
SncBaseCsr [0x1] = 0x1FE000A2
SncBaseCsr [0x2] = 0xC2
SncBaseCsr [0x3] = 0xE2
SncBaseCsr [0x4] = 0x102
SncConfigCsr = 0xF
Dump final value for PcdCpuFeaturesSetting:
D5 30 60 C1 F0 0D 00 00
Dump final value for PcdCpuFeaturesSetting:
D5 30 60 C1 F0 0D 00 00
:SNC: Socket = 1, Processor = 98
SncConfigMsr = 0xA
SncBaseCsr [0x0] = 0xFFF0082
SncBaseCsr [0x1] = 0x1FE000A2
SncBaseCsr [0x2] = 0xC2
SncBaseCsr [0x3] = 0xE2
SncBaseCsr [0x4] = 0x102
SncConfigCsr = 0xF
Dump final value for PcdCpuFeaturesSetting:
D5 30 60 C1 F0 0D 00 00
Dump final value for PcdCpuFeaturesSetting:
D5 30 60 C1 F0 0D 00 00
:SNC: Socket = 1, Processor = 100
SncConfigMsr = 0xA
SncBaseCsr [0x0] = 0xFFF0082
SncBaseCsr [0x1] = 0x1FE000A2
SncBaseCsr [0x2] = 0xC2
SncBaseCsr [0x3] = 0xE2
SncBaseCsr [0x4] = 0x102
SncConfigCsr = 0xF
Dump final value for PcdCpuFeaturesSetting:
D5 30 60 C1 F0 0D 00 00
Dump final value for PcdCpuFeaturesSetting:
D5 30 60 C1 F0 0D 00 00
:SNC: Socket = 1, Processor = 102
SncConfigMsr = 0xA
SncBaseCsr [0x0] = 0xFFF0082
SncBaseCsr [0x1] = 0x1FE000A2
SncBaseCsr [0x2] = 0xC2
SncBaseCsr [0x3] = 0xE2
SncBaseCsr [0x4] = 0x102
SncConfigCsr = 0xF
Dump final value for PcdCpuFeaturesSetting:
D5 30 60 C1 F0 0D 00 00
Dump final value for PcdCpuFeaturesSetting:
D5 30 60 C1 F0 0D 00 00
:SNC: Socket = 1, Processor = 104
SncConfigMsr = 0xA
SncBaseCsr [0x0] = 0xFFF0082
SncBaseCsr [0x1] = 0x1FE000A2
SncBaseCsr [0x2] = 0xC2
SncBaseCsr [0x3] = 0xE2
SncBaseCsr [0x4] = 0x102
SncConfigCsr = 0xF
Dump final value for PcdCpuFeaturesSetting:
D5 30 60 C1 F0 0D 00 00
Dump final value for PcdCpuFeaturesSetting:
D5 30 60 C1 F0 0D 00 00
:SNC: Socket = 1, Processor = 106
SncConfigMsr = 0xA
SncBaseCsr [0x0] = 0xFFF0082
SncBaseCsr [0x1] = 0x1FE000A2
SncBaseCsr [0x2] = 0xC2
SncBaseCsr [0x3] = 0xE2
SncBaseCsr [0x4] = 0x102
SncConfigCsr = 0xF
Dump final value for PcdCpuFeaturesSetting:
D5 30 60 C1 F0 0D 00 00
Dump final value for PcdCpuFeaturesSetting:
D5 30 60 C1 F0 0D 00 00
:SNC: Socket = 1, Processor = 108
SncConfigMsr = 0xA
SncBaseCsr [0x0] = 0xFFF0082
SncBaseCsr [0x1] = 0x1FE000A2
SncBaseCsr [0x2] = 0xC2
SncBaseCsr [0x3] = 0xE2
SncBaseCsr [0x4] = 0x102
SncConfigCsr = 0xF
Dump final value for PcdCpuFeaturesSetting:
D5 30 60 C1 F0 0D 00 00
Dump final value for PcdCpuFeaturesSetting:
D5 30 60 C1 F0 0D 00 00
:SNC: Socket = 1, Processor = 110
SncConfigMsr = 0xA
SncBaseCsr [0x0] = 0xFFF0082
SncBaseCsr [0x1] = 0x1FE000A2
SncBaseCsr [0x2] = 0xC2
SncBaseCsr [0x3] = 0xE2
SncBaseCsr [0x4] = 0x102
SncConfigCsr = 0xF
Dump final value for PcdCpuFeaturesSetting:
D5 30 60 C1 F0 0D 00 00
Dump final value for PcdCpuFeaturesSetting:
D5 30 60 C1 F0 0D 00 00
:SNC: Socket = 1, Processor = 112
SncConfigMsr = 0xA
SncBaseCsr [0x0] = 0xFFF0082
SncBaseCsr [0x1] = 0x1FE000A2
SncBaseCsr [0x2] = 0xC2
SncBaseCsr [0x3] = 0xE2
SncBaseCsr [0x4] = 0x102
SncConfigCsr = 0xF
Dump final value for PcdCpuFeaturesSetting:
D5 30 60 C1 F0 0D 00 00
Dump final value for PcdCpuFeaturesSetting:
D5 30 60 C1 F0 0D 00 00
:SNC: Socket = 1, Processor = 114
SncConfigMsr = 0xA
SncBaseCsr [0x0] = 0xFFF0082
SncBaseCsr [0x1] = 0x1FE000A2
SncBaseCsr [0x2] = 0xC2
SncBaseCsr [0x3] = 0xE2
SncBaseCsr [0x4] = 0x102
SncConfigCsr = 0xF
Dump final value for PcdCpuFeaturesSetting:
D5 30 60 C1 F0 0D 00 00
Dump final value for PcdCpuFeaturesSetting:
D5 30 60 C1 F0 0D 00 00
:SNC: Socket = 1, Processor = 116
SncConfigMsr = 0xA
SncBaseCsr [0x0] = 0xFFF0082
SncBaseCsr [0x1] = 0x1FE000A2
SncBaseCsr [0x2] = 0xC2
SncBaseCsr [0x3] = 0xE2
SncBaseCsr [0x4] = 0x102
SncConfigCsr = 0xF
Dump final value for PcdCpuFeaturesSetting:
D5 30 60 C1 F0 0D 00 00
Dump final value for PcdCpuFeaturesSetting:
D5 30 60 C1 F0 0D 00 00
:SNC: Socket = 1, Processor = 118
SncConfigMsr = 0xA
SncBaseCsr [0x0] = 0xFFF0082
SncBaseCsr [0x1] = 0x1FE000A2
SncBaseCsr [0x2] = 0xC2
SncBaseCsr [0x3] = 0xE2
SncBaseCsr [0x4] = 0x102
SncConfigCsr = 0xF
Dump final value for PcdCpuFeaturesSetting:
D5 30 60 C1 F0 0D 00 00
Dump final value for PcdCpuFeaturesSetting:
D5 30 60 C1 F0 0D 00 00
:SNC: Socket = 1, Processor = 120
SncConfigMsr = 0xA
SncBaseCsr [0x0] = 0xFFF0082
SncBaseCsr [0x1] = 0x1FE000A2
SncBaseCsr [0x2] = 0xC2
SncBaseCsr [0x3] = 0xE2
SncBaseCsr [0x4] = 0x102
SncConfigCsr = 0xF
Dump final value for PcdCpuFeaturesSetting:
D5 30 60 C1 F0 0D 00 00
Dump final value for PcdCpuFeaturesSetting:
D5 30 60 C1 F0 0D 00 00
:SNC: Socket = 1, Processor = 122
SncConfigMsr = 0xA
SncBaseCsr [0x0] = 0xFFF0082
SncBaseCsr [0x1] = 0x1FE000A2
SncBaseCsr [0x2] = 0xC2
SncBaseCsr [0x3] = 0xE2
SncBaseCsr [0x4] = 0x102
SncConfigCsr = 0xF
Dump final value for PcdCpuFeaturesSetting:
D5 30 60 C1 F0 0D 00 00
Dump final value for PcdCpuFeaturesSetting:
D5 30 60 C1 F0 0D 00 00
:SNC: Socket = 1, Processor = 124
SncConfigMsr = 0xA
SncBaseCsr [0x0] = 0xFFF0082
SncBaseCsr [0x1] = 0x1FE000A2
SncBaseCsr [0x2] = 0xC2
SncBaseCsr [0x3] = 0xE2
SncBaseCsr [0x4] = 0x102
SncConfigCsr = 0xF
Dump final value for PcdCpuFeaturesSetting:
D5 30 60 C1 F0 0D 00 00
Dump final value for PcdCpuFeaturesSetting:
D5 30 60 C1 F0 0D 00 00
:SNC: Socket = 1, Processor = 126
SncConfigMsr = 0xA
SncBaseCsr [0x0] = 0xFFF0082
SncBaseCsr [0x1] = 0x1FE000A2
SncBaseCsr [0x2] = 0xC2
SncBaseCsr [0x3] = 0xE2
SncBaseCsr [0x4] = 0x102
SncConfigCsr = 0xF
Dump final value for PcdCpuFeaturesSetting:
D5 30 60 C1 F0 0D 00 00
Dump final value for PcdCpuFeaturesSetting:
D5 30 60 C1 F0 0D 00 00
:SNC: Socket = 1, Processor = 128
SncConfigMsr = 0xA
SncBaseCsr [0x0] = 0xFFF0082
SncBaseCsr [0x1] = 0x1FE000A2
SncBaseCsr [0x2] = 0xC2
SncBaseCsr [0x3] = 0xE2
SncBaseCsr [0x4] = 0x102
SncConfigCsr = 0xF
Dump final value for PcdCpuFeaturesSetting:
D5 30 60 C1 F0 0D 00 00
Dump final value for PcdCpuFeaturesSetting:
D5 30 60 C1 F0 0D 00 00
:SNC: Socket = 1, Processor = 130
SncConfigMsr = 0xA
SncBaseCsr [0x0] = 0xFFF0082
SncBaseCsr [0x1] = 0x1FE000A2
SncBaseCsr [0x2] = 0xC2
SncBaseCsr [0x3] = 0xE2
SncBaseCsr [0x4] = 0x102
SncConfigCsr = 0xF
Dump final value for PcdCpuFeaturesSetting:
D5 30 60 C1 F0 0D 00 00
Dump final value for PcdCpuFeaturesSetting:
D5 30 60 C1 F0 0D 00 00
:SNC: Socket = 1, Processor = 132
SncConfigMsr = 0xA
SncBaseCsr [0x0] = 0xFFF0082
SncBaseCsr [0x1] = 0x1FE000A2
SncBaseCsr [0x2] = 0xC2
SncBaseCsr [0x3] = 0xE2
SncBaseCsr [0x4] = 0x102
SncConfigCsr = 0xF
Dump final value for PcdCpuFeaturesSetting:
D5 30 60 C1 F0 0D 00 00
Dump final value for PcdCpuFeaturesSetting:
D5 30 60 C1 F0 0D 00 00
:SNC: Socket = 1, Processor = 134
SncConfigMsr = 0xA
SncBaseCsr [0x0] = 0xFFF0082
SncBaseCsr [0x1] = 0x1FE000A2
SncBaseCsr [0x2] = 0xC2
SncBaseCsr [0x3] = 0xE2
SncBaseCsr [0x4] = 0x102
SncConfigCsr = 0xF
Dump final value for PcdCpuFeaturesSetting:
D5 30 60 C1 F0 0D 00 00
Dump final value for PcdCpuFeaturesSetting:
D5 30 60 C1 F0 0D 00 00
:SNC: Socket = 1, Processor = 136
SncConfigMsr = 0xA
SncBaseCsr [0x0] = 0xFFF0082
SncBaseCsr [0x1] = 0x1FE000A2
SncBaseCsr [0x2] = 0xC2
SncBaseCsr [0x3] = 0xE2
SncBaseCsr [0x4] = 0x102
SncConfigCsr = 0xF
Dump final value for PcdCpuFeaturesSetting:
D5 30 60 C1 F0 0D 00 00
Dump final value for PcdCpuFeaturesSetting:
D5 30 60 C1 F0 0D 00 00
:SNC: Socket = 1, Processor = 138
SncConfigMsr = 0xA
SncBaseCsr [0x0] = 0xFFF0082
SncBaseCsr [0x1] = 0x1FE000A2
SncBaseCsr [0x2] = 0xC2
SncBaseCsr [0x3] = 0xE2
SncBaseCsr [0x4] = 0x102
SncConfigCsr = 0xF
Dump final value for PcdCpuFeaturesSetting:
D5 30 60 C1 F0 0D 00 00
Dump final value for PcdCpuFeaturesSetting:
D5 30 60 C1 F0 0D 00 00
:SNC: Socket = 1, Processor = 140
SncConfigMsr = 0xA
SncBaseCsr [0x0] = 0xFFF0082
SncBaseCsr [0x1] = 0x1FE000A2
SncBaseCsr [0x2] = 0xC2
SncBaseCsr [0x3] = 0xE2
SncBaseCsr [0x4] = 0x102
SncConfigCsr = 0xF
Dump final value for PcdCpuFeaturesSetting:
D5 30 60 C1 F0 0D 00 00
Dump final value for PcdCpuFeaturesSetting:
D5 30 60 C1 F0 0D 00 00
:SNC: Socket = 1, Processor = 142
SncConfigMsr = 0xA
SncBaseCsr [0x0] = 0xFFF0082
SncBaseCsr [0x1] = 0x1FE000A2
SncBaseCsr [0x2] = 0xC2
SncBaseCsr [0x3] = 0xE2
SncBaseCsr [0x4] = 0x102
SncConfigCsr = 0xF
Dump final value for PcdCpuFeaturesSetting:
D5 30 60 C1 F0 0D 00 00
Dump final value for PcdCpuFeaturesSetting:
D5 30 60 C1 F0 0D 00 00
:SNC: Socket = 1, Processor = 144
SncConfigMsr = 0xA
SncBaseCsr [0x0] = 0xFFF0082
SncBaseCsr [0x1] = 0x1FE000A2
SncBaseCsr [0x2] = 0xC2
SncBaseCsr [0x3] = 0xE2
SncBaseCsr [0x4] = 0x102
SncConfigCsr = 0xF
Dump final value for PcdCpuFeaturesSetting:
D5 30 60 C1 F0 0D 00 00
Dump final value for PcdCpuFeaturesSetting:
D5 30 60 C1 F0 0D 00 00
:SNC: Socket = 1, Processor = 146
SncConfigMsr = 0xA
SncBaseCsr [0x0] = 0xFFF0082
SncBaseCsr [0x1] = 0x1FE000A2
SncBaseCsr [0x2] = 0xC2
SncBaseCsr [0x3] = 0xE2
SncBaseCsr [0x4] = 0x102
SncConfigCsr = 0xF
Dump final value for PcdCpuFeaturesSetting:
D5 30 60 C1 F0 0D 00 00
Dump final value for PcdCpuFeaturesSetting:
D5 30 60 C1 F0 0D 00 00
:SNC: Socket = 1, Processor = 148
SncConfigMsr = 0xA
SncBaseCsr [0x0] = 0xFFF0082
SncBaseCsr [0x1] = 0x1FE000A2
SncBaseCsr [0x2] = 0xC2
SncBaseCsr [0x3] = 0xE2
SncBaseCsr [0x4] = 0x102
SncConfigCsr = 0xF
Dump final value for PcdCpuFeaturesSetting:
D5 30 60 C1 F0 0D 00 00
Dump final value for PcdCpuFeaturesSetting:
D5 30 60 C1 F0 0D 00 00
:SNC: Socket = 1, Processor = 150
SncConfigMsr = 0xA
SncBaseCsr [0x0] = 0xFFF0082
SncBaseCsr [0x1] = 0x1FE000A2
SncBaseCsr [0x2] = 0xC2
SncBaseCsr [0x3] = 0xE2
SncBaseCsr [0x4] = 0x102
SncConfigCsr = 0xF
Dump final value for PcdCpuFeaturesSetting:
D5 30 60 C1 F0 0D 00 00
Dump final value for PcdCpuFeaturesSetting:
D5 30 60 C1 F0 0D 00 00
:SNC: Socket = 1, Processor = 152
SncConfigMsr = 0xA
SncBaseCsr [0x0] = 0xFFF0082
SncBaseCsr [0x1] = 0x1FE000A2
SncBaseCsr [0x2] = 0xC2
SncBaseCsr [0x3] = 0xE2
SncBaseCsr [0x4] = 0x102
SncConfigCsr = 0xF
Dump final value for PcdCpuFeaturesSetting:
D5 30 60 C1 F0 0D 00 00
Dump final value for PcdCpuFeaturesSetting:
D5 30 60 C1 F0 0D 00 00
:SNC: Socket = 1, Processor = 154
SncConfigMsr = 0xA
SncBaseCsr [0x0] = 0xFFF0082
SncBaseCsr [0x1] = 0x1FE000A2
SncBaseCsr [0x2] = 0xC2
SncBaseCsr [0x3] = 0xE2
SncBaseCsr [0x4] = 0x102
SncConfigCsr = 0xF
Dump final value for PcdCpuFeaturesSetting:
D5 30 60 C1 F0 0D 00 00
Dump final value for PcdCpuFeaturesSetting:
D5 30 60 C1 F0 0D 00 00
:SNC: Socket = 1, Processor = 156
SncConfigMsr = 0xA
SncBaseCsr [0x0] = 0xFFF0082
SncBaseCsr [0x1] = 0x1FE000A2
SncBaseCsr [0x2] = 0xC2
SncBaseCsr [0x3] = 0xE2
SncBaseCsr [0x4] = 0x102
SncConfigCsr = 0xF
Dump final value for PcdCpuFeaturesSetting:
D5 30 60 C1 F0 0D 00 00
Dump final value for PcdCpuFeaturesSetting:
D5 30 60 C1 F0 0D 00 00
:SNC: Socket = 1, Processor = 158
SncConfigMsr = 0xA
SncBaseCsr [0x0] = 0xFFF0082
SncBaseCsr [0x1] = 0x1FE000A2
SncBaseCsr [0x2] = 0xC2
SncBaseCsr [0x3] = 0xE2
SncBaseCsr [0x4] = 0x102
SncConfigCsr = 0xF
Dump final value for PcdCpuFeaturesSetting:
D5 30 60 C1 F0 0D 00 00
Dump final value for PcdCpuFeaturesSetting:
D5 30 60 C1 F0 0D 00 00
PROGRESS CODE: V03020003 I0
PROGRESS CODE: V03020002 I0
This is VMB data Parse Pei
Locate PPI Status : 0
Get Variable Status : 0 CoreMegaBlock : 0
CoreMegaBlock [0x00000000]
SizeBelow1MB [0x00000000]
SizeAbove1MB [0x00000000]
SizeAbove4GB [0x00000000]
BaseBelow1MB [0x00050000]
BaseAbove1MB [0x00100000]
BaseAbove4GB [100000000]
VMBdataDiscovered Ppi installation status: 0
PROGRESS CODE: V03020003 I0
PROGRESS CODE: V03020002 I0
This is Validation Mega block Pei
Blocks Count : 3
MegaBlocks in PEIM ...
VMB[0] Attr[4]Addr[50000]Size[0]
VMB[1] Attr[4]Addr[100000]Size[0]
VMB[2] Attr[4]Addr[100000000]Size[0]
PROGRESS CODE: V03020003 I0
PROGRESS CODE: V03020002 I0
UbaInitPeim: PlatformType=0x16
UbaInitPeim: PlatformType=0x16
UbaInitPeim: PlatformType=0x16
PROGRESS CODE: V03020003 I0
PROGRESS CODE: V03020002 I0
PROGRESS CODE: V03020003 I0
PROGRESS CODE: V03020002 I0
PROGRESS CODE: V03020003 I0
PROGRESS CODE: V03020002 I0
Lt Disabled - Disabling BIOS lock
FiaMuxRecordsCount = 0
FiaMuxRecordsCount = 0
FiaMuxRecordsCount = 0
PROGRESS CODE: V03020003 I0
ME UMA PostMem: SendDramInitDone (): InitStat = 0
[HECI Transport-1 PEI] Send pkt: 80140007
00: F0 01 00 00 00 00 00 00 - 00 00 00 00 00 00 00 00
10: 00 00 00 00
[HECI Transport-1 PEI] Got pkt: 80240007
00: F0 81 00 00 00 00 00 00 - 00 00 00 00 00 00 00 00
10: 00 00 00 00 00 00 00 00 - 00 00 00 00 00 04 00 00
20: 00 00 00 00
ME UMA PostMem: BiosAction = 4
ME UMA PostMem: MeDramInitDone Complete. Checking for reset...
[HECI Transport-1 PEI] Send pkt: 80010020
00: 01
[HECI Transport-1 PEI] Got pkt: 800B0020
00: 81 01 01 1D 92 9F 33 01 - 00 00 00
[HECI Transport-1 PEI] Send pkt: 80140008
00: 00 00 05 00 1F 00 00 00 - 00 00 00 00 00 00 00 00
10: 00 00 00 00
[HECI Transport-1 PEI] Got pkt: 805E0008
00: 00 00 05 00 1F 00 00 00 - 00 00 00 00 4A 00 00 00
10: 00 00 00 00 18 18 06 00 - 00 06 00 01 06 00 02 06
20: 00 03 56 00 04 56 00 05 - 56 00 06 56 00 07 5C 00
30: 08 7C 00 09 55 00 0A 55 - 00 0B 5B 00 0C 55 00 0D
40: 51 00 0E 51 00 0F 47 00 - 10 07 00 11 47 00 12 07
50: 00 13 47 00 14 07 00 15 - 47 00 16 07 00 17
PeiFiaMuxConfigInit: IOExpanders number = 0
PeiFiaMuxConfigInit: Request ME FIA MUX configuration fail with status = Not Ready
[HECI Control-1 PEI][HECI Transport-1 PEI] Send pkt: 80010020
00: 01
[HECI Transport-1 PEI] Got pkt: 800B0020
00: 81 01 01 1D 92 9F 33 01 - 00 00 00
Detected I/O Expanders: 0
IoExpanderInit - End
SDI#0 has HD-Audio device.
SDI#1 has no HD-Audio device.
SDI#2 has no HD-Audio device.
PROGRESS CODE: V03020002 I0
PROGRESS CODE: V03020003 I0
PROGRESS CODE: V03020002 I0
PROGRESS CODE: V03020003 I0
PROGRESS CODE: V03020002 I0
PROGRESS CODE: V03020003 I0
PROGRESS CODE: V03020002 I0
NearTdpLockOcPeimEntryPoint
BootMode = 0
ProcessorLtsxEnable is disabled
PROGRESS CODE: V03020003 I0
PROGRESS CODE: V03020002 I0
PROGRESS CODE: V03020003 I0
PROGRESS CODE: V03020002 I0
PROGRESS CODE: V03020003 I0
PROGRESS CODE: V03020002 I0
[FRU_TDX] _ProgramSeamrr BEGIN
[IP_CORE_MSR] IpCoreMsr3v0_ProgramSeamrr BEGIN
_InternalProgramSeamrr (Unsupported) (0x000)
_InternalProgramSeamrr (Unsupported) (0x002)
_InternalProgramSeamrr (Unsupported) (0x004)
_InternalProgramSeamrr (Unsupported) (0x006)
_InternalProgramSeamrr (Unsupported) (0x008)
_InternalProgramSeamrr (Unsupported) (0x00A)
_InternalProgramSeamrr (Unsupported) (0x00C)
_InternalProgramSeamrr (Unsupported) (0x00E)
_InternalProgramSeamrr (Unsupported) (0x010)
_InternalProgramSeamrr (Unsupported) (0x012)
_InternalProgramSeamrr (Unsupported) (0x014)
_InternalProgramSeamrr (Unsupported) (0x016)
_InternalProgramSeamrr (Unsupported) (0x018)
_InternalProgramSeamrr (Unsupported) (0x01A)
_InternalProgramSeamrr (Unsupported) (0x01C)
_InternalProgramSeamrr (Unsupported) (0x01E)
_InternalProgramSeamrr (Unsupported) (0x020)
_InternalProgramSeamrr (Unsupported) (0x022)
_InternalProgramSeamrr (Unsupported) (0x024)
_InternalProgramSeamrr (Unsupported) (0x026)
_InternalProgramSeamrr (Unsupported) (0x028)
_InternalProgramSeamrr (Unsupported) (0x02A)
_InternalProgramSeamrr (Unsupported) (0x02C)
_InternalProgramSeamrr (Unsupported) (0x02E)
_InternalProgramSeamrr (Unsupported) (0x030)
_InternalProgramSeamrr (Unsupported) (0x032)
_InternalProgramSeamrr (Unsupported) (0x034)
_InternalProgramSeamrr (Unsupported) (0x036)
_InternalProgramSeamrr (Unsupported) (0x038)
_InternalProgramSeamrr (Unsupported) (0x03A)
_InternalProgramSeamrr (Unsupported) (0x03C)
_InternalProgramSeamrr (Unsupported) (0x03E)
_InternalProgramSeamrr (Unsupported) (0x040)
_InternalProgramSeamrr (Unsupported) (0x042)
_InternalProgramSeamrr (Unsupported) (0x044)
_InternalProgramSeamrr (Unsupported) (0x046)
_InternalProgramSeamrr (Unsupported) (0x048)
_InternalProgramSeamrr (Unsupported) (0x04A)
_InternalProgramSeamrr (Unsupported) (0x04C)
_InternalProgramSeamrr (Unsupported) (0x04E)
_InternalProgramSeamrr (Unsupported) (0x050)
_InternalProgramSeamrr (Unsupported) (0x052)
_InternalProgramSeamrr (Unsupported) (0x054)
_InternalProgramSeamrr (Unsupported) (0x056)
_InternalProgramSeamrr (Unsupported) (0x058)
_InternalProgramSeamrr (Unsupported) (0x05A)
_InternalProgramSeamrr (Unsupported) (0x05C)
_InternalProgramSeamrr (Unsupported) (0x05E)
_InternalProgramSeamrr (Unsupported) (0x060)
_InternalProgramSeamrr (Unsupported) (0x062)
_InternalProgramSeamrr (Unsupported) (0x064)
_InternalProgramSeamrr (Unsupported) (0x066)
_InternalProgramSeamrr (Unsupported) (0x068)
_InternalProgramSeamrr (Unsupported) (0x06A)
_InternalProgramSeamrr (Unsupported) (0x06C)
_InternalProgramSeamrr (Unsupported) (0x06E)
_InternalProgramSeamrr (Unsupported) (0x070)
_InternalProgramSeamrr (Unsupported) (0x072)
_InternalProgramSeamrr (Unsupported) (0x074)
_InternalProgramSeamrr (Unsupported) (0x076)
_InternalProgramSeamrr (Unsupported) (0x078)
_InternalProgramSeamrr (Unsupported) (0x07A)
_InternalProgramSeamrr (Unsupported) (0x07C)
_InternalProgramSeamrr (Unsupported) (0x07E)
_InternalProgramSeamrr (Unsupported) (0x080)
_InternalProgramSeamrr (Unsupported) (0x082)
_InternalProgramSeamrr (Unsupported) (0x084)
_InternalProgramSeamrr (Unsupported) (0x086)
_InternalProgramSeamrr (Unsupported) (0x088)
_InternalProgramSeamrr (Unsupported) (0x08A)
_InternalProgramSeamrr (Unsupported) (0x08C)
_InternalProgramSeamrr (Unsupported) (0x08E)
_InternalProgramSeamrr (Unsupported) (0x090)
_InternalProgramSeamrr (Unsupported) (0x092)
_InternalProgramSeamrr (Unsupported) (0x094)
_InternalProgramSeamrr (Unsupported) (0x096)
_InternalProgramSeamrr (Unsupported) (0x098)
_InternalProgramSeamrr (Unsupported) (0x09A)
_InternalProgramSeamrr (Unsupported) (0x09C)
_InternalProgramSeamrr (Unsupported) (0x09E)
[IP_CORE_MSR] IpCoreMsr3v0_ProgramSeamrr END, Unsupported
[FRU_TDX] _ProgramSeamrr END (Unsupported)PROGRESS CODE: V03020003 I0
PROGRESS CODE: V03020002 I0
PROGRESS CODE: V03020003 I0
PROGRESS CODE: V03021001 I0
[SIO] Current system SIO exist bit:10
PROGRESS CODE: V03040003 I0
PDB = c:\efi\servergen2\intel\Build\EagleStreamRpPkg\DEBUG_VS2015x86\X64\ServerPlatformPkg\Universal\TraceHubStatusCodeHandler\RuntimeDxe\TraceHubStatusCodeHandlerRuntimeDxe\DEBUG\TraceHubStatusCodeHandlerRuntimeDxe.pdb
PROGRESS CODE: V03040002 I0
PROGRESS CODE: V03040003 I0
PDB = c:\efi\servergen2\intel\Build\EagleStreamRpPkg\DEBUG_VS2015x86\X64\ServerPlatformPkg\Universal\StatusCodeHandlerUsb\RuntimeDxe\StatusCodeHandlerRuntimeDxeUsb\DEBUG\StatusCodeHandlerRuntimeDxeUsb.pdb
PROGRESS CODE: V03040002 I0
PROGRESS CODE: V03040003 I0
PDB = c:\efi\servergen2\intel\Build\EagleStreamRpPkg\DEBUG_VS2015x86\X64\MdeModulePkg\Universal\Acpi\FirmwarePerformanceDataTableDxe\FirmwarePerformanceDxe\DEBUG\FirmwarePerformanceDxe.pdb
PROGRESS CODE: V03040002 I0
PROGRESS CODE: V03040003 I0
PDB = c:\efi\servergen2\intel\Build\EagleStreamRpPkg\DEBUG_VS2015x86\X64\ShellPkg\DynamicCommand\DpDynamicCommand\DpDynamicCommand\DEBUG\dpDynamicCommand.pdb
PROGRESS CODE: V03040002 I0
PROGRESS CODE: V03040003 I0
PDB = c:\efi\servergen2\intel\Build\EagleStreamRpPkg\DEBUG_VS2015x86\X64\EagleStreamOpenBoardPkg\Uba\BoardInit\Dxe\BoardInitDxe\DEBUG\BoardInitDxe.pdb
PROGRESS CODE: V03040002 I0
PROGRESS CODE: V03040003 I0
PDB = c:\efi\servergen2\intel\Build\EagleStreamRpPkg\DEBUG_VS2015x86\X64\EagleStreamRpPkg\Platform\Dxe\IioCxl2CedtDevIou\IioCxl2SsdtInstallDxe\DEBUG\IioCxl2SsdtInstallDxe.pdb
PROGRESS CODE: V03040002 I0
PROGRESS CODE: V03040003 I0
PDB = c:\efi\servergen2\intel\Build\EagleStreamRpPkg\DEBUG_VS2015x86\X64\ServerRestrictedPkg\VariableSmi\VariableSmiExportHii\DEBUG\VariableSmiExportHii.pdb
PROGRESS CODE: V03040002 I0
PROGRESS CODE: V03040003 I0
PDB = c:\efi\servergen2\intel\Build\EagleStreamRpPkg\DEBUG_VS2015x86\X64\ServerPlatformPkg\Platform\Dxe\ConsoleBdsUpdateDxe\ConsoleBdsUpdateDxe\DEBUG\ConsoleBdsUpdateDxe.pdb
PROGRESS CODE: V03040002 I0
PROGRESS CODE: V03040003 I0
PDB = c:\efi\servergen2\intel\Build\EagleStreamRpPkg\DEBUG_VS2015x86\X64\PrmPkg\PrmSsdtInstallDxe\PrmSsdtInstallDxe\DEBUG\PrmSsdtInstallDxe.pdb
PROGRESS CODE: V03040002 I0
PROGRESS CODE: V03040003 I0
PDB = c:\efi\servergen2\intel\Build\EagleStreamRpPkg\DEBUG_VS2015x86\X64\ServerPlatformPkg\Features\PrmPlatformSample\PrmSampleSsdtDxe\PrmSampleSsdtDxe\DEBUG\PrmSampleSsdtDxe.pdb
PROGRESS CODE: V03040002 I0
PROGRESS CODE: V03040003 I0
PDB = c:\efi\servergen2\intel\Build\EagleStreamRpPkg\DEBUG_VS2015x86\X64\ServerPlatformPkg\Features\PrmPeLoader\PrmPeLoaderConfigDxe\PrmPeLoaderConfigDxe\DEBUG\PrmPeLoaderConfigDxe.pdb
PROGRESS CODE: V03040002 I0
[PRM CONFIG] Entry
Error: Image at 0006B857000 start failed: Unsupported
PDB = c:\efi\servergen2\intel\Build\EagleStreamRpPkg\DEBUG_VS2015x86\X64\ServerPlatformPkg\Features\PrmPeLoader\PrmPeLoaderConfigDxe\PrmPeLoaderConfigDxe\DEBUG\PrmPeLoaderConfigDxe.pdb
PROGRESS CODE: V03040003 I0
PDB = c:\efi\servergen2\intel\Build\EagleStreamRpPkg\DEBUG_VS2015x86\X64\MdeModulePkg\Universal\SetupBrowserDxe\SetupBrowserDxe\DEBUG\SetupBrowser.pdb
PROGRESS CODE: V03040002 I0
PROGRESS CODE: V03040003 I0
PDB = c:\efi\servergen2\intel\Build\EagleStreamRpPkg\DEBUG_VS2015x86\X64\MdeModulePkg\Universal\SmbiosMeasurementDxe\SmbiosMeasurementDxe\DEBUG\SmbiosMeasurementDxe.pdb
PROGRESS CODE: V03040002 I0
PROGRESS CODE: V03040003 I0
PDB = c:\efi\servergen2\intel\Build\EagleStreamRpPkg\DEBUG_VS2015x86\X64\ServerSiliconPkg\Universal\Dxe\CxlInit\CxlCedt\CxlCedt\DEBUG\CxlCedt.pdb
PROGRESS CODE: V03040002 I0
PROGRESS CODE: V03040003 I0
PDB = c:\efi\servergen2\intel\Build\EagleStreamRpPkg\DEBUG_VS2015x86\X64\ServerSiliconPkg\Universal\Dxe\OobMsmDxe\OobMsmDxe\DEBUG\OobMsmDxeDriver.pdb
PROGRESS CODE: V03040002 I0
PROGRESS CODE: V03040003 I0
PDB = c:\efi\servergen2\intel\Build\EagleStreamRpPkg\DEBUG_VS2015x86\X64\ClientOneSiliconPkg\Product\EagleStream\SiInit\Dxe\SiInitDxe\DEBUG\SiInitDxe.pdb
PROGRESS CODE: V03040002 I0
PROGRESS CODE: V03040003 I0
PDB = c:\efi\servergen2\intel\Build\EagleStreamRpPkg\DEBUG_VS2015x86\X64\ClientOneSiliconPkg\IpBlock\Smbus\Dxe\SmbusDxe\DEBUG\SmbusDxe.pdb
PROGRESS CODE: V03040002 I0
PROGRESS CODE: V03040003 I0
PDB = c:\efi\servergen2\intel\Build\EagleStreamRpPkg\DEBUG_VS2015x86\X64\ClientOneSiliconPkg\IpBlock\Wdt\Dxe\WdtDxe\DEBUG\WdtDxe.pdb
PROGRESS CODE: V03040002 I0
PROGRESS CODE: V03040003 I0
PDB = c:\efi\servergen2\intel\Build\EagleStreamRpPkg\DEBUG_VS2015x86\X64\ClientOneSiliconPkg\IpBlock\Sps\Heci\HeciAccess\DxeSmm\HeciAccessDxe\DEBUG\HeciAccessDxe.pdb
PROGRESS CODE: V03040002 I0
PROGRESS CODE: V03040003 I0
PDB = c:\efi\servergen2\intel\Build\EagleStreamRpPkg\DEBUG_VS2015x86\X64\ClientOneSiliconPkg\Fru\EbgPch\PchInit\GpioV2ProtocolInit\Dxe\GpioV2ProtocolInitDxe\DEBUG\GpioV2ProtocolInitDxe.pdb
PROGRESS CODE: V03040002 I0
PROGRESS CODE: V03040003 I0
PDB = c:\efi\servergen2\intel\Build\EagleStreamRpPkg\DEBUG_VS2015x86\X64\EagleStreamOpenBoardPkg\Uba\UbaMain\Common\Dxe\SystemBoardInfoDxe\SystemBoardInfoDxe\DEBUG\SystemBoardInfo.pdb
PROGRESS CODE: V03040002 I0
PROGRESS CODE: V03040003 I0
PDB = c:\efi\servergen2\intel\Build\EagleStreamRpPkg\DEBUG_VS2015x86\X64\EagleStreamOpenBoardPkg\Uba\UbaMain\Common\Dxe\SystemConfigUpdateDxe\SystemConfigUpdateDxe\DEBUG\SystemConfigUpdate.pdb
PROGRESS CODE: V03040002 I0
PROGRESS CODE: V03040003 I0
PDB = c:\efi\servergen2\intel\Build\EagleStreamRpPkg\DEBUG_VS2015x86\X64\EagleStreamOpenBoardPkg\Uba\UbaMain\TypeArcherCityRP\Dxe\StaticSkuDataDxe\StaticSkuDataDxe\DEBUG\StaticSkuDataDxeArcherCityRP.pdb
PROGRESS CODE: V03040002 I0
PROGRESS CODE: V03040003 I0
PDB = c:\efi\servergen2\intel\Build\EagleStreamRpPkg\DEBUG_VS2015x86\X64\EagleStreamOpenBoardPkg\Uba\UbaMain\TypeArcherCityRP\Dxe\SetupCfgUpdateDxe\SetupCfgUpdateDxe\DEBUG\SetupConfigUpdateDxeArcherCityRP.pdb
PROGRESS CODE: V03040002 I0
PROGRESS CODE: V03040003 I0
PDB = c:\efi\servergen2\intel\Build\EagleStreamRpPkg\DEBUG_VS2015x86\X64\EagleStreamOpenBoardPkg\Uba\UbaMain\TypeArcherCityRP\Dxe\SmbiosDataUpdateDxe\SmbiosDataUpdateDxe\DEBUG\SmbiosDataUpdateDxeArcherCityRP.pdb
PROGRESS CODE: V03040002 I0
UBA:SmbiosDataUpdateEntry Image GUID=09813137-B2A5-4462-8A2A-48F77ECA31BF
PROGRESS CODE: V03040003 I0
PDB = c:\efi\servergen2\intel\Build\EagleStreamRpPkg\DEBUG_VS2015x86\X64\EagleStreamOpenBoardPkg\Uba\UbaMain\TypeArcherCityRP\Dxe\UsbOcUpdateDxe\UsbOcUpdateDxe\DEBUG\UsbOcUpdateDxeArcherCityRP.pdb
PROGRESS CODE: V03040002 I0
PROGRESS CODE: V03040003 I0
PDB = c:\efi\servergen2\intel\Build\EagleStreamRpPkg\DEBUG_VS2015x86\X64\ServerPlatformPkg\Platform\Dxe\PlatformType\PlatformType\DEBUG\PlatformType.pdb
PROGRESS CODE: V03040002 I0
PROGRESS CODE: V03040003 I0
PDB = c:\efi\servergen2\intel\Build\EagleStreamRpPkg\DEBUG_VS2015x86\X64\ServerPlatformPkg\Platform\Dxe\PlatformEarlyDxe\PlatformEarlyDxe\DEBUG\PlatformEarlyDxe.pdb
PROGRESS CODE: V03040002 I0
PROGRESS CODE: V03040003 I0
PDB = c:\efi\servergen2\intel\Build\EagleStreamRpPkg\DEBUG_VS2015x86\X64\ServerPlatformPkg\Platform\Dxe\OtaDxe\OtaDxe\DEBUG\OtaDxeDriver.pdb
PROGRESS CODE: V03040002 I0
[OtaDxe.c] OtaDxeDriverEntry() {
[OtaDxe.c] OtaDxeDriverEntry() -> Create OTA Event
[OtaDxe.c] OtaDxeDriverEntry() -> OTA Event creation: Success
[OtaDxe.c] OtaDxeDriverEntry() } Success
PROGRESS CODE: V03040003 I0
PDB = c:\efi\servergen2\intel\Build\EagleStreamRpPkg\DEBUG_VS2015x86\X64\ServerSecurityPkg\Pfr\Restricted\DebugTool\PxdDxe\DEBUG\PxdDxeDriver.pdb
PROGRESS CODE: V03040002 I0
[PxdDxe.c] PxdDxeDriverEntry() {
[PxdDxe.c] PxdDxeDriverEntry() } Success
PROGRESS CODE: V03040003 I0
PDB = c:\efi\servergen2\intel\Build\EagleStreamRpPkg\DEBUG_VS2015x86\X64\UefiCpuPkg\CpuDxe\CpuDxe\DEBUG\CpuDxe.pdb
PROGRESS CODE: V03040002 I0
ConvertPages: failed to find range A0000 - FFFFF
ConvertPages: failed to find range 77800000 - 7FFFFFFF
ConvertPages: failed to find range FC800000 - FE00FFFF
ConvertPages: failed to find range FE010000 - FE010FFF
ConvertPages: failed to find range FE011000 - FE7FFFFF
ConvertPages: failed to find range FEC00000 - FEC00FFF
ConvertPages: failed to find range FEC80000 - FED00FFF
PROGRESS CODE: V03040003 I0
PDB = c:\efi\servergen2\intel\Build\EagleStreamRpPkg\DEBUG_VS2015x86\X64\ServerPlatformPkg\Features\Bmc\PlatformHookSpiAccess\PlatformHookSpiAccessDxe\DEBUG\PlatformHookSpiAccessDxe.pdb
PROGRESS CODE: V03040002 I0
PROGRESS CODE: V03040003 I0
PDB = c:\efi\servergen2\intel\Build\EagleStreamRpPkg\DEBUG_VS2015x86\X64\MdeModulePkg\Universal\BdsDxe\BdsDxe\DEBUG\BdsDxe.pdb
PROGRESS CODE: V03040002 I0
PROGRESS CODE: V03040003 I0
PDB = c:\efi\servergen2\intel\Build\EagleStreamRpPkg\DEBUG_VS2015x86\X64\ServerPlatformPkg\Platform\Dxe\Hsti\HstiIhvProviderDxe\HstiIhvProviderDxeEGS\DEBUG\HstiIhvProviderDxeEGS.pdb
PROGRESS CODE: V03040002 I0
PROGRESS CODE: V03040003 I0
PDB = c:\efi\servergen2\intel\Build\EagleStreamRpPkg\DEBUG_VS2015x86\X64\MdeModulePkg\Universal\Acpi\S3SaveStateDxe\S3SaveStateDxe\DEBUG\S3SaveStateDxe.pdb
PROGRESS CODE: V03040002 I0
PROGRESS CODE: V03040003 I0
PDB = c:\efi\servergen2\intel\Build\EagleStreamRpPkg\DEBUG_VS2015x86\X64\ServerPlatformPkg\Platform\Dxe\PlatformFirmwareVersionInfoDxe\PlatformFirmwareVersionInfoDxe\DEBUG\PlatformFirmwareVersionInfo.pdb
PROGRESS CODE: V03040002 I0
PROGRESS CODE: V03040003 I0
PDB = c:\efi\servergen2\intel\Build\EagleStreamRpPkg\DEBUG_VS2015x86\X64\ServerPlatformPkg\Features\Acpi\BmcAcpiDxe\BmcAcpiDxe\DEBUG\BmcAcpiDxe.pdb
PROGRESS CODE: V03040002 I0
PROGRESS CODE: V03040003 I0
PDB = c:\efi\servergen2\intel\Build\EagleStreamRpPkg\DEBUG_VS2015x86\X64\ClientOneSiliconPkg\IpBlock\Me\ResetHandler\Dxe\ResetHandler\DEBUG\ResetHandler.pdb
PROGRESS CODE: V03040002 I0
PROGRESS CODE: V03040003 I0
PDB = c:\efi\servergen2\intel\Build\EagleStreamRpPkg\DEBUG_VS2015x86\X64\ServerRasPkg\Driver\Dxe\CrashLogDxe\CrashLogDxe\DEBUG\CrashLogDxe.pdb
PROGRESS CODE: V03040002 I0
Reading CPU 0 WatcherCfgBlk->Data64[0x0] = 0x10000700 address = 0xC6B57000!
Reading CPU 0 WatcherCfgBlk->Data64[0x1] = 0x0 address = 0xC6B57008!
Reading CPU 0 WatcherCfgBlk->Data64[0x0] = 0x10000700 address = 0xC6B57000!
Reading CPU 0 WatcherCfgBlk->Data64[0x1] = 0x0 address = 0xC6B57008!
Writing CPU 0 WatcherCfgBlk->Data64[0x0] = 0x10000700! address = 0xC6B57000
Writing CPU 0 WatcherCfgBlk->Data64[0x1] = 0x0! address = 0xC6B57008
Reading CPU 0 WatcherCfgBlk->Data64[0x0] = 0x10000700 address = 0xC6B57000!
Reading CPU 0 WatcherCfgBlk->Data64[0x1] = 0x0 address = 0xC6B57008!
Reading CPU 1 WatcherCfgBlk->Data64[0x0] = 0x10000700 address = 0xF9B57000!
Reading CPU 1 WatcherCfgBlk->Data64[0x1] = 0x0 address = 0xF9B57008!
Reading CPU 1 WatcherCfgBlk->Data64[0x0] = 0x10000700 address = 0xF9B57000!
Reading CPU 1 WatcherCfgBlk->Data64[0x1] = 0x0 address = 0xF9B57008!
Writing CPU 1 WatcherCfgBlk->Data64[0x0] = 0x10000700! address = 0xF9B57000
Writing CPU 1 WatcherCfgBlk->Data64[0x1] = 0x0! address = 0xF9B57008
Reading CPU 1 WatcherCfgBlk->Data64[0x0] = 0x10000700 address = 0xF9B57000!
Reading CPU 1 WatcherCfgBlk->Data64[0x1] = 0x0 address = 0xF9B57008!
Reading CPU 0 WatcherCfgBlk->Data64[0x0] = 0x10000700 address = 0xC6B57000!
Reading CPU 0 WatcherCfgBlk->Data64[0x1] = 0x0 address = 0xC6B57008!
Socket 0 entry 0 CrashDump_Complete is not set in CPU CrashLog Discovery Header!
Socket 0 entry 1 CrashDump_Complete is not set in CPU CrashLog Discovery Header!
Socket 0 entry 2 CrashDump_Complete is not set in CPU CrashLog Discovery Header!
Socket 0 entry 3 CrashDump_Complete is not set in CPU CrashLog Discovery Header!
Socket 0 entry 4 CrashDump_Complete is not set in CPU CrashLog Discovery Header!
Socket 0 entry 5 CrashDump_Complete is not set in CPU CrashLog Discovery Header!
Socket 0 entry 6 CrashDump_Complete is not set in CPU CrashLog Discovery Header!
Unknown AccessType = F !
can't get CPU CrashLog Region Address and size !
Reading CPU 1 WatcherCfgBlk->Data64[0x0] = 0x10000700 address = 0xF9B57000!
Reading CPU 1 WatcherCfgBlk->Data64[0x1] = 0x0 address = 0xF9B57008!
Socket 1 entry 0 CrashDump_Complete is not set in CPU CrashLog Discovery Header!
Socket 1 entry 1 CrashDump_Complete is not set in CPU CrashLog Discovery Header!
Socket 1 entry 2 CrashDump_Complete is not set in CPU CrashLog Discovery Header!
Socket 1 entry 3 CrashDump_Complete is not set in CPU CrashLog Discovery Header!
Unknown AccessType = F !
can't get CPU CrashLog Region Address and size !
Unknown AccessType = F !
can't get CPU CrashLog Region Address and size !
Unknown AccessType = F !
can't get CPU CrashLog Region Address and size !
Unknown AccessType = F !
can't get CPU CrashLog Region Address and size !
PchCrashLogDiscovery - first DWORD of Record 0 is Zero
PchCrashLogDiscovery - first DWORD of Record 1 is Zero
PchCrashLogDiscovery - first DWORD of Record 2 is Zero
PROGRESS CODE: V03040003 I0
PDB = c:\efi\servergen2\intel\Build\EagleStreamRpPkg\DEBUG_VS2015x86\X64\ServerRasPkg\Driver\Dxe\RasMiscDxe\RasMiscDxe\DEBUG\RasMiscDxe.pdb
PROGRESS CODE: V03040002 I0
PROGRESS CODE: V03040003 I0
PDB = c:\efi\servergen2\intel\Build\EagleStreamRpPkg\DEBUG_VS2015x86\X64\MdeModulePkg\Universal\PlatformDriOverrideDxe\PlatformDriOverrideDxe\DEBUG\PlatDriOverrideDxe.pdb
PROGRESS CODE: V03040002 I0
PROGRESS CODE: V03040003 I0
PDB = c:\efi\servergen2\intel\Build\EagleStreamRpPkg\DEBUG_VS2015x86\X64\MdeModulePkg\Universal\DisplayEngineDxe\DisplayEngineDxe\DEBUG\DisplayEngine.pdb
PROGRESS CODE: V03040002 I0
PROGRESS CODE: V03040003 I0
PDB = c:\efi\servergen2\intel\Build\EagleStreamRpPkg\DEBUG_VS2015x86\X64\NetworkPkg\TlsAuthConfigDxe\TlsAuthConfigDxe\DEBUG\TlsAuthConfigDxe.pdb
PROGRESS CODE: V03040002 I0
PROGRESS CODE: V03040003 I0
PDB = c:\efi\servergen2\intel\Build\EagleStreamRpPkg\DEBUG_VS2015x86\X64\ServerSiliconPkg\Universal\Dxe\CxlInit\MemMap\CxlDxe\DEBUG\CxlDxe.pdb
PROGRESS CODE: V03040002 I0
PROGRESS CODE: V03040003 I0
PDB = c:\efi\servergen2\intel\Build\EagleStreamRpPkg\DEBUG_VS2015x86\X64\ServerSiliconPkg\Universal\Dxe\HbmMemMap\HbmMemMap\DEBUG\HbmMemMap.pdb
PROGRESS CODE: V03040002 I0
PROGRESS CODE: V03040003 I0
PDB = c:\efi\servergen2\intel\Build\EagleStreamRpPkg\DEBUG_VS2015x86\X64\ClientOneSiliconPkg\IpBlock\Me\HeciTransport\DxeSmm\HeciTransportDxe\DEBUG\HeciTransportDxe.pdb
PROGRESS CODE: V03040002 I0
PROGRESS CODE: V03040003 I0
PDB = c:\efi\servergen2\intel\Build\EagleStreamRpPkg\DEBUG_VS2015x86\X64\ServerSiliconPkg\Me\Client\ClientCore\Dxe\ClientCore\DEBUG\ClientCore.pdb
PROGRESS CODE: V03040002 I0
PROGRESS CODE: V03040003 I0
PDB = c:\efi\servergen2\intel\Build\EagleStreamRpPkg\DEBUG_VS2015x86\X64\PcAtChipsetPkg\HpetTimerDxe\HpetTimerDxe\DEBUG\HpetTimerDxe.pdb
PROGRESS CODE: V03040002 I0
PROGRESS CODE: V03040003 I0
PDB = c:\efi\servergen2\intel\Build\EagleStreamRpPkg\DEBUG_VS2015x86\X64\UefiCpuPkg\CpuS3DataDxe\CpuS3DataDxe\DEBUG\CpuS3DataDxe.pdb
PROGRESS CODE: V03040002 I0
PROGRESS CODE: V03040003 I0
PDB = c:\efi\servergen2\intel\Build\EagleStreamRpPkg\DEBUG_VS2015x86\X64\ServerPlatformPkg\Features\Pci\Dxe\PciHostBridge\PciHostBridgeSpr\DEBUG\PciHostBridge.pdb
PROGRESS CODE: V03040002 I0
PROGRESS CODE: V03040003 I0
PDB = c:\efi\servergen2\intel\Build\EagleStreamRpPkg\DEBUG_VS2015x86\X64\ServerPlatformPkg\Platform\Dxe\Hsti\HstiIbvPlatformDxe\HstiIbvPlatformDxe\DEBUG\HstiPlatformDxe.pdb
PROGRESS CODE: V03040002 I0
PROGRESS CODE: V03040003 I0
PDB = c:\efi\servergen2\intel\Build\EagleStreamRpPkg\DEBUG_VS2015x86\X64\ServerPlatformPkg\Features\Cpu\Dxe\GetCpuInfo\GetCpuInfo\DEBUG\GetCpuInfo.pdb
PROGRESS CODE: V03040002 I0
PROGRESS CODE: V03040003 I0
PDB = c:\efi\servergen2\intel\Build\EagleStreamRpPkg\DEBUG_VS2015x86\X64\ServerPlatformPkg\Restricted\Overclocking\NearTDPClearOc\NearTDPClearOc\DEBUG\NearTDPClearOc.pdb
PROGRESS CODE: V03040002 I0
PROGRESS CODE: V03040003 I0
PDB = c:\efi\servergen2\intel\Build\EagleStreamRpPkg\DEBUG_VS2015x86\X64\MicrocodeUpdateFeaturePkg\MicrocodeUtility\MicrocodeUtilityDxe\DEBUG\MicrocodeUtilityDxe.pdb
PROGRESS CODE: V03040002 I0
Microcode utility not supported.
PROGRESS CODE: V03040003 I0
PDB = c:\efi\servergen2\intel\Build\EagleStreamRpPkg\DEBUG_VS2015x86\X64\MicrocodeUpdateFeaturePkg\MicrocodeUtility\MicrocodeUtilityDxe\DEBUG\MicrocodeUtilityDxe.pdb
PROGRESS CODE: V03040002 I0
Microcode utility not supported.
PROGRESS CODE: V03040003 I0
PDB = c:\efi\servergen2\intel\Build\EagleStreamRpPkg\DEBUG_VS2015x86\X64\ClientOneSiliconPkg\Fru\EbgPch\PchInit\Dxe\PchInitDxe\DEBUG\PchInitDxeEbg.pdb
PROGRESS CODE: V03040002 I0
PROGRESS CODE: V03040003 I0
PDB = c:\efi\servergen2\intel\Build\EagleStreamRpPkg\DEBUG_VS2015x86\X64\ServerSiliconPkg\Universal\Smm\Access\SmmAccess\DEBUG\SmmAccess.pdb
PROGRESS CODE: V03040002 I0
PROGRESS CODE: V03040003 I0
PDB = c:\efi\servergen2\intel\Build\EagleStreamRpPkg\DEBUG_VS2015x86\X64\ClientOneSiliconPkg\IpBlock\Sps\Heci\HeciControl\DxeSmm\HeciControlDxe\DEBUG\HeciControlDxe.pdb
PROGRESS CODE: V03040002 I0
Initialization is allowed
Initialization is allowed
PROGRESS CODE: V03040003 I0
PDB = c:\efi\servergen2\intel\Build\EagleStreamRpPkg\DEBUG_VS2015x86\X64\MdeModulePkg\Universal\WatchdogTimerDxe\WatchdogTimer\DEBUG\WatchdogTimer.pdb
PROGRESS CODE: V03040002 I0
PROGRESS CODE: V03040003 I0
PDB = c:\efi\servergen2\intel\Build\EagleStreamRpPkg\DEBUG_VS2015x86\X64\ServerPlatformPkg\Platform\SpiFvbServices\PlatformSpi\DEBUG\FwBlockService.pdb
PROGRESS CODE: V03040002 I0
FvImage on FvHandle 6B21C818 and 769B0518 has the same FvNameGuid 27A72E80-3118-4C0C-8673-AA5B4EFA9613.
FvImage on FvHandle 6B21C398 and 769A6818 has the same FvNameGuid 5A515240-D1F1-4C58-9590-27B1F0E86827.
FvImage on FvHandle 6B21B598 and 769A9A18 has the same FvNameGuid D2C29BA7-3809-480F-9C3D-DE389C61425A.
FvImage on FvHandle 6B200918 and 769B0618 has the same FvNameGuid 6522280D-28F9-4131-ADC4-F40EBFA45864.
PROGRESS CODE: V03040003 I0
PDB = c:\efi\servergen2\intel\Build\EagleStreamRpPkg\DEBUG_VS2015x86\X64\ServerPlatformPkg\Features\Pci\Dxe\PciPlatform\PciPlatform\DEBUG\PciPlatform.pdb
PROGRESS CODE: V03040002 I0
PROGRESS CODE: V03040003 I0
PDB = c:\efi\servergen2\intel\Build\EagleStreamRpPkg\DEBUG_VS2015x86\X64\IntelSiliconPkg\Feature\VTd\IntelVTdDxe\IntelVTdDxe\DEBUG\IntelVTdDxe.pdb
PROGRESS CODE: V03040002 I0
Error: Image at 0006AE3B000 start failed: Unsupported
PDB = c:\efi\servergen2\intel\Build\EagleStreamRpPkg\DEBUG_VS2015x86\X64\IntelSiliconPkg\Feature\VTd\IntelVTdDxe\IntelVTdDxe\DEBUG\IntelVTdDxe.pdb
PROGRESS CODE: V03040003 I0
PDB = c:\efi\servergen2\intel\Build\EagleStreamRpPkg\DEBUG_VS2015x86\X64\ClientOneSiliconPkg\IpBlock\Sps\Heci\HeciLegacyDxe\HeciLegacyDxe\DEBUG\HeciLegacyDxe.pdb
PROGRESS CODE: V03040002 I0
PROGRESS CODE: V03040003 I0
PDB = c:\efi\servergen2\intel\Build\EagleStreamRpPkg\DEBUG_VS2015x86\X64\MdeModulePkg\Core\PiSmmCore\PiSmmIpl\DEBUG\PiSmmIpl.pdb
PROGRESS CODE: V03040002 I0
ConvertPages: failed to find range 78000000 - 7FFFFFFF
PDB = c:\efi\servergen2\intel\Build\EagleStreamRpPkg\DEBUG_VS2015x86\X64\MdeModulePkg\Core\PiSmmCore\PiSmmCore\DEBUG\PiSmmCore.pdb
[SIO] Current system SIO exist bit:10
PROGRESS CODE: V03040003 I0
PDB = c:\efi\servergen2\intel\Build\EagleStreamRpPkg\DEBUG_VS2015x86\X64\ServerSiliconPkg\Universal\Smm\CsrPseudoOffsetInit\CsrPseudoOffsetInitSmm\DEBUG\CsrPseudoOffsetInitSmm.pdb
PDB = c:\efi\servergen2\intel\Build\EagleStreamRpPkg\DEBUG_VS2015x86\X64\ServerSiliconPkg\Universal\Smm\SiliconDataInit\SiliconDataInitSmm\DEBUG\SiliconDataInitSmm.pdb
PDB = c:\efi\servergen2\intel\Build\EagleStreamRpPkg\DEBUG_VS2015x86\X64\ServerSiliconPkg\Universal\Smm\SpdPlatformInfoSmm\SpdPlatformInfoSmm\DEBUG\SpdPlatformInfoSmm.pdb
PDB = c:\efi\servergen2\intel\Build\EagleStreamRpPkg\DEBUG_VS2015x86\X64\MdeModulePkg\Universal\ReportStatusCodeRouter\Smm\ReportStatusCodeRouterSmm\DEBUG\ReportStatusCodeRouterSmm.pdb
PDB = c:\efi\servergen2\intel\Build\EagleStreamRpPkg\DEBUG_VS2015x86\X64\MdeModulePkg\Universal\Variable\RuntimeDxe\VariableSmm\DEBUG\VariableSmm.pdb
PDB = c:\efi\servergen2\intel\Build\EagleStreamRpPkg\DEBUG_VS2015x86\X64\UefiCpuPkg\CpuIo2Smm\CpuIo2Smm\DEBUG\CpuIo2Smm.pdb
PDB = c:\efi\servergen2\intel\Build\EagleStreamRpPkg\DEBUG_VS2015x86\X64\MdeModulePkg\Universal\LockBox\SmmLockBox\SmmLockBox\DEBUG\SmmLockBox.pdb
PDB = c:\efi\servergen2\intel\Build\EagleStreamRpPkg\DEBUG_VS2015x86\X64\CpRcPkg\Universal\RegAccess\Smm\RegAccessSMM\DEBUG\RegAccessSMM.pdb
PDB = c:\efi\servergen2\intel\Build\EagleStreamRpPkg\DEBUG_VS2015x86\X64\ServerPlatformPkg\Universal\TraceHubStatusCodeHandler\Smm\TraceHubStatusCodeHandlerSmm\DEBUG\TraceHubStatusCodeHandlerSmm.pdb
PDB = c:\efi\servergen2\intel\Build\EagleStreamRpPkg\DEBUG_VS2015x86\X64\MdeModulePkg\Universal\Acpi\FirmwarePerformanceDataTableSmm\FirmwarePerformanceSmm\DEBUG\FirmwarePerformanceSmm.pdb
PDB = c:\efi\servergen2\intel\Build\EagleStreamRpPkg\DEBUG_VS2015x86\X64\ServerPlatformPkg\Features\Variable\PlatformVariable\Smm\PlatformSecureVariableSmm\DEBUG\PlatformSecureVariableSmm.pdb
PDB = c:\efi\servergen2\intel\Build\EagleStreamRpPkg\DEBUG_VS2015x86\X64\ServerSiliconPkg\Universal\Dxe\CpuCsrAccess\CpuCsrAccessSMM\DEBUG\CpuCsrAccessSMM.pdb
PDB = c:\efi\servergen2\intel\Build\EagleStreamRpPkg\DEBUG_VS2015x86\X64\ClientOneSiliconPkg\IpBlock\Smbus\Smm\SmbusSmm\DEBUG\SmbusSmm.pdb
PDB = c:\efi\servergen2\intel\Build\EagleStreamRpPkg\DEBUG_VS2015x86\X64\ClientOneSiliconPkg\IpBlock\Sps\Heci\HeciAccess\DxeSmm\HeciAccessSmm\DEBUG\HeciAccessSmm.pdb
PDB = c:\efi\servergen2\intel\Build\EagleStreamRpPkg\DEBUG_VS2015x86\X64\MdeModulePkg\Universal\StatusCodeHandler\Smm\StatusCodeHandlerSmm\DEBUG\StatusCodeHandlerSmm.pdb
PROGRESS CODE: V03070003 I0
PDB = c:\efi\servergen2\intel\Build\EagleStreamRpPkg\DEBUG_VS2015x86\X64\ServerPlatformPkg\Features\Bmc\PlatformHookSpiAccess\PlatformHookSpiAccessSmm\DEBUG\PlatformHookSpiAccessSmm.pdb
PROGRESS CODE: V03070002 I0
PROGRESS CODE: V03070003 I0
PDB = c:\efi\servergen2\intel\Build\EagleStreamRpPkg\DEBUG_VS2015x86\X64\ClientOneSiliconPkg\IpBlock\Me\HeciTransport\DxeSmm\HeciTransportSmm\DEBUG\HeciTransportSmm.pdb
PROGRESS CODE: V03070002 I0
PROGRESS CODE: V03070003 I0
PDB = c:\efi\servergen2\intel\Build\EagleStreamRpPkg\DEBUG_VS2015x86\X64\ClientOneSiliconPkg\IpBlock\Sps\Heci\HeciControl\DxeSmm\HeciControlSmm\DEBUG\HeciControlSmm.pdb
PROGRESS CODE: V03070002 I0
Initialization is allowed
Initialization is allowed
PROGRESS CODE: V03070003 I0
PDB = c:\efi\servergen2\intel\Build\EagleStreamRpPkg\DEBUG_VS2015x86\X64\ServerSiliconPkg\Universal\Dxe\PmemResetNotify\PmemResetNotify\DEBUG\PmemResetNotify.pdb
PROGRESS CODE: V03040002 I0
[PMem](DXE) PMem Always-ON 12v support disabled
[PMem](DXE) PMem reset notification driver init failed (status Aborted)
Error: Image at 00076AD7000 start failed: Aborted
PDB = c:\efi\servergen2\intel\Build\EagleStreamRpPkg\DEBUG_VS2015x86\X64\ServerSiliconPkg\Universal\Dxe\PmemResetNotify\PmemResetNotify\DEBUG\PmemResetNotify.pdb
PROGRESS CODE: V03040003 I0
PDB = c:\efi\servergen2\intel\Build\EagleStreamRpPkg\DEBUG_VS2015x86\X64\ServerSiliconPkg\Universal\Dxe\CrystalRidge\CrystalRidgeMeasurement\DEBUG\CrystalRidgeMeasurement.pdb
PROGRESS CODE: V03040002 I0
PROGRESS CODE: V03040003 I0
PDB = c:\efi\servergen2\intel\Build\EagleStreamRpPkg\DEBUG_VS2015x86\X64\ClientOneSiliconPkg\IpBlock\Spi\Dxe\SpiSmmDxe\DEBUG\SpiDxe.pdb
PROGRESS CODE: V03040002 I0
PROGRESS CODE: V03040003 I0
PDB = c:\efi\servergen2\intel\Build\EagleStreamRpPkg\DEBUG_VS2015x86\X64\ClientOneSiliconPkg\IpBlock\Me\HwAsset\Dxe\HwAssetDxe\DEBUG\HwAssetDxe.pdb
PROGRESS CODE: V03040002 I0
Error: Image at 0006A8CF000 start failed: Unsupported
PDB = c:\efi\servergen2\intel\Build\EagleStreamRpPkg\DEBUG_VS2015x86\X64\ClientOneSiliconPkg\IpBlock\Me\HwAsset\Dxe\HwAssetDxe\DEBUG\HwAssetDxe.pdb
PROGRESS CODE: V03040003 I0
PDB = c:\efi\servergen2\intel\Build\EagleStreamRpPkg\DEBUG_VS2015x86\X64\ClientOneSiliconPkg\IpBlock\Me\Asf\Dxe\AsfDxe\DEBUG\AsfDxe.pdb
PROGRESS CODE: V03040002 I0
Error: Image at 0006A8D3000 start failed: Unsupported
PDB = c:\efi\servergen2\intel\Build\EagleStreamRpPkg\DEBUG_VS2015x86\X64\ClientOneSiliconPkg\IpBlock\Me\Asf\Dxe\AsfDxe\DEBUG\AsfDxe.pdb
PROGRESS CODE: V03040003 I0
PDB = c:\efi\servergen2\intel\Build\EagleStreamRpPkg\DEBUG_VS2015x86\X64\ServerSiliconPkg\Me\Client\BiosExtensionLoader\Dxe\BiosExtensionLoader\DEBUG\BiosExtensionLoader.pdb
PROGRESS CODE: V03040002 I0
Error: Image at 0006A8CF000 start failed: Unsupported
PDB = c:\efi\servergen2\intel\Build\EagleStreamRpPkg\DEBUG_VS2015x86\X64\ServerSiliconPkg\Me\Client\BiosExtensionLoader\Dxe\BiosExtensionLoader\DEBUG\BiosExtensionLoader.pdb
PROGRESS CODE: V03040003 I0
PDB = c:\efi\servergen2\intel\Build\EagleStreamRpPkg\DEBUG_VS2015x86\X64\MdeModulePkg\Universal\Variable\RuntimeDxe\VariableSmmRuntimeDxe\DEBUG\VariableSmmRuntimeDxe.pdb
PROGRESS CODE: V03040002 I0
PROGRESS CODE: V03040003 I0
PDB = c:\efi\servergen2\intel\Build\EagleStreamRpPkg\DEBUG_VS2015x86\X64\MdeModulePkg\Universal\Acpi\BootScriptExecutorDxe\BootScriptExecutorDxe\DEBUG\BootScriptExecutorDxe.pdb
PROGRESS CODE: V03040002 I0
[SIO] Current system SIO exist bit:10
PROGRESS CODE: V03040003 I0
PDB = c:\efi\servergen2\intel\Build\EagleStreamRpPkg\DEBUG_VS2015x86\X64\ServerPlatformPkg\Features\IPMI\GenericIpmi\Dxe\GenericIpmi\DEBUG\GenericIpmi.pdb
PROGRESS CODE: V03040002 I0
[IPMI] mIpmiInstance->KcsTimeoutPeriod: 0x186A0
[IPMI] BMC Device ID: 0x23, firmware version: 2.03 UpdateMode:1
[IPMI] BMC in Forced Update mode, skip waiting for BMC_READY.
PROGRESS CODE: V03040003 I0
PDB = c:\efi\servergen2\intel\Build\EagleStreamRpPkg\DEBUG_VS2015x86\X64\EagleStreamRpPkg\Platform\Dxe\SmbiosRpTable\SmbiosRpTable\DEBUG\SmbiosRpTable.pdb
PROGRESS CODE: V03040002 I0
Allocated Communication Buffer address = 775B9000
Smbios protocol addition (Type 133) returns Success
PROGRESS CODE: V03040003 I0
PDB = c:\efi\servergen2\intel\Build\EagleStreamRpPkg\DEBUG_VS2015x86\X64\ServerPlatformPkg\Features\Cpu\Dxe\PlatformCpuPolicyDxe\PlatformCpuPolicyDxe\DEBUG\PlatformCpuPolicyDxe.pdb
PROGRESS CODE: V03040002 I0
Common PPM policy update, PackageCState:3
PROGRESS CODE: V03040003 I0
PDB = c:\efi\servergen2\intel\Build\EagleStreamRpPkg\DEBUG_VS2015x86\X64\ServerPlatformPkg\Platform\Dxe\PolicyInitDxe\PolicyInitDxe\DEBUG\PolicyInitDxe.pdb
PROGRESS CODE: V03040002 I0
[HECI] DxeMeServerPolicy (MeType is ME_TYPE_SPS)
PROGRESS CODE: V03040003 I0
PDB = c:\efi\servergen2\intel\Build\EagleStreamRpPkg\DEBUG_VS2015x86\X64\SecurityPkg\Tcg\Tcg2Dxe\Tcg2Dxe\DEBUG\Tcg2Dxe.pdb
PROGRESS CODE: V03040002 I0
PROGRESS CODE: V03040003 I0
PDB = c:\efi\servergen2\intel\Build\EagleStreamRpPkg\DEBUG_VS2015x86\X64\ServerPlatformPkg\Platform\Dxe\SmbiosMiscDxe\SmbiosMiscDxe\DEBUG\SmbiosMiscDxe.pdb
PROGRESS CODE: V03040002 I0
PROGRESS CODE: V03040003 I0
PDB = c:\efi\servergen2\intel\Build\EagleStreamRpPkg\DEBUG_VS2015x86\X64\EagleStreamOpenBoardPkg\Platform\Dxe\PlatformVTdSampleDxe\PlatformVTdSampleDxe\DEBUG\PlatformVTdSampleDxe.pdb
PROGRESS CODE: V03040002 I0
PROGRESS CODE: V03040003 I0
PDB = c:\efi\servergen2\intel\Build\EagleStreamRpPkg\DEBUG_VS2015x86\X64\ServerPlatformPkg\Features\Bmc\OsTransparentUpdate\OsTransparentUpdate\DEBUG\OsTransparentUpdate.pdb
PROGRESS CODE: V03040002 I0
PROGRESS CODE: V03040003 I0
PDB = c:\efi\servergen2\intel\Build\EagleStreamRpPkg\DEBUG_VS2015x86\X64\ClientOneSiliconPkg\IpBlock\Sps\Sps\Smm\SpsSmm\DEBUG\SpsSmm.pdb
PROGRESS CODE: V03070002 I0
[HECI Transport-1 SMM] Send pkt: 80040007
00: FF 02 00 00
[HECI Transport-1 SMM] Got pkt: 80140007
00: FF 82 00 00 00 00 06 18 - 00 01 03 00 00 00 06 18
10: 00 01 03 00
HeciBufferClear (): HeciCsrHost 0x806C6C09 (Clear H_RDY)
HeciBufferClear (): HeciCsrHost 0x806C6C01 (CBLength = 128, H_RDY = 0)
[HECI Transport-1 SMM] Send pkt: 80080007
00: 05 02 00 00 00 00 00 00
[HECI Transport-1 SMM] Got pkt: 80180007
00: 05 82 00 00 04 03 37 9A - 6D 38 BA 71 00 00 00 00
10: 00 40 1A 00 00 00 00 00
HeciBufferClear (): HeciCsrHost 0x80030309 (Clear H_RDY)
HeciBufferClear (): HeciCsrHost 0x80030301 (CBLength = 128, H_RDY = 0)
PROGRESS CODE: V03070003 I0
PDB = c:\efi\servergen2\intel\Build\EagleStreamRpPkg\DEBUG_VS2015x86\X64\UefiCpuPkg\PiSmmCpuDxeSmm\PiSmmCpuDxeSmm\DEBUG\PiSmmCpuDxeSmm.pdb
PROGRESS CODE: V03070002 I0
PROGRESS CODE: V00011008 I0
PROGRESS CODE: V03070003 I0
PDB = c:\efi\servergen2\intel\Build\EagleStreamRpPkg\DEBUG_VS2015x86\X64\ClientOneSiliconPkg\Pch\PchSmiDispatcher\Smm\PchSmiDispatcherServer\DEBUG\PchSmiDispatcher.pdb
PROGRESS CODE: V03070002 I0
PROGRESS CODE: V03070003 I0
PDB = c:\efi\servergen2\intel\Build\EagleStreamRpPkg\DEBUG_VS2015x86\X64\ClientOneSiliconPkg\IpBlock\Spi\Smm\SpiSmm\DEBUG\SpiSmm.pdb
PROGRESS CODE: V03070002 I0
PROGRESS CODE: V03070003 I0
PDB = c:\efi\servergen2\intel\Build\EagleStreamRpPkg\DEBUG_VS2015x86\X64\ServerPlatformPkg\Platform\DxeSmm\BiosGuard\BiosGuardServices\DEBUG\BiosGuardServices.pdb
PROGRESS CODE: V03070002 I0
PROGRESS CODE: V03070003 I0
PDB = c:\efi\servergen2\intel\Build\EagleStreamRpPkg\DEBUG_VS2015x86\X64\ServerRasPkg\Driver\Smm\RasAcpi\RasAcpi\DEBUG\RasAcpi.pdb
PROGRESS CODE: V03070002 I0
PROGRESS CODE: V03070003 I0
PDB = c:\efi\servergen2\intel\Build\EagleStreamRpPkg\DEBUG_VS2015x86\X64\ServerSiliconPkg\Universal\Smm\OobMsmSmm\OobMsmSmm\DEBUG\OobMsmSmm.pdb
PROGRESS CODE: V03070002 I0
OobMsmSmmDriverEntry(): Enter Entrypoint
PROGRESS CODE: V03070003 I0
PDB = c:\efi\servergen2\intel\Build\EagleStreamRpPkg\DEBUG_VS2015x86\X64\ServerSiliconPkg\Universal\Smm\PlatformResetNotify\PlatformResetNotifySmm\DEBUG\PlatformResetNotifySmm.pdb
PROGRESS CODE: V03070002 I0
PROGRESS CODE: V03070003 I0
PDB = c:\efi\servergen2\intel\Build\EagleStreamRpPkg\DEBUG_VS2015x86\X64\ClientOneSiliconPkg\Pch\PchInit\Smm\PchInitSmm\DEBUG\PchInitSmm.pdb
PROGRESS CODE: V03070002 I0
PROGRESS CODE: V03070003 I0
PDB = c:\efi\servergen2\intel\Build\EagleStreamRpPkg\DEBUG_VS2015x86\X64\ServerSecurityPkg\Pfr\Restricted\DebugTool\PxdSmm\DEBUG\PxdSmmDriver.pdb
PROGRESS CODE: V03070002 I0
[PxdSmm.c] PxdSmmDriverEntry() {
[PxdSmm.c] PxdSmmDriverEntry() } Success
PROGRESS CODE: V03070003 I0
PDB = c:\efi\servergen2\intel\Build\EagleStreamRpPkg\DEBUG_VS2015x86\X64\ServerPlatformPkg\Platform\SpiFvbServices\PlatformSmmSpi\DEBUG\FwBlockServiceSmm.pdb
PROGRESS CODE: V03070002 I0
PROGRESS CODE: V03070003 I0
PDB = c:\efi\servergen2\intel\Build\EagleStreamRpPkg\DEBUG_VS2015x86\X64\ServerRestrictedPkg\VariableSmi\VariableSmiSmm\DEBUG\VariableSmiSmm.pdb
PROGRESS CODE: V03070002 I0
PROGRESS CODE: V03070003 I0
PDB = c:\efi\servergen2\intel\Build\EagleStreamRpPkg\DEBUG_VS2015x86\X64\ServerPlatformPkg\Platform\Dxe\PlatformPowerButton\PlatformPowerButton\DEBUG\PowerButtonHandler.pdb
PROGRESS CODE: V03070002 I0
PROGRESS CODE: V03070003 I0
PDB = c:\efi\servergen2\intel\Build\EagleStreamRpPkg\DEBUG_VS2015x86\X64\SecurityPkg\Tcg\Tcg2Smm\Tcg2Smm\DEBUG\Tcg2Smm.pdb
PROGRESS CODE: V03070002 I0
PROGRESS CODE: V03070003 I0
PDB = c:\efi\servergen2\intel\Build\EagleStreamRpPkg\DEBUG_VS2015x86\X64\UefiCpuPkg\PiSmmCommunication\PiSmmCommunicationSmm\DEBUG\PiSmmCommunicationSmm.pdb
PROGRESS CODE: V03070002 I0
PROGRESS CODE: V03070003 I0
PDB = c:\efi\servergen2\intel\Build\EagleStreamRpPkg\DEBUG_VS2015x86\X64\ServerRasPkg\Driver\Smm\AddressTranslationDsm\AddressTranslationDsm\DEBUG\AddressTranslationDsm.pdb
PROGRESS CODE: V03070002 I0
[GetNmCaching] NM caching Cfg:B OffData:0 IntLv:458
[GetNmCaching] NM caching Cfg:B OffData:0 IntLv:40458
[GetNmCaching] NM caching Cfg:B OffData:0 IntLv:80458
[GetNmCaching] NM caching Cfg:B OffData:0 IntLv:C0458
[GetNmCaching] NM caching Cfg:B OffData:0 IntLv:100458
[GetNmCaching] NM caching Cfg:B OffData:0 IntLv:140458
[GetNmCaching] NM caching Cfg:B OffData:0 IntLv:180458
[GetNmCaching] NM caching Cfg:B OffData:0 IntLv:1C0458
[GetNmCaching] NM caching Cfg:B OffData:80000022 IntLv:458
[GetNmCaching] NM caching Cfg:B OffData:80000022 IntLv:40458
[GetNmCaching] NM caching Cfg:B OffData:80000022 IntLv:80458
[GetNmCaching] NM caching Cfg:B OffData:80000022 IntLv:C0458
[GetNmCaching] NM caching Cfg:B OffData:80000022 IntLv:100458
[GetNmCaching] NM caching Cfg:B OffData:80000022 IntLv:140458
[GetNmCaching] NM caching Cfg:B OffData:80000022 IntLv:180458
[GetNmCaching] NM caching Cfg:B OffData:80000022 IntLv:1C0458
[GetNmCaching] NM caching Cfg:B OffData:80000042 IntLv:458
[GetNmCaching] NM caching Cfg:B OffData:80000042 IntLv:40458
[GetNmCaching] NM caching Cfg:B OffData:80000042 IntLv:80458
[GetNmCaching] NM caching Cfg:B OffData:80000042 IntLv:C0458
[GetNmCaching] NM caching Cfg:B OffData:80000042 IntLv:100458
[GetNmCaching] NM caching Cfg:B OffData:80000042 IntLv:140458
[GetNmCaching] NM caching Cfg:B OffData:80000042 IntLv:180458
[GetNmCaching] NM caching Cfg:B OffData:80000042 IntLv:1C0458
[GetNmCaching] NM caching Cfg:B OffData:80000062 IntLv:458
[GetNmCaching] NM caching Cfg:B OffData:80000062 IntLv:40458
[GetNmCaching] NM caching Cfg:B OffData:80000062 IntLv:80458
[GetNmCaching] NM caching Cfg:B OffData:80000062 IntLv:C0458
[GetNmCaching] NM caching Cfg:B OffData:80000062 IntLv:100458
[GetNmCaching] NM caching Cfg:B OffData:80000062 IntLv:140458
[GetNmCaching] NM caching Cfg:B OffData:80000062 IntLv:180458
[GetNmCaching] NM caching Cfg:B OffData:80000062 IntLv:1C0458
[GetNmCaching] NM caching Cfg:B OffData:80000082 IntLv:458
[GetNmCaching] NM caching Cfg:B OffData:80000082 IntLv:40458
[GetNmCaching] NM caching Cfg:B OffData:80000082 IntLv:80458
[GetNmCaching] NM caching Cfg:B OffData:80000082 IntLv:C0458
[GetNmCaching] NM caching Cfg:B OffData:80000082 IntLv:100458
[GetNmCaching] NM caching Cfg:B OffData:80000082 IntLv:140458
[GetNmCaching] NM caching Cfg:B OffData:80000082 IntLv:180458
[GetNmCaching] NM caching Cfg:B OffData:80000082 IntLv:1C0458
[GetNmCaching] NM caching Cfg:B OffData:800000A2 IntLv:458
[GetNmCaching] NM caching Cfg:B OffData:800000A2 IntLv:40458
[GetNmCaching] NM caching Cfg:B OffData:800000A2 IntLv:80458
[GetNmCaching] NM caching Cfg:B OffData:800000A2 IntLv:C0458
[GetNmCaching] NM caching Cfg:B OffData:800000A2 IntLv:100458
[GetNmCaching] NM caching Cfg:B OffData:800000A2 IntLv:140458
[GetNmCaching] NM caching Cfg:B OffData:800000A2 IntLv:180458
[GetNmCaching] NM caching Cfg:B OffData:800000A2 IntLv:1C0458
[GetNmCaching] NM caching Cfg:B OffData:800000C2 IntLv:458
[GetNmCaching] NM caching Cfg:B OffData:800000C2 IntLv:40458
[GetNmCaching] NM caching Cfg:B OffData:800000C2 IntLv:80458
[GetNmCaching] NM caching Cfg:B OffData:800000C2 IntLv:C0458
[GetNmCaching] NM caching Cfg:B OffData:800000C2 IntLv:100458
[GetNmCaching] NM caching Cfg:B OffData:800000C2 IntLv:140458
[GetNmCaching] NM caching Cfg:B OffData:800000C2 IntLv:180458
[GetNmCaching] NM caching Cfg:B OffData:800000C2 IntLv:1C0458
[GetNmCaching] NM caching Cfg:B OffData:800000E2 IntLv:458
[GetNmCaching] NM caching Cfg:B OffData:800000E2 IntLv:40458
[GetNmCaching] NM caching Cfg:B OffData:800000E2 IntLv:80458
[GetNmCaching] NM caching Cfg:B OffData:800000E2 IntLv:C0458
[GetNmCaching] NM caching Cfg:B OffData:800000E2 IntLv:100458
[GetNmCaching] NM caching Cfg:B OffData:800000E2 IntLv:140458
[GetNmCaching] NM caching Cfg:B OffData:800000E2 IntLv:180458
[GetNmCaching] NM caching Cfg:B OffData:800000E2 IntLv:1C0458
PROGRESS CODE: V03070003 I0
PDB = c:\efi\servergen2\intel\Build\EagleStreamRpPkg\DEBUG_VS2015x86\X64\SmmRuntimeUpdateFeaturePkg\SmmRuntimeUpdate\SmmCodeInjection\DEBUG\SmmRuntimUpdate.pdb
PROGRESS CODE: V03070002 I0
PROGRESS CODE: V03070003 I0
PDB = c:\efi\servergen2\intel\Build\EagleStreamRpPkg\DEBUG_VS2015x86\X64\ServerSiliconPkg\Universal\Dxe\PmemResetNotify\PmemResetNotifySmm\DEBUG\PmemResetNotifySmm.pdb
PROGRESS CODE: V03070002 I0
[PMem](SMM) PMem Always-ON 12v support disabled
[PMem](SMM) PMem reset notification driver init failed (status Aborted)
Error: SMM image at 0007EC2D000 start failed: Aborted
PROGRESS CODE: V03070003 I0
PDB = c:\efi\servergen2\intel\Build\EagleStreamRpPkg\DEBUG_VS2015x86\X64\MdeModulePkg\Universal\FaultTolerantWriteDxe\FaultTolerantWriteSmm\DEBUG\SmmFaultTolerantWriteDxe.pdb
PROGRESS CODE: V03070002 I0
PROGRESS CODE: V03070003 I0
PDB = c:\efi\servergen2\intel\Build\EagleStreamRpPkg\DEBUG_VS2015x86\X64\ServerSiliconPkg\Cpu\SiCpuInit\Dxe\SiCpuInitDxe\DEBUG\SiCpuInitDxe.pdb
PROGRESS CODE: V03040002 I0
GetProcessorInfo - Index - 0
GetProcessorInfo - ProcessorId - 0000000000000000
GetProcessorInfo - StatusFlag - 00000007
GetProcessorInfo - Location.Package - 00000000
GetProcessorInfo - Location.Core - 00000000
GetProcessorInfo - Location.Thread - 00000000
GetProcessorInfo - Location2.Package - 00000000
GetProcessorInfo - Location2.Die - 00000000
GetProcessorInfo - Location2.Tile - 00000000
GetProcessorInfo - Location2.Module - 00000000
GetProcessorInfo - Location2.Core - 00000000
GetProcessorInfo - Location2.Thread - 00000000
GetProcessorInfo - Index - 1
GetProcessorInfo - ProcessorId - 0000000000000001
GetProcessorInfo - StatusFlag - 00000006
GetProcessorInfo - Location.Package - 00000000
GetProcessorInfo - Location.Core - 00000000
GetProcessorInfo - Location.Thread - 00000001
GetProcessorInfo - Location2.Package - 00000000
GetProcessorInfo - Location2.Die - 00000000
GetProcessorInfo - Location2.Tile - 00000000
GetProcessorInfo - Location2.Module - 00000000
GetProcessorInfo - Location2.Core - 00000000
GetProcessorInfo - Location2.Thread - 00000001
GetProcessorInfo - Index - 2
GetProcessorInfo - ProcessorId - 0000000000000002
GetProcessorInfo - StatusFlag - 00000006
GetProcessorInfo - Location.Package - 00000000
GetProcessorInfo - Location.Core - 00000001
GetProcessorInfo - Location.Thread - 00000000
GetProcessorInfo - Location2.Package - 00000000
GetProcessorInfo - Location2.Die - 00000000
GetProcessorInfo - Location2.Tile - 00000000
GetProcessorInfo - Location2.Module - 00000000
GetProcessorInfo - Location2.Core - 00000001
GetProcessorInfo - Location2.Thread - 00000000
GetProcessorInfo - Index - 3
GetProcessorInfo - ProcessorId - 0000000000000003
GetProcessorInfo - StatusFlag - 00000006
GetProcessorInfo - Location.Package - 00000000
GetProcessorInfo - Location.Core - 00000001
GetProcessorInfo - Location.Thread - 00000001
GetProcessorInfo - Location2.Package - 00000000
GetProcessorInfo - Location2.Die - 00000000
GetProcessorInfo - Location2.Tile - 00000000
GetProcessorInfo - Location2.Module - 00000000
GetProcessorInfo - Location2.Core - 00000001
GetProcessorInfo - Location2.Thread - 00000001
GetProcessorInfo - Index - 4
GetProcessorInfo - ProcessorId - 0000000000000004
GetProcessorInfo - StatusFlag - 00000006
GetProcessorInfo - Location.Package - 00000000
GetProcessorInfo - Location.Core - 00000002
GetProcessorInfo - Location.Thread - 00000000
GetProcessorInfo - Location2.Package - 00000000
GetProcessorInfo - Location2.Die - 00000000
GetProcessorInfo - Location2.Tile - 00000000
GetProcessorInfo - Location2.Module - 00000000
GetProcessorInfo - Location2.Core - 00000002
GetProcessorInfo - Location2.Thread - 00000000
GetProcessorInfo - Index - 5
GetProcessorInfo - ProcessorId - 0000000000000005
GetProcessorInfo - StatusFlag - 00000006
GetProcessorInfo - Location.Package - 00000000
GetProcessorInfo - Location.Core - 00000002
GetProcessorInfo - Location.Thread - 00000001
GetProcessorInfo - Location2.Package - 00000000
GetProcessorInfo - Location2.Die - 00000000
GetProcessorInfo - Location2.Tile - 00000000
GetProcessorInfo - Location2.Module - 00000000
GetProcessorInfo - Location2.Core - 00000002
GetProcessorInfo - Location2.Thread - 00000001
GetProcessorInfo - Index - 6
GetProcessorInfo - ProcessorId - 0000000000000006
GetProcessorInfo - StatusFlag - 00000006
GetProcessorInfo - Location.Package - 00000000
GetProcessorInfo - Location.Core - 00000003
GetProcessorInfo - Location.Thread - 00000000
GetProcessorInfo - Location2.Package - 00000000
GetProcessorInfo - Location2.Die - 00000000
GetProcessorInfo - Location2.Tile - 00000000
GetProcessorInfo - Location2.Module - 00000000
GetProcessorInfo - Location2.Core - 00000003
GetProcessorInfo - Location2.Thread - 00000000
GetProcessorInfo - Index - 7
GetProcessorInfo - ProcessorId - 0000000000000007
GetProcessorInfo - StatusFlag - 00000006
GetProcessorInfo - Location.Package - 00000000
GetProcessorInfo - Location.Core - 00000003
GetProcessorInfo - Location.Thread - 00000001
GetProcessorInfo - Location2.Package - 00000000
GetProcessorInfo - Location2.Die - 00000000
GetProcessorInfo - Location2.Tile - 00000000
GetProcessorInfo - Location2.Module - 00000000
GetProcessorInfo - Location2.Core - 00000003
GetProcessorInfo - Location2.Thread - 00000001
GetProcessorInfo - Index - 8
GetProcessorInfo - ProcessorId - 0000000000000008
GetProcessorInfo - StatusFlag - 00000006
GetProcessorInfo - Location.Package - 00000000
GetProcessorInfo - Location.Core - 00000004
GetProcessorInfo - Location.Thread - 00000000
GetProcessorInfo - Location2.Package - 00000000
GetProcessorInfo - Location2.Die - 00000000
GetProcessorInfo - Location2.Tile - 00000000
GetProcessorInfo - Location2.Module - 00000000
GetProcessorInfo - Location2.Core - 00000004
GetProcessorInfo - Location2.Thread - 00000000
GetProcessorInfo - Index - 9
GetProcessorInfo - ProcessorId - 0000000000000009
GetProcessorInfo - StatusFlag - 00000006
GetProcessorInfo - Location.Package - 00000000
GetProcessorInfo - Location.Core - 00000004
GetProcessorInfo - Location.Thread - 00000001
GetProcessorInfo - Location2.Package - 00000000
GetProcessorInfo - Location2.Die - 00000000
GetProcessorInfo - Location2.Tile - 00000000
GetProcessorInfo - Location2.Module - 00000000
GetProcessorInfo - Location2.Core - 00000004
GetProcessorInfo - Location2.Thread - 00000001
GetProcessorInfo - Index - A
GetProcessorInfo - ProcessorId - 000000000000000A
GetProcessorInfo - StatusFlag - 00000006
GetProcessorInfo - Location.Package - 00000000
GetProcessorInfo - Location.Core - 00000005
GetProcessorInfo - Location.Thread - 00000000
GetProcessorInfo - Location2.Package - 00000000
GetProcessorInfo - Location2.Die - 00000000
GetProcessorInfo - Location2.Tile - 00000000
GetProcessorInfo - Location2.Module - 00000000
GetProcessorInfo - Location2.Core - 00000005
GetProcessorInfo - Location2.Thread - 00000000
GetProcessorInfo - Index - B
GetProcessorInfo - ProcessorId - 000000000000000B
GetProcessorInfo - StatusFlag - 00000006
GetProcessorInfo - Location.Package - 00000000
GetProcessorInfo - Location.Core - 00000005
GetProcessorInfo - Location.Thread - 00000001
GetProcessorInfo - Location2.Package - 00000000
GetProcessorInfo - Location2.Die - 00000000
GetProcessorInfo - Location2.Tile - 00000000
GetProcessorInfo - Location2.Module - 00000000
GetProcessorInfo - Location2.Core - 00000005
GetProcessorInfo - Location2.Thread - 00000001
GetProcessorInfo - Index - C
GetProcessorInfo - ProcessorId - 000000000000000C
GetProcessorInfo - StatusFlag - 00000006
GetProcessorInfo - Location.Package - 00000000
GetProcessorInfo - Location.Core - 00000006
GetProcessorInfo - Location.Thread - 00000000
GetProcessorInfo - Location2.Package - 00000000
GetProcessorInfo - Location2.Die - 00000000
GetProcessorInfo - Location2.Tile - 00000000
GetProcessorInfo - Location2.Module - 00000000
GetProcessorInfo - Location2.Core - 00000006
GetProcessorInfo - Location2.Thread - 00000000
GetProcessorInfo - Index - D
GetProcessorInfo - ProcessorId - 000000000000000D
GetProcessorInfo - StatusFlag - 00000006
GetProcessorInfo - Location.Package - 00000000
GetProcessorInfo - Location.Core - 00000006
GetProcessorInfo - Location.Thread - 00000001
GetProcessorInfo - Location2.Package - 00000000
GetProcessorInfo - Location2.Die - 00000000
GetProcessorInfo - Location2.Tile - 00000000
GetProcessorInfo - Location2.Module - 00000000
GetProcessorInfo - Location2.Core - 00000006
GetProcessorInfo - Location2.Thread - 00000001
GetProcessorInfo - Index - E
GetProcessorInfo - ProcessorId - 000000000000000E
GetProcessorInfo - StatusFlag - 00000006
GetProcessorInfo - Location.Package - 00000000
GetProcessorInfo - Location.Core - 00000007
GetProcessorInfo - Location.Thread - 00000000
GetProcessorInfo - Location2.Package - 00000000
GetProcessorInfo - Location2.Die - 00000000
GetProcessorInfo - Location2.Tile - 00000000
GetProcessorInfo - Location2.Module - 00000000
GetProcessorInfo - Location2.Core - 00000007
GetProcessorInfo - Location2.Thread - 00000000
GetProcessorInfo - Index - F
GetProcessorInfo - ProcessorId - 000000000000000F
GetProcessorInfo - StatusFlag - 00000006
GetProcessorInfo - Location.Package - 00000000
GetProcessorInfo - Location.Core - 00000007
GetProcessorInfo - Location.Thread - 00000001
GetProcessorInfo - Location2.Package - 00000000
GetProcessorInfo - Location2.Die - 00000000
GetProcessorInfo - Location2.Tile - 00000000
GetProcessorInfo - Location2.Module - 00000000
GetProcessorInfo - Location2.Core - 00000007
GetProcessorInfo - Location2.Thread - 00000001
GetProcessorInfo - Index - 10
GetProcessorInfo - ProcessorId - 0000000000000010
GetProcessorInfo - StatusFlag - 00000006
GetProcessorInfo - Location.Package - 00000000
GetProcessorInfo - Location.Core - 00000008
GetProcessorInfo - Location.Thread - 00000000
GetProcessorInfo - Location2.Package - 00000000
GetProcessorInfo - Location2.Die - 00000000
GetProcessorInfo - Location2.Tile - 00000000
GetProcessorInfo - Location2.Module - 00000000
GetProcessorInfo - Location2.Core - 00000008
GetProcessorInfo - Location2.Thread - 00000000
GetProcessorInfo - Index - 11
GetProcessorInfo - ProcessorId - 0000000000000011
GetProcessorInfo - StatusFlag - 00000006
GetProcessorInfo - Location.Package - 00000000
GetProcessorInfo - Location.Core - 00000008
GetProcessorInfo - Location.Thread - 00000001
GetProcessorInfo - Location2.Package - 00000000
GetProcessorInfo - Location2.Die - 00000000
GetProcessorInfo - Location2.Tile - 00000000
GetProcessorInfo - Location2.Module - 00000000
GetProcessorInfo - Location2.Core - 00000008
GetProcessorInfo - Location2.Thread - 00000001
GetProcessorInfo - Index - 12
GetProcessorInfo - ProcessorId - 0000000000000012
GetProcessorInfo - StatusFlag - 00000006
GetProcessorInfo - Location.Package - 00000000
GetProcessorInfo - Location.Core - 00000009
GetProcessorInfo - Location.Thread - 00000000
GetProcessorInfo - Location2.Package - 00000000
GetProcessorInfo - Location2.Die - 00000000
GetProcessorInfo - Location2.Tile - 00000000
GetProcessorInfo - Location2.Module - 00000000
GetProcessorInfo - Location2.Core - 00000009
GetProcessorInfo - Location2.Thread - 00000000
GetProcessorInfo - Index - 13
GetProcessorInfo - ProcessorId - 0000000000000013
GetProcessorInfo - StatusFlag - 00000006
GetProcessorInfo - Location.Package - 00000000
GetProcessorInfo - Location.Core - 00000009
GetProcessorInfo - Location.Thread - 00000001
GetProcessorInfo - Location2.Package - 00000000
GetProcessorInfo - Location2.Die - 00000000
GetProcessorInfo - Location2.Tile - 00000000
GetProcessorInfo - Location2.Module - 00000000
GetProcessorInfo - Location2.Core - 00000009
GetProcessorInfo - Location2.Thread - 00000001
GetProcessorInfo - Index - 14
GetProcessorInfo - ProcessorId - 0000000000000014
GetProcessorInfo - StatusFlag - 00000006
GetProcessorInfo - Location.Package - 00000000
GetProcessorInfo - Location.Core - 0000000A
GetProcessorInfo - Location.Thread - 00000000
GetProcessorInfo - Location2.Package - 00000000
GetProcessorInfo - Location2.Die - 00000000
GetProcessorInfo - Location2.Tile - 00000000
GetProcessorInfo - Location2.Module - 00000000
GetProcessorInfo - Location2.Core - 0000000A
GetProcessorInfo - Location2.Thread - 00000000
GetProcessorInfo - Index - 15
GetProcessorInfo - ProcessorId - 0000000000000015
GetProcessorInfo - StatusFlag - 00000006
GetProcessorInfo - Location.Package - 00000000
GetProcessorInfo - Location.Core - 0000000A
GetProcessorInfo - Location.Thread - 00000001
GetProcessorInfo - Location2.Package - 00000000
GetProcessorInfo - Location2.Die - 00000000
GetProcessorInfo - Location2.Tile - 00000000
GetProcessorInfo - Location2.Module - 00000000
GetProcessorInfo - Location2.Core - 0000000A
GetProcessorInfo - Location2.Thread - 00000001
GetProcessorInfo - Index - 16
GetProcessorInfo - ProcessorId - 0000000000000016
GetProcessorInfo - StatusFlag - 00000006
GetProcessorInfo - Location.Package - 00000000
GetProcessorInfo - Location.Core - 0000000B
GetProcessorInfo - Location.Thread - 00000000
GetProcessorInfo - Location2.Package - 00000000
GetProcessorInfo - Location2.Die - 00000000
GetProcessorInfo - Location2.Tile - 00000000
GetProcessorInfo - Location2.Module - 00000000
GetProcessorInfo - Location2.Core - 0000000B
GetProcessorInfo - Location2.Thread - 00000000
GetProcessorInfo - Index - 17
GetProcessorInfo - ProcessorId - 0000000000000017
GetProcessorInfo - StatusFlag - 00000006
GetProcessorInfo - Location.Package - 00000000
GetProcessorInfo - Location.Core - 0000000B
GetProcessorInfo - Location.Thread - 00000001
GetProcessorInfo - Location2.Package - 00000000
GetProcessorInfo - Location2.Die - 00000000
GetProcessorInfo - Location2.Tile - 00000000
GetProcessorInfo - Location2.Module - 00000000
GetProcessorInfo - Location2.Core - 0000000B
GetProcessorInfo - Location2.Thread - 00000001
GetProcessorInfo - Index - 18
GetProcessorInfo - ProcessorId - 0000000000000018
GetProcessorInfo - StatusFlag - 00000006
GetProcessorInfo - Location.Package - 00000000
GetProcessorInfo - Location.Core - 0000000C
GetProcessorInfo - Location.Thread - 00000000
GetProcessorInfo - Location2.Package - 00000000
GetProcessorInfo - Location2.Die - 00000000
GetProcessorInfo - Location2.Tile - 00000000
GetProcessorInfo - Location2.Module - 00000000
GetProcessorInfo - Location2.Core - 0000000C
GetProcessorInfo - Location2.Thread - 00000000
GetProcessorInfo - Index - 19
GetProcessorInfo - ProcessorId - 0000000000000019
GetProcessorInfo - StatusFlag - 00000006
GetProcessorInfo - Location.Package - 00000000
GetProcessorInfo - Location.Core - 0000000C
GetProcessorInfo - Location.Thread - 00000001
GetProcessorInfo - Location2.Package - 00000000
GetProcessorInfo - Location2.Die - 00000000
GetProcessorInfo - Location2.Tile - 00000000
GetProcessorInfo - Location2.Module - 00000000
GetProcessorInfo - Location2.Core - 0000000C
GetProcessorInfo - Location2.Thread - 00000001
GetProcessorInfo - Index - 1A
GetProcessorInfo - ProcessorId - 000000000000001A
GetProcessorInfo - StatusFlag - 00000006
GetProcessorInfo - Location.Package - 00000000
GetProcessorInfo - Location.Core - 0000000D
GetProcessorInfo - Location.Thread - 00000000
GetProcessorInfo - Location2.Package - 00000000
GetProcessorInfo - Location2.Die - 00000000
GetProcessorInfo - Location2.Tile - 00000000
GetProcessorInfo - Location2.Module - 00000000
GetProcessorInfo - Location2.Core - 0000000D
GetProcessorInfo - Location2.Thread - 00000000
GetProcessorInfo - Index - 1B
GetProcessorInfo - ProcessorId - 000000000000001B
GetProcessorInfo - StatusFlag - 00000006
GetProcessorInfo - Location.Package - 00000000
GetProcessorInfo - Location.Core - 0000000D
GetProcessorInfo - Location.Thread - 00000001
GetProcessorInfo - Location2.Package - 00000000
GetProcessorInfo - Location2.Die - 00000000
GetProcessorInfo - Location2.Tile - 00000000
GetProcessorInfo - Location2.Module - 00000000
GetProcessorInfo - Location2.Core - 0000000D
GetProcessorInfo - Location2.Thread - 00000001
GetProcessorInfo - Index - 1C
GetProcessorInfo - ProcessorId - 000000000000001C
GetProcessorInfo - StatusFlag - 00000006
GetProcessorInfo - Location.Package - 00000000
GetProcessorInfo - Location.Core - 0000000E
GetProcessorInfo - Location.Thread - 00000000
GetProcessorInfo - Location2.Package - 00000000
GetProcessorInfo - Location2.Die - 00000000
GetProcessorInfo - Location2.Tile - 00000000
GetProcessorInfo - Location2.Module - 00000000
GetProcessorInfo - Location2.Core - 0000000E
GetProcessorInfo - Location2.Thread - 00000000
GetProcessorInfo - Index - 1D
GetProcessorInfo - ProcessorId - 000000000000001D
GetProcessorInfo - StatusFlag - 00000006
GetProcessorInfo - Location.Package - 00000000
GetProcessorInfo - Location.Core - 0000000E
GetProcessorInfo - Location.Thread - 00000001
GetProcessorInfo - Location2.Package - 00000000
GetProcessorInfo - Location2.Die - 00000000
GetProcessorInfo - Location2.Tile - 00000000
GetProcessorInfo - Location2.Module - 00000000
GetProcessorInfo - Location2.Core - 0000000E
GetProcessorInfo - Location2.Thread - 00000001
GetProcessorInfo - Index - 1E
GetProcessorInfo - ProcessorId - 000000000000001E
GetProcessorInfo - StatusFlag - 00000006
GetProcessorInfo - Location.Package - 00000000
GetProcessorInfo - Location.Core - 0000000F
GetProcessorInfo - Location.Thread - 00000000
GetProcessorInfo - Location2.Package - 00000000
GetProcessorInfo - Location2.Die - 00000000
GetProcessorInfo - Location2.Tile - 00000000
GetProcessorInfo - Location2.Module - 00000000
GetProcessorInfo - Location2.Core - 0000000F
GetProcessorInfo - Location2.Thread - 00000000
GetProcessorInfo - Index - 1F
GetProcessorInfo - ProcessorId - 000000000000001F
GetProcessorInfo - StatusFlag - 00000006
GetProcessorInfo - Location.Package - 00000000
GetProcessorInfo - Location.Core - 0000000F
GetProcessorInfo - Location.Thread - 00000001
GetProcessorInfo - Location2.Package - 00000000
GetProcessorInfo - Location2.Die - 00000000
GetProcessorInfo - Location2.Tile - 00000000
GetProcessorInfo - Location2.Module - 00000000
GetProcessorInfo - Location2.Core - 0000000F
GetProcessorInfo - Location2.Thread - 00000001
GetProcessorInfo - Index - 20
GetProcessorInfo - ProcessorId - 0000000000000020
GetProcessorInfo - StatusFlag - 00000006
GetProcessorInfo - Location.Package - 00000000
GetProcessorInfo - Location.Core - 00000010
GetProcessorInfo - Location.Thread - 00000000
GetProcessorInfo - Location2.Package - 00000000
GetProcessorInfo - Location2.Die - 00000000
GetProcessorInfo - Location2.Tile - 00000000
GetProcessorInfo - Location2.Module - 00000000
GetProcessorInfo - Location2.Core - 00000010
GetProcessorInfo - Location2.Thread - 00000000
GetProcessorInfo - Index - 21
GetProcessorInfo - ProcessorId - 0000000000000021
GetProcessorInfo - StatusFlag - 00000006
GetProcessorInfo - Location.Package - 00000000
GetProcessorInfo - Location.Core - 00000010
GetProcessorInfo - Location.Thread - 00000001
GetProcessorInfo - Location2.Package - 00000000
GetProcessorInfo - Location2.Die - 00000000
GetProcessorInfo - Location2.Tile - 00000000
GetProcessorInfo - Location2.Module - 00000000
GetProcessorInfo - Location2.Core - 00000010
GetProcessorInfo - Location2.Thread - 00000001
GetProcessorInfo - Index - 22
GetProcessorInfo - ProcessorId - 0000000000000022
GetProcessorInfo - StatusFlag - 00000006
GetProcessorInfo - Location.Package - 00000000
GetProcessorInfo - Location.Core - 00000011
GetProcessorInfo - Location.Thread - 00000000
GetProcessorInfo - Location2.Package - 00000000
GetProcessorInfo - Location2.Die - 00000000
GetProcessorInfo - Location2.Tile - 00000000
GetProcessorInfo - Location2.Module - 00000000
GetProcessorInfo - Location2.Core - 00000011
GetProcessorInfo - Location2.Thread - 00000000
GetProcessorInfo - Index - 23
GetProcessorInfo - ProcessorId - 0000000000000023
GetProcessorInfo - StatusFlag - 00000006
GetProcessorInfo - Location.Package - 00000000
GetProcessorInfo - Location.Core - 00000011
GetProcessorInfo - Location.Thread - 00000001
GetProcessorInfo - Location2.Package - 00000000
GetProcessorInfo - Location2.Die - 00000000
GetProcessorInfo - Location2.Tile - 00000000
GetProcessorInfo - Location2.Module - 00000000
GetProcessorInfo - Location2.Core - 00000011
GetProcessorInfo - Location2.Thread - 00000001
GetProcessorInfo - Index - 24
GetProcessorInfo - ProcessorId - 0000000000000024
GetProcessorInfo - StatusFlag - 00000006
GetProcessorInfo - Location.Package - 00000000
GetProcessorInfo - Location.Core - 00000012
GetProcessorInfo - Location.Thread - 00000000
GetProcessorInfo - Location2.Package - 00000000
GetProcessorInfo - Location2.Die - 00000000
GetProcessorInfo - Location2.Tile - 00000000
GetProcessorInfo - Location2.Module - 00000000
GetProcessorInfo - Location2.Core - 00000012
GetProcessorInfo - Location2.Thread - 00000000
GetProcessorInfo - Index - 25
GetProcessorInfo - ProcessorId - 0000000000000025
GetProcessorInfo - StatusFlag - 00000006
GetProcessorInfo - Location.Package - 00000000
GetProcessorInfo - Location.Core - 00000012
GetProcessorInfo - Location.Thread - 00000001
GetProcessorInfo - Location2.Package - 00000000
GetProcessorInfo - Location2.Die - 00000000
GetProcessorInfo - Location2.Tile - 00000000
GetProcessorInfo - Location2.Module - 00000000
GetProcessorInfo - Location2.Core - 00000012
GetProcessorInfo - Location2.Thread - 00000001
GetProcessorInfo - Index - 26
GetProcessorInfo - ProcessorId - 0000000000000026
GetProcessorInfo - StatusFlag - 00000006
GetProcessorInfo - Location.Package - 00000000
GetProcessorInfo - Location.Core - 00000013
GetProcessorInfo - Location.Thread - 00000000
GetProcessorInfo - Location2.Package - 00000000
GetProcessorInfo - Location2.Die - 00000000
GetProcessorInfo - Location2.Tile - 00000000
GetProcessorInfo - Location2.Module - 00000000
GetProcessorInfo - Location2.Core - 00000013
GetProcessorInfo - Location2.Thread - 00000000
GetProcessorInfo - Index - 27
GetProcessorInfo - ProcessorId - 0000000000000027
GetProcessorInfo - StatusFlag - 00000006
GetProcessorInfo - Location.Package - 00000000
GetProcessorInfo - Location.Core - 00000013
GetProcessorInfo - Location.Thread - 00000001
GetProcessorInfo - Location2.Package - 00000000
GetProcessorInfo - Location2.Die - 00000000
GetProcessorInfo - Location2.Tile - 00000000
GetProcessorInfo - Location2.Module - 00000000
GetProcessorInfo - Location2.Core - 00000013
GetProcessorInfo - Location2.Thread - 00000001
GetProcessorInfo - Index - 28
GetProcessorInfo - ProcessorId - 0000000000000028
GetProcessorInfo - StatusFlag - 00000006
GetProcessorInfo - Location.Package - 00000000
GetProcessorInfo - Location.Core - 00000014
GetProcessorInfo - Location.Thread - 00000000
GetProcessorInfo - Location2.Package - 00000000
GetProcessorInfo - Location2.Die - 00000000
GetProcessorInfo - Location2.Tile - 00000000
GetProcessorInfo - Location2.Module - 00000000
GetProcessorInfo - Location2.Core - 00000014
GetProcessorInfo - Location2.Thread - 00000000
GetProcessorInfo - Index - 29
GetProcessorInfo - ProcessorId - 0000000000000029
GetProcessorInfo - StatusFlag - 00000006
GetProcessorInfo - Location.Package - 00000000
GetProcessorInfo - Location.Core - 00000014
GetProcessorInfo - Location.Thread - 00000001
GetProcessorInfo - Location2.Package - 00000000
GetProcessorInfo - Location2.Die - 00000000
GetProcessorInfo - Location2.Tile - 00000000
GetProcessorInfo - Location2.Module - 00000000
GetProcessorInfo - Location2.Core - 00000014
GetProcessorInfo - Location2.Thread - 00000001
GetProcessorInfo - Index - 2A
GetProcessorInfo - ProcessorId - 000000000000002A
GetProcessorInfo - StatusFlag - 00000006
GetProcessorInfo - Location.Package - 00000000
GetProcessorInfo - Location.Core - 00000015
GetProcessorInfo - Location.Thread - 00000000
GetProcessorInfo - Location2.Package - 00000000
GetProcessorInfo - Location2.Die - 00000000
GetProcessorInfo - Location2.Tile - 00000000
GetProcessorInfo - Location2.Module - 00000000
GetProcessorInfo - Location2.Core - 00000015
GetProcessorInfo - Location2.Thread - 00000000
GetProcessorInfo - Index - 2B
GetProcessorInfo - ProcessorId - 000000000000002B
GetProcessorInfo - StatusFlag - 00000006
GetProcessorInfo - Location.Package - 00000000
GetProcessorInfo - Location.Core - 00000015
GetProcessorInfo - Location.Thread - 00000001
GetProcessorInfo - Location2.Package - 00000000
GetProcessorInfo - Location2.Die - 00000000
GetProcessorInfo - Location2.Tile - 00000000
GetProcessorInfo - Location2.Module - 00000000
GetProcessorInfo - Location2.Core - 00000015
GetProcessorInfo - Location2.Thread - 00000001
GetProcessorInfo - Index - 2C
GetProcessorInfo - ProcessorId - 000000000000002C
GetProcessorInfo - StatusFlag - 00000006
GetProcessorInfo - Location.Package - 00000000
GetProcessorInfo - Location.Core - 00000016
GetProcessorInfo - Location.Thread - 00000000
GetProcessorInfo - Location2.Package - 00000000
GetProcessorInfo - Location2.Die - 00000000
GetProcessorInfo - Location2.Tile - 00000000
GetProcessorInfo - Location2.Module - 00000000
GetProcessorInfo - Location2.Core - 00000016
GetProcessorInfo - Location2.Thread - 00000000
GetProcessorInfo - Index - 2D
GetProcessorInfo - ProcessorId - 000000000000002D
GetProcessorInfo - StatusFlag - 00000006
GetProcessorInfo - Location.Package - 00000000
GetProcessorInfo - Location.Core - 00000016
GetProcessorInfo - Location.Thread - 00000001
GetProcessorInfo - Location2.Package - 00000000
GetProcessorInfo - Location2.Die - 00000000
GetProcessorInfo - Location2.Tile - 00000000
GetProcessorInfo - Location2.Module - 00000000
GetProcessorInfo - Location2.Core - 00000016
GetProcessorInfo - Location2.Thread - 00000001
GetProcessorInfo - Index - 2E
GetProcessorInfo - ProcessorId - 000000000000002E
GetProcessorInfo - StatusFlag - 00000006
GetProcessorInfo - Location.Package - 00000000
GetProcessorInfo - Location.Core - 00000017
GetProcessorInfo - Location.Thread - 00000000
GetProcessorInfo - Location2.Package - 00000000
GetProcessorInfo - Location2.Die - 00000000
GetProcessorInfo - Location2.Tile - 00000000
GetProcessorInfo - Location2.Module - 00000000
GetProcessorInfo - Location2.Core - 00000017
GetProcessorInfo - Location2.Thread - 00000000
GetProcessorInfo - Index - 2F
GetProcessorInfo - ProcessorId - 000000000000002F
GetProcessorInfo - StatusFlag - 00000006
GetProcessorInfo - Location.Package - 00000000
GetProcessorInfo - Location.Core - 00000017
GetProcessorInfo - Location.Thread - 00000001
GetProcessorInfo - Location2.Package - 00000000
GetProcessorInfo - Location2.Die - 00000000
GetProcessorInfo - Location2.Tile - 00000000
GetProcessorInfo - Location2.Module - 00000000
GetProcessorInfo - Location2.Core - 00000017
GetProcessorInfo - Location2.Thread - 00000001
GetProcessorInfo - Index - 30
GetProcessorInfo - ProcessorId - 0000000000000030
GetProcessorInfo - StatusFlag - 00000006
GetProcessorInfo - Location.Package - 00000000
GetProcessorInfo - Location.Core - 00000018
GetProcessorInfo - Location.Thread - 00000000
GetProcessorInfo - Location2.Package - 00000000
GetProcessorInfo - Location2.Die - 00000000
GetProcessorInfo - Location2.Tile - 00000000
GetProcessorInfo - Location2.Module - 00000000
GetProcessorInfo - Location2.Core - 00000018
GetProcessorInfo - Location2.Thread - 00000000
GetProcessorInfo - Index - 31
GetProcessorInfo - ProcessorId - 0000000000000031
GetProcessorInfo - StatusFlag - 00000006
GetProcessorInfo - Location.Package - 00000000
GetProcessorInfo - Location.Core - 00000018
GetProcessorInfo - Location.Thread - 00000001
GetProcessorInfo - Location2.Package - 00000000
GetProcessorInfo - Location2.Die - 00000000
GetProcessorInfo - Location2.Tile - 00000000
GetProcessorInfo - Location2.Module - 00000000
GetProcessorInfo - Location2.Core - 00000018
GetProcessorInfo - Location2.Thread - 00000001
GetProcessorInfo - Index - 32
GetProcessorInfo - ProcessorId - 0000000000000032
GetProcessorInfo - StatusFlag - 00000006
GetProcessorInfo - Location.Package - 00000000
GetProcessorInfo - Location.Core - 00000019
GetProcessorInfo - Location.Thread - 00000000
GetProcessorInfo - Location2.Package - 00000000
GetProcessorInfo - Location2.Die - 00000000
GetProcessorInfo - Location2.Tile - 00000000
GetProcessorInfo - Location2.Module - 00000000
GetProcessorInfo - Location2.Core - 00000019
GetProcessorInfo - Location2.Thread - 00000000
GetProcessorInfo - Index - 33
GetProcessorInfo - ProcessorId - 0000000000000033
GetProcessorInfo - StatusFlag - 00000006
GetProcessorInfo - Location.Package - 00000000
GetProcessorInfo - Location.Core - 00000019
GetProcessorInfo - Location.Thread - 00000001
GetProcessorInfo - Location2.Package - 00000000
GetProcessorInfo - Location2.Die - 00000000
GetProcessorInfo - Location2.Tile - 00000000
GetProcessorInfo - Location2.Module - 00000000
GetProcessorInfo - Location2.Core - 00000019
GetProcessorInfo - Location2.Thread - 00000001
GetProcessorInfo - Index - 34
GetProcessorInfo - ProcessorId - 0000000000000034
GetProcessorInfo - StatusFlag - 00000006
GetProcessorInfo - Location.Package - 00000000
GetProcessorInfo - Location.Core - 0000001A
GetProcessorInfo - Location.Thread - 00000000
GetProcessorInfo - Location2.Package - 00000000
GetProcessorInfo - Location2.Die - 00000000
GetProcessorInfo - Location2.Tile - 00000000
GetProcessorInfo - Location2.Module - 00000000
GetProcessorInfo - Location2.Core - 0000001A
GetProcessorInfo - Location2.Thread - 00000000
GetProcessorInfo - Index - 35
GetProcessorInfo - ProcessorId - 0000000000000035
GetProcessorInfo - StatusFlag - 00000006
GetProcessorInfo - Location.Package - 00000000
GetProcessorInfo - Location.Core - 0000001A
GetProcessorInfo - Location.Thread - 00000001
GetProcessorInfo - Location2.Package - 00000000
GetProcessorInfo - Location2.Die - 00000000
GetProcessorInfo - Location2.Tile - 00000000
GetProcessorInfo - Location2.Module - 00000000
GetProcessorInfo - Location2.Core - 0000001A
GetProcessorInfo - Location2.Thread - 00000001
GetProcessorInfo - Index - 36
GetProcessorInfo - ProcessorId - 0000000000000036
GetProcessorInfo - StatusFlag - 00000006
GetProcessorInfo - Location.Package - 00000000
GetProcessorInfo - Location.Core - 0000001B
GetProcessorInfo - Location.Thread - 00000000
GetProcessorInfo - Location2.Package - 00000000
GetProcessorInfo - Location2.Die - 00000000
GetProcessorInfo - Location2.Tile - 00000000
GetProcessorInfo - Location2.Module - 00000000
GetProcessorInfo - Location2.Core - 0000001B
GetProcessorInfo - Location2.Thread - 00000000
GetProcessorInfo - Index - 37
GetProcessorInfo - ProcessorId - 0000000000000037
GetProcessorInfo - StatusFlag - 00000006
GetProcessorInfo - Location.Package - 00000000
GetProcessorInfo - Location.Core - 0000001B
GetProcessorInfo - Location.Thread - 00000001
GetProcessorInfo - Location2.Package - 00000000
GetProcessorInfo - Location2.Die - 00000000
GetProcessorInfo - Location2.Tile - 00000000
GetProcessorInfo - Location2.Module - 00000000
GetProcessorInfo - Location2.Core - 0000001B
GetProcessorInfo - Location2.Thread - 00000001
GetProcessorInfo - Index - 38
GetProcessorInfo - ProcessorId - 0000000000000038
GetProcessorInfo - StatusFlag - 00000006
GetProcessorInfo - Location.Package - 00000000
GetProcessorInfo - Location.Core - 0000001C
GetProcessorInfo - Location.Thread - 00000000
GetProcessorInfo - Location2.Package - 00000000
GetProcessorInfo - Location2.Die - 00000000
GetProcessorInfo - Location2.Tile - 00000000
GetProcessorInfo - Location2.Module - 00000000
GetProcessorInfo - Location2.Core - 0000001C
GetProcessorInfo - Location2.Thread - 00000000
GetProcessorInfo - Index - 39
GetProcessorInfo - ProcessorId - 0000000000000039
GetProcessorInfo - StatusFlag - 00000006
GetProcessorInfo - Location.Package - 00000000
GetProcessorInfo - Location.Core - 0000001C
GetProcessorInfo - Location.Thread - 00000001
GetProcessorInfo - Location2.Package - 00000000
GetProcessorInfo - Location2.Die - 00000000
GetProcessorInfo - Location2.Tile - 00000000
GetProcessorInfo - Location2.Module - 00000000
GetProcessorInfo - Location2.Core - 0000001C
GetProcessorInfo - Location2.Thread - 00000001
GetProcessorInfo - Index - 3A
GetProcessorInfo - ProcessorId - 000000000000003A
GetProcessorInfo - StatusFlag - 00000006
GetProcessorInfo - Location.Package - 00000000
GetProcessorInfo - Location.Core - 0000001D
GetProcessorInfo - Location.Thread - 00000000
GetProcessorInfo - Location2.Package - 00000000
GetProcessorInfo - Location2.Die - 00000000
GetProcessorInfo - Location2.Tile - 00000000
GetProcessorInfo - Location2.Module - 00000000
GetProcessorInfo - Location2.Core - 0000001D
GetProcessorInfo - Location2.Thread - 00000000
GetProcessorInfo - Index - 3B
GetProcessorInfo - ProcessorId - 000000000000003B
GetProcessorInfo - StatusFlag - 00000006
GetProcessorInfo - Location.Package - 00000000
GetProcessorInfo - Location.Core - 0000001D
GetProcessorInfo - Location.Thread - 00000001
GetProcessorInfo - Location2.Package - 00000000
GetProcessorInfo - Location2.Die - 00000000
GetProcessorInfo - Location2.Tile - 00000000
GetProcessorInfo - Location2.Module - 00000000
GetProcessorInfo - Location2.Core - 0000001D
GetProcessorInfo - Location2.Thread - 00000001
GetProcessorInfo - Index - 3C
GetProcessorInfo - ProcessorId - 000000000000003C
GetProcessorInfo - StatusFlag - 00000006
GetProcessorInfo - Location.Package - 00000000
GetProcessorInfo - Location.Core - 0000001E
GetProcessorInfo - Location.Thread - 00000000
GetProcessorInfo - Location2.Package - 00000000
GetProcessorInfo - Location2.Die - 00000000
GetProcessorInfo - Location2.Tile - 00000000
GetProcessorInfo - Location2.Module - 00000000
GetProcessorInfo - Location2.Core - 0000001E
GetProcessorInfo - Location2.Thread - 00000000
GetProcessorInfo - Index - 3D
GetProcessorInfo - ProcessorId - 000000000000003D
GetProcessorInfo - StatusFlag - 00000006
GetProcessorInfo - Location.Package - 00000000
GetProcessorInfo - Location.Core - 0000001E
GetProcessorInfo - Location.Thread - 00000001
GetProcessorInfo - Location2.Package - 00000000
GetProcessorInfo - Location2.Die - 00000000
GetProcessorInfo - Location2.Tile - 00000000
GetProcessorInfo - Location2.Module - 00000000
GetProcessorInfo - Location2.Core - 0000001E
GetProcessorInfo - Location2.Thread - 00000001
GetProcessorInfo - Index - 3E
GetProcessorInfo - ProcessorId - 000000000000003E
GetProcessorInfo - StatusFlag - 00000006
GetProcessorInfo - Location.Package - 00000000
GetProcessorInfo - Location.Core - 0000001F
GetProcessorInfo - Location.Thread - 00000000
GetProcessorInfo - Location2.Package - 00000000
GetProcessorInfo - Location2.Die - 00000000
GetProcessorInfo - Location2.Tile - 00000000
GetProcessorInfo - Location2.Module - 00000000
GetProcessorInfo - Location2.Core - 0000001F
GetProcessorInfo - Location2.Thread - 00000000
GetProcessorInfo - Index - 3F
GetProcessorInfo - ProcessorId - 000000000000003F
GetProcessorInfo - StatusFlag - 00000006
GetProcessorInfo - Location.Package - 00000000
GetProcessorInfo - Location.Core - 0000001F
GetProcessorInfo - Location.Thread - 00000001
GetProcessorInfo - Location2.Package - 00000000
GetProcessorInfo - Location2.Die - 00000000
GetProcessorInfo - Location2.Tile - 00000000
GetProcessorInfo - Location2.Module - 00000000
GetProcessorInfo - Location2.Core - 0000001F
GetProcessorInfo - Location2.Thread - 00000001
GetProcessorInfo - Index - 40
GetProcessorInfo - ProcessorId - 0000000000000040
GetProcessorInfo - StatusFlag - 00000006
GetProcessorInfo - Location.Package - 00000000
GetProcessorInfo - Location.Core - 00000020
GetProcessorInfo - Location.Thread - 00000000
GetProcessorInfo - Location2.Package - 00000000
GetProcessorInfo - Location2.Die - 00000000
GetProcessorInfo - Location2.Tile - 00000000
GetProcessorInfo - Location2.Module - 00000000
GetProcessorInfo - Location2.Core - 00000020
GetProcessorInfo - Location2.Thread - 00000000
GetProcessorInfo - Index - 41
GetProcessorInfo - ProcessorId - 0000000000000041
GetProcessorInfo - StatusFlag - 00000006
GetProcessorInfo - Location.Package - 00000000
GetProcessorInfo - Location.Core - 00000020
GetProcessorInfo - Location.Thread - 00000001
GetProcessorInfo - Location2.Package - 00000000
GetProcessorInfo - Location2.Die - 00000000
GetProcessorInfo - Location2.Tile - 00000000
GetProcessorInfo - Location2.Module - 00000000
GetProcessorInfo - Location2.Core - 00000020
GetProcessorInfo - Location2.Thread - 00000001
GetProcessorInfo - Index - 42
GetProcessorInfo - ProcessorId - 0000000000000042
GetProcessorInfo - StatusFlag - 00000006
GetProcessorInfo - Location.Package - 00000000
GetProcessorInfo - Location.Core - 00000021
GetProcessorInfo - Location.Thread - 00000000
GetProcessorInfo - Location2.Package - 00000000
GetProcessorInfo - Location2.Die - 00000000
GetProcessorInfo - Location2.Tile - 00000000
GetProcessorInfo - Location2.Module - 00000000
GetProcessorInfo - Location2.Core - 00000021
GetProcessorInfo - Location2.Thread - 00000000
GetProcessorInfo - Index - 43
GetProcessorInfo - ProcessorId - 0000000000000043
GetProcessorInfo - StatusFlag - 00000006
GetProcessorInfo - Location.Package - 00000000
GetProcessorInfo - Location.Core - 00000021
GetProcessorInfo - Location.Thread - 00000001
GetProcessorInfo - Location2.Package - 00000000
GetProcessorInfo - Location2.Die - 00000000
GetProcessorInfo - Location2.Tile - 00000000
GetProcessorInfo - Location2.Module - 00000000
GetProcessorInfo - Location2.Core - 00000021
GetProcessorInfo - Location2.Thread - 00000001
GetProcessorInfo - Index - 44
GetProcessorInfo - ProcessorId - 0000000000000044
GetProcessorInfo - StatusFlag - 00000006
GetProcessorInfo - Location.Package - 00000000
GetProcessorInfo - Location.Core - 00000022
GetProcessorInfo - Location.Thread - 00000000
GetProcessorInfo - Location2.Package - 00000000
GetProcessorInfo - Location2.Die - 00000000
GetProcessorInfo - Location2.Tile - 00000000
GetProcessorInfo - Location2.Module - 00000000
GetProcessorInfo - Location2.Core - 00000022
GetProcessorInfo - Location2.Thread - 00000000
GetProcessorInfo - Index - 45
GetProcessorInfo - ProcessorId - 0000000000000045
GetProcessorInfo - StatusFlag - 00000006
GetProcessorInfo - Location.Package - 00000000
GetProcessorInfo - Location.Core - 00000022
GetProcessorInfo - Location.Thread - 00000001
GetProcessorInfo - Location2.Package - 00000000
GetProcessorInfo - Location2.Die - 00000000
GetProcessorInfo - Location2.Tile - 00000000
GetProcessorInfo - Location2.Module - 00000000
GetProcessorInfo - Location2.Core - 00000022
GetProcessorInfo - Location2.Thread - 00000001
GetProcessorInfo - Index - 46
GetProcessorInfo - ProcessorId - 0000000000000046
GetProcessorInfo - StatusFlag - 00000006
GetProcessorInfo - Location.Package - 00000000
GetProcessorInfo - Location.Core - 00000023
GetProcessorInfo - Location.Thread - 00000000
GetProcessorInfo - Location2.Package - 00000000
GetProcessorInfo - Location2.Die - 00000000
GetProcessorInfo - Location2.Tile - 00000000
GetProcessorInfo - Location2.Module - 00000000
GetProcessorInfo - Location2.Core - 00000023
GetProcessorInfo - Location2.Thread - 00000000
GetProcessorInfo - Index - 47
GetProcessorInfo - ProcessorId - 0000000000000047
GetProcessorInfo - StatusFlag - 00000006
GetProcessorInfo - Location.Package - 00000000
GetProcessorInfo - Location.Core - 00000023
GetProcessorInfo - Location.Thread - 00000001
GetProcessorInfo - Location2.Package - 00000000
GetProcessorInfo - Location2.Die - 00000000
GetProcessorInfo - Location2.Tile - 00000000
GetProcessorInfo - Location2.Module - 00000000
GetProcessorInfo - Location2.Core - 00000023
GetProcessorInfo - Location2.Thread - 00000001
GetProcessorInfo - Index - 48
GetProcessorInfo - ProcessorId - 0000000000000048
GetProcessorInfo - StatusFlag - 00000006
GetProcessorInfo - Location.Package - 00000000
GetProcessorInfo - Location.Core - 00000024
GetProcessorInfo - Location.Thread - 00000000
GetProcessorInfo - Location2.Package - 00000000
GetProcessorInfo - Location2.Die - 00000000
GetProcessorInfo - Location2.Tile - 00000000
GetProcessorInfo - Location2.Module - 00000000
GetProcessorInfo - Location2.Core - 00000024
GetProcessorInfo - Location2.Thread - 00000000
GetProcessorInfo - Index - 49
GetProcessorInfo - ProcessorId - 0000000000000049
GetProcessorInfo - StatusFlag - 00000006
GetProcessorInfo - Location.Package - 00000000
GetProcessorInfo - Location.Core - 00000024
GetProcessorInfo - Location.Thread - 00000001
GetProcessorInfo - Location2.Package - 00000000
GetProcessorInfo - Location2.Die - 00000000
GetProcessorInfo - Location2.Tile - 00000000
GetProcessorInfo - Location2.Module - 00000000
GetProcessorInfo - Location2.Core - 00000024
GetProcessorInfo - Location2.Thread - 00000001
GetProcessorInfo - Index - 4A
GetProcessorInfo - ProcessorId - 000000000000004A
GetProcessorInfo - StatusFlag - 00000006
GetProcessorInfo - Location.Package - 00000000
GetProcessorInfo - Location.Core - 00000025
GetProcessorInfo - Location.Thread - 00000000
GetProcessorInfo - Location2.Package - 00000000
GetProcessorInfo - Location2.Die - 00000000
GetProcessorInfo - Location2.Tile - 00000000
GetProcessorInfo - Location2.Module - 00000000
GetProcessorInfo - Location2.Core - 00000025
GetProcessorInfo - Location2.Thread - 00000000
GetProcessorInfo - Index - 4B
GetProcessorInfo - ProcessorId - 000000000000004B
GetProcessorInfo - StatusFlag - 00000006
GetProcessorInfo - Location.Package - 00000000
GetProcessorInfo - Location.Core - 00000025
GetProcessorInfo - Location.Thread - 00000001
GetProcessorInfo - Location2.Package - 00000000
GetProcessorInfo - Location2.Die - 00000000
GetProcessorInfo - Location2.Tile - 00000000
GetProcessorInfo - Location2.Module - 00000000
GetProcessorInfo - Location2.Core - 00000025
GetProcessorInfo - Location2.Thread - 00000001
GetProcessorInfo - Index - 4C
GetProcessorInfo - ProcessorId - 000000000000004C
GetProcessorInfo - StatusFlag - 00000006
GetProcessorInfo - Location.Package - 00000000
GetProcessorInfo - Location.Core - 00000026
GetProcessorInfo - Location.Thread - 00000000
GetProcessorInfo - Location2.Package - 00000000
GetProcessorInfo - Location2.Die - 00000000
GetProcessorInfo - Location2.Tile - 00000000
GetProcessorInfo - Location2.Module - 00000000
GetProcessorInfo - Location2.Core - 00000026
GetProcessorInfo - Location2.Thread - 00000000
GetProcessorInfo - Index - 4D
GetProcessorInfo - ProcessorId - 000000000000004D
GetProcessorInfo - StatusFlag - 00000006
GetProcessorInfo - Location.Package - 00000000
GetProcessorInfo - Location.Core - 00000026
GetProcessorInfo - Location.Thread - 00000001
GetProcessorInfo - Location2.Package - 00000000
GetProcessorInfo - Location2.Die - 00000000
GetProcessorInfo - Location2.Tile - 00000000
GetProcessorInfo - Location2.Module - 00000000
GetProcessorInfo - Location2.Core - 00000026
GetProcessorInfo - Location2.Thread - 00000001
GetProcessorInfo - Index - 4E
GetProcessorInfo - ProcessorId - 000000000000004E
GetProcessorInfo - StatusFlag - 00000006
GetProcessorInfo - Location.Package - 00000000
GetProcessorInfo - Location.Core - 00000027
GetProcessorInfo - Location.Thread - 00000000
GetProcessorInfo - Location2.Package - 00000000
GetProcessorInfo - Location2.Die - 00000000
GetProcessorInfo - Location2.Tile - 00000000
GetProcessorInfo - Location2.Module - 00000000
GetProcessorInfo - Location2.Core - 00000027
GetProcessorInfo - Location2.Thread - 00000000
GetProcessorInfo - Index - 4F
GetProcessorInfo - ProcessorId - 000000000000004F
GetProcessorInfo - StatusFlag - 00000006
GetProcessorInfo - Location.Package - 00000000
GetProcessorInfo - Location.Core - 00000027
GetProcessorInfo - Location.Thread - 00000001
GetProcessorInfo - Location2.Package - 00000000
GetProcessorInfo - Location2.Die - 00000000
GetProcessorInfo - Location2.Tile - 00000000
GetProcessorInfo - Location2.Module - 00000000
GetProcessorInfo - Location2.Core - 00000027
GetProcessorInfo - Location2.Thread - 00000001
GetProcessorInfo - Index - 50
GetProcessorInfo - ProcessorId - 0000000000000080
GetProcessorInfo - StatusFlag - 00000006
GetProcessorInfo - Location.Package - 00000001
GetProcessorInfo - Location.Core - 00000000
GetProcessorInfo - Location.Thread - 00000000
GetProcessorInfo - Location2.Package - 00000001
GetProcessorInfo - Location2.Die - 00000000
GetProcessorInfo - Location2.Tile - 00000000
GetProcessorInfo - Location2.Module - 00000000
GetProcessorInfo - Location2.Core - 00000000
GetProcessorInfo - Location2.Thread - 00000000
GetProcessorInfo - Index - 51
GetProcessorInfo - ProcessorId - 0000000000000081
GetProcessorInfo - StatusFlag - 00000006
GetProcessorInfo - Location.Package - 00000001
GetProcessorInfo - Location.Core - 00000000
GetProcessorInfo - Location.Thread - 00000001
GetProcessorInfo - Location2.Package - 00000001
GetProcessorInfo - Location2.Die - 00000000
GetProcessorInfo - Location2.Tile - 00000000
GetProcessorInfo - Location2.Module - 00000000
GetProcessorInfo - Location2.Core - 00000000
GetProcessorInfo - Location2.Thread - 00000001
GetProcessorInfo - Index - 52
GetProcessorInfo - ProcessorId - 0000000000000082
GetProcessorInfo - StatusFlag - 00000006
GetProcessorInfo - Location.Package - 00000001
GetProcessorInfo - Location.Core - 00000001
GetProcessorInfo - Location.Thread - 00000000
GetProcessorInfo - Location2.Package - 00000001
GetProcessorInfo - Location2.Die - 00000000
GetProcessorInfo - Location2.Tile - 00000000
GetProcessorInfo - Location2.Module - 00000000
GetProcessorInfo - Location2.Core - 00000001
GetProcessorInfo - Location2.Thread - 00000000
GetProcessorInfo - Index - 53
GetProcessorInfo - ProcessorId - 0000000000000083
GetProcessorInfo - StatusFlag - 00000006
GetProcessorInfo - Location.Package - 00000001
GetProcessorInfo - Location.Core - 00000001
GetProcessorInfo - Location.Thread - 00000001
GetProcessorInfo - Location2.Package - 00000001
GetProcessorInfo - Location2.Die - 00000000
GetProcessorInfo - Location2.Tile - 00000000
GetProcessorInfo - Location2.Module - 00000000
GetProcessorInfo - Location2.Core - 00000001
GetProcessorInfo - Location2.Thread - 00000001
GetProcessorInfo - Index - 54
GetProcessorInfo - ProcessorId - 0000000000000084
GetProcessorInfo - StatusFlag - 00000006
GetProcessorInfo - Location.Package - 00000001
GetProcessorInfo - Location.Core - 00000002
GetProcessorInfo - Location.Thread - 00000000
GetProcessorInfo - Location2.Package - 00000001
GetProcessorInfo - Location2.Die - 00000000
GetProcessorInfo - Location2.Tile - 00000000
GetProcessorInfo - Location2.Module - 00000000
GetProcessorInfo - Location2.Core - 00000002
GetProcessorInfo - Location2.Thread - 00000000
GetProcessorInfo - Index - 55
GetProcessorInfo - ProcessorId - 0000000000000085
GetProcessorInfo - StatusFlag - 00000006
GetProcessorInfo - Location.Package - 00000001
GetProcessorInfo - Location.Core - 00000002
GetProcessorInfo - Location.Thread - 00000001
GetProcessorInfo - Location2.Package - 00000001
GetProcessorInfo - Location2.Die - 00000000
GetProcessorInfo - Location2.Tile - 00000000
GetProcessorInfo - Location2.Module - 00000000
GetProcessorInfo - Location2.Core - 00000002
GetProcessorInfo - Location2.Thread - 00000001
GetProcessorInfo - Index - 56
GetProcessorInfo - ProcessorId - 0000000000000086
GetProcessorInfo - StatusFlag - 00000006
GetProcessorInfo - Location.Package - 00000001
GetProcessorInfo - Location.Core - 00000003
GetProcessorInfo - Location.Thread - 00000000
GetProcessorInfo - Location2.Package - 00000001
GetProcessorInfo - Location2.Die - 00000000
GetProcessorInfo - Location2.Tile - 00000000
GetProcessorInfo - Location2.Module - 00000000
GetProcessorInfo - Location2.Core - 00000003
GetProcessorInfo - Location2.Thread - 00000000
GetProcessorInfo - Index - 57
GetProcessorInfo - ProcessorId - 0000000000000087
GetProcessorInfo - StatusFlag - 00000006
GetProcessorInfo - Location.Package - 00000001
GetProcessorInfo - Location.Core - 00000003
GetProcessorInfo - Location.Thread - 00000001
GetProcessorInfo - Location2.Package - 00000001
GetProcessorInfo - Location2.Die - 00000000
GetProcessorInfo - Location2.Tile - 00000000
GetProcessorInfo - Location2.Module - 00000000
GetProcessorInfo - Location2.Core - 00000003
GetProcessorInfo - Location2.Thread - 00000001
GetProcessorInfo - Index - 58
GetProcessorInfo - ProcessorId - 0000000000000088
GetProcessorInfo - StatusFlag - 00000006
GetProcessorInfo - Location.Package - 00000001
GetProcessorInfo - Location.Core - 00000004
GetProcessorInfo - Location.Thread - 00000000
GetProcessorInfo - Location2.Package - 00000001
GetProcessorInfo - Location2.Die - 00000000
GetProcessorInfo - Location2.Tile - 00000000
GetProcessorInfo - Location2.Module - 00000000
GetProcessorInfo - Location2.Core - 00000004
GetProcessorInfo - Location2.Thread - 00000000
GetProcessorInfo - Index - 59
GetProcessorInfo - ProcessorId - 0000000000000089
GetProcessorInfo - StatusFlag - 00000006
GetProcessorInfo - Location.Package - 00000001
GetProcessorInfo - Location.Core - 00000004
GetProcessorInfo - Location.Thread - 00000001
GetProcessorInfo - Location2.Package - 00000001
GetProcessorInfo - Location2.Die - 00000000
GetProcessorInfo - Location2.Tile - 00000000
GetProcessorInfo - Location2.Module - 00000000
GetProcessorInfo - Location2.Core - 00000004
GetProcessorInfo - Location2.Thread - 00000001
GetProcessorInfo - Index - 5A
GetProcessorInfo - ProcessorId - 000000000000008A
GetProcessorInfo - StatusFlag - 00000006
GetProcessorInfo - Location.Package - 00000001
GetProcessorInfo - Location.Core - 00000005
GetProcessorInfo - Location.Thread - 00000000
GetProcessorInfo - Location2.Package - 00000001
GetProcessorInfo - Location2.Die - 00000000
GetProcessorInfo - Location2.Tile - 00000000
GetProcessorInfo - Location2.Module - 00000000
GetProcessorInfo - Location2.Core - 00000005
GetProcessorInfo - Location2.Thread - 00000000
GetProcessorInfo - Index - 5B
GetProcessorInfo - ProcessorId - 000000000000008B
GetProcessorInfo - StatusFlag - 00000006
GetProcessorInfo - Location.Package - 00000001
GetProcessorInfo - Location.Core - 00000005
GetProcessorInfo - Location.Thread - 00000001
GetProcessorInfo - Location2.Package - 00000001
GetProcessorInfo - Location2.Die - 00000000
GetProcessorInfo - Location2.Tile - 00000000
GetProcessorInfo - Location2.Module - 00000000
GetProcessorInfo - Location2.Core - 00000005
GetProcessorInfo - Location2.Thread - 00000001
GetProcessorInfo - Index - 5C
GetProcessorInfo - ProcessorId - 000000000000008C
GetProcessorInfo - StatusFlag - 00000006
GetProcessorInfo - Location.Package - 00000001
GetProcessorInfo - Location.Core - 00000006
GetProcessorInfo - Location.Thread - 00000000
GetProcessorInfo - Location2.Package - 00000001
GetProcessorInfo - Location2.Die - 00000000
GetProcessorInfo - Location2.Tile - 00000000
GetProcessorInfo - Location2.Module - 00000000
GetProcessorInfo - Location2.Core - 00000006
GetProcessorInfo - Location2.Thread - 00000000
GetProcessorInfo - Index - 5D
GetProcessorInfo - ProcessorId - 000000000000008D
GetProcessorInfo - StatusFlag - 00000006
GetProcessorInfo - Location.Package - 00000001
GetProcessorInfo - Location.Core - 00000006
GetProcessorInfo - Location.Thread - 00000001
GetProcessorInfo - Location2.Package - 00000001
GetProcessorInfo - Location2.Die - 00000000
GetProcessorInfo - Location2.Tile - 00000000
GetProcessorInfo - Location2.Module - 00000000
GetProcessorInfo - Location2.Core - 00000006
GetProcessorInfo - Location2.Thread - 00000001
GetProcessorInfo - Index - 5E
GetProcessorInfo - ProcessorId - 000000000000008E
GetProcessorInfo - StatusFlag - 00000006
GetProcessorInfo - Location.Package - 00000001
GetProcessorInfo - Location.Core - 00000007
GetProcessorInfo - Location.Thread - 00000000
GetProcessorInfo - Location2.Package - 00000001
GetProcessorInfo - Location2.Die - 00000000
GetProcessorInfo - Location2.Tile - 00000000
GetProcessorInfo - Location2.Module - 00000000
GetProcessorInfo - Location2.Core - 00000007
GetProcessorInfo - Location2.Thread - 00000000
GetProcessorInfo - Index - 5F
GetProcessorInfo - ProcessorId - 000000000000008F
GetProcessorInfo - StatusFlag - 00000006
GetProcessorInfo - Location.Package - 00000001
GetProcessorInfo - Location.Core - 00000007
GetProcessorInfo - Location.Thread - 00000001
GetProcessorInfo - Location2.Package - 00000001
GetProcessorInfo - Location2.Die - 00000000
GetProcessorInfo - Location2.Tile - 00000000
GetProcessorInfo - Location2.Module - 00000000
GetProcessorInfo - Location2.Core - 00000007
GetProcessorInfo - Location2.Thread - 00000001
GetProcessorInfo - Index - 60
GetProcessorInfo - ProcessorId - 0000000000000090
GetProcessorInfo - StatusFlag - 00000006
GetProcessorInfo - Location.Package - 00000001
GetProcessorInfo - Location.Core - 00000008
GetProcessorInfo - Location.Thread - 00000000
GetProcessorInfo - Location2.Package - 00000001
GetProcessorInfo - Location2.Die - 00000000
GetProcessorInfo - Location2.Tile - 00000000
GetProcessorInfo - Location2.Module - 00000000
GetProcessorInfo - Location2.Core - 00000008
GetProcessorInfo - Location2.Thread - 00000000
GetProcessorInfo - Index - 61
GetProcessorInfo - ProcessorId - 0000000000000091
GetProcessorInfo - StatusFlag - 00000006
GetProcessorInfo - Location.Package - 00000001
GetProcessorInfo - Location.Core - 00000008
GetProcessorInfo - Location.Thread - 00000001
GetProcessorInfo - Location2.Package - 00000001
GetProcessorInfo - Location2.Die - 00000000
GetProcessorInfo - Location2.Tile - 00000000
GetProcessorInfo - Location2.Module - 00000000
GetProcessorInfo - Location2.Core - 00000008
GetProcessorInfo - Location2.Thread - 00000001
GetProcessorInfo - Index - 62
GetProcessorInfo - ProcessorId - 0000000000000092
GetProcessorInfo - StatusFlag - 00000006
GetProcessorInfo - Location.Package - 00000001
GetProcessorInfo - Location.Core - 00000009
GetProcessorInfo - Location.Thread - 00000000
GetProcessorInfo - Location2.Package - 00000001
GetProcessorInfo - Location2.Die - 00000000
GetProcessorInfo - Location2.Tile - 00000000
GetProcessorInfo - Location2.Module - 00000000
GetProcessorInfo - Location2.Core - 00000009
GetProcessorInfo - Location2.Thread - 00000000
GetProcessorInfo - Index - 63
GetProcessorInfo - ProcessorId - 0000000000000093
GetProcessorInfo - StatusFlag - 00000006
GetProcessorInfo - Location.Package - 00000001
GetProcessorInfo - Location.Core - 00000009
GetProcessorInfo - Location.Thread - 00000001
GetProcessorInfo - Location2.Package - 00000001
GetProcessorInfo - Location2.Die - 00000000
GetProcessorInfo - Location2.Tile - 00000000
GetProcessorInfo - Location2.Module - 00000000
GetProcessorInfo - Location2.Core - 00000009
GetProcessorInfo - Location2.Thread - 00000001
GetProcessorInfo - Index - 64
GetProcessorInfo - ProcessorId - 0000000000000094
GetProcessorInfo - StatusFlag - 00000006
GetProcessorInfo - Location.Package - 00000001
GetProcessorInfo - Location.Core - 0000000A
GetProcessorInfo - Location.Thread - 00000000
GetProcessorInfo - Location2.Package - 00000001
GetProcessorInfo - Location2.Die - 00000000
GetProcessorInfo - Location2.Tile - 00000000
GetProcessorInfo - Location2.Module - 00000000
GetProcessorInfo - Location2.Core - 0000000A
GetProcessorInfo - Location2.Thread - 00000000
GetProcessorInfo - Index - 65
GetProcessorInfo - ProcessorId - 0000000000000095
GetProcessorInfo - StatusFlag - 00000006
GetProcessorInfo - Location.Package - 00000001
GetProcessorInfo - Location.Core - 0000000A
GetProcessorInfo - Location.Thread - 00000001
GetProcessorInfo - Location2.Package - 00000001
GetProcessorInfo - Location2.Die - 00000000
GetProcessorInfo - Location2.Tile - 00000000
GetProcessorInfo - Location2.Module - 00000000
GetProcessorInfo - Location2.Core - 0000000A
GetProcessorInfo - Location2.Thread - 00000001
GetProcessorInfo - Index - 66
GetProcessorInfo - ProcessorId - 0000000000000096
GetProcessorInfo - StatusFlag - 00000006
GetProcessorInfo - Location.Package - 00000001
GetProcessorInfo - Location.Core - 0000000B
GetProcessorInfo - Location.Thread - 00000000
GetProcessorInfo - Location2.Package - 00000001
GetProcessorInfo - Location2.Die - 00000000
GetProcessorInfo - Location2.Tile - 00000000
GetProcessorInfo - Location2.Module - 00000000
GetProcessorInfo - Location2.Core - 0000000B
GetProcessorInfo - Location2.Thread - 00000000
GetProcessorInfo - Index - 67
GetProcessorInfo - ProcessorId - 0000000000000097
GetProcessorInfo - StatusFlag - 00000006
GetProcessorInfo - Location.Package - 00000001
GetProcessorInfo - Location.Core - 0000000B
GetProcessorInfo - Location.Thread - 00000001
GetProcessorInfo - Location2.Package - 00000001
GetProcessorInfo - Location2.Die - 00000000
GetProcessorInfo - Location2.Tile - 00000000
GetProcessorInfo - Location2.Module - 00000000
GetProcessorInfo - Location2.Core - 0000000B
GetProcessorInfo - Location2.Thread - 00000001
GetProcessorInfo - Index - 68
GetProcessorInfo - ProcessorId - 0000000000000098
GetProcessorInfo - StatusFlag - 00000006
GetProcessorInfo - Location.Package - 00000001
GetProcessorInfo - Location.Core - 0000000C
GetProcessorInfo - Location.Thread - 00000000
GetProcessorInfo - Location2.Package - 00000001
GetProcessorInfo - Location2.Die - 00000000
GetProcessorInfo - Location2.Tile - 00000000
GetProcessorInfo - Location2.Module - 00000000
GetProcessorInfo - Location2.Core - 0000000C
GetProcessorInfo - Location2.Thread - 00000000
GetProcessorInfo - Index - 69
GetProcessorInfo - ProcessorId - 0000000000000099
GetProcessorInfo - StatusFlag - 00000006
GetProcessorInfo - Location.Package - 00000001
GetProcessorInfo - Location.Core - 0000000C
GetProcessorInfo - Location.Thread - 00000001
GetProcessorInfo - Location2.Package - 00000001
GetProcessorInfo - Location2.Die - 00000000
GetProcessorInfo - Location2.Tile - 00000000
GetProcessorInfo - Location2.Module - 00000000
GetProcessorInfo - Location2.Core - 0000000C
GetProcessorInfo - Location2.Thread - 00000001
GetProcessorInfo - Index - 6A
GetProcessorInfo - ProcessorId - 000000000000009A
GetProcessorInfo - StatusFlag - 00000006
GetProcessorInfo - Location.Package - 00000001
GetProcessorInfo - Location.Core - 0000000D
GetProcessorInfo - Location.Thread - 00000000
GetProcessorInfo - Location2.Package - 00000001
GetProcessorInfo - Location2.Die - 00000000
GetProcessorInfo - Location2.Tile - 00000000
GetProcessorInfo - Location2.Module - 00000000
GetProcessorInfo - Location2.Core - 0000000D
GetProcessorInfo - Location2.Thread - 00000000
GetProcessorInfo - Index - 6B
GetProcessorInfo - ProcessorId - 000000000000009B
GetProcessorInfo - StatusFlag - 00000006
GetProcessorInfo - Location.Package - 00000001
GetProcessorInfo - Location.Core - 0000000D
GetProcessorInfo - Location.Thread - 00000001
GetProcessorInfo - Location2.Package - 00000001
GetProcessorInfo - Location2.Die - 00000000
GetProcessorInfo - Location2.Tile - 00000000
GetProcessorInfo - Location2.Module - 00000000
GetProcessorInfo - Location2.Core - 0000000D
GetProcessorInfo - Location2.Thread - 00000001
GetProcessorInfo - Index - 6C
GetProcessorInfo - ProcessorId - 000000000000009C
GetProcessorInfo - StatusFlag - 00000006
GetProcessorInfo - Location.Package - 00000001
GetProcessorInfo - Location.Core - 0000000E
GetProcessorInfo - Location.Thread - 00000000
GetProcessorInfo - Location2.Package - 00000001
GetProcessorInfo - Location2.Die - 00000000
GetProcessorInfo - Location2.Tile - 00000000
GetProcessorInfo - Location2.Module - 00000000
GetProcessorInfo - Location2.Core - 0000000E
GetProcessorInfo - Location2.Thread - 00000000
GetProcessorInfo - Index - 6D
GetProcessorInfo - ProcessorId - 000000000000009D
GetProcessorInfo - StatusFlag - 00000006
GetProcessorInfo - Location.Package - 00000001
GetProcessorInfo - Location.Core - 0000000E
GetProcessorInfo - Location.Thread - 00000001
GetProcessorInfo - Location2.Package - 00000001
GetProcessorInfo - Location2.Die - 00000000
GetProcessorInfo - Location2.Tile - 00000000
GetProcessorInfo - Location2.Module - 00000000
GetProcessorInfo - Location2.Core - 0000000E
GetProcessorInfo - Location2.Thread - 00000001
GetProcessorInfo - Index - 6E
GetProcessorInfo - ProcessorId - 000000000000009E
GetProcessorInfo - StatusFlag - 00000006
GetProcessorInfo - Location.Package - 00000001
GetProcessorInfo - Location.Core - 0000000F
GetProcessorInfo - Location.Thread - 00000000
GetProcessorInfo - Location2.Package - 00000001
GetProcessorInfo - Location2.Die - 00000000
GetProcessorInfo - Location2.Tile - 00000000
GetProcessorInfo - Location2.Module - 00000000
GetProcessorInfo - Location2.Core - 0000000F
GetProcessorInfo - Location2.Thread - 00000000
GetProcessorInfo - Index - 6F
GetProcessorInfo - ProcessorId - 000000000000009F
GetProcessorInfo - StatusFlag - 00000006
GetProcessorInfo - Location.Package - 00000001
GetProcessorInfo - Location.Core - 0000000F
GetProcessorInfo - Location.Thread - 00000001
GetProcessorInfo - Location2.Package - 00000001
GetProcessorInfo - Location2.Die - 00000000
GetProcessorInfo - Location2.Tile - 00000000
GetProcessorInfo - Location2.Module - 00000000
GetProcessorInfo - Location2.Core - 0000000F
GetProcessorInfo - Location2.Thread - 00000001
GetProcessorInfo - Index - 70
GetProcessorInfo - ProcessorId - 00000000000000A0
GetProcessorInfo - StatusFlag - 00000006
GetProcessorInfo - Location.Package - 00000001
GetProcessorInfo - Location.Core - 00000010
GetProcessorInfo - Location.Thread - 00000000
GetProcessorInfo - Location2.Package - 00000001
GetProcessorInfo - Location2.Die - 00000000
GetProcessorInfo - Location2.Tile - 00000000
GetProcessorInfo - Location2.Module - 00000000
GetProcessorInfo - Location2.Core - 00000010
GetProcessorInfo - Location2.Thread - 00000000
GetProcessorInfo - Index - 71
GetProcessorInfo - ProcessorId - 00000000000000A1
GetProcessorInfo - StatusFlag - 00000006
GetProcessorInfo - Location.Package - 00000001
GetProcessorInfo - Location.Core - 00000010
GetProcessorInfo - Location.Thread - 00000001
GetProcessorInfo - Location2.Package - 00000001
GetProcessorInfo - Location2.Die - 00000000
GetProcessorInfo - Location2.Tile - 00000000
GetProcessorInfo - Location2.Module - 00000000
GetProcessorInfo - Location2.Core - 00000010
GetProcessorInfo - Location2.Thread - 00000001
GetProcessorInfo - Index - 72
GetProcessorInfo - ProcessorId - 00000000000000A2
GetProcessorInfo - StatusFlag - 00000006
GetProcessorInfo - Location.Package - 00000001
GetProcessorInfo - Location.Core - 00000011
GetProcessorInfo - Location.Thread - 00000000
GetProcessorInfo - Location2.Package - 00000001
GetProcessorInfo - Location2.Die - 00000000
GetProcessorInfo - Location2.Tile - 00000000
GetProcessorInfo - Location2.Module - 00000000
GetProcessorInfo - Location2.Core - 00000011
GetProcessorInfo - Location2.Thread - 00000000
GetProcessorInfo - Index - 73
GetProcessorInfo - ProcessorId - 00000000000000A3
GetProcessorInfo - StatusFlag - 00000006
GetProcessorInfo - Location.Package - 00000001
GetProcessorInfo - Location.Core - 00000011
GetProcessorInfo - Location.Thread - 00000001
GetProcessorInfo - Location2.Package - 00000001
GetProcessorInfo - Location2.Die - 00000000
GetProcessorInfo - Location2.Tile - 00000000
GetProcessorInfo - Location2.Module - 00000000
GetProcessorInfo - Location2.Core - 00000011
GetProcessorInfo - Location2.Thread - 00000001
GetProcessorInfo - Index - 74
GetProcessorInfo - ProcessorId - 00000000000000A4
GetProcessorInfo - StatusFlag - 00000006
GetProcessorInfo - Location.Package - 00000001
GetProcessorInfo - Location.Core - 00000012
GetProcessorInfo - Location.Thread - 00000000
GetProcessorInfo - Location2.Package - 00000001
GetProcessorInfo - Location2.Die - 00000000
GetProcessorInfo - Location2.Tile - 00000000
GetProcessorInfo - Location2.Module - 00000000
GetProcessorInfo - Location2.Core - 00000012
GetProcessorInfo - Location2.Thread - 00000000
GetProcessorInfo - Index - 75
GetProcessorInfo - ProcessorId - 00000000000000A5
GetProcessorInfo - StatusFlag - 00000006
GetProcessorInfo - Location.Package - 00000001
GetProcessorInfo - Location.Core - 00000012
GetProcessorInfo - Location.Thread - 00000001
GetProcessorInfo - Location2.Package - 00000001
GetProcessorInfo - Location2.Die - 00000000
GetProcessorInfo - Location2.Tile - 00000000
GetProcessorInfo - Location2.Module - 00000000
GetProcessorInfo - Location2.Core - 00000012
GetProcessorInfo - Location2.Thread - 00000001
GetProcessorInfo - Index - 76
GetProcessorInfo - ProcessorId - 00000000000000A6
GetProcessorInfo - StatusFlag - 00000006
GetProcessorInfo - Location.Package - 00000001
GetProcessorInfo - Location.Core - 00000013
GetProcessorInfo - Location.Thread - 00000000
GetProcessorInfo - Location2.Package - 00000001
GetProcessorInfo - Location2.Die - 00000000
GetProcessorInfo - Location2.Tile - 00000000
GetProcessorInfo - Location2.Module - 00000000
GetProcessorInfo - Location2.Core - 00000013
GetProcessorInfo - Location2.Thread - 00000000
GetProcessorInfo - Index - 77
GetProcessorInfo - ProcessorId - 00000000000000A7
GetProcessorInfo - StatusFlag - 00000006
GetProcessorInfo - Location.Package - 00000001
GetProcessorInfo - Location.Core - 00000013
GetProcessorInfo - Location.Thread - 00000001
GetProcessorInfo - Location2.Package - 00000001
GetProcessorInfo - Location2.Die - 00000000
GetProcessorInfo - Location2.Tile - 00000000
GetProcessorInfo - Location2.Module - 00000000
GetProcessorInfo - Location2.Core - 00000013
GetProcessorInfo - Location2.Thread - 00000001
GetProcessorInfo - Index - 78
GetProcessorInfo - ProcessorId - 00000000000000A8
GetProcessorInfo - StatusFlag - 00000006
GetProcessorInfo - Location.Package - 00000001
GetProcessorInfo - Location.Core - 00000014
GetProcessorInfo - Location.Thread - 00000000
GetProcessorInfo - Location2.Package - 00000001
GetProcessorInfo - Location2.Die - 00000000
GetProcessorInfo - Location2.Tile - 00000000
GetProcessorInfo - Location2.Module - 00000000
GetProcessorInfo - Location2.Core - 00000014
GetProcessorInfo - Location2.Thread - 00000000
GetProcessorInfo - Index - 79
GetProcessorInfo - ProcessorId - 00000000000000A9
GetProcessorInfo - StatusFlag - 00000006
GetProcessorInfo - Location.Package - 00000001
GetProcessorInfo - Location.Core - 00000014
GetProcessorInfo - Location.Thread - 00000001
GetProcessorInfo - Location2.Package - 00000001
GetProcessorInfo - Location2.Die - 00000000
GetProcessorInfo - Location2.Tile - 00000000
GetProcessorInfo - Location2.Module - 00000000
GetProcessorInfo - Location2.Core - 00000014
GetProcessorInfo - Location2.Thread - 00000001
GetProcessorInfo - Index - 7A
GetProcessorInfo - ProcessorId - 00000000000000AA
GetProcessorInfo - StatusFlag - 00000006
GetProcessorInfo - Location.Package - 00000001
GetProcessorInfo - Location.Core - 00000015
GetProcessorInfo - Location.Thread - 00000000
GetProcessorInfo - Location2.Package - 00000001
GetProcessorInfo - Location2.Die - 00000000
GetProcessorInfo - Location2.Tile - 00000000
GetProcessorInfo - Location2.Module - 00000000
GetProcessorInfo - Location2.Core - 00000015
GetProcessorInfo - Location2.Thread - 00000000
GetProcessorInfo - Index - 7B
GetProcessorInfo - ProcessorId - 00000000000000AB
GetProcessorInfo - StatusFlag - 00000006
GetProcessorInfo - Location.Package - 00000001
GetProcessorInfo - Location.Core - 00000015
GetProcessorInfo - Location.Thread - 00000001
GetProcessorInfo - Location2.Package - 00000001
GetProcessorInfo - Location2.Die - 00000000
GetProcessorInfo - Location2.Tile - 00000000
GetProcessorInfo - Location2.Module - 00000000
GetProcessorInfo - Location2.Core - 00000015
GetProcessorInfo - Location2.Thread - 00000001
GetProcessorInfo - Index - 7C
GetProcessorInfo - ProcessorId - 00000000000000AC
GetProcessorInfo - StatusFlag - 00000006
GetProcessorInfo - Location.Package - 00000001
GetProcessorInfo - Location.Core - 00000016
GetProcessorInfo - Location.Thread - 00000000
GetProcessorInfo - Location2.Package - 00000001
GetProcessorInfo - Location2.Die - 00000000
GetProcessorInfo - Location2.Tile - 00000000
GetProcessorInfo - Location2.Module - 00000000
GetProcessorInfo - Location2.Core - 00000016
GetProcessorInfo - Location2.Thread - 00000000
GetProcessorInfo - Index - 7D
GetProcessorInfo - ProcessorId - 00000000000000AD
GetProcessorInfo - StatusFlag - 00000006
GetProcessorInfo - Location.Package - 00000001
GetProcessorInfo - Location.Core - 00000016
GetProcessorInfo - Location.Thread - 00000001
GetProcessorInfo - Location2.Package - 00000001
GetProcessorInfo - Location2.Die - 00000000
GetProcessorInfo - Location2.Tile - 00000000
GetProcessorInfo - Location2.Module - 00000000
GetProcessorInfo - Location2.Core - 00000016
GetProcessorInfo - Location2.Thread - 00000001
GetProcessorInfo - Index - 7E
GetProcessorInfo - ProcessorId - 00000000000000AE
GetProcessorInfo - StatusFlag - 00000006
GetProcessorInfo - Location.Package - 00000001
GetProcessorInfo - Location.Core - 00000017
GetProcessorInfo - Location.Thread - 00000000
GetProcessorInfo - Location2.Package - 00000001
GetProcessorInfo - Location2.Die - 00000000
GetProcessorInfo - Location2.Tile - 00000000
GetProcessorInfo - Location2.Module - 00000000
GetProcessorInfo - Location2.Core - 00000017
GetProcessorInfo - Location2.Thread - 00000000
GetProcessorInfo - Index - 7F
GetProcessorInfo - ProcessorId - 00000000000000AF
GetProcessorInfo - StatusFlag - 00000006
GetProcessorInfo - Location.Package - 00000001
GetProcessorInfo - Location.Core - 00000017
GetProcessorInfo - Location.Thread - 00000001
GetProcessorInfo - Location2.Package - 00000001
GetProcessorInfo - Location2.Die - 00000000
GetProcessorInfo - Location2.Tile - 00000000
GetProcessorInfo - Location2.Module - 00000000
GetProcessorInfo - Location2.Core - 00000017
GetProcessorInfo - Location2.Thread - 00000001
GetProcessorInfo - Index - 80
GetProcessorInfo - ProcessorId - 00000000000000B0
GetProcessorInfo - StatusFlag - 00000006
GetProcessorInfo - Location.Package - 00000001
GetProcessorInfo - Location.Core - 00000018
GetProcessorInfo - Location.Thread - 00000000
GetProcessorInfo - Location2.Package - 00000001
GetProcessorInfo - Location2.Die - 00000000
GetProcessorInfo - Location2.Tile - 00000000
GetProcessorInfo - Location2.Module - 00000000
GetProcessorInfo - Location2.Core - 00000018
GetProcessorInfo - Location2.Thread - 00000000
GetProcessorInfo - Index - 81
GetProcessorInfo - ProcessorId - 00000000000000B1
GetProcessorInfo - StatusFlag - 00000006
GetProcessorInfo - Location.Package - 00000001
GetProcessorInfo - Location.Core - 00000018
GetProcessorInfo - Location.Thread - 00000001
GetProcessorInfo - Location2.Package - 00000001
GetProcessorInfo - Location2.Die - 00000000
GetProcessorInfo - Location2.Tile - 00000000
GetProcessorInfo - Location2.Module - 00000000
GetProcessorInfo - Location2.Core - 00000018
GetProcessorInfo - Location2.Thread - 00000001
GetProcessorInfo - Index - 82
GetProcessorInfo - ProcessorId - 00000000000000B2
GetProcessorInfo - StatusFlag - 00000006
GetProcessorInfo - Location.Package - 00000001
GetProcessorInfo - Location.Core - 00000019
GetProcessorInfo - Location.Thread - 00000000
GetProcessorInfo - Location2.Package - 00000001
GetProcessorInfo - Location2.Die - 00000000
GetProcessorInfo - Location2.Tile - 00000000
GetProcessorInfo - Location2.Module - 00000000
GetProcessorInfo - Location2.Core - 00000019
GetProcessorInfo - Location2.Thread - 00000000
GetProcessorInfo - Index - 83
GetProcessorInfo - ProcessorId - 00000000000000B3
GetProcessorInfo - StatusFlag - 00000006
GetProcessorInfo - Location.Package - 00000001
GetProcessorInfo - Location.Core - 00000019
GetProcessorInfo - Location.Thread - 00000001
GetProcessorInfo - Location2.Package - 00000001
GetProcessorInfo - Location2.Die - 00000000
GetProcessorInfo - Location2.Tile - 00000000
GetProcessorInfo - Location2.Module - 00000000
GetProcessorInfo - Location2.Core - 00000019
GetProcessorInfo - Location2.Thread - 00000001
GetProcessorInfo - Index - 84
GetProcessorInfo - ProcessorId - 00000000000000B4
GetProcessorInfo - StatusFlag - 00000006
GetProcessorInfo - Location.Package - 00000001
GetProcessorInfo - Location.Core - 0000001A
GetProcessorInfo - Location.Thread - 00000000
GetProcessorInfo - Location2.Package - 00000001
GetProcessorInfo - Location2.Die - 00000000
GetProcessorInfo - Location2.Tile - 00000000
GetProcessorInfo - Location2.Module - 00000000
GetProcessorInfo - Location2.Core - 0000001A
GetProcessorInfo - Location2.Thread - 00000000
GetProcessorInfo - Index - 85
GetProcessorInfo - ProcessorId - 00000000000000B5
GetProcessorInfo - StatusFlag - 00000006
GetProcessorInfo - Location.Package - 00000001
GetProcessorInfo - Location.Core - 0000001A
GetProcessorInfo - Location.Thread - 00000001
GetProcessorInfo - Location2.Package - 00000001
GetProcessorInfo - Location2.Die - 00000000
GetProcessorInfo - Location2.Tile - 00000000
GetProcessorInfo - Location2.Module - 00000000
GetProcessorInfo - Location2.Core - 0000001A
GetProcessorInfo - Location2.Thread - 00000001
GetProcessorInfo - Index - 86
GetProcessorInfo - ProcessorId - 00000000000000B6
GetProcessorInfo - StatusFlag - 00000006
GetProcessorInfo - Location.Package - 00000001
GetProcessorInfo - Location.Core - 0000001B
GetProcessorInfo - Location.Thread - 00000000
GetProcessorInfo - Location2.Package - 00000001
GetProcessorInfo - Location2.Die - 00000000
GetProcessorInfo - Location2.Tile - 00000000
GetProcessorInfo - Location2.Module - 00000000
GetProcessorInfo - Location2.Core - 0000001B
GetProcessorInfo - Location2.Thread - 00000000
GetProcessorInfo - Index - 87
GetProcessorInfo - ProcessorId - 00000000000000B7
GetProcessorInfo - StatusFlag - 00000006
GetProcessorInfo - Location.Package - 00000001
GetProcessorInfo - Location.Core - 0000001B
GetProcessorInfo - Location.Thread - 00000001
GetProcessorInfo - Location2.Package - 00000001
GetProcessorInfo - Location2.Die - 00000000
GetProcessorInfo - Location2.Tile - 00000000
GetProcessorInfo - Location2.Module - 00000000
GetProcessorInfo - Location2.Core - 0000001B
GetProcessorInfo - Location2.Thread - 00000001
GetProcessorInfo - Index - 88
GetProcessorInfo - ProcessorId - 00000000000000B8
GetProcessorInfo - StatusFlag - 00000006
GetProcessorInfo - Location.Package - 00000001
GetProcessorInfo - Location.Core - 0000001C
GetProcessorInfo - Location.Thread - 00000000
GetProcessorInfo - Location2.Package - 00000001
GetProcessorInfo - Location2.Die - 00000000
GetProcessorInfo - Location2.Tile - 00000000
GetProcessorInfo - Location2.Module - 00000000
GetProcessorInfo - Location2.Core - 0000001C
GetProcessorInfo - Location2.Thread - 00000000
GetProcessorInfo - Index - 89
GetProcessorInfo - ProcessorId - 00000000000000B9
GetProcessorInfo - StatusFlag - 00000006
GetProcessorInfo - Location.Package - 00000001
GetProcessorInfo - Location.Core - 0000001C
GetProcessorInfo - Location.Thread - 00000001
GetProcessorInfo - Location2.Package - 00000001
GetProcessorInfo - Location2.Die - 00000000
GetProcessorInfo - Location2.Tile - 00000000
GetProcessorInfo - Location2.Module - 00000000
GetProcessorInfo - Location2.Core - 0000001C
GetProcessorInfo - Location2.Thread - 00000001
GetProcessorInfo - Index - 8A
GetProcessorInfo - ProcessorId - 00000000000000BA
GetProcessorInfo - StatusFlag - 00000006
GetProcessorInfo - Location.Package - 00000001
GetProcessorInfo - Location.Core - 0000001D
GetProcessorInfo - Location.Thread - 00000000
GetProcessorInfo - Location2.Package - 00000001
GetProcessorInfo - Location2.Die - 00000000
GetProcessorInfo - Location2.Tile - 00000000
GetProcessorInfo - Location2.Module - 00000000
GetProcessorInfo - Location2.Core - 0000001D
GetProcessorInfo - Location2.Thread - 00000000
GetProcessorInfo - Index - 8B
GetProcessorInfo - ProcessorId - 00000000000000BB
GetProcessorInfo - StatusFlag - 00000006
GetProcessorInfo - Location.Package - 00000001
GetProcessorInfo - Location.Core - 0000001D
GetProcessorInfo - Location.Thread - 00000001
GetProcessorInfo - Location2.Package - 00000001
GetProcessorInfo - Location2.Die - 00000000
GetProcessorInfo - Location2.Tile - 00000000
GetProcessorInfo - Location2.Module - 00000000
GetProcessorInfo - Location2.Core - 0000001D
GetProcessorInfo - Location2.Thread - 00000001
GetProcessorInfo - Index - 8C
GetProcessorInfo - ProcessorId - 00000000000000BC
GetProcessorInfo - StatusFlag - 00000006
GetProcessorInfo - Location.Package - 00000001
GetProcessorInfo - Location.Core - 0000001E
GetProcessorInfo - Location.Thread - 00000000
GetProcessorInfo - Location2.Package - 00000001
GetProcessorInfo - Location2.Die - 00000000
GetProcessorInfo - Location2.Tile - 00000000
GetProcessorInfo - Location2.Module - 00000000
GetProcessorInfo - Location2.Core - 0000001E
GetProcessorInfo - Location2.Thread - 00000000
GetProcessorInfo - Index - 8D
GetProcessorInfo - ProcessorId - 00000000000000BD
GetProcessorInfo - StatusFlag - 00000006
GetProcessorInfo - Location.Package - 00000001
GetProcessorInfo - Location.Core - 0000001E
GetProcessorInfo - Location.Thread - 00000001
GetProcessorInfo - Location2.Package - 00000001
GetProcessorInfo - Location2.Die - 00000000
GetProcessorInfo - Location2.Tile - 00000000
GetProcessorInfo - Location2.Module - 00000000
GetProcessorInfo - Location2.Core - 0000001E
GetProcessorInfo - Location2.Thread - 00000001
GetProcessorInfo - Index - 8E
GetProcessorInfo - ProcessorId - 00000000000000BE
GetProcessorInfo - StatusFlag - 00000006
GetProcessorInfo - Location.Package - 00000001
GetProcessorInfo - Location.Core - 0000001F
GetProcessorInfo - Location.Thread - 00000000
GetProcessorInfo - Location2.Package - 00000001
GetProcessorInfo - Location2.Die - 00000000
GetProcessorInfo - Location2.Tile - 00000000
GetProcessorInfo - Location2.Module - 00000000
GetProcessorInfo - Location2.Core - 0000001F
GetProcessorInfo - Location2.Thread - 00000000
GetProcessorInfo - Index - 8F
GetProcessorInfo - ProcessorId - 00000000000000BF
GetProcessorInfo - StatusFlag - 00000006
GetProcessorInfo - Location.Package - 00000001
GetProcessorInfo - Location.Core - 0000001F
GetProcessorInfo - Location.Thread - 00000001
GetProcessorInfo - Location2.Package - 00000001
GetProcessorInfo - Location2.Die - 00000000
GetProcessorInfo - Location2.Tile - 00000000
GetProcessorInfo - Location2.Module - 00000000
GetProcessorInfo - Location2.Core - 0000001F
GetProcessorInfo - Location2.Thread - 00000001
GetProcessorInfo - Index - 90
GetProcessorInfo - ProcessorId - 00000000000000C0
GetProcessorInfo - StatusFlag - 00000006
GetProcessorInfo - Location.Package - 00000001
GetProcessorInfo - Location.Core - 00000020
GetProcessorInfo - Location.Thread - 00000000
GetProcessorInfo - Location2.Package - 00000001
GetProcessorInfo - Location2.Die - 00000000
GetProcessorInfo - Location2.Tile - 00000000
GetProcessorInfo - Location2.Module - 00000000
GetProcessorInfo - Location2.Core - 00000020
GetProcessorInfo - Location2.Thread - 00000000
GetProcessorInfo - Index - 91
GetProcessorInfo - ProcessorId - 00000000000000C1
GetProcessorInfo - StatusFlag - 00000006
GetProcessorInfo - Location.Package - 00000001
GetProcessorInfo - Location.Core - 00000020
GetProcessorInfo - Location.Thread - 00000001
GetProcessorInfo - Location2.Package - 00000001
GetProcessorInfo - Location2.Die - 00000000
GetProcessorInfo - Location2.Tile - 00000000
GetProcessorInfo - Location2.Module - 00000000
GetProcessorInfo - Location2.Core - 00000020
GetProcessorInfo - Location2.Thread - 00000001
GetProcessorInfo - Index - 92
GetProcessorInfo - ProcessorId - 00000000000000C2
GetProcessorInfo - StatusFlag - 00000006
GetProcessorInfo - Location.Package - 00000001
GetProcessorInfo - Location.Core - 00000021
GetProcessorInfo - Location.Thread - 00000000
GetProcessorInfo - Location2.Package - 00000001
GetProcessorInfo - Location2.Die - 00000000
GetProcessorInfo - Location2.Tile - 00000000
GetProcessorInfo - Location2.Module - 00000000
GetProcessorInfo - Location2.Core - 00000021
GetProcessorInfo - Location2.Thread - 00000000
GetProcessorInfo - Index - 93
GetProcessorInfo - ProcessorId - 00000000000000C3
GetProcessorInfo - StatusFlag - 00000006
GetProcessorInfo - Location.Package - 00000001
GetProcessorInfo - Location.Core - 00000021
GetProcessorInfo - Location.Thread - 00000001
GetProcessorInfo - Location2.Package - 00000001
GetProcessorInfo - Location2.Die - 00000000
GetProcessorInfo - Location2.Tile - 00000000
GetProcessorInfo - Location2.Module - 00000000
GetProcessorInfo - Location2.Core - 00000021
GetProcessorInfo - Location2.Thread - 00000001
GetProcessorInfo - Index - 94
GetProcessorInfo - ProcessorId - 00000000000000C4
GetProcessorInfo - StatusFlag - 00000006
GetProcessorInfo - Location.Package - 00000001
GetProcessorInfo - Location.Core - 00000022
GetProcessorInfo - Location.Thread - 00000000
GetProcessorInfo - Location2.Package - 00000001
GetProcessorInfo - Location2.Die - 00000000
GetProcessorInfo - Location2.Tile - 00000000
GetProcessorInfo - Location2.Module - 00000000
GetProcessorInfo - Location2.Core - 00000022
GetProcessorInfo - Location2.Thread - 00000000
GetProcessorInfo - Index - 95
GetProcessorInfo - ProcessorId - 00000000000000C5
GetProcessorInfo - StatusFlag - 00000006
GetProcessorInfo - Location.Package - 00000001
GetProcessorInfo - Location.Core - 00000022
GetProcessorInfo - Location.Thread - 00000001
GetProcessorInfo - Location2.Package - 00000001
GetProcessorInfo - Location2.Die - 00000000
GetProcessorInfo - Location2.Tile - 00000000
GetProcessorInfo - Location2.Module - 00000000
GetProcessorInfo - Location2.Core - 00000022
GetProcessorInfo - Location2.Thread - 00000001
GetProcessorInfo - Index - 96
GetProcessorInfo - ProcessorId - 00000000000000C6
GetProcessorInfo - StatusFlag - 00000006
GetProcessorInfo - Location.Package - 00000001
GetProcessorInfo - Location.Core - 00000023
GetProcessorInfo - Location.Thread - 00000000
GetProcessorInfo - Location2.Package - 00000001
GetProcessorInfo - Location2.Die - 00000000
GetProcessorInfo - Location2.Tile - 00000000
GetProcessorInfo - Location2.Module - 00000000
GetProcessorInfo - Location2.Core - 00000023
GetProcessorInfo - Location2.Thread - 00000000
GetProcessorInfo - Index - 97
GetProcessorInfo - ProcessorId - 00000000000000C7
GetProcessorInfo - StatusFlag - 00000006
GetProcessorInfo - Location.Package - 00000001
GetProcessorInfo - Location.Core - 00000023
GetProcessorInfo - Location.Thread - 00000001
GetProcessorInfo - Location2.Package - 00000001
GetProcessorInfo - Location2.Die - 00000000
GetProcessorInfo - Location2.Tile - 00000000
GetProcessorInfo - Location2.Module - 00000000
GetProcessorInfo - Location2.Core - 00000023
GetProcessorInfo - Location2.Thread - 00000001
GetProcessorInfo - Index - 98
GetProcessorInfo - ProcessorId - 00000000000000C8
GetProcessorInfo - StatusFlag - 00000006
GetProcessorInfo - Location.Package - 00000001
GetProcessorInfo - Location.Core - 00000024
GetProcessorInfo - Location.Thread - 00000000
GetProcessorInfo - Location2.Package - 00000001
GetProcessorInfo - Location2.Die - 00000000
GetProcessorInfo - Location2.Tile - 00000000
GetProcessorInfo - Location2.Module - 00000000
GetProcessorInfo - Location2.Core - 00000024
GetProcessorInfo - Location2.Thread - 00000000
GetProcessorInfo - Index - 99
GetProcessorInfo - ProcessorId - 00000000000000C9
GetProcessorInfo - StatusFlag - 00000006
GetProcessorInfo - Location.Package - 00000001
GetProcessorInfo - Location.Core - 00000024
GetProcessorInfo - Location.Thread - 00000001
GetProcessorInfo - Location2.Package - 00000001
GetProcessorInfo - Location2.Die - 00000000
GetProcessorInfo - Location2.Tile - 00000000
GetProcessorInfo - Location2.Module - 00000000
GetProcessorInfo - Location2.Core - 00000024
GetProcessorInfo - Location2.Thread - 00000001
GetProcessorInfo - Index - 9A
GetProcessorInfo - ProcessorId - 00000000000000CA
GetProcessorInfo - StatusFlag - 00000006
GetProcessorInfo - Location.Package - 00000001
GetProcessorInfo - Location.Core - 00000025
GetProcessorInfo - Location.Thread - 00000000
GetProcessorInfo - Location2.Package - 00000001
GetProcessorInfo - Location2.Die - 00000000
GetProcessorInfo - Location2.Tile - 00000000
GetProcessorInfo - Location2.Module - 00000000
GetProcessorInfo - Location2.Core - 00000025
GetProcessorInfo - Location2.Thread - 00000000
GetProcessorInfo - Index - 9B
GetProcessorInfo - ProcessorId - 00000000000000CB
GetProcessorInfo - StatusFlag - 00000006
GetProcessorInfo - Location.Package - 00000001
GetProcessorInfo - Location.Core - 00000025
GetProcessorInfo - Location.Thread - 00000001
GetProcessorInfo - Location2.Package - 00000001
GetProcessorInfo - Location2.Die - 00000000
GetProcessorInfo - Location2.Tile - 00000000
GetProcessorInfo - Location2.Module - 00000000
GetProcessorInfo - Location2.Core - 00000025
GetProcessorInfo - Location2.Thread - 00000001
GetProcessorInfo - Index - 9C
GetProcessorInfo - ProcessorId - 00000000000000CC
GetProcessorInfo - StatusFlag - 00000006
GetProcessorInfo - Location.Package - 00000001
GetProcessorInfo - Location.Core - 00000026
GetProcessorInfo - Location.Thread - 00000000
GetProcessorInfo - Location2.Package - 00000001
GetProcessorInfo - Location2.Die - 00000000
GetProcessorInfo - Location2.Tile - 00000000
GetProcessorInfo - Location2.Module - 00000000
GetProcessorInfo - Location2.Core - 00000026
GetProcessorInfo - Location2.Thread - 00000000
GetProcessorInfo - Index - 9D
GetProcessorInfo - ProcessorId - 00000000000000CD
GetProcessorInfo - StatusFlag - 00000006
GetProcessorInfo - Location.Package - 00000001
GetProcessorInfo - Location.Core - 00000026
GetProcessorInfo - Location.Thread - 00000001
GetProcessorInfo - Location2.Package - 00000001
GetProcessorInfo - Location2.Die - 00000000
GetProcessorInfo - Location2.Tile - 00000000
GetProcessorInfo - Location2.Module - 00000000
GetProcessorInfo - Location2.Core - 00000026
GetProcessorInfo - Location2.Thread - 00000001
GetProcessorInfo - Index - 9E
GetProcessorInfo - ProcessorId - 00000000000000CE
GetProcessorInfo - StatusFlag - 00000006
GetProcessorInfo - Location.Package - 00000001
GetProcessorInfo - Location.Core - 00000027
GetProcessorInfo - Location.Thread - 00000000
GetProcessorInfo - Location2.Package - 00000001
GetProcessorInfo - Location2.Die - 00000000
GetProcessorInfo - Location2.Tile - 00000000
GetProcessorInfo - Location2.Module - 00000000
GetProcessorInfo - Location2.Core - 00000027
GetProcessorInfo - Location2.Thread - 00000000
GetProcessorInfo - Index - 9F
GetProcessorInfo - ProcessorId - 00000000000000CF
GetProcessorInfo - StatusFlag - 00000006
GetProcessorInfo - Location.Package - 00000001
GetProcessorInfo - Location.Core - 00000027
GetProcessorInfo - Location.Thread - 00000001
GetProcessorInfo - Location2.Package - 00000001
GetProcessorInfo - Location2.Die - 00000000
GetProcessorInfo - Location2.Tile - 00000000
GetProcessorInfo - Location2.Module - 00000000
GetProcessorInfo - Location2.Core - 00000027
GetProcessorInfo - Location2.Thread - 00000001
mCpuConfigLibConfigContextBuffer->NumberOfProcessors = A0
mCpuConfigLibConfigContextBuffer->BspNumber = 0
SMBIOS Package[0] - Processor[0]
SMBIOS Package[1] - Processor[80]
CPU[000]: ThreadCountOfPackage=80 ThreadCountOfDie=80 ThreadCountOfCore=2
CPU[080]: ThreadCountOfPackage=80 ThreadCountOfDie=80 ThreadCountOfCore=2
PROGRESS CODE: V03040003 I0
PDB = c:\efi\servergen2\intel\Build\EagleStreamRpPkg\DEBUG_VS2015x86\X64\ServerSecurityPkg\Tdx\TdxDxe\TdxDxe\DEBUG\TdxDxe.pdb
PROGRESS CODE: V03040002 I0
[MP_DISPATCH] MpDispatch4v0_CommonConstructor BEGIN
[MP_DISPATCH] MpDispatch4v0_CommonConstructor END (Success)
[TDX_LATE] TdxDxeEntryPoint BEGIN
TDX not capable
[TDX_LATE] TdxDxeEntryPoint END (Unsupported)
[MP_DISPATCH] MpDispatch4v0_CommonDestructor BEGIN
[MP_DISPATCH] MpDispatch4v0_CommonDestructor END (Success)
Error: Image at 0006A263000 start failed: Unsupported
PDB = c:\efi\servergen2\intel\Build\EagleStreamRpPkg\DEBUG_VS2015x86\X64\ServerSecurityPkg\Tdx\TdxDxe\TdxDxe\DEBUG\TdxDxe.pdb
PROGRESS CODE: V03040003 I0
PDB = c:\efi\servergen2\intel\Build\EagleStreamRpPkg\DEBUG_VS2015x86\X64\ServerSiliconPkg\Iio\Dxe\IioInit\IioInitSpr\DEBUG\IioInit.pdb
PROGRESS CODE: V03040002 I0
[IIO](TH) Trace Hub requested memory Size is 0. Not allocating memory.
[IIO](TH) PCH Trace Hub not accessible. Disabled.
[IIO](TH) ERROR Failed to configure PCH Trace Hub. Status= Not Ready
ERROR: IioTraceHubInitialize failed. Status= Not Ready
[IIO](SPK) IioSpkSocketInitialize: SocketId: 0
[IIO](SPK) IioSpkSocketInitialize: SocketId: 1
[0.1 p1] 00:15:01.0: Device is not present!
[0.2 p9] 00:26:01.0: Device is not present!
[0.3 p17] 00:37:01.0: Device is not present!
[0.4 p25] 00:48:01.0: Device is not present!
[0.4 p27] 00:48:03.0: Device is not present!
[0.4 p29] 00:48:05.0: Device is not present!
[0.4 p31] 00:48:07.0: Device is not present!
[0.5 p33] 00:59:01.0: Device is not present!
[0.5 p35] 00:59:03.0: Device is not present!
[0.5 p37] 00:59:05.0: Device is not present!
[0.5 p39] 00:59:07.0: Device is not present!
[1.1 p1] 00:97:01.0: Device is not present!
[1.2 p9] 00:A7:01.0: Device is not present!
[1.3 p17] 00:B7:01.0: Device is not present!
[1.4 p25] 00:C7:01.0: Device is not present!
[1.4 p27] 00:C7:03.0: Device is not present!
[1.4 p29] 00:C7:05.0: Device is not present!
[1.4 p31] 00:C7:07.0: Device is not present!
[1.5 p33] 00:D7:01.0: Device is not present!
[1.5 p35] 00:D7:03.0: Device is not present!
[1.5 p37] 00:D7:05.0: Device is not present!
[1.5 p39] 00:D7:07.0: Device is not present!
[1.6 p41] 00:80:01.0: Device is not present!
[1.6 p45] 00:80:05.0: Device is not present!
PROGRESS CODE: V03040003 I0
PDB = c:\efi\servergen2\intel\Build\EagleStreamRpPkg\DEBUG_VS2015x86\X64\ClientOneSiliconPkg\IpBlock\Sps\Sps\Dxe\SpsDxe\DEBUG\SpsDxe.pdb
PROGRESS CODE: V03040002 I0
[HECI Transport-1 DXE] Send pkt: 812E0007
00: 11 00 00 00 01 80 0B 00 - 00 00 00 00 02 00 50 00
10: 50 00 A0 00 00 11 81 FD - 2C 08 05 00 00 80 23 11
20: 10 0F 0E 0D 0C 0B 0A 09 - 08 00 00 00 00 00 0B 23
30: 11 10 0F 0E 0D 0C 0B 0A - 09 08 00 00 00 00 00 00
40: 00 00 00 00 00 00 00 00 - 00 00 00 00 00 00 00 00
50: 00 00 00 00 00 00 00 00 - 00 00 00 00 00 00 00 00
60: 00 00 00 00 00 00 00 00 - 00 00 00 00 00 00 00 00
70: 00 00 00 00 00 00 00 00 - 00 00 00 00 00 00 00 00
80: 00 00 00 00 00 00 00 00 - 00 00 00 00 00 00 00 00
90: 00 00 00 00 00 00 00 00 - 00 00 00 00 00 00 00 00
A0: 00 00 00 00 00 00 00 00 - 00 00 00 00 00 00 00 00
B0: 00 00 00 00 00 00 00 00 - 00 00 00 00 00 00 00 00
C0: 00 00 00 00 00 00 00 00 - 00 00 00 00 00 00 00 00
D0: 00 00 00 00 00 00 00 00 - 00 00 00 00 00 00 00 00
E0: 00 00 00 00 00 00 00 00 - 00 00 00 00 00 00 00 00
F0: 00 00 00 00 00 00 00 00 - 00 00 00 00 00 00 00 00
00: 00 00 00 00 00 00 00 00 - 00 00 00 00 00 00 00 00
10: 00 00 00 00 00 00 00 00 - 00 00 00 00 00 00 00 00
20: 00 00 00 00 00 00 00 00 - 00 00 00 00 00 00
[HECI Transport-1 DXE] Got pkt: 80080007
00: 11 80 00 00 00 00 00 00
PROGRESS CODE: V03040003 I0
PDB = c:\efi\servergen2\intel\Build\EagleStreamRpPkg\DEBUG_VS2015x86\X64\ClientOneSiliconPkg\IpBlock\MeIgnition\Dxe\MeIgnitionDxe\DEBUG\MeIgnitionDxe.pdb
PROGRESS CODE: V03040002 I0
PROGRESS CODE: V03040003 I0
PDB = c:\efi\servergen2\intel\Build\EagleStreamRpPkg\DEBUG_VS2015x86\X64\ClientOneSiliconPkg\IpBlock\Me\MeFwDowngrade\Dxe\MeFwDowngrade\DEBUG\MeFwDowngrade.pdb
PROGRESS CODE: V03040002 I0
Error: Image at 0006A252000 start failed: Unsupported
PDB = c:\efi\servergen2\intel\Build\EagleStreamRpPkg\DEBUG_VS2015x86\X64\ClientOneSiliconPkg\IpBlock\Me\MeFwDowngrade\Dxe\MeFwDowngrade\DEBUG\MeFwDowngrade.pdb
PROGRESS CODE: V03040003 I0
PDB = c:\efi\servergen2\intel\Build\EagleStreamRpPkg\DEBUG_VS2015x86\X64\ClientOneSiliconPkg\IpBlock\Me\MeSmbiosDxe\MeSmbiosDxe\DEBUG\MeSmbiosDxe.pdb
PROGRESS CODE: V03040002 I0
Error: Image at 0006A269000 start failed: Unsupported
PDB = c:\efi\servergen2\intel\Build\EagleStreamRpPkg\DEBUG_VS2015x86\X64\ClientOneSiliconPkg\IpBlock\Me\MeSmbiosDxe\MeSmbiosDxe\DEBUG\MeSmbiosDxe.pdb
PROGRESS CODE: V03040003 I0
PDB = c:\efi\servergen2\intel\Build\EagleStreamRpPkg\DEBUG_VS2015x86\X64\ServerPlatformPkg\Features\Me\Client\MeSmbiosUpdateConfigDxe\MeSmbiosUpdateConfigDxe\DEBUG\MeSmbiosUpdateConfig.pdb
PROGRESS CODE: V03040002 I0
Error: Image at 0006A268000 start failed: Unsupported
PDB = c:\efi\servergen2\intel\Build\EagleStreamRpPkg\DEBUG_VS2015x86\X64\ServerPlatformPkg\Features\Me\Client\MeSmbiosUpdateConfigDxe\MeSmbiosUpdateConfigDxe\DEBUG\MeSmbiosUpdateConfig.pdb
PROGRESS CODE: V03040003 I0
PDB = c:\efi\servergen2\intel\Build\EagleStreamRpPkg\DEBUG_VS2015x86\X64\ServerPlatformPkg\Features\Me\MeExtMeasurement\Dxe\MeExtMeasurement\DEBUG\MeExtMeasurement.pdb
PROGRESS CODE: V03040002 I0
MeExtMeasurementEntryPoint: not Me Type
PROGRESS CODE: V03040003 I0
PDB = c:\efi\servergen2\intel\Build\EagleStreamRpPkg\DEBUG_VS2015x86\X64\ServerPlatformPkg\Features\Me\Client\Amt\AmtSaveMebxConfigDxe\AmtSaveMebxConfigDxe\DEBUG\AmtSaveMebxConfig.pdb
PROGRESS CODE: V03040002 I0
Error: Image at 0006A259000 start failed: Unsupported
PDB = c:\efi\servergen2\intel\Build\EagleStreamRpPkg\DEBUG_VS2015x86\X64\ServerPlatformPkg\Features\Me\Client\Amt\AmtSaveMebxConfigDxe\AmtSaveMebxConfigDxe\DEBUG\AmtSaveMebxConfig.pdb
PROGRESS CODE: V03040003 I0
PDB = c:\efi\servergen2\intel\Build\EagleStreamRpPkg\DEBUG_VS2015x86\X64\XmlCliFeaturePkg\XmlCliCommon\Dxe\XmlCliCommonDxe\DEBUG\XmlCliCommonDxe.pdb
PROGRESS CODE: V03040002 I0
PROGRESS CODE: V03040003 I0
PDB = c:\efi\servergen2\intel\Build\EagleStreamRpPkg\DEBUG_VS2015x86\X64\ServerSecurityPkg\Pfr\DxeSmm\PfrDxe\DEBUG\PfrDxeDriver.pdb
PROGRESS CODE: V03040002 I0
PROGRESS CODE: V03040003 I0
PDB = c:\efi\servergen2\intel\Build\EagleStreamRpPkg\DEBUG_VS2015x86\X64\PcAtChipsetPkg\PcatRealTimeClockRuntimeDxe\PcatRealTimeClockRuntimeDxe\DEBUG\PcRtc.pdb
PROGRESS CODE: V03040002 I0
ERROR: C40000002:V0306000A I0 378D7B65-8DA9-4773-B6E4-A47826A833E1
PROGRESS CODE: V03040003 I0
PDB = c:\efi\servergen2\intel\Build\EagleStreamRpPkg\DEBUG_VS2015x86\X64\SecurityPkg\VariableAuthenticated\SecureBootConfigDxe\SecureBootConfigDxe\DEBUG\SecureBootConfigDxe.pdb
PROGRESS CODE: V03040002 I0
PROGRESS CODE: V03040003 I0
PDB = c:\efi\servergen2\intel\Build\EagleStreamRpPkg\DEBUG_VS2015x86\X64\MdeModulePkg\Universal\MonotonicCounterRuntimeDxe\MonotonicCounterRuntimeDxe\DEBUG\MonotonicCounterRuntimeDxe.pdb
PROGRESS CODE: V03040002 I0
PROGRESS CODE: V03040003 I0
PDB = c:\efi\servergen2\intel\Build\EagleStreamRpPkg\DEBUG_VS2015x86\X64\MdeModulePkg\Universal\CapsuleRuntimeDxe\CapsuleRuntimeDxe\DEBUG\CapsuleRuntimeDxe.pdb
PROGRESS CODE: V03040002 I0
PROGRESS CODE: V03040003 I0
PDB = c:\efi\servergen2\intel\Build\EagleStreamRpPkg\DEBUG_VS2015x86\X64\SecurityPkg\Tcg\MemoryOverwriteControl\TcgMor\DEBUG\TcgMor.pdb
PROGRESS CODE: V03040002 I0
PROGRESS CODE: V03040003 I0
PDB = c:\efi\servergen2\intel\Build\EagleStreamRpPkg\DEBUG_VS2015x86\X64\SecurityPkg\Tcg\Tcg2Config\Tcg2ConfigDxe\DEBUG\Tcg2ConfigDxe.pdb
PROGRESS CODE: V03040002 I0
PROGRESS CODE: V03040003 I0
PDB = c:\efi\servergen2\intel\Build\EagleStreamRpPkg\DEBUG_VS2015x86\X64\SecurityPkg\Tcg\Tcg2Acpi\Tcg2Acpi\DEBUG\Tcg2Acpi.pdb
PROGRESS CODE: V03040002 I0
PROGRESS CODE: V03040003 I0
PDB = c:\efi\servergen2\intel\Build\EagleStreamRpPkg\DEBUG_VS2015x86\X64\ServerPlatformPkg\Platform\Dxe\Tcg2PlatformDxe\Tcg2PlatformDxe\DEBUG\Tcg2PlatformDxe.pdb
PROGRESS CODE: V03040002 I0
Failed to locate gEfiDxeSmmReadyToLockProtocolGuid.
PROGRESS CODE: V03040003 I0
PDB = c:\efi\servergen2\intel\Build\EagleStreamRpPkg\DEBUG_VS2015x86\X64\IntelSiliconPkg\Feature\PcieSecurity\IntelPciDeviceSecurityDxe\IntelPciDeviceSecurityDxe\DEBUG\IntelPciDeviceSecurityDxe.pdb
PROGRESS CODE: V03040002 I0
PROGRESS CODE: V03040003 I0
PDB = c:\efi\servergen2\intel\Build\EagleStreamRpPkg\DEBUG_VS2015x86\X64\ServerPlatformPkg\Platform\Dxe\MemorySubClass\MemorySubClass\DEBUG\MemorySubClass.pdb
PROGRESS CODE: V03040002 I0
PROGRESS CODE: V03040003 I0
PDB = c:\efi\servergen2\intel\Build\EagleStreamRpPkg\DEBUG_VS2015x86\X64\ServerPlatformPkg\Platform\Dxe\EmulationDfxSetup\EmulationDfxSetup\DEBUG\EmulationDfxSetup.pdb
PROGRESS CODE: V03040002 I0
PROGRESS CODE: V03040003 I0
PDB = c:\efi\servergen2\intel\Build\EagleStreamRpPkg\DEBUG_VS2015x86\X64\ServerRasPkg\Driver\Dxe\IioRasInit\IioRasInit\DEBUG\IioRasInit.pdb
PROGRESS CODE: V03040002 I0
PROGRESS CODE: V03040003 I0
PDB = c:\efi\servergen2\intel\Build\EagleStreamRpPkg\DEBUG_VS2015x86\X64\ServerRasPkg\Driver\Dxe\AddressTranslationDxe\AddressTranslationDxe\DEBUG\AddressTranslationDxe.pdb
PROGRESS CODE: V03040002 I0
PROGRESS CODE: V03040003 I0
PDB = c:\efi\servergen2\intel\Build\EagleStreamRpPkg\DEBUG_VS2015x86\X64\ServerPlatformPkg\Features\PrmAddrTransDsmConfigDxe\PrmAddrTransDsmConfigDxe\DEBUG\PrmAddrTransDsmConfigDxe.pdb
PROGRESS CODE: V03040002 I0
PROGRESS CODE: V03040003 I0
PDB = c:\efi\servergen2\intel\Build\EagleStreamRpPkg\DEBUG_VS2015x86\X64\ServerPlatformPkg\Features\PrmAddrTransDsm\PrmAddrTransDsm\DEBUG\PrmAddrTransDsm.pdb
PROGRESS CODE: V03040002 I0
PROGRESS CODE: V03040003 I0
PDB = c:\efi\servergen2\intel\Build\EagleStreamRpPkg\DEBUG_VS2015x86\X64\XmlCliFeaturePkg\XmlCliCommon\Smm\XmlCliCommonSmm\DEBUG\XmlCliCommonSmm.pdb
PROGRESS CODE: V03070002 I0
PROGRESS CODE: V03070003 I0
PDB = c:\efi\servergen2\intel\Build\EagleStreamRpPkg\DEBUG_VS2015x86\X64\ServerSecurityPkg\Pfr\DxeSmm\PfrSmm\DEBUG\PfrSmmDriver.pdb
PROGRESS CODE: V03070002 I0
PROGRESS CODE: V03070003 I0
PDB = c:\efi\servergen2\intel\Build\EagleStreamRpPkg\DEBUG_VS2015x86\X64\UserAuthFeaturePkg\UserAuthenticationDxeSmm\UserAuthenticationSmm\DEBUG\UserAuthenticationSmm.pdb
PROGRESS CODE: V03070002 I0
PROGRESS CODE: V03070003 I0
PDB = c:\efi\servergen2\intel\Build\EagleStreamRpPkg\DEBUG_VS2015x86\X64\ServerRasPkg\Driver\Smm\MemTopology\MemTopology\DEBUG\MemTopology.pdb
PROGRESS CODE: V03070002 I0
PROGRESS CODE: V03070003 I0
PDB = c:\efi\servergen2\intel\Build\EagleStreamRpPkg\DEBUG_VS2015x86\X64\ServerRasPkg\PolicySample\PolicySample\DEBUG\PolicySampleDriver.pdb
PROGRESS CODE: V03070002 I0
InitializePolicyData
Enable Poison when 2LM is enabled
CxlMefnEn: 0x0
PROGRESS CODE: V03070003 I0
PDB = c:\efi\servergen2\intel\Build\EagleStreamRpPkg\DEBUG_VS2015x86\X64\ServerRasPkg\Driver\Smm\PartialMirrorHandler\PartialMirrorHandler\DEBUG\PartialMirrorHandler.pdb
PROGRESS CODE: V03070002 I0
PROGRESS CODE: V03070003 I0
PDB = c:\efi\servergen2\intel\Build\EagleStreamRpPkg\DEBUG_VS2015x86\X64\ServerRasPkg\Driver\Smm\Gen2\ImcErrorHandler\ImcErrorHandler\DEBUG\ImcErrorHandler.pdb
PROGRESS CODE: V03070002 I0
[ImcErrorHandler][CrystalRidgeLib] Failed to locate protocol: Not Found
InitializeImcErrorHandler start!
[imc] initialization start!
[PCLS]: InitPclsSparing()... Start
[PCLS]: Register CheckAndHandlePclsSparing()...
[imc] initialization start!
[imc] ConfigSystemRetryRegister start!
[imc] ImcCorrectableErrorEnable start!
PMemEccModeInit
[imc] initialization start!
[imc] ConfigSystemRetryRegister start!
[imc] ImcCorrectableErrorEnable start!
PMemEccModeInit
aend!
PROGRESS CODE: V03070003 I0
PDB = c:\efi\servergen2\intel\Build\EagleStreamRpPkg\DEBUG_VS2015x86\X64\ServerRasPkg\Driver\Smm\Gen2\ProcessorErrorHandler\ProcessorErrorHandler\DEBUG\ProcessorErrorHandler.pdb
PROGRESS CODE: V03070002 I0
[IEH] Start IEH initialization!
[IEH] Search all IEH device in the system
CXL Stack found, CxlValid 0x0, Cxl11CompatibilityMode 0x0
CXL Stack found, CxlValid 0x0, Cxl11CompatibilityMode 0x0
CXL Stack found, CxlValid 0x0, Cxl11CompatibilityMode 0x0
CXL Stack found, CxlValid 0x0, Cxl11CompatibilityMode 0x0
CXL Stack found, CxlValid 0x0, Cxl11CompatibilityMode 0x0
CXL Stack found, CxlValid 0x0, Cxl11CompatibilityMode 0x0
CXL Stack found, CxlValid 0x0, Cxl11CompatibilityMode 0x0
CXL Stack found, CxlValid 0x0, Cxl11CompatibilityMode 0x0
CXL Stack found, CxlValid 0x0, Cxl11CompatibilityMode 0x0
CXL Stack found, CxlValid 0x0, Cxl11CompatibilityMode 0x0
CXL Stack found, CxlValid 0x0, Cxl11CompatibilityMode 0x0
CXL Stack found, CxlValid 0x0, Cxl11CompatibilityMode 0x0
[IEH]-------------- Print created IEH tree -----------
socket:0x0 Bus:0x7E Dev:0x0 Func:0x3 -- Max Bit Index:0x1D BitIndex :0x0 DevCount on this bit :0x1,
ShareIdx:0x0 socket:0x0 Bus:0x7E Dev:0x0 Func:0x3 -- BitIndex :0x1 DevCount on this bit :0x1,
ShareIdx:0x0 socket:0x0 Bus:0x0 Dev:0x14 Func:0x4 -- BitIndex :0x0 DevCount on this bit :0x1,
ShareIdx:0x0 socket:0x0 Bus:0x0 Dev:0x14 Func:0x4 -- BitIndex :0x1 DevCount on this bit :0x1,
ShareIdx:0x0 socket:0x0 Bus:0x0 Dev:0x14 Func:0x0 -- BitIndex :0x2 DevCount on this bit :0x1,
ShareIdx:0x0 socket:0x0 Bus:0x0 Dev:0x1F Func:0x0 -- BitIndex :0x3 DevCount on this bit :0x1,
ShareIdx:0x0 socket:0x0 Bus:0x0 Dev:0x8 Func:0x0 -- BitIndex :0x4 DevCount on this bit :0x1,
ShareIdx:0x0 socket:0x0 Bus:0x0 Dev:0x9 Func:0x0 -- BitIndex :0x5 DevCount on this bit :0x1,
ShareIdx:0x0 socket:0x0 Bus:0x0 Dev:0xA Func:0x0 -- BitIndex :0x6 DevCount on this bit :0x1,
ShareIdx:0x0 socket:0x0 Bus:0x0 Dev:0xB Func:0x0 -- BitIndex :0x7 DevCount on this bit :0x1,
ShareIdx:0x0 socket:0x0 Bus:0x0 Dev:0xC Func:0x0 -- BitIndex :0x8 DevCount on this bit :0x1,
ShareIdx:0x0 socket:0x0 Bus:0x0 Dev:0xD Func:0x0 -- BitIndex :0x9 DevCount on this bit :0x1,
ShareIdx:0x0 socket:0x0 Bus:0x0 Dev:0xE Func:0x0 -- BitIndex :0xA DevCount on this bit :0x1,
ShareIdx:0x0 socket:0x0 Bus:0x0 Dev:0xF Func:0x0 -- BitIndex :0xB DevCount on this bit :0x1,
ShareIdx:0x0 socket:0x0 Bus:0x0 Dev:0x10 Func:0x0 -- BitIndex :0xC DevCount on this bit :0x1,
ShareIdx:0x0 socket:0x0 Bus:0x0 Dev:0x11 Func:0x0 -- BitIndex :0xD DevCount on this bit :0x1,
ShareIdx:0x0 socket:0x0 Bus:0x0 Dev:0x12 Func:0x0 -- BitIndex :0xE DevCount on this bit :0x1,
ShareIdx:0x0 socket:0x0 Bus:0x0 Dev:0x13 Func:0x0 -- BitIndex :0xF DevCount on this bit :0x1,
ShareIdx:0x0 socket:0x0 Bus:0x0 Dev:0x1A Func:0x0 -- BitIndex :0x10 DevCount on this bit :0x1,
ShareIdx:0x0 socket:0x0 Bus:0x0 Dev:0x1B Func:0x0 -- BitIndex :0x11 DevCount on this bit :0x1,
ShareIdx:0x0 socket:0x0 Bus:0x0 Dev:0x1C Func:0x0 -- BitIndex :0x12 DevCount on this bit :0x1,
ShareIdx:0x0 socket:0x0 Bus:0x0 Dev:0x1D Func:0x0 -- BitIndex :0x13 DevCount on this bit :0x1,
ShareIdx:0x0 socket:0x0 Bus:0x0 Dev:0x1F Func:0x7 -- BitIndex :0x14 DevCount on this bit :0x1,
ShareIdx:0x0 socket:0x0 Bus:0x0 Dev:0x1F Func:0x4 -- BitIndex :0x15 DevCount on this bit :0x1,
ShareIdx:0x0 socket:0x0 Bus:0x0 Dev:0x1F Func:0x0 -- BitIndex :0x16 DevCount on this bit :0x1,
ShareIdx:0x0 socket:0x0 Bus:0x0 Dev:0x17 Func:0x0 -- BitIndex :0x17 DevCount on this bit :0x1,
ShareIdx:0x0 socket:0x0 Bus:0x0 Dev:0x18 Func:0x0 -- BitIndex :0x18 DevCount on this bit :0x1,
ShareIdx:0x0 socket:0x0 Bus:0x0 Dev:0x19 Func:0x0 -- BitIndex :0x19 DevCount on this bit :0x1,
ShareIdx:0x0 socket:0x0 Bus:0x0 Dev:0x1F Func:0x6 -- BitIndex :0x1A DevCount on this bit :0x1,
ShareIdx:0x0 socket:0x0 Bus:0x0 Dev:0x1F Func:0x3 -- BitIndex :0x1B DevCount on this bit :0x1,
ShareIdx:0x0 socket:0x0 Bus:0x0 Dev:0x16 Func:0x0 -- BitIndex :0x1C DevCount on this bit :0x1,
ShareIdx:0x0 socket:0x0 Bus:0x0 Dev:0x0 Func:0x0 -- BitIndex :0x1D DevCount on this bit :0x1,
ShareIdx:0x0 socket:0x0 Bus:0x0 Dev:0x1 Func:0x0 -- BitIndex :0x1E DevCount on this bit :0x1,
ShareIdx:0x0 socket:0x0 Bus:0x0 Dev:0x0 Func:0x0 -- BitIndex :0x1F DevCount on this bit :0x1,
ShareIdx:0x0 socket:0x0 Bus:0x0 Dev:0x0 Func:0x0 -- BitIndex :0x2 DevCount on this bit :0x1,
ShareIdx:0x0 socket:0x0 Bus:0x6A Dev:0x0 Func:0x4 -- BitIndex :0x0 DevCount on this bit :0xA,
ShareIdx:0x0 socket:0x0 Bus:0x6A Dev:0x0 Func:0x4 -- ShareIdx:0x1 socket:0x0 Bus:0x6A Dev:0x0 Func:0x4 -- PSF Dino ShareIdx:0x2 socket:0x0 Bus:0x6A Dev:0x0 Func:0x4 -- PSF HCx ShareIdx:0x3 socket:0x0 Bus:0x6A Dev:0x1 Func:0x0 -- ShareIdx:0x4 socket:0x0 Bus:0x6A Dev:0x2 Func:0x0 -- ShareIdx:0x5 socket:0x0 Bus:0x6A Dev:0x3 Func:0x0 -- ShareIdx:0x6 socket:0x0 Bus:0x6A Dev:0x3 Func:0x1 -- ShareIdx:0x7 socket:0x0 Bus:0x6A Dev:0x3 Func:0x2 -- ShareIdx:0x8 socket:0x0 Bus:0x6B Dev:0x0 Func:0x0 -- ShareIdx:0x9 socket:0x0 Bus:0x6D Dev:0x0 Func:0x0 -- BitIndex :0x1 DevCount on this bit :0x3,
ShareIdx:0x0 socket:0x0 Bus:0x6A Dev:0x0 Func:0x0 -- ShareIdx:0x1 socket:0x0 Bus:0x6A Dev:0x0 Func:0x1 -- ShareIdx:0x2 socket:0x0 Bus:0x6A Dev:0x0 Func:0x2 -- BitIndex :0x3 DevCount on this bit :0x1,
ShareIdx:0x0 socket:0x0 Bus:0x0 Dev:0x0 Func:0x4 -- BitIndex :0x0 DevCount on this bit :0x7,
ShareIdx:0x0 socket:0x0 Bus:0x0 Dev:0x0 Func:0x4 -- ShareIdx:0x1 socket:0x0 Bus:0x0 Dev:0x0 Func:0x4 -- PSF PCIE Pi5 ShareIdx:0x2 socket:0x0 Bus:0x0 Dev:0x0 Func:0x4 -- PCIE GEN4 DMI Pi5 ShareIdx:0x3 socket:0x0 Bus:0x0 Dev:0x0 Func:0x4 -- PCIE GEN5 IAL Pi5 (CXL) ShareIdx:0x4 socket:0x0 Bus:0x0 Dev:0x0 Func:0x4 -- SPD I3C Bus ShareIdx:0x5 socket:0x0 Bus:0x0 Dev:0x0 Func:0x4 -- SPD I3C Bus ShareIdx:0x6 socket:0x0 Bus:0x0 Dev:0x0 Func:0x4 -- CXP SMBUS BitIndex :0x1 DevCount on this bit :0x3,
ShareIdx:0x0 socket:0x0 Bus:0x0 Dev:0x0 Func:0x0 -- ShareIdx:0x1 socket:0x0 Bus:0x0 Dev:0x0 Func:0x1 -- ShareIdx:0x2 socket:0x0 Bus:0x0 Dev:0x0 Func:0x2 -- BitIndex :0x2 DevCount on this bit :0x1,
ShareIdx:0x0 socket:0x0 Bus:0x0 Dev:0x8 Func:0x0 -- BitIndex :0x3 DevCount on this bit :0x1,
ShareIdx:0x0 socket:0x0 Bus:0x0 Dev:0x6 Func:0x0 -- BitIndex :0x4 DevCount on this bit :0x1,
ShareIdx:0x0 socket:0x0 Bus:0x0 Dev:0x4 Func:0x0 -- BitIndex :0x5 DevCount on this bit :0x1,
ShareIdx:0x0 socket:0x0 Bus:0x0 Dev:0x2 Func:0x0 -- BitIndex :0x6 DevCount on this bit :0x1,
ShareIdx:0x0 socket:0x0 Bus:0x0 Dev:0x1 Func:0x0 -- BitIndex :0x7 DevCount on this bit :0x1,
ShareIdx:0x0 socket:0x0 Bus:0x0 Dev:0x3 Func:0x0 -- BitIndex :0x8 DevCount on this bit :0x1,
ShareIdx:0x0 socket:0x0 Bus:0x0 Dev:0x5 Func:0x0 -- BitIndex :0x9 DevCount on this bit :0x1,
ShareIdx:0x0 socket:0x0 Bus:0x0 Dev:0x7 Func:0x0 -- BitIndex :0xA DevCount on this bit :0x1,
Skip Invalid Node
BitIndex :0x4 DevCount on this bit :0x1,
ShareIdx:0x0 socket:0x0 Bus:0x15 Dev:0x0 Func:0x4 -- BitIndex :0x0 DevCount on this bit :0x4,
ShareIdx:0x0 socket:0x0 Bus:0x15 Dev:0x0 Func:0x4 -- ShareIdx:0x1 socket:0x0 Bus:0x15 Dev:0x0 Func:0x4 -- PSF PCIE Pi5 ShareIdx:0x2 socket:0x0 Bus:0x15 Dev:0x0 Func:0x4 -- PCIE GEN4 DMI Pi5 ShareIdx:0x3 socket:0x0 Bus:0x15 Dev:0x0 Func:0x4 -- PCIE GEN5 IAL Pi5 (CXL) BitIndex :0x1 DevCount on this bit :0x3,
ShareIdx:0x0 socket:0x0 Bus:0x15 Dev:0x0 Func:0x0 -- ShareIdx:0x1 socket:0x0 Bus:0x15 Dev:0x0 Func:0x1 -- ShareIdx:0x2 socket:0x0 Bus:0x15 Dev:0x0 Func:0x2 -- BitIndex :0x2 DevCount on this bit :0x1,
ShareIdx:0x0 socket:0x0 Bus:0x15 Dev:0x8 Func:0x0 -- BitIndex :0x3 DevCount on this bit :0x1,
ShareIdx:0x0 socket:0x0 Bus:0x15 Dev:0x6 Func:0x0 -- BitIndex :0x4 DevCount on this bit :0x1,
ShareIdx:0x0 socket:0x0 Bus:0x15 Dev:0x4 Func:0x0 -- BitIndex :0x5 DevCount on this bit :0x1,
ShareIdx:0x0 socket:0x0 Bus:0x15 Dev:0x2 Func:0x0 -- BitIndex :0x6 DevCount on this bit :0x1,
ShareIdx:0x0 socket:0x0 Bus:0x15 Dev:0x1 Func:0x0 -- BitIndex :0x7 DevCount on this bit :0x1,
ShareIdx:0x0 socket:0x0 Bus:0x15 Dev:0x3 Func:0x0 -- BitIndex :0x8 DevCount on this bit :0x1,
ShareIdx:0x0 socket:0x0 Bus:0x15 Dev:0x5 Func:0x0 -- BitIndex :0x9 DevCount on this bit :0x1,
ShareIdx:0x0 socket:0x0 Bus:0x15 Dev:0x7 Func:0x0 -- BitIndex :0x5 DevCount on this bit :0x1,
ShareIdx:0x0 socket:0x0 Bus:0x6F Dev:0x0 Func:0x4 -- BitIndex :0x0 DevCount on this bit :0xA,
ShareIdx:0x0 socket:0x0 Bus:0x6F Dev:0x0 Func:0x4 -- ShareIdx:0x1 socket:0x0 Bus:0x6F Dev:0x0 Func:0x4 -- PSF Dino ShareIdx:0x2 socket:0x0 Bus:0x6F Dev:0x0 Func:0x4 -- PSF HCx ShareIdx:0x3 socket:0x0 Bus:0x6F Dev:0x1 Func:0x0 -- ShareIdx:0x4 socket:0x0 Bus:0x6F Dev:0x2 Func:0x0 -- ShareIdx:0x5 socket:0x0 Bus:0x6F Dev:0x3 Func:0x0 -- ShareIdx:0x6 socket:0x0 Bus:0x6F Dev:0x3 Func:0x1 -- ShareIdx:0x7 socket:0x0 Bus:0x6F Dev:0x3 Func:0x2 -- ShareIdx:0x8 socket:0x0 Bus:0x70 Dev:0x0 Func:0x0 -- ShareIdx:0x9 socket:0x0 Bus:0x72 Dev:0x0 Func:0x0 -- BitIndex :0x1 DevCount on this bit :0x3,
ShareIdx:0x0 socket:0x0 Bus:0x6F Dev:0x0 Func:0x0 -- ShareIdx:0x1 socket:0x0 Bus:0x6F Dev:0x0 Func:0x1 -- ShareIdx:0x2 socket:0x0 Bus:0x6F Dev:0x0 Func:0x2 -- BitIndex :0x6 DevCount on this bit :0x1,
Skip Invalid Node
BitIndex :0x7 DevCount on this bit :0x1,
ShareIdx:0x0 socket:0x0 Bus:0x59 Dev:0x0 Func:0x4 -- BitIndex :0x0 DevCount on this bit :0x4,
ShareIdx:0x0 socket:0x0 Bus:0x59 Dev:0x0 Func:0x4 -- ShareIdx:0x1 socket:0x0 Bus:0x59 Dev:0x0 Func:0x4 -- PSF PCIE Pi5 ShareIdx:0x2 socket:0x0 Bus:0x59 Dev:0x0 Func:0x4 -- PCIE GEN4 DMI Pi5 ShareIdx:0x3 socket:0x0 Bus:0x59 Dev:0x0 Func:0x4 -- PCIE GEN5 IAL Pi5 (CXL) BitIndex :0x1 DevCount on this bit :0x3,
ShareIdx:0x0 socket:0x0 Bus:0x59 Dev:0x0 Func:0x0 -- ShareIdx:0x1 socket:0x0 Bus:0x59 Dev:0x0 Func:0x1 -- ShareIdx:0x2 socket:0x0 Bus:0x59 Dev:0x0 Func:0x2 -- BitIndex :0x2 DevCount on this bit :0x1,
ShareIdx:0x0 socket:0x0 Bus:0x59 Dev:0x8 Func:0x0 -- BitIndex :0x3 DevCount on this bit :0x1,
ShareIdx:0x0 socket:0x0 Bus:0x59 Dev:0x6 Func:0x0 -- BitIndex :0x4 DevCount on this bit :0x1,
ShareIdx:0x0 socket:0x0 Bus:0x59 Dev:0x4 Func:0x0 -- BitIndex :0x5 DevCount on this bit :0x1,
ShareIdx:0x0 socket:0x0 Bus:0x59 Dev:0x2 Func:0x0 -- BitIndex :0x6 DevCount on this bit :0x1,
ShareIdx:0x0 socket:0x0 Bus:0x59 Dev:0x1 Func:0x0 -- BitIndex :0x7 DevCount on this bit :0x1,
ShareIdx:0x0 socket:0x0 Bus:0x59 Dev:0x3 Func:0x0 -- BitIndex :0x8 DevCount on this bit :0x1,
ShareIdx:0x0 socket:0x0 Bus:0x59 Dev:0x5 Func:0x0 -- BitIndex :0x9 DevCount on this bit :0x1,
ShareIdx:0x0 socket:0x0 Bus:0x59 Dev:0x7 Func:0x0 -- BitIndex :0x8 DevCount on this bit :0x1,
ShareIdx:0x0 socket:0x0 Bus:0x74 Dev:0x0 Func:0x4 -- BitIndex :0x0 DevCount on this bit :0xA,
ShareIdx:0x0 socket:0x0 Bus:0x74 Dev:0x0 Func:0x4 -- ShareIdx:0x1 socket:0x0 Bus:0x74 Dev:0x0 Func:0x4 -- PSF Dino ShareIdx:0x2 socket:0x0 Bus:0x74 Dev:0x0 Func:0x4 -- PSF HCx ShareIdx:0x3 socket:0x0 Bus:0x74 Dev:0x1 Func:0x0 -- ShareIdx:0x4 socket:0x0 Bus:0x74 Dev:0x2 Func:0x0 -- ShareIdx:0x5 socket:0x0 Bus:0x74 Dev:0x3 Func:0x0 -- ShareIdx:0x6 socket:0x0 Bus:0x74 Dev:0x3 Func:0x1 -- ShareIdx:0x7 socket:0x0 Bus:0x74 Dev:0x3 Func:0x2 -- ShareIdx:0x8 socket:0x0 Bus:0x75 Dev:0x0 Func:0x0 -- ShareIdx:0x9 socket:0x0 Bus:0x77 Dev:0x0 Func:0x0 -- BitIndex :0x1 DevCount on this bit :0x3,
ShareIdx:0x0 socket:0x0 Bus:0x74 Dev:0x0 Func:0x0 -- ShareIdx:0x1 socket:0x0 Bus:0x74 Dev:0x0 Func:0x1 -- ShareIdx:0x2 socket:0x0 Bus:0x74 Dev:0x0 Func:0x2 -- BitIndex :0x9 DevCount on this bit :0x1,
ShareIdx:0x0 socket:0x0 Bus:0x37 Dev:0x0 Func:0x4 -- BitIndex :0x0 DevCount on this bit :0x4,
ShareIdx:0x0 socket:0x0 Bus:0x37 Dev:0x0 Func:0x4 -- ShareIdx:0x1 socket:0x0 Bus:0x37 Dev:0x0 Func:0x4 -- PSF PCIE Pi5 ShareIdx:0x2 socket:0x0 Bus:0x37 Dev:0x0 Func:0x4 -- PCIE GEN4 DMI Pi5 ShareIdx:0x3 socket:0x0 Bus:0x37 Dev:0x0 Func:0x4 -- PCIE GEN5 IAL Pi5 (CXL) BitIndex :0x1 DevCount on this bit :0x3,
ShareIdx:0x0 socket:0x0 Bus:0x37 Dev:0x0 Func:0x0 -- ShareIdx:0x1 socket:0x0 Bus:0x37 Dev:0x0 Func:0x1 -- ShareIdx:0x2 socket:0x0 Bus:0x37 Dev:0x0 Func:0x2 -- BitIndex :0x2 DevCount on this bit :0x1,
ShareIdx:0x0 socket:0x0 Bus:0x37 Dev:0x8 Func:0x0 -- BitIndex :0x3 DevCount on this bit :0x1,
ShareIdx:0x0 socket:0x0 Bus:0x37 Dev:0x6 Func:0x0 -- BitIndex :0x4 DevCount on this bit :0x1,
ShareIdx:0x0 socket:0x0 Bus:0x37 Dev:0x4 Func:0x0 -- BitIndex :0x5 DevCount on this bit :0x1,
ShareIdx:0x0 socket:0x0 Bus:0x37 Dev:0x2 Func:0x0 -- BitIndex :0x6 DevCount on this bit :0x1,
ShareIdx:0x0 socket:0x0 Bus:0x37 Dev:0x1 Func:0x0 -- BitIndex :0x7 DevCount on this bit :0x1,
ShareIdx:0x0 socket:0x0 Bus:0x37 Dev:0x3 Func:0x0 -- BitIndex :0x8 DevCount on this bit :0x1,
ShareIdx:0x0 socket:0x0 Bus:0x37 Dev:0x5 Func:0x0 -- BitIndex :0x9 DevCount on this bit :0x1,
ShareIdx:0x0 socket:0x0 Bus:0x37 Dev:0x7 Func:0x0 -- BitIndex :0xA DevCount on this bit :0x1,
ShareIdx:0x0 socket:0x0 Bus:0x26 Dev:0x0 Func:0x4 -- BitIndex :0x0 DevCount on this bit :0x4,
ShareIdx:0x0 socket:0x0 Bus:0x26 Dev:0x0 Func:0x4 -- ShareIdx:0x1 socket:0x0 Bus:0x26 Dev:0x0 Func:0x4 -- PSF PCIE Pi5 ShareIdx:0x2 socket:0x0 Bus:0x26 Dev:0x0 Func:0x4 -- PCIE GEN4 DMI Pi5 ShareIdx:0x3 socket:0x0 Bus:0x26 Dev:0x0 Func:0x4 -- PCIE GEN5 IAL Pi5 (CXL) BitIndex :0x1 DevCount on this bit :0x3,
ShareIdx:0x0 socket:0x0 Bus:0x26 Dev:0x0 Func:0x0 -- ShareIdx:0x1 socket:0x0 Bus:0x26 Dev:0x0 Func:0x1 -- ShareIdx:0x2 socket:0x0 Bus:0x26 Dev:0x0 Func:0x2 -- BitIndex :0x2 DevCount on this bit :0x1,
ShareIdx:0x0 socket:0x0 Bus:0x26 Dev:0x8 Func:0x0 -- BitIndex :0x3 DevCount on this bit :0x1,
ShareIdx:0x0 socket:0x0 Bus:0x26 Dev:0x6 Func:0x0 -- BitIndex :0x4 DevCount on this bit :0x1,
ShareIdx:0x0 socket:0x0 Bus:0x26 Dev:0x4 Func:0x0 -- BitIndex :0x5 DevCount on this bit :0x1,
ShareIdx:0x0 socket:0x0 Bus:0x26 Dev:0x2 Func:0x0 -- BitIndex :0x6 DevCount on this bit :0x1,
ShareIdx:0x0 socket:0x0 Bus:0x26 Dev:0x1 Func:0x0 -- BitIndex :0x7 DevCount on this bit :0x1,
ShareIdx:0x0 socket:0x0 Bus:0x26 Dev:0x3 Func:0x0 -- BitIndex :0x8 DevCount on this bit :0x1,
ShareIdx:0x0 socket:0x0 Bus:0x26 Dev:0x5 Func:0x0 -- BitIndex :0x9 DevCount on this bit :0x1,
ShareIdx:0x0 socket:0x0 Bus:0x26 Dev:0x7 Func:0x0 -- BitIndex :0xB DevCount on this bit :0x1,
ShareIdx:0x0 socket:0x0 Bus:0x79 Dev:0x0 Func:0x4 -- BitIndex :0x0 DevCount on this bit :0xA,
ShareIdx:0x0 socket:0x0 Bus:0x79 Dev:0x0 Func:0x4 -- ShareIdx:0x1 socket:0x0 Bus:0x79 Dev:0x0 Func:0x4 -- PSF Dino ShareIdx:0x2 socket:0x0 Bus:0x79 Dev:0x0 Func:0x4 -- PSF HCx ShareIdx:0x3 socket:0x0 Bus:0x79 Dev:0x1 Func:0x0 -- ShareIdx:0x4 socket:0x0 Bus:0x79 Dev:0x2 Func:0x0 -- ShareIdx:0x5 socket:0x0 Bus:0x79 Dev:0x3 Func:0x0 -- ShareIdx:0x6 socket:0x0 Bus:0x79 Dev:0x3 Func:0x1 -- ShareIdx:0x7 socket:0x0 Bus:0x79 Dev:0x3 Func:0x2 -- ShareIdx:0x8 socket:0x0 Bus:0x7A Dev:0x0 Func:0x0 -- ShareIdx:0x9 socket:0x0 Bus:0x7C Dev:0x0 Func:0x0 -- BitIndex :0x1 DevCount on this bit :0x3,
ShareIdx:0x0 socket:0x0 Bus:0x79 Dev:0x0 Func:0x0 -- ShareIdx:0x1 socket:0x0 Bus:0x79 Dev:0x0 Func:0x1 -- ShareIdx:0x2 socket:0x0 Bus:0x79 Dev:0x0 Func:0x2 -- BitIndex :0xC DevCount on this bit :0x1,
Skip Invalid Node
BitIndex :0xD DevCount on this bit :0x1,
ShareIdx:0x0 socket:0x0 Bus:0x48 Dev:0x0 Func:0x4 -- BitIndex :0x0 DevCount on this bit :0x4,
ShareIdx:0x0 socket:0x0 Bus:0x48 Dev:0x0 Func:0x4 -- ShareIdx:0x1 socket:0x0 Bus:0x48 Dev:0x0 Func:0x4 -- PSF PCIE Pi5 ShareIdx:0x2 socket:0x0 Bus:0x48 Dev:0x0 Func:0x4 -- PCIE GEN4 DMI Pi5 ShareIdx:0x3 socket:0x0 Bus:0x48 Dev:0x0 Func:0x4 -- PCIE GEN5 IAL Pi5 (CXL) BitIndex :0x1 DevCount on this bit :0x3,
ShareIdx:0x0 socket:0x0 Bus:0x48 Dev:0x0 Func:0x0 -- ShareIdx:0x1 socket:0x0 Bus:0x48 Dev:0x0 Func:0x1 -- ShareIdx:0x2 socket:0x0 Bus:0x48 Dev:0x0 Func:0x2 -- BitIndex :0x2 DevCount on this bit :0x1,
ShareIdx:0x0 socket:0x0 Bus:0x48 Dev:0x8 Func:0x0 -- BitIndex :0x3 DevCount on this bit :0x1,
ShareIdx:0x0 socket:0x0 Bus:0x48 Dev:0x6 Func:0x0 -- BitIndex :0x4 DevCount on this bit :0x1,
ShareIdx:0x0 socket:0x0 Bus:0x48 Dev:0x4 Func:0x0 -- BitIndex :0x5 DevCount on this bit :0x1,
ShareIdx:0x0 socket:0x0 Bus:0x48 Dev:0x2 Func:0x0 -- BitIndex :0x6 DevCount on this bit :0x1,
ShareIdx:0x0 socket:0x0 Bus:0x48 Dev:0x1 Func:0x0 -- BitIndex :0x7 DevCount on this bit :0x1,
ShareIdx:0x0 socket:0x0 Bus:0x48 Dev:0x3 Func:0x0 -- BitIndex :0x8 DevCount on this bit :0x1,
ShareIdx:0x0 socket:0x0 Bus:0x48 Dev:0x5 Func:0x0 -- BitIndex :0x9 DevCount on this bit :0x1,
ShareIdx:0x0 socket:0x0 Bus:0x48 Dev:0x7 Func:0x0 -- BitIndex :0xE DevCount on this bit :0x0,
BitIndex :0xF DevCount on this bit :0x0,
BitIndex :0x10 DevCount on this bit :0x0,
BitIndex :0x11 DevCount on this bit :0x0,
BitIndex :0x12 DevCount on this bit :0x0,
BitIndex :0x13 DevCount on this bit :0x0,
BitIndex :0x14 DevCount on this bit :0x0,
BitIndex :0x15 DevCount on this bit :0x0,
BitIndex :0x16 DevCount on this bit :0x4,
ShareIdx:0x0 socket:0x0 Bus:0x7E Dev:0x0 Func:0x0 -- ShareIdx:0x1 socket:0x0 Bus:0x7E Dev:0x0 Func:0x0 -- ShareIdx:0x2 socket:0x0 Bus:0x7E Dev:0x0 Func:0x0 -- ShareIdx:0x3 socket:0x0 Bus:0x7E Dev:0x0 Func:0x0 -- BitIndex :0x17 DevCount on this bit :0x4,
ShareIdx:0x0 socket:0x0 Bus:0x7E Dev:0x0 Func:0x0 -- ShareIdx:0x1 socket:0x0 Bus:0x7E Dev:0x0 Func:0x0 -- ShareIdx:0x2 socket:0x0 Bus:0x7E Dev:0x0 Func:0x0 -- ShareIdx:0x3 socket:0x0 Bus:0x7E Dev:0x0 Func:0x0 -- BitIndex :0x18 DevCount on this bit :0x4,
ShareIdx:0x0 socket:0x0 Bus:0x7E Dev:0x0 Func:0x0 -- ShareIdx:0x1 socket:0x0 Bus:0x7E Dev:0x0 Func:0x0 -- ShareIdx:0x2 socket:0x0 Bus:0x7E Dev:0x0 Func:0x0 -- ShareIdx:0x3 socket:0x0 Bus:0x7E Dev:0x0 Func:0x0 -- BitIndex :0x19 DevCount on this bit :0x4,
ShareIdx:0x0 socket:0x0 Bus:0x7E Dev:0x0 Func:0x0 -- ShareIdx:0x1 socket:0x0 Bus:0x7E Dev:0x0 Func:0x0 -- ShareIdx:0x2 socket:0x0 Bus:0x7E Dev:0x0 Func:0x0 -- ShareIdx:0x3 socket:0x0 Bus:0x7E Dev:0x0 Func:0x0 -- BitIndex :0x1A DevCount on this bit :0x4,
ShareIdx:0x0 socket:0x0 Bus:0x7E Dev:0x0 Func:0x0 -- ShareIdx:0x1 socket:0x0 Bus:0x7E Dev:0x0 Func:0x0 -- ShareIdx:0x2 socket:0x0 Bus:0x7E Dev:0x0 Func:0x0 -- ShareIdx:0x3 socket:0x0 Bus:0x7E Dev:0x0 Func:0x0 -- BitIndex :0x1B DevCount on this bit :0x4,
ShareIdx:0x0 socket:0x0 Bus:0x7E Dev:0x0 Func:0x0 -- ShareIdx:0x1 socket:0x0 Bus:0x7E Dev:0x0 Func:0x0 -- ShareIdx:0x2 socket:0x0 Bus:0x7E Dev:0x0 Func:0x0 -- ShareIdx:0x3 socket:0x0 Bus:0x7E Dev:0x0 Func:0x0 -- BitIndex :0x1C DevCount on this bit :0x4,
ShareIdx:0x0 socket:0x0 Bus:0x7E Dev:0x0 Func:0x0 -- ShareIdx:0x1 socket:0x0 Bus:0x7E Dev:0x0 Func:0x0 -- ShareIdx:0x2 socket:0x0 Bus:0x7E Dev:0x0 Func:0x0 -- ShareIdx:0x3 socket:0x0 Bus:0x7E Dev:0x0 Func:0x0 -- BitIndex :0x1D DevCount on this bit :0x4,
ShareIdx:0x0 socket:0x0 Bus:0x7E Dev:0x0 Func:0x0 -- ShareIdx:0x1 socket:0x0 Bus:0x7E Dev:0x0 Func:0x0 -- ShareIdx:0x2 socket:0x0 Bus:0x7E Dev:0x0 Func:0x0 -- ShareIdx:0x3 socket:0x0 Bus:0x7E Dev:0x0 Func:0x0 -- socket:0x1 Bus:0xFE Dev:0x0 Func:0x3 -- Max Bit Index:0x1D BitIndex :0x0 DevCount on this bit :0x1,
ShareIdx:0x0 socket:0x1 Bus:0xFE Dev:0x0 Func:0x3 -- BitIndex :0x1 DevCount on this bit :0x1,
Skip Invalid Node
BitIndex :0x2 DevCount on this bit :0x1,
ShareIdx:0x0 socket:0x1 Bus:0xE7 Dev:0x0 Func:0x4 -- BitIndex :0x0 DevCount on this bit :0xA,
ShareIdx:0x0 socket:0x1 Bus:0xE7 Dev:0x0 Func:0x4 -- ShareIdx:0x1 socket:0x1 Bus:0xE7 Dev:0x0 Func:0x4 -- PSF Dino ShareIdx:0x2 socket:0x1 Bus:0xE7 Dev:0x0 Func:0x4 -- PSF HCx ShareIdx:0x3 socket:0x1 Bus:0xE7 Dev:0x1 Func:0x0 -- ShareIdx:0x4 socket:0x1 Bus:0xE7 Dev:0x2 Func:0x0 -- ShareIdx:0x5 socket:0x1 Bus:0xE7 Dev:0x3 Func:0x0 -- ShareIdx:0x6 socket:0x1 Bus:0xE7 Dev:0x3 Func:0x1 -- ShareIdx:0x7 socket:0x1 Bus:0xE7 Dev:0x3 Func:0x2 -- ShareIdx:0x8 socket:0x1 Bus:0xE8 Dev:0x0 Func:0x0 -- ShareIdx:0x9 socket:0x1 Bus:0xEA Dev:0x0 Func:0x0 -- BitIndex :0x1 DevCount on this bit :0x3,
ShareIdx:0x0 socket:0x1 Bus:0xE7 Dev:0x0 Func:0x0 -- ShareIdx:0x1 socket:0x1 Bus:0xE7 Dev:0x0 Func:0x1 -- ShareIdx:0x2 socket:0x1 Bus:0xE7 Dev:0x0 Func:0x2 -- BitIndex :0x3 DevCount on this bit :0x1,
ShareIdx:0x0 socket:0x1 Bus:0x80 Dev:0x0 Func:0x4 -- BitIndex :0x0 DevCount on this bit :0x7,
ShareIdx:0x0 socket:0x1 Bus:0x80 Dev:0x0 Func:0x4 -- ShareIdx:0x1 socket:0x1 Bus:0x80 Dev:0x0 Func:0x4 -- PSF PCIE Pi5 ShareIdx:0x2 socket:0x1 Bus:0x80 Dev:0x0 Func:0x4 -- PCIE GEN4 DMI Pi5 ShareIdx:0x3 socket:0x1 Bus:0x80 Dev:0x0 Func:0x4 -- PCIE GEN5 IAL Pi5 (CXL) ShareIdx:0x4 socket:0x1 Bus:0x80 Dev:0x0 Func:0x4 -- SPD I3C Bus ShareIdx:0x5 socket:0x1 Bus:0x80 Dev:0x0 Func:0x4 -- SPD I3C Bus ShareIdx:0x6 socket:0x1 Bus:0x80 Dev:0x0 Func:0x4 -- CXP SMBUS BitIndex :0x1 DevCount on this bit :0x3,
ShareIdx:0x0 socket:0x1 Bus:0x80 Dev:0x0 Func:0x0 -- ShareIdx:0x1 socket:0x1 Bus:0x80 Dev:0x0 Func:0x1 -- ShareIdx:0x2 socket:0x1 Bus:0x80 Dev:0x0 Func:0x2 -- BitIndex :0x2 DevCount on this bit :0x1,
ShareIdx:0x0 socket:0x1 Bus:0x80 Dev:0x8 Func:0x0 -- BitIndex :0x3 DevCount on this bit :0x1,
ShareIdx:0x0 socket:0x1 Bus:0x80 Dev:0x6 Func:0x0 -- BitIndex :0x4 DevCount on this bit :0x1,
ShareIdx:0x0 socket:0x1 Bus:0x80 Dev:0x4 Func:0x0 -- BitIndex :0x5 DevCount on this bit :0x1,
ShareIdx:0x0 socket:0x1 Bus:0x80 Dev:0x2 Func:0x0 -- BitIndex :0x6 DevCount on this bit :0x1,
ShareIdx:0x0 socket:0x1 Bus:0x80 Dev:0x1 Func:0x0 -- BitIndex :0x7 DevCount on this bit :0x1,
ShareIdx:0x0 socket:0x1 Bus:0x80 Dev:0x3 Func:0x0 -- BitIndex :0x8 DevCount on this bit :0x1,
ShareIdx:0x0 socket:0x1 Bus:0x80 Dev:0x5 Func:0x0 -- BitIndex :0x9 DevCount on this bit :0x1,
ShareIdx:0x0 socket:0x1 Bus:0x80 Dev:0x7 Func:0x0 -- BitIndex :0xA DevCount on this bit :0x1,
Skip Invalid Node
BitIndex :0x4 DevCount on this bit :0x1,
ShareIdx:0x0 socket:0x1 Bus:0x97 Dev:0x0 Func:0x4 -- BitIndex :0x0 DevCount on this bit :0x4,
ShareIdx:0x0 socket:0x1 Bus:0x97 Dev:0x0 Func:0x4 -- ShareIdx:0x1 socket:0x1 Bus:0x97 Dev:0x0 Func:0x4 -- PSF PCIE Pi5 ShareIdx:0x2 socket:0x1 Bus:0x97 Dev:0x0 Func:0x4 -- PCIE GEN4 DMI Pi5 ShareIdx:0x3 socket:0x1 Bus:0x97 Dev:0x0 Func:0x4 -- PCIE GEN5 IAL Pi5 (CXL) BitIndex :0x1 DevCount on this bit :0x3,
ShareIdx:0x0 socket:0x1 Bus:0x97 Dev:0x0 Func:0x0 -- ShareIdx:0x1 socket:0x1 Bus:0x97 Dev:0x0 Func:0x1 -- ShareIdx:0x2 socket:0x1 Bus:0x97 Dev:0x0 Func:0x2 -- BitIndex :0x2 DevCount on this bit :0x1,
ShareIdx:0x0 socket:0x1 Bus:0x97 Dev:0x8 Func:0x0 -- BitIndex :0x3 DevCount on this bit :0x1,
ShareIdx:0x0 socket:0x1 Bus:0x97 Dev:0x6 Func:0x0 -- BitIndex :0x4 DevCount on this bit :0x1,
ShareIdx:0x0 socket:0x1 Bus:0x97 Dev:0x4 Func:0x0 -- BitIndex :0x5 DevCount on this bit :0x1,
ShareIdx:0x0 socket:0x1 Bus:0x97 Dev:0x2 Func:0x0 -- BitIndex :0x6 DevCount on this bit :0x1,
ShareIdx:0x0 socket:0x1 Bus:0x97 Dev:0x1 Func:0x0 -- BitIndex :0x7 DevCount on this bit :0x1,
ShareIdx:0x0 socket:0x1 Bus:0x97 Dev:0x3 Func:0x0 -- BitIndex :0x8 DevCount on this bit :0x1,
ShareIdx:0x0 socket:0x1 Bus:0x97 Dev:0x5 Func:0x0 -- BitIndex :0x9 DevCount on this bit :0x1,
ShareIdx:0x0 socket:0x1 Bus:0x97 Dev:0x7 Func:0x0 -- BitIndex :0x5 DevCount on this bit :0x1,
ShareIdx:0x0 socket:0x1 Bus:0xEC Dev:0x0 Func:0x4 -- BitIndex :0x0 DevCount on this bit :0xA,
ShareIdx:0x0 socket:0x1 Bus:0xEC Dev:0x0 Func:0x4 -- ShareIdx:0x1 socket:0x1 Bus:0xEC Dev:0x0 Func:0x4 -- PSF Dino ShareIdx:0x2 socket:0x1 Bus:0xEC Dev:0x0 Func:0x4 -- PSF HCx ShareIdx:0x3 socket:0x1 Bus:0xEC Dev:0x1 Func:0x0 -- ShareIdx:0x4 socket:0x1 Bus:0xEC Dev:0x2 Func:0x0 -- ShareIdx:0x5 socket:0x1 Bus:0xEC Dev:0x3 Func:0x0 -- ShareIdx:0x6 socket:0x1 Bus:0xEC Dev:0x3 Func:0x1 -- ShareIdx:0x7 socket:0x1 Bus:0xEC Dev:0x3 Func:0x2 -- ShareIdx:0x8 socket:0x1 Bus:0xED Dev:0x0 Func:0x0 -- ShareIdx:0x9 socket:0x1 Bus:0xEF Dev:0x0 Func:0x0 -- BitIndex :0x1 DevCount on this bit :0x3,
ShareIdx:0x0 socket:0x1 Bus:0xEC Dev:0x0 Func:0x0 -- ShareIdx:0x1 socket:0x1 Bus:0xEC Dev:0x0 Func:0x1 -- ShareIdx:0x2 socket:0x1 Bus:0xEC Dev:0x0 Func:0x2 -- BitIndex :0x6 DevCount on this bit :0x1,
Skip Invalid Node
BitIndex :0x7 DevCount on this bit :0x1,
ShareIdx:0x0 socket:0x1 Bus:0xD7 Dev:0x0 Func:0x4 -- BitIndex :0x0 DevCount on this bit :0x4,
ShareIdx:0x0 socket:0x1 Bus:0xD7 Dev:0x0 Func:0x4 -- ShareIdx:0x1 socket:0x1 Bus:0xD7 Dev:0x0 Func:0x4 -- PSF PCIE Pi5 ShareIdx:0x2 socket:0x1 Bus:0xD7 Dev:0x0 Func:0x4 -- PCIE GEN4 DMI Pi5 ShareIdx:0x3 socket:0x1 Bus:0xD7 Dev:0x0 Func:0x4 -- PCIE GEN5 IAL Pi5 (CXL) BitIndex :0x1 DevCount on this bit :0x3,
ShareIdx:0x0 socket:0x1 Bus:0xD7 Dev:0x0 Func:0x0 -- ShareIdx:0x1 socket:0x1 Bus:0xD7 Dev:0x0 Func:0x1 -- ShareIdx:0x2 socket:0x1 Bus:0xD7 Dev:0x0 Func:0x2 -- BitIndex :0x2 DevCount on this bit :0x1,
ShareIdx:0x0 socket:0x1 Bus:0xD7 Dev:0x8 Func:0x0 -- BitIndex :0x3 DevCount on this bit :0x1,
ShareIdx:0x0 socket:0x1 Bus:0xD7 Dev:0x6 Func:0x0 -- BitIndex :0x4 DevCount on this bit :0x1,
ShareIdx:0x0 socket:0x1 Bus:0xD7 Dev:0x4 Func:0x0 -- BitIndex :0x5 DevCount on this bit :0x1,
ShareIdx:0x0 socket:0x1 Bus:0xD7 Dev:0x2 Func:0x0 -- BitIndex :0x6 DevCount on this bit :0x1,
ShareIdx:0x0 socket:0x1 Bus:0xD7 Dev:0x1 Func:0x0 -- BitIndex :0x7 DevCount on this bit :0x1,
ShareIdx:0x0 socket:0x1 Bus:0xD7 Dev:0x3 Func:0x0 -- BitIndex :0x8 DevCount on this bit :0x1,
ShareIdx:0x0 socket:0x1 Bus:0xD7 Dev:0x5 Func:0x0 -- BitIndex :0x9 DevCount on this bit :0x1,
ShareIdx:0x0 socket:0x1 Bus:0xD7 Dev:0x7 Func:0x0 -- BitIndex :0x8 DevCount on this bit :0x1,
ShareIdx:0x0 socket:0x1 Bus:0xF1 Dev:0x0 Func:0x4 -- BitIndex :0x0 DevCount on this bit :0xA,
ShareIdx:0x0 socket:0x1 Bus:0xF1 Dev:0x0 Func:0x4 -- ShareIdx:0x1 socket:0x1 Bus:0xF1 Dev:0x0 Func:0x4 -- PSF Dino ShareIdx:0x2 socket:0x1 Bus:0xF1 Dev:0x0 Func:0x4 -- PSF HCx ShareIdx:0x3 socket:0x1 Bus:0xF1 Dev:0x1 Func:0x0 -- ShareIdx:0x4 socket:0x1 Bus:0xF1 Dev:0x2 Func:0x0 -- ShareIdx:0x5 socket:0x1 Bus:0xF1 Dev:0x3 Func:0x0 -- ShareIdx:0x6 socket:0x1 Bus:0xF1 Dev:0x3 Func:0x1 -- ShareIdx:0x7 socket:0x1 Bus:0xF1 Dev:0x3 Func:0x2 -- ShareIdx:0x8 socket:0x1 Bus:0xF2 Dev:0x0 Func:0x0 -- ShareIdx:0x9 socket:0x1 Bus:0xF4 Dev:0x0 Func:0x0 -- BitIndex :0x1 DevCount on this bit :0x3,
ShareIdx:0x0 socket:0x1 Bus:0xF1 Dev:0x0 Func:0x0 -- ShareIdx:0x1 socket:0x1 Bus:0xF1 Dev:0x0 Func:0x1 -- ShareIdx:0x2 socket:0x1 Bus:0xF1 Dev:0x0 Func:0x2 -- BitIndex :0x9 DevCount on this bit :0x1,
ShareIdx:0x0 socket:0x1 Bus:0xB7 Dev:0x0 Func:0x4 -- BitIndex :0x0 DevCount on this bit :0x4,
ShareIdx:0x0 socket:0x1 Bus:0xB7 Dev:0x0 Func:0x4 -- ShareIdx:0x1 socket:0x1 Bus:0xB7 Dev:0x0 Func:0x4 -- PSF PCIE Pi5 ShareIdx:0x2 socket:0x1 Bus:0xB7 Dev:0x0 Func:0x4 -- PCIE GEN4 DMI Pi5 ShareIdx:0x3 socket:0x1 Bus:0xB7 Dev:0x0 Func:0x4 -- PCIE GEN5 IAL Pi5 (CXL) BitIndex :0x1 DevCount on this bit :0x3,
ShareIdx:0x0 socket:0x1 Bus:0xB7 Dev:0x0 Func:0x0 -- ShareIdx:0x1 socket:0x1 Bus:0xB7 Dev:0x0 Func:0x1 -- ShareIdx:0x2 socket:0x1 Bus:0xB7 Dev:0x0 Func:0x2 -- BitIndex :0x2 DevCount on this bit :0x1,
ShareIdx:0x0 socket:0x1 Bus:0xB7 Dev:0x8 Func:0x0 -- BitIndex :0x3 DevCount on this bit :0x1,
ShareIdx:0x0 socket:0x1 Bus:0xB7 Dev:0x6 Func:0x0 -- BitIndex :0x4 DevCount on this bit :0x1,
ShareIdx:0x0 socket:0x1 Bus:0xB7 Dev:0x4 Func:0x0 -- BitIndex :0x5 DevCount on this bit :0x1,
ShareIdx:0x0 socket:0x1 Bus:0xB7 Dev:0x2 Func:0x0 -- BitIndex :0x6 DevCount on this bit :0x1,
ShareIdx:0x0 socket:0x1 Bus:0xB7 Dev:0x1 Func:0x0 -- BitIndex :0x7 DevCount on this bit :0x1,
ShareIdx:0x0 socket:0x1 Bus:0xB7 Dev:0x3 Func:0x0 -- BitIndex :0x8 DevCount on this bit :0x1,
ShareIdx:0x0 socket:0x1 Bus:0xB7 Dev:0x5 Func:0x0 -- BitIndex :0x9 DevCount on this bit :0x1,
ShareIdx:0x0 socket:0x1 Bus:0xB7 Dev:0x7 Func:0x0 -- BitIndex :0xA DevCount on this bit :0x1,
ShareIdx:0x0 socket:0x1 Bus:0xA7 Dev:0x0 Func:0x4 -- BitIndex :0x0 DevCount on this bit :0x4,
ShareIdx:0x0 socket:0x1 Bus:0xA7 Dev:0x0 Func:0x4 -- ShareIdx:0x1 socket:0x1 Bus:0xA7 Dev:0x0 Func:0x4 -- PSF PCIE Pi5 ShareIdx:0x2 socket:0x1 Bus:0xA7 Dev:0x0 Func:0x4 -- PCIE GEN4 DMI Pi5 ShareIdx:0x3 socket:0x1 Bus:0xA7 Dev:0x0 Func:0x4 -- PCIE GEN5 IAL Pi5 (CXL) BitIndex :0x1 DevCount on this bit :0x3,
ShareIdx:0x0 socket:0x1 Bus:0xA7 Dev:0x0 Func:0x0 -- ShareIdx:0x1 socket:0x1 Bus:0xA7 Dev:0x0 Func:0x1 -- ShareIdx:0x2 socket:0x1 Bus:0xA7 Dev:0x0 Func:0x2 -- BitIndex :0x2 DevCount on this bit :0x1,
ShareIdx:0x0 socket:0x1 Bus:0xA7 Dev:0x8 Func:0x0 -- BitIndex :0x3 DevCount on this bit :0x1,
ShareIdx:0x0 socket:0x1 Bus:0xA7 Dev:0x6 Func:0x0 -- BitIndex :0x4 DevCount on this bit :0x1,
ShareIdx:0x0 socket:0x1 Bus:0xA7 Dev:0x4 Func:0x0 -- BitIndex :0x5 DevCount on this bit :0x1,
ShareIdx:0x0 socket:0x1 Bus:0xA7 Dev:0x2 Func:0x0 -- BitIndex :0x6 DevCount on this bit :0x1,
ShareIdx:0x0 socket:0x1 Bus:0xA7 Dev:0x1 Func:0x0 -- BitIndex :0x7 DevCount on this bit :0x1,
ShareIdx:0x0 socket:0x1 Bus:0xA7 Dev:0x3 Func:0x0 -- BitIndex :0x8 DevCount on this bit :0x1,
ShareIdx:0x0 socket:0x1 Bus:0xA7 Dev:0x5 Func:0x0 -- BitIndex :0x9 DevCount on this bit :0x1,
ShareIdx:0x0 socket:0x1 Bus:0xA7 Dev:0x7 Func:0x0 -- BitIndex :0xB DevCount on this bit :0x1,
ShareIdx:0x0 socket:0x1 Bus:0xF6 Dev:0x0 Func:0x4 -- BitIndex :0x0 DevCount on this bit :0xA,
ShareIdx:0x0 socket:0x1 Bus:0xF6 Dev:0x0 Func:0x4 -- ShareIdx:0x1 socket:0x1 Bus:0xF6 Dev:0x0 Func:0x4 -- PSF Dino ShareIdx:0x2 socket:0x1 Bus:0xF6 Dev:0x0 Func:0x4 -- PSF HCx ShareIdx:0x3 socket:0x1 Bus:0xF6 Dev:0x1 Func:0x0 -- ShareIdx:0x4 socket:0x1 Bus:0xF6 Dev:0x2 Func:0x0 -- ShareIdx:0x5 socket:0x1 Bus:0xF6 Dev:0x3 Func:0x0 -- ShareIdx:0x6 socket:0x1 Bus:0xF6 Dev:0x3 Func:0x1 -- ShareIdx:0x7 socket:0x1 Bus:0xF6 Dev:0x3 Func:0x2 -- ShareIdx:0x8 socket:0x1 Bus:0xF7 Dev:0x0 Func:0x0 -- ShareIdx:0x9 socket:0x1 Bus:0xF9 Dev:0x0 Func:0x0 -- BitIndex :0x1 DevCount on this bit :0x3,
ShareIdx:0x0 socket:0x1 Bus:0xF6 Dev:0x0 Func:0x0 -- ShareIdx:0x1 socket:0x1 Bus:0xF6 Dev:0x0 Func:0x1 -- ShareIdx:0x2 socket:0x1 Bus:0xF6 Dev:0x0 Func:0x2 -- BitIndex :0xC DevCount on this bit :0x1,
Skip Invalid Node
BitIndex :0xD DevCount on this bit :0x1,
ShareIdx:0x0 socket:0x1 Bus:0xC7 Dev:0x0 Func:0x4 -- BitIndex :0x0 DevCount on this bit :0x4,
ShareIdx:0x0 socket:0x1 Bus:0xC7 Dev:0x0 Func:0x4 -- ShareIdx:0x1 socket:0x1 Bus:0xC7 Dev:0x0 Func:0x4 -- PSF PCIE Pi5 ShareIdx:0x2 socket:0x1 Bus:0xC7 Dev:0x0 Func:0x4 -- PCIE GEN4 DMI Pi5 ShareIdx:0x3 socket:0x1 Bus:0xC7 Dev:0x0 Func:0x4 -- PCIE GEN5 IAL Pi5 (CXL) BitIndex :0x1 DevCount on this bit :0x3,
ShareIdx:0x0 socket:0x1 Bus:0xC7 Dev:0x0 Func:0x0 -- ShareIdx:0x1 socket:0x1 Bus:0xC7 Dev:0x0 Func:0x1 -- ShareIdx:0x2 socket:0x1 Bus:0xC7 Dev:0x0 Func:0x2 -- BitIndex :0x2 DevCount on this bit :0x1,
ShareIdx:0x0 socket:0x1 Bus:0xC7 Dev:0x8 Func:0x0 -- BitIndex :0x3 DevCount on this bit :0x1,
ShareIdx:0x0 socket:0x1 Bus:0xC7 Dev:0x6 Func:0x0 -- BitIndex :0x4 DevCount on this bit :0x1,
ShareIdx:0x0 socket:0x1 Bus:0xC7 Dev:0x4 Func:0x0 -- BitIndex :0x5 DevCount on this bit :0x1,
ShareIdx:0x0 socket:0x1 Bus:0xC7 Dev:0x2 Func:0x0 -- BitIndex :0x6 DevCount on this bit :0x1,
ShareIdx:0x0 socket:0x1 Bus:0xC7 Dev:0x1 Func:0x0 -- BitIndex :0x7 DevCount on this bit :0x1,
ShareIdx:0x0 socket:0x1 Bus:0xC7 Dev:0x3 Func:0x0 -- BitIndex :0x8 DevCount on this bit :0x1,
ShareIdx:0x0 socket:0x1 Bus:0xC7 Dev:0x5 Func:0x0 -- BitIndex :0x9 DevCount on this bit :0x1,
ShareIdx:0x0 socket:0x1 Bus:0xC7 Dev:0x7 Func:0x0 -- BitIndex :0xE DevCount on this bit :0x0,
BitIndex :0xF DevCount on this bit :0x0,
BitIndex :0x10 DevCount on this bit :0x0,
BitIndex :0x11 DevCount on this bit :0x0,
BitIndex :0x12 DevCount on this bit :0x0,
BitIndex :0x13 DevCount on this bit :0x0,
BitIndex :0x14 DevCount on this bit :0x0,
BitIndex :0x15 DevCount on this bit :0x0,
BitIndex :0x16 DevCount on this bit :0x4,
ShareIdx:0x0 socket:0x1 Bus:0xFE Dev:0x0 Func:0x0 -- ShareIdx:0x1 socket:0x1 Bus:0xFE Dev:0x0 Func:0x0 -- ShareIdx:0x2 socket:0x1 Bus:0xFE Dev:0x0 Func:0x0 -- ShareIdx:0x3 socket:0x1 Bus:0xFE Dev:0x0 Func:0x0 -- BitIndex :0x17 DevCount on this bit :0x4,
ShareIdx:0x0 socket:0x1 Bus:0xFE Dev:0x0 Func:0x0 -- ShareIdx:0x1 socket:0x1 Bus:0xFE Dev:0x0 Func:0x0 -- ShareIdx:0x2 socket:0x1 Bus:0xFE Dev:0x0 Func:0x0 -- ShareIdx:0x3 socket:0x1 Bus:0xFE Dev:0x0 Func:0x0 -- BitIndex :0x18 DevCount on this bit :0x4,
ShareIdx:0x0 socket:0x1 Bus:0xFE Dev:0x0 Func:0x0 -- ShareIdx:0x1 socket:0x1 Bus:0xFE Dev:0x0 Func:0x0 -- ShareIdx:0x2 socket:0x1 Bus:0xFE Dev:0x0 Func:0x0 -- ShareIdx:0x3 socket:0x1 Bus:0xFE Dev:0x0 Func:0x0 -- BitIndex :0x19 DevCount on this bit :0x4,
ShareIdx:0x0 socket:0x1 Bus:0xFE Dev:0x0 Func:0x0 -- ShareIdx:0x1 socket:0x1 Bus:0xFE Dev:0x0 Func:0x0 -- ShareIdx:0x2 socket:0x1 Bus:0xFE Dev:0x0 Func:0x0 -- ShareIdx:0x3 socket:0x1 Bus:0xFE Dev:0x0 Func:0x0 -- BitIndex :0x1A DevCount on this bit :0x4,
ShareIdx:0x0 socket:0x1 Bus:0xFE Dev:0x0 Func:0x0 -- ShareIdx:0x1 socket:0x1 Bus:0xFE Dev:0x0 Func:0x0 -- ShareIdx:0x2 socket:0x1 Bus:0xFE Dev:0x0 Func:0x0 -- ShareIdx:0x3 socket:0x1 Bus:0xFE Dev:0x0 Func:0x0 -- BitIndex :0x1B DevCount on this bit :0x4,
ShareIdx:0x0 socket:0x1 Bus:0xFE Dev:0x0 Func:0x0 -- ShareIdx:0x1 socket:0x1 Bus:0xFE Dev:0x0 Func:0x0 -- ShareIdx:0x2 socket:0x1 Bus:0xFE Dev:0x0 Func:0x0 -- ShareIdx:0x3 socket:0x1 Bus:0xFE Dev:0x0 Func:0x0 -- BitIndex :0x1C DevCount on this bit :0x4,
ShareIdx:0x0 socket:0x1 Bus:0xFE Dev:0x0 Func:0x0 -- ShareIdx:0x1 socket:0x1 Bus:0xFE Dev:0x0 Func:0x0 -- ShareIdx:0x2 socket:0x1 Bus:0xFE Dev:0x0 Func:0x0 -- ShareIdx:0x3 socket:0x1 Bus:0xFE Dev:0x0 Func:0x0 -- BitIndex :0x1D DevCount on this bit :0x4,
ShareIdx:0x0 socket:0x1 Bus:0xFE Dev:0x0 Func:0x0 -- ShareIdx:0x1 socket:0x1 Bus:0xFE Dev:0x0 Func:0x0 -- ShareIdx:0x2 socket:0x1 Bus:0xFE Dev:0x0 Func:0x0 -- ShareIdx:0x3 socket:0x1 Bus:0xFE Dev:0x0 Func:0x0 -- [ProcessorErrorHandler][CrystalRidgeLib] Failed to locate protocol: Not Found
[Mca]Entering InitializeProcessorErrHandler (0x7E82AEB8)
[Mca]Allocate Cpu Error Data structure at 7E7FA018
[Mca][Cap] EmcaGen1Cap=0x1
[Mca][Cap] EmcaGen2Cap=0x1
[Mca][Cap] LmceCap=0x1
[Mca][Setup] SystemErrorEn=0x1
[Mca][Setup] PoisonEn=0x1
[Mca][Setup] ViralEn=0x0
[Mca][Setup] CloakingEn=0x0
[Mca][Setup] FatalErrSpinLoopEn=0x0
[Mca][Setup] EmcaEn=0x1
[Mca][Setup] CsmiEn=0x2
[Mca][Setup] MsmiEn=0x2
[Mca][Setup] LmceEn=0x1
[Mca][Setup] MsmiBankBitFieldEn=0xFFFFFFFF
[Mca][Setup] CsmiBankBitFieldEn=0xFFFFFFFF
[Mca][Setup] EmcaSetFwUpdate=0x0
[Mca][Setup] OscEn=0x0
[Mca][Setup] mMode=0x2
[Mca][Setup] mProcessorRasSetup.UboxErrorMask=0
[Mca][Setup] mProcessorRasSetup.ShutdownSuppression=1
[Mca]Register MCA error handler Success
[Mca]Installing MCE Handler...
[Mca]SmiMcaHandler Address = 7E8322B4
[Mca]Enable MCA reporting
[Mca]EnableEmca2UncorrectableError
[Mca]Enable CSMI Gen2
[Mca]Enable LMCE
[Mca]System Cloaking is disabled.
[RasMisc] ConfigureShutdownSuppression!
PROGRESS CODE: V03070003 I0
PDB = c:\efi\servergen2\intel\Build\EagleStreamRpPkg\DEBUG_VS2015x86\X64\ServerRasPkg\Driver\Smm\Gen2\RasMisc\RasMisc\DEBUG\RASMiscDriver.pdb
PROGRESS CODE: V03070002 I0
[RASMiscDriver][CrystalRidgeLib] Failed to locate protocol: Not Found
[RasMisc] EnableSystemViralAndPoison!
[IIO VIRAL & POISON] Config Socket:0x0
[Config IIO Viral & Poison] Satallite IEH on BitIdx:0x2
[Config IIO Viral & Poison] Satallite IEH on BitIdx:0x3
[Config IIO Viral & Poison Stack] Device on BitIdx:0x2 doesn't exist
[Config IIO Viral & Poison Stack] Device on BitIdx:0x3 doesn't exist
[Config IIO Viral & Poison Stack] Device on BitIdx:0x4 doesn't exist
[Config IIO Viral & Poison Stack] Device on BitIdx:0x5 doesn't exist
[Config IIO Viral & Poison Stack] Device on BitIdx:0x6 doesn't exist
[Config IIO Viral & Poison Stack] Device on BitIdx:0x7 doesn't exist
[Config IIO Viral & Poison Stack] Device on BitIdx:0x8 doesn't exist
[Config IIO Viral & Poison Stack] Device on BitIdx:0x9 doesn't exist
[Config IIO Viral & Poison] Satallite IEH on BitIdx:0x4
[Config IIO Viral & Poison Stack] Device on BitIdx:0x2 doesn't exist
[Config IIO Viral & Poison Stack] Device on BitIdx:0x3 doesn't exist
[Config IIO Viral & Poison Stack] Device on BitIdx:0x4 doesn't exist
[Config IIO Viral & Poison Stack] Device on BitIdx:0x5 doesn't exist
[Config IIO Viral & Poison Stack] Device on BitIdx:0x6 doesn't exist
[Config IIO Viral & Poison Stack] Device on BitIdx:0x7 doesn't exist
[Config IIO Viral & Poison Stack] Device on BitIdx:0x8 doesn't exist
[Config IIO Viral & Poison Stack] Device on BitIdx:0x9 doesn't exist
[Config IIO Viral & Poison] Satallite IEH on BitIdx:0x5
[Config IIO Viral & Poison] Satallite IEH on BitIdx:0x7
[Config IIO Viral & Poison Stack] Device on BitIdx:0x2 doesn't exist
[Config IIO Viral & Poison Stack] Device on BitIdx:0x3 doesn't exist
[Config IIO Viral & Poison Stack] Device on BitIdx:0x4 doesn't exist
[Config IIO Viral & Poison Stack] Device on BitIdx:0x5 doesn't exist
[Config IIO Viral & Poison Stack] Device on BitIdx:0x6 doesn't exist
[Config IIO Viral & Poison Stack] Device on BitIdx:0x7 doesn't exist
[Config IIO Viral & Poison Stack] Device on BitIdx:0x8 doesn't exist
[Config IIO Viral & Poison Stack] Device on BitIdx:0x9 doesn't exist
[Config IIO Viral & Poison] Satallite IEH on BitIdx:0x8
[Config IIO Viral & Poison] Satallite IEH on BitIdx:0x9
[Config IIO Viral & Poison Stack] Device on BitIdx:0x2 doesn't exist
[Config IIO Viral & Poison Stack] Device on BitIdx:0x3 doesn't exist
[Config IIO Viral & Poison Stack] Device on BitIdx:0x4 doesn't exist
[Config IIO Viral & Poison Stack] Device on BitIdx:0x5 doesn't exist
[Config IIO Viral & Poison Stack] Device on BitIdx:0x6 doesn't exist
[Config IIO Viral & Poison Stack] Device on BitIdx:0x7 doesn't exist
[Config IIO Viral & Poison Stack] Device on BitIdx:0x8 doesn't exist
[Config IIO Viral & Poison Stack] Device on BitIdx:0x9 doesn't exist
[Config IIO Viral & Poison] Satallite IEH on BitIdx:0xA
[Config IIO Viral & Poison Stack] Device on BitIdx:0x2 doesn't exist
[Config IIO Viral & Poison Stack] Device on BitIdx:0x3 doesn't exist
[Config IIO Viral & Poison Stack] Device on BitIdx:0x4 doesn't exist
[Config IIO Viral & Poison Stack] Device on BitIdx:0x5 doesn't exist
[Config IIO Viral & Poison Stack] Device on BitIdx:0x6 doesn't exist
[Config IIO Viral & Poison Stack] Device on BitIdx:0x7 doesn't exist
[Config IIO Viral & Poison Stack] Device on BitIdx:0x8 doesn't exist
[Config IIO Viral & Poison Stack] Device on BitIdx:0x9 doesn't exist
[Config IIO Viral & Poison] Satallite IEH on BitIdx:0xB
[Config IIO Viral & Poison] Satallite IEH on BitIdx:0xD
[Config IIO Viral & Poison Stack] Device on BitIdx:0x2 doesn't exist
[Config IIO Viral & Poison Stack] Device on BitIdx:0x3 doesn't exist
[Config IIO Viral & Poison Stack] Device on BitIdx:0x4 doesn't exist
[Config IIO Viral & Poison Stack] Device on BitIdx:0x5 doesn't exist
[Config IIO Viral & Poison Stack] Device on BitIdx:0x6 doesn't exist
[Config IIO Viral & Poison Stack] Device on BitIdx:0x7 doesn't exist
[Config IIO Viral & Poison Stack] Device on BitIdx:0x8 doesn't exist
[Config IIO Viral & Poison Stack] Device on BitIdx:0x9 doesn't exist
[IIO VIRAL & POISON] Config Socket:0x0 End
[IIO VIRAL & POISON] Config Socket:0x1
[Config IIO Viral & Poison] Satallite IEH on BitIdx:0x2
[Config IIO Viral & Poison] Satallite IEH on BitIdx:0x3
[Config IIO Viral & Poison Stack] Device on BitIdx:0x2 doesn't exist
[Config IIO Viral & Poison Stack] Device on BitIdx:0x3 doesn't exist
[Config IIO Viral & Poison Stack] Device on BitIdx:0x4 doesn't exist
[Config IIO Viral & Poison Stack] Device on BitIdx:0x5 doesn't exist
[Config IIO Viral & Poison Stack] Device on BitIdx:0x6 doesn't exist
[Config IIO Viral & Poison Stack] Device on BitIdx:0x7 doesn't exist
[Config IIO Viral & Poison Stack] Device on BitIdx:0x8 doesn't exist
[Config IIO Viral & Poison Stack] Device on BitIdx:0x9 doesn't exist
[Config IIO Viral & Poison Stack] Device on BitIdx:0xA doesn't exist
[Config IIO Viral & Poison] Satallite IEH on BitIdx:0x4
[Config IIO Viral & Poison Stack] Device on BitIdx:0x2 doesn't exist
[Config IIO Viral & Poison Stack] Device on BitIdx:0x3 doesn't exist
[Config IIO Viral & Poison Stack] Device on BitIdx:0x4 doesn't exist
[Config IIO Viral & Poison Stack] Device on BitIdx:0x5 doesn't exist
[Config IIO Viral & Poison Stack] Device on BitIdx:0x6 doesn't exist
[Config IIO Viral & Poison Stack] Device on BitIdx:0x7 doesn't exist
[Config IIO Viral & Poison Stack] Device on BitIdx:0x8 doesn't exist
[Config IIO Viral & Poison Stack] Device on BitIdx:0x9 doesn't exist
[Config IIO Viral & Poison] Satallite IEH on BitIdx:0x5
[Config IIO Viral & Poison] Satallite IEH on BitIdx:0x7
[Config IIO Viral & Poison Stack] Device on BitIdx:0x2 doesn't exist
[Config IIO Viral & Poison Stack] Device on BitIdx:0x3 doesn't exist
[Config IIO Viral & Poison Stack] Device on BitIdx:0x4 doesn't exist
[Config IIO Viral & Poison Stack] Device on BitIdx:0x5 doesn't exist
[Config IIO Viral & Poison Stack] Device on BitIdx:0x6 doesn't exist
[Config IIO Viral & Poison Stack] Device on BitIdx:0x7 doesn't exist
[Config IIO Viral & Poison Stack] Device on BitIdx:0x8 doesn't exist
[Config IIO Viral & Poison Stack] Device on BitIdx:0x9 doesn't exist
[Config IIO Viral & Poison] Satallite IEH on BitIdx:0x8
[Config IIO Viral & Poison] Satallite IEH on BitIdx:0x9
[Config IIO Viral & Poison Stack] Device on BitIdx:0x2 doesn't exist
[Config IIO Viral & Poison Stack] Device on BitIdx:0x3 doesn't exist
[Config IIO Viral & Poison Stack] Device on BitIdx:0x4 doesn't exist
[Config IIO Viral & Poison Stack] Device on BitIdx:0x5 doesn't exist
[Config IIO Viral & Poison Stack] Device on BitIdx:0x6 doesn't exist
[Config IIO Viral & Poison Stack] Device on BitIdx:0x7 doesn't exist
[Config IIO Viral & Poison Stack] Device on BitIdx:0x8 doesn't exist
[Config IIO Viral & Poison Stack] Device on BitIdx:0x9 doesn't exist
[Config IIO Viral & Poison] Satallite IEH on BitIdx:0xA
[Config IIO Viral & Poison Stack] Device on BitIdx:0x2 doesn't exist
[Config IIO Viral & Poison Stack] Device on BitIdx:0x3 doesn't exist
[Config IIO Viral & Poison Stack] Device on BitIdx:0x4 doesn't exist
[Config IIO Viral & Poison Stack] Device on BitIdx:0x5 doesn't exist
[Config IIO Viral & Poison Stack] Device on BitIdx:0x6 doesn't exist
[Config IIO Viral & Poison Stack] Device on BitIdx:0x7 doesn't exist
[Config IIO Viral & Poison Stack] Device on BitIdx:0x8 doesn't exist
[Config IIO Viral & Poison Stack] Device on BitIdx:0x9 doesn't exist
[Config IIO Viral & Poison] Satallite IEH on BitIdx:0xB
[Config IIO Viral & Poison] Satallite IEH on BitIdx:0xD
[Config IIO Viral & Poison Stack] Device on BitIdx:0x2 doesn't exist
[Config IIO Viral & Poison Stack] Device on BitIdx:0x3 doesn't exist
[Config IIO Viral & Poison Stack] Device on BitIdx:0x4 doesn't exist
[Config IIO Viral & Poison Stack] Device on BitIdx:0x5 doesn't exist
[Config IIO Viral & Poison Stack] Device on BitIdx:0x6 doesn't exist
[Config IIO Viral & Poison Stack] Device on BitIdx:0x7 doesn't exist
[Config IIO Viral & Poison Stack] Device on BitIdx:0x8 doesn't exist
[Config IIO Viral & Poison Stack] Device on BitIdx:0x9 doesn't exist
[IIO VIRAL & POISON] Config Socket:0x1 End
PROGRESS CODE: V03070003 I0
PDB = c:\efi\servergen2\intel\Build\EagleStreamRpPkg\DEBUG_VS2015x86\X64\ServerRasPkg\Driver\Smm\CrashLogSmm\CrashLogSmm\DEBUG\CrashLogSmm.pdb
PROGRESS CODE: V03070002 I0
CrashLog Entry Point
Failed to locate CpuCrashLogRecordRegionProtocol !
Failed to locate PchCrashLogRecordRegionProtocol !
CrashLog is not present. Skip BERT creation
Error: SMM image at 0007E7BE000 start failed: Not Ready
PROGRESS CODE: V03070003 I0
PDB = c:\efi\servergen2\intel\Build\EagleStreamRpPkg\DEBUG_VS2015x86\X64\ServerRasPkg\Driver\Smm\WheaErrorInj\WheaErrorInj\DEBUG\WheaErrorInj2.pdb
PROGRESS CODE: V03070002 I0
[WheaErrorInj2][CrystalRidgeLib] Failed to locate protocol: Not Found
WHEA Error Injection is not enabled in Setup
PROGRESS CODE: V03070003 I0
PDB = c:\efi\servergen2\intel\Build\EagleStreamRpPkg\DEBUG_VS2015x86\X64\ServerRasPkg\Driver\Smm\WheaLastBootError\WheaLastBootError\DEBUG\WheaLastBootError.pdb
PROGRESS CODE: V03070002 I0
[WheaLastBootError][CrystalRidgeLib] Failed to locate protocol: Not Found
dump ACPI table
42 45 52 54 30 0 0 0 1 0 49 4E 54 45 4C 20 49
4E 54 45 4C 20 49 44 1 0 0 0 49 4E 54 4C 1
0 0 0 0 80 4 0 18 80 C4 76 0 0 0 0
[WHEAINIT] start to install WHEA ACPI tables
[WHEAINIT] install WHEA ACPI tables status:Success
PROGRESS CODE: V03070003 I0
PDB = c:\efi\servergen2\intel\Build\EagleStreamRpPkg\DEBUG_VS2015x86\X64\ServerRasPkg\Driver\Smm\WheaERST\WheaERST\DEBUG\WheaERST.pdb
PROGRESS CODE: V03070002 I0
dump ACPI table
45 52 53 54 30 2 0 0 1 0 49 4E 54 45 4C 20 49
4E 54 45 4C 20 49 44 1 0 0 0 49 4E 54 4C 1
0 0 0 30 0 0 0 0 0 0 0 10 0 0 0 0
3 0 0 0 40 0 4 18 50 C4 76 0 0 0 0 2
0 0 0 0 0 0 0 FF FF 0 0 0 0 0 0 1
3 0 0 0 40 0 4 18 50 C4 76 0 0 0 0 1
0 0 0 0 0 0 0 FF FF 0 0 0 0 0 0 2
3 0 0 0 40 0 4 18 50 C4 76 0 0 0 0 3
0 0 0 0 0 0 0 FF FF 0 0 0 0 0 0 3
4 1 0 0 40 0 4 18 50 C4 76 0 0 0 0 0
0 0 0 0 0 0 0 FF FF 0 0 0 0 0 0 4
2 0 0 0 40 0 4 30 50 C4 76 0 0 0 0 0
0 0 0 0 0 0 0 FF FF FF FF 0 0 0 0 5
3 0 0 1 8 0 1 B2 0 0 0 0 0 0 0 9C
0 0 0 0 0 0 0 FF FF 0 0 0 0 0 0 6
1 0 0 0 40 0 4 40 50 C4 76 0 0 0 0 1
0 0 0 0 0 0 0 1 0 0 0 0 0 0 0 7
0 0 0 0 40 0 4 38 50 C4 76 0 0 0 0 0
0 0 0 0 0 0 0 FF FF FF FF 0 0 0 0 8
0 0 0 0 40 0 4 70 50 C4 76 0 0 0 0 0
0 0 0 0 0 0 0 FF FF FF FF FF FF FF FF 9
2 0 0 0 40 0 4 20 50 C4 76 0 0 0 0 0
0 0 0 0 0 0 0 FF FF FF FF FF FF FF FF A
0 0 0 0 40 0 4 48 50 C4 76 0 0 0 0 0
0 0 0 0 0 0 0 FF FF FF FF 0 0 0 0 B
3 0 0 0 40 0 4 18 50 C4 76 0 0 0 0 F
0 0 0 0 0 0 0 FF FF 0 0 0 0 0 0 C
0 0 0 0 40 0 4 28 50 C4 76 0 0 0 0 0
0 0 0 0 0 0 0 FF FF FF FF 0 0 0 0 D
0 0 0 0 40 0 4 50 50 C4 76 0 0 0 0 0
0 0 0 0 0 0 0 FF FF FF FF FF FF FF FF E
0 0 0 0 40 0 4 58 50 C4 76 0 0 0 0 0
0 0 0 0 0 0 0 FF FF FF FF FF FF FF FF F
0 0 0 0 40 0 4 60 50 C4 76 0 0 0 0 0
0 0 0 0 0 0 0 FF FF FF FF FF FF FF FF
[WHEAINIT] start to install WHEA ACPI tables
[WHEAINIT] install WHEA ACPI tables status:Success
PROGRESS CODE: V03070003 I0
PDB = c:\efi\servergen2\intel\Build\EagleStreamRpPkg\DEBUG_VS2015x86\X64\ServerRasPkg\Driver\Smm\EnhancedMcaErrorLog\EnhancedMcaErrorLog\DEBUG\EnhancedMcaErrorLog.pdb
PROGRESS CODE: V03070002 I0
InitializEnhancedMcaErrorLogger++
EmcaEn: 1, ElogEn: 1, ElogIgnOptin: 0, ElogCorrErrEn: 1, ElogMemErrEn: 1, ElogProcErrEn: 1
EmcaL1DirAddr = 0x76C24000
InitializEnhancedMcaErrorLogger--, Success
PROGRESS CODE: V03070003 I0
PDB = c:\efi\servergen2\intel\Build\EagleStreamRpPkg\DEBUG_VS2015x86\X64\ServerRasPkg\Driver\Smm\PprVlsErrorLogListener\PprVlsErrorLogListener\DEBUG\PprVlsErrorLogListener.pdb
PROGRESS CODE: V03070002 I0
[PprVlsErrorLogListener][CrystalRidgeLib] Failed to locate protocol: Not Found
PROGRESS CODE: V03070003 I0
PDB = c:\efi\servergen2\intel\Build\EagleStreamRpPkg\DEBUG_VS2015x86\X64\ServerRasPkg\Driver\Smm\McBankErrorInjection\McBankErrorInjection\DEBUG\McBankErrorInjection.pdb
PROGRESS CODE: V03070002 I0
PROGRESS CODE: V03070003 I0
PDB = c:\efi\servergen2\intel\Build\EagleStreamRpPkg\DEBUG_VS2015x86\X64\ServerRasPkg\Driver\Smm\ErrorControl\ErrorControl\DEBUG\ErrorControl.pdb
PROGRESS CODE: V03070002 I0
PROGRESS CODE: V03070003 I0
PDB = c:\efi\servergen2\intel\Build\EagleStreamRpPkg\DEBUG_VS2015x86\X64\ServerSiliconPkg\Cpu\PowerManagement\PpmInitializeDxe\PpmInitializeDxe\DEBUG\PpmInitializeDxe.pdb
PROGRESS CODE: V03040002 I0
DXE PPM Initialization Entry
PROGRESS CODE: V03040003 I0
PDB = c:\efi\servergen2\intel\Build\EagleStreamRpPkg\DEBUG_VS2015x86\X64\ServerSiliconPkg\Universal\Dxe\CrystalRidge\CrystalRidge\DEBUG\CrystalRidge.pdb
PROGRESS CODE: V03040002 I0
No PMems, Crystal Ridge Driver is not going to be loaded.
PROGRESS CODE: V03040003 I0
PDB = c:\efi\servergen2\intel\Build\EagleStreamRpPkg\DEBUG_VS2015x86\X64\ClientOneSiliconPkg\IpBlock\Amt\Sol\Dxe\SerialOverLan\DEBUG\SerialOverLan.pdb
PROGRESS CODE: V03040002 I0
Error: Image at 00068F52000 start failed: Unsupported
PDB = c:\efi\servergen2\intel\Build\EagleStreamRpPkg\DEBUG_VS2015x86\X64\ClientOneSiliconPkg\IpBlock\Amt\Sol\Dxe\SerialOverLan\DEBUG\SerialOverLan.pdb
PROGRESS CODE: V03040003 I0
PDB = c:\efi\servergen2\intel\Build\EagleStreamRpPkg\DEBUG_VS2015x86\X64\ServerPlatformPkg\Features\Me\Client\MePolicyHelper\MePolicyHelper\DEBUG\MePolicyHelper.pdb
PROGRESS CODE: V03040002 I0
PROGRESS CODE: V03040003 I0
PDB = c:\efi\servergen2\intel\Build\EagleStreamRpPkg\DEBUG_VS2015x86\X64\XmlCliFeaturePkg\XmlCliRestricted\Dxe\XmlCliDxe\DEBUG\XmlCliDxe.pdb
PROGRESS CODE: V03040002 I0
PROGRESS CODE: V03040003 I0
PDB = d:\dde\63d22spr\intel\Build\EagleStreamRpPkg\DEBUG_VS2015x86\X64\ServerSecurityPkg\Pfr\Restricted\DebugTool\IShellCommand\IShellCommands\DEBUG\IShellCommands.pdb
PROGRESS CODE: V03040002 I0
PROGRESS CODE: V03040003 I0
PDB = c:\efi\servergen2\intel\Build\EagleStreamRpPkg\DEBUG_VS2015x86\X64\ServerPlatformPkg\Universal\PiPilotIII\PiPilotIIIDxe\DEBUG\PiPilotIIIDxe.pdb
PROGRESS CODE: V03040002 I0
PROGRESS CODE: V03040003 I0
PDB = c:\efi\servergen2\intel\Build\EagleStreamRpPkg\DEBUG_VS2015x86\X64\ServerPlatformPkg\Universal\PiAst2500\PiAst2500Dxe\DEBUG\PiAst2500Dxe.pdb
PROGRESS CODE: V03040002 I0
PROGRESS CODE: V03040003 I0
PDB = c:\efi\servergen2\intel\Build\EagleStreamRpPkg\DEBUG_VS2015x86\X64\FatPkg\EnhancedFatDxe\Fat\DEBUG\Fat.pdb
PROGRESS CODE: V03040002 I0
PROGRESS CODE: V03040003 I0
PDB = c:\efi\servergen2\intel\Build\EagleStreamRpPkg\DEBUG_VS2015x86\X64\ServerPlatformPkg\Platform\IsaHostController\IsaHostControllerDxe\DEBUG\IsaHostControllerDxe.pdb
PROGRESS CODE: V03040002 I0
PROGRESS CODE: V03040003 I0
PDB = c:\efi\servergen2\intel\Build\EagleStreamRpPkg\DEBUG_VS2015x86\X64\ServerPlatformPkg\Features\Sata\SataController\SataController\DEBUG\SataController.pdb
PROGRESS CODE: V03040002 I0
PROGRESS CODE: V03040003 I0
PDB = c:\efi\servergen2\intel\Build\EagleStreamRpPkg\DEBUG_VS2015x86\X64\MdeModulePkg\Bus\Pci\PciBusDxe\PciBusDxe\DEBUG\PciBusDxe.pdb
PROGRESS CODE: V03040002 I0
PROGRESS CODE: V03040003 I0
PDB = c:\efi\servergen2\intel\Build\EagleStreamRpPkg\DEBUG_VS2015x86\X64\ServerPlatformPkg\Features\Acpi\Dxe\AcpiPlatform\AcpiPlatformSpr\DEBUG\AcpiPlatform.pdb
PROGRESS CODE: V03040002 I0
PROGRESS CODE: V03048503 I0
Locate mFruRedirProtocol failed Not Found
ACPI MCFG table @ address 0x68F59398
Multi-Seg Support = 0
Number of Segments (sockets): 1
Table Length = 0x3C
Segment[ 0].BaseAddress = 80000000
Segment[ 0].PciSegmentGroupNumber = 0
Segment[ 0].StartBusNumber = 0
Segment[ 0].EndBusNumber = FF
Xhci TableHeader->OemTableId = 6E5F6878
[ACPI](KEYP) Not found any PCIe/CXL/NTB port
ExternSbExpected: 1787424408, ExternSbFound: 1787260952
ExternSbExpected: 0, ExternSbFound: 1993134098
PROGRESS CODE: V03040003 I0
PDB = c:\efi\servergen2\intel\Build\EagleStreamRpPkg\DEBUG_VS2015x86\X64\ServerPlatformPkg\Features\Acpi\Dxe\AcpiVtd\AcpiVTD\DEBUG\AcpiVTD.pdb
PROGRESS CODE: V03040002 I0
PROGRESS CODE: V03040003 I0
PDB = c:\efi\servergen2\intel\Build\EagleStreamRpPkg\DEBUG_VS2015x86\X64\OvmfPkg\QemuVideoDxe\QemuVideoDxe\DEBUG\QemuVideoDxe.pdb
PROGRESS CODE: V03040002 I0
PROGRESS CODE: V03040003 I0
PDB = c:\efi\servergen2\intel\Build\EagleStreamRpPkg\DEBUG_VS2015x86\X64\MdeModulePkg\Bus\Pci\XhciDxe\XhciDxe\DEBUG\XhciDxe.pdb
PROGRESS CODE: V03040002 I0
PROGRESS CODE: V03040003 I0
PDB = c:\efi\servergen2\intel\Build\EagleStreamRpPkg\DEBUG_VS2015x86\X64\MdeModulePkg\Bus\Pci\EhciDxe\EhciDxe\DEBUG\EhciDxe.pdb
PROGRESS CODE: V03040002 I0
PROGRESS CODE: V03040003 I0
PDB = c:\efi\servergen2\intel\Build\EagleStreamRpPkg\DEBUG_VS2015x86\X64\MdeModulePkg\Bus\Usb\UsbKbDxe\UsbKbDxe\DEBUG\UsbKbDxe.pdb
PROGRESS CODE: V03040002 I0
PROGRESS CODE: V03040003 I0
PDB = c:\efi\servergen2\intel\Build\EagleStreamRpPkg\DEBUG_VS2015x86\X64\MdeModulePkg\Bus\Usb\UsbMassStorageDxe\UsbMassStorageDxe\DEBUG\UsbMassStorageDxe.pdb
PROGRESS CODE: V03040002 I0
PROGRESS CODE: V03040003 I0
PDB = c:\efi\servergen2\intel\Build\EagleStreamRpPkg\DEBUG_VS2015x86\X64\MdeModulePkg\Bus\Usb\UsbMouseDxe\UsbMouseDxe\DEBUG\UsbMouseDxe.pdb
PROGRESS CODE: V03040002 I0
PROGRESS CODE: V03040003 I0
PDB = c:\efi\servergen2\intel\Build\EagleStreamRpPkg\DEBUG_VS2015x86\X64\MdeModulePkg\Bus\Pci\UhciDxe\UhciDxe\DEBUG\UhciDxe.pdb
PROGRESS CODE: V03040002 I0
PROGRESS CODE: V03040003 I0
PDB = c:\efi\servergen2\intel\Build\EagleStreamRpPkg\DEBUG_VS2015x86\X64\MdeModulePkg\Bus\Usb\UsbBusDxe\UsbBusDxe\DEBUG\UsbBusDxe.pdb
PROGRESS CODE: V03040002 I0
PROGRESS CODE: V03040003 I0
PDB = c:\efi\servergen2\intel\Build\EagleStreamRpPkg\DEBUG_VS2015x86\X64\MdeModulePkg\Bus\Pci\EhciDxe\EhciDxe\DEBUG\EhciDxe.pdb
PROGRESS CODE: V03040002 I0
PROGRESS CODE: V03040003 I0
PDB = c:\efi\servergen2\intel\Build\EagleStreamRpPkg\DEBUG_VS2015x86\X64\MdeModulePkg\Bus\Usb\UsbKbDxe\UsbKbDxe\DEBUG\UsbKbDxe.pdb
PROGRESS CODE: V03040002 I0
PROGRESS CODE: V03040003 I0
PDB = c:\efi\servergen2\intel\Build\EagleStreamRpPkg\DEBUG_VS2015x86\X64\MdeModulePkg\Bus\Usb\UsbMassStorageDxe\UsbMassStorageDxe\DEBUG\UsbMassStorageDxe.pdb
PROGRESS CODE: V03040002 I0
PROGRESS CODE: V03040003 I0
PDB = c:\efi\servergen2\intel\Build\EagleStreamRpPkg\DEBUG_VS2015x86\X64\MdeModulePkg\Bus\Usb\UsbMouseDxe\UsbMouseDxe\DEBUG\UsbMouseDxe.pdb
PROGRESS CODE: V03040002 I0
PROGRESS CODE: V03040003 I0
PDB = c:\efi\servergen2\intel\Build\EagleStreamRpPkg\DEBUG_VS2015x86\X64\MdeModulePkg\Bus\Pci\UhciDxe\UhciDxe\DEBUG\UhciDxe.pdb
PROGRESS CODE: V03040002 I0
PROGRESS CODE: V03040003 I0
PDB = c:\efi\servergen2\intel\Build\EagleStreamRpPkg\DEBUG_VS2015x86\X64\MdeModulePkg\Bus\Usb\UsbBusDxe\UsbBusDxe\DEBUG\UsbBusDxe.pdb
PROGRESS CODE: V03040002 I0
PROGRESS CODE: V03040003 I0
PDB = c:\efi\servergen2\intel\Build\EagleStreamRpPkg\DEBUG_VS2015x86\X64\MdeModulePkg\Bus\Scsi\ScsiBusDxe\ScsiBusDxe\DEBUG\ScsiBus.pdb
PROGRESS CODE: V03040002 I0
PROGRESS CODE: V03040003 I0
PDB = c:\efi\servergen2\intel\Build\EagleStreamRpPkg\DEBUG_VS2015x86\X64\MdeModulePkg\Bus\Scsi\ScsiDiskDxe\ScsiDiskDxe\DEBUG\ScsiDisk.pdb
PROGRESS CODE: V03040002 I0
PROGRESS CODE: V03040003 I0
PDB = c:\efi\servergen2\intel\Build\EagleStreamRpPkg\DEBUG_VS2015x86\X64\MdeModulePkg\Bus\Pci\NvmExpressDxe\NvmExpressDxe\DEBUG\NvmExpressDxe.pdb
PROGRESS CODE: V03040002 I0
PROGRESS CODE: V03040003 I0
PDB = c:\efi\servergen2\intel\Build\EagleStreamRpPkg\DEBUG_VS2015x86\X64\MdeModulePkg\Universal\Disk\UnicodeCollation\EnglishDxe\EnglishDxe\DEBUG\EnglishDxe.pdb
PROGRESS CODE: V03040002 I0
PROGRESS CODE: V03040003 I0
PDB = c:\efi\servergen2\intel\Build\EagleStreamRpPkg\DEBUG_VS2015x86\X64\MdeModulePkg\Universal\Console\ConPlatformDxe\ConPlatformDxe\DEBUG\ConPlatformDxe.pdb
PROGRESS CODE: V03040002 I0
PROGRESS CODE: V03040003 I0
PDB = c:\efi\servergen2\intel\Build\EagleStreamRpPkg\DEBUG_VS2015x86\X64\MdeModulePkg\Universal\Console\ConSplitterDxe\ConSplitterDxe\DEBUG\ConSplitterDxe.pdb
PROGRESS CODE: V03040002 I0
PROGRESS CODE: V03040003 I0
PDB = c:\efi\servergen2\intel\Build\EagleStreamRpPkg\DEBUG_VS2015x86\X64\MdeModulePkg\Universal\Console\GraphicsConsoleDxe\GraphicsConsoleDxe\DEBUG\GraphicsConsoleDxe.pdb
PROGRESS CODE: V03040002 I0
PROGRESS CODE: V03040003 I0
PDB = c:\efi\servergen2\intel\Build\EagleStreamRpPkg\DEBUG_VS2015x86\X64\MdeModulePkg\Universal\Console\TerminalDxe\TerminalDxe\DEBUG\TerminalDxe.pdb
PROGRESS CODE: V03040002 I0
PROGRESS CODE: V03040003 I0
PDB = c:\efi\servergen2\intel\Build\EagleStreamRpPkg\DEBUG_VS2015x86\X64\MdeModulePkg\Universal\Disk\DiskIoDxe\DiskIoDxe\DEBUG\DiskIoDxe.pdb
PROGRESS CODE: V03040002 I0
PROGRESS CODE: V03040003 I0
PDB = c:\efi\servergen2\intel\Build\EagleStreamRpPkg\DEBUG_VS2015x86\X64\MdeModulePkg\Universal\Disk\PartitionDxe\PartitionDxe\DEBUG\PartitionDxe.pdb
PROGRESS CODE: V03040002 I0
PROGRESS CODE: V03040003 I0
PDB = c:\efi\servergen2\intel\Build\EagleStreamRpPkg\DEBUG_VS2015x86\X64\MdeModulePkg\Bus\Isa\IsaBusDxe\IsaBusDxe\DEBUG\IsaBusDxe.pdb
PROGRESS CODE: V03040002 I0
PROGRESS CODE: V03040003 I0
PDB = c:\efi\servergen2\intel\Build\EagleStreamRpPkg\DEBUG_VS2015x86\X64\MdeModulePkg\Bus\Pci\PciSioSerialDxe\PciSioSerialDxe\DEBUG\PciSioSerialDxe.pdb
PROGRESS CODE: V03040002 I0
PROGRESS CODE: V03040003 I0
PDB = c:\efi\servergen2\intel\Build\EagleStreamRpPkg\DEBUG_VS2015x86\X64\MdeModulePkg\Bus\Isa\Ps2KeyboardDxe\Ps2KeyboardDxe\DEBUG\Ps2KeyboardDxe.pdb
PROGRESS CODE: V03040002 I0
PROGRESS CODE: V03040003 I0
PDB = c:\efi\servergen2\intel\Build\EagleStreamRpPkg\DEBUG_VS2015x86\X64\MdeModulePkg\Bus\Isa\Ps2MouseDxe\Ps2MouseDxe\DEBUG\Ps2MouseDxe.pdb
PROGRESS CODE: V03040002 I0
PROGRESS CODE: V03040003 I0
PDB = c:\efi\servergen2\intel\Build\EagleStreamRpPkg\DEBUG_VS2015x86\X64\MdeModulePkg\Bus\Ata\AtaBusDxe\AtaBusDxe\DEBUG\AtaBusDxe.pdb
PROGRESS CODE: V03040002 I0
PROGRESS CODE: V03040003 I0
PDB = c:\efi\servergen2\intel\Build\EagleStreamRpPkg\DEBUG_VS2015x86\X64\MdeModulePkg\Bus\Ata\AtaAtapiPassThru\AtaAtapiPassThru\DEBUG\AtaAtapiPassThruDxe.pdb
PROGRESS CODE: V03040002 I0
PROGRESS CODE: V03040003 I0
PDB = c:\efi\servergen2\intel\Build\EagleStreamRpPkg\DEBUG_VS2015x86\X64\NetworkPkg\SnpDxe\SnpDxe\DEBUG\SnpDxe.pdb
PROGRESS CODE: V03040002 I0
PROGRESS CODE: V03040003 I0
PDB = c:\efi\servergen2\intel\Build\EagleStreamRpPkg\DEBUG_VS2015x86\X64\NetworkPkg\VlanConfigDxe\VlanConfigDxe\DEBUG\VlanConfigDxe.pdb
PROGRESS CODE: V03040002 I0
PROGRESS CODE: V03040003 I0
PDB = c:\efi\servergen2\intel\Build\EagleStreamRpPkg\DEBUG_VS2015x86\X64\NetworkPkg\MnpDxe\MnpDxe\DEBUG\MnpDxe.pdb
PROGRESS CODE: V03040002 I0
PROGRESS CODE: V03040003 I0
PDB = c:\efi\servergen2\intel\Build\EagleStreamRpPkg\DEBUG_VS2015x86\X64\NetworkPkg\ArpDxe\ArpDxe\DEBUG\ArpDxe.pdb
PROGRESS CODE: V03040002 I0
PROGRESS CODE: V03040003 I0
PDB = c:\efi\servergen2\intel\Build\EagleStreamRpPkg\DEBUG_VS2015x86\X64\NetworkPkg\Dhcp4Dxe\Dhcp4Dxe\DEBUG\Dhcp4Dxe.pdb
PROGRESS CODE: V03040002 I0
PROGRESS CODE: V03040003 I0
PDB = c:\efi\servergen2\intel\Build\EagleStreamRpPkg\DEBUG_VS2015x86\X64\NetworkPkg\Ip4Dxe\Ip4Dxe\DEBUG\Ip4Dxe.pdb
PROGRESS CODE: V03040002 I0
PROGRESS CODE: V03040003 I0
PDB = c:\efi\servergen2\intel\Build\EagleStreamRpPkg\DEBUG_VS2015x86\X64\NetworkPkg\Udp4Dxe\Udp4Dxe\DEBUG\Udp4Dxe.pdb
PROGRESS CODE: V03040002 I0
PROGRESS CODE: V03040003 I0
PDB = c:\efi\servergen2\intel\Build\EagleStreamRpPkg\DEBUG_VS2015x86\X64\NetworkPkg\Mtftp4Dxe\Mtftp4Dxe\DEBUG\Mtftp4Dxe.pdb
PROGRESS CODE: V03040002 I0
PROGRESS CODE: V03040003 I0
PDB = c:\efi\servergen2\intel\Build\EagleStreamRpPkg\DEBUG_VS2015x86\X64\NetworkPkg\Dhcp6Dxe\Dhcp6Dxe\DEBUG\Dhcp6Dxe.pdb
PROGRESS CODE: V03040002 I0
PROGRESS CODE: V03040003 I0
PDB = c:\efi\servergen2\intel\Build\EagleStreamRpPkg\DEBUG_VS2015x86\X64\NetworkPkg\Ip6Dxe\Ip6Dxe\DEBUG\Ip6Dxe.pdb
PROGRESS CODE: V03040002 I0
PROGRESS CODE: V03040003 I0
PDB = c:\efi\servergen2\intel\Build\EagleStreamRpPkg\DEBUG_VS2015x86\X64\NetworkPkg\Udp6Dxe\Udp6Dxe\DEBUG\Udp6Dxe.pdb
PROGRESS CODE: V03040002 I0
PROGRESS CODE: V03040003 I0
PDB = c:\efi\servergen2\intel\Build\EagleStreamRpPkg\DEBUG_VS2015x86\X64\NetworkPkg\Mtftp6Dxe\Mtftp6Dxe\DEBUG\Mtftp6Dxe.pdb
PROGRESS CODE: V03040002 I0
PROGRESS CODE: V03040003 I0
PDB = c:\efi\servergen2\intel\Build\EagleStreamRpPkg\DEBUG_VS2015x86\X64\NetworkPkg\TcpDxe\TcpDxe\DEBUG\TcpDxe.pdb
PROGRESS CODE: V03040002 I0
PROGRESS CODE: V03040003 I0
PDB = c:\efi\servergen2\intel\Build\EagleStreamRpPkg\DEBUG_VS2015x86\X64\NetworkPkg\UefiPxeBcDxe\UefiPxeBcDxe\DEBUG\UefiPxeBcDxe.pdb
PROGRESS CODE: V03040002 I0
PROGRESS CODE: V03040003 I0
PDB = c:\efi\servergen2\intel\Build\EagleStreamRpPkg\DEBUG_VS2015x86\X64\NetworkPkg\TlsDxe\TlsDxe\DEBUG\TlsDxe.pdb
PROGRESS CODE: V03040002 I0
PROGRESS CODE: V03040003 I0
PDB = c:\efi\servergen2\intel\Build\EagleStreamRpPkg\DEBUG_VS2015x86\X64\NetworkPkg\DnsDxe\DnsDxe\DEBUG\DnsDxe.pdb
PROGRESS CODE: V03040002 I0
PROGRESS CODE: V03040003 I0
PDB = c:\efi\servergen2\intel\Build\EagleStreamRpPkg\DEBUG_VS2015x86\X64\NetworkPkg\HttpDxe\HttpDxe\DEBUG\HttpDxe.pdb
PROGRESS CODE: V03040002 I0
PROGRESS CODE: V03040003 I0
PDB = c:\efi\servergen2\intel\Build\EagleStreamRpPkg\DEBUG_VS2015x86\X64\NetworkPkg\HttpBootDxe\HttpBootDxe\DEBUG\HttpBootDxe.pdb
PROGRESS CODE: V03040002 I0
PROGRESS CODE: V03040003 I0
PROGRESS CODE: V03040002 I0
PROGRESS CODE: V03040003 I0
PROGRESS CODE: V03040002 I0
PROGRESS CODE: V03040003 I0
PROGRESS CODE: V03040002 I0
PROGRESS CODE: V03040003 I0
PROGRESS CODE: V03040002 I0
PROGRESS CODE: V03040003 I0
PDB = d:\qba1\workspace\39189\vmd_uefi\Build\MdeModule\DEBUG_VS2012x86\X64\MdeModulePkg\Bus\Pci\VmdDxe\VmdDxe\DEBUG\VmdDxe.pdb
PROGRESS CODE: V03040002 I0
PROGRESS CODE: V03040003 I0
PROGRESS CODE: V03040002 I0
PROGRESS CODE: V03040003 I0
PDB = c:\efi\servergen2\intel\Build\EagleStreamRpPkg\DEBUG_VS2015x86\X64\XmlCliFeaturePkg\XmlCliRestricted\Smm\XmlCliSmm\DEBUG\XmlCliSmm.pdb
PROGRESS CODE: V03070002 I0
PROGRESS CODE: V03070003 I0
PDB = c:\efi\servergen2\intel\Build\EagleStreamRpPkg\DEBUG_VS2015x86\X64\ServerPlatformPkg\Features\Acpi\DxeSmm\AcpiSmm\AcpiSmmPlatform\DEBUG\AcpiSmmPlatform.pdb
PROGRESS CODE: V03070002 I0
PROGRESS CODE: V03070003 I0
PDB = c:\efi\servergen2\intel\Build\EagleStreamRpPkg\DEBUG_VS2015x86\X64\ServerPlatformPkg\Restricted\SMIFlashSigned\SMIFlashSigned\DEBUG\SmiFlashSigned.pdb
PROGRESS CODE: V03070002 I0
PROGRESS CODE: V03070003 I0
PDB = c:\efi\servergen2\intel\Build\EagleStreamRpPkg\DEBUG_VS2015x86\X64\ServerRasPkg\Driver\Smm\Gen2\IioErrorHandler\IioErrorHandler\DEBUG\IioErrorHandler.pdb
PROGRESS CODE: V03070002 I0
MailBox->IioInitPar.CxlMefnEn = 0x0
PROGRESS CODE: V03070003 I0
PDB = c:\efi\servergen2\intel\Build\EagleStreamRpPkg\DEBUG_VS2015x86\X64\ServerRasPkg\Driver\Smm\WheaErrorLogListener\WheaErrorLogListener\DEBUG\WheaErrorLogListener.pdb
PROGRESS CODE: V03070002 I0
[HEST] Current source counter:1 table length:68 buffer address:76BEF018
[HEST] Current source counter:2 table length:A8 buffer address:76BEA018
[HEST] Current source counter:3 table length:D8 buffer address:0
[HEST] Current source counter:4 table length:104 buffer address:0
[HEST] Current source counter:5 table length:13C buffer address:0
dump ACPI table
48 45 53 54 3C 1 0 0 1 0 49 4E 54 45 4C 20 49
4E 54 45 4C 20 49 44 1 0 0 0 49 4E 54 4C 1
0 0 0 5 0 0 0 9 0 0 0 FF FF 0 1 1
0 0 0 F 0 0 0 F8 1F 0 0 0 40 0 4 18
F0 BE 76 0 0 0 0 3 1C 0 0 0 0 0 0 0
0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0
0 0 0 0 20 0 0 9 0 1 0 FF FF 0 1 1
0 0 0 1 0 0 0 F8 1F 0 0 0 40 0 4 18
A0 BE 76 0 0 0 0 4 1C 0 0 0 0 0 0 0
0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0
0 0 0 0 20 0 0 6 0 2 0 0 0 3 0 1
0 0 0 1 0 0 0 0 0 0 0 0 0 0 0 0
0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0
0 0 0 0 0 0 0 7 0 3 0 0 0 3 0 1
0 0 0 1 0 0 0 0 0 0 0 0 0 0 0 0
0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0
0 0 0 8 0 4 0 0 0 3 0 1 0 0 0 1
0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0
0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0
0 0 0 0 0 0 0 0 0 0 0
[WHEAINIT] start to install WHEA ACPI tables
[WHEAINIT] install WHEA ACPI tables status:Success
PROGRESS CODE: V03070003 I0
PDB = c:\efi\servergen2\intel\Build\EagleStreamRpPkg\DEBUG_VS2015x86\X64\ServerSecurityPkg\Mktme\MktmeLateInit\MktmeLateInit\DEBUG\MktmeLateInit.pdb
PROGRESS CODE: V03040002 I0
PROGRESS CODE: V03040003 I0
PDB = c:\efi\servergen2\intel\Build\EagleStreamRpPkg\DEBUG_VS2015x86\X64\ServerSecurityPkg\Sgx\SgxLateInit\Spr\SgxLateInit\DEBUG\SgxLateInitSPR.pdb
PROGRESS CODE: V03040002 I0
[SGX] SgxLateInitEntryPoint entry
SgxMpServicesData()
Thread 0 is BSP of Socket 0
Thread 80 is BSP of Socket 1
System BSP Thread = 000
System BSP Package = 000
[SGX] GetActmManifestHobArray BEGIN
Found ActmDimmManifestHob[0] = 0x70CA9788!
Found ActmDimmManifestHob[1] = 0x70CA9908!
[SGX] GetActmManifestHobArray END (Success)
[SGX] UpdateSocketSetupOptions Start
[SGX] UpdateSocketSetupOptions exit: Success
TDX: GuidHob pointer is NULL
GetVariableHelper - SgxRegistrationConfiguration not found in NVRAM, continue
GetVariableHelper - SgxUefiRegistrationConfiguration not found in NVRAM, continue
[SGX] Create RegistrationConfiguration from defaults.
SetRegistrationServerAddress: SgxRegistrationConfig->SgxRegServerInfo.Url = https://sbx.api.trustedservices.intel.com:443
[SGX] Update UpdateRegistrationConfigFlags
GetVariableHelper - SgxPlatformManifest not found in NVRAM, continue
GetVariableHelper - SgxUefiRegistrationServerRequest not found in NVRAM, continue
[SGX-DEBUG]: Get SgxRegistrationStatus
GetVariableHelper - SgxRegistrationStatus not found in NVRAM, continue
[SGX-DEBUG]: Get SgxUefiRegistrationStatus
GetVariableHelper - SgxUefiRegistrationStatus not found in NVRAM, continue
Warning: SGX is disabled on this system
[SGX] SgxDisabled_SgxLateInit: Success
[SGX] SgxErrorCode = 0x0
[SGX] PreviousStateVariablesSaving BEGIN
GetVariableHelper - SgxRegistrationServerResponse not found in NVRAM, continue
[SGX] SgxLateInit exit: Success
PROGRESS CODE: V03040003 I0
PDB = c:\efi\servergen2\intel\Build\EagleStreamRpPkg\DEBUG_VS2015x86\X64\ServerPlatformPkg\Platform\Dxe\S3NvramSave\S3NvramSave\DEBUG\S3NvramSave.pdb
PROGRESS CODE: V03040002 I0
Save data to NVRAM for socket_0_nvram_data / socket_0_nvram_data - = Saved
Save data to NVRAM for socket_1_nvram_data / socket_1_nvram_data - = Saved
Save data to NVRAM for socket_2_nvram_data / socket_2_nvram_data - = HOB not found or not populated
Save data to NVRAM for socket_3_nvram_data / socket_3_nvram_data - = HOB not found or not populatedPROGRESS CODE: V03040003 I0
PDB = c:\efi\servergen2\intel\Build\EagleStreamRpPkg\DEBUG_VS2015x86\X64\ServerPlatformPkg\Platform\Dxe\UncoreMiscDxe\UncoreMiscDxe\DEBUG\UncoreMiscDxe.pdb
PROGRESS CODE: V03040002 I0
PROGRESS CODE: V03040003 I0
PDB = c:\efi\servergen2\intel\Build\EagleStreamRpPkg\DEBUG_VS2015x86\X64\ServerPlatformPkg\Platform\Dxe\ReserveMemory\ReserveMem\DEBUG\ReserveMem.pdb
PROGRESS CODE: V03040002 I0
PROGRESS CODE: V03040003 I0
PDB = c:\efi\servergen2\intel\Build\EagleStreamRpPkg\DEBUG_VS2015x86\X64\ServerSecurityPkg\Universal\GetSec\Dxe\TxtDxe\DEBUG\TxtDxe.pdb
PROGRESS CODE: V03040002 I0
TXT is disabled
[TXT] DriverEntry: Exit
PROGRESS CODE: V03040003 I0
PDB = c:\efi\servergen2\intel\Build\EagleStreamRpPkg\DEBUG_VS2015x86\X64\UserAuthFeaturePkg\UserAuthenticationDxeSmm\UserAuthenticationDxe\DEBUG\UserAuthenticationDxe.pdb
PROGRESS CODE: V03040002 I0
PROGRESS CODE: V03040003 I0
PDB = c:\efi\servergen2\intel\Build\EagleStreamRpPkg\DEBUG_VS2015x86\X64\EagleStreamRpPkg\Platform\Dxe\Setup\DxePlatform\DEBUG\Platform.pdb
PROGRESS CODE: V03040002 I0
Is CMOS Bad = 1
[HECI Transport-1 DXE] Send pkt: 80040007
00: FF 02 00 00
[HECI Transport-1 DXE] Got pkt: 80140007
00: FF 82 00 00 00 00 06 18 - 00 01 03 00 00 00 06 18
10: 00 01 03 00
[HECI Transport-1 DXE] Send pkt: 80140008
00: 00 00 05 00 1F 00 00 00 - 00 00 00 00 00 00 00 00
10: 00 00 00 00
[HECI Transport-1 DXE] Got pkt: 805E0008
00: 00 00 05 00 1F 00 00 00 - 00 00 00 00 4A 00 00 00
10: 00 00 00 00 18 18 06 00 - 00 06 00 01 06 00 02 06
20: 00 03 56 00 04 56 00 05 - 56 00 06 56 00 07 5C 00
30: 08 7C 00 09 55 00 0A 55 - 00 0B 5B 00 0C 55 00 0D
40: 51 00 0E 51 00 0F 47 00 - 10 07 00 11 47 00 12 07
50: 00 13 47 00 14 07 00 15 - 47 00 16 07 00 17
PROGRESS CODE: V03040003 I0
PDB = c:\efi\servergen2\intel\Build\EagleStreamRpPkg\DEBUG_VS2015x86\X64\ServerPlatformPkg\Platform\Dxe\SocketSetup\SocketSetup\DEBUG\SocketSetup.pdb
PROGRESS CODE: V03040002 I0
PROGRESS CODE: V03040003 I0
PROGRESS CODE: V03041001 I0
PROGRESS CODE: V03051005 I0
PROGRESS CODE: V02010000 I0
PROGRESS CODE: V02011000 I0
PROGRESS CODE: V02011000 I0
PROGRESS CODE: V02011000 I0
PROGRESS CODE: V02011000 I0
PROGRESS CODE: V02011000 I0
PROGRESS CODE: V02011000 I0
PROGRESS CODE: V02011000 I0
PROGRESS CODE: V02011000 I0
PROGRESS CODE: V02011000 I0
PROGRESS CODE: V02011000 I0
PROGRESS CODE: V02011000 I0
PROGRESS CODE: V02011000 I0
PROGRESS CODE: V02011000 I0
PROGRESS CODE: V02011000 I0
PROGRESS CODE: V02011000 I0
PROGRESS CODE: V02011000 I0
PROGRESS CODE: V02011000 I0
PROGRESS CODE: V02011000 I0
PROGRESS CODE: V02011000 I0
PROGRESS CODE: V02011000 I0
PROGRESS CODE: V02011000 I0
PROGRESS CODE: V02011000 I0
PROGRESS CODE: V02011000 I0
PROGRESS CODE: V02011000 I0
PROGRESS CODE: V02011000 I0
PROGRESS CODE: V02011000 I0
PROGRESS CODE: V02011000 I0
PROGRESS CODE: V02011000 I0
PROGRESS CODE: V02011000 I0
PROGRESS CODE: V02011000 I0
PROGRESS CODE: V02011000 I0
PROGRESS CODE: V02011000 I0
PROGRESS CODE: V02011000 I0
PROGRESS CODE: V02011000 I0
PROGRESS CODE: V02011000 I0
PROGRESS CODE: V02011000 I0
PROGRESS CODE: V02011000 I0
PROGRESS CODE: V02011000 I0
PROGRESS CODE: V02011000 I0
PROGRESS CODE: V02011000 I0
PROGRESS CODE: V02011001 I0
Calling IoatInitBootEvent IioIndex: 0
IOAT_INIT_BOOT_EVENT_START
DSA init IioIndex : 0 InstId : 0
IAX init IioIndex : 0 InstId : 0
DSA init IioIndex : 0 InstId : 1
IAX init IioIndex : 0 InstId : 1
DSA init IioIndex : 0 InstId : 2
IAX init IioIndex : 0 InstId : 2
DSA init IioIndex : 0 InstId : 3
IAX init IioIndex : 0 InstId : 3
IOAT_INIT_BOOT_EVENT_END
Calling IioDisableLinkPorts IioIndex: 0
[0] Hide devices; Phase = B
Calling IoatInitBootEvent IioIndex: 1
IOAT_INIT_BOOT_EVENT_START
DSA init IioIndex : 1 InstId : 0
IAX init IioIndex : 1 InstId : 0
DSA init IioIndex : 1 InstId : 1
IAX init IioIndex : 1 InstId : 1
DSA init IioIndex : 1 InstId : 2
IAX init IioIndex : 1 InstId : 2
DSA init IioIndex : 1 InstId : 3
IAX init IioIndex : 1 InstId : 3
IOAT_INIT_BOOT_EVENT_END
Calling IioDisableLinkPorts IioIndex: 1
[1] Hide devices; Phase = B
PROGRESS CODE: V02010004 I0
PROGRESS CODE: V02010004 I0
PROGRESS CODE: V02010004 I0
[OOBMSM] BMC: Expected VID_DID = 0x11501A03
[OOBMSM] BMC: Bus[0x2]:Dev[0x0]:Fun[0x0]
[OOBMSM] PCH-PMT: Bus[0x0]:Dev[0x14]:Fun[0x6]
[GPIO Conflict Check] Identified conflict on pad GPIO_GPP_B12 (actual: 0x3, expected: 0x9)
[GPIO Conflict Check] Identified conflict on pad GPIO_GPP_B13 (actual: 0x3, expected: 0x9)
[GPIO Conflict Check] Identified conflict on pad GPIO_GPP_B14 (actual: 0x3, expected: 0x9)
[GPIO Conflict Check] Identified conflict on pad GPIO_GPP_B15 (actual: 0x3, expected: 0x9)
[OtaDxe.c] OtaEventHandler() {
[OOB] ExecuteOobOneTouchRequest() {
[LT EXISTS register at 0xFED30010]: 0x0000000000000000
TXT Supported Bitmap 0x0000
TXT Enabled Bitmap 0x0000
[LT EMIF register at 0xFED30200]: 0x1D003000, Bit28:27 = 0x03, Bit24:22 = 0x04
[LT FTIF register at 0xFED30800]: 0x0000000000052000, Bit18:16 = 0x05
TPM Supported Bitmap 0x0002
TPM2.0 PS NV Index 0x01C10103: Not Defined, Not Written, Not Write-Protected
TPM2.0 AUX NV Index 0x01C10102: Not Defined, Not Written, Not Write-Protected
TPM2.0 PO NV Index 0x01C10106: Not Defined, Not Written, Not Write-Protected
TPM2.0 Provisioned? No
TPM2.0 Ownership Claimed? No
TPM Enabled Bitmap 0x0002, TPM Usage Bitmap 0x0004
[IA32_TME_CAPABILITY MSR 981h] = 0x000007F7 80000003
[IA32_TME_ACTIVATE MSR 982h] = 0x00000000 00000001
[IA32_TME_MTRRCAP MSR FEh] = 0x00000000 00007D0A
TME/MK-TME/TDX: Supported Bitmap 0xC000, Enabled Bitmap 0x0000
[IA32_FEATURE_CONTROL MSR 3Ah] = 0x00000000 00100004
SGX Supported Bitmap 0x1000
SGX Enabled Bitmap 0x0000
-> PFR Support Bitmap: 0x0000, PFR Enabled Bitmap: 0x0000
PFR State: 0x0000, Recovery Count: 0x00, Last Recovery Reason 0x00
Panic Event Count: 0x00, Last Panic Reason 0x00
[OOB] ExecuteOobOneTouchRequest() -> Non-Volatile Storage Supported? Yes
ME Non-Volatile Storage: Supported
EFI Non-Volatile Storage: Supported
Maximum size of OOB Non-Volatile Storage: 0x00008400 bytes
[OOB] ExecuteOobOneTouchRequest() -> Allocate Memory for NV Storage Data (Total 0x00021000 bytes): Success
[HECI Transport-1 DXE] Send pkt: 800B0023
00: 00 00 00 00 00 00 00 00 - 00 00 00
[HECI Transport-1 DXE] Got pkt: 80040023
00: 00 80 02 00
[SPS] ERROR: ME Storage Service operation status: 2
[OOB] ExecuteOobOneTouchRequest() -> Use Default Use-Case 0x01 (OOB NV Storage Data Not used)
[OOB] ExecuteOobOneTouchRequest() -> Input OOB Data to process: Size = 0x00000044 bytes
----------------------------------------------------------------------
Offset 00 01 02 03 04 05 06 07 08 09 0A 0B 0C 0D 0E 0F
----------------------------------------------------------------------
0000 24 4F 58 50 44 00 20 00 01 DB 01 FF 00 00 00 00
0010 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00
0020 02 24 00 00 80 7E F8 83 06 00 00 00 00 00 00 00
0030 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00
0040 00 00 00 00
----------------------------------------------------------------------
[OOB] ExecuteOobOneTouchRequest() -> Updated State 0x30100000, Fatal Error 0x00000000
[OOB] ExecuteOobOneTouchRequest() -> OOB Data after processing
OOB Data after processing (before updating Checksum, State): Size = 0x00000044 bytes
----------------------------------------------------------------------
Offset 00 01 02 03 04 05 06 07 08 09 0A 0B 0C 0D 0E 0F
----------------------------------------------------------------------
0000 24 4F 58 50 44 00 20 00 02 DB 81 00 03 00 02 D0
0010 02 00 00 00 00 00 03 00 04 00 00 00 00 00 00 00
0020 02 24 00 00 E8 7E F8 83 06 00 00 00 00 00 00 00
0030 00 00 00 00 00 7F 00 07 00 00 00 00 00 00 00 00
0040 00 00 00 00
----------------------------------------------------------------------
[OOB] ExecuteOobOneTouchRequest() -> Write OOB Data, if necessary
State Non-Zero OR OOB Data modified
OOB input data size <> 0 AND valid input signature: Generate OOB Output Data
[OOB] ExecuteOobOneTouchRequest() -> OOB Output Data Size = 0x00000044 bytes, State = 0x30107900
----------------------------------------------------------------------
Offset 00 01 02 03 04 05 06 07 08 09 0A 0B 0C 0D 0E 0F
----------------------------------------------------------------------
0000 50 58 4F 24 44 00 20 00 02 D4 81 00 03 00 02 D0
0010 02 00 00 79 10 30 03 00 04 00 00 00 00 00 00 00
0020 02 24 00 00 E8 7E F8 83 06 00 00 00 00 00 00 00
0030 00 00 00 00 00 7F 00 07 00 00 00 00 00 00 00 00
0040 00 00 00 00
----------------------------------------------------------------------
Write OOB Output Data ->
[HECI Transport-1 DXE] Send pkt: 804F0023
00: 01 00 00 00 00 00 00 00 - 00 00 00 50 58 4F 24 44
10: 00 20 00 02 D4 81 00 03 - 00 02 D0 02 00 00 79 10
20: 30 03 00 04 00 00 00 00 - 00 00 00 02 24 00 00 E8
30: 7E F8 83 06 00 00 00 00 - 00 00 00 00 00 00 00 00
40: 7F 00 07 00 00 00 00 00 - 00 00 00 00 00 00 00
[HECI Transport-1 DXE] Got pkt: 80040023
00: 01 80 00 00
[OOB] ExecuteOobOneTouchRequest() -> Updated State: 0x30107900, Fatal Error: 0x00000000
[OOB-SMBIOS] GenerateSmbiosStructuresOTA() { Generate OTA SMBIOS Structures
[OOB-SMBIOS] AddOemStructureOTA() { Add OEM Structure Type-168 (0xA8)
Allocate memory for OEM Structure: Success
Form OEM Structure
[OOB-SMBIOS] AddStringAndAdd2Smbios() { Add String and Add Structure to SMBIOS
[OOB-SMBIOS] Unicode2AsciizString() { Convert Unicode string to ASCIIZ String
[OOB-SMBIOS] Unicode2AsciizString() } Success, ASCIIZ String length (including NULL) = 0x0020
Add Formed Structure to other SMBIOS structures, Handle before adding 0xFFFE
Structure addition to SMBIOS: EFI Status 0x00000000, Handle after adding 0x0048 -> Success
******** Formed SMBIOS Structure Data, Length 0x50
----------------------------------------------------------------------
Offset 00 01 02 03 04 05 06 07 08 09 0A 0B 0C 0D 0E 0F
----------------------------------------------------------------------
0000 A8 2F 48 00 01 00 01 02 03 00 02 D0 02 00 04 00
0010 7E F8 83 06 00 00 00 00 00 00 00 00 00 00 00 00
0020 7F 00 07 00 00 00 00 00 00 00 00 00 00 00 00 4D
0030 65 6D 62 65 72 3A 20 4F 54 41 20 47 65 6E 65 72
0040 61 6C 20 49 6E 66 6F 72 6D 61 74 69 6F 6E 00 00
----------------------------------------------------------------------
[OOB-SMBIOS] AddStringAndAdd2Smbios() } Success, Handle of added Structure = 0x0048
[OOB-SMBIOS] AddOemStructureOTA() } Success
[OOB-SMBIOS] AddGroupAssociationStructureOTA() { Add Group Association Structure Type-14 (0x0E)
Allocate memory for Group Association Structure: Success
Form Group Association Structure
[OOB-SMBIOS] AddStringAndAdd2Smbios() { Add String and Add Structure to SMBIOS
[OOB-SMBIOS] Unicode2AsciizString() { Convert Unicode string to ASCIIZ String
[OOB-SMBIOS] Unicode2AsciizString() } Success, ASCIIZ String length (including NULL) = 0x0022
Add Formed Structure to other SMBIOS structures, Handle before adding 0xFFFE
Structure addition to SMBIOS: EFI Status 0x00000000, Handle after adding 0x0049 -> Success
******** Formed SMBIOS Structure Data, Length 0x2B
----------------------------------------------------------------------
Offset 00 01 02 03 04 05 06 07 08 09 0A 0B 0C 0D 0E 0F
----------------------------------------------------------------------
0000 0E 08 49 00 01 A8 48 00 47 72 6F 75 70 3A 20 4F
0010 6E 65 20 54 6F 75 63 68 20 41 63 74 69 76 61 74
0020 69 6F 6E 20 28 4F 54 41 29 00 00
----------------------------------------------------------------------
[OOB-SMBIOS] AddStringAndAdd2Smbios() } Success, Handle of added Structure = 0x0049
[OOB-SMBIOS] AddGroupAssociationStructureOTA() } Success
[OOB-SMBIOS] GenerateSmbiosStructuresOTA() } Success
[OOB] ExecuteOobOneTouchRequest() -> Clear, Deallocate Memory used for OOB Data
Clear Memory used for OOB Data
Deallocate Memory used for OOB Data
Clear, Deallocate Memory used for Platform Information
[OOB] ExecuteOobOneTouchRequest() -> No task to perform OR Reset not required for the performed task
[OOB] ExecuteOobOneTouchRequest() }
[OtaDxe.c] OtaEventHandler() }
Console redirection ENABLED
Console redirection ENABLED
PROGRESS CODE: V03050000 I0
NfitTableUpdateProtocol is not installed.
No Table for current platform
No Table for current platform
:INIT - BIOS_RESET_CPL: Set CPL3 on #S1 into BIOS_RESET_CPL_PCU_FUN1_REG
:PM - Successfully got ACK CPL3 on #S1
:INIT - BIOS_RESET_CPL: Set CPL4 on #S1 into BIOS_RESET_CPL_PCU_FUN1_REG
:PM - Successfully got ACK CPL4 on #S1
:INIT - BIOS_RESET_CPL: Set CPL3 on #S0 into BIOS_RESET_CPL_PCU_FUN1_REG
:PM - Successfully got ACK CPL3 on #S0
:INIT - BIOS_RESET_CPL: Set CPL4 on #S0 into BIOS_RESET_CPL_PCU_FUN1_REG
:PM - Successfully got ACK CPL4 on #S0
DXE PPM Config Complete
[HECI Transport-1 DXE] Send pkt: 80040007
00: 0A 05 00 00
[HECI Transport-1 DXE] Got pkt: 80040007
00: 0A 85 00 00
IioSecureOnEndOfDxe...
Lock the CXL.Arb-Mux secured register if there is any CXL port
Lock the CXL.Arb-Mux secured register if there is any CXL port
[IEH INIT] Init Socket:0x0
[Init Global IEH] on Skt:0x0
[Init Satallite IEH] on BitIdx:0x1
[Init Satallite IEH] S:0 B:0x0 D:0x14 F:0x4
[Init Satallite IEH] Device on BitIdx:0x3 doesn't exist
[Init Satallite IEH] Device on BitIdx:0x4 doesn't exist
[Init Satallite IEH] Device on BitIdx:0x5 doesn't exist
[Init Satallite IEH] Device on BitIdx:0x6 doesn't exist
[Init Satallite IEH] Device on BitIdx:0x7 doesn't exist
[Init Satallite IEH] Device on BitIdx:0x9 doesn't exist
[Init Satallite IEH] Device on BitIdx:0xB doesn't exist
[Init Satallite IEH] Device on BitIdx:0xC doesn't exist
[Init Satallite IEH] Device on BitIdx:0xD doesn't exist
[Init Satallite IEH] Device on BitIdx:0xE doesn't exist
[Init Satallite IEH] Device on BitIdx:0xF doesn't exist
[Init Satallite IEH] Device on BitIdx:0x10 doesn't exist
[Init Satallite IEH] Device on BitIdx:0x11 doesn't exist
[Init Satallite IEH] Device on BitIdx:0x12 doesn't exist
[Init Satallite IEH] Device on BitIdx:0x13 doesn't exist
[Init Satallite IEH] Device on BitIdx:0x17 doesn't exist
[Init Satallite IEH] Device on BitIdx:0x18 doesn't exist
[Init Satallite IEH] Device on BitIdx:0x19 doesn't exist
[Init Satallite IEH] Device on BitIdx:0x1D doesn't exist
Clear IEH Global Error Status before enabling IEH error...
[Init Satallite IEH] S:0 B:0x0 D:0x14 F:0x4 End
[Init Satallite IEH] on BitIdx:0x2
[Init Satallite IEH] S:0 B:0x6A D:0x0 F:0x4
PSF Dino PSF HCx Clear IEH Global Error Status before enabling IEH error...
[Init Satallite IEH] S:0 B:0x6A D:0x0 F:0x4 End
[Init Satallite IEH] on BitIdx:0x3
[Init Satallite IEH] S:0 B:0x0 D:0x0 F:0x4
PSF PCIE Pi5 PCIE GEN4 DMI Pi5 PCIE GEN5 IAL Pi5 (CXL) SPD I3C Bus SPD I3C Bus CXP SMBUS [Init Satallite IEH] Device on BitIdx:0x2 doesn't exist
[Init Satallite IEH] Device on BitIdx:0x3 doesn't exist
[Init Satallite IEH] Device on BitIdx:0x4 doesn't exist
[Init Satallite IEH] Device on BitIdx:0x5 doesn't exist
[Init Satallite IEH] Device on BitIdx:0x6 doesn't exist
[Init Satallite IEH] Device on BitIdx:0x7 doesn't exist
[Init Satallite IEH] Device on BitIdx:0x8 doesn't exist
[Init Satallite IEH] Device on BitIdx:0x9 doesn't exist
Clear IEH Global Error Status before enabling IEH error...
[Init Satallite IEH] S:0 B:0x0 D:0x0 F:0x4 End
[Init Satallite IEH] on BitIdx:0x4
[Init Satallite IEH] S:0 B:0x15 D:0x0 F:0x4
PSF PCIE Pi5 PCIE GEN4 DMI Pi5 PCIE GEN5 IAL Pi5 (CXL) [Init Satallite IEH] Device on BitIdx:0x2 doesn't exist
[Init Satallite IEH] Device on BitIdx:0x3 doesn't exist
[Init Satallite IEH] Device on BitIdx:0x4 doesn't exist
[Init Satallite IEH] Device on BitIdx:0x5 doesn't exist
[Init Satallite IEH] Device on BitIdx:0x6 doesn't exist
[Init Satallite IEH] Device on BitIdx:0x7 doesn't exist
[Init Satallite IEH] Device on BitIdx:0x8 doesn't exist
[Init Satallite IEH] Device on BitIdx:0x9 doesn't exist
Clear IEH Global Error Status before enabling IEH error...
[Init Satallite IEH] S:0 B:0x15 D:0x0 F:0x4 End
[Init Satallite IEH] on BitIdx:0x5
[Init Satallite IEH] S:0 B:0x6F D:0x0 F:0x4
PSF Dino PSF HCx Clear IEH Global Error Status before enabling IEH error...
[Init Satallite IEH] S:0 B:0x6F D:0x0 F:0x4 End
[Init Satallite IEH] on BitIdx:0x7
[Init Satallite IEH] S:0 B:0x59 D:0x0 F:0x4
PSF PCIE Pi5 PCIE GEN4 DMI Pi5 PCIE GEN5 IAL Pi5 (CXL) [Init Satallite IEH] Device on BitIdx:0x2 doesn't exist
[Init Satallite IEH] Device on BitIdx:0x3 doesn't exist
[Init Satallite IEH] Device on BitIdx:0x4 doesn't exist
[Init Satallite IEH] Device on BitIdx:0x5 doesn't exist
[Init Satallite IEH] Device on BitIdx:0x6 doesn't exist
[Init Satallite IEH] Device on BitIdx:0x7 doesn't exist
[Init Satallite IEH] Device on BitIdx:0x8 doesn't exist
[Init Satallite IEH] Device on BitIdx:0x9 doesn't exist
Clear IEH Global Error Status before enabling IEH error...
[Init Satallite IEH] S:0 B:0x59 D:0x0 F:0x4 End
[Init Satallite IEH] on BitIdx:0x8
[Init Satallite IEH] S:0 B:0x74 D:0x0 F:0x4
PSF Dino PSF HCx Clear IEH Global Error Status before enabling IEH error...
[Init Satallite IEH] S:0 B:0x74 D:0x0 F:0x4 End
[Init Satallite IEH] on BitIdx:0x9
[Init Satallite IEH] S:0 B:0x37 D:0x0 F:0x4
PSF PCIE Pi5 PCIE GEN4 DMI Pi5 PCIE GEN5 IAL Pi5 (CXL) [Init Satallite IEH] Device on BitIdx:0x2 doesn't exist
[Init Satallite IEH] Device on BitIdx:0x3 doesn't exist
[Init Satallite IEH] Device on BitIdx:0x4 doesn't exist
[Init Satallite IEH] Device on BitIdx:0x5 doesn't exist
[Init Satallite IEH] Device on BitIdx:0x6 doesn't exist
[Init Satallite IEH] Device on BitIdx:0x7 doesn't exist
[Init Satallite IEH] Device on BitIdx:0x8 doesn't exist
[Init Satallite IEH] Device on BitIdx:0x9 doesn't exist
Clear IEH Global Error Status before enabling IEH error...
[Init Satallite IEH] S:0 B:0x37 D:0x0 F:0x4 End
[Init Satallite IEH] on BitIdx:0xA
[Init Satallite IEH] S:0 B:0x26 D:0x0 F:0x4
PSF PCIE Pi5 PCIE GEN4 DMI Pi5 PCIE GEN5 IAL Pi5 (CXL) [Init Satallite IEH] Device on BitIdx:0x2 doesn't exist
[Init Satallite IEH] Device on BitIdx:0x3 doesn't exist
[Init Satallite IEH] Device on BitIdx:0x4 doesn't exist
[Init Satallite IEH] Device on BitIdx:0x5 doesn't exist
[Init Satallite IEH] Device on BitIdx:0x6 doesn't exist
[Init Satallite IEH] Device on BitIdx:0x7 doesn't exist
[Init Satallite IEH] Device on BitIdx:0x8 doesn't exist
[Init Satallite IEH] Device on BitIdx:0x9 doesn't exist
Clear IEH Global Error Status before enabling IEH error...
[Init Satallite IEH] S:0 B:0x26 D:0x0 F:0x4 End
[Init Satallite IEH] on BitIdx:0xB
[Init Satallite IEH] S:0 B:0x79 D:0x0 F:0x4
PSF Dino PSF HCx Clear IEH Global Error Status before enabling IEH error...
[Init Satallite IEH] S:0 B:0x79 D:0x0 F:0x4 End
[Init Satallite IEH] on BitIdx:0xD
[Init Satallite IEH] S:0 B:0x48 D:0x0 F:0x4
PSF PCIE Pi5 PCIE GEN4 DMI Pi5 PCIE GEN5 IAL Pi5 (CXL) [Init Satallite IEH] Device on BitIdx:0x2 doesn't exist
[Init Satallite IEH] Device on BitIdx:0x3 doesn't exist
[Init Satallite IEH] Device on BitIdx:0x4 doesn't exist
[Init Satallite IEH] Device on BitIdx:0x5 doesn't exist
[Init Satallite IEH] Device on BitIdx:0x6 doesn't exist
[Init Satallite IEH] Device on BitIdx:0x7 doesn't exist
[Init Satallite IEH] Device on BitIdx:0x8 doesn't exist
[Init Satallite IEH] Device on BitIdx:0x9 doesn't exist
Clear IEH Global Error Status before enabling IEH error...
[Init Satallite IEH] S:0 B:0x48 D:0x0 F:0x4 End
Clear IEH Global Error Status before enabling IEH errors
[IEH INIT] Init Socket:0x0 End
[IEH INIT] Init Socket:0x1
[Init Global IEH] on Skt:0x1
[Init Satallite IEH] on BitIdx:0x2
[Init Satallite IEH] S:1 B:0xE7 D:0x0 F:0x4
PSF Dino PSF HCx Clear IEH Global Error Status before enabling IEH error...
[Init Satallite IEH] S:1 B:0xE7 D:0x0 F:0x4 End
[Init Satallite IEH] on BitIdx:0x3
[Init Satallite IEH] S:1 B:0x80 D:0x0 F:0x4
PSF PCIE Pi5 PCIE GEN4 DMI Pi5 PCIE GEN5 IAL Pi5 (CXL) SPD I3C Bus SPD I3C Bus CXP SMBUS [Init Satallite IEH] Device on BitIdx:0x2 doesn't exist
[Init Satallite IEH] Device on BitIdx:0x3 doesn't exist
[Init Satallite IEH] Device on BitIdx:0x4 doesn't exist
[Init Satallite IEH] Device on BitIdx:0x5 doesn't exist
[Init Satallite IEH] Device on BitIdx:0x6 doesn't exist
[Init Satallite IEH] Device on BitIdx:0x7 doesn't exist
[Init Satallite IEH] Device on BitIdx:0x8 doesn't exist
[Init Satallite IEH] Device on BitIdx:0x9 doesn't exist
[Init Satallite IEH] Device on BitIdx:0xA doesn't exist
Clear IEH Global Error Status before enabling IEH error...
[Init Satallite IEH] S:1 B:0x80 D:0x0 F:0x4 End
[Init Satallite IEH] on BitIdx:0x4
[Init Satallite IEH] S:1 B:0x97 D:0x0 F:0x4
PSF PCIE Pi5 PCIE GEN4 DMI Pi5 PCIE GEN5 IAL Pi5 (CXL) [Init Satallite IEH] Device on BitIdx:0x2 doesn't exist
[Init Satallite IEH] Device on BitIdx:0x3 doesn't exist
[Init Satallite IEH] Device on BitIdx:0x4 doesn't exist
[Init Satallite IEH] Device on BitIdx:0x5 doesn't exist
[Init Satallite IEH] Device on BitIdx:0x6 doesn't exist
[Init Satallite IEH] Device on BitIdx:0x7 doesn't exist
[Init Satallite IEH] Device on BitIdx:0x8 doesn't exist
[Init Satallite IEH] Device on BitIdx:0x9 doesn't exist
Clear IEH Global Error Status before enabling IEH error...
[Init Satallite IEH] S:1 B:0x97 D:0x0 F:0x4 End
[Init Satallite IEH] on BitIdx:0x5
[Init Satallite IEH] S:1 B:0xEC D:0x0 F:0x4
PSF Dino PSF HCx Clear IEH Global Error Status before enabling IEH error...
[Init Satallite IEH] S:1 B:0xEC D:0x0 F:0x4 End
[Init Satallite IEH] on BitIdx:0x7
[Init Satallite IEH] S:1 B:0xD7 D:0x0 F:0x4
PSF PCIE Pi5 PCIE GEN4 DMI Pi5 PCIE GEN5 IAL Pi5 (CXL) [Init Satallite IEH] Device on BitIdx:0x2 doesn't exist
[Init Satallite IEH] Device on BitIdx:0x3 doesn't exist
[Init Satallite IEH] Device on BitIdx:0x4 doesn't exist
[Init Satallite IEH] Device on BitIdx:0x5 doesn't exist
[Init Satallite IEH] Device on BitIdx:0x6 doesn't exist
[Init Satallite IEH] Device on BitIdx:0x7 doesn't exist
[Init Satallite IEH] Device on BitIdx:0x8 doesn't exist
[Init Satallite IEH] Device on BitIdx:0x9 doesn't exist
Clear IEH Global Error Status before enabling IEH error...
[Init Satallite IEH] S:1 B:0xD7 D:0x0 F:0x4 End
[Init Satallite IEH] on BitIdx:0x8
[Init Satallite IEH] S:1 B:0xF1 D:0x0 F:0x4
PSF Dino PSF HCx Clear IEH Global Error Status before enabling IEH error...
[Init Satallite IEH] S:1 B:0xF1 D:0x0 F:0x4 End
[Init Satallite IEH] on BitIdx:0x9
[Init Satallite IEH] S:1 B:0xB7 D:0x0 F:0x4
PSF PCIE Pi5 PCIE GEN4 DMI Pi5 PCIE GEN5 IAL Pi5 (CXL) [Init Satallite IEH] Device on BitIdx:0x2 doesn't exist
[Init Satallite IEH] Device on BitIdx:0x3 doesn't exist
[Init Satallite IEH] Device on BitIdx:0x4 doesn't exist
[Init Satallite IEH] Device on BitIdx:0x5 doesn't exist
[Init Satallite IEH] Device on BitIdx:0x6 doesn't exist
[Init Satallite IEH] Device on BitIdx:0x7 doesn't exist
[Init Satallite IEH] Device on BitIdx:0x8 doesn't exist
[Init Satallite IEH] Device on BitIdx:0x9 doesn't exist
Clear IEH Global Error Status before enabling IEH error...
[Init Satallite IEH] S:1 B:0xB7 D:0x0 F:0x4 End
[Init Satallite IEH] on BitIdx:0xA
[Init Satallite IEH] S:1 B:0xA7 D:0x0 F:0x4
PSF PCIE Pi5 PCIE GEN4 DMI Pi5 PCIE GEN5 IAL Pi5 (CXL) [Init Satallite IEH] Device on BitIdx:0x2 doesn't exist
[Init Satallite IEH] Device on BitIdx:0x3 doesn't exist
[Init Satallite IEH] Device on BitIdx:0x4 doesn't exist
[Init Satallite IEH] Device on BitIdx:0x5 doesn't exist
[Init Satallite IEH] Device on BitIdx:0x6 doesn't exist
[Init Satallite IEH] Device on BitIdx:0x7 doesn't exist
[Init Satallite IEH] Device on BitIdx:0x8 doesn't exist
[Init Satallite IEH] Device on BitIdx:0x9 doesn't exist
Clear IEH Global Error Status before enabling IEH error...
[Init Satallite IEH] S:1 B:0xA7 D:0x0 F:0x4 End
[Init Satallite IEH] on BitIdx:0xB
[Init Satallite IEH] S:1 B:0xF6 D:0x0 F:0x4
PSF Dino PSF HCx Clear IEH Global Error Status before enabling IEH error...
[Init Satallite IEH] S:1 B:0xF6 D:0x0 F:0x4 End
[Init Satallite IEH] on BitIdx:0xD
[Init Satallite IEH] S:1 B:0xC7 D:0x0 F:0x4
PSF PCIE Pi5 PCIE GEN4 DMI Pi5 PCIE GEN5 IAL Pi5 (CXL) [Init Satallite IEH] Device on BitIdx:0x2 doesn't exist
[Init Satallite IEH] Device on BitIdx:0x3 doesn't exist
[Init Satallite IEH] Device on BitIdx:0x4 doesn't exist
[Init Satallite IEH] Device on BitIdx:0x5 doesn't exist
[Init Satallite IEH] Device on BitIdx:0x6 doesn't exist
[Init Satallite IEH] Device on BitIdx:0x7 doesn't exist
[Init Satallite IEH] Device on BitIdx:0x8 doesn't exist
[Init Satallite IEH] Device on BitIdx:0x9 doesn't exist
Clear IEH Global Error Status before enabling IEH error...
[Init Satallite IEH] S:1 B:0xC7 D:0x0 F:0x4 End
Clear IEH Global Error Status before enabling IEH errors
[IEH INIT] Init Socket:0x1 End
AddMicrocodeSmbiosTable: No valid Utility installed.
AddMicrocodeSmbiosTable: MicrocodeStagingRegion is 1.
AddMicrocodeSmbiosTable: UtilityStagingRegion is FFFF.
All AfterEndOfDxeEvent callbacks have returned successfully
PDB = c:\efi\servergen2\intel\Build\EagleStreamRpPkg\DEBUG_VS2015x86\X64\MdeModulePkg\Universal\Acpi\BootScriptExecutorDxe\BootScriptExecutorDxe\DEBUG\BootScriptExecutorDxe.pdb
[SIO] Current system SIO exist bit:10
IioSecureOnReadyToLock...
MSR_BIOS_DONE[0x151] 0x00000000 -> 0x00000003
PROGRESS CODE: V02010000 I0
PROGRESS CODE: V02010004 I0
PROGRESS CODE: V02010004 I0
PROGRESS CODE: V02010004 I0
[SGX] SgxAfterPlatformLocksCallback entry
[SGX] PrepareMcheckBiosParamInfo BEGIN
PopulateBiosParamInfoCreationPolicy: BiosParamInfoCreationPolicy = 0x0
Error: BiosParamInfoCreationPolicy is not initialized
[SGX] PrepareMcheckBiosParamInfo END
[SGX] UpdateRegistrationPackageInfo BEGIN
[SGX] UpdateRegistrationPackageInfo END
[SGX] StatusVariable: update ErrorCode from BIOS: 19
ExposeAllScenariosSgxRegistrationUefiVariables Enter
Expose variable [SgxRegistrationConfiguration]:
SetVariable: Success
ExposeToOsRuntime: 1
ReadOnlyOsRuntime: 0
ExposeAllScenariosSgxRegistrationUefiVariables: SgxRegistrationConfig->SgxRegServerInfo.Url = https://sbx.api.trustedservices.intel.com:443
RegistrationRequestType 0
Expose variable [SgxRegistrationServerRequest]:
SetVariable: Success
ExposeToOsRuntime: 1
ReadOnlyOsRuntime: 1
SgxRegistrationPackageInfo SHA256 sum:
[BB] [EC] [C9] [F0] [69] [34] [92] [3B] [63] [74] [71] [F4] [F7] [75] [C4] [BA] [B1] [BD] [29] [53] [56] [F9] [A1] [DE] [B7] [06] [65] [3B] [6D] [FF] [F7] [E7]
Expose variable [SgxRegistrationPackageInfo]:
SetVariable: Success
ExposeToOsRuntime: 0
ReadOnlyOsRuntime: 0
[SGX-DEBUG] Late PrintByteArrays SgxRegistrationStatus:
[01] [00] [03] [00] [02] [00] [19]
Expose variable [SgxRegistrationStatus]:
SetVariable: Success
ExposeToOsRuntime: 1
ReadOnlyOsRuntime: 0
Success to expose Registration Variables, exiting...
[SGX] SgxAfterPlatformLocksCallback exit: success
[SGX] DeallocateMcheckBiosParamInfo BEGIN
Verbose: BiosParamInfo already deallocated
[SGX] DeallocateMcheckBiosParamInfo END
PROGRESS CODE: V0300850B I0
PROGRESS CODE: V01050004 I0
PROGRESS CODE: V01050003 I0
PROGRESS CODE: V01050001 I0
PROGRESS CODE: V01040001 I0
PROGRESS CODE: V01050001 I0
PROGRESS CODE: V02020000 I0
PROGRESS CODE: V02020004 I0
PROGRESS CODE: V02020003 I0
TranslateBmpToGopBlt: BmpHeader->Char fields incorrect
PROGRESS CODE: V02020006 I0
UsbEnumerateNewDev: No device present at port 5
PROGRESS CODE: V02020000 I0
PROGRESS CODE: V02020006 I0
PROGRESS CODE: V02010000 I0
PROGRESS CODE: V02010004 I0
PROGRESS CODE: V02010004 I0
PROGRESS CODE: V02010004 I0
PROGRESS CODE: V02020000 I0
PROGRESS CODE: V02010004 I0
PROGRESS CODE: V02010004 I0
PROGRESS CODE: V02081000 I0
PROGRESS CODE: V02081003 I0
PROGRESS CODE: V01070004 I0
PROGRESS CODE: V02080000 I0
PROGRESS CODE: V02080003 I0
PROGRESS CODE: V02080004 I0
PROGRESS CODE: V02070000 I0
PROGRESS CODE: V02070003 I0
PROGRESS CODE: V01050004 I0
PROGRESS CODE: V01050004 I0
PROGRESS CODE: V01050003 I0
PROGRESS CODE: V01050001 I0
PROGRESS CODE: V01040001 I0
PROGRESS CODE: V01050001 I0
PROGRESS CODE: V02010000 I0
PROGRESS CODE: V02010004 I0
PROGRESS CODE: V02010004 I0
PROGRESS CODE: V02010004 I0
PROGRESS CODE: V02010000 I0
PROGRESS CODE: V02010004 I0
PROGRESS CODE: V02010004 I0
PROGRESS CODE: V02010004 I0
PROGRESS CODE: V02010000 I0
PROGRESS CODE: V02010004 I0
PROGRESS CODE: V02010004 I0
PROGRESS CODE: V02010004 I0
PROGRESS CODE: V02010000 I0
PROGRESS CODE: V02010004 I0
PROGRESS CODE: V02010004 I0
PROGRESS CODE: V02010004 I0
PROGRESS CODE: V02010000 I0
PROGRESS CODE: V02010004 I0
PROGRESS CODE: V02010004 I0
PROGRESS CODE: V02010004 I0
PROGRESS CODE: V02010000 I0
PROGRESS CODE: V02010004 I0
PROGRESS CODE: V02010004 I0
PROGRESS CODE: V02010004 I0
PROGRESS CODE: V02010000 I0
PROGRESS CODE: V02010004 I0
PROGRESS CODE: V02010004 I0
PROGRESS CODE: V02010004 I0
PROGRESS CODE: V02010000 I0
PROGRESS CODE: V02010004 I0
PROGRESS CODE: V02010004 I0
PROGRESS CODE: V02010004 I0
PROGRESS CODE: V02010000 I0
PROGRESS CODE: V02010004 I0
PROGRESS CODE: V02010004 I0
PROGRESS CODE: V02010004 I0
PROGRESS CODE: V02010000 I0
PROGRESS CODE: V02010004 I0
PROGRESS CODE: V02010004 I0
PROGRESS CODE: V02010004 I0
PROGRESS CODE: V02010000 I0
PROGRESS CODE: V02010004 I0
PROGRESS CODE: V02010004 I0
PROGRESS CODE: V02010004 I0
PROGRESS CODE: V02010000 I0
PROGRESS CODE: V02010004 I0
PROGRESS CODE: V02010004 I0
PROGRESS CODE: V02010004 I0
PROGRESS CODE: V02010000 I0
PROGRESS CODE: V02010004 I0
PROGRESS CODE: V02010004 I0
PROGRESS CODE: V02010004 I0
PROGRESS CODE: V02010000 I0
PROGRESS CODE: V02010004 I0
PROGRESS CODE: V02010004 I0
PROGRESS CODE: V02010004 I0
PROGRESS CODE: V02010000 I0
PROGRESS CODE: V02010004 I0
PROGRESS CODE: V02010004 I0
PROGRESS CODE: V02010004 I0
PROGRESS CODE: V02010000 I0
PROGRESS CODE: V02010004 I0
PROGRESS CODE: V02010004 I0
PROGRESS CODE: V02010004 I0
PROGRESS CODE: V02010000 I0
PROGRESS CODE: V02010004 I0
PROGRESS CODE: V02010004 I0
PROGRESS CODE: V02010004 I0
PROGRESS CODE: V02010000 I0
PROGRESS CODE: V02010004 I0
PROGRESS CODE: V02010004 I0
PROGRESS CODE: V02010004 I0
PROGRESS CODE: V02010000 I0
PROGRESS CODE: V02010004 I0
PROGRESS CODE: V02010004 I0
PROGRESS CODE: V02010004 I0
PROGRESS CODE: V02020000 I0
PROGRESS CODE: V02080000 I0
PROGRESS CODE: V02080003 I0
PROGRESS CODE: V02070000 I0
PROGRESS CODE: V02070003 I0
PROGRESS CODE: V01050004 I0
PROGRESS CODE: V01050004 I0
PROGRESS CODE: V01050004 I0
PROGRESS CODE: V01050004 I0
PROGRESS CODE: V01050004 I0
PROGRESS CODE: V01050004 I0
PROGRESS CODE: V01050004 I0
PDB = c:\efi\servergen2\intel\Build\EagleStreamRpPkg\DEBUG_VS2015x86\X64\ServerPlatformPkg\Features\Me\MeSps\Sps\PtuLoader\PtuLoader\DEBUG\PtuLoader.pdb
PROGRESS CODE: V03040002 I0
PROGRESS CODE: V03040003 I0
PDB = c:\efi\servergen2\intel\Build\EagleStreamRpPkg\DEBUG_VS2015x86\X64\ServerPlatformPkg\Features\Me\MeSps\Sps\Acpi\SpsAcpiHooks\DEBUG\SpsAcpiHooks.pdb
PROGRESS CODE: V03040002 I0
PROGRESS CODE: V03040003 I0
PROGRESS CODE: V02010000 I0
PROGRESS CODE: V02010004 I0
PROGRESS CODE: V02010004 I0
PROGRESS CODE: V02010004 I0
PROGRESS CODE: V02020000 I0
PROGRESS CODE: V02080000 I0
PROGRESS CODE: V02080003 I0
PROGRESS CODE: V02070000 I0
PROGRESS CODE: V02070003 I0
PROGRESS CODE: V01050004 I0
PROGRESS CODE: V01050004 I0
PROGRESS CODE: V02010000 I0
PROGRESS CODE: V02010004 I0
PROGRESS CODE: V02010004 I0
PROGRESS CODE: V02010004 I0
PROGRESS CODE: V02010000 I0
PROGRESS CODE: V02010004 I0
PROGRESS CODE: V02010004 I0
PROGRESS CODE: V02010004 I0
PROGRESS CODE: V02010000 I0
PROGRESS CODE: V02010004 I0
PROGRESS CODE: V02010004 I0
PROGRESS CODE: V02010004 I0
PROGRESS CODE: V02010000 I0
PROGRESS CODE: V02010004 I0
PROGRESS CODE: V02010004 I0
PROGRESS CODE: V02010004 I0
PROGRESS CODE: V02010000 I0
PROGRESS CODE: V02010004 I0
PROGRESS CODE: V02010004 I0
PROGRESS CODE: V02010004 I0
PROGRESS CODE: V02010000 I0
PROGRESS CODE: V02010004 I0
PROGRESS CODE: V02010004 I0
PROGRESS CODE: V02010004 I0
PROGRESS CODE: V02010000 I0
PROGRESS CODE: V02010004 I0
PROGRESS CODE: V02010004 I0
PROGRESS CODE: V02010004 I0
PROGRESS CODE: V02010000 I0
PROGRESS CODE: V02010004 I0
PROGRESS CODE: V02010004 I0
PROGRESS CODE: V02010004 I0
PROGRESS CODE: V02010000 I0
PROGRESS CODE: V02010004 I0
PROGRESS CODE: V02010004 I0
PROGRESS CODE: V02010004 I0
PROGRESS CODE: V02010000 I0
PROGRESS CODE: V02010004 I0
PROGRESS CODE: V02010004 I0
PROGRESS CODE: V02010004 I0
PROGRESS CODE: V02010000 I0
PROGRESS CODE: V02010004 I0
PROGRESS CODE: V02010004 I0
PROGRESS CODE: V02010004 I0
PROGRESS CODE: V02010000 I0
PROGRESS CODE: V02010004 I0
PROGRESS CODE: V02010004 I0
PROGRESS CODE: V02010004 I0
PROGRESS CODE: V02010000 I0
PROGRESS CODE: V02010004 I0
PROGRESS CODE: V02010004 I0
PROGRESS CODE: V02010004 I0
PROGRESS CODE: V02010000 I0
PROGRESS CODE: V02010004 I0
PROGRESS CODE: V02010004 I0
PROGRESS CODE: V02010004 I0
PROGRESS CODE: V02010000 I0
PROGRESS CODE: V02010004 I0
PROGRESS CODE: V02010004 I0
PROGRESS CODE: V02010004 I0
PROGRESS CODE: V02010000 I0
PROGRESS CODE: V02010004 I0
PROGRESS CODE: V02010004 I0
PROGRESS CODE: V02010004 I0
PROGRESS CODE: V02010000 I0
PROGRESS CODE: V02010004 I0
PROGRESS CODE: V02010004 I0
PROGRESS CODE: V02010004 I0
PROGRESS CODE: V02010000 I0
PROGRESS CODE: V02010004 I0
PROGRESS CODE: V02010004 I0
PROGRESS CODE: V02010004 I0
PROGRESS CODE: V02010000 I0
PROGRESS CODE: V02010004 I0
PROGRESS CODE: V02010004 I0
PROGRESS CODE: V02010004 I0
PROGRESS CODE: V02020000 I0
PROGRESS CODE: V02080000 I0
PROGRESS CODE: V02080003 I0
PROGRESS CODE: V02070000 I0
PROGRESS CODE: V02070003 I0
PROGRESS CODE: V01050004 I0
PROGRESS CODE: V01050004 I0
PROGRESS CODE: V01050004 I0
PROGRESS CODE: V01050004 I0
PROGRESS CODE: V01050004 I0
PROGRESS CODE: V01050004 I0
PROGRESS CODE: V01050004 I0
PROGRESS CODE: V01050004 I0
PROGRESS CODE: V02020000 I0
Press [Enter] to directly boot.
Press [F2] to enter setup and select boot options.
Press [F7] to show boot menu options.
Copyright (c) 2006-2022, Intel Corporation.
S0 S3M_S3MFW_CFR_SVN_N0_S3M_TREG_REG : 00000000
S0 S3M_S3MFW_REVID_N0_S3M_TREG_REG : 00000000
S0 S3M_S3MFW_CFR_SVN_N1_S3M_TREG_REG : 00010001
S0 S3M_S3MFW_REVID_N1_S3M_TREG_REG : 0000001E
S0 S3M_PUCODE_CFR_SVN_N0_S3M_TREG_REG: 00000000
S0 S3M_PUCODE_REVID_N0_S3M_TREG_REG : 00000000
S0 S3M_PUCODE_CFR_SVN_N1_S3M_TREG_REG: 00010001
S0 S3M_PUCODE_REVID_N1_S3M_TREG_REG : 130000C0
S1 S3M_S3MFW_CFR_SVN_N0_S3M_TREG_REG : 00000000
S1 S3M_S3MFW_REVID_N0_S3M_TREG_REG : 00000000
S1 S3M_S3MFW_CFR_SVN_N1_S3M_TREG_REG : 00010001
S1 S3M_S3MFW_REVID_N1_S3M_TREG_REG : 0000001E
S1 S3M_PUCODE_CFR_SVN_N0_S3M_TREG_REG: 00000000
S1 S3M_PUCODE_REVID_N0_S3M_TREG_REG : 00000000
S1 S3M_PUCODE_CFR_SVN_N1_S3M_TREG_REG: 00010001
S1 S3M_PUCODE_REVID_N1_S3M_TREG_REG : 130000C0
SocketIioConfigPtr->IioHcxType 0.0= 0
SocketIioConfigPtr->IioHcxType 0.1= 0
SocketIioConfigPtr->IioHcxType 0.2= 0
SocketIioConfigPtr->IioHcxType 0.3= 0
SocketIioConfigPtr->IioHcxType 0.4= 0
SocketIioConfigPtr->IioHcxType 0.5= 0
SocketIioConfigPtr->IioHcxType 0.6= 0
SocketIioConfigPtr->IioHcxType 0.7= 0
SocketIioConfigPtr->IioHcxType 0.8= 0
SocketIioConfigPtr->IioHcxType 0.9= 0
SocketIioConfigPtr->IioHcxType 0.A= 0
SocketIioConfigPtr->IioHcxType 0.B= 0
SocketIioConfigPtr->IioHcxType 1.0= 0
SocketIioConfigPtr->IioHcxType 1.1= 0
SocketIioConfigPtr->IioHcxType 1.2= 0
SocketIioConfigPtr->IioHcxType 1.3= 0
SocketIioConfigPtr->IioHcxType 1.4= 0
SocketIioConfigPtr->IioHcxType 1.5= 0
SocketIioConfigPtr->IioHcxType 1.6= 0
SocketIioConfigPtr->IioHcxType 1.7= 0
SocketIioConfigPtr->IioHcxType 1.8= 0
SocketIioConfigPtr->IioHcxType 1.9= 0
SocketIioConfigPtr->IioHcxType 1.A= 0
SocketIioConfigPtr->IioHcxType 1.B= 0
SocketIioConfigPtr->IioHcxType 2.0= 0
SocketIioConfigPtr->IioHcxType 2.1= 0
SocketIioConfigPtr->IioHcxType 2.2= 0
SocketIioConfigPtr->IioHcxType 2.3= 0
SocketIioConfigPtr->IioHcxType 2.4= 0
SocketIioConfigPtr->IioHcxType 2.5= 0
SocketIioConfigPtr->IioHcxType 2.6= 0
SocketIioConfigPtr->IioHcxType 2.7= 0
SocketIioConfigPtr->IioHcxType 2.8= 0
SocketIioConfigPtr->IioHcxType 2.9= 0
SocketIioConfigPtr->IioHcxType 2.A= 0
SocketIioConfigPtr->IioHcxType 2.B= 0
SocketIioConfigPtr->IioHcxType 3.0= 0
SocketIioConfigPtr->IioHcxType 3.1= 0
SocketIioConfigPtr->IioHcxType 3.2= 0
SocketIioConfigPtr->IioHcxType 3.3= 0
SocketIioConfigPtr->IioHcxType 3.4= 0
SocketIioConfigPtr->IioHcxType 3.5= 0
SocketIioConfigPtr->IioHcxType 3.6= 0
SocketIioConfigPtr->IioHcxType 3.7= 0
SocketIioConfigPtr->IioHcxType 3.8= 0
SocketIioConfigPtr->IioHcxType 3.9= 0
SocketIioConfigPtr->IioHcxType 3.A= 0
SocketIioConfigPtr->IioHcxType 3.B= 0
PROGRESS CODE: V03051007 I0
DebugModeIndicator = 1
InitData -> Protocol not found
CheckpointSend 0x09? No
-> Ready To Boot: Pause Resume Complete = 0x00 0x00 0x00
[HECI Transport-1 DXE] Send pkt: 80040007
00: FF 0C 00 00
[HECI Transport-1 DXE] Got pkt: 80080007
00: FF 8C 00 00 00 00 00 00
IioSecureOnOnReadyToBoot...
IOAT_INIT_READY_TO_BOOT_START
IOAT_INIT_READY_TO_BOOT_END
IOAT_INIT_READY_TO_BOOT_START
IOAT_INIT_READY_TO_BOOT_END
SmmInstallProtocolInterface: 6E057ECF-FA99-4F39-95BC-59F9921D17E4 0
[HECI Transport-1 DXE] Send pkt: 80040007
00: FF 02 00 00
[HECI Transport-1 DXE] Got pkt: 80140007
00: FF 82 00 00 00 00 06 18 - 00 01 03 00 00 00 06 18
10: 00 01 03 00
TPM Location configured (expected values: dTPM = 0x5 = 0x5
Value at TPM Base Address (0xFED40000) = 0xA1
HierarchyChangeAuth: Response Code error! 0x000009A2
PROGRESS CODE: V03051001 I0
PROGRESS CODE: V03058000 I0
PDB = bootmgfw.pdb
PROGRESS CODE: V03058001 I0
PROGRESS CODE: V01040001 I0
PROGRESS CODE: V01050001 I0
PROGRESS CODE: V01010001 I0
PROGRESS CODE: V01011000 I0
IioSecureOnExitBootServices...
SmmInstallProtocolInterface: 296EB418-C4C8-4E05-AB59-39E8AF56F00A 0
EnablePatrolScrubatEndofPostCallback Exit
PROGRESS CODE: V03101019 I0
ÿPROGRESS CODE: V03020003 I0
PROGRESS CODE: V03020002 I0
PROGRESS CODE: V03020003 I0
PROGRESS CODE: V03020002 I0
PROGRESS CODE: V03020003 I0
PROGRESS CODE: V03020002 I0
PROGRESS CODE: V03020003 I0
PROGRESS CODE: V03020002 I0
[IPMI PEI] BMC Device ID: 0x23, firmware version: 2.03 UpdateMode:1
[IPMI] BMC in Forced Update mode, skip waiting for BMC_READY.
PROGRESS CODE: V03020003 I0
PROGRESS CODE: V03020002 I0
PROGRESS CODE: V03020003 I0
PROGRESS CODE: V03020002 I0
InstallHeciTransportPpis, start
InstallHeciTransportPpis, end
[HECI CONTROL PEI] HECI Transport found: 2
[HECI Control-1 PEI]: ERROR: HeciControlSendAndReceiveSinglePch() : Heci 1 is not initialized
HECI: ME type not recognized (MEFS1: 0x00000355, MEFS2: 0x80502006)
Initialization is allowed
[HECI Transport-1 PEI] Send pkt: 80040007
00: F0 11 00 00
[HECI Transport-1 PEI] Got pkt: 80080007
00: F0 91 00 00 09 00 00 00
HECI: Create MeType HOB for ME: 1
HECI: Set MeType HOB info to: 1
[HECI] [ME] (MeType is ME_TYPE_SPS)
Initialization is allowed
PROGRESS CODE: V03020003 I0
PROGRESS CODE: V03020002 I0
PROGRESS CODE: V03020003 I0
PROGRESS CODE: V03020002 I0
IioVmdDisableForPchRpInit: DonePCH Series : EBG PCH
PCH Stepping : B0
PROGRESS CODE: V03020003 I0
PROGRESS CODE: V03020002 I0
PROGRESS CODE: V03020003 I0
PROGRESS CODE: V03020002 I0
PROGRESS CODE: V03020003 I0
PROGRESS CODE: V03020002 I0
UbaInitPeim: PlatformType=0x16
UbaInitPeim: PlatformType=0x16
UbaInitPeim: PlatformType=0x16
UbaInitPeim: PlatformType=0x16
PROGRESS CODE: V03020003 I0
PROGRESS CODE: V03020002 I0
PROGRESS CODE: V03020003 I0
PROGRESS CODE: V03020002 I0
UBA:GpioTable size 0x9CC, blocks: 0xD1.
UBA: Start ConfigureGpio().
UBA: ConfigureGpio() end.
Unable to read FlashSecOvrdVal
FiaMuxRecordsCount = 0
[HECI] PeiMeServerPolicy (MeType is ME_TYPE_SPS)
Can't finde more CFR image in CFR FV - Not Found!
PPR Variable not found or CRC mismatch - Status: 0x8000000E, Crc: 0x0, calc. Crc: 0x0!
UpdatePeiSecurityPolicy: Create Status=Success
FIT not found, skip LT-SX
Platform Type = 22
Bios ID: EGSDCRB1.ZHI.0091.D15.2211010657
PROGRESS CODE: V03020003 I0
[HECI Transport-1 PEI] Send pkt: 80010020
00: 01
[HECI Transport-1 PEI] Got pkt: 800B0020
00: 81 01 01 14 00 88 00 01 - 00 00 00
[HECI Transport-1 PEI] Send pkt: 80300008
00: 00 00 05 00 1A 00 00 00 - 00 00 00 00 1C 00 00 00
10: 00 00 00 00 00 00 00 00 - 00 00 00 00 00 00 00 00
20: 00 00 00 00 00 00 00 00 - 00 00 00 00 00 00 00 00
[HECI Transport-1 PEI] Got pkt: 80300008
00: 00 00 05 00 1A 00 00 00 - 00 00 00 00 1C 00 00 00
10: 00 00 00 00 00 00 00 02 - 00 00 00 00 00 00 00 00
20: 00 00 00 00 00 00 00 00 - 00 00 00 00 00 00 00 00
Fail to Configure PSYS_CRIT
PROGRESS CODE: V03020002 I0
PROGRESS CODE: V03020003 I0
PROGRESS CODE: V03020002 I0
PROGRESS CODE: V03020003 I0
PROGRESS CODE: V03020002 I0
PROGRESS CODE: V03020003 I0
PROGRESS CODE: V03020002 I0
PROGRESS CODE: V03020003 I0
PROGRESS CODE: V03020002 I0
LtStatusRegister[0xFED30000] = 0x0000000000000003
LtExtendedStatusError[0xFED30008] = 0x0000000000000000
BootGuardBootStatus[0xFED300A0] = 0x0000000000000000
BootGuardAcmError[0xFED30328] = 0x0000000000000000
BootGuardLtExists[0xFED30010] = 0x0000000000000000
BootGuardLtCrash[0xFED30030] = 0x0000000000000000
MSR_DEBUG_INTERFACE[0x00000C80] = 0x0000000080000001
MSR_BOOT_GUARD_SACM_INFO[0x0000013A] = 0x0000000C00000000
AcmPolicyStatus = 0x0, IsTxtFailedWithScrtm 0
None of BtG/TXT is enabled or TXT failed with scrtm.
PROGRESS CODE: V03020003 I0
PROGRESS CODE: V03020002 I0
PROGRESS CODE: V03020003 I0
PROGRESS CODE: V03020002 I0
InitializeDefaultData()
[Enter] Initialize Reference Code Policy!
>>> Print the default settings of Reference Code Policy! Begin >>>
ReferenceCodePolicyPtr->NumaEn = 1
ReferenceCodePolicyPtr->UmaBasedClustering = 0
<<< Print the default settings of Reference Code Policy! End <<<
[Exit] Initialize Reference Code Policy!
SBSP socket = 0
InitializePlatformData()
InstallPpi MrcHooksServicesPpiDesc Status = 00000000
CacheMrcHooksServicesPpi in HOST: Host->MrcHooksServicesPpi = FFEA57C0
InstallPpi MrcHooksChipServicesPpiDesc Status = 00000000
CacheMrcChipHooksServicesPpi in HOST: Host->MrcHooksChipServicesPpi = FFEA5820
PROGRESS CODE: V030F100B I0
LoadNvramData: LoadSysInfoNvram failed, Status = Not Found
[HECI Transport-1 PEI] Send pkt: 80100007
00: F0 0C 00 00 DF FF FF FF - FF FF FF FF 00 00 00 00
[HECI Transport-1 PEI] Got pkt: 80100007
00: F0 8C 00 00 00 00 00 00 - 00 00 00 00 00 00 00 00
MeUmaConfigureRequestedSegmentSize: Exiting (Status = Success)
GetEmulationMemFlows: Simics $mrc value = 0
memFlows = 0xFFFFFFFF, memFlowsExt = 0xFFBF7FFF, memFlowsExt2 = 0xBF9E1F7F, memFlowsExt3 = 0xFFFFFFFF
Emulation Value is: 0!
Running on hardware
SPR processor detected
Warning: Newer CPU Stepping 4 detected
RC Version: 1.1.1.01BC
sizeof sysHost = 363776
SsaLoader - Entry
SsaLoader - Exit
KTI Init starting...
******* KTI Setup Structure *******
Bus Ratio (per socket): S0: 1 S1: 1 S2: 1 S3: 1
D2KCreditConfig: 0 [1:Low,2:Med,3:High]
SnoopThrottleConfig: 0 [0:Dis,1:Low,2:Med,3:High,4:Auto]
LegacyVgaSoc: 0
LegacyVgaStack: 0
P2pRelaxedOrdering: 0
DebugPrintLevel: 15
DegradePrecedence: 0
Degrade4SPreference: 0 (4SFullyConnect)
KtiLinkSpeedMode: 1 (FAST)
DfxWarmResetEliminationEn: 0
KtiLinkSpeed: 127 (MAX_SUPPORTED)
KtiAdaptationEn: 2 (UNKNOWN)
KtiAdaptationSpeed: 127 (MAX_SUPPORTED)
KtiLinkL0pEn: 2 (AUTO)
KtiLinkL1En: 2 (AUTO)
KtiFailoverEn: 2 (AUTO)
KtiLbEn: 0
SncEn: 15 (AUTO)
IoDcMode: 1 (AUTO)
DirectoryModeEn: 2
XptPrefetchEn: 2
KtiPrefetchEn: 2
XptRemotePrefetchEn: 2
RdCurForXptPrefetchEn: 2
StaleAtoSOptEn: 2
LLCDeadLineAlloc: 1
OppoLLC2SfMigrationEn: 0 (MANUAL)
MbeBWCalChoice: 3 [0:Linear,1:Biased,2:Legacy,3:Auto]
PmmMbaBWDownscale: 0 [0:1x,1:1/2x,2:1/4x,3:1/8x]
CxlMbaBWDownscale: 0 [0:1x,1:1/2x,2:1/4x,3:1/8x]
RemoteTargetMbaBWDownscale 0 [0:1x,1:1/2x,2:1/4x,3:1/8x]
SplitLock: 0
DdrtQosMode: 0
ClockModulationEn: 2 (AUTO)
KtiFpgaEnable (per socket): S0: 2 S1: 2 S2: 2 S3: 2
StackDisableBitMap (per socket): S0: 0x0 S1: 0x0 S2: 0x0 S3: 0x0
KtiCrcMode: 0 (16BIT)
KtiCpuSktHotPlugEn: 0
KtiCpuSktHotPlugTopology: 0 (4S)
KtiSkuMismatchCheck: 1
MctpBusOwner: 0 (PCH SPS as Bus Owner (Proxy))
KtiPortDisable (per port):
S0:0 0 0 0
S1:0 0 0 0
S2:0 0 0 0
S3:0 0 0 0
KtiLinkVnaOverride (per port):
S0:254 254 254 254
S1:254 254 254 254
S2:254 254 254 254
S3:254 254 254 254
KtiLinkSpeed (per port):
S0:7 7 7 7
S1:7 7 7 7
S2:7 7 7 7
S3:7 7 7 7
Rsvd (per port):
S0:0 0 0 0
S1:0 0 0 0
S2:0 0 0 0
S3:0 0 0 0
**KTI Setup Structure DfxParms **
DfxHaltLinkFailReset: 2 (AUTO)
DfxKtiMaxInitAbort: 2 (AUTO)
DfxLlcShareDrdCrd 2 (AUTO)
DfxBiasFwdMode: 5 (AUTO)
DfxSnoopFanoutEn: 2 (AUTO)
DfxHitMeEn: 2 (AUTO)
DfxFrcfwdinv 2 (AUTO)
DfxDbpEnable 2 (AUTO)
DfxCleanEvictAlwaysLive: 2 (AUTO)
DfxModifiedEvictAlwaysLive: 2 (AUTO)
DfxOsbEn 2 (AUTO)
DfxHitMeRfoDirsEn 2 (AUTO)
DfxGateOsbIodcAllocEn 2 (AUTO)
DfxDualLinksInterleavingMode 2 (AUTO)
DfxSystemDegradeMode: 1
DfxVn1En: 2 (AUTO)
DfxD2cEn: 2 (AUTO)
DfxD2kEn: 2 (AUTO)
DfxLockPrimary: 4 (AUTO)
DfxOsbLocRd: 2 (AUTO)
DfxOsbLocRdCur: 2 (AUTO)
DfxOsbRmtRd: 2 (AUTO)
DfxM3KtiCountMismatchEn: 2 (AUTO)
DfxSnoopFanoutChaInterleaveEn: 2 (AUTO)
DfxXptFifoEnabledCredit: 0x5
DfxMdfisTrainingEn: 2 (AUTO)
DfxClippedFreq: 23
DfxLlpEndcntClipped: 650
DfxLlpEndcntNonClipped: 576
DfxCxlSecLvl: 3 (AUTO)
DfxCxlStcge: 2 (AUTO)
DfxCxlSdcge: 2 (AUTO)
DfxCxlDlcge: 2 (AUTO)
DfxCxlLtcge: 2 (AUTO)
DfxCxlVid: 2 (AUTO)
DfxIioDfxEnabled: 0 (MANUAL)
DfxHqmEn: 2 (AUTO)
DfxRsfEnabledForDram: 2 (AUTO)
DfxS3mSoftStrap: 2 (AUTO)
DfxPmonConfig: 3 (AUTO)
DfxM2IosfPmonAccessControl: 2 (AUTO)
DfxMaxCache: 256 (AUTO)
DfxMaxCacheAtomic: 256 (AUTO)
DfxCtagEntryAvailMask: 256 (AUTO)
DfxXptPrefetchEn: 2 (AUTO)
DfxPrqBlockEn: 2 (AUTO)
DfxAeg0CounterLowVal: 65535 (AUTO)
DfxAeg0CounterHighVal: 65535 (AUTO)
DfxCrcMode (per port):
S0:2 (AUTO) 2 (AUTO) 2 (AUTO) 2 (AUTO)
S1:2 (AUTO) 2 (AUTO) 2 (AUTO) 2 (AUTO)
S2:2 (AUTO) 2 (AUTO) 2 (AUTO) 2 (AUTO)
S3:2 (AUTO) 2 (AUTO) 2 (AUTO) 2 (AUTO)
DfxL0pEnable (per port):
S0:2 (AUTO) 2 (AUTO) 2 (AUTO) 2 (AUTO)
S1:2 (AUTO) 2 (AUTO) 2 (AUTO) 2 (AUTO)
S2:2 (AUTO) 2 (AUTO) 2 (AUTO) 2 (AUTO)
S3:2 (AUTO) 2 (AUTO) 2 (AUTO) 2 (AUTO)
DfxL1Enable (per port):
S0:2 (AUTO) 2 (AUTO) 2 (AUTO) 2 (AUTO)
S1:2 (AUTO) 2 (AUTO) 2 (AUTO) 2 (AUTO)
S2:2 (AUTO) 2 (AUTO) 2 (AUTO) 2 (AUTO)
S3:2 (AUTO) 2 (AUTO) 2 (AUTO) 2 (AUTO)
DfxKtiFailoverEn (per port):
S0:2 (AUTO) 2 (AUTO) 2 (AUTO) 2 (AUTO)
S1:2 (AUTO) 2 (AUTO) 2 (AUTO) 2 (AUTO)
S2:2 (AUTO) 2 (AUTO) 2 (AUTO) 2 (AUTO)
S3:2 (AUTO) 2 (AUTO) 2 (AUTO) 2 (AUTO)
**Common Setup Structure**
mmCfgBase: 6 (AUTO)
mmCfgSize: 6 (AUTO)
mmiohBase: 0x00002000
CpuPaLimit: 0
mmiohSize: 3 (64GB per stack)
numaEn: 1
UmaClustering: 4
isocEn: 0
dcaEn: 0
**Common Var Structure **
resetRequired: 0
state: 0
numCpus: 0
socketPresentBitMap: 0x01
mmCfgBase: 0x80000000
meRequestedSize: 0
******* Collecting Early System Information - START *******
SBSP Socket: 0 Ways: 0x01 Ras: 0x06 Stepping: 0x04 DieCount: 4 Chop: XCC
Total Chas: 52 Cha List Map:
Cha List[0]: 0xBFCFF9FF
Cha List[1]: 0x0FEBFBFF
Total M3Kti: 04 Total KtiAgent: 04 Total M2M: 20 M2M list map: 0x000FFFFF
Current bus numbers:
Socket | Ins00 | Ins01 | Ins02 | Ins03 | Ins04 | Ins05 | Ins06 | Ins07 | Ins08 | Ins09 | Ins0A | Ins0B | Rsvd | Ubox0 | Ubox1 | LastBus | Seg
-----------------------------------------------------------------------------------------------------------------------------------------------
0 | 0x00 | 0x11 | 0x12 | 0x13 | 0x14 | 0x15 | 0x16 | 0x17 | 0x18 | 0x19 | 0x1A | 0x1B | --- | 0x1E | 0x1F | 0x1F | 0
1 | 0x20 | 0x21 | 0x22 | 0x23 | 0x24 | 0x25 | 0x26 | 0x27 | 0x28 | 0x29 | 0x2A | 0x2B | --- | 0x3E | 0x3F | 0x3F | 0
2 | 0x40 | 0x41 | 0x42 | 0x43 | 0x44 | 0x45 | 0x46 | 0x47 | 0x48 | 0x49 | 0x4A | 0x4B | --- | 0x5E | 0x5F | 0x5F | 0
3 | 0x60 | 0x61 | 0x62 | 0x63 | 0x64 | 0x65 | 0x66 | 0x67 | 0x68 | 0x69 | 0x6A | 0x6B | --- | 0x7E | 0x7F | 0x7F | 0
-----------------------------------------------------------------------------------------------------------------------------------------------
Assuming maximal config: TotCpus: 4 CpuList: 0x0F
Default UpiInterleaveMode: 0
Reset Type: Cold Reset
******* Collecting Early System Information - END *******
(Spr) UpiIpWrInit
MaxSocket 4, MaxKtiPort 4
UpiIpWrSingleInit
IpUpiIpInit(UpiAgent[0][0]):
UpiIpWrSingleInit
IpUpiIpInit(UpiAgent[0][1]):
UpiIpWrSingleInit
IpUpiIpInit(UpiAgent[0][2]):
UpiIpWrSingleInit
IpUpiIpInit(UpiAgent[0][3]):
UpiIpWrSingleInit
IpUpiIpInit(UpiAgent[1][0]):
UpiIpWrSingleInit
IpUpiIpInit(UpiAgent[1][1]):
UpiIpWrSingleInit
IpUpiIpInit(UpiAgent[1][2]):
UpiIpWrSingleInit
IpUpiIpInit(UpiAgent[1][3]):
UpiIpWrSingleInit
IpUpiIpInit(UpiAgent[2][0]):
UpiIpWrSingleInit
IpUpiIpInit(UpiAgent[2][1]):
UpiIpWrSingleInit
IpUpiIpInit(UpiAgent[2][2]):
UpiIpWrSingleInit
IpUpiIpInit(UpiAgent[2][3]):
UpiIpWrSingleInit
IpUpiIpInit(UpiAgent[3][0]):
UpiIpWrSingleInit
IpUpiIpInit(UpiAgent[3][1]):
UpiIpWrSingleInit
IpUpiIpInit(UpiAgent[3][2]):
UpiIpWrSingleInit
IpUpiIpInit(UpiAgent[3][3]):
******* Setting up Minimum Path - START *******
Constructing SBSP minimum path Topology Tree
--------------------------------------------
Adding SBSP (CPU0) to the tree
CPU0 Link Exchange
: LEP0(0,CPU1) Socket 0 Port 0:Primary - Peer Socket 1 Port 0 Secondary
: LEP1(1,CPU1) Socket 0 Port 1:Primary - Peer Socket 1 Port 1 Secondary
: LEP2(2,CPU1) Socket 0 Port 2:Primary - Peer Socket 1 Port 2 Secondary
: LEP3(3,CPU1) Socket 0 Port 3:Primary - Peer Socket 1 Port 3 Secondary
Adding CPU1 to the tree
Setting path between SBSP and CPU1.
In SBSP setting route to CPU1 using port 0.
In CPU1 using port 0 to set the M2UPCIe0 route.
CPU1 Link Exchange
: LEP0(0,CPU0) : LEP1(1,CPU0) : LEP2(2,CPU0) : LEP3(3,CPU0)
Setting boot path for CPU1
In CPU1 setting Cbo route to port 0
Socket[2] is removed
Socket[3] is removed
SBSP Minimum Path Tree
----------------------
Index Socket ParentPort Hop ParentIndex
00 CPU0 -- 0 --
01 CPU1 00 1 00
******* Setting up Minimum Path - END *******
******* Check for KTI Topology Degradation - START *******
Link Exchange Parameter
-----------------------
CPU0 : LEP0(0:CPU1) : LEP1(1:CPU1) : LEP2(2:CPU1) : LEP3(3:CPU1)
CPU1 : LEP0(0:CPU0) : LEP1(1:CPU0) : LEP2(2:CPU0) : LEP3(3:CPU0)
Already Reduced to Supported Topology
System will be treated 2S4L Configuration
******* Check for KTI Topology Degradation - END *******
******* Enable UBOX MMIO Addr Range - START *******
Current Bars:
Socket | SCF | PCU | MEM0 | MEM1 | MEM2 | MEM3 | MEM4 | MEM5 | MEM6 | MEM7 | SBREG |
-------------------------------------------------------------------------------------------------------------------------------------------------------
0 | 0xF8000000 | 0xF8200000 | 0xF8280000 | 0xF8300000 | 0xF8380000 | 0xF8400000 | 0xF8480000 | 0xF8500000 | 0xF8580000 | 0xF8600000 | 0xF8680000 |
1 | 0xF8800000 | 0xF8A00000 | 0xF8A80000 | 0xF8B00000 | 0xF8B80000 | 0xF8C00000 | 0xF8C80000 | 0xF8D00000 | 0xF8D80000 | 0xF8E00000 | 0xF8E80000 |
2 | 0xF9000000 | 0xF9200000 | 0xF9280000 | 0xF9300000 | 0xF9380000 | 0xF9400000 | 0xF9480000 | 0xF9500000 | 0xF9580000 | 0xF9600000 | 0xF9680000 |
3 | 0xF9800000 | 0xF9A00000 | 0xF9A80000 | 0xF9B00000 | 0xF9B80000 | 0xF9C00000 | 0xF9C80000 | 0xF9D00000 | 0xF9D80000 | 0xF9E00000 | 0xF9E80000 |
-------------------------------------------------------------------------------------------------------------------------------------------------------
******* Enable UBOX MMIO Addr Range - END *******
******* Process Straps Config - START *******
S3M Read SoftStrap Disabled, Exit.
******* Process Straps Config - END *******
******* Detecting IIO count - START *******
Socket 0 Stack Bitmap:F3F.
Stack Instance Bitmap:F3F.
IioCount: 10.
B2HotCount(LS): 00.
Socket 1 Stack Bitmap:F3F.
Stack Instance Bitmap:F3F.
IioCount: 10.
B2HotCount(LS): 00.
******* Detecting IIO count - END *******
******* Disable UBOX MMIO Addr Range - START *******
Current Bars:
Socket | SCF | PCU | MEM0 | MEM1 | MEM2 | MEM3 | MEM4 | MEM5 | MEM6 | MEM7 | SBREG |
-------------------------------------------------------------------------------------------------------------------------------------------------------
0 | 0x00000000 | 0x00000000 | 0x00000000 | 0x00000000 | 0x00000000 | 0x00000000 | 0x00000000 | 0x00000000 | 0x00000000 | 0x00000000 | 0x00000000 |
1 | 0x00000000 | 0x00000000 | 0x00000000 | 0x00000000 | 0x00000000 | 0x00000000 | 0x00000000 | 0x00000000 | 0x00000000 | 0x00000000 | 0x00000000 |
2 | 0x00000000 | 0x00000000 | 0x00000000 | 0x00000000 | 0x00000000 | 0x00000000 | 0x00000000 | 0x00000000 | 0x00000000 | 0x00000000 | 0x00000000 |
3 | 0x00000000 | 0x00000000 | 0x00000000 | 0x00000000 | 0x00000000 | 0x00000000 | 0x00000000 | 0x00000000 | 0x00000000 | 0x00000000 | 0x00000000 |
-------------------------------------------------------------------------------------------------------------------------------------------------------
******* Disable UBOX MMIO Addr Range - END *******
******* Checking KTIRC Input Structure - START *******
Desired MMCFG Config: Base = 0x80000000, Size = 0x10000000
OutSncPrefetchEn=4, OutSncEn=4
IpUpiGetCapability(UpiAgent[0][0], id=12):
IpUpiVersionSpecificConfigurationEnabled: unknown ID=2
IpWrError 0 49
IpUpiGetCapability(UpiAgent[0][0], id=7):
IpUpiGetCapability(UpiAgent[0][0], id=9):
IpUpiGetCapability(UpiAgent[0][0], id=10):
IpUpiGetCapability(UpiAgent[0][0], id=8):
IpUpiGetCapability(UpiAgent[0][1], id=12):
IpUpiVersionSpecificConfigurationEnabled: unknown ID=2
IpWrError 0 49
IpUpiGetCapability(UpiAgent[0][1], id=7):
IpUpiGetCapability(UpiAgent[0][1], id=9):
IpUpiGetCapability(UpiAgent[0][1], id=10):
IpUpiGetCapability(UpiAgent[0][1], id=8):
IpUpiGetCapability(UpiAgent[0][2], id=12):
IpUpiVersionSpecificConfigurationEnabled: unknown ID=2
IpWrError 0 49
IpUpiGetCapability(UpiAgent[0][2], id=7):
IpUpiGetCapability(UpiAgent[0][2], id=9):
IpUpiGetCapability(UpiAgent[0][2], id=10):
IpUpiGetCapability(UpiAgent[0][2], id=8):
IpUpiGetCapability(UpiAgent[0][3], id=12):
IpUpiVersionSpecificConfigurationEnabled: unknown ID=2
IpWrError 0 49
IpUpiGetCapability(UpiAgent[0][3], id=7):
IpUpiGetCapability(UpiAgent[0][3], id=9):
IpUpiGetCapability(UpiAgent[0][3], id=10):
IpUpiGetCapability(UpiAgent[0][3], id=8):
IpUpiGetCapability(UpiAgent[1][0], id=12):
IpUpiVersionSpecificConfigurationEnabled: unknown ID=2
IpWrError 0 49
IpUpiGetCapability(UpiAgent[1][0], id=7):
IpUpiGetCapability(UpiAgent[1][0], id=9):
IpUpiGetCapability(UpiAgent[1][0], id=10):
IpUpiGetCapability(UpiAgent[1][0], id=8):
IpUpiGetCapability(UpiAgent[1][1], id=12):
IpUpiVersionSpecificConfigurationEnabled: unknown ID=2
IpWrError 0 49
IpUpiGetCapability(UpiAgent[1][1], id=7):
IpUpiGetCapability(UpiAgent[1][1], id=9):
IpUpiGetCapability(UpiAgent[1][1], id=10):
IpUpiGetCapability(UpiAgent[1][1], id=8):
IpUpiGetCapability(UpiAgent[1][2], id=12):
IpUpiVersionSpecificConfigurationEnabled: unknown ID=2
IpWrError 0 49
IpUpiGetCapability(UpiAgent[1][2], id=7):
IpUpiGetCapability(UpiAgent[1][2], id=9):
IpUpiGetCapability(UpiAgent[1][2], id=10):
IpUpiGetCapability(UpiAgent[1][2], id=8):
IpUpiGetCapability(UpiAgent[1][3], id=12):
IpUpiVersionSpecificConfigurationEnabled: unknown ID=2
IpWrError 0 49
IpUpiGetCapability(UpiAgent[1][3], id=7):
IpUpiGetCapability(UpiAgent[1][3], id=9):
IpUpiGetCapability(UpiAgent[1][3], id=10):
IpUpiGetCapability(UpiAgent[1][3], id=8):
****** Selecting KTI freq. - START ******
Max supported KTI Speed requested: 16.0 GT/s
Selected KTI Freq is 16.0 GT/s
****** Selecting KTI freq. - END ******
MaxAddress=52
******* Checking KTIRC Input Structure - END *******
******* KTI NVRAM Verification - START *******
----------Update Kti Nvram in COLD BOOT ----------
******* KTI NVRAM Verification - END *******
******* Calculate Resource Allocation - START *******
S0 - AddressMap.hi=209F
S1 - AddressMap.hi=21BF
BitPos=2E
CPU Resource Allocation
--------------------------------------------------------------------------------------------------------------------------------------------------------------
| StkId | Seg | Bus | Io | IoApic | Mmiol | Mmioh | StkBmp |
--------------------------------------------------------------------------------------------------------------------------------------------------------------
CPU0 | | 0 | 0x00 - 0x7F | 0x0000 - 0x9FFF | 0xFEC00000 - 0xFECFFFFF | 0x90000000 - 0xC8FFFFFF | 0x00002000 00000000 - 0x0000209F FFFFFFFF | 0xF3F |
Ins00 | 0x00 | 0 | 0x00 - 0x14 | 0x0000 - 0x3FFF | 0xFEC00000 - 0xFECFFFFF | 0x90000000 - 0x957FFFFF | 0x00002000 00000000 - 0x0000200F FFFFFFFF | |
Ins01 | 0x01 | 0 | 0x15 - 0x25 | 0x4000 - 0x5FFF | 0xFFFFFFFF - 0x00000000 | 0x95800000 - 0x9F7FFFFF | 0x00002010 00000000 - 0x0000201F FFFFFFFF | |
Ins02 | 0x04 | 0 | 0x26 - 0x36 | 0x6000 - 0x6FFF | 0xFFFFFFFF - 0x00000000 | 0x9F800000 - 0xA93FFFFF | 0x00002020 00000000 - 0x0000202F FFFFFFFF | |
Ins03 | 0x03 | 0 | 0x37 - 0x47 | 0x7000 - 0x7FFF | 0xFFFFFFFF - 0x00000000 | 0xA9400000 - 0xB2FFFFFF | 0x00002030 00000000 - 0x0000203F FFFFFFFF | |
Ins04 | 0x05 | 0 | 0x48 - 0x58 | 0x8000 - 0x8FFF | 0xFFFFFFFF - 0x00000000 | 0xB3000000 - 0xBCBFFFFF | 0x00002040 00000000 - 0x0000204F FFFFFFFF | |
Ins05 | 0x02 | 0 | 0x59 - 0x69 | 0x9000 - 0x9FFF | 0xFFFFFFFF - 0x00000000 | 0xBCC00000 - 0xC67FFFFF | 0x00002050 00000000 - 0x0000205F FFFFFFFF | |
Ins06 | 0x06 | 0 | 0xFF - 0x00 | 0xFFFF - 0x0000 | 0xFFFFFFFF - 0x00000000 | 0xFFFFFFFF - 0x00000000 | 0xFFFFFFFF FFFFFFFF - 0x00000000 00000000 | |
Ins07 | 0x07 | 0 | 0xFF - 0x00 | 0xFFFF - 0x0000 | 0xFFFFFFFF - 0x00000000 | 0xFFFFFFFF - 0x00000000 | 0xFFFFFFFF FFFFFFFF - 0x00000000 00000000 | |
Ins08 | 0x08 | 0 | 0x6A - 0x6E | 0xFFFF - 0x0000 | 0xFFFFFFFF - 0x00000000 | 0xC6800000 - 0xC6FFFFFF | 0x00002060 00000000 - 0x0000206F FFFFFFFF | |
Ins09 | 0x09 | 0 | 0x6F - 0x73 | 0xFFFF - 0x0000 | 0xFFFFFFFF - 0x00000000 | 0xC7000000 - 0xC77FFFFF | 0x00002070 00000000 - 0x0000207F FFFFFFFF | |
Ins10 | 0x0A | 0 | 0x74 - 0x78 | 0xFFFF - 0x0000 | 0xFFFFFFFF - 0x00000000 | 0xC7800000 - 0xC7FFFFFF | 0x00002080 00000000 - 0x0000208F FFFFFFFF | |
Ins11 | 0x0B | 0 | 0x79 - 0x7D | 0xFFFF - 0x0000 | 0xFFFFFFFF - 0x00000000 | 0xC8000000 - 0xC87FFFFF | 0x00002090 00000000 - 0x0000209F FFFFFFFF | |
Rsvd | 0x0C | 0 | 0xFB - 0xFD | 0xFFFF - 0x0000 | 0xFFFFFFFF - 0x00000000 | 0xFFFFFFFF - 0x00000000 | 0xFFFFFFFF FFFFFFFF - 0x00000000 00000000 | |
Ubox | 0x0D | 0 | 0x7E - 0x7F | 0xFFFF - 0x0000 | 0xFFFFFFFF - 0x00000000 | 0xC8800000 - 0xC8FFFFFF | 0xFFFFFFFF FFFFFFFF - 0x00000000 00000000 | |
CPU1 | | 0 | 0x80 - 0xFF | 0xA000 - 0xFFFF | 0xFFFFFFFF - 0x00000000 | 0xC9000000 - 0xFBFFFFFF | 0x000020A0 00000000 - 0x0000213F FFFFFFFF | 0xF3F |
Ins00 | 0x00 | 0 | 0x80 - 0x96 | 0xA000 - 0xAFFF | 0xFFFFFFFF - 0x00000000 | 0xC9000000 - 0xD13FFFFF | 0x000020A0 00000000 - 0x000020AF FFFFFFFF | |
Ins01 | 0x01 | 0 | 0x97 - 0xA6 | 0xB000 - 0xBFFF | 0xFFFFFFFF - 0x00000000 | 0xD1400000 - 0xD97FFFFF | 0x000020B0 00000000 - 0x000020BF FFFFFFFF | |
Ins02 | 0x04 | 0 | 0xA7 - 0xB6 | 0xC000 - 0xCFFF | 0xFFFFFFFF - 0x00000000 | 0xD9800000 - 0xE17FFFFF | 0x000020C0 00000000 - 0x000020CF FFFFFFFF | |
Ins03 | 0x03 | 0 | 0xB7 - 0xC6 | 0xD000 - 0xDFFF | 0xFFFFFFFF - 0x00000000 | 0xE1800000 - 0xE97FFFFF | 0x000020D0 00000000 - 0x000020DF FFFFFFFF | |
Ins04 | 0x05 | 0 | 0xC7 - 0xD6 | 0xE000 - 0xEFFF | 0xFFFFFFFF - 0x00000000 | 0xE9800000 - 0xF17FFFFF | 0x000020E0 00000000 - 0x000020EF FFFFFFFF | |
Ins05 | 0x02 | 0 | 0xD7 - 0xE6 | 0xF000 - 0xFFFF | 0xFFFFFFFF - 0x00000000 | 0xF1800000 - 0xF97FFFFF | 0x000020F0 00000000 - 0x000020FF FFFFFFFF | |
Ins06 | 0x06 | 0 | 0xFF - 0x00 | 0xFFFF - 0x0000 | 0xFFFFFFFF - 0x00000000 | 0xFFFFFFFF - 0x00000000 | 0xFFFFFFFF FFFFFFFF - 0x00000000 00000000 | |
Ins07 | 0x07 | 0 | 0xFF - 0x00 | 0xFFFF - 0x0000 | 0xFFFFFFFF - 0x00000000 | 0xFFFFFFFF - 0x00000000 | 0xFFFFFFFF FFFFFFFF - 0x00000000 00000000 | |
Ins08 | 0x08 | 0 | 0xE7 - 0xEB | 0xFFFF - 0x0000 | 0xFFFFFFFF - 0x00000000 | 0xF9800000 - 0xF9FFFFFF | 0x00002100 00000000 - 0x0000210F FFFFFFFF | |
Ins09 | 0x09 | 0 | 0xEC - 0xF0 | 0xFFFF - 0x0000 | 0xFFFFFFFF - 0x00000000 | 0xFA000000 - 0xFA7FFFFF | 0x00002110 00000000 - 0x0000211F FFFFFFFF | |
Ins10 | 0x0A | 0 | 0xF1 - 0xF5 | 0xFFFF - 0x0000 | 0xFFFFFFFF - 0x00000000 | 0xFA800000 - 0xFAFFFFFF | 0x00002120 00000000 - 0x0000212F FFFFFFFF | |
Ins11 | 0x0B | 0 | 0xF6 - 0xFA | 0xFFFF - 0x0000 | 0xFFFFFFFF - 0x00000000 | 0xFB000000 - 0xFB7FFFFF | 0x00002130 00000000 - 0x0000213F FFFFFFFF | |
Rsvd | 0x0C | 0 | 0xFB - 0xFD | 0xFFFF - 0x0000 | 0xFFFFFFFF - 0x00000000 | 0xFFFFFFFF - 0x00000000 | 0xFFFFFFFF FFFFFFFF - 0x00000000 00000000 | |
Ubox | 0x0D | 0 | 0xFE - 0xFF | 0xFFFF - 0x0000 | 0xFFFFFFFF - 0x00000000 | 0xFB800000 - 0xFBFFFFFF | 0xFFFFFFFF FFFFFFFF - 0x00000000 00000000 | |
******* Calculate Resource Allocation - END *******
******* Sync Up PBSPs - START *******
Setting Ubox Sticky to save KTI topology to 0x000000000000FF03
Verifying if the remote socket(s) checked-in.
Inter-socket CSR access En request POST_RESET_WARM reset
packageBspStepping[0]=4
packageBspStepping[1]=4
******* Sync Up PBSPs - END *******
******* Program Mmcfg and bus numbers - START *******
Initiate S1 update
KtiVar->MmCfgBase = 0x80000000
KtiVar->segmentSocket[0] = 0x00
KtiVar->SocketFirstBus[0] = 0x00
KtiVar->SocketLastBus[0] = 0x7F
KtiVar->SocketMmCfgBase[0]= 0x80000000
KtiVar->segmentSocket[1] = 0x00
KtiVar->SocketFirstBus[1] = 0x80
KtiVar->SocketLastBus[1] = 0xFF
KtiVar->SocketMmCfgBase[1]= 0x80000000
Current bus numbers:
Socket | Ins00 | Ins01 | Ins02 | Ins03 | Ins04 | Ins05 | Ins06 | Ins07 | Ins08 | Ins09 | Ins0A | Ins0B | Rsvd | Ubox0 | Ubox1 | LastBus | Seg
-----------------------------------------------------------------------------------------------------------------------------------------------
0 | 0x00 | 0x15 | 0x26 | 0x37 | 0x48 | 0x59 | --- | --- | 0x6A | 0x6F | 0x74 | 0x79 | --- | 0x7E | 0x7F | 0x7F | 0
1 | 0x80 | 0x97 | 0xA7 | 0xB7 | 0xC7 | 0xD7 | --- | --- | 0xE7 | 0xEC | 0xF1 | 0xF6 | --- | 0xFE | 0xFF | 0xFF | 0
-----------------------------------------------------------------------------------------------------------------------------------------------
Wait for S1 to update
Change in Cache size request POST_RESET_WARM reset
Change in Cache size request POST_RESET_WARM reset
Change in Cache size request POST_RESET_WARM reset
Change in Cache size request POST_RESET_WARM reset
Change in Cache size request POST_RESET_WARM reset
Change in Cache size request POST_RESET_WARM reset
Change in Cache size request POST_RESET_WARM reset
Change in Cache size request POST_RESET_WARM reset
Change in Cache size request POST_RESET_WARM reset
Change in Cache size request POST_RESET_WARM reset
Change in Cache size request POST_RESET_WARM reset
Change in Cache size request POST_RESET_WARM reset
Change in Cache size request POST_RESET_WARM reset
Change in Cache size request POST_RESET_WARM reset
Change in Cache size request POST_RESET_WARM reset
Change in Cache size request POST_RESET_WARM reset
Change in Cache size request POST_RESET_WARM reset
Change in Cache size request POST_RESET_WARM reset
Change in Cache size request POST_RESET_WARM reset
Change in Cache size request POST_RESET_WARM reset
******* Program Mmcfg and bus numbers - END *******
Current Bars:
Socket | SCF | PCU | MEM0 | MEM1 | MEM2 | MEM3 | MEM4 | MEM5 | MEM6 | MEM7 | SBREG |
-------------------------------------------------------------------------------------------------------------------------------------------------------
0 | 0xC8800000 | 0xC8A00000 | 0xC8A80000 | 0xC8B00000 | 0xC8B80000 | 0xC8C00000 | 0xC8C80000 | 0xC8D00000 | 0xC8D80000 | 0xC8E00000 | 0xC8E80000 |
1 | 0xFB800000 | 0xFBA00000 | 0xFBA80000 | 0xFBB00000 | 0xFBB80000 | 0xFBC00000 | 0xFBC80000 | 0xFBD00000 | 0xFBD80000 | 0xFBE00000 | 0xFBE80000 |
-------------------------------------------------------------------------------------------------------------------------------------------------------
******* Programming Misc CSRs before WR - START *******
******* Programming Misc CSRs before WR - END *******
******* Pre-work before MDFIS Training *******
S0 S3M_S3MFW_CFR_SVN_N0_S3M_TREG_REG : 00000000
S0 S3M_S3MFW_REVID_N0_S3M_TREG_REG : 00000000
S0 S3M_S3MFW_CFR_SVN_N1_S3M_TREG_REG : 00010001
S0 S3M_S3MFW_REVID_N1_S3M_TREG_REG : 0000001E
******* Mdfs Sweep Training START *******
Get Uncore P0 Ratio = 24, Uncore Pm Ratio = 8
Dispatching command to notify Pbsp S1 to go to halt state
Send the Pipe data to S1 Successfully!
Mdfs training send command to pcode
All PBSPs resume from halt START
All PBSPs resume from halt END
Dispatching command to notify Pbsp S1 to go to halt state
Send the Pipe data to S1 Successfully!
Mdfs training send command to pcode
All PBSPs resume from halt START
All PBSPs resume from halt END
Dispatching command to notify Pbsp S1 to go to halt state
Send the Pipe data to S1 Successfully!
Mdfs training send command to pcode
All PBSPs resume from halt START
All PBSPs resume from halt END
******* Mdfs Sweep Training END *******
******* Post-work after MDFIS Training *******
******* Full Speed Transition - START *******
IpUpiVersionSpecificConfigurationEnabled: unknown ID=5
IpWrError 0 49
IpUpiVersionSpecificConfigurationEnabled: unknown ID=5
IpWrError 0 49
IpUpiVersionSpecificConfigurationEnabled: unknown ID=5
IpWrError 0 49
IpUpiVersionSpecificConfigurationEnabled: unknown ID=5
IpWrError 0 49
IpUpiVersionSpecificConfigurationEnabled: unknown ID=5
IpWrError 0 49
IpUpiVersionSpecificConfigurationEnabled: unknown ID=5
IpWrError 0 49
IpUpiVersionSpecificConfigurationEnabled: unknown ID=5
IpWrError 0 49
IpUpiVersionSpecificConfigurationEnabled: unknown ID=5
IpWrError 0 49
Skip UPI speed transition as there is a comming reset!
******* Full Speed Transition - END *******
******* Programming Credits - START *******
SPR M2IOSF -> M2UPI credit value: 34 is bigger than 31, force it to 31.
SPR M2IOSF -> M2UPI credit value: 34 is bigger than 31, force it to 31.
SPR M2IOSF -> M2UPI credit value: 34 is bigger than 31, force it to 31.
SPR M2IOSF -> M2UPI credit value: 34 is bigger than 31, force it to 31.
SPR M2IOSF -> M2UPI credit value: 50 is bigger than 31, force it to 31.
SPR M2IOSF -> M2UPI credit value: 50 is bigger than 31, force it to 31.
SPR M2IOSF -> M2UPI credit value: 33 is bigger than 31, force it to 31.
SPR M2IOSF -> M2UPI credit value: 49 is bigger than 31, force it to 31.
SPR M2IOSF -> M2UPI credit value: 33 is bigger than 31, force it to 31.
SPR M2IOSF -> M2UPI credit value: 49 is bigger than 31, force it to 31.
SPR M2IOSF -> M2UPI credit value: 34 is bigger than 31, force it to 31.
SPR M2IOSF -> M2UPI credit value: 34 is bigger than 31, force it to 31.
SPR M2IOSF -> M2UPI credit value: 34 is bigger than 31, force it to 31.
SPR M2IOSF -> M2UPI credit value: 34 is bigger than 31, force it to 31.
SPR M2IOSF -> M2UPI credit value: 50 is bigger than 31, force it to 31.
SPR M2IOSF -> M2UPI credit value: 50 is bigger than 31, force it to 31.
SPR M2IOSF -> M2UPI credit value: 33 is bigger than 31, force it to 31.
SPR M2IOSF -> M2UPI credit value: 49 is bigger than 31, force it to 31.
SPR M2IOSF -> M2UPI credit value: 33 is bigger than 31, force it to 31.
SPR M2IOSF -> M2UPI credit value: 49 is bigger than 31, force it to 31.
Mesh Credit Program request POST_RESET_WARM reset
******* Programming Credits - END *******
******* Pcu Misc Config - START *******
******* Pcu Misc Config - END *******
Setup Uncore Misc:
Write Socket 0 GLOBAL_PKG_C_S_CONTROL_REGISTER = 4
Write Socket 1 GLOBAL_PKG_C_S_CONTROL_REGISTER = 100
:INIT - BIOS_RESET_CPL: Set CPL1 on #S1
:INIT - BIOS_RESET_CPL: Set CPL1 on #S0
Initalize DMI RCRB region.
SetRcrbBar (): RcrbBase = 0x90000000
Warning: Created a Memory Hole: 0x90002000 ~ 0x9001FFFF
MEMBAR0: Base = 0x90020000, Size = 0x20000
Socket: 0;DMI MemBar locates on 0x90020000, Size: 0x20000
ProgramNumOfChaPerCluster
ProgramNumOfChaPerCluster
*******SOCKET1 STACKID SWAPPING - START *******
*******SOCKET1 STACKID SWAPPING - END *******
Current bus numbers:
Socket | Ins00 | Ins01 | Ins02 | Ins03 | Ins04 | Ins05 | Ins06 | Ins07 | Ins08 | Ins09 | Ins0A | Ins0B | Rsvd | Ubox0 | Ubox1 | LastBus | Seg
-----------------------------------------------------------------------------------------------------------------------------------------------
0 | 0x00 | 0x15 | 0x26 | 0x37 | 0x48 | 0x59 | --- | --- | 0x6A | 0x6F | 0x74 | 0x79 | --- | 0x7E | 0x7F | 0x7F | 0
1 | --- | 0x97 | 0xA7 | 0xB7 | 0xC7 | 0xD7 | 0x80 | --- | 0xE7 | 0xEC | 0xF1 | 0xF6 | --- | 0xFE | 0xFF | 0xFF | 0
-----------------------------------------------------------------------------------------------------------------------------------------------
Get FM_PCIE_FV_BIF_EN Status = Success, GpioVal = 0
**KTI Output Structure **
OutD2KCreditConfig: 0 [1:Low,2:Med,3:High]
SnoopThrottleConfig: 0 [0:Dis,1:Low,2:Med,3:High,4:Auto]
OutUpiAffinityEn for CHA and M2M: 0
OutTwoSktTopology : 5
OutM2iosfToUpiAffinity: 1
OutPmonConfig: 2 [1:Reduced,2:Full,3:Auto,0:Disabled]
OutM2IosfPmonAccessControl: 0 [0:Restricted,1:Full,2:Auto]
OutD2kEn: 0
OutLegacyVgaSoc: 0
OutLegacyVgaStack: 0
OutIsocEn: 0
OutHitMeEn: 1
OutSncEn: 4 (SNC4)
OutUmaClustering: 0
OutSysDirectoryModeEn: 1
OutKtiPrefetch: 0
OutXptPrefetch: 0
OutXptRemotePrefetch: 0
OutSncPrefetchEn: 4
OutSncGbAlignRequired: 0
OutIsRouteThrough: 0
OutStaleAtoSOptEn: 2
OutSystemRasType: 6 (ADVANCED)
OutIoDcMode: 5 (IODC_EN_REM_INVITOM_AND_WCILF)
KtiCurrentLinkSpeedMode: 0 (SLOW)
OutKtiLinkSpeed: 2 (16.0)
OutKtiLinkL0pEn: 0 (DISABLED)
OutKtiLinkL1En: 1 (ENABLED)
OutKtiFailoverEn: 1 (ENABLED)
OutKtiCrcMode: 0 (16BIT)
OutBoardVsCpuConflict: 0x0
OutKtiAdaptationEnable: 0x0
OutKtiPerLinkL1En (per port):
S0:0 0 0 0
S1:0 0 0 0
S2:0 0 0 0
S3:0 0 0 0
PchPresentBitMap: 0x01
OutKtiFpgaPresent (per socket): S0: 0 S1: 0 S2: 0 S3: 0
OutKtiFpgaEnable (per socket): S0: 0 S1: 0 S2: 0 S3: 0
OutFpgaHomeAgent (per socket): S0: 0 S1: 0 S2: 0 S3: 0
OutFpgaCacheAgent (per socket): S0: 0 S1: 0 S2: 0 S3: 0
OutStackDisableBitMap (per socket): S0: 0x0 S1: 0x0 S2: 0x0 S3: 0x0
mmCfgBase: 0x80000000
mmCfgSize: 0x10000000
mmiolBase: 0x90000000
mmiolSize: 0x6C000000
mmiohBase: 0x00002000
lowGap : 0x20
SecondaryNodeBitMap: 0x00
CpuPaLimit: 0
KtiInternalGlobal:
->SnoopFanoutEn: 0
->SysOsbEn: 1
->D2cEn: 1
->D2kEn: 0
->SnoopFilter: 0
->DualLinksInterleavingMode: 2
->UpiInterleaveMode: 2
->EightSocketTopology: 0
->SnoopFanoutChaInterleaveEn: 0
KtiLinkVnaOverride (per port - final values):
S0:254 254 254 254
S1:254 254 254 254
S2:254 254 254 254
S3:254 254 254 254
IIO STACK rootbus ID mapping table
Stack ID | Root Bus ID
0 ------- 0
1 ------- 1
2 ------- 2
3 ------- 3
4 ------- 4
5 ------- 5
6 ------- 6
7 ------- 7
8 ------- 8
9 ------- 9
10 ------- 10
11 ------- 11
OutDfxPrqBlockEn: 0
OutDfxAeg0CounterLowVal: 40
OutDfxAeg0CounterHighVal: 60
**KTI Output Structure End**
******* KTIRC Exit *******
KTI Init completed! Reset Requested: 2
IIO EarlyLink Init Start.
HcxType[0] = NONE
[IIO](VMD) [0] VMD disabled for RPs init.
MS2IOSF Traffic Controller Credits: Recipe Revision v1.11
Program HW_INIT using SB access
Program HW_INIT using SB access
Program HW_INIT using SB access
Program HW_INIT using SB access
Program HW_INIT using SB access
Program HW_INIT using SB access
Program HW_INIT using SB access
Program HW_INIT using SB access
Program HW_INIT using SB access
[0] Cpxsmb enabled
WARNING: Platform does not support uplink port!
HcxType[1] = NONE
[IIO](VMD) [1] VMD disabled for RPs init.
MS2IOSF Traffic Controller Credits: Recipe Revision v1.11
Program HW_INIT using SB access
Program HW_INIT using SB access
Program HW_INIT using SB access
Program HW_INIT using SB access
Program HW_INIT using SB access
Program HW_INIT using SB access
Program HW_INIT using SB access
Program HW_INIT using SB access
Program HW_INIT using SB access
Program HW_INIT using SB access
[1] Cpxsmb enabled
IIO EarlyLink Init completed! Reset Requested: 2
RC debug buffering, compression, and sync ready
Pipe Init starting...
Pass PIPE_DISPATCH_SYNCH_PSYSHOST to socket 1
Pass PeiPipeFollowerInit
CAR MEM Range 0xFE800000 - 0xFE97A14F
Pass pointer to Host: 0xFE800014
Sending address of Memory Policy: 0xFE96FF80
Pass boot mode 0
Send data buffer
Send data dwordcount 5E854
Send data...complete
CAR MEM Range2 0xFE9DC000 - 0xFE9DFFFF
Send data buffer
Send data dwordcount 1000
Send data...complete
Send data buffer
Send data dwordcount 18F
Send data...complete
N1 Checked into Pipe
Pipe Init completed! Reset Requested: 2
CPU Feature Early Config starting...
CpuInit Start
CpuUncoreInit()
: Get UncoreRatioLimit MaxClrRatio: 24, MinClrRatio: 8, UncoreRatioLimit.Uint32 = 0x818
: Get UncoreRatioLimit MaxClrRatio: 24, MinClrRatio: 8, UncoreRatioLimit.Uint32 = 0x818
:UFS: Update BIOS_SPARE2_PCU Bit[20] = 0 on S0
Write Socket 0 MSR_UNCORE_RATIO_LIMIT.MinClrRatio [14:8] = 8, MSR_UNCORE_RATIO_LIMIT.MaxClrRatio [6:0] = 24
:UFS: Update BIOS_SPARE2_PCU Bit[20] = 0 on S1
Write Socket 1 MSR_UNCORE_RATIO_LIMIT.MinClrRatio [14:8] = 8, MSR_UNCORE_RATIO_LIMIT.MaxClrRatio [6:0] = 24
Get socket PPIN
: PPIN = 22E546CB1AD8E915
Get socket PPIN
: PPIN = 22E548CB80015B4D
:: ProgramProcessorFlexRatio()
:: System Capable : AVX SST-CP SST-BF
1 1 0
:: SstPpCapableSystem : LevelEnableMask MaxLevel
0 00 00
S0_0 FusedCoresMask = 0x0DABBB6EAF4EE9DB FusedCoreCount = 40
GetAllConfigTdpLevels() Enter
S0_0 ConfigTdpLevel(0) IssCoreMask = 0x0DABBB6EAF4EE9DB IssCoreCount = 40
GetAllConfigTdpLevels() Exit
:: S0 MaxRatio : MinRatio : MinOpRatio : ConfigTdpMaxLevel
17 08 05 02
:: S0 Current SST-PP Level : Current SST-PP Lock
00 0
Level : PkgTDP : SSE P1 : AVX2 P1 : AVX3 P1 : Core Count
0 : 000350 : 000017 : 000014 : 000011 : 040, [0] 40
3 : 000000 : 000000 : 000000 : 000000 : 000, [0] 00
4 : 000000 : 000000 : 000000 : 000000 : 000, [0] 00
Level : Turbo Ratio Limit - SSE P1 : AVX2 P1 : AVX3 P1
0 : - : 181818191A1E2023 : 17171718191E2023 : 16161617171D1F22
3 : - : 0000000000000000 : 0000000000000000 : 0000000000000000
4 : - : 0000000000000000 : 0000000000000000 : 0000000000000000
Level : TJMax : CoreMask
0 : 100 : [0] 0DABBB6EAF4EE9DB
3 : 000 : [0] 0000000000000000
4 : 000 : [0] 0000000000000000
Level : SstBf - P1_Hi : P1_Lo : CoreMask
0 : 0000 : 0000 : [0] 0000000000000000
3 : 0000 : 0000 : [0] 0000000000000000
4 : 0000 : 0000 : [0] 0000000000000000
Core Ratio Info
Level : P0 : P1 : Pn : Pm
0 : 000035 : 000017 : 000008 : 000005
3 : 000000 : 000000 : 000000 : 000000
4 : 000000 : 000000 : 000000 : 000000
Uncore Ratio Info
Level : P0 : P1 : Pn : Pm
0 : 000024 : 000014 : 000008 : 000008
3 : 000000 : 000000 : 000000 : 000000
4 : 000000 : 000000 : 000000 : 000000
S1_0 FusedCoresMask = 0x0DB9772F6F4EE9DB FusedCoreCount = 40
GetAllConfigTdpLevels() Enter
S1_0 ConfigTdpLevel(0) IssCoreMask = 0x0DB9772F6F4EE9DB IssCoreCount = 40
GetAllConfigTdpLevels() Exit
:: S1 MaxRatio : MinRatio : MinOpRatio : ConfigTdpMaxLevel
17 08 05 02
:: S1 Current SST-PP Level : Current SST-PP Lock
00 0
Level : PkgTDP : SSE P1 : AVX2 P1 : AVX3 P1 : Core Count
0 : 000350 : 000017 : 000014 : 000011 : 040, [0] 40
3 : 000000 : 000000 : 000000 : 000000 : 000, [0] 00
4 : 000000 : 000000 : 000000 : 000000 : 000, [0] 00
Level : Turbo Ratio Limit - SSE P1 : AVX2 P1 : AVX3 P1
0 : - : 181818191A1E2023 : 17171718191E2023 : 16161617171D1F22
3 : - : 0000000000000000 : 0000000000000000 : 0000000000000000
4 : - : 0000000000000000 : 0000000000000000 : 0000000000000000
Level : TJMax : CoreMask
0 : 100 : [0] 0DB9772F6F4EE9DB
3 : 000 : [0] 0000000000000000
4 : 000 : [0] 0000000000000000
Level : SstBf - P1_Hi : P1_Lo : CoreMask
0 : 0000 : 0000 : [0] 0000000000000000
3 : 0000 : 0000 : [0] 0000000000000000
4 : 0000 : 0000 : [0] 0000000000000000
Core Ratio Info
Level : P0 : P1 : Pn : Pm
0 : 000035 : 000017 : 000008 : 000005
3 : 000000 : 000000 : 000000 : 000000
4 : 000000 : 000000 : 000000 : 000000
Uncore Ratio Info
Level : P0 : P1 : Pn : Pm
0 : 000024 : 000014 : 000008 : 000008
3 : 000000 : 000000 : 000000 : 000000
4 : 000000 : 000000 : 000000 : 000000
:: CommonMaxRatio : CommonMinRatio : Target Ratio
17 08 17
:: IssTdpLevel : AvxP1Level
00 00
:: TargetRatio: 17 is ready (RatioChangeFlag: 0), SstPpCurrentLevel: 0
:: SetActiveCoresAndLpEnableDisable()
:: S0_0 BIST_FAILURE_LOCAL_MASK = 0000000000000000
:: S0 setup input disable = 0000000000000000
:: S0_0 AvailCoresMask = 0DABBB6EAF4EE9DB
:: S0_0 ResolvedCoresMask = 0DABBB6EAF4EE9DB
:: S0_0 DesiredCoresCurrent = 0000000000000000
:: S0_0 BistResultMask = 0000000000000000
:: S0_0 CoreDisableReqMask = 0000000000000000
:: S0_0 NumberOfCoresDisabledMask = 0000000000000000
:: CheckCpuBist = 1
:: CoreFailover = 1
[s0_0] MaxLpEnable = 0, LpCapable = 1, MaxLpEnable knob = 0, Lock Status = 0
S0_0 MaxEnabledCores = 0
S0_0 FusedCoreCount = 40
S0_0 NonSparingCoresMask= FFFFFFFFFFFFFFFF
:: S0_0 DesiredCoresNew = 0000000000000000
:: S1_0 BIST_FAILURE_LOCAL_MASK = 0000000000000000
:: S1 setup input disable = 0000000000000000
:: S1_0 AvailCoresMask = 0DB9772F6F4EE9DB
:: S1_0 ResolvedCoresMask = 0DB9772F6F4EE9DB
:: S1_0 DesiredCoresCurrent = 0000000000000000
:: S1_0 BistResultMask = 0000000000000000
:: S1_0 CoreDisableReqMask = 0000000000000000
:: S1_0 NumberOfCoresDisabledMask = 0000000000000000
:: CheckCpuBist = 1
:: CoreFailover = 1
[s1_0] MaxLpEnable = 0, LpCapable = 1, MaxLpEnable knob = 0, Lock Status = 0
S1_0 MaxEnabledCores = 0
S1_0 FusedCoreCount = 40
S1_0 NonSparingCoresMask= FFFFFFFFFFFFFFFF
:: S1_0 DesiredCoresNew = 0000000000000000
CPUMISC Current S 0:
ITBM is not supported
CPUMISC Current S 1:
ITBM is not supported
CPU Feature Early Config completed! Reset Requested: 2
[CSR PCI BAR Access] Address:0xFFFFFFFF000000D4; PCI Cmd: 0xFFFF
START_MRC_RUN
Detect ColdBootSlowRequiredFlag and will force slow cold boot.
N0: Bus Instance = 0; I2C speed = 3; I3C speed = 2; Bus mode = 0
N0: Bus Instance = 1; I2C speed = 3; I3C speed = 2; Bus mode = 0
N0: Bus Instance = 0; I2C speed = 3; I3C speed = 2; Bus mode = 1
N0: Bus Instance = 0; I2C speed = 3; I3C speed = 2; Bus mode = 1
N0: Bus Instance = 0; I2C speed = 3; I3C speed = 2; Bus mode = 1
N0: Bus Instance = 0; I2C speed = 3; I3C speed = 2; Bus mode = 1
N0: Bus Instance = 0; I2C speed = 3; I3C speed = 2; Bus mode = 1
N0: Bus Instance = 0; I2C speed = 3; I3C speed = 2; Bus mode = 1
N0: Bus Instance = 1; I2C speed = 3; I3C speed = 2; Bus mode = 1
N0: Bus Instance = 1; I2C speed = 3; I3C speed = 2; Bus mode = 1
N0: Bus Instance = 1; I2C speed = 3; I3C speed = 2; Bus mode = 1
N0: Bus Instance = 1; I2C speed = 3; I3C speed = 2; Bus mode = 1
N0: Bus Instance = 1; I2C speed = 3; I3C speed = 2; Bus mode = 1
N0: Bus Instance = 1; I2C speed = 3; I3C speed = 2; Bus mode = 1
N0: Bus Instance = 0; I2C speed = 3; I3C speed = 2; Bus mode = 0
N0: Bus Instance = 0; I2C speed = 3; I3C speed = 2; Bus mode = 0
N0: Bus Instance = 0; I2C speed = 3; I3C speed = 2; Bus mode = 0
N0: Bus Instance = 0; I2C speed = 3; I3C speed = 2; Bus mode = 0
N0: Bus Instance = 0; I2C speed = 3; I3C speed = 2; Bus mode = 0
N0: Bus Instance = 0; I2C speed = 3; I3C speed = 2; Bus mode = 0
N0: Bus Instance = 1; I2C speed = 3; I3C speed = 2; Bus mode = 0
N0: Bus Instance = 1; I2C speed = 3; I3C speed = 2; Bus mode = 0
N0: Bus Instance = 1; I2C speed = 3; I3C speed = 2; Bus mode = 0
N0: Bus Instance = 1; I2C speed = 3; I3C speed = 2; Bus mode = 0
N0: Bus Instance = 1; I2C speed = 3; I3C speed = 2; Bus mode = 0
N0: Bus Instance = 1; I2C speed = 3; I3C speed = 2; Bus mode = 0
N0: Dimm changed.
Processors changed.
Get socket PPIN
: PPIN = 22E546CB1AD8E915
setupChanged: 1
Clearing the MRC NVRAM structure.
bootMode = NormalBoot
subBootMode = ColdBoot
[ScktId: 0] Parallel Mode Dispatch -- Started
Dispatch N1 for MemInit
N1 Entering MRC
Detect ColdBootSlowRequiredFlag and will force slow cold boot.
N1: Bus Instance = 0; I2C speed = 3; I3C speed = 2; Bus mode = 0
N1: Bus Instance = 1; I2C speed = 3; I3C speed = 2; Bus mode = 0
N1: Bus Instance = 0; I2C speed = 3; I3C speed = 2; Bus mode = 1
N1: Bus Instance = 0; I2C speed = 3; I3C speed = 2; Bus mode = 1
N1: Bus Instance = 0; I2C speed = 3; I3C speed = 2; Bus mode = 1
N1: Bus Instance = 0; I2C speed = 3; I3C speed = 2; Bus mode = 1
N1: Bus Instance = 0; I2C speed = 3; I3C speed = 2; Bus mode = 1
N1: Bus Instance = 0; I2C speed = 3; I3C speed = 2; Bus mode = 1
N1: Bus Instance = 1; I2C speed = 3; I3C speed = 2; Bus mode = 1
N1: Bus Instance = 1; I2C speed = 3; I3C speed = 2; Bus mode = 1
N1: Bus Instance = 1; I2C speed = 3; I3C speed = 2; Bus mode = 1
N1: Bus Instance = 1; I2C speed = 3; I3C speed = 2; Bus mode = 1
N1: Bus Instance = 1; I2C speed = 3; I3C speed = 2; Bus mode = 1
N1: Bus Instance = 1; I2C speed = 3; I3C speed = 2; Bus mode = 1
N1: Bus Instance = 0; I2C speed = 3; I3C speed = 2; Bus mode = 0
N1: Bus Instance = 0; I2C speed = 3; I3C speed = 2; Bus mode = 0
N1: Bus Instance = 0; I2C speed = 3; I3C speed = 2; Bus mode = 0
N1: Bus Instance = 0; I2C speed = 3; I3C speed = 2; Bus mode = 0
N1: Bus Instance = 0; I2C speed = 3; I3C speed = 2; Bus mode = 0
N1: Bus Instance = 0; I2C speed = 3; I3C speed = 2; Bus mode = 0
N1: Bus Instance = 1; I2C speed = 3; I3C speed = 2; Bus mode = 0
N1: Bus Instance = 1; I2C speed = 3; I3C speed = 2; Bus mode = 0
N1: Bus Instance = 1; I2C speed = 3; I3C speed = 2; Bus mode = 0
N1: Bus Instance = 1; I2C speed = 3; I3C speed = 2; Bus mode = 0
N1: Bus Instance = 1; I2C speed = 3; I3C speed = 2; Bus mode = 0
N1: Bus Instance = 1; I2C speed = 3; I3C speed = 2; Bus mode = 0
N1: Dimm changed.
Get socket PPIN
: PPIN = 22E548CB80015B4D
setupChanged: 1
Clearing the MRC NVRAM structure.
bootMode = NormalBoot
subBootMode = ColdBoot
[ScktId: 1] Parallel Mode Dispatch -- Started
[ScktId: 1] Parallel Mode Dispatch - 4ms
[ScktId: 0] Parallel Mode Dispatch - 203ms
[ScktId: 1] Pipe Sync AP Boot Mode -- Started
[ScktId: 0] Pipe Sync AP Boot Mode -- Started
[ScktId: 0] Pipe Sync AP Boot Mode - 9ms
[ScktId: 1] Pipe Sync AP Boot Mode - 13ms
N1 Checked into Pipe
[ScktId: 0] Select Boot Mode -- Started
DetermineBootMode: ColdBoot
[ScktId: 0] Select Boot Mode - 8ms
[ScktId: 1] Pipe Sync SBSP Boot Mode -- Started
[ScktId: 0] Pipe Sync SBSP Boot Mode -- Started
[ScktId: 1] Pipe Sync SBSP Boot Mode - 9ms
[ScktId: 0] Pipe Sync SBSP Boot Mode - 9ms
[ScktId: 1] Init Structures Late -- Started
[ScktId: 0] Init Structures Late -- Started
[ScktId: 1] Init Structures Late - 8ms
[ScktId: 0] Init Structures Late - 8ms
[ScktId: 1] Detect DIMM Configuration -- Started
[ScktId: 0] Detect DIMM Configuration -- Started
N1: Bus Instance = 0; I2C speed = 3; I3C speed = 2; Bus mode = 0
N0: Bus Instance = 0; I2C speed = 3; I3C speed = 2; Bus mode = 0
N1: Bus Instance = 0; I2C speed = 3; I3C speed = 2; Bus mode = 0
N0: Bus Instance = 0; I2C speed = 3; I3C speed = 2; Bus mode = 0
N1: Bus Instance = 0; I2C speed = 3; I3C speed = 2; Bus mode = 0
N0: Bus Instance = 0; I2C speed = 3; I3C speed = 2; Bus mode = 0
N1: Bus Instance = 0; I2C speed = 3; I3C speed = 2; Bus mode = 0
N0: Bus Instance = 0; I2C speed = 3; I3C speed = 2; Bus mode = 0
N1: Bus Instance = 0; I2C speed = 3; I3C speed = 2; Bus mode = 0
N0: Bus Instance = 0; I2C speed = 3; I3C speed = 2; Bus mode = 0
N1: Bus Instance = 0; I2C speed = 3; I3C speed = 2; Bus mode = 0
N0: Bus Instance = 0; I2C speed = 3; I3C speed = 2; Bus mode = 0
N1: Bus Instance = 1; I2C speed = 3; I3C speed = 2; Bus mode = 0
N0: Bus Instance = 1; I2C speed = 3; I3C speed = 2; Bus mode = 0
N1: Bus Instance = 1; I2C speed = 3; I3C speed = 2; Bus mode = 0
N0: Bus Instance = 1; I2C speed = 3; I3C speed = 2; Bus mode = 0
N1: Bus Instance = 1; I2C speed = 3; I3C speed = 2; Bus mode = 0
N0: Bus Instance = 1; I2C speed = 3; I3C speed = 2; Bus mode = 0
N1: Bus Instance = 1; I2C speed = 3; I3C speed = 2; Bus mode = 0
N0: Bus Instance = 1; I2C speed = 3; I3C speed = 2; Bus mode = 0
N1: Bus Instance = 1; I2C speed = 3; I3C speed = 2; Bus mode = 0
N0: Bus Instance = 1; I2C speed = 3; I3C speed = 2; Bus mode = 0
N1: Bus Instance = 1; I2C speed = 3; I3C speed = 2; Bus mode = 0
N0: Bus Instance = 1; I2C speed = 3; I3C speed = 2; Bus mode = 0
[ScktId: 1] Detect DIMM Configuration - 318ms
[ScktId: 0] Detect DIMM Configuration - 320ms
[ScktId: 1] Pipe Sync AP Data -- Started
[ScktId: 0] Pipe Sync AP Data -- Started
[ScktId: 0] Pipe Sync AP Data - 23ms
[ScktId: 1] Pipe Sync AP Data - 27ms
N1 Checked into Pipe
[ScktId: 0] Check POR Compatibility -- Started
[ScktId: 0] Check POR Compatibility - 6ms
N1 Checked into Pipe
[ScktId: 0] HBM Init Clock -- Started
PCU: API - Command->0xA6, sending data -> 0x0000F260
PCU: API - Command->0xA6, sending data -> 0x0000F260
[ScktId: 0] HBM Init Clock - 16ms
N1 Checked into Pipe
[ScktId: 0] Initialize clocks for all MemSs -- Started
N0: Platform segment mapping found. UseServerPor: 1; SegmentType: 7; ChopType: 3; PlatformSegment: 0
N0: Platform segment mapping found. UseServerPor: 1; SegmentType: 7; ChopType: 3; PlatformSegment: 0
N0: Platform segment mapping found. UseServerPor: 1; SegmentType: 7; ChopType: 3; PlatformSegment: 0
N0: Platform segment mapping found. UseServerPor: 1; SegmentType: 7; ChopType: 3; PlatformSegment: 0
N0: Platform segment mapping found. UseServerPor: 1; SegmentType: 7; ChopType: 3; PlatformSegment: 0
N0: Platform segment mapping found. UseServerPor: 1; SegmentType: 7; ChopType: 3; PlatformSegment: 0
N0: Platform segment mapping found. UseServerPor: 1; SegmentType: 7; ChopType: 3; PlatformSegment: 0
N0: Platform segment mapping found. UseServerPor: 1; SegmentType: 7; ChopType: 3; PlatformSegment: 0
Reset requested: non-MRC
PCU: API - Command->0xA6, sending data -> 0x8000F170
Reset requested: non-MRC
PCU: API - Command->0xA6, sending data -> 0x8000F170
[ScktId: 0] Initialize clocks for all MemSs - 103ms
[ScktId: 1] Pipe Sync SBSP Data -- Started
[ScktId: 0] Pipe Sync SBSP Data -- Started
[ScktId: 1] Pipe Sync SBSP Data - 22ms
[ScktId: 0] Pipe Sync SBSP Data - 22ms
[ScktId: 1] Unlock Memory -- Started
[ScktId: 0] Unlock Memory -- Started
[ScktId: 1] Unlock Memory - 7ms
[ScktId: 0] Unlock Memory - 7ms
[ScktId: 1] Pipe Sync AP Data -- Started
[ScktId: 0] Pipe Sync AP Data -- Started
[ScktId: 0] Pipe Sync AP Data - 23ms
[ScktId: 1] Pipe Sync AP Data - 26ms
[ScktId: 0] HBM Pre-Training -- Started
[ScktId: 1] HBM Pre-Training -- Started
HBMIO flows: set to 0xFFFFFF7F!
HBMIO flows: set to 0xFFFFFF7F!
Get socket PPIN
Get socket PPIN
: PPIN = 22E546CB1AD8E915
: PPIN = 22E548CB80015B4D
HBM frequency = 3200MHz
HBM frequency = 3200MHz
Socket0 HbmIo0, HW Rev: 0x110, FW Rev: 0x2180, Patch ID: 0x0, Unique ID: 0x18, Product ID: 0x2
Socket1 HbmIo0, HW Rev: 0x110, FW Rev: 0x2180, Patch ID: 0x0, Unique ID: 0x18, Product ID: 0x2
Socket0 HbmIo1, HW Rev: 0x110, FW Rev: 0x2180, Patch ID: 0x0, Unique ID: 0x18, Product ID: 0x2
Socket1 HbmIo1, HW Rev: 0x110, FW Rev: 0x2180, Patch ID: 0x0, Unique ID: 0x18, Product ID: 0x2
Socket0 HbmIo2, HW Rev: 0x110, FW Rev: 0x2180, Patch ID: 0x0, Unique ID: 0x18, Product ID: 0x2
Socket1 HbmIo2, HW Rev: 0x110, FW Rev: 0x2180, Patch ID: 0x0, Unique ID: 0x18, Product ID: 0x2
Socket0 HbmIo3, HW Rev: 0x110, FW Rev: 0x2180, Patch ID: 0x0, Unique ID: 0x18, Product ID: 0x2
Socket1 HbmIo3, HW Rev: 0x110, FW Rev: 0x2180, Patch ID: 0x0, Unique ID: 0x18, Product ID: 0x2
[ScktId: 0] HBM Pre-Training - 117ms
[ScktId: 1] HBM Pre-Training - 125ms
[ScktId: 0] AP HBM Information -- Started
[ScktId: 1] AP HBM Information -- Started
[ScktId: 0] AP HBM Information - 13ms
[ScktId: 1] AP HBM Information - 9ms
[ScktId: 0] Pipe Sync SBSP Status -- Started
[ScktId: 1] Pipe Sync SBSP Status -- Started
[ScktId: 1] Pipe Sync SBSP Status - 8ms
[ScktId: 0] Pipe Sync SBSP Status - 12ms
-- EXIT, status = MRC_STATUS_RESET_REQUIRED
-- EXIT, status = MRC_STATUS_RESET_REQUIRED
Total MRC time = 822ms
Total MRC time = 1026ms
STOP_MRC_RUN
Final Rc Heap usage:
******* Configure Mesh Mode - START *******
Configure Socket 0 2LM Hash -Enabled
Configure Socket 0 2LM Hash on KTI and IIO-Enabled
Configure Socket 1 2LM Hash -Enabled
Configure Socket 1 2LM Hash on KTI and IIO-Enabled
Socket 0 Mc 0 channel 0 enabled 1
Socket 0 Mc 0 Ch 0 maxDimm 1 Dimm = 0 numRanks= 1 TechIndex = 3 DimmSize 0x80
Memory Size = 0x80
Socket 0 has 1st 4G memory on Channel 0
Socket 0 Mc 0 channel 1 enabled 0
Socket 0 Mc 1 channel 2 enabled 1
Socket 0 Mc 1 Ch 0 maxDimm 1 Dimm = 0 numRanks= 1 TechIndex = 3 DimmSize 0x80
Memory Size = 0x80
Socket 0 Mc 1 channel 3 enabled 0
Socket 0 Mc 2 channel 4 enabled 1
Socket 0 Mc 2 Ch 0 maxDimm 1 Dimm = 0 numRanks= 1 TechIndex = 3 DimmSize 0x80
Memory Size = 0x80
Socket 0 Mc 2 channel 5 enabled 0
Socket 0 Mc 3 channel 6 enabled 1
Socket 0 Mc 3 Ch 0 maxDimm 1 Dimm = 0 numRanks= 1 TechIndex = 3 DimmSize 0x80
Memory Size = 0x80
Socket 0 Mc 3 channel 7 enabled 0
MaxHbmIo: 4 MemInfo->SncInfo[0].NumOfHbmioEnabled: 4
Socket 1 Mc 0 channel 0 enabled 1
Socket 1 Mc 0 Ch 0 maxDimm 1 Dimm = 0 numRanks= 1 TechIndex = 3 DimmSize 0x80
Memory Size = 0x80
Socket 1 Mc 0 channel 1 enabled 0
Socket 1 Mc 1 channel 2 enabled 1
Socket 1 Mc 1 Ch 0 maxDimm 1 Dimm = 0 numRanks= 1 TechIndex = 3 DimmSize 0x80
Memory Size = 0x80
Socket 1 Mc 1 channel 3 enabled 0
Socket 1 Mc 2 channel 4 enabled 1
Socket 1 Mc 2 Ch 0 maxDimm 1 Dimm = 0 numRanks= 1 TechIndex = 3 DimmSize 0x80
Memory Size = 0x80
Socket 1 Mc 2 channel 5 enabled 0
Socket 1 Mc 3 channel 6 enabled 1
Socket 1 Mc 3 Ch 0 maxDimm 1 Dimm = 0 numRanks= 1 TechIndex = 3 DimmSize 0x80
Memory Size = 0x80
Socket 1 Mc 3 channel 7 enabled 0
MaxHbmIo: 4 MemInfo->SncInfo[1].NumOfHbmioEnabled: 4
Socket 0
S0: SNC_Base_1 = 0000 GB
S0: SNC_Base_2 = 0004 GB
S0: SNC_Base_3 = 0004 GB
S0: SNC_Base_4 = 0004 GB
S0: SNC_Base_5 = 0004 GB
Socket 1
S1: SNC_Base_1 = 0004 GB
S1: SNC_Base_2 = 0004 GB
S1: SNC_Base_3 = 0004 GB
S1: SNC_Base_4 = 0004 GB
S1: SNC_Base_5 = 0004 GB
ProgramSncShadowReg
Socket:0 Base1 0x0FFF0000
Socket:0 Base2 0x1FE00004
Socket:0 Base3 0x00000004
Socket:0 Base4 0x00000004
Socket:0 Base5 0x00000004
Socket:0 UpperBase1 0x00000000
Socket:0 SncConfig 0x0000000A
Socket:1 Base1 0x0FFF0004
Socket:1 Base2 0x1FE00004
Socket:1 Base3 0x00000004
Socket:1 Base4 0x00000004
Socket:1 Base5 0x00000004
Socket:1 UpperBase1 0x00000000
Socket:1 SncConfig 0x0000000A
******* Configure Mesh Mode - END *******
S3M Provisioning SoftStrap Disabled, Exit.
PUcode Patch provisioning/commit flow
S3mPucodeCfrPatchProvisionCommit didn't find suitable CFR image, Exit.
S3M Patch provisioning/commit flow
Get Image :FF800090 11FF4
CFR Patch Provision start...
IFWI integrated S3M CFR patch revision SVN: 00000001, RevID: 0000001E.
S0 S3M_S3MFW_CFR_SVN_N0_S3M_TREG_REG : 00000000
S0 S3M_S3MFW_REVID_N0_S3M_TREG_REG : 00000000
S0 S3M_S3MFW_CFR_SVN_N1_S3M_TREG_REG : 00010001
S0 S3M_S3MFW_REVID_N1_S3M_TREG_REG : 0000001E
Committed region with the latest patch, skip provision.
Socket 0 Can't Provision, Skip.
IFWI integrated S3M CFR patch revision SVN: 00000001, RevID: 0000001E.
S1 S3M_S3MFW_CFR_SVN_N0_S3M_TREG_REG : 00000000
S1 S3M_S3MFW_REVID_N0_S3M_TREG_REG : 00000000
S1 S3M_S3MFW_CFR_SVN_N1_S3M_TREG_REG : 00010001
S1 S3M_S3MFW_REVID_N1_S3M_TREG_REG : 0000001E
Committed region with the latest patch, skip provision.
Socket 1 Can't Provision, Skip.
CFR Patch Commit start...
S0 S3M_S3MFW_CFR_SVN_N0_S3M_TREG_REG : 00000000
S0 S3M_S3MFW_REVID_N0_S3M_TREG_REG : 00000000
Socket 0 can't commit, skip
S1 S3M_S3MFW_CFR_SVN_N0_S3M_TREG_REG : 00000000
S1 S3M_S3MFW_REVID_N0_S3M_TREG_REG : 00000000
Socket 1 can't commit, skip
CFR Patch Provision/Commit Completed.
Reset Requested: 2
Pipe Exit starting...
Pipe Exit completed! Reset Requested: 2
Enhanced Warning Log:
Checking for Reset Requests...
ResetRequired: 02
[HECI Transport-1 PEI] Send pkt: 80040007
00: F3 01 00 00
[HECI Transport-1 PEI] Got pkt: 80050007
00: F3 81 00 00 00
Issue WARM RESET!
PROGRESS CODE: V03020003 I0
PROGRESS CODE: V03020002 I0
PROGRESS CODE: V03020003 I0
PROGRESS CODE: V03020002 I0
PROGRESS CODE: V03020003 I0
PROGRESS CODE: V03020002 I0
PROGRESS CODE: V03020003 I0
PROGRESS CODE: V03020002 I0
[IPMI PEI] BMC Device ID: 0x23, firmware version: 2.03 UpdateMode:1
[IPMI] BMC in Forced Update mode, skip waiting for BMC_READY.
PROGRESS CODE: V03020003 I0
PROGRESS CODE: V03020002 I0
PROGRESS CODE: V03020003 I0
PROGRESS CODE: V03020002 I0
InstallHeciTransportPpis, start
InstallHeciTransportPpis, end
[HECI CONTROL PEI] HECI Transport found: 2
[HECI Control-1 PEI]: ERROR: HeciControlSendAndReceiveSinglePch() : Heci 1 is not initialized
HECI: ME type not recognized (MEFS1: 0x00000355, MEFS2: 0x80508006)
Initialization is allowed
[HECI Transport-1 PEI] Send pkt: 80040007
00: F0 11 00 00
[HECI Transport-1 PEI] Got pkt: 80080007
00: F0 91 00 00 09 00 00 00
HECI: Create MeType HOB for ME: 1
HECI: Set MeType HOB info to: 1
[HECI] [ME] (MeType is ME_TYPE_SPS)
Initialization is allowed
PROGRESS CODE: V03020003 I0
PROGRESS CODE: V03020002 I0
PROGRESS CODE: V03020003 I0
PROGRESS CODE: V03020002 I0
IioVmdDisableForPchRpInit: DonePCH Series : EBG PCH
PCH Stepping : B0
PROGRESS CODE: V03020003 I0
PROGRESS CODE: V03020002 I0
PROGRESS CODE: V03020003 I0
PROGRESS CODE: V03020002 I0
PROGRESS CODE: V03020003 I0
PROGRESS CODE: V03020002 I0
UbaInitPeim: PlatformType=0x16
UbaInitPeim: PlatformType=0x16
UbaInitPeim: PlatformType=0x16
UbaInitPeim: PlatformType=0x16
PROGRESS CODE: V03020003 I0
PROGRESS CODE: V03020002 I0
PROGRESS CODE: V03020003 I0
PROGRESS CODE: V03020002 I0
UBA:GpioTable size 0x9CC, blocks: 0xD1.
UBA: Start ConfigureGpio().
UBA: ConfigureGpio() end.
Unable to read FlashSecOvrdVal
FiaMuxRecordsCount = 0
[HECI] PeiMeServerPolicy (MeType is ME_TYPE_SPS)
Can't finde more CFR image in CFR FV - Not Found!
PPR Variable not found or CRC mismatch - Status: 0x8000000E, Crc: 0x0, calc. Crc: 0x0!
UpdatePeiSecurityPolicy: Create Status=Success
FIT not found, skip LT-SX
Platform Type = 22
Bios ID: EGSDCRB1.ZHI.0091.D15.2211010657
PROGRESS CODE: V03020003 I0
[HECI Transport-1 PEI] Send pkt: 80010020
00: 01
[HECI Transport-1 PEI] Got pkt: 800B0020
00: 81 01 01 14 00 88 00 01 - 00 00 00
[HECI Transport-1 PEI] Send pkt: 80300008
00: 00 00 05 00 1A 00 00 00 - 00 00 00 00 1C 00 00 00
10: 00 00 00 00 00 00 00 00 - 00 00 00 00 00 00 00 00
20: 00 00 00 00 00 00 00 00 - 00 00 00 00 00 00 00 00
[HECI Transport-1 PEI] Got pkt: 80300008
00: 00 00 05 00 1A 00 00 00 - 00 00 00 00 1C 00 00 00
10: 00 00 00 00 00 00 00 02 - 00 00 00 00 00 00 00 00
20: 00 00 00 00 00 00 00 00 - 00 00 00 00 00 00 00 00
Fail to Configure PSYS_CRIT
PROGRESS CODE: V03020002 I0
PROGRESS CODE: V03020003 I0
PROGRESS CODE: V03020002 I0
PROGRESS CODE: V03020003 I0
PROGRESS CODE: V03020002 I0
PROGRESS CODE: V03020003 I0
PROGRESS CODE: V03020002 I0
PROGRESS CODE: V03020003 I0
PROGRESS CODE: V03020002 I0
LtStatusRegister[0xFED30000] = 0x0000000000000003
LtExtendedStatusError[0xFED30008] = 0x0000000000000000
BootGuardBootStatus[0xFED300A0] = 0x0000000000000000
BootGuardAcmError[0xFED30328] = 0x0000000000000000
BootGuardLtExists[0xFED30010] = 0x0000000000000000
BootGuardLtCrash[0xFED30030] = 0x0000000000000000
MSR_DEBUG_INTERFACE[0x00000C80] = 0x0000000080000001
MSR_BOOT_GUARD_SACM_INFO[0x0000013A] = 0x0000000C00000000
AcmPolicyStatus = 0x0, IsTxtFailedWithScrtm 0
None of BtG/TXT is enabled or TXT failed with scrtm.
PROGRESS CODE: V03020003 I0
PROGRESS CODE: V03020002 I0
PROGRESS CODE: V03020003 I0
PROGRESS CODE: V03020002 I0
InitializeDefaultData()
[Enter] Initialize Reference Code Policy!
>>> Print the default settings of Reference Code Policy! Begin >>>
ReferenceCodePolicyPtr->NumaEn = 1
ReferenceCodePolicyPtr->UmaBasedClustering = 0
<<< Print the default settings of Reference Code Policy! End <<<
[Exit] Initialize Reference Code Policy!
SBSP socket = 0
InitializePlatformData()
InstallPpi MrcHooksServicesPpiDesc Status = 00000000
CacheMrcHooksServicesPpi in HOST: Host->MrcHooksServicesPpi = FFEA57C0
InstallPpi MrcHooksChipServicesPpiDesc Status = 00000000
CacheMrcChipHooksServicesPpi in HOST: Host->MrcHooksChipServicesPpi = FFEA5820
PROGRESS CODE: V030F100B I0
LoadNvramData: LoadSysInfoNvram failed, Status = Not Found
[HECI Transport-1 PEI] Send pkt: 80100007
00: F0 0C 00 00 DF FF FF FF - FF FF FF FF 00 00 00 00
[HECI Transport-1 PEI] Got pkt: 80100007
00: F0 8C 00 00 00 00 00 00 - 00 00 00 00 00 00 00 00
MeUmaConfigureRequestedSegmentSize: Exiting (Status = Success)
GetEmulationMemFlows: Simics $mrc value = 0
memFlows = 0xFFFFFFFF, memFlowsExt = 0xFFBF7FFF, memFlowsExt2 = 0xBF9E1F7F, memFlowsExt3 = 0xFFFFFFFF
Emulation Value is: 0!
Running on hardware
SPR processor detected
Warning: Newer CPU Stepping 4 detected
RC Version: 1.1.1.01BC
sizeof sysHost = 363776
SsaLoader - Entry
SsaLoader - Exit
KTI Init starting...
******* KTI Setup Structure *******
Bus Ratio (per socket): S0: 1 S1: 1 S2: 1 S3: 1
D2KCreditConfig: 0 [1:Low,2:Med,3:High]
SnoopThrottleConfig: 0 [0:Dis,1:Low,2:Med,3:High,4:Auto]
LegacyVgaSoc: 0
LegacyVgaStack: 0
P2pRelaxedOrdering: 0
DebugPrintLevel: 15
DegradePrecedence: 0
Degrade4SPreference: 0 (4SFullyConnect)
KtiLinkSpeedMode: 1 (FAST)
DfxWarmResetEliminationEn: 0
KtiLinkSpeed: 127 (MAX_SUPPORTED)
KtiAdaptationEn: 2 (UNKNOWN)
KtiAdaptationSpeed: 127 (MAX_SUPPORTED)
KtiLinkL0pEn: 2 (AUTO)
KtiLinkL1En: 2 (AUTO)
KtiFailoverEn: 2 (AUTO)
KtiLbEn: 0
SncEn: 15 (AUTO)
IoDcMode: 1 (AUTO)
DirectoryModeEn: 2
XptPrefetchEn: 2
KtiPrefetchEn: 2
XptRemotePrefetchEn: 2
RdCurForXptPrefetchEn: 2
StaleAtoSOptEn: 2
LLCDeadLineAlloc: 1
OppoLLC2SfMigrationEn: 0 (MANUAL)
MbeBWCalChoice: 3 [0:Linear,1:Biased,2:Legacy,3:Auto]
PmmMbaBWDownscale: 0 [0:1x,1:1/2x,2:1/4x,3:1/8x]
CxlMbaBWDownscale: 0 [0:1x,1:1/2x,2:1/4x,3:1/8x]
RemoteTargetMbaBWDownscale 0 [0:1x,1:1/2x,2:1/4x,3:1/8x]
SplitLock: 0
DdrtQosMode: 0
ClockModulationEn: 2 (AUTO)
KtiFpgaEnable (per socket): S0: 2 S1: 2 S2: 2 S3: 2
StackDisableBitMap (per socket): S0: 0x0 S1: 0x0 S2: 0x0 S3: 0x0
KtiCrcMode: 0 (16BIT)
KtiCpuSktHotPlugEn: 0
KtiCpuSktHotPlugTopology: 0 (4S)
KtiSkuMismatchCheck: 1
MctpBusOwner: 0 (PCH SPS as Bus Owner (Proxy))
KtiPortDisable (per port):
S0:0 0 0 0
S1:0 0 0 0
S2:0 0 0 0
S3:0 0 0 0
KtiLinkVnaOverride (per port):
S0:254 254 254 254
S1:254 254 254 254
S2:254 254 254 254
S3:254 254 254 254
KtiLinkSpeed (per port):
S0:7 7 7 7
S1:7 7 7 7
S2:7 7 7 7
S3:7 7 7 7
Rsvd (per port):
S0:0 0 0 0
S1:0 0 0 0
S2:0 0 0 0
S3:0 0 0 0
**KTI Setup Structure DfxParms **
DfxHaltLinkFailReset: 2 (AUTO)
DfxKtiMaxInitAbort: 2 (AUTO)
DfxLlcShareDrdCrd 2 (AUTO)
DfxBiasFwdMode: 5 (AUTO)
DfxSnoopFanoutEn: 2 (AUTO)
DfxHitMeEn: 2 (AUTO)
DfxFrcfwdinv 2 (AUTO)
DfxDbpEnable 2 (AUTO)
DfxCleanEvictAlwaysLive: 2 (AUTO)
DfxModifiedEvictAlwaysLive: 2 (AUTO)
DfxOsbEn 2 (AUTO)
DfxHitMeRfoDirsEn 2 (AUTO)
DfxGateOsbIodcAllocEn 2 (AUTO)
DfxDualLinksInterleavingMode 2 (AUTO)
DfxSystemDegradeMode: 1
DfxVn1En: 2 (AUTO)
DfxD2cEn: 2 (AUTO)
DfxD2kEn: 2 (AUTO)
DfxLockPrimary: 4 (AUTO)
DfxOsbLocRd: 2 (AUTO)
DfxOsbLocRdCur: 2 (AUTO)
DfxOsbRmtRd: 2 (AUTO)
DfxM3KtiCountMismatchEn: 2 (AUTO)
DfxSnoopFanoutChaInterleaveEn: 2 (AUTO)
DfxXptFifoEnabledCredit: 0x5
DfxMdfisTrainingEn: 2 (AUTO)
DfxClippedFreq: 23
DfxLlpEndcntClipped: 650
DfxLlpEndcntNonClipped: 576
DfxCxlSecLvl: 3 (AUTO)
DfxCxlStcge: 2 (AUTO)
DfxCxlSdcge: 2 (AUTO)
DfxCxlDlcge: 2 (AUTO)
DfxCxlLtcge: 2 (AUTO)
DfxCxlVid: 2 (AUTO)
DfxIioDfxEnabled: 0 (MANUAL)
DfxHqmEn: 2 (AUTO)
DfxRsfEnabledForDram: 2 (AUTO)
DfxS3mSoftStrap: 2 (AUTO)
DfxPmonConfig: 3 (AUTO)
DfxM2IosfPmonAccessControl: 2 (AUTO)
DfxMaxCache: 256 (AUTO)
DfxMaxCacheAtomic: 256 (AUTO)
DfxCtagEntryAvailMask: 256 (AUTO)
DfxXptPrefetchEn: 2 (AUTO)
DfxPrqBlockEn: 2 (AUTO)
DfxAeg0CounterLowVal: 65535 (AUTO)
DfxAeg0CounterHighVal: 65535 (AUTO)
DfxCrcMode (per port):
S0:2 (AUTO) 2 (AUTO) 2 (AUTO) 2 (AUTO)
S1:2 (AUTO) 2 (AUTO) 2 (AUTO) 2 (AUTO)
S2:2 (AUTO) 2 (AUTO) 2 (AUTO) 2 (AUTO)
S3:2 (AUTO) 2 (AUTO) 2 (AUTO) 2 (AUTO)
DfxL0pEnable (per port):
S0:2 (AUTO) 2 (AUTO) 2 (AUTO) 2 (AUTO)
S1:2 (AUTO) 2 (AUTO) 2 (AUTO) 2 (AUTO)
S2:2 (AUTO) 2 (AUTO) 2 (AUTO) 2 (AUTO)
S3:2 (AUTO) 2 (AUTO) 2 (AUTO) 2 (AUTO)
DfxL1Enable (per port):
S0:2 (AUTO) 2 (AUTO) 2 (AUTO) 2 (AUTO)
S1:2 (AUTO) 2 (AUTO) 2 (AUTO) 2 (AUTO)
S2:2 (AUTO) 2 (AUTO) 2 (AUTO) 2 (AUTO)
S3:2 (AUTO) 2 (AUTO) 2 (AUTO) 2 (AUTO)
DfxKtiFailoverEn (per port):
S0:2 (AUTO) 2 (AUTO) 2 (AUTO) 2 (AUTO)
S1:2 (AUTO) 2 (AUTO) 2 (AUTO) 2 (AUTO)
S2:2 (AUTO) 2 (AUTO) 2 (AUTO) 2 (AUTO)
S3:2 (AUTO) 2 (AUTO) 2 (AUTO) 2 (AUTO)
**Common Setup Structure**
mmCfgBase: 6 (AUTO)
mmCfgSize: 6 (AUTO)
mmiohBase: 0x00002000
CpuPaLimit: 0
mmiohSize: 3 (64GB per stack)
numaEn: 1
UmaClustering: 4
isocEn: 0
dcaEn: 0
**Common Var Structure **
resetRequired: 0
state: 0
numCpus: 0
socketPresentBitMap: 0x01
mmCfgBase: 0x80000000
meRequestedSize: 0
******* Collecting Early System Information - START *******
SBSP Socket: 0 Ways: 0x01 Ras: 0x06 Stepping: 0x04 DieCount: 4 Chop: XCC
Total Chas: 52 Cha List Map:
Cha List[0]: 0xBFCFF9FF
Cha List[1]: 0x0FEBFBFF
Total M3Kti: 04 Total KtiAgent: 04 Total M2M: 20 M2M list map: 0x000FFFFF
Current bus numbers:
Socket | Ins00 | Ins01 | Ins02 | Ins03 | Ins04 | Ins05 | Ins06 | Ins07 | Ins08 | Ins09 | Ins0A | Ins0B | Rsvd | Ubox0 | Ubox1 | LastBus | Seg
-----------------------------------------------------------------------------------------------------------------------------------------------
0 | 0x00 | 0x11 | 0x12 | 0x13 | 0x14 | 0x15 | 0x16 | 0x17 | 0x18 | 0x19 | 0x1A | 0x1B | --- | 0x1E | 0x1F | 0x1F | 0
1 | 0x20 | 0x21 | 0x22 | 0x23 | 0x24 | 0x25 | 0x26 | 0x27 | 0x28 | 0x29 | 0x2A | 0x2B | --- | 0x3E | 0x3F | 0x3F | 0
2 | 0x40 | 0x41 | 0x42 | 0x43 | 0x44 | 0x45 | 0x46 | 0x47 | 0x48 | 0x49 | 0x4A | 0x4B | --- | 0x5E | 0x5F | 0x5F | 0
3 | 0x60 | 0x61 | 0x62 | 0x63 | 0x64 | 0x65 | 0x66 | 0x67 | 0x68 | 0x69 | 0x6A | 0x6B | --- | 0x7E | 0x7F | 0x7F | 0
-----------------------------------------------------------------------------------------------------------------------------------------------
Assuming maximal config: TotCpus: 4 CpuList: 0x0F
Default UpiInterleaveMode: 0
Reset Type: Warm Reset
******* Collecting Early System Information - END *******
(Spr) UpiIpWrInit
MaxSocket 4, MaxKtiPort 4
UpiIpWrSingleInit
IpUpiIpInit(UpiAgent[0][0]):
UpiIpWrSingleInit
IpUpiIpInit(UpiAgent[0][1]):
UpiIpWrSingleInit
IpUpiIpInit(UpiAgent[0][2]):
UpiIpWrSingleInit
IpUpiIpInit(UpiAgent[0][3]):
UpiIpWrSingleInit
IpUpiIpInit(UpiAgent[1][0]):
UpiIpWrSingleInit
IpUpiIpInit(UpiAgent[1][1]):
UpiIpWrSingleInit
IpUpiIpInit(UpiAgent[1][2]):
UpiIpWrSingleInit
IpUpiIpInit(UpiAgent[1][3]):
UpiIpWrSingleInit
IpUpiIpInit(UpiAgent[2][0]):
UpiIpWrSingleInit
IpUpiIpInit(UpiAgent[2][1]):
UpiIpWrSingleInit
IpUpiIpInit(UpiAgent[2][2]):
UpiIpWrSingleInit
IpUpiIpInit(UpiAgent[2][3]):
UpiIpWrSingleInit
IpUpiIpInit(UpiAgent[3][0]):
UpiIpWrSingleInit
IpUpiIpInit(UpiAgent[3][1]):
UpiIpWrSingleInit
IpUpiIpInit(UpiAgent[3][2]):
UpiIpWrSingleInit
IpUpiIpInit(UpiAgent[3][3]):
******* Setting up Minimum Path - START *******
Constructing SBSP minimum path Topology Tree
--------------------------------------------
Adding SBSP (CPU0) to the tree
CPU0 Link Exchange
: LEP0(0,CPU1) Socket 0 Port 0:Primary - Peer Socket 1 Port 0 Secondary
: LEP1(1,CPU1) Socket 0 Port 1:Primary - Peer Socket 1 Port 1 Secondary
: LEP2(2,CPU1) Socket 0 Port 2:Primary - Peer Socket 1 Port 2 Secondary
: LEP3(3,CPU1) Socket 0 Port 3:Primary - Peer Socket 1 Port 3 Secondary
Adding CPU1 to the tree
Setting path between SBSP and CPU1.
In SBSP setting route to CPU1 using port 0.
In CPU1 using port 0 to set the M2UPCIe0 route.
CPU1 Link Exchange
: LEP0(0,CPU0) : LEP1(1,CPU0) : LEP2(2,CPU0) : LEP3(3,CPU0)
Setting boot path for CPU1
In CPU1 setting Cbo route to port 0
Socket[2] is removed
Socket[3] is removed
SBSP Minimum Path Tree
----------------------
Index Socket ParentPort Hop ParentIndex
00 CPU0 -- 0 --
01 CPU1 00 1 00
******* Setting up Minimum Path - END *******
******* Check for KTI Topology Degradation - START *******
Link Exchange Parameter
-----------------------
CPU0 : LEP0(0:CPU1) : LEP1(1:CPU1) : LEP2(2:CPU1) : LEP3(3:CPU1)
CPU1 : LEP0(0:CPU0) : LEP1(1:CPU0) : LEP2(2:CPU0) : LEP3(3:CPU0)
Already Reduced to Supported Topology
System will be treated 2S4L Configuration
******* Check for KTI Topology Degradation - END *******
******* Enable UBOX MMIO Addr Range - START *******
Current Bars:
Socket | SCF | PCU | MEM0 | MEM1 | MEM2 | MEM3 | MEM4 | MEM5 | MEM6 | MEM7 | SBREG |
-------------------------------------------------------------------------------------------------------------------------------------------------------
0 | 0xF8000000 | 0xF8200000 | 0xF8280000 | 0xF8300000 | 0xF8380000 | 0xF8400000 | 0xF8480000 | 0xF8500000 | 0xF8580000 | 0xF8600000 | 0xF8680000 |
1 | 0xF8800000 | 0xF8A00000 | 0xF8A80000 | 0xF8B00000 | 0xF8B80000 | 0xF8C00000 | 0xF8C80000 | 0xF8D00000 | 0xF8D80000 | 0xF8E00000 | 0xF8E80000 |
2 | 0xF9000000 | 0xF9200000 | 0xF9280000 | 0xF9300000 | 0xF9380000 | 0xF9400000 | 0xF9480000 | 0xF9500000 | 0xF9580000 | 0xF9600000 | 0xF9680000 |
3 | 0xF9800000 | 0xF9A00000 | 0xF9A80000 | 0xF9B00000 | 0xF9B80000 | 0xF9C00000 | 0xF9C80000 | 0xF9D00000 | 0xF9D80000 | 0xF9E00000 | 0xF9E80000 |
-------------------------------------------------------------------------------------------------------------------------------------------------------
******* Enable UBOX MMIO Addr Range - END *******
******* Process Straps Config - START *******
S3M Read SoftStrap Disabled, Exit.
******* Process Straps Config - END *******
******* Detecting IIO count - START *******
Socket 0 Stack Bitmap:F3F.
Stack Instance Bitmap:F3F.
IioCount: 10.
B2HotCount(LS): 00.
Socket 1 Stack Bitmap:F3F.
Stack Instance Bitmap:F3F.
IioCount: 10.
B2HotCount(LS): 00.
******* Detecting IIO count - END *******
******* Disable UBOX MMIO Addr Range - START *******
Current Bars:
Socket | SCF | PCU | MEM0 | MEM1 | MEM2 | MEM3 | MEM4 | MEM5 | MEM6 | MEM7 | SBREG |
-------------------------------------------------------------------------------------------------------------------------------------------------------
0 | 0x00000000 | 0x00000000 | 0x00000000 | 0x00000000 | 0x00000000 | 0x00000000 | 0x00000000 | 0x00000000 | 0x00000000 | 0x00000000 | 0x00000000 |
1 | 0x00000000 | 0x00000000 | 0x00000000 | 0x00000000 | 0x00000000 | 0x00000000 | 0x00000000 | 0x00000000 | 0x00000000 | 0x00000000 | 0x00000000 |
2 | 0x00000000 | 0x00000000 | 0x00000000 | 0x00000000 | 0x00000000 | 0x00000000 | 0x00000000 | 0x00000000 | 0x00000000 | 0x00000000 | 0x00000000 |
3 | 0x00000000 | 0x00000000 | 0x00000000 | 0x00000000 | 0x00000000 | 0x00000000 | 0x00000000 | 0x00000000 | 0x00000000 | 0x00000000 | 0x00000000 |
-------------------------------------------------------------------------------------------------------------------------------------------------------
******* Disable UBOX MMIO Addr Range - END *******
******* Checking KTIRC Input Structure - START *******
Desired MMCFG Config: Base = 0x80000000, Size = 0x10000000
OutSncPrefetchEn=4, OutSncEn=4
IpUpiGetCapability(UpiAgent[0][0], id=12):
IpUpiVersionSpecificConfigurationEnabled: unknown ID=2
IpWrError 0 49
IpUpiGetCapability(UpiAgent[0][0], id=7):
IpUpiGetCapability(UpiAgent[0][0], id=9):
IpUpiGetCapability(UpiAgent[0][0], id=10):
IpUpiGetCapability(UpiAgent[0][0], id=8):
IpUpiGetCapability(UpiAgent[0][1], id=12):
IpUpiVersionSpecificConfigurationEnabled: unknown ID=2
IpWrError 0 49
IpUpiGetCapability(UpiAgent[0][1], id=7):
IpUpiGetCapability(UpiAgent[0][1], id=9):
IpUpiGetCapability(UpiAgent[0][1], id=10):
IpUpiGetCapability(UpiAgent[0][1], id=8):
IpUpiGetCapability(UpiAgent[0][2], id=12):
IpUpiVersionSpecificConfigurationEnabled: unknown ID=2
IpWrError 0 49
IpUpiGetCapability(UpiAgent[0][2], id=7):
IpUpiGetCapability(UpiAgent[0][2], id=9):
IpUpiGetCapability(UpiAgent[0][2], id=10):
IpUpiGetCapability(UpiAgent[0][2], id=8):
IpUpiGetCapability(UpiAgent[0][3], id=12):
IpUpiVersionSpecificConfigurationEnabled: unknown ID=2
IpWrError 0 49
IpUpiGetCapability(UpiAgent[0][3], id=7):
IpUpiGetCapability(UpiAgent[0][3], id=9):
IpUpiGetCapability(UpiAgent[0][3], id=10):
IpUpiGetCapability(UpiAgent[0][3], id=8):
IpUpiGetCapability(UpiAgent[1][0], id=12):
IpUpiVersionSpecificConfigurationEnabled: unknown ID=2
IpWrError 0 49
IpUpiGetCapability(UpiAgent[1][0], id=7):
IpUpiGetCapability(UpiAgent[1][0], id=9):
IpUpiGetCapability(UpiAgent[1][0], id=10):
IpUpiGetCapability(UpiAgent[1][0], id=8):
IpUpiGetCapability(UpiAgent[1][1], id=12):
IpUpiVersionSpecificConfigurationEnabled: unknown ID=2
IpWrError 0 49
IpUpiGetCapability(UpiAgent[1][1], id=7):
IpUpiGetCapability(UpiAgent[1][1], id=9):
IpUpiGetCapability(UpiAgent[1][1], id=10):
IpUpiGetCapability(UpiAgent[1][1], id=8):
IpUpiGetCapability(UpiAgent[1][2], id=12):
IpUpiVersionSpecificConfigurationEnabled: unknown ID=2
IpWrError 0 49
IpUpiGetCapability(UpiAgent[1][2], id=7):
IpUpiGetCapability(UpiAgent[1][2], id=9):
IpUpiGetCapability(UpiAgent[1][2], id=10):
IpUpiGetCapability(UpiAgent[1][2], id=8):
IpUpiGetCapability(UpiAgent[1][3], id=12):
IpUpiVersionSpecificConfigurationEnabled: unknown ID=2
IpWrError 0 49
IpUpiGetCapability(UpiAgent[1][3], id=7):
IpUpiGetCapability(UpiAgent[1][3], id=9):
IpUpiGetCapability(UpiAgent[1][3], id=10):
IpUpiGetCapability(UpiAgent[1][3], id=8):
****** Selecting KTI freq. - START ******
Max supported KTI Speed requested: 16.0 GT/s
Selected KTI Freq is 16.0 GT/s
****** Selecting KTI freq. - END ******
MaxAddress=52
******* Checking KTIRC Input Structure - END *******
******* KTI NVRAM Verification - START *******
******* KTI NVRAM Verification - END *******
******* Calculate Resource Allocation - START *******
S0 - AddressMap.hi=209F
S1 - AddressMap.hi=21BF
BitPos=2E
CPU Resource Allocation
--------------------------------------------------------------------------------------------------------------------------------------------------------------
| StkId | Seg | Bus | Io | IoApic | Mmiol | Mmioh | StkBmp |
--------------------------------------------------------------------------------------------------------------------------------------------------------------
CPU0 | | 0 | 0x00 - 0x7F | 0x0000 - 0x9FFF | 0xFEC00000 - 0xFECFFFFF | 0x90000000 - 0xC8FFFFFF | 0x00002000 00000000 - 0x0000209F FFFFFFFF | 0xF3F |
Ins00 | 0x00 | 0 | 0x00 - 0x14 | 0x0000 - 0x3FFF | 0xFEC00000 - 0xFECFFFFF | 0x90000000 - 0x957FFFFF | 0x00002000 00000000 - 0x0000200F FFFFFFFF | |
Ins01 | 0x01 | 0 | 0x15 - 0x25 | 0x4000 - 0x5FFF | 0xFFFFFFFF - 0x00000000 | 0x95800000 - 0x9F7FFFFF | 0x00002010 00000000 - 0x0000201F FFFFFFFF | |
Ins02 | 0x04 | 0 | 0x26 - 0x36 | 0x6000 - 0x6FFF | 0xFFFFFFFF - 0x00000000 | 0x9F800000 - 0xA93FFFFF | 0x00002020 00000000 - 0x0000202F FFFFFFFF | |
Ins03 | 0x03 | 0 | 0x37 - 0x47 | 0x7000 - 0x7FFF | 0xFFFFFFFF - 0x00000000 | 0xA9400000 - 0xB2FFFFFF | 0x00002030 00000000 - 0x0000203F FFFFFFFF | |
Ins04 | 0x05 | 0 | 0x48 - 0x58 | 0x8000 - 0x8FFF | 0xFFFFFFFF - 0x00000000 | 0xB3000000 - 0xBCBFFFFF | 0x00002040 00000000 - 0x0000204F FFFFFFFF | |
Ins05 | 0x02 | 0 | 0x59 - 0x69 | 0x9000 - 0x9FFF | 0xFFFFFFFF - 0x00000000 | 0xBCC00000 - 0xC67FFFFF | 0x00002050 00000000 - 0x0000205F FFFFFFFF | |
Ins06 | 0x06 | 0 | 0xFF - 0x00 | 0xFFFF - 0x0000 | 0xFFFFFFFF - 0x00000000 | 0xFFFFFFFF - 0x00000000 | 0xFFFFFFFF FFFFFFFF - 0x00000000 00000000 | |
Ins07 | 0x07 | 0 | 0xFF - 0x00 | 0xFFFF - 0x0000 | 0xFFFFFFFF - 0x00000000 | 0xFFFFFFFF - 0x00000000 | 0xFFFFFFFF FFFFFFFF - 0x00000000 00000000 | |
Ins08 | 0x08 | 0 | 0x6A - 0x6E | 0xFFFF - 0x0000 | 0xFFFFFFFF - 0x00000000 | 0xC6800000 - 0xC6FFFFFF | 0x00002060 00000000 - 0x0000206F FFFFFFFF | |
Ins09 | 0x09 | 0 | 0x6F - 0x73 | 0xFFFF - 0x0000 | 0xFFFFFFFF - 0x00000000 | 0xC7000000 - 0xC77FFFFF | 0x00002070 00000000 - 0x0000207F FFFFFFFF | |
Ins10 | 0x0A | 0 | 0x74 - 0x78 | 0xFFFF - 0x0000 | 0xFFFFFFFF - 0x00000000 | 0xC7800000 - 0xC7FFFFFF | 0x00002080 00000000 - 0x0000208F FFFFFFFF | |
Ins11 | 0x0B | 0 | 0x79 - 0x7D | 0xFFFF - 0x0000 | 0xFFFFFFFF - 0x00000000 | 0xC8000000 - 0xC87FFFFF | 0x00002090 00000000 - 0x0000209F FFFFFFFF | |
Rsvd | 0x0C | 0 | 0xFB - 0xFD | 0xFFFF - 0x0000 | 0xFFFFFFFF - 0x00000000 | 0xFFFFFFFF - 0x00000000 | 0xFFFFFFFF FFFFFFFF - 0x00000000 00000000 | |
Ubox | 0x0D | 0 | 0x7E - 0x7F | 0xFFFF - 0x0000 | 0xFFFFFFFF - 0x00000000 | 0xC8800000 - 0xC8FFFFFF | 0xFFFFFFFF FFFFFFFF - 0x00000000 00000000 | |
CPU1 | | 0 | 0x80 - 0xFF | 0xA000 - 0xFFFF | 0xFFFFFFFF - 0x00000000 | 0xC9000000 - 0xFBFFFFFF | 0x000020A0 00000000 - 0x0000213F FFFFFFFF | 0xF3F |
Ins00 | 0x00 | 0 | 0x80 - 0x96 | 0xA000 - 0xAFFF | 0xFFFFFFFF - 0x00000000 | 0xC9000000 - 0xD13FFFFF | 0x000020A0 00000000 - 0x000020AF FFFFFFFF | |
Ins01 | 0x01 | 0 | 0x97 - 0xA6 | 0xB000 - 0xBFFF | 0xFFFFFFFF - 0x00000000 | 0xD1400000 - 0xD97FFFFF | 0x000020B0 00000000 - 0x000020BF FFFFFFFF | |
Ins02 | 0x04 | 0 | 0xA7 - 0xB6 | 0xC000 - 0xCFFF | 0xFFFFFFFF - 0x00000000 | 0xD9800000 - 0xE17FFFFF | 0x000020C0 00000000 - 0x000020CF FFFFFFFF | |
Ins03 | 0x03 | 0 | 0xB7 - 0xC6 | 0xD000 - 0xDFFF | 0xFFFFFFFF - 0x00000000 | 0xE1800000 - 0xE97FFFFF | 0x000020D0 00000000 - 0x000020DF FFFFFFFF | |
Ins04 | 0x05 | 0 | 0xC7 - 0xD6 | 0xE000 - 0xEFFF | 0xFFFFFFFF - 0x00000000 | 0xE9800000 - 0xF17FFFFF | 0x000020E0 00000000 - 0x000020EF FFFFFFFF | |
Ins05 | 0x02 | 0 | 0xD7 - 0xE6 | 0xF000 - 0xFFFF | 0xFFFFFFFF - 0x00000000 | 0xF1800000 - 0xF97FFFFF | 0x000020F0 00000000 - 0x000020FF FFFFFFFF | |
Ins06 | 0x06 | 0 | 0xFF - 0x00 | 0xFFFF - 0x0000 | 0xFFFFFFFF - 0x00000000 | 0xFFFFFFFF - 0x00000000 | 0xFFFFFFFF FFFFFFFF - 0x00000000 00000000 | |
Ins07 | 0x07 | 0 | 0xFF - 0x00 | 0xFFFF - 0x0000 | 0xFFFFFFFF - 0x00000000 | 0xFFFFFFFF - 0x00000000 | 0xFFFFFFFF FFFFFFFF - 0x00000000 00000000 | |
Ins08 | 0x08 | 0 | 0xE7 - 0xEB | 0xFFFF - 0x0000 | 0xFFFFFFFF - 0x00000000 | 0xF9800000 - 0xF9FFFFFF | 0x00002100 00000000 - 0x0000210F FFFFFFFF | |
Ins09 | 0x09 | 0 | 0xEC - 0xF0 | 0xFFFF - 0x0000 | 0xFFFFFFFF - 0x00000000 | 0xFA000000 - 0xFA7FFFFF | 0x00002110 00000000 - 0x0000211F FFFFFFFF | |
Ins10 | 0x0A | 0 | 0xF1 - 0xF5 | 0xFFFF - 0x0000 | 0xFFFFFFFF - 0x00000000 | 0xFA800000 - 0xFAFFFFFF | 0x00002120 00000000 - 0x0000212F FFFFFFFF | |
Ins11 | 0x0B | 0 | 0xF6 - 0xFA | 0xFFFF - 0x0000 | 0xFFFFFFFF - 0x00000000 | 0xFB000000 - 0xFB7FFFFF | 0x00002130 00000000 - 0x0000213F FFFFFFFF | |
Rsvd | 0x0C | 0 | 0xFB - 0xFD | 0xFFFF - 0x0000 | 0xFFFFFFFF - 0x00000000 | 0xFFFFFFFF - 0x00000000 | 0xFFFFFFFF FFFFFFFF - 0x00000000 00000000 | |
Ubox | 0x0D | 0 | 0xFE - 0xFF | 0xFFFF - 0x0000 | 0xFFFFFFFF - 0x00000000 | 0xFB800000 - 0xFBFFFFFF | 0xFFFFFFFF FFFFFFFF - 0x00000000 00000000 | |
******* Calculate Resource Allocation - END *******
******* Check for KTI Topology change across reset - START *******
******* Check for KTI Topology change across reset - END *******
******* Sync Up PBSPs - START *******
Setting Ubox Sticky to save KTI topology to 0x000000000000FF03
Verifying if the remote socket(s) checked-in.
packageBspStepping[0]=4
packageBspStepping[1]=4
******* Sync Up PBSPs - END *******
******* Program Mmcfg and bus numbers - START *******
Initiate S1 update
KtiVar->MmCfgBase = 0x80000000
KtiVar->segmentSocket[0] = 0x00
KtiVar->SocketFirstBus[0] = 0x00
KtiVar->SocketLastBus[0] = 0x7F
KtiVar->SocketMmCfgBase[0]= 0x80000000
KtiVar->segmentSocket[1] = 0x00
KtiVar->SocketFirstBus[1] = 0x80
KtiVar->SocketLastBus[1] = 0xFF
KtiVar->SocketMmCfgBase[1]= 0x80000000
Current bus numbers:
Socket | Ins00 | Ins01 | Ins02 | Ins03 | Ins04 | Ins05 | Ins06 | Ins07 | Ins08 | Ins09 | Ins0A | Ins0B | Rsvd | Ubox0 | Ubox1 | LastBus | Seg
-----------------------------------------------------------------------------------------------------------------------------------------------
0 | 0x00 | 0x15 | 0x26 | 0x37 | 0x48 | 0x59 | --- | --- | 0x6A | 0x6F | 0x74 | 0x79 | --- | 0x7E | 0x7F | 0x7F | 0
1 | 0x80 | 0x97 | 0xA7 | 0xB7 | 0xC7 | 0xD7 | --- | --- | 0xE7 | 0xEC | 0xF1 | 0xF6 | --- | 0xFE | 0xFF | 0xFF | 0
-----------------------------------------------------------------------------------------------------------------------------------------------
Wait for S1 to update
******* Program Mmcfg and bus numbers - END *******
Current Bars:
Socket | SCF | PCU | MEM0 | MEM1 | MEM2 | MEM3 | MEM4 | MEM5 | MEM6 | MEM7 | SBREG |
-------------------------------------------------------------------------------------------------------------------------------------------------------
0 | 0xC8800000 | 0xC8A00000 | 0xC8A80000 | 0xC8B00000 | 0xC8B80000 | 0xC8C00000 | 0xC8C80000 | 0xC8D00000 | 0xC8D80000 | 0xC8E00000 | 0xC8E80000 |
1 | 0xFB800000 | 0xFBA00000 | 0xFBA80000 | 0xFBB00000 | 0xFBB80000 | 0xFBC00000 | 0xFBC80000 | 0xFBD00000 | 0xFBD80000 | 0xFBE00000 | 0xFBE80000 |
-------------------------------------------------------------------------------------------------------------------------------------------------------
******* Full Speed Transition - START *******
Clearing KTI DFX Locks
****** S0p0 Program Eparams - START ******
S0 P0's Preset Coeff table, all lane table size: 0x0; per lane table size: 0x10
Per Lane Preset coeffcients Index table located for Socket 0 Link 0, RedriverStatus: 0
Socket 0 Port 0 : EPARAM entry programmed
IpUpiSetTxCoefficient(UpiAgent[0][0]): 4B01
****** S0p0 Program Eparams - END ******
****** S0p0 Program UniPhy Recipe - START ******
Socket 0 Port 0 : UPI EV Recipe v2.009 programmed
****** S0p0 Program UniPhy Recipe - END ******
IpUpiGetCapability(UpiAgent[0][0], id=12):
IpUpiVersionSpecificConfigurationEnabled: unknown ID=2
IpWrError 0 49
IpUpiSpeedChangePart1(UpiAgent[0][0]):
IpUpiVersionSpecificConfigurationEnabled: unknown ID=1
IpWrError 0 49
IpUpiVersionSpecificConfigurationEnabled: unknown ID=3
IpWrError 0 49
IpUpiVersionSpecificConfigurationEnabled: unknown ID=4
IpWrError 0 49
IpUpiVersionSpecificConfigurationEnabled: unknown ID=6
IpWrError 0 49
IpUpiDfxSetValue(0, 4, 0x8A)
****** S0p1 Program Eparams - START ******
S0 P1's Preset Coeff table, all lane table size: 0x0; per lane table size: 0x10
Per Lane Preset coeffcients Index table located for Socket 0 Link 1, RedriverStatus: 0
Socket 0 Port 1 : EPARAM entry programmed
IpUpiSetTxCoefficient(UpiAgent[0][1]): 4B01
****** S0p1 Program Eparams - END ******
****** S0p1 Program UniPhy Recipe - START ******
Socket 0 Port 1 : UPI EV Recipe v2.009 programmed
****** S0p1 Program UniPhy Recipe - END ******
IpUpiGetCapability(UpiAgent[0][1], id=12):
IpUpiVersionSpecificConfigurationEnabled: unknown ID=2
IpWrError 0 49
IpUpiSpeedChangePart1(UpiAgent[0][1]):
IpUpiVersionSpecificConfigurationEnabled: unknown ID=1
IpWrError 0 49
IpUpiVersionSpecificConfigurationEnabled: unknown ID=3
IpWrError 0 49
IpUpiVersionSpecificConfigurationEnabled: unknown ID=4
IpWrError 0 49
IpUpiVersionSpecificConfigurationEnabled: unknown ID=6
IpWrError 0 49
IpUpiDfxSetValue(0, 4, 0x8A)
****** S0p2 Program Eparams - START ******
S0 P2's Preset Coeff table, all lane table size: 0x0; per lane table size: 0x10
Per Lane Preset coeffcients Index table located for Socket 0 Link 2, RedriverStatus: 0
Socket 0 Port 2 : EPARAM entry programmed
IpUpiSetTxCoefficient(UpiAgent[0][2]): 4B01
****** S0p2 Program Eparams - END ******
****** S0p2 Program UniPhy Recipe - START ******
Socket 0 Port 2 : UPI EV Recipe v2.009 programmed
****** S0p2 Program UniPhy Recipe - END ******
IpUpiGetCapability(UpiAgent[0][2], id=12):
IpUpiVersionSpecificConfigurationEnabled: unknown ID=2
IpWrError 0 49
IpUpiSpeedChangePart1(UpiAgent[0][2]):
IpUpiVersionSpecificConfigurationEnabled: unknown ID=1
IpWrError 0 49
IpUpiVersionSpecificConfigurationEnabled: unknown ID=3
IpWrError 0 49
IpUpiVersionSpecificConfigurationEnabled: unknown ID=4
IpWrError 0 49
IpUpiVersionSpecificConfigurationEnabled: unknown ID=6
IpWrError 0 49
IpUpiDfxSetValue(0, 4, 0x8A)
****** S0p3 Program Eparams - START ******
S0 P3's Preset Coeff table, all lane table size: 0x0; per lane table size: 0x10
Per Lane Preset coeffcients Index table located for Socket 0 Link 3, RedriverStatus: 0
Socket 0 Port 3 : EPARAM entry programmed
IpUpiSetTxCoefficient(UpiAgent[0][3]): 4B01
****** S0p3 Program Eparams - END ******
****** S0p3 Program UniPhy Recipe - START ******
Socket 0 Port 3 : UPI EV Recipe v2.009 programmed
****** S0p3 Program UniPhy Recipe - END ******
IpUpiGetCapability(UpiAgent[0][3], id=12):
IpUpiVersionSpecificConfigurationEnabled: unknown ID=2
IpWrError 0 49
IpUpiSpeedChangePart1(UpiAgent[0][3]):
IpUpiVersionSpecificConfigurationEnabled: unknown ID=1
IpWrError 0 49
IpUpiVersionSpecificConfigurationEnabled: unknown ID=3
IpWrError 0 49
IpUpiVersionSpecificConfigurationEnabled: unknown ID=4
IpWrError 0 49
IpUpiVersionSpecificConfigurationEnabled: unknown ID=6
IpWrError 0 49
IpUpiDfxSetValue(0, 4, 0x8A)
****** S1p0 Program Eparams - START ******
S1 P0's Preset Coeff table, all lane table size: 0x0; per lane table size: 0x10
Per Lane Preset coeffcients Index table located for Socket 1 Link 0, RedriverStatus: 0
Socket 1 Port 0 : EPARAM entry programmed
IpUpiSetTxCoefficient(UpiAgent[1][0]): 4B01
****** S1p0 Program Eparams - END ******
****** S1p0 Program UniPhy Recipe - START ******
Socket 1 Port 0 : UPI EV Recipe v2.009 programmed
****** S1p0 Program UniPhy Recipe - END ******
IpUpiGetCapability(UpiAgent[1][0], id=12):
IpUpiVersionSpecificConfigurationEnabled: unknown ID=2
IpWrError 0 49
IpUpiSpeedChangePart1(UpiAgent[1][0]):
IpUpiVersionSpecificConfigurationEnabled: unknown ID=1
IpWrError 0 49
IpUpiVersionSpecificConfigurationEnabled: unknown ID=3
IpWrError 0 49
IpUpiVersionSpecificConfigurationEnabled: unknown ID=4
IpWrError 0 49
IpUpiVersionSpecificConfigurationEnabled: unknown ID=6
IpWrError 0 49
IpUpiDfxSetValue(0, 4, 0x8A)
****** S1p1 Program Eparams - START ******
S1 P1's Preset Coeff table, all lane table size: 0x0; per lane table size: 0x10
Per Lane Preset coeffcients Index table located for Socket 1 Link 1, RedriverStatus: 0
Socket 1 Port 1 : EPARAM entry programmed
IpUpiSetTxCoefficient(UpiAgent[1][1]): 4B01
****** S1p1 Program Eparams - END ******
****** S1p1 Program UniPhy Recipe - START ******
Socket 1 Port 1 : UPI EV Recipe v2.009 programmed
****** S1p1 Program UniPhy Recipe - END ******
IpUpiGetCapability(UpiAgent[1][1], id=12):
IpUpiVersionSpecificConfigurationEnabled: unknown ID=2
IpWrError 0 49
IpUpiSpeedChangePart1(UpiAgent[1][1]):
IpUpiVersionSpecificConfigurationEnabled: unknown ID=1
IpWrError 0 49
IpUpiVersionSpecificConfigurationEnabled: unknown ID=3
IpWrError 0 49
IpUpiVersionSpecificConfigurationEnabled: unknown ID=4
IpWrError 0 49
IpUpiVersionSpecificConfigurationEnabled: unknown ID=6
IpWrError 0 49
IpUpiDfxSetValue(0, 4, 0x8A)
****** S1p2 Program Eparams - START ******
S1 P2's Preset Coeff table, all lane table size: 0x0; per lane table size: 0x10
Per Lane Preset coeffcients Index table located for Socket 1 Link 2, RedriverStatus: 0
Socket 1 Port 2 : EPARAM entry programmed
IpUpiSetTxCoefficient(UpiAgent[1][2]): 4B01
****** S1p2 Program Eparams - END ******
****** S1p2 Program UniPhy Recipe - START ******
Socket 1 Port 2 : UPI EV Recipe v2.009 programmed
****** S1p2 Program UniPhy Recipe - END ******
IpUpiGetCapability(UpiAgent[1][2], id=12):
IpUpiVersionSpecificConfigurationEnabled: unknown ID=2
IpWrError 0 49
IpUpiSpeedChangePart1(UpiAgent[1][2]):
IpUpiVersionSpecificConfigurationEnabled: unknown ID=1
IpWrError 0 49
IpUpiVersionSpecificConfigurationEnabled: unknown ID=3
IpWrError 0 49
IpUpiVersionSpecificConfigurationEnabled: unknown ID=4
IpWrError 0 49
IpUpiVersionSpecificConfigurationEnabled: unknown ID=6
IpWrError 0 49
IpUpiDfxSetValue(0, 4, 0x8A)
****** S1p3 Program Eparams - START ******
S1 P3's Preset Coeff table, all lane table size: 0x0; per lane table size: 0x10
Per Lane Preset coeffcients Index table located for Socket 1 Link 3, RedriverStatus: 0
Socket 1 Port 3 : EPARAM entry programmed
IpUpiSetTxCoefficient(UpiAgent[1][3]): 4B01
****** S1p3 Program Eparams - END ******
****** S1p3 Program UniPhy Recipe - START ******
Socket 1 Port 3 : UPI EV Recipe v2.009 programmed
****** S1p3 Program UniPhy Recipe - END ******
IpUpiGetCapability(UpiAgent[1][3], id=12):
IpUpiVersionSpecificConfigurationEnabled: unknown ID=2
IpWrError 0 49
IpUpiSpeedChangePart1(UpiAgent[1][3]):
IpUpiVersionSpecificConfigurationEnabled: unknown ID=1
IpWrError 0 49
IpUpiVersionSpecificConfigurationEnabled: unknown ID=3
IpWrError 0 49
IpUpiVersionSpecificConfigurationEnabled: unknown ID=4
IpWrError 0 49
IpUpiVersionSpecificConfigurationEnabled: unknown ID=6
IpWrError 0 49
IpUpiDfxSetValue(0, 4, 0x8A)
Dispatching the APs to do Kti Speed Transition.
Dispatching the AP 1's for switching to the AllLinksRatio: 14141414IpUpiSpeedChangePart2(UpiAgent[0][0]):
IpUpiSpeedChangePart2a(UpiAgent[0][0]):
IpUpiSpeedChangePart2b(UpiAgent[0][0]):
IpUpiSpeedChangePart2(UpiAgent[0][1]):
IpUpiSpeedChangePart2a(UpiAgent[0][1]):
IpUpiSpeedChangePart2b(UpiAgent[0][1]):
IpUpiSpeedChangePart2(UpiAgent[0][2]):
IpUpiSpeedChangePart2a(UpiAgent[0][2]):
IpUpiSpeedChangePart2b(UpiAgent[0][2]):
IpUpiSpeedChangePart2(UpiAgent[0][3]):
IpUpiSpeedChangePart2a(UpiAgent[0][3]):
IpUpiSpeedChangePart2b(UpiAgent[0][3]):
IpUpiSpeedChangePart3(UpiAgent[0][0]):
IpUpiSpeedChangePart3(UpiAgent[0][1]):
IpUpiSpeedChangePart3(UpiAgent[0][2]):
IpUpiSpeedChangePart3(UpiAgent[0][3]):
Socket 0 KTI Link 0 Freq is currently 16.0GT.
Socket 0 KTI Link 1 Freq is currently 16.0GT.
Socket 0 KTI Link 2 Freq is currently 16.0GT.
Socket 0 KTI Link 3 Freq is currently 16.0GT.
Socket 1 KTI Link 0 Freq is currently 16.0GT.
Socket 1 KTI Link 1 Freq is currently 16.0GT.
Socket 1 KTI Link 2 Freq is currently 16.0GT.
Socket 1 KTI Link 3 Freq is currently 16.0GT.
******* Full Speed Transition - END *******
******* Phy/Link Updates On Warm Reset - START *******
******* Phy/Link Updates On Warm Reset - END *******
******* Topology Discovery and Optimum Route Calculation - START *******
Locating the Rings Present in the Topology
No Rings Found
Constructing Topology Tree
Adjacency Table
----------------
S0 P0 VN0 TX (00) : S1 P0 VN0 RX (17)
S0 P0 VN0 RX (01) :
S1 P0 VN0 TX (16) : S0 P0 VN0 RX (01)
S1 P0 VN0 RX (17) :
Checking for Deadlock...
CPU0 Topology Tree
-------------------
Index Socket ParentSocket ParentPort ParentIndex Hop XOR
00 CPU0 -- -- -- 0 --
01 CPU1 CPU0 00 00 1 0
CPU1 Topology Tree
-------------------
Index Socket ParentSocket ParentPort ParentIndex Hop XOR
00 CPU1 -- -- -- 0 --
01 CPU0 CPU1 00 00 1 0
"S0 P0 VN0 TX" -> "S1 P0 VN0 RX";
"S1 P0 VN0 TX" -> "S0 P0 VN0 RX";
Calculating Route for CPU0
Calculating Route for CPU1
CPU0 Routing Table (UPI_ROUTING_TABLE*_CHA)
----------------------------------------------------
DestSocket Port
CPU1 0
1
2
3
CPU1 Routing Table (UPI_ROUTING_TABLE*_CHA)
----------------------------------------------------
DestSocket Port
CPU0 0
1
2
3
CPU0 M3KTI Route Table (M3KKRT*_M3KTI_MAIN_REG)
----------------------------------------------------------------
InPort M3KtiNum CPU0 CPU1 CPU2 CPU3 CPU4 CPU5 CPU6 CPU7
0 0 3 0 - -
1 1 3 0 - -
2 2 3 0 - -
3 3 3 0 - -
CPU1 M3KTI Route Table (M3KKRT*_M3KTI_MAIN_REG)
----------------------------------------------------------------
InPort M3KtiNum CPU0 CPU1 CPU2 CPU3 CPU4 CPU5 CPU6 CPU7
0 0 0 3 - -
1 1 0 3 - -
2 2 0 3 - -
3 3 0 3 - -
******* Topology Discovery and Optimum Route Calculation - END *******
******* Program Final IO SAD Setting - START *******
Current Bars:
Socket | SCF | PCU | MEM0 | MEM1 | MEM2 | MEM3 | MEM4 | MEM5 | MEM6 | MEM7 | SBREG |
-------------------------------------------------------------------------------------------------------------------------------------------------------
0 | 0xC8800000 | 0xC8A00000 | 0xC8A80000 | 0xC8B00000 | 0xC8B80000 | 0xC8C00000 | 0xC8C80000 | 0xC8D00000 | 0xC8D80000 | 0xC8E00000 | 0xC8E80000 |
1 | 0xFB800000 | 0xFBA00000 | 0xFBA80000 | 0xFBB00000 | 0xFBB80000 | 0xFBC00000 | 0xFBC80000 | 0xFBD00000 | 0xFBD80000 | 0xFBE00000 | 0xFBE80000 |
-------------------------------------------------------------------------------------------------------------------------------------------------------
******* Program Final IO SAD Setting - END *******
******* Program Optimum Route Table Settings - START *******
[WARNING]: S0 StackIdx:0 Read of side band register R2PGNCTRL returned 0
[WARNING]: S0 StackIdx:1 Read of side band register R2PGNCTRL returned 0
[WARNING]: S0 StackIdx:2 Read of side band register R2PGNCTRL returned 0
[WARNING]: S0 StackIdx:3 Read of side band register R2PGNCTRL returned 0
[WARNING]: S0 StackIdx:4 Read of side band register R2PGNCTRL returned 0
[WARNING]: S0 StackIdx:5 Read of side band register R2PGNCTRL returned 0
[WARNING]: S0 StackIdx:8 Read of side band register R2PGNCTRL returned 0
[WARNING]: S0 StackIdx:9 Read of side band register R2PGNCTRL returned 0
[WARNING]: S0 StackIdx:10 Read of side band register R2PGNCTRL returned 0
[WARNING]: S0 StackIdx:11 Read of side band register R2PGNCTRL returned 0
[WARNING]: S1 StackIdx:0 Read of side band register R2PGNCTRL returned 0
[WARNING]: S1 StackIdx:1 Read of side band register R2PGNCTRL returned 0
[WARNING]: S1 StackIdx:2 Read of side band register R2PGNCTRL returned 0
[WARNING]: S1 StackIdx:3 Read of side band register R2PGNCTRL returned 0
[WARNING]: S1 StackIdx:4 Read of side band register R2PGNCTRL returned 0
[WARNING]: S1 StackIdx:5 Read of side band register R2PGNCTRL returned 0
[WARNING]: S1 StackIdx:8 Read of side band register R2PGNCTRL returned 0
[WARNING]: S1 StackIdx:9 Read of side band register R2PGNCTRL returned 0
[WARNING]: S1 StackIdx:10 Read of side band register R2PGNCTRL returned 0
[WARNING]: S1 StackIdx:11 Read of side band register R2PGNCTRL returned 0
******* Program Optimum Route Table Settings - END *******
******* Program Misc. KTI Parameters - START *******
Dispatching the AP 1's for m2upi meshcreditupdate: FBE8000F
******* Program Misc. KTI Parameters - END *******
******* Program System Coherency Registers - START *******
******* Program System Coherency Registers - END *******
******* Check for S3 Resume - START *******
******* Check for S3 Resume - END *******
******* SNC Misc and Recovery - START *******
OutNumOfCluster = 4, FullSncEnable=1, SncIndEnable=1, NumClusters=3
OutNumOfCluster = 4, FullSncEnable=1, SncIndEnable=1, NumClusters=3
******* SNC Misc and Recovery - END *******
******* Collect Previous Boot Error - START *******
******* Collect Previous Boot Error - END *******
Setup Uncore Misc:
Write Socket 0 GLOBAL_PKG_C_S_CONTROL_REGISTER = 4
Write Socket 1 GLOBAL_PKG_C_S_CONTROL_REGISTER = 100
:INIT - BIOS_RESET_CPL: Set CPL1 on #S1
:INIT - BIOS_RESET_CPL: Set CPL1 on #S0
Initalize DMI RCRB region.
SetRcrbBar (): RcrbBase = 0x90000000
Warning: Created a Memory Hole: 0x90002000 ~ 0x9001FFFF
MEMBAR0: Base = 0x90020000, Size = 0x20000
Socket: 0;DMI MemBar locates on 0x90020000, Size: 0x20000
ProgramSncConfigureInChaBeforeMemoryReady
Socket0: NumOfCluster=4, UmaEn=0, BaseChaOfCluster1=13, BaseChaOfCluster2=26, BaseChaOfCluster3=39
Socket1: NumOfCluster=4, UmaEn=0, BaseChaOfCluster1=13, BaseChaOfCluster2=26, BaseChaOfCluster3=39
******* Configure M2IOSF P2P Credits - START *******
Soc 0, Shared P2P BL VNA credits: 59595959, 5959, 59595959, 61616161.
Soc 1, Shared P2P BL VNA credits: 59595959, 5959, 59595959, 61616161.
******* Configure M2IOSF P2P Credits - END *******
*******SOCKET1 STACKID SWAPPING - START *******
*******SOCKET1 STACKID SWAPPING - END *******
Current bus numbers:
Socket | Ins00 | Ins01 | Ins02 | Ins03 | Ins04 | Ins05 | Ins06 | Ins07 | Ins08 | Ins09 | Ins0A | Ins0B | Rsvd | Ubox0 | Ubox1 | LastBus | Seg
-----------------------------------------------------------------------------------------------------------------------------------------------
0 | 0x00 | 0x15 | 0x26 | 0x37 | 0x48 | 0x59 | --- | --- | 0x6A | 0x6F | 0x74 | 0x79 | --- | 0x7E | 0x7F | 0x7F | 0
1 | --- | 0x97 | 0xA7 | 0xB7 | 0xC7 | 0xD7 | 0x80 | --- | 0xE7 | 0xEC | 0xF1 | 0xF6 | --- | 0xFE | 0xFF | 0xFF | 0
-----------------------------------------------------------------------------------------------------------------------------------------------
Get FM_PCIE_FV_BIF_EN Status = Success, GpioVal = 0
******* Initialize CXL - START *******
CXL: IIO EarlyLink Init Start.
HcxType[0] = NONE
[IIO](VMD) [0] VMD disabled for RPs init.
Program HW_INIT using SB access
Program HW_INIT using SB access
Program HW_INIT using SB access
Program HW_INIT using SB access
Program HW_INIT using SB access
Program HW_INIT using SB access
Program HW_INIT using SB access
Program HW_INIT using SB access
Program HW_INIT using SB access
[0] Cpxsmb enabled
MS2IOSF_BANK_DECODER_INIT_START
MS2IOSF BankDecoder: TableSize 119, Recipe Revision 1.16
Hiding DSA Psf1DsaConfig: 0
Hiding DSA Psf1DsaConfig: 0
Hiding DSA Psf1DsaConfig: 0
Hiding DSA Psf1DsaConfig: 0
Hiding DSA Psf1DsaConfig: 100
Hiding DSA Psf1DsaConfig: 100
Hiding DSA Psf1DsaConfig: 100
Hiding DSA Psf1DsaConfig: 100
Hiding DSA Psf1DsaConfig: 100
Hiding DSA Psf1DsaConfig: 100
Hiding DSA Psf1DsaConfig: 100
Hiding DSA Psf1DsaConfig: 100
Hiding DSA Psf1DsaConfig: 100
Hiding DSA Psf1DsaConfig: 100
Hiding DSA Psf1DsaConfig: 100
Hiding DSA Psf1DsaConfig: 100
Hiding DSA Psf1DsaConfig: 100
Hiding DSA Psf1DsaConfig: 100
Hiding DSA Psf1DsaConfig: 100
Hiding DSA Psf1DsaConfig: 100
Hiding DSA Psf1DsaConfig: 100
Hiding DSA Psf1DsaConfig: 100
Hiding DSA Psf1DsaConfig: 100
Hiding DSA Psf1DsaConfig: 100
Hiding DSA Psf1DsaConfig: 100
Hiding DSA Psf1DsaConfig: 100
Hiding DSA Psf1DsaConfig: 100
Hiding DSA Psf1DsaConfig: 100
Hiding DSA Psf1DsaConfig: 100
Hiding DSA Psf1DsaConfig: 100
Hiding DSA Psf1DsaConfig: 100
Hiding DSA Psf1DsaConfig: 100
Hiding DSA Psf1DsaConfig: 100
Hiding DSA Psf1DsaConfig: 100
Hiding DSA Psf1DsaConfig: 100
Hiding DSA Psf1DsaConfig: 100
Hiding DSA Psf1DsaConfig: 100
Hiding DSA Psf1DsaConfig: 100
Hiding DSA Psf1DsaConfig: 100
Hiding DSA Psf1DsaConfig: 100
Hiding DSA Psf1DsaConfig: 100
Hiding DSA Psf1DsaConfig: 100
Hiding DSA Psf1DsaConfig: 100
Hiding DSA Psf1DsaConfig: 100
Hiding DSA Psf1DsaConfig: 100
Hiding DSA Psf1DsaConfig: 100
Hiding DSA Psf1DsaConfig: 100
Hiding DSA Psf1DsaConfig: 100
Hiding DSA Psf1DsaConfig: 100
Hiding DSA Psf1DsaConfig: 100
Hiding DSA Psf1DsaConfig: 100
Hiding DSA Psf1DsaConfig: 100
Hiding DSA Psf1DsaConfig: 100
Hiding DSA Psf1DsaConfig: 100
Hiding DSA Psf1DsaConfig: 100
Hiding DSA Psf1DsaConfig: 100
Hiding IAX Psf1IaxConfig: 0
Hiding IAX Psf1IaxConfig: 0
Hiding IAX Psf1IaxConfig: 0
Hiding IAX Psf1IaxConfig: 0
Hiding IAX Psf1IaxConfig: 100
Hiding IAX Psf1IaxConfig: 100
Hiding IAX Psf1IaxConfig: 100
Hiding IAX Psf1IaxConfig: 100
Hiding IAX Psf1IaxConfig: 100
Hiding IAX Psf1IaxConfig: 100
Hiding IAX Psf1IaxConfig: 100
Hiding IAX Psf1IaxConfig: 100
Hiding IAX Psf1IaxConfig: 100
Hiding IAX Psf1IaxConfig: 100
Hiding IAX Psf1IaxConfig: 100
Hiding IAX Psf1IaxConfig: 100
Hiding IAX Psf1IaxConfig: 100
Hiding IAX Psf1IaxConfig: 100
Hiding IAX Psf1IaxConfig: 100
Hiding IAX Psf1IaxConfig: 100
Hiding IAX Psf1IaxConfig: 100
Hiding IAX Psf1IaxConfig: 100
Hiding IAX Psf1IaxConfig: 100
Hiding IAX Psf1IaxConfig: 100
Hiding IAX Psf1IaxConfig: 100
Hiding IAX Psf1IaxConfig: 100
Hiding IAX Psf1IaxConfig: 100
Hiding IAX Psf1IaxConfig: 100
Hiding IAX Psf1IaxConfig: 100
Hiding IAX Psf1IaxConfig: 100
Hiding IAX Psf1IaxConfig: 100
Hiding IAX Psf1IaxConfig: 100
Hiding IAX Psf1IaxConfig: 100
Hiding IAX Psf1IaxConfig: 100
Hiding IAX Psf1IaxConfig: 100
Hiding IAX Psf1IaxConfig: 100
Hiding IAX Psf1IaxConfig: 100
Hiding IAX Psf1IaxConfig: 100
Hiding IAX Psf1IaxConfig: 100
Hiding IAX Psf1IaxConfig: 100
Hiding IAX Psf1IaxConfig: 100
Hiding IAX Psf1IaxConfig: 100
Hiding IAX Psf1IaxConfig: 100
Hiding IAX Psf1IaxConfig: 100
Hiding IAX Psf1IaxConfig: 100
Hiding IAX Psf1IaxConfig: 100
Hiding IAX Psf1IaxConfig: 100
Hiding IAX Psf1IaxConfig: 100
Hiding IAX Psf1IaxConfig: 100
Hiding IAX Psf1IaxConfig: 100
Hiding IAX Psf1IaxConfig: 100
Hiding IAX Psf1IaxConfig: 100
Hiding IAX Psf1IaxConfig: 100
Hiding IAX Psf1IaxConfig: 100
Hiding IAX Psf1IaxConfig: 100
Hiding IAX Psf1IaxConfig: 100
MS2IOSF_BANK_DECODER_INIT_END
[0 p0] DMI device is enabled
[0.1 p1] 00:15:01.0: PCI device 8086:352A is enabled
[0.1 p2] 00:15:02.0: PCI device FFFF:FFFF is disabled (not present)
[0.1 p3] 00:15:03.0: PCI device FFFF:FFFF is disabled (not present)
[0.1 p4] 00:15:04.0: PCI device FFFF:FFFF is disabled (not present)
[0.1 p5] 00:15:05.0: PCI device FFFF:FFFF is disabled (not present)
[0.1 p6] 00:15:06.0: PCI device FFFF:FFFF is disabled (not present)
[0.1 p7] 00:15:07.0: PCI device FFFF:FFFF is disabled (not present)
[0.1 p8] 00:15:08.0: PCI device FFFF:FFFF is disabled (not present)
[0.2 p9] 00:26:01.0: PCI device 8086:352A is enabled
[0.2 p10] 00:26:02.0: PCI device FFFF:FFFF is disabled (not present)
[0.2 p11] 00:26:03.0: PCI device FFFF:FFFF is disabled (not present)
[0.2 p12] 00:26:04.0: PCI device FFFF:FFFF is disabled (not present)
[0.2 p13] 00:26:05.0: PCI device FFFF:FFFF is disabled (not present)
[0.2 p14] 00:26:06.0: PCI device FFFF:FFFF is disabled (not present)
[0.2 p15] 00:26:07.0: PCI device FFFF:FFFF is disabled (not present)
[0.2 p16] 00:26:08.0: PCI device FFFF:FFFF is disabled (not present)
[0.3 p17] 00:37:01.0: PCI device 8086:352A is enabled
[0.3 p18] 00:37:02.0: PCI device FFFF:FFFF is disabled (not present)
[0.3 p19] 00:37:03.0: PCI device FFFF:FFFF is disabled (not present)
[0.3 p20] 00:37:04.0: PCI device FFFF:FFFF is disabled (not present)
[0.3 p21] 00:37:05.0: PCI device FFFF:FFFF is disabled (not present)
[0.3 p22] 00:37:06.0: PCI device FFFF:FFFF is disabled (not present)
[0.3 p23] 00:37:07.0: PCI device FFFF:FFFF is disabled (not present)
[0.3 p24] 00:37:08.0: PCI device FFFF:FFFF is disabled (not present)
[0.4 p25] 00:48:01.0: PCI device 8086:352A is enabled
[0.4 p26] 00:48:02.0: PCI device FFFF:FFFF is disabled (not present)
[0.4 p27] 00:48:03.0: PCI device 8086:352B is enabled
[0.4 p28] 00:48:04.0: PCI device FFFF:FFFF is disabled (not present)
[0.4 p29] 00:48:05.0: PCI device 8086:352C is enabled
[0.4 p30] 00:48:06.0: PCI device FFFF:FFFF is disabled (not present)
[0.4 p31] 00:48:07.0: PCI device 8086:352D is enabled
[0.4 p32] 00:48:08.0: PCI device FFFF:FFFF is disabled (not present)
[0.5 p33] 00:59:01.0: PCI device 8086:352A is enabled
[0.5 p34] 00:59:02.0: PCI device FFFF:FFFF is disabled (not present)
[0.5 p35] 00:59:03.0: PCI device 8086:352B is enabled
[0.5 p36] 00:59:04.0: PCI device FFFF:FFFF is disabled (not present)
[0.5 p37] 00:59:05.0: PCI device 8086:352C is enabled
[0.5 p38] 00:59:06.0: PCI device FFFF:FFFF is disabled (not present)
[0.5 p39] 00:59:07.0: PCI device 8086:352D is enabled
[0.5 p40] 00:59:08.0: PCI device FFFF:FFFF is disabled (not present)
WARNING: Platform does not support uplink port!
HcxType[1] = NONE
[IIO](VMD) [1] VMD disabled for RPs init.
Program HW_INIT using SB access
Program HW_INIT using SB access
Program HW_INIT using SB access
Program HW_INIT using SB access
Program HW_INIT using SB access
Program HW_INIT using SB access
Program HW_INIT using SB access
Program HW_INIT using SB access
Program HW_INIT using SB access
Program HW_INIT using SB access
[1] Cpxsmb enabled
MS2IOSF_BANK_DECODER_INIT_START
MS2IOSF BankDecoder: TableSize 119, Recipe Revision 1.16
Hiding DSA Psf1DsaConfig: 0
Hiding DSA Psf1DsaConfig: 0
Hiding DSA Psf1DsaConfig: 0
Hiding DSA Psf1DsaConfig: 0
Hiding DSA Psf1DsaConfig: 100
Hiding DSA Psf1DsaConfig: 100
Hiding DSA Psf1DsaConfig: 100
Hiding DSA Psf1DsaConfig: 100
Hiding DSA Psf1DsaConfig: 100
Hiding DSA Psf1DsaConfig: 100
Hiding DSA Psf1DsaConfig: 100
Hiding DSA Psf1DsaConfig: 100
Hiding DSA Psf1DsaConfig: 100
Hiding DSA Psf1DsaConfig: 100
Hiding DSA Psf1DsaConfig: 100
Hiding DSA Psf1DsaConfig: 100
Hiding DSA Psf1DsaConfig: 100
Hiding DSA Psf1DsaConfig: 100
Hiding DSA Psf1DsaConfig: 100
Hiding DSA Psf1DsaConfig: 100
Hiding DSA Psf1DsaConfig: 100
Hiding DSA Psf1DsaConfig: 100
Hiding DSA Psf1DsaConfig: 100
Hiding DSA Psf1DsaConfig: 100
Hiding DSA Psf1DsaConfig: 100
Hiding DSA Psf1DsaConfig: 100
Hiding DSA Psf1DsaConfig: 100
Hiding DSA Psf1DsaConfig: 100
Hiding DSA Psf1DsaConfig: 100
Hiding DSA Psf1DsaConfig: 100
Hiding DSA Psf1DsaConfig: 100
Hiding DSA Psf1DsaConfig: 100
Hiding DSA Psf1DsaConfig: 100
Hiding DSA Psf1DsaConfig: 100
Hiding DSA Psf1DsaConfig: 100
Hiding DSA Psf1DsaConfig: 100
Hiding DSA Psf1DsaConfig: 100
Hiding DSA Psf1DsaConfig: 100
Hiding DSA Psf1DsaConfig: 100
Hiding DSA Psf1DsaConfig: 100
Hiding DSA Psf1DsaConfig: 100
Hiding DSA Psf1DsaConfig: 100
Hiding DSA Psf1DsaConfig: 100
Hiding DSA Psf1DsaConfig: 100
Hiding DSA Psf1DsaConfig: 100
Hiding DSA Psf1DsaConfig: 100
Hiding DSA Psf1DsaConfig: 100
Hiding DSA Psf1DsaConfig: 100
Hiding DSA Psf1DsaConfig: 100
Hiding DSA Psf1DsaConfig: 100
Hiding DSA Psf1DsaConfig: 100
Hiding DSA Psf1DsaConfig: 100
Hiding DSA Psf1DsaConfig: 100
Hiding DSA Psf1DsaConfig: 100
Hiding DSA Psf1DsaConfig: 100
Hiding DSA Psf1DsaConfig: 100
Hiding IAX Psf1IaxConfig: 0
Hiding IAX Psf1IaxConfig: 0
Hiding IAX Psf1IaxConfig: 0
Hiding IAX Psf1IaxConfig: 0
Hiding IAX Psf1IaxConfig: 100
Hiding IAX Psf1IaxConfig: 100
Hiding IAX Psf1IaxConfig: 100
Hiding IAX Psf1IaxConfig: 100
Hiding IAX Psf1IaxConfig: 100
Hiding IAX Psf1IaxConfig: 100
Hiding IAX Psf1IaxConfig: 100
Hiding IAX Psf1IaxConfig: 100
Hiding IAX Psf1IaxConfig: 100
Hiding IAX Psf1IaxConfig: 100
Hiding IAX Psf1IaxConfig: 100
Hiding IAX Psf1IaxConfig: 100
Hiding IAX Psf1IaxConfig: 100
Hiding IAX Psf1IaxConfig: 100
Hiding IAX Psf1IaxConfig: 100
Hiding IAX Psf1IaxConfig: 100
Hiding IAX Psf1IaxConfig: 100
Hiding IAX Psf1IaxConfig: 100
Hiding IAX Psf1IaxConfig: 100
Hiding IAX Psf1IaxConfig: 100
Hiding IAX Psf1IaxConfig: 100
Hiding IAX Psf1IaxConfig: 100
Hiding IAX Psf1IaxConfig: 100
Hiding IAX Psf1IaxConfig: 100
Hiding IAX Psf1IaxConfig: 100
Hiding IAX Psf1IaxConfig: 100
Hiding IAX Psf1IaxConfig: 100
Hiding IAX Psf1IaxConfig: 100
Hiding IAX Psf1IaxConfig: 100
Hiding IAX Psf1IaxConfig: 100
Hiding IAX Psf1IaxConfig: 100
Hiding IAX Psf1IaxConfig: 100
Hiding IAX Psf1IaxConfig: 100
Hiding IAX Psf1IaxConfig: 100
Hiding IAX Psf1IaxConfig: 100
Hiding IAX Psf1IaxConfig: 100
Hiding IAX Psf1IaxConfig: 100
Hiding IAX Psf1IaxConfig: 100
Hiding IAX Psf1IaxConfig: 100
Hiding IAX Psf1IaxConfig: 100
Hiding IAX Psf1IaxConfig: 100
Hiding IAX Psf1IaxConfig: 100
Hiding IAX Psf1IaxConfig: 100
Hiding IAX Psf1IaxConfig: 100
Hiding IAX Psf1IaxConfig: 100
Hiding IAX Psf1IaxConfig: 100
Hiding IAX Psf1IaxConfig: 100
Hiding IAX Psf1IaxConfig: 100
Hiding IAX Psf1IaxConfig: 100
Hiding IAX Psf1IaxConfig: 100
Hiding IAX Psf1IaxConfig: 100
Hiding IAX Psf1IaxConfig: 100
MS2IOSF_BANK_DECODER_INIT_END
[1.1 p1] 00:97:01.0: PCI device 8086:352A is enabled
[1.1 p2] 00:97:02.0: PCI device FFFF:FFFF is disabled (not present)
[1.1 p3] 00:97:03.0: PCI device FFFF:FFFF is disabled (not present)
[1.1 p4] 00:97:04.0: PCI device FFFF:FFFF is disabled (not present)
[1.1 p5] 00:97:05.0: PCI device FFFF:FFFF is disabled (not present)
[1.1 p6] 00:97:06.0: PCI device FFFF:FFFF is disabled (not present)
[1.1 p7] 00:97:07.0: PCI device FFFF:FFFF is disabled (not present)
[1.1 p8] 00:97:08.0: PCI device FFFF:FFFF is disabled (not present)
[1.2 p9] 00:A7:01.0: PCI device 8086:352A is enabled
[1.2 p10] 00:A7:02.0: PCI device FFFF:FFFF is disabled (not present)
[1.2 p11] 00:A7:03.0: PCI device FFFF:FFFF is disabled (not present)
[1.2 p12] 00:A7:04.0: PCI device FFFF:FFFF is disabled (not present)
[1.2 p13] 00:A7:05.0: PCI device FFFF:FFFF is disabled (not present)
[1.2 p14] 00:A7:06.0: PCI device FFFF:FFFF is disabled (not present)
[1.2 p15] 00:A7:07.0: PCI device FFFF:FFFF is disabled (not present)
[1.2 p16] 00:A7:08.0: PCI device FFFF:FFFF is disabled (not present)
[1.3 p17] 00:B7:01.0: PCI device 8086:352A is enabled
[1.3 p18] 00:B7:02.0: PCI device FFFF:FFFF is disabled (not present)
[1.3 p19] 00:B7:03.0: PCI device FFFF:FFFF is disabled (not present)
[1.3 p20] 00:B7:04.0: PCI device FFFF:FFFF is disabled (not present)
[1.3 p21] 00:B7:05.0: PCI device FFFF:FFFF is disabled (not present)
[1.3 p22] 00:B7:06.0: PCI device FFFF:FFFF is disabled (not present)
[1.3 p23] 00:B7:07.0: PCI device FFFF:FFFF is disabled (not present)
[1.3 p24] 00:B7:08.0: PCI device FFFF:FFFF is disabled (not present)
[1.4 p25] 00:C7:01.0: PCI device 8086:352A is enabled
[1.4 p26] 00:C7:02.0: PCI device FFFF:FFFF is disabled (not present)
[1.4 p27] 00:C7:03.0: PCI device 8086:352B is enabled
[1.4 p28] 00:C7:04.0: PCI device FFFF:FFFF is disabled (not present)
[1.4 p29] 00:C7:05.0: PCI device 8086:352C is enabled
[1.4 p30] 00:C7:06.0: PCI device FFFF:FFFF is disabled (not present)
[1.4 p31] 00:C7:07.0: PCI device 8086:352D is enabled
[1.4 p32] 00:C7:08.0: PCI device FFFF:FFFF is disabled (not present)
[1.5 p33] 00:D7:01.0: PCI device 8086:352A is enabled
[1.5 p34] 00:D7:02.0: PCI device FFFF:FFFF is disabled (not present)
[1.5 p35] 00:D7:03.0: PCI device 8086:352B is enabled
[1.5 p36] 00:D7:04.0: PCI device FFFF:FFFF is disabled (not present)
[1.5 p37] 00:D7:05.0: PCI device 8086:352C is enabled
[1.5 p38] 00:D7:06.0: PCI device FFFF:FFFF is disabled (not present)
[1.5 p39] 00:D7:07.0: PCI device 8086:352D is enabled
[1.5 p40] 00:D7:08.0: PCI device FFFF:FFFF is disabled (not present)
[1.6 p41] 00:80:01.0: PCI device 8086:352A is enabled
[1.6 p42] 00:80:02.0: PCI device FFFF:FFFF is disabled (not present)
[1.6 p43] 00:80:03.0: PCI device FFFF:FFFF is disabled (not present)
[1.6 p44] 00:80:04.0: PCI device FFFF:FFFF is disabled (not present)
[1.6 p45] 00:80:05.0: PCI device 8086:352C is enabled
[1.6 p46] 00:80:06.0: PCI device FFFF:FFFF is disabled (not present)
[1.6 p47] 00:80:07.0: PCI device FFFF:FFFF is disabled (not present)
[1.6 p48] 00:80:08.0: PCI device FFFF:FFFF is disabled (not present)
Calling IioEarlyIntiazeEntry Start
[0] IioAllocateMmioResource: Seg=0, MaxStackPerSocket=12
[0.0] Temp BUS: 0x00 -> 0x00 | MMIOL: 0x90122000 -> 0x957FFFFF
[0.1] Temp BUS: 0x15 -> 0x15 | MMIOL: 0x95900000 -> 0x9F7FFFFF
[0.2] Temp BUS: 0x26 -> 0x26 | MMIOL: 0x9F900000 -> 0xA93FFFFF
[0.3] Temp BUS: 0x37 -> 0x37 | MMIOL: 0xA9500000 -> 0xB2FFFFFF
[0.4] Temp BUS: 0x48 -> 0x48 | MMIOL: 0xB3100000 -> 0xBCBFFFFF
[0.5] Temp BUS: 0x59 -> 0x59 | MMIOL: 0xBCD00000 -> 0xC67FFFFF
[0.8] Temp BUS: 0x6A -> 0x6A | MMIOL: 0xC6900000 -> 0xC6FFFFFF
[0.9] Temp BUS: 0x6F -> 0x6F | MMIOL: 0xC7100000 -> 0xC77FFFFF
[0.10] Temp BUS: 0x74 -> 0x74 | MMIOL: 0xC7900000 -> 0xC7FFFFFF
[0.11] Temp BUS: 0x79 -> 0x79 | MMIOL: 0xC8100000 -> 0xC87FFFFF
[0] IIO Early Link Training Starting...
Recipy decompressing...
Socket[0] Stack[0] Program RX recipe values START...
Program recipe revision 2.009 (Info : 1.5:, len 2556)
[0] Program RX recipe values END
Recipy decompressing...
Socket[0] Stack[1] Program RX recipe values START...
Program recipe revision 2.009 (Info : 1.5:, len 2966)
[0] Program RX recipe values END
Socket[0] Stack[2] Program RX recipe values START...
Program recipe revision 2.009 (Info : 1.5:, len 2966)
[0] Program RX recipe values END
Socket[0] Stack[3] Program RX recipe values START...
Program recipe revision 2.009 (Info : 1.5:, len 2966)
[0] Program RX recipe values END
Socket[0] Stack[4] Program RX recipe values START...
Program recipe revision 2.009 (Info : 1.5:, len 2966)
[0] Program RX recipe values END
Socket[0] Stack[5] Program RX recipe values START...
Program recipe revision 2.009 (Info : 1.5:, len 2966)
[0] Program RX recipe values END
CXL_IO_PRE_TRAIN_INIT_START
CXL_IO_PRE_TRAIN_INIT_END
FBLP_PRE_TRAIN_INIT_START
FBLP_PRE_TRAIN_INIT_END
[0 p0] IioDmiLinkInit
[0 p0] DMI link speed vector IIO 0xF, PCH 0x7 -> target speed 3
[0] IIO Early Link Training Completed!
[1] IioAllocateMmioResource: Seg=0, MaxStackPerSocket=12
[1.1] Temp BUS: 0x97 -> 0x97 | MMIOL: 0xD1500000 -> 0xD97FFFFF
[1.2] Temp BUS: 0xA7 -> 0xA7 | MMIOL: 0xD9900000 -> 0xE17FFFFF
[1.3] Temp BUS: 0xB7 -> 0xB7 | MMIOL: 0xE1900000 -> 0xE97FFFFF
[1.4] Temp BUS: 0xC7 -> 0xC7 | MMIOL: 0xE9900000 -> 0xF17FFFFF
[1.5] Temp BUS: 0xD7 -> 0xD7 | MMIOL: 0xF1900000 -> 0xF97FFFFF
[1.6] Temp BUS: 0x80 -> 0x80 | MMIOL: 0xC9100000 -> 0xD13FFFFF
[1.8] Temp BUS: 0xE7 -> 0xE7 | MMIOL: 0xF9900000 -> 0xF9FFFFFF
[1.9] Temp BUS: 0xEC -> 0xEC | MMIOL: 0xFA100000 -> 0xFA7FFFFF
[1.10] Temp BUS: 0xF1 -> 0xF1 | MMIOL: 0xFA900000 -> 0xFAFFFFFF
[1.11] Temp BUS: 0xF6 -> 0xF6 | MMIOL: 0xFB100000 -> 0xFB7FFFFF
[1] IIO Early Link Training Starting...
Recipy decompressing...
Recipy decompressing...
Socket[1] Stack[1] Program RX recipe values START...
Program recipe revision 2.009 (Info : 1.5:, len 2966)
[1] Program RX recipe values END
Socket[1] Stack[2] Program RX recipe values START...
Program recipe revision 2.009 (Info : 1.5:, len 2966)
[1] Program RX recipe values END
Socket[1] Stack[3] Program RX recipe values START...
Program recipe revision 2.009 (Info : 1.5:, len 2966)
[1] Program RX recipe values END
Socket[1] Stack[4] Program RX recipe values START...
Program recipe revision 2.009 (Info : 1.5:, len 2966)
[1] Program RX recipe values END
Socket[1] Stack[5] Program RX recipe values START...
Program recipe revision 2.009 (Info : 1.5:, len 2966)
[1] Program RX recipe values END
Socket[1] Stack[6] Program RX recipe values START...
Program recipe revision 2.009 (Info : 1.5:, len 2966)
[1] Program RX recipe values END
CXL_IO_PRE_TRAIN_INIT_START
CXL_IO_PRE_TRAIN_INIT_END
FBLP_PRE_TRAIN_INIT_START
FBLP_PRE_TRAIN_INIT_END
[1] IIO Early Link Training Completed!
IIO CXL Status Socket 0:
[0.1] NotTrained
[0.2] NotTrained
[0.3] NotTrained
[0.4] NotSupportCxlMode
[0.5] NotSupportCxlMode
[0.6] NotSupportCxlMode
[0.7] NotSupportCxlMode
IIO CXL Status Socket 1:
[1.1] NotTrained
[1.2] NotTrained
[1.3] NotTrained
[1.4] NotSupportCxlMode
[1.5] NotSupportCxlMode
[1.6] NotSupportCxlMode
[1.7] NotSupportCxlMode
CXL_NOTIFY_PCODE_START
CXL_NOTIFY_PCODE_END
IIO Early Link Tc/Vc Configuration Start
Final Tc/VC mapping:
[0] Program TC/VC mapping on IIO side
[0] Program/Poll TC/VC mapping on PCH side
Poll TC/VC mapping on IIO side
IIO Early Link Tc/Vc Configuration End
Calling IioEarlyIntiazeEntry Stop
******* Initialize CXL - END *******
******* OOBMSM PreMem Configure - START *******
******* UncoreEnablePeciAccess - START *******
******* UncoreEnablePeciAccess - END *******
******* OOBMSM PreMem Configure - END *******
**KTI Output Structure **
OutD2KCreditConfig: 0 [1:Low,2:Med,3:High]
SnoopThrottleConfig: 0 [0:Dis,1:Low,2:Med,3:High,4:Auto]
OutUpiAffinityEn for CHA and M2M: 0
OutTwoSktTopology : 5
OutM2iosfToUpiAffinity: 1
OutPmonConfig: 2 [1:Reduced,2:Full,3:Auto,0:Disabled]
OutM2IosfPmonAccessControl: 0 [0:Restricted,1:Full,2:Auto]
OutD2kEn: 0
OutLegacyVgaSoc: 0
OutLegacyVgaStack: 0
OutIsocEn: 0
OutHitMeEn: 1
OutSncEn: 4 (SNC4)
OutUmaClustering: 0
OutSysDirectoryModeEn: 1
OutKtiPrefetch: 0
OutXptPrefetch: 0
OutXptRemotePrefetch: 0
OutSncPrefetchEn: 4
OutSncGbAlignRequired: 1
OutIsRouteThrough: 0
OutStaleAtoSOptEn: 2
OutSystemRasType: 6 (ADVANCED)
OutIoDcMode: 5 (IODC_EN_REM_INVITOM_AND_WCILF)
KtiCurrentLinkSpeedMode: 1 (FAST)
OutKtiLinkSpeed: 2 (16.0)
OutKtiLinkL0pEn: 0 (DISABLED)
OutKtiLinkL1En: 1 (ENABLED)
OutKtiFailoverEn: 1 (ENABLED)
OutKtiCrcMode: 0 (16BIT)
OutBoardVsCpuConflict: 0x0
OutKtiAdaptationEnable: 0x0
OutKtiPerLinkL1En (per port):
S0:1 1 1 1
S1:1 1 1 1
S2:0 0 0 0
S3:0 0 0 0
PchPresentBitMap: 0x01
OutKtiFpgaPresent (per socket): S0: 0 S1: 0 S2: 0 S3: 0
OutKtiFpgaEnable (per socket): S0: 0 S1: 0 S2: 0 S3: 0
OutFpgaHomeAgent (per socket): S0: 0 S1: 0 S2: 0 S3: 0
OutFpgaCacheAgent (per socket): S0: 0 S1: 0 S2: 0 S3: 0
OutStackDisableBitMap (per socket): S0: 0x0 S1: 0x0 S2: 0x0 S3: 0x0
mmCfgBase: 0x80000000
mmCfgSize: 0x10000000
mmiolBase: 0x90000000
mmiolSize: 0x6C000000
mmiohBase: 0x00002000
lowGap : 0x20
SecondaryNodeBitMap: 0x00
CpuPaLimit: 0
KtiInternalGlobal:
->SnoopFanoutEn: 0
->SysOsbEn: 1
->D2cEn: 1
->D2kEn: 0
->SnoopFilter: 0
->DualLinksInterleavingMode: 2
->UpiInterleaveMode: 2
->EightSocketTopology: 0
->SnoopFanoutChaInterleaveEn: 0
KtiLinkVnaOverride (per port - final values):
S0:138 138 138 138
S1:138 138 138 138
S2:254 254 254 254
S3:254 254 254 254
IIO STACK rootbus ID mapping table
Stack ID | Root Bus ID
0 ------- 0
1 ------- 1
2 ------- 2
3 ------- 3
4 ------- 4
5 ------- 5
6 ------- 6
7 ------- 7
8 ------- 8
9 ------- 9
10 ------- 10
11 ------- 11
OutDfxPrqBlockEn: 0
OutDfxAeg0CounterLowVal: 40
OutDfxAeg0CounterHighVal: 60
**KTI Output Structure End**
******* KTIRC Exit *******
KTI Init completed! Reset Requested: 0
RC debug buffering, compression, and sync ready
Pipe Init starting...
Pass PIPE_DISPATCH_SYNCH_PSYSHOST to socket 1
Pass PeiPipeFollowerInit
CAR MEM Range 0xFE800000 - 0xFE983B67
Pass pointer to Host: 0xFE800014
Sending address of Memory Policy: 0xFE96FF80
Pass boot mode 0
Send data buffer
Send data dwordcount 60EDA
Send data...complete
CAR MEM Range2 0xFE9DC000 - 0xFE9DFFFF
Send data buffer
Send data dwordcount 1000
Send data...complete
Send data buffer
Send data dwordcount 18F
Send data...complete
N1 Checked into Pipe
Pipe Init completed! Reset Requested: 0
CPU Feature Early Config starting...
CpuInit Start
CpuUncoreInit()
: Get UncoreRatioLimit MaxClrRatio: 24, MinClrRatio: 8, UncoreRatioLimit.Uint32 = 0x818
: Get UncoreRatioLimit MaxClrRatio: 24, MinClrRatio: 8, UncoreRatioLimit.Uint32 = 0x818
:UFS: Update BIOS_SPARE2_PCU Bit[20] = 0 on S0
Write Socket 0 MSR_UNCORE_RATIO_LIMIT.MinClrRatio [14:8] = 8, MSR_UNCORE_RATIO_LIMIT.MaxClrRatio [6:0] = 24
:UFS: Update BIOS_SPARE2_PCU Bit[20] = 0 on S1
Write Socket 1 MSR_UNCORE_RATIO_LIMIT.MinClrRatio [14:8] = 8, MSR_UNCORE_RATIO_LIMIT.MaxClrRatio [6:0] = 24
Get socket PPIN
: PPIN = 22E546CB1AD8E915
Get socket PPIN
: PPIN = 22E548CB80015B4D
:: ProgramProcessorFlexRatio()
:: System Capable : AVX SST-CP SST-BF
1 1 0
:: SstPpCapableSystem : LevelEnableMask MaxLevel
0 00 00
S0_0 FusedCoresMask = 0x0DABBB6EAF4EE9DB FusedCoreCount = 40
GetAllConfigTdpLevels() Enter
S0_0 ConfigTdpLevel(0) IssCoreMask = 0x0DABBB6EAF4EE9DB IssCoreCount = 40
GetAllConfigTdpLevels() Exit
:: S0 MaxRatio : MinRatio : MinOpRatio : ConfigTdpMaxLevel
17 08 05 02
:: S0 Current SST-PP Level : Current SST-PP Lock
00 0
Level : PkgTDP : SSE P1 : AVX2 P1 : AVX3 P1 : Core Count
0 : 000350 : 000017 : 000014 : 000011 : 040, [0] 40
3 : 000000 : 000000 : 000000 : 000000 : 000, [0] 00
4 : 000000 : 000000 : 000000 : 000000 : 000, [0] 00
Level : Turbo Ratio Limit - SSE P1 : AVX2 P1 : AVX3 P1
0 : - : 181818191A1E2023 : 17171718191E2023 : 16161617171D1F22
3 : - : 0000000000000000 : 0000000000000000 : 0000000000000000
4 : - : 0000000000000000 : 0000000000000000 : 0000000000000000
Level : TJMax : CoreMask
0 : 100 : [0] 0DABBB6EAF4EE9DB
3 : 000 : [0] 0000000000000000
4 : 000 : [0] 0000000000000000
Level : SstBf - P1_Hi : P1_Lo : CoreMask
0 : 0000 : 0000 : [0] 0000000000000000
3 : 0000 : 0000 : [0] 0000000000000000
4 : 0000 : 0000 : [0] 0000000000000000
Core Ratio Info
Level : P0 : P1 : Pn : Pm
0 : 000035 : 000017 : 000008 : 000005
3 : 000000 : 000000 : 000000 : 000000
4 : 000000 : 000000 : 000000 : 000000
Uncore Ratio Info
Level : P0 : P1 : Pn : Pm
0 : 000024 : 000014 : 000008 : 000008
3 : 000000 : 000000 : 000000 : 000000
4 : 000000 : 000000 : 000000 : 000000
S1_0 FusedCoresMask = 0x0DB9772F6F4EE9DB FusedCoreCount = 40
GetAllConfigTdpLevels() Enter
S1_0 ConfigTdpLevel(0) IssCoreMask = 0x0DB9772F6F4EE9DB IssCoreCount = 40
GetAllConfigTdpLevels() Exit
:: S1 MaxRatio : MinRatio : MinOpRatio : ConfigTdpMaxLevel
17 08 05 02
:: S1 Current SST-PP Level : Current SST-PP Lock
00 0
Level : PkgTDP : SSE P1 : AVX2 P1 : AVX3 P1 : Core Count
0 : 000350 : 000017 : 000014 : 000011 : 040, [0] 40
3 : 000000 : 000000 : 000000 : 000000 : 000, [0] 00
4 : 000000 : 000000 : 000000 : 000000 : 000, [0] 00
Level : Turbo Ratio Limit - SSE P1 : AVX2 P1 : AVX3 P1
0 : - : 181818191A1E2023 : 17171718191E2023 : 16161617171D1F22
3 : - : 0000000000000000 : 0000000000000000 : 0000000000000000
4 : - : 0000000000000000 : 0000000000000000 : 0000000000000000
Level : TJMax : CoreMask
0 : 100 : [0] 0DB9772F6F4EE9DB
3 : 000 : [0] 0000000000000000
4 : 000 : [0] 0000000000000000
Level : SstBf - P1_Hi : P1_Lo : CoreMask
0 : 0000 : 0000 : [0] 0000000000000000
3 : 0000 : 0000 : [0] 0000000000000000
4 : 0000 : 0000 : [0] 0000000000000000
Core Ratio Info
Level : P0 : P1 : Pn : Pm
0 : 000035 : 000017 : 000008 : 000005
3 : 000000 : 000000 : 000000 : 000000
4 : 000000 : 000000 : 000000 : 000000
Uncore Ratio Info
Level : P0 : P1 : Pn : Pm
0 : 000024 : 000014 : 000008 : 000008
3 : 000000 : 000000 : 000000 : 000000
4 : 000000 : 000000 : 000000 : 000000
:: CommonMaxRatio : CommonMinRatio : Target Ratio
17 08 17
:: IssTdpLevel : AvxP1Level
00 00
:: TargetRatio: 17 is ready (RatioChangeFlag: 0), SstPpCurrentLevel: 0
:: SetActiveCoresAndLpEnableDisable()
:: S0_0 BIST_FAILURE_LOCAL_MASK = 0000000000000000
:: S0 setup input disable = 0000000000000000
:: S0_0 AvailCoresMask = 0DABBB6EAF4EE9DB
:: S0_0 ResolvedCoresMask = 0DABBB6EAF4EE9DB
:: S0_0 DesiredCoresCurrent = 0000000000000000
:: S0_0 BistResultMask = 0000000000000000
:: S0_0 CoreDisableReqMask = 0000000000000000
:: S0_0 NumberOfCoresDisabledMask = 0000000000000000
:: CheckCpuBist = 1
:: CoreFailover = 1
[s0_0] MaxLpEnable = 0, LpCapable = 1, MaxLpEnable knob = 0, Lock Status = 0
S0_0 MaxEnabledCores = 0
S0_0 FusedCoreCount = 40
S0_0 NonSparingCoresMask= FFFFFFFFFFFFFFFF
:: S0_0 DesiredCoresNew = 0000000000000000
:: S1_0 BIST_FAILURE_LOCAL_MASK = 0000000000000000
:: S1 setup input disable = 0000000000000000
:: S1_0 AvailCoresMask = 0DB9772F6F4EE9DB
:: S1_0 ResolvedCoresMask = 0DB9772F6F4EE9DB
:: S1_0 DesiredCoresCurrent = 0000000000000000
:: S1_0 BistResultMask = 0000000000000000
:: S1_0 CoreDisableReqMask = 0000000000000000
:: S1_0 NumberOfCoresDisabledMask = 0000000000000000
:: CheckCpuBist = 1
:: CoreFailover = 1
[s1_0] MaxLpEnable = 0, LpCapable = 1, MaxLpEnable knob = 0, Lock Status = 0
S1_0 MaxEnabledCores = 0
S1_0 FusedCoreCount = 40
S1_0 NonSparingCoresMask= FFFFFFFFFFFFFFFF
:: S1_0 DesiredCoresNew = 0000000000000000
CPUMISC Current S 0:
ITBM is not supported
CPUMISC Current S 1:
ITBM is not supported
CPU Feature Early Config completed! Reset Requested: 0
PrevBootErrors: No Memory MCA Error Found
PrevBootErrors - Valid MCA UC entries: 0
[CSR PCI BAR Access] Address:0xFFFFFFFF000000D4; PCI Cmd: 0xFFFF
[CSR PCI BAR Access] Address:0xFFFFFFFF000000D4; PCI Cmd: 0xFFFF
START_MRC_RUN
Detect ColdBootSlowRequiredFlag and will force slow cold boot.
N0: Bus Instance = 0; I2C speed = 3; I3C speed = 2; Bus mode = 0
N0: Bus Instance = 1; I2C speed = 3; I3C speed = 2; Bus mode = 0
N0: Bus Instance = 0; I2C speed = 3; I3C speed = 2; Bus mode = 1
N0: Bus Instance = 0; I2C speed = 3; I3C speed = 2; Bus mode = 1
N0: Bus Instance = 0; I2C speed = 3; I3C speed = 2; Bus mode = 1
N0: Bus Instance = 0; I2C speed = 3; I3C speed = 2; Bus mode = 1
N0: Bus Instance = 0; I2C speed = 3; I3C speed = 2; Bus mode = 1
N0: Bus Instance = 0; I2C speed = 3; I3C speed = 2; Bus mode = 1
N0: Bus Instance = 1; I2C speed = 3; I3C speed = 2; Bus mode = 1
N0: Bus Instance = 1; I2C speed = 3; I3C speed = 2; Bus mode = 1
N0: Bus Instance = 1; I2C speed = 3; I3C speed = 2; Bus mode = 1
N0: Bus Instance = 1; I2C speed = 3; I3C speed = 2; Bus mode = 1
N0: Bus Instance = 1; I2C speed = 3; I3C speed = 2; Bus mode = 1
N0: Bus Instance = 1; I2C speed = 3; I3C speed = 2; Bus mode = 1
N0: Bus Instance = 0; I2C speed = 3; I3C speed = 2; Bus mode = 0
N0: Bus Instance = 0; I2C speed = 3; I3C speed = 2; Bus mode = 0
N0: Bus Instance = 0; I2C speed = 3; I3C speed = 2; Bus mode = 0
N0: Bus Instance = 0; I2C speed = 3; I3C speed = 2; Bus mode = 0
N0: Bus Instance = 0; I2C speed = 3; I3C speed = 2; Bus mode = 0
N0: Bus Instance = 0; I2C speed = 3; I3C speed = 2; Bus mode = 0
N0: Bus Instance = 1; I2C speed = 3; I3C speed = 2; Bus mode = 0
N0: Bus Instance = 1; I2C speed = 3; I3C speed = 2; Bus mode = 0
N0: Bus Instance = 1; I2C speed = 3; I3C speed = 2; Bus mode = 0
N0: Bus Instance = 1; I2C speed = 3; I3C speed = 2; Bus mode = 0
N0: Bus Instance = 1; I2C speed = 3; I3C speed = 2; Bus mode = 0
N0: Bus Instance = 1; I2C speed = 3; I3C speed = 2; Bus mode = 0
N0: Dimm changed.
Processors changed.
Get socket PPIN
: PPIN = 22E546CB1AD8E915
setupChanged: 1
Clearing the MRC NVRAM structure.
bootMode = NormalBoot
subBootMode = ColdBoot
[ScktId: 0] Parallel Mode Dispatch -- Started
Dispatch N1 for MemInit
N1 Entering MRC
Detect ColdBootSlowRequiredFlag and will force slow cold boot.
N1: Bus Instance = 0; I2C speed = 3; I3C speed = 2; Bus mode = 0
N1: Bus Instance = 1; I2C speed = 3; I3C speed = 2; Bus mode = 0
N1: Bus Instance = 0; I2C speed = 3; I3C speed = 2; Bus mode = 1
N1: Bus Instance = 0; I2C speed = 3; I3C speed = 2; Bus mode = 1
N1: Bus Instance = 0; I2C speed = 3; I3C speed = 2; Bus mode = 1
N1: Bus Instance = 0; I2C speed = 3; I3C speed = 2; Bus mode = 1
N1: Bus Instance = 0; I2C speed = 3; I3C speed = 2; Bus mode = 1
N1: Bus Instance = 0; I2C speed = 3; I3C speed = 2; Bus mode = 1
N1: Bus Instance = 1; I2C speed = 3; I3C speed = 2; Bus mode = 1
N1: Bus Instance = 1; I2C speed = 3; I3C speed = 2; Bus mode = 1
N1: Bus Instance = 1; I2C speed = 3; I3C speed = 2; Bus mode = 1
N1: Bus Instance = 1; I2C speed = 3; I3C speed = 2; Bus mode = 1
N1: Bus Instance = 1; I2C speed = 3; I3C speed = 2; Bus mode = 1
N1: Bus Instance = 1; I2C speed = 3; I3C speed = 2; Bus mode = 1
N1: Bus Instance = 0; I2C speed = 3; I3C speed = 2; Bus mode = 0
N1: Bus Instance = 0; I2C speed = 3; I3C speed = 2; Bus mode = 0
N1: Bus Instance = 0; I2C speed = 3; I3C speed = 2; Bus mode = 0
N1: Bus Instance = 0; I2C speed = 3; I3C speed = 2; Bus mode = 0
N1: Bus Instance = 0; I2C speed = 3; I3C speed = 2; Bus mode = 0
N1: Bus Instance = 0; I2C speed = 3; I3C speed = 2; Bus mode = 0
N1: Bus Instance = 1; I2C speed = 3; I3C speed = 2; Bus mode = 0
N1: Bus Instance = 1; I2C speed = 3; I3C speed = 2; Bus mode = 0
N1: Bus Instance = 1; I2C speed = 3; I3C speed = 2; Bus mode = 0
N1: Bus Instance = 1; I2C speed = 3; I3C speed = 2; Bus mode = 0
N1: Bus Instance = 1; I2C speed = 3; I3C speed = 2; Bus mode = 0
N1: Bus Instance = 1; I2C speed = 3; I3C speed = 2; Bus mode = 0
N1: Dimm changed.
Get socket PPIN
: PPIN = 22E548CB80015B4D
setupChanged: 1
Clearing the MRC NVRAM structure.
bootMode = NormalBoot
subBootMode = ColdBoot
[ScktId: 1] Parallel Mode Dispatch -- Started
[ScktId: 0] Parallel Mode Dispatch - 203ms
[ScktId: 1] Parallel Mode Dispatch - 4ms
[ScktId: 0] Pipe Sync AP Boot Mode -- Started
[ScktId: 1] Pipe Sync AP Boot Mode -- Started
[ScktId: 0] Pipe Sync AP Boot Mode - 13ms
[ScktId: 1] Pipe Sync AP Boot Mode - 9ms
N1 Checked into Pipe
[ScktId: 0] Select Boot Mode -- Started
DetermineBootMode: ColdBoot
[ScktId: 0] Select Boot Mode - 8ms
[ScktId: 1] Pipe Sync SBSP Boot Mode -- Started
[ScktId: 0] Pipe Sync SBSP Boot Mode -- Started
[ScktId: 1] Pipe Sync SBSP Boot Mode - 9ms
[ScktId: 0] Pipe Sync SBSP Boot Mode - 9ms
[ScktId: 1] Init Structures Late -- Started
[ScktId: 0] Init Structures Late -- Started
[ScktId: 1] Init Structures Late - 8ms
[ScktId: 0] Init Structures Late - 8ms
[ScktId: 1] Detect DIMM Configuration -- Started
[ScktId: 0] Detect DIMM Configuration -- Started
N1: Bus Instance = 0; I2C speed = 3; I3C speed = 2; Bus mode = 0
N0: Bus Instance = 0; I2C speed = 3; I3C speed = 2; Bus mode = 0
N1: Bus Instance = 0; I2C speed = 3; I3C speed = 2; Bus mode = 0
N0: Bus Instance = 0; I2C speed = 3; I3C speed = 2; Bus mode = 0
N1: Bus Instance = 0; I2C speed = 3; I3C speed = 2; Bus mode = 0
N0: Bus Instance = 0; I2C speed = 3; I3C speed = 2; Bus mode = 0
N1: Bus Instance = 0; I2C speed = 3; I3C speed = 2; Bus mode = 0
N0: Bus Instance = 0; I2C speed = 3; I3C speed = 2; Bus mode = 0
N1: Bus Instance = 0; I2C speed = 3; I3C speed = 2; Bus mode = 0
N0: Bus Instance = 0; I2C speed = 3; I3C speed = 2; Bus mode = 0
N1: Bus Instance = 0; I2C speed = 3; I3C speed = 2; Bus mode = 0
N0: Bus Instance = 0; I2C speed = 3; I3C speed = 2; Bus mode = 0
N1: Bus Instance = 1; I2C speed = 3; I3C speed = 2; Bus mode = 0
N0: Bus Instance = 1; I2C speed = 3; I3C speed = 2; Bus mode = 0
N1: Bus Instance = 1; I2C speed = 3; I3C speed = 2; Bus mode = 0
N0: Bus Instance = 1; I2C speed = 3; I3C speed = 2; Bus mode = 0
N1: Bus Instance = 1; I2C speed = 3; I3C speed = 2; Bus mode = 0
N0: Bus Instance = 1; I2C speed = 3; I3C speed = 2; Bus mode = 0
N1: Bus Instance = 1; I2C speed = 3; I3C speed = 2; Bus mode = 0
N0: Bus Instance = 1; I2C speed = 3; I3C speed = 2; Bus mode = 0
N1: Bus Instance = 1; I2C speed = 3; I3C speed = 2; Bus mode = 0
N0: Bus Instance = 1; I2C speed = 3; I3C speed = 2; Bus mode = 0
N1: Bus Instance = 1; I2C speed = 3; I3C speed = 2; Bus mode = 0
N0: Bus Instance = 1; I2C speed = 3; I3C speed = 2; Bus mode = 0
[ScktId: 1] Detect DIMM Configuration - 319ms
[ScktId: 0] Detect DIMM Configuration - 321ms
[ScktId: 1] Pipe Sync AP Data -- Started
[ScktId: 0] Pipe Sync AP Data -- Started
[ScktId: 0] Pipe Sync AP Data - 21ms
[ScktId: 1] Pipe Sync AP Data - 26ms
N1 Checked into Pipe
[ScktId: 0] Check POR Compatibility -- Started
[ScktId: 0] Check POR Compatibility - 6ms
N1 Checked into Pipe
[ScktId: 0] HBM Init Clock -- Started
[ScktId: 0] HBM Init Clock - 5ms
N1 Checked into Pipe
[ScktId: 0] Initialize clocks for all MemSs -- Started
N0: Platform segment mapping found. UseServerPor: 1; SegmentType: 7; ChopType: 3; PlatformSegment: 0
N0: Platform segment mapping found. UseServerPor: 1; SegmentType: 7; ChopType: 3; PlatformSegment: 0
N0: Platform segment mapping found. UseServerPor: 1; SegmentType: 7; ChopType: 3; PlatformSegment: 0
N0: Platform segment mapping found. UseServerPor: 1; SegmentType: 7; ChopType: 3; PlatformSegment: 0
N0: Platform segment mapping found. UseServerPor: 1; SegmentType: 7; ChopType: 3; PlatformSegment: 0
N0: Platform segment mapping found. UseServerPor: 1; SegmentType: 7; ChopType: 3; PlatformSegment: 0
N0: Platform segment mapping found. UseServerPor: 1; SegmentType: 7; ChopType: 3; PlatformSegment: 0
N0: Platform segment mapping found. UseServerPor: 1; SegmentType: 7; ChopType: 3; PlatformSegment: 0
Memory behind processor 0 running at DDR-4800
Memory behind processor 1 running at DDR-4800
[ScktId: 0] Initialize clocks for all MemSs - 96ms
[ScktId: 1] Pipe Sync SBSP Data -- Started
[ScktId: 0] Pipe Sync SBSP Data -- Started
[ScktId: 1] Pipe Sync SBSP Data - 21ms
[ScktId: 0] Pipe Sync SBSP Data - 21ms
[ScktId: 1] Unlock Memory -- Started
[ScktId: 0] Unlock Memory -- Started
[ScktId: 1] Unlock Memory - 7ms
[ScktId: 0] Unlock Memory - 7ms
[ScktId: 1] Pipe Sync AP Data -- Started
[ScktId: 0] Pipe Sync AP Data -- Started
[ScktId: 0] Pipe Sync AP Data - 21ms
[ScktId: 1] Pipe Sync AP Data - 24ms
[ScktId: 0] HBM Pre-Training -- Started
[ScktId: 1] HBM Pre-Training -- Started
HBMIO flows: set to 0xFFFFFF7F!
HBMIO flows: set to 0xFFFFFF7F!
Get socket PPIN
Get socket PPIN
: PPIN = 22E546CB1AD8E915
: PPIN = 22E548CB80015B4D
HBM frequency = 3200MHz
HBM frequency = 3200MHz
Hbm Policy Option: DisableRefreshPostpone = 0
Socket1 HbmIo0, HW Rev: 0x110, FW Rev: 0x2180, Patch ID: 0x0, Unique ID: 0x18, Product ID: 0x2
Hbm Policy Option: RefreshMode = 1
Socket1 HbmIo1, HW Rev: 0x110, FW Rev: 0x2180, Patch ID: 0x0, Unique ID: 0x18, Product ID: 0x2
Socket0 HbmIo0, HW Rev: 0x110, FW Rev: 0x2180, Patch ID: 0x0, Unique ID: 0x18, Product ID: 0x2
Socket1 HbmIo2, HW Rev: 0x110, FW Rev: 0x2180, Patch ID: 0x0, Unique ID: 0x18, Product ID: 0x2
Socket0 HbmIo1, HW Rev: 0x110, FW Rev: 0x2180, Patch ID: 0x0, Unique ID: 0x18, Product ID: 0x2
Socket1 HbmIo3, HW Rev: 0x110, FW Rev: 0x2180, Patch ID: 0x0, Unique ID: 0x18, Product ID: 0x2
Socket0 HbmIo2, HW Rev: 0x110, FW Rev: 0x2180, Patch ID: 0x0, Unique ID: 0x18, Product ID: 0x2
[ScktId: 1] HBM Pre-Training - 109ms
Socket0 HbmIo3, HW Rev: 0x110, FW Rev: 0x2180, Patch ID: 0x0, Unique ID: 0x18, Product ID: 0x2
[ScktId: 1] AP HBM Information -- Started
[ScktId: 0] HBM Pre-Training - 141ms
[ScktId: 0] AP HBM Information -- Started
[ScktId: 0] AP HBM Information - 5ms
[ScktId: 1] AP HBM Information - 25ms
[ScktId: 0] Pipe Sync SBSP Status -- Started
[ScktId: 1] Pipe Sync SBSP Status -- Started
[ScktId: 1] Pipe Sync SBSP Status - 8ms
[ScktId: 0] Pipe Sync SBSP Status - 12ms
[ScktId: 1] Check XMP -- Started
[ScktId: 0] Check XMP -- Started
[ScktId: 1] Check XMP - 7ms
[ScktId: 0] Check XMP - 6ms
N1 Checked into Pipe
[ScktId: 0] Set Vdd -- Started
[ScktId: 0] Set Vdd - 5ms
[ScktId: 1] Power on Memory -- Started
[ScktId: 0] Power on Memory -- Started
N1.C00.D0: PMIC in Secure Mode, PMIC voltage programming aborted!
N0.C00.D0: PMIC in Secure Mode, PMIC voltage programming aborted!
N1.C02.D0: PMIC in Secure Mode, PMIC voltage programming aborted!
N0.C02.D0: PMIC in Secure Mode, PMIC voltage programming aborted!
N1.C04.D0: PMIC in Secure Mode, PMIC voltage programming aborted!
N0.C04.D0: PMIC in Secure Mode, PMIC voltage programming aborted!
N1.C06.D0: PMIC in Secure Mode, PMIC voltage programming aborted!
N0.C06.D0: PMIC in Secure Mode, PMIC voltage programming aborted!
[ScktId: 1] Power on Memory - 216ms
[ScktId: 0] Power on Memory - 223ms
[ScktId: 1] Ddrio Power Status Check -- Started
[ScktId: 0] Ddrio Power Status Check -- Started
[ScktId: 1] Ddrio Power Status Check - 8ms
[ScktId: 0] Ddrio Power Status Check - 9ms
[ScktId: 1] Pipe Sync AP Data -- Started
[ScktId: 0] Pipe Sync AP Data -- Started
[ScktId: 0] Pipe Sync AP Data - 21ms
[ScktId: 1] Pipe Sync AP Data - 25ms
N1 Checked into Pipe
[ScktId: 0] Configure DIMM Ranks -- Started
[ScktId: 0] Configure DIMM Ranks - 6ms
[ScktId: 1] Pipe Sync SBSP Data -- Started
[ScktId: 0] Pipe Sync SBSP Data -- Started
[ScktId: 1] Pipe Sync SBSP Data - 21ms
[ScktId: 0] Pipe Sync SBSP Data - 21ms
[ScktId: 1] Initialize Throttling Early -- Started
[ScktId: 0] Initialize Throttling Early -- Started
[ScktId: 1] Initialize Throttling Early - 9ms
[ScktId: 0] Initialize Throttling Early - 10ms
[ScktId: 1] Initialize Memory -- Started
[ScktId: 0] Initialize Memory -- Started
[ScktId: 1] Initialize Memory - 8ms
[ScktId: 0] Initialize Memory - 8ms
[ScktId: 1] Gather SPD Data -- Started
[ScktId: 0] Gather SPD Data -- Started
N1: Bus Instance = 0; I2C speed = 3; I3C speed = 2; Bus mode = 0
N0: Bus Instance = 0; I2C speed = 3; I3C speed = 2; Bus mode = 0
N1: Bus Instance = 0; I2C speed = 3; I3C speed = 2; Bus mode = 1
N0: Bus Instance = 0; I2C speed = 3; I3C speed = 2; Bus mode = 1
N1: I3C Instance 0: Switch to I3C mode - Status = Success
N0: I3C Instance 0: Switch to I3C mode - Status = Success
N1: Bus Instance = 1; I2C speed = 3; I3C speed = 2; Bus mode = 0
N0: Bus Instance = 1; I2C speed = 3; I3C speed = 2; Bus mode = 0
N1: Bus Instance = 1; I2C speed = 3; I3C speed = 2; Bus mode = 1
N0: Bus Instance = 1; I2C speed = 3; I3C speed = 2; Bus mode = 1
N1: I3C Instance 1: Switch to I3C mode - Status = Success
N0: I3C Instance 1: Switch to I3C mode - Status = Success
[ScktId: 1] Gather SPD Data - 86ms
[ScktId: 1] Socket DIMM Information -- Started
[ScktId: 0] Gather SPD Data - 88ms
==========================================================================================================================================================================
START_SOCKET_1_DIMMINFO_TABLE
SPR Ex - Socket 2S
==========================================================================================================================================================================
S| Channel 0 | Channel 1 | Channel 2 | Channel 3 | Channel 4 | Channel 5 | Channel 6 | Channel 7 |
==========================================================================================================================================================================
0| DIMM: Micron | Not installed | DIMM: Micron | Not installed | DIMM: Micron | Not installed | DIMM: Micron | Not installed |
| DRAM: Micron | | DRAM: Micron | | DRAM: Micron | | DRAM: Micron | |
| RCD: IDT | | RCD: IDT | | RCD: IDT | | RCD: IDT | |
|RCD Rev: 0x33 | |RCD Rev: 0x33 | |RCD Rev: 0x33 | |RCD Rev: 0x33 | |
| DB Ven: N/A | | DB Ven: N/A | | DB Ven: N/A | | DB Ven: N/A | |
| DB Rev: N/A | | DB Rev: N/A | | DB Rev: N/A | | DB Rev: N/A | |
| PMIC: MPS | | PMIC: MPS | | PMIC: MPS | | PMIC: MPS | |
|PMICRev: 0x12 | |PMICRev: 0x12 | |PMICRev: 0x12 | |PMICRev: 0x12 | |
|SPD Dev: IDT | |SPD Dev: IDT | |SPD Dev: IDT | |SPD Dev: IDT | |
|Dev Rev: 0x21 | |Dev Rev: 0x21 | |Dev Rev: 0x21 | |Dev Rev: 0x21 | |
| SPD BL: 0.9 | | SPD BL: 0.9 | | SPD BL: 0.9 | | SPD BL: 0.9 | |
| TSOD: IDT | | TSOD: IDT | | TSOD: IDT | | TSOD: IDT | |
|TSODRev: 0x12 | |TSODRev: 0x12 | |TSODRev: 0x12 | |TSODRev: 0x12 | |
| | | | | | | | |
| 32GB( 16Gbx4 SR)| | 32GB( 16Gbx4 SR)| | 32GB( 16Gbx4 SR)| | 32GB( 16Gbx4 SR)| |
| DDR5 RDIMM R/C-F | | DDR5 RDIMM R/C-F | | DDR5 RDIMM R/C-F | | DDR5 RDIMM R/C-F | |
| 4800 39-39-39 | | 4800 39-39-39 | | 4800 39-39-39 | | 4800 39-39-39 | |
| ww51 2021 | | ww51 2021 | | ww51 2021 | | ww51 2021 | |
|MTC18F1045S1PC48BA2 | |MTC18F1045S1PC48BA2 | |MTC18F1045S1PC48BA2 | |MTC18F1045S1PC48BA2 | |
| | | | | | | | |
|0x002C0F2151336C7DD8| |0x002C0F2151336C7E17| |0x002C0F2151336C7DDA| |0x002C0F2151336C7E33| |
| | | | | | | | |
--------------------------------------------------------------------------------------------------------------------------------------------------------------------------
1| Not installed | Not installed | Not installed | Not installed | Not installed | Not installed | Not installed | Not installed |
--------------------------------------------------------------------------------------------------------------------------------------------------------------------------
STOP_SOCKET_1_DIMMINFO_TABLE
==========================================================================================================================================================================
[ScktId: 0] Socket DIMM Information -- Started
[ScktId: 1] Socket DIMM Information - 580ms
==========================================================================================================================================================================
START_SOCKET_0_DIMMINFO_TABLE
SPR Ex - Socket 2S
==========================================================================================================================================================================
S| Channel 0 | Channel 1 | Channel 2 | Channel 3 | Channel 4 | Channel 5 | Channel 6 | Channel 7 |
==========================================================================================================================================================================
0| DIMM: Micron | Not installed | DIMM: Micron | Not installed | DIMM: Micron | Not installed | DIMM: Micron | Not installed |
| DRAM: Micron | | DRAM: Micron | | DRAM: Micron | | DRAM: Micron | |
| RCD: IDT | | RCD: IDT | | RCD: IDT | | RCD: IDT | |
|RCD Rev: 0x33 | |RCD Rev: 0x33 | |RCD Rev: 0x33 | |RCD Rev: 0x33 | |
| DB Ven: N/A | | DB Ven: N/A | | DB Ven: N/A | | DB Ven: N/A | |
| DB Rev: N/A | | DB Rev: N/A | | DB Rev: N/A | | DB Rev: N/A | |
| PMIC: MPS | | PMIC: MPS | | PMIC: MPS | | PMIC: MPS | |
|PMICRev: 0x12 | |PMICRev: 0x12 | |PMICRev: 0x12 | |PMICRev: 0x12 | |
|SPD Dev: IDT | |SPD Dev: IDT | |SPD Dev: IDT | |SPD Dev: IDT | |
|Dev Rev: 0x21 | |Dev Rev: 0x21 | |Dev Rev: 0x21 | |Dev Rev: 0x21 | |
| SPD BL: 0.9 | | SPD BL: 0.9 | | SPD BL: 0.9 | | SPD BL: 0.9 | |
| TSOD: IDT | | TSOD: IDT | | TSOD: IDT | | TSOD: IDT | |
|TSODRev: 0x12 | |TSODRev: 0x12 | |TSODRev: 0x12 | |TSODRev: 0x12 | |
| | | | | | | | |
| 32GB( 16Gbx4 SR)| | 32GB( 16Gbx4 SR)| | 32GB( 16Gbx4 SR)| | 32GB( 16Gbx4 SR)| |
| DDR5 RDIMM R/C-F | | DDR5 RDIMM R/C-F | | DDR5 RDIMM R/C-F | | DDR5 RDIMM R/C-F | |
| 4800 39-39-39 | | 4800 39-39-39 | | 4800 39-39-39 | | 4800 39-39-39 | |
| ww51 2021 | | ww51 2021 | | ww51 2021 | | ww51 2021 | |
|MTC18F1045S1PC48BA2 | |MTC18F1045S1PC48BA2 | |MTC18F1045S1PC48BA2 | |MTC18F1045S1PC48BA2 | |
| | | | | | | | |
|0x002C0F2151336C7E2C| |0x002C0F2151336C7E24| |0x002C0F2151336C7E3A| |0x002C0F2151336C7E3F| |
| | | | | | | | |
--------------------------------------------------------------------------------------------------------------------------------------------------------------------------
1| Not installed | Not installed | Not installed | Not installed | Not installed | Not installed | Not installed | Not installed |
--------------------------------------------------------------------------------------------------------------------------------------------------------------------------
STOP_SOCKET_0_DIMMINFO_TABLE
==========================================================================================================================================================================
[ScktId: 1] Early Configuration -- Started
[ScktId: 0] Socket DIMM Information - 1153ms
N1.C00: MCSCRAMBLE_SEED_SEL_MCDDC_DP_REG access function - average write latency = 419 ns
[ScktId: 0] Early Configuration -- Started
N1.C01: MCSCRAMBLE_SEED_SEL_MCDDC_DP_REG access function - average write latency = 399 ns
N0.C00: MCSCRAMBLE_SEED_SEL_MCDDC_DP_REG access function - average write latency = 332 ns
N1.C02: MCSCRAMBLE_SEED_SEL_MCDDC_DP_REG access function - average write latency = 508 ns
N0.C01: MCSCRAMBLE_SEED_SEL_MCDDC_DP_REG access function - average write latency = 349 ns
N1.C03: MCSCRAMBLE_SEED_SEL_MCDDC_DP_REG access function - average write latency = 523 ns
N0.C02: MCSCRAMBLE_SEED_SEL_MCDDC_DP_REG access function - average write latency = 440 ns
N1.C04: MCSCRAMBLE_SEED_SEL_MCDDC_DP_REG access function - average write latency = 561 ns
N0.C03: MCSCRAMBLE_SEED_SEL_MCDDC_DP_REG access function - average write latency = 440 ns
N1.C05: MCSCRAMBLE_SEED_SEL_MCDDC_DP_REG access function - average write latency = 581 ns
N0.C04: MCSCRAMBLE_SEED_SEL_MCDDC_DP_REG access function - average write latency = 527 ns
N1.C06: MCSCRAMBLE_SEED_SEL_MCDDC_DP_REG access function - average write latency = 685 ns
N0.C05: MCSCRAMBLE_SEED_SEL_MCDDC_DP_REG access function - average write latency = 509 ns
N1.C07: MCSCRAMBLE_SEED_SEL_MCDDC_DP_REG access function - average write latency = 672 ns
N0.C06: MCSCRAMBLE_SEED_SEL_MCDDC_DP_REG access function - average write latency = 625 ns
N1.C00: MCSCRAMBLE_SEED_SEL_MCDDC_DP_REG access function - average read latency = 371 ns
N0.C07: MCSCRAMBLE_SEED_SEL_MCDDC_DP_REG access function - average write latency = 605 ns
N1.C01: MCSCRAMBLE_SEED_SEL_MCDDC_DP_REG access function - average read latency = 360 ns
N0.C00: MCSCRAMBLE_SEED_SEL_MCDDC_DP_REG access function - average read latency = 318 ns
N1.C02: MCSCRAMBLE_SEED_SEL_MCDDC_DP_REG access function - average read latency = 461 ns
N0.C01: MCSCRAMBLE_SEED_SEL_MCDDC_DP_REG access function - average read latency = 330 ns
N1.C03: MCSCRAMBLE_SEED_SEL_MCDDC_DP_REG access function - average read latency = 473 ns
N0.C02: MCSCRAMBLE_SEED_SEL_MCDDC_DP_REG access function - average read latency = 417 ns
N1.C04: MCSCRAMBLE_SEED_SEL_MCDDC_DP_REG access function - average read latency = 525 ns
N0.C03: MCSCRAMBLE_SEED_SEL_MCDDC_DP_REG access function - average read latency = 419 ns
N1.C05: MCSCRAMBLE_SEED_SEL_MCDDC_DP_REG access function - average read latency = 537 ns
N0.C04: MCSCRAMBLE_SEED_SEL_MCDDC_DP_REG access function - average read latency = 503 ns
N1.C06: MCSCRAMBLE_SEED_SEL_MCDDC_DP_REG access function - average read latency = 637 ns
N0.C05: MCSCRAMBLE_SEED_SEL_MCDDC_DP_REG access function - average read latency = 490 ns
N1.C07: MCSCRAMBLE_SEED_SEL_MCDDC_DP_REG access function - average read latency = 627 ns
N0.C06: MCSCRAMBLE_SEED_SEL_MCDDC_DP_REG access function - average read latency = 600 ns
S1 TME CPUID = 1
S1 TmeActivated = 0
S1 TME CPUID = 1
S1 TmeActivated = 0
N0.C07: MCSCRAMBLE_SEED_SEL_MCDDC_DP_REG access function - average read latency = 586 ns
S1 TME CPUID = 1
S0 TME CPUID = 1
S1 TmeActivated = 0
S0 TmeActivated = 0
S1 TME CPUID = 1
S0 TME CPUID = 1
S1 TmeActivated = 0
S0 TmeActivated = 0
tRRDD -- MinVal = 0x2, value = 0x0, adjusted to MinVal.
S0 TME CPUID = 1
tWWDD -- MinVal = 0x2, value = 0x0, adjusted to MinVal.
S0 TmeActivated = 0
tRWDD -- MinVal = 0x2, value = 0x0, adjusted to MinVal.
S0 TME CPUID = 1
tWRDD -- MinVal = 0x2, value = 0x0, adjusted to MinVal.
S0 TmeActivated = 0
tRRDS -- MinVal = 0x2, value = 0x0, adjusted to MinVal.
tRRDD -- MinVal = 0x2, value = 0x0, adjusted to MinVal.
tWWDS -- MinVal = 0x2, value = 0x0, adjusted to MinVal.
tWWDD -- MinVal = 0x2, value = 0x0, adjusted to MinVal.
tRWDS -- MinVal = 0x2, value = 0x0, adjusted to MinVal.
tRWDD -- MinVal = 0x2, value = 0x0, adjusted to MinVal.
tRRDS -- MinVal = 0x2, value = 0x0, adjusted to MinVal.
tWRDD -- MinVal = 0x2, value = 0x0, adjusted to MinVal.
tRRDD -- MinVal = 0x2, value = 0x0, adjusted to MinVal.
tRRDS -- MinVal = 0x2, value = 0x0, adjusted to MinVal.
tWWDD -- MinVal = 0x2, value = 0x0, adjusted to MinVal.
tWWDS -- MinVal = 0x2, value = 0x0, adjusted to MinVal.
tRWDD -- MinVal = 0x2, value = 0x0, adjusted to MinVal.
tRWDS -- MinVal = 0x2, value = 0x0, adjusted to MinVal.
tWRDD -- MinVal = 0x2, value = 0x0, adjusted to MinVal.
tRRDS -- MinVal = 0x2, value = 0x0, adjusted to MinVal.
tRRDS -- MinVal = 0x2, value = 0x0, adjusted to MinVal.
tRRDD -- MinVal = 0x2, value = 0x0, adjusted to MinVal.
tWWDS -- MinVal = 0x2, value = 0x0, adjusted to MinVal.
tWWDD -- MinVal = 0x2, value = 0x0, adjusted to MinVal.
tRWDS -- MinVal = 0x2, value = 0x0, adjusted to MinVal.
tRWDD -- MinVal = 0x2, value = 0x0, adjusted to MinVal.
tRRDS -- MinVal = 0x2, value = 0x0, adjusted to MinVal.
tWRDD -- MinVal = 0x2, value = 0x0, adjusted to MinVal.
tRRDD -- MinVal = 0x2, value = 0x0, adjusted to MinVal.
tRRDS -- MinVal = 0x2, value = 0x0, adjusted to MinVal.
tWWDD -- MinVal = 0x2, value = 0x0, adjusted to MinVal.
tWWDS -- MinVal = 0x2, value = 0x0, adjusted to MinVal.
tRWDD -- MinVal = 0x2, value = 0x0, adjusted to MinVal.
tRWDS -- MinVal = 0x2, value = 0x0, adjusted to MinVal.
tWRDD -- MinVal = 0x2, value = 0x0, adjusted to MinVal.
tRRDS -- MinVal = 0x2, value = 0x0, adjusted to MinVal.
tRRDS -- MinVal = 0x2, value = 0x0, adjusted to MinVal.
tRRDD -- MinVal = 0x2, value = 0x0, adjusted to MinVal.
tWWDS -- MinVal = 0x2, value = 0x0, adjusted to MinVal.
tWWDD -- MinVal = 0x2, value = 0x0, adjusted to MinVal.
tRWDS -- MinVal = 0x2, value = 0x0, adjusted to MinVal.
tRWDD -- MinVal = 0x2, value = 0x0, adjusted to MinVal.
tRRDS -- MinVal = 0x2, value = 0x0, adjusted to MinVal.
tWRDD -- MinVal = 0x2, value = 0x0, adjusted to MinVal.
tRRDD -- MinVal = 0x2, value = 0x0, adjusted to MinVal.
tRRDS -- MinVal = 0x2, value = 0x0, adjusted to MinVal.
tWWDD -- MinVal = 0x2, value = 0x0, adjusted to MinVal.
tWWDS -- MinVal = 0x2, value = 0x0, adjusted to MinVal.
tRWDD -- MinVal = 0x2, value = 0x0, adjusted to MinVal.
tRWDS -- MinVal = 0x2, value = 0x0, adjusted to MinVal.
tWRDD -- MinVal = 0x2, value = 0x0, adjusted to MinVal.
tRRDS -- MinVal = 0x2, value = 0x0, adjusted to MinVal.
tRRDS -- MinVal = 0x2, value = 0x0, adjusted to MinVal.
tRRDD -- MinVal = 0x2, value = 0x0, adjusted to MinVal.
tWWDS -- MinVal = 0x2, value = 0x0, adjusted to MinVal.
tWWDD -- MinVal = 0x2, value = 0x0, adjusted to MinVal.
tRWDS -- MinVal = 0x2, value = 0x0, adjusted to MinVal.
tRWDD -- MinVal = 0x2, value = 0x0, adjusted to MinVal.
tRRDS -- MinVal = 0x2, value = 0x0, adjusted to MinVal.
tWRDD -- MinVal = 0x2, value = 0x0, adjusted to MinVal.
[ScktId: 1] Early Configuration - 1272ms
tRRDS -- MinVal = 0x2, value = 0x0, adjusted to MinVal.
[ScktId: 1] DDRIO Initialization -- Started
tWWDS -- MinVal = 0x2, value = 0x0, adjusted to MinVal.
tRWDS -- MinVal = 0x2, value = 0x0, adjusted to MinVal.
tRRDS -- MinVal = 0x2, value = 0x0, adjusted to MinVal.
[ScktId: 0] Early Configuration - 728ms
[ScktId: 0] DDRIO Initialization -- Started
[ScktId: 1] DDRIO Initialization - 38ms
[ScktId: 1] DDRIO Initialization Late -- Started
DfxTimingOverride10nm Starts
[ScktId: 1] DDRIO Initialization Late - 17ms
[ScktId: 0] DDRIO Initialization - 32ms
[ScktId: 1] Pipe Sync AP Data -- Started
[ScktId: 0] DDRIO Initialization Late -- Started
DfxTimingOverride10nm Starts
[ScktId: 0] DDRIO Initialization Late - 20ms
[ScktId: 0] Pipe Sync AP Data -- Started
[ScktId: 0] Pipe Sync AP Data - 17ms
[ScktId: 1] Pipe Sync AP Data - 46ms
[ScktId: 0] Pipe Sync AP Smbus Mode -- Started
[ScktId: 1] Pipe Sync AP Smbus Mode -- Started
[ScktId: 0] Pipe Sync AP Smbus Mode - 13ms
[ScktId: 1] Pipe Sync AP Smbus Mode - 9ms
[ScktId: 0] Pipe Sync AP Reset Status -- Started
[ScktId: 1] Pipe Sync AP Reset Status -- Started
[ScktId: 0] Pipe Sync AP Reset Status - 13ms
[ScktId: 1] Pipe Sync AP Reset Status - 9ms
[ScktId: 0] Pipe Sync SBSP Status -- Started
[ScktId: 1] Pipe Sync SBSP Status -- Started
[ScktId: 1] Pipe Sync SBSP Status - 8ms
[ScktId: 0] Pipe Sync SBSP Status - 13ms
[ScktId: 1] DDR Training -- Started
[ScktId: 0] DDR Training -- Started
[ScktId: 1] Pre-Training Initialization -- Started
[ScktId: 0] Pre-Training Initialization -- Started
N1: Bus Instance = 0; I2C speed = 3; I3C speed = 2; Bus mode = 0
N0: Bus Instance = 0; I2C speed = 3; I3C speed = 2; Bus mode = 0
N1: Bus Instance = 0; I2C speed = 3; I3C speed = 2; Bus mode = 1
N0: Bus Instance = 0; I2C speed = 3; I3C speed = 2; Bus mode = 1
N1: I3C Instance 0: Switch to I3C mode - Status = Success
N0: I3C Instance 0: Switch to I3C mode - Status = Success
N1: Bus Instance = 1; I2C speed = 3; I3C speed = 2; Bus mode = 0
N0: Bus Instance = 1; I2C speed = 3; I3C speed = 2; Bus mode = 0
N1: Bus Instance = 1; I2C speed = 3; I3C speed = 2; Bus mode = 1
N0: Bus Instance = 1; I2C speed = 3; I3C speed = 2; Bus mode = 1
N1: I3C Instance 1: Switch to I3C mode - Status = Success
N0: I3C Instance 1: Switch to I3C mode - Status = Success
Socket 1 - Sending 3 NOPS sequence to exit clockstop.
[ScktId: 1] Pre-Training Initialization - 104ms
Socket 0 - Sending 3 NOPS sequence to exit clockstop.
[ScktId: 1] Host CS Training -- Started
[ScktId: 0] Pre-Training Initialization - 111ms
[ScktId: 0] Host CS Training -- Started
N0: Bus Instance = 0; I2C speed = 3; I3C speed = 2; Bus mode = 0
N1: Bus Instance = 0; I2C speed = 3; I3C speed = 2; Bus mode = 0
N0: Bus Instance = 0; I2C speed = 3; I3C speed = 2; Bus mode = 1
N1: Bus Instance = 0; I2C speed = 3; I3C speed = 2; Bus mode = 1
N0: I3C Instance 0: Switch to I3C mode - Status = Success
N1: I3C Instance 0: Switch to I3C mode - Status = Success
N0: Bus Instance = 1; I2C speed = 3; I3C speed = 2; Bus mode = 0
N1: Bus Instance = 1; I2C speed = 3; I3C speed = 2; Bus mode = 0
N0: Bus Instance = 1; I2C speed = 3; I3C speed = 2; Bus mode = 1
N1: Bus Instance = 1; I2C speed = 3; I3C speed = 2; Bus mode = 1
N0: I3C Instance 1: Switch to I3C mode - Status = Success
N1: I3C Instance 1: Switch to I3C mode - Status = Success
[ScktId: 0] Host CS Training - 224ms
[ScktId: 0] Host CA Training Simple -- Started
[ScktId: 1] Host CS Training - 244ms
[ScktId: 1] Host CA Training Simple -- Started
[ScktId: 0] Host CA Training Simple - 343ms
[ScktId: 0] RCD DCA DFE Training -- Started
[ScktId: 1] Host CA Training Simple - 572ms
[ScktId: 1] RCD DCA DFE Training -- Started
[ScktId: 0] RCD DCA DFE Training - 3669ms
[ScktId: 0] Host CA Training Complex -- Started
[ScktId: 0] Host CA Training Complex - 161ms
[ScktId: 0] RCD DCA Slew Rate Training -- Started
[ScktId: 0] RCD DCA Slew Rate Training - 4ms
[ScktId: 0] RCD DCA TCO Training -- Started
[ScktId: 1] RCD DCA DFE Training - 4104ms
[ScktId: 1] Host CA Training Complex -- Started
[ScktId: 0] RCD DCA TCO Training - 551ms
[ScktId: 0] RCD DCA/DCK Duty Cycle Training -- Started
[ScktId: 1] Host CA Training Complex - 170ms
[ScktId: 0] RCD DCA/DCK Duty Cycle Training - 411ms
[ScktId: 1] RCD DCA Slew Rate Training -- Started
[ScktId: 0] Re-center Host CA Training -- Started
[ScktId: 1] RCD DCA Slew Rate Training - 10ms
[ScktId: 1] RCD DCA TCO Training -- Started
[ScktId: 0] Re-center Host CA Training - 170ms
[ScktId: 0] CA temperature compensation -- Started
[ScktId: 0] CA temperature compensation - 5ms
[ScktId: 0] BCOM Training -- Started
[ScktId: 0] BCOM Training - 3ms
[ScktId: 0] RCD QCS Training -- Started
[ScktId: 0] RCD QCS Training - 104ms
[ScktId: 0] RCD QCA Training -- Started
[ScktId: 0] RCD QCA Training - 323ms
[ScktId: 0] PBA Enumeration -- Started
[ScktId: 0] PBA Enumeration - 3ms
[ScktId: 0] REQ Training -- Started
[ScktId: 0] REQ Training - 3ms
[ScktId: 0] MDQS Receive Enable Training -- Started
[ScktId: 1] RCD DCA TCO Training - 626ms
[ScktId: 0] MDQS Receive Enable Training - 5ms
[ScktId: 1] RCD DCA/DCK Duty Cycle Training -- Started
[ScktId: 0] MDQS Read Delay Training -- Started
[ScktId: 0] MDQS Read Delay Training - 10ms
[ScktId: 1] RCD DCA/DCK Duty Cycle Training - 466ms
[ScktId: 0] Receive Enable Training -- Started
[ScktId: 1] Re-center Host CA Training -- Started
[ScktId: 0] Receive Enable Training - 25ms
[ScktId: 0] Read Dq Dqs: Coarse Read DQ/DQS -- Started
[ScktId: 1] Re-center Host CA Training - 179ms
[ScktId: 1] CA temperature compensation -- Started
[ScktId: 1] CA temperature compensation - 5ms
[ScktId: 1] BCOM Training -- Started
[ScktId: 1] BCOM Training - 3ms
[ScktId: 1] RCD QCS Training -- Started
[ScktId: 1] RCD QCS Training - 111ms
[ScktId: 1] RCD QCA Training -- Started
[ScktId: 0] Read Dq Dqs: Coarse Read DQ/DQS - 342ms
[ScktId: 1] RCD QCA Training - 349ms
[ScktId: 0] Read Dq Dqs: Swizzle Discovery -- Started
[ScktId: 1] PBA Enumeration -- Started
[ScktId: 0] Read Dq Dqs: Swizzle Discovery - 10ms
[ScktId: 1] PBA Enumeration - 9ms
[ScktId: 0] Read Dq Dqs: Pre-DFE Read 2D Centering -- Started
[ScktId: 1] REQ Training -- Started
[ScktId: 1] REQ Training - 9ms
[ScktId: 1] MDQS Receive Enable Training -- Started
[ScktId: 1] MDQS Receive Enable Training - 5ms
[ScktId: 1] MDQS Read Delay Training -- Started
[ScktId: 1] MDQS Read Delay Training - 4ms
[ScktId: 1] Receive Enable Training -- Started
[ScktId: 1] Receive Enable Training - 22ms
[ScktId: 1] Read Dq Dqs: Coarse Read DQ/DQS -- Started
[ScktId: 0] Read Dq Dqs: Pre-DFE Read 2D Centering - 93ms
[ScktId: 0] Read Dq Dqs: Duty Cycle Adjuster -- Started
[ScktId: 0] Read Dq Dqs: Duty Cycle Adjuster - 5ms
[ScktId: 0] Read Dq Dqs: Read DFE Training -- Started
[ScktId: 1] Read Dq Dqs: Coarse Read DQ/DQS - 372ms
[ScktId: 1] Read Dq Dqs: Swizzle Discovery -- Started
[ScktId: 1] Read Dq Dqs: Swizzle Discovery - 6ms
[ScktId: 1] Read Dq Dqs: Pre-DFE Read 2D Centering -- Started
[ScktId: 1] Read Dq Dqs: Pre-DFE Read 2D Centering - 95ms
[ScktId: 1] Read Dq Dqs: Duty Cycle Adjuster -- Started
[ScktId: 1] Read Dq Dqs: Duty Cycle Adjuster - 5ms
[ScktId: 1] Read Dq Dqs: Read DFE Training -- Started
[ScktId: 0] Read Dq Dqs: Read DFE Training - 3341ms
[ScktId: 0] Read Dq Dqs: Post-DFE Read 2D Centering -- Started
[ScktId: 0] Read Dq Dqs: Post-DFE Read 2D Centering - 621ms
[ScktId: 0] Switch to DDRT2 Mode -- Started
[ScktId: 0] Switch to DDRT2 Mode - 4ms
[ScktId: 0] Buffer DRAM Write Leveling Training -- Started
[ScktId: 0] Buffer DRAM Write Leveling Training - 5ms
[ScktId: 0] Buffer Write Delay Training -- Started
[ScktId: 0] Buffer Write Delay Training - 5ms
[ScktId: 0] Write Leveling Training -- Started
[ScktId: 0] Write Leveling Training - 95ms
[ScktId: 0] Write Dq Dqs: Coarse Write DQ/DQS -- Started
[ScktId: 1] Read Dq Dqs: Read DFE Training - 3676ms
[ScktId: 1] Read Dq Dqs: Post-DFE Read 2D Centering -- Started
[ScktId: 0] Write Dq Dqs: Coarse Write DQ/DQS - 541ms
[ScktId: 0] Write Dq Dqs: Pre-DFE Write 2D Centering -- Started
N0.C00.D0.R0: High = 21 - Low = -23
N0.C00: Composite High = 21 - Composite Low = -23
N0.C02.D0.R0: High = 18 - Low = -22
N0.C02: Composite High = 18 - Composite Low = -22
N0.C04.D0.R0: High = 22 - Low = -22
N0.C04: Composite High = 22 - Composite Low = -22
N0.C06.D0.R0: High = 18 - Low = -20
N0.C06: Composite High = 18 - Composite Low = -20
[ScktId: 1] Read Dq Dqs: Post-DFE Read 2D Centering - 682ms
N0: Get eye height
[ScktId: 1] Switch to DDRT2 Mode -- Started
N0: Low: -20 High: 18
[ScktId: 1] Switch to DDRT2 Mode - 6ms
N0: Eye height = 38
[ScktId: 1] Buffer DRAM Write Leveling Training -- Started
N0: Timing Limited
[ScktId: 1] Buffer DRAM Write Leveling Training - 7ms
[ScktId: 1] Buffer Write Delay Training -- Started
[ScktId: 1] Buffer Write Delay Training - 5ms
[ScktId: 1] Write Leveling Training -- Started
[ScktId: 0] Write Dq Dqs: Pre-DFE Write 2D Centering - 294ms
[ScktId: 0] Write Dq Dqs: Slew Rate DQ -- Started
[ScktId: 0] Write Dq Dqs: Slew Rate DQ - 4ms
[ScktId: 0] Write Dq Dqs: TCO DQ -- Started
[ScktId: 0] Write Dq Dqs: TCO DQ - 4ms
[ScktId: 1] Write Leveling Training - 103ms
[ScktId: 0] Write Dq Dqs: Write DFE Training -- Started
[ScktId: 1] Write Dq Dqs: Coarse Write DQ/DQS -- Started
[ScktId: 1] Write Dq Dqs: Coarse Write DQ/DQS - 613ms
[ScktId: 1] Write Dq Dqs: Pre-DFE Write 2D Centering -- Started
N1.C00.D0.R0: High = 20 - Low = -24
N1.C00: Composite High = 20 - Composite Low = -24
N1.C02.D0.R0: High = 19 - Low = -23
N1.C02: Composite High = 19 - Composite Low = -23
N1.C04.D0.R0: High = 20 - Low = -22
N1.C04: Composite High = 20 - Composite Low = -22
N1.C06.D0.R0: High = 19 - Low = -19
N1.C06: Composite High = 19 - Composite Low = -19
N1: Get eye height
N1: Low: -19 High: 19
N1: Eye height = 38
N1: Timing Limited
[ScktId: 1] Write Dq Dqs: Pre-DFE Write 2D Centering - 304ms
[ScktId: 1] Write Dq Dqs: Slew Rate DQ -- Started
[ScktId: 1] Write Dq Dqs: Slew Rate DQ - 4ms
[ScktId: 1] Write Dq Dqs: TCO DQ -- Started
[ScktId: 1] Write Dq Dqs: TCO DQ - 4ms
[ScktId: 1] Write Dq Dqs: Write DFE Training -- Started
[ScktId: 0] Write Dq Dqs: Write DFE Training - 4192ms
[ScktId: 0] Buffer Write DFE Training -- Started
[ScktId: 0] Buffer Write DFE Training - 4ms
[ScktId: 0] Write Dq Dqs: Write ODT Latency Training -- Started
[ScktId: 0] Write Dq Dqs: Write ODT Latency Training - 8ms
[ScktId: 0] Command Normalization -- Started
[ScktId: 0] Command Normalization - 20ms
[ScktId: 0] Write Dq Dqs: Post-DFE Write 2D Centering -- Started
N0.C00.D0.R0: High = 20 - Low = -20
N0.C00: Composite High = 20 - Composite Low = -20
N0.C02.D0.R0: High = 20 - Low = -22
N0.C02: Composite High = 20 - Composite Low = -22
N0.C04.D0.R0: High = 22 - Low = -21
N0.C04: Composite High = 22 - Composite Low = -21
N0.C06.D0.R0: High = 20 - Low = -20
N0.C06: Composite High = 20 - Composite Low = -20
N0: Get eye height
N0: Low: -20 High: 20
N0: Eye height = 40
N0: Timing Limited
[ScktId: 1] Write Dq Dqs: Write DFE Training - 4602ms
[ScktId: 1] Buffer Write DFE Training -- Started
[ScktId: 1] Buffer Write DFE Training - 4ms
[ScktId: 1] Write Dq Dqs: Write ODT Latency Training -- Started
[ScktId: 1] Write Dq Dqs: Write ODT Latency Training - 8ms
[ScktId: 1] Command Normalization -- Started
[ScktId: 1] Command Normalization - 22ms
[ScktId: 1] Write Dq Dqs: Post-DFE Write 2D Centering -- Started
[ScktId: 0] Write Dq Dqs: Post-DFE Write 2D Centering - 1712ms
[ScktId: 0] Initialize Tx DQ Periodic Retraining -- Started
N1.C00.D0.R0: High = 21 - Low = -22
[ScktId: 0] Initialize Tx DQ Periodic Retraining - 7ms
N1.C00: Composite High = 21 - Composite Low = -22
[ScktId: 0] Read Dq Dqs: Post-DFE Read 2D Centering Late -- Started
N1.C02.D0.R0: High = 20 - Low = -21
N1.C02: Composite High = 20 - Composite Low = -21
N1.C04.D0.R0: High = 21 - Low = -22
N1.C04: Composite High = 21 - Composite Low = -22
N1.C06.D0.R0: High = 20 - Low = -19
N1.C06: Composite High = 20 - Composite Low = -19
N1: Get eye height
N1: Low: -19 High: 20
N1: Eye height = 39
N1: Timing Limited
[ScktId: 1] Write Dq Dqs: Post-DFE Write 2D Centering - 1668ms
[ScktId: 1] Initialize Tx DQ Periodic Retraining -- Started
[ScktId: 1] Initialize Tx DQ Periodic Retraining - 7ms
[ScktId: 1] Read Dq Dqs: Post-DFE Read 2D Centering Late -- Started
[ScktId: 0] Read Dq Dqs: Post-DFE Read 2D Centering Late - 12677ms
[ScktId: 0] Initialize Rx DQS Periodic Retraining -- Started
[ScktId: 0] Initialize Rx DQS Periodic Retraining - 6ms
[ScktId: 0] MemSweepTester -- Started
[ScktId: 0] MemSweepTester - 3ms
[ScktId: 0] PPR Flow -- Started
Calling PostPackageRepair
[ScktId: 0] PPR Flow - 6ms
[ScktId: 0] Roundtrip Latency Optimization -- Started
[ScktId: 0] Roundtrip Latency Optimization - 843ms
[ScktId: 0] Turnarounds Training -- Started
[ScktId: 1] Read Dq Dqs: Post-DFE Read 2D Centering Late - 12366ms
[ScktId: 1] Initialize Rx DQS Periodic Retraining -- Started
[ScktId: 1] Initialize Rx DQS Periodic Retraining - 6ms
[ScktId: 1] MemSweepTester -- Started
[ScktId: 1] MemSweepTester - 3ms
[ScktId: 1] PPR Flow -- Started
Calling PostPackageRepair
[ScktId: 1] PPR Flow - 6ms
[ScktId: 1] Roundtrip Latency Optimization -- Started
[ScktId: 0] Turnarounds Training - 522ms
Total MRC time = 32572ms
[ScktId: 0] DDR Training - 32582ms
[ScktId: 0] Pipe Sync AP Smbus Mode -- Started
[ScktId: 1] Roundtrip Latency Optimization - 871ms
[ScktId: 1] Turnarounds Training -- Started
[ScktId: 1] Turnarounds Training - 538ms
Total MRC time = 33627ms
[ScktId: 1] DDR Training - 33637ms
[ScktId: 1] Pipe Sync AP Smbus Mode -- Started
[ScktId: 0] Pipe Sync AP Smbus Mode - 1056ms
[ScktId: 1] Pipe Sync AP Smbus Mode - 4ms
[ScktId: 0] Display Training Results -- Started
[ScktId: 1] Display Training Results -- Started
[ScktId: 0] Display Training Results - 105ms
[ScktId: 1] Display Training Results - 205ms
[ScktId: 0] Check Training Results -- Started
[ScktId: 1] Check Training Results -- Started
[ScktId: 0] Check Training Results - 9ms
[ScktId: 1] Check Training Results - 9ms
[ScktId: 0] HBM Training -- Started
[ScktId: 1] HBM Training -- Started
HbmioMailbox -In Mailbox Full Prod Training (Cold Reset)
HbmioMailbox -In Mailbox Full Prod Training (Cold Reset)
Executing full_prod_training on Socket 0, HBMIO 0
Executing full_prod_training on Socket 1, HBMIO 0
Training result: return_data0 = 0x0, return_data1 = 0xB00
Training result: return_data0 = 0x0, return_data1 = 0xB00
Executing full_prod_training on Socket 0, HBMIO 1
Executing full_prod_training on Socket 1, HBMIO 1
Training result: return_data0 = 0x0, return_data1 = 0xB00
Training result: return_data0 = 0x0, return_data1 = 0xB00
Executing full_prod_training on Socket 0, HBMIO 2
Executing full_prod_training on Socket 1, HBMIO 2
Training result: return_data0 = 0x0, return_data1 = 0xB00
Training result: return_data0 = 0x0, return_data1 = 0xB00
Executing full_prod_training on Socket 0, HBMIO 3
Executing full_prod_training on Socket 1, HBMIO 3
Training result: return_data0 = 0x0, return_data1 = 0xB00
Training result: return_data0 = 0x0, return_data1 = 0xB00
Socket0 HbmCh0, PI Code:
Socket1 HbmCh0, PI Code:
DWord DQ: txdq_pi0_code = 0x1, txdq_pi1_code = 0x41
DWord DQ: txdq_pi0_code = 0x1, txdq_pi1_code = 0x41
DWord DQS: dqs_pi0_code = 0x20, dqs_pi1_code = 0x60
DWord DQS: dqs_pi0_code = 0x20, dqs_pi1_code = 0x60
AWord DQ: txdq_pi0_code = 0x7F, txdq_pi1_code = 0x3F
AWord DQ: txdq_pi0_code = 0x0, txdq_pi1_code = 0x40
AWord DQS: dqs_pi0_code = 0x20, dqs_pi1_code = 0x60
AWord DQS: dqs_pi0_code = 0x20, dqs_pi1_code = 0x60
Socket0 HbmCh1, PI Code:
Socket1 HbmCh1, PI Code:
DWord DQ: txdq_pi0_code = 0x0, txdq_pi1_code = 0x40
DWord DQ: txdq_pi0_code = 0x2, txdq_pi1_code = 0x42
DWord DQS: dqs_pi0_code = 0x20, dqs_pi1_code = 0x60
DWord DQS: dqs_pi0_code = 0x20, dqs_pi1_code = 0x60
AWord DQ: txdq_pi0_code = 0x7F, txdq_pi1_code = 0x3F
AWord DQ: txdq_pi0_code = 0x7E, txdq_pi1_code = 0x3E
AWord DQS: dqs_pi0_code = 0x20, dqs_pi1_code = 0x60
AWord DQS: dqs_pi0_code = 0x20, dqs_pi1_code = 0x60
Socket0 HbmCh2, PI Code:
Socket1 HbmCh2, PI Code:
DWord DQ: txdq_pi0_code = 0x1, txdq_pi1_code = 0x41
DWord DQ: txdq_pi0_code = 0x0, txdq_pi1_code = 0x40
DWord DQS: dqs_pi0_code = 0x20, dqs_pi1_code = 0x60
DWord DQS: dqs_pi0_code = 0x20, dqs_pi1_code = 0x60
AWord DQ: txdq_pi0_code = 0x7F, txdq_pi1_code = 0x3F
AWord DQ: txdq_pi0_code = 0x7F, txdq_pi1_code = 0x3F
AWord DQS: dqs_pi0_code = 0x20, dqs_pi1_code = 0x60
AWord DQS: dqs_pi0_code = 0x20, dqs_pi1_code = 0x60
Socket0 HbmCh3, PI Code:
Socket1 HbmCh3, PI Code:
DWord DQ: txdq_pi0_code = 0x1, txdq_pi1_code = 0x41
DWord DQ: txdq_pi0_code = 0x7F, txdq_pi1_code = 0x3F
DWord DQS: dqs_pi0_code = 0x20, dqs_pi1_code = 0x60
DWord DQS: dqs_pi0_code = 0x20, dqs_pi1_code = 0x60
AWord DQ: txdq_pi0_code = 0x7E, txdq_pi1_code = 0x3E
AWord DQ: txdq_pi0_code = 0x7F, txdq_pi1_code = 0x3F
AWord DQS: dqs_pi0_code = 0x20, dqs_pi1_code = 0x60
AWord DQS: dqs_pi0_code = 0x20, dqs_pi1_code = 0x60
Socket0 HbmCh4, PI Code:
Socket1 HbmCh4, PI Code:
DWord DQ: txdq_pi0_code = 0x2, txdq_pi1_code = 0x42
DWord DQ: txdq_pi0_code = 0x2, txdq_pi1_code = 0x42
DWord DQS: dqs_pi0_code = 0x20, dqs_pi1_code = 0x60
DWord DQS: dqs_pi0_code = 0x20, dqs_pi1_code = 0x60
AWord DQ: txdq_pi0_code = 0x7F, txdq_pi1_code = 0x3F
AWord DQ: txdq_pi0_code = 0x7F, txdq_pi1_code = 0x3F
AWord DQS: dqs_pi0_code = 0x20, dqs_pi1_code = 0x60
AWord DQS: dqs_pi0_code = 0x20, dqs_pi1_code = 0x60
Socket0 HbmCh5, PI Code:
Socket1 HbmCh5, PI Code:
DWord DQ: txdq_pi0_code = 0x1, txdq_pi1_code = 0x41
DWord DQ: txdq_pi0_code = 0x1, txdq_pi1_code = 0x41
DWord DQS: dqs_pi0_code = 0x20, dqs_pi1_code = 0x60
DWord DQS: dqs_pi0_code = 0x20, dqs_pi1_code = 0x60
AWord DQ: txdq_pi0_code = 0x7F, txdq_pi1_code = 0x3F
AWord DQ: txdq_pi0_code = 0x7E, txdq_pi1_code = 0x3E
AWord DQS: dqs_pi0_code = 0x20, dqs_pi1_code = 0x60
AWord DQS: dqs_pi0_code = 0x20, dqs_pi1_code = 0x60
Socket0 HbmCh6, PI Code:
Socket1 HbmCh6, PI Code:
DWord DQ: txdq_pi0_code = 0x2, txdq_pi1_code = 0x42
DWord DQ: txdq_pi0_code = 0x1, txdq_pi1_code = 0x41
DWord DQS: dqs_pi0_code = 0x20, dqs_pi1_code = 0x60
DWord DQS: dqs_pi0_code = 0x20, dqs_pi1_code = 0x60
AWord DQ: txdq_pi0_code = 0x7E, txdq_pi1_code = 0x3E
AWord DQ: txdq_pi0_code = 0x7E, txdq_pi1_code = 0x3E
AWord DQS: dqs_pi0_code = 0x20, dqs_pi1_code = 0x60
AWord DQS: dqs_pi0_code = 0x20, dqs_pi1_code = 0x60
Socket0 HbmCh7, PI Code:
Socket1 HbmCh7, PI Code:
DWord DQ: txdq_pi0_code = 0x1, txdq_pi1_code = 0x41
DWord DQ: txdq_pi0_code = 0x0, txdq_pi1_code = 0x40
DWord DQS: dqs_pi0_code = 0x20, dqs_pi1_code = 0x60
DWord DQS: dqs_pi0_code = 0x20, dqs_pi1_code = 0x60
AWord DQ: txdq_pi0_code = 0x7E, txdq_pi1_code = 0x3E
AWord DQ: txdq_pi0_code = 0x7E, txdq_pi1_code = 0x3E
AWord DQS: dqs_pi0_code = 0x20, dqs_pi1_code = 0x60
AWord DQS: dqs_pi0_code = 0x20, dqs_pi1_code = 0x60
Socket0 HbmCh8, PI Code:
Socket1 HbmCh8, PI Code:
DWord DQ: txdq_pi0_code = 0x0, txdq_pi1_code = 0x40
DWord DQ: txdq_pi0_code = 0x0, txdq_pi1_code = 0x40
DWord DQS: dqs_pi0_code = 0x20, dqs_pi1_code = 0x60
DWord DQS: dqs_pi0_code = 0x20, dqs_pi1_code = 0x60
AWord DQ: txdq_pi0_code = 0x0, txdq_pi1_code = 0x40
AWord DQ: txdq_pi0_code = 0x0, txdq_pi1_code = 0x40
AWord DQS: dqs_pi0_code = 0x20, dqs_pi1_code = 0x60
AWord DQS: dqs_pi0_code = 0x20, dqs_pi1_code = 0x60
Socket0 HbmCh9, PI Code:
Socket1 HbmCh9, PI Code:
DWord DQ: txdq_pi0_code = 0x0, txdq_pi1_code = 0x40
DWord DQ: txdq_pi0_code = 0x1, txdq_pi1_code = 0x41
DWord DQS: dqs_pi0_code = 0x20, dqs_pi1_code = 0x60
DWord DQS: dqs_pi0_code = 0x20, dqs_pi1_code = 0x60
AWord DQ: txdq_pi0_code = 0x0, txdq_pi1_code = 0x40
AWord DQ: txdq_pi0_code = 0x1, txdq_pi1_code = 0x41
AWord DQS: dqs_pi0_code = 0x20, dqs_pi1_code = 0x60
AWord DQS: dqs_pi0_code = 0x20, dqs_pi1_code = 0x60
Socket0 HbmCh10, PI Code:
Socket1 HbmCh10, PI Code:
DWord DQ: txdq_pi0_code = 0x1, txdq_pi1_code = 0x41
DWord DQ: txdq_pi0_code = 0x7F, txdq_pi1_code = 0x3F
DWord DQS: dqs_pi0_code = 0x20, dqs_pi1_code = 0x60
DWord DQS: dqs_pi0_code = 0x20, dqs_pi1_code = 0x60
AWord DQ: txdq_pi0_code = 0x0, txdq_pi1_code = 0x40
AWord DQ: txdq_pi0_code = 0x0, txdq_pi1_code = 0x40
AWord DQS: dqs_pi0_code = 0x20, dqs_pi1_code = 0x60
AWord DQS: dqs_pi0_code = 0x20, dqs_pi1_code = 0x60
Socket0 HbmCh11, PI Code:
Socket1 HbmCh11, PI Code:
DWord DQ: txdq_pi0_code = 0x2, txdq_pi1_code = 0x42
DWord DQ: txdq_pi0_code = 0x1, txdq_pi1_code = 0x41
DWord DQS: dqs_pi0_code = 0x20, dqs_pi1_code = 0x60
DWord DQS: dqs_pi0_code = 0x20, dqs_pi1_code = 0x60
AWord DQ: txdq_pi0_code = 0x0, txdq_pi1_code = 0x40
AWord DQ: txdq_pi0_code = 0x0, txdq_pi1_code = 0x40
AWord DQS: dqs_pi0_code = 0x20, dqs_pi1_code = 0x60
AWord DQS: dqs_pi0_code = 0x20, dqs_pi1_code = 0x60
Socket0 HbmCh12, PI Code:
Socket1 HbmCh12, PI Code:
DWord DQ: txdq_pi0_code = 0x2, txdq_pi1_code = 0x42
DWord DQ: txdq_pi0_code = 0x1, txdq_pi1_code = 0x41
DWord DQS: dqs_pi0_code = 0x20, dqs_pi1_code = 0x60
DWord DQS: dqs_pi0_code = 0x20, dqs_pi1_code = 0x60
AWord DQ: txdq_pi0_code = 0x0, txdq_pi1_code = 0x40
AWord DQ: txdq_pi0_code = 0x7F, txdq_pi1_code = 0x3F
AWord DQS: dqs_pi0_code = 0x20, dqs_pi1_code = 0x60
AWord DQS: dqs_pi0_code = 0x20, dqs_pi1_code = 0x60
Socket0 HbmCh13, PI Code:
Socket1 HbmCh13, PI Code:
DWord DQ: txdq_pi0_code = 0x1, txdq_pi1_code = 0x41
DWord DQ: txdq_pi0_code = 0x1, txdq_pi1_code = 0x41
DWord DQS: dqs_pi0_code = 0x20, dqs_pi1_code = 0x60
DWord DQS: dqs_pi0_code = 0x20, dqs_pi1_code = 0x60
AWord DQ: txdq_pi0_code = 0x7E, txdq_pi1_code = 0x3E
AWord DQ: txdq_pi0_code = 0x0, txdq_pi1_code = 0x40
AWord DQS: dqs_pi0_code = 0x20, dqs_pi1_code = 0x60
AWord DQS: dqs_pi0_code = 0x20, dqs_pi1_code = 0x60
Socket0 HbmCh14, PI Code:
Socket1 HbmCh14, PI Code:
DWord DQ: txdq_pi0_code = 0x2, txdq_pi1_code = 0x42
DWord DQ: txdq_pi0_code = 0x1, txdq_pi1_code = 0x41
DWord DQS: dqs_pi0_code = 0x20, dqs_pi1_code = 0x60
DWord DQS: dqs_pi0_code = 0x20, dqs_pi1_code = 0x60
AWord DQ: txdq_pi0_code = 0x7F, txdq_pi1_code = 0x3F
AWord DQ: txdq_pi0_code = 0x7F, txdq_pi1_code = 0x3F
AWord DQS: dqs_pi0_code = 0x20, dqs_pi1_code = 0x60
AWord DQS: dqs_pi0_code = 0x20, dqs_pi1_code = 0x60
Socket0 HbmCh15, PI Code:
Socket1 HbmCh15, PI Code:
DWord DQ: txdq_pi0_code = 0x2, txdq_pi1_code = 0x42
DWord DQ: txdq_pi0_code = 0x1, txdq_pi1_code = 0x41
DWord DQS: dqs_pi0_code = 0x20, dqs_pi1_code = 0x60
DWord DQS: dqs_pi0_code = 0x20, dqs_pi1_code = 0x60
AWord DQ: txdq_pi0_code = 0x7F, txdq_pi1_code = 0x3F
AWord DQ: txdq_pi0_code = 0x7F, txdq_pi1_code = 0x3F
AWord DQS: dqs_pi0_code = 0x20, dqs_pi1_code = 0x60
AWord DQS: dqs_pi0_code = 0x20, dqs_pi1_code = 0x60
Socket0 HbmCh16, PI Code:
Socket1 HbmCh16, PI Code:
DWord DQ: txdq_pi0_code = 0x2, txdq_pi1_code = 0x42
DWord DQ: txdq_pi0_code = 0x1, txdq_pi1_code = 0x41
DWord DQS: dqs_pi0_code = 0x20, dqs_pi1_code = 0x60
DWord DQS: dqs_pi0_code = 0x20, dqs_pi1_code = 0x60
AWord DQ: txdq_pi0_code = 0x0, txdq_pi1_code = 0x40
AWord DQ: txdq_pi0_code = 0x0, txdq_pi1_code = 0x40
AWord DQS: dqs_pi0_code = 0x20, dqs_pi1_code = 0x60
AWord DQS: dqs_pi0_code = 0x20, dqs_pi1_code = 0x60
Socket0 HbmCh17, PI Code:
Socket1 HbmCh17, PI Code:
DWord DQ: txdq_pi0_code = 0x0, txdq_pi1_code = 0x40
DWord DQ: txdq_pi0_code = 0x1, txdq_pi1_code = 0x41
DWord DQS: dqs_pi0_code = 0x20, dqs_pi1_code = 0x60
DWord DQS: dqs_pi0_code = 0x20, dqs_pi1_code = 0x60
AWord DQ: txdq_pi0_code = 0x7F, txdq_pi1_code = 0x3F
AWord DQ: txdq_pi0_code = 0x0, txdq_pi1_code = 0x40
AWord DQS: dqs_pi0_code = 0x20, dqs_pi1_code = 0x60
AWord DQS: dqs_pi0_code = 0x20, dqs_pi1_code = 0x60
Socket0 HbmCh18, PI Code:
Socket1 HbmCh18, PI Code:
DWord DQ: txdq_pi0_code = 0x1, txdq_pi1_code = 0x41
DWord DQ: txdq_pi0_code = 0x2, txdq_pi1_code = 0x42
DWord DQS: dqs_pi0_code = 0x20, dqs_pi1_code = 0x60
DWord DQS: dqs_pi0_code = 0x20, dqs_pi1_code = 0x60
AWord DQ: txdq_pi0_code = 0x7F, txdq_pi1_code = 0x3F
AWord DQ: txdq_pi0_code = 0x0, txdq_pi1_code = 0x40
AWord DQS: dqs_pi0_code = 0x20, dqs_pi1_code = 0x60
AWord DQS: dqs_pi0_code = 0x20, dqs_pi1_code = 0x60
Socket0 HbmCh19, PI Code:
Socket1 HbmCh19, PI Code:
DWord DQ: txdq_pi0_code = 0x0, txdq_pi1_code = 0x40
DWord DQ: txdq_pi0_code = 0x0, txdq_pi1_code = 0x40
DWord DQS: dqs_pi0_code = 0x20, dqs_pi1_code = 0x60
DWord DQS: dqs_pi0_code = 0x20, dqs_pi1_code = 0x60
AWord DQ: txdq_pi0_code = 0x7F, txdq_pi1_code = 0x3F
AWord DQ: txdq_pi0_code = 0x7E, txdq_pi1_code = 0x3E
AWord DQS: dqs_pi0_code = 0x20, dqs_pi1_code = 0x60
AWord DQS: dqs_pi0_code = 0x20, dqs_pi1_code = 0x60
Socket0 HbmCh20, PI Code:
Socket1 HbmCh20, PI Code:
DWord DQ: txdq_pi0_code = 0x2, txdq_pi1_code = 0x42
DWord DQ: txdq_pi0_code = 0x2, txdq_pi1_code = 0x42
DWord DQS: dqs_pi0_code = 0x20, dqs_pi1_code = 0x60
DWord DQS: dqs_pi0_code = 0x20, dqs_pi1_code = 0x60
AWord DQ: txdq_pi0_code = 0x7F, txdq_pi1_code = 0x3F
AWord DQ: txdq_pi0_code = 0x7F, txdq_pi1_code = 0x3F
AWord DQS: dqs_pi0_code = 0x20, dqs_pi1_code = 0x60
AWord DQS: dqs_pi0_code = 0x20, dqs_pi1_code = 0x60
Socket0 HbmCh21, PI Code:
Socket1 HbmCh21, PI Code:
DWord DQ: txdq_pi0_code = 0x1, txdq_pi1_code = 0x41
DWord DQ: txdq_pi0_code = 0x3, txdq_pi1_code = 0x43
DWord DQS: dqs_pi0_code = 0x20, dqs_pi1_code = 0x60
DWord DQS: dqs_pi0_code = 0x20, dqs_pi1_code = 0x60
AWord DQ: txdq_pi0_code = 0x7E, txdq_pi1_code = 0x3E
AWord DQ: txdq_pi0_code = 0x7F, txdq_pi1_code = 0x3F
AWord DQS: dqs_pi0_code = 0x20, dqs_pi1_code = 0x60
AWord DQS: dqs_pi0_code = 0x20, dqs_pi1_code = 0x60
Socket0 HbmCh22, PI Code:
Socket1 HbmCh22, PI Code:
DWord DQ: txdq_pi0_code = 0x2, txdq_pi1_code = 0x42
DWord DQ: txdq_pi0_code = 0x3, txdq_pi1_code = 0x43
DWord DQS: dqs_pi0_code = 0x20, dqs_pi1_code = 0x60
DWord DQS: dqs_pi0_code = 0x20, dqs_pi1_code = 0x60
AWord DQ: txdq_pi0_code = 0x7F, txdq_pi1_code = 0x3F
AWord DQ: txdq_pi0_code = 0x7F, txdq_pi1_code = 0x3F
AWord DQS: dqs_pi0_code = 0x20, dqs_pi1_code = 0x60
AWord DQS: dqs_pi0_code = 0x20, dqs_pi1_code = 0x60
Socket0 HbmCh23, PI Code:
Socket1 HbmCh23, PI Code:
DWord DQ: txdq_pi0_code = 0x2, txdq_pi1_code = 0x42
DWord DQ: txdq_pi0_code = 0x0, txdq_pi1_code = 0x40
DWord DQS: dqs_pi0_code = 0x20, dqs_pi1_code = 0x60
DWord DQS: dqs_pi0_code = 0x20, dqs_pi1_code = 0x60
AWord DQ: txdq_pi0_code = 0x7E, txdq_pi1_code = 0x3E
AWord DQ: txdq_pi0_code = 0x7E, txdq_pi1_code = 0x3E
AWord DQS: dqs_pi0_code = 0x20, dqs_pi1_code = 0x60
AWord DQS: dqs_pi0_code = 0x20, dqs_pi1_code = 0x60
Socket0 HbmCh24, PI Code:
Socket1 HbmCh24, PI Code:
DWord DQ: txdq_pi0_code = 0x7F, txdq_pi1_code = 0x3F
DWord DQ: txdq_pi0_code = 0x7F, txdq_pi1_code = 0x3F
DWord DQS: dqs_pi0_code = 0x20, dqs_pi1_code = 0x60
DWord DQS: dqs_pi0_code = 0x20, dqs_pi1_code = 0x60
AWord DQ: txdq_pi0_code = 0x7D, txdq_pi1_code = 0x3D
AWord DQ: txdq_pi0_code = 0x7F, txdq_pi1_code = 0x3F
AWord DQS: dqs_pi0_code = 0x20, dqs_pi1_code = 0x60
AWord DQS: dqs_pi0_code = 0x20, dqs_pi1_code = 0x60
Socket0 HbmCh25, PI Code:
Socket1 HbmCh25, PI Code:
DWord DQ: txdq_pi0_code = 0x0, txdq_pi1_code = 0x40
DWord DQ: txdq_pi0_code = 0x0, txdq_pi1_code = 0x40
DWord DQS: dqs_pi0_code = 0x20, dqs_pi1_code = 0x60
DWord DQS: dqs_pi0_code = 0x20, dqs_pi1_code = 0x60
AWord DQ: txdq_pi0_code = 0x0, txdq_pi1_code = 0x40
AWord DQ: txdq_pi0_code = 0x1, txdq_pi1_code = 0x41
AWord DQS: dqs_pi0_code = 0x20, dqs_pi1_code = 0x60
AWord DQS: dqs_pi0_code = 0x20, dqs_pi1_code = 0x60
Socket0 HbmCh26, PI Code:
Socket1 HbmCh26, PI Code:
DWord DQ: txdq_pi0_code = 0x7E, txdq_pi1_code = 0x3E
DWord DQ: txdq_pi0_code = 0x0, txdq_pi1_code = 0x40
DWord DQS: dqs_pi0_code = 0x20, dqs_pi1_code = 0x60
DWord DQS: dqs_pi0_code = 0x20, dqs_pi1_code = 0x60
AWord DQ: txdq_pi0_code = 0x0, txdq_pi1_code = 0x40
AWord DQ: txdq_pi0_code = 0x0, txdq_pi1_code = 0x40
AWord DQS: dqs_pi0_code = 0x20, dqs_pi1_code = 0x60
AWord DQS: dqs_pi0_code = 0x20, dqs_pi1_code = 0x60
Socket0 HbmCh27, PI Code:
Socket1 HbmCh27, PI Code:
DWord DQ: txdq_pi0_code = 0x7F, txdq_pi1_code = 0x3F
DWord DQ: txdq_pi0_code = 0x7F, txdq_pi1_code = 0x3F
DWord DQS: dqs_pi0_code = 0x20, dqs_pi1_code = 0x60
DWord DQS: dqs_pi0_code = 0x20, dqs_pi1_code = 0x60
AWord DQ: txdq_pi0_code = 0x0, txdq_pi1_code = 0x40
AWord DQ: txdq_pi0_code = 0x7F, txdq_pi1_code = 0x3F
AWord DQS: dqs_pi0_code = 0x20, dqs_pi1_code = 0x60
AWord DQS: dqs_pi0_code = 0x20, dqs_pi1_code = 0x60
Socket0 HbmCh28, PI Code:
Socket1 HbmCh28, PI Code:
DWord DQ: txdq_pi0_code = 0x1, txdq_pi1_code = 0x41
DWord DQ: txdq_pi0_code = 0x0, txdq_pi1_code = 0x40
DWord DQS: dqs_pi0_code = 0x20, dqs_pi1_code = 0x60
DWord DQS: dqs_pi0_code = 0x20, dqs_pi1_code = 0x60
AWord DQ: txdq_pi0_code = 0x7E, txdq_pi1_code = 0x3E
AWord DQ: txdq_pi0_code = 0x7E, txdq_pi1_code = 0x3E
AWord DQS: dqs_pi0_code = 0x20, dqs_pi1_code = 0x60
AWord DQS: dqs_pi0_code = 0x20, dqs_pi1_code = 0x60
Socket0 HbmCh29, PI Code:
Socket1 HbmCh29, PI Code:
DWord DQ: txdq_pi0_code = 0x1, txdq_pi1_code = 0x41
DWord DQ: txdq_pi0_code = 0x1, txdq_pi1_code = 0x41
DWord DQS: dqs_pi0_code = 0x20, dqs_pi1_code = 0x60
DWord DQS: dqs_pi0_code = 0x20, dqs_pi1_code = 0x60
AWord DQ: txdq_pi0_code = 0x7E, txdq_pi1_code = 0x3E
AWord DQ: txdq_pi0_code = 0x7E, txdq_pi1_code = 0x3E
AWord DQS: dqs_pi0_code = 0x20, dqs_pi1_code = 0x60
AWord DQS: dqs_pi0_code = 0x20, dqs_pi1_code = 0x60
Socket0 HbmCh30, PI Code:
Socket1 HbmCh30, PI Code:
DWord DQ: txdq_pi0_code = 0x0, txdq_pi1_code = 0x40
DWord DQ: txdq_pi0_code = 0x1, txdq_pi1_code = 0x41
DWord DQS: dqs_pi0_code = 0x20, dqs_pi1_code = 0x60
DWord DQS: dqs_pi0_code = 0x20, dqs_pi1_code = 0x60
AWord DQ: txdq_pi0_code = 0x7F, txdq_pi1_code = 0x3F
AWord DQ: txdq_pi0_code = 0x7D, txdq_pi1_code = 0x3D
AWord DQS: dqs_pi0_code = 0x20, dqs_pi1_code = 0x60
AWord DQS: dqs_pi0_code = 0x20, dqs_pi1_code = 0x60
Socket0 HbmCh31, PI Code:
Socket1 HbmCh31, PI Code:
DWord DQ: txdq_pi0_code = 0x2, txdq_pi1_code = 0x42
DWord DQ: txdq_pi0_code = 0x7F, txdq_pi1_code = 0x3F
DWord DQS: dqs_pi0_code = 0x20, dqs_pi1_code = 0x60
DWord DQS: dqs_pi0_code = 0x20, dqs_pi1_code = 0x60
AWord DQ: txdq_pi0_code = 0x7E, txdq_pi1_code = 0x3E
AWord DQ: txdq_pi0_code = 0x7F, txdq_pi1_code = 0x3F
AWord DQS: dqs_pi0_code = 0x20, dqs_pi1_code = 0x60
AWord DQS: dqs_pi0_code = 0x20, dqs_pi1_code = 0x60
Socket0 HbmIo0, HbmPhyCfg0Fuse = 0xF2099D47, HbmPhyCfg1Fuse = 0x26C8A033
Socket1 HbmIo0, HbmPhyCfg0Fuse = 0xF2099D47, HbmPhyCfg1Fuse = 0x26C8A033
Socket0 HbmIo1, HbmPhyCfg0Fuse = 0xF2099D47, HbmPhyCfg1Fuse = 0x26C8A833
Socket1 HbmIo1, HbmPhyCfg0Fuse = 0xF2099D47, HbmPhyCfg1Fuse = 0x26C8A833
Socket0 HbmIo2, HbmPhyCfg0Fuse = 0xF2099D47, HbmPhyCfg1Fuse = 0x26C8A833
Socket1 HbmIo2, HbmPhyCfg0Fuse = 0xF2099D47, HbmPhyCfg1Fuse = 0x26C8A833
Socket0 HbmIo3, HbmPhyCfg0Fuse = 0xF2099D47, HbmPhyCfg1Fuse = 0x26C8A033
Socket1 HbmIo3, HbmPhyCfg0Fuse = 0xF2099D47, HbmPhyCfg1Fuse = 0x26C8A033
Socket0 HbmCh0, AWordReadTiming = 0x83E59423, AWordWriteTiming = 0x1D3400A5
Socket1 HbmCh0, AWordReadTiming = 0x83E59423, AWordWriteTiming = 0x1D3400A5
Socket0 HbmCh1, AWordReadTiming = 0x83E59423, AWordWriteTiming = 0x1D3400A5
Socket1 HbmCh1, AWordReadTiming = 0x83E59423, AWordWriteTiming = 0x1D3400A5
Socket0 HbmCh2, AWordReadTiming = 0x83E59423, AWordWriteTiming = 0x1D3400A5
Socket1 HbmCh2, AWordReadTiming = 0x83E59423, AWordWriteTiming = 0x1D3400A5
Socket0 HbmCh3, AWordReadTiming = 0x83E59423, AWordWriteTiming = 0x1D3400A5
Socket1 HbmCh3, AWordReadTiming = 0x83E59423, AWordWriteTiming = 0x1D3400A5
Socket0 HbmCh4, AWordReadTiming = 0x83E59423, AWordWriteTiming = 0x1D3400A5
Socket1 HbmCh4, AWordReadTiming = 0x83E59423, AWordWriteTiming = 0x1D3400A5
Socket0 HbmCh5, AWordReadTiming = 0x83E59423, AWordWriteTiming = 0x1D3400A5
Socket1 HbmCh5, AWordReadTiming = 0x83E59423, AWordWriteTiming = 0x1D3400A5
Socket0 HbmCh6, AWordReadTiming = 0x83E59423, AWordWriteTiming = 0x1D3400A5
Socket1 HbmCh6, AWordReadTiming = 0x83E59423, AWordWriteTiming = 0x1D3400A5
Socket0 HbmCh7, AWordReadTiming = 0x83E59423, AWordWriteTiming = 0x1D3400A5
Socket1 HbmCh7, AWordReadTiming = 0x83E59423, AWordWriteTiming = 0x1D3400A5
Socket0 HbmCh8, AWordReadTiming = 0x83E59423, AWordWriteTiming = 0x1D3400A5
Socket1 HbmCh8, AWordReadTiming = 0x83E59423, AWordWriteTiming = 0x1D3400A5
Socket0 HbmCh9, AWordReadTiming = 0x83E59423, AWordWriteTiming = 0x1D3400A5
Socket1 HbmCh9, AWordReadTiming = 0x83E59423, AWordWriteTiming = 0x1D3400A5
Socket0 HbmCh10, AWordReadTiming = 0x83E59423, AWordWriteTiming = 0x1D3400A5
Socket1 HbmCh10, AWordReadTiming = 0x83E59423, AWordWriteTiming = 0x1D3400A5
Socket0 HbmCh11, AWordReadTiming = 0x83E59423, AWordWriteTiming = 0x1D3400A5
Socket1 HbmCh11, AWordReadTiming = 0x83E59423, AWordWriteTiming = 0x1D3400A5
Socket0 HbmCh12, AWordReadTiming = 0x83E59423, AWordWriteTiming = 0x1D3400A5
Socket1 HbmCh12, AWordReadTiming = 0x83E59423, AWordWriteTiming = 0x1D3400A5
Socket0 HbmCh13, AWordReadTiming = 0x83E59423, AWordWriteTiming = 0x1D3400A5
Socket1 HbmCh13, AWordReadTiming = 0x83E59423, AWordWriteTiming = 0x1D3400A5
Socket0 HbmCh14, AWordReadTiming = 0x83E59423, AWordWriteTiming = 0x1D3400A5
Socket1 HbmCh14, AWordReadTiming = 0x83E59423, AWordWriteTiming = 0x1D3400A5
Socket0 HbmCh15, AWordReadTiming = 0x83E59423, AWordWriteTiming = 0x1D3400A5
Socket1 HbmCh15, AWordReadTiming = 0x83E59423, AWordWriteTiming = 0x1D3400A5
Socket0 HbmCh16, AWordReadTiming = 0x83E59423, AWordWriteTiming = 0x1D3400A5
Socket1 HbmCh16, AWordReadTiming = 0x83E59423, AWordWriteTiming = 0x1D3400A5
Socket0 HbmCh17, AWordReadTiming = 0x83E59423, AWordWriteTiming = 0x1D3400A5
Socket1 HbmCh17, AWordReadTiming = 0x83E59423, AWordWriteTiming = 0x1D3400A5
Socket0 HbmCh18, AWordReadTiming = 0x83E59423, AWordWriteTiming = 0x1D3400A5
Socket1 HbmCh18, AWordReadTiming = 0x83E59423, AWordWriteTiming = 0x1D3400A5
Socket0 HbmCh19, AWordReadTiming = 0x83E59423, AWordWriteTiming = 0x1D3400A5
Socket1 HbmCh19, AWordReadTiming = 0x83E59423, AWordWriteTiming = 0x1D3400A5
Socket0 HbmCh20, AWordReadTiming = 0x83E59423, AWordWriteTiming = 0x1D3400A5
Socket1 HbmCh20, AWordReadTiming = 0x83E59423, AWordWriteTiming = 0x1D3400A5
Socket0 HbmCh21, AWordReadTiming = 0x83E59423, AWordWriteTiming = 0x1D3400A5
Socket1 HbmCh21, AWordReadTiming = 0x83E59423, AWordWriteTiming = 0x1D3400A5
Socket0 HbmCh22, AWordReadTiming = 0x83E59423, AWordWriteTiming = 0x1D3400A5
Socket1 HbmCh22, AWordReadTiming = 0x83E59423, AWordWriteTiming = 0x1D3400A5
Socket0 HbmCh23, AWordReadTiming = 0x83E59423, AWordWriteTiming = 0x1D3400A5
Socket1 HbmCh23, AWordReadTiming = 0x83E59423, AWordWriteTiming = 0x1D3400A5
Socket0 HbmCh24, AWordReadTiming = 0x83E59423, AWordWriteTiming = 0x1D3400A5
Socket1 HbmCh24, AWordReadTiming = 0x83E59423, AWordWriteTiming = 0x1D3400A5
Socket0 HbmCh25, AWordReadTiming = 0x83E59423, AWordWriteTiming = 0x1D3400A5
Socket1 HbmCh25, AWordReadTiming = 0x83E59423, AWordWriteTiming = 0x1D3400A5
Socket0 HbmCh26, AWordReadTiming = 0x83E59423, AWordWriteTiming = 0x1D3400A5
Socket1 HbmCh26, AWordReadTiming = 0x83E59423, AWordWriteTiming = 0x1D3400A5
Socket0 HbmCh27, AWordReadTiming = 0x83E59423, AWordWriteTiming = 0x1D3400A5
Socket1 HbmCh27, AWordReadTiming = 0x83E59423, AWordWriteTiming = 0x1D3400A5
Socket0 HbmCh28, AWordReadTiming = 0x83E59423, AWordWriteTiming = 0x1D3400A5
Socket1 HbmCh28, AWordReadTiming = 0x83E59423, AWordWriteTiming = 0x1D3400A5
Socket0 HbmCh29, AWordReadTiming = 0x83E59423, AWordWriteTiming = 0x1D3400A5
Socket1 HbmCh29, AWordReadTiming = 0x83E59423, AWordWriteTiming = 0x1D3400A5
Socket0 HbmCh30, AWordReadTiming = 0x83E59423, AWordWriteTiming = 0x1D3400A5
Socket1 HbmCh30, AWordReadTiming = 0x83E59423, AWordWriteTiming = 0x1D3400A5
Socket0 HbmCh31, AWordReadTiming = 0x83E59423, AWordWriteTiming = 0x1D3400A5
Socket1 HbmCh31, AWordReadTiming = 0x83E59423, AWordWriteTiming = 0x1D3400A5
Socket0 HbmIo0, UcRamEccLog0 = 0x0, UcRamEccLog1 = 0x0
Socket1 HbmIo0, UcRamEccLog0 = 0x0, UcRamEccLog1 = 0x0
Socket0 HbmIo1, UcRamEccLog0 = 0x0, UcRamEccLog1 = 0x0
Socket1 HbmIo1, UcRamEccLog0 = 0x0, UcRamEccLog1 = 0x0
Socket0 HbmIo2, UcRamEccLog0 = 0x0, UcRamEccLog1 = 0x0
Socket1 HbmIo2, UcRamEccLog0 = 0x0, UcRamEccLog1 = 0x0
Socket0 HbmIo3, UcRamEccLog0 = 0x0, UcRamEccLog1 = 0x0
Socket1 HbmIo3, UcRamEccLog0 = 0x0, UcRamEccLog1 = 0x0
Socket0 HbmIo0, UcScratchPad0 = 0x60000000, UcScratchPad1 = 0x40000006, UcScratchPad2 = 0x0
Socket1 HbmIo0, UcScratchPad0 = 0x60000000, UcScratchPad1 = 0x40000006, UcScratchPad2 = 0x0
Socket0 HbmIo1, UcScratchPad0 = 0x60000000, UcScratchPad1 = 0x40000006, UcScratchPad2 = 0x0
Socket1 HbmIo1, UcScratchPad0 = 0x60000000, UcScratchPad1 = 0x40000006, UcScratchPad2 = 0x0
Socket0 HbmIo2, UcScratchPad0 = 0x60000000, UcScratchPad1 = 0x40000006, UcScratchPad2 = 0x0
Socket1 HbmIo2, UcScratchPad0 = 0x60000000, UcScratchPad1 = 0x40000006, UcScratchPad2 = 0x0
Socket0 HbmIo3, UcScratchPad0 = 0x60000000, UcScratchPad1 = 0x40000006, UcScratchPad2 = 0x0
Socket1 HbmIo3, UcScratchPad0 = 0x60000000, UcScratchPad1 = 0x40000006, UcScratchPad2 = 0x0
HbmioMailbox -IEEE 1500 Read Device ID for Socket 0 HbmIoId 0
HbmioMailbox -IEEE 1500 Read Device ID for Socket 1 HbmIoId 0
HBM: DeviceIdData = {0x3389FFC3, 0xA0A80431, 0x0003A1D0}
HBM: DeviceIdData = {0xAAE9FFC3, 0xA0A80400, 0x0003A1D0}
HbmioMailbox -IEEE 1500 Read Device ID for Socket 0 HbmIoId 1
HbmioMailbox -IEEE 1500 Read Device ID for Socket 1 HbmIoId 1
HBM: DeviceIdData = {0x2309FFC3, 0xA0A80431, 0x0003A1D0}
HBM: DeviceIdData = {0xAE09FFC3, 0xA0A80400, 0x0003A1D0}
HbmioMailbox -IEEE 1500 Read Device ID for Socket 0 HbmIoId 2
HbmioMailbox -IEEE 1500 Read Device ID for Socket 1 HbmIoId 2
HBM: DeviceIdData = {0x3DC9FFC3, 0xA0A80431, 0x0003A1D0}
HBM: DeviceIdData = {0xA271FFC3, 0xA0A80400, 0x0003A1D0}
HbmioMailbox -IEEE 1500 Read Device ID for Socket 0 HbmIoId 3
HbmioMailbox -IEEE 1500 Read Device ID for Socket 1 HbmIoId 3
HBM: DeviceIdData = {0x2669FFC3, 0xA0A00020, 0x0003A1D0}
HBM: DeviceIdData = {0xB299FFC3, 0xA0A80400, 0x0003A1D0}
| HBM Socket:0 Display Device Info |
| Field | HBMIO MODULE 0 | HBMIO MODULE 1 | HBMIO MODULE 2 | HBMIO MODULE 3 |
|Module Enable | ENABLED | ENABLED | ENABLED | ENABLED |
|Model num | 43 | 43 | 43 | 43 |
|Stack High | 8 | 8 | 8 | 8 |
|Channel enable| 11111111 | 11111111 | 11111111 | 11111111 |
|Address Mode | Pseudo Ch | Pseudo Ch | Pseudo Ch | Pseudo Ch |
|Serial number | 02010C4CE2 | 02010C48C2 | 02010C4F72 | 000008099A |
|Manuf. Week | WW10 | WW10 | WW10 | WW10 |
|Manuf. Year | 2021 | 2021 | 2021 | 2021 |
|Manuf. loc | 000D | 000D | 000D | 000D |
|Manuf. ID | SAMSUNG | SAMSUNG | SAMSUNG | SAMSUNG |
|Density | 16 Gbit | 16 Gbit | 16 Gbit | 16 Gbit |
|ECC | ECC | ECC | ECC | ECC |
|Gen2 Test | Supported | Supported | Supported | Supported |
| HBM Socket:1 Display Device Info |
| Field | HBMIO MODULE 0 | HBMIO MODULE 1 | HBMIO MODULE 2 | HBMIO MODULE 3 |
|Module Enable | ENABLED | ENABLED | ENABLED | ENABLED |
|Model num | 43 | 43 | 43 | 43 |
|Stack High | 8 | 8 | 8 | 8 |
|Channel enable| 11111111 | 11111111 | 11111111 | 11111111 |
|Address Mode | Pseudo Ch | Pseudo Ch | Pseudo Ch | Pseudo Ch |
|Serial number | 0201002ABA | 0201002B82 | 020100289C | 0201002CA6 |
|Manuf. Week | WW10 | WW10 | WW10 | WW10 |
|Manuf. Year | 2021 | 2021 | 2021 | 2021 |
|Manuf. loc | 000D | 000D | 000D | 000D |
|Manuf. ID | SAMSUNG | SAMSUNG | SAMSUNG | SAMSUNG |
|Density | 16 Gbit | 16 Gbit | 16 Gbit | 16 Gbit |
|ECC | ECC | ECC | ECC | ECC |
|Gen2 Test | Supported | Supported | Supported | Supported |
N0: DDR and HBM memory populated!
N1: DDR and HBM memory populated!
[ScktId: 0] HBM Training - 2916ms
[ScktId: 1] HBM Training - 2915ms
[ScktId: 0] HBM PPR Flow -- Started
[ScktId: 1] HBM PPR Flow -- Started
[ScktId: 0] HBM PPR Flow - 6ms
[ScktId: 1] HBM PPR Flow - 7ms
[ScktId: 0] HBM mBIST Flow -- Started
[ScktId: 1] HBM mBIST Flow -- Started
[ScktId: 0] HBM mBIST Flow - 6ms
[ScktId: 1] HBM mBIST Flow - 7ms
[ScktId: 0] HBM ReTraining -- Started
[ScktId: 1] HBM ReTraining -- Started
[ScktId: 0] HBM ReTraining - 7ms
[ScktId: 1] HBM ReTraining - 7ms
[ScktId: 0] AP HBM Information -- Started
[ScktId: 1] AP HBM Information -- Started
[ScktId: 0] AP HBM Information - 12ms
[ScktId: 1] AP HBM Information - 9ms
[ScktId: 0] Post-Training Initialization -- Started
[ScktId: 1] Post-Training Initialization -- Started
[ScktId: 0] Post-Training Initialization - 9ms
[ScktId: 1] Post-Training Initialization - 10ms
[ScktId: 0] Pipe Sync AP Pre SSA Data -- Started
[ScktId: 1] Pipe Sync AP Pre SSA Data -- Started
[ScktId: 0] Pipe Sync AP Pre SSA Data - 27ms
[ScktId: 1] Pipe Sync AP Pre SSA Data - 22ms
[ScktId: 0] Enable RX Retraining -- Started
[ScktId: 1] Enable RX Retraining -- Started
[ScktId: 0] Enable RX Retraining - 8ms
[ScktId: 1] Enable RX Retraining - 8ms
[ScktId: 0] Enable TX Retraining -- Started
[ScktId: 1] Enable TX Retraining -- Started
[ScktId: 0] Enable TX Retraining - 521ms
[ScktId: 0] Rank Margin Test -- Started
[ScktId: 1] Enable TX Retraining - 521ms
[ScktId: 0] Rank Margin Test - 3ms
[ScktId: 1] Rank Margin Test -- Started
[ScktId: 0] Pipe Sync SBSP Post SSA Data -- Started
[ScktId: 1] Rank Margin Test - 7ms
[ScktId: 1] Pipe Sync SBSP Post SSA Data -- Started
[ScktId: 1] Pipe Sync SBSP Post SSA Data - 5ms
[ScktId: 0] Pipe Sync SBSP Post SSA Data - 17ms
[ScktId: 1] Pipe Sync AP Pre I/O Health Check Data -- Started
[ScktId: 0] Pipe Sync AP Pre I/O Health Check Data -- Started
[ScktId: 0] Pipe Sync AP Pre I/O Health Check Data - 25ms
[ScktId: 1] Pipe Sync AP Pre I/O Health Check Data - 30ms
[ScktId: 0] Perform I/O Health Check -- Started
[ScktId: 1] Perform I/O Health Check -- Started
I/O Health Check Passed
[ScktId: 0] Perform I/O Health Check - 1604ms
[ScktId: 0] Pipe Sync SBSP Post I/O Heath Check -- Started
I/O Health Check Passed
[ScktId: 1] Perform I/O Health Check - 1611ms
[ScktId: 1] Pipe Sync SBSP Post I/O Heath Check -- Started
[ScktId: 0] Pipe Sync SBSP Post I/O Heath Check - 18ms
[ScktId: 1] Pipe Sync SBSP Post I/O Heath Check - 5ms
N1 Checked into Pipe
[ScktId: 0] Check I/O Health Check Status -- Started
[ScktId: 0] Check I/O Health Check Status - 7ms
[ScktId: 1] Offset training results -- Started
[ScktId: 0] Offset training results -- Started
[ScktId: 1] Offset training results - 4ms
[ScktId: 0] Offset training results - 9ms
[ScktId: 1] HBM Post-Training -- Started
[ScktId: 0] HBM Post-Training -- Started
N1.C00: HBM Density: 10 N0.C00: HBM Density: 10 N1.C00: Column Address width: 0; N0.C00: Column Address width: 0; N1.C00: Row Address width: 3; N0.C00: Row Address width: 3; N1.C00: Number of banks: 2
N0.C00: Number of banks: 2
N1.C08: HBM Density: 10 N0.C08: HBM Density: 10 N1.C08: Column Address width: 0; N0.C08: Column Address width: 0; N1.C08: Row Address width: 3; N0.C08: Row Address width: 3; N1.C08: Number of banks: 2
N0.C08: Number of banks: 2
N1.C16: HBM Density: 10 N0.C16: HBM Density: 10 N1.C16: Column Address width: 0; N0.C16: Column Address width: 0; N1.C16: Row Address width: 3; N0.C16: Row Address width: 3; N1.C16: Number of banks: 2
N0.C16: Number of banks: 2
N1.C24: HBM Density: 10 N0.C24: HBM Density: 10 N1.C24: Column Address width: 0; N0.C24: Column Address width: 0; N1.C24: Row Address width: 3; N0.C24: Row Address width: 3; N1.C24: Number of banks: 2
N0.C24: Number of banks: 2
MemHotOutputOnlyOpt set to :0
MemHotOutputOnlyOpt set to :0
Socket 1 Ch 0 - CkeLl0.Data = 0x10000080
Socket 1 Ch 0 - CkeLl1.Data = 0x10000260
Socket 1 Ch 0 - CkeLl2.Data = 0x10000230
Socket 1 Ch 0 - CkeLl3.Data = 0x10000230
Socket 1 Ch 0 - PkgcCke.Data = 0x10000230
Socket 0 Ch 0 - CkeLl0.Data = 0x10000080
Socket 0 Ch 0 - CkeLl1.Data = 0x10000260
Socket 0 Ch 0 - CkeLl2.Data = 0x10000230
Socket 0 Ch 0 - CkeLl3.Data = 0x10000230
Socket 0 Ch 0 - PkgcCke.Data = 0x10000230
LpModePmControlN0.Data Original = 0x8806C
LpModePmControlN0.Data Original = 0x8806C
LpModePmControlN1.Data Original = 0x0
LpModePmControlN1.Data Original = 0x0
LpModePmControlN0.Data New = 0xC3F4206B
LpModePmControlN0.Data New = 0xC3F4206B
LpModePmControlN1.Data New = 0x87
LpModePmControlN1.Data New = 0x87
N1.C00: HBM Tcrftp.t_rfc = 0xA for density 0x00000001
N0.C00: HBM Tcrftp.t_rfc = 0xA for density 0x00000000
Socket 1 Ch 1 - CkeLl0.Data = 0x10000080
Socket 1 Ch 1 - CkeLl1.Data = 0x10000260
Socket 1 Ch 1 - CkeLl2.Data = 0x10000230
Socket 1 Ch 1 - CkeLl3.Data = 0x10000230
Socket 1 Ch 1 - PkgcCke.Data = 0x10000230
Socket 0 Ch 1 - CkeLl0.Data = 0x10000080
Socket 0 Ch 1 - CkeLl1.Data = 0x10000260
Socket 0 Ch 1 - CkeLl2.Data = 0x10000230
Socket 0 Ch 1 - CkeLl3.Data = 0x10000230
Socket 0 Ch 1 - PkgcCke.Data = 0x10000230
LpModePmControlN0.Data Original = 0x8806C
LpModePmControlN0.Data Original = 0x8806C
LpModePmControlN1.Data Original = 0x0
LpModePmControlN1.Data Original = 0x0
LpModePmControlN0.Data New = 0xC3F4206B
LpModePmControlN0.Data New = 0xC3F4206B
LpModePmControlN1.Data New = 0x87
LpModePmControlN1.Data New = 0x87
N1.C01: HBM Tcrftp.t_rfc = 0xA for density 0x00000001
N0.C01: HBM Tcrftp.t_rfc = 0xA for density 0x00000000
Socket 1 Ch 2 - CkeLl0.Data = 0x10000080
Socket 1 Ch 2 - CkeLl1.Data = 0x10000260
Socket 1 Ch 2 - CkeLl2.Data = 0x10000230
Socket 1 Ch 2 - CkeLl3.Data = 0x10000230
Socket 1 Ch 2 - PkgcCke.Data = 0x10000230
Socket 0 Ch 2 - CkeLl0.Data = 0x10000080
Socket 0 Ch 2 - CkeLl1.Data = 0x10000260
Socket 0 Ch 2 - CkeLl2.Data = 0x10000230
Socket 0 Ch 2 - CkeLl3.Data = 0x10000230
Socket 0 Ch 2 - PkgcCke.Data = 0x10000230
LpModePmControlN0.Data Original = 0x8806C
LpModePmControlN0.Data Original = 0x8806C
LpModePmControlN1.Data Original = 0x0
LpModePmControlN1.Data Original = 0x0
LpModePmControlN0.Data New = 0xC3F4206B
LpModePmControlN0.Data New = 0xC3F4206B
LpModePmControlN1.Data New = 0x87
LpModePmControlN1.Data New = 0x87
N1.C02: HBM Tcrftp.t_rfc = 0xA for density 0x00000001
N0.C02: HBM Tcrftp.t_rfc = 0xA for density 0x00000000
Socket 1 Ch 3 - CkeLl0.Data = 0x10000080
Socket 1 Ch 3 - CkeLl1.Data = 0x10000260
Socket 1 Ch 3 - CkeLl2.Data = 0x10000230
Socket 1 Ch 3 - CkeLl3.Data = 0x10000230
Socket 1 Ch 3 - PkgcCke.Data = 0x10000230
Socket 0 Ch 3 - CkeLl0.Data = 0x10000080
Socket 0 Ch 3 - CkeLl1.Data = 0x10000260
Socket 0 Ch 3 - CkeLl2.Data = 0x10000230
Socket 0 Ch 3 - CkeLl3.Data = 0x10000230
Socket 0 Ch 3 - PkgcCke.Data = 0x10000230
LpModePmControlN0.Data Original = 0x8806C
LpModePmControlN0.Data Original = 0x8806C
LpModePmControlN1.Data Original = 0x0
LpModePmControlN1.Data Original = 0x0
LpModePmControlN0.Data New = 0xC3F4206B
LpModePmControlN0.Data New = 0xC3F4206B
LpModePmControlN1.Data New = 0x87
LpModePmControlN1.Data New = 0x87
N1.C03: HBM Tcrftp.t_rfc = 0xA for density 0x00000001
N0.C03: HBM Tcrftp.t_rfc = 0xA for density 0x00000000
Socket 1 Ch 4 - CkeLl0.Data = 0x10000080
Socket 1 Ch 4 - CkeLl1.Data = 0x10000260
Socket 1 Ch 4 - CkeLl2.Data = 0x10000230
Socket 1 Ch 4 - CkeLl3.Data = 0x10000230
Socket 1 Ch 4 - PkgcCke.Data = 0x10000230
Socket 0 Ch 4 - CkeLl0.Data = 0x10000080
Socket 0 Ch 4 - CkeLl1.Data = 0x10000260
Socket 0 Ch 4 - CkeLl2.Data = 0x10000230
Socket 0 Ch 4 - CkeLl3.Data = 0x10000230
Socket 0 Ch 4 - PkgcCke.Data = 0x10000230
LpModePmControlN0.Data Original = 0x8806C
LpModePmControlN0.Data Original = 0x8806C
LpModePmControlN1.Data Original = 0x0
LpModePmControlN1.Data Original = 0x0
LpModePmControlN0.Data New = 0xC3F4206B
LpModePmControlN0.Data New = 0xC3F4206B
LpModePmControlN1.Data New = 0x87
LpModePmControlN1.Data New = 0x87
N1.C04: HBM Tcrftp.t_rfc = 0xA for density 0x00000001
N0.C04: HBM Tcrftp.t_rfc = 0xA for density 0x00000000
Socket 1 Ch 5 - CkeLl0.Data = 0x10000080
Socket 1 Ch 5 - CkeLl1.Data = 0x10000260
Socket 1 Ch 5 - CkeLl2.Data = 0x10000230
Socket 1 Ch 5 - CkeLl3.Data = 0x10000230
Socket 1 Ch 5 - PkgcCke.Data = 0x10000230
Socket 0 Ch 5 - CkeLl0.Data = 0x10000080
Socket 0 Ch 5 - CkeLl1.Data = 0x10000260
Socket 0 Ch 5 - CkeLl2.Data = 0x10000230
Socket 0 Ch 5 - CkeLl3.Data = 0x10000230
Socket 0 Ch 5 - PkgcCke.Data = 0x10000230
LpModePmControlN0.Data Original = 0x8806C
LpModePmControlN0.Data Original = 0x8806C
LpModePmControlN1.Data Original = 0x0
LpModePmControlN1.Data Original = 0x0
LpModePmControlN0.Data New = 0xC3F4206B
LpModePmControlN0.Data New = 0xC3F4206B
LpModePmControlN1.Data New = 0x87
LpModePmControlN1.Data New = 0x87
N1.C05: HBM Tcrftp.t_rfc = 0xA for density 0x00000001
N0.C05: HBM Tcrftp.t_rfc = 0xA for density 0x00000000
Socket 1 Ch 6 - CkeLl0.Data = 0x10000080
Socket 1 Ch 6 - CkeLl1.Data = 0x10000260
Socket 1 Ch 6 - CkeLl2.Data = 0x10000230
Socket 1 Ch 6 - CkeLl3.Data = 0x10000230
Socket 1 Ch 6 - PkgcCke.Data = 0x10000230
Socket 0 Ch 6 - CkeLl0.Data = 0x10000080
Socket 0 Ch 6 - CkeLl1.Data = 0x10000260
Socket 0 Ch 6 - CkeLl2.Data = 0x10000230
Socket 0 Ch 6 - CkeLl3.Data = 0x10000230
Socket 0 Ch 6 - PkgcCke.Data = 0x10000230
LpModePmControlN0.Data Original = 0x8806C
LpModePmControlN0.Data Original = 0x8806C
LpModePmControlN1.Data Original = 0x0
LpModePmControlN1.Data Original = 0x0
LpModePmControlN0.Data New = 0xC3F4206B
LpModePmControlN0.Data New = 0xC3F4206B
LpModePmControlN1.Data New = 0x87
LpModePmControlN1.Data New = 0x87
N1.C06: HBM Tcrftp.t_rfc = 0xA for density 0x00000001
N0.C06: HBM Tcrftp.t_rfc = 0xA for density 0x00000000
Socket 1 Ch 7 - CkeLl0.Data = 0x10000080
Socket 1 Ch 7 - CkeLl1.Data = 0x10000260
Socket 1 Ch 7 - CkeLl2.Data = 0x10000230
Socket 1 Ch 7 - CkeLl3.Data = 0x10000230
Socket 1 Ch 7 - PkgcCke.Data = 0x10000230
Socket 0 Ch 7 - CkeLl0.Data = 0x10000080
Socket 0 Ch 7 - CkeLl1.Data = 0x10000260
Socket 0 Ch 7 - CkeLl2.Data = 0x10000230
Socket 0 Ch 7 - CkeLl3.Data = 0x10000230
Socket 0 Ch 7 - PkgcCke.Data = 0x10000230
LpModePmControlN0.Data Original = 0x8806C
LpModePmControlN0.Data Original = 0x8806C
LpModePmControlN1.Data Original = 0x0
LpModePmControlN1.Data Original = 0x0
LpModePmControlN0.Data New = 0xC3F4206B
LpModePmControlN0.Data New = 0xC3F4206B
LpModePmControlN1.Data New = 0x87
LpModePmControlN1.Data New = 0x87
N1.C07: HBM Tcrftp.t_rfc = 0xA for density 0x00000001
N0.C07: HBM Tcrftp.t_rfc = 0xA for density 0x00000000
Socket 1 Ch 8 - CkeLl0.Data = 0x10000080
Socket 1 Ch 8 - CkeLl1.Data = 0x10000260
Socket 1 Ch 8 - CkeLl2.Data = 0x10000230
Socket 1 Ch 8 - CkeLl3.Data = 0x10000230
Socket 1 Ch 8 - PkgcCke.Data = 0x10000230
Socket 0 Ch 8 - CkeLl0.Data = 0x10000080
Socket 0 Ch 8 - CkeLl1.Data = 0x10000260
Socket 0 Ch 8 - CkeLl2.Data = 0x10000230
Socket 0 Ch 8 - CkeLl3.Data = 0x10000230
Socket 0 Ch 8 - PkgcCke.Data = 0x10000230
LpModePmControlN0.Data Original = 0x8806C
LpModePmControlN0.Data Original = 0x8806C
LpModePmControlN1.Data Original = 0x0
LpModePmControlN1.Data Original = 0x0
LpModePmControlN0.Data New = 0xC3F4206B
LpModePmControlN0.Data New = 0xC3F4206B
LpModePmControlN1.Data New = 0x87
LpModePmControlN1.Data New = 0x87
N1.C08: HBM Tcrftp.t_rfc = 0xA for density 0x00000001
N0.C08: HBM Tcrftp.t_rfc = 0xA for density 0x00000000
Socket 1 Ch 9 - CkeLl0.Data = 0x10000080
Socket 1 Ch 9 - CkeLl1.Data = 0x10000260
Socket 1 Ch 9 - CkeLl2.Data = 0x10000230
Socket 1 Ch 9 - CkeLl3.Data = 0x10000230
Socket 1 Ch 9 - PkgcCke.Data = 0x10000230
Socket 0 Ch 9 - CkeLl0.Data = 0x10000080
Socket 0 Ch 9 - CkeLl1.Data = 0x10000260
Socket 0 Ch 9 - CkeLl2.Data = 0x10000230
Socket 0 Ch 9 - CkeLl3.Data = 0x10000230
Socket 0 Ch 9 - PkgcCke.Data = 0x10000230
LpModePmControlN0.Data Original = 0x8806C
LpModePmControlN0.Data Original = 0x8806C
LpModePmControlN1.Data Original = 0x0
LpModePmControlN1.Data Original = 0x0
LpModePmControlN0.Data New = 0xC3F4206B
LpModePmControlN0.Data New = 0xC3F4206B
LpModePmControlN1.Data New = 0x87
LpModePmControlN1.Data New = 0x87
N1.C09: HBM Tcrftp.t_rfc = 0xA for density 0x00000001
N0.C09: HBM Tcrftp.t_rfc = 0xA for density 0x00000000
Socket 1 Ch 10 - CkeLl0.Data = 0x10000080
Socket 1 Ch 10 - CkeLl1.Data = 0x10000260
Socket 1 Ch 10 - CkeLl2.Data = 0x10000230
Socket 1 Ch 10 - CkeLl3.Data = 0x10000230
Socket 1 Ch 10 - PkgcCke.Data = 0x10000230
Socket 0 Ch 10 - CkeLl0.Data = 0x10000080
Socket 0 Ch 10 - CkeLl1.Data = 0x10000260
Socket 0 Ch 10 - CkeLl2.Data = 0x10000230
Socket 0 Ch 10 - CkeLl3.Data = 0x10000230
Socket 0 Ch 10 - PkgcCke.Data = 0x10000230
LpModePmControlN0.Data Original = 0x8806C
LpModePmControlN0.Data Original = 0x8806C
LpModePmControlN1.Data Original = 0x0
LpModePmControlN1.Data Original = 0x0
LpModePmControlN0.Data New = 0xC3F4206B
LpModePmControlN0.Data New = 0xC3F4206B
LpModePmControlN1.Data New = 0x87
LpModePmControlN1.Data New = 0x87
N1.C10: HBM Tcrftp.t_rfc = 0xA for density 0x00000001
N0.C10: HBM Tcrftp.t_rfc = 0xA for density 0x00000000
Socket 1 Ch 11 - CkeLl0.Data = 0x10000080
Socket 1 Ch 11 - CkeLl1.Data = 0x10000260
Socket 1 Ch 11 - CkeLl2.Data = 0x10000230
Socket 1 Ch 11 - CkeLl3.Data = 0x10000230
Socket 1 Ch 11 - PkgcCke.Data = 0x10000230
Socket 0 Ch 11 - CkeLl0.Data = 0x10000080
Socket 0 Ch 11 - CkeLl1.Data = 0x10000260
Socket 0 Ch 11 - CkeLl2.Data = 0x10000230
Socket 0 Ch 11 - CkeLl3.Data = 0x10000230
Socket 0 Ch 11 - PkgcCke.Data = 0x10000230
LpModePmControlN0.Data Original = 0x8806C
LpModePmControlN0.Data Original = 0x8806C
LpModePmControlN1.Data Original = 0x0
LpModePmControlN1.Data Original = 0x0
LpModePmControlN0.Data New = 0xC3F4206B
LpModePmControlN0.Data New = 0xC3F4206B
LpModePmControlN1.Data New = 0x87
LpModePmControlN1.Data New = 0x87
N1.C11: HBM Tcrftp.t_rfc = 0xA for density 0x00000001
N0.C11: HBM Tcrftp.t_rfc = 0xA for density 0x00000000
Socket 1 Ch 12 - CkeLl0.Data = 0x10000080
Socket 1 Ch 12 - CkeLl1.Data = 0x10000260
Socket 1 Ch 12 - CkeLl2.Data = 0x10000230
Socket 1 Ch 12 - CkeLl3.Data = 0x10000230
Socket 1 Ch 12 - PkgcCke.Data = 0x10000230
Socket 0 Ch 12 - CkeLl0.Data = 0x10000080
Socket 0 Ch 12 - CkeLl1.Data = 0x10000260
Socket 0 Ch 12 - CkeLl2.Data = 0x10000230
Socket 0 Ch 12 - CkeLl3.Data = 0x10000230
Socket 0 Ch 12 - PkgcCke.Data = 0x10000230
LpModePmControlN0.Data Original = 0x8806C
LpModePmControlN0.Data Original = 0x8806C
LpModePmControlN1.Data Original = 0x0
LpModePmControlN1.Data Original = 0x0
LpModePmControlN0.Data New = 0xC3F4206B
LpModePmControlN0.Data New = 0xC3F4206B
LpModePmControlN1.Data New = 0x87
LpModePmControlN1.Data New = 0x87
N1.C12: HBM Tcrftp.t_rfc = 0xA for density 0x00000001
N0.C12: HBM Tcrftp.t_rfc = 0xA for density 0x00000000
Socket 1 Ch 13 - CkeLl0.Data = 0x10000080
Socket 1 Ch 13 - CkeLl1.Data = 0x10000260
Socket 1 Ch 13 - CkeLl2.Data = 0x10000230
Socket 1 Ch 13 - CkeLl3.Data = 0x10000230
Socket 1 Ch 13 - PkgcCke.Data = 0x10000230
Socket 0 Ch 13 - CkeLl0.Data = 0x10000080
Socket 0 Ch 13 - CkeLl1.Data = 0x10000260
Socket 0 Ch 13 - CkeLl2.Data = 0x10000230
Socket 0 Ch 13 - CkeLl3.Data = 0x10000230
Socket 0 Ch 13 - PkgcCke.Data = 0x10000230
LpModePmControlN0.Data Original = 0x8806C
LpModePmControlN0.Data Original = 0x8806C
LpModePmControlN1.Data Original = 0x0
LpModePmControlN1.Data Original = 0x0
LpModePmControlN0.Data New = 0xC3F4206B
LpModePmControlN0.Data New = 0xC3F4206B
LpModePmControlN1.Data New = 0x87
LpModePmControlN1.Data New = 0x87
N1.C13: HBM Tcrftp.t_rfc = 0xA for density 0x00000001
N0.C13: HBM Tcrftp.t_rfc = 0xA for density 0x00000000
Socket 1 Ch 14 - CkeLl0.Data = 0x10000080
Socket 1 Ch 14 - CkeLl1.Data = 0x10000260
Socket 1 Ch 14 - CkeLl2.Data = 0x10000230
Socket 1 Ch 14 - CkeLl3.Data = 0x10000230
Socket 1 Ch 14 - PkgcCke.Data = 0x10000230
Socket 0 Ch 14 - CkeLl0.Data = 0x10000080
Socket 0 Ch 14 - CkeLl1.Data = 0x10000260
Socket 0 Ch 14 - CkeLl2.Data = 0x10000230
Socket 0 Ch 14 - CkeLl3.Data = 0x10000230
Socket 0 Ch 14 - PkgcCke.Data = 0x10000230
LpModePmControlN0.Data Original = 0x8806C
LpModePmControlN0.Data Original = 0x8806C
LpModePmControlN1.Data Original = 0x0
LpModePmControlN1.Data Original = 0x0
LpModePmControlN0.Data New = 0xC3F4206B
LpModePmControlN0.Data New = 0xC3F4206B
LpModePmControlN1.Data New = 0x87
LpModePmControlN1.Data New = 0x87
N1.C14: HBM Tcrftp.t_rfc = 0xA for density 0x00000001
N0.C14: HBM Tcrftp.t_rfc = 0xA for density 0x00000000
Socket 1 Ch 15 - CkeLl0.Data = 0x10000080
Socket 1 Ch 15 - CkeLl1.Data = 0x10000260
Socket 1 Ch 15 - CkeLl2.Data = 0x10000230
Socket 1 Ch 15 - CkeLl3.Data = 0x10000230
Socket 1 Ch 15 - PkgcCke.Data = 0x10000230
Socket 0 Ch 15 - CkeLl0.Data = 0x10000080
Socket 0 Ch 15 - CkeLl1.Data = 0x10000260
Socket 0 Ch 15 - CkeLl2.Data = 0x10000230
Socket 0 Ch 15 - CkeLl3.Data = 0x10000230
Socket 0 Ch 15 - PkgcCke.Data = 0x10000230
LpModePmControlN0.Data Original = 0x8806C
LpModePmControlN0.Data Original = 0x8806C
LpModePmControlN1.Data Original = 0x0
LpModePmControlN1.Data Original = 0x0
LpModePmControlN0.Data New = 0xC3F4206B
LpModePmControlN0.Data New = 0xC3F4206B
LpModePmControlN1.Data New = 0x87
LpModePmControlN1.Data New = 0x87
N1.C15: HBM Tcrftp.t_rfc = 0xA for density 0x00000001
N0.C15: HBM Tcrftp.t_rfc = 0xA for density 0x00000000
Socket 1 Ch 16 - CkeLl0.Data = 0x10000080
Socket 1 Ch 16 - CkeLl1.Data = 0x10000260
Socket 1 Ch 16 - CkeLl2.Data = 0x10000230
Socket 1 Ch 16 - CkeLl3.Data = 0x10000230
Socket 1 Ch 16 - PkgcCke.Data = 0x10000230
Socket 0 Ch 16 - CkeLl0.Data = 0x10000080
Socket 0 Ch 16 - CkeLl1.Data = 0x10000260
Socket 0 Ch 16 - CkeLl2.Data = 0x10000230
Socket 0 Ch 16 - CkeLl3.Data = 0x10000230
Socket 0 Ch 16 - PkgcCke.Data = 0x10000230
LpModePmControlN0.Data Original = 0x8806C
LpModePmControlN0.Data Original = 0x8806C
LpModePmControlN1.Data Original = 0x0
LpModePmControlN1.Data Original = 0x0
LpModePmControlN0.Data New = 0xC3F4206B
LpModePmControlN0.Data New = 0xC3F4206B
LpModePmControlN1.Data New = 0x87
LpModePmControlN1.Data New = 0x87
N1.C16: HBM Tcrftp.t_rfc = 0xA for density 0x00000001
N0.C16: HBM Tcrftp.t_rfc = 0xA for density 0x00000000
Socket 1 Ch 17 - CkeLl0.Data = 0x10000080
Socket 1 Ch 17 - CkeLl1.Data = 0x10000260
Socket 1 Ch 17 - CkeLl2.Data = 0x10000230
Socket 1 Ch 17 - CkeLl3.Data = 0x10000230
Socket 1 Ch 17 - PkgcCke.Data = 0x10000230
Socket 0 Ch 17 - CkeLl0.Data = 0x10000080
Socket 0 Ch 17 - CkeLl1.Data = 0x10000260
Socket 0 Ch 17 - CkeLl2.Data = 0x10000230
Socket 0 Ch 17 - CkeLl3.Data = 0x10000230
Socket 0 Ch 17 - PkgcCke.Data = 0x10000230
LpModePmControlN0.Data Original = 0x8806C
LpModePmControlN0.Data Original = 0x8806C
LpModePmControlN1.Data Original = 0x0
LpModePmControlN1.Data Original = 0x0
LpModePmControlN0.Data New = 0xC3F4206B
LpModePmControlN0.Data New = 0xC3F4206B
LpModePmControlN1.Data New = 0x87
LpModePmControlN1.Data New = 0x87
N1.C17: HBM Tcrftp.t_rfc = 0xA for density 0x00000001
N0.C17: HBM Tcrftp.t_rfc = 0xA for density 0x00000000
Socket 1 Ch 18 - CkeLl0.Data = 0x10000080
Socket 1 Ch 18 - CkeLl1.Data = 0x10000260
Socket 1 Ch 18 - CkeLl2.Data = 0x10000230
Socket 1 Ch 18 - CkeLl3.Data = 0x10000230
Socket 1 Ch 18 - PkgcCke.Data = 0x10000230
Socket 0 Ch 18 - CkeLl0.Data = 0x10000080
Socket 0 Ch 18 - CkeLl1.Data = 0x10000260
Socket 0 Ch 18 - CkeLl2.Data = 0x10000230
Socket 0 Ch 18 - CkeLl3.Data = 0x10000230
Socket 0 Ch 18 - PkgcCke.Data = 0x10000230
LpModePmControlN0.Data Original = 0x8806C
LpModePmControlN0.Data Original = 0x8806C
LpModePmControlN1.Data Original = 0x0
LpModePmControlN1.Data Original = 0x0
LpModePmControlN0.Data New = 0xC3F4206B
LpModePmControlN0.Data New = 0xC3F4206B
LpModePmControlN1.Data New = 0x87
LpModePmControlN1.Data New = 0x87
N1.C18: HBM Tcrftp.t_rfc = 0xA for density 0x00000001
N0.C18: HBM Tcrftp.t_rfc = 0xA for density 0x00000000
Socket 1 Ch 19 - CkeLl0.Data = 0x10000080
Socket 1 Ch 19 - CkeLl1.Data = 0x10000260
Socket 1 Ch 19 - CkeLl2.Data = 0x10000230
Socket 1 Ch 19 - CkeLl3.Data = 0x10000230
Socket 1 Ch 19 - PkgcCke.Data = 0x10000230
Socket 0 Ch 19 - CkeLl0.Data = 0x10000080
Socket 0 Ch 19 - CkeLl1.Data = 0x10000260
Socket 0 Ch 19 - CkeLl2.Data = 0x10000230
Socket 0 Ch 19 - CkeLl3.Data = 0x10000230
Socket 0 Ch 19 - PkgcCke.Data = 0x10000230
LpModePmControlN0.Data Original = 0x8806C
LpModePmControlN0.Data Original = 0x8806C
LpModePmControlN1.Data Original = 0x0
LpModePmControlN1.Data Original = 0x0
LpModePmControlN0.Data New = 0xC3F4206B
LpModePmControlN0.Data New = 0xC3F4206B
LpModePmControlN1.Data New = 0x87
LpModePmControlN1.Data New = 0x87
N1.C19: HBM Tcrftp.t_rfc = 0xA for density 0x00000001
N0.C19: HBM Tcrftp.t_rfc = 0xA for density 0x00000000
Socket 1 Ch 20 - CkeLl0.Data = 0x10000080
Socket 1 Ch 20 - CkeLl1.Data = 0x10000260
Socket 1 Ch 20 - CkeLl2.Data = 0x10000230
Socket 1 Ch 20 - CkeLl3.Data = 0x10000230
Socket 1 Ch 20 - PkgcCke.Data = 0x10000230
Socket 0 Ch 20 - CkeLl0.Data = 0x10000080
Socket 0 Ch 20 - CkeLl1.Data = 0x10000260
Socket 0 Ch 20 - CkeLl2.Data = 0x10000230
Socket 0 Ch 20 - CkeLl3.Data = 0x10000230
Socket 0 Ch 20 - PkgcCke.Data = 0x10000230
LpModePmControlN0.Data Original = 0x8806C
LpModePmControlN0.Data Original = 0x8806C
LpModePmControlN1.Data Original = 0x0
LpModePmControlN1.Data Original = 0x0
LpModePmControlN0.Data New = 0xC3F4206B
LpModePmControlN0.Data New = 0xC3F4206B
LpModePmControlN1.Data New = 0x87
LpModePmControlN1.Data New = 0x87
N1.C20: HBM Tcrftp.t_rfc = 0xA for density 0x00000001
N0.C20: HBM Tcrftp.t_rfc = 0xA for density 0x00000000
Socket 1 Ch 21 - CkeLl0.Data = 0x10000080
Socket 1 Ch 21 - CkeLl1.Data = 0x10000260
Socket 1 Ch 21 - CkeLl2.Data = 0x10000230
Socket 1 Ch 21 - CkeLl3.Data = 0x10000230
Socket 1 Ch 21 - PkgcCke.Data = 0x10000230
Socket 0 Ch 21 - CkeLl0.Data = 0x10000080
Socket 0 Ch 21 - CkeLl1.Data = 0x10000260
Socket 0 Ch 21 - CkeLl2.Data = 0x10000230
Socket 0 Ch 21 - CkeLl3.Data = 0x10000230
Socket 0 Ch 21 - PkgcCke.Data = 0x10000230
LpModePmControlN0.Data Original = 0x8806C
LpModePmControlN0.Data Original = 0x8806C
LpModePmControlN1.Data Original = 0x0
LpModePmControlN1.Data Original = 0x0
LpModePmControlN0.Data New = 0xC3F4206B
LpModePmControlN0.Data New = 0xC3F4206B
LpModePmControlN1.Data New = 0x87
LpModePmControlN1.Data New = 0x87
N1.C21: HBM Tcrftp.t_rfc = 0xA for density 0x00000001
N0.C21: HBM Tcrftp.t_rfc = 0xA for density 0x00000000
Socket 1 Ch 22 - CkeLl0.Data = 0x10000080
Socket 1 Ch 22 - CkeLl1.Data = 0x10000260
Socket 1 Ch 22 - CkeLl2.Data = 0x10000230
Socket 1 Ch 22 - CkeLl3.Data = 0x10000230
Socket 1 Ch 22 - PkgcCke.Data = 0x10000230
Socket 0 Ch 22 - CkeLl0.Data = 0x10000080
Socket 0 Ch 22 - CkeLl1.Data = 0x10000260
Socket 0 Ch 22 - CkeLl2.Data = 0x10000230
Socket 0 Ch 22 - CkeLl3.Data = 0x10000230
Socket 0 Ch 22 - PkgcCke.Data = 0x10000230
LpModePmControlN0.Data Original = 0x8806C
LpModePmControlN0.Data Original = 0x8806C
LpModePmControlN1.Data Original = 0x0
LpModePmControlN1.Data Original = 0x0
LpModePmControlN0.Data New = 0xC3F4206B
LpModePmControlN0.Data New = 0xC3F4206B
LpModePmControlN1.Data New = 0x87
LpModePmControlN1.Data New = 0x87
N1.C22: HBM Tcrftp.t_rfc = 0xA for density 0x00000001
N0.C22: HBM Tcrftp.t_rfc = 0xA for density 0x00000000
Socket 1 Ch 23 - CkeLl0.Data = 0x10000080
Socket 1 Ch 23 - CkeLl1.Data = 0x10000260
Socket 1 Ch 23 - CkeLl2.Data = 0x10000230
Socket 1 Ch 23 - CkeLl3.Data = 0x10000230
Socket 1 Ch 23 - PkgcCke.Data = 0x10000230
Socket 0 Ch 23 - CkeLl0.Data = 0x10000080
Socket 0 Ch 23 - CkeLl1.Data = 0x10000260
Socket 0 Ch 23 - CkeLl2.Data = 0x10000230
Socket 0 Ch 23 - CkeLl3.Data = 0x10000230
Socket 0 Ch 23 - PkgcCke.Data = 0x10000230
LpModePmControlN0.Data Original = 0x8806C
LpModePmControlN0.Data Original = 0x8806C
LpModePmControlN1.Data Original = 0x0
LpModePmControlN1.Data Original = 0x0
LpModePmControlN0.Data New = 0xC3F4206B
LpModePmControlN0.Data New = 0xC3F4206B
LpModePmControlN1.Data New = 0x87
LpModePmControlN1.Data New = 0x87
N1.C23: HBM Tcrftp.t_rfc = 0xA for density 0x00000001
N0.C23: HBM Tcrftp.t_rfc = 0xA for density 0x00000000
Socket 1 Ch 24 - CkeLl0.Data = 0x10000080
Socket 1 Ch 24 - CkeLl1.Data = 0x10000260
Socket 1 Ch 24 - CkeLl2.Data = 0x10000230
Socket 1 Ch 24 - CkeLl3.Data = 0x10000230
Socket 1 Ch 24 - PkgcCke.Data = 0x10000230
Socket 0 Ch 24 - CkeLl0.Data = 0x10000080
Socket 0 Ch 24 - CkeLl1.Data = 0x10000260
Socket 0 Ch 24 - CkeLl2.Data = 0x10000230
Socket 0 Ch 24 - CkeLl3.Data = 0x10000230
Socket 0 Ch 24 - PkgcCke.Data = 0x10000230
LpModePmControlN0.Data Original = 0x8806C
LpModePmControlN0.Data Original = 0x8806C
LpModePmControlN1.Data Original = 0x0
LpModePmControlN1.Data Original = 0x0
LpModePmControlN0.Data New = 0xC3F4206B
LpModePmControlN0.Data New = 0xC3F4206B
LpModePmControlN1.Data New = 0x87
LpModePmControlN1.Data New = 0x87
N1.C24: HBM Tcrftp.t_rfc = 0xA for density 0x00000001
N0.C24: HBM Tcrftp.t_rfc = 0xA for density 0x00000000
Socket 1 Ch 25 - CkeLl0.Data = 0x10000080
Socket 1 Ch 25 - CkeLl1.Data = 0x10000260
Socket 1 Ch 25 - CkeLl2.Data = 0x10000230
Socket 1 Ch 25 - CkeLl3.Data = 0x10000230
Socket 1 Ch 25 - PkgcCke.Data = 0x10000230
Socket 0 Ch 25 - CkeLl0.Data = 0x10000080
Socket 0 Ch 25 - CkeLl1.Data = 0x10000260
Socket 0 Ch 25 - CkeLl2.Data = 0x10000230
Socket 0 Ch 25 - CkeLl3.Data = 0x10000230
Socket 0 Ch 25 - PkgcCke.Data = 0x10000230
LpModePmControlN0.Data Original = 0x8806C
LpModePmControlN0.Data Original = 0x8806C
LpModePmControlN1.Data Original = 0x0
LpModePmControlN1.Data Original = 0x0
LpModePmControlN0.Data New = 0xC3F4206B
LpModePmControlN0.Data New = 0xC3F4206B
LpModePmControlN1.Data New = 0x87
LpModePmControlN1.Data New = 0x87
N1.C25: HBM Tcrftp.t_rfc = 0xA for density 0x00000001
N0.C25: HBM Tcrftp.t_rfc = 0xA for density 0x00000000
Socket 1 Ch 26 - CkeLl0.Data = 0x10000080
Socket 1 Ch 26 - CkeLl1.Data = 0x10000260
Socket 1 Ch 26 - CkeLl2.Data = 0x10000230
Socket 1 Ch 26 - CkeLl3.Data = 0x10000230
Socket 1 Ch 26 - PkgcCke.Data = 0x10000230
Socket 0 Ch 26 - CkeLl0.Data = 0x10000080
Socket 0 Ch 26 - CkeLl1.Data = 0x10000260
Socket 0 Ch 26 - CkeLl2.Data = 0x10000230
Socket 0 Ch 26 - CkeLl3.Data = 0x10000230
Socket 0 Ch 26 - PkgcCke.Data = 0x10000230
LpModePmControlN0.Data Original = 0x8806C
LpModePmControlN0.Data Original = 0x8806C
LpModePmControlN1.Data Original = 0x0
LpModePmControlN1.Data Original = 0x0
LpModePmControlN0.Data New = 0xC3F4206B
LpModePmControlN0.Data New = 0xC3F4206B
LpModePmControlN1.Data New = 0x87
LpModePmControlN1.Data New = 0x87
N1.C26: HBM Tcrftp.t_rfc = 0xA for density 0x00000001
N0.C26: HBM Tcrftp.t_rfc = 0xA for density 0x00000000
Socket 1 Ch 27 - CkeLl0.Data = 0x10000080
Socket 1 Ch 27 - CkeLl1.Data = 0x10000260
Socket 1 Ch 27 - CkeLl2.Data = 0x10000230
Socket 1 Ch 27 - CkeLl3.Data = 0x10000230
Socket 1 Ch 27 - PkgcCke.Data = 0x10000230
Socket 0 Ch 27 - CkeLl0.Data = 0x10000080
Socket 0 Ch 27 - CkeLl1.Data = 0x10000260
Socket 0 Ch 27 - CkeLl2.Data = 0x10000230
Socket 0 Ch 27 - CkeLl3.Data = 0x10000230
Socket 0 Ch 27 - PkgcCke.Data = 0x10000230
LpModePmControlN0.Data Original = 0x8806C
LpModePmControlN0.Data Original = 0x8806C
LpModePmControlN1.Data Original = 0x0
LpModePmControlN1.Data Original = 0x0
LpModePmControlN0.Data New = 0xC3F4206B
LpModePmControlN0.Data New = 0xC3F4206B
LpModePmControlN1.Data New = 0x87
LpModePmControlN1.Data New = 0x87
N1.C27: HBM Tcrftp.t_rfc = 0xA for density 0x00000001
N0.C27: HBM Tcrftp.t_rfc = 0xA for density 0x00000000
Socket 1 Ch 28 - CkeLl0.Data = 0x10000080
Socket 1 Ch 28 - CkeLl1.Data = 0x10000260
Socket 1 Ch 28 - CkeLl2.Data = 0x10000230
Socket 1 Ch 28 - CkeLl3.Data = 0x10000230
Socket 1 Ch 28 - PkgcCke.Data = 0x10000230
Socket 0 Ch 28 - CkeLl0.Data = 0x10000080
Socket 0 Ch 28 - CkeLl1.Data = 0x10000260
Socket 0 Ch 28 - CkeLl2.Data = 0x10000230
Socket 0 Ch 28 - CkeLl3.Data = 0x10000230
Socket 0 Ch 28 - PkgcCke.Data = 0x10000230
LpModePmControlN0.Data Original = 0x8806C
LpModePmControlN0.Data Original = 0x8806C
LpModePmControlN1.Data Original = 0x0
LpModePmControlN1.Data Original = 0x0
LpModePmControlN0.Data New = 0xC3F4206B
LpModePmControlN0.Data New = 0xC3F4206B
LpModePmControlN1.Data New = 0x87
LpModePmControlN1.Data New = 0x87
N1.C28: HBM Tcrftp.t_rfc = 0xA for density 0x00000001
N0.C28: HBM Tcrftp.t_rfc = 0xA for density 0x00000000
Socket 1 Ch 29 - CkeLl0.Data = 0x10000080
Socket 1 Ch 29 - CkeLl1.Data = 0x10000260
Socket 1 Ch 29 - CkeLl2.Data = 0x10000230
Socket 1 Ch 29 - CkeLl3.Data = 0x10000230
Socket 1 Ch 29 - PkgcCke.Data = 0x10000230
Socket 0 Ch 29 - CkeLl0.Data = 0x10000080
Socket 0 Ch 29 - CkeLl1.Data = 0x10000260
Socket 0 Ch 29 - CkeLl2.Data = 0x10000230
Socket 0 Ch 29 - CkeLl3.Data = 0x10000230
Socket 0 Ch 29 - PkgcCke.Data = 0x10000230
LpModePmControlN0.Data Original = 0x8806C
LpModePmControlN0.Data Original = 0x8806C
LpModePmControlN1.Data Original = 0x0
LpModePmControlN1.Data Original = 0x0
LpModePmControlN0.Data New = 0xC3F4206B
LpModePmControlN0.Data New = 0xC3F4206B
LpModePmControlN1.Data New = 0x87
LpModePmControlN1.Data New = 0x87
N1.C29: HBM Tcrftp.t_rfc = 0xA for density 0x00000001
N0.C29: HBM Tcrftp.t_rfc = 0xA for density 0x00000000
Socket 1 Ch 30 - CkeLl0.Data = 0x10000080
Socket 1 Ch 30 - CkeLl1.Data = 0x10000260
Socket 1 Ch 30 - CkeLl2.Data = 0x10000230
Socket 1 Ch 30 - CkeLl3.Data = 0x10000230
Socket 1 Ch 30 - PkgcCke.Data = 0x10000230
Socket 0 Ch 30 - CkeLl0.Data = 0x10000080
Socket 0 Ch 30 - CkeLl1.Data = 0x10000260
Socket 0 Ch 30 - CkeLl2.Data = 0x10000230
Socket 0 Ch 30 - CkeLl3.Data = 0x10000230
Socket 0 Ch 30 - PkgcCke.Data = 0x10000230
LpModePmControlN0.Data Original = 0x8806C
LpModePmControlN0.Data Original = 0x8806C
LpModePmControlN1.Data Original = 0x0
LpModePmControlN1.Data Original = 0x0
LpModePmControlN0.Data New = 0xC3F4206B
LpModePmControlN0.Data New = 0xC3F4206B
LpModePmControlN1.Data New = 0x87
LpModePmControlN1.Data New = 0x87
N1.C30: HBM Tcrftp.t_rfc = 0xA for density 0x00000001
N0.C30: HBM Tcrftp.t_rfc = 0xA for density 0x00000000
Socket 1 Ch 31 - CkeLl0.Data = 0x10000080
Socket 1 Ch 31 - CkeLl1.Data = 0x10000260
Socket 1 Ch 31 - CkeLl2.Data = 0x10000230
Socket 1 Ch 31 - CkeLl3.Data = 0x10000230
Socket 1 Ch 31 - PkgcCke.Data = 0x10000230
Socket 0 Ch 31 - CkeLl0.Data = 0x10000080
Socket 0 Ch 31 - CkeLl1.Data = 0x10000260
Socket 0 Ch 31 - CkeLl2.Data = 0x10000230
Socket 0 Ch 31 - CkeLl3.Data = 0x10000230
Socket 0 Ch 31 - PkgcCke.Data = 0x10000230
LpModePmControlN0.Data Original = 0x8806C
LpModePmControlN0.Data Original = 0x8806C
LpModePmControlN1.Data Original = 0x0
LpModePmControlN1.Data Original = 0x0
LpModePmControlN0.Data New = 0xC3F4206B
LpModePmControlN0.Data New = 0xC3F4206B
LpModePmControlN1.Data New = 0x87
LpModePmControlN1.Data New = 0x87
N1.C31: HBM Tcrftp.t_rfc = 0xA for density 0x00000001
N0.C31: HBM Tcrftp.t_rfc = 0xA for density 0x00000000
[ScktId: 1] HBM Post-Training - 2817ms
[ScktId: 0] HBM Post-Training - 2818ms
[ScktId: 1] MemTest -- Started
[ScktId: 0] MemTest -- Started
N1: MemTestScram Starts
N0: MemTestScram Starts
...N1:
MemTestScram TestType 10 Ends
.TestType 10 Latency = 2 sec
N0:
MemTestScram TestType 10 Ends
[ScktId: 1] MemTest - 2031ms
TestType 10 Latency = 2 sec
[ScktId: 1] Pipe Sync AP Final Error Sync -- Started
[ScktId: 0] MemTest - 2036ms
[ScktId: 0] Pipe Sync AP Final Error Sync -- Started
[ScktId: 1] Pipe Sync AP Final Error Sync - 16ms
[ScktId: 0] Pipe Sync AP Final Error Sync - 5ms
[ScktId: 1] Late Configuration -- Started
[ScktId: 0] Late Configuration -- Started
S1 TME CPUID = 1
S0 TME CPUID = 1
S1 TmeActivated = 0
S0 TmeActivated = 0
S1 TME CPUID = 1
S0 TME CPUID = 1
S1 TmeActivated = 0
S0 TmeActivated = 0
S1 TME CPUID = 1
S0 TME CPUID = 1
S1 TmeActivated = 0
S0 TmeActivated = 0
S1 TME CPUID = 1
S0 TME CPUID = 1
S1 TmeActivated = 0
S0 TmeActivated = 0
[ScktId: 1] Late Configuration - 41ms
[ScktId: 0] Late Configuration - 38ms
[ScktId: 1] Initialize Memory RAS before refresh enable -- Started
[ScktId: 0] Initialize Memory RAS before refresh enable -- Started
[ScktId: 1] Initialize Memory RAS before refresh enable - 12ms
[ScktId: 0] Initialize Memory RAS before refresh enable - 15ms
[ScktId: 1] Initialize Throttling -- Started
[ScktId: 0] Initialize Throttling -- Started
Data received from mailbox: 0x20000002
N1: McId = 0, VR SVID = 10
N1: McId = 1, VR SVID = 10
N1: McId = 2, VR SVID = 10
N1: McId = 3, VR SVID = 10
Data received from mailbox: 0x20000002
N0: McId = 0, VR SVID = 10
N0: McId = 1, VR SVID = 10
N0: McId = 2, VR SVID = 10
N0: McId = 3, VR SVID = 10
[ScktId: 1] Initialize Throttling - 31ms
[ScktId: 0] Initialize Throttling - 40ms
[ScktId: 1] Publish ACTM DIMM Manifest -- Started
[ScktId: 0] Publish ACTM DIMM Manifest -- Started
[ScktId: 0] Publish ACTM DIMM Manifest - 10ms
[ScktId: 1] Publish ACTM DIMM Manifest - 14ms
[ScktId: 0] Setup SVL and Scrambling -- Started
[ScktId: 1] Setup SVL and Scrambling -- Started
[ScktId: 0] Setup SVL and Scrambling - 9ms
[ScktId: 1] Setup SVL and Scrambling - 9ms
N1 Checked into Pipe
[ScktId: 0] Mem ALIAS Check -- Started
[ScktId: 0] Mem ALIAS Check - 6ms
[ScktId: 1] Switch to Cpgc Out Of Order Mode -- Started
[ScktId: 0] Switch to Cpgc Out Of Order Mode -- Started
[ScktId: 1] Switch to Cpgc Out Of Order Mode - 5ms
[ScktId: 0] Switch to Cpgc Out Of Order Mode - 11ms
[ScktId: 1] Enable Host Refresh -- Started
[ScktId: 0] Enable Host Refresh -- Started
C00: REFRESH_SYNC_TIME_PerCh= 7800
C00: REFRESH_SYNC_TIME_PerCh= 7800
C02: REFRESH_SYNC_TIME_PerCh= 7800
C02: REFRESH_SYNC_TIME_PerCh= 7800
C04: REFRESH_SYNC_TIME_PerCh= 7800
C04: REFRESH_SYNC_TIME_PerCh= 7800
C06: REFRESH_SYNC_TIME_PerCh= 7800
C06: REFRESH_SYNC_TIME_PerCh= 7800
C00: HostRefreshStartTime= 7800
C00: HostRefreshStartTime= 7800
C02: HostRefreshStartTime= 7756
C02: HostRefreshStartTime= 7746
C04: HostRefreshStartTime= 7774
C04: HostRefreshStartTime= 7757
C06: HostRefreshStartTime= 7738
C06: HostRefreshStartTime= 7751
EnableHostRefresh Start Write Time diff[2]=455 ns
EnableHostRefresh Start Write Time diff[2]=255 ns
EnableHostRefresh Start Write Time diff[4]=541 ns
EnableHostRefresh Start Write Time diff[4]=345 ns
EnableHostRefresh Start Write Time diff[6]=561 ns
EnableHostRefresh Start Write Time diff[6]=410 ns
[ScktId: 1] Enable Host Refresh - 92ms
[ScktId: 0] Enable Host Refresh - 91ms
[ScktId: 1] MemInit -- Started
[ScktId: 0] MemInit -- Started
.[ScktId: 0] MemInit - 1219ms
.[ScktId: 0] HBM Mem Test -- Started
[ScktId: 1] MemInit - 1226ms
SetCpgcCurrentTechType: MemTechType = 1
[ScktId: 1] HBM Mem Test -- Started
SetCpgcCurrentTechType: MemTechType = 1
...TestType 10 Latency = 0 sec
.TestType 10 Latency = 0 sec
...TestType 10 Latency = 0 sec
.TestType 10 Latency = 0 sec
...TestType 10 Latency = 0 sec
.TestType 10 Latency = 0 sec
...TestType 10 Latency = 0 sec
SetCpgcCurrentTechType: MemTechType = 0
[ScktId: 0] HBM Mem Test - 1185ms
.[ScktId: 0] HBM Setup Scrambling -- Started
TestType 10 Latency = 0 sec
[ScktId: 0] HBM Setup Scrambling - 4ms
SetCpgcCurrentTechType: MemTechType = 0
[ScktId: 0] AP HBM Information -- Started
[ScktId: 1] HBM Mem Test - 1197ms
[ScktId: 1] HBM Setup Scrambling -- Started
[ScktId: 1] HBM Setup Scrambling - 4ms
[ScktId: 1] AP HBM Information -- Started
[ScktId: 0] AP HBM Information - 25ms
[ScktId: 1] AP HBM Information - 5ms
N1 Checked into Pipe
[ScktId: 0] HBM Fault Resilient Boot -- Started
[ScktId: 0] HBM Fault Resilient Boot - 6ms
N1 Checked into Pipe
[ScktId: 0] HBM Reset System -- Started
[ScktId: 0] HBM Reset System - 6ms
[ScktId: 1] SBSP HBM Information -- Started
[ScktId: 0] SBSP HBM Information -- Started
[ScktId: 1] SBSP HBM Information - 9ms
[ScktId: 0] SBSP HBM Information - 9ms
[ScktId: 1] HBM Mem Init -- Started
[ScktId: 0] HBM Mem Init -- Started
SetCpgcCurrentTechType: MemTechType = 1
SetCpgcCurrentTechType: MemTechType = 1
.TestType 9 Latency = 0 sec
SetCpgcCurrentTechType: MemTechType = 0
.[ScktId: 1] HBM Mem Init - 706ms
TestType 9 Latency = 0 sec
[ScktId: 1] Pipe Sync AP NVRAM Data -- Started
SetCpgcCurrentTechType: MemTechType = 0
[ScktId: 0] HBM Mem Init - 716ms
[ScktId: 0] Pipe Sync AP NVRAM Data -- Started
[ScktId: 0] Pipe Sync AP NVRAM Data - 17ms
[ScktId: 1] Pipe Sync AP NVRAM Data - 32ms
N1 Checked into Pipe
[ScktId: 0] Check Memory Topology -- Started
GetPorTablePtr - Using SPR HBM Matrix
[ScktId: 0] Check Memory Topology - 10ms
[ScktId: 1] Pipe Sync AP Final Error Sync -- Started
[ScktId: 0] Pipe Sync AP Final Error Sync -- Started
[ScktId: 0] Pipe Sync AP Final Error Sync - 10ms
[ScktId: 1] Pipe Sync AP Final Error Sync - 10ms
N1 Checked into Pipe
[ScktId: 0] Check Ras Support After MemInit -- Started
[ScktId: 0] Check Ras Support After MemInit - 7ms
N1 Checked into Pipe
[ScktId: 0] Initialize Memory Map -- Started
N0.C00.D0: Memory Found!
N0.C02.D0: Memory Found!
N0.C04.D0: Memory Found!
N0.C06.D0: Memory Found!
N1.C00.D0: Memory Found!
N1.C02.D0: Memory Found!
N1.C04.D0: Memory Found!
N1.C06.D0: Memory Found!
sizeof (MEMORY_MAP_HOST) = 66360
***BEGIN MEMORY MAPPING***
mmiohbasefrom setup: 2000 MMIOH base = 80000 (64mb)
Silicon capability does not support persistent modes, forcing to non-persistent mode.
Silicon capability does not support persistent modes, forcing to non-persistent mode.
PMem mgmt Driver is available..
CXL: Socket 0 Stack 0, CXL device not found
CXL: Socket 0 Stack 1, CXL device not found
CXL: Socket 0 Stack 2, CXL device not found
CXL: Socket 0 Stack 3, CXL device not found
CXL: Socket 0 Stack 4, CXL device not found
CXL: Socket 0 Stack 5, CXL device not found
CXL: Socket 0 Stack 6, CXL device not found
CXL: Socket 0 Stack 7, CXL device not found
CXL: Socket 1 Stack 0, CXL device not found
CXL: Socket 1 Stack 1, CXL device not found
CXL: Socket 1 Stack 2, CXL device not found
CXL: Socket 1 Stack 3, CXL device not found
CXL: Socket 1 Stack 4, CXL device not found
CXL: Socket 1 Stack 5, CXL device not found
CXL: Socket 1 Stack 6, CXL device not found
CXL: Socket 1 Stack 7, CXL device not found
N0: HBM: MemSizePerStack: 0x100 (64MB), StackValidBitMask: 0xF
N0: Hbm size = 1024
N1: HBM: MemSizePerStack: 0x100 (64MB), StackValidBitMask: 0xF
N1: Hbm size = 1024
Total Hbm size = 2048
N0.C00.D0.R0: ranksize = 200, NVranksize = 0 (rank enabled)
N0.C02.D0.R0: ranksize = 200, NVranksize = 0 (rank enabled)
N0.C04.D0.R0: ranksize = 200, NVranksize = 0 (rank enabled)
N0.C06.D0.R0: ranksize = 200, NVranksize = 0 (rank enabled)
N1.C00.D0.R0: ranksize = 200, NVranksize = 0 (rank enabled)
N1.C02.D0.R0: ranksize = 200, NVranksize = 0 (rank enabled)
N1.C04.D0.R0: ranksize = 200, NVranksize = 0 (rank enabled)
N1.C06.D0.R0: ranksize = 200, NVranksize = 0 (rank enabled)
N0: Total mem size = 2048; mem size = 2048; per size = 0
N1: Total mem size = 4096; mem size = 2048; per size = 0
^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^
Platform DIMM Configuration(num_chunks(chunk_size))
^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^
Socket : 0
Channel : 0 DDR Size : 512(64MB) PMem volatile Size : 0(64MB) PMem non volatile Size : 0(64MB) NVDIMM-N Memory Size : 0(64MB)
Channel : 1 DDR Size : 0(64MB) PMem volatile Size : 0(64MB) PMem non volatile Size : 0(64MB) NVDIMM-N Memory Size : 0(64MB)
Channel : 2 DDR Size : 512(64MB) PMem volatile Size : 0(64MB) PMem non volatile Size : 0(64MB) NVDIMM-N Memory Size : 0(64MB)
Channel : 3 DDR Size : 0(64MB) PMem volatile Size : 0(64MB) PMem non volatile Size : 0(64MB) NVDIMM-N Memory Size : 0(64MB)
Channel : 4 DDR Size : 512(64MB) PMem volatile Size : 0(64MB) PMem non volatile Size : 0(64MB) NVDIMM-N Memory Size : 0(64MB)
Channel : 5 DDR Size : 0(64MB) PMem volatile Size : 0(64MB) PMem non volatile Size : 0(64MB) NVDIMM-N Memory Size : 0(64MB)
Channel : 6 DDR Size : 512(64MB) PMem volatile Size : 0(64MB) PMem non volatile Size : 0(64MB) NVDIMM-N Memory Size : 0(64MB)
Channel : 7 DDR Size : 0(64MB) PMem volatile Size : 0(64MB) PMem non volatile Size : 0(64MB) NVDIMM-N Memory Size : 0(64MB)
Socket : 1
Channel : 0 DDR Size : 512(64MB) PMem volatile Size : 0(64MB) PMem non volatile Size : 0(64MB) NVDIMM-N Memory Size : 0(64MB)
Channel : 1 DDR Size : 0(64MB) PMem volatile Size : 0(64MB) PMem non volatile Size : 0(64MB) NVDIMM-N Memory Size : 0(64MB)
Channel : 2 DDR Size : 512(64MB) PMem volatile Size : 0(64MB) PMem non volatile Size : 0(64MB) NVDIMM-N Memory Size : 0(64MB)
Channel : 3 DDR Size : 0(64MB) PMem volatile Size : 0(64MB) PMem non volatile Size : 0(64MB) NVDIMM-N Memory Size : 0(64MB)
Channel : 4 DDR Size : 512(64MB) PMem volatile Size : 0(64MB) PMem non volatile Size : 0(64MB) NVDIMM-N Memory Size : 0(64MB)
Channel : 5 DDR Size : 0(64MB) PMem volatile Size : 0(64MB) PMem non volatile Size : 0(64MB) NVDIMM-N Memory Size : 0(64MB)
Channel : 6 DDR Size : 512(64MB) PMem volatile Size : 0(64MB) PMem non volatile Size : 0(64MB) NVDIMM-N Memory Size : 0(64MB)
Channel : 7 DDR Size : 0(64MB) PMem volatile Size : 0(64MB) PMem non volatile Size : 0(64MB) NVDIMM-N Memory Size : 0(64MB)
N0: Memory population doesn't support SGX
System Memory Population doesn't support SGX
CollectCpuPrmSizeBitmap BEGIN
CollectCpuPrmSizeBitmap ProtectedMemValidBitMask = 0x000000FFF0000000
tCollectCpuPrmSizeBitmap END
SGX Status 0 PrmrrSize 0
PrmrrCountRequested 8 PrmrrCountPerPackage 4
Value set for Channel Interleave to 3
Value set for Imc Interleave to 4
Checkpoint Code: Socket 0, 0xBB, 0x03, 0x0000
N0: Map 2LM (HBM/DDR)
N0: Map 2LM (HBM/DDR)
N0: Map 2LM (HBM/DDR)
N0: Map 2LM (HBM/DDR)
N0: ClusterId 0 SadCount = 2
N0: ClusterId 1 SadCount = 1
N0: ClusterId 2 SadCount = 1
N0: ClusterId 3 SadCount = 1
N0: Adding NXM at ClusterId 1 SadIndex 17
N0: Adding NXM at ClusterId 2 SadIndex 33
N0: Adding NXM at ClusterId 3 SadIndex 49
N1: Map 2LM (HBM/DDR)
N1: Map 2LM (HBM/DDR)
N1: Map 2LM (HBM/DDR)
N1: Map 2LM (HBM/DDR)
N1: ClusterId 0 SadCount = 1
N1: ClusterId 1 SadCount = 1
N1: ClusterId 2 SadCount = 1
N1: ClusterId 3 SadCount = 1
N0: Not an FPGA Socket
N1: Not an FPGA Socket
N2: Not an FPGA Socket
N3: Not an FPGA Socket
AdjustMemAddrMapForMirror: In the function
N0:
Mirroring population not met
Checkpoint Code: Socket 0, 0xBB, 0x04, 0x0000
HBM: CreateHbmTadRules
Checkpoint Code: Socket 0, 0xBB, 0x05, 0x0000
PMem mgmt Driver is available..
CXL: Socket 0 Stack 0, CXL device not found
CXL: Socket 0 Stack 1, CXL device not found
CXL: Socket 0 Stack 2, CXL device not found
CXL: Socket 0 Stack 3, CXL device not found
CXL: Socket 0 Stack 4, CXL device not found
CXL: Socket 0 Stack 5, CXL device not found
CXL: Socket 0 Stack 6, CXL device not found
CXL: Socket 0 Stack 7, CXL device not found
CXL: Socket 1 Stack 0, CXL device not found
CXL: Socket 1 Stack 1, CXL device not found
CXL: Socket 1 Stack 2, CXL device not found
CXL: Socket 1 Stack 3, CXL device not found
CXL: Socket 1 Stack 4, CXL device not found
CXL: Socket 1 Stack 5, CXL device not found
CXL: Socket 1 Stack 6, CXL device not found
CXL: Socket 1 Stack 7, CXL device not found
N0: HBM: MemSizePerStack: 0x100 (64MB), StackValidBitMask: 0xF
N0: Hbm size = 1024
N1: HBM: MemSizePerStack: 0x100 (64MB), StackValidBitMask: 0xF
N1: Hbm size = 1024
Total Hbm size = 2048
N0.C00.D0.R0: ranksize = 200, NVranksize = 0 (rank enabled)
N0.C02.D0.R0: ranksize = 200, NVranksize = 0 (rank enabled)
N0.C04.D0.R0: ranksize = 200, NVranksize = 0 (rank enabled)
N0.C06.D0.R0: ranksize = 200, NVranksize = 0 (rank enabled)
N1.C00.D0.R0: ranksize = 200, NVranksize = 0 (rank enabled)
N1.C02.D0.R0: ranksize = 200, NVranksize = 0 (rank enabled)
N1.C04.D0.R0: ranksize = 200, NVranksize = 0 (rank enabled)
N1.C06.D0.R0: ranksize = 200, NVranksize = 0 (rank enabled)
N0: Total mem size = 2048; mem size = 2048; per size = 0
N1: Total mem size = 4096; mem size = 2048; per size = 0
N0: Memory population doesn't support SGX
System Memory Population doesn't support SGX
CollectCpuPrmSizeBitmap BEGIN
CollectCpuPrmSizeBitmap ProtectedMemValidBitMask = 0x000000FFF0000000
tCollectCpuPrmSizeBitmap END
SGX Status 0 PrmrrSize 0
PrmrrCountRequested 8 PrmrrCountPerPackage 4
Value set for Channel Interleave to 3
Value set for Imc Interleave to 4
Checkpoint Code: Socket 0, 0xBB, 0x03, 0x0000
N0: Map 2LM (HBM/DDR)
N0: Map 2LM (HBM/DDR)
N0: Map 2LM (HBM/DDR)
N0: Map 2LM (HBM/DDR)
N0: ClusterId 0 SadCount = 2
N0: ClusterId 1 SadCount = 1
N0: ClusterId 2 SadCount = 1
N0: ClusterId 3 SadCount = 1
N0: Adding NXM at ClusterId 1 SadIndex 17
N0: Adding NXM at ClusterId 2 SadIndex 33
N0: Adding NXM at ClusterId 3 SadIndex 49
N1: Map 2LM (HBM/DDR)
N1: Map 2LM (HBM/DDR)
N1: Map 2LM (HBM/DDR)
N1: Map 2LM (HBM/DDR)
N1: ClusterId 0 SadCount = 1
N1: ClusterId 1 SadCount = 1
N1: ClusterId 2 SadCount = 1
N1: ClusterId 3 SadCount = 1
N0: Not an FPGA Socket
N1: Not an FPGA Socket
N2: Not an FPGA Socket
N3: Not an FPGA Socket
AdjustMemAddrMapForMirror: In the function
N0:
Mirroring population not met
Checkpoint Code: Socket 0, 0xBB, 0x04, 0x0000
HBM: CreateHbmTadRules
Checkpoint Code: Socket 0, 0xBB, 0x05, 0x0000
********SAD table for socket 0*******
Type Base Limit Ways McIntBitmap ChIntBitmap[MC00] FmChIntBitmap[MC00] ChIntBitmap[MC01] FmChIntBitmap[MC01] ChIntBitmap[MC02] FmChIntBitmap[MC02] ChIntBitmap[MC03] FmChIntBitmap[MC03] Granularity Tgtgranularity Attr Cluster
HBM 2LM DDR 0x00000 0x00040 1 1 3 1 3 0 3 0 3 0 1 1 3 0
HBM 2LM DDR 0x00040 0x00220 1 1 3 1 3 0 3 0 3 0 1 1 3 0
HBM 2LM DDR 0x00220 0x00420 1 2 3 0 3 1 3 0 3 0 1 1 3 1
NXM 0x00420 0x00420 0 0 0 0 0 0 0 0 0 0 0 0 0 1
HBM 2LM DDR 0x00420 0x00620 1 4 3 0 3 0 3 1 3 0 1 1 3 2
NXM 0x00620 0x00620 0 0 0 0 0 0 0 0 0 0 0 0 0 2
HBM 2LM DDR 0x00620 0x00820 1 8 3 0 3 0 3 0 3 1 1 1 3 3
NXM 0x00820 0x00820 0 0 0 0 0 0 0 0 0 0 0 0 0 3
<<SAD Interleave List>>
1 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0
1 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0
0 1 0 0 0 0 0 0 0 0 0 0 0 0 0 0
0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0
0 0 1 0 0 0 0 0 0 0 0 0 0 0 0 0
0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0
0 0 0 1 0 0 0 0 0 0 0 0 0 0 0 0
0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0
********SAD table for socket 1*******
Type Base Limit Ways McIntBitmap ChIntBitmap[MC00] FmChIntBitmap[MC00] ChIntBitmap[MC01] FmChIntBitmap[MC01] ChIntBitmap[MC02] FmChIntBitmap[MC02] ChIntBitmap[MC03] FmChIntBitmap[MC03] Granularity Tgtgranularity Attr Cluster
HBM 2LM DDR 0x00820 0x00A20 1 1 3 1 3 0 3 0 3 0 1 1 3 0
HBM 2LM DDR 0x00A20 0x00C20 1 2 3 0 3 1 3 0 3 0 1 1 3 1
HBM 2LM DDR 0x00C20 0x00E20 1 4 3 0 3 0 3 1 3 0 1 1 3 2
HBM 2LM DDR 0x00E20 0x01020 1 8 3 0 3 0 3 0 3 1 1 1 3 3
<<SAD Interleave List>>
0 0 0 0 1 0 0 0 0 0 0 0 0 0 0 0
0 0 0 0 0 1 0 0 0 0 0 0 0 0 0 0
0 0 0 0 0 0 1 0 0 0 0 0 0 0 0 0
0 0 0 0 0 0 0 1 0 0 0 0 0 0 0 0
</SADTable>
*******TAD Table for socket 0 Mc 0*******
Enable SadID Limit SktWays TargetGran ChGran NmTadIndex FmTadIndex
1 0 0x00020 1 1 1 0 0
1 1 0x00220 1 1 1 0 0
</TADTable>
*******TAD Table for socket 0 Mc 1*******
Enable SadID Limit SktWays TargetGran ChGran NmTadIndex FmTadIndex
1 16 0x00420 1 1 1 0 0
</TADTable>
*******TAD Table for socket 0 Mc 2*******
Enable SadID Limit SktWays TargetGran ChGran NmTadIndex FmTadIndex
1 32 0x00620 1 1 1 0 0
</TADTable>
*******TAD Table for socket 0 Mc 3*******
Enable SadID Limit SktWays TargetGran ChGran NmTadIndex FmTadIndex
1 48 0x00820 1 1 1 0 0
</TADTable>
*******TAD Table for Socket 0 Stack 0*******
Enable SadID Limit SktWays TargetGran ChGran
1 0 0x00000 1 1 1
</TADTable>
*******TAD Table for Socket 0 Stack 1*******
Enable SadID Limit SktWays TargetGran ChGran
1 16 0x00000 1 1 1
</TADTable>
*******TAD Table for Socket 0 Stack 2*******
Enable SadID Limit SktWays TargetGran ChGran
1 32 0x00000 1 1 1
</TADTable>
*******TAD Table for Socket 0 Stack 3*******
Enable SadID Limit SktWays TargetGran ChGran
1 48 0x00000 1 1 1
</TADTable>
*******TAD Table for socket 1 Mc 0*******
Enable SadID Limit SktWays TargetGran ChGran NmTadIndex FmTadIndex
1 0 0x00A20 1 1 1 0 0
</TADTable>
*******TAD Table for socket 1 Mc 1*******
Enable SadID Limit SktWays TargetGran ChGran NmTadIndex FmTadIndex
1 16 0x00C20 1 1 1 0 0
</TADTable>
*******TAD Table for socket 1 Mc 2*******
Enable SadID Limit SktWays TargetGran ChGran NmTadIndex FmTadIndex
1 32 0x00E20 1 1 1 0 0
</TADTable>
*******TAD Table for socket 1 Mc 3*******
Enable SadID Limit SktWays TargetGran ChGran NmTadIndex FmTadIndex
1 48 0x01020 1 1 1 0 0
</TADTable>
*******TAD Table for Socket 1 Stack 0*******
Enable SadID Limit SktWays TargetGran ChGran
1 0 0x00000 1 1 1
</TADTable>
*******TAD Table for Socket 1 Stack 1*******
Enable SadID Limit SktWays TargetGran ChGran
1 16 0x00000 1 1 1
</TADTable>
*******TAD Table for Socket 1 Stack 2*******
Enable SadID Limit SktWays TargetGran ChGran
1 32 0x00000 1 1 1
</TADTable>
*******TAD Table for Socket 1 Stack 3*******
Enable SadID Limit SktWays TargetGran ChGran
1 48 0x00000 1 1 1
</TADTable>
Checkpoint Code: Socket 0, 0xBB, 0x06, 0x0000
^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^
Write CHA Remote SAD CSRs for Socket: 0
^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^
En Base Limit NodeId Attr
1 0x00820 0x0101F 0x1 0x3
^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^
Write CHA SAD CSRs for Socket: 0
^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^
CHA unlock DRAM cluster 0 snc_lock bits: 0xE
Program Channel Interleaves
rt0_interleave_mode: 7
rt1_interleave_shift: 7
rt2_interleave_shift: 2
Program CSRs for SAD Rule 0 (HBM 2LM DDR)
En Limit Mode Attr NMCacheable
1 0x0003F 0x1 0x3 1
Interleave List: 0x0000000088888888
Single Target: H0 Index 0
DRAM_RULE_CFG2: cxl_accelerator_mem Durable_mem_en cxl_mem_expander NXM
0 0 0 0
TgtRt: 00 ChnRt: 00
Program CSRs for SAD Rule 1 (HBM 2LM DDR)
En Limit Mode Attr NMCacheable
1 0x0021F 0x1 0x3 1
Interleave List: 0x0000000088888888
Single Target: H0 Index 0
DRAM_RULE_CFG2: cxl_accelerator_mem Durable_mem_en cxl_mem_expander NXM
0 0 0 0
TgtRt: 00 ChnRt: 00
Program target config: 00000000
Program channel config: 00000000
Program Mode config.
H0 DramRt0Mode0Cfg: 00000036
H0 DramRt0Mode1Cfg: 00000000
H1 DramRt0Mode0Cfg: 00000000
H1 DramRt0Mode1Cfg: 00000000
H0 DramRt1Mode0Cfg: 00000000
H0 DramRt1Mode1Cfg: 00000000
H1 DramRt1Mode0Cfg: 00000000
H1 DramRt1Mode1Cfg: 00000000
H0 DramRt2Mode0Cfg: 00000000
H0 DramRt2Mode1Cfg: 00000000
H1 DramRt2Mode0Cfg: 00000000
H1 DramRt2Mode1Cfg: 00000000
CHA unlock DRAM cluster 1 snc_lock bits: 0xD
Program Channel Interleaves
rt0_interleave_mode: 7
rt1_interleave_shift: 7
rt2_interleave_shift: 2
Program CSRs for SAD Rule 0 (HBM 2LM DDR)
En Limit Mode Attr NMCacheable
1 0x0041F 0x1 0x3 1
Interleave List: 0x0000000088888888
Single Target: H0 Index 0
DRAM_RULE_CFG2: cxl_accelerator_mem Durable_mem_en cxl_mem_expander NXM
0 0 0 0
TgtRt: 00 ChnRt: 00
Program CSRs for SAD Rule 1 (NXM)
En Limit Mode Attr NMCacheable
1 0x0041F 0x0 0x0 0
Interleave List: 0xFFFFFFFFFFFFFFFF
DRAM_RULE_CFG2: cxl_accelerator_mem Durable_mem_en cxl_mem_expander NXM
0 0 0 1
Program target config: 00000000
Program channel config: 00000000
Program Mode config.
H0 DramRt0Mode0Cfg: 00000006
H0 DramRt0Mode1Cfg: 00000000
H1 DramRt0Mode0Cfg: 00000000
H1 DramRt0Mode1Cfg: 00000000
H0 DramRt1Mode0Cfg: 00000000
H0 DramRt1Mode1Cfg: 00000000
H1 DramRt1Mode0Cfg: 00000000
H1 DramRt1Mode1Cfg: 00000000
H0 DramRt2Mode0Cfg: 00000000
H0 DramRt2Mode1Cfg: 00000000
H1 DramRt2Mode0Cfg: 00000000
H1 DramRt2Mode1Cfg: 00000000
CHA unlock DRAM cluster 2 snc_lock bits: 0xB
Program Channel Interleaves
rt0_interleave_mode: 7
rt1_interleave_shift: 7
rt2_interleave_shift: 2
Program CSRs for SAD Rule 0 (HBM 2LM DDR)
En Limit Mode Attr NMCacheable
1 0x0061F 0x1 0x3 1
Interleave List: 0x0000000088888888
Single Target: H0 Index 0
DRAM_RULE_CFG2: cxl_accelerator_mem Durable_mem_en cxl_mem_expander NXM
0 0 0 0
TgtRt: 00 ChnRt: 00
Program CSRs for SAD Rule 1 (NXM)
En Limit Mode Attr NMCacheable
1 0x0061F 0x0 0x0 0
Interleave List: 0xFFFFFFFFFFFFFFFF
DRAM_RULE_CFG2: cxl_accelerator_mem Durable_mem_en cxl_mem_expander NXM
0 0 0 1
Program target config: 00000000
Program channel config: 00000000
Program Mode config.
H0 DramRt0Mode0Cfg: 00000006
H0 DramRt0Mode1Cfg: 00000000
H1 DramRt0Mode0Cfg: 00000000
H1 DramRt0Mode1Cfg: 00000000
H0 DramRt1Mode0Cfg: 00000000
H0 DramRt1Mode1Cfg: 00000000
H1 DramRt1Mode0Cfg: 00000000
H1 DramRt1Mode1Cfg: 00000000
H0 DramRt2Mode0Cfg: 00000000
H0 DramRt2Mode1Cfg: 00000000
H1 DramRt2Mode0Cfg: 00000000
H1 DramRt2Mode1Cfg: 00000000
CHA unlock DRAM cluster 3 snc_lock bits: 0x7
Program Channel Interleaves
rt0_interleave_mode: 7
rt1_interleave_shift: 7
rt2_interleave_shift: 2
Program CSRs for SAD Rule 0 (HBM 2LM DDR)
En Limit Mode Attr NMCacheable
1 0x0081F 0x1 0x3 1
Interleave List: 0x0000000088888888
Single Target: H0 Index 0
DRAM_RULE_CFG2: cxl_accelerator_mem Durable_mem_en cxl_mem_expander NXM
0 0 0 0
TgtRt: 00 ChnRt: 00
Program CSRs for SAD Rule 1 (NXM)
En Limit Mode Attr NMCacheable
1 0x0081F 0x0 0x0 0
Interleave List: 0xFFFFFFFFFFFFFFFF
DRAM_RULE_CFG2: cxl_accelerator_mem Durable_mem_en cxl_mem_expander NXM
0 0 0 1
Program target config: 00000000
Program channel config: 00000000
Program Mode config.
H0 DramRt0Mode0Cfg: 00000006
H0 DramRt0Mode1Cfg: 00000000
H1 DramRt0Mode0Cfg: 00000000
H1 DramRt0Mode1Cfg: 00000000
H0 DramRt1Mode0Cfg: 00000000
H0 DramRt1Mode1Cfg: 00000000
H1 DramRt1Mode0Cfg: 00000000
H1 DramRt1Mode1Cfg: 00000000
H0 DramRt2Mode0Cfg: 00000000
H0 DramRt2Mode1Cfg: 00000000
H1 DramRt2Mode0Cfg: 00000000
H1 DramRt2Mode1Cfg: 00000000
CHA lock all DRAM clusters snc_lock bits: 0xF
^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^
Write Route Table CSRs for Socket: 0
^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^
CSR: Cluster 0 H0_CH_ROUTE_TABLE_0 - 0x0 0x1 0x0 0x1 0x0 0x1 0x0 0x1
CSR: Cluster 0 H0_TGT_ROUTE_TABLE_0 - 0x4 0x4 0x5 0x5 0x6 0x6 0x7 0x7
CSR: Cluster 0 H1_CH_ROUTE_TABLE_0 - 0x0 0x0 0x0 0x0 0x0 0x0 0x0 0x0
CSR: Cluster 0 H1_TGT_ROUTE_TABLE_0 - 0x0 0x0 0x0 0x0 0x0 0x0 0x0 0x0
CSR: Cluster 1 H0_CH_ROUTE_TABLE_0 - 0x0 0x1 0x0 0x1 0x0 0x1 0x0 0x1
CSR: Cluster 1 H0_TGT_ROUTE_TABLE_0 - 0x4 0x4 0x5 0x5 0x6 0x6 0x7 0x7
CSR: Cluster 1 H1_CH_ROUTE_TABLE_0 - 0x0 0x0 0x0 0x0 0x0 0x0 0x0 0x0
CSR: Cluster 1 H1_TGT_ROUTE_TABLE_0 - 0x0 0x0 0x0 0x0 0x0 0x0 0x0 0x0
CSR: Cluster 2 H0_CH_ROUTE_TABLE_0 - 0x0 0x1 0x0 0x1 0x0 0x1 0x0 0x1
CSR: Cluster 2 H0_TGT_ROUTE_TABLE_0 - 0x7 0x7 0x6 0x6 0x5 0x5 0x4 0x4
CSR: Cluster 2 H1_CH_ROUTE_TABLE_0 - 0x0 0x0 0x0 0x0 0x0 0x0 0x0 0x0
CSR: Cluster 2 H1_TGT_ROUTE_TABLE_0 - 0x0 0x0 0x0 0x0 0x0 0x0 0x0 0x0
CSR: Cluster 3 H0_CH_ROUTE_TABLE_0 - 0x0 0x1 0x0 0x1 0x0 0x1 0x0 0x1
CSR: Cluster 3 H0_TGT_ROUTE_TABLE_0 - 0x7 0x7 0x6 0x6 0x5 0x5 0x4 0x4
CSR: Cluster 3 H1_CH_ROUTE_TABLE_0 - 0x0 0x0 0x0 0x0 0x0 0x0 0x0 0x0
CSR: Cluster 3 H1_TGT_ROUTE_TABLE_0 - 0x0 0x0 0x0 0x0 0x0 0x0 0x0 0x0
^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^
Write MESH2MEM CSRs for Socket: 0
^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^
Memory Controller : 0
------------------------
DEFEATURES0_M2MEM_MAIN_REG
wrcmpfromnm: 1
MODE_M2MEM_MAIN_REG
nmcaching:0x1 pmem:0x0 blockregion:0x0 in-tile caching: 0x1
Memory Controller : 1
------------------------
DEFEATURES0_M2MEM_MAIN_REG
wrcmpfromnm: 1
MODE_M2MEM_MAIN_REG
nmcaching:0x1 pmem:0x0 blockregion:0x0 in-tile caching: 0x1
Memory Controller : 2
------------------------
DEFEATURES0_M2MEM_MAIN_REG
wrcmpfromnm: 1
MODE_M2MEM_MAIN_REG
nmcaching:0x1 pmem:0x0 blockregion:0x0 in-tile caching: 0x1
Memory Controller : 3
------------------------
DEFEATURES0_M2MEM_MAIN_REG
wrcmpfromnm: 1
MODE_M2MEM_MAIN_REG
nmcaching:0x1 pmem:0x0 blockregion:0x0 in-tile caching: 0x1
MC: 0
tadid:0x0 tadvld:0x1 pmemvld:0x0 blkvld:0x0 ddr4tadid:0x0 ddrttadid:0x0 ddr4:0x1 nmcacheablevld:0x0 mirror:0x0 secondary1st:0x0 frcnpwr:0x0 spare:0x0 addresslimit[51:26]:0x1F nonpersistentfm:0x1
MC: 0
tadid:0x1 tadvld:0x1 pmemvld:0x0 blkvld:0x0 ddr4tadid:0x1 ddrttadid:0x0 ddr4:0x1 nmcacheablevld:0x0 mirror:0x0 secondary1st:0x0 frcnpwr:0x0 spare:0x0 addresslimit[51:26]:0x21F nonpersistentfm:0x1
MC: 1
tadid:0x0 tadvld:0x1 pmemvld:0x0 blkvld:0x0 ddr4tadid:0x0 ddrttadid:0x0 ddr4:0x1 nmcacheablevld:0x0 mirror:0x0 secondary1st:0x0 frcnpwr:0x0 spare:0x0 addresslimit[51:26]:0x41F nonpersistentfm:0x1
MC: 2
tadid:0x0 tadvld:0x1 pmemvld:0x0 blkvld:0x0 ddr4tadid:0x0 ddrttadid:0x0 ddr4:0x1 nmcacheablevld:0x0 mirror:0x0 secondary1st:0x0 frcnpwr:0x0 spare:0x0 addresslimit[51:26]:0x61F nonpersistentfm:0x1
MC: 3
tadid:0x0 tadvld:0x1 pmemvld:0x0 blkvld:0x0 ddr4tadid:0x0 ddrttadid:0x0 ddr4:0x1 nmcacheablevld:0x0 mirror:0x0 secondary1st:0x0 frcnpwr:0x0 spare:0x0 addresslimit[51:26]:0x81F nonpersistentfm:0x1
Programs feature registers for MC 0
Programs feature registers for MC 1
Programs feature registers for MC 2
Programs feature registers for MC 3
^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^
Write HBM MESH2MEM CSRs for Socket: 0
^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^
HBM Stack: 0
Mesh2Mem misc: nmcaching: 1 wrcmpfromnm: 1
Mesh2Mem TAD: tadid:0x0 ddrtadid:0x0 nmcacheablevld:0x1 addresslimit[51:26]:0x21F
HBM Stack: 1
Mesh2Mem misc: nmcaching: 1 wrcmpfromnm: 1
Mesh2Mem TAD: tadid:0x0 ddrtadid:0x0 nmcacheablevld:0x1 addresslimit[51:26]:0x41F
HBM Stack: 2
Mesh2Mem misc: nmcaching: 1 wrcmpfromnm: 1
Mesh2Mem TAD: tadid:0x0 ddrtadid:0x0 nmcacheablevld:0x1 addresslimit[51:26]:0x61F
HBM Stack: 3
Mesh2Mem misc: nmcaching: 1 wrcmpfromnm: 1
Mesh2Mem TAD: tadid:0x0 ddrtadid:0x0 nmcacheablevld:0x1 addresslimit[51:26]:0x81F
Programs feature registers for MC 0
N0.C00: CSR : SYSFEATURES0_MC_2LM_REG: 0x10
N0.C01: CSR : SYSFEATURES0_MC_2LM_REG: 0x10
Programs feature registers for MC 1
N0.C00: CSR : SYSFEATURES0_MC_2LM_REG: 0x10
N0.C01: CSR : SYSFEATURES0_MC_2LM_REG: 0x10
Programs feature registers for MC 2
N0.C00: CSR : SYSFEATURES0_MC_2LM_REG: 0x10
N0.C01: CSR : SYSFEATURES0_MC_2LM_REG: 0x10
Programs feature registers for MC 3
N0.C00: CSR : SYSFEATURES0_MC_2LM_REG: 0x10
N0.C01: CSR : SYSFEATURES0_MC_2LM_REG: 0x10
Programs feature registers for MC 4
N0.C00: CSR : SYSFEATURES0_MC_2LM_REG: 0x10
N0.C01: CSR : SYSFEATURES0_MC_2LM_REG: 0x10
Programs feature registers for MC 5
N0.C00: CSR : SYSFEATURES0_MC_2LM_REG: 0x10
N0.C01: CSR : SYSFEATURES0_MC_2LM_REG: 0x10
Programs feature registers for MC 6
N0.C00: CSR : SYSFEATURES0_MC_2LM_REG: 0x10
N0.C01: CSR : SYSFEATURES0_MC_2LM_REG: 0x10
Programs feature registers for MC 7
N0.C00: CSR : SYSFEATURES0_MC_2LM_REG: 0x10
N0.C01: CSR : SYSFEATURES0_MC_2LM_REG: 0x10
Programs feature registers for MC 8
N0.C00: CSR : SYSFEATURES0_MC_2LM_REG: 0x10
N0.C01: CSR : SYSFEATURES0_MC_2LM_REG: 0x10
Programs feature registers for MC 9
N0.C00: CSR : SYSFEATURES0_MC_2LM_REG: 0x10
N0.C01: CSR : SYSFEATURES0_MC_2LM_REG: 0x10
Programs feature registers for MC 10
N0.C00: CSR : SYSFEATURES0_MC_2LM_REG: 0x10
N0.C01: CSR : SYSFEATURES0_MC_2LM_REG: 0x10
Programs feature registers for MC 11
N0.C00: CSR : SYSFEATURES0_MC_2LM_REG: 0x10
N0.C01: CSR : SYSFEATURES0_MC_2LM_REG: 0x10
Programs feature registers for MC 12
N0.C00: CSR : SYSFEATURES0_MC_2LM_REG: 0x10
N0.C01: CSR : SYSFEATURES0_MC_2LM_REG: 0x10
Programs feature registers for MC 13
N0.C00: CSR : SYSFEATURES0_MC_2LM_REG: 0x10
N0.C01: CSR : SYSFEATURES0_MC_2LM_REG: 0x10
Programs feature registers for MC 14
N0.C00: CSR : SYSFEATURES0_MC_2LM_REG: 0x10
N0.C01: CSR : SYSFEATURES0_MC_2LM_REG: 0x10
Programs feature registers for MC 15
N0.C00: CSR : SYSFEATURES0_MC_2LM_REG: 0x10
N0.C01: CSR : SYSFEATURES0_MC_2LM_REG: 0x10
Checkpoint Code: Socket 0, 0xBB, 0x07, 0x0000
^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^
Write TAD CSRs for Socket: 0
^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^
Write Patrol and Sparing CSR's for MC 0
C00: TADWAYNESS[0]:
target_lid: 0 chn_lid: 0 tad_limit: 0x1F
C00: TADBASE[0]:
mirror_en: 0 en_failover: 0 ign_ptrl_uc: 0 base: 0x0
C00: TADWAYNESS[1]:
target_lid: 0 chn_lid: 0 tad_limit: 0x21F
C00: TADBASE[1]:
mirror_en: 0 en_failover: 0 ign_ptrl_uc: 0 base: 0x40
NM_DRAM_RULE[0]:
rule_enable: 1 limit: 0x3F nm_chn_ways: 0 nm_chn_gran: 1 nm_target_ways: 0 nm_gran_eq: 0 nm_chn_l2pid: 0x00FFFFF8
Logical Ch Id: 0 1 2 3 4 5 6 7
Physical Ch Id: 0 7 7 7 7 7 7 7
C00: NM_DRAM_RULE[0]:
NM_DRAM_RULE[1]:
rule_enable: 1 limit: 0x21F nm_chn_ways: 0 nm_chn_gran: 1 nm_target_ways: 0 nm_gran_eq: 0 nm_chn_l2pid: 0x00FFFFF8
Logical Ch Id: 0 1 2 3 4 5 6 7
Physical Ch Id: 0 7 7 7 7 7 7 7
C00: NM_DRAM_RULE[1]:
Write 1LM Decoder CSR's for MC 0
C00: TADCHNILVOFFSET[0]:
target_ways: 0 chn_ways: 0 target_gran: 1 chn_gran: 1 tad_offset: 0x0 tad_offset_sign: 0
C00: TADCHNILVOFFSET[1]:
target_ways: 0 chn_ways: 0 target_gran: 1 chn_gran: 1 tad_offset: 0x20 tad_offset_sign: 0
C00: MCNMCACHINGCFG:
mcnmcachingenb: 0 mcpmemenb: 0 mcnmcachingpmemwt: 0
C01: MCNMCACHINGCFG:
mcnmcachingenb: 0 mcpmemenb: 0 mcnmcachingpmemwt: 0
Write Patrol and Sparing CSR's for MC 1
C00: TADWAYNESS[0]:
target_lid: 0 chn_lid: 0 tad_limit: 0x41F
C00: TADBASE[0]:
mirror_en: 0 en_failover: 0 ign_ptrl_uc: 0 base: 0x220
NM_DRAM_RULE[0]:
rule_enable: 1 limit: 0x41F nm_chn_ways: 0 nm_chn_gran: 1 nm_target_ways: 0 nm_gran_eq: 0 nm_chn_l2pid: 0x00FFFFF8
Logical Ch Id: 0 1 2 3 4 5 6 7
Physical Ch Id: 0 7 7 7 7 7 7 7
C00: NM_DRAM_RULE[0]:
Write 1LM Decoder CSR's for MC 1
C00: TADCHNILVOFFSET[0]:
target_ways: 0 chn_ways: 0 target_gran: 1 chn_gran: 1 tad_offset: 0x220 tad_offset_sign: 0
C00: MCNMCACHINGCFG:
mcnmcachingenb: 0 mcpmemenb: 0 mcnmcachingpmemwt: 0
C01: MCNMCACHINGCFG:
mcnmcachingenb: 0 mcpmemenb: 0 mcnmcachingpmemwt: 0
Write Patrol and Sparing CSR's for MC 2
C00: TADWAYNESS[0]:
target_lid: 0 chn_lid: 0 tad_limit: 0x61F
C00: TADBASE[0]:
mirror_en: 0 en_failover: 0 ign_ptrl_uc: 0 base: 0x420
NM_DRAM_RULE[0]:
rule_enable: 1 limit: 0x61F nm_chn_ways: 0 nm_chn_gran: 1 nm_target_ways: 0 nm_gran_eq: 0 nm_chn_l2pid: 0x00FFFFF8
Logical Ch Id: 0 1 2 3 4 5 6 7
Physical Ch Id: 0 7 7 7 7 7 7 7
C00: NM_DRAM_RULE[0]:
Write 1LM Decoder CSR's for MC 2
C00: TADCHNILVOFFSET[0]:
target_ways: 0 chn_ways: 0 target_gran: 1 chn_gran: 1 tad_offset: 0x420 tad_offset_sign: 0
C00: MCNMCACHINGCFG:
mcnmcachingenb: 0 mcpmemenb: 0 mcnmcachingpmemwt: 0
C01: MCNMCACHINGCFG:
mcnmcachingenb: 0 mcpmemenb: 0 mcnmcachingpmemwt: 0
Write Patrol and Sparing CSR's for MC 3
C00: TADWAYNESS[0]:
target_lid: 0 chn_lid: 0 tad_limit: 0x81F
C00: TADBASE[0]:
mirror_en: 0 en_failover: 0 ign_ptrl_uc: 0 base: 0x620
NM_DRAM_RULE[0]:
rule_enable: 1 limit: 0x81F nm_chn_ways: 0 nm_chn_gran: 1 nm_target_ways: 0 nm_gran_eq: 0 nm_chn_l2pid: 0x00FFFFF8
Logical Ch Id: 0 1 2 3 4 5 6 7
Physical Ch Id: 0 7 7 7 7 7 7 7
C00: NM_DRAM_RULE[0]:
Write 1LM Decoder CSR's for MC 3
C00: TADCHNILVOFFSET[0]:
target_ways: 0 chn_ways: 0 target_gran: 1 chn_gran: 1 tad_offset: 0x620 tad_offset_sign: 0
C00: MCNMCACHINGCFG:
mcnmcachingenb: 0 mcpmemenb: 0 mcnmcachingpmemwt: 0
C01: MCNMCACHINGCFG:
mcnmcachingenb: 0 mcpmemenb: 0 mcnmcachingpmemwt: 0
Write Patrol and Sparing TAD range CSR's for HBM Stack 0 MC 0
C00: TADWAYNESS[0]:
target_lid: 0 chn_lid: 0 tad_limit: 0x1F
C00: TADBASE[0]:
mirror_en: 0 en_failover: 0 ign_ptrl_uc: 0 base: 0x0
C01: TADWAYNESS[0]:
target_lid: 0 chn_lid: 1 tad_limit: 0x1F
C01: TADBASE[0]:
mirror_en: 0 en_failover: 0 ign_ptrl_uc: 0 base: 0x0
Write Patrol and Sparing TAD range CSR's for HBM Stack 0 MC 1
C00: TADWAYNESS[0]:
target_lid: 0 chn_lid: 2 tad_limit: 0x1F
C00: TADBASE[0]:
mirror_en: 0 en_failover: 0 ign_ptrl_uc: 0 base: 0x0
C01: TADWAYNESS[0]:
target_lid: 0 chn_lid: 3 tad_limit: 0x1F
C01: TADBASE[0]:
mirror_en: 0 en_failover: 0 ign_ptrl_uc: 0 base: 0x0
Write Patrol and Sparing TAD range CSR's for HBM Stack 0 MC 2
C00: TADWAYNESS[0]:
target_lid: 0 chn_lid: 4 tad_limit: 0x1F
C00: TADBASE[0]:
mirror_en: 0 en_failover: 0 ign_ptrl_uc: 0 base: 0x0
C01: TADWAYNESS[0]:
target_lid: 0 chn_lid: 5 tad_limit: 0x1F
C01: TADBASE[0]:
mirror_en: 0 en_failover: 0 ign_ptrl_uc: 0 base: 0x0
Write Patrol and Sparing TAD range CSR's for HBM Stack 0 MC 3
C00: TADWAYNESS[0]:
target_lid: 0 chn_lid: 6 tad_limit: 0x1F
C00: TADBASE[0]:
mirror_en: 0 en_failover: 0 ign_ptrl_uc: 0 base: 0x0
C01: TADWAYNESS[0]:
target_lid: 0 chn_lid: 7 tad_limit: 0x1F
C01: TADBASE[0]:
mirror_en: 0 en_failover: 0 ign_ptrl_uc: 0 base: 0x0
Write Hbm Nm Caching Tad CSR's for HBM Stack 0 MC 0
C00: MCNMCACHINGCFG 2LM TAD:
nmcachingtaden: 1 nmcachingtad: 0
C01: MCNMCACHINGCFG 2LM TAD:
nmcachingtaden: 1 nmcachingtad: 0
Write Hbm Nm Caching Tad CSR's for HBM Stack 0 MC 1
C00: MCNMCACHINGCFG 2LM TAD:
nmcachingtaden: 1 nmcachingtad: 0
C01: MCNMCACHINGCFG 2LM TAD:
nmcachingtaden: 1 nmcachingtad: 0
Write Hbm Nm Caching Tad CSR's for HBM Stack 0 MC 2
C00: MCNMCACHINGCFG 2LM TAD:
nmcachingtaden: 1 nmcachingtad: 0
C01: MCNMCACHINGCFG 2LM TAD:
nmcachingtaden: 1 nmcachingtad: 0
Write Hbm Nm Caching Tad CSR's for HBM Stack 0 MC 3
C00: MCNMCACHINGCFG 2LM TAD:
nmcachingtaden: 1 nmcachingtad: 0
C01: MCNMCACHINGCFG 2LM TAD:
nmcachingtaden: 1 nmcachingtad: 0
Write 1LM Decoder CSR's for HBM Stack 0 MC 0
C00: TADCHNILVOFFSET[0]:
target_ways: 0 chn_ways: 0 target_gran: 1 chn_gran: 1 tad_offset: 0x0 tad_offset_sign: 0
C01: TADCHNILVOFFSET[0]:
target_ways: 0 chn_ways: 0 target_gran: 1 chn_gran: 1 tad_offset: 0x0 tad_offset_sign: 0
Write 1LM Decoder CSR's for HBM Stack 0 MC 1
C00: TADCHNILVOFFSET[0]:
target_ways: 0 chn_ways: 0 target_gran: 1 chn_gran: 1 tad_offset: 0x0 tad_offset_sign: 0
C01: TADCHNILVOFFSET[0]:
target_ways: 0 chn_ways: 0 target_gran: 1 chn_gran: 1 tad_offset: 0x0 tad_offset_sign: 0
Write 1LM Decoder CSR's for HBM Stack 0 MC 2
C00: TADCHNILVOFFSET[0]:
target_ways: 0 chn_ways: 0 target_gran: 1 chn_gran: 1 tad_offset: 0x0 tad_offset_sign: 0
C01: TADCHNILVOFFSET[0]:
target_ways: 0 chn_ways: 0 target_gran: 1 chn_gran: 1 tad_offset: 0x0 tad_offset_sign: 0
Write 1LM Decoder CSR's for HBM Stack 0 MC 3
C00: TADCHNILVOFFSET[0]:
target_ways: 0 chn_ways: 0 target_gran: 1 chn_gran: 1 tad_offset: 0x0 tad_offset_sign: 0
C01: TADCHNILVOFFSET[0]:
target_ways: 0 chn_ways: 0 target_gran: 1 chn_gran: 1 tad_offset: 0x0 tad_offset_sign: 0
Write MCNMCACHINGCFG for HBM Stack 0 MC 0
C00: MCNMCACHINGCFG:
mcnmcachingenb: 1 mcpmemenb: 0 mcnmcachingpmemwt: 0
C01: MCNMCACHINGCFG:
mcnmcachingenb: 1 mcpmemenb: 0 mcnmcachingpmemwt: 0
Write MCNMCACHINGCFG for HBM Stack 0 MC 1
C00: MCNMCACHINGCFG:
mcnmcachingenb: 1 mcpmemenb: 0 mcnmcachingpmemwt: 0
C01: MCNMCACHINGCFG:
mcnmcachingenb: 1 mcpmemenb: 0 mcnmcachingpmemwt: 0
Write MCNMCACHINGCFG for HBM Stack 0 MC 2
C00: MCNMCACHINGCFG:
mcnmcachingenb: 1 mcpmemenb: 0 mcnmcachingpmemwt: 0
C01: MCNMCACHINGCFG:
mcnmcachingenb: 1 mcpmemenb: 0 mcnmcachingpmemwt: 0
Write MCNMCACHINGCFG for HBM Stack 0 MC 3
C00: MCNMCACHINGCFG:
mcnmcachingenb: 1 mcpmemenb: 0 mcnmcachingpmemwt: 0
C01: MCNMCACHINGCFG:
mcnmcachingenb: 1 mcpmemenb: 0 mcnmcachingpmemwt: 0
Write 2LM NM Decoder CSR's for HBM Stack 0 MC 0
C00: MCNMCACHINGINTLV:
nm_target_ways: 0 nm_chn_ways: 3 nm_target_lid: 0 nm_target_gran: 1 nm_chn_gran: 1 nm_chn_lid: 0
C00: MCNMCACHINGCFG_MC_2LM_REG:
en_2way: 0 prefer_way_sel: 0 chn_cap: 0xB nm_ratio_chn_cap: 0
C00: MCNMCACHINGOFFSET:
mcnmcachingoffsetlower: 0x0 mcnmcachingoffset: 0x0 mcnmcachingoffseten: 0
C01: MCNMCACHINGINTLV:
nm_target_ways: 0 nm_chn_ways: 3 nm_target_lid: 0 nm_target_gran: 1 nm_chn_gran: 1 nm_chn_lid: 1
C01: MCNMCACHINGCFG_MC_2LM_REG:
en_2way: 0 prefer_way_sel: 0 chn_cap: 0xB nm_ratio_chn_cap: 0
C01: MCNMCACHINGOFFSET:
mcnmcachingoffsetlower: 0x0 mcnmcachingoffset: 0x0 mcnmcachingoffseten: 0
Write 2LM NM Decoder CSR's for HBM Stack 0 MC 1
C00: MCNMCACHINGINTLV:
nm_target_ways: 0 nm_chn_ways: 3 nm_target_lid: 0 nm_target_gran: 1 nm_chn_gran: 1 nm_chn_lid: 2
C00: MCNMCACHINGCFG_MC_2LM_REG:
en_2way: 0 prefer_way_sel: 0 chn_cap: 0xB nm_ratio_chn_cap: 0
C00: MCNMCACHINGOFFSET:
mcnmcachingoffsetlower: 0x0 mcnmcachingoffset: 0x0 mcnmcachingoffseten: 0
C01: MCNMCACHINGINTLV:
nm_target_ways: 0 nm_chn_ways: 3 nm_target_lid: 0 nm_target_gran: 1 nm_chn_gran: 1 nm_chn_lid: 3
C01: MCNMCACHINGCFG_MC_2LM_REG:
en_2way: 0 prefer_way_sel: 0 chn_cap: 0xB nm_ratio_chn_cap: 0
C01: MCNMCACHINGOFFSET:
mcnmcachingoffsetlower: 0x0 mcnmcachingoffset: 0x0 mcnmcachingoffseten: 0
Write 2LM NM Decoder CSR's for HBM Stack 0 MC 2
C00: MCNMCACHINGINTLV:
nm_target_ways: 0 nm_chn_ways: 3 nm_target_lid: 0 nm_target_gran: 1 nm_chn_gran: 1 nm_chn_lid: 4
C00: MCNMCACHINGCFG_MC_2LM_REG:
en_2way: 0 prefer_way_sel: 0 chn_cap: 0xB nm_ratio_chn_cap: 0
C00: MCNMCACHINGOFFSET:
mcnmcachingoffsetlower: 0x0 mcnmcachingoffset: 0x0 mcnmcachingoffseten: 0
C01: MCNMCACHINGINTLV:
nm_target_ways: 0 nm_chn_ways: 3 nm_target_lid: 0 nm_target_gran: 1 nm_chn_gran: 1 nm_chn_lid: 5
C01: MCNMCACHINGCFG_MC_2LM_REG:
en_2way: 0 prefer_way_sel: 0 chn_cap: 0xB nm_ratio_chn_cap: 0
C01: MCNMCACHINGOFFSET:
mcnmcachingoffsetlower: 0x0 mcnmcachingoffset: 0x0 mcnmcachingoffseten: 0
Write 2LM NM Decoder CSR's for HBM Stack 0 MC 3
C00: MCNMCACHINGINTLV:
nm_target_ways: 0 nm_chn_ways: 3 nm_target_lid: 0 nm_target_gran: 1 nm_chn_gran: 1 nm_chn_lid: 6
C00: MCNMCACHINGCFG_MC_2LM_REG:
en_2way: 0 prefer_way_sel: 0 chn_cap: 0xB nm_ratio_chn_cap: 0
C00: MCNMCACHINGOFFSET:
mcnmcachingoffsetlower: 0x0 mcnmcachingoffset: 0x0 mcnmcachingoffseten: 0
C01: MCNMCACHINGINTLV:
nm_target_ways: 0 nm_chn_ways: 3 nm_target_lid: 0 nm_target_gran: 1 nm_chn_gran: 1 nm_chn_lid: 7
C01: MCNMCACHINGCFG_MC_2LM_REG:
en_2way: 0 prefer_way_sel: 0 chn_cap: 0xB nm_ratio_chn_cap: 0
C01: MCNMCACHINGOFFSET:
mcnmcachingoffsetlower: 0x0 mcnmcachingoffset: 0x0 mcnmcachingoffseten: 0
Write 2LM FM Decoder CSR's for HBM Stack 0 MC 0 TAD 0
C00: DRAM_RULE[0]:
rule_enable: 1 limit: 0x3F fm_target: 0 fm_chn_ways: 0 fm_chn_gran: 1 fm_target_ways: 0 fm_gran_eq: 0 fm_chn_l2pid: 0x00000000
C01: DRAM_RULE[0]:
rule_enable: 1 limit: 0x3F fm_target: 0 fm_chn_ways: 0 fm_chn_gran: 1 fm_target_ways: 0 fm_gran_eq: 0 fm_chn_l2pid: 0x00000000
Write 2LM FM Decoder CSR's for HBM Stack 0 MC 1 TAD 0
C00: DRAM_RULE[0]:
rule_enable: 1 limit: 0x3F fm_target: 0 fm_chn_ways: 0 fm_chn_gran: 1 fm_target_ways: 0 fm_gran_eq: 0 fm_chn_l2pid: 0x00000000
C01: DRAM_RULE[0]:
rule_enable: 1 limit: 0x3F fm_target: 0 fm_chn_ways: 0 fm_chn_gran: 1 fm_target_ways: 0 fm_gran_eq: 0 fm_chn_l2pid: 0x00000000
Write 2LM FM Decoder CSR's for HBM Stack 0 MC 2 TAD 0
C00: DRAM_RULE[0]:
rule_enable: 1 limit: 0x3F fm_target: 0 fm_chn_ways: 0 fm_chn_gran: 1 fm_target_ways: 0 fm_gran_eq: 0 fm_chn_l2pid: 0x00000000
C01: DRAM_RULE[0]:
rule_enable: 1 limit: 0x3F fm_target: 0 fm_chn_ways: 0 fm_chn_gran: 1 fm_target_ways: 0 fm_gran_eq: 0 fm_chn_l2pid: 0x00000000
Write 2LM FM Decoder CSR's for HBM Stack 0 MC 3 TAD 0
C00: DRAM_RULE[0]:
rule_enable: 1 limit: 0x3F fm_target: 0 fm_chn_ways: 0 fm_chn_gran: 1 fm_target_ways: 0 fm_gran_eq: 0 fm_chn_l2pid: 0x00000000
C01: DRAM_RULE[0]:
rule_enable: 1 limit: 0x3F fm_target: 0 fm_chn_ways: 0 fm_chn_gran: 1 fm_target_ways: 0 fm_gran_eq: 0 fm_chn_l2pid: 0x00000000
Write 2LM FM Decoder CSR's for HBM Stack 0 MC 0 TAD 1
C00: DRAM_RULE[1]:
rule_enable: 1 limit: 0x21F fm_target: 0 fm_chn_ways: 0 fm_chn_gran: 1 fm_target_ways: 0 fm_gran_eq: 0 fm_chn_l2pid: 0x00000000
C01: DRAM_RULE[1]:
rule_enable: 1 limit: 0x21F fm_target: 0 fm_chn_ways: 0 fm_chn_gran: 1 fm_target_ways: 0 fm_gran_eq: 0 fm_chn_l2pid: 0x00000000
Write 2LM FM Decoder CSR's for HBM Stack 0 MC 1 TAD 1
C00: DRAM_RULE[1]:
rule_enable: 1 limit: 0x21F fm_target: 0 fm_chn_ways: 0 fm_chn_gran: 1 fm_target_ways: 0 fm_gran_eq: 0 fm_chn_l2pid: 0x00000000
C01: DRAM_RULE[1]:
rule_enable: 1 limit: 0x21F fm_target: 0 fm_chn_ways: 0 fm_chn_gran: 1 fm_target_ways: 0 fm_gran_eq: 0 fm_chn_l2pid: 0x00000000
Write 2LM FM Decoder CSR's for HBM Stack 0 MC 2 TAD 1
C00: DRAM_RULE[1]:
rule_enable: 1 limit: 0x21F fm_target: 0 fm_chn_ways: 0 fm_chn_gran: 1 fm_target_ways: 0 fm_gran_eq: 0 fm_chn_l2pid: 0x00000000
C01: DRAM_RULE[1]:
rule_enable: 1 limit: 0x21F fm_target: 0 fm_chn_ways: 0 fm_chn_gran: 1 fm_target_ways: 0 fm_gran_eq: 0 fm_chn_l2pid: 0x00000000
Write 2LM FM Decoder CSR's for HBM Stack 0 MC 3 TAD 1
C00: DRAM_RULE[1]:
rule_enable: 1 limit: 0x21F fm_target: 0 fm_chn_ways: 0 fm_chn_gran: 1 fm_target_ways: 0 fm_gran_eq: 0 fm_chn_l2pid: 0x00000000
C01: DRAM_RULE[1]:
rule_enable: 1 limit: 0x21F fm_target: 0 fm_chn_ways: 0 fm_chn_gran: 1 fm_target_ways: 0 fm_gran_eq: 0 fm_chn_l2pid: 0x00000000
Write Patrol and Sparing TAD range CSR's for HBM Stack 1 MC 0
C00: TADWAYNESS[0]:
target_lid: 0 chn_lid: 0 tad_limit: 0x1F
C00: TADBASE[0]:
mirror_en: 0 en_failover: 0 ign_ptrl_uc: 0 base: 0x0
C01: TADWAYNESS[0]:
target_lid: 0 chn_lid: 1 tad_limit: 0x1F
C01: TADBASE[0]:
mirror_en: 0 en_failover: 0 ign_ptrl_uc: 0 base: 0x0
Write Patrol and Sparing TAD range CSR's for HBM Stack 1 MC 1
C00: TADWAYNESS[0]:
target_lid: 0 chn_lid: 2 tad_limit: 0x1F
C00: TADBASE[0]:
mirror_en: 0 en_failover: 0 ign_ptrl_uc: 0 base: 0x0
C01: TADWAYNESS[0]:
target_lid: 0 chn_lid: 3 tad_limit: 0x1F
C01: TADBASE[0]:
mirror_en: 0 en_failover: 0 ign_ptrl_uc: 0 base: 0x0
Write Patrol and Sparing TAD range CSR's for HBM Stack 1 MC 2
C00: TADWAYNESS[0]:
target_lid: 0 chn_lid: 4 tad_limit: 0x1F
C00: TADBASE[0]:
mirror_en: 0 en_failover: 0 ign_ptrl_uc: 0 base: 0x0
C01: TADWAYNESS[0]:
target_lid: 0 chn_lid: 5 tad_limit: 0x1F
C01: TADBASE[0]:
mirror_en: 0 en_failover: 0 ign_ptrl_uc: 0 base: 0x0
Write Patrol and Sparing TAD range CSR's for HBM Stack 1 MC 3
C00: TADWAYNESS[0]:
target_lid: 0 chn_lid: 6 tad_limit: 0x1F
C00: TADBASE[0]:
mirror_en: 0 en_failover: 0 ign_ptrl_uc: 0 base: 0x0
C01: TADWAYNESS[0]:
target_lid: 0 chn_lid: 7 tad_limit: 0x1F
C01: TADBASE[0]:
mirror_en: 0 en_failover: 0 ign_ptrl_uc: 0 base: 0x0
Write Hbm Nm Caching Tad CSR's for HBM Stack 1 MC 0
C00: MCNMCACHINGCFG 2LM TAD:
nmcachingtaden: 1 nmcachingtad: 0
C01: MCNMCACHINGCFG 2LM TAD:
nmcachingtaden: 1 nmcachingtad: 0
Write Hbm Nm Caching Tad CSR's for HBM Stack 1 MC 1
C00: MCNMCACHINGCFG 2LM TAD:
nmcachingtaden: 1 nmcachingtad: 0
C01: MCNMCACHINGCFG 2LM TAD:
nmcachingtaden: 1 nmcachingtad: 0
Write Hbm Nm Caching Tad CSR's for HBM Stack 1 MC 2
C00: MCNMCACHINGCFG 2LM TAD:
nmcachingtaden: 1 nmcachingtad: 0
C01: MCNMCACHINGCFG 2LM TAD:
nmcachingtaden: 1 nmcachingtad: 0
Write Hbm Nm Caching Tad CSR's for HBM Stack 1 MC 3
C00: MCNMCACHINGCFG 2LM TAD:
nmcachingtaden: 1 nmcachingtad: 0
C01: MCNMCACHINGCFG 2LM TAD:
nmcachingtaden: 1 nmcachingtad: 0
Write 1LM Decoder CSR's for HBM Stack 1 MC 0
C00: TADCHNILVOFFSET[0]:
target_ways: 0 chn_ways: 0 target_gran: 1 chn_gran: 1 tad_offset: 0x0 tad_offset_sign: 0
C01: TADCHNILVOFFSET[0]:
target_ways: 0 chn_ways: 0 target_gran: 1 chn_gran: 1 tad_offset: 0x0 tad_offset_sign: 0
Write 1LM Decoder CSR's for HBM Stack 1 MC 1
C00: TADCHNILVOFFSET[0]:
target_ways: 0 chn_ways: 0 target_gran: 1 chn_gran: 1 tad_offset: 0x0 tad_offset_sign: 0
C01: TADCHNILVOFFSET[0]:
target_ways: 0 chn_ways: 0 target_gran: 1 chn_gran: 1 tad_offset: 0x0 tad_offset_sign: 0
Write 1LM Decoder CSR's for HBM Stack 1 MC 2
C00: TADCHNILVOFFSET[0]:
target_ways: 0 chn_ways: 0 target_gran: 1 chn_gran: 1 tad_offset: 0x0 tad_offset_sign: 0
C01: TADCHNILVOFFSET[0]:
target_ways: 0 chn_ways: 0 target_gran: 1 chn_gran: 1 tad_offset: 0x0 tad_offset_sign: 0
Write 1LM Decoder CSR's for HBM Stack 1 MC 3
C00: TADCHNILVOFFSET[0]:
target_ways: 0 chn_ways: 0 target_gran: 1 chn_gran: 1 tad_offset: 0x0 tad_offset_sign: 0
C01: TADCHNILVOFFSET[0]:
target_ways: 0 chn_ways: 0 target_gran: 1 chn_gran: 1 tad_offset: 0x0 tad_offset_sign: 0
Write MCNMCACHINGCFG for HBM Stack 1 MC 0
C00: MCNMCACHINGCFG:
mcnmcachingenb: 1 mcpmemenb: 0 mcnmcachingpmemwt: 0
C01: MCNMCACHINGCFG:
mcnmcachingenb: 1 mcpmemenb: 0 mcnmcachingpmemwt: 0
Write MCNMCACHINGCFG for HBM Stack 1 MC 1
C00: MCNMCACHINGCFG:
mcnmcachingenb: 1 mcpmemenb: 0 mcnmcachingpmemwt: 0
C01: MCNMCACHINGCFG:
mcnmcachingenb: 1 mcpmemenb: 0 mcnmcachingpmemwt: 0
Write MCNMCACHINGCFG for HBM Stack 1 MC 2
C00: MCNMCACHINGCFG:
mcnmcachingenb: 1 mcpmemenb: 0 mcnmcachingpmemwt: 0
C01: MCNMCACHINGCFG:
mcnmcachingenb: 1 mcpmemenb: 0 mcnmcachingpmemwt: 0
Write MCNMCACHINGCFG for HBM Stack 1 MC 3
C00: MCNMCACHINGCFG:
mcnmcachingenb: 1 mcpmemenb: 0 mcnmcachingpmemwt: 0
C01: MCNMCACHINGCFG:
mcnmcachingenb: 1 mcpmemenb: 0 mcnmcachingpmemwt: 0
Write 2LM NM Decoder CSR's for HBM Stack 1 MC 0
C00: CSR for force_lat bit : AMAP_MC_MAIN_REG: 0x52
C00: MCNMCACHINGINTLV:
nm_target_ways: 0 nm_chn_ways: 3 nm_target_lid: 0 nm_target_gran: 1 nm_chn_gran: 1 nm_chn_lid: 0
C00: MCNMCACHINGCFG_MC_2LM_REG:
en_2way: 0 prefer_way_sel: 0 chn_cap: 0xB nm_ratio_chn_cap: 0
C00: MCNMCACHINGOFFSET:
mcnmcachingoffsetlower: 0x2 mcnmcachingoffset: 0x1 mcnmcachingoffseten: 1
C01: CSR for force_lat bit : AMAP_MC_MAIN_REG: 0x52
C01: MCNMCACHINGINTLV:
nm_target_ways: 0 nm_chn_ways: 3 nm_target_lid: 0 nm_target_gran: 1 nm_chn_gran: 1 nm_chn_lid: 1
C01: MCNMCACHINGCFG_MC_2LM_REG:
en_2way: 0 prefer_way_sel: 0 chn_cap: 0xB nm_ratio_chn_cap: 0
C01: MCNMCACHINGOFFSET:
mcnmcachingoffsetlower: 0x2 mcnmcachingoffset: 0x1 mcnmcachingoffseten: 1
Write 2LM NM Decoder CSR's for HBM Stack 1 MC 1
C00: CSR for force_lat bit : AMAP_MC_MAIN_REG: 0x52
C00: MCNMCACHINGINTLV:
nm_target_ways: 0 nm_chn_ways: 3 nm_target_lid: 0 nm_target_gran: 1 nm_chn_gran: 1 nm_chn_lid: 2
C00: MCNMCACHINGCFG_MC_2LM_REG:
en_2way: 0 prefer_way_sel: 0 chn_cap: 0xB nm_ratio_chn_cap: 0
C00: MCNMCACHINGOFFSET:
mcnmcachingoffsetlower: 0x2 mcnmcachingoffset: 0x1 mcnmcachingoffseten: 1
C01: CSR for force_lat bit : AMAP_MC_MAIN_REG: 0x52
C01: MCNMCACHINGINTLV:
nm_target_ways: 0 nm_chn_ways: 3 nm_target_lid: 0 nm_target_gran: 1 nm_chn_gran: 1 nm_chn_lid: 3
C01: MCNMCACHINGCFG_MC_2LM_REG:
en_2way: 0 prefer_way_sel: 0 chn_cap: 0xB nm_ratio_chn_cap: 0
C01: MCNMCACHINGOFFSET:
mcnmcachingoffsetlower: 0x2 mcnmcachingoffset: 0x1 mcnmcachingoffseten: 1
Write 2LM NM Decoder CSR's for HBM Stack 1 MC 2
C00: CSR for force_lat bit : AMAP_MC_MAIN_REG: 0x52
C00: MCNMCACHINGINTLV:
nm_target_ways: 0 nm_chn_ways: 3 nm_target_lid: 0 nm_target_gran: 1 nm_chn_gran: 1 nm_chn_lid: 4
C00: MCNMCACHINGCFG_MC_2LM_REG:
en_2way: 0 prefer_way_sel: 0 chn_cap: 0xB nm_ratio_chn_cap: 0
C00: MCNMCACHINGOFFSET:
mcnmcachingoffsetlower: 0x2 mcnmcachingoffset: 0x1 mcnmcachingoffseten: 1
C01: CSR for force_lat bit : AMAP_MC_MAIN_REG: 0x52
C01: MCNMCACHINGINTLV:
nm_target_ways: 0 nm_chn_ways: 3 nm_target_lid: 0 nm_target_gran: 1 nm_chn_gran: 1 nm_chn_lid: 5
C01: MCNMCACHINGCFG_MC_2LM_REG:
en_2way: 0 prefer_way_sel: 0 chn_cap: 0xB nm_ratio_chn_cap: 0
C01: MCNMCACHINGOFFSET:
mcnmcachingoffsetlower: 0x2 mcnmcachingoffset: 0x1 mcnmcachingoffseten: 1
Write 2LM NM Decoder CSR's for HBM Stack 1 MC 3
C00: CSR for force_lat bit : AMAP_MC_MAIN_REG: 0x52
C00: MCNMCACHINGINTLV:
nm_target_ways: 0 nm_chn_ways: 3 nm_target_lid: 0 nm_target_gran: 1 nm_chn_gran: 1 nm_chn_lid: 6
C00: MCNMCACHINGCFG_MC_2LM_REG:
en_2way: 0 prefer_way_sel: 0 chn_cap: 0xB nm_ratio_chn_cap: 0
C00: MCNMCACHINGOFFSET:
mcnmcachingoffsetlower: 0x2 mcnmcachingoffset: 0x1 mcnmcachingoffseten: 1
C01: CSR for force_lat bit : AMAP_MC_MAIN_REG: 0x52
C01: MCNMCACHINGINTLV:
nm_target_ways: 0 nm_chn_ways: 3 nm_target_lid: 0 nm_target_gran: 1 nm_chn_gran: 1 nm_chn_lid: 7
C01: MCNMCACHINGCFG_MC_2LM_REG:
en_2way: 0 prefer_way_sel: 0 chn_cap: 0xB nm_ratio_chn_cap: 0
C01: MCNMCACHINGOFFSET:
mcnmcachingoffsetlower: 0x2 mcnmcachingoffset: 0x1 mcnmcachingoffseten: 1
Write 2LM FM Decoder CSR's for HBM Stack 1 MC 0 TAD 0
C00: DRAM_RULE[0]:
rule_enable: 1 limit: 0x41F fm_target: 0 fm_chn_ways: 0 fm_chn_gran: 1 fm_target_ways: 0 fm_gran_eq: 0 fm_chn_l2pid: 0x00000000
C01: DRAM_RULE[0]:
rule_enable: 1 limit: 0x41F fm_target: 0 fm_chn_ways: 0 fm_chn_gran: 1 fm_target_ways: 0 fm_gran_eq: 0 fm_chn_l2pid: 0x00000000
Write 2LM FM Decoder CSR's for HBM Stack 1 MC 1 TAD 0
C00: DRAM_RULE[0]:
rule_enable: 1 limit: 0x41F fm_target: 0 fm_chn_ways: 0 fm_chn_gran: 1 fm_target_ways: 0 fm_gran_eq: 0 fm_chn_l2pid: 0x00000000
C01: DRAM_RULE[0]:
rule_enable: 1 limit: 0x41F fm_target: 0 fm_chn_ways: 0 fm_chn_gran: 1 fm_target_ways: 0 fm_gran_eq: 0 fm_chn_l2pid: 0x00000000
Write 2LM FM Decoder CSR's for HBM Stack 1 MC 2 TAD 0
C00: DRAM_RULE[0]:
rule_enable: 1 limit: 0x41F fm_target: 0 fm_chn_ways: 0 fm_chn_gran: 1 fm_target_ways: 0 fm_gran_eq: 0 fm_chn_l2pid: 0x00000000
C01: DRAM_RULE[0]:
rule_enable: 1 limit: 0x41F fm_target: 0 fm_chn_ways: 0 fm_chn_gran: 1 fm_target_ways: 0 fm_gran_eq: 0 fm_chn_l2pid: 0x00000000
Write 2LM FM Decoder CSR's for HBM Stack 1 MC 3 TAD 0
C00: DRAM_RULE[0]:
rule_enable: 1 limit: 0x41F fm_target: 0 fm_chn_ways: 0 fm_chn_gran: 1 fm_target_ways: 0 fm_gran_eq: 0 fm_chn_l2pid: 0x00000000
C01: DRAM_RULE[0]:
rule_enable: 1 limit: 0x41F fm_target: 0 fm_chn_ways: 0 fm_chn_gran: 1 fm_target_ways: 0 fm_gran_eq: 0 fm_chn_l2pid: 0x00000000
Write Patrol and Sparing TAD range CSR's for HBM Stack 2 MC 0
C00: TADWAYNESS[0]:
target_lid: 0 chn_lid: 0 tad_limit: 0x1F
C00: TADBASE[0]:
mirror_en: 0 en_failover: 0 ign_ptrl_uc: 0 base: 0x0
C01: TADWAYNESS[0]:
target_lid: 0 chn_lid: 1 tad_limit: 0x1F
C01: TADBASE[0]:
mirror_en: 0 en_failover: 0 ign_ptrl_uc: 0 base: 0x0
Write Patrol and Sparing TAD range CSR's for HBM Stack 2 MC 1
C00: TADWAYNESS[0]:
target_lid: 0 chn_lid: 2 tad_limit: 0x1F
C00: TADBASE[0]:
mirror_en: 0 en_failover: 0 ign_ptrl_uc: 0 base: 0x0
C01: TADWAYNESS[0]:
target_lid: 0 chn_lid: 3 tad_limit: 0x1F
C01: TADBASE[0]:
mirror_en: 0 en_failover: 0 ign_ptrl_uc: 0 base: 0x0
Write Patrol and Sparing TAD range CSR's for HBM Stack 2 MC 2
C00: TADWAYNESS[0]:
target_lid: 0 chn_lid: 4 tad_limit: 0x1F
C00: TADBASE[0]:
mirror_en: 0 en_failover: 0 ign_ptrl_uc: 0 base: 0x0
C01: TADWAYNESS[0]:
target_lid: 0 chn_lid: 5 tad_limit: 0x1F
C01: TADBASE[0]:
mirror_en: 0 en_failover: 0 ign_ptrl_uc: 0 base: 0x0
Write Patrol and Sparing TAD range CSR's for HBM Stack 2 MC 3
C00: TADWAYNESS[0]:
target_lid: 0 chn_lid: 6 tad_limit: 0x1F
C00: TADBASE[0]:
mirror_en: 0 en_failover: 0 ign_ptrl_uc: 0 base: 0x0
C01: TADWAYNESS[0]:
target_lid: 0 chn_lid: 7 tad_limit: 0x1F
C01: TADBASE[0]:
mirror_en: 0 en_failover: 0 ign_ptrl_uc: 0 base: 0x0
Write Hbm Nm Caching Tad CSR's for HBM Stack 2 MC 0
C00: MCNMCACHINGCFG 2LM TAD:
nmcachingtaden: 1 nmcachingtad: 0
C01: MCNMCACHINGCFG 2LM TAD:
nmcachingtaden: 1 nmcachingtad: 0
Write Hbm Nm Caching Tad CSR's for HBM Stack 2 MC 1
C00: MCNMCACHINGCFG 2LM TAD:
nmcachingtaden: 1 nmcachingtad: 0
C01: MCNMCACHINGCFG 2LM TAD:
nmcachingtaden: 1 nmcachingtad: 0
Write Hbm Nm Caching Tad CSR's for HBM Stack 2 MC 2
C00: MCNMCACHINGCFG 2LM TAD:
nmcachingtaden: 1 nmcachingtad: 0
C01: MCNMCACHINGCFG 2LM TAD:
nmcachingtaden: 1 nmcachingtad: 0
Write Hbm Nm Caching Tad CSR's for HBM Stack 2 MC 3
C00: MCNMCACHINGCFG 2LM TAD:
nmcachingtaden: 1 nmcachingtad: 0
C01: MCNMCACHINGCFG 2LM TAD:
nmcachingtaden: 1 nmcachingtad: 0
Write 1LM Decoder CSR's for HBM Stack 2 MC 0
C00: TADCHNILVOFFSET[0]:
target_ways: 0 chn_ways: 0 target_gran: 1 chn_gran: 1 tad_offset: 0x0 tad_offset_sign: 0
C01: TADCHNILVOFFSET[0]:
target_ways: 0 chn_ways: 0 target_gran: 1 chn_gran: 1 tad_offset: 0x0 tad_offset_sign: 0
Write 1LM Decoder CSR's for HBM Stack 2 MC 1
C00: TADCHNILVOFFSET[0]:
target_ways: 0 chn_ways: 0 target_gran: 1 chn_gran: 1 tad_offset: 0x0 tad_offset_sign: 0
C01: TADCHNILVOFFSET[0]:
target_ways: 0 chn_ways: 0 target_gran: 1 chn_gran: 1 tad_offset: 0x0 tad_offset_sign: 0
Write 1LM Decoder CSR's for HBM Stack 2 MC 2
C00: TADCHNILVOFFSET[0]:
target_ways: 0 chn_ways: 0 target_gran: 1 chn_gran: 1 tad_offset: 0x0 tad_offset_sign: 0
C01: TADCHNILVOFFSET[0]:
target_ways: 0 chn_ways: 0 target_gran: 1 chn_gran: 1 tad_offset: 0x0 tad_offset_sign: 0
Write 1LM Decoder CSR's for HBM Stack 2 MC 3
C00: TADCHNILVOFFSET[0]:
target_ways: 0 chn_ways: 0 target_gran: 1 chn_gran: 1 tad_offset: 0x0 tad_offset_sign: 0
C01: TADCHNILVOFFSET[0]:
target_ways: 0 chn_ways: 0 target_gran: 1 chn_gran: 1 tad_offset: 0x0 tad_offset_sign: 0
Write MCNMCACHINGCFG for HBM Stack 2 MC 0
C00: MCNMCACHINGCFG:
mcnmcachingenb: 1 mcpmemenb: 0 mcnmcachingpmemwt: 0
C01: MCNMCACHINGCFG:
mcnmcachingenb: 1 mcpmemenb: 0 mcnmcachingpmemwt: 0
Write MCNMCACHINGCFG for HBM Stack 2 MC 1
C00: MCNMCACHINGCFG:
mcnmcachingenb: 1 mcpmemenb: 0 mcnmcachingpmemwt: 0
C01: MCNMCACHINGCFG:
mcnmcachingenb: 1 mcpmemenb: 0 mcnmcachingpmemwt: 0
Write MCNMCACHINGCFG for HBM Stack 2 MC 2
C00: MCNMCACHINGCFG:
mcnmcachingenb: 1 mcpmemenb: 0 mcnmcachingpmemwt: 0
C01: MCNMCACHINGCFG:
mcnmcachingenb: 1 mcpmemenb: 0 mcnmcachingpmemwt: 0
Write MCNMCACHINGCFG for HBM Stack 2 MC 3
C00: MCNMCACHINGCFG:
mcnmcachingenb: 1 mcpmemenb: 0 mcnmcachingpmemwt: 0
C01: MCNMCACHINGCFG:
mcnmcachingenb: 1 mcpmemenb: 0 mcnmcachingpmemwt: 0
Write 2LM NM Decoder CSR's for HBM Stack 2 MC 0
C00: CSR for force_lat bit : AMAP_MC_MAIN_REG: 0x52
C00: MCNMCACHINGINTLV:
nm_target_ways: 0 nm_chn_ways: 3 nm_target_lid: 0 nm_target_gran: 1 nm_chn_gran: 1 nm_chn_lid: 0
C00: MCNMCACHINGCFG_MC_2LM_REG:
en_2way: 0 prefer_way_sel: 0 chn_cap: 0xB nm_ratio_chn_cap: 0
C00: MCNMCACHINGOFFSET:
mcnmcachingoffsetlower: 0x2 mcnmcachingoffset: 0x2 mcnmcachingoffseten: 1
C01: CSR for force_lat bit : AMAP_MC_MAIN_REG: 0x52
C01: MCNMCACHINGINTLV:
nm_target_ways: 0 nm_chn_ways: 3 nm_target_lid: 0 nm_target_gran: 1 nm_chn_gran: 1 nm_chn_lid: 1
C01: MCNMCACHINGCFG_MC_2LM_REG:
en_2way: 0 prefer_way_sel: 0 chn_cap: 0xB nm_ratio_chn_cap: 0
C01: MCNMCACHINGOFFSET:
mcnmcachingoffsetlower: 0x2 mcnmcachingoffset: 0x2 mcnmcachingoffseten: 1
Write 2LM NM Decoder CSR's for HBM Stack 2 MC 1
C00: CSR for force_lat bit : AMAP_MC_MAIN_REG: 0x52
C00: MCNMCACHINGINTLV:
nm_target_ways: 0 nm_chn_ways: 3 nm_target_lid: 0 nm_target_gran: 1 nm_chn_gran: 1 nm_chn_lid: 2
C00: MCNMCACHINGCFG_MC_2LM_REG:
en_2way: 0 prefer_way_sel: 0 chn_cap: 0xB nm_ratio_chn_cap: 0
C00: MCNMCACHINGOFFSET:
mcnmcachingoffsetlower: 0x2 mcnmcachingoffset: 0x2 mcnmcachingoffseten: 1
C01: CSR for force_lat bit : AMAP_MC_MAIN_REG: 0x52
C01: MCNMCACHINGINTLV:
nm_target_ways: 0 nm_chn_ways: 3 nm_target_lid: 0 nm_target_gran: 1 nm_chn_gran: 1 nm_chn_lid: 3
C01: MCNMCACHINGCFG_MC_2LM_REG:
en_2way: 0 prefer_way_sel: 0 chn_cap: 0xB nm_ratio_chn_cap: 0
C01: MCNMCACHINGOFFSET:
mcnmcachingoffsetlower: 0x2 mcnmcachingoffset: 0x2 mcnmcachingoffseten: 1
Write 2LM NM Decoder CSR's for HBM Stack 2 MC 2
C00: CSR for force_lat bit : AMAP_MC_MAIN_REG: 0x52
C00: MCNMCACHINGINTLV:
nm_target_ways: 0 nm_chn_ways: 3 nm_target_lid: 0 nm_target_gran: 1 nm_chn_gran: 1 nm_chn_lid: 4
C00: MCNMCACHINGCFG_MC_2LM_REG:
en_2way: 0 prefer_way_sel: 0 chn_cap: 0xB nm_ratio_chn_cap: 0
C00: MCNMCACHINGOFFSET:
mcnmcachingoffsetlower: 0x2 mcnmcachingoffset: 0x2 mcnmcachingoffseten: 1
C01: CSR for force_lat bit : AMAP_MC_MAIN_REG: 0x52
C01: MCNMCACHINGINTLV:
nm_target_ways: 0 nm_chn_ways: 3 nm_target_lid: 0 nm_target_gran: 1 nm_chn_gran: 1 nm_chn_lid: 5
C01: MCNMCACHINGCFG_MC_2LM_REG:
en_2way: 0 prefer_way_sel: 0 chn_cap: 0xB nm_ratio_chn_cap: 0
C01: MCNMCACHINGOFFSET:
mcnmcachingoffsetlower: 0x2 mcnmcachingoffset: 0x2 mcnmcachingoffseten: 1
Write 2LM NM Decoder CSR's for HBM Stack 2 MC 3
C00: CSR for force_lat bit : AMAP_MC_MAIN_REG: 0x52
C00: MCNMCACHINGINTLV:
nm_target_ways: 0 nm_chn_ways: 3 nm_target_lid: 0 nm_target_gran: 1 nm_chn_gran: 1 nm_chn_lid: 6
C00: MCNMCACHINGCFG_MC_2LM_REG:
en_2way: 0 prefer_way_sel: 0 chn_cap: 0xB nm_ratio_chn_cap: 0
C00: MCNMCACHINGOFFSET:
mcnmcachingoffsetlower: 0x2 mcnmcachingoffset: 0x2 mcnmcachingoffseten: 1
C01: CSR for force_lat bit : AMAP_MC_MAIN_REG: 0x52
C01: MCNMCACHINGINTLV:
nm_target_ways: 0 nm_chn_ways: 3 nm_target_lid: 0 nm_target_gran: 1 nm_chn_gran: 1 nm_chn_lid: 7
C01: MCNMCACHINGCFG_MC_2LM_REG:
en_2way: 0 prefer_way_sel: 0 chn_cap: 0xB nm_ratio_chn_cap: 0
C01: MCNMCACHINGOFFSET:
mcnmcachingoffsetlower: 0x2 mcnmcachingoffset: 0x2 mcnmcachingoffseten: 1
Write 2LM FM Decoder CSR's for HBM Stack 2 MC 0 TAD 0
C00: DRAM_RULE[0]:
rule_enable: 1 limit: 0x61F fm_target: 0 fm_chn_ways: 0 fm_chn_gran: 1 fm_target_ways: 0 fm_gran_eq: 0 fm_chn_l2pid: 0x00000000
C01: DRAM_RULE[0]:
rule_enable: 1 limit: 0x61F fm_target: 0 fm_chn_ways: 0 fm_chn_gran: 1 fm_target_ways: 0 fm_gran_eq: 0 fm_chn_l2pid: 0x00000000
Write 2LM FM Decoder CSR's for HBM Stack 2 MC 1 TAD 0
C00: DRAM_RULE[0]:
rule_enable: 1 limit: 0x61F fm_target: 0 fm_chn_ways: 0 fm_chn_gran: 1 fm_target_ways: 0 fm_gran_eq: 0 fm_chn_l2pid: 0x00000000
C01: DRAM_RULE[0]:
rule_enable: 1 limit: 0x61F fm_target: 0 fm_chn_ways: 0 fm_chn_gran: 1 fm_target_ways: 0 fm_gran_eq: 0 fm_chn_l2pid: 0x00000000
Write 2LM FM Decoder CSR's for HBM Stack 2 MC 2 TAD 0
C00: DRAM_RULE[0]:
rule_enable: 1 limit: 0x61F fm_target: 0 fm_chn_ways: 0 fm_chn_gran: 1 fm_target_ways: 0 fm_gran_eq: 0 fm_chn_l2pid: 0x00000000
C01: DRAM_RULE[0]:
rule_enable: 1 limit: 0x61F fm_target: 0 fm_chn_ways: 0 fm_chn_gran: 1 fm_target_ways: 0 fm_gran_eq: 0 fm_chn_l2pid: 0x00000000
Write 2LM FM Decoder CSR's for HBM Stack 2 MC 3 TAD 0
C00: DRAM_RULE[0]:
rule_enable: 1 limit: 0x61F fm_target: 0 fm_chn_ways: 0 fm_chn_gran: 1 fm_target_ways: 0 fm_gran_eq: 0 fm_chn_l2pid: 0x00000000
C01: DRAM_RULE[0]:
rule_enable: 1 limit: 0x61F fm_target: 0 fm_chn_ways: 0 fm_chn_gran: 1 fm_target_ways: 0 fm_gran_eq: 0 fm_chn_l2pid: 0x00000000
Write Patrol and Sparing TAD range CSR's for HBM Stack 3 MC 0
C00: TADWAYNESS[0]:
target_lid: 0 chn_lid: 0 tad_limit: 0x1F
C00: TADBASE[0]:
mirror_en: 0 en_failover: 0 ign_ptrl_uc: 0 base: 0x0
C01: TADWAYNESS[0]:
target_lid: 0 chn_lid: 1 tad_limit: 0x1F
C01: TADBASE[0]:
mirror_en: 0 en_failover: 0 ign_ptrl_uc: 0 base: 0x0
Write Patrol and Sparing TAD range CSR's for HBM Stack 3 MC 1
C00: TADWAYNESS[0]:
target_lid: 0 chn_lid: 2 tad_limit: 0x1F
C00: TADBASE[0]:
mirror_en: 0 en_failover: 0 ign_ptrl_uc: 0 base: 0x0
C01: TADWAYNESS[0]:
target_lid: 0 chn_lid: 3 tad_limit: 0x1F
C01: TADBASE[0]:
mirror_en: 0 en_failover: 0 ign_ptrl_uc: 0 base: 0x0
Write Patrol and Sparing TAD range CSR's for HBM Stack 3 MC 2
C00: TADWAYNESS[0]:
target_lid: 0 chn_lid: 4 tad_limit: 0x1F
C00: TADBASE[0]:
mirror_en: 0 en_failover: 0 ign_ptrl_uc: 0 base: 0x0
C01: TADWAYNESS[0]:
target_lid: 0 chn_lid: 5 tad_limit: 0x1F
C01: TADBASE[0]:
mirror_en: 0 en_failover: 0 ign_ptrl_uc: 0 base: 0x0
Write Patrol and Sparing TAD range CSR's for HBM Stack 3 MC 3
C00: TADWAYNESS[0]:
target_lid: 0 chn_lid: 6 tad_limit: 0x1F
C00: TADBASE[0]:
mirror_en: 0 en_failover: 0 ign_ptrl_uc: 0 base: 0x0
C01: TADWAYNESS[0]:
target_lid: 0 chn_lid: 7 tad_limit: 0x1F
C01: TADBASE[0]:
mirror_en: 0 en_failover: 0 ign_ptrl_uc: 0 base: 0x0
Write Hbm Nm Caching Tad CSR's for HBM Stack 3 MC 0
C00: MCNMCACHINGCFG 2LM TAD:
nmcachingtaden: 1 nmcachingtad: 0
C01: MCNMCACHINGCFG 2LM TAD:
nmcachingtaden: 1 nmcachingtad: 0
Write Hbm Nm Caching Tad CSR's for HBM Stack 3 MC 1
C00: MCNMCACHINGCFG 2LM TAD:
nmcachingtaden: 1 nmcachingtad: 0
C01: MCNMCACHINGCFG 2LM TAD:
nmcachingtaden: 1 nmcachingtad: 0
Write Hbm Nm Caching Tad CSR's for HBM Stack 3 MC 2
C00: MCNMCACHINGCFG 2LM TAD:
nmcachingtaden: 1 nmcachingtad: 0
C01: MCNMCACHINGCFG 2LM TAD:
nmcachingtaden: 1 nmcachingtad: 0
Write Hbm Nm Caching Tad CSR's for HBM Stack 3 MC 3
C00: MCNMCACHINGCFG 2LM TAD:
nmcachingtaden: 1 nmcachingtad: 0
C01: MCNMCACHINGCFG 2LM TAD:
nmcachingtaden: 1 nmcachingtad: 0
Write 1LM Decoder CSR's for HBM Stack 3 MC 0
C00: TADCHNILVOFFSET[0]:
target_ways: 0 chn_ways: 0 target_gran: 1 chn_gran: 1 tad_offset: 0x0 tad_offset_sign: 0
C01: TADCHNILVOFFSET[0]:
target_ways: 0 chn_ways: 0 target_gran: 1 chn_gran: 1 tad_offset: 0x0 tad_offset_sign: 0
Write 1LM Decoder CSR's for HBM Stack 3 MC 1
C00: TADCHNILVOFFSET[0]:
target_ways: 0 chn_ways: 0 target_gran: 1 chn_gran: 1 tad_offset: 0x0 tad_offset_sign: 0
C01: TADCHNILVOFFSET[0]:
target_ways: 0 chn_ways: 0 target_gran: 1 chn_gran: 1 tad_offset: 0x0 tad_offset_sign: 0
Write 1LM Decoder CSR's for HBM Stack 3 MC 2
C00: TADCHNILVOFFSET[0]:
target_ways: 0 chn_ways: 0 target_gran: 1 chn_gran: 1 tad_offset: 0x0 tad_offset_sign: 0
C01: TADCHNILVOFFSET[0]:
target_ways: 0 chn_ways: 0 target_gran: 1 chn_gran: 1 tad_offset: 0x0 tad_offset_sign: 0
Write 1LM Decoder CSR's for HBM Stack 3 MC 3
C00: TADCHNILVOFFSET[0]:
target_ways: 0 chn_ways: 0 target_gran: 1 chn_gran: 1 tad_offset: 0x0 tad_offset_sign: 0
C01: TADCHNILVOFFSET[0]:
target_ways: 0 chn_ways: 0 target_gran: 1 chn_gran: 1 tad_offset: 0x0 tad_offset_sign: 0
Write MCNMCACHINGCFG for HBM Stack 3 MC 0
C00: MCNMCACHINGCFG:
mcnmcachingenb: 1 mcpmemenb: 0 mcnmcachingpmemwt: 0
C01: MCNMCACHINGCFG:
mcnmcachingenb: 1 mcpmemenb: 0 mcnmcachingpmemwt: 0
Write MCNMCACHINGCFG for HBM Stack 3 MC 1
C00: MCNMCACHINGCFG:
mcnmcachingenb: 1 mcpmemenb: 0 mcnmcachingpmemwt: 0
C01: MCNMCACHINGCFG:
mcnmcachingenb: 1 mcpmemenb: 0 mcnmcachingpmemwt: 0
Write MCNMCACHINGCFG for HBM Stack 3 MC 2
C00: MCNMCACHINGCFG:
mcnmcachingenb: 1 mcpmemenb: 0 mcnmcachingpmemwt: 0
C01: MCNMCACHINGCFG:
mcnmcachingenb: 1 mcpmemenb: 0 mcnmcachingpmemwt: 0
Write MCNMCACHINGCFG for HBM Stack 3 MC 3
C00: MCNMCACHINGCFG:
mcnmcachingenb: 1 mcpmemenb: 0 mcnmcachingpmemwt: 0
C01: MCNMCACHINGCFG:
mcnmcachingenb: 1 mcpmemenb: 0 mcnmcachingpmemwt: 0
Write 2LM NM Decoder CSR's for HBM Stack 3 MC 0
C00: CSR for force_lat bit : AMAP_MC_MAIN_REG: 0x52
C00: MCNMCACHINGINTLV:
nm_target_ways: 0 nm_chn_ways: 3 nm_target_lid: 0 nm_target_gran: 1 nm_chn_gran: 1 nm_chn_lid: 0
C00: MCNMCACHINGCFG_MC_2LM_REG:
en_2way: 0 prefer_way_sel: 0 chn_cap: 0xB nm_ratio_chn_cap: 0
C00: MCNMCACHINGOFFSET:
mcnmcachingoffsetlower: 0x2 mcnmcachingoffset: 0x3 mcnmcachingoffseten: 1
C01: CSR for force_lat bit : AMAP_MC_MAIN_REG: 0x52
C01: MCNMCACHINGINTLV:
nm_target_ways: 0 nm_chn_ways: 3 nm_target_lid: 0 nm_target_gran: 1 nm_chn_gran: 1 nm_chn_lid: 1
C01: MCNMCACHINGCFG_MC_2LM_REG:
en_2way: 0 prefer_way_sel: 0 chn_cap: 0xB nm_ratio_chn_cap: 0
C01: MCNMCACHINGOFFSET:
mcnmcachingoffsetlower: 0x2 mcnmcachingoffset: 0x3 mcnmcachingoffseten: 1
Write 2LM NM Decoder CSR's for HBM Stack 3 MC 1
C00: CSR for force_lat bit : AMAP_MC_MAIN_REG: 0x52
C00: MCNMCACHINGINTLV:
nm_target_ways: 0 nm_chn_ways: 3 nm_target_lid: 0 nm_target_gran: 1 nm_chn_gran: 1 nm_chn_lid: 2
C00: MCNMCACHINGCFG_MC_2LM_REG:
en_2way: 0 prefer_way_sel: 0 chn_cap: 0xB nm_ratio_chn_cap: 0
C00: MCNMCACHINGOFFSET:
mcnmcachingoffsetlower: 0x2 mcnmcachingoffset: 0x3 mcnmcachingoffseten: 1
C01: CSR for force_lat bit : AMAP_MC_MAIN_REG: 0x52
C01: MCNMCACHINGINTLV:
nm_target_ways: 0 nm_chn_ways: 3 nm_target_lid: 0 nm_target_gran: 1 nm_chn_gran: 1 nm_chn_lid: 3
C01: MCNMCACHINGCFG_MC_2LM_REG:
en_2way: 0 prefer_way_sel: 0 chn_cap: 0xB nm_ratio_chn_cap: 0
C01: MCNMCACHINGOFFSET:
mcnmcachingoffsetlower: 0x2 mcnmcachingoffset: 0x3 mcnmcachingoffseten: 1
Write 2LM NM Decoder CSR's for HBM Stack 3 MC 2
C00: CSR for force_lat bit : AMAP_MC_MAIN_REG: 0x52
C00: MCNMCACHINGINTLV:
nm_target_ways: 0 nm_chn_ways: 3 nm_target_lid: 0 nm_target_gran: 1 nm_chn_gran: 1 nm_chn_lid: 4
C00: MCNMCACHINGCFG_MC_2LM_REG:
en_2way: 0 prefer_way_sel: 0 chn_cap: 0xB nm_ratio_chn_cap: 0
C00: MCNMCACHINGOFFSET:
mcnmcachingoffsetlower: 0x2 mcnmcachingoffset: 0x3 mcnmcachingoffseten: 1
C01: CSR for force_lat bit : AMAP_MC_MAIN_REG: 0x52
C01: MCNMCACHINGINTLV:
nm_target_ways: 0 nm_chn_ways: 3 nm_target_lid: 0 nm_target_gran: 1 nm_chn_gran: 1 nm_chn_lid: 5
C01: MCNMCACHINGCFG_MC_2LM_REG:
en_2way: 0 prefer_way_sel: 0 chn_cap: 0xB nm_ratio_chn_cap: 0
C01: MCNMCACHINGOFFSET:
mcnmcachingoffsetlower: 0x2 mcnmcachingoffset: 0x3 mcnmcachingoffseten: 1
Write 2LM NM Decoder CSR's for HBM Stack 3 MC 3
C00: CSR for force_lat bit : AMAP_MC_MAIN_REG: 0x52
C00: MCNMCACHINGINTLV:
nm_target_ways: 0 nm_chn_ways: 3 nm_target_lid: 0 nm_target_gran: 1 nm_chn_gran: 1 nm_chn_lid: 6
C00: MCNMCACHINGCFG_MC_2LM_REG:
en_2way: 0 prefer_way_sel: 0 chn_cap: 0xB nm_ratio_chn_cap: 0
C00: MCNMCACHINGOFFSET:
mcnmcachingoffsetlower: 0x2 mcnmcachingoffset: 0x3 mcnmcachingoffseten: 1
C01: CSR for force_lat bit : AMAP_MC_MAIN_REG: 0x52
C01: MCNMCACHINGINTLV:
nm_target_ways: 0 nm_chn_ways: 3 nm_target_lid: 0 nm_target_gran: 1 nm_chn_gran: 1 nm_chn_lid: 7
C01: MCNMCACHINGCFG_MC_2LM_REG:
en_2way: 0 prefer_way_sel: 0 chn_cap: 0xB nm_ratio_chn_cap: 0
C01: MCNMCACHINGOFFSET:
mcnmcachingoffsetlower: 0x2 mcnmcachingoffset: 0x3 mcnmcachingoffseten: 1
Write 2LM FM Decoder CSR's for HBM Stack 3 MC 0 TAD 0
C00: DRAM_RULE[0]:
rule_enable: 1 limit: 0x81F fm_target: 0 fm_chn_ways: 0 fm_chn_gran: 1 fm_target_ways: 0 fm_gran_eq: 0 fm_chn_l2pid: 0x00000000
C01: DRAM_RULE[0]:
rule_enable: 1 limit: 0x81F fm_target: 0 fm_chn_ways: 0 fm_chn_gran: 1 fm_target_ways: 0 fm_gran_eq: 0 fm_chn_l2pid: 0x00000000
Write 2LM FM Decoder CSR's for HBM Stack 3 MC 1 TAD 0
C00: DRAM_RULE[0]:
rule_enable: 1 limit: 0x81F fm_target: 0 fm_chn_ways: 0 fm_chn_gran: 1 fm_target_ways: 0 fm_gran_eq: 0 fm_chn_l2pid: 0x00000000
C01: DRAM_RULE[0]:
rule_enable: 1 limit: 0x81F fm_target: 0 fm_chn_ways: 0 fm_chn_gran: 1 fm_target_ways: 0 fm_gran_eq: 0 fm_chn_l2pid: 0x00000000
Write 2LM FM Decoder CSR's for HBM Stack 3 MC 2 TAD 0
C00: DRAM_RULE[0]:
rule_enable: 1 limit: 0x81F fm_target: 0 fm_chn_ways: 0 fm_chn_gran: 1 fm_target_ways: 0 fm_gran_eq: 0 fm_chn_l2pid: 0x00000000
C01: DRAM_RULE[0]:
rule_enable: 1 limit: 0x81F fm_target: 0 fm_chn_ways: 0 fm_chn_gran: 1 fm_target_ways: 0 fm_gran_eq: 0 fm_chn_l2pid: 0x00000000
Write 2LM FM Decoder CSR's for HBM Stack 3 MC 3 TAD 0
C00: DRAM_RULE[0]:
rule_enable: 1 limit: 0x81F fm_target: 0 fm_chn_ways: 0 fm_chn_gran: 1 fm_target_ways: 0 fm_gran_eq: 0 fm_chn_l2pid: 0x00000000
C01: DRAM_RULE[0]:
rule_enable: 1 limit: 0x81F fm_target: 0 fm_chn_ways: 0 fm_chn_gran: 1 fm_target_ways: 0 fm_gran_eq: 0 fm_chn_l2pid: 0x00000000
Checkpoint Code: Socket 0, 0xBB, 0x08, 0x0000
^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^
Write RIR CSRs for Socket: 0
^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^
Channel - 0
RIRWAYNESSLIMIT_0_MC_MAIN_REG
rir_val: 1 rir_limit: 0x1F rir_way: 0x0
RIRILV0OFFSET_0_MC_MAIN_REG
rir_rnk_tgt0: 0x0 rir_offset0: 0x0
RIRILV1OFFSET_0_MC_MAIN_REG
rir_rnk_tgt0: 0x0 rir_offset0: 0x0
RIRILV2OFFSET_0_MC_MAIN_REG
rir_rnk_tgt0: 0x0 rir_offset0: 0x0
RIRILV3OFFSET_0_MC_MAIN_REG
rir_rnk_tgt0: 0x0 rir_offset0: 0x0
RIRILV4OFFSET_0_MC_MAIN_REG
rir_rnk_tgt0: 0x0 rir_offset0: 0x0
RIRILV5OFFSET_0_MC_MAIN_REG
rir_rnk_tgt0: 0x0 rir_offset0: 0x0
RIRILV6OFFSET_0_MC_MAIN_REG
rir_rnk_tgt0: 0x0 rir_offset0: 0x0
RIRILV7OFFSET_0_MC_MAIN_REG
rir_rnk_tgt0: 0x0 rir_offset0: 0x0
RIRWAYNESSLIMIT_1_MC_MAIN_REG
rir_val: 0 rir_limit: 0x1F rir_way: 0x0
RIRILV0OFFSET_1_MC_MAIN_REG
rir_rnk_tgt0: 0x0 rir_offset0: 0x0
RIRILV1OFFSET_1_MC_MAIN_REG
rir_rnk_tgt0: 0x0 rir_offset0: 0x0
RIRILV2OFFSET_1_MC_MAIN_REG
rir_rnk_tgt0: 0x0 rir_offset0: 0x0
RIRILV3OFFSET_1_MC_MAIN_REG
rir_rnk_tgt0: 0x0 rir_offset0: 0x0
RIRILV4OFFSET_1_MC_MAIN_REG
rir_rnk_tgt0: 0x0 rir_offset0: 0x0
RIRILV5OFFSET_1_MC_MAIN_REG
rir_rnk_tgt0: 0x0 rir_offset0: 0x0
RIRILV6OFFSET_1_MC_MAIN_REG
rir_rnk_tgt0: 0x0 rir_offset0: 0x0
RIRILV7OFFSET_1_MC_MAIN_REG
rir_rnk_tgt0: 0x0 rir_offset0: 0x0
RIRWAYNESSLIMIT_2_MC_MAIN_REG
rir_val: 0 rir_limit: 0x1F rir_way: 0x0
RIRILV0OFFSET_2_MC_MAIN_REG
rir_rnk_tgt0: 0x0 rir_offset0: 0x0
RIRILV1OFFSET_2_MC_MAIN_REG
rir_rnk_tgt0: 0x0 rir_offset0: 0x0
RIRILV2OFFSET_2_MC_MAIN_REG
rir_rnk_tgt0: 0x0 rir_offset0: 0x0
RIRILV3OFFSET_2_MC_MAIN_REG
rir_rnk_tgt0: 0x0 rir_offset0: 0x0
RIRILV4OFFSET_2_MC_MAIN_REG
rir_rnk_tgt0: 0x0 rir_offset0: 0x0
RIRILV5OFFSET_2_MC_MAIN_REG
rir_rnk_tgt0: 0x0 rir_offset0: 0x0
RIRILV6OFFSET_2_MC_MAIN_REG
rir_rnk_tgt0: 0x0 rir_offset0: 0x0
RIRILV7OFFSET_2_MC_MAIN_REG
rir_rnk_tgt0: 0x0 rir_offset0: 0x0
RIRWAYNESSLIMIT_3_MC_MAIN_REG
rir_val: 0 rir_limit: 0x1F rir_way: 0x0
RIRILV0OFFSET_3_MC_MAIN_REG
rir_rnk_tgt0: 0x0 rir_offset0: 0x0
RIRILV1OFFSET_3_MC_MAIN_REG
rir_rnk_tgt0: 0x0 rir_offset0: 0x0
RIRILV2OFFSET_3_MC_MAIN_REG
rir_rnk_tgt0: 0x0 rir_offset0: 0x0
RIRILV3OFFSET_3_MC_MAIN_REG
rir_rnk_tgt0: 0x0 rir_offset0: 0x0
RIRILV4OFFSET_3_MC_MAIN_REG
rir_rnk_tgt0: 0x0 rir_offset0: 0x0
RIRILV5OFFSET_3_MC_MAIN_REG
rir_rnk_tgt0: 0x0 rir_offset0: 0x0
RIRILV6OFFSET_3_MC_MAIN_REG
rir_rnk_tgt0: 0x0 rir_offset0: 0x0
RIRILV7OFFSET_3_MC_MAIN_REG
rir_rnk_tgt0: 0x0 rir_offset0: 0x0
Channel - 2
RIRWAYNESSLIMIT_0_MC_MAIN_REG
rir_val: 1 rir_limit: 0x1F rir_way: 0x0
RIRILV0OFFSET_0_MC_MAIN_REG
rir_rnk_tgt0: 0x0 rir_offset0: 0x0
RIRILV1OFFSET_0_MC_MAIN_REG
rir_rnk_tgt0: 0x0 rir_offset0: 0x0
RIRILV2OFFSET_0_MC_MAIN_REG
rir_rnk_tgt0: 0x0 rir_offset0: 0x0
RIRILV3OFFSET_0_MC_MAIN_REG
rir_rnk_tgt0: 0x0 rir_offset0: 0x0
RIRILV4OFFSET_0_MC_MAIN_REG
rir_rnk_tgt0: 0x0 rir_offset0: 0x0
RIRILV5OFFSET_0_MC_MAIN_REG
rir_rnk_tgt0: 0x0 rir_offset0: 0x0
RIRILV6OFFSET_0_MC_MAIN_REG
rir_rnk_tgt0: 0x0 rir_offset0: 0x0
RIRILV7OFFSET_0_MC_MAIN_REG
rir_rnk_tgt0: 0x0 rir_offset0: 0x0
RIRWAYNESSLIMIT_1_MC_MAIN_REG
rir_val: 0 rir_limit: 0x1F rir_way: 0x0
RIRILV0OFFSET_1_MC_MAIN_REG
rir_rnk_tgt0: 0x0 rir_offset0: 0x0
RIRILV1OFFSET_1_MC_MAIN_REG
rir_rnk_tgt0: 0x0 rir_offset0: 0x0
RIRILV2OFFSET_1_MC_MAIN_REG
rir_rnk_tgt0: 0x0 rir_offset0: 0x0
RIRILV3OFFSET_1_MC_MAIN_REG
rir_rnk_tgt0: 0x0 rir_offset0: 0x0
RIRILV4OFFSET_1_MC_MAIN_REG
rir_rnk_tgt0: 0x0 rir_offset0: 0x0
RIRILV5OFFSET_1_MC_MAIN_REG
rir_rnk_tgt0: 0x0 rir_offset0: 0x0
RIRILV6OFFSET_1_MC_MAIN_REG
rir_rnk_tgt0: 0x0 rir_offset0: 0x0
RIRILV7OFFSET_1_MC_MAIN_REG
rir_rnk_tgt0: 0x0 rir_offset0: 0x0
RIRWAYNESSLIMIT_2_MC_MAIN_REG
rir_val: 0 rir_limit: 0x1F rir_way: 0x0
RIRILV0OFFSET_2_MC_MAIN_REG
rir_rnk_tgt0: 0x0 rir_offset0: 0x0
RIRILV1OFFSET_2_MC_MAIN_REG
rir_rnk_tgt0: 0x0 rir_offset0: 0x0
RIRILV2OFFSET_2_MC_MAIN_REG
rir_rnk_tgt0: 0x0 rir_offset0: 0x0
RIRILV3OFFSET_2_MC_MAIN_REG
rir_rnk_tgt0: 0x0 rir_offset0: 0x0
RIRILV4OFFSET_2_MC_MAIN_REG
rir_rnk_tgt0: 0x0 rir_offset0: 0x0
RIRILV5OFFSET_2_MC_MAIN_REG
rir_rnk_tgt0: 0x0 rir_offset0: 0x0
RIRILV6OFFSET_2_MC_MAIN_REG
rir_rnk_tgt0: 0x0 rir_offset0: 0x0
RIRILV7OFFSET_2_MC_MAIN_REG
rir_rnk_tgt0: 0x0 rir_offset0: 0x0
RIRWAYNESSLIMIT_3_MC_MAIN_REG
rir_val: 0 rir_limit: 0x1F rir_way: 0x0
RIRILV0OFFSET_3_MC_MAIN_REG
rir_rnk_tgt0: 0x0 rir_offset0: 0x0
RIRILV1OFFSET_3_MC_MAIN_REG
rir_rnk_tgt0: 0x0 rir_offset0: 0x0
RIRILV2OFFSET_3_MC_MAIN_REG
rir_rnk_tgt0: 0x0 rir_offset0: 0x0
RIRILV3OFFSET_3_MC_MAIN_REG
rir_rnk_tgt0: 0x0 rir_offset0: 0x0
RIRILV4OFFSET_3_MC_MAIN_REG
rir_rnk_tgt0: 0x0 rir_offset0: 0x0
RIRILV5OFFSET_3_MC_MAIN_REG
rir_rnk_tgt0: 0x0 rir_offset0: 0x0
RIRILV6OFFSET_3_MC_MAIN_REG
rir_rnk_tgt0: 0x0 rir_offset0: 0x0
RIRILV7OFFSET_3_MC_MAIN_REG
rir_rnk_tgt0: 0x0 rir_offset0: 0x0
Channel - 4
RIRWAYNESSLIMIT_0_MC_MAIN_REG
rir_val: 1 rir_limit: 0x1F rir_way: 0x0
RIRILV0OFFSET_0_MC_MAIN_REG
rir_rnk_tgt0: 0x0 rir_offset0: 0x0
RIRILV1OFFSET_0_MC_MAIN_REG
rir_rnk_tgt0: 0x0 rir_offset0: 0x0
RIRILV2OFFSET_0_MC_MAIN_REG
rir_rnk_tgt0: 0x0 rir_offset0: 0x0
RIRILV3OFFSET_0_MC_MAIN_REG
rir_rnk_tgt0: 0x0 rir_offset0: 0x0
RIRILV4OFFSET_0_MC_MAIN_REG
rir_rnk_tgt0: 0x0 rir_offset0: 0x0
RIRILV5OFFSET_0_MC_MAIN_REG
rir_rnk_tgt0: 0x0 rir_offset0: 0x0
RIRILV6OFFSET_0_MC_MAIN_REG
rir_rnk_tgt0: 0x0 rir_offset0: 0x0
RIRILV7OFFSET_0_MC_MAIN_REG
rir_rnk_tgt0: 0x0 rir_offset0: 0x0
RIRWAYNESSLIMIT_1_MC_MAIN_REG
rir_val: 0 rir_limit: 0x1F rir_way: 0x0
RIRILV0OFFSET_1_MC_MAIN_REG
rir_rnk_tgt0: 0x0 rir_offset0: 0x0
RIRILV1OFFSET_1_MC_MAIN_REG
rir_rnk_tgt0: 0x0 rir_offset0: 0x0
RIRILV2OFFSET_1_MC_MAIN_REG
rir_rnk_tgt0: 0x0 rir_offset0: 0x0
RIRILV3OFFSET_1_MC_MAIN_REG
rir_rnk_tgt0: 0x0 rir_offset0: 0x0
RIRILV4OFFSET_1_MC_MAIN_REG
rir_rnk_tgt0: 0x0 rir_offset0: 0x0
RIRILV5OFFSET_1_MC_MAIN_REG
rir_rnk_tgt0: 0x0 rir_offset0: 0x0
RIRILV6OFFSET_1_MC_MAIN_REG
rir_rnk_tgt0: 0x0 rir_offset0: 0x0
RIRILV7OFFSET_1_MC_MAIN_REG
rir_rnk_tgt0: 0x0 rir_offset0: 0x0
RIRWAYNESSLIMIT_2_MC_MAIN_REG
rir_val: 0 rir_limit: 0x1F rir_way: 0x0
RIRILV0OFFSET_2_MC_MAIN_REG
rir_rnk_tgt0: 0x0 rir_offset0: 0x0
RIRILV1OFFSET_2_MC_MAIN_REG
rir_rnk_tgt0: 0x0 rir_offset0: 0x0
RIRILV2OFFSET_2_MC_MAIN_REG
rir_rnk_tgt0: 0x0 rir_offset0: 0x0
RIRILV3OFFSET_2_MC_MAIN_REG
rir_rnk_tgt0: 0x0 rir_offset0: 0x0
RIRILV4OFFSET_2_MC_MAIN_REG
rir_rnk_tgt0: 0x0 rir_offset0: 0x0
RIRILV5OFFSET_2_MC_MAIN_REG
rir_rnk_tgt0: 0x0 rir_offset0: 0x0
RIRILV6OFFSET_2_MC_MAIN_REG
rir_rnk_tgt0: 0x0 rir_offset0: 0x0
RIRILV7OFFSET_2_MC_MAIN_REG
rir_rnk_tgt0: 0x0 rir_offset0: 0x0
RIRWAYNESSLIMIT_3_MC_MAIN_REG
rir_val: 0 rir_limit: 0x1F rir_way: 0x0
RIRILV0OFFSET_3_MC_MAIN_REG
rir_rnk_tgt0: 0x0 rir_offset0: 0x0
RIRILV1OFFSET_3_MC_MAIN_REG
rir_rnk_tgt0: 0x0 rir_offset0: 0x0
RIRILV2OFFSET_3_MC_MAIN_REG
rir_rnk_tgt0: 0x0 rir_offset0: 0x0
RIRILV3OFFSET_3_MC_MAIN_REG
rir_rnk_tgt0: 0x0 rir_offset0: 0x0
RIRILV4OFFSET_3_MC_MAIN_REG
rir_rnk_tgt0: 0x0 rir_offset0: 0x0
RIRILV5OFFSET_3_MC_MAIN_REG
rir_rnk_tgt0: 0x0 rir_offset0: 0x0
RIRILV6OFFSET_3_MC_MAIN_REG
rir_rnk_tgt0: 0x0 rir_offset0: 0x0
RIRILV7OFFSET_3_MC_MAIN_REG
rir_rnk_tgt0: 0x0 rir_offset0: 0x0
Channel - 6
RIRWAYNESSLIMIT_0_MC_MAIN_REG
rir_val: 1 rir_limit: 0x1F rir_way: 0x0
RIRILV0OFFSET_0_MC_MAIN_REG
rir_rnk_tgt0: 0x0 rir_offset0: 0x0
RIRILV1OFFSET_0_MC_MAIN_REG
rir_rnk_tgt0: 0x0 rir_offset0: 0x0
RIRILV2OFFSET_0_MC_MAIN_REG
rir_rnk_tgt0: 0x0 rir_offset0: 0x0
RIRILV3OFFSET_0_MC_MAIN_REG
rir_rnk_tgt0: 0x0 rir_offset0: 0x0
RIRILV4OFFSET_0_MC_MAIN_REG
rir_rnk_tgt0: 0x0 rir_offset0: 0x0
RIRILV5OFFSET_0_MC_MAIN_REG
rir_rnk_tgt0: 0x0 rir_offset0: 0x0
RIRILV6OFFSET_0_MC_MAIN_REG
rir_rnk_tgt0: 0x0 rir_offset0: 0x0
RIRILV7OFFSET_0_MC_MAIN_REG
rir_rnk_tgt0: 0x0 rir_offset0: 0x0
RIRWAYNESSLIMIT_1_MC_MAIN_REG
rir_val: 0 rir_limit: 0x1F rir_way: 0x0
RIRILV0OFFSET_1_MC_MAIN_REG
rir_rnk_tgt0: 0x0 rir_offset0: 0x0
RIRILV1OFFSET_1_MC_MAIN_REG
rir_rnk_tgt0: 0x0 rir_offset0: 0x0
RIRILV2OFFSET_1_MC_MAIN_REG
rir_rnk_tgt0: 0x0 rir_offset0: 0x0
RIRILV3OFFSET_1_MC_MAIN_REG
rir_rnk_tgt0: 0x0 rir_offset0: 0x0
RIRILV4OFFSET_1_MC_MAIN_REG
rir_rnk_tgt0: 0x0 rir_offset0: 0x0
RIRILV5OFFSET_1_MC_MAIN_REG
rir_rnk_tgt0: 0x0 rir_offset0: 0x0
RIRILV6OFFSET_1_MC_MAIN_REG
rir_rnk_tgt0: 0x0 rir_offset0: 0x0
RIRILV7OFFSET_1_MC_MAIN_REG
rir_rnk_tgt0: 0x0 rir_offset0: 0x0
RIRWAYNESSLIMIT_2_MC_MAIN_REG
rir_val: 0 rir_limit: 0x1F rir_way: 0x0
RIRILV0OFFSET_2_MC_MAIN_REG
rir_rnk_tgt0: 0x0 rir_offset0: 0x0
RIRILV1OFFSET_2_MC_MAIN_REG
rir_rnk_tgt0: 0x0 rir_offset0: 0x0
RIRILV2OFFSET_2_MC_MAIN_REG
rir_rnk_tgt0: 0x0 rir_offset0: 0x0
RIRILV3OFFSET_2_MC_MAIN_REG
rir_rnk_tgt0: 0x0 rir_offset0: 0x0
RIRILV4OFFSET_2_MC_MAIN_REG
rir_rnk_tgt0: 0x0 rir_offset0: 0x0
RIRILV5OFFSET_2_MC_MAIN_REG
rir_rnk_tgt0: 0x0 rir_offset0: 0x0
RIRILV6OFFSET_2_MC_MAIN_REG
rir_rnk_tgt0: 0x0 rir_offset0: 0x0
RIRILV7OFFSET_2_MC_MAIN_REG
rir_rnk_tgt0: 0x0 rir_offset0: 0x0
RIRWAYNESSLIMIT_3_MC_MAIN_REG
rir_val: 0 rir_limit: 0x1F rir_way: 0x0
RIRILV0OFFSET_3_MC_MAIN_REG
rir_rnk_tgt0: 0x0 rir_offset0: 0x0
RIRILV1OFFSET_3_MC_MAIN_REG
rir_rnk_tgt0: 0x0 rir_offset0: 0x0
RIRILV2OFFSET_3_MC_MAIN_REG
rir_rnk_tgt0: 0x0 rir_offset0: 0x0
RIRILV3OFFSET_3_MC_MAIN_REG
rir_rnk_tgt0: 0x0 rir_offset0: 0x0
RIRILV4OFFSET_3_MC_MAIN_REG
rir_rnk_tgt0: 0x0 rir_offset0: 0x0
RIRILV5OFFSET_3_MC_MAIN_REG
rir_rnk_tgt0: 0x0 rir_offset0: 0x0
RIRILV6OFFSET_3_MC_MAIN_REG
rir_rnk_tgt0: 0x0 rir_offset0: 0x0
RIRILV7OFFSET_3_MC_MAIN_REG
rir_rnk_tgt0: 0x0 rir_offset0: 0x0
^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^
Write CHA CSRs for Socket: 0
^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^
TWO_LM_CONFIG_CHA_PMA_REG
enable: 0x1 mask: 0x3F mask_hi: 0x0
HA_COH_CHABC_SAD1_REG
dis_spec_rd: 0x0
lowMemBase: 0x0
lowMemSize: 0x20
highMemBase: 0x40
highMemSize: 0xFE0
TOLM: 0x1F
TOHM: 0x101F
C00: CSR for wait4bothhalves bit: AMAP_MC_MAIN_REG: 0x49
C00: CSR for wait4bothhalves bit: AMAP_MC_MAIN_REG: 0x49
C00: CSR for wait4bothhalves bit: AMAP_MC_MAIN_REG: 0x49
C00: CSR for wait4bothhalves bit: AMAP_MC_MAIN_REG: 0x49
Checkpoint Code: Socket 0, 0xBB, 0x06, 0x0001
^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^
Write CHA Remote SAD CSRs for Socket: 1
^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^
En Base Limit NodeId Attr
1 0x00000 0x0081F 0x0 0x3
^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^
Write CHA SAD CSRs for Socket: 1
^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^
CHA unlock DRAM cluster 0 snc_lock bits: 0xE
Program Channel Interleaves
rt0_interleave_mode: 7
rt1_interleave_shift: 7
rt2_interleave_shift: 2
Program CSRs for SAD Rule 0 (HBM 2LM DDR)
En Limit Mode Attr NMCacheable
1 0x00A1F 0x1 0x3 1
Interleave List: 0x0000000088888888
Single Target: H0 Index 0
DRAM_RULE_CFG2: cxl_accelerator_mem Durable_mem_en cxl_mem_expander NXM
0 0 0 0
TgtRt: 00 ChnRt: 00
Program target config: 00000000
Program channel config: 00000000
Program Mode config.
H0 DramRt0Mode0Cfg: 00000006
H0 DramRt0Mode1Cfg: 00000000
H1 DramRt0Mode0Cfg: 00000000
H1 DramRt0Mode1Cfg: 00000000
H0 DramRt1Mode0Cfg: 00000000
H0 DramRt1Mode1Cfg: 00000000
H1 DramRt1Mode0Cfg: 00000000
H1 DramRt1Mode1Cfg: 00000000
H0 DramRt2Mode0Cfg: 00000000
H0 DramRt2Mode1Cfg: 00000000
H1 DramRt2Mode0Cfg: 00000000
H1 DramRt2Mode1Cfg: 00000000
CHA unlock DRAM cluster 1 snc_lock bits: 0xD
Program Channel Interleaves
rt0_interleave_mode: 7
rt1_interleave_shift: 7
rt2_interleave_shift: 2
Program CSRs for SAD Rule 0 (HBM 2LM DDR)
En Limit Mode Attr NMCacheable
1 0x00C1F 0x1 0x3 1
Interleave List: 0x0000000088888888
Single Target: H0 Index 0
DRAM_RULE_CFG2: cxl_accelerator_mem Durable_mem_en cxl_mem_expander NXM
0 0 0 0
TgtRt: 00 ChnRt: 00
Program target config: 00000000
Program channel config: 00000000
Program Mode config.
H0 DramRt0Mode0Cfg: 00000006
H0 DramRt0Mode1Cfg: 00000000
H1 DramRt0Mode0Cfg: 00000000
H1 DramRt0Mode1Cfg: 00000000
H0 DramRt1Mode0Cfg: 00000000
H0 DramRt1Mode1Cfg: 00000000
H1 DramRt1Mode0Cfg: 00000000
H1 DramRt1Mode1Cfg: 00000000
H0 DramRt2Mode0Cfg: 00000000
H0 DramRt2Mode1Cfg: 00000000
H1 DramRt2Mode0Cfg: 00000000
H1 DramRt2Mode1Cfg: 00000000
CHA unlock DRAM cluster 2 snc_lock bits: 0xB
Program Channel Interleaves
rt0_interleave_mode: 7
rt1_interleave_shift: 7
rt2_interleave_shift: 2
Program CSRs for SAD Rule 0 (HBM 2LM DDR)
En Limit Mode Attr NMCacheable
1 0x00E1F 0x1 0x3 1
Interleave List: 0x0000000088888888
Single Target: H0 Index 0
DRAM_RULE_CFG2: cxl_accelerator_mem Durable_mem_en cxl_mem_expander NXM
0 0 0 0
TgtRt: 00 ChnRt: 00
Program target config: 00000000
Program channel config: 00000000
Program Mode config.
H0 DramRt0Mode0Cfg: 00000006
H0 DramRt0Mode1Cfg: 00000000
H1 DramRt0Mode0Cfg: 00000000
H1 DramRt0Mode1Cfg: 00000000
H0 DramRt1Mode0Cfg: 00000000
H0 DramRt1Mode1Cfg: 00000000
H1 DramRt1Mode0Cfg: 00000000
H1 DramRt1Mode1Cfg: 00000000
H0 DramRt2Mode0Cfg: 00000000
H0 DramRt2Mode1Cfg: 00000000
H1 DramRt2Mode0Cfg: 00000000
H1 DramRt2Mode1Cfg: 00000000
CHA unlock DRAM cluster 3 snc_lock bits: 0x7
Program Channel Interleaves
rt0_interleave_mode: 7
rt1_interleave_shift: 7
rt2_interleave_shift: 2
Program CSRs for SAD Rule 0 (HBM 2LM DDR)
En Limit Mode Attr NMCacheable
1 0x0101F 0x1 0x3 1
Interleave List: 0x0000000088888888
Single Target: H0 Index 0
DRAM_RULE_CFG2: cxl_accelerator_mem Durable_mem_en cxl_mem_expander NXM
0 0 0 0
TgtRt: 00 ChnRt: 00
Program target config: 00000000
Program channel config: 00000000
Program Mode config.
H0 DramRt0Mode0Cfg: 00000006
H0 DramRt0Mode1Cfg: 00000000
H1 DramRt0Mode0Cfg: 00000000
H1 DramRt0Mode1Cfg: 00000000
H0 DramRt1Mode0Cfg: 00000000
H0 DramRt1Mode1Cfg: 00000000
H1 DramRt1Mode0Cfg: 00000000
H1 DramRt1Mode1Cfg: 00000000
H0 DramRt2Mode0Cfg: 00000000
H0 DramRt2Mode1Cfg: 00000000
H1 DramRt2Mode0Cfg: 00000000
H1 DramRt2Mode1Cfg: 00000000
CHA lock all DRAM clusters snc_lock bits: 0xF
^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^
Write Route Table CSRs for Socket: 1
^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^
CSR: Cluster 0 H0_CH_ROUTE_TABLE_0 - 0x0 0x1 0x0 0x1 0x0 0x1 0x0 0x1
CSR: Cluster 0 H0_TGT_ROUTE_TABLE_0 - 0x4 0x4 0x5 0x5 0x6 0x6 0x7 0x7
CSR: Cluster 0 H1_CH_ROUTE_TABLE_0 - 0x0 0x0 0x0 0x0 0x0 0x0 0x0 0x0
CSR: Cluster 0 H1_TGT_ROUTE_TABLE_0 - 0x0 0x0 0x0 0x0 0x0 0x0 0x0 0x0
CSR: Cluster 1 H0_CH_ROUTE_TABLE_0 - 0x0 0x1 0x0 0x1 0x0 0x1 0x0 0x1
CSR: Cluster 1 H0_TGT_ROUTE_TABLE_0 - 0x4 0x4 0x5 0x5 0x6 0x6 0x7 0x7
CSR: Cluster 1 H1_CH_ROUTE_TABLE_0 - 0x0 0x0 0x0 0x0 0x0 0x0 0x0 0x0
CSR: Cluster 1 H1_TGT_ROUTE_TABLE_0 - 0x0 0x0 0x0 0x0 0x0 0x0 0x0 0x0
CSR: Cluster 2 H0_CH_ROUTE_TABLE_0 - 0x0 0x1 0x0 0x1 0x0 0x1 0x0 0x1
CSR: Cluster 2 H0_TGT_ROUTE_TABLE_0 - 0x7 0x7 0x6 0x6 0x5 0x5 0x4 0x4
CSR: Cluster 2 H1_CH_ROUTE_TABLE_0 - 0x0 0x0 0x0 0x0 0x0 0x0 0x0 0x0
CSR: Cluster 2 H1_TGT_ROUTE_TABLE_0 - 0x0 0x0 0x0 0x0 0x0 0x0 0x0 0x0
CSR: Cluster 3 H0_CH_ROUTE_TABLE_0 - 0x0 0x1 0x0 0x1 0x0 0x1 0x0 0x1
CSR: Cluster 3 H0_TGT_ROUTE_TABLE_0 - 0x7 0x7 0x6 0x6 0x5 0x5 0x4 0x4
CSR: Cluster 3 H1_CH_ROUTE_TABLE_0 - 0x0 0x0 0x0 0x0 0x0 0x0 0x0 0x0
CSR: Cluster 3 H1_TGT_ROUTE_TABLE_0 - 0x0 0x0 0x0 0x0 0x0 0x0 0x0 0x0
^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^
Write MESH2MEM CSRs for Socket: 1
^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^
Memory Controller : 0
------------------------
DEFEATURES0_M2MEM_MAIN_REG
wrcmpfromnm: 1
MODE_M2MEM_MAIN_REG
nmcaching:0x1 pmem:0x0 blockregion:0x0 in-tile caching: 0x1
Memory Controller : 1
------------------------
DEFEATURES0_M2MEM_MAIN_REG
wrcmpfromnm: 1
MODE_M2MEM_MAIN_REG
nmcaching:0x1 pmem:0x0 blockregion:0x0 in-tile caching: 0x1
Memory Controller : 2
------------------------
DEFEATURES0_M2MEM_MAIN_REG
wrcmpfromnm: 1
MODE_M2MEM_MAIN_REG
nmcaching:0x1 pmem:0x0 blockregion:0x0 in-tile caching: 0x1
Memory Controller : 3
------------------------
DEFEATURES0_M2MEM_MAIN_REG
wrcmpfromnm: 1
MODE_M2MEM_MAIN_REG
nmcaching:0x1 pmem:0x0 blockregion:0x0 in-tile caching: 0x1
MC: 0
tadid:0x0 tadvld:0x1 pmemvld:0x0 blkvld:0x0 ddr4tadid:0x0 ddrttadid:0x0 ddr4:0x1 nmcacheablevld:0x0 mirror:0x0 secondary1st:0x0 frcnpwr:0x0 spare:0x0 addresslimit[51:26]:0xA1F nonpersistentfm:0x1
MC: 1
tadid:0x0 tadvld:0x1 pmemvld:0x0 blkvld:0x0 ddr4tadid:0x0 ddrttadid:0x0 ddr4:0x1 nmcacheablevld:0x0 mirror:0x0 secondary1st:0x0 frcnpwr:0x0 spare:0x0 addresslimit[51:26]:0xC1F nonpersistentfm:0x1
MC: 2
tadid:0x0 tadvld:0x1 pmemvld:0x0 blkvld:0x0 ddr4tadid:0x0 ddrttadid:0x0 ddr4:0x1 nmcacheablevld:0x0 mirror:0x0 secondary1st:0x0 frcnpwr:0x0 spare:0x0 addresslimit[51:26]:0xE1F nonpersistentfm:0x1
MC: 3
tadid:0x0 tadvld:0x1 pmemvld:0x0 blkvld:0x0 ddr4tadid:0x0 ddrttadid:0x0 ddr4:0x1 nmcacheablevld:0x0 mirror:0x0 secondary1st:0x0 frcnpwr:0x0 spare:0x0 addresslimit[51:26]:0x101F nonpersistentfm:0x1
Programs feature registers for MC 0
Programs feature registers for MC 1
Programs feature registers for MC 2
Programs feature registers for MC 3
^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^
Write HBM MESH2MEM CSRs for Socket: 1
^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^
HBM Stack: 0
Mesh2Mem misc: nmcaching: 1 wrcmpfromnm: 1
Mesh2Mem TAD: tadid:0x0 ddrtadid:0x0 nmcacheablevld:0x1 addresslimit[51:26]:0xA1F
HBM Stack: 1
Mesh2Mem misc: nmcaching: 1 wrcmpfromnm: 1
Mesh2Mem TAD: tadid:0x0 ddrtadid:0x0 nmcacheablevld:0x1 addresslimit[51:26]:0xC1F
HBM Stack: 2
Mesh2Mem misc: nmcaching: 1 wrcmpfromnm: 1
Mesh2Mem TAD: tadid:0x0 ddrtadid:0x0 nmcacheablevld:0x1 addresslimit[51:26]:0xE1F
HBM Stack: 3
Mesh2Mem misc: nmcaching: 1 wrcmpfromnm: 1
Mesh2Mem TAD: tadid:0x0 ddrtadid:0x0 nmcacheablevld:0x1 addresslimit[51:26]:0x101F
Programs feature registers for MC 0
N1.C00: CSR : SYSFEATURES0_MC_2LM_REG: 0x10
N1.C01: CSR : SYSFEATURES0_MC_2LM_REG: 0x10
Programs feature registers for MC 1
N1.C00: CSR : SYSFEATURES0_MC_2LM_REG: 0x10
N1.C01: CSR : SYSFEATURES0_MC_2LM_REG: 0x10
Programs feature registers for MC 2
N1.C00: CSR : SYSFEATURES0_MC_2LM_REG: 0x10
N1.C01: CSR : SYSFEATURES0_MC_2LM_REG: 0x10
Programs feature registers for MC 3
N1.C00: CSR : SYSFEATURES0_MC_2LM_REG: 0x10
N1.C01: CSR : SYSFEATURES0_MC_2LM_REG: 0x10
Programs feature registers for MC 4
N1.C00: CSR : SYSFEATURES0_MC_2LM_REG: 0x10
N1.C01: CSR : SYSFEATURES0_MC_2LM_REG: 0x10
Programs feature registers for MC 5
N1.C00: CSR : SYSFEATURES0_MC_2LM_REG: 0x10
N1.C01: CSR : SYSFEATURES0_MC_2LM_REG: 0x10
Programs feature registers for MC 6
N1.C00: CSR : SYSFEATURES0_MC_2LM_REG: 0x10
N1.C01: CSR : SYSFEATURES0_MC_2LM_REG: 0x10
Programs feature registers for MC 7
N1.C00: CSR : SYSFEATURES0_MC_2LM_REG: 0x10
N1.C01: CSR : SYSFEATURES0_MC_2LM_REG: 0x10
Programs feature registers for MC 8
N1.C00: CSR : SYSFEATURES0_MC_2LM_REG: 0x10
N1.C01: CSR : SYSFEATURES0_MC_2LM_REG: 0x10
Programs feature registers for MC 9
N1.C00: CSR : SYSFEATURES0_MC_2LM_REG: 0x10
N1.C01: CSR : SYSFEATURES0_MC_2LM_REG: 0x10
Programs feature registers for MC 10
N1.C00: CSR : SYSFEATURES0_MC_2LM_REG: 0x10
N1.C01: CSR : SYSFEATURES0_MC_2LM_REG: 0x10
Programs feature registers for MC 11
N1.C00: CSR : SYSFEATURES0_MC_2LM_REG: 0x10
N1.C01: CSR : SYSFEATURES0_MC_2LM_REG: 0x10
Programs feature registers for MC 12
N1.C00: CSR : SYSFEATURES0_MC_2LM_REG: 0x10
N1.C01: CSR : SYSFEATURES0_MC_2LM_REG: 0x10
Programs feature registers for MC 13
N1.C00: CSR : SYSFEATURES0_MC_2LM_REG: 0x10
N1.C01: CSR : SYSFEATURES0_MC_2LM_REG: 0x10
Programs feature registers for MC 14
N1.C00: CSR : SYSFEATURES0_MC_2LM_REG: 0x10
N1.C01: CSR : SYSFEATURES0_MC_2LM_REG: 0x10
Programs feature registers for MC 15
N1.C00: CSR : SYSFEATURES0_MC_2LM_REG: 0x10
N1.C01: CSR : SYSFEATURES0_MC_2LM_REG: 0x10
Checkpoint Code: Socket 0, 0xBB, 0x07, 0x0001
^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^
Write TAD CSRs for Socket: 1
^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^
Write Patrol and Sparing CSR's for MC 0
C00: TADWAYNESS[0]:
target_lid: 0 chn_lid: 0 tad_limit: 0xA1F
C00: TADBASE[0]:
mirror_en: 0 en_failover: 0 ign_ptrl_uc: 0 base: 0x820
NM_DRAM_RULE[0]:
rule_enable: 1 limit: 0xA1F nm_chn_ways: 0 nm_chn_gran: 1 nm_target_ways: 0 nm_gran_eq: 0 nm_chn_l2pid: 0x00FFFFF8
Logical Ch Id: 0 1 2 3 4 5 6 7
Physical Ch Id: 0 7 7 7 7 7 7 7
C00: NM_DRAM_RULE[0]:
Write 1LM Decoder CSR's for MC 0
C00: TADCHNILVOFFSET[0]:
target_ways: 0 chn_ways: 0 target_gran: 1 chn_gran: 1 tad_offset: 0x820 tad_offset_sign: 0
C00: MCNMCACHINGCFG:
mcnmcachingenb: 0 mcpmemenb: 0 mcnmcachingpmemwt: 0
C01: MCNMCACHINGCFG:
mcnmcachingenb: 0 mcpmemenb: 0 mcnmcachingpmemwt: 0
Write Patrol and Sparing CSR's for MC 1
C00: TADWAYNESS[0]:
target_lid: 0 chn_lid: 0 tad_limit: 0xC1F
C00: TADBASE[0]:
mirror_en: 0 en_failover: 0 ign_ptrl_uc: 0 base: 0xA20
NM_DRAM_RULE[0]:
rule_enable: 1 limit: 0xC1F nm_chn_ways: 0 nm_chn_gran: 1 nm_target_ways: 0 nm_gran_eq: 0 nm_chn_l2pid: 0x00FFFFF8
Logical Ch Id: 0 1 2 3 4 5 6 7
Physical Ch Id: 0 7 7 7 7 7 7 7
C00: NM_DRAM_RULE[0]:
Write 1LM Decoder CSR's for MC 1
C00: TADCHNILVOFFSET[0]:
target_ways: 0 chn_ways: 0 target_gran: 1 chn_gran: 1 tad_offset: 0xA20 tad_offset_sign: 0
C00: MCNMCACHINGCFG:
mcnmcachingenb: 0 mcpmemenb: 0 mcnmcachingpmemwt: 0
C01: MCNMCACHINGCFG:
mcnmcachingenb: 0 mcpmemenb: 0 mcnmcachingpmemwt: 0
Write Patrol and Sparing CSR's for MC 2
C00: TADWAYNESS[0]:
target_lid: 0 chn_lid: 0 tad_limit: 0xE1F
C00: TADBASE[0]:
mirror_en: 0 en_failover: 0 ign_ptrl_uc: 0 base: 0xC20
NM_DRAM_RULE[0]:
rule_enable: 1 limit: 0xE1F nm_chn_ways: 0 nm_chn_gran: 1 nm_target_ways: 0 nm_gran_eq: 0 nm_chn_l2pid: 0x00FFFFF8
Logical Ch Id: 0 1 2 3 4 5 6 7
Physical Ch Id: 0 7 7 7 7 7 7 7
C00: NM_DRAM_RULE[0]:
Write 1LM Decoder CSR's for MC 2
C00: TADCHNILVOFFSET[0]:
target_ways: 0 chn_ways: 0 target_gran: 1 chn_gran: 1 tad_offset: 0xC20 tad_offset_sign: 0
C00: MCNMCACHINGCFG:
mcnmcachingenb: 0 mcpmemenb: 0 mcnmcachingpmemwt: 0
C01: MCNMCACHINGCFG:
mcnmcachingenb: 0 mcpmemenb: 0 mcnmcachingpmemwt: 0
Write Patrol and Sparing CSR's for MC 3
C00: TADWAYNESS[0]:
target_lid: 0 chn_lid: 0 tad_limit: 0x101F
C00: TADBASE[0]:
mirror_en: 0 en_failover: 0 ign_ptrl_uc: 0 base: 0xE20
NM_DRAM_RULE[0]:
rule_enable: 1 limit: 0x101F nm_chn_ways: 0 nm_chn_gran: 1 nm_target_ways: 0 nm_gran_eq: 0 nm_chn_l2pid: 0x00FFFFF8
Logical Ch Id: 0 1 2 3 4 5 6 7
Physical Ch Id: 0 7 7 7 7 7 7 7
C00: NM_DRAM_RULE[0]:
Write 1LM Decoder CSR's for MC 3
C00: TADCHNILVOFFSET[0]:
target_ways: 0 chn_ways: 0 target_gran: 1 chn_gran: 1 tad_offset: 0xE20 tad_offset_sign: 0
C00: MCNMCACHINGCFG:
mcnmcachingenb: 0 mcpmemenb: 0 mcnmcachingpmemwt: 0
C01: MCNMCACHINGCFG:
mcnmcachingenb: 0 mcpmemenb: 0 mcnmcachingpmemwt: 0
Write Patrol and Sparing TAD range CSR's for HBM Stack 0 MC 0
C00: TADWAYNESS[0]:
target_lid: 0 chn_lid: 0 tad_limit: 0x1F
C00: TADBASE[0]:
mirror_en: 0 en_failover: 0 ign_ptrl_uc: 0 base: 0x0
C01: TADWAYNESS[0]:
target_lid: 0 chn_lid: 1 tad_limit: 0x1F
C01: TADBASE[0]:
mirror_en: 0 en_failover: 0 ign_ptrl_uc: 0 base: 0x0
Write Patrol and Sparing TAD range CSR's for HBM Stack 0 MC 1
C00: TADWAYNESS[0]:
target_lid: 0 chn_lid: 2 tad_limit: 0x1F
C00: TADBASE[0]:
mirror_en: 0 en_failover: 0 ign_ptrl_uc: 0 base: 0x0
C01: TADWAYNESS[0]:
target_lid: 0 chn_lid: 3 tad_limit: 0x1F
C01: TADBASE[0]:
mirror_en: 0 en_failover: 0 ign_ptrl_uc: 0 base: 0x0
Write Patrol and Sparing TAD range CSR's for HBM Stack 0 MC 2
C00: TADWAYNESS[0]:
target_lid: 0 chn_lid: 4 tad_limit: 0x1F
C00: TADBASE[0]:
mirror_en: 0 en_failover: 0 ign_ptrl_uc: 0 base: 0x0
C01: TADWAYNESS[0]:
target_lid: 0 chn_lid: 5 tad_limit: 0x1F
C01: TADBASE[0]:
mirror_en: 0 en_failover: 0 ign_ptrl_uc: 0 base: 0x0
Write Patrol and Sparing TAD range CSR's for HBM Stack 0 MC 3
C00: TADWAYNESS[0]:
target_lid: 0 chn_lid: 6 tad_limit: 0x1F
C00: TADBASE[0]:
mirror_en: 0 en_failover: 0 ign_ptrl_uc: 0 base: 0x0
C01: TADWAYNESS[0]:
target_lid: 0 chn_lid: 7 tad_limit: 0x1F
C01: TADBASE[0]:
mirror_en: 0 en_failover: 0 ign_ptrl_uc: 0 base: 0x0
Write Hbm Nm Caching Tad CSR's for HBM Stack 0 MC 0
C00: MCNMCACHINGCFG 2LM TAD:
nmcachingtaden: 1 nmcachingtad: 0
C01: MCNMCACHINGCFG 2LM TAD:
nmcachingtaden: 1 nmcachingtad: 0
Write Hbm Nm Caching Tad CSR's for HBM Stack 0 MC 1
C00: MCNMCACHINGCFG 2LM TAD:
nmcachingtaden: 1 nmcachingtad: 0
C01: MCNMCACHINGCFG 2LM TAD:
nmcachingtaden: 1 nmcachingtad: 0
Write Hbm Nm Caching Tad CSR's for HBM Stack 0 MC 2
C00: MCNMCACHINGCFG 2LM TAD:
nmcachingtaden: 1 nmcachingtad: 0
C01: MCNMCACHINGCFG 2LM TAD:
nmcachingtaden: 1 nmcachingtad: 0
Write Hbm Nm Caching Tad CSR's for HBM Stack 0 MC 3
C00: MCNMCACHINGCFG 2LM TAD:
nmcachingtaden: 1 nmcachingtad: 0
C01: MCNMCACHINGCFG 2LM TAD:
nmcachingtaden: 1 nmcachingtad: 0
Write 1LM Decoder CSR's for HBM Stack 0 MC 0
C00: TADCHNILVOFFSET[0]:
target_ways: 0 chn_ways: 0 target_gran: 1 chn_gran: 1 tad_offset: 0x0 tad_offset_sign: 0
C01: TADCHNILVOFFSET[0]:
target_ways: 0 chn_ways: 0 target_gran: 1 chn_gran: 1 tad_offset: 0x0 tad_offset_sign: 0
Write 1LM Decoder CSR's for HBM Stack 0 MC 1
C00: TADCHNILVOFFSET[0]:
target_ways: 0 chn_ways: 0 target_gran: 1 chn_gran: 1 tad_offset: 0x0 tad_offset_sign: 0
C01: TADCHNILVOFFSET[0]:
target_ways: 0 chn_ways: 0 target_gran: 1 chn_gran: 1 tad_offset: 0x0 tad_offset_sign: 0
Write 1LM Decoder CSR's for HBM Stack 0 MC 2
C00: TADCHNILVOFFSET[0]:
target_ways: 0 chn_ways: 0 target_gran: 1 chn_gran: 1 tad_offset: 0x0 tad_offset_sign: 0
C01: TADCHNILVOFFSET[0]:
target_ways: 0 chn_ways: 0 target_gran: 1 chn_gran: 1 tad_offset: 0x0 tad_offset_sign: 0
Write 1LM Decoder CSR's for HBM Stack 0 MC 3
C00: TADCHNILVOFFSET[0]:
target_ways: 0 chn_ways: 0 target_gran: 1 chn_gran: 1 tad_offset: 0x0 tad_offset_sign: 0
C01: TADCHNILVOFFSET[0]:
target_ways: 0 chn_ways: 0 target_gran: 1 chn_gran: 1 tad_offset: 0x0 tad_offset_sign: 0
Write MCNMCACHINGCFG for HBM Stack 0 MC 0
C00: MCNMCACHINGCFG:
mcnmcachingenb: 1 mcpmemenb: 0 mcnmcachingpmemwt: 0
C01: MCNMCACHINGCFG:
mcnmcachingenb: 1 mcpmemenb: 0 mcnmcachingpmemwt: 0
Write MCNMCACHINGCFG for HBM Stack 0 MC 1
C00: MCNMCACHINGCFG:
mcnmcachingenb: 1 mcpmemenb: 0 mcnmcachingpmemwt: 0
C01: MCNMCACHINGCFG:
mcnmcachingenb: 1 mcpmemenb: 0 mcnmcachingpmemwt: 0
Write MCNMCACHINGCFG for HBM Stack 0 MC 2
C00: MCNMCACHINGCFG:
mcnmcachingenb: 1 mcpmemenb: 0 mcnmcachingpmemwt: 0
C01: MCNMCACHINGCFG:
mcnmcachingenb: 1 mcpmemenb: 0 mcnmcachingpmemwt: 0
Write MCNMCACHINGCFG for HBM Stack 0 MC 3
C00: MCNMCACHINGCFG:
mcnmcachingenb: 1 mcpmemenb: 0 mcnmcachingpmemwt: 0
C01: MCNMCACHINGCFG:
mcnmcachingenb: 1 mcpmemenb: 0 mcnmcachingpmemwt: 0
Write 2LM NM Decoder CSR's for HBM Stack 0 MC 0
C00: CSR for force_lat bit : AMAP_MC_MAIN_REG: 0x52
C00: MCNMCACHINGINTLV:
nm_target_ways: 0 nm_chn_ways: 3 nm_target_lid: 0 nm_target_gran: 1 nm_chn_gran: 1 nm_chn_lid: 0
C00: MCNMCACHINGCFG_MC_2LM_REG:
en_2way: 0 prefer_way_sel: 0 chn_cap: 0xB nm_ratio_chn_cap: 0
C00: MCNMCACHINGOFFSET:
mcnmcachingoffsetlower: 0x2 mcnmcachingoffset: 0x4 mcnmcachingoffseten: 1
C01: CSR for force_lat bit : AMAP_MC_MAIN_REG: 0x52
C01: MCNMCACHINGINTLV:
nm_target_ways: 0 nm_chn_ways: 3 nm_target_lid: 0 nm_target_gran: 1 nm_chn_gran: 1 nm_chn_lid: 1
C01: MCNMCACHINGCFG_MC_2LM_REG:
en_2way: 0 prefer_way_sel: 0 chn_cap: 0xB nm_ratio_chn_cap: 0
C01: MCNMCACHINGOFFSET:
mcnmcachingoffsetlower: 0x2 mcnmcachingoffset: 0x4 mcnmcachingoffseten: 1
Write 2LM NM Decoder CSR's for HBM Stack 0 MC 1
C00: CSR for force_lat bit : AMAP_MC_MAIN_REG: 0x52
C00: MCNMCACHINGINTLV:
nm_target_ways: 0 nm_chn_ways: 3 nm_target_lid: 0 nm_target_gran: 1 nm_chn_gran: 1 nm_chn_lid: 2
C00: MCNMCACHINGCFG_MC_2LM_REG:
en_2way: 0 prefer_way_sel: 0 chn_cap: 0xB nm_ratio_chn_cap: 0
C00: MCNMCACHINGOFFSET:
mcnmcachingoffsetlower: 0x2 mcnmcachingoffset: 0x4 mcnmcachingoffseten: 1
C01: CSR for force_lat bit : AMAP_MC_MAIN_REG: 0x52
C01: MCNMCACHINGINTLV:
nm_target_ways: 0 nm_chn_ways: 3 nm_target_lid: 0 nm_target_gran: 1 nm_chn_gran: 1 nm_chn_lid: 3
C01: MCNMCACHINGCFG_MC_2LM_REG:
en_2way: 0 prefer_way_sel: 0 chn_cap: 0xB nm_ratio_chn_cap: 0
C01: MCNMCACHINGOFFSET:
mcnmcachingoffsetlower: 0x2 mcnmcachingoffset: 0x4 mcnmcachingoffseten: 1
Write 2LM NM Decoder CSR's for HBM Stack 0 MC 2
C00: CSR for force_lat bit : AMAP_MC_MAIN_REG: 0x52
C00: MCNMCACHINGINTLV:
nm_target_ways: 0 nm_chn_ways: 3 nm_target_lid: 0 nm_target_gran: 1 nm_chn_gran: 1 nm_chn_lid: 4
C00: MCNMCACHINGCFG_MC_2LM_REG:
en_2way: 0 prefer_way_sel: 0 chn_cap: 0xB nm_ratio_chn_cap: 0
C00: MCNMCACHINGOFFSET:
mcnmcachingoffsetlower: 0x2 mcnmcachingoffset: 0x4 mcnmcachingoffseten: 1
C01: CSR for force_lat bit : AMAP_MC_MAIN_REG: 0x52
C01: MCNMCACHINGINTLV:
nm_target_ways: 0 nm_chn_ways: 3 nm_target_lid: 0 nm_target_gran: 1 nm_chn_gran: 1 nm_chn_lid: 5
C01: MCNMCACHINGCFG_MC_2LM_REG:
en_2way: 0 prefer_way_sel: 0 chn_cap: 0xB nm_ratio_chn_cap: 0
C01: MCNMCACHINGOFFSET:
mcnmcachingoffsetlower: 0x2 mcnmcachingoffset: 0x4 mcnmcachingoffseten: 1
Write 2LM NM Decoder CSR's for HBM Stack 0 MC 3
C00: CSR for force_lat bit : AMAP_MC_MAIN_REG: 0x52
C00: MCNMCACHINGINTLV:
nm_target_ways: 0 nm_chn_ways: 3 nm_target_lid: 0 nm_target_gran: 1 nm_chn_gran: 1 nm_chn_lid: 6
C00: MCNMCACHINGCFG_MC_2LM_REG:
en_2way: 0 prefer_way_sel: 0 chn_cap: 0xB nm_ratio_chn_cap: 0
C00: MCNMCACHINGOFFSET:
mcnmcachingoffsetlower: 0x2 mcnmcachingoffset: 0x4 mcnmcachingoffseten: 1
C01: CSR for force_lat bit : AMAP_MC_MAIN_REG: 0x52
C01: MCNMCACHINGINTLV:
nm_target_ways: 0 nm_chn_ways: 3 nm_target_lid: 0 nm_target_gran: 1 nm_chn_gran: 1 nm_chn_lid: 7
C01: MCNMCACHINGCFG_MC_2LM_REG:
en_2way: 0 prefer_way_sel: 0 chn_cap: 0xB nm_ratio_chn_cap: 0
C01: MCNMCACHINGOFFSET:
mcnmcachingoffsetlower: 0x2 mcnmcachingoffset: 0x4 mcnmcachingoffseten: 1
Write 2LM FM Decoder CSR's for HBM Stack 0 MC 0 TAD 0
C00: DRAM_RULE[0]:
rule_enable: 1 limit: 0xA1F fm_target: 0 fm_chn_ways: 0 fm_chn_gran: 1 fm_target_ways: 0 fm_gran_eq: 0 fm_chn_l2pid: 0x00000000
C01: DRAM_RULE[0]:
rule_enable: 1 limit: 0xA1F fm_target: 0 fm_chn_ways: 0 fm_chn_gran: 1 fm_target_ways: 0 fm_gran_eq: 0 fm_chn_l2pid: 0x00000000
Write 2LM FM Decoder CSR's for HBM Stack 0 MC 1 TAD 0
C00: DRAM_RULE[0]:
rule_enable: 1 limit: 0xA1F fm_target: 0 fm_chn_ways: 0 fm_chn_gran: 1 fm_target_ways: 0 fm_gran_eq: 0 fm_chn_l2pid: 0x00000000
C01: DRAM_RULE[0]:
rule_enable: 1 limit: 0xA1F fm_target: 0 fm_chn_ways: 0 fm_chn_gran: 1 fm_target_ways: 0 fm_gran_eq: 0 fm_chn_l2pid: 0x00000000
Write 2LM FM Decoder CSR's for HBM Stack 0 MC 2 TAD 0
C00: DRAM_RULE[0]:
rule_enable: 1 limit: 0xA1F fm_target: 0 fm_chn_ways: 0 fm_chn_gran: 1 fm_target_ways: 0 fm_gran_eq: 0 fm_chn_l2pid: 0x00000000
C01: DRAM_RULE[0]:
rule_enable: 1 limit: 0xA1F fm_target: 0 fm_chn_ways: 0 fm_chn_gran: 1 fm_target_ways: 0 fm_gran_eq: 0 fm_chn_l2pid: 0x00000000
Write 2LM FM Decoder CSR's for HBM Stack 0 MC 3 TAD 0
C00: DRAM_RULE[0]:
rule_enable: 1 limit: 0xA1F fm_target: 0 fm_chn_ways: 0 fm_chn_gran: 1 fm_target_ways: 0 fm_gran_eq: 0 fm_chn_l2pid: 0x00000000
C01: DRAM_RULE[0]:
rule_enable: 1 limit: 0xA1F fm_target: 0 fm_chn_ways: 0 fm_chn_gran: 1 fm_target_ways: 0 fm_gran_eq: 0 fm_chn_l2pid: 0x00000000
Write Patrol and Sparing TAD range CSR's for HBM Stack 1 MC 0
C00: TADWAYNESS[0]:
target_lid: 0 chn_lid: 0 tad_limit: 0x1F
C00: TADBASE[0]:
mirror_en: 0 en_failover: 0 ign_ptrl_uc: 0 base: 0x0
C01: TADWAYNESS[0]:
target_lid: 0 chn_lid: 1 tad_limit: 0x1F
C01: TADBASE[0]:
mirror_en: 0 en_failover: 0 ign_ptrl_uc: 0 base: 0x0
Write Patrol and Sparing TAD range CSR's for HBM Stack 1 MC 1
C00: TADWAYNESS[0]:
target_lid: 0 chn_lid: 2 tad_limit: 0x1F
C00: TADBASE[0]:
mirror_en: 0 en_failover: 0 ign_ptrl_uc: 0 base: 0x0
C01: TADWAYNESS[0]:
target_lid: 0 chn_lid: 3 tad_limit: 0x1F
C01: TADBASE[0]:
mirror_en: 0 en_failover: 0 ign_ptrl_uc: 0 base: 0x0
Write Patrol and Sparing TAD range CSR's for HBM Stack 1 MC 2
C00: TADWAYNESS[0]:
target_lid: 0 chn_lid: 4 tad_limit: 0x1F
C00: TADBASE[0]:
mirror_en: 0 en_failover: 0 ign_ptrl_uc: 0 base: 0x0
C01: TADWAYNESS[0]:
target_lid: 0 chn_lid: 5 tad_limit: 0x1F
C01: TADBASE[0]:
mirror_en: 0 en_failover: 0 ign_ptrl_uc: 0 base: 0x0
Write Patrol and Sparing TAD range CSR's for HBM Stack 1 MC 3
C00: TADWAYNESS[0]:
target_lid: 0 chn_lid: 6 tad_limit: 0x1F
C00: TADBASE[0]:
mirror_en: 0 en_failover: 0 ign_ptrl_uc: 0 base: 0x0
C01: TADWAYNESS[0]:
target_lid: 0 chn_lid: 7 tad_limit: 0x1F
C01: TADBASE[0]:
mirror_en: 0 en_failover: 0 ign_ptrl_uc: 0 base: 0x0
Write Hbm Nm Caching Tad CSR's for HBM Stack 1 MC 0
C00: MCNMCACHINGCFG 2LM TAD:
nmcachingtaden: 1 nmcachingtad: 0
C01: MCNMCACHINGCFG 2LM TAD:
nmcachingtaden: 1 nmcachingtad: 0
Write Hbm Nm Caching Tad CSR's for HBM Stack 1 MC 1
C00: MCNMCACHINGCFG 2LM TAD:
nmcachingtaden: 1 nmcachingtad: 0
C01: MCNMCACHINGCFG 2LM TAD:
nmcachingtaden: 1 nmcachingtad: 0
Write Hbm Nm Caching Tad CSR's for HBM Stack 1 MC 2
C00: MCNMCACHINGCFG 2LM TAD:
nmcachingtaden: 1 nmcachingtad: 0
C01: MCNMCACHINGCFG 2LM TAD:
nmcachingtaden: 1 nmcachingtad: 0
Write Hbm Nm Caching Tad CSR's for HBM Stack 1 MC 3
C00: MCNMCACHINGCFG 2LM TAD:
nmcachingtaden: 1 nmcachingtad: 0
C01: MCNMCACHINGCFG 2LM TAD:
nmcachingtaden: 1 nmcachingtad: 0
Write 1LM Decoder CSR's for HBM Stack 1 MC 0
C00: TADCHNILVOFFSET[0]:
target_ways: 0 chn_ways: 0 target_gran: 1 chn_gran: 1 tad_offset: 0x0 tad_offset_sign: 0
C01: TADCHNILVOFFSET[0]:
target_ways: 0 chn_ways: 0 target_gran: 1 chn_gran: 1 tad_offset: 0x0 tad_offset_sign: 0
Write 1LM Decoder CSR's for HBM Stack 1 MC 1
C00: TADCHNILVOFFSET[0]:
target_ways: 0 chn_ways: 0 target_gran: 1 chn_gran: 1 tad_offset: 0x0 tad_offset_sign: 0
C01: TADCHNILVOFFSET[0]:
target_ways: 0 chn_ways: 0 target_gran: 1 chn_gran: 1 tad_offset: 0x0 tad_offset_sign: 0
Write 1LM Decoder CSR's for HBM Stack 1 MC 2
C00: TADCHNILVOFFSET[0]:
target_ways: 0 chn_ways: 0 target_gran: 1 chn_gran: 1 tad_offset: 0x0 tad_offset_sign: 0
C01: TADCHNILVOFFSET[0]:
target_ways: 0 chn_ways: 0 target_gran: 1 chn_gran: 1 tad_offset: 0x0 tad_offset_sign: 0
Write 1LM Decoder CSR's for HBM Stack 1 MC 3
C00: TADCHNILVOFFSET[0]:
target_ways: 0 chn_ways: 0 target_gran: 1 chn_gran: 1 tad_offset: 0x0 tad_offset_sign: 0
C01: TADCHNILVOFFSET[0]:
target_ways: 0 chn_ways: 0 target_gran: 1 chn_gran: 1 tad_offset: 0x0 tad_offset_sign: 0
Write MCNMCACHINGCFG for HBM Stack 1 MC 0
C00: MCNMCACHINGCFG:
mcnmcachingenb: 1 mcpmemenb: 0 mcnmcachingpmemwt: 0
C01: MCNMCACHINGCFG:
mcnmcachingenb: 1 mcpmemenb: 0 mcnmcachingpmemwt: 0
Write MCNMCACHINGCFG for HBM Stack 1 MC 1
C00: MCNMCACHINGCFG:
mcnmcachingenb: 1 mcpmemenb: 0 mcnmcachingpmemwt: 0
C01: MCNMCACHINGCFG:
mcnmcachingenb: 1 mcpmemenb: 0 mcnmcachingpmemwt: 0
Write MCNMCACHINGCFG for HBM Stack 1 MC 2
C00: MCNMCACHINGCFG:
mcnmcachingenb: 1 mcpmemenb: 0 mcnmcachingpmemwt: 0
C01: MCNMCACHINGCFG:
mcnmcachingenb: 1 mcpmemenb: 0 mcnmcachingpmemwt: 0
Write MCNMCACHINGCFG for HBM Stack 1 MC 3
C00: MCNMCACHINGCFG:
mcnmcachingenb: 1 mcpmemenb: 0 mcnmcachingpmemwt: 0
C01: MCNMCACHINGCFG:
mcnmcachingenb: 1 mcpmemenb: 0 mcnmcachingpmemwt: 0
Write 2LM NM Decoder CSR's for HBM Stack 1 MC 0
C00: CSR for force_lat bit : AMAP_MC_MAIN_REG: 0x52
C00: MCNMCACHINGINTLV:
nm_target_ways: 0 nm_chn_ways: 3 nm_target_lid: 0 nm_target_gran: 1 nm_chn_gran: 1 nm_chn_lid: 0
C00: MCNMCACHINGCFG_MC_2LM_REG:
en_2way: 0 prefer_way_sel: 0 chn_cap: 0xB nm_ratio_chn_cap: 0
C00: MCNMCACHINGOFFSET:
mcnmcachingoffsetlower: 0x2 mcnmcachingoffset: 0x5 mcnmcachingoffseten: 1
C01: CSR for force_lat bit : AMAP_MC_MAIN_REG: 0x52
C01: MCNMCACHINGINTLV:
nm_target_ways: 0 nm_chn_ways: 3 nm_target_lid: 0 nm_target_gran: 1 nm_chn_gran: 1 nm_chn_lid: 1
C01: MCNMCACHINGCFG_MC_2LM_REG:
en_2way: 0 prefer_way_sel: 0 chn_cap: 0xB nm_ratio_chn_cap: 0
C01: MCNMCACHINGOFFSET:
mcnmcachingoffsetlower: 0x2 mcnmcachingoffset: 0x5 mcnmcachingoffseten: 1
Write 2LM NM Decoder CSR's for HBM Stack 1 MC 1
C00: CSR for force_lat bit : AMAP_MC_MAIN_REG: 0x52
C00: MCNMCACHINGINTLV:
nm_target_ways: 0 nm_chn_ways: 3 nm_target_lid: 0 nm_target_gran: 1 nm_chn_gran: 1 nm_chn_lid: 2
C00: MCNMCACHINGCFG_MC_2LM_REG:
en_2way: 0 prefer_way_sel: 0 chn_cap: 0xB nm_ratio_chn_cap: 0
C00: MCNMCACHINGOFFSET:
mcnmcachingoffsetlower: 0x2 mcnmcachingoffset: 0x5 mcnmcachingoffseten: 1
C01: CSR for force_lat bit : AMAP_MC_MAIN_REG: 0x52
C01: MCNMCACHINGINTLV:
nm_target_ways: 0 nm_chn_ways: 3 nm_target_lid: 0 nm_target_gran: 1 nm_chn_gran: 1 nm_chn_lid: 3
C01: MCNMCACHINGCFG_MC_2LM_REG:
en_2way: 0 prefer_way_sel: 0 chn_cap: 0xB nm_ratio_chn_cap: 0
C01: MCNMCACHINGOFFSET:
mcnmcachingoffsetlower: 0x2 mcnmcachingoffset: 0x5 mcnmcachingoffseten: 1
Write 2LM NM Decoder CSR's for HBM Stack 1 MC 2
C00: CSR for force_lat bit : AMAP_MC_MAIN_REG: 0x52
C00: MCNMCACHINGINTLV:
nm_target_ways: 0 nm_chn_ways: 3 nm_target_lid: 0 nm_target_gran: 1 nm_chn_gran: 1 nm_chn_lid: 4
C00: MCNMCACHINGCFG_MC_2LM_REG:
en_2way: 0 prefer_way_sel: 0 chn_cap: 0xB nm_ratio_chn_cap: 0
C00: MCNMCACHINGOFFSET:
mcnmcachingoffsetlower: 0x2 mcnmcachingoffset: 0x5 mcnmcachingoffseten: 1
C01: CSR for force_lat bit : AMAP_MC_MAIN_REG: 0x52
C01: MCNMCACHINGINTLV:
nm_target_ways: 0 nm_chn_ways: 3 nm_target_lid: 0 nm_target_gran: 1 nm_chn_gran: 1 nm_chn_lid: 5
C01: MCNMCACHINGCFG_MC_2LM_REG:
en_2way: 0 prefer_way_sel: 0 chn_cap: 0xB nm_ratio_chn_cap: 0
C01: MCNMCACHINGOFFSET:
mcnmcachingoffsetlower: 0x2 mcnmcachingoffset: 0x5 mcnmcachingoffseten: 1
Write 2LM NM Decoder CSR's for HBM Stack 1 MC 3
C00: CSR for force_lat bit : AMAP_MC_MAIN_REG: 0x52
C00: MCNMCACHINGINTLV:
nm_target_ways: 0 nm_chn_ways: 3 nm_target_lid: 0 nm_target_gran: 1 nm_chn_gran: 1 nm_chn_lid: 6
C00: MCNMCACHINGCFG_MC_2LM_REG:
en_2way: 0 prefer_way_sel: 0 chn_cap: 0xB nm_ratio_chn_cap: 0
C00: MCNMCACHINGOFFSET:
mcnmcachingoffsetlower: 0x2 mcnmcachingoffset: 0x5 mcnmcachingoffseten: 1
C01: CSR for force_lat bit : AMAP_MC_MAIN_REG: 0x52
C01: MCNMCACHINGINTLV:
nm_target_ways: 0 nm_chn_ways: 3 nm_target_lid: 0 nm_target_gran: 1 nm_chn_gran: 1 nm_chn_lid: 7
C01: MCNMCACHINGCFG_MC_2LM_REG:
en_2way: 0 prefer_way_sel: 0 chn_cap: 0xB nm_ratio_chn_cap: 0
C01: MCNMCACHINGOFFSET:
mcnmcachingoffsetlower: 0x2 mcnmcachingoffset: 0x5 mcnmcachingoffseten: 1
Write 2LM FM Decoder CSR's for HBM Stack 1 MC 0 TAD 0
C00: DRAM_RULE[0]:
rule_enable: 1 limit: 0xC1F fm_target: 0 fm_chn_ways: 0 fm_chn_gran: 1 fm_target_ways: 0 fm_gran_eq: 0 fm_chn_l2pid: 0x00000000
C01: DRAM_RULE[0]:
rule_enable: 1 limit: 0xC1F fm_target: 0 fm_chn_ways: 0 fm_chn_gran: 1 fm_target_ways: 0 fm_gran_eq: 0 fm_chn_l2pid: 0x00000000
Write 2LM FM Decoder CSR's for HBM Stack 1 MC 1 TAD 0
C00: DRAM_RULE[0]:
rule_enable: 1 limit: 0xC1F fm_target: 0 fm_chn_ways: 0 fm_chn_gran: 1 fm_target_ways: 0 fm_gran_eq: 0 fm_chn_l2pid: 0x00000000
C01: DRAM_RULE[0]:
rule_enable: 1 limit: 0xC1F fm_target: 0 fm_chn_ways: 0 fm_chn_gran: 1 fm_target_ways: 0 fm_gran_eq: 0 fm_chn_l2pid: 0x00000000
Write 2LM FM Decoder CSR's for HBM Stack 1 MC 2 TAD 0
C00: DRAM_RULE[0]:
rule_enable: 1 limit: 0xC1F fm_target: 0 fm_chn_ways: 0 fm_chn_gran: 1 fm_target_ways: 0 fm_gran_eq: 0 fm_chn_l2pid: 0x00000000
C01: DRAM_RULE[0]:
rule_enable: 1 limit: 0xC1F fm_target: 0 fm_chn_ways: 0 fm_chn_gran: 1 fm_target_ways: 0 fm_gran_eq: 0 fm_chn_l2pid: 0x00000000
Write 2LM FM Decoder CSR's for HBM Stack 1 MC 3 TAD 0
C00: DRAM_RULE[0]:
rule_enable: 1 limit: 0xC1F fm_target: 0 fm_chn_ways: 0 fm_chn_gran: 1 fm_target_ways: 0 fm_gran_eq: 0 fm_chn_l2pid: 0x00000000
C01: DRAM_RULE[0]:
rule_enable: 1 limit: 0xC1F fm_target: 0 fm_chn_ways: 0 fm_chn_gran: 1 fm_target_ways: 0 fm_gran_eq: 0 fm_chn_l2pid: 0x00000000
Write Patrol and Sparing TAD range CSR's for HBM Stack 2 MC 0
C00: TADWAYNESS[0]:
target_lid: 0 chn_lid: 0 tad_limit: 0x1F
C00: TADBASE[0]:
mirror_en: 0 en_failover: 0 ign_ptrl_uc: 0 base: 0x0
C01: TADWAYNESS[0]:
target_lid: 0 chn_lid: 1 tad_limit: 0x1F
C01: TADBASE[0]:
mirror_en: 0 en_failover: 0 ign_ptrl_uc: 0 base: 0x0
Write Patrol and Sparing TAD range CSR's for HBM Stack 2 MC 1
C00: TADWAYNESS[0]:
target_lid: 0 chn_lid: 2 tad_limit: 0x1F
C00: TADBASE[0]:
mirror_en: 0 en_failover: 0 ign_ptrl_uc: 0 base: 0x0
C01: TADWAYNESS[0]:
target_lid: 0 chn_lid: 3 tad_limit: 0x1F
C01: TADBASE[0]:
mirror_en: 0 en_failover: 0 ign_ptrl_uc: 0 base: 0x0
Write Patrol and Sparing TAD range CSR's for HBM Stack 2 MC 2
C00: TADWAYNESS[0]:
target_lid: 0 chn_lid: 4 tad_limit: 0x1F
C00: TADBASE[0]:
mirror_en: 0 en_failover: 0 ign_ptrl_uc: 0 base: 0x0
C01: TADWAYNESS[0]:
target_lid: 0 chn_lid: 5 tad_limit: 0x1F
C01: TADBASE[0]:
mirror_en: 0 en_failover: 0 ign_ptrl_uc: 0 base: 0x0
Write Patrol and Sparing TAD range CSR's for HBM Stack 2 MC 3
C00: TADWAYNESS[0]:
target_lid: 0 chn_lid: 6 tad_limit: 0x1F
C00: TADBASE[0]:
mirror_en: 0 en_failover: 0 ign_ptrl_uc: 0 base: 0x0
C01: TADWAYNESS[0]:
target_lid: 0 chn_lid: 7 tad_limit: 0x1F
C01: TADBASE[0]:
mirror_en: 0 en_failover: 0 ign_ptrl_uc: 0 base: 0x0
Write Hbm Nm Caching Tad CSR's for HBM Stack 2 MC 0
C00: MCNMCACHINGCFG 2LM TAD:
nmcachingtaden: 1 nmcachingtad: 0
C01: MCNMCACHINGCFG 2LM TAD:
nmcachingtaden: 1 nmcachingtad: 0
Write Hbm Nm Caching Tad CSR's for HBM Stack 2 MC 1
C00: MCNMCACHINGCFG 2LM TAD:
nmcachingtaden: 1 nmcachingtad: 0
C01: MCNMCACHINGCFG 2LM TAD:
nmcachingtaden: 1 nmcachingtad: 0
Write Hbm Nm Caching Tad CSR's for HBM Stack 2 MC 2
C00: MCNMCACHINGCFG 2LM TAD:
nmcachingtaden: 1 nmcachingtad: 0
C01: MCNMCACHINGCFG 2LM TAD:
nmcachingtaden: 1 nmcachingtad: 0
Write Hbm Nm Caching Tad CSR's for HBM Stack 2 MC 3
C00: MCNMCACHINGCFG 2LM TAD:
nmcachingtaden: 1 nmcachingtad: 0
C01: MCNMCACHINGCFG 2LM TAD:
nmcachingtaden: 1 nmcachingtad: 0
Write 1LM Decoder CSR's for HBM Stack 2 MC 0
C00: TADCHNILVOFFSET[0]:
target_ways: 0 chn_ways: 0 target_gran: 1 chn_gran: 1 tad_offset: 0x0 tad_offset_sign: 0
C01: TADCHNILVOFFSET[0]:
target_ways: 0 chn_ways: 0 target_gran: 1 chn_gran: 1 tad_offset: 0x0 tad_offset_sign: 0
Write 1LM Decoder CSR's for HBM Stack 2 MC 1
C00: TADCHNILVOFFSET[0]:
target_ways: 0 chn_ways: 0 target_gran: 1 chn_gran: 1 tad_offset: 0x0 tad_offset_sign: 0
C01: TADCHNILVOFFSET[0]:
target_ways: 0 chn_ways: 0 target_gran: 1 chn_gran: 1 tad_offset: 0x0 tad_offset_sign: 0
Write 1LM Decoder CSR's for HBM Stack 2 MC 2
C00: TADCHNILVOFFSET[0]:
target_ways: 0 chn_ways: 0 target_gran: 1 chn_gran: 1 tad_offset: 0x0 tad_offset_sign: 0
C01: TADCHNILVOFFSET[0]:
target_ways: 0 chn_ways: 0 target_gran: 1 chn_gran: 1 tad_offset: 0x0 tad_offset_sign: 0
Write 1LM Decoder CSR's for HBM Stack 2 MC 3
C00: TADCHNILVOFFSET[0]:
target_ways: 0 chn_ways: 0 target_gran: 1 chn_gran: 1 tad_offset: 0x0 tad_offset_sign: 0
C01: TADCHNILVOFFSET[0]:
target_ways: 0 chn_ways: 0 target_gran: 1 chn_gran: 1 tad_offset: 0x0 tad_offset_sign: 0
Write MCNMCACHINGCFG for HBM Stack 2 MC 0
C00: MCNMCACHINGCFG:
mcnmcachingenb: 1 mcpmemenb: 0 mcnmcachingpmemwt: 0
C01: MCNMCACHINGCFG:
mcnmcachingenb: 1 mcpmemenb: 0 mcnmcachingpmemwt: 0
Write MCNMCACHINGCFG for HBM Stack 2 MC 1
C00: MCNMCACHINGCFG:
mcnmcachingenb: 1 mcpmemenb: 0 mcnmcachingpmemwt: 0
C01: MCNMCACHINGCFG:
mcnmcachingenb: 1 mcpmemenb: 0 mcnmcachingpmemwt: 0
Write MCNMCACHINGCFG for HBM Stack 2 MC 2
C00: MCNMCACHINGCFG:
mcnmcachingenb: 1 mcpmemenb: 0 mcnmcachingpmemwt: 0
C01: MCNMCACHINGCFG:
mcnmcachingenb: 1 mcpmemenb: 0 mcnmcachingpmemwt: 0
Write MCNMCACHINGCFG for HBM Stack 2 MC 3
C00: MCNMCACHINGCFG:
mcnmcachingenb: 1 mcpmemenb: 0 mcnmcachingpmemwt: 0
C01: MCNMCACHINGCFG:
mcnmcachingenb: 1 mcpmemenb: 0 mcnmcachingpmemwt: 0
Write 2LM NM Decoder CSR's for HBM Stack 2 MC 0
C00: CSR for force_lat bit : AMAP_MC_MAIN_REG: 0x52
C00: MCNMCACHINGINTLV:
nm_target_ways: 0 nm_chn_ways: 3 nm_target_lid: 0 nm_target_gran: 1 nm_chn_gran: 1 nm_chn_lid: 0
C00: MCNMCACHINGCFG_MC_2LM_REG:
en_2way: 0 prefer_way_sel: 0 chn_cap: 0xB nm_ratio_chn_cap: 0
C00: MCNMCACHINGOFFSET:
mcnmcachingoffsetlower: 0x2 mcnmcachingoffset: 0x6 mcnmcachingoffseten: 1
C01: CSR for force_lat bit : AMAP_MC_MAIN_REG: 0x52
C01: MCNMCACHINGINTLV:
nm_target_ways: 0 nm_chn_ways: 3 nm_target_lid: 0 nm_target_gran: 1 nm_chn_gran: 1 nm_chn_lid: 1
C01: MCNMCACHINGCFG_MC_2LM_REG:
en_2way: 0 prefer_way_sel: 0 chn_cap: 0xB nm_ratio_chn_cap: 0
C01: MCNMCACHINGOFFSET:
mcnmcachingoffsetlower: 0x2 mcnmcachingoffset: 0x6 mcnmcachingoffseten: 1
Write 2LM NM Decoder CSR's for HBM Stack 2 MC 1
C00: CSR for force_lat bit : AMAP_MC_MAIN_REG: 0x52
C00: MCNMCACHINGINTLV:
nm_target_ways: 0 nm_chn_ways: 3 nm_target_lid: 0 nm_target_gran: 1 nm_chn_gran: 1 nm_chn_lid: 2
C00: MCNMCACHINGCFG_MC_2LM_REG:
en_2way: 0 prefer_way_sel: 0 chn_cap: 0xB nm_ratio_chn_cap: 0
C00: MCNMCACHINGOFFSET:
mcnmcachingoffsetlower: 0x2 mcnmcachingoffset: 0x6 mcnmcachingoffseten: 1
C01: CSR for force_lat bit : AMAP_MC_MAIN_REG: 0x52
C01: MCNMCACHINGINTLV:
nm_target_ways: 0 nm_chn_ways: 3 nm_target_lid: 0 nm_target_gran: 1 nm_chn_gran: 1 nm_chn_lid: 3
C01: MCNMCACHINGCFG_MC_2LM_REG:
en_2way: 0 prefer_way_sel: 0 chn_cap: 0xB nm_ratio_chn_cap: 0
C01: MCNMCACHINGOFFSET:
mcnmcachingoffsetlower: 0x2 mcnmcachingoffset: 0x6 mcnmcachingoffseten: 1
Write 2LM NM Decoder CSR's for HBM Stack 2 MC 2
C00: CSR for force_lat bit : AMAP_MC_MAIN_REG: 0x52
C00: MCNMCACHINGINTLV:
nm_target_ways: 0 nm_chn_ways: 3 nm_target_lid: 0 nm_target_gran: 1 nm_chn_gran: 1 nm_chn_lid: 4
C00: MCNMCACHINGCFG_MC_2LM_REG:
en_2way: 0 prefer_way_sel: 0 chn_cap: 0xB nm_ratio_chn_cap: 0
C00: MCNMCACHINGOFFSET:
mcnmcachingoffsetlower: 0x2 mcnmcachingoffset: 0x6 mcnmcachingoffseten: 1
C01: CSR for force_lat bit : AMAP_MC_MAIN_REG: 0x52
C01: MCNMCACHINGINTLV:
nm_target_ways: 0 nm_chn_ways: 3 nm_target_lid: 0 nm_target_gran: 1 nm_chn_gran: 1 nm_chn_lid: 5
C01: MCNMCACHINGCFG_MC_2LM_REG:
en_2way: 0 prefer_way_sel: 0 chn_cap: 0xB nm_ratio_chn_cap: 0
C01: MCNMCACHINGOFFSET:
mcnmcachingoffsetlower: 0x2 mcnmcachingoffset: 0x6 mcnmcachingoffseten: 1
Write 2LM NM Decoder CSR's for HBM Stack 2 MC 3
C00: CSR for force_lat bit : AMAP_MC_MAIN_REG: 0x52
C00: MCNMCACHINGINTLV:
nm_target_ways: 0 nm_chn_ways: 3 nm_target_lid: 0 nm_target_gran: 1 nm_chn_gran: 1 nm_chn_lid: 6
C00: MCNMCACHINGCFG_MC_2LM_REG:
en_2way: 0 prefer_way_sel: 0 chn_cap: 0xB nm_ratio_chn_cap: 0
C00: MCNMCACHINGOFFSET:
mcnmcachingoffsetlower: 0x2 mcnmcachingoffset: 0x6 mcnmcachingoffseten: 1
C01: CSR for force_lat bit : AMAP_MC_MAIN_REG: 0x52
C01: MCNMCACHINGINTLV:
nm_target_ways: 0 nm_chn_ways: 3 nm_target_lid: 0 nm_target_gran: 1 nm_chn_gran: 1 nm_chn_lid: 7
C01: MCNMCACHINGCFG_MC_2LM_REG:
en_2way: 0 prefer_way_sel: 0 chn_cap: 0xB nm_ratio_chn_cap: 0
C01: MCNMCACHINGOFFSET:
mcnmcachingoffsetlower: 0x2 mcnmcachingoffset: 0x6 mcnmcachingoffseten: 1
Write 2LM FM Decoder CSR's for HBM Stack 2 MC 0 TAD 0
C00: DRAM_RULE[0]:
rule_enable: 1 limit: 0xE1F fm_target: 0 fm_chn_ways: 0 fm_chn_gran: 1 fm_target_ways: 0 fm_gran_eq: 0 fm_chn_l2pid: 0x00000000
C01: DRAM_RULE[0]:
rule_enable: 1 limit: 0xE1F fm_target: 0 fm_chn_ways: 0 fm_chn_gran: 1 fm_target_ways: 0 fm_gran_eq: 0 fm_chn_l2pid: 0x00000000
Write 2LM FM Decoder CSR's for HBM Stack 2 MC 1 TAD 0
C00: DRAM_RULE[0]:
rule_enable: 1 limit: 0xE1F fm_target: 0 fm_chn_ways: 0 fm_chn_gran: 1 fm_target_ways: 0 fm_gran_eq: 0 fm_chn_l2pid: 0x00000000
C01: DRAM_RULE[0]:
rule_enable: 1 limit: 0xE1F fm_target: 0 fm_chn_ways: 0 fm_chn_gran: 1 fm_target_ways: 0 fm_gran_eq: 0 fm_chn_l2pid: 0x00000000
Write 2LM FM Decoder CSR's for HBM Stack 2 MC 2 TAD 0
C00: DRAM_RULE[0]:
rule_enable: 1 limit: 0xE1F fm_target: 0 fm_chn_ways: 0 fm_chn_gran: 1 fm_target_ways: 0 fm_gran_eq: 0 fm_chn_l2pid: 0x00000000
C01: DRAM_RULE[0]:
rule_enable: 1 limit: 0xE1F fm_target: 0 fm_chn_ways: 0 fm_chn_gran: 1 fm_target_ways: 0 fm_gran_eq: 0 fm_chn_l2pid: 0x00000000
Write 2LM FM Decoder CSR's for HBM Stack 2 MC 3 TAD 0
C00: DRAM_RULE[0]:
rule_enable: 1 limit: 0xE1F fm_target: 0 fm_chn_ways: 0 fm_chn_gran: 1 fm_target_ways: 0 fm_gran_eq: 0 fm_chn_l2pid: 0x00000000
C01: DRAM_RULE[0]:
rule_enable: 1 limit: 0xE1F fm_target: 0 fm_chn_ways: 0 fm_chn_gran: 1 fm_target_ways: 0 fm_gran_eq: 0 fm_chn_l2pid: 0x00000000
Write Patrol and Sparing TAD range CSR's for HBM Stack 3 MC 0
C00: TADWAYNESS[0]:
target_lid: 0 chn_lid: 0 tad_limit: 0x1F
C00: TADBASE[0]:
mirror_en: 0 en_failover: 0 ign_ptrl_uc: 0 base: 0x0
C01: TADWAYNESS[0]:
target_lid: 0 chn_lid: 1 tad_limit: 0x1F
C01: TADBASE[0]:
mirror_en: 0 en_failover: 0 ign_ptrl_uc: 0 base: 0x0
Write Patrol and Sparing TAD range CSR's for HBM Stack 3 MC 1
C00: TADWAYNESS[0]:
target_lid: 0 chn_lid: 2 tad_limit: 0x1F
C00: TADBASE[0]:
mirror_en: 0 en_failover: 0 ign_ptrl_uc: 0 base: 0x0
C01: TADWAYNESS[0]:
target_lid: 0 chn_lid: 3 tad_limit: 0x1F
C01: TADBASE[0]:
mirror_en: 0 en_failover: 0 ign_ptrl_uc: 0 base: 0x0
Write Patrol and Sparing TAD range CSR's for HBM Stack 3 MC 2
C00: TADWAYNESS[0]:
target_lid: 0 chn_lid: 4 tad_limit: 0x1F
C00: TADBASE[0]:
mirror_en: 0 en_failover: 0 ign_ptrl_uc: 0 base: 0x0
C01: TADWAYNESS[0]:
target_lid: 0 chn_lid: 5 tad_limit: 0x1F
C01: TADBASE[0]:
mirror_en: 0 en_failover: 0 ign_ptrl_uc: 0 base: 0x0
Write Patrol and Sparing TAD range CSR's for HBM Stack 3 MC 3
C00: TADWAYNESS[0]:
target_lid: 0 chn_lid: 6 tad_limit: 0x1F
C00: TADBASE[0]:
mirror_en: 0 en_failover: 0 ign_ptrl_uc: 0 base: 0x0
C01: TADWAYNESS[0]:
target_lid: 0 chn_lid: 7 tad_limit: 0x1F
C01: TADBASE[0]:
mirror_en: 0 en_failover: 0 ign_ptrl_uc: 0 base: 0x0
Write Hbm Nm Caching Tad CSR's for HBM Stack 3 MC 0
C00: MCNMCACHINGCFG 2LM TAD:
nmcachingtaden: 1 nmcachingtad: 0
C01: MCNMCACHINGCFG 2LM TAD:
nmcachingtaden: 1 nmcachingtad: 0
Write Hbm Nm Caching Tad CSR's for HBM Stack 3 MC 1
C00: MCNMCACHINGCFG 2LM TAD:
nmcachingtaden: 1 nmcachingtad: 0
C01: MCNMCACHINGCFG 2LM TAD:
nmcachingtaden: 1 nmcachingtad: 0
Write Hbm Nm Caching Tad CSR's for HBM Stack 3 MC 2
C00: MCNMCACHINGCFG 2LM TAD:
nmcachingtaden: 1 nmcachingtad: 0
C01: MCNMCACHINGCFG 2LM TAD:
nmcachingtaden: 1 nmcachingtad: 0
Write Hbm Nm Caching Tad CSR's for HBM Stack 3 MC 3
C00: MCNMCACHINGCFG 2LM TAD:
nmcachingtaden: 1 nmcachingtad: 0
C01: MCNMCACHINGCFG 2LM TAD:
nmcachingtaden: 1 nmcachingtad: 0
Write 1LM Decoder CSR's for HBM Stack 3 MC 0
C00: TADCHNILVOFFSET[0]:
target_ways: 0 chn_ways: 0 target_gran: 1 chn_gran: 1 tad_offset: 0x0 tad_offset_sign: 0
C01: TADCHNILVOFFSET[0]:
target_ways: 0 chn_ways: 0 target_gran: 1 chn_gran: 1 tad_offset: 0x0 tad_offset_sign: 0
Write 1LM Decoder CSR's for HBM Stack 3 MC 1
C00: TADCHNILVOFFSET[0]:
target_ways: 0 chn_ways: 0 target_gran: 1 chn_gran: 1 tad_offset: 0x0 tad_offset_sign: 0
C01: TADCHNILVOFFSET[0]:
target_ways: 0 chn_ways: 0 target_gran: 1 chn_gran: 1 tad_offset: 0x0 tad_offset_sign: 0
Write 1LM Decoder CSR's for HBM Stack 3 MC 2
C00: TADCHNILVOFFSET[0]:
target_ways: 0 chn_ways: 0 target_gran: 1 chn_gran: 1 tad_offset: 0x0 tad_offset_sign: 0
C01: TADCHNILVOFFSET[0]:
target_ways: 0 chn_ways: 0 target_gran: 1 chn_gran: 1 tad_offset: 0x0 tad_offset_sign: 0
Write 1LM Decoder CSR's for HBM Stack 3 MC 3
C00: TADCHNILVOFFSET[0]:
target_ways: 0 chn_ways: 0 target_gran: 1 chn_gran: 1 tad_offset: 0x0 tad_offset_sign: 0
C01: TADCHNILVOFFSET[0]:
target_ways: 0 chn_ways: 0 target_gran: 1 chn_gran: 1 tad_offset: 0x0 tad_offset_sign: 0
Write MCNMCACHINGCFG for HBM Stack 3 MC 0
C00: MCNMCACHINGCFG:
mcnmcachingenb: 1 mcpmemenb: 0 mcnmcachingpmemwt: 0
C01: MCNMCACHINGCFG:
mcnmcachingenb: 1 mcpmemenb: 0 mcnmcachingpmemwt: 0
Write MCNMCACHINGCFG for HBM Stack 3 MC 1
C00: MCNMCACHINGCFG:
mcnmcachingenb: 1 mcpmemenb: 0 mcnmcachingpmemwt: 0
C01: MCNMCACHINGCFG:
mcnmcachingenb: 1 mcpmemenb: 0 mcnmcachingpmemwt: 0
Write MCNMCACHINGCFG for HBM Stack 3 MC 2
C00: MCNMCACHINGCFG:
mcnmcachingenb: 1 mcpmemenb: 0 mcnmcachingpmemwt: 0
C01: MCNMCACHINGCFG:
mcnmcachingenb: 1 mcpmemenb: 0 mcnmcachingpmemwt: 0
Write MCNMCACHINGCFG for HBM Stack 3 MC 3
C00: MCNMCACHINGCFG:
mcnmcachingenb: 1 mcpmemenb: 0 mcnmcachingpmemwt: 0
C01: MCNMCACHINGCFG:
mcnmcachingenb: 1 mcpmemenb: 0 mcnmcachingpmemwt: 0
Write 2LM NM Decoder CSR's for HBM Stack 3 MC 0
C00: CSR for force_lat bit : AMAP_MC_MAIN_REG: 0x52
C00: MCNMCACHINGINTLV:
nm_target_ways: 0 nm_chn_ways: 3 nm_target_lid: 0 nm_target_gran: 1 nm_chn_gran: 1 nm_chn_lid: 0
C00: MCNMCACHINGCFG_MC_2LM_REG:
en_2way: 0 prefer_way_sel: 0 chn_cap: 0xB nm_ratio_chn_cap: 0
C00: MCNMCACHINGOFFSET:
mcnmcachingoffsetlower: 0x2 mcnmcachingoffset: 0x7 mcnmcachingoffseten: 1
C01: CSR for force_lat bit : AMAP_MC_MAIN_REG: 0x52
C01: MCNMCACHINGINTLV:
nm_target_ways: 0 nm_chn_ways: 3 nm_target_lid: 0 nm_target_gran: 1 nm_chn_gran: 1 nm_chn_lid: 1
C01: MCNMCACHINGCFG_MC_2LM_REG:
en_2way: 0 prefer_way_sel: 0 chn_cap: 0xB nm_ratio_chn_cap: 0
C01: MCNMCACHINGOFFSET:
mcnmcachingoffsetlower: 0x2 mcnmcachingoffset: 0x7 mcnmcachingoffseten: 1
Write 2LM NM Decoder CSR's for HBM Stack 3 MC 1
C00: CSR for force_lat bit : AMAP_MC_MAIN_REG: 0x52
C00: MCNMCACHINGINTLV:
nm_target_ways: 0 nm_chn_ways: 3 nm_target_lid: 0 nm_target_gran: 1 nm_chn_gran: 1 nm_chn_lid: 2
C00: MCNMCACHINGCFG_MC_2LM_REG:
en_2way: 0 prefer_way_sel: 0 chn_cap: 0xB nm_ratio_chn_cap: 0
C00: MCNMCACHINGOFFSET:
mcnmcachingoffsetlower: 0x2 mcnmcachingoffset: 0x7 mcnmcachingoffseten: 1
C01: CSR for force_lat bit : AMAP_MC_MAIN_REG: 0x52
C01: MCNMCACHINGINTLV:
nm_target_ways: 0 nm_chn_ways: 3 nm_target_lid: 0 nm_target_gran: 1 nm_chn_gran: 1 nm_chn_lid: 3
C01: MCNMCACHINGCFG_MC_2LM_REG:
en_2way: 0 prefer_way_sel: 0 chn_cap: 0xB nm_ratio_chn_cap: 0
C01: MCNMCACHINGOFFSET:
mcnmcachingoffsetlower: 0x2 mcnmcachingoffset: 0x7 mcnmcachingoffseten: 1
Write 2LM NM Decoder CSR's for HBM Stack 3 MC 2
C00: CSR for force_lat bit : AMAP_MC_MAIN_REG: 0x52
C00: MCNMCACHINGINTLV:
nm_target_ways: 0 nm_chn_ways: 3 nm_target_lid: 0 nm_target_gran: 1 nm_chn_gran: 1 nm_chn_lid: 4
C00: MCNMCACHINGCFG_MC_2LM_REG:
en_2way: 0 prefer_way_sel: 0 chn_cap: 0xB nm_ratio_chn_cap: 0
C00: MCNMCACHINGOFFSET:
mcnmcachingoffsetlower: 0x2 mcnmcachingoffset: 0x7 mcnmcachingoffseten: 1
C01: CSR for force_lat bit : AMAP_MC_MAIN_REG: 0x52
C01: MCNMCACHINGINTLV:
nm_target_ways: 0 nm_chn_ways: 3 nm_target_lid: 0 nm_target_gran: 1 nm_chn_gran: 1 nm_chn_lid: 5
C01: MCNMCACHINGCFG_MC_2LM_REG:
en_2way: 0 prefer_way_sel: 0 chn_cap: 0xB nm_ratio_chn_cap: 0
C01: MCNMCACHINGOFFSET:
mcnmcachingoffsetlower: 0x2 mcnmcachingoffset: 0x7 mcnmcachingoffseten: 1
Write 2LM NM Decoder CSR's for HBM Stack 3 MC 3
C00: CSR for force_lat bit : AMAP_MC_MAIN_REG: 0x52
C00: MCNMCACHINGINTLV:
nm_target_ways: 0 nm_chn_ways: 3 nm_target_lid: 0 nm_target_gran: 1 nm_chn_gran: 1 nm_chn_lid: 6
C00: MCNMCACHINGCFG_MC_2LM_REG:
en_2way: 0 prefer_way_sel: 0 chn_cap: 0xB nm_ratio_chn_cap: 0
C00: MCNMCACHINGOFFSET:
mcnmcachingoffsetlower: 0x2 mcnmcachingoffset: 0x7 mcnmcachingoffseten: 1
C01: CSR for force_lat bit : AMAP_MC_MAIN_REG: 0x52
C01: MCNMCACHINGINTLV:
nm_target_ways: 0 nm_chn_ways: 3 nm_target_lid: 0 nm_target_gran: 1 nm_chn_gran: 1 nm_chn_lid: 7
C01: MCNMCACHINGCFG_MC_2LM_REG:
en_2way: 0 prefer_way_sel: 0 chn_cap: 0xB nm_ratio_chn_cap: 0
C01: MCNMCACHINGOFFSET:
mcnmcachingoffsetlower: 0x2 mcnmcachingoffset: 0x7 mcnmcachingoffseten: 1
Write 2LM FM Decoder CSR's for HBM Stack 3 MC 0 TAD 0
C00: DRAM_RULE[0]:
rule_enable: 1 limit: 0x101F fm_target: 0 fm_chn_ways: 0 fm_chn_gran: 1 fm_target_ways: 0 fm_gran_eq: 0 fm_chn_l2pid: 0x00000000
C01: DRAM_RULE[0]:
rule_enable: 1 limit: 0x101F fm_target: 0 fm_chn_ways: 0 fm_chn_gran: 1 fm_target_ways: 0 fm_gran_eq: 0 fm_chn_l2pid: 0x00000000
Write 2LM FM Decoder CSR's for HBM Stack 3 MC 1 TAD 0
C00: DRAM_RULE[0]:
rule_enable: 1 limit: 0x101F fm_target: 0 fm_chn_ways: 0 fm_chn_gran: 1 fm_target_ways: 0 fm_gran_eq: 0 fm_chn_l2pid: 0x00000000
C01: DRAM_RULE[0]:
rule_enable: 1 limit: 0x101F fm_target: 0 fm_chn_ways: 0 fm_chn_gran: 1 fm_target_ways: 0 fm_gran_eq: 0 fm_chn_l2pid: 0x00000000
Write 2LM FM Decoder CSR's for HBM Stack 3 MC 2 TAD 0
C00: DRAM_RULE[0]:
rule_enable: 1 limit: 0x101F fm_target: 0 fm_chn_ways: 0 fm_chn_gran: 1 fm_target_ways: 0 fm_gran_eq: 0 fm_chn_l2pid: 0x00000000
C01: DRAM_RULE[0]:
rule_enable: 1 limit: 0x101F fm_target: 0 fm_chn_ways: 0 fm_chn_gran: 1 fm_target_ways: 0 fm_gran_eq: 0 fm_chn_l2pid: 0x00000000
Write 2LM FM Decoder CSR's for HBM Stack 3 MC 3 TAD 0
C00: DRAM_RULE[0]:
rule_enable: 1 limit: 0x101F fm_target: 0 fm_chn_ways: 0 fm_chn_gran: 1 fm_target_ways: 0 fm_gran_eq: 0 fm_chn_l2pid: 0x00000000
C01: DRAM_RULE[0]:
rule_enable: 1 limit: 0x101F fm_target: 0 fm_chn_ways: 0 fm_chn_gran: 1 fm_target_ways: 0 fm_gran_eq: 0 fm_chn_l2pid: 0x00000000
Checkpoint Code: Socket 0, 0xBB, 0x08, 0x0001
^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^
Write RIR CSRs for Socket: 1
^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^
Channel - 0
RIRWAYNESSLIMIT_0_MC_MAIN_REG
rir_val: 1 rir_limit: 0x1F rir_way: 0x0
RIRILV0OFFSET_0_MC_MAIN_REG
rir_rnk_tgt0: 0x0 rir_offset0: 0x0
RIRILV1OFFSET_0_MC_MAIN_REG
rir_rnk_tgt0: 0x0 rir_offset0: 0x0
RIRILV2OFFSET_0_MC_MAIN_REG
rir_rnk_tgt0: 0x0 rir_offset0: 0x0
RIRILV3OFFSET_0_MC_MAIN_REG
rir_rnk_tgt0: 0x0 rir_offset0: 0x0
RIRILV4OFFSET_0_MC_MAIN_REG
rir_rnk_tgt0: 0x0 rir_offset0: 0x0
RIRILV5OFFSET_0_MC_MAIN_REG
rir_rnk_tgt0: 0x0 rir_offset0: 0x0
RIRILV6OFFSET_0_MC_MAIN_REG
rir_rnk_tgt0: 0x0 rir_offset0: 0x0
RIRILV7OFFSET_0_MC_MAIN_REG
rir_rnk_tgt0: 0x0 rir_offset0: 0x0
RIRWAYNESSLIMIT_1_MC_MAIN_REG
rir_val: 0 rir_limit: 0x1F rir_way: 0x0
RIRILV0OFFSET_1_MC_MAIN_REG
rir_rnk_tgt0: 0x0 rir_offset0: 0x0
RIRILV1OFFSET_1_MC_MAIN_REG
rir_rnk_tgt0: 0x0 rir_offset0: 0x0
RIRILV2OFFSET_1_MC_MAIN_REG
rir_rnk_tgt0: 0x0 rir_offset0: 0x0
RIRILV3OFFSET_1_MC_MAIN_REG
rir_rnk_tgt0: 0x0 rir_offset0: 0x0
RIRILV4OFFSET_1_MC_MAIN_REG
rir_rnk_tgt0: 0x0 rir_offset0: 0x0
RIRILV5OFFSET_1_MC_MAIN_REG
rir_rnk_tgt0: 0x0 rir_offset0: 0x0
RIRILV6OFFSET_1_MC_MAIN_REG
rir_rnk_tgt0: 0x0 rir_offset0: 0x0
RIRILV7OFFSET_1_MC_MAIN_REG
rir_rnk_tgt0: 0x0 rir_offset0: 0x0
RIRWAYNESSLIMIT_2_MC_MAIN_REG
rir_val: 0 rir_limit: 0x1F rir_way: 0x0
RIRILV0OFFSET_2_MC_MAIN_REG
rir_rnk_tgt0: 0x0 rir_offset0: 0x0
RIRILV1OFFSET_2_MC_MAIN_REG
rir_rnk_tgt0: 0x0 rir_offset0: 0x0
RIRILV2OFFSET_2_MC_MAIN_REG
rir_rnk_tgt0: 0x0 rir_offset0: 0x0
RIRILV3OFFSET_2_MC_MAIN_REG
rir_rnk_tgt0: 0x0 rir_offset0: 0x0
RIRILV4OFFSET_2_MC_MAIN_REG
rir_rnk_tgt0: 0x0 rir_offset0: 0x0
RIRILV5OFFSET_2_MC_MAIN_REG
rir_rnk_tgt0: 0x0 rir_offset0: 0x0
RIRILV6OFFSET_2_MC_MAIN_REG
rir_rnk_tgt0: 0x0 rir_offset0: 0x0
RIRILV7OFFSET_2_MC_MAIN_REG
rir_rnk_tgt0: 0x0 rir_offset0: 0x0
RIRWAYNESSLIMIT_3_MC_MAIN_REG
rir_val: 0 rir_limit: 0x1F rir_way: 0x0
RIRILV0OFFSET_3_MC_MAIN_REG
rir_rnk_tgt0: 0x0 rir_offset0: 0x0
RIRILV1OFFSET_3_MC_MAIN_REG
rir_rnk_tgt0: 0x0 rir_offset0: 0x0
RIRILV2OFFSET_3_MC_MAIN_REG
rir_rnk_tgt0: 0x0 rir_offset0: 0x0
RIRILV3OFFSET_3_MC_MAIN_REG
rir_rnk_tgt0: 0x0 rir_offset0: 0x0
RIRILV4OFFSET_3_MC_MAIN_REG
rir_rnk_tgt0: 0x0 rir_offset0: 0x0
RIRILV5OFFSET_3_MC_MAIN_REG
rir_rnk_tgt0: 0x0 rir_offset0: 0x0
RIRILV6OFFSET_3_MC_MAIN_REG
rir_rnk_tgt0: 0x0 rir_offset0: 0x0
RIRILV7OFFSET_3_MC_MAIN_REG
rir_rnk_tgt0: 0x0 rir_offset0: 0x0
Channel - 2
RIRWAYNESSLIMIT_0_MC_MAIN_REG
rir_val: 1 rir_limit: 0x1F rir_way: 0x0
RIRILV0OFFSET_0_MC_MAIN_REG
rir_rnk_tgt0: 0x0 rir_offset0: 0x0
RIRILV1OFFSET_0_MC_MAIN_REG
rir_rnk_tgt0: 0x0 rir_offset0: 0x0
RIRILV2OFFSET_0_MC_MAIN_REG
rir_rnk_tgt0: 0x0 rir_offset0: 0x0
RIRILV3OFFSET_0_MC_MAIN_REG
rir_rnk_tgt0: 0x0 rir_offset0: 0x0
RIRILV4OFFSET_0_MC_MAIN_REG
rir_rnk_tgt0: 0x0 rir_offset0: 0x0
RIRILV5OFFSET_0_MC_MAIN_REG
rir_rnk_tgt0: 0x0 rir_offset0: 0x0
RIRILV6OFFSET_0_MC_MAIN_REG
rir_rnk_tgt0: 0x0 rir_offset0: 0x0
RIRILV7OFFSET_0_MC_MAIN_REG
rir_rnk_tgt0: 0x0 rir_offset0: 0x0
RIRWAYNESSLIMIT_1_MC_MAIN_REG
rir_val: 0 rir_limit: 0x1F rir_way: 0x0
RIRILV0OFFSET_1_MC_MAIN_REG
rir_rnk_tgt0: 0x0 rir_offset0: 0x0
RIRILV1OFFSET_1_MC_MAIN_REG
rir_rnk_tgt0: 0x0 rir_offset0: 0x0
RIRILV2OFFSET_1_MC_MAIN_REG
rir_rnk_tgt0: 0x0 rir_offset0: 0x0
RIRILV3OFFSET_1_MC_MAIN_REG
rir_rnk_tgt0: 0x0 rir_offset0: 0x0
RIRILV4OFFSET_1_MC_MAIN_REG
rir_rnk_tgt0: 0x0 rir_offset0: 0x0
RIRILV5OFFSET_1_MC_MAIN_REG
rir_rnk_tgt0: 0x0 rir_offset0: 0x0
RIRILV6OFFSET_1_MC_MAIN_REG
rir_rnk_tgt0: 0x0 rir_offset0: 0x0
RIRILV7OFFSET_1_MC_MAIN_REG
rir_rnk_tgt0: 0x0 rir_offset0: 0x0
RIRWAYNESSLIMIT_2_MC_MAIN_REG
rir_val: 0 rir_limit: 0x1F rir_way: 0x0
RIRILV0OFFSET_2_MC_MAIN_REG
rir_rnk_tgt0: 0x0 rir_offset0: 0x0
RIRILV1OFFSET_2_MC_MAIN_REG
rir_rnk_tgt0: 0x0 rir_offset0: 0x0
RIRILV2OFFSET_2_MC_MAIN_REG
rir_rnk_tgt0: 0x0 rir_offset0: 0x0
RIRILV3OFFSET_2_MC_MAIN_REG
rir_rnk_tgt0: 0x0 rir_offset0: 0x0
RIRILV4OFFSET_2_MC_MAIN_REG
rir_rnk_tgt0: 0x0 rir_offset0: 0x0
RIRILV5OFFSET_2_MC_MAIN_REG
rir_rnk_tgt0: 0x0 rir_offset0: 0x0
RIRILV6OFFSET_2_MC_MAIN_REG
rir_rnk_tgt0: 0x0 rir_offset0: 0x0
RIRILV7OFFSET_2_MC_MAIN_REG
rir_rnk_tgt0: 0x0 rir_offset0: 0x0
RIRWAYNESSLIMIT_3_MC_MAIN_REG
rir_val: 0 rir_limit: 0x1F rir_way: 0x0
RIRILV0OFFSET_3_MC_MAIN_REG
rir_rnk_tgt0: 0x0 rir_offset0: 0x0
RIRILV1OFFSET_3_MC_MAIN_REG
rir_rnk_tgt0: 0x0 rir_offset0: 0x0
RIRILV2OFFSET_3_MC_MAIN_REG
rir_rnk_tgt0: 0x0 rir_offset0: 0x0
RIRILV3OFFSET_3_MC_MAIN_REG
rir_rnk_tgt0: 0x0 rir_offset0: 0x0
RIRILV4OFFSET_3_MC_MAIN_REG
rir_rnk_tgt0: 0x0 rir_offset0: 0x0
RIRILV5OFFSET_3_MC_MAIN_REG
rir_rnk_tgt0: 0x0 rir_offset0: 0x0
RIRILV6OFFSET_3_MC_MAIN_REG
rir_rnk_tgt0: 0x0 rir_offset0: 0x0
RIRILV7OFFSET_3_MC_MAIN_REG
rir_rnk_tgt0: 0x0 rir_offset0: 0x0
Channel - 4
RIRWAYNESSLIMIT_0_MC_MAIN_REG
rir_val: 1 rir_limit: 0x1F rir_way: 0x0
RIRILV0OFFSET_0_MC_MAIN_REG
rir_rnk_tgt0: 0x0 rir_offset0: 0x0
RIRILV1OFFSET_0_MC_MAIN_REG
rir_rnk_tgt0: 0x0 rir_offset0: 0x0
RIRILV2OFFSET_0_MC_MAIN_REG
rir_rnk_tgt0: 0x0 rir_offset0: 0x0
RIRILV3OFFSET_0_MC_MAIN_REG
rir_rnk_tgt0: 0x0 rir_offset0: 0x0
RIRILV4OFFSET_0_MC_MAIN_REG
rir_rnk_tgt0: 0x0 rir_offset0: 0x0
RIRILV5OFFSET_0_MC_MAIN_REG
rir_rnk_tgt0: 0x0 rir_offset0: 0x0
RIRILV6OFFSET_0_MC_MAIN_REG
rir_rnk_tgt0: 0x0 rir_offset0: 0x0
RIRILV7OFFSET_0_MC_MAIN_REG
rir_rnk_tgt0: 0x0 rir_offset0: 0x0
RIRWAYNESSLIMIT_1_MC_MAIN_REG
rir_val: 0 rir_limit: 0x1F rir_way: 0x0
RIRILV0OFFSET_1_MC_MAIN_REG
rir_rnk_tgt0: 0x0 rir_offset0: 0x0
RIRILV1OFFSET_1_MC_MAIN_REG
rir_rnk_tgt0: 0x0 rir_offset0: 0x0
RIRILV2OFFSET_1_MC_MAIN_REG
rir_rnk_tgt0: 0x0 rir_offset0: 0x0
RIRILV3OFFSET_1_MC_MAIN_REG
rir_rnk_tgt0: 0x0 rir_offset0: 0x0
RIRILV4OFFSET_1_MC_MAIN_REG
rir_rnk_tgt0: 0x0 rir_offset0: 0x0
RIRILV5OFFSET_1_MC_MAIN_REG
rir_rnk_tgt0: 0x0 rir_offset0: 0x0
RIRILV6OFFSET_1_MC_MAIN_REG
rir_rnk_tgt0: 0x0 rir_offset0: 0x0
RIRILV7OFFSET_1_MC_MAIN_REG
rir_rnk_tgt0: 0x0 rir_offset0: 0x0
RIRWAYNESSLIMIT_2_MC_MAIN_REG
rir_val: 0 rir_limit: 0x1F rir_way: 0x0
RIRILV0OFFSET_2_MC_MAIN_REG
rir_rnk_tgt0: 0x0 rir_offset0: 0x0
RIRILV1OFFSET_2_MC_MAIN_REG
rir_rnk_tgt0: 0x0 rir_offset0: 0x0
RIRILV2OFFSET_2_MC_MAIN_REG
rir_rnk_tgt0: 0x0 rir_offset0: 0x0
RIRILV3OFFSET_2_MC_MAIN_REG
rir_rnk_tgt0: 0x0 rir_offset0: 0x0
RIRILV4OFFSET_2_MC_MAIN_REG
rir_rnk_tgt0: 0x0 rir_offset0: 0x0
RIRILV5OFFSET_2_MC_MAIN_REG
rir_rnk_tgt0: 0x0 rir_offset0: 0x0
RIRILV6OFFSET_2_MC_MAIN_REG
rir_rnk_tgt0: 0x0 rir_offset0: 0x0
RIRILV7OFFSET_2_MC_MAIN_REG
rir_rnk_tgt0: 0x0 rir_offset0: 0x0
RIRWAYNESSLIMIT_3_MC_MAIN_REG
rir_val: 0 rir_limit: 0x1F rir_way: 0x0
RIRILV0OFFSET_3_MC_MAIN_REG
rir_rnk_tgt0: 0x0 rir_offset0: 0x0
RIRILV1OFFSET_3_MC_MAIN_REG
rir_rnk_tgt0: 0x0 rir_offset0: 0x0
RIRILV2OFFSET_3_MC_MAIN_REG
rir_rnk_tgt0: 0x0 rir_offset0: 0x0
RIRILV3OFFSET_3_MC_MAIN_REG
rir_rnk_tgt0: 0x0 rir_offset0: 0x0
RIRILV4OFFSET_3_MC_MAIN_REG
rir_rnk_tgt0: 0x0 rir_offset0: 0x0
RIRILV5OFFSET_3_MC_MAIN_REG
rir_rnk_tgt0: 0x0 rir_offset0: 0x0
RIRILV6OFFSET_3_MC_MAIN_REG
rir_rnk_tgt0: 0x0 rir_offset0: 0x0
RIRILV7OFFSET_3_MC_MAIN_REG
rir_rnk_tgt0: 0x0 rir_offset0: 0x0
Channel - 6
RIRWAYNESSLIMIT_0_MC_MAIN_REG
rir_val: 1 rir_limit: 0x1F rir_way: 0x0
RIRILV0OFFSET_0_MC_MAIN_REG
rir_rnk_tgt0: 0x0 rir_offset0: 0x0
RIRILV1OFFSET_0_MC_MAIN_REG
rir_rnk_tgt0: 0x0 rir_offset0: 0x0
RIRILV2OFFSET_0_MC_MAIN_REG
rir_rnk_tgt0: 0x0 rir_offset0: 0x0
RIRILV3OFFSET_0_MC_MAIN_REG
rir_rnk_tgt0: 0x0 rir_offset0: 0x0
RIRILV4OFFSET_0_MC_MAIN_REG
rir_rnk_tgt0: 0x0 rir_offset0: 0x0
RIRILV5OFFSET_0_MC_MAIN_REG
rir_rnk_tgt0: 0x0 rir_offset0: 0x0
RIRILV6OFFSET_0_MC_MAIN_REG
rir_rnk_tgt0: 0x0 rir_offset0: 0x0
RIRILV7OFFSET_0_MC_MAIN_REG
rir_rnk_tgt0: 0x0 rir_offset0: 0x0
RIRWAYNESSLIMIT_1_MC_MAIN_REG
rir_val: 0 rir_limit: 0x1F rir_way: 0x0
RIRILV0OFFSET_1_MC_MAIN_REG
rir_rnk_tgt0: 0x0 rir_offset0: 0x0
RIRILV1OFFSET_1_MC_MAIN_REG
rir_rnk_tgt0: 0x0 rir_offset0: 0x0
RIRILV2OFFSET_1_MC_MAIN_REG
rir_rnk_tgt0: 0x0 rir_offset0: 0x0
RIRILV3OFFSET_1_MC_MAIN_REG
rir_rnk_tgt0: 0x0 rir_offset0: 0x0
RIRILV4OFFSET_1_MC_MAIN_REG
rir_rnk_tgt0: 0x0 rir_offset0: 0x0
RIRILV5OFFSET_1_MC_MAIN_REG
rir_rnk_tgt0: 0x0 rir_offset0: 0x0
RIRILV6OFFSET_1_MC_MAIN_REG
rir_rnk_tgt0: 0x0 rir_offset0: 0x0
RIRILV7OFFSET_1_MC_MAIN_REG
rir_rnk_tgt0: 0x0 rir_offset0: 0x0
RIRWAYNESSLIMIT_2_MC_MAIN_REG
rir_val: 0 rir_limit: 0x1F rir_way: 0x0
RIRILV0OFFSET_2_MC_MAIN_REG
rir_rnk_tgt0: 0x0 rir_offset0: 0x0
RIRILV1OFFSET_2_MC_MAIN_REG
rir_rnk_tgt0: 0x0 rir_offset0: 0x0
RIRILV2OFFSET_2_MC_MAIN_REG
rir_rnk_tgt0: 0x0 rir_offset0: 0x0
RIRILV3OFFSET_2_MC_MAIN_REG
rir_rnk_tgt0: 0x0 rir_offset0: 0x0
RIRILV4OFFSET_2_MC_MAIN_REG
rir_rnk_tgt0: 0x0 rir_offset0: 0x0
RIRILV5OFFSET_2_MC_MAIN_REG
rir_rnk_tgt0: 0x0 rir_offset0: 0x0
RIRILV6OFFSET_2_MC_MAIN_REG
rir_rnk_tgt0: 0x0 rir_offset0: 0x0
RIRILV7OFFSET_2_MC_MAIN_REG
rir_rnk_tgt0: 0x0 rir_offset0: 0x0
RIRWAYNESSLIMIT_3_MC_MAIN_REG
rir_val: 0 rir_limit: 0x1F rir_way: 0x0
RIRILV0OFFSET_3_MC_MAIN_REG
rir_rnk_tgt0: 0x0 rir_offset0: 0x0
RIRILV1OFFSET_3_MC_MAIN_REG
rir_rnk_tgt0: 0x0 rir_offset0: 0x0
RIRILV2OFFSET_3_MC_MAIN_REG
rir_rnk_tgt0: 0x0 rir_offset0: 0x0
RIRILV3OFFSET_3_MC_MAIN_REG
rir_rnk_tgt0: 0x0 rir_offset0: 0x0
RIRILV4OFFSET_3_MC_MAIN_REG
rir_rnk_tgt0: 0x0 rir_offset0: 0x0
RIRILV5OFFSET_3_MC_MAIN_REG
rir_rnk_tgt0: 0x0 rir_offset0: 0x0
RIRILV6OFFSET_3_MC_MAIN_REG
rir_rnk_tgt0: 0x0 rir_offset0: 0x0
RIRILV7OFFSET_3_MC_MAIN_REG
rir_rnk_tgt0: 0x0 rir_offset0: 0x0
^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^
Write CHA CSRs for Socket: 1
^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^
TWO_LM_CONFIG_CHA_PMA_REG
enable: 0x1 mask: 0x3F mask_hi: 0x0
HA_COH_CHABC_SAD1_REG
dis_spec_rd: 0x0
lowMemBase: 0x0
lowMemSize: 0x20
highMemBase: 0x40
highMemSize: 0xFE0
TOLM: 0x1F
TOHM: 0x101F
C00: CSR for wait4bothhalves bit: AMAP_MC_MAIN_REG: 0x49
C00: CSR for wait4bothhalves bit: AMAP_MC_MAIN_REG: 0x49
C00: CSR for wait4bothhalves bit: AMAP_MC_MAIN_REG: 0x49
C00: CSR for wait4bothhalves bit: AMAP_MC_MAIN_REG: 0x49
M2mTwoWayCache: Enable 0 NonPreferredWayMask 0x001 PreferredReadFirst 1
M2mTwoWayCache: Enable 0 NonPreferredWayMask 0x001 PreferredReadFirst 1
SGX memory map status: 1
ValidPrmrrBitMap: 0x0
PrmrrCountPerPackage: 4
CPU encryptable range count: 0
Enter MemReservePsmiBuffers
Volatile memory mode not in 1LM, cannot allocate PSMI buffers.
Memory could not be reserved for PSMI buffers
N0:
<AdjustMemorySizeFieldsforMirror>
N1:
<AdjustMemorySizeFieldsforMirror>
N2:
<AdjustMemorySizeFieldsforMirror>
N3:
<AdjustMemorySizeFieldsforMirror>
N0: Total NM size:0x20
N0: SktTotMemMapSPA:0x0
N0: PMem performance knobs override disabled
N1: Total NM size:0x20
N1: SktTotMemMapSPA:0x0
N1: PMem performance knobs override disabled
DDR clustering mode is SNC4
[ScktId: 0] Initialize Memory Map - 16853ms
[ScktId: 1] Pipe Sync SBSP Variable Data -- Started
[ScktId: 0] Pipe Sync SBSP Variable Data -- Started
[ScktId: 1] Pipe Sync SBSP Variable Data - 15ms
[ScktId: 0] Pipe Sync SBSP Variable Data - 15ms
[ScktId: 1] Pipe Sync SBSP Memory Mode -- Started
[ScktId: 0] Pipe Sync SBSP Memory Mode -- Started
[ScktId: 1] Pipe Sync SBSP Memory Mode - 41ms
[ScktId: 0] Pipe Sync SBSP Memory Mode - 36ms
N1 Checked into Pipe
[ScktId: 0] TME Init Flow -- Started
[TME] Error: There is no TME encryptable memory ranges present in the system. Disabling TME...
[TME] 2lm detected! Disabling TME.
[ScktId: 0] TME Init Flow - 21ms
[ScktId: 1] Pipe Sync AP Final Error Sync -- Started
[ScktId: 0] Pipe Sync AP Final Error Sync -- Started
[ScktId: 0] Pipe Sync AP Final Error Sync - 10ms
[ScktId: 1] Pipe Sync AP Final Error Sync - 10ms
[ScktId: 0] MK-TME Flow -- Started
[ScktId: 1] MK-TME Flow -- Started
[ScktId: 1] MK-TME Flow - 7ms
[ScktId: 0] MK-TME Flow - 12ms
[ScktId: 1] Pipe Sync AP Final Error Sync -- Started
[ScktId: 0] Pipe Sync AP Final Error Sync -- Started
[ScktId: 1] Pipe Sync AP Final Error Sync - 13ms
[ScktId: 0] Pipe Sync AP Final Error Sync - 10ms
[ScktId: 1] TME Flow - PROGRAM_MSRS -- Started
[ScktId: 0] TME Flow - PROGRAM_MSRS -- Started
[ScktId: 0] TME Flow - PROGRAM_MSRS - 9ms
[ScktId: 1] TME Flow - PROGRAM_MSRS - 14ms
[ScktId: 0] Pipe Sync AP Final Error Sync -- Started
[ScktId: 1] Pipe Sync AP Final Error Sync -- Started
[ScktId: 0] Pipe Sync AP Final Error Sync - 14ms
[ScktId: 1] Pipe Sync AP Final Error Sync - 10ms
[ScktId: 0] SGX PreMem Check Capability MT -- Started
[ScktId: 1] SGX PreMem Check Capability MT -- Started
IsSafCapSupportedMt: MSR_FUSA_CAPABILITIES SafCap.Uint32 0xFE970AB800000011
[ScktId: 0] SGX PreMem Check Capability MT - 24ms
[ScktId: 1] SGX PreMem Check Capability MT - 19ms
[ScktId: 0] Pipe Sync AP Final Error Sync -- Started
[ScktId: 1] Pipe Sync AP Final Error Sync -- Started
[ScktId: 0] Pipe Sync AP Final Error Sync - 15ms
[ScktId: 1] Pipe Sync AP Final Error Sync - 10ms
[ScktId: 0] SGX PreMem Init -- Started
[ScktId: 1] SGX PreMem Init -- Started
[SGX] SgxPreMemInitSbsp BEGIN
[SGX] VerifyFeatureControl BEGIN
[SGX] MSR_IA32_FEATURE_CONTROL 0x0000000000000000
[SGX] SecurityPolicy.EnableSgx 0 SecurityPolicy.SgxLaunchControlEnable 1
[SGX] VerifyFeatureControl END
[SGX] VerifyHardwarePreconditions BEGIN
[SGX] VerifyHardwarePreconditions END
[ScktId: 1] SGX PreMem Init - 37ms
Error: GetSgxPrmrrData (Unsupported), continue...
[ScktId: 1] Pipe Sync AP Final Error Sync -- Started
Memory configuration is NOT valid for SGX!
SgxErrorCode = 0x19
[SGX] SgxPreMemInitSbsp END
[ScktId: 0] SGX PreMem Init - 66ms
[ScktId: 0] Pipe Sync AP Final Error Sync -- Started
[ScktId: 1] Pipe Sync AP Final Error Sync - 28ms
[ScktId: 0] Pipe Sync AP Final Error Sync - 5ms
[ScktId: 1] HBM Normal Mode -- Started
[ScktId: 0] HBM Normal Mode -- Started
HbmioMailbox - Disabling HBMIO uController
HbmioMailbox - Disabling HBMIO uController
Executing uc_halt on Socket 1, HBMIO 0
Executing uc_halt on Socket 0, HBMIO 0
Executing uc_halt on Socket 1, HBMIO 1
Executing uc_halt on Socket 0, HBMIO 1
Executing uc_halt on Socket 1, HBMIO 2
Executing uc_halt on Socket 0, HBMIO 2
Executing uc_halt on Socket 1, HBMIO 3
Executing uc_halt on Socket 0, HBMIO 3
Cmi Option Auto Selected
Cmi Option Auto Selected
[ScktId: 1] HBM Normal Mode - 55ms
[ScktId: 0] HBM Normal Mode - 53ms
[ScktId: 1] AP HBM Information -- Started
[ScktId: 0] AP HBM Information -- Started
[ScktId: 0] AP HBM Information - 9ms
[ScktId: 1] AP HBM Information - 13ms
[ScktId: 0] Switch to Normal Mode -- Started
[ScktId: 1] Switch to Normal Mode -- Started
S0 TME CPUID = 1
S1 TME CPUID = 1
S0 TmeActivated = 0
S1 TmeActivated = 0
S0 TME CPUID = 1
S1 TME CPUID = 1
S0 TmeActivated = 0
S1 TmeActivated = 0
S0 TME CPUID = 1
S1 TME CPUID = 1
S0 TmeActivated = 0
S1 TmeActivated = 0
S0 TME CPUID = 1
S1 TME CPUID = 1
S0 TmeActivated = 0
S1 TmeActivated = 0
S0 TME CPUID = 1
S1 TME CPUID = 1
S0 TmeActivated = 0
S1 TmeActivated = 0
S0 TME CPUID = 1
S1 TME CPUID = 1
S0 TmeActivated = 0
S1 TmeActivated = 0
S0 TME CPUID = 1
S1 TME CPUID = 1
S0 TmeActivated = 0
S1 TmeActivated = 0
S0 TME CPUID = 1
S1 TME CPUID = 1
S0 TmeActivated = 0
S1 TmeActivated = 0
S0 TME CPUID = 1
S1 TME CPUID = 1
S0 IntegrityActivated = 0
S1 IntegrityActivated = 0
DDRT-Link-Failure-WA-Applied: err_ack_timer_limit = 0xF0
DDRT-Link-Failure-WA-Applied: err_ack_timer_limit = 0xF0
DDRT-Link-Failure-WA-Applied: err_ack_cnt_limit = 0x0
DDRT-Link-Failure-WA-Applied: err_ack_cnt_limit = 0x0
DDRT-Link-Failure-WA-Applied: err_ack_timer_limit = 0xF0
DDRT-Link-Failure-WA-Applied: err_ack_timer_limit = 0xF0
DDRT-Link-Failure-WA-Applied: err_ack_cnt_limit = 0x0
DDRT-Link-Failure-WA-Applied: err_ack_cnt_limit = 0x0
DDRT-Link-Failure-WA-Applied: err_ack_timer_limit = 0xF0
DDRT-Link-Failure-WA-Applied: err_ack_timer_limit = 0xF0
DDRT-Link-Failure-WA-Applied: err_ack_cnt_limit = 0x0
DDRT-Link-Failure-WA-Applied: err_ack_cnt_limit = 0x0
DDRT-Link-Failure-WA-Applied: err_ack_timer_limit = 0xF0
DDRT-Link-Failure-WA-Applied: err_ack_timer_limit = 0xF0
DDRT-Link-Failure-WA-Applied: err_ack_cnt_limit = 0x0
DDRT-Link-Failure-WA-Applied: err_ack_cnt_limit = 0x0
LpModePmControlN0.Data Original = 0x88063
LpModePmControlN0.Data Original = 0x88063
LpModePmControlN1.Data Original = 0x71D00
LpModePmControlN1.Data Original = 0x71D00
LpModePmControlN0.Bits.datadllwakeuptime = 0x3
LpModePmControlN0.Bits.datadllwakeuptime = 0x3
LpModePmControlN1.Bits.datadllwakeuptime = 0x6
LpModePmControlN1.Bits.datadllwakeuptime = 0x6
MininalTclByHCLK = 0x13
MininalTclByHCLK = 0x13
LpModePmControlN0.Bits.lpmode_block_rd = 0x8
LpModePmControlN0.Bits.lpmode_block_rd = 0x8
LpModePmControlN0.Data New = 0xC1088063
LpModePmControlN0.Data New = 0xC1088063
LpModePmControlN1.Data New = 0x71D86
LpModePmControlN1.Data New = 0x71D86
LpModePmControlN0.Data Original = 0x88063
LpModePmControlN0.Data Original = 0x88063
LpModePmControlN1.Data Original = 0x71D00
LpModePmControlN1.Data Original = 0x71D00
LpModePmControlN0.Bits.datadllwakeuptime = 0x3
LpModePmControlN0.Bits.datadllwakeuptime = 0x3
LpModePmControlN1.Bits.datadllwakeuptime = 0x6
LpModePmControlN1.Bits.datadllwakeuptime = 0x6
MininalTclByHCLK = 0x13
MininalTclByHCLK = 0x13
LpModePmControlN0.Bits.lpmode_block_rd = 0x8
LpModePmControlN0.Bits.lpmode_block_rd = 0x8
LpModePmControlN0.Data New = 0xC1088063
LpModePmControlN0.Data New = 0xC1088063
LpModePmControlN1.Data New = 0x71D86
LpModePmControlN1.Data New = 0x71D86
LpModePmControlN0.Data Original = 0x88063
LpModePmControlN0.Data Original = 0x88063
LpModePmControlN1.Data Original = 0x71D00
LpModePmControlN1.Data Original = 0x71D00
LpModePmControlN0.Bits.datadllwakeuptime = 0x3
LpModePmControlN0.Bits.datadllwakeuptime = 0x3
LpModePmControlN1.Bits.datadllwakeuptime = 0x6
LpModePmControlN1.Bits.datadllwakeuptime = 0x6
MininalTclByHCLK = 0x13
MininalTclByHCLK = 0x13
LpModePmControlN0.Bits.lpmode_block_rd = 0x8
LpModePmControlN0.Bits.lpmode_block_rd = 0x8
LpModePmControlN0.Data New = 0xC1088063
LpModePmControlN0.Data New = 0xC1088063
LpModePmControlN1.Data New = 0x71D86
LpModePmControlN1.Data New = 0x71D86
LpModePmControlN0.Data Original = 0x88063
LpModePmControlN0.Data Original = 0x88063
LpModePmControlN1.Data Original = 0x71D00
LpModePmControlN1.Data Original = 0x71D00
LpModePmControlN0.Bits.datadllwakeuptime = 0x3
LpModePmControlN0.Bits.datadllwakeuptime = 0x3
LpModePmControlN1.Bits.datadllwakeuptime = 0x6
LpModePmControlN1.Bits.datadllwakeuptime = 0x6
MininalTclByHCLK = 0x13
MininalTclByHCLK = 0x13
LpModePmControlN0.Bits.lpmode_block_rd = 0x8
LpModePmControlN0.Bits.lpmode_block_rd = 0x8
LpModePmControlN0.Data New = 0xC1088063
LpModePmControlN0.Data New = 0xC1088063
LpModePmControlN1.Data New = 0x71D86
LpModePmControlN1.Data New = 0x71D86
[ScktId: 0] Switch to Normal Mode - 435ms
[ScktId: 1] Switch to Normal Mode - 435ms
[ScktId: 0] Init CMI Credit Programming -- Started
[ScktId: 1] Init CMI Credit Programming -- Started
Cmi Option Auto Selected
Cmi Option Auto Selected
MemMc Cmi Data Version: 1
MemMc Cmi Data Version: 1
S0 TME CPUID = 1
S1 TME CPUID = 1
S0 TmeActivated = 0
S1 TmeActivated = 0
TmeEnabled: 0
TmeEnabled: 0
TwoLmEnabled: 0
TwoLmEnabled: 0
2LM_XTILE: 0
2LM_XTILE: 0
CMI Credit Data for CPU Stepping: Ex and Later
CMI Credit Data for CPU Stepping: Ex and Later
S0 TME CPUID = 1
S1 TME CPUID = 1
S0 TmeActivated = 0
S1 TmeActivated = 0
TmeEnabled: 0
TmeEnabled: 0
TwoLmEnabled: 0
TwoLmEnabled: 0
2LM_XTILE: 0
2LM_XTILE: 0
CMI Credit Data for CPU Stepping: Ex and Later
CMI Credit Data for CPU Stepping: Ex and Later
S0 TME CPUID = 1
S1 TME CPUID = 1
S0 TmeActivated = 0
S1 TmeActivated = 0
TmeEnabled: 0
TmeEnabled: 0
TwoLmEnabled: 0
TwoLmEnabled: 0
2LM_XTILE: 0
2LM_XTILE: 0
CMI Credit Data for CPU Stepping: Ex and Later
CMI Credit Data for CPU Stepping: Ex and Later
S0 TME CPUID = 1
S1 TME CPUID = 1
S0 TmeActivated = 0
S1 TmeActivated = 0
TmeEnabled: 0
TmeEnabled: 0
TwoLmEnabled: 0
TwoLmEnabled: 0
2LM_XTILE: 0
2LM_XTILE: 0
CMI Credit Data for CPU Stepping: Ex and Later
CMI Credit Data for CPU Stepping: Ex and Later
S0 TME CPUID = 1
S1 TME CPUID = 1
S0 TmeActivated = 0
S1 TmeActivated = 0
TmeEnabled: 0
TmeEnabled: 0
TwoLmEnabled: 0
TwoLmEnabled: 0
2LM_XTILE: 0
2LM_XTILE: 0
CMI Credit Data for CPU Stepping: Ex and Later
CMI Credit Data for CPU Stepping: Ex and Later
S0 TME CPUID = 1
S1 TME CPUID = 1
S0 TmeActivated = 0
S1 TmeActivated = 0
TmeEnabled: 0
TmeEnabled: 0
TwoLmEnabled: 0
TwoLmEnabled: 0
2LM_XTILE: 0
2LM_XTILE: 0
CMI Credit Data for CPU Stepping: Ex and Later
CMI Credit Data for CPU Stepping: Ex and Later
S0 TME CPUID = 1
S1 TME CPUID = 1
S0 TmeActivated = 0
S1 TmeActivated = 0
TmeEnabled: 0
TmeEnabled: 0
TwoLmEnabled: 0
TwoLmEnabled: 0
2LM_XTILE: 0
2LM_XTILE: 0
CMI Credit Data for CPU Stepping: Ex and Later
CMI Credit Data for CPU Stepping: Ex and Later
S0 TME CPUID = 1
S1 TME CPUID = 1
S0 TmeActivated = 0
S1 TmeActivated = 0
TmeEnabled: 0
TmeEnabled: 0
TwoLmEnabled: 0
TwoLmEnabled: 0
2LM_XTILE: 0
2LM_XTILE: 0
CMI Credit Data for CPU Stepping: Ex and Later
CMI Credit Data for CPU Stepping: Ex and Later
S0 TME CPUID = 1
S1 TME CPUID = 1
S0 TmeActivated = 0
S1 TmeActivated = 0
TmeEnabled: 0
TmeEnabled: 0
TwoLmEnabled: 0
TwoLmEnabled: 0
2LM_XTILE: 0
2LM_XTILE: 0
CMI Credit Data for CPU Stepping: Ex and Later
CMI Credit Data for CPU Stepping: Ex and Later
S0 TME CPUID = 1
S1 TME CPUID = 1
S0 TmeActivated = 0
S1 TmeActivated = 0
TmeEnabled: 0
TmeEnabled: 0
TwoLmEnabled: 0
TwoLmEnabled: 0
2LM_XTILE: 0
2LM_XTILE: 0
CMI Credit Data for CPU Stepping: Ex and Later
CMI Credit Data for CPU Stepping: Ex and Later
S0 TME CPUID = 1
S1 TME CPUID = 1
S0 TmeActivated = 0
S1 TmeActivated = 0
TmeEnabled: 0
TmeEnabled: 0
TwoLmEnabled: 0
TwoLmEnabled: 0
2LM_XTILE: 0
2LM_XTILE: 0
CMI Credit Data for CPU Stepping: Ex and Later
CMI Credit Data for CPU Stepping: Ex and Later
S0 TME CPUID = 1
S1 TME CPUID = 1
S0 TmeActivated = 0
S1 TmeActivated = 0
TmeEnabled: 0
TmeEnabled: 0
TwoLmEnabled: 0
TwoLmEnabled: 0
2LM_XTILE: 0
2LM_XTILE: 0
CMI Credit Data for CPU Stepping: Ex and Later
CMI Credit Data for CPU Stepping: Ex and Later
S0 TME CPUID = 1
S1 TME CPUID = 1
S0 TmeActivated = 0
S1 TmeActivated = 0
TmeEnabled: 0
TmeEnabled: 0
TwoLmEnabled: 0
TwoLmEnabled: 0
2LM_XTILE: 0
2LM_XTILE: 0
CMI Credit Data for CPU Stepping: Ex and Later
CMI Credit Data for CPU Stepping: Ex and Later
S0 TME CPUID = 1
S1 TME CPUID = 1
S0 TmeActivated = 0
S1 TmeActivated = 0
TmeEnabled: 0
TmeEnabled: 0
TwoLmEnabled: 0
TwoLmEnabled: 0
2LM_XTILE: 0
2LM_XTILE: 0
CMI Credit Data for CPU Stepping: Ex and Later
CMI Credit Data for CPU Stepping: Ex and Later
S0 TME CPUID = 1
S1 TME CPUID = 1
S0 TmeActivated = 0
S1 TmeActivated = 0
TmeEnabled: 0
TmeEnabled: 0
TwoLmEnabled: 0
TwoLmEnabled: 0
2LM_XTILE: 0
2LM_XTILE: 0
CMI Credit Data for CPU Stepping: Ex and Later
CMI Credit Data for CPU Stepping: Ex and Later
S0 TME CPUID = 1
S1 TME CPUID = 1
S0 TmeActivated = 0
S1 TmeActivated = 0
TmeEnabled: 0
TmeEnabled: 0
TwoLmEnabled: 0
TwoLmEnabled: 0
2LM_XTILE: 0
2LM_XTILE: 0
CMI Credit Data for CPU Stepping: Ex and Later
CMI Credit Data for CPU Stepping: Ex and Later
S0 TME CPUID = 1
S1 TME CPUID = 1
S0 TmeActivated = 0
S1 TmeActivated = 0
TmeEnabled: 0
TmeEnabled: 0
TwoLmEnabled: 0
TwoLmEnabled: 0
2LM_XTILE: 0
2LM_XTILE: 0
CMI Credit Data for CPU Stepping: Ex and Later
CMI Credit Data for CPU Stepping: Ex and Later
S0 TME CPUID = 1
S1 TME CPUID = 1
S0 TmeActivated = 0
S1 TmeActivated = 0
TmeEnabled: 0
TmeEnabled: 0
TwoLmEnabled: 0
TwoLmEnabled: 0
2LM_XTILE: 0
2LM_XTILE: 0
CMI Credit Data for CPU Stepping: Ex and Later
CMI Credit Data for CPU Stepping: Ex and Later
S0 TME CPUID = 1
S1 TME CPUID = 1
S0 TmeActivated = 0
S1 TmeActivated = 0
TmeEnabled: 0
TmeEnabled: 0
TwoLmEnabled: 0
TwoLmEnabled: 0
2LM_XTILE: 0
2LM_XTILE: 0
CMI Credit Data for CPU Stepping: Ex and Later
CMI Credit Data for CPU Stepping: Ex and Later
S0 TME CPUID = 1
S1 TME CPUID = 1
S0 TmeActivated = 0
S1 TmeActivated = 0
TmeEnabled: 0
TmeEnabled: 0
TwoLmEnabled: 0
TwoLmEnabled: 0
2LM_XTILE: 0
2LM_XTILE: 0
CMI Credit Data for CPU Stepping: Ex and Later
CMI Credit Data for CPU Stepping: Ex and Later
S0 TME CPUID = 1
S1 TME CPUID = 1
S0 TmeActivated = 0
S1 TmeActivated = 0
TmeEnabled: 0
TmeEnabled: 0
TwoLmEnabled: 0
TwoLmEnabled: 0
2LM_XTILE: 0
2LM_XTILE: 0
CMI Credit Data for CPU Stepping: Ex and Later
CMI Credit Data for CPU Stepping: Ex and Later
S0 TME CPUID = 1
S1 TME CPUID = 1
S0 TmeActivated = 0
S1 TmeActivated = 0
TmeEnabled: 0
TmeEnabled: 0
TwoLmEnabled: 0
TwoLmEnabled: 0
2LM_XTILE: 0
2LM_XTILE: 0
CMI Credit Data for CPU Stepping: Ex and Later
CMI Credit Data for CPU Stepping: Ex and Later
S0 TME CPUID = 1
S1 TME CPUID = 1
S0 TmeActivated = 0
S1 TmeActivated = 0
TmeEnabled: 0
TmeEnabled: 0
TwoLmEnabled: 0
TwoLmEnabled: 0
2LM_XTILE: 0
2LM_XTILE: 0
CMI Credit Data for CPU Stepping: Ex and Later
CMI Credit Data for CPU Stepping: Ex and Later
S0 TME CPUID = 1
S1 TME CPUID = 1
S0 TmeActivated = 0
S1 TmeActivated = 0
TmeEnabled: 0
TmeEnabled: 0
TwoLmEnabled: 0
TwoLmEnabled: 0
2LM_XTILE: 0
2LM_XTILE: 0
CMI Credit Data for CPU Stepping: Ex and Later
CMI Credit Data for CPU Stepping: Ex and Later
S0 TME CPUID = 1
S1 TME CPUID = 1
S0 TmeActivated = 0
S1 TmeActivated = 0
TmeEnabled: 0
TmeEnabled: 0
TwoLmEnabled: 0
TwoLmEnabled: 0
2LM_XTILE: 0
2LM_XTILE: 0
CMI Credit Data for CPU Stepping: Ex and Later
CMI Credit Data for CPU Stepping: Ex and Later
S0 TME CPUID = 1
S1 TME CPUID = 1
S0 TmeActivated = 0
S1 TmeActivated = 0
TmeEnabled: 0
TmeEnabled: 0
TwoLmEnabled: 0
TwoLmEnabled: 0
2LM_XTILE: 0
2LM_XTILE: 0
CMI Credit Data for CPU Stepping: Ex and Later
CMI Credit Data for CPU Stepping: Ex and Later
S0 TME CPUID = 1
S1 TME CPUID = 1
S0 TmeActivated = 0
S1 TmeActivated = 0
TmeEnabled: 0
TmeEnabled: 0
TwoLmEnabled: 0
TwoLmEnabled: 0
2LM_XTILE: 0
2LM_XTILE: 0
CMI Credit Data for CPU Stepping: Ex and Later
CMI Credit Data for CPU Stepping: Ex and Later
S0 TME CPUID = 1
S1 TME CPUID = 1
S0 TmeActivated = 0
S1 TmeActivated = 0
TmeEnabled: 0
TmeEnabled: 0
TwoLmEnabled: 0
TwoLmEnabled: 0
2LM_XTILE: 0
2LM_XTILE: 0
CMI Credit Data for CPU Stepping: Ex and Later
CMI Credit Data for CPU Stepping: Ex and Later
S0 TME CPUID = 1
S1 TME CPUID = 1
S0 TmeActivated = 0
S1 TmeActivated = 0
TmeEnabled: 0
TmeEnabled: 0
TwoLmEnabled: 0
TwoLmEnabled: 0
2LM_XTILE: 0
2LM_XTILE: 0
CMI Credit Data for CPU Stepping: Ex and Later
CMI Credit Data for CPU Stepping: Ex and Later
S0 TME CPUID = 1
S1 TME CPUID = 1
S0 TmeActivated = 0
S1 TmeActivated = 0
TmeEnabled: 0
TmeEnabled: 0
TwoLmEnabled: 0
TwoLmEnabled: 0
2LM_XTILE: 0
2LM_XTILE: 0
CMI Credit Data for CPU Stepping: Ex and Later
CMI Credit Data for CPU Stepping: Ex and Later
S0 TME CPUID = 1
S1 TME CPUID = 1
S0 TmeActivated = 0
S1 TmeActivated = 0
TmeEnabled: 0
TmeEnabled: 0
TwoLmEnabled: 0
TwoLmEnabled: 0
2LM_XTILE: 0
2LM_XTILE: 0
CMI Credit Data for CPU Stepping: Ex and Later
CMI Credit Data for CPU Stepping: Ex and Later
S0 TME CPUID = 1
S1 TME CPUID = 1
S0 TmeActivated = 0
S1 TmeActivated = 0
TmeEnabled: 0
TmeEnabled: 0
TwoLmEnabled: 0
TwoLmEnabled: 0
2LM_XTILE: 0
2LM_XTILE: 0
CMI Credit Data for CPU Stepping: Ex and Later
CMI Credit Data for CPU Stepping: Ex and Later
S0 TME CPUID = 1
S1 TME CPUID = 1
S0 TmeActivated = 0
S1 TmeActivated = 0
TmeEnabled: 0
TmeEnabled: 0
TwoLmEnabled: 0
TwoLmEnabled: 0
2LM_XTILE: 0
2LM_XTILE: 0
CMI Credit Data for CPU Stepping: Ex and Later
CMI Credit Data for CPU Stepping: Ex and Later
S0 TME CPUID = 1
S1 TME CPUID = 1
S0 TmeActivated = 0
S1 TmeActivated = 0
TmeEnabled: 0
TmeEnabled: 0
TwoLmEnabled: 0
TwoLmEnabled: 0
2LM_XTILE: 0
2LM_XTILE: 0
CMI Credit Data for CPU Stepping: Ex and Later
CMI Credit Data for CPU Stepping: Ex and Later
S0 TME CPUID = 1
S1 TME CPUID = 1
S0 TmeActivated = 0
S1 TmeActivated = 0
TmeEnabled: 0
TmeEnabled: 0
TwoLmEnabled: 0
TwoLmEnabled: 0
2LM_XTILE: 0
2LM_XTILE: 0
CMI Credit Data for CPU Stepping: Ex and Later
CMI Credit Data for CPU Stepping: Ex and Later
S0 TME CPUID = 1
S1 TME CPUID = 1
S0 TmeActivated = 0
S1 TmeActivated = 0
TmeEnabled: 0
TmeEnabled: 0
TwoLmEnabled: 0
TwoLmEnabled: 0
2LM_XTILE: 0
2LM_XTILE: 0
CMI Credit Data for CPU Stepping: Ex and Later
CMI Credit Data for CPU Stepping: Ex and Later
Mesh2Mem CMI Data Version: 1
Mesh2Mem CMI Data Version: 1
S0 TME CPUID = 1
S1 TME CPUID = 1
S0 TmeActivated = 0
S1 TmeActivated = 0
TmeEnabled: 0
TmeEnabled: 0
TwoLmEnabled: 0
TwoLmEnabled: 0
2LM_XTILE: 0
2LM_XTILE: 0
CMI Credit Data for CPU Stepping: Ex and Later
CMI Credit Data for CPU Stepping: Ex and Later
S0 TME CPUID = 1
S1 TME CPUID = 1
S0 TmeActivated = 0
S1 TmeActivated = 0
TmeEnabled: 0
TmeEnabled: 0
TwoLmEnabled: 0
TwoLmEnabled: 0
2LM_XTILE: 0
2LM_XTILE: 0
CMI Credit Data for CPU Stepping: Ex and Later
CMI Credit Data for CPU Stepping: Ex and Later
S0 TME CPUID = 1
S1 TME CPUID = 1
S0 TmeActivated = 0
S1 TmeActivated = 0
TmeEnabled: 0
TmeEnabled: 0
TwoLmEnabled: 0
TwoLmEnabled: 0
2LM_XTILE: 0
2LM_XTILE: 0
CMI Credit Data for CPU Stepping: Ex and Later
CMI Credit Data for CPU Stepping: Ex and Later
S0 TME CPUID = 1
S1 TME CPUID = 1
S0 TmeActivated = 0
S1 TmeActivated = 0
McTme CMI Data Version: 1
McTme CMI Data Version: 1
S0 TME CPUID = 1
S1 TME CPUID = 1
S0 TmeActivated = 0
S1 TmeActivated = 0
TmeEnabled: 0
TmeEnabled: 0
TwoLmEnabled: 0
TwoLmEnabled: 0
2LM_XTILE: 0
2LM_XTILE: 0
CMI Credit Data for CPU Stepping: Ex and Later
CMI Credit Data for CPU Stepping: Ex and Later
S0 TME CPUID = 1
S1 TME CPUID = 1
S0 TmeActivated = 0
S1 TmeActivated = 0
TmeEnabled: 0
TmeEnabled: 0
TwoLmEnabled: 0
TwoLmEnabled: 0
2LM_XTILE: 0
2LM_XTILE: 0
CMI Credit Data for CPU Stepping: Ex and Later
CMI Credit Data for CPU Stepping: Ex and Later
S0 TME CPUID = 1
S1 TME CPUID = 1
S0 TmeActivated = 0
S1 TmeActivated = 0
TmeEnabled: 0
TmeEnabled: 0
TwoLmEnabled: 0
TwoLmEnabled: 0
2LM_XTILE: 0
2LM_XTILE: 0
CMI Credit Data for CPU Stepping: Ex and Later
CMI Credit Data for CPU Stepping: Ex and Later
S0 TME CPUID = 1
S1 TME CPUID = 1
S0 TmeActivated = 0
S1 TmeActivated = 0
TmeEnabled: 0
TmeEnabled: 0
TwoLmEnabled: 0
TwoLmEnabled: 0
2LM_XTILE: 0
2LM_XTILE: 0
CMI Credit Data for CPU Stepping: Ex and Later
CMI Credit Data for CPU Stepping: Ex and Later
S0 TME CPUID = 1
S1 TME CPUID = 1
S0 TmeActivated = 0
S1 TmeActivated = 0
TmeEnabled: 0
TmeEnabled: 0
TwoLmEnabled: 0
TwoLmEnabled: 0
2LM_XTILE: 0
2LM_XTILE: 0
CMI Credit Data for CPU Stepping: Ex and Later
CMI Credit Data for CPU Stepping: Ex and Later
Mesh2Mem CMI Data Version: 1
Mesh2Mem CMI Data Version: 1
S0 TME CPUID = 1
S1 TME CPUID = 1
S0 TmeActivated = 0
S1 TmeActivated = 0
TmeEnabled: 0
TmeEnabled: 0
TwoLmEnabled: 0
TwoLmEnabled: 0
2LM_XTILE: 0
2LM_XTILE: 0
CMI Credit Data for CPU Stepping: Ex and Later
CMI Credit Data for CPU Stepping: Ex and Later
S0 TME CPUID = 1
S1 TME CPUID = 1
S0 TmeActivated = 0
S1 TmeActivated = 0
TmeEnabled: 0
TmeEnabled: 0
TwoLmEnabled: 0
TwoLmEnabled: 0
2LM_XTILE: 0
2LM_XTILE: 0
CMI Credit Data for CPU Stepping: Ex and Later
CMI Credit Data for CPU Stepping: Ex and Later
S0 TME CPUID = 1
S1 TME CPUID = 1
S0 TmeActivated = 0
S1 TmeActivated = 0
TmeEnabled: 0
TmeEnabled: 0
TwoLmEnabled: 0
TwoLmEnabled: 0
2LM_XTILE: 0
2LM_XTILE: 0
CMI Credit Data for CPU Stepping: Ex and Later
CMI Credit Data for CPU Stepping: Ex and Later
S0 TME CPUID = 1
S1 TME CPUID = 1
S0 TmeActivated = 0
S1 TmeActivated = 0
S0 TME CPUID = 1
S1 TME CPUID = 1
S0 TmeActivated = 0
S1 TmeActivated = 0
TmeEnabled: 0
TmeEnabled: 0
TwoLmEnabled: 0
TwoLmEnabled: 0
2LM_XTILE: 0
2LM_XTILE: 0
CMI Credit Data for CPU Stepping: Ex and Later
CMI Credit Data for CPU Stepping: Ex and Later
S0 TME CPUID = 1
S1 TME CPUID = 1
S0 TmeActivated = 0
S1 TmeActivated = 0
TmeEnabled: 0
TmeEnabled: 0
TwoLmEnabled: 0
TwoLmEnabled: 0
2LM_XTILE: 0
2LM_XTILE: 0
CMI Credit Data for CPU Stepping: Ex and Later
CMI Credit Data for CPU Stepping: Ex and Later
S0 TME CPUID = 1
S1 TME CPUID = 1
S0 TmeActivated = 0
S1 TmeActivated = 0
TmeEnabled: 0
TmeEnabled: 0
TwoLmEnabled: 0
TwoLmEnabled: 0
2LM_XTILE: 0
2LM_XTILE: 0
CMI Credit Data for CPU Stepping: Ex and Later
CMI Credit Data for CPU Stepping: Ex and Later
S0 TME CPUID = 1
S1 TME CPUID = 1
S0 TmeActivated = 0
S1 TmeActivated = 0
TmeEnabled: 0
TmeEnabled: 0
TwoLmEnabled: 0
TwoLmEnabled: 0
2LM_XTILE: 0
2LM_XTILE: 0
CMI Credit Data for CPU Stepping: Ex and Later
CMI Credit Data for CPU Stepping: Ex and Later
S0 TME CPUID = 1
S1 TME CPUID = 1
S0 TmeActivated = 0
S1 TmeActivated = 0
TmeEnabled: 0
TmeEnabled: 0
TwoLmEnabled: 0
TwoLmEnabled: 0
2LM_XTILE: 0
2LM_XTILE: 0
CMI Credit Data for CPU Stepping: Ex and Later
CMI Credit Data for CPU Stepping: Ex and Later
Mesh2Mem CMI Data Version: 1
Mesh2Mem CMI Data Version: 1
S0 TME CPUID = 1
S1 TME CPUID = 1
S0 TmeActivated = 0
S1 TmeActivated = 0
TmeEnabled: 0
TmeEnabled: 0
TwoLmEnabled: 0
TwoLmEnabled: 0
2LM_XTILE: 0
2LM_XTILE: 0
CMI Credit Data for CPU Stepping: Ex and Later
CMI Credit Data for CPU Stepping: Ex and Later
S0 TME CPUID = 1
S1 TME CPUID = 1
S0 TmeActivated = 0
S1 TmeActivated = 0
TmeEnabled: 0
TmeEnabled: 0
TwoLmEnabled: 0
TwoLmEnabled: 0
2LM_XTILE: 0
2LM_XTILE: 0
CMI Credit Data for CPU Stepping: Ex and Later
CMI Credit Data for CPU Stepping: Ex and Later
S0 TME CPUID = 1
S1 TME CPUID = 1
S0 TmeActivated = 0
S1 TmeActivated = 0
TmeEnabled: 0
TmeEnabled: 0
TwoLmEnabled: 0
TwoLmEnabled: 0
2LM_XTILE: 0
2LM_XTILE: 0
CMI Credit Data for CPU Stepping: Ex and Later
CMI Credit Data for CPU Stepping: Ex and Later
S0 TME CPUID = 1
S1 TME CPUID = 1
S0 TmeActivated = 0
S1 TmeActivated = 0
S0 TME CPUID = 1
S1 TME CPUID = 1
S0 TmeActivated = 0
S1 TmeActivated = 0
TmeEnabled: 0
TmeEnabled: 0
TwoLmEnabled: 0
TwoLmEnabled: 0
2LM_XTILE: 0
2LM_XTILE: 0
CMI Credit Data for CPU Stepping: Ex and Later
CMI Credit Data for CPU Stepping: Ex and Later
S0 TME CPUID = 1
S1 TME CPUID = 1
S0 TmeActivated = 0
S1 TmeActivated = 0
TmeEnabled: 0
TmeEnabled: 0
TwoLmEnabled: 0
TwoLmEnabled: 0
2LM_XTILE: 0
2LM_XTILE: 0
CMI Credit Data for CPU Stepping: Ex and Later
CMI Credit Data for CPU Stepping: Ex and Later
S0 TME CPUID = 1
S1 TME CPUID = 1
S0 TmeActivated = 0
S1 TmeActivated = 0
TmeEnabled: 0
TmeEnabled: 0
TwoLmEnabled: 0
TwoLmEnabled: 0
2LM_XTILE: 0
2LM_XTILE: 0
CMI Credit Data for CPU Stepping: Ex and Later
CMI Credit Data for CPU Stepping: Ex and Later
S0 TME CPUID = 1
S1 TME CPUID = 1
S0 TmeActivated = 0
S1 TmeActivated = 0
TmeEnabled: 0
TmeEnabled: 0
TwoLmEnabled: 0
TwoLmEnabled: 0
2LM_XTILE: 0
2LM_XTILE: 0
CMI Credit Data for CPU Stepping: Ex and Later
CMI Credit Data for CPU Stepping: Ex and Later
S0 TME CPUID = 1
S1 TME CPUID = 1
S0 TmeActivated = 0
S1 TmeActivated = 0
TmeEnabled: 0
TmeEnabled: 0
TwoLmEnabled: 0
TwoLmEnabled: 0
2LM_XTILE: 0
2LM_XTILE: 0
CMI Credit Data for CPU Stepping: Ex and Later
CMI Credit Data for CPU Stepping: Ex and Later
Mesh2Mem CMI Data Version: 1
Mesh2Mem CMI Data Version: 1
S0 TME CPUID = 1
S1 TME CPUID = 1
S0 TmeActivated = 0
S1 TmeActivated = 0
TmeEnabled: 0
TmeEnabled: 0
TwoLmEnabled: 0
TwoLmEnabled: 0
2LM_XTILE: 0
2LM_XTILE: 0
CMI Credit Data for CPU Stepping: Ex and Later
CMI Credit Data for CPU Stepping: Ex and Later
S0 TME CPUID = 1
S1 TME CPUID = 1
S0 TmeActivated = 0
S1 TmeActivated = 0
TmeEnabled: 0
TmeEnabled: 0
TwoLmEnabled: 0
TwoLmEnabled: 0
2LM_XTILE: 0
2LM_XTILE: 0
CMI Credit Data for CPU Stepping: Ex and Later
CMI Credit Data for CPU Stepping: Ex and Later
S0 TME CPUID = 1
S1 TME CPUID = 1
S0 TmeActivated = 0
S1 TmeActivated = 0
TmeEnabled: 0
TmeEnabled: 0
TwoLmEnabled: 0
TwoLmEnabled: 0
2LM_XTILE: 0
2LM_XTILE: 0
CMI Credit Data for CPU Stepping: Ex and Later
CMI Credit Data for CPU Stepping: Ex and Later
S0 TME CPUID = 1
S1 TME CPUID = 1
S0 TmeActivated = 0
S1 TmeActivated = 0
S0 TME CPUID = 1
S1 TME CPUID = 1
S0 TmeActivated = 0
S1 TmeActivated = 0
TmeEnabled: 0
TmeEnabled: 0
TwoLmEnabled: 0
TwoLmEnabled: 0
2LM_XTILE: 0
2LM_XTILE: 0
CMI Credit Data for CPU Stepping: Ex and Later
CMI Credit Data for CPU Stepping: Ex and Later
S0 TME CPUID = 1
S1 TME CPUID = 1
S0 TmeActivated = 0
S1 TmeActivated = 0
TmeEnabled: 0
TmeEnabled: 0
TwoLmEnabled: 0
TwoLmEnabled: 0
2LM_XTILE: 0
2LM_XTILE: 0
CMI Credit Data for CPU Stepping: Ex and Later
CMI Credit Data for CPU Stepping: Ex and Later
S0 TME CPUID = 1
S1 TME CPUID = 1
S0 TmeActivated = 0
S1 TmeActivated = 0
TmeEnabled: 0
TmeEnabled: 0
TwoLmEnabled: 0
TwoLmEnabled: 0
2LM_XTILE: 0
2LM_XTILE: 0
CMI Credit Data for CPU Stepping: Ex and Later
CMI Credit Data for CPU Stepping: Ex and Later
S0 TME CPUID = 1
S1 TME CPUID = 1
S0 TmeActivated = 0
S1 TmeActivated = 0
TmeEnabled: 0
TmeEnabled: 0
TwoLmEnabled: 0
TwoLmEnabled: 0
2LM_XTILE: 0
2LM_XTILE: 0
CMI Credit Data for CPU Stepping: Ex and Later
CMI Credit Data for CPU Stepping: Ex and Later
S0 TME CPUID = 1
S1 TME CPUID = 1
S0 TmeActivated = 0
S1 TmeActivated = 0
TmeEnabled: 0
TmeEnabled: 0
TwoLmEnabled: 0
TwoLmEnabled: 0
2LM_XTILE: 0
2LM_XTILE: 0
CMI Credit Data for CPU Stepping: Ex and Later
CMI Credit Data for CPU Stepping: Ex and Later
S0 TME CPUID = 1
S1 TME CPUID = 1
S0 TmeActivated = 0
S1 TmeActivated = 0
S0 TME CPUID = 1
S1 TME CPUID = 1
S0 TmeActivated = 0
S1 TmeActivated = 0
S0 TME CPUID = 1
S1 TME CPUID = 1
S0 TmeActivated = 0
S1 TmeActivated = 0
S0 TME CPUID = 1
S1 TME CPUID = 1
S0 TmeActivated = 0
S1 TmeActivated = 0
S0 TME CPUID = 1
S1 TME CPUID = 1
S0 TmeActivated = 0
S1 TmeActivated = 0
S0 TME CPUID = 1
S1 TME CPUID = 1
S0 TmeActivated = 0
S1 TmeActivated = 0
S0 TME CPUID = 1
S1 TME CPUID = 1
S0 TmeActivated = 0
S1 TmeActivated = 0
S0 TME CPUID = 1
S1 TME CPUID = 1
S0 TmeActivated = 0
S1 TmeActivated = 0
[ScktId: 0] Init CMI Credit Programming - 1904ms
[ScktId: 1] Init CMI Credit Programming - 1902ms
[ScktId: 0] Program TME Cfg register for SGX/TDX -- Started
[ScktId: 1] Program TME Cfg register for SGX/TDX -- Started
DisableTdxTdMismatchBit return fail: Aborted
DisableTdxTdMismatchBit return fail: Aborted
[ScktId: 1] Program TME Cfg register for SGX/TDX - 17ms
[ScktId: 0] Program TME Cfg register for SGX/TDX - 26ms
[ScktId: 1] Pipe Sync AP Final Error Sync -- Started
[ScktId: 0] Pipe Sync AP Final Error Sync -- Started
[ScktId: 1] Pipe Sync AP Final Error Sync - 16ms
[ScktId: 0] Pipe Sync AP Final Error Sync - 10ms
N1 Checked into Pipe
[ScktId: 0] Initialize ADR -- Started
[ScktId: 0] Initialize ADR - 5ms
N1 Checked into Pipe
[ScktId: 0] Set RAS Configuration -- Started
N0: ProbabilisticTargetedRowRefreshInit Enable
SetPatrolScrub execution on Skt 0
N0: ScrubFactor: 86400, MemSize: 20, Scrub Interval:29E8
N0: ScrubFactor: 86400, MemSize: 20, Scrub Interval:29E8
N0: ScrubFactor: 86400, MemSize: 20, Scrub Interval:29E8
N0: ScrubFactor: 86400, MemSize: 20, Scrub Interval:29E8
N0: ScrubFactor: 86400, MemSize: 20, Scrub Interval:29E8
N0: ScrubFactor: 86400, MemSize: 20, Scrub Interval:29E8
N0: ScrubFactor: 86400, MemSize: 20, Scrub Interval:29E8
N0: ScrubFactor: 86400, MemSize: 20, Scrub Interval:29E8
N0: ScrubFactor: 86400, MemSize: 20, Scrub Interval:29E8
N0: ScrubFactor: 86400, MemSize: 20, Scrub Interval:29E8
N0: ScrubFactor: 86400, MemSize: 20, Scrub Interval:29E8
N0: ScrubFactor: 86400, MemSize: 20, Scrub Interval:29E8
N0: ScrubFactor: 86400, MemSize: 20, Scrub Interval:29E8
N0: ScrubFactor: 86400, MemSize: 20, Scrub Interval:29E8
N0: ScrubFactor: 86400, MemSize: 20, Scrub Interval:29E8
N0: ScrubFactor: 86400, MemSize: 20, Scrub Interval:29E8
[imc] ConfigSystemRetryRegister start
N1: ProbabilisticTargetedRowRefreshInit Enable
SetPatrolScrub execution on Skt 1
N1: ScrubFactor: 86400, MemSize: 20, Scrub Interval:29E8
N1: ScrubFactor: 86400, MemSize: 20, Scrub Interval:29E8
N1: ScrubFactor: 86400, MemSize: 20, Scrub Interval:29E8
N1: ScrubFactor: 86400, MemSize: 20, Scrub Interval:29E8
N1: ScrubFactor: 86400, MemSize: 20, Scrub Interval:29E8
N1: ScrubFactor: 86400, MemSize: 20, Scrub Interval:29E8
N1: ScrubFactor: 86400, MemSize: 20, Scrub Interval:29E8
N1: ScrubFactor: 86400, MemSize: 20, Scrub Interval:29E8
N1: ScrubFactor: 86400, MemSize: 20, Scrub Interval:29E8
N1: ScrubFactor: 86400, MemSize: 20, Scrub Interval:29E8
N1: ScrubFactor: 86400, MemSize: 20, Scrub Interval:29E8
N1: ScrubFactor: 86400, MemSize: 20, Scrub Interval:29E8
N1: ScrubFactor: 86400, MemSize: 20, Scrub Interval:29E8
N1: ScrubFactor: 86400, MemSize: 20, Scrub Interval:29E8
N1: ScrubFactor: 86400, MemSize: 20, Scrub Interval:29E8
N1: ScrubFactor: 86400, MemSize: 20, Scrub Interval:29E8
[imc] ConfigSystemRetryRegister start
SetRASConfig End
[ScktId: 0] Set RAS Configuration - 213ms
N1 Checked into Pipe
[ScktId: 0] Memory Late -- Started
[ScktId: 0] Memory Late - 5ms
[ScktId: 1] Print All Stats -- Started
[ScktId: 0] Print All Stats -- Started
Performance statistics for socket 1
FmcMaxCached = 0
FmcCachedReads = 0
MRC Phase | PCI | PCI | Polling |JEDEC | FixedDelay | Vref | CPGC | SMBUS | SMBUS | MRS | Duration | GetSysHostPointer
| Read | Write | Count | | Time | Count | Count | Read | Write | Write | Time | Calls
--------------------------------------------------------------------------------------------------------------------------------------------
Total Stats | 94292972| 16935230| 63135535 | 1| 2388 | 753864 | 555684 | 3264 | 33352 | 132500 | 52188 | 0 |
PreMrc | 67642| 174374| 1223 | 0| 2 | 0 | 32 | 56 | 24 | 16 | 12 | 0 |
PipeSync | 320885| 152491| 0 | 0| 0 | 0 | 0 | 0 | 0 | 0 | 516 | 0 |
InitStructLate | 12993| 3| 0 | 0| 0 | 0 | 0 | 0 | 0 | 0 | 8 | 0 |
DetectDimmConfig | 265459| 13527| 78790 | 0| 0 | 0 | 0 | 2236 | 2204 | 0 | 319 | 0 |
UnlockMemRegs | 11816| 5| 0 | 0| 0 | 0 | 0 | 0 | 0 | 0 | 7 | 0 |
HBM Pre-Training | 135368| 1707| 0 | 0| 0 | 0 | 0 | 0 | 0 | 0 | 109 | 0 |
ConfigXmp | 12398| 1| 0 | 0| 0 | 0 | 0 | 0 | 0 | 0 | 7 | 0 |
SetPmicVdd | 59998| 85| 456 | 0| 166 | 0 | 0 | 16 | 8 | 0 | 216 | 0 |
EarlyDdrTherm | 11913| 107| 0 | 0| 0 | 0 | 0 | 0 | 0 | 0 | 9 | 0 |
EarlyInitMem | 14185| 1| 0 | 0| 0 | 0 | 0 | 0 | 0 | 0 | 8 | 0 |
HBM Training | 4328885| 236| 0 | 0| 58 | 0 | 0 | 0 | 0 | 0 | 2915 | 0 |
HBM PostPkgRepair | 10918| 1| 0 | 0| 0 | 0 | 0 | 0 | 0 | 0 | 7 | 0 |
HBM Mem BIST | 11518| 1| 0 | 0| 0 | 0 | 0 | 0 | 0 | 0 | 7 | 0 |
HBM ReTraining | 11521| 1| 0 | 0| 0 | 0 | 0 | 0 | 0 | 0 | 7 | 0 |
GatherSPDData | 122373| 817| 2863 | 0| 0 | 0 | 0 | 256 | 4 | 0 | 86 | 0 |
DisplayDimmInfo | 10415| 2| 0 | 0| 0 | 0 | 0 | 0 | 0 | 0 | 580 | 0 |
ChannelEarlyConfig | 2600326| 80597| 176 | 0| 0 | 0 | 0 | 16 | 0 | 0 | 1272 | 0 |
DdrioPowerStatusCheck| 10919| 1| 0 | 0| 0 | 0 | 0 | 0 | 0 | 0 | 8 | 0 |
InitDdrioInterface | 29462| 3708| 0 | 0| 24 | 0 | 0 | 0 | 0 | 0 | 55 | 0 |
X-Over Calib | 732| 398| 0 | 0| 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 |
RcompStaticLeg | 166| 352| 0 | 0| 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 |
DdrPreTrainingInit | 121171| 744| 296 | 1| 16 | 0 | 0 | 0 | 32 | 16 | 104 | 0 |
CsClockEarly | 261436| 189277| 3596 | 0| 26 | 0 | 20 | 16 | 376 | 120 | 244 | 0 |
CaClockEarlySimple | 927304| 350466| 31609 | 0| 20 | 0 | 32 | 192 | 3236 | 3168 | 572 | 0 |
CaClockEarlyComplex| 99643| 77607| 31797 | 0| 5 | 0 | 32 | 192 | 3268 | 3204 | 170 | 0 |
CaClkEarCompRecent | 116167| 79362| 32484 | 0| 5 | 0 | 32 | 192 | 3332 | 3268 | 179 | 0 |
DcaSlewRate | 15646| 1| 0 | 0| 0 | 0 | 0 | 0 | 0 | 0 | 10 | 0 |
RcdDcaDckDutyCycle | 494232| 602311| 2323 | 0| 33 | 0 | 32 | 0 | 260 | 260 | 466 | 0 |
Lrdimm Bcom Train | 2| 1| 0 | 0| 0 | 0 | 0 | 0 | 0 | 0 | 3 | 0 |
DcaDfeTraining | 4334551| 4339202| 75111 | 0| 398 | 0 | 98800 | 0 | 8604 | 3276 | 4104 | 0 |
BsCsClockEarly | 68396| 42085| 21326 | 0| 4 | 0 | 472 | 16 | 2340 | 2320 | 111 | 0 |
BsCaClockEarly | 253816| 138195| 60786 | 0| 8 | 0 | 77 | 0 | 6776 | 6816 | 349 | 0 |
Lrdimm Pba Enu Id | 16241| 1| 0 | 0| 0 | 0 | 0 | 0 | 0 | 0 | 9 | 0 |
Early Req Clk Train| 18610| 2| 0 | 0| 0 | 0 | 0 | 0 | 0 | 0 | 9 | 0 |
LRDIMM RX | 4| 2| 0 | 0| 0 | 0 | 0 | 0 | 0 | 0 | 9 | 0 |
Receive Enable | 20230| 17339| 1686 | 0| 0 | 0 | 570 | 0 | 0 | 8 | 22 | 0 |
Rd Dq/Dqs | 451281| 304584| 57951 | 0| 11 | 44 | 7776 | 0 | 0 | 32 | 372 | 0 |
Swizzle Discovery | 1408| 2422| 48 | 0| 0 | 0 | 48 | 0 | 0 | 32 | 6 | 0 |
Dram Duty Cycle Adj| 2| 1| 0 | 0| 0 | 0 | 0 | 0 | 0 | 0 | 5 | 0 |
RdDqDqsDfeCentering| 70423| 69154| 31231 | 0| 3 | 9664 | 2620 | 0 | 0 | 364 | 95 | 0 |
READ DFE | 3429990| 2692072| 1903036 | 0| 202 | 561800 | 126804 | 0 | 0 | 25320 | 3676 | 0 |
Rx Dq/Dqs Post Dfe | 609044| 523749| 328560 | 0| 39 | 44328 | 24136 | 0 | 0 | 5220 | 682 | 0 |
Periodic Rx Retrain| 89| 21| 0 | 0| 0 | 0 | 0 | 0 | 0 | 0 | 6 | 0 |
Switch DDRT2 Mode | 5900| 33| 0 | 0| 0 | 0 | 0 | 0 | 0 | 0 | 6 | 0 |
LRDIMM TX | 2| 1| 0 | 0| 0 | 0 | 0 | 0 | 0 | 0 | 5 | 0 |
Write Leveling | 58074| 82446| 4656 | 0| 19 | 0 | 1856 | 0 | 0 | 160 | 103 | 0 |
Wr Dq/Dqs | 475890| 732423| 50688 | 0| 8 | 48 | 17140 | 0 | 0 | 244 | 613 | 0 |
Tx DQ Slew Rate | 2| 1| 0 | 0| 0 | 0 | 0 | 0 | 0 | 0 | 4 | 0 |
WrDqDqsDfeCentering| 133510| 301140| 6096 | 0| 36 | 2452 | 15175 | 0 | 0 | 4381 | 304 | 0 |
PostPkgRepair | 8| 4| 0 | 0| 0 | 0 | 0 | 0 | 0 | 0 | 6 | 0 |
LRDIMM Bs Write | 6203| 1| 0 | 0| 0 | 0 | 0 | 0 | 0 | 0 | 7 | 0 |
DCA TCO | 539910| 608748| 25747 | 0| 31 | 0 | 240 | 0 | 2880 | 2880 | 626 | 0 |
TCO_DQDQS | 2| 1| 0 | 0| 0 | 0 | 0 | 0 | 0 | 0 | 4 | 0 |
TX ODT | 1302| 3393| 0 | 0| 0 | 0 | 216 | 0 | 0 | 72 | 8 | 0 |
WRITE DFE | 5391972| 4005913| 3679836 | 0| 655 | 109232 | 212841 | 0 | 0 | 64835 | 4602 | 0 |
WRITE DB DFE | 2| 1| 0 | 0| 0 | 0 | 0 | 0 | 0 | 0 | 4 | 0 |
Tx Dq/Dqs Post Dfe | 4119503| 318122| 3935435 | 0| 46 | 7368 | 15740 | 0 | 0 | 4496 | 1668 | 0 |
Read Post Dfe Late | 34856931| 649956| 34491402 | 0| 20 | 14976 | 17997 | 0 | 0 | 0 | 12366 | 0 |
MemSweepTester | 2| 1| 0 | 0| 0 | 0 | 0 | 0 | 0 | 0 | 3 | 0 |
Periodic Tx Retrain| 1338| 1629| 24 | 0| 0 | 0 | 16 | 0 | 0 | 4 | 7 | 0 |
Round Trip Opt | 2431865| 29429| 2404295 | 0| 1 | 0 | 1400 | 0 | 0 | 0 | 871 | 0 |
TurnaroundTrain | 1331366| 114993| 1279476 | 0| 18 | 3232 | 5912 | 0 | 0 | 1720 | 538 | 0 |
DisplayResults | 393190| 157746| 5832 | 0| 3 | 360 | 3384 | 0 | 0 | 0 | 205 | 0 |
PostTrainingInit | 15845| 373| 0 | 0| 0 | 0 | 4 | 0 | 0 | 4 | 10 | 0 |
One Time TxRt | 14241| 913| 24 | 0| 512 | 0 | 8 | 0 | 0 | 0 | 521 | 0 |
ExecuteSsaRmt | 10631| 2| 0 | 0| 0 | 0 | 0 | 0 | 0 | 0 | 7 | 0 |
Offset training | 2| 1| 0 | 0| 0 | 0 | 0 | 0 | 0 | 0 | 4 | 0 |
HBM Post-Training | 4267741| 2834| 0 | 0| 0 | 0 | 0 | 0 | 0 | 0 | 2817 | 0 |
LateConfig | 66918| 331| 40 | 0| 0 | 0 | 12 | 4 | 0 | 12 | 41 | 0 |
InitThrottling | 33230| 211| 352 | 0| 0 | 0 | 0 | 32 | 0 | 0 | 31 | 0 |
MEMTEST | 5942546| 4405| 5922344 | 0| 0 | 0 | 60 | 8 | 0 | 12 | 2031 | 0 |
HBM Mem Test | 2439747| 18443| 2391158 | 0| 0 | 0 | 256 | 0 | 0 | 0 | 1197 | 0 |
HBM Scrambling | 66| 65| 0 | 0| 0 | 0 | 0 | 0 | 0 | 0 | 4 | 0 |
HBM Mem Init | 1450169| 2985| 1425954 | 0| 0 | 0 | 32 | 0 | 0 | 0 | 706 | 0 |
Pub DIMM Manifest | 12804| 252| 264 | 0| 0 | 0 | 0 | 24 | 0 | 0 | 14 | 0 |
SvlAndScrambling | 14477| 5| 0 | 0| 0 | 0 | 0 | 0 | 0 | 0 | 9 | 0 |
CpgcOutOfOrderMode | 50| 45| 0 | 0| 0 | 0 | 0 | 0 | 0 | 0 | 5 | 0 |
EnableHostRefresh | 140402| 104| 0 | 0| 0 | 0 | 0 | 0 | 0 | 0 | 92 | 0 |
MEMINIT | 3005750| 1311| 2986223 | 0| 0 | 0 | 16 | 0 | 0 | 0 | 1226 | 0 |
CmiCreditProg | 2904741| 581| 0 | 0| 0 | 0 | 0 | 0 | 0 | 0 | 1902 | 0 |
HBM Normal Mode | 85607| 1275| 0 | 0| 0 | 0 | 0 | 0 | 0 | 0 | 55 | 0 |
Normal Mode | 658691| 1037| 136 | 0| 0 | 0 | 0 | 8 | 8 | 0 | 435 | 0 |
CallTableOverhead | 2133834| 591| 0 | 0| 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 |
Normalize CMD | 20458| 18714| 1680 | 0| 0 | 0 | 592 | 0 | 0 | 24 | 22 | 0 |
No Zone 0 | 2| 2| 0 | 0| 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 |
No Zone 1 | 0| 1| 0 | 0| 0 | 0 | 0 | 0 | 0 | 0 | 4 | 0 |
No Zone 2 | 8194| 1| 0 | 0| 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 |
No Zone 3 | 0| 3| 0 | 0| 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 |
No Zone 4 | 0| 3| 0 | 0| 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 |
No Zone 5 | 0| 3| 0 | 0| 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 |
No Zone 6 | 0| 1| 0 | 0| 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 |
No Zone 7 | 1| 0| 0 | 0| 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 |
No Zone 8 | 0| 1| 0 | 0| 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 |
No Zone 9 | 1960275| 16565| 1858525 | 0| 2 | 360 | 1304 | 0 | 0 | 216 | 1754 | 0 |
Performance statistics for socket 0
FmcMaxCached = 0
FmcCachedReads = 0
MRC Phase | PCI | PCI | Polling |JEDEC | FixedDelay | Vref | CPGC | SMBUS | SMBUS | MRS | Duration | GetSysHostPointer
| Read | Write | Count | | Time | Count | Count | Read | Write | Write | Time | Calls
--------------------------------------------------------------------------------------------------------------------------------------------
Total Stats | 109671954| 16950796| 62575707 | 1| 2396 | 746996 | 555629 | 3264 | 33464 | 133078 | 69180 | 0 |
PreMrc | 149576| 189846| 1274 | 0| 2 | 0 | 32 | 56 | 24 | 16 | 25 | 0 |
PipeSync | 629728| 130845| 0 | 0| 0 | 0 | 0 | 0 | 0 | 0 | 445 | 0 |
SelectBootMode | 11224| 5| 0 | 0| 0 | 0 | 0 | 0 | 0 | 0 | 8 | 0 |
InitStructLate | 22975| 3| 0 | 0| 0 | 0 | 0 | 0 | 0 | 0 | 8 | 0 |
DetectDimmConfig | 411949| 13527| 82120 | 0| 0 | 0 | 0 | 2236 | 2204 | 0 | 321 | 0 |
CheckPor | 11234| 4| 0 | 0| 0 | 0 | 0 | 0 | 0 | 0 | 6 | 0 |
HBM Init Clock | 11195| 4| 0 | 0| 0 | 0 | 0 | 0 | 0 | 0 | 5 | 0 |
Clock Init | 11248| 28| 0 | 0| 0 | 0 | 0 | 0 | 0 | 0 | 96 | 0 |
UnlockMemRegs | 19407| 5| 0 | 0| 0 | 0 | 0 | 0 | 0 | 0 | 7 | 0 |
HBM Pre-Training | 360743| 1709| 0 | 0| 0 | 0 | 0 | 0 | 0 | 0 | 141 | 0 |
ConfigXmp | 17360| 1| 0 | 0| 0 | 0 | 0 | 0 | 0 | 0 | 6 | 0 |
SetClkVdd | 11285| 44| 0 | 0| 0 | 0 | 0 | 0 | 0 | 0 | 5 | 0 |
SetPmicVdd | 136941| 85| 472 | 0| 166 | 0 | 0 | 16 | 8 | 0 | 223 | 0 |
CheckDimmRanks | 11248| 36| 0 | 0| 0 | 0 | 0 | 0 | 0 | 0 | 6 | 0 |
EarlyDdrTherm | 26646| 107| 0 | 0| 0 | 0 | 0 | 0 | 0 | 0 | 10 | 0 |
EarlyInitMem | 21435| 1| 0 | 0| 0 | 0 | 0 | 0 | 0 | 0 | 8 | 0 |
HBM Training | 7484727| 236| 0 | 0| 58 | 0 | 0 | 0 | 0 | 0 | 2916 | 0 |
HBM PostPkgRepair | 17893| 1| 0 | 0| 0 | 0 | 0 | 0 | 0 | 0 | 6 | 0 |
HBM Mem BIST | 16316| 1| 0 | 0| 0 | 0 | 0 | 0 | 0 | 0 | 6 | 0 |
HBM ReTraining | 17337| 1| 0 | 0| 0 | 0 | 0 | 0 | 0 | 0 | 7 | 0 |
GatherSPDData | 219985| 817| 2865 | 0| 0 | 0 | 0 | 256 | 4 | 0 | 88 | 0 |
DisplayDimmInfo | 3041786| 2| 0 | 0| 0 | 0 | 0 | 0 | 0 | 0 | 1153 | 0 |
ChannelEarlyConfig | 1611544| 80597| 176 | 0| 0 | 0 | 0 | 16 | 0 | 0 | 728 | 0 |
DdrioPowerStatusCheck| 25020| 1| 0 | 0| 0 | 0 | 0 | 0 | 0 | 0 | 9 | 0 |
InitDdrioInterface | 34005| 3707| 0 | 0| 24 | 0 | 0 | 0 | 0 | 0 | 52 | 0 |
X-Over Calib | 732| 398| 0 | 0| 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 |
RcompStaticLeg | 179| 352| 0 | 0| 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 |
DdrPreTrainingInit | 244250| 744| 301 | 1| 16 | 0 | 0 | 0 | 32 | 16 | 111 | 0 |
CsClockEarly | 316436| 189277| 3620 | 0| 26 | 0 | 20 | 16 | 376 | 120 | 224 | 0 |
CaClockEarlySimple | 324430| 350950| 32136 | 0| 20 | 0 | 32 | 192 | 3272 | 3204 | 343 | 0 |
CaClockEarlyComplex| 101762| 78804| 32748 | 0| 5 | 0 | 32 | 192 | 3340 | 3276 | 161 | 0 |
CaClkEarCompRecent | 141455| 79731| 32712 | 0| 5 | 0 | 32 | 192 | 3336 | 3272 | 170 | 0 |
DcaSlewRate | 2| 1| 0 | 0| 0 | 0 | 0 | 0 | 0 | 0 | 4 | 0 |
RcdDcaDckDutyCycle | 465726| 602307| 2340 | 0| 33 | 0 | 32 | 0 | 260 | 260 | 411 | 0 |
Lrdimm Bcom Train | 2| 1| 0 | 0| 0 | 0 | 0 | 0 | 0 | 0 | 3 | 0 |
DcaDfeTraining | 4336876| 4339202| 77436 | 0| 398 | 0 | 98800 | 0 | 8604 | 3276 | 3669 | 0 |
BsCsClockEarly | 68462| 42085| 21392 | 0| 4 | 0 | 472 | 16 | 2340 | 2320 | 104 | 0 |
BsCaClockEarly | 254014| 138195| 60984 | 0| 8 | 0 | 77 | 0 | 6776 | 6816 | 323 | 0 |
Lrdimm Pba Enu Id | 2| 1| 0 | 0| 0 | 0 | 0 | 0 | 0 | 0 | 3 | 0 |
Early Req Clk Train| 4| 2| 0 | 0| 0 | 0 | 0 | 0 | 0 | 0 | 3 | 0 |
LRDIMM RX | 28592| 2| 0 | 0| 0 | 0 | 0 | 0 | 0 | 0 | 15 | 0 |
Receive Enable | 47297| 17333| 1686 | 0| 0 | 0 | 570 | 0 | 0 | 8 | 25 | 0 |
Rd Dq/Dqs | 451406| 304580| 58076 | 0| 11 | 44 | 7776 | 0 | 0 | 32 | 342 | 0 |
Swizzle Discovery | 20810| 2422| 48 | 0| 0 | 0 | 48 | 0 | 0 | 32 | 10 | 0 |
Dram Duty Cycle Adj| 2| 1| 0 | 0| 0 | 0 | 0 | 0 | 0 | 0 | 5 | 0 |
RdDqDqsDfeCentering| 88423| 68757| 31202 | 0| 3 | 9712 | 2628 | 0 | 0 | 364 | 93 | 0 |
READ DFE | 3293737| 2664882| 1795967 | 0| 201 | 555500 | 125268 | 0 | 0 | 25320 | 3341 | 0 |
Rx Dq/Dqs Post Dfe | 588715| 521522| 311651 | 0| 39 | 42680 | 23956 | 0 | 0 | 5220 | 621 | 0 |
Periodic Rx Retrain| 95| 21| 0 | 0| 0 | 0 | 0 | 0 | 0 | 0 | 6 | 0 |
Switch DDRT2 Mode | 10| 33| 0 | 0| 0 | 0 | 0 | 0 | 0 | 0 | 4 | 0 |
LRDIMM TX | 2| 1| 0 | 0| 0 | 0 | 0 | 0 | 0 | 0 | 5 | 0 |
Write Leveling | 58073| 82454| 4656 | 0| 19 | 0 | 1856 | 0 | 0 | 160 | 95 | 0 |
Wr Dq/Dqs | 459058| 732421| 50688 | 0| 8 | 48 | 17140 | 0 | 0 | 244 | 541 | 0 |
Tx DQ Slew Rate | 2| 1| 0 | 0| 0 | 0 | 0 | 0 | 0 | 0 | 4 | 0 |
WrDqDqsDfeCentering| 238858| 301746| 6192 | 0| 36 | 2308 | 15276 | 0 | 0 | 4404 | 294 | 0 |
PostPkgRepair | 8| 4| 0 | 0| 0 | 0 | 0 | 0 | 0 | 0 | 6 | 0 |
LRDIMM Bs Write | 2| 1| 0 | 0| 0 | 0 | 0 | 0 | 0 | 0 | 5 | 0 |
DCA TCO | 472110| 611663| 25920 | 0| 31 | 0 | 240 | 0 | 2880 | 2880 | 551 | 0 |
TCO_DQDQS | 2| 1| 0 | 0| 0 | 0 | 0 | 0 | 0 | 0 | 4 | 0 |
TX ODT | 1302| 3393| 0 | 0| 0 | 0 | 216 | 0 | 0 | 72 | 8 | 0 |
WRITE DFE | 5252643| 4027962| 3509202 | 0| 663 | 111572 | 214106 | 0 | 0 | 65322 | 4192 | 0 |
WRITE DB DFE | 2| 1| 0 | 0| 0 | 0 | 0 | 0 | 0 | 0 | 4 | 0 |
Tx Dq/Dqs Post Dfe | 4187572| 322114| 4048678 | 0| 47 | 7724 | 15789 | 0 | 0 | 4463 | 1712 | 0 |
Read Post Dfe Late | 34248688| 665683| 33850057 | 0| 20 | 13456 | 18315 | 0 | 0 | 0 | 12677 | 0 |
MemSweepTester | 2| 1| 0 | 0| 0 | 0 | 0 | 0 | 0 | 0 | 3 | 0 |
Periodic Tx Retrain| 1338| 1629| 24 | 0| 0 | 0 | 16 | 0 | 0 | 4 | 7 | 0 |
Round Trip Opt | 2250171| 28005| 2223361 | 0| 1 | 0 | 1360 | 0 | 0 | 0 | 843 | 0 |
TurnaroundTrain | 1251317| 114232| 1199777 | 0| 18 | 3232 | 5871 | 0 | 0 | 1709 | 522 | 0 |
DisplayResults | 147483| 157746| 5832 | 0| 3 | 360 | 3384 | 0 | 0 | 0 | 105 | 0 |
PostTrainingInit | 19605| 373| 0 | 0| 0 | 0 | 4 | 0 | 0 | 4 | 9 | 0 |
One Time TxRt | 21382| 913| 24 | 0| 512 | 0 | 8 | 0 | 0 | 0 | 521 | 0 |
ExecuteSsaRmt | 4| 2| 0 | 0| 0 | 0 | 0 | 0 | 0 | 0 | 3 | 0 |
Offset training | 24502| 1| 0 | 0| 0 | 0 | 0 | 0 | 0 | 0 | 9 | 0 |
HBM Post-Training | 7448391| 2834| 0 | 0| 0 | 0 | 0 | 0 | 0 | 0 | 2818 | 0 |
LateConfig | 101278| 331| 42 | 0| 0 | 0 | 12 | 4 | 0 | 12 | 38 | 0 |
InitThrottling | 108689| 211| 352 | 0| 0 | 0 | 0 | 32 | 0 | 0 | 40 | 0 |
MEMTEST | 5797279| 4405| 5735038 | 0| 0 | 0 | 60 | 8 | 0 | 12 | 2036 | 0 |
HBM Mem Test | 2568700| 18443| 2543762 | 0| 0 | 0 | 256 | 0 | 0 | 0 | 1185 | 0 |
HBM Scrambling | 534| 65| 0 | 0| 0 | 0 | 0 | 0 | 0 | 0 | 4 | 0 |
HBMFaultResilientBoot| 11217| 4| 0 | 0| 0 | 0 | 0 | 0 | 0 | 0 | 6 | 0 |
HBM Reset System | 11188| 4| 0 | 0| 0 | 0 | 0 | 0 | 0 | 0 | 6 | 0 |
HBM Mem Init | 1609278| 2985| 1511224 | 0| 0 | 0 | 32 | 0 | 0 | 0 | 716 | 0 |
Pub DIMM Manifest | 26565| 163| 264 | 0| 0 | 0 | 0 | 24 | 0 | 0 | 10 | 0 |
SvlAndScrambling | 23999| 5| 0 | 0| 0 | 0 | 0 | 0 | 0 | 0 | 9 | 0 |
Mem ALIAS Check | 11222| 4| 0 | 0| 0 | 0 | 0 | 0 | 0 | 0 | 6 | 0 |
CpgcOutOfOrderMode | 29143| 45| 0 | 0| 0 | 0 | 0 | 0 | 0 | 0 | 11 | 0 |
EnableHostRefresh | 241800| 104| 0 | 0| 0 | 0 | 0 | 0 | 0 | 0 | 91 | 0 |
MEMINIT | 3494295| 1311| 3477522 | 0| 0 | 0 | 16 | 0 | 0 | 0 | 1219 | 0 |
CmiCreditProg | 5008822| 581| 0 | 0| 0 | 0 | 0 | 0 | 0 | 0 | 1904 | 0 |
CheckRasPostMrc | 11561| 148| 0 | 0| 0 | 0 | 0 | 0 | 0 | 0 | 7 | 0 |
MemLate | 11240| 47| 0 | 0| 0 | 0 | 0 | 0 | 0 | 0 | 5 | 0 |
Memory Mapping | 17851| 5369| 0 | 0| 0 | 0 | 0 | 0 | 0 | 0 | 16853 | 0 |
HBM Normal Mode | 135815| 1275| 0 | 0| 0 | 0 | 0 | 0 | 0 | 0 | 53 | 0 |
Normal Mode | 1139086| 1037| 137 | 0| 1 | 0 | 0 | 8 | 8 | 0 | 435 | 0 |
InitAdr | 11185| 4| 0 | 0| 0 | 0 | 0 | 0 | 0 | 0 | 5 | 0 |
RAS Config | 14175| 2031| 0 | 0| 0 | 0 | 0 | 0 | 0 | 0 | 213 | 0 |
CallTableOverhead | 6072132| 301| 0 | 0| 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 |
Normalize CMD | 20494| 18734| 1683 | 0| 0 | 0 | 593 | 0 | 0 | 24 | 20 | 0 |
No Zone 0 | 6| 5| 0 | 0| 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 |
No Zone 1 | 0| 1| 0 | 0| 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 |
No Zone 2 | 0| 0| 0 | 0| 0 | 0 | 0 | 0 | 0 | 0 | 203 | 0 |
No Zone 3 | 8568| 2| 0 | 0| 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 |
No Zone 4 | 1| 0| 0 | 0| 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 |
No Zone 5 | 0| 2| 0 | 0| 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 |
No Zone 6 | 1| 0| 0 | 0| 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 |
No Zone 7 | 0| 2| 0 | 0| 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 |
No Zone 8 | 1| 0| 0 | 0| 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 |
No Zone 9 | 1997086| 16780| 1832066 | 0| 2 | 360 | 1304 | 0 | 0 | 216 | 2891 | 0 |
[ScktId: 1] Print All Stats - 3219ms
[ScktId: 0] Print All Stats - 3219ms
[ScktId: 1] Print Performance Settings -- Started
[ScktId: 0] Print Performance Settings -- Started
[ScktId: 1] Print Performance Settings - 9ms
[ScktId: 0] Print Performance Settings - 11ms
N1 Checked into Pipe
[ScktId: 0] DIMM Information After MRC -- Started
======================================================================================
START_DIMMINFO_SYSTEM_TABLE
======================================================================================
| Socket 0 | Socket 1 | Socket 2 | Socket 3 | System |
======================================================================================
Active Memory | 128GB | 128GB | N/A | N/A | 256GB |
DDR Freq | | | | | DDR5-4800 |
Ch0 CL-RCD-RP-CMD |40-39-39-1n |40-39-39-1n | | | |
Ch2 CL-RCD-RP-CMD |40-39-39-1n |40-39-39-1n | | | |
Ch4 CL-RCD-RP-CMD |40-39-39-1n |40-39-39-1n | | | |
Ch6 CL-RCD-RP-CMD |40-39-39-1n |40-39-39-1n | | | |
DDR Vdd | 1.145V | 1.145V | N/A | N/A | |
ECC Checking | | | | | On |
Patrol/Demand Scrub | | | | | Off |
RAS Mode | | | | | Indep |
Paging Policy | | | | | Closed |
Data Scrambling | | | | | On |
CCMRC Revision | | | | | 00.50.00 |
RC Version | | | | | 1.1.1.01BC |
======================================================================================
STOP_DIMMINFO_SYSTEM_TABLE
======================================================================================
[ScktId: 0] DIMM Information After MRC - 195ms
N1 Checked into Pipe
[ScktId: 0] DDR Reset Loop -- Started
[ScktId: 0] DDR Reset Loop - 5ms
[ScktId: 1] Pipe Sync AP Final Error Sync -- Started
[ScktId: 0] Pipe Sync AP Final Error Sync -- Started
[ScktId: 1] Pipe Sync AP Final Error Sync - 10ms
[ScktId: 0] Pipe Sync AP Final Error Sync - 10ms
Total MRC time = 74328ms
Total MRC time = 74532ms
STOP_MRC_RUN
Final Rc Heap usage:
******* Configure Mesh Mode - START *******
Configure Socket 0 2LM Hash on KTI and IIO-Enabled
Configure Socket 1 2LM Hash on KTI and IIO-Enabled
Socket 0 Tolm 20
SADEntry Local Base Limit Cluster Ways NmChWays ImcIntBitmap NmImcIntBitmap Mc0ChIntMap Mc1ChIntMap Mc2ChIntMap Mc3ChIntMap Type
0 1 0x0000000 0x0000040 0 1 8 0x1 0x1 0x3 0x3 0x3 0x3 2LM HBM cache DDR Granularity=256B IntGranularity=2
MemInfo->imcBitmap[0][MC_TECH_DDR]=0x1 McBitmapPerCluster[0]=0x1 XorDefeature[socket=0]=0
Ways[socket=0][cluster=0]=8
1 1 0x0000040 0x0000220 0 1 8 0x1 0x1 0x3 0x3 0x3 0x3 2LM HBM cache DDR Granularity=256B IntGranularity=2
MemInfo->imcBitmap[0][MC_TECH_DDR]=0x1 XorDefeature[socket=0]=0
Ways[socket=0][cluster=0]=8
16 1 0x0000220 0x0000420 1 1 8 0x2 0x2 0x3 0x3 0x3 0x3 2LM HBM cache DDR Granularity=256B IntGranularity=2
MemInfo->imcBitmap[0][MC_TECH_DDR]=0x3 McBitmapPerCluster[1]=0x2 XorDefeature[socket=0]=0
Ways[socket=0][cluster=1]=8
17 0 0x0000420 0x0000420 1 0 0 0x0 0x0 0x0 0x0 0x0 0x0 NXM Granularity=Unknown
32 1 0x0000420 0x0000620 2 1 8 0x4 0x4 0x3 0x3 0x3 0x3 2LM HBM cache DDR Granularity=256B IntGranularity=2
MemInfo->imcBitmap[0][MC_TECH_DDR]=0x7 McBitmapPerCluster[2]=0x4 XorDefeature[socket=0]=0
Ways[socket=0][cluster=2]=8
33 0 0x0000620 0x0000620 2 0 0 0x0 0x0 0x0 0x0 0x0 0x0 NXM Granularity=Unknown
48 1 0x0000620 0x0000820 3 1 8 0x8 0x8 0x3 0x3 0x3 0x3 2LM HBM cache DDR Granularity=256B IntGranularity=2
MemInfo->imcBitmap[0][MC_TECH_DDR]=0xF McBitmapPerCluster[3]=0x8 XorDefeature[socket=0]=0
Ways[socket=0][cluster=3]=8
49 0 0x0000820 0x0000820 3 0 0 0x0 0x0 0x0 0x0 0x0 0x0 NXM Granularity=Unknown
MC-Cluster InterleaveEn PrefetchEn Membase MemLimit
0 0 0 0x0000000 0x0000220
NumOfMcEnabled=1, NumOfMcPerCluster=1
1 0 0 0x0000220 0x0000420
NumOfMcEnabled=2, NumOfMcPerCluster=1
2 0 0 0x0000420 0x0000620
NumOfMcEnabled=3, NumOfMcPerCluster=1
3 0 0 0x0000620 0x0000820
NumOfMcEnabled=4, NumOfMcPerCluster=1
Number of clusters = 4
Socket 1 Tolm 20
SADEntry Local Base Limit Cluster Ways NmChWays ImcIntBitmap NmImcIntBitmap Mc0ChIntMap Mc1ChIntMap Mc2ChIntMap Mc3ChIntMap Type
0 1 0x0000820 0x0000A20 0 1 8 0x1 0x1 0x3 0x3 0x3 0x3 2LM HBM cache DDR Granularity=256B IntGranularity=2
MemInfo->imcBitmap[1][MC_TECH_DDR]=0x1 McBitmapPerCluster[0]=0x1 XorDefeature[socket=1]=0
Ways[socket=1][cluster=0]=8
16 1 0x0000A20 0x0000C20 1 1 8 0x2 0x2 0x3 0x3 0x3 0x3 2LM HBM cache DDR Granularity=256B IntGranularity=2
MemInfo->imcBitmap[1][MC_TECH_DDR]=0x3 McBitmapPerCluster[1]=0x2 XorDefeature[socket=1]=0
Ways[socket=1][cluster=1]=8
32 1 0x0000C20 0x0000E20 2 1 8 0x4 0x4 0x3 0x3 0x3 0x3 2LM HBM cache DDR Granularity=256B IntGranularity=2
MemInfo->imcBitmap[1][MC_TECH_DDR]=0x7 McBitmapPerCluster[2]=0x4 XorDefeature[socket=1]=0
Ways[socket=1][cluster=2]=8
48 1 0x0000E20 0x0001020 3 1 8 0x8 0x8 0x3 0x3 0x3 0x3 2LM HBM cache DDR Granularity=256B IntGranularity=2
MemInfo->imcBitmap[1][MC_TECH_DDR]=0xF McBitmapPerCluster[3]=0x8 XorDefeature[socket=1]=0
Ways[socket=1][cluster=3]=8
MC-Cluster InterleaveEn PrefetchEn Membase MemLimit
0 0 0 0x0000820 0x0000A20
NumOfMcEnabled=1, NumOfMcPerCluster=1
1 0 0 0x0000A20 0x0000C20
NumOfMcEnabled=2, NumOfMcPerCluster=1
2 0 0 0x0000C20 0x0000E20
NumOfMcEnabled=3, NumOfMcPerCluster=1
3 0 0 0x0000E20 0x0001020
NumOfMcEnabled=4, NumOfMcPerCluster=1
Number of clusters = 4
Socket 0
SNC_Base_1 = 0000 GB
SNC_Base_2 = 0034 GB
SNC_Base_3 = 0066 GB
SNC_Base_4 = 0098 GB
SNC_Base_5 = 0130 GB
Socket 1
SNC_Base_1 = 0130 GB
SNC_Base_2 = 0162 GB
SNC_Base_3 = 0194 GB
SNC_Base_4 = 0226 GB
SNC_Base_5 = 0258 GB
Socket 0 XPT and KTI prefetch Disabled
Programming credits for clustering mode
Socket 1 XPT and KTI prefetch Disabled
Programming credits for clustering mode
[SDSi] Init for Socket[0] - Begin
[VSEC] VSEC discovery - S:B:D:F = 0x0:0x6A:0x3:0x1, VidDid = 0x09A78086
VsecId: 0x00000041 SDSI VSEC capability offset: 0x00000160
[OOBMSM] InitOobMsmBar() Enter
Socket[0], OobMsm.Func[1], BAR[1]
Disable MSE and BME
Original StsCmdReg Value = 0x00100006
BarSize: 0x00040000
BarBase: 0xC6B40000(Already assigned)
Enable MSE and BME
[OOBMSM] InitOobMsmBar() Exit
SDSi MMIO Layout Address = 0xC6B42000
SdsiMmio.Ppin Address = 0xC6B42408, Value = 0x22E546CB1AD8E915
[OOBMSM] InitOobMsmBar() Enter
Socket[0], OobMsm.Func[1], BAR[0]
Disable MSE and BME
Original StsCmdReg Value = 0x00100006
BarSize: 0x00002000
BarBase: 0xC6B00000(Already assigned)
Enable MSE and BME
[OOBMSM] InitOobMsmBar() Exit
PMon Bar0 address: 0xC6B00000
Global Discovery State at address: 0xC6B00000
Access Type|Max Blocks|Block Stride|Type ||GlobalControlAddr||NumBlockStatusBits|GblCtrStatAddr
[63:62] |[25:16] |[15:8] |[7:0]||[63:0] ||[23:8] |[7:0]
0 |221 |4 |5 ||0x2FF0 ||209 |0xE
Unit Discovery State at address: 0xC6B00020
Access Type|UnitStatus Offset|Counter0 Offset|Ctrl Width|Ctrl0 Offset|Num Ctrl Regs||UnitCounterControlAddr||Gbl Stat Pos|Unit ID|UnitType|Offset
[63:62] |[39:32] |[31:24] |[23:16] |[15:8] |[7:0] ||[63:0] ||[47:32] |[31:16]|[15:0]|
UNIT_TYPE_CHA
0 |0x01 |0x08 |48 |0x02 |4 ||0x00002000 || 0 | 0 |0|0x0040
UNIT_TYPE_CHA
0 |0x01 |0x08 |48 |0x02 |4 ||0x00002010 || 1 | 1 |0|0x0060
UNIT_TYPE_CHA
0 |0x01 |0x08 |48 |0x02 |4 ||0x00002020 || 2 | 2 |0|0x0080
UNIT_TYPE_CHA
0 |0x01 |0x08 |48 |0x02 |4 ||0x00002030 || 3 | 3 |0|0x00A0
UNIT_TYPE_CHA
0 |0x01 |0x08 |48 |0x02 |4 ||0x00002040 || 4 | 4 |0|0x00C0
UNIT_TYPE_CHA
0 |0x01 |0x08 |48 |0x02 |4 ||0x00002050 || 5 | 5 |0|0x00E0
UNIT_TYPE_CHA
0 |0x01 |0x08 |48 |0x02 |4 ||0x00002060 || 6 | 6 |0|0x0100
UNIT_TYPE_CHA
0 |0x01 |0x08 |48 |0x02 |4 ||0x00002070 || 7 | 7 |0|0x0120
UNIT_TYPE_CHA
0 |0x01 |0x08 |48 |0x02 |4 ||0x00002080 || 8 | 8 |0|0x0140
UNIT_TYPE_CHA
0 |0x01 |0x08 |48 |0x02 |4 ||0x00002090 || 9 | 9 |0|0x0160
UNIT_TYPE_CHA
0 |0x01 |0x08 |48 |0x02 |4 ||0x000020A0 ||10 |10 |0|0x0180
UNIT_TYPE_CHA
0 |0x01 |0x08 |48 |0x02 |4 ||0x000020B0 ||11 |11 |0|0x01A0
UNIT_TYPE_CHA
0 |0x01 |0x08 |48 |0x02 |4 ||0x000020C0 ||12 |12 |0|0x01C0
UNIT_TYPE_CHA
0 |0x01 |0x08 |48 |0x02 |4 ||0x000020D0 ||13 |13 |0|0x01E0
UNIT_TYPE_CHA
0 |0x01 |0x08 |48 |0x02 |4 ||0x000020E0 ||14 |14 |0|0x0200
UNIT_TYPE_CHA
0 |0x01 |0x08 |48 |0x02 |4 ||0x000020F0 ||15 |15 |0|0x0220
UNIT_TYPE_CHA
0 |0x01 |0x08 |48 |0x02 |4 ||0x00002100 ||16 |16 |0|0x0240
UNIT_TYPE_CHA
0 |0x01 |0x08 |48 |0x02 |4 ||0x00002110 ||17 |17 |0|0x0260
UNIT_TYPE_CHA
0 |0x01 |0x08 |48 |0x02 |4 ||0x00002120 ||18 |18 |0|0x0280
UNIT_TYPE_CHA
0 |0x01 |0x08 |48 |0x02 |4 ||0x00002130 ||19 |19 |0|0x02A0
UNIT_TYPE_CHA
0 |0x01 |0x08 |48 |0x02 |4 ||0x00002140 ||20 |20 |0|0x02C0
UNIT_TYPE_CHA
0 |0x01 |0x08 |48 |0x02 |4 ||0x00002150 ||21 |21 |0|0x02E0
UNIT_TYPE_CHA
0 |0x01 |0x08 |48 |0x02 |4 ||0x00002160 ||22 |22 |0|0x0300
UNIT_TYPE_CHA
0 |0x01 |0x08 |48 |0x02 |4 ||0x00002170 ||23 |23 |0|0x0320
UNIT_TYPE_CHA
0 |0x01 |0x08 |48 |0x02 |4 ||0x00002180 ||24 |24 |0|0x0340
UNIT_TYPE_CHA
0 |0x01 |0x08 |48 |0x02 |4 ||0x00002190 ||25 |25 |0|0x0360
UNIT_TYPE_CHA
0 |0x01 |0x08 |48 |0x02 |4 ||0x000021A0 ||26 |26 |0|0x0380
UNIT_TYPE_CHA
0 |0x01 |0x08 |48 |0x02 |4 ||0x000021B0 ||27 |27 |0|0x03A0
UNIT_TYPE_CHA
0 |0x01 |0x08 |48 |0x02 |4 ||0x000021C0 ||28 |28 |0|0x03C0
UNIT_TYPE_CHA
0 |0x01 |0x08 |48 |0x02 |4 ||0x000021D0 ||29 |29 |0|0x03E0
UNIT_TYPE_CHA
0 |0x01 |0x08 |48 |0x02 |4 ||0x000021E0 ||30 |30 |0|0x0400
UNIT_TYPE_CHA
0 |0x01 |0x08 |48 |0x02 |4 ||0x000021F0 ||31 |31 |0|0x0420
UNIT_TYPE_CHA
0 |0x01 |0x08 |48 |0x02 |4 ||0x00002200 ||32 |32 |0|0x0440
UNIT_TYPE_CHA
0 |0x01 |0x08 |48 |0x02 |4 ||0x00002210 ||33 |33 |0|0x0460
UNIT_TYPE_CHA
0 |0x01 |0x08 |48 |0x02 |4 ||0x00002220 ||34 |34 |0|0x0480
UNIT_TYPE_CHA
0 |0x01 |0x08 |48 |0x02 |4 ||0x00002230 ||35 |35 |0|0x04A0
UNIT_TYPE_CHA
0 |0x01 |0x08 |48 |0x02 |4 ||0x00002240 ||36 |36 |0|0x04C0
UNIT_TYPE_CHA
0 |0x01 |0x08 |48 |0x02 |4 ||0x00002250 ||37 |37 |0|0x04E0
UNIT_TYPE_CHA
0 |0x01 |0x08 |48 |0x02 |4 ||0x00002260 ||38 |38 |0|0x0500
UNIT_TYPE_CHA
0 |0x01 |0x08 |48 |0x02 |4 ||0x00002270 ||39 |39 |0|0x0520
UNIT_TYPE_CHA
0 |0x01 |0x08 |48 |0x02 |4 ||0x00002280 ||40 |40 |0|0x0540
UNIT_TYPE_CHA
0 |0x01 |0x08 |48 |0x02 |4 ||0x00002290 ||41 |41 |0|0x0560
UNIT_TYPE_CHA
0 |0x01 |0x08 |48 |0x02 |4 ||0x000022A0 ||42 |42 |0|0x0580
UNIT_TYPE_CHA
0 |0x01 |0x08 |48 |0x02 |4 ||0x000022B0 ||43 |43 |0|0x05A0
UNIT_TYPE_CHA
0 |0x01 |0x08 |48 |0x02 |4 ||0x000022C0 ||44 |44 |0|0x05C0
UNIT_TYPE_CHA
0 |0x01 |0x08 |48 |0x02 |4 ||0x000022D0 ||45 |45 |0|0x05E0
UNIT_TYPE_CHA
0 |0x01 |0x08 |48 |0x02 |4 ||0x000022E0 ||46 |46 |0|0x0600
UNIT_TYPE_CHA
0 |0x01 |0x08 |48 |0x02 |4 ||0x000022F0 ||47 |47 |0|0x0620
UNIT_TYPE_CHA
0 |0x01 |0x08 |48 |0x02 |4 ||0x00002300 ||48 |48 |0|0x0640
UNIT_TYPE_CHA
0 |0x01 |0x08 |48 |0x02 |4 ||0x00002310 ||49 |49 |0|0x0660
UNIT_TYPE_CHA
0 |0x01 |0x08 |48 |0x02 |4 ||0x00002320 ||50 |50 |0|0x0680
UNIT_TYPE_CHA
0 |0x01 |0x08 |48 |0x02 |4 ||0x00002330 ||51 |51 |0|0x06A0
UNIT_TYPE_CHA
0 |0x01 |0x08 |48 |0x02 |4 ||0x00002340 ||52 |52 |0|0x06C0
UNIT_TYPE_CHA
0 |0x01 |0x08 |48 |0x02 |4 ||0x00002350 ||53 |53 |0|0x06E0
UNIT_TYPE_CHA
0 |0x01 |0x08 |48 |0x02 |4 ||0x00002360 ||54 |54 |0|0x0700
UNIT_TYPE_CHA
0 |0x01 |0x08 |48 |0x02 |4 ||0x00002370 ||55 |55 |0|0x0720
UNIT_TYPE_CHA
0 |0x01 |0x08 |48 |0x02 |4 ||0x00002380 ||56 |56 |0|0x0740
UNIT_TYPE_CHA
0 |0x01 |0x08 |48 |0x02 |4 ||0x00002390 ||57 |57 |0|0x0760
UNIT_TYPE_CHA
0 |0x01 |0x08 |48 |0x02 |4 ||0x000023A0 ||58 |58 |0|0x0780
UNIT_TYPE_CHA
0 |0x01 |0x08 |48 |0x02 |4 ||0x000023B0 ||59 |59 |0|0x07A0
UNIT_TYPE_TC
0 |0x01 |0x08 |48 |0x02 |4 ||0x00003000 ||100 | 0 |1|0x0C60
UNIT_TYPE_TC
0 |0x01 |0x08 |48 |0x02 |4 ||0x00003010 ||101 | 1 |1|0x0CC0
UNIT_TYPE_TC
0 |0x01 |0x08 |48 |0x02 |4 ||0x00003020 ||102 | 2 |1|0x0D20
UNIT_TYPE_TC
0 |0x01 |0x08 |48 |0x02 |4 ||0x00003030 ||103 | 3 |1|0x0D80
UNIT_TYPE_TC
0 |0x00 |0x00 | 0 |0x00 |0 ||0x00000000 || 0 | 0 |0|0x0DE0
UNIT_TYPE_TC
0 |0x01 |0x08 |48 |0x02 |4 ||0x00003040 ||105 | 5 |1|0x0E40
UNIT_TYPE_TC
0 |0x01 |0x08 |48 |0x02 |4 ||0x00003050 ||106 | 6 |1|0x0EA0
UNIT_TYPE_TC
0 |0x01 |0x08 |48 |0x02 |4 ||0x00003060 ||107 | 7 |1|0x0F00
UNIT_TYPE_TC
0 |0x01 |0x08 |48 |0x02 |4 ||0x00003070 ||108 | 8 |1|0x0F60
UNIT_TYPE_TC
0 |0x01 |0x08 |48 |0x02 |4 ||0x00003080 ||109 | 9 |1|0x0FC0
UNIT_TYPE_TC
0 |0x00 |0x00 | 0 |0x00 |0 ||0x00000000 || 0 | 0 |0|0x1020
UNIT_TYPE_TC
0 |0x01 |0x08 |48 |0x02 |4 ||0x00003090 ||111 |11 |1|0x1080
UNIT_TYPE_IRP
0 |0x01 |0x08 |48 |0x02 |2 ||0x00003400 ||112 | 0 |2|0x0C80
UNIT_TYPE_IRP
0 |0x01 |0x08 |48 |0x02 |2 ||0x00003410 ||113 | 1 |2|0x0CE0
UNIT_TYPE_IRP
0 |0x01 |0x08 |48 |0x02 |2 ||0x00003420 ||114 | 2 |2|0x0D40
UNIT_TYPE_IRP
0 |0x01 |0x08 |48 |0x02 |2 ||0x00003430 ||115 | 3 |2|0x0DA0
UNIT_TYPE_IRP
0 |0x00 |0x00 | 0 |0x00 |0 ||0x00000000 || 0 | 0 |0|0x0E00
UNIT_TYPE_IRP
0 |0x01 |0x08 |48 |0x02 |2 ||0x00003440 ||117 | 5 |2|0x0E60
UNIT_TYPE_IRP
0 |0x01 |0x08 |48 |0x02 |2 ||0x00003450 ||118 | 6 |2|0x0EC0
UNIT_TYPE_IRP
0 |0x01 |0x08 |48 |0x02 |2 ||0x00003460 ||119 | 7 |2|0x0F20
UNIT_TYPE_IRP
0 |0x01 |0x08 |48 |0x02 |2 ||0x00003470 ||120 | 8 |2|0x0F80
UNIT_TYPE_IRP
0 |0x01 |0x08 |48 |0x02 |2 ||0x00003480 ||121 | 9 |2|0x0FE0
UNIT_TYPE_IRP
0 |0x00 |0x00 | 0 |0x00 |0 ||0x00000000 || 0 | 0 |0|0x1040
UNIT_TYPE_IRP
0 |0x01 |0x08 |48 |0x02 |2 ||0x00003490 ||123 |11 |2|0x10A0
UNIT_TYPE_M2PCIE
0 |0x01 |0x08 |48 |0x02 |4 ||0x00003200 ||124 | 0 |3|0x0C40
UNIT_TYPE_M2PCIE
0 |0x01 |0x08 |48 |0x02 |4 ||0x00003210 ||125 | 1 |3|0x0CA0
UNIT_TYPE_M2PCIE
0 |0x01 |0x08 |48 |0x02 |4 ||0x00003220 ||126 | 2 |3|0x0D00
UNIT_TYPE_M2PCIE
0 |0x01 |0x08 |48 |0x02 |4 ||0x00003230 ||127 | 3 |3|0x0D60
UNIT_TYPE_M2PCIE
0 |0x00 |0x00 | 0 |0x00 |0 ||0x00000000 || 0 | 0 |0|0x0DC0
UNIT_TYPE_M2PCIE
0 |0x01 |0x08 |48 |0x02 |4 ||0x00003240 ||129 | 5 |3|0x0E20
UNIT_TYPE_M2PCIE
0 |0x01 |0x08 |48 |0x02 |4 ||0x00003250 ||130 | 6 |3|0x0E80
UNIT_TYPE_M2PCIE
0 |0x01 |0x08 |48 |0x02 |4 ||0x00003260 ||131 | 7 |3|0x0EE0
UNIT_TYPE_M2PCIE
0 |0x01 |0x08 |48 |0x02 |4 ||0x00003270 ||132 | 8 |3|0x0F40
UNIT_TYPE_M2PCIE
0 |0x01 |0x08 |48 |0x02 |4 ||0x00003280 ||133 | 9 |3|0x0FA0
UNIT_TYPE_M2PCIE
0 |0x00 |0x00 | 0 |0x00 |0 ||0x00000000 || 0 | 0 |0|0x1000
UNIT_TYPE_M2PCIE
0 |0x01 |0x08 |48 |0x02 |4 ||0x00003290 ||135 |11 |3|0x1060
UNIT_TYPE_PCU
0 |0x01 |0x08 |48 |0x02 |4 ||0x00002FC0 ||136 | 0 |4|0x0020
UNIT_TYPE_MC
1 |0x5C |0x08 |48 |0x40 |4 ||0xC8AA2800 ||138 | 0 |6|0x08C0
UNIT_TYPE_MC
1 |0x5C |0x08 |48 |0x40 |4 ||0xC8AAA800 ||139 | 1 |6|0x08E0
UNIT_TYPE_MC
1 |0x5C |0x08 |48 |0x40 |4 ||0xC8B22800 ||140 | 2 |6|0x0900
UNIT_TYPE_MC
1 |0x5C |0x08 |48 |0x40 |4 ||0xC8B2A800 ||141 | 3 |6|0x0920
UNIT_TYPE_MC
1 |0x5C |0x08 |48 |0x40 |4 ||0xC8BA2800 ||142 | 4 |6|0x0940
UNIT_TYPE_MC
1 |0x5C |0x08 |48 |0x40 |4 ||0xC8BAA800 ||143 | 5 |6|0x0960
UNIT_TYPE_MC
1 |0x5C |0x08 |48 |0x40 |4 ||0xC8C22800 ||144 | 6 |6|0x0980
UNIT_TYPE_MC
1 |0x5C |0x08 |48 |0x40 |4 ||0xC8C2A800 ||145 | 7 |6|0x09A0
UNIT_TYPE_M2M
2 |0x70 |0x08 |48 |0x30 |4 ||0x87E60438 ||146 | 0 |7|0x09C0
UNIT_TYPE_M2M
2 |0x70 |0x08 |48 |0x30 |4 ||0x87E68438 ||147 | 1 |7|0x09E0
UNIT_TYPE_M2M
2 |0x70 |0x08 |48 |0x30 |4 ||0x87E70438 ||148 | 2 |7|0x0A00
UNIT_TYPE_M2M
2 |0x70 |0x08 |48 |0x30 |4 ||0x87E78438 ||149 | 3 |7|0x0A20
UNIT_TYPE_M2M
2 |0x70 |0x08 |48 |0x30 |4 ||0x87E80438 ||150 | 4 |7|0x0A40
UNIT_TYPE_M2M
2 |0x70 |0x08 |48 |0x30 |4 ||0x87E88438 ||151 | 5 |7|0x0A60
UNIT_TYPE_M2M
2 |0x70 |0x08 |48 |0x30 |4 ||0x87E90438 ||152 | 6 |7|0x0A80
UNIT_TYPE_M2M
2 |0x70 |0x08 |48 |0x30 |4 ||0x87E98438 ||153 | 7 |7|0x0AA0
UNIT_TYPE_M2M
2 |0x70 |0x08 |48 |0x30 |4 ||0x87EA0438 ||154 | 8 |7|0x0AC0
UNIT_TYPE_M2M
2 |0x70 |0x08 |48 |0x30 |4 ||0x87EA8438 ||155 | 9 |7|0x0AE0
UNIT_TYPE_M2M
2 |0x70 |0x08 |48 |0x30 |4 ||0x87EB0438 ||156 |10 |7|0x0B00
UNIT_TYPE_M2M
2 |0x70 |0x08 |48 |0x30 |4 ||0x87EB8438 ||157 |11 |7|0x0B20
UNIT_TYPE_M2M
2 |0x70 |0x08 |48 |0x30 |4 ||0x87EC0438 ||158 |12 |7|0x0B40
UNIT_TYPE_M2M
2 |0x70 |0x08 |48 |0x30 |4 ||0x87EC8438 ||159 |13 |7|0x0B60
UNIT_TYPE_M2M
2 |0x70 |0x08 |48 |0x30 |4 ||0x87ED0438 ||160 |14 |7|0x0B80
UNIT_TYPE_M2M
2 |0x70 |0x08 |48 |0x30 |4 ||0x87ED8438 ||161 |15 |7|0x0BA0
UNIT_TYPE_M2M
2 |0x70 |0x08 |48 |0x30 |4 ||0x87EE0438 ||162 |16 |7|0x0BC0
UNIT_TYPE_M2M
2 |0x70 |0x08 |48 |0x30 |4 ||0x87EE8438 ||163 |17 |7|0x0BE0
UNIT_TYPE_M2M
2 |0x70 |0x08 |48 |0x30 |4 ||0x87EF0438 ||164 |18 |7|0x0C00
UNIT_TYPE_M2M
2 |0x70 |0x08 |48 |0x30 |4 ||0x87EF8438 ||165 |19 |7|0x0C20
UNIT_TYPE_UPI_LL
2 |0x64 |0x08 |48 |0x38 |4 ||0x87E09318 ||166 | 0 |8|0x07E0
UNIT_TYPE_UPI_LL
2 |0x64 |0x08 |48 |0x38 |4 ||0x87E11318 ||167 | 1 |8|0x0820
UNIT_TYPE_UPI_LL
2 |0x64 |0x08 |48 |0x38 |4 ||0x87E19318 ||168 | 2 |8|0x0860
UNIT_TYPE_UPI_LL
2 |0x64 |0x08 |48 |0x38 |4 ||0x87E21318 ||169 | 3 |8|0x08A0
UNIT_TYPE_M3UPI
2 |0x58 |0x08 |48 |0x38 |4 ||0x87E290A0 ||170 | 0 |9|0x07C0
UNIT_TYPE_M3UPI
2 |0x58 |0x08 |48 |0x38 |4 ||0x87E310A0 ||171 | 1 |9|0x0800
UNIT_TYPE_M3UPI
2 |0x58 |0x08 |48 |0x38 |4 ||0x87E390A0 ||172 | 2 |9|0x0840
UNIT_TYPE_M3UPI
2 |0x58 |0x08 |48 |0x38 |4 ||0x87E410A0 ||173 | 3 |9|0x0880
UNIT_TYPE_MDF
0 |0x01 |0x08 |48 |0x02 |4 ||0x00002840 ||60 | 0 |11|0x12C0
UNIT_TYPE_MDF
0 |0x01 |0x08 |48 |0x02 |4 ||0x00002850 ||61 | 1 |11|0x12E0
UNIT_TYPE_MDF
0 |0x01 |0x08 |48 |0x02 |4 ||0x00002860 ||62 | 2 |11|0x1300
UNIT_TYPE_MDF
0 |0x01 |0x08 |48 |0x02 |4 ||0x00002870 ||63 | 3 |11|0x1320
UNIT_TYPE_MDF
0 |0x01 |0x08 |48 |0x02 |4 ||0x00002880 ||64 | 4 |11|0x1340
UNIT_TYPE_MDF
0 |0x01 |0x08 |48 |0x02 |4 ||0x00002890 ||65 | 5 |11|0x1360
UNIT_TYPE_MDF
0 |0x01 |0x08 |48 |0x02 |4 ||0x000028E0 ||66 | 6 |11|0x1380
UNIT_TYPE_MDF
0 |0x01 |0x08 |48 |0x02 |4 ||0x000028F0 ||67 | 7 |11|0x13A0
UNIT_TYPE_MDF
0 |0x01 |0x08 |48 |0x02 |4 ||0x00002900 ||68 | 8 |11|0x13C0
UNIT_TYPE_MDF
0 |0x01 |0x08 |48 |0x02 |4 ||0x00002910 ||69 | 9 |11|0x13E0
UNIT_TYPE_MDF
0 |0x01 |0x08 |48 |0x02 |4 ||0x00002920 ||70 |10 |11|0x1400
UNIT_TYPE_MDF
0 |0x01 |0x08 |48 |0x02 |4 ||0x00002930 ||71 |11 |11|0x1420
UNIT_TYPE_MDF
0 |0x01 |0x08 |48 |0x02 |4 ||0x00002980 ||72 |12 |11|0x1440
UNIT_TYPE_MDF
0 |0x01 |0x08 |48 |0x02 |4 ||0x00002990 ||73 |13 |11|0x1460
UNIT_TYPE_MDF
0 |0x01 |0x08 |48 |0x02 |4 ||0x000029A0 ||74 |14 |11|0x1480
UNIT_TYPE_MDF
0 |0x01 |0x08 |48 |0x02 |4 ||0x000029B0 ||75 |15 |11|0x14A0
UNIT_TYPE_MDF
0 |0x01 |0x08 |48 |0x02 |4 ||0x000029C0 ||76 |16 |11|0x14C0
UNIT_TYPE_MDF
0 |0x01 |0x08 |48 |0x02 |4 ||0x000029D0 ||77 |17 |11|0x14E0
UNIT_TYPE_MDF
0 |0x01 |0x08 |48 |0x02 |4 ||0x00002A20 ||78 |18 |11|0x1500
UNIT_TYPE_MDF
0 |0x01 |0x08 |48 |0x02 |4 ||0x00002A30 ||79 |19 |11|0x1520
UNIT_TYPE_MDF
0 |0x01 |0x08 |48 |0x02 |4 ||0x00002A40 ||80 |20 |11|0x1540
UNIT_TYPE_MDF
0 |0x01 |0x08 |48 |0x02 |4 ||0x00002A50 ||81 |21 |11|0x1560
UNIT_TYPE_MDF
0 |0x01 |0x08 |48 |0x02 |4 ||0x00002A60 ||82 |22 |11|0x1580
UNIT_TYPE_MDF
0 |0x01 |0x08 |48 |0x02 |4 ||0x00002A70 ||83 |23 |11|0x15A0
UNIT_TYPE_MDF
0 |0x01 |0x08 |48 |0x02 |4 ||0x00002800 ||84 |24 |11|0x15C0
UNIT_TYPE_MDF
0 |0x01 |0x08 |48 |0x02 |4 ||0x00002810 ||85 |25 |11|0x15E0
UNIT_TYPE_MDF
0 |0x01 |0x08 |48 |0x02 |4 ||0x00002820 ||86 |26 |11|0x1600
UNIT_TYPE_MDF
0 |0x01 |0x08 |48 |0x02 |4 ||0x00002830 ||87 |27 |11|0x1620
UNIT_TYPE_MDF
0 |0x01 |0x08 |48 |0x02 |4 ||0x000028A0 ||88 |28 |11|0x1640
UNIT_TYPE_MDF
0 |0x01 |0x08 |48 |0x02 |4 ||0x000028B0 ||89 |29 |11|0x1660
UNIT_TYPE_MDF
0 |0x01 |0x08 |48 |0x02 |4 ||0x000028C0 ||90 |30 |11|0x1680
UNIT_TYPE_MDF
0 |0x01 |0x08 |48 |0x02 |4 ||0x000028D0 ||91 |31 |11|0x16A0
UNIT_TYPE_MDF
0 |0x01 |0x08 |48 |0x02 |4 ||0x00002970 ||92 |32 |11|0x16C0
UNIT_TYPE_MDF
0 |0x01 |0x08 |48 |0x02 |4 ||0x00002960 ||93 |33 |11|0x16E0
UNIT_TYPE_MDF
0 |0x01 |0x08 |48 |0x02 |4 ||0x00002950 ||94 |34 |11|0x1700
UNIT_TYPE_MDF
0 |0x01 |0x08 |48 |0x02 |4 ||0x00002940 ||95 |35 |11|0x1720
UNIT_TYPE_MDF
0 |0x01 |0x08 |48 |0x02 |4 ||0x00002A10 ||96 |36 |11|0x1740
UNIT_TYPE_MDF
0 |0x01 |0x08 |48 |0x02 |4 ||0x00002A00 ||97 |37 |11|0x1760
UNIT_TYPE_MDF
0 |0x01 |0x08 |48 |0x02 |4 ||0x000029F0 ||98 |38 |11|0x1780
UNIT_TYPE_MDF
0 |0x01 |0x08 |48 |0x02 |4 ||0x000029E0 ||99 |39 |11|0x17A0
UNIT_TYPE_IAL_0
0 |0x00 |0x00 | 0 |0x00 |0 ||0x00000000 || 0 | 0 |0|0x10C0
UNIT_TYPE_IAL_0
0 |0x00 |0x00 | 0 |0x00 |0 ||0x00000000 || 0 | 0 |0|0x1100
UNIT_TYPE_IAL_0
0 |0x00 |0x00 | 0 |0x00 |0 ||0x00000000 || 0 | 0 |0|0x1140
UNIT_TYPE_IAL_0
0 |0x00 |0x00 | 0 |0x00 |0 ||0x00000000 || 0 | 0 |0|0x1180
UNIT_TYPE_IAL_0
0 |0x00 |0x00 | 0 |0x00 |0 ||0x00000000 || 0 | 0 |0|0x11C0
UNIT_TYPE_IAL_0
0 |0x00 |0x00 | 0 |0x00 |0 ||0x00000000 || 0 | 0 |0|0x1200
UNIT_TYPE_IAL_0
0 |0x00 |0x00 | 0 |0x00 |0 ||0x00000000 || 0 | 0 |0|0x1240
UNIT_TYPE_IAL_0
0 |0x00 |0x00 | 0 |0x00 |0 ||0x00000000 || 0 | 0 |0|0x1280
UNIT_TYPE_IAL_1
0 |0x00 |0x00 | 0 |0x00 |0 ||0x00000000 || 0 | 0 |0|0x10E0
UNIT_TYPE_IAL_1
0 |0x00 |0x00 | 0 |0x00 |0 ||0x00000000 || 0 | 0 |0|0x1120
UNIT_TYPE_IAL_1
0 |0x00 |0x00 | 0 |0x00 |0 ||0x00000000 || 0 | 0 |0|0x1160
UNIT_TYPE_IAL_1
0 |0x00 |0x00 | 0 |0x00 |0 ||0x00000000 || 0 | 0 |0|0x11A0
UNIT_TYPE_IAL_1
0 |0x00 |0x00 | 0 |0x00 |0 ||0x00000000 || 0 | 0 |0|0x11E0
UNIT_TYPE_IAL_1
0 |0x00 |0x00 | 0 |0x00 |0 ||0x00000000 || 0 | 0 |0|0x1220
UNIT_TYPE_IAL_1
0 |0x00 |0x00 | 0 |0x00 |0 ||0x00000000 || 0 | 0 |0|0x1260
UNIT_TYPE_IAL_1
0 |0x00 |0x00 | 0 |0x00 |0 ||0x00000000 || 0 | 0 |0|0x12A0
UNIT_TYPE_HBM
1 |0x5C |0x08 |48 |0x40 |4 ||0xC8941C00 ||190 | 0 |14|0x17C0
UNIT_TYPE_HBM
1 |0x5C |0x08 |48 |0x40 |4 ||0xC8945C00 ||191 | 1 |14|0x17E0
UNIT_TYPE_HBM
1 |0x5C |0x08 |48 |0x40 |4 ||0xC894AC00 ||192 | 2 |14|0x1800
UNIT_TYPE_HBM
1 |0x5C |0x08 |48 |0x40 |4 ||0xC894EC00 ||193 | 3 |14|0x1820
UNIT_TYPE_HBM
1 |0x5C |0x08 |48 |0x40 |4 ||0xC8953C00 ||194 | 4 |14|0x1840
UNIT_TYPE_HBM
1 |0x5C |0x08 |48 |0x40 |4 ||0xC8957C00 ||195 | 5 |14|0x1860
UNIT_TYPE_HBM
1 |0x5C |0x08 |48 |0x40 |4 ||0xC895CC00 ||196 | 6 |14|0x1880
UNIT_TYPE_HBM
1 |0x5C |0x08 |48 |0x40 |4 ||0xC8960C00 ||197 | 7 |14|0x18A0
UNIT_TYPE_HBM
1 |0x5C |0x08 |48 |0x40 |4 ||0xC8965C00 ||198 | 8 |14|0x18C0
UNIT_TYPE_HBM
1 |0x5C |0x08 |48 |0x40 |4 ||0xC8969C00 ||199 | 9 |14|0x18E0
UNIT_TYPE_HBM
1 |0x5C |0x08 |48 |0x40 |4 ||0xC896EC00 ||200 |10 |14|0x1900
UNIT_TYPE_HBM
1 |0x5C |0x08 |48 |0x40 |4 ||0xC8972C00 ||201 |11 |14|0x1920
UNIT_TYPE_HBM
1 |0x5C |0x08 |48 |0x40 |4 ||0xC8977C00 ||202 |12 |14|0x1940
UNIT_TYPE_HBM
1 |0x5C |0x08 |48 |0x40 |4 ||0xC897BC00 ||203 |13 |14|0x1960
UNIT_TYPE_HBM
1 |0x5C |0x08 |48 |0x40 |4 ||0xC8980C00 ||204 |14 |14|0x1980
UNIT_TYPE_HBM
1 |0x5C |0x08 |48 |0x40 |4 ||0xC8984C00 ||205 |15 |14|0x19A0
UNIT_TYPE_HBM
1 |0x5C |0x08 |48 |0x40 |4 ||0xC8989C00 ||206 |16 |14|0x19C0
UNIT_TYPE_HBM
1 |0x5C |0x08 |48 |0x40 |4 ||0xC898DC00 ||207 |17 |14|0x19E0
UNIT_TYPE_HBM
1 |0x5C |0x08 |48 |0x40 |4 ||0xC8992C00 ||208 |18 |14|0x1A00
UNIT_TYPE_HBM
1 |0x5C |0x08 |48 |0x40 |4 ||0xC8996C00 ||209 |19 |14|0x1A20
UNIT_TYPE_HBM
1 |0x5C |0x08 |48 |0x40 |4 ||0xC899BC00 ||210 |20 |14|0x1A40
UNIT_TYPE_HBM
1 |0x5C |0x08 |48 |0x40 |4 ||0xC899FC00 ||211 |21 |14|0x1A60
UNIT_TYPE_HBM
1 |0x5C |0x08 |48 |0x40 |4 ||0xC89A4C00 ||212 |22 |14|0x1A80
UNIT_TYPE_HBM
1 |0x5C |0x08 |48 |0x40 |4 ||0xC89A8C00 ||213 |23 |14|0x1AA0
UNIT_TYPE_HBM
1 |0x5C |0x08 |48 |0x40 |4 ||0xC89ADC00 ||214 |24 |14|0x1AC0
UNIT_TYPE_HBM
1 |0x5C |0x08 |48 |0x40 |4 ||0xC89B1C00 ||215 |25 |14|0x1AE0
UNIT_TYPE_HBM
1 |0x5C |0x08 |48 |0x40 |4 ||0xC89B6C00 ||216 |26 |14|0x1B00
UNIT_TYPE_HBM
1 |0x5C |0x08 |48 |0x40 |4 ||0xC89BAC00 ||217 |27 |14|0x1B20
UNIT_TYPE_HBM
1 |0x5C |0x08 |48 |0x40 |4 ||0xC89BFC00 ||218 |28 |14|0x1B40
UNIT_TYPE_HBM
1 |0x5C |0x08 |48 |0x40 |4 ||0xC89C3C00 ||219 |29 |14|0x1B60
UNIT_TYPE_HBM
1 |0x5C |0x08 |48 |0x40 |4 ||0xC89C8C00 ||220 |30 |14|0x1B80
UNIT_TYPE_HBM
1 |0x5C |0x08 |48 |0x40 |4 ||0xC89CCC00 ||221 |31 |14|0x1BA0
[OOBMSM] InitOobMsmBar() Enter
Socket[0], OobMsm.Func[2], BAR[0]
Disable MSE and BME
Original StsCmdReg Value = 0x00100004
BarSize: 0x00200000
BarBase: 0xC6C00000(Already assigned)
Enable MSE and BME
[OOBMSM] InitOobMsmBar() Exit
SPK Bar0 address: 0xC6C00000
SPK instance 0: BAR offset: 0x00058000
SPK SNC Base Address 1: 0x0FFF0000
SPK SNC Base Address 2: 0x1FE00022
SPK SNC Base Address 3: 0x00000042
SPK SNC Base Address 4: 0x00000062
SPK SNC Base Address 5: 0x00000082
SPK SNC Upper Base Address: 0x00000000
SPK_SNC_CONFIG: 0x0000000F
SPK_UNCORE_SNC_CONFIG: NumChaPerCluster:13, BaseChaCluster1:13, BaseChaCluster2:26, BaseChaCluster3:39
SPK_UMA_CLUSTER_CFG: UmaClusterEn: 0, XorDefeatur: 0
SPK instance 1: BAR offset: 0x00059000
SPK SNC Base Address 1: 0x0FFF0000
SPK SNC Base Address 2: 0x1FE00022
SPK SNC Base Address 3: 0x00000042
SPK SNC Base Address 4: 0x00000062
SPK SNC Base Address 5: 0x00000082
SPK SNC Upper Base Address: 0x00000000
SPK_SNC_CONFIG: 0x0000000F
SPK_UNCORE_SNC_CONFIG: NumChaPerCluster:13, BaseChaCluster1:13, BaseChaCluster2:26, BaseChaCluster3:39
SPK_UMA_CLUSTER_CFG: UmaClusterEn: 0, XorDefeatur: 0
SPK instance 2: BAR offset: 0x0005A000
SPK SNC Base Address 1: 0x0FFF0000
SPK SNC Base Address 2: 0x1FE00022
SPK SNC Base Address 3: 0x00000042
SPK SNC Base Address 4: 0x00000062
SPK SNC Base Address 5: 0x00000082
SPK SNC Upper Base Address: 0x00000000
SPK_SNC_CONFIG: 0x0000000F
SPK_UNCORE_SNC_CONFIG: NumChaPerCluster:13, BaseChaCluster1:13, BaseChaCluster2:26, BaseChaCluster3:39
SPK_UMA_CLUSTER_CFG: UmaClusterEn: 0, XorDefeatur: 0
SPK instance 3: BAR offset: 0x0005B000
SPK SNC Base Address 1: 0x0FFF0000
SPK SNC Base Address 2: 0x1FE00022
SPK SNC Base Address 3: 0x00000042
SPK SNC Base Address 4: 0x00000062
SPK SNC Base Address 5: 0x00000082
SPK SNC Upper Base Address: 0x00000000
SPK_SNC_CONFIG: 0x0000000F
SPK_UNCORE_SNC_CONFIG: NumChaPerCluster:13, BaseChaCluster1:13, BaseChaCluster2:26, BaseChaCluster3:39
SPK_UMA_CLUSTER_CFG: UmaClusterEn: 0, XorDefeatur: 0
SPK instance 4: BAR offset: 0x0005C000
SPK SNC Base Address 1: 0x0FFF0000
SPK SNC Base Address 2: 0x1FE00022
SPK SNC Base Address 3: 0x00000042
SPK SNC Base Address 4: 0x00000062
SPK SNC Base Address 5: 0x00000082
SPK SNC Upper Base Address: 0x00000000
SPK_SNC_CONFIG: 0x0000000F
SPK_UNCORE_SNC_CONFIG: NumChaPerCluster:13, BaseChaCluster1:13, BaseChaCluster2:26, BaseChaCluster3:39
SPK_UMA_CLUSTER_CFG: UmaClusterEn: 0, XorDefeatur: 0
SPK instance 5: BAR offset: 0x0005D000
SPK SNC Base Address 1: 0x0FFF0000
SPK SNC Base Address 2: 0x1FE00022
SPK SNC Base Address 3: 0x00000042
SPK SNC Base Address 4: 0x00000062
SPK SNC Base Address 5: 0x00000082
SPK SNC Upper Base Address: 0x00000000
SPK_SNC_CONFIG: 0x0000000F
SPK_UNCORE_SNC_CONFIG: NumChaPerCluster:13, BaseChaCluster1:13, BaseChaCluster2:26, BaseChaCluster3:39
SPK_UMA_CLUSTER_CFG: UmaClusterEn: 0, XorDefeatur: 0
SPK instance 6: BAR offset: 0x0005E000
SPK SNC Base Address 1: 0x0FFF0000
SPK SNC Base Address 2: 0x1FE00022
SPK SNC Base Address 3: 0x00000042
SPK SNC Base Address 4: 0x00000062
SPK SNC Base Address 5: 0x00000082
SPK SNC Upper Base Address: 0x00000000
SPK_SNC_CONFIG: 0x0000000F
SPK_UNCORE_SNC_CONFIG: NumChaPerCluster:13, BaseChaCluster1:13, BaseChaCluster2:26, BaseChaCluster3:39
SPK_UMA_CLUSTER_CFG: UmaClusterEn: 0, XorDefeatur: 0
SPK instance 7: BAR offset: 0x0005F000
SPK SNC Base Address 1: 0x0FFF0000
SPK SNC Base Address 2: 0x1FE00022
SPK SNC Base Address 3: 0x00000042
SPK SNC Base Address 4: 0x00000062
SPK SNC Base Address 5: 0x00000082
SPK SNC Upper Base Address: 0x00000000
SPK_SNC_CONFIG: 0x0000000F
SPK_UNCORE_SNC_CONFIG: NumChaPerCluster:13, BaseChaCluster1:13, BaseChaCluster2:26, BaseChaCluster3:39
SPK_UMA_CLUSTER_CFG: UmaClusterEn: 0, XorDefeatur: 0
SPK instance 8: BAR offset: 0x00060000
SPK SNC Base Address 1: 0x0FFF0000
SPK SNC Base Address 2: 0x1FE00022
SPK SNC Base Address 3: 0x00000042
SPK SNC Base Address 4: 0x00000062
SPK SNC Base Address 5: 0x00000082
SPK SNC Upper Base Address: 0x00000000
SPK_SNC_CONFIG: 0x0000000F
SPK_UNCORE_SNC_CONFIG: NumChaPerCluster:13, BaseChaCluster1:13, BaseChaCluster2:26, BaseChaCluster3:39
SPK_UMA_CLUSTER_CFG: UmaClusterEn: 0, XorDefeatur: 0
SPK instance 9: BAR offset: 0x00061000
SPK SNC Base Address 1: 0x0FFF0000
SPK SNC Base Address 2: 0x1FE00022
SPK SNC Base Address 3: 0x00000042
SPK SNC Base Address 4: 0x00000062
SPK SNC Base Address 5: 0x00000082
SPK SNC Upper Base Address: 0x00000000
SPK_SNC_CONFIG: 0x0000000F
SPK_UNCORE_SNC_CONFIG: NumChaPerCluster:13, BaseChaCluster1:13, BaseChaCluster2:26, BaseChaCluster3:39
SPK_UMA_CLUSTER_CFG: UmaClusterEn: 0, XorDefeatur: 0
SPK instance 10: BAR offset: 0x00062000
SPK SNC Base Address 1: 0x0FFF0000
SPK SNC Base Address 2: 0x1FE00022
SPK SNC Base Address 3: 0x00000042
SPK SNC Base Address 4: 0x00000062
SPK SNC Base Address 5: 0x00000082
SPK SNC Upper Base Address: 0x00000000
SPK_SNC_CONFIG: 0x0000000F
SPK_UNCORE_SNC_CONFIG: NumChaPerCluster:13, BaseChaCluster1:13, BaseChaCluster2:26, BaseChaCluster3:39
SPK_UMA_CLUSTER_CFG: UmaClusterEn: 0, XorDefeatur: 0
SPK instance 11: BAR offset: 0x00063000
SPK SNC Base Address 1: 0x0FFF0000
SPK SNC Base Address 2: 0x1FE00022
SPK SNC Base Address 3: 0x00000042
SPK SNC Base Address 4: 0x00000062
SPK SNC Base Address 5: 0x00000082
SPK SNC Upper Base Address: 0x00000000
SPK_SNC_CONFIG: 0x0000000F
SPK_UNCORE_SNC_CONFIG: NumChaPerCluster:13, BaseChaCluster1:13, BaseChaCluster2:26, BaseChaCluster3:39
SPK_UMA_CLUSTER_CFG: UmaClusterEn: 0, XorDefeatur: 0
SPK instance 12: BAR offset: 0x00070000
SPK SNC Base Address 1: 0x0FFF0000
SPK SNC Base Address 2: 0x1FE00022
SPK SNC Base Address 3: 0x00000042
SPK SNC Base Address 4: 0x00000062
SPK SNC Base Address 5: 0x00000082
SPK SNC Upper Base Address: 0x00000000
SPK_SNC_CONFIG: 0x0000000F
SPK_UNCORE_SNC_CONFIG: NumChaPerCluster:13, BaseChaCluster1:13, BaseChaCluster2:26, BaseChaCluster3:39
SPK_UMA_CLUSTER_CFG: UmaClusterEn: 0, XorDefeatur: 0
SPK instance 13: BAR offset: 0x00071000
SPK SNC Base Address 1: 0x0FFF0000
SPK SNC Base Address 2: 0x1FE00022
SPK SNC Base Address 3: 0x00000042
SPK SNC Base Address 4: 0x00000062
SPK SNC Base Address 5: 0x00000082
SPK SNC Upper Base Address: 0x00000000
SPK_SNC_CONFIG: 0x0000000F
SPK_UNCORE_SNC_CONFIG: NumChaPerCluster:13, BaseChaCluster1:13, BaseChaCluster2:26, BaseChaCluster3:39
SPK_UMA_CLUSTER_CFG: UmaClusterEn: 0, XorDefeatur: 0
SPK instance 14: BAR offset: 0x00072000
SPK SNC Base Address 1: 0x0FFF0000
SPK SNC Base Address 2: 0x1FE00022
SPK SNC Base Address 3: 0x00000042
SPK SNC Base Address 4: 0x00000062
SPK SNC Base Address 5: 0x00000082
SPK SNC Upper Base Address: 0x00000000
SPK_SNC_CONFIG: 0x0000000F
SPK_UNCORE_SNC_CONFIG: NumChaPerCluster:13, BaseChaCluster1:13, BaseChaCluster2:26, BaseChaCluster3:39
SPK_UMA_CLUSTER_CFG: UmaClusterEn: 0, XorDefeatur: 0
SPK instance 15: BAR offset: 0x00073000
SPK SNC Base Address 1: 0x0FFF0000
SPK SNC Base Address 2: 0x1FE00022
SPK SNC Base Address 3: 0x00000042
SPK SNC Base Address 4: 0x00000062
SPK SNC Base Address 5: 0x00000082
SPK SNC Upper Base Address: 0x00000000
SPK_SNC_CONFIG: 0x0000000F
SPK_UNCORE_SNC_CONFIG: NumChaPerCluster:13, BaseChaCluster1:13, BaseChaCluster2:26, BaseChaCluster3:39
SPK_UMA_CLUSTER_CFG: UmaClusterEn: 0, XorDefeatur: 0
[SDSi] Init for Socket[1] - Begin
[VSEC] VSEC discovery - S:B:D:F = 0x0:0xE7:0x3:0x1, VidDid = 0x09A78086
VsecId: 0x00000041 SDSI VSEC capability offset: 0x00000160
[OOBMSM] InitOobMsmBar() Enter
Socket[1], OobMsm.Func[1], BAR[1]
Disable MSE and BME
Original StsCmdReg Value = 0x00100006
BarSize: 0x00040000
BarBase: 0xF9B40000(Already assigned)
Enable MSE and BME
[OOBMSM] InitOobMsmBar() Exit
SDSi MMIO Layout Address = 0xF9B42000
SdsiMmio.Ppin Address = 0xF9B42408, Value = 0x22E548CB80015B4D
[OOBMSM] InitOobMsmBar() Enter
Socket[1], OobMsm.Func[1], BAR[0]
Disable MSE and BME
Original StsCmdReg Value = 0x00100006
BarSize: 0x00002000
BarBase: 0xF9B00000(Already assigned)
Enable MSE and BME
[OOBMSM] InitOobMsmBar() Exit
PMon Bar0 address: 0xF9B00000
Global Discovery State at address: 0xF9B00000
Access Type|Max Blocks|Block Stride|Type ||GlobalControlAddr||NumBlockStatusBits|GblCtrStatAddr
[63:62] |[25:16] |[15:8] |[7:0]||[63:0] ||[23:8] |[7:0]
0 |221 |4 |5 ||0x2FF0 ||209 |0xE
Unit Discovery State at address: 0xF9B00020
Access Type|UnitStatus Offset|Counter0 Offset|Ctrl Width|Ctrl0 Offset|Num Ctrl Regs||UnitCounterControlAddr||Gbl Stat Pos|Unit ID|UnitType|Offset
[63:62] |[39:32] |[31:24] |[23:16] |[15:8] |[7:0] ||[63:0] ||[47:32] |[31:16]|[15:0]|
UNIT_TYPE_CHA
0 |0x01 |0x08 |48 |0x02 |4 ||0x00002000 || 0 | 0 |0|0x0040
UNIT_TYPE_CHA
0 |0x01 |0x08 |48 |0x02 |4 ||0x00002010 || 1 | 1 |0|0x0060
UNIT_TYPE_CHA
0 |0x01 |0x08 |48 |0x02 |4 ||0x00002020 || 2 | 2 |0|0x0080
UNIT_TYPE_CHA
0 |0x01 |0x08 |48 |0x02 |4 ||0x00002030 || 3 | 3 |0|0x00A0
UNIT_TYPE_CHA
0 |0x01 |0x08 |48 |0x02 |4 ||0x00002040 || 4 | 4 |0|0x00C0
UNIT_TYPE_CHA
0 |0x01 |0x08 |48 |0x02 |4 ||0x00002050 || 5 | 5 |0|0x00E0
UNIT_TYPE_CHA
0 |0x01 |0x08 |48 |0x02 |4 ||0x00002060 || 6 | 6 |0|0x0100
UNIT_TYPE_CHA
0 |0x01 |0x08 |48 |0x02 |4 ||0x00002070 || 7 | 7 |0|0x0120
UNIT_TYPE_CHA
0 |0x01 |0x08 |48 |0x02 |4 ||0x00002080 || 8 | 8 |0|0x0140
UNIT_TYPE_CHA
0 |0x01 |0x08 |48 |0x02 |4 ||0x00002090 || 9 | 9 |0|0x0160
UNIT_TYPE_CHA
0 |0x01 |0x08 |48 |0x02 |4 ||0x000020A0 ||10 |10 |0|0x0180
UNIT_TYPE_CHA
0 |0x01 |0x08 |48 |0x02 |4 ||0x000020B0 ||11 |11 |0|0x01A0
UNIT_TYPE_CHA
0 |0x01 |0x08 |48 |0x02 |4 ||0x000020C0 ||12 |12 |0|0x01C0
UNIT_TYPE_CHA
0 |0x01 |0x08 |48 |0x02 |4 ||0x000020D0 ||13 |13 |0|0x01E0
UNIT_TYPE_CHA
0 |0x01 |0x08 |48 |0x02 |4 ||0x000020E0 ||14 |14 |0|0x0200
UNIT_TYPE_CHA
0 |0x01 |0x08 |48 |0x02 |4 ||0x000020F0 ||15 |15 |0|0x0220
UNIT_TYPE_CHA
0 |0x01 |0x08 |48 |0x02 |4 ||0x00002100 ||16 |16 |0|0x0240
UNIT_TYPE_CHA
0 |0x01 |0x08 |48 |0x02 |4 ||0x00002110 ||17 |17 |0|0x0260
UNIT_TYPE_CHA
0 |0x01 |0x08 |48 |0x02 |4 ||0x00002120 ||18 |18 |0|0x0280
UNIT_TYPE_CHA
0 |0x01 |0x08 |48 |0x02 |4 ||0x00002130 ||19 |19 |0|0x02A0
UNIT_TYPE_CHA
0 |0x01 |0x08 |48 |0x02 |4 ||0x00002140 ||20 |20 |0|0x02C0
UNIT_TYPE_CHA
0 |0x01 |0x08 |48 |0x02 |4 ||0x00002150 ||21 |21 |0|0x02E0
UNIT_TYPE_CHA
0 |0x01 |0x08 |48 |0x02 |4 ||0x00002160 ||22 |22 |0|0x0300
UNIT_TYPE_CHA
0 |0x01 |0x08 |48 |0x02 |4 ||0x00002170 ||23 |23 |0|0x0320
UNIT_TYPE_CHA
0 |0x01 |0x08 |48 |0x02 |4 ||0x00002180 ||24 |24 |0|0x0340
UNIT_TYPE_CHA
0 |0x01 |0x08 |48 |0x02 |4 ||0x00002190 ||25 |25 |0|0x0360
UNIT_TYPE_CHA
0 |0x01 |0x08 |48 |0x02 |4 ||0x000021A0 ||26 |26 |0|0x0380
UNIT_TYPE_CHA
0 |0x01 |0x08 |48 |0x02 |4 ||0x000021B0 ||27 |27 |0|0x03A0
UNIT_TYPE_CHA
0 |0x01 |0x08 |48 |0x02 |4 ||0x000021C0 ||28 |28 |0|0x03C0
UNIT_TYPE_CHA
0 |0x01 |0x08 |48 |0x02 |4 ||0x000021D0 ||29 |29 |0|0x03E0
UNIT_TYPE_CHA
0 |0x01 |0x08 |48 |0x02 |4 ||0x000021E0 ||30 |30 |0|0x0400
UNIT_TYPE_CHA
0 |0x01 |0x08 |48 |0x02 |4 ||0x000021F0 ||31 |31 |0|0x0420
UNIT_TYPE_CHA
0 |0x01 |0x08 |48 |0x02 |4 ||0x00002200 ||32 |32 |0|0x0440
UNIT_TYPE_CHA
0 |0x01 |0x08 |48 |0x02 |4 ||0x00002210 ||33 |33 |0|0x0460
UNIT_TYPE_CHA
0 |0x01 |0x08 |48 |0x02 |4 ||0x00002220 ||34 |34 |0|0x0480
UNIT_TYPE_CHA
0 |0x01 |0x08 |48 |0x02 |4 ||0x00002230 ||35 |35 |0|0x04A0
UNIT_TYPE_CHA
0 |0x01 |0x08 |48 |0x02 |4 ||0x00002240 ||36 |36 |0|0x04C0
UNIT_TYPE_CHA
0 |0x01 |0x08 |48 |0x02 |4 ||0x00002250 ||37 |37 |0|0x04E0
UNIT_TYPE_CHA
0 |0x01 |0x08 |48 |0x02 |4 ||0x00002260 ||38 |38 |0|0x0500
UNIT_TYPE_CHA
0 |0x01 |0x08 |48 |0x02 |4 ||0x00002270 ||39 |39 |0|0x0520
UNIT_TYPE_CHA
0 |0x01 |0x08 |48 |0x02 |4 ||0x00002280 ||40 |40 |0|0x0540
UNIT_TYPE_CHA
0 |0x01 |0x08 |48 |0x02 |4 ||0x00002290 ||41 |41 |0|0x0560
UNIT_TYPE_CHA
0 |0x01 |0x08 |48 |0x02 |4 ||0x000022A0 ||42 |42 |0|0x0580
UNIT_TYPE_CHA
0 |0x01 |0x08 |48 |0x02 |4 ||0x000022B0 ||43 |43 |0|0x05A0
UNIT_TYPE_CHA
0 |0x01 |0x08 |48 |0x02 |4 ||0x000022C0 ||44 |44 |0|0x05C0
UNIT_TYPE_CHA
0 |0x01 |0x08 |48 |0x02 |4 ||0x000022D0 ||45 |45 |0|0x05E0
UNIT_TYPE_CHA
0 |0x01 |0x08 |48 |0x02 |4 ||0x000022E0 ||46 |46 |0|0x0600
UNIT_TYPE_CHA
0 |0x01 |0x08 |48 |0x02 |4 ||0x000022F0 ||47 |47 |0|0x0620
UNIT_TYPE_CHA
0 |0x01 |0x08 |48 |0x02 |4 ||0x00002300 ||48 |48 |0|0x0640
UNIT_TYPE_CHA
0 |0x01 |0x08 |48 |0x02 |4 ||0x00002310 ||49 |49 |0|0x0660
UNIT_TYPE_CHA
0 |0x01 |0x08 |48 |0x02 |4 ||0x00002320 ||50 |50 |0|0x0680
UNIT_TYPE_CHA
0 |0x01 |0x08 |48 |0x02 |4 ||0x00002330 ||51 |51 |0|0x06A0
UNIT_TYPE_CHA
0 |0x01 |0x08 |48 |0x02 |4 ||0x00002340 ||52 |52 |0|0x06C0
UNIT_TYPE_CHA
0 |0x01 |0x08 |48 |0x02 |4 ||0x00002350 ||53 |53 |0|0x06E0
UNIT_TYPE_CHA
0 |0x01 |0x08 |48 |0x02 |4 ||0x00002360 ||54 |54 |0|0x0700
UNIT_TYPE_CHA
0 |0x01 |0x08 |48 |0x02 |4 ||0x00002370 ||55 |55 |0|0x0720
UNIT_TYPE_CHA
0 |0x01 |0x08 |48 |0x02 |4 ||0x00002380 ||56 |56 |0|0x0740
UNIT_TYPE_CHA
0 |0x01 |0x08 |48 |0x02 |4 ||0x00002390 ||57 |57 |0|0x0760
UNIT_TYPE_CHA
0 |0x01 |0x08 |48 |0x02 |4 ||0x000023A0 ||58 |58 |0|0x0780
UNIT_TYPE_CHA
0 |0x01 |0x08 |48 |0x02 |4 ||0x000023B0 ||59 |59 |0|0x07A0
UNIT_TYPE_TC
0 |0x01 |0x08 |48 |0x02 |4 ||0x00003000 ||100 | 0 |1|0x0C60
UNIT_TYPE_TC
0 |0x01 |0x08 |48 |0x02 |4 ||0x00003010 ||101 | 1 |1|0x0CC0
UNIT_TYPE_TC
0 |0x01 |0x08 |48 |0x02 |4 ||0x00003020 ||102 | 2 |1|0x0D20
UNIT_TYPE_TC
0 |0x01 |0x08 |48 |0x02 |4 ||0x00003030 ||103 | 3 |1|0x0D80
UNIT_TYPE_TC
0 |0x00 |0x00 | 0 |0x00 |0 ||0x00000000 || 0 | 0 |0|0x0DE0
UNIT_TYPE_TC
0 |0x01 |0x08 |48 |0x02 |4 ||0x00003040 ||105 | 5 |1|0x0E40
UNIT_TYPE_TC
0 |0x01 |0x08 |48 |0x02 |4 ||0x00003050 ||106 | 6 |1|0x0EA0
UNIT_TYPE_TC
0 |0x01 |0x08 |48 |0x02 |4 ||0x00003060 ||107 | 7 |1|0x0F00
UNIT_TYPE_TC
0 |0x01 |0x08 |48 |0x02 |4 ||0x00003070 ||108 | 8 |1|0x0F60
UNIT_TYPE_TC
0 |0x01 |0x08 |48 |0x02 |4 ||0x00003080 ||109 | 9 |1|0x0FC0
UNIT_TYPE_TC
0 |0x00 |0x00 | 0 |0x00 |0 ||0x00000000 || 0 | 0 |0|0x1020
UNIT_TYPE_TC
0 |0x01 |0x08 |48 |0x02 |4 ||0x00003090 ||111 |11 |1|0x1080
UNIT_TYPE_IRP
0 |0x01 |0x08 |48 |0x02 |2 ||0x00003400 ||112 | 0 |2|0x0C80
UNIT_TYPE_IRP
0 |0x01 |0x08 |48 |0x02 |2 ||0x00003410 ||113 | 1 |2|0x0CE0
UNIT_TYPE_IRP
0 |0x01 |0x08 |48 |0x02 |2 ||0x00003420 ||114 | 2 |2|0x0D40
UNIT_TYPE_IRP
0 |0x01 |0x08 |48 |0x02 |2 ||0x00003430 ||115 | 3 |2|0x0DA0
UNIT_TYPE_IRP
0 |0x00 |0x00 | 0 |0x00 |0 ||0x00000000 || 0 | 0 |0|0x0E00
UNIT_TYPE_IRP
0 |0x01 |0x08 |48 |0x02 |2 ||0x00003440 ||117 | 5 |2|0x0E60
UNIT_TYPE_IRP
0 |0x01 |0x08 |48 |0x02 |2 ||0x00003450 ||118 | 6 |2|0x0EC0
UNIT_TYPE_IRP
0 |0x01 |0x08 |48 |0x02 |2 ||0x00003460 ||119 | 7 |2|0x0F20
UNIT_TYPE_IRP
0 |0x01 |0x08 |48 |0x02 |2 ||0x00003470 ||120 | 8 |2|0x0F80
UNIT_TYPE_IRP
0 |0x01 |0x08 |48 |0x02 |2 ||0x00003480 ||121 | 9 |2|0x0FE0
UNIT_TYPE_IRP
0 |0x00 |0x00 | 0 |0x00 |0 ||0x00000000 || 0 | 0 |0|0x1040
UNIT_TYPE_IRP
0 |0x01 |0x08 |48 |0x02 |2 ||0x00003490 ||123 |11 |2|0x10A0
UNIT_TYPE_M2PCIE
0 |0x01 |0x08 |48 |0x02 |4 ||0x00003200 ||124 | 0 |3|0x0C40
UNIT_TYPE_M2PCIE
0 |0x01 |0x08 |48 |0x02 |4 ||0x00003210 ||125 | 1 |3|0x0CA0
UNIT_TYPE_M2PCIE
0 |0x01 |0x08 |48 |0x02 |4 ||0x00003220 ||126 | 2 |3|0x0D00
UNIT_TYPE_M2PCIE
0 |0x01 |0x08 |48 |0x02 |4 ||0x00003230 ||127 | 3 |3|0x0D60
UNIT_TYPE_M2PCIE
0 |0x00 |0x00 | 0 |0x00 |0 ||0x00000000 || 0 | 0 |0|0x0DC0
UNIT_TYPE_M2PCIE
0 |0x01 |0x08 |48 |0x02 |4 ||0x00003240 ||129 | 5 |3|0x0E20
UNIT_TYPE_M2PCIE
0 |0x01 |0x08 |48 |0x02 |4 ||0x00003250 ||130 | 6 |3|0x0E80
UNIT_TYPE_M2PCIE
0 |0x01 |0x08 |48 |0x02 |4 ||0x00003260 ||131 | 7 |3|0x0EE0
UNIT_TYPE_M2PCIE
0 |0x01 |0x08 |48 |0x02 |4 ||0x00003270 ||132 | 8 |3|0x0F40
UNIT_TYPE_M2PCIE
0 |0x01 |0x08 |48 |0x02 |4 ||0x00003280 ||133 | 9 |3|0x0FA0
UNIT_TYPE_M2PCIE
0 |0x00 |0x00 | 0 |0x00 |0 ||0x00000000 || 0 | 0 |0|0x1000
UNIT_TYPE_M2PCIE
0 |0x01 |0x08 |48 |0x02 |4 ||0x00003290 ||135 |11 |3|0x1060
UNIT_TYPE_PCU
0 |0x01 |0x08 |48 |0x02 |4 ||0x00002FC0 ||136 | 0 |4|0x0020
UNIT_TYPE_MC
1 |0x5C |0x08 |48 |0x40 |4 ||0xFBAA2800 ||138 | 0 |6|0x08C0
UNIT_TYPE_MC
1 |0x5C |0x08 |48 |0x40 |4 ||0xFBAAA800 ||139 | 1 |6|0x08E0
UNIT_TYPE_MC
1 |0x5C |0x08 |48 |0x40 |4 ||0xFBB22800 ||140 | 2 |6|0x0900
UNIT_TYPE_MC
1 |0x5C |0x08 |48 |0x40 |4 ||0xFBB2A800 ||141 | 3 |6|0x0920
UNIT_TYPE_MC
1 |0x5C |0x08 |48 |0x40 |4 ||0xFBBA2800 ||142 | 4 |6|0x0940
UNIT_TYPE_MC
1 |0x5C |0x08 |48 |0x40 |4 ||0xFBBAA800 ||143 | 5 |6|0x0960
UNIT_TYPE_MC
1 |0x5C |0x08 |48 |0x40 |4 ||0xFBC22800 ||144 | 6 |6|0x0980
UNIT_TYPE_MC
1 |0x5C |0x08 |48 |0x40 |4 ||0xFBC2A800 ||145 | 7 |6|0x09A0
UNIT_TYPE_M2M
2 |0x70 |0x08 |48 |0x30 |4 ||0x8FE60438 ||146 | 0 |7|0x09C0
UNIT_TYPE_M2M
2 |0x70 |0x08 |48 |0x30 |4 ||0x8FE68438 ||147 | 1 |7|0x09E0
UNIT_TYPE_M2M
2 |0x70 |0x08 |48 |0x30 |4 ||0x8FE70438 ||148 | 2 |7|0x0A00
UNIT_TYPE_M2M
2 |0x70 |0x08 |48 |0x30 |4 ||0x8FE78438 ||149 | 3 |7|0x0A20
UNIT_TYPE_M2M
2 |0x70 |0x08 |48 |0x30 |4 ||0x8FE80438 ||150 | 4 |7|0x0A40
UNIT_TYPE_M2M
2 |0x70 |0x08 |48 |0x30 |4 ||0x8FE88438 ||151 | 5 |7|0x0A60
UNIT_TYPE_M2M
2 |0x70 |0x08 |48 |0x30 |4 ||0x8FE90438 ||152 | 6 |7|0x0A80
UNIT_TYPE_M2M
2 |0x70 |0x08 |48 |0x30 |4 ||0x8FE98438 ||153 | 7 |7|0x0AA0
UNIT_TYPE_M2M
2 |0x70 |0x08 |48 |0x30 |4 ||0x8FEA0438 ||154 | 8 |7|0x0AC0
UNIT_TYPE_M2M
2 |0x70 |0x08 |48 |0x30 |4 ||0x8FEA8438 ||155 | 9 |7|0x0AE0
UNIT_TYPE_M2M
2 |0x70 |0x08 |48 |0x30 |4 ||0x8FEB0438 ||156 |10 |7|0x0B00
UNIT_TYPE_M2M
2 |0x70 |0x08 |48 |0x30 |4 ||0x8FEB8438 ||157 |11 |7|0x0B20
UNIT_TYPE_M2M
2 |0x70 |0x08 |48 |0x30 |4 ||0x8FEC0438 ||158 |12 |7|0x0B40
UNIT_TYPE_M2M
2 |0x70 |0x08 |48 |0x30 |4 ||0x8FEC8438 ||159 |13 |7|0x0B60
UNIT_TYPE_M2M
2 |0x70 |0x08 |48 |0x30 |4 ||0x8FED0438 ||160 |14 |7|0x0B80
UNIT_TYPE_M2M
2 |0x70 |0x08 |48 |0x30 |4 ||0x8FED8438 ||161 |15 |7|0x0BA0
UNIT_TYPE_M2M
2 |0x70 |0x08 |48 |0x30 |4 ||0x8FEE0438 ||162 |16 |7|0x0BC0
UNIT_TYPE_M2M
2 |0x70 |0x08 |48 |0x30 |4 ||0x8FEE8438 ||163 |17 |7|0x0BE0
UNIT_TYPE_M2M
2 |0x70 |0x08 |48 |0x30 |4 ||0x8FEF0438 ||164 |18 |7|0x0C00
UNIT_TYPE_M2M
2 |0x70 |0x08 |48 |0x30 |4 ||0x8FEF8438 ||165 |19 |7|0x0C20
UNIT_TYPE_UPI_LL
2 |0x64 |0x08 |48 |0x38 |4 ||0x8FE09318 ||166 | 0 |8|0x07E0
UNIT_TYPE_UPI_LL
2 |0x64 |0x08 |48 |0x38 |4 ||0x8FE11318 ||167 | 1 |8|0x0820
UNIT_TYPE_UPI_LL
2 |0x64 |0x08 |48 |0x38 |4 ||0x8FE19318 ||168 | 2 |8|0x0860
UNIT_TYPE_UPI_LL
2 |0x64 |0x08 |48 |0x38 |4 ||0x8FE21318 ||169 | 3 |8|0x08A0
UNIT_TYPE_M3UPI
2 |0x58 |0x08 |48 |0x38 |4 ||0x8FE290A0 ||170 | 0 |9|0x07C0
UNIT_TYPE_M3UPI
2 |0x58 |0x08 |48 |0x38 |4 ||0x8FE310A0 ||171 | 1 |9|0x0800
UNIT_TYPE_M3UPI
2 |0x58 |0x08 |48 |0x38 |4 ||0x8FE390A0 ||172 | 2 |9|0x0840
UNIT_TYPE_M3UPI
2 |0x58 |0x08 |48 |0x38 |4 ||0x8FE410A0 ||173 | 3 |9|0x0880
UNIT_TYPE_MDF
0 |0x01 |0x08 |48 |0x02 |4 ||0x00002840 ||60 | 0 |11|0x12C0
UNIT_TYPE_MDF
0 |0x01 |0x08 |48 |0x02 |4 ||0x00002850 ||61 | 1 |11|0x12E0
UNIT_TYPE_MDF
0 |0x01 |0x08 |48 |0x02 |4 ||0x00002860 ||62 | 2 |11|0x1300
UNIT_TYPE_MDF
0 |0x01 |0x08 |48 |0x02 |4 ||0x00002870 ||63 | 3 |11|0x1320
UNIT_TYPE_MDF
0 |0x01 |0x08 |48 |0x02 |4 ||0x00002880 ||64 | 4 |11|0x1340
UNIT_TYPE_MDF
0 |0x01 |0x08 |48 |0x02 |4 ||0x00002890 ||65 | 5 |11|0x1360
UNIT_TYPE_MDF
0 |0x01 |0x08 |48 |0x02 |4 ||0x000028E0 ||66 | 6 |11|0x1380
UNIT_TYPE_MDF
0 |0x01 |0x08 |48 |0x02 |4 ||0x000028F0 ||67 | 7 |11|0x13A0
UNIT_TYPE_MDF
0 |0x01 |0x08 |48 |0x02 |4 ||0x00002900 ||68 | 8 |11|0x13C0
UNIT_TYPE_MDF
0 |0x01 |0x08 |48 |0x02 |4 ||0x00002910 ||69 | 9 |11|0x13E0
UNIT_TYPE_MDF
0 |0x01 |0x08 |48 |0x02 |4 ||0x00002920 ||70 |10 |11|0x1400
UNIT_TYPE_MDF
0 |0x01 |0x08 |48 |0x02 |4 ||0x00002930 ||71 |11 |11|0x1420
UNIT_TYPE_MDF
0 |0x01 |0x08 |48 |0x02 |4 ||0x00002980 ||72 |12 |11|0x1440
UNIT_TYPE_MDF
0 |0x01 |0x08 |48 |0x02 |4 ||0x00002990 ||73 |13 |11|0x1460
UNIT_TYPE_MDF
0 |0x01 |0x08 |48 |0x02 |4 ||0x000029A0 ||74 |14 |11|0x1480
UNIT_TYPE_MDF
0 |0x01 |0x08 |48 |0x02 |4 ||0x000029B0 ||75 |15 |11|0x14A0
UNIT_TYPE_MDF
0 |0x01 |0x08 |48 |0x02 |4 ||0x000029C0 ||76 |16 |11|0x14C0
UNIT_TYPE_MDF
0 |0x01 |0x08 |48 |0x02 |4 ||0x000029D0 ||77 |17 |11|0x14E0
UNIT_TYPE_MDF
0 |0x01 |0x08 |48 |0x02 |4 ||0x00002A20 ||78 |18 |11|0x1500
UNIT_TYPE_MDF
0 |0x01 |0x08 |48 |0x02 |4 ||0x00002A30 ||79 |19 |11|0x1520
UNIT_TYPE_MDF
0 |0x01 |0x08 |48 |0x02 |4 ||0x00002A40 ||80 |20 |11|0x1540
UNIT_TYPE_MDF
0 |0x01 |0x08 |48 |0x02 |4 ||0x00002A50 ||81 |21 |11|0x1560
UNIT_TYPE_MDF
0 |0x01 |0x08 |48 |0x02 |4 ||0x00002A60 ||82 |22 |11|0x1580
UNIT_TYPE_MDF
0 |0x01 |0x08 |48 |0x02 |4 ||0x00002A70 ||83 |23 |11|0x15A0
UNIT_TYPE_MDF
0 |0x01 |0x08 |48 |0x02 |4 ||0x00002800 ||84 |24 |11|0x15C0
UNIT_TYPE_MDF
0 |0x01 |0x08 |48 |0x02 |4 ||0x00002810 ||85 |25 |11|0x15E0
UNIT_TYPE_MDF
0 |0x01 |0x08 |48 |0x02 |4 ||0x00002820 ||86 |26 |11|0x1600
UNIT_TYPE_MDF
0 |0x01 |0x08 |48 |0x02 |4 ||0x00002830 ||87 |27 |11|0x1620
UNIT_TYPE_MDF
0 |0x01 |0x08 |48 |0x02 |4 ||0x000028A0 ||88 |28 |11|0x1640
UNIT_TYPE_MDF
0 |0x01 |0x08 |48 |0x02 |4 ||0x000028B0 ||89 |29 |11|0x1660
UNIT_TYPE_MDF
0 |0x01 |0x08 |48 |0x02 |4 ||0x000028C0 ||90 |30 |11|0x1680
UNIT_TYPE_MDF
0 |0x01 |0x08 |48 |0x02 |4 ||0x000028D0 ||91 |31 |11|0x16A0
UNIT_TYPE_MDF
0 |0x01 |0x08 |48 |0x02 |4 ||0x00002970 ||92 |32 |11|0x16C0
UNIT_TYPE_MDF
0 |0x01 |0x08 |48 |0x02 |4 ||0x00002960 ||93 |33 |11|0x16E0
UNIT_TYPE_MDF
0 |0x01 |0x08 |48 |0x02 |4 ||0x00002950 ||94 |34 |11|0x1700
UNIT_TYPE_MDF
0 |0x01 |0x08 |48 |0x02 |4 ||0x00002940 ||95 |35 |11|0x1720
UNIT_TYPE_MDF
0 |0x01 |0x08 |48 |0x02 |4 ||0x00002A10 ||96 |36 |11|0x1740
UNIT_TYPE_MDF
0 |0x01 |0x08 |48 |0x02 |4 ||0x00002A00 ||97 |37 |11|0x1760
UNIT_TYPE_MDF
0 |0x01 |0x08 |48 |0x02 |4 ||0x000029F0 ||98 |38 |11|0x1780
UNIT_TYPE_MDF
0 |0x01 |0x08 |48 |0x02 |4 ||0x000029E0 ||99 |39 |11|0x17A0
UNIT_TYPE_IAL_0
0 |0x00 |0x00 | 0 |0x00 |0 ||0x00000000 || 0 | 0 |0|0x10C0
UNIT_TYPE_IAL_0
0 |0x00 |0x00 | 0 |0x00 |0 ||0x00000000 || 0 | 0 |0|0x1100
UNIT_TYPE_IAL_0
0 |0x00 |0x00 | 0 |0x00 |0 ||0x00000000 || 0 | 0 |0|0x1140
UNIT_TYPE_IAL_0
0 |0x00 |0x00 | 0 |0x00 |0 ||0x00000000 || 0 | 0 |0|0x1180
UNIT_TYPE_IAL_0
0 |0x00 |0x00 | 0 |0x00 |0 ||0x00000000 || 0 | 0 |0|0x11C0
UNIT_TYPE_IAL_0
0 |0x00 |0x00 | 0 |0x00 |0 ||0x00000000 || 0 | 0 |0|0x1200
UNIT_TYPE_IAL_0
0 |0x00 |0x00 | 0 |0x00 |0 ||0x00000000 || 0 | 0 |0|0x1240
UNIT_TYPE_IAL_0
0 |0x00 |0x00 | 0 |0x00 |0 ||0x00000000 || 0 | 0 |0|0x1280
UNIT_TYPE_IAL_1
0 |0x00 |0x00 | 0 |0x00 |0 ||0x00000000 || 0 | 0 |0|0x10E0
UNIT_TYPE_IAL_1
0 |0x00 |0x00 | 0 |0x00 |0 ||0x00000000 || 0 | 0 |0|0x1120
UNIT_TYPE_IAL_1
0 |0x00 |0x00 | 0 |0x00 |0 ||0x00000000 || 0 | 0 |0|0x1160
UNIT_TYPE_IAL_1
0 |0x00 |0x00 | 0 |0x00 |0 ||0x00000000 || 0 | 0 |0|0x11A0
UNIT_TYPE_IAL_1
0 |0x00 |0x00 | 0 |0x00 |0 ||0x00000000 || 0 | 0 |0|0x11E0
UNIT_TYPE_IAL_1
0 |0x00 |0x00 | 0 |0x00 |0 ||0x00000000 || 0 | 0 |0|0x1220
UNIT_TYPE_IAL_1
0 |0x00 |0x00 | 0 |0x00 |0 ||0x00000000 || 0 | 0 |0|0x1260
UNIT_TYPE_IAL_1
0 |0x00 |0x00 | 0 |0x00 |0 ||0x00000000 || 0 | 0 |0|0x12A0
UNIT_TYPE_HBM
1 |0x5C |0x08 |48 |0x40 |4 ||0xFB941C00 ||190 | 0 |14|0x17C0
UNIT_TYPE_HBM
1 |0x5C |0x08 |48 |0x40 |4 ||0xFB945C00 ||191 | 1 |14|0x17E0
UNIT_TYPE_HBM
1 |0x5C |0x08 |48 |0x40 |4 ||0xFB94AC00 ||192 | 2 |14|0x1800
UNIT_TYPE_HBM
1 |0x5C |0x08 |48 |0x40 |4 ||0xFB94EC00 ||193 | 3 |14|0x1820
UNIT_TYPE_HBM
1 |0x5C |0x08 |48 |0x40 |4 ||0xFB953C00 ||194 | 4 |14|0x1840
UNIT_TYPE_HBM
1 |0x5C |0x08 |48 |0x40 |4 ||0xFB957C00 ||195 | 5 |14|0x1860
UNIT_TYPE_HBM
1 |0x5C |0x08 |48 |0x40 |4 ||0xFB95CC00 ||196 | 6 |14|0x1880
UNIT_TYPE_HBM
1 |0x5C |0x08 |48 |0x40 |4 ||0xFB960C00 ||197 | 7 |14|0x18A0
UNIT_TYPE_HBM
1 |0x5C |0x08 |48 |0x40 |4 ||0xFB965C00 ||198 | 8 |14|0x18C0
UNIT_TYPE_HBM
1 |0x5C |0x08 |48 |0x40 |4 ||0xFB969C00 ||199 | 9 |14|0x18E0
UNIT_TYPE_HBM
1 |0x5C |0x08 |48 |0x40 |4 ||0xFB96EC00 ||200 |10 |14|0x1900
UNIT_TYPE_HBM
1 |0x5C |0x08 |48 |0x40 |4 ||0xFB972C00 ||201 |11 |14|0x1920
UNIT_TYPE_HBM
1 |0x5C |0x08 |48 |0x40 |4 ||0xFB977C00 ||202 |12 |14|0x1940
UNIT_TYPE_HBM
1 |0x5C |0x08 |48 |0x40 |4 ||0xFB97BC00 ||203 |13 |14|0x1960
UNIT_TYPE_HBM
1 |0x5C |0x08 |48 |0x40 |4 ||0xFB980C00 ||204 |14 |14|0x1980
UNIT_TYPE_HBM
1 |0x5C |0x08 |48 |0x40 |4 ||0xFB984C00 ||205 |15 |14|0x19A0
UNIT_TYPE_HBM
1 |0x5C |0x08 |48 |0x40 |4 ||0xFB989C00 ||206 |16 |14|0x19C0
UNIT_TYPE_HBM
1 |0x5C |0x08 |48 |0x40 |4 ||0xFB98DC00 ||207 |17 |14|0x19E0
UNIT_TYPE_HBM
1 |0x5C |0x08 |48 |0x40 |4 ||0xFB992C00 ||208 |18 |14|0x1A00
UNIT_TYPE_HBM
1 |0x5C |0x08 |48 |0x40 |4 ||0xFB996C00 ||209 |19 |14|0x1A20
UNIT_TYPE_HBM
1 |0x5C |0x08 |48 |0x40 |4 ||0xFB99BC00 ||210 |20 |14|0x1A40
UNIT_TYPE_HBM
1 |0x5C |0x08 |48 |0x40 |4 ||0xFB99FC00 ||211 |21 |14|0x1A60
UNIT_TYPE_HBM
1 |0x5C |0x08 |48 |0x40 |4 ||0xFB9A4C00 ||212 |22 |14|0x1A80
UNIT_TYPE_HBM
1 |0x5C |0x08 |48 |0x40 |4 ||0xFB9A8C00 ||213 |23 |14|0x1AA0
UNIT_TYPE_HBM
1 |0x5C |0x08 |48 |0x40 |4 ||0xFB9ADC00 ||214 |24 |14|0x1AC0
UNIT_TYPE_HBM
1 |0x5C |0x08 |48 |0x40 |4 ||0xFB9B1C00 ||215 |25 |14|0x1AE0
UNIT_TYPE_HBM
1 |0x5C |0x08 |48 |0x40 |4 ||0xFB9B6C00 ||216 |26 |14|0x1B00
UNIT_TYPE_HBM
1 |0x5C |0x08 |48 |0x40 |4 ||0xFB9BAC00 ||217 |27 |14|0x1B20
UNIT_TYPE_HBM
1 |0x5C |0x08 |48 |0x40 |4 ||0xFB9BFC00 ||218 |28 |14|0x1B40
UNIT_TYPE_HBM
1 |0x5C |0x08 |48 |0x40 |4 ||0xFB9C3C00 ||219 |29 |14|0x1B60
UNIT_TYPE_HBM
1 |0x5C |0x08 |48 |0x40 |4 ||0xFB9C8C00 ||220 |30 |14|0x1B80
UNIT_TYPE_HBM
1 |0x5C |0x08 |48 |0x40 |4 ||0xFB9CCC00 ||221 |31 |14|0x1BA0
[OOBMSM] InitOobMsmBar() Enter
Socket[1], OobMsm.Func[2], BAR[0]
Disable MSE and BME
Original StsCmdReg Value = 0x00100004
BarSize: 0x00200000
BarBase: 0xF9C00000(Already assigned)
Enable MSE and BME
[OOBMSM] InitOobMsmBar() Exit
SPK Bar0 address: 0xF9C00000
SPK instance 0: BAR offset: 0x00058000
SPK SNC Base Address 1: 0x0FFF0082
SPK SNC Base Address 2: 0x1FE000A2
SPK SNC Base Address 3: 0x000000C2
SPK SNC Base Address 4: 0x000000E2
SPK SNC Base Address 5: 0x00000102
SPK SNC Upper Base Address: 0x00000000
SPK_SNC_CONFIG: 0x0000000F
SPK_UNCORE_SNC_CONFIG: NumChaPerCluster:13, BaseChaCluster1:13, BaseChaCluster2:26, BaseChaCluster3:39
SPK_UMA_CLUSTER_CFG: UmaClusterEn: 0, XorDefeatur: 0
SPK instance 1: BAR offset: 0x00059000
SPK SNC Base Address 1: 0x0FFF0082
SPK SNC Base Address 2: 0x1FE000A2
SPK SNC Base Address 3: 0x000000C2
SPK SNC Base Address 4: 0x000000E2
SPK SNC Base Address 5: 0x00000102
SPK SNC Upper Base Address: 0x00000000
SPK_SNC_CONFIG: 0x0000000F
SPK_UNCORE_SNC_CONFIG: NumChaPerCluster:13, BaseChaCluster1:13, BaseChaCluster2:26, BaseChaCluster3:39
SPK_UMA_CLUSTER_CFG: UmaClusterEn: 0, XorDefeatur: 0
SPK instance 2: BAR offset: 0x0005A000
SPK SNC Base Address 1: 0x0FFF0082
SPK SNC Base Address 2: 0x1FE000A2
SPK SNC Base Address 3: 0x000000C2
SPK SNC Base Address 4: 0x000000E2
SPK SNC Base Address 5: 0x00000102
SPK SNC Upper Base Address: 0x00000000
SPK_SNC_CONFIG: 0x0000000F
SPK_UNCORE_SNC_CONFIG: NumChaPerCluster:13, BaseChaCluster1:13, BaseChaCluster2:26, BaseChaCluster3:39
SPK_UMA_CLUSTER_CFG: UmaClusterEn: 0, XorDefeatur: 0
SPK instance 3: BAR offset: 0x0005B000
SPK SNC Base Address 1: 0x0FFF0082
SPK SNC Base Address 2: 0x1FE000A2
SPK SNC Base Address 3: 0x000000C2
SPK SNC Base Address 4: 0x000000E2
SPK SNC Base Address 5: 0x00000102
SPK SNC Upper Base Address: 0x00000000
SPK_SNC_CONFIG: 0x0000000F
SPK_UNCORE_SNC_CONFIG: NumChaPerCluster:13, BaseChaCluster1:13, BaseChaCluster2:26, BaseChaCluster3:39
SPK_UMA_CLUSTER_CFG: UmaClusterEn: 0, XorDefeatur: 0
SPK instance 4: BAR offset: 0x0005C000
SPK SNC Base Address 1: 0x0FFF0082
SPK SNC Base Address 2: 0x1FE000A2
SPK SNC Base Address 3: 0x000000C2
SPK SNC Base Address 4: 0x000000E2
SPK SNC Base Address 5: 0x00000102
SPK SNC Upper Base Address: 0x00000000
SPK_SNC_CONFIG: 0x0000000F
SPK_UNCORE_SNC_CONFIG: NumChaPerCluster:13, BaseChaCluster1:13, BaseChaCluster2:26, BaseChaCluster3:39
SPK_UMA_CLUSTER_CFG: UmaClusterEn: 0, XorDefeatur: 0
SPK instance 5: BAR offset: 0x0005D000
SPK SNC Base Address 1: 0x0FFF0082
SPK SNC Base Address 2: 0x1FE000A2
SPK SNC Base Address 3: 0x000000C2
SPK SNC Base Address 4: 0x000000E2
SPK SNC Base Address 5: 0x00000102
SPK SNC Upper Base Address: 0x00000000
SPK_SNC_CONFIG: 0x0000000F
SPK_UNCORE_SNC_CONFIG: NumChaPerCluster:13, BaseChaCluster1:13, BaseChaCluster2:26, BaseChaCluster3:39
SPK_UMA_CLUSTER_CFG: UmaClusterEn: 0, XorDefeatur: 0
SPK instance 6: BAR offset: 0x0005E000
SPK SNC Base Address 1: 0x0FFF0082
SPK SNC Base Address 2: 0x1FE000A2
SPK SNC Base Address 3: 0x000000C2
SPK SNC Base Address 4: 0x000000E2
SPK SNC Base Address 5: 0x00000102
SPK SNC Upper Base Address: 0x00000000
SPK_SNC_CONFIG: 0x0000000F
SPK_UNCORE_SNC_CONFIG: NumChaPerCluster:13, BaseChaCluster1:13, BaseChaCluster2:26, BaseChaCluster3:39
SPK_UMA_CLUSTER_CFG: UmaClusterEn: 0, XorDefeatur: 0
SPK instance 7: BAR offset: 0x0005F000
SPK SNC Base Address 1: 0x0FFF0082
SPK SNC Base Address 2: 0x1FE000A2
SPK SNC Base Address 3: 0x000000C2
SPK SNC Base Address 4: 0x000000E2
SPK SNC Base Address 5: 0x00000102
SPK SNC Upper Base Address: 0x00000000
SPK_SNC_CONFIG: 0x0000000F
SPK_UNCORE_SNC_CONFIG: NumChaPerCluster:13, BaseChaCluster1:13, BaseChaCluster2:26, BaseChaCluster3:39
SPK_UMA_CLUSTER_CFG: UmaClusterEn: 0, XorDefeatur: 0
SPK instance 8: BAR offset: 0x00060000
SPK SNC Base Address 1: 0x0FFF0082
SPK SNC Base Address 2: 0x1FE000A2
SPK SNC Base Address 3: 0x000000C2
SPK SNC Base Address 4: 0x000000E2
SPK SNC Base Address 5: 0x00000102
SPK SNC Upper Base Address: 0x00000000
SPK_SNC_CONFIG: 0x0000000F
SPK_UNCORE_SNC_CONFIG: NumChaPerCluster:13, BaseChaCluster1:13, BaseChaCluster2:26, BaseChaCluster3:39
SPK_UMA_CLUSTER_CFG: UmaClusterEn: 0, XorDefeatur: 0
SPK instance 9: BAR offset: 0x00061000
SPK SNC Base Address 1: 0x0FFF0082
SPK SNC Base Address 2: 0x1FE000A2
SPK SNC Base Address 3: 0x000000C2
SPK SNC Base Address 4: 0x000000E2
SPK SNC Base Address 5: 0x00000102
SPK SNC Upper Base Address: 0x00000000
SPK_SNC_CONFIG: 0x0000000F
SPK_UNCORE_SNC_CONFIG: NumChaPerCluster:13, BaseChaCluster1:13, BaseChaCluster2:26, BaseChaCluster3:39
SPK_UMA_CLUSTER_CFG: UmaClusterEn: 0, XorDefeatur: 0
SPK instance 10: BAR offset: 0x00062000
SPK SNC Base Address 1: 0x0FFF0082
SPK SNC Base Address 2: 0x1FE000A2
SPK SNC Base Address 3: 0x000000C2
SPK SNC Base Address 4: 0x000000E2
SPK SNC Base Address 5: 0x00000102
SPK SNC Upper Base Address: 0x00000000
SPK_SNC_CONFIG: 0x0000000F
SPK_UNCORE_SNC_CONFIG: NumChaPerCluster:13, BaseChaCluster1:13, BaseChaCluster2:26, BaseChaCluster3:39
SPK_UMA_CLUSTER_CFG: UmaClusterEn: 0, XorDefeatur: 0
SPK instance 11: BAR offset: 0x00063000
SPK SNC Base Address 1: 0x0FFF0082
SPK SNC Base Address 2: 0x1FE000A2
SPK SNC Base Address 3: 0x000000C2
SPK SNC Base Address 4: 0x000000E2
SPK SNC Base Address 5: 0x00000102
SPK SNC Upper Base Address: 0x00000000
SPK_SNC_CONFIG: 0x0000000F
SPK_UNCORE_SNC_CONFIG: NumChaPerCluster:13, BaseChaCluster1:13, BaseChaCluster2:26, BaseChaCluster3:39
SPK_UMA_CLUSTER_CFG: UmaClusterEn: 0, XorDefeatur: 0
SPK instance 12: BAR offset: 0x00070000
SPK SNC Base Address 1: 0x0FFF0082
SPK SNC Base Address 2: 0x1FE000A2
SPK SNC Base Address 3: 0x000000C2
SPK SNC Base Address 4: 0x000000E2
SPK SNC Base Address 5: 0x00000102
SPK SNC Upper Base Address: 0x00000000
SPK_SNC_CONFIG: 0x0000000F
SPK_UNCORE_SNC_CONFIG: NumChaPerCluster:13, BaseChaCluster1:13, BaseChaCluster2:26, BaseChaCluster3:39
SPK_UMA_CLUSTER_CFG: UmaClusterEn: 0, XorDefeatur: 0
SPK instance 13: BAR offset: 0x00071000
SPK SNC Base Address 1: 0x0FFF0082
SPK SNC Base Address 2: 0x1FE000A2
SPK SNC Base Address 3: 0x000000C2
SPK SNC Base Address 4: 0x000000E2
SPK SNC Base Address 5: 0x00000102
SPK SNC Upper Base Address: 0x00000000
SPK_SNC_CONFIG: 0x0000000F
SPK_UNCORE_SNC_CONFIG: NumChaPerCluster:13, BaseChaCluster1:13, BaseChaCluster2:26, BaseChaCluster3:39
SPK_UMA_CLUSTER_CFG: UmaClusterEn: 0, XorDefeatur: 0
SPK instance 14: BAR offset: 0x00072000
SPK SNC Base Address 1: 0x0FFF0082
SPK SNC Base Address 2: 0x1FE000A2
SPK SNC Base Address 3: 0x000000C2
SPK SNC Base Address 4: 0x000000E2
SPK SNC Base Address 5: 0x00000102
SPK SNC Upper Base Address: 0x00000000
SPK_SNC_CONFIG: 0x0000000F
SPK_UNCORE_SNC_CONFIG: NumChaPerCluster:13, BaseChaCluster1:13, BaseChaCluster2:26, BaseChaCluster3:39
SPK_UMA_CLUSTER_CFG: UmaClusterEn: 0, XorDefeatur: 0
SPK instance 15: BAR offset: 0x00073000
SPK SNC Base Address 1: 0x0FFF0082
SPK SNC Base Address 2: 0x1FE000A2
SPK SNC Base Address 3: 0x000000C2
SPK SNC Base Address 4: 0x000000E2
SPK SNC Base Address 5: 0x00000102
SPK SNC Upper Base Address: 0x00000000
SPK_SNC_CONFIG: 0x0000000F
SPK_UNCORE_SNC_CONFIG: NumChaPerCluster:13, BaseChaCluster1:13, BaseChaCluster2:26, BaseChaCluster3:39
SPK_UMA_CLUSTER_CFG: UmaClusterEn: 0, XorDefeatur: 0
**** SNC XPT DUMP START ****
**** CPU 0: ****
SNC_CONFIG_MS2IDI : 0x0000000F
UNCORE_SNC_CONFIG_MS2IDI : 0x271A0D0D
UMA_CLUSTER_MS2IDI : 0x00000000
XPT_2_ENTRY_MINISAD_TABLE : 0x00000000
XPT_LOCAL_PREFETCH_CONFIG1 : 0x000400BD
XPT_LOCAL_PREFETCH_CONFIG2 : 0x008186A0
XPT_32_ENTRY_MINISAD_TABLE_0 : 0x00000000
XPT_32_ENTRY_MINISAD_TABLE_1 : 0x00000000
XPT_32_ENTRY_MINISAD_TABLE_2 : 0x00000000
XPT_32_ENTRY_MINISAD_TABLE_3 : 0x00000000
XPT_32_ENTRY_MINISAD_TABLE_4 : 0x00000000
XPT_32_ENTRY_MINISAD_TABLE_5 : 0x00000000
XPT_32_ENTRY_PREFETCH_BASE_0 : 0x00000000
XPT_32_ENTRY_PREFETCH_BASE_1 : 0x00000000
XPT_32_ENTRY_PREFETCH_BASE_2 : 0x00000000
XPT_32_ENTRY_PREFETCH_BASE_3 : 0x00000000
XPT_REMOTE_PREFETCH_CONFIG1 : 0x000400BD
XPT_REMOTE_PREFETCH_CONFIG2 : 0x008186A0
XPT_UPI_DECODE_TABLE_0_N0: 0x00000000
XPT_UPI_DECODE_TABLE_0_N1: 0x00000000
XPT_UPI_DECODE_TABLE_1_N0: 0x00000000
XPT_UPI_DECODE_TABLE_1_N1: 0x00000000
XPT_UPI_DECODE_TABLE_2_N0: 0x00000000
XPT_UPI_DECODE_TABLE_2_N1: 0x00000000
XPT_UPI_DECODE_TABLE_3_N0: 0x00000000
XPT_UPI_DECODE_TABLE_3_N1: 0x00000000
KTI_0_SNC_CONFIG_KTI : 0x0000000F
KTI_0_KTIAGCTRL : 0x00101012
KTI_0_KTI_SNC_BASE_1 : 0x0FFF0000
KTI_0_KTI_SNC_BASE_2 : 0x1FE00022
KTI_0_KTI_SNC_BASE_3 : 0x00000042
KTI_0_KTI_SNC_BASE_4 : 0x00000062
KTI_0_KTI_SNC_BASE_5 : 0x00000082
M3KTI 0:
M3KPRECTRL_0 : 0x00000040
M3KPRETL_0 : 0x00000000
KTI_1_SNC_CONFIG_KTI : 0x0000000F
KTI_1_KTIAGCTRL : 0x00101012
KTI_1_KTI_SNC_BASE_1 : 0x0FFF0000
KTI_1_KTI_SNC_BASE_2 : 0x1FE00022
KTI_1_KTI_SNC_BASE_3 : 0x00000042
KTI_1_KTI_SNC_BASE_4 : 0x00000062
KTI_1_KTI_SNC_BASE_5 : 0x00000082
M3KTI 1:
M3KPRECTRL_1 : 0x00000040
M3KPRETL_1 : 0x00000000
KTI_2_SNC_CONFIG_KTI : 0x0000000F
KTI_2_KTIAGCTRL : 0x00101012
KTI_2_KTI_SNC_BASE_1 : 0x0FFF0000
KTI_2_KTI_SNC_BASE_2 : 0x1FE00022
KTI_2_KTI_SNC_BASE_3 : 0x00000042
KTI_2_KTI_SNC_BASE_4 : 0x00000062
KTI_2_KTI_SNC_BASE_5 : 0x00000082
M3KTI 2:
M3KPRECTRL_2 : 0x00000040
M3KPRETL_2 : 0x00000000
KTI_3_SNC_CONFIG_KTI : 0x0000000F
KTI_3_KTIAGCTRL : 0x00101012
KTI_3_KTI_SNC_BASE_1 : 0x0FFF0000
KTI_3_KTI_SNC_BASE_2 : 0x1FE00022
KTI_3_KTI_SNC_BASE_3 : 0x00000042
KTI_3_KTI_SNC_BASE_4 : 0x00000062
KTI_3_KTI_SNC_BASE_5 : 0x00000082
M3KTI 3:
M3KPRECTRL_3 : 0x00000040
M3KPRETL_3 : 0x00000000
CHA_SNC_CONFIG_CHA_PMA : 0x271A0D0F
SNC_CONFIG_IIO_VTD : 0x0000000F
UNCORE_SNC_IIO_VTD : 0x04E6868D
SNC_BASE_1_IIO_VTD : 0x0FFF0000
SNC_BASE_2_IIO_VTD : 0x1FE00022
SNC_BASE_3_IIO_VTD : 0x00000042
SNC_BASE_4_IIO_VTD : 0x00000062
SNC_BASE_5_IIO_VTD : 0x00000082
IIO 0:
IIO_0_SNC_CONFIG_IIO : 0x0000000F
IIO_0_SNC_BASE_1 : 0x0FFF0000
IIO_0_SNC_BASE_2 : 0x1FE00022
IIO_0_SNC_BASE_3 : 0x00000042
IIO_0_SNC_BASE_4 : 0x00000062
IIO_0_SNC_BASE_5 : 0x00000082
IIO 1:
IIO_1_SNC_CONFIG_IIO : 0x0000000F
IIO_1_SNC_BASE_1 : 0x0FFF0000
IIO_1_SNC_BASE_2 : 0x1FE00022
IIO_1_SNC_BASE_3 : 0x00000042
IIO_1_SNC_BASE_4 : 0x00000062
IIO_1_SNC_BASE_5 : 0x00000082
IIO 2:
IIO_2_SNC_CONFIG_IIO : 0x0000000F
IIO_2_SNC_BASE_1 : 0x0FFF0000
IIO_2_SNC_BASE_2 : 0x1FE00022
IIO_2_SNC_BASE_3 : 0x00000042
IIO_2_SNC_BASE_4 : 0x00000062
IIO_2_SNC_BASE_5 : 0x00000082
IIO 3:
IIO_3_SNC_CONFIG_IIO : 0x0000000F
IIO_3_SNC_BASE_1 : 0x0FFF0000
IIO_3_SNC_BASE_2 : 0x1FE00022
IIO_3_SNC_BASE_3 : 0x00000042
IIO_3_SNC_BASE_4 : 0x00000062
IIO_3_SNC_BASE_5 : 0x00000082
IIO 4:
IIO_4_SNC_CONFIG_IIO : 0x0000000F
IIO_4_SNC_BASE_1 : 0x0FFF0000
IIO_4_SNC_BASE_2 : 0x1FE00022
IIO_4_SNC_BASE_3 : 0x00000042
IIO_4_SNC_BASE_4 : 0x00000062
IIO_4_SNC_BASE_5 : 0x00000082
IIO 5:
IIO_5_SNC_CONFIG_IIO : 0x0000000F
IIO_5_SNC_BASE_1 : 0x0FFF0000
IIO_5_SNC_BASE_2 : 0x1FE00022
IIO_5_SNC_BASE_3 : 0x00000042
IIO_5_SNC_BASE_4 : 0x00000062
IIO_5_SNC_BASE_5 : 0x00000082
IIO 8:
IIO_8_SNC_CONFIG_IIO : 0x0000000F
IIO_8_SNC_BASE_1 : 0x0FFF0000
IIO_8_SNC_BASE_2 : 0x1FE00022
IIO_8_SNC_BASE_3 : 0x00000042
IIO_8_SNC_BASE_4 : 0x00000062
IIO_8_SNC_BASE_5 : 0x00000082
IIO 9:
IIO_9_SNC_CONFIG_IIO : 0x0000000F
IIO_9_SNC_BASE_1 : 0x0FFF0000
IIO_9_SNC_BASE_2 : 0x1FE00022
IIO_9_SNC_BASE_3 : 0x00000042
IIO_9_SNC_BASE_4 : 0x00000062
IIO_9_SNC_BASE_5 : 0x00000082
IIO 10:
IIO_10_SNC_CONFIG_IIO : 0x0000000F
IIO_10_SNC_BASE_1 : 0x0FFF0000
IIO_10_SNC_BASE_2 : 0x1FE00022
IIO_10_SNC_BASE_3 : 0x00000042
IIO_10_SNC_BASE_4 : 0x00000062
IIO_10_SNC_BASE_5 : 0x00000082
IIO 11:
IIO_11_SNC_CONFIG_IIO : 0x0000000F
IIO_11_SNC_BASE_1 : 0x0FFF0000
IIO_11_SNC_BASE_2 : 0x1FE00022
IIO_11_SNC_BASE_3 : 0x00000042
IIO_11_SNC_BASE_4 : 0x00000062
IIO_11_SNC_BASE_5 : 0x00000082
M2MEM_0_TOPOLOGY : 0x00018000
M2MEM_0_PREFSADCONFIG0 : 0x00000000
M2MEM_0_PREFSADCONFIG1 : 0x00000000
M2MEM_0_PREFETCHSADSTARTADDR0 : 0x00000000
M2MEM_0_PREFETCHSADLIMITADDR0 : 0x00000000
M2MEM_0_PREFETCHSADSTARTADDR1 : 0x00000000
M2MEM_0_PREFETCHSADLIMITADDR1 : 0x00000000
M2MEM_0_PREFETCHSADSTARTADDR2 : 0x00000000
M2MEM_0_PREFETCHSADLIMITADDR2 : 0x00000000
M2MEM_0_SYSFEATURES0 : 0x1340008D
M2MEM_1_TOPOLOGY : 0x00032340
M2MEM_1_PREFSADCONFIG0 : 0x00000000
M2MEM_1_PREFSADCONFIG1 : 0x00000000
M2MEM_1_PREFETCHSADSTARTADDR0 : 0x00000000
M2MEM_1_PREFETCHSADLIMITADDR0 : 0x00000000
M2MEM_1_PREFETCHSADSTARTADDR1 : 0x00000000
M2MEM_1_PREFETCHSADLIMITADDR1 : 0x00000000
M2MEM_1_PREFETCHSADSTARTADDR2 : 0x00000000
M2MEM_1_PREFETCHSADLIMITADDR2 : 0x00000000
M2MEM_1_SYSFEATURES0 : 0x1340008D
M2MEM_2_TOPOLOGY : 0x0004C680
M2MEM_2_PREFSADCONFIG0 : 0x00000000
M2MEM_2_PREFSADCONFIG1 : 0x00000000
M2MEM_2_PREFETCHSADSTARTADDR0 : 0x00000000
M2MEM_2_PREFETCHSADLIMITADDR0 : 0x00000000
M2MEM_2_PREFETCHSADSTARTADDR1 : 0x00000000
M2MEM_2_PREFETCHSADLIMITADDR1 : 0x00000000
M2MEM_2_PREFETCHSADSTARTADDR2 : 0x00000000
M2MEM_2_PREFETCHSADLIMITADDR2 : 0x00000000
M2MEM_2_SYSFEATURES0 : 0x1340008D
M2MEM_3_TOPOLOGY : 0x000669C0
M2MEM_3_PREFSADCONFIG0 : 0x00000000
M2MEM_3_PREFSADCONFIG1 : 0x00000000
M2MEM_3_PREFETCHSADSTARTADDR0 : 0x00000000
M2MEM_3_PREFETCHSADLIMITADDR0 : 0x00000000
M2MEM_3_PREFETCHSADSTARTADDR1 : 0x00000000
M2MEM_3_PREFETCHSADLIMITADDR1 : 0x00000000
M2MEM_3_PREFETCHSADSTARTADDR2 : 0x00000000
M2MEM_3_PREFETCHSADLIMITADDR2 : 0x00000000
M2MEM_3_SYSFEATURES0 : 0x1340008D
M2MEM_4_TOPOLOGY : 0x00018000
M2MEM_4_PREFSADCONFIG0 : 0x00000000
M2MEM_4_PREFSADCONFIG1 : 0x00000000
M2MEM_4_PREFETCHSADSTARTADDR0 : 0x00000000
M2MEM_4_PREFETCHSADLIMITADDR0 : 0x00000000
M2MEM_4_PREFETCHSADSTARTADDR1 : 0x00000000
M2MEM_4_PREFETCHSADLIMITADDR1 : 0x00000000
M2MEM_4_PREFETCHSADSTARTADDR2 : 0x00000000
M2MEM_4_PREFETCHSADLIMITADDR2 : 0x00000000
M2MEM_4_SYSFEATURES0 : 0x1368009C
M2MEM_5_TOPOLOGY : 0x00018000
M2MEM_5_PREFSADCONFIG0 : 0x00000000
M2MEM_5_PREFSADCONFIG1 : 0x00000000
M2MEM_5_PREFETCHSADSTARTADDR0 : 0x00000000
M2MEM_5_PREFETCHSADLIMITADDR0 : 0x00000000
M2MEM_5_PREFETCHSADSTARTADDR1 : 0x00000000
M2MEM_5_PREFETCHSADLIMITADDR1 : 0x00000000
M2MEM_5_PREFETCHSADSTARTADDR2 : 0x00000000
M2MEM_5_PREFETCHSADLIMITADDR2 : 0x00000000
M2MEM_5_SYSFEATURES0 : 0x1368009C
M2MEM_6_TOPOLOGY : 0x00018000
M2MEM_6_PREFSADCONFIG0 : 0x00000000
M2MEM_6_PREFSADCONFIG1 : 0x00000000
M2MEM_6_PREFETCHSADSTARTADDR0 : 0x00000000
M2MEM_6_PREFETCHSADLIMITADDR0 : 0x00000000
M2MEM_6_PREFETCHSADSTARTADDR1 : 0x00000000
M2MEM_6_PREFETCHSADLIMITADDR1 : 0x00000000
M2MEM_6_PREFETCHSADSTARTADDR2 : 0x00000000
M2MEM_6_PREFETCHSADLIMITADDR2 : 0x00000000
M2MEM_6_SYSFEATURES0 : 0x1368009C
M2MEM_7_TOPOLOGY : 0x00018000
M2MEM_7_PREFSADCONFIG0 : 0x00000000
M2MEM_7_PREFSADCONFIG1 : 0x00000000
M2MEM_7_PREFETCHSADSTARTADDR0 : 0x00000000
M2MEM_7_PREFETCHSADLIMITADDR0 : 0x00000000
M2MEM_7_PREFETCHSADSTARTADDR1 : 0x00000000
M2MEM_7_PREFETCHSADLIMITADDR1 : 0x00000000
M2MEM_7_PREFETCHSADSTARTADDR2 : 0x00000000
M2MEM_7_PREFETCHSADLIMITADDR2 : 0x00000000
M2MEM_7_SYSFEATURES0 : 0x1368009C
M2MEM_8_TOPOLOGY : 0x00032340
M2MEM_8_PREFSADCONFIG0 : 0x00000000
M2MEM_8_PREFSADCONFIG1 : 0x00000000
M2MEM_8_PREFETCHSADSTARTADDR0 : 0x00000000
M2MEM_8_PREFETCHSADLIMITADDR0 : 0x00000000
M2MEM_8_PREFETCHSADSTARTADDR1 : 0x00000000
M2MEM_8_PREFETCHSADLIMITADDR1 : 0x00000000
M2MEM_8_PREFETCHSADSTARTADDR2 : 0x00000000
M2MEM_8_PREFETCHSADLIMITADDR2 : 0x00000000
M2MEM_8_SYSFEATURES0 : 0x1368009C
M2MEM_9_TOPOLOGY : 0x00032340
M2MEM_9_PREFSADCONFIG0 : 0x00000000
M2MEM_9_PREFSADCONFIG1 : 0x00000000
M2MEM_9_PREFETCHSADSTARTADDR0 : 0x00000000
M2MEM_9_PREFETCHSADLIMITADDR0 : 0x00000000
M2MEM_9_PREFETCHSADSTARTADDR1 : 0x00000000
M2MEM_9_PREFETCHSADLIMITADDR1 : 0x00000000
M2MEM_9_PREFETCHSADSTARTADDR2 : 0x00000000
M2MEM_9_PREFETCHSADLIMITADDR2 : 0x00000000
M2MEM_9_SYSFEATURES0 : 0x1368009C
M2MEM_10_TOPOLOGY : 0x00032340
M2MEM_10_PREFSADCONFIG0 : 0x00000000
M2MEM_10_PREFSADCONFIG1 : 0x00000000
M2MEM_10_PREFETCHSADSTARTADDR0 : 0x00000000
M2MEM_10_PREFETCHSADLIMITADDR0 : 0x00000000
M2MEM_10_PREFETCHSADSTARTADDR1 : 0x00000000
M2MEM_10_PREFETCHSADLIMITADDR1 : 0x00000000
M2MEM_10_PREFETCHSADSTARTADDR2 : 0x00000000
M2MEM_10_PREFETCHSADLIMITADDR2 : 0x00000000
M2MEM_10_SYSFEATURES0 : 0x1368009C
M2MEM_11_TOPOLOGY : 0x00032340
M2MEM_11_PREFSADCONFIG0 : 0x00000000
M2MEM_11_PREFSADCONFIG1 : 0x00000000
M2MEM_11_PREFETCHSADSTARTADDR0 : 0x00000000
M2MEM_11_PREFETCHSADLIMITADDR0 : 0x00000000
M2MEM_11_PREFETCHSADSTARTADDR1 : 0x00000000
M2MEM_11_PREFETCHSADLIMITADDR1 : 0x00000000
M2MEM_11_PREFETCHSADSTARTADDR2 : 0x00000000
M2MEM_11_PREFETCHSADLIMITADDR2 : 0x00000000
M2MEM_11_SYSFEATURES0 : 0x1368009C
M2MEM_12_TOPOLOGY : 0x0004C680
M2MEM_12_PREFSADCONFIG0 : 0x00000000
M2MEM_12_PREFSADCONFIG1 : 0x00000000
M2MEM_12_PREFETCHSADSTARTADDR0 : 0x00000000
M2MEM_12_PREFETCHSADLIMITADDR0 : 0x00000000
M2MEM_12_PREFETCHSADSTARTADDR1 : 0x00000000
M2MEM_12_PREFETCHSADLIMITADDR1 : 0x00000000
M2MEM_12_PREFETCHSADSTARTADDR2 : 0x00000000
M2MEM_12_PREFETCHSADLIMITADDR2 : 0x00000000
M2MEM_12_SYSFEATURES0 : 0x1368009C
M2MEM_13_TOPOLOGY : 0x0004C680
M2MEM_13_PREFSADCONFIG0 : 0x00000000
M2MEM_13_PREFSADCONFIG1 : 0x00000000
M2MEM_13_PREFETCHSADSTARTADDR0 : 0x00000000
M2MEM_13_PREFETCHSADLIMITADDR0 : 0x00000000
M2MEM_13_PREFETCHSADSTARTADDR1 : 0x00000000
M2MEM_13_PREFETCHSADLIMITADDR1 : 0x00000000
M2MEM_13_PREFETCHSADSTARTADDR2 : 0x00000000
M2MEM_13_PREFETCHSADLIMITADDR2 : 0x00000000
M2MEM_13_SYSFEATURES0 : 0x1368009C
M2MEM_14_TOPOLOGY : 0x0004C680
M2MEM_14_PREFSADCONFIG0 : 0x00000000
M2MEM_14_PREFSADCONFIG1 : 0x00000000
M2MEM_14_PREFETCHSADSTARTADDR0 : 0x00000000
M2MEM_14_PREFETCHSADLIMITADDR0 : 0x00000000
M2MEM_14_PREFETCHSADSTARTADDR1 : 0x00000000
M2MEM_14_PREFETCHSADLIMITADDR1 : 0x00000000
M2MEM_14_PREFETCHSADSTARTADDR2 : 0x00000000
M2MEM_14_PREFETCHSADLIMITADDR2 : 0x00000000
M2MEM_14_SYSFEATURES0 : 0x1368009C
M2MEM_15_TOPOLOGY : 0x0004C680
M2MEM_15_PREFSADCONFIG0 : 0x00000000
M2MEM_15_PREFSADCONFIG1 : 0x00000000
M2MEM_15_PREFETCHSADSTARTADDR0 : 0x00000000
M2MEM_15_PREFETCHSADLIMITADDR0 : 0x00000000
M2MEM_15_PREFETCHSADSTARTADDR1 : 0x00000000
M2MEM_15_PREFETCHSADLIMITADDR1 : 0x00000000
M2MEM_15_PREFETCHSADSTARTADDR2 : 0x00000000
M2MEM_15_PREFETCHSADLIMITADDR2 : 0x00000000
M2MEM_15_SYSFEATURES0 : 0x1368009C
M2MEM_16_TOPOLOGY : 0x000669C0
M2MEM_16_PREFSADCONFIG0 : 0x00000000
M2MEM_16_PREFSADCONFIG1 : 0x00000000
M2MEM_16_PREFETCHSADSTARTADDR0 : 0x00000000
M2MEM_16_PREFETCHSADLIMITADDR0 : 0x00000000
M2MEM_16_PREFETCHSADSTARTADDR1 : 0x00000000
M2MEM_16_PREFETCHSADLIMITADDR1 : 0x00000000
M2MEM_16_PREFETCHSADSTARTADDR2 : 0x00000000
M2MEM_16_PREFETCHSADLIMITADDR2 : 0x00000000
M2MEM_16_SYSFEATURES0 : 0x1368009C
M2MEM_17_TOPOLOGY : 0x000669C0
M2MEM_17_PREFSADCONFIG0 : 0x00000000
M2MEM_17_PREFSADCONFIG1 : 0x00000000
M2MEM_17_PREFETCHSADSTARTADDR0 : 0x00000000
M2MEM_17_PREFETCHSADLIMITADDR0 : 0x00000000
M2MEM_17_PREFETCHSADSTARTADDR1 : 0x00000000
M2MEM_17_PREFETCHSADLIMITADDR1 : 0x00000000
M2MEM_17_PREFETCHSADSTARTADDR2 : 0x00000000
M2MEM_17_PREFETCHSADLIMITADDR2 : 0x00000000
M2MEM_17_SYSFEATURES0 : 0x1368009C
M2MEM_18_TOPOLOGY : 0x000669C0
M2MEM_18_PREFSADCONFIG0 : 0x00000000
M2MEM_18_PREFSADCONFIG1 : 0x00000000
M2MEM_18_PREFETCHSADSTARTADDR0 : 0x00000000
M2MEM_18_PREFETCHSADLIMITADDR0 : 0x00000000
M2MEM_18_PREFETCHSADSTARTADDR1 : 0x00000000
M2MEM_18_PREFETCHSADLIMITADDR1 : 0x00000000
M2MEM_18_PREFETCHSADSTARTADDR2 : 0x00000000
M2MEM_18_PREFETCHSADLIMITADDR2 : 0x00000000
M2MEM_18_SYSFEATURES0 : 0x1368009C
M2MEM_19_TOPOLOGY : 0x000669C0
M2MEM_19_PREFSADCONFIG0 : 0x00000000
M2MEM_19_PREFSADCONFIG1 : 0x00000000
M2MEM_19_PREFETCHSADSTARTADDR0 : 0x00000000
M2MEM_19_PREFETCHSADLIMITADDR0 : 0x00000000
M2MEM_19_PREFETCHSADSTARTADDR1 : 0x00000000
M2MEM_19_PREFETCHSADLIMITADDR1 : 0x00000000
M2MEM_19_PREFETCHSADSTARTADDR2 : 0x00000000
M2MEM_19_PREFETCHSADLIMITADDR2 : 0x00000000
M2MEM_19_SYSFEATURES0 : 0x1368009C
**** CPU 1: ****
SNC_CONFIG_MS2IDI : 0x0000000F
UNCORE_SNC_CONFIG_MS2IDI : 0x271A0D0D
UMA_CLUSTER_MS2IDI : 0x00000000
XPT_2_ENTRY_MINISAD_TABLE : 0x00000000
XPT_LOCAL_PREFETCH_CONFIG1 : 0x000400BD
XPT_LOCAL_PREFETCH_CONFIG2 : 0x008186A0
XPT_32_ENTRY_MINISAD_TABLE_0 : 0x00000000
XPT_32_ENTRY_MINISAD_TABLE_1 : 0x00000000
XPT_32_ENTRY_MINISAD_TABLE_2 : 0x00000000
XPT_32_ENTRY_MINISAD_TABLE_3 : 0x00000000
XPT_32_ENTRY_MINISAD_TABLE_4 : 0x00000000
XPT_32_ENTRY_MINISAD_TABLE_5 : 0x00000000
XPT_32_ENTRY_PREFETCH_BASE_0 : 0x00000000
XPT_32_ENTRY_PREFETCH_BASE_1 : 0x00000000
XPT_32_ENTRY_PREFETCH_BASE_2 : 0x00000000
XPT_32_ENTRY_PREFETCH_BASE_3 : 0x00000000
XPT_REMOTE_PREFETCH_CONFIG1 : 0x000400BD
XPT_REMOTE_PREFETCH_CONFIG2 : 0x008186A0
XPT_UPI_DECODE_TABLE_0_N0: 0x00000000
XPT_UPI_DECODE_TABLE_0_N1: 0x00000000
XPT_UPI_DECODE_TABLE_1_N0: 0x00000000
XPT_UPI_DECODE_TABLE_1_N1: 0x00000000
XPT_UPI_DECODE_TABLE_2_N0: 0x00000000
XPT_UPI_DECODE_TABLE_2_N1: 0x00000000
XPT_UPI_DECODE_TABLE_3_N0: 0x00000000
XPT_UPI_DECODE_TABLE_3_N1: 0x00000000
KTI_0_SNC_CONFIG_KTI : 0x0000000F
KTI_0_KTIAGCTRL : 0x00101012
KTI_0_KTI_SNC_BASE_1 : 0x0FFF0082
KTI_0_KTI_SNC_BASE_2 : 0x1FE000A2
KTI_0_KTI_SNC_BASE_3 : 0x000000C2
KTI_0_KTI_SNC_BASE_4 : 0x000000E2
KTI_0_KTI_SNC_BASE_5 : 0x00000102
M3KTI 0:
M3KPRECTRL_0 : 0x00000040
M3KPRETL_0 : 0x00000000
KTI_1_SNC_CONFIG_KTI : 0x0000000F
KTI_1_KTIAGCTRL : 0x00101012
KTI_1_KTI_SNC_BASE_1 : 0x0FFF0082
KTI_1_KTI_SNC_BASE_2 : 0x1FE000A2
KTI_1_KTI_SNC_BASE_3 : 0x000000C2
KTI_1_KTI_SNC_BASE_4 : 0x000000E2
KTI_1_KTI_SNC_BASE_5 : 0x00000102
M3KTI 1:
M3KPRECTRL_1 : 0x00000040
M3KPRETL_1 : 0x00000000
KTI_2_SNC_CONFIG_KTI : 0x0000000F
KTI_2_KTIAGCTRL : 0x00101012
KTI_2_KTI_SNC_BASE_1 : 0x0FFF0082
KTI_2_KTI_SNC_BASE_2 : 0x1FE000A2
KTI_2_KTI_SNC_BASE_3 : 0x000000C2
KTI_2_KTI_SNC_BASE_4 : 0x000000E2
KTI_2_KTI_SNC_BASE_5 : 0x00000102
M3KTI 2:
M3KPRECTRL_2 : 0x00000040
M3KPRETL_2 : 0x00000000
KTI_3_SNC_CONFIG_KTI : 0x0000000F
KTI_3_KTIAGCTRL : 0x00101012
KTI_3_KTI_SNC_BASE_1 : 0x0FFF0082
KTI_3_KTI_SNC_BASE_2 : 0x1FE000A2
KTI_3_KTI_SNC_BASE_3 : 0x000000C2
KTI_3_KTI_SNC_BASE_4 : 0x000000E2
KTI_3_KTI_SNC_BASE_5 : 0x00000102
M3KTI 3:
M3KPRECTRL_3 : 0x00000040
M3KPRETL_3 : 0x00000000
CHA_SNC_CONFIG_CHA_PMA : 0x271A0D0F
SNC_CONFIG_IIO_VTD : 0x0000000F
UNCORE_SNC_IIO_VTD : 0x04E6868D
SNC_BASE_1_IIO_VTD : 0x0FFF0082
SNC_BASE_2_IIO_VTD : 0x1FE000A2
SNC_BASE_3_IIO_VTD : 0x000000C2
SNC_BASE_4_IIO_VTD : 0x000000E2
SNC_BASE_5_IIO_VTD : 0x00000102
IIO 1:
IIO_1_SNC_CONFIG_IIO : 0x0000000F
IIO_1_SNC_BASE_1 : 0x0FFF0082
IIO_1_SNC_BASE_2 : 0x1FE000A2
IIO_1_SNC_BASE_3 : 0x000000C2
IIO_1_SNC_BASE_4 : 0x000000E2
IIO_1_SNC_BASE_5 : 0x00000102
IIO 2:
IIO_2_SNC_CONFIG_IIO : 0x0000000F
IIO_2_SNC_BASE_1 : 0x0FFF0082
IIO_2_SNC_BASE_2 : 0x1FE000A2
IIO_2_SNC_BASE_3 : 0x000000C2
IIO_2_SNC_BASE_4 : 0x000000E2
IIO_2_SNC_BASE_5 : 0x00000102
IIO 3:
IIO_3_SNC_CONFIG_IIO : 0x0000000F
IIO_3_SNC_BASE_1 : 0x0FFF0082
IIO_3_SNC_BASE_2 : 0x1FE000A2
IIO_3_SNC_BASE_3 : 0x000000C2
IIO_3_SNC_BASE_4 : 0x000000E2
IIO_3_SNC_BASE_5 : 0x00000102
IIO 4:
IIO_4_SNC_CONFIG_IIO : 0x0000000F
IIO_4_SNC_BASE_1 : 0x0FFF0082
IIO_4_SNC_BASE_2 : 0x1FE000A2
IIO_4_SNC_BASE_3 : 0x000000C2
IIO_4_SNC_BASE_4 : 0x000000E2
IIO_4_SNC_BASE_5 : 0x00000102
IIO 5:
IIO_5_SNC_CONFIG_IIO : 0x0000000F
IIO_5_SNC_BASE_1 : 0x0FFF0082
IIO_5_SNC_BASE_2 : 0x1FE000A2
IIO_5_SNC_BASE_3 : 0x000000C2
IIO_5_SNC_BASE_4 : 0x000000E2
IIO_5_SNC_BASE_5 : 0x00000102
IIO 6:
IIO_6_SNC_CONFIG_IIO : 0x0000000F
IIO_6_SNC_BASE_1 : 0x0FFF0082
IIO_6_SNC_BASE_2 : 0x1FE000A2
IIO_6_SNC_BASE_3 : 0x000000C2
IIO_6_SNC_BASE_4 : 0x000000E2
IIO_6_SNC_BASE_5 : 0x00000102
IIO 8:
IIO_8_SNC_CONFIG_IIO : 0x0000000F
IIO_8_SNC_BASE_1 : 0x0FFF0082
IIO_8_SNC_BASE_2 : 0x1FE000A2
IIO_8_SNC_BASE_3 : 0x000000C2
IIO_8_SNC_BASE_4 : 0x000000E2
IIO_8_SNC_BASE_5 : 0x00000102
IIO 9:
IIO_9_SNC_CONFIG_IIO : 0x0000000F
IIO_9_SNC_BASE_1 : 0x0FFF0082
IIO_9_SNC_BASE_2 : 0x1FE000A2
IIO_9_SNC_BASE_3 : 0x000000C2
IIO_9_SNC_BASE_4 : 0x000000E2
IIO_9_SNC_BASE_5 : 0x00000102
IIO 10:
IIO_10_SNC_CONFIG_IIO : 0x0000000F
IIO_10_SNC_BASE_1 : 0x0FFF0082
IIO_10_SNC_BASE_2 : 0x1FE000A2
IIO_10_SNC_BASE_3 : 0x000000C2
IIO_10_SNC_BASE_4 : 0x000000E2
IIO_10_SNC_BASE_5 : 0x00000102
IIO 11:
IIO_11_SNC_CONFIG_IIO : 0x0000000F
IIO_11_SNC_BASE_1 : 0x0FFF0082
IIO_11_SNC_BASE_2 : 0x1FE000A2
IIO_11_SNC_BASE_3 : 0x000000C2
IIO_11_SNC_BASE_4 : 0x000000E2
IIO_11_SNC_BASE_5 : 0x00000102
M2MEM_0_TOPOLOGY : 0x00018001
M2MEM_0_PREFSADCONFIG0 : 0x00000000
M2MEM_0_PREFSADCONFIG1 : 0x00000000
M2MEM_0_PREFETCHSADSTARTADDR0 : 0x00000000
M2MEM_0_PREFETCHSADLIMITADDR0 : 0x00000000
M2MEM_0_PREFETCHSADSTARTADDR1 : 0x00000000
M2MEM_0_PREFETCHSADLIMITADDR1 : 0x00000000
M2MEM_0_PREFETCHSADSTARTADDR2 : 0x00000000
M2MEM_0_PREFETCHSADLIMITADDR2 : 0x00000000
M2MEM_0_SYSFEATURES0 : 0x1340008D
M2MEM_1_TOPOLOGY : 0x00032341
M2MEM_1_PREFSADCONFIG0 : 0x00000000
M2MEM_1_PREFSADCONFIG1 : 0x00000000
M2MEM_1_PREFETCHSADSTARTADDR0 : 0x00000000
M2MEM_1_PREFETCHSADLIMITADDR0 : 0x00000000
M2MEM_1_PREFETCHSADSTARTADDR1 : 0x00000000
M2MEM_1_PREFETCHSADLIMITADDR1 : 0x00000000
M2MEM_1_PREFETCHSADSTARTADDR2 : 0x00000000
M2MEM_1_PREFETCHSADLIMITADDR2 : 0x00000000
M2MEM_1_SYSFEATURES0 : 0x1340008D
M2MEM_2_TOPOLOGY : 0x0004C681
M2MEM_2_PREFSADCONFIG0 : 0x00000000
M2MEM_2_PREFSADCONFIG1 : 0x00000000
M2MEM_2_PREFETCHSADSTARTADDR0 : 0x00000000
M2MEM_2_PREFETCHSADLIMITADDR0 : 0x00000000
M2MEM_2_PREFETCHSADSTARTADDR1 : 0x00000000
M2MEM_2_PREFETCHSADLIMITADDR1 : 0x00000000
M2MEM_2_PREFETCHSADSTARTADDR2 : 0x00000000
M2MEM_2_PREFETCHSADLIMITADDR2 : 0x00000000
M2MEM_2_SYSFEATURES0 : 0x1340008D
M2MEM_3_TOPOLOGY : 0x000669C1
M2MEM_3_PREFSADCONFIG0 : 0x00000000
M2MEM_3_PREFSADCONFIG1 : 0x00000000
M2MEM_3_PREFETCHSADSTARTADDR0 : 0x00000000
M2MEM_3_PREFETCHSADLIMITADDR0 : 0x00000000
M2MEM_3_PREFETCHSADSTARTADDR1 : 0x00000000
M2MEM_3_PREFETCHSADLIMITADDR1 : 0x00000000
M2MEM_3_PREFETCHSADSTARTADDR2 : 0x00000000
M2MEM_3_PREFETCHSADLIMITADDR2 : 0x00000000
M2MEM_3_SYSFEATURES0 : 0x1340008D
M2MEM_4_TOPOLOGY : 0x00018001
M2MEM_4_PREFSADCONFIG0 : 0x00000000
M2MEM_4_PREFSADCONFIG1 : 0x00000000
M2MEM_4_PREFETCHSADSTARTADDR0 : 0x00000000
M2MEM_4_PREFETCHSADLIMITADDR0 : 0x00000000
M2MEM_4_PREFETCHSADSTARTADDR1 : 0x00000000
M2MEM_4_PREFETCHSADLIMITADDR1 : 0x00000000
M2MEM_4_PREFETCHSADSTARTADDR2 : 0x00000000
M2MEM_4_PREFETCHSADLIMITADDR2 : 0x00000000
M2MEM_4_SYSFEATURES0 : 0x1368009C
M2MEM_5_TOPOLOGY : 0x00018001
M2MEM_5_PREFSADCONFIG0 : 0x00000000
M2MEM_5_PREFSADCONFIG1 : 0x00000000
M2MEM_5_PREFETCHSADSTARTADDR0 : 0x00000000
M2MEM_5_PREFETCHSADLIMITADDR0 : 0x00000000
M2MEM_5_PREFETCHSADSTARTADDR1 : 0x00000000
M2MEM_5_PREFETCHSADLIMITADDR1 : 0x00000000
M2MEM_5_PREFETCHSADSTARTADDR2 : 0x00000000
M2MEM_5_PREFETCHSADLIMITADDR2 : 0x00000000
M2MEM_5_SYSFEATURES0 : 0x1368009C
M2MEM_6_TOPOLOGY : 0x00018001
M2MEM_6_PREFSADCONFIG0 : 0x00000000
M2MEM_6_PREFSADCONFIG1 : 0x00000000
M2MEM_6_PREFETCHSADSTARTADDR0 : 0x00000000
M2MEM_6_PREFETCHSADLIMITADDR0 : 0x00000000
M2MEM_6_PREFETCHSADSTARTADDR1 : 0x00000000
M2MEM_6_PREFETCHSADLIMITADDR1 : 0x00000000
M2MEM_6_PREFETCHSADSTARTADDR2 : 0x00000000
M2MEM_6_PREFETCHSADLIMITADDR2 : 0x00000000
M2MEM_6_SYSFEATURES0 : 0x1368009C
M2MEM_7_TOPOLOGY : 0x00018001
M2MEM_7_PREFSADCONFIG0 : 0x00000000
M2MEM_7_PREFSADCONFIG1 : 0x00000000
M2MEM_7_PREFETCHSADSTARTADDR0 : 0x00000000
M2MEM_7_PREFETCHSADLIMITADDR0 : 0x00000000
M2MEM_7_PREFETCHSADSTARTADDR1 : 0x00000000
M2MEM_7_PREFETCHSADLIMITADDR1 : 0x00000000
M2MEM_7_PREFETCHSADSTARTADDR2 : 0x00000000
M2MEM_7_PREFETCHSADLIMITADDR2 : 0x00000000
M2MEM_7_SYSFEATURES0 : 0x1368009C
M2MEM_8_TOPOLOGY : 0x00032341
M2MEM_8_PREFSADCONFIG0 : 0x00000000
M2MEM_8_PREFSADCONFIG1 : 0x00000000
M2MEM_8_PREFETCHSADSTARTADDR0 : 0x00000000
M2MEM_8_PREFETCHSADLIMITADDR0 : 0x00000000
M2MEM_8_PREFETCHSADSTARTADDR1 : 0x00000000
M2MEM_8_PREFETCHSADLIMITADDR1 : 0x00000000
M2MEM_8_PREFETCHSADSTARTADDR2 : 0x00000000
M2MEM_8_PREFETCHSADLIMITADDR2 : 0x00000000
M2MEM_8_SYSFEATURES0 : 0x1368009C
M2MEM_9_TOPOLOGY : 0x00032341
M2MEM_9_PREFSADCONFIG0 : 0x00000000
M2MEM_9_PREFSADCONFIG1 : 0x00000000
M2MEM_9_PREFETCHSADSTARTADDR0 : 0x00000000
M2MEM_9_PREFETCHSADLIMITADDR0 : 0x00000000
M2MEM_9_PREFETCHSADSTARTADDR1 : 0x00000000
M2MEM_9_PREFETCHSADLIMITADDR1 : 0x00000000
M2MEM_9_PREFETCHSADSTARTADDR2 : 0x00000000
M2MEM_9_PREFETCHSADLIMITADDR2 : 0x00000000
M2MEM_9_SYSFEATURES0 : 0x1368009C
M2MEM_10_TOPOLOGY : 0x00032341
M2MEM_10_PREFSADCONFIG0 : 0x00000000
M2MEM_10_PREFSADCONFIG1 : 0x00000000
M2MEM_10_PREFETCHSADSTARTADDR0 : 0x00000000
M2MEM_10_PREFETCHSADLIMITADDR0 : 0x00000000
M2MEM_10_PREFETCHSADSTARTADDR1 : 0x00000000
M2MEM_10_PREFETCHSADLIMITADDR1 : 0x00000000
M2MEM_10_PREFETCHSADSTARTADDR2 : 0x00000000
M2MEM_10_PREFETCHSADLIMITADDR2 : 0x00000000
M2MEM_10_SYSFEATURES0 : 0x1368009C
M2MEM_11_TOPOLOGY : 0x00032341
M2MEM_11_PREFSADCONFIG0 : 0x00000000
M2MEM_11_PREFSADCONFIG1 : 0x00000000
M2MEM_11_PREFETCHSADSTARTADDR0 : 0x00000000
M2MEM_11_PREFETCHSADLIMITADDR0 : 0x00000000
M2MEM_11_PREFETCHSADSTARTADDR1 : 0x00000000
M2MEM_11_PREFETCHSADLIMITADDR1 : 0x00000000
M2MEM_11_PREFETCHSADSTARTADDR2 : 0x00000000
M2MEM_11_PREFETCHSADLIMITADDR2 : 0x00000000
M2MEM_11_SYSFEATURES0 : 0x1368009C
M2MEM_12_TOPOLOGY : 0x0004C681
M2MEM_12_PREFSADCONFIG0 : 0x00000000
M2MEM_12_PREFSADCONFIG1 : 0x00000000
M2MEM_12_PREFETCHSADSTARTADDR0 : 0x00000000
M2MEM_12_PREFETCHSADLIMITADDR0 : 0x00000000
M2MEM_12_PREFETCHSADSTARTADDR1 : 0x00000000
M2MEM_12_PREFETCHSADLIMITADDR1 : 0x00000000
M2MEM_12_PREFETCHSADSTARTADDR2 : 0x00000000
M2MEM_12_PREFETCHSADLIMITADDR2 : 0x00000000
M2MEM_12_SYSFEATURES0 : 0x1368009C
M2MEM_13_TOPOLOGY : 0x0004C681
M2MEM_13_PREFSADCONFIG0 : 0x00000000
M2MEM_13_PREFSADCONFIG1 : 0x00000000
M2MEM_13_PREFETCHSADSTARTADDR0 : 0x00000000
M2MEM_13_PREFETCHSADLIMITADDR0 : 0x00000000
M2MEM_13_PREFETCHSADSTARTADDR1 : 0x00000000
M2MEM_13_PREFETCHSADLIMITADDR1 : 0x00000000
M2MEM_13_PREFETCHSADSTARTADDR2 : 0x00000000
M2MEM_13_PREFETCHSADLIMITADDR2 : 0x00000000
M2MEM_13_SYSFEATURES0 : 0x1368009C
M2MEM_14_TOPOLOGY : 0x0004C681
M2MEM_14_PREFSADCONFIG0 : 0x00000000
M2MEM_14_PREFSADCONFIG1 : 0x00000000
M2MEM_14_PREFETCHSADSTARTADDR0 : 0x00000000
M2MEM_14_PREFETCHSADLIMITADDR0 : 0x00000000
M2MEM_14_PREFETCHSADSTARTADDR1 : 0x00000000
M2MEM_14_PREFETCHSADLIMITADDR1 : 0x00000000
M2MEM_14_PREFETCHSADSTARTADDR2 : 0x00000000
M2MEM_14_PREFETCHSADLIMITADDR2 : 0x00000000
M2MEM_14_SYSFEATURES0 : 0x1368009C
M2MEM_15_TOPOLOGY : 0x0004C681
M2MEM_15_PREFSADCONFIG0 : 0x00000000
M2MEM_15_PREFSADCONFIG1 : 0x00000000
M2MEM_15_PREFETCHSADSTARTADDR0 : 0x00000000
M2MEM_15_PREFETCHSADLIMITADDR0 : 0x00000000
M2MEM_15_PREFETCHSADSTARTADDR1 : 0x00000000
M2MEM_15_PREFETCHSADLIMITADDR1 : 0x00000000
M2MEM_15_PREFETCHSADSTARTADDR2 : 0x00000000
M2MEM_15_PREFETCHSADLIMITADDR2 : 0x00000000
M2MEM_15_SYSFEATURES0 : 0x1368009C
M2MEM_16_TOPOLOGY : 0x000669C1
M2MEM_16_PREFSADCONFIG0 : 0x00000000
M2MEM_16_PREFSADCONFIG1 : 0x00000000
M2MEM_16_PREFETCHSADSTARTADDR0 : 0x00000000
M2MEM_16_PREFETCHSADLIMITADDR0 : 0x00000000
M2MEM_16_PREFETCHSADSTARTADDR1 : 0x00000000
M2MEM_16_PREFETCHSADLIMITADDR1 : 0x00000000
M2MEM_16_PREFETCHSADSTARTADDR2 : 0x00000000
M2MEM_16_PREFETCHSADLIMITADDR2 : 0x00000000
M2MEM_16_SYSFEATURES0 : 0x1368009C
M2MEM_17_TOPOLOGY : 0x000669C1
M2MEM_17_PREFSADCONFIG0 : 0x00000000
M2MEM_17_PREFSADCONFIG1 : 0x00000000
M2MEM_17_PREFETCHSADSTARTADDR0 : 0x00000000
M2MEM_17_PREFETCHSADLIMITADDR0 : 0x00000000
M2MEM_17_PREFETCHSADSTARTADDR1 : 0x00000000
M2MEM_17_PREFETCHSADLIMITADDR1 : 0x00000000
M2MEM_17_PREFETCHSADSTARTADDR2 : 0x00000000
M2MEM_17_PREFETCHSADLIMITADDR2 : 0x00000000
M2MEM_17_SYSFEATURES0 : 0x1368009C
M2MEM_18_TOPOLOGY : 0x000669C1
M2MEM_18_PREFSADCONFIG0 : 0x00000000
M2MEM_18_PREFSADCONFIG1 : 0x00000000
M2MEM_18_PREFETCHSADSTARTADDR0 : 0x00000000
M2MEM_18_PREFETCHSADLIMITADDR0 : 0x00000000
M2MEM_18_PREFETCHSADSTARTADDR1 : 0x00000000
M2MEM_18_PREFETCHSADLIMITADDR1 : 0x00000000
M2MEM_18_PREFETCHSADSTARTADDR2 : 0x00000000
M2MEM_18_PREFETCHSADLIMITADDR2 : 0x00000000
M2MEM_18_SYSFEATURES0 : 0x1368009C
M2MEM_19_TOPOLOGY : 0x000669C1
M2MEM_19_PREFSADCONFIG0 : 0x00000000
M2MEM_19_PREFSADCONFIG1 : 0x00000000
M2MEM_19_PREFETCHSADSTARTADDR0 : 0x00000000
M2MEM_19_PREFETCHSADLIMITADDR0 : 0x00000000
M2MEM_19_PREFETCHSADSTARTADDR1 : 0x00000000
M2MEM_19_PREFETCHSADLIMITADDR1 : 0x00000000
M2MEM_19_PREFETCHSADSTARTADDR2 : 0x00000000
M2MEM_19_PREFETCHSADLIMITADDR2 : 0x00000000
M2MEM_19_SYSFEATURES0 : 0x1368009C
**** SNC XPT DUMP END ****
Socket 0 AdTransgressCredits: 0x0, BlTransgressCredits: 0x0
Socket 1 AdTransgressCredits: 0x0, BlTransgressCredits: 0x0
MBA2.0 calibration tables
Mbe BW Calibration: 0 (0 - Linear, 1 - Biased, 2 - Legacy)
ProgramSncShadowReg
Socket:0 Base1 0x0FFF0000
Socket:0 Base2 0x1FE00022
Socket:0 Base3 0x00000042
Socket:0 Base4 0x00000062
Socket:0 Base5 0x00000082
Socket:0 UpperBase1 0x00000000
Socket:0 SncConfig 0x0000000A
Socket:1 Base1 0x0FFF0082
Socket:1 Base2 0x1FE000A2
Socket:1 Base3 0x000000C2
Socket:1 Base4 0x000000E2
Socket:1 Base5 0x00000102
Socket:1 UpperBase1 0x00000000
Socket:1 SncConfig 0x0000000A
******* Configure Mesh Mode - END *******
S3M Provisioning SoftStrap Disabled, Exit.
PUcode Patch provisioning/commit flow
S3mPucodeCfrPatchProvisionCommit didn't find suitable CFR image, Exit.
S3M Patch provisioning/commit flow
Get Image :FF800090 11FF4
CFR Patch Provision start...
IFWI integrated S3M CFR patch revision SVN: 00000001, RevID: 0000001E.
S0 S3M_S3MFW_CFR_SVN_N0_S3M_TREG_REG : 00000000
S0 S3M_S3MFW_REVID_N0_S3M_TREG_REG : 00000000
S0 S3M_S3MFW_CFR_SVN_N1_S3M_TREG_REG : 00010001
S0 S3M_S3MFW_REVID_N1_S3M_TREG_REG : 0000001E
Committed region with the latest patch, skip provision.
Socket 0 Can't Provision, Skip.
IFWI integrated S3M CFR patch revision SVN: 00000001, RevID: 0000001E.
S1 S3M_S3MFW_CFR_SVN_N0_S3M_TREG_REG : 00000000
S1 S3M_S3MFW_REVID_N0_S3M_TREG_REG : 00000000
S1 S3M_S3MFW_CFR_SVN_N1_S3M_TREG_REG : 00010001
S1 S3M_S3MFW_REVID_N1_S3M_TREG_REG : 0000001E
Committed region with the latest patch, skip provision.
Socket 1 Can't Provision, Skip.
CFR Patch Commit start...
S0 S3M_S3MFW_CFR_SVN_N0_S3M_TREG_REG : 00000000
S0 S3M_S3MFW_REVID_N0_S3M_TREG_REG : 00000000
Socket 0 can't commit, skip
S1 S3M_S3MFW_CFR_SVN_N0_S3M_TREG_REG : 00000000
S1 S3M_S3MFW_REVID_N0_S3M_TREG_REG : 00000000
Socket 1 can't commit, skip
CFR Patch Provision/Commit Completed.
IIO Early Post Link Training Starting...
[0.1 p1] 00:15:01.0: Link Down!
[0.2 p9] 00:26:01.0: Link Down!
[0.3 p17] 00:37:01.0: Link Down!
[0.4 p25] 00:48:01.0: Link Down!
[0.4 p27] 00:48:03.0: Link Down!
[0.4 p29] 00:48:05.0: Link Down!
[0.4 p31] 00:48:07.0: Link Down!
[0.5 p33] 00:59:01.0: Link Down!
[0.5 p35] 00:59:03.0: Link Down!
[0.5 p37] 00:59:05.0: Link Down!
[0.5 p39] 00:59:07.0: Link Down!
[1.1 p1] 00:97:01.0: Link Down!
[1.2 p9] 00:A7:01.0: Link Down!
[1.3 p17] 00:B7:01.0: Link Down!
[1.4 p25] 00:C7:01.0: Link Down!
[1.4 p27] 00:C7:03.0: Link Down!
[1.4 p29] 00:C7:05.0: Link Down!
[1.4 p31] 00:C7:07.0: Link Down!
[1.5 p33] 00:D7:01.0: Link Down!
[1.5 p35] 00:D7:03.0: Link Down!
[1.5 p37] 00:D7:05.0: Link Down!
[1.5 p39] 00:D7:07.0: Link Down!
[1.6 p41] 00:80:01.0: Link Down!
[1.6 p45] 00:80:05.0: Link Down!
IioLateInitialization for Socket = 0 Start..
[0] IioEarlyPostLinkTrainingPhase Start
[0 p0] DEVCAP2 7117D6 DEVCTL2 0010 -> 0009 -> 0009
CXL_IO_INIT_START
CXL_IO_INIT_END
FBLP_POST_TRAIN_INIT_START
FBLP_POST_TRAIN_INIT_END
[0.0] VT-d initialization, BAR=957FC000
[0.1] VT-d initialization, BAR=9F7FC000
[0.2] VT-d initialization, BAR=A93FC000
[0.3] VT-d initialization, BAR=B2FFC000
[0.4] VT-d initialization, BAR=BCBFC000
[0.5] VT-d initialization, BAR=C67FC000
[0.8] VT-d initialization, BAR=C6FFC000
[0.9] VT-d initialization, BAR=C77FC000
[0.10] VT-d initialization, BAR=C7FFC000
[0.11] VT-d initialization, BAR=C87FC000
IIO_PSF_INIT_START
IIO_PSF_INIT_END
[0] Hide devices; Phase = A
IioLateInitialization for Socket = 1 Start..
[1] IioEarlyPostLinkTrainingPhase Start
CXL_IO_INIT_START
CXL_IO_INIT_END
FBLP_POST_TRAIN_INIT_START
FBLP_POST_TRAIN_INIT_END
[1.1] VT-d initialization, BAR=D97FC000
[1.2] VT-d initialization, BAR=E17FC000
[1.3] VT-d initialization, BAR=E97FC000
[1.4] VT-d initialization, BAR=F17FC000
[1.5] VT-d initialization, BAR=F97FC000
[1.6] VT-d initialization, BAR=D13FC000
[1.8] VT-d initialization, BAR=F9FFC000
[1.9] VT-d initialization, BAR=FA7FC000
[1.10] VT-d initialization, BAR=FAFFC000
[1.11] VT-d initialization, BAR=FB7FC000
IIO_PSF_INIT_START
IIO_PSF_INIT_END
[1] Hide devices; Phase = A
[0.1 p1] 00:15:01.0: Device is not present!
[0.2 p9] 00:26:01.0: Device is not present!
[0.3 p17] 00:37:01.0: Device is not present!
[0.4 p25] 00:48:01.0: Device is not present!
[0.4 p27] 00:48:03.0: Device is not present!
[0.4 p29] 00:48:05.0: Device is not present!
[0.4 p31] 00:48:07.0: Device is not present!
[0.5 p33] 00:59:01.0: Device is not present!
[0.5 p35] 00:59:03.0: Device is not present!
[0.5 p37] 00:59:05.0: Device is not present!
[0.5 p39] 00:59:07.0: Device is not present!
[1.1 p1] 00:97:01.0: Device is not present!
[1.2 p9] 00:A7:01.0: Device is not present!
[1.3 p17] 00:B7:01.0: Device is not present!
[1.4 p25] 00:C7:01.0: Device is not present!
[1.4 p27] 00:C7:03.0: Device is not present!
[1.4 p29] 00:C7:05.0: Device is not present!
[1.4 p31] 00:C7:07.0: Device is not present!
[1.5 p33] 00:D7:01.0: Device is not present!
[1.5 p35] 00:D7:03.0: Device is not present!
[1.5 p37] 00:D7:05.0: Device is not present!
[1.5 p39] 00:D7:07.0: Device is not present!
[1.6 p41] 00:80:01.0: Device is not present!
[1.6 p45] 00:80:05.0: Device is not present!
[IIO](VMD) VMD init registered on endOfPei.
IIO Early Post Link Training Completed!
InstallEfiMemory()
GetMemoryMap: TsegBase: 78000000
GetMemoryMap: TsegRange: 08000000
RequiredMemSize for ACPI = 0xE44000 bytes
Found 0x00000000000A0000 bytes at 0x0000000000000000
Found 0x0000000000060000 bytes at 0x00000000000A0000
Found 0x0000000077700000 bytes at 0x0000000000100000
Found 0x0000000008000000 bytes at 0x0000000078000000
Found 0x0000000000800000 bytes at 0x0000000077800000
Save MemoryMap data into Hob
Building RESOURCE_SYSTEM_MEMORY Hob:
PeiMemoryBaseAddress = 0x629D0000, PeiMemoryLength = 0x14E30000
TOHM:0x0000004080000000
Reset Requested: 0
Pipe Exit starting...
S[01] Waiting on...
S[00] SBSP...
S[01] Waiting on...
Skt1 NEM Tear Down @ 769BB000
Pipe Exit completed! Reset Requested: 0
Enhanced Warning Log:
Checking for Reset Requests...
ResetRequired: 00
ConfigurePsmi () - Trace region size is 0 for all cache types; Socket: 0
ConfigurePsmi () - Trace region size is 0 for all cache types; Socket: 1
None
Continue with system BIOS POST ...
PROGRESS CODE: V03020003 I0
[HECI Transport-1 PEI] Send pkt: 80010020
00: 01
[HECI Transport-1 PEI] Got pkt: 800B0020
00: 81 01 01 14 00 88 00 01 - 00 00 00
[HECI Transport-1 PEI] Send pkt: 80300008
00: 00 00 05 00 1A 00 00 00 - 00 00 00 00 1C 00 00 00
10: 00 00 00 00 00 00 00 00 - 00 00 00 00 00 00 00 00
20: 00 00 00 00 00 00 00 00 - 00 00 00 00 00 00 00 00
[HECI Transport-1 PEI] Got pkt: 80300008
00: 00 00 05 00 1A 00 00 00 - 00 00 00 00 1C 00 00 00
10: 00 00 00 00 00 00 00 02 - 00 00 00 00 00 00 00 00
20: 00 00 00 00 00 00 00 00 - 00 00 00 00 00 00 00 00
Fail to Configure PSYS_CRIT
[HECI Transport-1 PEI] Send pkt: 80140007
00: F2 02 00 00 00 00 00 00 - 00 00 00 00 00 00 00 00
10: 0C 00 00 00
[HECI Transport-1 PEI] Got pkt: 80240007
00: F2 82 00 00 00 00 00 00 - 50 16 00 00 00 00 00 00
10: 0C 00 00 00 00 00 00 02 - 6D 32 FF FF FF FF 6E 11
20: 00 00 08 00
DDR PPR data hub created! Number of entries = 0
HBM PPR data hub created! Number of entries = 0
-> LIB data: Initialize
-> IBB Block Start, Status 0x80000007
IioVmdDisableForPchRpInit: DonePCH Series : EBG PCH
PCH Stepping : B0
[HECI Transport-1 PEI] Send pkt: 80010020
00: 01
[HECI Transport-1 PEI] Got pkt: 800B0020
00: 81 01 01 14 00 88 00 01 - 00 00 00
[HECI Transport-1 PEI] Send pkt: 80300008
00: 00 00 05 00 1A 00 00 00 - 00 00 00 00 1C 00 00 00
10: 00 00 00 00 00 00 00 00 - 00 00 00 00 00 00 00 00
20: 00 00 00 00 00 00 00 00 - 00 00 00 00 00 00 00 00
[HECI Transport-1 PEI] Got pkt: 80300008
00: 00 00 05 00 1A 00 00 00 - 00 00 00 00 1C 00 00 00
10: 00 00 00 00 00 00 00 02 - 00 00 00 00 00 00 00 00
20: 00 00 00 00 00 00 00 00 - 00 00 00 00 00 00 00 00
Fail to Configure PSYS_CRIT
[HECI Transport-1 PEI] Send pkt: 80010020
00: 01
[HECI Transport-1 PEI] Got pkt: 800B0020
00: 81 01 01 14 00 88 00 01 - 00 00 00
[HECI Transport-1 PEI] Send pkt: 80300008
00: 00 00 05 00 1A 00 00 00 - 00 00 00 00 1C 00 00 00
10: 00 00 00 00 00 00 00 00 - 00 00 00 00 00 00 00 00
20: 00 00 00 00 00 00 00 00 - 00 00 00 00 00 00 00 00
[HECI Transport-1 PEI] Got pkt: 80300008
00: 00 00 05 00 1A 00 00 00 - 00 00 00 00 1C 00 00 00
10: 00 00 00 00 00 00 00 02 - 00 00 00 00 00 00 00 00
20: 00 00 00 00 00 00 00 00 - 00 00 00 00 00 00 00 00
Fail to Configure PSYS_CRIT
[HECI Transport-1 PEI] Send pkt: 80140007
00: F2 02 00 00 00 00 00 00 - 00 00 00 00 00 00 00 00
10: 0C 00 00 00
[HECI Transport-1 PEI] Got pkt: 80240007
00: F2 82 00 00 00 00 00 00 - 50 16 00 00 00 00 00 00
10: 0C 00 00 00 00 00 00 02 - 6D 32 FF FF FF FF 6E 11
20: 00 00 08 00
PROGRESS CODE: V03020002 I0
PROGRESS CODE: V03020003 I0
PROGRESS CODE: V03020002 I0
PROGRESS CODE: V03020003 I0
PROGRESS CODE: V03020002 I0
PROGRESS CODE: V03020003 I0
PROGRESS CODE: V03020002 I0
PROGRESS CODE: V03020003 I0
-> LIB data: Already initialized
-> IBB Block End, Status 0x80000007
-> LIB data: Already initialized
-> OBB Block Start, Status 0x80000007
PROGRESS CODE: V03020002 I0
Common PPM policy update, PackageCState:3
PROGRESS CODE: V03020003 I0
PROGRESS CODE: V03020002 I0
PROGRESS CODE: V03020003 I0
PROGRESS CODE: V03020002 I0
PROGRESS CODE: V03020003 I0
PROGRESS CODE: V03020002 I0
PROGRESS CODE: V03020003 I0
PROGRESS CODE: V03020002 I0
PROGRESS CODE: V03020003 I0
PROGRESS CODE: V03020002 I0
[HECI Transport-1 PEI] Send pkt: 80280007
00: FF 03 00 00 02 00 00 00 - 00 00 18 6A 01 00 18 E7
10: 00 00 00 00 00 00 00 00 - 00 00 00 00 00 00 00 00
20: 00 00 00 00 00 00 00 00
[HECI Transport-1 PEI] Got pkt: 80040007
00: FF 83 00 00
PROGRESS CODE: V03020003 I0
PROGRESS CODE: V03020002 I0
PROGRESS CODE: V03020003 I0
PROGRESS CODE: V03020002 I0
PROGRESS CODE: V03020003 I0
PROGRESS CODE: V03020002 I0
PROGRESS CODE: V03020003 I0
PROGRESS CODE: V03020002 I0
!!! Invalid IIO LLC WAYS Bit Mask: 0x00000000
In CryptParallelhash
Return in function 2
ParallelHash256HashAll1(): Calculate code parallel hash failed!
Performance test = 10607632
In CryptParallelhash
Return in function 5
Dump data from 62CC1880, size: 0x3
62CC1880: 01 01 01 | ...
Dump data from 62CC1880, size: 0x3
62CC1880: 01 01 01 | ...
Return in function 6,retrunvalue=1
Dump data from 62ACF888, size: 0x40
62ACF888: CD F1 52 89 B5 4F 62 12 B4 BC 27 05 28 B4 95 26 | ..R..Ob...'.(..&
62ACF898: 00 6D D9 B5 4E 2B 6A DD 1E F6 90 0D DA 39 63 BB | .m..N+j......9c.
62ACF8A8: 33 A7 24 91 F2 36 96 9C A8 AF AE A2 9C 68 2D 47 | 3.$..6.......h-G
62ACF8B8: A3 93 C0 65 B3 8E 29 FA E6 51 A2 09 1C 83 31 10 | ...e..)..Q....1.
Accuracy test = 0
PROGRESS CODE: V03020003 I0
PROGRESS CODE: V03020002 I0
PROGRESS CODE: V03020003 I0
PROGRESS CODE: V03020002 I0
PROGRESS CODE: V03020003 I0
PROGRESS CODE: V03020002 I0
PROGRESS CODE: V03020003 I0
PROGRESS CODE: V03020002 I0
[MP_DISPATCH] MpDispatch4v0_CommonConstructor BEGIN
[MP_DISPATCH] MpDispatch4v0_CommonConstructor END (Success)
[FRU_MKTME] FruCpuFeatureMkTme3v0EntryPoint BEGIN
[FRU_MKTME] FruCpuFeatureMkTme3v0EntryPoint END (Success)
[FRU_SGX] FruCpuFeatureSgx3v0EntryPoint BEGIN
[FRU_SGX] FruCpuFeatureSgx3v0EntryPoint END (Success)
PROGRESS CODE: V03020003 I0
PROGRESS CODE: V03020002 I0
[APP_ADAPTER] AppAdapterMkTme3v0EntryPoint BEGIN
[APP_ADAPTER] AppAdapterMkTme3v0EntryPoint END (Success)
PROGRESS CODE: V03020003 I0
PROGRESS CODE: V03020002 I0
PROGRESS CODE: V03020003 I0
PROGRESS CODE: V03020002 I0
PROGRESS CODE: V03020003 I0
PROGRESS CODE: V03020002 I0
[SGX] SgxEarlyInit entry
IsSgxCapable = 1 Status = Success
IsSgxRequested = 0 Status = Success
IsTdxCapable = 0 Status = Success
IsTdxRequested = 0 Status = Success
IsTdxActivated = 0 Status = Success
SgxMpServicesData()
Thread 0 is BSP of Socket 0
Thread 80 is BSP of Socket 1
System BSP Thread = 000
System BSP Package = 000
[SGX_VAR_MANIFEST] HobSize: 8512, Hash:
[12] [56] [ED] [9C] [D5] [9D] [C8] [1A] [E0] [44] [25] [30] [1B] [26] [71] [76] [DB] [8B] [BF] [5C] [29] [96] [F3] [A2] [58] [29] [7F] [97] [42] [AF] [E0] [C0]
[SGX-DEBUG] GetVariableHelper: VariableName: (SgxRegistrationState), VendorGuid: (2C65F1A3), DataSize: (64), Data: (F)
GetVariable - SgxRegistrationState not found, continue
UefiFwRegistrationState not found in NVRAM!
GetRegistrationVariablesFromNvram Enter
[SGX-DEBUG] GetVariableHelper: VariableName: (SgxRegistrationConfiguration), VendorGuid: (18B3BC81), DataSize: (1520), Data: (F)
GetVariable - SgxRegistrationConfiguration not found, continue
[SGX-DEBUG] GetVariableHelper: VariableName: (SgxUefiRegistrationConfiguration), VendorGuid: (8D4CA9E8), DataSize: (1520), Data: (F)
GetVariable - SgxUefiRegistrationConfiguration not found, continue
[SGX-DEBUG]: Get SgxRegistrationStatus
[SGX-DEBUG] GetVariableHelper: VariableName: (SgxRegistrationStatus), VendorGuid: (F236C5DC), DataSize: (7), Data: (F)
GetVariable - SgxRegistrationStatus not found, continue
[SGX-DEBUG]: Get SgxUefiRegistrationStatus
[SGX-DEBUG] GetVariableHelper: VariableName: (SgxUefiRegistrationStatus), VendorGuid: (CF24D5E9), DataSize: (7), Data: (F)
GetVariable - SgxUefiRegistrationStatus not found, continue
[SGX-DEBUG] Early PrintByteArrays SgxRegistrationStatus:
[00] [00] [00] [00] [00] [00] [00]
[SGX-DEBUG] GetVariableHelper: VariableName: (SgxRegistrationServerResponse), VendorGuid: (89589C7B), DataSize: (10060), Data: (F)
GetVariable - SgxRegistrationServerResponse not found, continue
[SGX-DEBUG] GetVariableHelper: VariableName: (SgxUefiRegistrationServerResponse), VendorGuid: (35D93155), DataSize: (10060), Data: (F)
GetVariable - SgxUefiRegistrationServerResponse not found, continue
RegistrationVariables presence:
RegistrationConfig = 0
RegistrationStatus = 0
RegistrationResponse = 0
[SGX] RestoreKeyBlobsInternalSgxInitDataHobFieldsFromNvram BEGIN
[SGX] RestoreUefiFwKeyBlobsVariable BEGIN
[SGX-DEBUG] GetVariableHelper: VariableName: (SgxKeyBlobs), VendorGuid: (60F76511), DataSize: (14720), Data: (F)
GetVariable - SgxKeyBlobs not found, continue
Error: Unable to get SgxUefiFwKeyBlobs
[SGX] RestoreUefiFwKeyBlobsVariable END
KeyBlobs were NOT restored from SgxUefiFwKeyBlobs!
KeyBlobs were NOT restored from SgxRegistrationPackageInfo contents due to PackageInfoInBandAccess = FALSE!
KeyBlobsExistInNvram = (FALSE)
[SGX] RestoreKeyBlobsInternalSgxInitDataHobFieldsFromNvram END
KeyBlobs were not found in NVRAM. Continue boot...
[SGX-KEYBLOB-PEI-REST] KeyBlob for socket no 0
Present: FALSE
TimeStamp: 0-0-0, 0:0:0:0, Pad1: 0, Pad2: 0, TimeZone: 0, Daylight: 0
KeyBlob:
Header:
SGX UUID:
[00] [00] [00] [00] [00] [00] [00] [00] [00] [00] [00] [00] [00] [00] [00] [00]
CpuSvn:
[00]
Security Properties:
[00] [00] [00] [00]
Prid:
[00] [00] [00] [00] [00] [00] [00] [00] [00] [00] [00] [00] [00] [00] [00] [00]
PlatformEpoch:
[00] [00] [00] [00] [00] [00] [00] [00] [00] [00] [00] [00] [00] [00] [00] [00] [00] [00] [00] [00] [00] [00] [00] [00] [00] [00] [00] [00] [00] [00] [00] [00]
RsakHash:
[00] [00] [00] [00] [00] [00] [00] [00] [00] [00] [00] [00] [00] [00] [00] [00] [00] [00] [00] [00] [00] [00] [00] [00] [00] [00] [00] [00] [00] [00] [00] [00]
RsakHash:
[00] [00] [00] [00] [00] [00] [00] [00] [00] [00] [00] [00] [00] [00] [00] [00] [00] [00] [00] [00] [00] [00] [00] [00] [00] [00] [00] [00] [00] [00] [00] [00]
Pfk1:
[00] [00] [00] [00] [00] [00] [00] [00] [00] [00] [00] [00] [00] [00] [00] [00]
PprResetKey:
[00] [00] [00] [00]
[00] [00] [00] [00]
[00] [00] [00] [00]
[00] [00] [00] [00]
[00] [00] [00] [00]
[00] [00] [00] [00]
[00] [00] [00] [00]
[00] [00] [00] [00]
[00] [00] [00] [00]
[00] [00] [00] [00]
[00] [00] [00] [00]
[00] [00] [00] [00]
[00] [00] [00] [00]
[00] [00] [00] [00]
[00] [00] [00] [00]
[00] [00] [00] [00]
[00] [00] [00] [00]
[00] [00] [00] [00]
[00] [00] [00] [00]
[00] [00] [00] [00]
[00] [00] [00] [00]
[00] [00] [00] [00]
[00] [00] [00] [00]
[00] [00] [00] [00]
[00] [00] [00] [00]
[00] [00] [00] [00]
[00] [00] [00] [00]
[00] [00] [00] [00]
[00] [00] [00] [00]
[00] [00] [00] [00]
[00] [00] [00] [00]
[00] [00] [00] [00]
LastUsedSvn:
[00]
Reserved2:
[00] [00] [00] [00] [00] [00] [00] [00] [00] [00] [00] [00] [00] [00] [00]
TargetPrid:
[00] [00] [00] [00] [00] [00] [00] [00] [00] [00] [00] [00] [00] [00] [00] [00]
PrimaryComms:
[00] [00] [00] [00] [00] [00] [00] [00] [00] [00] [00] [00] [00] [00] [00] [00]
Iv:
[00] [00] [00] [00] [00] [00] [00] [00] [00] [00] [00] [00]
[00] [00] [00] [00] [00] [00] [00] [00] [00] [00] [00] [00]
[00] [00] [00] [00] [00] [00] [00] [00] [00] [00] [00] [00]
[00] [00] [00] [00] [00] [00] [00] [00] [00] [00] [00] [00]
[00] [00] [00] [00] [00] [00] [00] [00] [00] [00] [00] [00]
[00] [00] [00] [00] [00] [00] [00] [00] [00] [00] [00] [00]
[00] [00] [00] [00] [00] [00] [00] [00] [00] [00] [00] [00]
[00] [00] [00] [00] [00] [00] [00] [00] [00] [00] [00] [00]
[00] [00] [00] [00] [00] [00] [00] [00] [00] [00] [00] [00]
[00] [00] [00] [00] [00] [00] [00] [00] [00] [00] [00] [00]
[00] [00] [00] [00] [00] [00] [00] [00] [00] [00] [00] [00]
[00] [00] [00] [00] [00] [00] [00] [00] [00] [00] [00] [00]
[00] [00] [00] [00] [00] [00] [00] [00] [00] [00] [00] [00]
[00] [00] [00] [00] [00] [00] [00] [00] [00] [00] [00] [00]
[00] [00] [00] [00] [00] [00] [00] [00] [00] [00] [00] [00]
[00] [00] [00] [00] [00] [00] [00] [00] [00] [00] [00] [00]
[00] [00] [00] [00] [00] [00] [00] [00] [00] [00] [00] [00]
[00] [00] [00] [00] [00] [00] [00] [00] [00] [00] [00] [00]
[00] [00] [00] [00] [00] [00] [00] [00] [00] [00] [00] [00]
[00] [00] [00] [00] [00] [00] [00] [00] [00] [00] [00] [00]
[00] [00] [00] [00] [00] [00] [00] [00] [00] [00] [00] [00]
[00] [00] [00] [00] [00] [00] [00] [00] [00] [00] [00] [00]
[00] [00] [00] [00] [00] [00] [00] [00] [00] [00] [00] [00]
[00] [00] [00] [00] [00] [00] [00] [00] [00] [00] [00] [00]
[00] [00] [00] [00] [00] [00] [00] [00] [00] [00] [00] [00]
[00] [00] [00] [00] [00] [00] [00] [00] [00] [00] [00] [00]
[00] [00] [00] [00] [00] [00] [00] [00] [00] [00] [00] [00]
[00] [00] [00] [00] [00] [00] [00] [00] [00] [00] [00] [00]
[00] [00] [00] [00] [00] [00] [00] [00] [00] [00] [00] [00]
[00] [00] [00] [00] [00] [00] [00] [00] [00] [00] [00] [00]
[00] [00] [00] [00] [00] [00] [00] [00] [00] [00] [00] [00]
[00] [00] [00] [00] [00] [00] [00] [00] [00] [00] [00] [00]
Mac:
[00] [00] [00] [00] [00] [00] [00] [00] [00] [00] [00] [00] [00] [00] [00] [00]
[00] [00] [00] [00] [00] [00] [00] [00] [00] [00] [00] [00] [00] [00] [00] [00]
[00] [00] [00] [00] [00] [00] [00] [00] [00] [00] [00] [00] [00] [00] [00] [00]
[00] [00] [00] [00] [00] [00] [00] [00] [00] [00] [00] [00] [00] [00] [00] [00]
[00] [00] [00] [00] [00] [00] [00] [00] [00] [00] [00] [00] [00] [00] [00] [00]
[00] [00] [00] [00] [00] [00] [00] [00] [00] [00] [00] [00] [00] [00] [00] [00]
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[00] [00] [00] [00] [00] [00] [00] [00] [00] [00] [00] [00] [00] [00] [00] [00]
[00] [00] [00] [00] [00] [00] [00] [00] [00] [00] [00] [00] [00] [00] [00] [00]
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[00] [00] [00] [00] [00] [00] [00] [00] [00] [00] [00] [00] [00] [00] [00] [00]
[00] [00] [00] [00] [00] [00] [00] [00] [00] [00] [00] [00] [00] [00] [00] [00]
[00] [00] [00] [00] [00] [00] [00] [00] [00] [00] [00] [00] [00] [00] [00] [00]
[00] [00] [00] [00] [00] [00] [00] [00] [00] [00] [00] [00] [00] [00] [00] [00]
[00] [00] [00] [00] [00] [00] [00] [00] [00] [00] [00] [00] [00] [00] [00] [00]
[00] [00] [00] [00] [00] [00] [00] [00] [00] [00] [00] [00] [00] [00] [00] [00]
[00] [00] [00] [00] [00] [00] [00] [00] [00] [00] [00] [00] [00] [00] [00] [00]
[00] [00] [00] [00] [00] [00] [00] [00] [00] [00] [00] [00] [00] [00] [00] [00]
[00] [00] [00] [00] [00] [00] [00] [00] [00] [00] [00] [00] [00] [00] [00] [00]
[00] [00] [00] [00] [00] [00] [00] [00] [00] [00] [00] [00] [00] [00] [00] [00]
[00] [00] [00] [00] [00] [00] [00] [00] [00] [00] [00] [00] [00] [00] [00] [00]
[00] [00] [00] [00] [00] [00] [00] [00] [00] [00] [00] [00] [00] [00] [00] [00]
[00] [00] [00] [00] [00] [00] [00] [00] [00] [00] [00] [00] [00] [00] [00] [00]
[00] [00] [00] [00] [00] [00] [00] [00] [00] [00] [00] [00] [00] [00] [00] [00]
[00] [00] [00] [00] [00] [00] [00] [00] [00] [00] [00] [00] [00] [00] [00] [00]
[00] [00] [00] [00] [00] [00] [00] [00] [00] [00] [00] [00] [00] [00] [00] [00]
[00] [00] [00] [00] [00] [00] [00] [00] [00] [00] [00] [00] [00] [00] [00] [00]
IvComm:
[00] [00] [00] [00] [00] [00] [00] [00] [00] [00] [00] [00]
MacComm:
[00] [00] [00] [00] [00] [00] [00] [00] [00] [00] [00] [00] [00] [00] [00] [00]
[SGX-KEYBLOB-PEI-REST] KeyBlob for socket no 1
Present: FALSE
TimeStamp: 0-0-0, 0:0:0:0, Pad1: 0, Pad2: 0, TimeZone: 0, Daylight: 0
KeyBlob:
Header:
SGX UUID:
[00] [00] [00] [00] [00] [00] [00] [00] [00] [00] [00] [00] [00] [00] [00] [00]
CpuSvn:
[00]
Security Properties:
[00] [00] [00] [00]
Prid:
[00] [00] [00] [00] [00] [00] [00] [00] [00] [00] [00] [00] [00] [00] [00] [00]
PlatformEpoch:
[00] [00] [00] [00] [00] [00] [00] [00] [00] [00] [00] [00] [00] [00] [00] [00] [00] [00] [00] [00] [00] [00] [00] [00] [00] [00] [00] [00] [00] [00] [00] [00]
RsakHash:
[00] [00] [00] [00] [00] [00] [00] [00] [00] [00] [00] [00] [00] [00] [00] [00] [00] [00] [00] [00] [00] [00] [00] [00] [00] [00] [00] [00] [00] [00] [00] [00]
RsakHash:
[00] [00] [00] [00] [00] [00] [00] [00] [00] [00] [00] [00] [00] [00] [00] [00] [00] [00] [00] [00] [00] [00] [00] [00] [00] [00] [00] [00] [00] [00] [00] [00]
Pfk1:
[00] [00] [00] [00] [00] [00] [00] [00] [00] [00] [00] [00] [00] [00] [00] [00]
PprResetKey:
[00] [00] [00] [00]
[00] [00] [00] [00]
[00] [00] [00] [00]
[00] [00] [00] [00]
[00] [00] [00] [00]
[00] [00] [00] [00]
[00] [00] [00] [00]
[00] [00] [00] [00]
[00] [00] [00] [00]
[00] [00] [00] [00]
[00] [00] [00] [00]
[00] [00] [00] [00]
[00] [00] [00] [00]
[00] [00] [00] [00]
[00] [00] [00] [00]
[00] [00] [00] [00]
[00] [00] [00] [00]
[00] [00] [00] [00]
[00] [00] [00] [00]
[00] [00] [00] [00]
[00] [00] [00] [00]
[00] [00] [00] [00]
[00] [00] [00] [00]
[00] [00] [00] [00]
[00] [00] [00] [00]
[00] [00] [00] [00]
[00] [00] [00] [00]
[00] [00] [00] [00]
[00] [00] [00] [00]
[00] [00] [00] [00]
[00] [00] [00] [00]
[00] [00] [00] [00]
LastUsedSvn:
[00]
Reserved2:
[00] [00] [00] [00] [00] [00] [00] [00] [00] [00] [00] [00] [00] [00] [00]
TargetPrid:
[00] [00] [00] [00] [00] [00] [00] [00] [00] [00] [00] [00] [00] [00] [00] [00]
PrimaryComms:
[00] [00] [00] [00] [00] [00] [00] [00] [00] [00] [00] [00] [00] [00] [00] [00]
Iv:
[00] [00] [00] [00] [00] [00] [00] [00] [00] [00] [00] [00]
[00] [00] [00] [00] [00] [00] [00] [00] [00] [00] [00] [00]
[00] [00] [00] [00] [00] [00] [00] [00] [00] [00] [00] [00]
[00] [00] [00] [00] [00] [00] [00] [00] [00] [00] [00] [00]
[00] [00] [00] [00] [00] [00] [00] [00] [00] [00] [00] [00]
[00] [00] [00] [00] [00] [00] [00] [00] [00] [00] [00] [00]
[00] [00] [00] [00] [00] [00] [00] [00] [00] [00] [00] [00]
[00] [00] [00] [00] [00] [00] [00] [00] [00] [00] [00] [00]
[00] [00] [00] [00] [00] [00] [00] [00] [00] [00] [00] [00]
[00] [00] [00] [00] [00] [00] [00] [00] [00] [00] [00] [00]
[00] [00] [00] [00] [00] [00] [00] [00] [00] [00] [00] [00]
[00] [00] [00] [00] [00] [00] [00] [00] [00] [00] [00] [00]
[00] [00] [00] [00] [00] [00] [00] [00] [00] [00] [00] [00]
[00] [00] [00] [00] [00] [00] [00] [00] [00] [00] [00] [00]
[00] [00] [00] [00] [00] [00] [00] [00] [00] [00] [00] [00]
[00] [00] [00] [00] [00] [00] [00] [00] [00] [00] [00] [00]
[00] [00] [00] [00] [00] [00] [00] [00] [00] [00] [00] [00]
[00] [00] [00] [00] [00] [00] [00] [00] [00] [00] [00] [00]
[00] [00] [00] [00] [00] [00] [00] [00] [00] [00] [00] [00]
[00] [00] [00] [00] [00] [00] [00] [00] [00] [00] [00] [00]
[00] [00] [00] [00] [00] [00] [00] [00] [00] [00] [00] [00]
[00] [00] [00] [00] [00] [00] [00] [00] [00] [00] [00] [00]
[00] [00] [00] [00] [00] [00] [00] [00] [00] [00] [00] [00]
[00] [00] [00] [00] [00] [00] [00] [00] [00] [00] [00] [00]
[00] [00] [00] [00] [00] [00] [00] [00] [00] [00] [00] [00]
[00] [00] [00] [00] [00] [00] [00] [00] [00] [00] [00] [00]
[00] [00] [00] [00] [00] [00] [00] [00] [00] [00] [00] [00]
[00] [00] [00] [00] [00] [00] [00] [00] [00] [00] [00] [00]
[00] [00] [00] [00] [00] [00] [00] [00] [00] [00] [00] [00]
[00] [00] [00] [00] [00] [00] [00] [00] [00] [00] [00] [00]
[00] [00] [00] [00] [00] [00] [00] [00] [00] [00] [00] [00]
[00] [00] [00] [00] [00] [00] [00] [00] [00] [00] [00] [00]
Mac:
[00] [00] [00] [00] [00] [00] [00] [00] [00] [00] [00] [00] [00] [00] [00] [00]
[00] [00] [00] [00] [00] [00] [00] [00] [00] [00] [00] [00] [00] [00] [00] [00]
[00] [00] [00] [00] [00] [00] [00] [00] [00] [00] [00] [00] [00] [00] [00] [00]
[00] [00] [00] [00] [00] [00] [00] [00] [00] [00] [00] [00] [00] [00] [00] [00]
[00] [00] [00] [00] [00] [00] [00] [00] [00] [00] [00] [00] [00] [00] [00] [00]
[00] [00] [00] [00] [00] [00] [00] [00] [00] [00] [00] [00] [00] [00] [00] [00]
[00] [00] [00] [00] [00] [00] [00] [00] [00] [00] [00] [00] [00] [00] [00] [00]
[00] [00] [00] [00] [00] [00] [00] [00] [00] [00] [00] [00] [00] [00] [00] [00]
[00] [00] [00] [00] [00] [00] [00] [00] [00] [00] [00] [00] [00] [00] [00] [00]
[00] [00] [00] [00] [00] [00] [00] [00] [00] [00] [00] [00] [00] [00] [00] [00]
[00] [00] [00] [00] [00] [00] [00] [00] [00] [00] [00] [00] [00] [00] [00] [00]
[00] [00] [00] [00] [00] [00] [00] [00] [00] [00] [00] [00] [00] [00] [00] [00]
[00] [00] [00] [00] [00] [00] [00] [00] [00] [00] [00] [00] [00] [00] [00] [00]
[00] [00] [00] [00] [00] [00] [00] [00] [00] [00] [00] [00] [00] [00] [00] [00]
[00] [00] [00] [00] [00] [00] [00] [00] [00] [00] [00] [00] [00] [00] [00] [00]
[00] [00] [00] [00] [00] [00] [00] [00] [00] [00] [00] [00] [00] [00] [00] [00]
[00] [00] [00] [00] [00] [00] [00] [00] [00] [00] [00] [00] [00] [00] [00] [00]
[00] [00] [00] [00] [00] [00] [00] [00] [00] [00] [00] [00] [00] [00] [00] [00]
[00] [00] [00] [00] [00] [00] [00] [00] [00] [00] [00] [00] [00] [00] [00] [00]
[00] [00] [00] [00] [00] [00] [00] [00] [00] [00] [00] [00] [00] [00] [00] [00]
[00] [00] [00] [00] [00] [00] [00] [00] [00] [00] [00] [00] [00] [00] [00] [00]
[00] [00] [00] [00] [00] [00] [00] [00] [00] [00] [00] [00] [00] [00] [00] [00]
[00] [00] [00] [00] [00] [00] [00] [00] [00] [00] [00] [00] [00] [00] [00] [00]
[00] [00] [00] [00] [00] [00] [00] [00] [00] [00] [00] [00] [00] [00] [00] [00]
[00] [00] [00] [00] [00] [00] [00] [00] [00] [00] [00] [00] [00] [00] [00] [00]
[00] [00] [00] [00] [00] [00] [00] [00] [00] [00] [00] [00] [00] [00] [00] [00]
[00] [00] [00] [00] [00] [00] [00] [00] [00] [00] [00] [00] [00] [00] [00] [00]
[00] [00] [00] [00] [00] [00] [00] [00] [00] [00] [00] [00] [00] [00] [00] [00]
[00] [00] [00] [00] [00] [00] [00] [00] [00] [00] [00] [00] [00] [00] [00] [00]
[00] [00] [00] [00] [00] [00] [00] [00] [00] [00] [00] [00] [00] [00] [00] [00]
[00] [00] [00] [00] [00] [00] [00] [00] [00] [00] [00] [00] [00] [00] [00] [00]
[00] [00] [00] [00] [00] [00] [00] [00] [00] [00] [00] [00] [00] [00] [00] [00]
IvComm:
[00] [00] [00] [00] [00] [00] [00] [00] [00] [00] [00] [00]
MacComm:
[00] [00] [00] [00] [00] [00] [00] [00] [00] [00] [00] [00] [00] [00] [00] [00]
[SGX-KEYBLOB-PEI-REST] KeyBlob for socket no 2
Present: FALSE
TimeStamp: 0-0-0, 0:0:0:0, Pad1: 0, Pad2: 0, TimeZone: 0, Daylight: 0
KeyBlob:
Header:
SGX UUID:
[00] [00] [00] [00] [00] [00] [00] [00] [00] [00] [00] [00] [00] [00] [00] [00]
CpuSvn:
[00]
Security Properties:
[00] [00] [00] [00]
Prid:
[00] [00] [00] [00] [00] [00] [00] [00] [00] [00] [00] [00] [00] [00] [00] [00]
PlatformEpoch:
[00] [00] [00] [00] [00] [00] [00] [00] [00] [00] [00] [00] [00] [00] [00] [00] [00] [00] [00] [00] [00] [00] [00] [00] [00] [00] [00] [00] [00] [00] [00] [00]
RsakHash:
[00] [00] [00] [00] [00] [00] [00] [00] [00] [00] [00] [00] [00] [00] [00] [00] [00] [00] [00] [00] [00] [00] [00] [00] [00] [00] [00] [00] [00] [00] [00] [00]
RsakHash:
[00] [00] [00] [00] [00] [00] [00] [00] [00] [00] [00] [00] [00] [00] [00] [00] [00] [00] [00] [00] [00] [00] [00] [00] [00] [00] [00] [00] [00] [00] [00] [00]
Pfk1:
[00] [00] [00] [00] [00] [00] [00] [00] [00] [00] [00] [00] [00] [00] [00] [00]
PprResetKey:
[00] [00] [00] [00]
[00] [00] [00] [00]
[00] [00] [00] [00]
[00] [00] [00] [00]
[00] [00] [00] [00]
[00] [00] [00] [00]
[00] [00] [00] [00]
[00] [00] [00] [00]
[00] [00] [00] [00]
[00] [00] [00] [00]
[00] [00] [00] [00]
[00] [00] [00] [00]
[00] [00] [00] [00]
[00] [00] [00] [00]
[00] [00] [00] [00]
[00] [00] [00] [00]
[00] [00] [00] [00]
[00] [00] [00] [00]
[00] [00] [00] [00]
[00] [00] [00] [00]
[00] [00] [00] [00]
[00] [00] [00] [00]
[00] [00] [00] [00]
[00] [00] [00] [00]
[00] [00] [00] [00]
[00] [00] [00] [00]
[00] [00] [00] [00]
[00] [00] [00] [00]
[00] [00] [00] [00]
[00] [00] [00] [00]
[00] [00] [00] [00]
[00] [00] [00] [00]
LastUsedSvn:
[00]
Reserved2:
[00] [00] [00] [00] [00] [00] [00] [00] [00] [00] [00] [00] [00] [00] [00]
TargetPrid:
[00] [00] [00] [00] [00] [00] [00] [00] [00] [00] [00] [00] [00] [00] [00] [00]
PrimaryComms:
[00] [00] [00] [00] [00] [00] [00] [00] [00] [00] [00] [00] [00] [00] [00] [00]
Iv:
[00] [00] [00] [00] [00] [00] [00] [00] [00] [00] [00] [00]
[00] [00] [00] [00] [00] [00] [00] [00] [00] [00] [00] [00]
[00] [00] [00] [00] [00] [00] [00] [00] [00] [00] [00] [00]
[00] [00] [00] [00] [00] [00] [00] [00] [00] [00] [00] [00]
[00] [00] [00] [00] [00] [00] [00] [00] [00] [00] [00] [00]
[00] [00] [00] [00] [00] [00] [00] [00] [00] [00] [00] [00]
[00] [00] [00] [00] [00] [00] [00] [00] [00] [00] [00] [00]
[00] [00] [00] [00] [00] [00] [00] [00] [00] [00] [00] [00]
[00] [00] [00] [00] [00] [00] [00] [00] [00] [00] [00] [00]
[00] [00] [00] [00] [00] [00] [00] [00] [00] [00] [00] [00]
[00] [00] [00] [00] [00] [00] [00] [00] [00] [00] [00] [00]
[00] [00] [00] [00] [00] [00] [00] [00] [00] [00] [00] [00]
[00] [00] [00] [00] [00] [00] [00] [00] [00] [00] [00] [00]
[00] [00] [00] [00] [00] [00] [00] [00] [00] [00] [00] [00]
[00] [00] [00] [00] [00] [00] [00] [00] [00] [00] [00] [00]
[00] [00] [00] [00] [00] [00] [00] [00] [00] [00] [00] [00]
[00] [00] [00] [00] [00] [00] [00] [00] [00] [00] [00] [00]
[00] [00] [00] [00] [00] [00] [00] [00] [00] [00] [00] [00]
[00] [00] [00] [00] [00] [00] [00] [00] [00] [00] [00] [00]
[00] [00] [00] [00] [00] [00] [00] [00] [00] [00] [00] [00]
[00] [00] [00] [00] [00] [00] [00] [00] [00] [00] [00] [00]
[00] [00] [00] [00] [00] [00] [00] [00] [00] [00] [00] [00]
[00] [00] [00] [00] [00] [00] [00] [00] [00] [00] [00] [00]
[00] [00] [00] [00] [00] [00] [00] [00] [00] [00] [00] [00]
[00] [00] [00] [00] [00] [00] [00] [00] [00] [00] [00] [00]
[00] [00] [00] [00] [00] [00] [00] [00] [00] [00] [00] [00]
[00] [00] [00] [00] [00] [00] [00] [00] [00] [00] [00] [00]
[00] [00] [00] [00] [00] [00] [00] [00] [00] [00] [00] [00]
[00] [00] [00] [00] [00] [00] [00] [00] [00] [00] [00] [00]
[00] [00] [00] [00] [00] [00] [00] [00] [00] [00] [00] [00]
[00] [00] [00] [00] [00] [00] [00] [00] [00] [00] [00] [00]
[00] [00] [00] [00] [00] [00] [00] [00] [00] [00] [00] [00]
Mac:
[00] [00] [00] [00] [00] [00] [00] [00] [00] [00] [00] [00] [00] [00] [00] [00]
[00] [00] [00] [00] [00] [00] [00] [00] [00] [00] [00] [00] [00] [00] [00] [00]
[00] [00] [00] [00] [00] [00] [00] [00] [00] [00] [00] [00] [00] [00] [00] [00]
[00] [00] [00] [00] [00] [00] [00] [00] [00] [00] [00] [00] [00] [00] [00] [00]
[00] [00] [00] [00] [00] [00] [00] [00] [00] [00] [00] [00] [00] [00] [00] [00]
[00] [00] [00] [00] [00] [00] [00] [00] [00] [00] [00] [00] [00] [00] [00] [00]
[00] [00] [00] [00] [00] [00] [00] [00] [00] [00] [00] [00] [00] [00] [00] [00]
[00] [00] [00] [00] [00] [00] [00] [00] [00] [00] [00] [00] [00] [00] [00] [00]
[00] [00] [00] [00] [00] [00] [00] [00] [00] [00] [00] [00] [00] [00] [00] [00]
[00] [00] [00] [00] [00] [00] [00] [00] [00] [00] [00] [00] [00] [00] [00] [00]
[00] [00] [00] [00] [00] [00] [00] [00] [00] [00] [00] [00] [00] [00] [00] [00]
[00] [00] [00] [00] [00] [00] [00] [00] [00] [00] [00] [00] [00] [00] [00] [00]
[00] [00] [00] [00] [00] [00] [00] [00] [00] [00] [00] [00] [00] [00] [00] [00]
[00] [00] [00] [00] [00] [00] [00] [00] [00] [00] [00] [00] [00] [00] [00] [00]
[00] [00] [00] [00] [00] [00] [00] [00] [00] [00] [00] [00] [00] [00] [00] [00]
[00] [00] [00] [00] [00] [00] [00] [00] [00] [00] [00] [00] [00] [00] [00] [00]
[00] [00] [00] [00] [00] [00] [00] [00] [00] [00] [00] [00] [00] [00] [00] [00]
[00] [00] [00] [00] [00] [00] [00] [00] [00] [00] [00] [00] [00] [00] [00] [00]
[00] [00] [00] [00] [00] [00] [00] [00] [00] [00] [00] [00] [00] [00] [00] [00]
[00] [00] [00] [00] [00] [00] [00] [00] [00] [00] [00] [00] [00] [00] [00] [00]
[00] [00] [00] [00] [00] [00] [00] [00] [00] [00] [00] [00] [00] [00] [00] [00]
[00] [00] [00] [00] [00] [00] [00] [00] [00] [00] [00] [00] [00] [00] [00] [00]
[00] [00] [00] [00] [00] [00] [00] [00] [00] [00] [00] [00] [00] [00] [00] [00]
[00] [00] [00] [00] [00] [00] [00] [00] [00] [00] [00] [00] [00] [00] [00] [00]
[00] [00] [00] [00] [00] [00] [00] [00] [00] [00] [00] [00] [00] [00] [00] [00]
[00] [00] [00] [00] [00] [00] [00] [00] [00] [00] [00] [00] [00] [00] [00] [00]
[00] [00] [00] [00] [00] [00] [00] [00] [00] [00] [00] [00] [00] [00] [00] [00]
[00] [00] [00] [00] [00] [00] [00] [00] [00] [00] [00] [00] [00] [00] [00] [00]
[00] [00] [00] [00] [00] [00] [00] [00] [00] [00] [00] [00] [00] [00] [00] [00]
[00] [00] [00] [00] [00] [00] [00] [00] [00] [00] [00] [00] [00] [00] [00] [00]
[00] [00] [00] [00] [00] [00] [00] [00] [00] [00] [00] [00] [00] [00] [00] [00]
[00] [00] [00] [00] [00] [00] [00] [00] [00] [00] [00] [00] [00] [00] [00] [00]
IvComm:
[00] [00] [00] [00] [00] [00] [00] [00] [00] [00] [00] [00]
MacComm:
[00] [00] [00] [00] [00] [00] [00] [00] [00] [00] [00] [00] [00] [00] [00] [00]
[SGX-KEYBLOB-PEI-REST] KeyBlob for socket no 3
Present: FALSE
TimeStamp: 0-0-0, 0:0:0:0, Pad1: 0, Pad2: 0, TimeZone: 0, Daylight: 0
KeyBlob:
Header:
SGX UUID:
[00] [00] [00] [00] [00] [00] [00] [00] [00] [00] [00] [00] [00] [00] [00] [00]
CpuSvn:
[00]
Security Properties:
[00] [00] [00] [00]
Prid:
[00] [00] [00] [00] [00] [00] [00] [00] [00] [00] [00] [00] [00] [00] [00] [00]
PlatformEpoch:
[00] [00] [00] [00] [00] [00] [00] [00] [00] [00] [00] [00] [00] [00] [00] [00] [00] [00] [00] [00] [00] [00] [00] [00] [00] [00] [00] [00] [00] [00] [00] [00]
RsakHash:
[00] [00] [00] [00] [00] [00] [00] [00] [00] [00] [00] [00] [00] [00] [00] [00] [00] [00] [00] [00] [00] [00] [00] [00] [00] [00] [00] [00] [00] [00] [00] [00]
RsakHash:
[00] [00] [00] [00] [00] [00] [00] [00] [00] [00] [00] [00] [00] [00] [00] [00] [00] [00] [00] [00] [00] [00] [00] [00] [00] [00] [00] [00] [00] [00] [00] [00]
Pfk1:
[00] [00] [00] [00] [00] [00] [00] [00] [00] [00] [00] [00] [00] [00] [00] [00]
PprResetKey:
[00] [00] [00] [00]
[00] [00] [00] [00]
[00] [00] [00] [00]
[00] [00] [00] [00]
[00] [00] [00] [00]
[00] [00] [00] [00]
[00] [00] [00] [00]
[00] [00] [00] [00]
[00] [00] [00] [00]
[00] [00] [00] [00]
[00] [00] [00] [00]
[00] [00] [00] [00]
[00] [00] [00] [00]
[00] [00] [00] [00]
[00] [00] [00] [00]
[00] [00] [00] [00]
[00] [00] [00] [00]
[00] [00] [00] [00]
[00] [00] [00] [00]
[00] [00] [00] [00]
[00] [00] [00] [00]
[00] [00] [00] [00]
[00] [00] [00] [00]
[00] [00] [00] [00]
[00] [00] [00] [00]
[00] [00] [00] [00]
[00] [00] [00] [00]
[00] [00] [00] [00]
[00] [00] [00] [00]
[00] [00] [00] [00]
[00] [00] [00] [00]
[00] [00] [00] [00]
LastUsedSvn:
[00]
Reserved2:
[00] [00] [00] [00] [00] [00] [00] [00] [00] [00] [00] [00] [00] [00] [00]
TargetPrid:
[00] [00] [00] [00] [00] [00] [00] [00] [00] [00] [00] [00] [00] [00] [00] [00]
PrimaryComms:
[00] [00] [00] [00] [00] [00] [00] [00] [00] [00] [00] [00] [00] [00] [00] [00]
Iv:
[00] [00] [00] [00] [00] [00] [00] [00] [00] [00] [00] [00]
[00] [00] [00] [00] [00] [00] [00] [00] [00] [00] [00] [00]
[00] [00] [00] [00] [00] [00] [00] [00] [00] [00] [00] [00]
[00] [00] [00] [00] [00] [00] [00] [00] [00] [00] [00] [00]
[00] [00] [00] [00] [00] [00] [00] [00] [00] [00] [00] [00]
[00] [00] [00] [00] [00] [00] [00] [00] [00] [00] [00] [00]
[00] [00] [00] [00] [00] [00] [00] [00] [00] [00] [00] [00]
[00] [00] [00] [00] [00] [00] [00] [00] [00] [00] [00] [00]
[00] [00] [00] [00] [00] [00] [00] [00] [00] [00] [00] [00]
[00] [00] [00] [00] [00] [00] [00] [00] [00] [00] [00] [00]
[00] [00] [00] [00] [00] [00] [00] [00] [00] [00] [00] [00]
[00] [00] [00] [00] [00] [00] [00] [00] [00] [00] [00] [00]
[00] [00] [00] [00] [00] [00] [00] [00] [00] [00] [00] [00]
[00] [00] [00] [00] [00] [00] [00] [00] [00] [00] [00] [00]
[00] [00] [00] [00] [00] [00] [00] [00] [00] [00] [00] [00]
[00] [00] [00] [00] [00] [00] [00] [00] [00] [00] [00] [00]
[00] [00] [00] [00] [00] [00] [00] [00] [00] [00] [00] [00]
[00] [00] [00] [00] [00] [00] [00] [00] [00] [00] [00] [00]
[00] [00] [00] [00] [00] [00] [00] [00] [00] [00] [00] [00]
[00] [00] [00] [00] [00] [00] [00] [00] [00] [00] [00] [00]
[00] [00] [00] [00] [00] [00] [00] [00] [00] [00] [00] [00]
[00] [00] [00] [00] [00] [00] [00] [00] [00] [00] [00] [00]
[00] [00] [00] [00] [00] [00] [00] [00] [00] [00] [00] [00]
[00] [00] [00] [00] [00] [00] [00] [00] [00] [00] [00] [00]
[00] [00] [00] [00] [00] [00] [00] [00] [00] [00] [00] [00]
[00] [00] [00] [00] [00] [00] [00] [00] [00] [00] [00] [00]
[00] [00] [00] [00] [00] [00] [00] [00] [00] [00] [00] [00]
[00] [00] [00] [00] [00] [00] [00] [00] [00] [00] [00] [00]
[00] [00] [00] [00] [00] [00] [00] [00] [00] [00] [00] [00]
[00] [00] [00] [00] [00] [00] [00] [00] [00] [00] [00] [00]
[00] [00] [00] [00] [00] [00] [00] [00] [00] [00] [00] [00]
[00] [00] [00] [00] [00] [00] [00] [00] [00] [00] [00] [00]
Mac:
[00] [00] [00] [00] [00] [00] [00] [00] [00] [00] [00] [00] [00] [00] [00] [00]
[00] [00] [00] [00] [00] [00] [00] [00] [00] [00] [00] [00] [00] [00] [00] [00]
[00] [00] [00] [00] [00] [00] [00] [00] [00] [00] [00] [00] [00] [00] [00] [00]
[00] [00] [00] [00] [00] [00] [00] [00] [00] [00] [00] [00] [00] [00] [00] [00]
[00] [00] [00] [00] [00] [00] [00] [00] [00] [00] [00] [00] [00] [00] [00] [00]
[00] [00] [00] [00] [00] [00] [00] [00] [00] [00] [00] [00] [00] [00] [00] [00]
[00] [00] [00] [00] [00] [00] [00] [00] [00] [00] [00] [00] [00] [00] [00] [00]
[00] [00] [00] [00] [00] [00] [00] [00] [00] [00] [00] [00] [00] [00] [00] [00]
[00] [00] [00] [00] [00] [00] [00] [00] [00] [00] [00] [00] [00] [00] [00] [00]
[00] [00] [00] [00] [00] [00] [00] [00] [00] [00] [00] [00] [00] [00] [00] [00]
[00] [00] [00] [00] [00] [00] [00] [00] [00] [00] [00] [00] [00] [00] [00] [00]
[00] [00] [00] [00] [00] [00] [00] [00] [00] [00] [00] [00] [00] [00] [00] [00]
[00] [00] [00] [00] [00] [00] [00] [00] [00] [00] [00] [00] [00] [00] [00] [00]
[00] [00] [00] [00] [00] [00] [00] [00] [00] [00] [00] [00] [00] [00] [00] [00]
[00] [00] [00] [00] [00] [00] [00] [00] [00] [00] [00] [00] [00] [00] [00] [00]
[00] [00] [00] [00] [00] [00] [00] [00] [00] [00] [00] [00] [00] [00] [00] [00]
[00] [00] [00] [00] [00] [00] [00] [00] [00] [00] [00] [00] [00] [00] [00] [00]
[00] [00] [00] [00] [00] [00] [00] [00] [00] [00] [00] [00] [00] [00] [00] [00]
[00] [00] [00] [00] [00] [00] [00] [00] [00] [00] [00] [00] [00] [00] [00] [00]
[00] [00] [00] [00] [00] [00] [00] [00] [00] [00] [00] [00] [00] [00] [00] [00]
[00] [00] [00] [00] [00] [00] [00] [00] [00] [00] [00] [00] [00] [00] [00] [00]
[00] [00] [00] [00] [00] [00] [00] [00] [00] [00] [00] [00] [00] [00] [00] [00]
[00] [00] [00] [00] [00] [00] [00] [00] [00] [00] [00] [00] [00] [00] [00] [00]
[00] [00] [00] [00] [00] [00] [00] [00] [00] [00] [00] [00] [00] [00] [00] [00]
[00] [00] [00] [00] [00] [00] [00] [00] [00] [00] [00] [00] [00] [00] [00] [00]
[00] [00] [00] [00] [00] [00] [00] [00] [00] [00] [00] [00] [00] [00] [00] [00]
[00] [00] [00] [00] [00] [00] [00] [00] [00] [00] [00] [00] [00] [00] [00] [00]
[00] [00] [00] [00] [00] [00] [00] [00] [00] [00] [00] [00] [00] [00] [00] [00]
[00] [00] [00] [00] [00] [00] [00] [00] [00] [00] [00] [00] [00] [00] [00] [00]
[00] [00] [00] [00] [00] [00] [00] [00] [00] [00] [00] [00] [00] [00] [00] [00]
[00] [00] [00] [00] [00] [00] [00] [00] [00] [00] [00] [00] [00] [00] [00] [00]
[00] [00] [00] [00] [00] [00] [00] [00] [00] [00] [00] [00] [00] [00] [00] [00]
IvComm:
[00] [00] [00] [00] [00] [00] [00] [00] [00] [00] [00] [00]
MacComm:
[00] [00] [00] [00] [00] [00] [00] [00] [00] [00] [00] [00] [00] [00] [00] [00]
[SGX-KEYBLOB-PEI-REST] KeyBlob for socket no 4
Present: FALSE
TimeStamp: 0-0-0, 0:0:0:0, Pad1: 0, Pad2: 0, TimeZone: 0, Daylight: 0
KeyBlob:
Header:
SGX UUID:
[00] [00] [00] [00] [00] [00] [00] [00] [00] [00] [00] [00] [00] [00] [00] [00]
CpuSvn:
[00]
Security Properties:
[00] [00] [00] [00]
Prid:
[00] [00] [00] [00] [00] [00] [00] [00] [00] [00] [00] [00] [00] [00] [00] [00]
PlatformEpoch:
[00] [00] [00] [00] [00] [00] [00] [00] [00] [00] [00] [00] [00] [00] [00] [00] [00] [00] [00] [00] [00] [00] [00] [00] [00] [00] [00] [00] [00] [00] [00] [00]
RsakHash:
[00] [00] [00] [00] [00] [00] [00] [00] [00] [00] [00] [00] [00] [00] [00] [00] [00] [00] [00] [00] [00] [00] [00] [00] [00] [00] [00] [00] [00] [00] [00] [00]
RsakHash:
[00] [00] [00] [00] [00] [00] [00] [00] [00] [00] [00] [00] [00] [00] [00] [00] [00] [00] [00] [00] [00] [00] [00] [00] [00] [00] [00] [00] [00] [00] [00] [00]
Pfk1:
[00] [00] [00] [00] [00] [00] [00] [00] [00] [00] [00] [00] [00] [00] [00] [00]
PprResetKey:
[00] [00] [00] [00]
[00] [00] [00] [00]
[00] [00] [00] [00]
[00] [00] [00] [00]
[00] [00] [00] [00]
[00] [00] [00] [00]
[00] [00] [00] [00]
[00] [00] [00] [00]
[00] [00] [00] [00]
[00] [00] [00] [00]
[00] [00] [00] [00]
[00] [00] [00] [00]
[00] [00] [00] [00]
[00] [00] [00] [00]
[00] [00] [00] [00]
[00] [00] [00] [00]
[00] [00] [00] [00]
[00] [00] [00] [00]
[00] [00] [00] [00]
[00] [00] [00] [00]
[00] [00] [00] [00]
[00] [00] [00] [00]
[00] [00] [00] [00]
[00] [00] [00] [00]
[00] [00] [00] [00]
[00] [00] [00] [00]
[00] [00] [00] [00]
[00] [00] [00] [00]
[00] [00] [00] [00]
[00] [00] [00] [00]
[00] [00] [00] [00]
[00] [00] [00] [00]
LastUsedSvn:
[00]
Reserved2:
[00] [00] [00] [00] [00] [00] [00] [00] [00] [00] [00] [00] [00] [00] [00]
TargetPrid:
[00] [00] [00] [00] [00] [00] [00] [00] [00] [00] [00] [00] [00] [00] [00] [00]
PrimaryComms:
[00] [00] [00] [00] [00] [00] [00] [00] [00] [00] [00] [00] [00] [00] [00] [00]
Iv:
[00] [00] [00] [00] [00] [00] [00] [00] [00] [00] [00] [00]
[00] [00] [00] [00] [00] [00] [00] [00] [00] [00] [00] [00]
[00] [00] [00] [00] [00] [00] [00] [00] [00] [00] [00] [00]
[00] [00] [00] [00] [00] [00] [00] [00] [00] [00] [00] [00]
[00] [00] [00] [00] [00] [00] [00] [00] [00] [00] [00] [00]
[00] [00] [00] [00] [00] [00] [00] [00] [00] [00] [00] [00]
[00] [00] [00] [00] [00] [00] [00] [00] [00] [00] [00] [00]
[00] [00] [00] [00] [00] [00] [00] [00] [00] [00] [00] [00]
[00] [00] [00] [00] [00] [00] [00] [00] [00] [00] [00] [00]
[00] [00] [00] [00] [00] [00] [00] [00] [00] [00] [00] [00]
[00] [00] [00] [00] [00] [00] [00] [00] [00] [00] [00] [00]
[00] [00] [00] [00] [00] [00] [00] [00] [00] [00] [00] [00]
[00] [00] [00] [00] [00] [00] [00] [00] [00] [00] [00] [00]
[00] [00] [00] [00] [00] [00] [00] [00] [00] [00] [00] [00]
[00] [00] [00] [00] [00] [00] [00] [00] [00] [00] [00] [00]
[00] [00] [00] [00] [00] [00] [00] [00] [00] [00] [00] [00]
[00] [00] [00] [00] [00] [00] [00] [00] [00] [00] [00] [00]
[00] [00] [00] [00] [00] [00] [00] [00] [00] [00] [00] [00]
[00] [00] [00] [00] [00] [00] [00] [00] [00] [00] [00] [00]
[00] [00] [00] [00] [00] [00] [00] [00] [00] [00] [00] [00]
[00] [00] [00] [00] [00] [00] [00] [00] [00] [00] [00] [00]
[00] [00] [00] [00] [00] [00] [00] [00] [00] [00] [00] [00]
[00] [00] [00] [00] [00] [00] [00] [00] [00] [00] [00] [00]
[00] [00] [00] [00] [00] [00] [00] [00] [00] [00] [00] [00]
[00] [00] [00] [00] [00] [00] [00] [00] [00] [00] [00] [00]
[00] [00] [00] [00] [00] [00] [00] [00] [00] [00] [00] [00]
[00] [00] [00] [00] [00] [00] [00] [00] [00] [00] [00] [00]
[00] [00] [00] [00] [00] [00] [00] [00] [00] [00] [00] [00]
[00] [00] [00] [00] [00] [00] [00] [00] [00] [00] [00] [00]
[00] [00] [00] [00] [00] [00] [00] [00] [00] [00] [00] [00]
[00] [00] [00] [00] [00] [00] [00] [00] [00] [00] [00] [00]
[00] [00] [00] [00] [00] [00] [00] [00] [00] [00] [00] [00]
Mac:
[00] [00] [00] [00] [00] [00] [00] [00] [00] [00] [00] [00] [00] [00] [00] [00]
[00] [00] [00] [00] [00] [00] [00] [00] [00] [00] [00] [00] [00] [00] [00] [00]
[00] [00] [00] [00] [00] [00] [00] [00] [00] [00] [00] [00] [00] [00] [00] [00]
[00] [00] [00] [00] [00] [00] [00] [00] [00] [00] [00] [00] [00] [00] [00] [00]
[00] [00] [00] [00] [00] [00] [00] [00] [00] [00] [00] [00] [00] [00] [00] [00]
[00] [00] [00] [00] [00] [00] [00] [00] [00] [00] [00] [00] [00] [00] [00] [00]
[00] [00] [00] [00] [00] [00] [00] [00] [00] [00] [00] [00] [00] [00] [00] [00]
[00] [00] [00] [00] [00] [00] [00] [00] [00] [00] [00] [00] [00] [00] [00] [00]
[00] [00] [00] [00] [00] [00] [00] [00] [00] [00] [00] [00] [00] [00] [00] [00]
[00] [00] [00] [00] [00] [00] [00] [00] [00] [00] [00] [00] [00] [00] [00] [00]
[00] [00] [00] [00] [00] [00] [00] [00] [00] [00] [00] [00] [00] [00] [00] [00]
[00] [00] [00] [00] [00] [00] [00] [00] [00] [00] [00] [00] [00] [00] [00] [00]
[00] [00] [00] [00] [00] [00] [00] [00] [00] [00] [00] [00] [00] [00] [00] [00]
[00] [00] [00] [00] [00] [00] [00] [00] [00] [00] [00] [00] [00] [00] [00] [00]
[00] [00] [00] [00] [00] [00] [00] [00] [00] [00] [00] [00] [00] [00] [00] [00]
[00] [00] [00] [00] [00] [00] [00] [00] [00] [00] [00] [00] [00] [00] [00] [00]
[00] [00] [00] [00] [00] [00] [00] [00] [00] [00] [00] [00] [00] [00] [00] [00]
[00] [00] [00] [00] [00] [00] [00] [00] [00] [00] [00] [00] [00] [00] [00] [00]
[00] [00] [00] [00] [00] [00] [00] [00] [00] [00] [00] [00] [00] [00] [00] [00]
[00] [00] [00] [00] [00] [00] [00] [00] [00] [00] [00] [00] [00] [00] [00] [00]
[00] [00] [00] [00] [00] [00] [00] [00] [00] [00] [00] [00] [00] [00] [00] [00]
[00] [00] [00] [00] [00] [00] [00] [00] [00] [00] [00] [00] [00] [00] [00] [00]
[00] [00] [00] [00] [00] [00] [00] [00] [00] [00] [00] [00] [00] [00] [00] [00]
[00] [00] [00] [00] [00] [00] [00] [00] [00] [00] [00] [00] [00] [00] [00] [00]
[00] [00] [00] [00] [00] [00] [00] [00] [00] [00] [00] [00] [00] [00] [00] [00]
[00] [00] [00] [00] [00] [00] [00] [00] [00] [00] [00] [00] [00] [00] [00] [00]
[00] [00] [00] [00] [00] [00] [00] [00] [00] [00] [00] [00] [00] [00] [00] [00]
[00] [00] [00] [00] [00] [00] [00] [00] [00] [00] [00] [00] [00] [00] [00] [00]
[00] [00] [00] [00] [00] [00] [00] [00] [00] [00] [00] [00] [00] [00] [00] [00]
[00] [00] [00] [00] [00] [00] [00] [00] [00] [00] [00] [00] [00] [00] [00] [00]
[00] [00] [00] [00] [00] [00] [00] [00] [00] [00] [00] [00] [00] [00] [00] [00]
[00] [00] [00] [00] [00] [00] [00] [00] [00] [00] [00] [00] [00] [00] [00] [00]
IvComm:
[00] [00] [00] [00] [00] [00] [00] [00] [00] [00] [00] [00]
MacComm:
[00] [00] [00] [00] [00] [00] [00] [00] [00] [00] [00] [00] [00] [00] [00] [00]
[SGX-KEYBLOB-PEI-REST] KeyBlob for socket no 5
Present: FALSE
TimeStamp: 0-0-0, 0:0:0:0, Pad1: 0, Pad2: 0, TimeZone: 0, Daylight: 0
KeyBlob:
Header:
SGX UUID:
[00] [00] [00] [00] [00] [00] [00] [00] [00] [00] [00] [00] [00] [00] [00] [00]
CpuSvn:
[00]
Security Properties:
[00] [00] [00] [00]
Prid:
[00] [00] [00] [00] [00] [00] [00] [00] [00] [00] [00] [00] [00] [00] [00] [00]
PlatformEpoch:
[00] [00] [00] [00] [00] [00] [00] [00] [00] [00] [00] [00] [00] [00] [00] [00] [00] [00] [00] [00] [00] [00] [00] [00] [00] [00] [00] [00] [00] [00] [00] [00]
RsakHash:
[00] [00] [00] [00] [00] [00] [00] [00] [00] [00] [00] [00] [00] [00] [00] [00] [00] [00] [00] [00] [00] [00] [00] [00] [00] [00] [00] [00] [00] [00] [00] [00]
RsakHash:
[00] [00] [00] [00] [00] [00] [00] [00] [00] [00] [00] [00] [00] [00] [00] [00] [00] [00] [00] [00] [00] [00] [00] [00] [00] [00] [00] [00] [00] [00] [00] [00]
Pfk1:
[00] [00] [00] [00] [00] [00] [00] [00] [00] [00] [00] [00] [00] [00] [00] [00]
PprResetKey:
[00] [00] [00] [00]
[00] [00] [00] [00]
[00] [00] [00] [00]
[00] [00] [00] [00]
[00] [00] [00] [00]
[00] [00] [00] [00]
[00] [00] [00] [00]
[00] [00] [00] [00]
[00] [00] [00] [00]
[00] [00] [00] [00]
[00] [00] [00] [00]
[00] [00] [00] [00]
[00] [00] [00] [00]
[00] [00] [00] [00]
[00] [00] [00] [00]
[00] [00] [00] [00]
[00] [00] [00] [00]
[00] [00] [00] [00]
[00] [00] [00] [00]
[00] [00] [00] [00]
[00] [00] [00] [00]
[00] [00] [00] [00]
[00] [00] [00] [00]
[00] [00] [00] [00]
[00] [00] [00] [00]
[00] [00] [00] [00]
[00] [00] [00] [00]
[00] [00] [00] [00]
[00] [00] [00] [00]
[00] [00] [00] [00]
[00] [00] [00] [00]
[00] [00] [00] [00]
LastUsedSvn:
[00]
Reserved2:
[00] [00] [00] [00] [00] [00] [00] [00] [00] [00] [00] [00] [00] [00] [00]
TargetPrid:
[00] [00] [00] [00] [00] [00] [00] [00] [00] [00] [00] [00] [00] [00] [00] [00]
PrimaryComms:
[00] [00] [00] [00] [00] [00] [00] [00] [00] [00] [00] [00] [00] [00] [00] [00]
Iv:
[00] [00] [00] [00] [00] [00] [00] [00] [00] [00] [00] [00]
[00] [00] [00] [00] [00] [00] [00] [00] [00] [00] [00] [00]
[00] [00] [00] [00] [00] [00] [00] [00] [00] [00] [00] [00]
[00] [00] [00] [00] [00] [00] [00] [00] [00] [00] [00] [00]
[00] [00] [00] [00] [00] [00] [00] [00] [00] [00] [00] [00]
[00] [00] [00] [00] [00] [00] [00] [00] [00] [00] [00] [00]
[00] [00] [00] [00] [00] [00] [00] [00] [00] [00] [00] [00]
[00] [00] [00] [00] [00] [00] [00] [00] [00] [00] [00] [00]
[00] [00] [00] [00] [00] [00] [00] [00] [00] [00] [00] [00]
[00] [00] [00] [00] [00] [00] [00] [00] [00] [00] [00] [00]
[00] [00] [00] [00] [00] [00] [00] [00] [00] [00] [00] [00]
[00] [00] [00] [00] [00] [00] [00] [00] [00] [00] [00] [00]
[00] [00] [00] [00] [00] [00] [00] [00] [00] [00] [00] [00]
[00] [00] [00] [00] [00] [00] [00] [00] [00] [00] [00] [00]
[00] [00] [00] [00] [00] [00] [00] [00] [00] [00] [00] [00]
[00] [00] [00] [00] [00] [00] [00] [00] [00] [00] [00] [00]
[00] [00] [00] [00] [00] [00] [00] [00] [00] [00] [00] [00]
[00] [00] [00] [00] [00] [00] [00] [00] [00] [00] [00] [00]
[00] [00] [00] [00] [00] [00] [00] [00] [00] [00] [00] [00]
[00] [00] [00] [00] [00] [00] [00] [00] [00] [00] [00] [00]
[00] [00] [00] [00] [00] [00] [00] [00] [00] [00] [00] [00]
[00] [00] [00] [00] [00] [00] [00] [00] [00] [00] [00] [00]
[00] [00] [00] [00] [00] [00] [00] [00] [00] [00] [00] [00]
[00] [00] [00] [00] [00] [00] [00] [00] [00] [00] [00] [00]
[00] [00] [00] [00] [00] [00] [00] [00] [00] [00] [00] [00]
[00] [00] [00] [00] [00] [00] [00] [00] [00] [00] [00] [00]
[00] [00] [00] [00] [00] [00] [00] [00] [00] [00] [00] [00]
[00] [00] [00] [00] [00] [00] [00] [00] [00] [00] [00] [00]
[00] [00] [00] [00] [00] [00] [00] [00] [00] [00] [00] [00]
[00] [00] [00] [00] [00] [00] [00] [00] [00] [00] [00] [00]
[00] [00] [00] [00] [00] [00] [00] [00] [00] [00] [00] [00]
[00] [00] [00] [00] [00] [00] [00] [00] [00] [00] [00] [00]
Mac:
[00] [00] [00] [00] [00] [00] [00] [00] [00] [00] [00] [00] [00] [00] [00] [00]
[00] [00] [00] [00] [00] [00] [00] [00] [00] [00] [00] [00] [00] [00] [00] [00]
[00] [00] [00] [00] [00] [00] [00] [00] [00] [00] [00] [00] [00] [00] [00] [00]
[00] [00] [00] [00] [00] [00] [00] [00] [00] [00] [00] [00] [00] [00] [00] [00]
[00] [00] [00] [00] [00] [00] [00] [00] [00] [00] [00] [00] [00] [00] [00] [00]
[00] [00] [00] [00] [00] [00] [00] [00] [00] [00] [00] [00] [00] [00] [00] [00]
[00] [00] [00] [00] [00] [00] [00] [00] [00] [00] [00] [00] [00] [00] [00] [00]
[00] [00] [00] [00] [00] [00] [00] [00] [00] [00] [00] [00] [00] [00] [00] [00]
[00] [00] [00] [00] [00] [00] [00] [00] [00] [00] [00] [00] [00] [00] [00] [00]
[00] [00] [00] [00] [00] [00] [00] [00] [00] [00] [00] [00] [00] [00] [00] [00]
[00] [00] [00] [00] [00] [00] [00] [00] [00] [00] [00] [00] [00] [00] [00] [00]
[00] [00] [00] [00] [00] [00] [00] [00] [00] [00] [00] [00] [00] [00] [00] [00]
[00] [00] [00] [00] [00] [00] [00] [00] [00] [00] [00] [00] [00] [00] [00] [00]
[00] [00] [00] [00] [00] [00] [00] [00] [00] [00] [00] [00] [00] [00] [00] [00]
[00] [00] [00] [00] [00] [00] [00] [00] [00] [00] [00] [00] [00] [00] [00] [00]
[00] [00] [00] [00] [00] [00] [00] [00] [00] [00] [00] [00] [00] [00] [00] [00]
[00] [00] [00] [00] [00] [00] [00] [00] [00] [00] [00] [00] [00] [00] [00] [00]
[00] [00] [00] [00] [00] [00] [00] [00] [00] [00] [00] [00] [00] [00] [00] [00]
[00] [00] [00] [00] [00] [00] [00] [00] [00] [00] [00] [00] [00] [00] [00] [00]
[00] [00] [00] [00] [00] [00] [00] [00] [00] [00] [00] [00] [00] [00] [00] [00]
[00] [00] [00] [00] [00] [00] [00] [00] [00] [00] [00] [00] [00] [00] [00] [00]
[00] [00] [00] [00] [00] [00] [00] [00] [00] [00] [00] [00] [00] [00] [00] [00]
[00] [00] [00] [00] [00] [00] [00] [00] [00] [00] [00] [00] [00] [00] [00] [00]
[00] [00] [00] [00] [00] [00] [00] [00] [00] [00] [00] [00] [00] [00] [00] [00]
[00] [00] [00] [00] [00] [00] [00] [00] [00] [00] [00] [00] [00] [00] [00] [00]
[00] [00] [00] [00] [00] [00] [00] [00] [00] [00] [00] [00] [00] [00] [00] [00]
[00] [00] [00] [00] [00] [00] [00] [00] [00] [00] [00] [00] [00] [00] [00] [00]
[00] [00] [00] [00] [00] [00] [00] [00] [00] [00] [00] [00] [00] [00] [00] [00]
[00] [00] [00] [00] [00] [00] [00] [00] [00] [00] [00] [00] [00] [00] [00] [00]
[00] [00] [00] [00] [00] [00] [00] [00] [00] [00] [00] [00] [00] [00] [00] [00]
[00] [00] [00] [00] [00] [00] [00] [00] [00] [00] [00] [00] [00] [00] [00] [00]
[00] [00] [00] [00] [00] [00] [00] [00] [00] [00] [00] [00] [00] [00] [00] [00]
IvComm:
[00] [00] [00] [00] [00] [00] [00] [00] [00] [00] [00] [00]
MacComm:
[00] [00] [00] [00] [00] [00] [00] [00] [00] [00] [00] [00] [00] [00] [00] [00]
[SGX-KEYBLOB-PEI-REST] KeyBlob for socket no 6
Present: FALSE
TimeStamp: 0-0-0, 0:0:0:0, Pad1: 0, Pad2: 0, TimeZone: 0, Daylight: 0
KeyBlob:
Header:
SGX UUID:
[00] [00] [00] [00] [00] [00] [00] [00] [00] [00] [00] [00] [00] [00] [00] [00]
CpuSvn:
[00]
Security Properties:
[00] [00] [00] [00]
Prid:
[00] [00] [00] [00] [00] [00] [00] [00] [00] [00] [00] [00] [00] [00] [00] [00]
PlatformEpoch:
[00] [00] [00] [00] [00] [00] [00] [00] [00] [00] [00] [00] [00] [00] [00] [00] [00] [00] [00] [00] [00] [00] [00] [00] [00] [00] [00] [00] [00] [00] [00] [00]
RsakHash:
[00] [00] [00] [00] [00] [00] [00] [00] [00] [00] [00] [00] [00] [00] [00] [00] [00] [00] [00] [00] [00] [00] [00] [00] [00] [00] [00] [00] [00] [00] [00] [00]
RsakHash:
[00] [00] [00] [00] [00] [00] [00] [00] [00] [00] [00] [00] [00] [00] [00] [00] [00] [00] [00] [00] [00] [00] [00] [00] [00] [00] [00] [00] [00] [00] [00] [00]
Pfk1:
[00] [00] [00] [00] [00] [00] [00] [00] [00] [00] [00] [00] [00] [00] [00] [00]
PprResetKey:
[00] [00] [00] [00]
[00] [00] [00] [00]
[00] [00] [00] [00]
[00] [00] [00] [00]
[00] [00] [00] [00]
[00] [00] [00] [00]
[00] [00] [00] [00]
[00] [00] [00] [00]
[00] [00] [00] [00]
[00] [00] [00] [00]
[00] [00] [00] [00]
[00] [00] [00] [00]
[00] [00] [00] [00]
[00] [00] [00] [00]
[00] [00] [00] [00]
[00] [00] [00] [00]
[00] [00] [00] [00]
[00] [00] [00] [00]
[00] [00] [00] [00]
[00] [00] [00] [00]
[00] [00] [00] [00]
[00] [00] [00] [00]
[00] [00] [00] [00]
[00] [00] [00] [00]
[00] [00] [00] [00]
[00] [00] [00] [00]
[00] [00] [00] [00]
[00] [00] [00] [00]
[00] [00] [00] [00]
[00] [00] [00] [00]
[00] [00] [00] [00]
[00] [00] [00] [00]
LastUsedSvn:
[00]
Reserved2:
[00] [00] [00] [00] [00] [00] [00] [00] [00] [00] [00] [00] [00] [00] [00]
TargetPrid:
[00] [00] [00] [00] [00] [00] [00] [00] [00] [00] [00] [00] [00] [00] [00] [00]
PrimaryComms:
[00] [00] [00] [00] [00] [00] [00] [00] [00] [00] [00] [00] [00] [00] [00] [00]
Iv:
[00] [00] [00] [00] [00] [00] [00] [00] [00] [00] [00] [00]
[00] [00] [00] [00] [00] [00] [00] [00] [00] [00] [00] [00]
[00] [00] [00] [00] [00] [00] [00] [00] [00] [00] [00] [00]
[00] [00] [00] [00] [00] [00] [00] [00] [00] [00] [00] [00]
[00] [00] [00] [00] [00] [00] [00] [00] [00] [00] [00] [00]
[00] [00] [00] [00] [00] [00] [00] [00] [00] [00] [00] [00]
[00] [00] [00] [00] [00] [00] [00] [00] [00] [00] [00] [00]
[00] [00] [00] [00] [00] [00] [00] [00] [00] [00] [00] [00]
[00] [00] [00] [00] [00] [00] [00] [00] [00] [00] [00] [00]
[00] [00] [00] [00] [00] [00] [00] [00] [00] [00] [00] [00]
[00] [00] [00] [00] [00] [00] [00] [00] [00] [00] [00] [00]
[00] [00] [00] [00] [00] [00] [00] [00] [00] [00] [00] [00]
[00] [00] [00] [00] [00] [00] [00] [00] [00] [00] [00] [00]
[00] [00] [00] [00] [00] [00] [00] [00] [00] [00] [00] [00]
[00] [00] [00] [00] [00] [00] [00] [00] [00] [00] [00] [00]
[00] [00] [00] [00] [00] [00] [00] [00] [00] [00] [00] [00]
[00] [00] [00] [00] [00] [00] [00] [00] [00] [00] [00] [00]
[00] [00] [00] [00] [00] [00] [00] [00] [00] [00] [00] [00]
[00] [00] [00] [00] [00] [00] [00] [00] [00] [00] [00] [00]
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[00] [00] [00] [00] [00] [00] [00] [00] [00] [00] [00] [00]
[00] [00] [00] [00] [00] [00] [00] [00] [00] [00] [00] [00]
[00] [00] [00] [00] [00] [00] [00] [00] [00] [00] [00] [00]
[00] [00] [00] [00] [00] [00] [00] [00] [00] [00] [00] [00]
[00] [00] [00] [00] [00] [00] [00] [00] [00] [00] [00] [00]
[00] [00] [00] [00] [00] [00] [00] [00] [00] [00] [00] [00]
[00] [00] [00] [00] [00] [00] [00] [00] [00] [00] [00] [00]
[00] [00] [00] [00] [00] [00] [00] [00] [00] [00] [00] [00]
[00] [00] [00] [00] [00] [00] [00] [00] [00] [00] [00] [00]
Mac:
[00] [00] [00] [00] [00] [00] [00] [00] [00] [00] [00] [00] [00] [00] [00] [00]
[00] [00] [00] [00] [00] [00] [00] [00] [00] [00] [00] [00] [00] [00] [00] [00]
[00] [00] [00] [00] [00] [00] [00] [00] [00] [00] [00] [00] [00] [00] [00] [00]
[00] [00] [00] [00] [00] [00] [00] [00] [00] [00] [00] [00] [00] [00] [00] [00]
[00] [00] [00] [00] [00] [00] [00] [00] [00] [00] [00] [00] [00] [00] [00] [00]
[00] [00] [00] [00] [00] [00] [00] [00] [00] [00] [00] [00] [00] [00] [00] [00]
[00] [00] [00] [00] [00] [00] [00] [00] [00] [00] [00] [00] [00] [00] [00] [00]
[00] [00] [00] [00] [00] [00] [00] [00] [00] [00] [00] [00] [00] [00] [00] [00]
[00] [00] [00] [00] [00] [00] [00] [00] [00] [00] [00] [00] [00] [00] [00] [00]
[00] [00] [00] [00] [00] [00] [00] [00] [00] [00] [00] [00] [00] [00] [00] [00]
[00] [00] [00] [00] [00] [00] [00] [00] [00] [00] [00] [00] [00] [00] [00] [00]
[00] [00] [00] [00] [00] [00] [00] [00] [00] [00] [00] [00] [00] [00] [00] [00]
[00] [00] [00] [00] [00] [00] [00] [00] [00] [00] [00] [00] [00] [00] [00] [00]
[00] [00] [00] [00] [00] [00] [00] [00] [00] [00] [00] [00] [00] [00] [00] [00]
[00] [00] [00] [00] [00] [00] [00] [00] [00] [00] [00] [00] [00] [00] [00] [00]
[00] [00] [00] [00] [00] [00] [00] [00] [00] [00] [00] [00] [00] [00] [00] [00]
[00] [00] [00] [00] [00] [00] [00] [00] [00] [00] [00] [00] [00] [00] [00] [00]
[00] [00] [00] [00] [00] [00] [00] [00] [00] [00] [00] [00] [00] [00] [00] [00]
[00] [00] [00] [00] [00] [00] [00] [00] [00] [00] [00] [00] [00] [00] [00] [00]
[00] [00] [00] [00] [00] [00] [00] [00] [00] [00] [00] [00] [00] [00] [00] [00]
[00] [00] [00] [00] [00] [00] [00] [00] [00] [00] [00] [00] [00] [00] [00] [00]
[00] [00] [00] [00] [00] [00] [00] [00] [00] [00] [00] [00] [00] [00] [00] [00]
[00] [00] [00] [00] [00] [00] [00] [00] [00] [00] [00] [00] [00] [00] [00] [00]
[00] [00] [00] [00] [00] [00] [00] [00] [00] [00] [00] [00] [00] [00] [00] [00]
[00] [00] [00] [00] [00] [00] [00] [00] [00] [00] [00] [00] [00] [00] [00] [00]
[00] [00] [00] [00] [00] [00] [00] [00] [00] [00] [00] [00] [00] [00] [00] [00]
[00] [00] [00] [00] [00] [00] [00] [00] [00] [00] [00] [00] [00] [00] [00] [00]
[00] [00] [00] [00] [00] [00] [00] [00] [00] [00] [00] [00] [00] [00] [00] [00]
[00] [00] [00] [00] [00] [00] [00] [00] [00] [00] [00] [00] [00] [00] [00] [00]
[00] [00] [00] [00] [00] [00] [00] [00] [00] [00] [00] [00] [00] [00] [00] [00]
[00] [00] [00] [00] [00] [00] [00] [00] [00] [00] [00] [00] [00] [00] [00] [00]
[00] [00] [00] [00] [00] [00] [00] [00] [00] [00] [00] [00] [00] [00] [00] [00]
IvComm:
[00] [00] [00] [00] [00] [00] [00] [00] [00] [00] [00] [00]
MacComm:
[00] [00] [00] [00] [00] [00] [00] [00] [00] [00] [00] [00] [00] [00] [00] [00]
[SGX-KEYBLOB-PEI-REST] KeyBlob for socket no 7
Present: FALSE
TimeStamp: 0-0-0, 0:0:0:0, Pad1: 0, Pad2: 0, TimeZone: 0, Daylight: 0
KeyBlob:
Header:
SGX UUID:
[00] [00] [00] [00] [00] [00] [00] [00] [00] [00] [00] [00] [00] [00] [00] [00]
CpuSvn:
[00]
Security Properties:
[00] [00] [00] [00]
Prid:
[00] [00] [00] [00] [00] [00] [00] [00] [00] [00] [00] [00] [00] [00] [00] [00]
PlatformEpoch:
[00] [00] [00] [00] [00] [00] [00] [00] [00] [00] [00] [00] [00] [00] [00] [00] [00] [00] [00] [00] [00] [00] [00] [00] [00] [00] [00] [00] [00] [00] [00] [00]
RsakHash:
[00] [00] [00] [00] [00] [00] [00] [00] [00] [00] [00] [00] [00] [00] [00] [00] [00] [00] [00] [00] [00] [00] [00] [00] [00] [00] [00] [00] [00] [00] [00] [00]
RsakHash:
[00] [00] [00] [00] [00] [00] [00] [00] [00] [00] [00] [00] [00] [00] [00] [00] [00] [00] [00] [00] [00] [00] [00] [00] [00] [00] [00] [00] [00] [00] [00] [00]
Pfk1:
[00] [00] [00] [00] [00] [00] [00] [00] [00] [00] [00] [00] [00] [00] [00] [00]
PprResetKey:
[00] [00] [00] [00]
[00] [00] [00] [00]
[00] [00] [00] [00]
[00] [00] [00] [00]
[00] [00] [00] [00]
[00] [00] [00] [00]
[00] [00] [00] [00]
[00] [00] [00] [00]
[00] [00] [00] [00]
[00] [00] [00] [00]
[00] [00] [00] [00]
[00] [00] [00] [00]
[00] [00] [00] [00]
[00] [00] [00] [00]
[00] [00] [00] [00]
[00] [00] [00] [00]
[00] [00] [00] [00]
[00] [00] [00] [00]
[00] [00] [00] [00]
[00] [00] [00] [00]
[00] [00] [00] [00]
[00] [00] [00] [00]
[00] [00] [00] [00]
[00] [00] [00] [00]
[00] [00] [00] [00]
[00] [00] [00] [00]
[00] [00] [00] [00]
[00] [00] [00] [00]
[00] [00] [00] [00]
[00] [00] [00] [00]
[00] [00] [00] [00]
[00] [00] [00] [00]
LastUsedSvn:
[00]
Reserved2:
[00] [00] [00] [00] [00] [00] [00] [00] [00] [00] [00] [00] [00] [00] [00]
TargetPrid:
[00] [00] [00] [00] [00] [00] [00] [00] [00] [00] [00] [00] [00] [00] [00] [00]
PrimaryComms:
[00] [00] [00] [00] [00] [00] [00] [00] [00] [00] [00] [00] [00] [00] [00] [00]
Iv:
[00] [00] [00] [00] [00] [00] [00] [00] [00] [00] [00] [00]
[00] [00] [00] [00] [00] [00] [00] [00] [00] [00] [00] [00]
[00] [00] [00] [00] [00] [00] [00] [00] [00] [00] [00] [00]
[00] [00] [00] [00] [00] [00] [00] [00] [00] [00] [00] [00]
[00] [00] [00] [00] [00] [00] [00] [00] [00] [00] [00] [00]
[00] [00] [00] [00] [00] [00] [00] [00] [00] [00] [00] [00]
[00] [00] [00] [00] [00] [00] [00] [00] [00] [00] [00] [00]
[00] [00] [00] [00] [00] [00] [00] [00] [00] [00] [00] [00]
[00] [00] [00] [00] [00] [00] [00] [00] [00] [00] [00] [00]
[00] [00] [00] [00] [00] [00] [00] [00] [00] [00] [00] [00]
[00] [00] [00] [00] [00] [00] [00] [00] [00] [00] [00] [00]
[00] [00] [00] [00] [00] [00] [00] [00] [00] [00] [00] [00]
[00] [00] [00] [00] [00] [00] [00] [00] [00] [00] [00] [00]
[00] [00] [00] [00] [00] [00] [00] [00] [00] [00] [00] [00]
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[00] [00] [00] [00] [00] [00] [00] [00] [00] [00] [00] [00]
[00] [00] [00] [00] [00] [00] [00] [00] [00] [00] [00] [00]
[00] [00] [00] [00] [00] [00] [00] [00] [00] [00] [00] [00]
[00] [00] [00] [00] [00] [00] [00] [00] [00] [00] [00] [00]
[00] [00] [00] [00] [00] [00] [00] [00] [00] [00] [00] [00]
[00] [00] [00] [00] [00] [00] [00] [00] [00] [00] [00] [00]
[00] [00] [00] [00] [00] [00] [00] [00] [00] [00] [00] [00]
[00] [00] [00] [00] [00] [00] [00] [00] [00] [00] [00] [00]
[00] [00] [00] [00] [00] [00] [00] [00] [00] [00] [00] [00]
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[00] [00] [00] [00] [00] [00] [00] [00] [00] [00] [00] [00]
[00] [00] [00] [00] [00] [00] [00] [00] [00] [00] [00] [00]
Mac:
[00] [00] [00] [00] [00] [00] [00] [00] [00] [00] [00] [00] [00] [00] [00] [00]
[00] [00] [00] [00] [00] [00] [00] [00] [00] [00] [00] [00] [00] [00] [00] [00]
[00] [00] [00] [00] [00] [00] [00] [00] [00] [00] [00] [00] [00] [00] [00] [00]
[00] [00] [00] [00] [00] [00] [00] [00] [00] [00] [00] [00] [00] [00] [00] [00]
[00] [00] [00] [00] [00] [00] [00] [00] [00] [00] [00] [00] [00] [00] [00] [00]
[00] [00] [00] [00] [00] [00] [00] [00] [00] [00] [00] [00] [00] [00] [00] [00]
[00] [00] [00] [00] [00] [00] [00] [00] [00] [00] [00] [00] [00] [00] [00] [00]
[00] [00] [00] [00] [00] [00] [00] [00] [00] [00] [00] [00] [00] [00] [00] [00]
[00] [00] [00] [00] [00] [00] [00] [00] [00] [00] [00] [00] [00] [00] [00] [00]
[00] [00] [00] [00] [00] [00] [00] [00] [00] [00] [00] [00] [00] [00] [00] [00]
[00] [00] [00] [00] [00] [00] [00] [00] [00] [00] [00] [00] [00] [00] [00] [00]
[00] [00] [00] [00] [00] [00] [00] [00] [00] [00] [00] [00] [00] [00] [00] [00]
[00] [00] [00] [00] [00] [00] [00] [00] [00] [00] [00] [00] [00] [00] [00] [00]
[00] [00] [00] [00] [00] [00] [00] [00] [00] [00] [00] [00] [00] [00] [00] [00]
[00] [00] [00] [00] [00] [00] [00] [00] [00] [00] [00] [00] [00] [00] [00] [00]
[00] [00] [00] [00] [00] [00] [00] [00] [00] [00] [00] [00] [00] [00] [00] [00]
[00] [00] [00] [00] [00] [00] [00] [00] [00] [00] [00] [00] [00] [00] [00] [00]
[00] [00] [00] [00] [00] [00] [00] [00] [00] [00] [00] [00] [00] [00] [00] [00]
[00] [00] [00] [00] [00] [00] [00] [00] [00] [00] [00] [00] [00] [00] [00] [00]
[00] [00] [00] [00] [00] [00] [00] [00] [00] [00] [00] [00] [00] [00] [00] [00]
[00] [00] [00] [00] [00] [00] [00] [00] [00] [00] [00] [00] [00] [00] [00] [00]
[00] [00] [00] [00] [00] [00] [00] [00] [00] [00] [00] [00] [00] [00] [00] [00]
[00] [00] [00] [00] [00] [00] [00] [00] [00] [00] [00] [00] [00] [00] [00] [00]
[00] [00] [00] [00] [00] [00] [00] [00] [00] [00] [00] [00] [00] [00] [00] [00]
[00] [00] [00] [00] [00] [00] [00] [00] [00] [00] [00] [00] [00] [00] [00] [00]
[00] [00] [00] [00] [00] [00] [00] [00] [00] [00] [00] [00] [00] [00] [00] [00]
[00] [00] [00] [00] [00] [00] [00] [00] [00] [00] [00] [00] [00] [00] [00] [00]
[00] [00] [00] [00] [00] [00] [00] [00] [00] [00] [00] [00] [00] [00] [00] [00]
[00] [00] [00] [00] [00] [00] [00] [00] [00] [00] [00] [00] [00] [00] [00] [00]
[00] [00] [00] [00] [00] [00] [00] [00] [00] [00] [00] [00] [00] [00] [00] [00]
[00] [00] [00] [00] [00] [00] [00] [00] [00] [00] [00] [00] [00] [00] [00] [00]
[00] [00] [00] [00] [00] [00] [00] [00] [00] [00] [00] [00] [00] [00] [00] [00]
IvComm:
[00] [00] [00] [00] [00] [00] [00] [00] [00] [00] [00] [00]
MacComm:
[00] [00] [00] [00] [00] [00] [00] [00] [00] [00] [00] [00] [00] [00] [00] [00]
SGX disabled, exiting
[SGX] SgxEarlyInit exit: Success
SgxDisabledFlow entry
LockUncoreM2mPrmrrs START
SocketIndex = 0
[SGX] LockUncoreM2mPrmrrs: Sgx M2M_PRMRR_BASE Socket0 Imc0 = 0x0000000000000000
[SGX] LockUncoreM2mPrmrrs: Sgx M2M_PRMRR_MASK Socket0 Imc0 = 0x0000000000000400
[SGX] LockUncoreM2mPrmrrs: Sgx M2M_PRMRR_BASE Socket0 Imc1 = 0x0000000000000000
[SGX] LockUncoreM2mPrmrrs: Sgx M2M_PRMRR_MASK Socket0 Imc1 = 0x0000000000000400
[SGX] LockUncoreM2mPrmrrs: Sgx M2M_PRMRR_BASE Socket0 Imc2 = 0x0000000000000000
[SGX] LockUncoreM2mPrmrrs: Sgx M2M_PRMRR_MASK Socket0 Imc2 = 0x0000000000000400
[SGX] LockUncoreM2mPrmrrs: Sgx M2M_PRMRR_BASE Socket0 Imc3 = 0x0000000000000000
[SGX] LockUncoreM2mPrmrrs: Sgx M2M_PRMRR_MASK Socket0 Imc3 = 0x0000000000000400
SocketIndex = 1
[SGX] LockUncoreM2mPrmrrs: Sgx M2M_PRMRR_BASE Socket1 Imc0 = 0x0000000000000000
[SGX] LockUncoreM2mPrmrrs: Sgx M2M_PRMRR_MASK Socket1 Imc0 = 0x0000000000000400
[SGX] LockUncoreM2mPrmrrs: Sgx M2M_PRMRR_BASE Socket1 Imc1 = 0x0000000000000000
[SGX] LockUncoreM2mPrmrrs: Sgx M2M_PRMRR_MASK Socket1 Imc1 = 0x0000000000000400
[SGX] LockUncoreM2mPrmrrs: Sgx M2M_PRMRR_BASE Socket1 Imc2 = 0x0000000000000000
[SGX] LockUncoreM2mPrmrrs: Sgx M2M_PRMRR_MASK Socket1 Imc2 = 0x0000000000000400
[SGX] LockUncoreM2mPrmrrs: Sgx M2M_PRMRR_BASE Socket1 Imc3 = 0x0000000000000000
[SGX] LockUncoreM2mPrmrrs: Sgx M2M_PRMRR_MASK Socket1 Imc3 = 0x0000000000000400
LockUncoreM2mPrmrrs END
SgxDisabledFlow exit
PROGRESS CODE: V03020003 I0
PROGRESS CODE: V03020002 I0
PEI PPM Initialization Entry
::PEI Power Management CSR, B2P and TPMI Programming
Data received from mailbox: 0x20000802
Data received from mailbox: 0x20000902
InitializeUfsMeshBoostConfig() Not supported or not enabled, Exit
Data received from mailbox: 0x20000802
Data received from mailbox: 0x20000902
InitializeUfsMeshBoostConfig() Not supported or not enabled, Exit
PROGRESS CODE: V03020003 I0
PROGRESS CODE: V03020002 I0
[NEW] FeatureName: AESNI
[NEW] FeatureName: MWAIT
[NEW] FeatureName: ACPI
[NEW] FeatureName: EIST
[NEW] FeatureName: FastStrings
[NEW] FeatureName: Lock Feature Control Register
[NEW] FeatureName: SMX
[NEW] FeatureName: VMX
[NEW] FeatureName: Limit CpuId Maximum Value
[NEW] FeatureName: Machine Check Enable
[NEW] FeatureName: Machine Check Architect
[NEW] FeatureName: MCG_CTL
[NEW] FeatureName: Pending Break
[NEW] FeatureName: C1E
[NEW] FeatureName: X2Apic
[NEW] FeatureName: PPIN
[NEW] FeatureName: LMCE
[NEW] FeatureName: Proc Trace
[OVERRIDE] FeatureName: ACPI
[OVERRIDE] FeatureName: EIST
[OVERRIDE] FeatureName: FastStrings
[OVERRIDE] FeatureName: Lock Feature Control Register
[OVERRIDE] FeatureName: Limit CpuId Maximum Value
[OVERRIDE] FeatureName: Pending Break
[OVERRIDE] FeatureName: C1E
[OVERRIDE] FeatureName: PPIN
[OVERRIDE] FeatureName: LMCE
[OVERRIDE] FeatureName: Proc Trace
[NEW] FeatureName: L1 Next Page Prefetcher
[NEW] FeatureName: DCU Streamer Prefetcher
[NEW] FeatureName: DCU IP Prefetcher
[NEW] FeatureName: Mlc Streamer Prefetcher
[NEW] FeatureName: Mlc Spatial Prefetcher
[NEW] FeatureName: AMP Prefetcher
[NEW] FeatureName: Three Strike Counter
[NEW] FeatureName: DBP-F
[NEW] FeatureName: Energy Performance Bias
[NEW] FeatureName: C State
[NEW] FeatureName: Thermal management
[NEW] FeatureName: SncInit
[NEW] FeatureName: MbmInit
[NEW] FeatureName: IioLlcWays
[NEW] FeatureName: AcSplitLock
[NEW] FeatureName: CrashDataGprs
:IioLlcWays: Socket = 0
Capid5Csr = 0x6700000B iio_llcconfig_en (Bit[1]) = 1
:IioLlcWays: Socket = 1
Capid5Csr = 0x6700000B iio_llcconfig_en (Bit[1]) = 1
Processor Info: Package: 2, MaxCore : 40, MaxThread: 2
P00: Thread Count = 80
P00 C0000, Thread Count = 2
P00 C0001, Thread Count = 2
P00 C0002, Thread Count = 2
P00 C0003, Thread Count = 2
P00 C0004, Thread Count = 2
P00 C0005, Thread Count = 2
P00 C0006, Thread Count = 2
P00 C0007, Thread Count = 2
P00 C0008, Thread Count = 2
P00 C0009, Thread Count = 2
P00 C0010, Thread Count = 2
P00 C0011, Thread Count = 2
P00 C0012, Thread Count = 2
P00 C0013, Thread Count = 2
P00 C0014, Thread Count = 2
P00 C0015, Thread Count = 2
P00 C0016, Thread Count = 2
P00 C0017, Thread Count = 2
P00 C0018, Thread Count = 2
P00 C0019, Thread Count = 2
P00 C0020, Thread Count = 2
P00 C0021, Thread Count = 2
P00 C0022, Thread Count = 2
P00 C0023, Thread Count = 2
P00 C0024, Thread Count = 2
P00 C0025, Thread Count = 2
P00 C0026, Thread Count = 2
P00 C0027, Thread Count = 2
P00 C0028, Thread Count = 2
P00 C0029, Thread Count = 2
P00 C0030, Thread Count = 2
P00 C0031, Thread Count = 2
P00 C0032, Thread Count = 2
P00 C0033, Thread Count = 2
P00 C0034, Thread Count = 2
P00 C0035, Thread Count = 2
P00 C0036, Thread Count = 2
P00 C0037, Thread Count = 2
P00 C0038, Thread Count = 2
P00 C0039, Thread Count = 2
P01: Thread Count = 80
P01 C0000, Thread Count = 2
P01 C0001, Thread Count = 2
P01 C0002, Thread Count = 2
P01 C0003, Thread Count = 2
P01 C0004, Thread Count = 2
P01 C0005, Thread Count = 2
P01 C0006, Thread Count = 2
P01 C0007, Thread Count = 2
P01 C0008, Thread Count = 2
P01 C0009, Thread Count = 2
P01 C0010, Thread Count = 2
P01 C0011, Thread Count = 2
P01 C0012, Thread Count = 2
P01 C0013, Thread Count = 2
P01 C0014, Thread Count = 2
P01 C0015, Thread Count = 2
P01 C0016, Thread Count = 2
P01 C0017, Thread Count = 2
P01 C0018, Thread Count = 2
P01 C0019, Thread Count = 2
P01 C0020, Thread Count = 2
P01 C0021, Thread Count = 2
P01 C0022, Thread Count = 2
P01 C0023, Thread Count = 2
P01 C0024, Thread Count = 2
P01 C0025, Thread Count = 2
P01 C0026, Thread Count = 2
P01 C0027, Thread Count = 2
P01 C0028, Thread Count = 2
P01 C0029, Thread Count = 2
P01 C0030, Thread Count = 2
P01 C0031, Thread Count = 2
P01 C0032, Thread Count = 2
P01 C0033, Thread Count = 2
P01 C0034, Thread Count = 2
P01 C0035, Thread Count = 2
P01 C0036, Thread Count = 2
P01 C0037, Thread Count = 2
P01 C0038, Thread Count = 2
P01 C0039, Thread Count = 2
Last CPU features list...
[Enable ] FeatureName: AESNI
[Enable ] FeatureName: MWAIT
[Unsupport] FeatureName: ACPI
[Enable ] FeatureName: EIST
[Enable ] FeatureName: FastStrings
[Enable ] FeatureName: VMX
[Unsupport] FeatureName: LMCE
[Disable ] FeatureName: SMX
[Unsupport] FeatureName: Lock Feature Control Register
[Unsupport] FeatureName: Limit CpuId Maximum Value
[Enable ] FeatureName: Machine Check Enable
[Enable ] FeatureName: Machine Check Architect
[Unsupport] FeatureName: MCG_CTL
[Unsupport] FeatureName: Pending Break
[Unsupport] FeatureName: C1E
[Enable ] FeatureName: X2Apic
[Enable ] FeatureName: PPIN
[Unsupport] FeatureName: Proc Trace
[Unsupport] FeatureName: L1 Next Page Prefetcher
[Enable ] FeatureName: DCU Streamer Prefetcher
[Enable ] FeatureName: DCU IP Prefetcher
[Enable ] FeatureName: Mlc Streamer Prefetcher
[Enable ] FeatureName: Mlc Spatial Prefetcher
[Disable ] FeatureName: AMP Prefetcher
[Enable ] FeatureName: Three Strike Counter
[Disable ] FeatureName: DBP-F
[Enable ] FeatureName: Energy Performance Bias
[Enable ] FeatureName: C State
[Enable ] FeatureName: Thermal management
[Enable ] FeatureName: SncInit
[Enable ] FeatureName: MbmInit
[Disable ] FeatureName: IioLlcWays
[Unsupport] FeatureName: AcSplitLock
[Unsupport] FeatureName: CrashDataGprs
PcdCpuFeaturesCapability:
D5 31 60 E9 F1 0D 00 00
Origin PcdCpuFeaturesSetting:
D5 70 60 C5 F0 0D 00 00
Final PcdCpuFeaturesSetting:
D5 30 60 C1 F0 0D 00 00
:SNC: Socket = 0, Processor = 0
SncConfigMsr = 0xA
SncBaseCsr [0x0] = 0xFFF0000
SncBaseCsr [0x1] = 0x1FE00022
SncBaseCsr [0x2] = 0x42
SncBaseCsr [0x3] = 0x62
SncBaseCsr [0x4] = 0x82
SncConfigCsr = 0xF
:MBM: S0 Processor = 0, LlcQosMonEnable = 1
ChasPerCluster = 13, ChaThresholdWithinCluster = 12, CorrectionFactorHi = 123 CorrectionFactorLo = 98
Dump final value for PcdCpuFeaturesSetting:
D5 30 60 C1 F0 0D 00 00
RegisterTable->TableLength = 71
Processor: 0000: Index 0000, MSR : 0000013C, Bit Start: 00, Bit Length: 02, Value: 0000000000000001
Processor: 0000: Index 0001, MSR : 000001A0, Bit Start: 18, Bit Length: 01, Value: 0000000000000001
Processor: 0000: Index 0002, SEMAP: Package
Processor: 0000: Index 0003, MSR : 000001A0, Bit Start: 16, Bit Length: 01, Value: 0000000000000001
Processor: 0000: Index 0004, SEMAP: Package
Processor: 0000: Index 0005, SEMAP: Package
Processor: 0000: Index 0006, MSR : 000001A0, Bit Start: 38, Bit Length: 01, Value: 0000000000000000
Processor: 0000: Index 0007, SEMAP: Package
Processor: 0000: Index 0008, MSR : 00000199, Bit Start: 08, Bit Length: 07, Value: 0000000000000011
Processor: 0000: Index 0009, MSR : 000001A0, Bit Start: 00, Bit Length: 01, Value: 0000000000000001
Processor: 0000: Index 0010, MSR : 0000003A, Bit Start: 02, Bit Length: 01, Value: 0000000000000001
Processor: 0000: Index 0011, CR : 00000004, Bit Start: 14, Bit Length: 01, Value: 0000000000000000
Processor: 0000: Index 0012, MSR : 0000003A, Bit Start: 08, Bit Length: 07, Value: 0000000000000000
Processor: 0000: Index 0013, MSR : 0000003A, Bit Start: 15, Bit Length: 01, Value: 0000000000000000
Processor: 0000: Index 0014, MSR : 0000003A, Bit Start: 01, Bit Length: 01, Value: 0000000000000000
Processor: 0000: Index 0015, CR : 00000004, Bit Start: 06, Bit Length: 01, Value: 0000000000000001
Processor: 0000: Index 0016, MSR : 00000400, Bit Start: 00, Bit Length: 64, Value: FFFFFFFFFFFFFFFF
Processor: 0000: Index 0017, MSR : 00000404, Bit Start: 00, Bit Length: 64, Value: FFFFFFFFFFFFFFFF
Processor: 0000: Index 0018, MSR : 00000408, Bit Start: 00, Bit Length: 64, Value: FFFFFFFFFFFFFFFF
Processor: 0000: Index 0019, MSR : 0000040C, Bit Start: 00, Bit Length: 64, Value: FFFFFFFFFFFFFFFF
Processor: 0000: Index 0020, MSR : 00000410, Bit Start: 00, Bit Length: 64, Value: FFFFFFFFFFFFFFFF
Processor: 0000: Index 0021, MSR : 00000414, Bit Start: 00, Bit Length: 64, Value: FFFFFFFFFFFFFFFF
Processor: 0000: Index 0022, MSR : 00000418, Bit Start: 00, Bit Length: 64, Value: FFFFFFFFFFFFFFFF
Processor: 0000: Index 0023, MSR : 0000041C, Bit Start: 00, Bit Length: 64, Value: FFFFFFFFFFFFFFFF
Processor: 0000: Index 0024, MSR : 00000420, Bit Start: 00, Bit Length: 64, Value: FFFFFFFFFFFFFFFF
Processor: 0000: Index 0025, MSR : 00000424, Bit Start: 00, Bit Length: 64, Value: FFFFFFFFFFFFFFFF
Processor: 0000: Index 0026, MSR : 00000428, Bit Start: 00, Bit Length: 64, Value: FFFFFFFFFFFFFFFF
Processor: 0000: Index 0027, MSR : 0000042C, Bit Start: 00, Bit Length: 64, Value: FFFFFFFFFFFFFFFF
Processor: 0000: Index 0028, MSR : 00000430, Bit Start: 00, Bit Length: 64, Value: FFFFFFFFFFFFFFFF
Processor: 0000: Index 0029, MSR : 00000434, Bit Start: 00, Bit Length: 64, Value: FFFFFFFFFFFFFFFF
Processor: 0000: Index 0030, MSR : 00000438, Bit Start: 00, Bit Length: 64, Value: FFFFFFFFFFFFFFFF
Processor: 0000: Index 0031, MSR : 0000043C, Bit Start: 00, Bit Length: 64, Value: FFFFFFFFFFFFFFFF
Processor: 0000: Index 0032, MSR : 00000440, Bit Start: 00, Bit Length: 64, Value: FFFFFFFFFFFFFFFF
Processor: 0000: Index 0033, MSR : 00000444, Bit Start: 00, Bit Length: 64, Value: FFFFFFFFFFFFFFFF
Processor: 0000: Index 0034, MSR : 00000448, Bit Start: 00, Bit Length: 64, Value: FFFFFFFFFFFFFFFF
Processor: 0000: Index 0035, MSR : 0000044C, Bit Start: 00, Bit Length: 64, Value: FFFFFFFFFFFFFFFF
Processor: 0000: Index 0036, MSR : 00000450, Bit Start: 00, Bit Length: 64, Value: FFFFFFFFFFFFFFFF
Processor: 0000: Index 0037, MSR : 00000454, Bit Start: 00, Bit Length: 64, Value: FFFFFFFFFFFFFFFF
Processor: 0000: Index 0038, MSR : 00000458, Bit Start: 00, Bit Length: 64, Value: FFFFFFFFFFFFFFFF
Processor: 0000: Index 0039, MSR : 0000045C, Bit Start: 00, Bit Length: 64, Value: FFFFFFFFFFFFFFFF
Processor: 0000: Index 0040, MSR : 00000460, Bit Start: 00, Bit Length: 64, Value: FFFFFFFFFFFFFFFF
Processor: 0000: Index 0041, MSR : 00000464, Bit Start: 00, Bit Length: 64, Value: FFFFFFFFFFFFFFFF
Processor: 0000: Index 0042, MSR : 00000468, Bit Start: 00, Bit Length: 64, Value: FFFFFFFFFFFFFFFF
Processor: 0000: Index 0043, MSR : 0000046C, Bit Start: 00, Bit Length: 64, Value: FFFFFFFFFFFFFFFF
Processor: 0000: Index 0044, MSR : 00000470, Bit Start: 00, Bit Length: 64, Value: FFFFFFFFFFFFFFFF
Processor: 0000: Index 0045, MSR : 00000474, Bit Start: 00, Bit Length: 64, Value: FFFFFFFFFFFFFFFF
Processor: 0000: Index 0046, MSR : 00000478, Bit Start: 00, Bit Length: 64, Value: FFFFFFFFFFFFFFFF
Processor: 0000: Index 0047, MSR : 0000047C, Bit Start: 00, Bit Length: 64, Value: FFFFFFFFFFFFFFFF
Processor: 0000: Index 0048, MSR : 0000001B, Bit Start: 10, Bit Length: 01, Value: 0000000000000001
Processor: 0000: Index 0049, MSR : 0000004E, Bit Start: 00, Bit Length: 64, Value: 0000000000000002
Processor: 0000: Index 0050, CACHE: 00000000, Bit Start: 00, Bit Length: 01, Value: 0000000000000000
Processor: 0000: Index 0051, MSR : 000001A4, Bit Start: 05, Bit Length: 01, Value: 0000000000000001
Processor: 0000: Index 0052, CACHE: 00000000, Bit Start: 00, Bit Length: 01, Value: 0000000000000001
Processor: 0000: Index 0053, MSR : 000001A4, Bit Start: 11, Bit Length: 01, Value: 0000000000000000
Processor: 0000: Index 0054, MSR : 0000006D, Bit Start: 02, Bit Length: 02, Value: 0000000000000000
Processor: 0000: Index 0055, MSR : 000001FC, Bit Start: 18, Bit Length: 01, Value: 0000000000000001
Processor: 0000: Index 0056, SEMAP: Package
Processor: 0000: Index 0057, MSR : 000001B0, Bit Start: 00, Bit Length: 04, Value: 0000000000000000
Processor: 0000: Index 0058, MSR : 000000E2, Bit Start: 00, Bit Length: 64, Value: 0000000014000403
Processor: 0000: Index 0059, MSR : 000000E4, Bit Start: 00, Bit Length: 64, Value: 0000000000010514
Processor: 0000: Index 0060, MSR : 000001A0, Bit Start: 03, Bit Length: 01, Value: 0000000000000001
Processor: 0000: Index 0061, MSR : 000001AA, Bit Start: 22, Bit Length: 01, Value: 0000000000000001
Processor: 0000: Index 0062, MSR : 000001A2, Bit Start: 00, Bit Length: 64, Value: 0000000080640800
Processor: 0000: Index 0063, MSR : 00000153, Bit Start: 00, Bit Length: 16, Value: 0000000000000000
Processor: 0000: Index 0064, MSR : 00000154, Bit Start: 00, Bit Length: 16, Value: 0000000000000022
Processor: 0000: Index 0065, MSR : 00000155, Bit Start: 00, Bit Length: 16, Value: 0000000000000042
Processor: 0000: Index 0066, MSR : 00000156, Bit Start: 00, Bit Length: 16, Value: 0000000000000062
Processor: 0000: Index 0067, MSR : 00000157, Bit Start: 00, Bit Length: 16, Value: 0000000000000082
Processor: 0000: Index 0068, MSR : 00000159, Bit Start: 00, Bit Length: 30, Value: 0000000000000000
Processor: 0000: Index 0069, MSR : 00000152, Bit Start: 00, Bit Length: 64, Value: 000000000000000A
Processor: 0000: Index 0070, MSR : 00000CA1, Bit Start: 00, Bit Length: 32, Value: 00000000627B0C0D
Dump final value for PcdCpuFeaturesSetting:
D5 30 60 C1 F0 0D 00 00
:SNC: Socket = 0, Processor = 2
SncConfigMsr = 0xA
SncBaseCsr [0x0] = 0xFFF0000
SncBaseCsr [0x1] = 0x1FE00022
SncBaseCsr [0x2] = 0x42
SncBaseCsr [0x3] = 0x62
SncBaseCsr [0x4] = 0x82
SncConfigCsr = 0xF
Dump final value for PcdCpuFeaturesSetting:
D5 30 60 C1 F0 0D 00 00
Dump final value for PcdCpuFeaturesSetting:
D5 30 60 C1 F0 0D 00 00
:SNC: Socket = 0, Processor = 4
SncConfigMsr = 0xA
SncBaseCsr [0x0] = 0xFFF0000
SncBaseCsr [0x1] = 0x1FE00022
SncBaseCsr [0x2] = 0x42
SncBaseCsr [0x3] = 0x62
SncBaseCsr [0x4] = 0x82
SncConfigCsr = 0xF
Dump final value for PcdCpuFeaturesSetting:
D5 30 60 C1 F0 0D 00 00
Dump final value for PcdCpuFeaturesSetting:
D5 30 60 C1 F0 0D 00 00
:SNC: Socket = 0, Processor = 6
SncConfigMsr = 0xA
SncBaseCsr [0x0] = 0xFFF0000
SncBaseCsr [0x1] = 0x1FE00022
SncBaseCsr [0x2] = 0x42
SncBaseCsr [0x3] = 0x62
SncBaseCsr [0x4] = 0x82
SncConfigCsr = 0xF
Dump final value for PcdCpuFeaturesSetting:
D5 30 60 C1 F0 0D 00 00
Dump final value for PcdCpuFeaturesSetting:
D5 30 60 C1 F0 0D 00 00
:SNC: Socket = 0, Processor = 8
SncConfigMsr = 0xA
SncBaseCsr [0x0] = 0xFFF0000
SncBaseCsr [0x1] = 0x1FE00022
SncBaseCsr [0x2] = 0x42
SncBaseCsr [0x3] = 0x62
SncBaseCsr [0x4] = 0x82
SncConfigCsr = 0xF
Dump final value for PcdCpuFeaturesSetting:
D5 30 60 C1 F0 0D 00 00
Dump final value for PcdCpuFeaturesSetting:
D5 30 60 C1 F0 0D 00 00
:SNC: Socket = 0, Processor = 10
SncConfigMsr = 0xA
SncBaseCsr [0x0] = 0xFFF0000
SncBaseCsr [0x1] = 0x1FE00022
SncBaseCsr [0x2] = 0x42
SncBaseCsr [0x3] = 0x62
SncBaseCsr [0x4] = 0x82
SncConfigCsr = 0xF
Dump final value for PcdCpuFeaturesSetting:
D5 30 60 C1 F0 0D 00 00
Dump final value for PcdCpuFeaturesSetting:
D5 30 60 C1 F0 0D 00 00
:SNC: Socket = 0, Processor = 12
SncConfigMsr = 0xA
SncBaseCsr [0x0] = 0xFFF0000
SncBaseCsr [0x1] = 0x1FE00022
SncBaseCsr [0x2] = 0x42
SncBaseCsr [0x3] = 0x62
SncBaseCsr [0x4] = 0x82
SncConfigCsr = 0xF
Dump final value for PcdCpuFeaturesSetting:
D5 30 60 C1 F0 0D 00 00
Dump final value for PcdCpuFeaturesSetting:
D5 30 60 C1 F0 0D 00 00
:SNC: Socket = 0, Processor = 14
SncConfigMsr = 0xA
SncBaseCsr [0x0] = 0xFFF0000
SncBaseCsr [0x1] = 0x1FE00022
SncBaseCsr [0x2] = 0x42
SncBaseCsr [0x3] = 0x62
SncBaseCsr [0x4] = 0x82
SncConfigCsr = 0xF
Dump final value for PcdCpuFeaturesSetting:
D5 30 60 C1 F0 0D 00 00
Dump final value for PcdCpuFeaturesSetting:
D5 30 60 C1 F0 0D 00 00
:SNC: Socket = 0, Processor = 16
SncConfigMsr = 0xA
SncBaseCsr [0x0] = 0xFFF0000
SncBaseCsr [0x1] = 0x1FE00022
SncBaseCsr [0x2] = 0x42
SncBaseCsr [0x3] = 0x62
SncBaseCsr [0x4] = 0x82
SncConfigCsr = 0xF
Dump final value for PcdCpuFeaturesSetting:
D5 30 60 C1 F0 0D 00 00
Dump final value for PcdCpuFeaturesSetting:
D5 30 60 C1 F0 0D 00 00
:SNC: Socket = 0, Processor = 18
SncConfigMsr = 0xA
SncBaseCsr [0x0] = 0xFFF0000
SncBaseCsr [0x1] = 0x1FE00022
SncBaseCsr [0x2] = 0x42
SncBaseCsr [0x3] = 0x62
SncBaseCsr [0x4] = 0x82
SncConfigCsr = 0xF
Dump final value for PcdCpuFeaturesSetting:
D5 30 60 C1 F0 0D 00 00
Dump final value for PcdCpuFeaturesSetting:
D5 30 60 C1 F0 0D 00 00
:SNC: Socket = 0, Processor = 20
SncConfigMsr = 0xA
SncBaseCsr [0x0] = 0xFFF0000
SncBaseCsr [0x1] = 0x1FE00022
SncBaseCsr [0x2] = 0x42
SncBaseCsr [0x3] = 0x62
SncBaseCsr [0x4] = 0x82
SncConfigCsr = 0xF
Dump final value for PcdCpuFeaturesSetting:
D5 30 60 C1 F0 0D 00 00
Dump final value for PcdCpuFeaturesSetting:
D5 30 60 C1 F0 0D 00 00
:SNC: Socket = 0, Processor = 22
SncConfigMsr = 0xA
SncBaseCsr [0x0] = 0xFFF0000
SncBaseCsr [0x1] = 0x1FE00022
SncBaseCsr [0x2] = 0x42
SncBaseCsr [0x3] = 0x62
SncBaseCsr [0x4] = 0x82
SncConfigCsr = 0xF
Dump final value for PcdCpuFeaturesSetting:
D5 30 60 C1 F0 0D 00 00
Dump final value for PcdCpuFeaturesSetting:
D5 30 60 C1 F0 0D 00 00
:SNC: Socket = 0, Processor = 24
SncConfigMsr = 0xA
SncBaseCsr [0x0] = 0xFFF0000
SncBaseCsr [0x1] = 0x1FE00022
SncBaseCsr [0x2] = 0x42
SncBaseCsr [0x3] = 0x62
SncBaseCsr [0x4] = 0x82
SncConfigCsr = 0xF
Dump final value for PcdCpuFeaturesSetting:
D5 30 60 C1 F0 0D 00 00
Dump final value for PcdCpuFeaturesSetting:
D5 30 60 C1 F0 0D 00 00
:SNC: Socket = 0, Processor = 26
SncConfigMsr = 0xA
SncBaseCsr [0x0] = 0xFFF0000
SncBaseCsr [0x1] = 0x1FE00022
SncBaseCsr [0x2] = 0x42
SncBaseCsr [0x3] = 0x62
SncBaseCsr [0x4] = 0x82
SncConfigCsr = 0xF
Dump final value for PcdCpuFeaturesSetting:
D5 30 60 C1 F0 0D 00 00
Dump final value for PcdCpuFeaturesSetting:
D5 30 60 C1 F0 0D 00 00
:SNC: Socket = 0, Processor = 28
SncConfigMsr = 0xA
SncBaseCsr [0x0] = 0xFFF0000
SncBaseCsr [0x1] = 0x1FE00022
SncBaseCsr [0x2] = 0x42
SncBaseCsr [0x3] = 0x62
SncBaseCsr [0x4] = 0x82
SncConfigCsr = 0xF
Dump final value for PcdCpuFeaturesSetting:
D5 30 60 C1 F0 0D 00 00
Dump final value for PcdCpuFeaturesSetting:
D5 30 60 C1 F0 0D 00 00
:SNC: Socket = 0, Processor = 30
SncConfigMsr = 0xA
SncBaseCsr [0x0] = 0xFFF0000
SncBaseCsr [0x1] = 0x1FE00022
SncBaseCsr [0x2] = 0x42
SncBaseCsr [0x3] = 0x62
SncBaseCsr [0x4] = 0x82
SncConfigCsr = 0xF
Dump final value for PcdCpuFeaturesSetting:
D5 30 60 C1 F0 0D 00 00
Dump final value for PcdCpuFeaturesSetting:
D5 30 60 C1 F0 0D 00 00
:SNC: Socket = 0, Processor = 32
SncConfigMsr = 0xA
SncBaseCsr [0x0] = 0xFFF0000
SncBaseCsr [0x1] = 0x1FE00022
SncBaseCsr [0x2] = 0x42
SncBaseCsr [0x3] = 0x62
SncBaseCsr [0x4] = 0x82
SncConfigCsr = 0xF
Dump final value for PcdCpuFeaturesSetting:
D5 30 60 C1 F0 0D 00 00
Dump final value for PcdCpuFeaturesSetting:
D5 30 60 C1 F0 0D 00 00
:SNC: Socket = 0, Processor = 34
SncConfigMsr = 0xA
SncBaseCsr [0x0] = 0xFFF0000
SncBaseCsr [0x1] = 0x1FE00022
SncBaseCsr [0x2] = 0x42
SncBaseCsr [0x3] = 0x62
SncBaseCsr [0x4] = 0x82
SncConfigCsr = 0xF
Dump final value for PcdCpuFeaturesSetting:
D5 30 60 C1 F0 0D 00 00
Dump final value for PcdCpuFeaturesSetting:
D5 30 60 C1 F0 0D 00 00
:SNC: Socket = 0, Processor = 36
SncConfigMsr = 0xA
SncBaseCsr [0x0] = 0xFFF0000
SncBaseCsr [0x1] = 0x1FE00022
SncBaseCsr [0x2] = 0x42
SncBaseCsr [0x3] = 0x62
SncBaseCsr [0x4] = 0x82
SncConfigCsr = 0xF
Dump final value for PcdCpuFeaturesSetting:
D5 30 60 C1 F0 0D 00 00
Dump final value for PcdCpuFeaturesSetting:
D5 30 60 C1 F0 0D 00 00
:SNC: Socket = 0, Processor = 38
SncConfigMsr = 0xA
SncBaseCsr [0x0] = 0xFFF0000
SncBaseCsr [0x1] = 0x1FE00022
SncBaseCsr [0x2] = 0x42
SncBaseCsr [0x3] = 0x62
SncBaseCsr [0x4] = 0x82
SncConfigCsr = 0xF
Dump final value for PcdCpuFeaturesSetting:
D5 30 60 C1 F0 0D 00 00
Dump final value for PcdCpuFeaturesSetting:
D5 30 60 C1 F0 0D 00 00
:SNC: Socket = 0, Processor = 40
SncConfigMsr = 0xA
SncBaseCsr [0x0] = 0xFFF0000
SncBaseCsr [0x1] = 0x1FE00022
SncBaseCsr [0x2] = 0x42
SncBaseCsr [0x3] = 0x62
SncBaseCsr [0x4] = 0x82
SncConfigCsr = 0xF
Dump final value for PcdCpuFeaturesSetting:
D5 30 60 C1 F0 0D 00 00
Dump final value for PcdCpuFeaturesSetting:
D5 30 60 C1 F0 0D 00 00
:SNC: Socket = 0, Processor = 42
SncConfigMsr = 0xA
SncBaseCsr [0x0] = 0xFFF0000
SncBaseCsr [0x1] = 0x1FE00022
SncBaseCsr [0x2] = 0x42
SncBaseCsr [0x3] = 0x62
SncBaseCsr [0x4] = 0x82
SncConfigCsr = 0xF
Dump final value for PcdCpuFeaturesSetting:
D5 30 60 C1 F0 0D 00 00
Dump final value for PcdCpuFeaturesSetting:
D5 30 60 C1 F0 0D 00 00
:SNC: Socket = 0, Processor = 44
SncConfigMsr = 0xA
SncBaseCsr [0x0] = 0xFFF0000
SncBaseCsr [0x1] = 0x1FE00022
SncBaseCsr [0x2] = 0x42
SncBaseCsr [0x3] = 0x62
SncBaseCsr [0x4] = 0x82
SncConfigCsr = 0xF
Dump final value for PcdCpuFeaturesSetting:
D5 30 60 C1 F0 0D 00 00
Dump final value for PcdCpuFeaturesSetting:
D5 30 60 C1 F0 0D 00 00
:SNC: Socket = 0, Processor = 46
SncConfigMsr = 0xA
SncBaseCsr [0x0] = 0xFFF0000
SncBaseCsr [0x1] = 0x1FE00022
SncBaseCsr [0x2] = 0x42
SncBaseCsr [0x3] = 0x62
SncBaseCsr [0x4] = 0x82
SncConfigCsr = 0xF
Dump final value for PcdCpuFeaturesSetting:
D5 30 60 C1 F0 0D 00 00
Dump final value for PcdCpuFeaturesSetting:
D5 30 60 C1 F0 0D 00 00
:SNC: Socket = 0, Processor = 48
SncConfigMsr = 0xA
SncBaseCsr [0x0] = 0xFFF0000
SncBaseCsr [0x1] = 0x1FE00022
SncBaseCsr [0x2] = 0x42
SncBaseCsr [0x3] = 0x62
SncBaseCsr [0x4] = 0x82
SncConfigCsr = 0xF
Dump final value for PcdCpuFeaturesSetting:
D5 30 60 C1 F0 0D 00 00
Dump final value for PcdCpuFeaturesSetting:
D5 30 60 C1 F0 0D 00 00
:SNC: Socket = 0, Processor = 50
SncConfigMsr = 0xA
SncBaseCsr [0x0] = 0xFFF0000
SncBaseCsr [0x1] = 0x1FE00022
SncBaseCsr [0x2] = 0x42
SncBaseCsr [0x3] = 0x62
SncBaseCsr [0x4] = 0x82
SncConfigCsr = 0xF
Dump final value for PcdCpuFeaturesSetting:
D5 30 60 C1 F0 0D 00 00
Dump final value for PcdCpuFeaturesSetting:
D5 30 60 C1 F0 0D 00 00
:SNC: Socket = 0, Processor = 52
SncConfigMsr = 0xA
SncBaseCsr [0x0] = 0xFFF0000
SncBaseCsr [0x1] = 0x1FE00022
SncBaseCsr [0x2] = 0x42
SncBaseCsr [0x3] = 0x62
SncBaseCsr [0x4] = 0x82
SncConfigCsr = 0xF
Dump final value for PcdCpuFeaturesSetting:
D5 30 60 C1 F0 0D 00 00
Dump final value for PcdCpuFeaturesSetting:
D5 30 60 C1 F0 0D 00 00
:SNC: Socket = 0, Processor = 54
SncConfigMsr = 0xA
SncBaseCsr [0x0] = 0xFFF0000
SncBaseCsr [0x1] = 0x1FE00022
SncBaseCsr [0x2] = 0x42
SncBaseCsr [0x3] = 0x62
SncBaseCsr [0x4] = 0x82
SncConfigCsr = 0xF
Dump final value for PcdCpuFeaturesSetting:
D5 30 60 C1 F0 0D 00 00
Dump final value for PcdCpuFeaturesSetting:
D5 30 60 C1 F0 0D 00 00
:SNC: Socket = 0, Processor = 56
SncConfigMsr = 0xA
SncBaseCsr [0x0] = 0xFFF0000
SncBaseCsr [0x1] = 0x1FE00022
SncBaseCsr [0x2] = 0x42
SncBaseCsr [0x3] = 0x62
SncBaseCsr [0x4] = 0x82
SncConfigCsr = 0xF
Dump final value for PcdCpuFeaturesSetting:
D5 30 60 C1 F0 0D 00 00
Dump final value for PcdCpuFeaturesSetting:
D5 30 60 C1 F0 0D 00 00
:SNC: Socket = 0, Processor = 58
SncConfigMsr = 0xA
SncBaseCsr [0x0] = 0xFFF0000
SncBaseCsr [0x1] = 0x1FE00022
SncBaseCsr [0x2] = 0x42
SncBaseCsr [0x3] = 0x62
SncBaseCsr [0x4] = 0x82
SncConfigCsr = 0xF
Dump final value for PcdCpuFeaturesSetting:
D5 30 60 C1 F0 0D 00 00
Dump final value for PcdCpuFeaturesSetting:
D5 30 60 C1 F0 0D 00 00
:SNC: Socket = 0, Processor = 60
SncConfigMsr = 0xA
SncBaseCsr [0x0] = 0xFFF0000
SncBaseCsr [0x1] = 0x1FE00022
SncBaseCsr [0x2] = 0x42
SncBaseCsr [0x3] = 0x62
SncBaseCsr [0x4] = 0x82
SncConfigCsr = 0xF
Dump final value for PcdCpuFeaturesSetting:
D5 30 60 C1 F0 0D 00 00
Dump final value for PcdCpuFeaturesSetting:
D5 30 60 C1 F0 0D 00 00
:SNC: Socket = 0, Processor = 62
SncConfigMsr = 0xA
SncBaseCsr [0x0] = 0xFFF0000
SncBaseCsr [0x1] = 0x1FE00022
SncBaseCsr [0x2] = 0x42
SncBaseCsr [0x3] = 0x62
SncBaseCsr [0x4] = 0x82
SncConfigCsr = 0xF
Dump final value for PcdCpuFeaturesSetting:
D5 30 60 C1 F0 0D 00 00
Dump final value for PcdCpuFeaturesSetting:
D5 30 60 C1 F0 0D 00 00
:SNC: Socket = 0, Processor = 64
SncConfigMsr = 0xA
SncBaseCsr [0x0] = 0xFFF0000
SncBaseCsr [0x1] = 0x1FE00022
SncBaseCsr [0x2] = 0x42
SncBaseCsr [0x3] = 0x62
SncBaseCsr [0x4] = 0x82
SncConfigCsr = 0xF
Dump final value for PcdCpuFeaturesSetting:
D5 30 60 C1 F0 0D 00 00
Dump final value for PcdCpuFeaturesSetting:
D5 30 60 C1 F0 0D 00 00
:SNC: Socket = 0, Processor = 66
SncConfigMsr = 0xA
SncBaseCsr [0x0] = 0xFFF0000
SncBaseCsr [0x1] = 0x1FE00022
SncBaseCsr [0x2] = 0x42
SncBaseCsr [0x3] = 0x62
SncBaseCsr [0x4] = 0x82
SncConfigCsr = 0xF
Dump final value for PcdCpuFeaturesSetting:
D5 30 60 C1 F0 0D 00 00
Dump final value for PcdCpuFeaturesSetting:
D5 30 60 C1 F0 0D 00 00
:SNC: Socket = 0, Processor = 68
SncConfigMsr = 0xA
SncBaseCsr [0x0] = 0xFFF0000
SncBaseCsr [0x1] = 0x1FE00022
SncBaseCsr [0x2] = 0x42
SncBaseCsr [0x3] = 0x62
SncBaseCsr [0x4] = 0x82
SncConfigCsr = 0xF
Dump final value for PcdCpuFeaturesSetting:
D5 30 60 C1 F0 0D 00 00
Dump final value for PcdCpuFeaturesSetting:
D5 30 60 C1 F0 0D 00 00
:SNC: Socket = 0, Processor = 70
SncConfigMsr = 0xA
SncBaseCsr [0x0] = 0xFFF0000
SncBaseCsr [0x1] = 0x1FE00022
SncBaseCsr [0x2] = 0x42
SncBaseCsr [0x3] = 0x62
SncBaseCsr [0x4] = 0x82
SncConfigCsr = 0xF
Dump final value for PcdCpuFeaturesSetting:
D5 30 60 C1 F0 0D 00 00
Dump final value for PcdCpuFeaturesSetting:
D5 30 60 C1 F0 0D 00 00
:SNC: Socket = 0, Processor = 72
SncConfigMsr = 0xA
SncBaseCsr [0x0] = 0xFFF0000
SncBaseCsr [0x1] = 0x1FE00022
SncBaseCsr [0x2] = 0x42
SncBaseCsr [0x3] = 0x62
SncBaseCsr [0x4] = 0x82
SncConfigCsr = 0xF
Dump final value for PcdCpuFeaturesSetting:
D5 30 60 C1 F0 0D 00 00
Dump final value for PcdCpuFeaturesSetting:
D5 30 60 C1 F0 0D 00 00
:SNC: Socket = 0, Processor = 74
SncConfigMsr = 0xA
SncBaseCsr [0x0] = 0xFFF0000
SncBaseCsr [0x1] = 0x1FE00022
SncBaseCsr [0x2] = 0x42
SncBaseCsr [0x3] = 0x62
SncBaseCsr [0x4] = 0x82
SncConfigCsr = 0xF
Dump final value for PcdCpuFeaturesSetting:
D5 30 60 C1 F0 0D 00 00
Dump final value for PcdCpuFeaturesSetting:
D5 30 60 C1 F0 0D 00 00
:SNC: Socket = 0, Processor = 76
SncConfigMsr = 0xA
SncBaseCsr [0x0] = 0xFFF0000
SncBaseCsr [0x1] = 0x1FE00022
SncBaseCsr [0x2] = 0x42
SncBaseCsr [0x3] = 0x62
SncBaseCsr [0x4] = 0x82
SncConfigCsr = 0xF
Dump final value for PcdCpuFeaturesSetting:
D5 30 60 C1 F0 0D 00 00
Dump final value for PcdCpuFeaturesSetting:
D5 30 60 C1 F0 0D 00 00
:SNC: Socket = 0, Processor = 78
SncConfigMsr = 0xA
SncBaseCsr [0x0] = 0xFFF0000
SncBaseCsr [0x1] = 0x1FE00022
SncBaseCsr [0x2] = 0x42
SncBaseCsr [0x3] = 0x62
SncBaseCsr [0x4] = 0x82
SncConfigCsr = 0xF
Dump final value for PcdCpuFeaturesSetting:
D5 30 60 C1 F0 0D 00 00
Dump final value for PcdCpuFeaturesSetting:
D5 30 60 C1 F0 0D 00 00
:SNC: Socket = 1, Processor = 80
SncConfigMsr = 0xA
SncBaseCsr [0x0] = 0xFFF0082
SncBaseCsr [0x1] = 0x1FE000A2
SncBaseCsr [0x2] = 0xC2
SncBaseCsr [0x3] = 0xE2
SncBaseCsr [0x4] = 0x102
SncConfigCsr = 0xF
:MBM: S1 Processor = 80, LlcQosMonEnable = 1
ChasPerCluster = 13, ChaThresholdWithinCluster = 12, CorrectionFactorHi = 123 CorrectionFactorLo = 98
Dump final value for PcdCpuFeaturesSetting:
D5 30 60 C1 F0 0D 00 00
Dump final value for PcdCpuFeaturesSetting:
D5 30 60 C1 F0 0D 00 00
:SNC: Socket = 1, Processor = 82
SncConfigMsr = 0xA
SncBaseCsr [0x0] = 0xFFF0082
SncBaseCsr [0x1] = 0x1FE000A2
SncBaseCsr [0x2] = 0xC2
SncBaseCsr [0x3] = 0xE2
SncBaseCsr [0x4] = 0x102
SncConfigCsr = 0xF
Dump final value for PcdCpuFeaturesSetting:
D5 30 60 C1 F0 0D 00 00
Dump final value for PcdCpuFeaturesSetting:
D5 30 60 C1 F0 0D 00 00
:SNC: Socket = 1, Processor = 84
SncConfigMsr = 0xA
SncBaseCsr [0x0] = 0xFFF0082
SncBaseCsr [0x1] = 0x1FE000A2
SncBaseCsr [0x2] = 0xC2
SncBaseCsr [0x3] = 0xE2
SncBaseCsr [0x4] = 0x102
SncConfigCsr = 0xF
Dump final value for PcdCpuFeaturesSetting:
D5 30 60 C1 F0 0D 00 00
Dump final value for PcdCpuFeaturesSetting:
D5 30 60 C1 F0 0D 00 00
:SNC: Socket = 1, Processor = 86
SncConfigMsr = 0xA
SncBaseCsr [0x0] = 0xFFF0082
SncBaseCsr [0x1] = 0x1FE000A2
SncBaseCsr [0x2] = 0xC2
SncBaseCsr [0x3] = 0xE2
SncBaseCsr [0x4] = 0x102
SncConfigCsr = 0xF
Dump final value for PcdCpuFeaturesSetting:
D5 30 60 C1 F0 0D 00 00
Dump final value for PcdCpuFeaturesSetting:
D5 30 60 C1 F0 0D 00 00
:SNC: Socket = 1, Processor = 88
SncConfigMsr = 0xA
SncBaseCsr [0x0] = 0xFFF0082
SncBaseCsr [0x1] = 0x1FE000A2
SncBaseCsr [0x2] = 0xC2
SncBaseCsr [0x3] = 0xE2
SncBaseCsr [0x4] = 0x102
SncConfigCsr = 0xF
Dump final value for PcdCpuFeaturesSetting:
D5 30 60 C1 F0 0D 00 00
Dump final value for PcdCpuFeaturesSetting:
D5 30 60 C1 F0 0D 00 00
:SNC: Socket = 1, Processor = 90
SncConfigMsr = 0xA
SncBaseCsr [0x0] = 0xFFF0082
SncBaseCsr [0x1] = 0x1FE000A2
SncBaseCsr [0x2] = 0xC2
SncBaseCsr [0x3] = 0xE2
SncBaseCsr [0x4] = 0x102
SncConfigCsr = 0xF
Dump final value for PcdCpuFeaturesSetting:
D5 30 60 C1 F0 0D 00 00
Dump final value for PcdCpuFeaturesSetting:
D5 30 60 C1 F0 0D 00 00
:SNC: Socket = 1, Processor = 92
SncConfigMsr = 0xA
SncBaseCsr [0x0] = 0xFFF0082
SncBaseCsr [0x1] = 0x1FE000A2
SncBaseCsr [0x2] = 0xC2
SncBaseCsr [0x3] = 0xE2
SncBaseCsr [0x4] = 0x102
SncConfigCsr = 0xF
Dump final value for PcdCpuFeaturesSetting:
D5 30 60 C1 F0 0D 00 00
Dump final value for PcdCpuFeaturesSetting:
D5 30 60 C1 F0 0D 00 00
:SNC: Socket = 1, Processor = 94
SncConfigMsr = 0xA
SncBaseCsr [0x0] = 0xFFF0082
SncBaseCsr [0x1] = 0x1FE000A2
SncBaseCsr [0x2] = 0xC2
SncBaseCsr [0x3] = 0xE2
SncBaseCsr [0x4] = 0x102
SncConfigCsr = 0xF
Dump final value for PcdCpuFeaturesSetting:
D5 30 60 C1 F0 0D 00 00
Dump final value for PcdCpuFeaturesSetting:
D5 30 60 C1 F0 0D 00 00
:SNC: Socket = 1, Processor = 96
SncConfigMsr = 0xA
SncBaseCsr [0x0] = 0xFFF0082
SncBaseCsr [0x1] = 0x1FE000A2
SncBaseCsr [0x2] = 0xC2
SncBaseCsr [0x3] = 0xE2
SncBaseCsr [0x4] = 0x102
SncConfigCsr = 0xF
Dump final value for PcdCpuFeaturesSetting:
D5 30 60 C1 F0 0D 00 00
Dump final value for PcdCpuFeaturesSetting:
D5 30 60 C1 F0 0D 00 00
:SNC: Socket = 1, Processor = 98
SncConfigMsr = 0xA
SncBaseCsr [0x0] = 0xFFF0082
SncBaseCsr [0x1] = 0x1FE000A2
SncBaseCsr [0x2] = 0xC2
SncBaseCsr [0x3] = 0xE2
SncBaseCsr [0x4] = 0x102
SncConfigCsr = 0xF
Dump final value for PcdCpuFeaturesSetting:
D5 30 60 C1 F0 0D 00 00
Dump final value for PcdCpuFeaturesSetting:
D5 30 60 C1 F0 0D 00 00
:SNC: Socket = 1, Processor = 100
SncConfigMsr = 0xA
SncBaseCsr [0x0] = 0xFFF0082
SncBaseCsr [0x1] = 0x1FE000A2
SncBaseCsr [0x2] = 0xC2
SncBaseCsr [0x3] = 0xE2
SncBaseCsr [0x4] = 0x102
SncConfigCsr = 0xF
Dump final value for PcdCpuFeaturesSetting:
D5 30 60 C1 F0 0D 00 00
Dump final value for PcdCpuFeaturesSetting:
D5 30 60 C1 F0 0D 00 00
:SNC: Socket = 1, Processor = 102
SncConfigMsr = 0xA
SncBaseCsr [0x0] = 0xFFF0082
SncBaseCsr [0x1] = 0x1FE000A2
SncBaseCsr [0x2] = 0xC2
SncBaseCsr [0x3] = 0xE2
SncBaseCsr [0x4] = 0x102
SncConfigCsr = 0xF
Dump final value for PcdCpuFeaturesSetting:
D5 30 60 C1 F0 0D 00 00
Dump final value for PcdCpuFeaturesSetting:
D5 30 60 C1 F0 0D 00 00
:SNC: Socket = 1, Processor = 104
SncConfigMsr = 0xA
SncBaseCsr [0x0] = 0xFFF0082
SncBaseCsr [0x1] = 0x1FE000A2
SncBaseCsr [0x2] = 0xC2
SncBaseCsr [0x3] = 0xE2
SncBaseCsr [0x4] = 0x102
SncConfigCsr = 0xF
Dump final value for PcdCpuFeaturesSetting:
D5 30 60 C1 F0 0D 00 00
Dump final value for PcdCpuFeaturesSetting:
D5 30 60 C1 F0 0D 00 00
:SNC: Socket = 1, Processor = 106
SncConfigMsr = 0xA
SncBaseCsr [0x0] = 0xFFF0082
SncBaseCsr [0x1] = 0x1FE000A2
SncBaseCsr [0x2] = 0xC2
SncBaseCsr [0x3] = 0xE2
SncBaseCsr [0x4] = 0x102
SncConfigCsr = 0xF
Dump final value for PcdCpuFeaturesSetting:
D5 30 60 C1 F0 0D 00 00
Dump final value for PcdCpuFeaturesSetting:
D5 30 60 C1 F0 0D 00 00
:SNC: Socket = 1, Processor = 108
SncConfigMsr = 0xA
SncBaseCsr [0x0] = 0xFFF0082
SncBaseCsr [0x1] = 0x1FE000A2
SncBaseCsr [0x2] = 0xC2
SncBaseCsr [0x3] = 0xE2
SncBaseCsr [0x4] = 0x102
SncConfigCsr = 0xF
Dump final value for PcdCpuFeaturesSetting:
D5 30 60 C1 F0 0D 00 00
Dump final value for PcdCpuFeaturesSetting:
D5 30 60 C1 F0 0D 00 00
:SNC: Socket = 1, Processor = 110
SncConfigMsr = 0xA
SncBaseCsr [0x0] = 0xFFF0082
SncBaseCsr [0x1] = 0x1FE000A2
SncBaseCsr [0x2] = 0xC2
SncBaseCsr [0x3] = 0xE2
SncBaseCsr [0x4] = 0x102
SncConfigCsr = 0xF
Dump final value for PcdCpuFeaturesSetting:
D5 30 60 C1 F0 0D 00 00
Dump final value for PcdCpuFeaturesSetting:
D5 30 60 C1 F0 0D 00 00
:SNC: Socket = 1, Processor = 112
SncConfigMsr = 0xA
SncBaseCsr [0x0] = 0xFFF0082
SncBaseCsr [0x1] = 0x1FE000A2
SncBaseCsr [0x2] = 0xC2
SncBaseCsr [0x3] = 0xE2
SncBaseCsr [0x4] = 0x102
SncConfigCsr = 0xF
Dump final value for PcdCpuFeaturesSetting:
D5 30 60 C1 F0 0D 00 00
Dump final value for PcdCpuFeaturesSetting:
D5 30 60 C1 F0 0D 00 00
:SNC: Socket = 1, Processor = 114
SncConfigMsr = 0xA
SncBaseCsr [0x0] = 0xFFF0082
SncBaseCsr [0x1] = 0x1FE000A2
SncBaseCsr [0x2] = 0xC2
SncBaseCsr [0x3] = 0xE2
SncBaseCsr [0x4] = 0x102
SncConfigCsr = 0xF
Dump final value for PcdCpuFeaturesSetting:
D5 30 60 C1 F0 0D 00 00
Dump final value for PcdCpuFeaturesSetting:
D5 30 60 C1 F0 0D 00 00
:SNC: Socket = 1, Processor = 116
SncConfigMsr = 0xA
SncBaseCsr [0x0] = 0xFFF0082
SncBaseCsr [0x1] = 0x1FE000A2
SncBaseCsr [0x2] = 0xC2
SncBaseCsr [0x3] = 0xE2
SncBaseCsr [0x4] = 0x102
SncConfigCsr = 0xF
Dump final value for PcdCpuFeaturesSetting:
D5 30 60 C1 F0 0D 00 00
Dump final value for PcdCpuFeaturesSetting:
D5 30 60 C1 F0 0D 00 00
:SNC: Socket = 1, Processor = 118
SncConfigMsr = 0xA
SncBaseCsr [0x0] = 0xFFF0082
SncBaseCsr [0x1] = 0x1FE000A2
SncBaseCsr [0x2] = 0xC2
SncBaseCsr [0x3] = 0xE2
SncBaseCsr [0x4] = 0x102
SncConfigCsr = 0xF
Dump final value for PcdCpuFeaturesSetting:
D5 30 60 C1 F0 0D 00 00
Dump final value for PcdCpuFeaturesSetting:
D5 30 60 C1 F0 0D 00 00
:SNC: Socket = 1, Processor = 120
SncConfigMsr = 0xA
SncBaseCsr [0x0] = 0xFFF0082
SncBaseCsr [0x1] = 0x1FE000A2
SncBaseCsr [0x2] = 0xC2
SncBaseCsr [0x3] = 0xE2
SncBaseCsr [0x4] = 0x102
SncConfigCsr = 0xF
Dump final value for PcdCpuFeaturesSetting:
D5 30 60 C1 F0 0D 00 00
Dump final value for PcdCpuFeaturesSetting:
D5 30 60 C1 F0 0D 00 00
:SNC: Socket = 1, Processor = 122
SncConfigMsr = 0xA
SncBaseCsr [0x0] = 0xFFF0082
SncBaseCsr [0x1] = 0x1FE000A2
SncBaseCsr [0x2] = 0xC2
SncBaseCsr [0x3] = 0xE2
SncBaseCsr [0x4] = 0x102
SncConfigCsr = 0xF
Dump final value for PcdCpuFeaturesSetting:
D5 30 60 C1 F0 0D 00 00
Dump final value for PcdCpuFeaturesSetting:
D5 30 60 C1 F0 0D 00 00
:SNC: Socket = 1, Processor = 124
SncConfigMsr = 0xA
SncBaseCsr [0x0] = 0xFFF0082
SncBaseCsr [0x1] = 0x1FE000A2
SncBaseCsr [0x2] = 0xC2
SncBaseCsr [0x3] = 0xE2
SncBaseCsr [0x4] = 0x102
SncConfigCsr = 0xF
Dump final value for PcdCpuFeaturesSetting:
D5 30 60 C1 F0 0D 00 00
Dump final value for PcdCpuFeaturesSetting:
D5 30 60 C1 F0 0D 00 00
:SNC: Socket = 1, Processor = 126
SncConfigMsr = 0xA
SncBaseCsr [0x0] = 0xFFF0082
SncBaseCsr [0x1] = 0x1FE000A2
SncBaseCsr [0x2] = 0xC2
SncBaseCsr [0x3] = 0xE2
SncBaseCsr [0x4] = 0x102
SncConfigCsr = 0xF
Dump final value for PcdCpuFeaturesSetting:
D5 30 60 C1 F0 0D 00 00
Dump final value for PcdCpuFeaturesSetting:
D5 30 60 C1 F0 0D 00 00
:SNC: Socket = 1, Processor = 128
SncConfigMsr = 0xA
SncBaseCsr [0x0] = 0xFFF0082
SncBaseCsr [0x1] = 0x1FE000A2
SncBaseCsr [0x2] = 0xC2
SncBaseCsr [0x3] = 0xE2
SncBaseCsr [0x4] = 0x102
SncConfigCsr = 0xF
Dump final value for PcdCpuFeaturesSetting:
D5 30 60 C1 F0 0D 00 00
Dump final value for PcdCpuFeaturesSetting:
D5 30 60 C1 F0 0D 00 00
:SNC: Socket = 1, Processor = 130
SncConfigMsr = 0xA
SncBaseCsr [0x0] = 0xFFF0082
SncBaseCsr [0x1] = 0x1FE000A2
SncBaseCsr [0x2] = 0xC2
SncBaseCsr [0x3] = 0xE2
SncBaseCsr [0x4] = 0x102
SncConfigCsr = 0xF
Dump final value for PcdCpuFeaturesSetting:
D5 30 60 C1 F0 0D 00 00
Dump final value for PcdCpuFeaturesSetting:
D5 30 60 C1 F0 0D 00 00
:SNC: Socket = 1, Processor = 132
SncConfigMsr = 0xA
SncBaseCsr [0x0] = 0xFFF0082
SncBaseCsr [0x1] = 0x1FE000A2
SncBaseCsr [0x2] = 0xC2
SncBaseCsr [0x3] = 0xE2
SncBaseCsr [0x4] = 0x102
SncConfigCsr = 0xF
Dump final value for PcdCpuFeaturesSetting:
D5 30 60 C1 F0 0D 00 00
Dump final value for PcdCpuFeaturesSetting:
D5 30 60 C1 F0 0D 00 00
:SNC: Socket = 1, Processor = 134
SncConfigMsr = 0xA
SncBaseCsr [0x0] = 0xFFF0082
SncBaseCsr [0x1] = 0x1FE000A2
SncBaseCsr [0x2] = 0xC2
SncBaseCsr [0x3] = 0xE2
SncBaseCsr [0x4] = 0x102
SncConfigCsr = 0xF
Dump final value for PcdCpuFeaturesSetting:
D5 30 60 C1 F0 0D 00 00
Dump final value for PcdCpuFeaturesSetting:
D5 30 60 C1 F0 0D 00 00
:SNC: Socket = 1, Processor = 136
SncConfigMsr = 0xA
SncBaseCsr [0x0] = 0xFFF0082
SncBaseCsr [0x1] = 0x1FE000A2
SncBaseCsr [0x2] = 0xC2
SncBaseCsr [0x3] = 0xE2
SncBaseCsr [0x4] = 0x102
SncConfigCsr = 0xF
Dump final value for PcdCpuFeaturesSetting:
D5 30 60 C1 F0 0D 00 00
Dump final value for PcdCpuFeaturesSetting:
D5 30 60 C1 F0 0D 00 00
:SNC: Socket = 1, Processor = 138
SncConfigMsr = 0xA
SncBaseCsr [0x0] = 0xFFF0082
SncBaseCsr [0x1] = 0x1FE000A2
SncBaseCsr [0x2] = 0xC2
SncBaseCsr [0x3] = 0xE2
SncBaseCsr [0x4] = 0x102
SncConfigCsr = 0xF
Dump final value for PcdCpuFeaturesSetting:
D5 30 60 C1 F0 0D 00 00
Dump final value for PcdCpuFeaturesSetting:
D5 30 60 C1 F0 0D 00 00
:SNC: Socket = 1, Processor = 140
SncConfigMsr = 0xA
SncBaseCsr [0x0] = 0xFFF0082
SncBaseCsr [0x1] = 0x1FE000A2
SncBaseCsr [0x2] = 0xC2
SncBaseCsr [0x3] = 0xE2
SncBaseCsr [0x4] = 0x102
SncConfigCsr = 0xF
Dump final value for PcdCpuFeaturesSetting:
D5 30 60 C1 F0 0D 00 00
Dump final value for PcdCpuFeaturesSetting:
D5 30 60 C1 F0 0D 00 00
:SNC: Socket = 1, Processor = 142
SncConfigMsr = 0xA
SncBaseCsr [0x0] = 0xFFF0082
SncBaseCsr [0x1] = 0x1FE000A2
SncBaseCsr [0x2] = 0xC2
SncBaseCsr [0x3] = 0xE2
SncBaseCsr [0x4] = 0x102
SncConfigCsr = 0xF
Dump final value for PcdCpuFeaturesSetting:
D5 30 60 C1 F0 0D 00 00
Dump final value for PcdCpuFeaturesSetting:
D5 30 60 C1 F0 0D 00 00
:SNC: Socket = 1, Processor = 144
SncConfigMsr = 0xA
SncBaseCsr [0x0] = 0xFFF0082
SncBaseCsr [0x1] = 0x1FE000A2
SncBaseCsr [0x2] = 0xC2
SncBaseCsr [0x3] = 0xE2
SncBaseCsr [0x4] = 0x102
SncConfigCsr = 0xF
Dump final value for PcdCpuFeaturesSetting:
D5 30 60 C1 F0 0D 00 00
Dump final value for PcdCpuFeaturesSetting:
D5 30 60 C1 F0 0D 00 00
:SNC: Socket = 1, Processor = 146
SncConfigMsr = 0xA
SncBaseCsr [0x0] = 0xFFF0082
SncBaseCsr [0x1] = 0x1FE000A2
SncBaseCsr [0x2] = 0xC2
SncBaseCsr [0x3] = 0xE2
SncBaseCsr [0x4] = 0x102
SncConfigCsr = 0xF
Dump final value for PcdCpuFeaturesSetting:
D5 30 60 C1 F0 0D 00 00
Dump final value for PcdCpuFeaturesSetting:
D5 30 60 C1 F0 0D 00 00
:SNC: Socket = 1, Processor = 148
SncConfigMsr = 0xA
SncBaseCsr [0x0] = 0xFFF0082
SncBaseCsr [0x1] = 0x1FE000A2
SncBaseCsr [0x2] = 0xC2
SncBaseCsr [0x3] = 0xE2
SncBaseCsr [0x4] = 0x102
SncConfigCsr = 0xF
Dump final value for PcdCpuFeaturesSetting:
D5 30 60 C1 F0 0D 00 00
Dump final value for PcdCpuFeaturesSetting:
D5 30 60 C1 F0 0D 00 00
:SNC: Socket = 1, Processor = 150
SncConfigMsr = 0xA
SncBaseCsr [0x0] = 0xFFF0082
SncBaseCsr [0x1] = 0x1FE000A2
SncBaseCsr [0x2] = 0xC2
SncBaseCsr [0x3] = 0xE2
SncBaseCsr [0x4] = 0x102
SncConfigCsr = 0xF
Dump final value for PcdCpuFeaturesSetting:
D5 30 60 C1 F0 0D 00 00
Dump final value for PcdCpuFeaturesSetting:
D5 30 60 C1 F0 0D 00 00
:SNC: Socket = 1, Processor = 152
SncConfigMsr = 0xA
SncBaseCsr [0x0] = 0xFFF0082
SncBaseCsr [0x1] = 0x1FE000A2
SncBaseCsr [0x2] = 0xC2
SncBaseCsr [0x3] = 0xE2
SncBaseCsr [0x4] = 0x102
SncConfigCsr = 0xF
Dump final value for PcdCpuFeaturesSetting:
D5 30 60 C1 F0 0D 00 00
Dump final value for PcdCpuFeaturesSetting:
D5 30 60 C1 F0 0D 00 00
:SNC: Socket = 1, Processor = 154
SncConfigMsr = 0xA
SncBaseCsr [0x0] = 0xFFF0082
SncBaseCsr [0x1] = 0x1FE000A2
SncBaseCsr [0x2] = 0xC2
SncBaseCsr [0x3] = 0xE2
SncBaseCsr [0x4] = 0x102
SncConfigCsr = 0xF
Dump final value for PcdCpuFeaturesSetting:
D5 30 60 C1 F0 0D 00 00
Dump final value for PcdCpuFeaturesSetting:
D5 30 60 C1 F0 0D 00 00
:SNC: Socket = 1, Processor = 156
SncConfigMsr = 0xA
SncBaseCsr [0x0] = 0xFFF0082
SncBaseCsr [0x1] = 0x1FE000A2
SncBaseCsr [0x2] = 0xC2
SncBaseCsr [0x3] = 0xE2
SncBaseCsr [0x4] = 0x102
SncConfigCsr = 0xF
Dump final value for PcdCpuFeaturesSetting:
D5 30 60 C1 F0 0D 00 00
Dump final value for PcdCpuFeaturesSetting:
D5 30 60 C1 F0 0D 00 00
:SNC: Socket = 1, Processor = 158
SncConfigMsr = 0xA
SncBaseCsr [0x0] = 0xFFF0082
SncBaseCsr [0x1] = 0x1FE000A2
SncBaseCsr [0x2] = 0xC2
SncBaseCsr [0x3] = 0xE2
SncBaseCsr [0x4] = 0x102
SncConfigCsr = 0xF
Dump final value for PcdCpuFeaturesSetting:
D5 30 60 C1 F0 0D 00 00
Dump final value for PcdCpuFeaturesSetting:
D5 30 60 C1 F0 0D 00 00
PROGRESS CODE: V03020003 I0
PROGRESS CODE: V03020002 I0
This is VMB data Parse Pei
Locate PPI Status : 0
Get Variable Status : 0 CoreMegaBlock : 0
CoreMegaBlock [0x00000000]
SizeBelow1MB [0x00000000]
SizeAbove1MB [0x00000000]
SizeAbove4GB [0x00000000]
BaseBelow1MB [0x00050000]
BaseAbove1MB [0x00100000]
BaseAbove4GB [100000000]
VMBdataDiscovered Ppi installation status: 0
PROGRESS CODE: V03020003 I0
PROGRESS CODE: V03020002 I0
This is Validation Mega block Pei
Blocks Count : 3
MegaBlocks in PEIM ...
VMB[0] Attr[4]Addr[50000]Size[0]
VMB[1] Attr[4]Addr[100000]Size[0]
VMB[2] Attr[4]Addr[100000000]Size[0]
PROGRESS CODE: V03020003 I0
PROGRESS CODE: V03020002 I0
UbaInitPeim: PlatformType=0x16
UbaInitPeim: PlatformType=0x16
UbaInitPeim: PlatformType=0x16
PROGRESS CODE: V03020003 I0
PROGRESS CODE: V03020002 I0
PROGRESS CODE: V03020003 I0
PROGRESS CODE: V03020002 I0
PROGRESS CODE: V03020003 I0
PROGRESS CODE: V03020002 I0
Lt Disabled - Disabling BIOS lock
FiaMuxRecordsCount = 0
FiaMuxRecordsCount = 0
FiaMuxRecordsCount = 0
PROGRESS CODE: V03020003 I0
ME UMA PostMem: SendDramInitDone (): InitStat = 0
[HECI Transport-1 PEI] Send pkt: 80140007
00: F0 01 00 00 00 00 00 00 - 00 00 00 00 00 00 00 00
10: 00 00 00 00
[HECI Transport-1 PEI] Got pkt: 80240007
00: F0 81 00 00 00 00 00 00 - 00 00 00 00 00 00 00 00
10: 00 00 00 00 00 00 00 00 - 00 00 00 00 00 04 00 00
20: 00 00 00 00
ME UMA PostMem: BiosAction = 4
ME UMA PostMem: MeDramInitDone Complete. Checking for reset...
[HECI Transport-1 PEI] Send pkt: 80010020
00: 01
[HECI Transport-1 PEI] Got pkt: 800B0020
00: 81 01 01 1D 92 9F 33 01 - 00 00 00
[HECI Transport-1 PEI] Send pkt: 80140008
00: 00 00 05 00 1F 00 00 00 - 00 00 00 00 00 00 00 00
10: 00 00 00 00
[HECI Transport-1 PEI] Got pkt: 805E0008
00: 00 00 05 00 1F 00 00 00 - 00 00 00 00 4A 00 00 00
10: 00 00 00 00 18 18 06 00 - 00 06 00 01 06 00 02 06
20: 00 03 56 00 04 56 00 05 - 56 00 06 56 00 07 5C 00
30: 08 7C 00 09 55 00 0A 55 - 00 0B 5B 00 0C 55 00 0D
40: 51 00 0E 51 00 0F 47 00 - 10 07 00 11 47 00 12 07
50: 00 13 47 00 14 07 00 15 - 47 00 16 07 00 17
PeiFiaMuxConfigInit: IOExpanders number = 0
PeiFiaMuxConfigInit: Request ME FIA MUX configuration fail with status = Not Ready
[HECI Control-1 PEI][HECI Transport-1 PEI] Send pkt: 80010020
00: 01
[HECI Transport-1 PEI] Got pkt: 800B0020
00: 81 01 01 1D 92 9F 33 01 - 00 00 00
Detected I/O Expanders: 0
IoExpanderInit - End
SDI#0 has HD-Audio device.
SDI#1 has no HD-Audio device.
SDI#2 has no HD-Audio device.
PROGRESS CODE: V03020002 I0
PROGRESS CODE: V03020003 I0
PROGRESS CODE: V03020002 I0
PROGRESS CODE: V03020003 I0
PROGRESS CODE: V03020002 I0
PROGRESS CODE: V03020003 I0
PROGRESS CODE: V03020002 I0
NearTdpLockOcPeimEntryPoint
BootMode = 0
ProcessorLtsxEnable is disabled
PROGRESS CODE: V03020003 I0
PROGRESS CODE: V03020002 I0
PROGRESS CODE: V03020003 I0
PROGRESS CODE: V03020002 I0
PROGRESS CODE: V03020003 I0
PROGRESS CODE: V03020002 I0
[FRU_TDX] _ProgramSeamrr BEGIN
[IP_CORE_MSR] IpCoreMsr3v0_ProgramSeamrr BEGIN
_InternalProgramSeamrr (Unsupported) (0x000)
_InternalProgramSeamrr (Unsupported) (0x002)
_InternalProgramSeamrr (Unsupported) (0x004)
_InternalProgramSeamrr (Unsupported) (0x006)
_InternalProgramSeamrr (Unsupported) (0x008)
_InternalProgramSeamrr (Unsupported) (0x00A)
_InternalProgramSeamrr (Unsupported) (0x00C)
_InternalProgramSeamrr (Unsupported) (0x00E)
_InternalProgramSeamrr (Unsupported) (0x010)
_InternalProgramSeamrr (Unsupported) (0x012)
_InternalProgramSeamrr (Unsupported) (0x014)
_InternalProgramSeamrr (Unsupported) (0x016)
_InternalProgramSeamrr (Unsupported) (0x018)
_InternalProgramSeamrr (Unsupported) (0x01A)
_InternalProgramSeamrr (Unsupported) (0x01C)
_InternalProgramSeamrr (Unsupported) (0x01E)
_InternalProgramSeamrr (Unsupported) (0x020)
_InternalProgramSeamrr (Unsupported) (0x022)
_InternalProgramSeamrr (Unsupported) (0x024)
_InternalProgramSeamrr (Unsupported) (0x026)
_InternalProgramSeamrr (Unsupported) (0x028)
_InternalProgramSeamrr (Unsupported) (0x02A)
_InternalProgramSeamrr (Unsupported) (0x02C)
_InternalProgramSeamrr (Unsupported) (0x02E)
_InternalProgramSeamrr (Unsupported) (0x030)
_InternalProgramSeamrr (Unsupported) (0x032)
_InternalProgramSeamrr (Unsupported) (0x034)
_InternalProgramSeamrr (Unsupported) (0x036)
_InternalProgramSeamrr (Unsupported) (0x038)
_InternalProgramSeamrr (Unsupported) (0x03A)
_InternalProgramSeamrr (Unsupported) (0x03C)
_InternalProgramSeamrr (Unsupported) (0x03E)
_InternalProgramSeamrr (Unsupported) (0x040)
_InternalProgramSeamrr (Unsupported) (0x042)
_InternalProgramSeamrr (Unsupported) (0x044)
_InternalProgramSeamrr (Unsupported) (0x046)
_InternalProgramSeamrr (Unsupported) (0x048)
_InternalProgramSeamrr (Unsupported) (0x04A)
_InternalProgramSeamrr (Unsupported) (0x04C)
_InternalProgramSeamrr (Unsupported) (0x04E)
_InternalProgramSeamrr (Unsupported) (0x050)
_InternalProgramSeamrr (Unsupported) (0x052)
_InternalProgramSeamrr (Unsupported) (0x054)
_InternalProgramSeamrr (Unsupported) (0x056)
_InternalProgramSeamrr (Unsupported) (0x058)
_InternalProgramSeamrr (Unsupported) (0x05A)
_InternalProgramSeamrr (Unsupported) (0x05C)
_InternalProgramSeamrr (Unsupported) (0x05E)
_InternalProgramSeamrr (Unsupported) (0x060)
_InternalProgramSeamrr (Unsupported) (0x062)
_InternalProgramSeamrr (Unsupported) (0x064)
_InternalProgramSeamrr (Unsupported) (0x066)
_InternalProgramSeamrr (Unsupported) (0x068)
_InternalProgramSeamrr (Unsupported) (0x06A)
_InternalProgramSeamrr (Unsupported) (0x06C)
_InternalProgramSeamrr (Unsupported) (0x06E)
_InternalProgramSeamrr (Unsupported) (0x070)
_InternalProgramSeamrr (Unsupported) (0x072)
_InternalProgramSeamrr (Unsupported) (0x074)
_InternalProgramSeamrr (Unsupported) (0x076)
_InternalProgramSeamrr (Unsupported) (0x078)
_InternalProgramSeamrr (Unsupported) (0x07A)
_InternalProgramSeamrr (Unsupported) (0x07C)
_InternalProgramSeamrr (Unsupported) (0x07E)
_InternalProgramSeamrr (Unsupported) (0x080)
_InternalProgramSeamrr (Unsupported) (0x082)
_InternalProgramSeamrr (Unsupported) (0x084)
_InternalProgramSeamrr (Unsupported) (0x086)
_InternalProgramSeamrr (Unsupported) (0x088)
_InternalProgramSeamrr (Unsupported) (0x08A)
_InternalProgramSeamrr (Unsupported) (0x08C)
_InternalProgramSeamrr (Unsupported) (0x08E)
_InternalProgramSeamrr (Unsupported) (0x090)
_InternalProgramSeamrr (Unsupported) (0x092)
_InternalProgramSeamrr (Unsupported) (0x094)
_InternalProgramSeamrr (Unsupported) (0x096)
_InternalProgramSeamrr (Unsupported) (0x098)
_InternalProgramSeamrr (Unsupported) (0x09A)
_InternalProgramSeamrr (Unsupported) (0x09C)
_InternalProgramSeamrr (Unsupported) (0x09E)
[IP_CORE_MSR] IpCoreMsr3v0_ProgramSeamrr END, Unsupported
[FRU_TDX] _ProgramSeamrr END (Unsupported)PROGRESS CODE: V03020003 I0
PROGRESS CODE: V03020002 I0
PROGRESS CODE: V03020003 I0
PROGRESS CODE: V03021001 I0
[SIO] Current system SIO exist bit:10
PROGRESS CODE: V03040003 I0
PDB = c:\efi\servergen2\intel\Build\EagleStreamRpPkg\DEBUG_VS2015x86\X64\ServerPlatformPkg\Universal\TraceHubStatusCodeHandler\RuntimeDxe\TraceHubStatusCodeHandlerRuntimeDxe\DEBUG\TraceHubStatusCodeHandlerRuntimeDxe.pdb
PROGRESS CODE: V03040002 I0
PROGRESS CODE: V03040003 I0
PDB = c:\efi\servergen2\intel\Build\EagleStreamRpPkg\DEBUG_VS2015x86\X64\ServerPlatformPkg\Universal\StatusCodeHandlerUsb\RuntimeDxe\StatusCodeHandlerRuntimeDxeUsb\DEBUG\StatusCodeHandlerRuntimeDxeUsb.pdb
PROGRESS CODE: V03040002 I0
PROGRESS CODE: V03040003 I0
PDB = c:\efi\servergen2\intel\Build\EagleStreamRpPkg\DEBUG_VS2015x86\X64\MdeModulePkg\Universal\Acpi\FirmwarePerformanceDataTableDxe\FirmwarePerformanceDxe\DEBUG\FirmwarePerformanceDxe.pdb
PROGRESS CODE: V03040002 I0
PROGRESS CODE: V03040003 I0
PDB = c:\efi\servergen2\intel\Build\EagleStreamRpPkg\DEBUG_VS2015x86\X64\ShellPkg\DynamicCommand\DpDynamicCommand\DpDynamicCommand\DEBUG\dpDynamicCommand.pdb
PROGRESS CODE: V03040002 I0
PROGRESS CODE: V03040003 I0
PDB = c:\efi\servergen2\intel\Build\EagleStreamRpPkg\DEBUG_VS2015x86\X64\EagleStreamOpenBoardPkg\Uba\BoardInit\Dxe\BoardInitDxe\DEBUG\BoardInitDxe.pdb
PROGRESS CODE: V03040002 I0
PROGRESS CODE: V03040003 I0
PDB = c:\efi\servergen2\intel\Build\EagleStreamRpPkg\DEBUG_VS2015x86\X64\EagleStreamRpPkg\Platform\Dxe\IioCxl2CedtDevIou\IioCxl2SsdtInstallDxe\DEBUG\IioCxl2SsdtInstallDxe.pdb
PROGRESS CODE: V03040002 I0
PROGRESS CODE: V03040003 I0
PDB = c:\efi\servergen2\intel\Build\EagleStreamRpPkg\DEBUG_VS2015x86\X64\ServerRestrictedPkg\VariableSmi\VariableSmiExportHii\DEBUG\VariableSmiExportHii.pdb
PROGRESS CODE: V03040002 I0
PROGRESS CODE: V03040003 I0
PDB = c:\efi\servergen2\intel\Build\EagleStreamRpPkg\DEBUG_VS2015x86\X64\ServerPlatformPkg\Platform\Dxe\ConsoleBdsUpdateDxe\ConsoleBdsUpdateDxe\DEBUG\ConsoleBdsUpdateDxe.pdb
PROGRESS CODE: V03040002 I0
PROGRESS CODE: V03040003 I0
PDB = c:\efi\servergen2\intel\Build\EagleStreamRpPkg\DEBUG_VS2015x86\X64\PrmPkg\PrmSsdtInstallDxe\PrmSsdtInstallDxe\DEBUG\PrmSsdtInstallDxe.pdb
PROGRESS CODE: V03040002 I0
PROGRESS CODE: V03040003 I0
PDB = c:\efi\servergen2\intel\Build\EagleStreamRpPkg\DEBUG_VS2015x86\X64\ServerPlatformPkg\Features\PrmPlatformSample\PrmSampleSsdtDxe\PrmSampleSsdtDxe\DEBUG\PrmSampleSsdtDxe.pdb
PROGRESS CODE: V03040002 I0
PROGRESS CODE: V03040003 I0
PDB = c:\efi\servergen2\intel\Build\EagleStreamRpPkg\DEBUG_VS2015x86\X64\ServerPlatformPkg\Features\PrmPeLoader\PrmPeLoaderConfigDxe\PrmPeLoaderConfigDxe\DEBUG\PrmPeLoaderConfigDxe.pdb
PROGRESS CODE: V03040002 I0
[PRM CONFIG] Entry
Error: Image at 0006B857000 start failed: Unsupported
PDB = c:\efi\servergen2\intel\Build\EagleStreamRpPkg\DEBUG_VS2015x86\X64\ServerPlatformPkg\Features\PrmPeLoader\PrmPeLoaderConfigDxe\PrmPeLoaderConfigDxe\DEBUG\PrmPeLoaderConfigDxe.pdb
PROGRESS CODE: V03040003 I0
PDB = c:\efi\servergen2\intel\Build\EagleStreamRpPkg\DEBUG_VS2015x86\X64\MdeModulePkg\Universal\SetupBrowserDxe\SetupBrowserDxe\DEBUG\SetupBrowser.pdb
PROGRESS CODE: V03040002 I0
PROGRESS CODE: V03040003 I0
PDB = c:\efi\servergen2\intel\Build\EagleStreamRpPkg\DEBUG_VS2015x86\X64\MdeModulePkg\Universal\SmbiosMeasurementDxe\SmbiosMeasurementDxe\DEBUG\SmbiosMeasurementDxe.pdb
PROGRESS CODE: V03040002 I0
PROGRESS CODE: V03040003 I0
PDB = c:\efi\servergen2\intel\Build\EagleStreamRpPkg\DEBUG_VS2015x86\X64\ServerSiliconPkg\Universal\Dxe\CxlInit\CxlCedt\CxlCedt\DEBUG\CxlCedt.pdb
PROGRESS CODE: V03040002 I0
PROGRESS CODE: V03040003 I0
PDB = c:\efi\servergen2\intel\Build\EagleStreamRpPkg\DEBUG_VS2015x86\X64\ServerSiliconPkg\Universal\Dxe\OobMsmDxe\OobMsmDxe\DEBUG\OobMsmDxeDriver.pdb
PROGRESS CODE: V03040002 I0
PROGRESS CODE: V03040003 I0
PDB = c:\efi\servergen2\intel\Build\EagleStreamRpPkg\DEBUG_VS2015x86\X64\ClientOneSiliconPkg\Product\EagleStream\SiInit\Dxe\SiInitDxe\DEBUG\SiInitDxe.pdb
PROGRESS CODE: V03040002 I0
PROGRESS CODE: V03040003 I0
PDB = c:\efi\servergen2\intel\Build\EagleStreamRpPkg\DEBUG_VS2015x86\X64\ClientOneSiliconPkg\IpBlock\Smbus\Dxe\SmbusDxe\DEBUG\SmbusDxe.pdb
PROGRESS CODE: V03040002 I0
PROGRESS CODE: V03040003 I0
PDB = c:\efi\servergen2\intel\Build\EagleStreamRpPkg\DEBUG_VS2015x86\X64\ClientOneSiliconPkg\IpBlock\Wdt\Dxe\WdtDxe\DEBUG\WdtDxe.pdb
PROGRESS CODE: V03040002 I0
PROGRESS CODE: V03040003 I0
PDB = c:\efi\servergen2\intel\Build\EagleStreamRpPkg\DEBUG_VS2015x86\X64\ClientOneSiliconPkg\IpBlock\Sps\Heci\HeciAccess\DxeSmm\HeciAccessDxe\DEBUG\HeciAccessDxe.pdb
PROGRESS CODE: V03040002 I0
PROGRESS CODE: V03040003 I0
PDB = c:\efi\servergen2\intel\Build\EagleStreamRpPkg\DEBUG_VS2015x86\X64\ClientOneSiliconPkg\Fru\EbgPch\PchInit\GpioV2ProtocolInit\Dxe\GpioV2ProtocolInitDxe\DEBUG\GpioV2ProtocolInitDxe.pdb
PROGRESS CODE: V03040002 I0
PROGRESS CODE: V03040003 I0
PDB = c:\efi\servergen2\intel\Build\EagleStreamRpPkg\DEBUG_VS2015x86\X64\EagleStreamOpenBoardPkg\Uba\UbaMain\Common\Dxe\SystemBoardInfoDxe\SystemBoardInfoDxe\DEBUG\SystemBoardInfo.pdb
PROGRESS CODE: V03040002 I0
PROGRESS CODE: V03040003 I0
PDB = c:\efi\servergen2\intel\Build\EagleStreamRpPkg\DEBUG_VS2015x86\X64\EagleStreamOpenBoardPkg\Uba\UbaMain\Common\Dxe\SystemConfigUpdateDxe\SystemConfigUpdateDxe\DEBUG\SystemConfigUpdate.pdb
PROGRESS CODE: V03040002 I0
PROGRESS CODE: V03040003 I0
PDB = c:\efi\servergen2\intel\Build\EagleStreamRpPkg\DEBUG_VS2015x86\X64\EagleStreamOpenBoardPkg\Uba\UbaMain\TypeArcherCityRP\Dxe\StaticSkuDataDxe\StaticSkuDataDxe\DEBUG\StaticSkuDataDxeArcherCityRP.pdb
PROGRESS CODE: V03040002 I0
PROGRESS CODE: V03040003 I0
PDB = c:\efi\servergen2\intel\Build\EagleStreamRpPkg\DEBUG_VS2015x86\X64\EagleStreamOpenBoardPkg\Uba\UbaMain\TypeArcherCityRP\Dxe\SetupCfgUpdateDxe\SetupCfgUpdateDxe\DEBUG\SetupConfigUpdateDxeArcherCityRP.pdb
PROGRESS CODE: V03040002 I0
PROGRESS CODE: V03040003 I0
PDB = c:\efi\servergen2\intel\Build\EagleStreamRpPkg\DEBUG_VS2015x86\X64\EagleStreamOpenBoardPkg\Uba\UbaMain\TypeArcherCityRP\Dxe\SmbiosDataUpdateDxe\SmbiosDataUpdateDxe\DEBUG\SmbiosDataUpdateDxeArcherCityRP.pdb
PROGRESS CODE: V03040002 I0
UBA:SmbiosDataUpdateEntry Image GUID=09813137-B2A5-4462-8A2A-48F77ECA31BF
PROGRESS CODE: V03040003 I0
PDB = c:\efi\servergen2\intel\Build\EagleStreamRpPkg\DEBUG_VS2015x86\X64\EagleStreamOpenBoardPkg\Uba\UbaMain\TypeArcherCityRP\Dxe\UsbOcUpdateDxe\UsbOcUpdateDxe\DEBUG\UsbOcUpdateDxeArcherCityRP.pdb
PROGRESS CODE: V03040002 I0
PROGRESS CODE: V03040003 I0
PDB = c:\efi\servergen2\intel\Build\EagleStreamRpPkg\DEBUG_VS2015x86\X64\ServerPlatformPkg\Platform\Dxe\PlatformType\PlatformType\DEBUG\PlatformType.pdb
PROGRESS CODE: V03040002 I0
PROGRESS CODE: V03040003 I0
PDB = c:\efi\servergen2\intel\Build\EagleStreamRpPkg\DEBUG_VS2015x86\X64\ServerPlatformPkg\Platform\Dxe\PlatformEarlyDxe\PlatformEarlyDxe\DEBUG\PlatformEarlyDxe.pdb
PROGRESS CODE: V03040002 I0
PROGRESS CODE: V03040003 I0
PDB = c:\efi\servergen2\intel\Build\EagleStreamRpPkg\DEBUG_VS2015x86\X64\ServerPlatformPkg\Platform\Dxe\OtaDxe\OtaDxe\DEBUG\OtaDxeDriver.pdb
PROGRESS CODE: V03040002 I0
[OtaDxe.c] OtaDxeDriverEntry() {
[OtaDxe.c] OtaDxeDriverEntry() -> Create OTA Event
[OtaDxe.c] OtaDxeDriverEntry() -> OTA Event creation: Success
[OtaDxe.c] OtaDxeDriverEntry() } Success
PROGRESS CODE: V03040003 I0
PDB = c:\efi\servergen2\intel\Build\EagleStreamRpPkg\DEBUG_VS2015x86\X64\ServerSecurityPkg\Pfr\Restricted\DebugTool\PxdDxe\DEBUG\PxdDxeDriver.pdb
PROGRESS CODE: V03040002 I0
[PxdDxe.c] PxdDxeDriverEntry() {
[PxdDxe.c] PxdDxeDriverEntry() } Success
PROGRESS CODE: V03040003 I0
PDB = c:\efi\servergen2\intel\Build\EagleStreamRpPkg\DEBUG_VS2015x86\X64\UefiCpuPkg\CpuDxe\CpuDxe\DEBUG\CpuDxe.pdb
PROGRESS CODE: V03040002 I0
ConvertPages: failed to find range A0000 - FFFFF
ConvertPages: failed to find range 77800000 - 7FFFFFFF
ConvertPages: failed to find range FC800000 - FE00FFFF
ConvertPages: failed to find range FE010000 - FE010FFF
ConvertPages: failed to find range FE011000 - FE7FFFFF
ConvertPages: failed to find range FEC00000 - FEC00FFF
ConvertPages: failed to find range FEC80000 - FED00FFF
PROGRESS CODE: V03040003 I0
PDB = c:\efi\servergen2\intel\Build\EagleStreamRpPkg\DEBUG_VS2015x86\X64\ServerPlatformPkg\Features\Bmc\PlatformHookSpiAccess\PlatformHookSpiAccessDxe\DEBUG\PlatformHookSpiAccessDxe.pdb
PROGRESS CODE: V03040002 I0
PROGRESS CODE: V03040003 I0
PDB = c:\efi\servergen2\intel\Build\EagleStreamRpPkg\DEBUG_VS2015x86\X64\MdeModulePkg\Universal\BdsDxe\BdsDxe\DEBUG\BdsDxe.pdb
PROGRESS CODE: V03040002 I0
PROGRESS CODE: V03040003 I0
PDB = c:\efi\servergen2\intel\Build\EagleStreamRpPkg\DEBUG_VS2015x86\X64\ServerPlatformPkg\Platform\Dxe\Hsti\HstiIhvProviderDxe\HstiIhvProviderDxeEGS\DEBUG\HstiIhvProviderDxeEGS.pdb
PROGRESS CODE: V03040002 I0
PROGRESS CODE: V03040003 I0
PDB = c:\efi\servergen2\intel\Build\EagleStreamRpPkg\DEBUG_VS2015x86\X64\MdeModulePkg\Universal\Acpi\S3SaveStateDxe\S3SaveStateDxe\DEBUG\S3SaveStateDxe.pdb
PROGRESS CODE: V03040002 I0
PROGRESS CODE: V03040003 I0
PDB = c:\efi\servergen2\intel\Build\EagleStreamRpPkg\DEBUG_VS2015x86\X64\ServerPlatformPkg\Platform\Dxe\PlatformFirmwareVersionInfoDxe\PlatformFirmwareVersionInfoDxe\DEBUG\PlatformFirmwareVersionInfo.pdb
PROGRESS CODE: V03040002 I0
PROGRESS CODE: V03040003 I0
PDB = c:\efi\servergen2\intel\Build\EagleStreamRpPkg\DEBUG_VS2015x86\X64\ServerPlatformPkg\Features\Acpi\BmcAcpiDxe\BmcAcpiDxe\DEBUG\BmcAcpiDxe.pdb
PROGRESS CODE: V03040002 I0
PROGRESS CODE: V03040003 I0
PDB = c:\efi\servergen2\intel\Build\EagleStreamRpPkg\DEBUG_VS2015x86\X64\ClientOneSiliconPkg\IpBlock\Me\ResetHandler\Dxe\ResetHandler\DEBUG\ResetHandler.pdb
PROGRESS CODE: V03040002 I0
PROGRESS CODE: V03040003 I0
PDB = c:\efi\servergen2\intel\Build\EagleStreamRpPkg\DEBUG_VS2015x86\X64\ServerRasPkg\Driver\Dxe\CrashLogDxe\CrashLogDxe\DEBUG\CrashLogDxe.pdb
PROGRESS CODE: V03040002 I0
Reading CPU 0 WatcherCfgBlk->Data64[0x0] = 0x10000700 address = 0xC6B57000!
Reading CPU 0 WatcherCfgBlk->Data64[0x1] = 0x0 address = 0xC6B57008!
Reading CPU 0 WatcherCfgBlk->Data64[0x0] = 0x10000700 address = 0xC6B57000!
Reading CPU 0 WatcherCfgBlk->Data64[0x1] = 0x0 address = 0xC6B57008!
Writing CPU 0 WatcherCfgBlk->Data64[0x0] = 0x10000700! address = 0xC6B57000
Writing CPU 0 WatcherCfgBlk->Data64[0x1] = 0x0! address = 0xC6B57008
Reading CPU 0 WatcherCfgBlk->Data64[0x0] = 0x10000700 address = 0xC6B57000!
Reading CPU 0 WatcherCfgBlk->Data64[0x1] = 0x0 address = 0xC6B57008!
Reading CPU 1 WatcherCfgBlk->Data64[0x0] = 0x10000700 address = 0xF9B57000!
Reading CPU 1 WatcherCfgBlk->Data64[0x1] = 0x0 address = 0xF9B57008!
Reading CPU 1 WatcherCfgBlk->Data64[0x0] = 0x10000700 address = 0xF9B57000!
Reading CPU 1 WatcherCfgBlk->Data64[0x1] = 0x0 address = 0xF9B57008!
Writing CPU 1 WatcherCfgBlk->Data64[0x0] = 0x10000700! address = 0xF9B57000
Writing CPU 1 WatcherCfgBlk->Data64[0x1] = 0x0! address = 0xF9B57008
Reading CPU 1 WatcherCfgBlk->Data64[0x0] = 0x10000700 address = 0xF9B57000!
Reading CPU 1 WatcherCfgBlk->Data64[0x1] = 0x0 address = 0xF9B57008!
Reading CPU 0 WatcherCfgBlk->Data64[0x0] = 0x10000700 address = 0xC6B57000!
Reading CPU 0 WatcherCfgBlk->Data64[0x1] = 0x0 address = 0xC6B57008!
Socket 0 entry 0 CrashDump_Complete is not set in CPU CrashLog Discovery Header!
Socket 0 entry 1 CrashDump_Complete is not set in CPU CrashLog Discovery Header!
Socket 0 entry 2 CrashDump_Complete is not set in CPU CrashLog Discovery Header!
Socket 0 entry 3 CrashDump_Complete is not set in CPU CrashLog Discovery Header!
Socket 0 entry 4 CrashDump_Complete is not set in CPU CrashLog Discovery Header!
Socket 0 entry 5 CrashDump_Complete is not set in CPU CrashLog Discovery Header!
Socket 0 entry 6 CrashDump_Complete is not set in CPU CrashLog Discovery Header!
Unknown AccessType = F !
can't get CPU CrashLog Region Address and size !
Reading CPU 1 WatcherCfgBlk->Data64[0x0] = 0x10000700 address = 0xF9B57000!
Reading CPU 1 WatcherCfgBlk->Data64[0x1] = 0x0 address = 0xF9B57008!
Socket 1 entry 0 CrashDump_Complete is not set in CPU CrashLog Discovery Header!
Socket 1 entry 1 CrashDump_Complete is not set in CPU CrashLog Discovery Header!
Socket 1 entry 2 CrashDump_Complete is not set in CPU CrashLog Discovery Header!
Socket 1 entry 3 CrashDump_Complete is not set in CPU CrashLog Discovery Header!
Unknown AccessType = F !
can't get CPU CrashLog Region Address and size !
Unknown AccessType = F !
can't get CPU CrashLog Region Address and size !
Unknown AccessType = F !
can't get CPU CrashLog Region Address and size !
Unknown AccessType = F !
can't get CPU CrashLog Region Address and size !
PchCrashLogDiscovery - first DWORD of Record 0 is Zero
PchCrashLogDiscovery - first DWORD of Record 1 is Zero
PchCrashLogDiscovery - first DWORD of Record 2 is Zero
PROGRESS CODE: V03040003 I0
PDB = c:\efi\servergen2\intel\Build\EagleStreamRpPkg\DEBUG_VS2015x86\X64\ServerRasPkg\Driver\Dxe\RasMiscDxe\RasMiscDxe\DEBUG\RasMiscDxe.pdb
PROGRESS CODE: V03040002 I0
PROGRESS CODE: V03040003 I0
PDB = c:\efi\servergen2\intel\Build\EagleStreamRpPkg\DEBUG_VS2015x86\X64\MdeModulePkg\Universal\PlatformDriOverrideDxe\PlatformDriOverrideDxe\DEBUG\PlatDriOverrideDxe.pdb
PROGRESS CODE: V03040002 I0
PROGRESS CODE: V03040003 I0
PDB = c:\efi\servergen2\intel\Build\EagleStreamRpPkg\DEBUG_VS2015x86\X64\MdeModulePkg\Universal\DisplayEngineDxe\DisplayEngineDxe\DEBUG\DisplayEngine.pdb
PROGRESS CODE: V03040002 I0
PROGRESS CODE: V03040003 I0
PDB = c:\efi\servergen2\intel\Build\EagleStreamRpPkg\DEBUG_VS2015x86\X64\NetworkPkg\TlsAuthConfigDxe\TlsAuthConfigDxe\DEBUG\TlsAuthConfigDxe.pdb
PROGRESS CODE: V03040002 I0
PROGRESS CODE: V03040003 I0
PDB = c:\efi\servergen2\intel\Build\EagleStreamRpPkg\DEBUG_VS2015x86\X64\ServerSiliconPkg\Universal\Dxe\CxlInit\MemMap\CxlDxe\DEBUG\CxlDxe.pdb
PROGRESS CODE: V03040002 I0
PROGRESS CODE: V03040003 I0
PDB = c:\efi\servergen2\intel\Build\EagleStreamRpPkg\DEBUG_VS2015x86\X64\ServerSiliconPkg\Universal\Dxe\HbmMemMap\HbmMemMap\DEBUG\HbmMemMap.pdb
PROGRESS CODE: V03040002 I0
PROGRESS CODE: V03040003 I0
PDB = c:\efi\servergen2\intel\Build\EagleStreamRpPkg\DEBUG_VS2015x86\X64\ClientOneSiliconPkg\IpBlock\Me\HeciTransport\DxeSmm\HeciTransportDxe\DEBUG\HeciTransportDxe.pdb
PROGRESS CODE: V03040002 I0
PROGRESS CODE: V03040003 I0
PDB = c:\efi\servergen2\intel\Build\EagleStreamRpPkg\DEBUG_VS2015x86\X64\ServerSiliconPkg\Me\Client\ClientCore\Dxe\ClientCore\DEBUG\ClientCore.pdb
PROGRESS CODE: V03040002 I0
PROGRESS CODE: V03040003 I0
PDB = c:\efi\servergen2\intel\Build\EagleStreamRpPkg\DEBUG_VS2015x86\X64\PcAtChipsetPkg\HpetTimerDxe\HpetTimerDxe\DEBUG\HpetTimerDxe.pdb
PROGRESS CODE: V03040002 I0
PROGRESS CODE: V03040003 I0
PDB = c:\efi\servergen2\intel\Build\EagleStreamRpPkg\DEBUG_VS2015x86\X64\UefiCpuPkg\CpuS3DataDxe\CpuS3DataDxe\DEBUG\CpuS3DataDxe.pdb
PROGRESS CODE: V03040002 I0
PROGRESS CODE: V03040003 I0
PDB = c:\efi\servergen2\intel\Build\EagleStreamRpPkg\DEBUG_VS2015x86\X64\ServerPlatformPkg\Features\Pci\Dxe\PciHostBridge\PciHostBridgeSpr\DEBUG\PciHostBridge.pdb
PROGRESS CODE: V03040002 I0
PROGRESS CODE: V03040003 I0
PDB = c:\efi\servergen2\intel\Build\EagleStreamRpPkg\DEBUG_VS2015x86\X64\ServerPlatformPkg\Platform\Dxe\Hsti\HstiIbvPlatformDxe\HstiIbvPlatformDxe\DEBUG\HstiPlatformDxe.pdb
PROGRESS CODE: V03040002 I0
PROGRESS CODE: V03040003 I0
PDB = c:\efi\servergen2\intel\Build\EagleStreamRpPkg\DEBUG_VS2015x86\X64\ServerPlatformPkg\Features\Cpu\Dxe\GetCpuInfo\GetCpuInfo\DEBUG\GetCpuInfo.pdb
PROGRESS CODE: V03040002 I0
PROGRESS CODE: V03040003 I0
PDB = c:\efi\servergen2\intel\Build\EagleStreamRpPkg\DEBUG_VS2015x86\X64\ServerPlatformPkg\Restricted\Overclocking\NearTDPClearOc\NearTDPClearOc\DEBUG\NearTDPClearOc.pdb
PROGRESS CODE: V03040002 I0
PROGRESS CODE: V03040003 I0
PDB = c:\efi\servergen2\intel\Build\EagleStreamRpPkg\DEBUG_VS2015x86\X64\MicrocodeUpdateFeaturePkg\MicrocodeUtility\MicrocodeUtilityDxe\DEBUG\MicrocodeUtilityDxe.pdb
PROGRESS CODE: V03040002 I0
Microcode utility not supported.
PROGRESS CODE: V03040003 I0
PDB = c:\efi\servergen2\intel\Build\EagleStreamRpPkg\DEBUG_VS2015x86\X64\MicrocodeUpdateFeaturePkg\MicrocodeUtility\MicrocodeUtilityDxe\DEBUG\MicrocodeUtilityDxe.pdb
PROGRESS CODE: V03040002 I0
Microcode utility not supported.
PROGRESS CODE: V03040003 I0
PDB = c:\efi\servergen2\intel\Build\EagleStreamRpPkg\DEBUG_VS2015x86\X64\ClientOneSiliconPkg\Fru\EbgPch\PchInit\Dxe\PchInitDxe\DEBUG\PchInitDxeEbg.pdb
PROGRESS CODE: V03040002 I0
PROGRESS CODE: V03040003 I0
PDB = c:\efi\servergen2\intel\Build\EagleStreamRpPkg\DEBUG_VS2015x86\X64\ServerSiliconPkg\Universal\Smm\Access\SmmAccess\DEBUG\SmmAccess.pdb
PROGRESS CODE: V03040002 I0
PROGRESS CODE: V03040003 I0
PDB = c:\efi\servergen2\intel\Build\EagleStreamRpPkg\DEBUG_VS2015x86\X64\ClientOneSiliconPkg\IpBlock\Sps\Heci\HeciControl\DxeSmm\HeciControlDxe\DEBUG\HeciControlDxe.pdb
PROGRESS CODE: V03040002 I0
Initialization is allowed
Initialization is allowed
PROGRESS CODE: V03040003 I0
PDB = c:\efi\servergen2\intel\Build\EagleStreamRpPkg\DEBUG_VS2015x86\X64\MdeModulePkg\Universal\WatchdogTimerDxe\WatchdogTimer\DEBUG\WatchdogTimer.pdb
PROGRESS CODE: V03040002 I0
PROGRESS CODE: V03040003 I0
PDB = c:\efi\servergen2\intel\Build\EagleStreamRpPkg\DEBUG_VS2015x86\X64\ServerPlatformPkg\Platform\SpiFvbServices\PlatformSpi\DEBUG\FwBlockService.pdb
PROGRESS CODE: V03040002 I0
FvImage on FvHandle 6B21C818 and 769B0518 has the same FvNameGuid 27A72E80-3118-4C0C-8673-AA5B4EFA9613.
FvImage on FvHandle 6B21C398 and 769A6818 has the same FvNameGuid 5A515240-D1F1-4C58-9590-27B1F0E86827.
FvImage on FvHandle 6B21B598 and 769A9A18 has the same FvNameGuid D2C29BA7-3809-480F-9C3D-DE389C61425A.
FvImage on FvHandle 6B200918 and 769B0618 has the same FvNameGuid 6522280D-28F9-4131-ADC4-F40EBFA45864.
PROGRESS CODE: V03040003 I0
PDB = c:\efi\servergen2\intel\Build\EagleStreamRpPkg\DEBUG_VS2015x86\X64\ServerPlatformPkg\Features\Pci\Dxe\PciPlatform\PciPlatform\DEBUG\PciPlatform.pdb
PROGRESS CODE: V03040002 I0
PROGRESS CODE: V03040003 I0
PDB = c:\efi\servergen2\intel\Build\EagleStreamRpPkg\DEBUG_VS2015x86\X64\IntelSiliconPkg\Feature\VTd\IntelVTdDxe\IntelVTdDxe\DEBUG\IntelVTdDxe.pdb
PROGRESS CODE: V03040002 I0
Error: Image at 0006AE3B000 start failed: Unsupported
PDB = c:\efi\servergen2\intel\Build\EagleStreamRpPkg\DEBUG_VS2015x86\X64\IntelSiliconPkg\Feature\VTd\IntelVTdDxe\IntelVTdDxe\DEBUG\IntelVTdDxe.pdb
PROGRESS CODE: V03040003 I0
PDB = c:\efi\servergen2\intel\Build\EagleStreamRpPkg\DEBUG_VS2015x86\X64\ClientOneSiliconPkg\IpBlock\Sps\Heci\HeciLegacyDxe\HeciLegacyDxe\DEBUG\HeciLegacyDxe.pdb
PROGRESS CODE: V03040002 I0
PROGRESS CODE: V03040003 I0
PDB = c:\efi\servergen2\intel\Build\EagleStreamRpPkg\DEBUG_VS2015x86\X64\MdeModulePkg\Core\PiSmmCore\PiSmmIpl\DEBUG\PiSmmIpl.pdb
PROGRESS CODE: V03040002 I0
ConvertPages: failed to find range 78000000 - 7FFFFFFF
PDB = c:\efi\servergen2\intel\Build\EagleStreamRpPkg\DEBUG_VS2015x86\X64\MdeModulePkg\Core\PiSmmCore\PiSmmCore\DEBUG\PiSmmCore.pdb
[SIO] Current system SIO exist bit:10
PROGRESS CODE: V03040003 I0
PDB = c:\efi\servergen2\intel\Build\EagleStreamRpPkg\DEBUG_VS2015x86\X64\ServerSiliconPkg\Universal\Smm\CsrPseudoOffsetInit\CsrPseudoOffsetInitSmm\DEBUG\CsrPseudoOffsetInitSmm.pdb
PDB = c:\efi\servergen2\intel\Build\EagleStreamRpPkg\DEBUG_VS2015x86\X64\ServerSiliconPkg\Universal\Smm\SiliconDataInit\SiliconDataInitSmm\DEBUG\SiliconDataInitSmm.pdb
PDB = c:\efi\servergen2\intel\Build\EagleStreamRpPkg\DEBUG_VS2015x86\X64\ServerSiliconPkg\Universal\Smm\SpdPlatformInfoSmm\SpdPlatformInfoSmm\DEBUG\SpdPlatformInfoSmm.pdb
PDB = c:\efi\servergen2\intel\Build\EagleStreamRpPkg\DEBUG_VS2015x86\X64\MdeModulePkg\Universal\ReportStatusCodeRouter\Smm\ReportStatusCodeRouterSmm\DEBUG\ReportStatusCodeRouterSmm.pdb
PDB = c:\efi\servergen2\intel\Build\EagleStreamRpPkg\DEBUG_VS2015x86\X64\MdeModulePkg\Universal\Variable\RuntimeDxe\VariableSmm\DEBUG\VariableSmm.pdb
PDB = c:\efi\servergen2\intel\Build\EagleStreamRpPkg\DEBUG_VS2015x86\X64\UefiCpuPkg\CpuIo2Smm\CpuIo2Smm\DEBUG\CpuIo2Smm.pdb
PDB = c:\efi\servergen2\intel\Build\EagleStreamRpPkg\DEBUG_VS2015x86\X64\MdeModulePkg\Universal\LockBox\SmmLockBox\SmmLockBox\DEBUG\SmmLockBox.pdb
PDB = c:\efi\servergen2\intel\Build\EagleStreamRpPkg\DEBUG_VS2015x86\X64\CpRcPkg\Universal\RegAccess\Smm\RegAccessSMM\DEBUG\RegAccessSMM.pdb
PDB = c:\efi\servergen2\intel\Build\EagleStreamRpPkg\DEBUG_VS2015x86\X64\ServerPlatformPkg\Universal\TraceHubStatusCodeHandler\Smm\TraceHubStatusCodeHandlerSmm\DEBUG\TraceHubStatusCodeHandlerSmm.pdb
PDB = c:\efi\servergen2\intel\Build\EagleStreamRpPkg\DEBUG_VS2015x86\X64\MdeModulePkg\Universal\Acpi\FirmwarePerformanceDataTableSmm\FirmwarePerformanceSmm\DEBUG\FirmwarePerformanceSmm.pdb
PDB = c:\efi\servergen2\intel\Build\EagleStreamRpPkg\DEBUG_VS2015x86\X64\ServerPlatformPkg\Features\Variable\PlatformVariable\Smm\PlatformSecureVariableSmm\DEBUG\PlatformSecureVariableSmm.pdb
PDB = c:\efi\servergen2\intel\Build\EagleStreamRpPkg\DEBUG_VS2015x86\X64\ServerSiliconPkg\Universal\Dxe\CpuCsrAccess\CpuCsrAccessSMM\DEBUG\CpuCsrAccessSMM.pdb
PDB = c:\efi\servergen2\intel\Build\EagleStreamRpPkg\DEBUG_VS2015x86\X64\ClientOneSiliconPkg\IpBlock\Smbus\Smm\SmbusSmm\DEBUG\SmbusSmm.pdb
PDB = c:\efi\servergen2\intel\Build\EagleStreamRpPkg\DEBUG_VS2015x86\X64\ClientOneSiliconPkg\IpBlock\Sps\Heci\HeciAccess\DxeSmm\HeciAccessSmm\DEBUG\HeciAccessSmm.pdb
PDB = c:\efi\servergen2\intel\Build\EagleStreamRpPkg\DEBUG_VS2015x86\X64\MdeModulePkg\Universal\StatusCodeHandler\Smm\StatusCodeHandlerSmm\DEBUG\StatusCodeHandlerSmm.pdb
PROGRESS CODE: V03070003 I0
PDB = c:\efi\servergen2\intel\Build\EagleStreamRpPkg\DEBUG_VS2015x86\X64\ServerPlatformPkg\Features\Bmc\PlatformHookSpiAccess\PlatformHookSpiAccessSmm\DEBUG\PlatformHookSpiAccessSmm.pdb
PROGRESS CODE: V03070002 I0
PROGRESS CODE: V03070003 I0
PDB = c:\efi\servergen2\intel\Build\EagleStreamRpPkg\DEBUG_VS2015x86\X64\ClientOneSiliconPkg\IpBlock\Me\HeciTransport\DxeSmm\HeciTransportSmm\DEBUG\HeciTransportSmm.pdb
PROGRESS CODE: V03070002 I0
PROGRESS CODE: V03070003 I0
PDB = c:\efi\servergen2\intel\Build\EagleStreamRpPkg\DEBUG_VS2015x86\X64\ClientOneSiliconPkg\IpBlock\Sps\Heci\HeciControl\DxeSmm\HeciControlSmm\DEBUG\HeciControlSmm.pdb
PROGRESS CODE: V03070002 I0
Initialization is allowed
Initialization is allowed
PROGRESS CODE: V03070003 I0
PDB = c:\efi\servergen2\intel\Build\EagleStreamRpPkg\DEBUG_VS2015x86\X64\ServerSiliconPkg\Universal\Dxe\PmemResetNotify\PmemResetNotify\DEBUG\PmemResetNotify.pdb
PROGRESS CODE: V03040002 I0
[PMem](DXE) PMem Always-ON 12v support disabled
[PMem](DXE) PMem reset notification driver init failed (status Aborted)
Error: Image at 00076AD7000 start failed: Aborted
PDB = c:\efi\servergen2\intel\Build\EagleStreamRpPkg\DEBUG_VS2015x86\X64\ServerSiliconPkg\Universal\Dxe\PmemResetNotify\PmemResetNotify\DEBUG\PmemResetNotify.pdb
PROGRESS CODE: V03040003 I0
PDB = c:\efi\servergen2\intel\Build\EagleStreamRpPkg\DEBUG_VS2015x86\X64\ServerSiliconPkg\Universal\Dxe\CrystalRidge\CrystalRidgeMeasurement\DEBUG\CrystalRidgeMeasurement.pdb
PROGRESS CODE: V03040002 I0
PROGRESS CODE: V03040003 I0
PDB = c:\efi\servergen2\intel\Build\EagleStreamRpPkg\DEBUG_VS2015x86\X64\ClientOneSiliconPkg\IpBlock\Spi\Dxe\SpiSmmDxe\DEBUG\SpiDxe.pdb
PROGRESS CODE: V03040002 I0
PROGRESS CODE: V03040003 I0
PDB = c:\efi\servergen2\intel\Build\EagleStreamRpPkg\DEBUG_VS2015x86\X64\ClientOneSiliconPkg\IpBlock\Me\HwAsset\Dxe\HwAssetDxe\DEBUG\HwAssetDxe.pdb
PROGRESS CODE: V03040002 I0
Error: Image at 0006A8CF000 start failed: Unsupported
PDB = c:\efi\servergen2\intel\Build\EagleStreamRpPkg\DEBUG_VS2015x86\X64\ClientOneSiliconPkg\IpBlock\Me\HwAsset\Dxe\HwAssetDxe\DEBUG\HwAssetDxe.pdb
PROGRESS CODE: V03040003 I0
PDB = c:\efi\servergen2\intel\Build\EagleStreamRpPkg\DEBUG_VS2015x86\X64\ClientOneSiliconPkg\IpBlock\Me\Asf\Dxe\AsfDxe\DEBUG\AsfDxe.pdb
PROGRESS CODE: V03040002 I0
Error: Image at 0006A8D3000 start failed: Unsupported
PDB = c:\efi\servergen2\intel\Build\EagleStreamRpPkg\DEBUG_VS2015x86\X64\ClientOneSiliconPkg\IpBlock\Me\Asf\Dxe\AsfDxe\DEBUG\AsfDxe.pdb
PROGRESS CODE: V03040003 I0
PDB = c:\efi\servergen2\intel\Build\EagleStreamRpPkg\DEBUG_VS2015x86\X64\ServerSiliconPkg\Me\Client\BiosExtensionLoader\Dxe\BiosExtensionLoader\DEBUG\BiosExtensionLoader.pdb
PROGRESS CODE: V03040002 I0
Error: Image at 0006A8CF000 start failed: Unsupported
PDB = c:\efi\servergen2\intel\Build\EagleStreamRpPkg\DEBUG_VS2015x86\X64\ServerSiliconPkg\Me\Client\BiosExtensionLoader\Dxe\BiosExtensionLoader\DEBUG\BiosExtensionLoader.pdb
PROGRESS CODE: V03040003 I0
PDB = c:\efi\servergen2\intel\Build\EagleStreamRpPkg\DEBUG_VS2015x86\X64\MdeModulePkg\Universal\Variable\RuntimeDxe\VariableSmmRuntimeDxe\DEBUG\VariableSmmRuntimeDxe.pdb
PROGRESS CODE: V03040002 I0
PROGRESS CODE: V03040003 I0
PDB = c:\efi\servergen2\intel\Build\EagleStreamRpPkg\DEBUG_VS2015x86\X64\MdeModulePkg\Universal\Acpi\BootScriptExecutorDxe\BootScriptExecutorDxe\DEBUG\BootScriptExecutorDxe.pdb
PROGRESS CODE: V03040002 I0
[SIO] Current system SIO exist bit:10
PROGRESS CODE: V03040003 I0
PDB = c:\efi\servergen2\intel\Build\EagleStreamRpPkg\DEBUG_VS2015x86\X64\ServerPlatformPkg\Features\IPMI\GenericIpmi\Dxe\GenericIpmi\DEBUG\GenericIpmi.pdb
PROGRESS CODE: V03040002 I0
[IPMI] mIpmiInstance->KcsTimeoutPeriod: 0x186A0
[IPMI] BMC Device ID: 0x23, firmware version: 2.03 UpdateMode:1
[IPMI] BMC in Forced Update mode, skip waiting for BMC_READY.
PROGRESS CODE: V03040003 I0
PDB = c:\efi\servergen2\intel\Build\EagleStreamRpPkg\DEBUG_VS2015x86\X64\EagleStreamRpPkg\Platform\Dxe\SmbiosRpTable\SmbiosRpTable\DEBUG\SmbiosRpTable.pdb
PROGRESS CODE: V03040002 I0
Allocated Communication Buffer address = 775B9000
Smbios protocol addition (Type 133) returns Success
PROGRESS CODE: V03040003 I0
PDB = c:\efi\servergen2\intel\Build\EagleStreamRpPkg\DEBUG_VS2015x86\X64\ServerPlatformPkg\Features\Cpu\Dxe\PlatformCpuPolicyDxe\PlatformCpuPolicyDxe\DEBUG\PlatformCpuPolicyDxe.pdb
PROGRESS CODE: V03040002 I0
Common PPM policy update, PackageCState:3
PROGRESS CODE: V03040003 I0
PDB = c:\efi\servergen2\intel\Build\EagleStreamRpPkg\DEBUG_VS2015x86\X64\ServerPlatformPkg\Platform\Dxe\PolicyInitDxe\PolicyInitDxe\DEBUG\PolicyInitDxe.pdb
PROGRESS CODE: V03040002 I0
[HECI] DxeMeServerPolicy (MeType is ME_TYPE_SPS)
PROGRESS CODE: V03040003 I0
PDB = c:\efi\servergen2\intel\Build\EagleStreamRpPkg\DEBUG_VS2015x86\X64\SecurityPkg\Tcg\Tcg2Dxe\Tcg2Dxe\DEBUG\Tcg2Dxe.pdb
PROGRESS CODE: V03040002 I0
PROGRESS CODE: V03040003 I0
PDB = c:\efi\servergen2\intel\Build\EagleStreamRpPkg\DEBUG_VS2015x86\X64\ServerPlatformPkg\Platform\Dxe\SmbiosMiscDxe\SmbiosMiscDxe\DEBUG\SmbiosMiscDxe.pdb
PROGRESS CODE: V03040002 I0
PROGRESS CODE: V03040003 I0
PDB = c:\efi\servergen2\intel\Build\EagleStreamRpPkg\DEBUG_VS2015x86\X64\EagleStreamOpenBoardPkg\Platform\Dxe\PlatformVTdSampleDxe\PlatformVTdSampleDxe\DEBUG\PlatformVTdSampleDxe.pdb
PROGRESS CODE: V03040002 I0
PROGRESS CODE: V03040003 I0
PDB = c:\efi\servergen2\intel\Build\EagleStreamRpPkg\DEBUG_VS2015x86\X64\ServerPlatformPkg\Features\Bmc\OsTransparentUpdate\OsTransparentUpdate\DEBUG\OsTransparentUpdate.pdb
PROGRESS CODE: V03040002 I0
PROGRESS CODE: V03040003 I0
PDB = c:\efi\servergen2\intel\Build\EagleStreamRpPkg\DEBUG_VS2015x86\X64\ClientOneSiliconPkg\IpBlock\Sps\Sps\Smm\SpsSmm\DEBUG\SpsSmm.pdb
PROGRESS CODE: V03070002 I0
[HECI Transport-1 SMM] Send pkt: 80040007
00: FF 02 00 00
[HECI Transport-1 SMM] Got pkt: 80140007
00: FF 82 00 00 00 00 06 18 - 00 01 03 00 00 00 06 18
10: 00 01 03 00
HeciBufferClear (): HeciCsrHost 0x806C6C09 (Clear H_RDY)
HeciBufferClear (): HeciCsrHost 0x806C6C01 (CBLength = 128, H_RDY = 0)
[HECI Transport-1 SMM] Send pkt: 80080007
00: 05 02 00 00 00 00 00 00
[HECI Transport-1 SMM] Got pkt: 80180007
00: 05 82 00 00 5C 67 30 0D - 94 E7 C6 FE 00 00 00 00
10: 00 40 1A 00 00 00 00 00
HeciBufferClear (): HeciCsrHost 0x80030309 (Clear H_RDY)
HeciBufferClear (): HeciCsrHost 0x80030301 (CBLength = 128, H_RDY = 0)
PROGRESS CODE: V03070003 I0
PDB = c:\efi\servergen2\intel\Build\EagleStreamRpPkg\DEBUG_VS2015x86\X64\UefiCpuPkg\PiSmmCpuDxeSmm\PiSmmCpuDxeSmm\DEBUG\PiSmmCpuDxeSmm.pdb
PROGRESS CODE: V03070002 I0
PROGRESS CODE: V00011008 I0
PROGRESS CODE: V03070003 I0
PDB = c:\efi\servergen2\intel\Build\EagleStreamRpPkg\DEBUG_VS2015x86\X64\ClientOneSiliconPkg\Pch\PchSmiDispatcher\Smm\PchSmiDispatcherServer\DEBUG\PchSmiDispatcher.pdb
PROGRESS CODE: V03070002 I0
PROGRESS CODE: V03070003 I0
PDB = c:\efi\servergen2\intel\Build\EagleStreamRpPkg\DEBUG_VS2015x86\X64\ClientOneSiliconPkg\IpBlock\Spi\Smm\SpiSmm\DEBUG\SpiSmm.pdb
PROGRESS CODE: V03070002 I0
PROGRESS CODE: V03070003 I0
PDB = c:\efi\servergen2\intel\Build\EagleStreamRpPkg\DEBUG_VS2015x86\X64\ServerPlatformPkg\Platform\DxeSmm\BiosGuard\BiosGuardServices\DEBUG\BiosGuardServices.pdb
PROGRESS CODE: V03070002 I0
PROGRESS CODE: V03070003 I0
PDB = c:\efi\servergen2\intel\Build\EagleStreamRpPkg\DEBUG_VS2015x86\X64\ServerRasPkg\Driver\Smm\RasAcpi\RasAcpi\DEBUG\RasAcpi.pdb
PROGRESS CODE: V03070002 I0
PROGRESS CODE: V03070003 I0
PDB = c:\efi\servergen2\intel\Build\EagleStreamRpPkg\DEBUG_VS2015x86\X64\ServerSiliconPkg\Universal\Smm\OobMsmSmm\OobMsmSmm\DEBUG\OobMsmSmm.pdb
PROGRESS CODE: V03070002 I0
OobMsmSmmDriverEntry(): Enter Entrypoint
PROGRESS CODE: V03070003 I0
PDB = c:\efi\servergen2\intel\Build\EagleStreamRpPkg\DEBUG_VS2015x86\X64\ServerSiliconPkg\Universal\Smm\PlatformResetNotify\PlatformResetNotifySmm\DEBUG\PlatformResetNotifySmm.pdb
PROGRESS CODE: V03070002 I0
PROGRESS CODE: V03070003 I0
PDB = c:\efi\servergen2\intel\Build\EagleStreamRpPkg\DEBUG_VS2015x86\X64\ClientOneSiliconPkg\Pch\PchInit\Smm\PchInitSmm\DEBUG\PchInitSmm.pdb
PROGRESS CODE: V03070002 I0
PROGRESS CODE: V03070003 I0
PDB = c:\efi\servergen2\intel\Build\EagleStreamRpPkg\DEBUG_VS2015x86\X64\ServerSecurityPkg\Pfr\Restricted\DebugTool\PxdSmm\DEBUG\PxdSmmDriver.pdb
PROGRESS CODE: V03070002 I0
[PxdSmm.c] PxdSmmDriverEntry() {
[PxdSmm.c] PxdSmmDriverEntry() } Success
PROGRESS CODE: V03070003 I0
PDB = c:\efi\servergen2\intel\Build\EagleStreamRpPkg\DEBUG_VS2015x86\X64\ServerPlatformPkg\Platform\SpiFvbServices\PlatformSmmSpi\DEBUG\FwBlockServiceSmm.pdb
PROGRESS CODE: V03070002 I0
PROGRESS CODE: V03070003 I0
PDB = c:\efi\servergen2\intel\Build\EagleStreamRpPkg\DEBUG_VS2015x86\X64\ServerRestrictedPkg\VariableSmi\VariableSmiSmm\DEBUG\VariableSmiSmm.pdb
PROGRESS CODE: V03070002 I0
PROGRESS CODE: V03070003 I0
PDB = c:\efi\servergen2\intel\Build\EagleStreamRpPkg\DEBUG_VS2015x86\X64\ServerPlatformPkg\Platform\Dxe\PlatformPowerButton\PlatformPowerButton\DEBUG\PowerButtonHandler.pdb
PROGRESS CODE: V03070002 I0
PROGRESS CODE: V03070003 I0
PDB = c:\efi\servergen2\intel\Build\EagleStreamRpPkg\DEBUG_VS2015x86\X64\SecurityPkg\Tcg\Tcg2Smm\Tcg2Smm\DEBUG\Tcg2Smm.pdb
PROGRESS CODE: V03070002 I0
PROGRESS CODE: V03070003 I0
PDB = c:\efi\servergen2\intel\Build\EagleStreamRpPkg\DEBUG_VS2015x86\X64\UefiCpuPkg\PiSmmCommunication\PiSmmCommunicationSmm\DEBUG\PiSmmCommunicationSmm.pdb
PROGRESS CODE: V03070002 I0
PROGRESS CODE: V03070003 I0
PDB = c:\efi\servergen2\intel\Build\EagleStreamRpPkg\DEBUG_VS2015x86\X64\ServerRasPkg\Driver\Smm\AddressTranslationDsm\AddressTranslationDsm\DEBUG\AddressTranslationDsm.pdb
PROGRESS CODE: V03070002 I0
[GetNmCaching] NM caching Cfg:B OffData:0 IntLv:458
[GetNmCaching] NM caching Cfg:B OffData:0 IntLv:40458
[GetNmCaching] NM caching Cfg:B OffData:0 IntLv:80458
[GetNmCaching] NM caching Cfg:B OffData:0 IntLv:C0458
[GetNmCaching] NM caching Cfg:B OffData:0 IntLv:100458
[GetNmCaching] NM caching Cfg:B OffData:0 IntLv:140458
[GetNmCaching] NM caching Cfg:B OffData:0 IntLv:180458
[GetNmCaching] NM caching Cfg:B OffData:0 IntLv:1C0458
[GetNmCaching] NM caching Cfg:B OffData:80000022 IntLv:458
[GetNmCaching] NM caching Cfg:B OffData:80000022 IntLv:40458
[GetNmCaching] NM caching Cfg:B OffData:80000022 IntLv:80458
[GetNmCaching] NM caching Cfg:B OffData:80000022 IntLv:C0458
[GetNmCaching] NM caching Cfg:B OffData:80000022 IntLv:100458
[GetNmCaching] NM caching Cfg:B OffData:80000022 IntLv:140458
[GetNmCaching] NM caching Cfg:B OffData:80000022 IntLv:180458
[GetNmCaching] NM caching Cfg:B OffData:80000022 IntLv:1C0458
[GetNmCaching] NM caching Cfg:B OffData:80000042 IntLv:458
[GetNmCaching] NM caching Cfg:B OffData:80000042 IntLv:40458
[GetNmCaching] NM caching Cfg:B OffData:80000042 IntLv:80458
[GetNmCaching] NM caching Cfg:B OffData:80000042 IntLv:C0458
[GetNmCaching] NM caching Cfg:B OffData:80000042 IntLv:100458
[GetNmCaching] NM caching Cfg:B OffData:80000042 IntLv:140458
[GetNmCaching] NM caching Cfg:B OffData:80000042 IntLv:180458
[GetNmCaching] NM caching Cfg:B OffData:80000042 IntLv:1C0458
[GetNmCaching] NM caching Cfg:B OffData:80000062 IntLv:458
[GetNmCaching] NM caching Cfg:B OffData:80000062 IntLv:40458
[GetNmCaching] NM caching Cfg:B OffData:80000062 IntLv:80458
[GetNmCaching] NM caching Cfg:B OffData:80000062 IntLv:C0458
[GetNmCaching] NM caching Cfg:B OffData:80000062 IntLv:100458
[GetNmCaching] NM caching Cfg:B OffData:80000062 IntLv:140458
[GetNmCaching] NM caching Cfg:B OffData:80000062 IntLv:180458
[GetNmCaching] NM caching Cfg:B OffData:80000062 IntLv:1C0458
[GetNmCaching] NM caching Cfg:B OffData:80000082 IntLv:458
[GetNmCaching] NM caching Cfg:B OffData:80000082 IntLv:40458
[GetNmCaching] NM caching Cfg:B OffData:80000082 IntLv:80458
[GetNmCaching] NM caching Cfg:B OffData:80000082 IntLv:C0458
[GetNmCaching] NM caching Cfg:B OffData:80000082 IntLv:100458
[GetNmCaching] NM caching Cfg:B OffData:80000082 IntLv:140458
[GetNmCaching] NM caching Cfg:B OffData:80000082 IntLv:180458
[GetNmCaching] NM caching Cfg:B OffData:80000082 IntLv:1C0458
[GetNmCaching] NM caching Cfg:B OffData:800000A2 IntLv:458
[GetNmCaching] NM caching Cfg:B OffData:800000A2 IntLv:40458
[GetNmCaching] NM caching Cfg:B OffData:800000A2 IntLv:80458
[GetNmCaching] NM caching Cfg:B OffData:800000A2 IntLv:C0458
[GetNmCaching] NM caching Cfg:B OffData:800000A2 IntLv:100458
[GetNmCaching] NM caching Cfg:B OffData:800000A2 IntLv:140458
[GetNmCaching] NM caching Cfg:B OffData:800000A2 IntLv:180458
[GetNmCaching] NM caching Cfg:B OffData:800000A2 IntLv:1C0458
[GetNmCaching] NM caching Cfg:B OffData:800000C2 IntLv:458
[GetNmCaching] NM caching Cfg:B OffData:800000C2 IntLv:40458
[GetNmCaching] NM caching Cfg:B OffData:800000C2 IntLv:80458
[GetNmCaching] NM caching Cfg:B OffData:800000C2 IntLv:C0458
[GetNmCaching] NM caching Cfg:B OffData:800000C2 IntLv:100458
[GetNmCaching] NM caching Cfg:B OffData:800000C2 IntLv:140458
[GetNmCaching] NM caching Cfg:B OffData:800000C2 IntLv:180458
[GetNmCaching] NM caching Cfg:B OffData:800000C2 IntLv:1C0458
[GetNmCaching] NM caching Cfg:B OffData:800000E2 IntLv:458
[GetNmCaching] NM caching Cfg:B OffData:800000E2 IntLv:40458
[GetNmCaching] NM caching Cfg:B OffData:800000E2 IntLv:80458
[GetNmCaching] NM caching Cfg:B OffData:800000E2 IntLv:C0458
[GetNmCaching] NM caching Cfg:B OffData:800000E2 IntLv:100458
[GetNmCaching] NM caching Cfg:B OffData:800000E2 IntLv:140458
[GetNmCaching] NM caching Cfg:B OffData:800000E2 IntLv:180458
[GetNmCaching] NM caching Cfg:B OffData:800000E2 IntLv:1C0458
PROGRESS CODE: V03070003 I0
PDB = c:\efi\servergen2\intel\Build\EagleStreamRpPkg\DEBUG_VS2015x86\X64\SmmRuntimeUpdateFeaturePkg\SmmRuntimeUpdate\SmmCodeInjection\DEBUG\SmmRuntimUpdate.pdb
PROGRESS CODE: V03070002 I0
PROGRESS CODE: V03070003 I0
PDB = c:\efi\servergen2\intel\Build\EagleStreamRpPkg\DEBUG_VS2015x86\X64\ServerSiliconPkg\Universal\Dxe\PmemResetNotify\PmemResetNotifySmm\DEBUG\PmemResetNotifySmm.pdb
PROGRESS CODE: V03070002 I0
[PMem](SMM) PMem Always-ON 12v support disabled
[PMem](SMM) PMem reset notification driver init failed (status Aborted)
Error: SMM image at 0007EC2D000 start failed: Aborted
PROGRESS CODE: V03070003 I0
PDB = c:\efi\servergen2\intel\Build\EagleStreamRpPkg\DEBUG_VS2015x86\X64\MdeModulePkg\Universal\FaultTolerantWriteDxe\FaultTolerantWriteSmm\DEBUG\SmmFaultTolerantWriteDxe.pdb
PROGRESS CODE: V03070002 I0
PROGRESS CODE: V03070003 I0
PDB = c:\efi\servergen2\intel\Build\EagleStreamRpPkg\DEBUG_VS2015x86\X64\ServerSiliconPkg\Cpu\SiCpuInit\Dxe\SiCpuInitDxe\DEBUG\SiCpuInitDxe.pdb
PROGRESS CODE: V03040002 I0
GetProcessorInfo - Index - 0
GetProcessorInfo - ProcessorId - 0000000000000000
GetProcessorInfo - StatusFlag - 00000007
GetProcessorInfo - Location.Package - 00000000
GetProcessorInfo - Location.Core - 00000000
GetProcessorInfo - Location.Thread - 00000000
GetProcessorInfo - Location2.Package - 00000000
GetProcessorInfo - Location2.Die - 00000000
GetProcessorInfo - Location2.Tile - 00000000
GetProcessorInfo - Location2.Module - 00000000
GetProcessorInfo - Location2.Core - 00000000
GetProcessorInfo - Location2.Thread - 00000000
GetProcessorInfo - Index - 1
GetProcessorInfo - ProcessorId - 0000000000000001
GetProcessorInfo - StatusFlag - 00000006
GetProcessorInfo - Location.Package - 00000000
GetProcessorInfo - Location.Core - 00000000
GetProcessorInfo - Location.Thread - 00000001
GetProcessorInfo - Location2.Package - 00000000
GetProcessorInfo - Location2.Die - 00000000
GetProcessorInfo - Location2.Tile - 00000000
GetProcessorInfo - Location2.Module - 00000000
GetProcessorInfo - Location2.Core - 00000000
GetProcessorInfo - Location2.Thread - 00000001
GetProcessorInfo - Index - 2
GetProcessorInfo - ProcessorId - 0000000000000002
GetProcessorInfo - StatusFlag - 00000006
GetProcessorInfo - Location.Package - 00000000
GetProcessorInfo - Location.Core - 00000001
GetProcessorInfo - Location.Thread - 00000000
GetProcessorInfo - Location2.Package - 00000000
GetProcessorInfo - Location2.Die - 00000000
GetProcessorInfo - Location2.Tile - 00000000
GetProcessorInfo - Location2.Module - 00000000
GetProcessorInfo - Location2.Core - 00000001
GetProcessorInfo - Location2.Thread - 00000000
GetProcessorInfo - Index - 3
GetProcessorInfo - ProcessorId - 0000000000000003
GetProcessorInfo - StatusFlag - 00000006
GetProcessorInfo - Location.Package - 00000000
GetProcessorInfo - Location.Core - 00000001
GetProcessorInfo - Location.Thread - 00000001
GetProcessorInfo - Location2.Package - 00000000
GetProcessorInfo - Location2.Die - 00000000
GetProcessorInfo - Location2.Tile - 00000000
GetProcessorInfo - Location2.Module - 00000000
GetProcessorInfo - Location2.Core - 00000001
GetProcessorInfo - Location2.Thread - 00000001
GetProcessorInfo - Index - 4
GetProcessorInfo - ProcessorId - 0000000000000004
GetProcessorInfo - StatusFlag - 00000006
GetProcessorInfo - Location.Package - 00000000
GetProcessorInfo - Location.Core - 00000002
GetProcessorInfo - Location.Thread - 00000000
GetProcessorInfo - Location2.Package - 00000000
GetProcessorInfo - Location2.Die - 00000000
GetProcessorInfo - Location2.Tile - 00000000
GetProcessorInfo - Location2.Module - 00000000
GetProcessorInfo - Location2.Core - 00000002
GetProcessorInfo - Location2.Thread - 00000000
GetProcessorInfo - Index - 5
GetProcessorInfo - ProcessorId - 0000000000000005
GetProcessorInfo - StatusFlag - 00000006
GetProcessorInfo - Location.Package - 00000000
GetProcessorInfo - Location.Core - 00000002
GetProcessorInfo - Location.Thread - 00000001
GetProcessorInfo - Location2.Package - 00000000
GetProcessorInfo - Location2.Die - 00000000
GetProcessorInfo - Location2.Tile - 00000000
GetProcessorInfo - Location2.Module - 00000000
GetProcessorInfo - Location2.Core - 00000002
GetProcessorInfo - Location2.Thread - 00000001
GetProcessorInfo - Index - 6
GetProcessorInfo - ProcessorId - 0000000000000006
GetProcessorInfo - StatusFlag - 00000006
GetProcessorInfo - Location.Package - 00000000
GetProcessorInfo - Location.Core - 00000003
GetProcessorInfo - Location.Thread - 00000000
GetProcessorInfo - Location2.Package - 00000000
GetProcessorInfo - Location2.Die - 00000000
GetProcessorInfo - Location2.Tile - 00000000
GetProcessorInfo - Location2.Module - 00000000
GetProcessorInfo - Location2.Core - 00000003
GetProcessorInfo - Location2.Thread - 00000000
GetProcessorInfo - Index - 7
GetProcessorInfo - ProcessorId - 0000000000000007
GetProcessorInfo - StatusFlag - 00000006
GetProcessorInfo - Location.Package - 00000000
GetProcessorInfo - Location.Core - 00000003
GetProcessorInfo - Location.Thread - 00000001
GetProcessorInfo - Location2.Package - 00000000
GetProcessorInfo - Location2.Die - 00000000
GetProcessorInfo - Location2.Tile - 00000000
GetProcessorInfo - Location2.Module - 00000000
GetProcessorInfo - Location2.Core - 00000003
GetProcessorInfo - Location2.Thread - 00000001
GetProcessorInfo - Index - 8
GetProcessorInfo - ProcessorId - 0000000000000008
GetProcessorInfo - StatusFlag - 00000006
GetProcessorInfo - Location.Package - 00000000
GetProcessorInfo - Location.Core - 00000004
GetProcessorInfo - Location.Thread - 00000000
GetProcessorInfo - Location2.Package - 00000000
GetProcessorInfo - Location2.Die - 00000000
GetProcessorInfo - Location2.Tile - 00000000
GetProcessorInfo - Location2.Module - 00000000
GetProcessorInfo - Location2.Core - 00000004
GetProcessorInfo - Location2.Thread - 00000000
GetProcessorInfo - Index - 9
GetProcessorInfo - ProcessorId - 0000000000000009
GetProcessorInfo - StatusFlag - 00000006
GetProcessorInfo - Location.Package - 00000000
GetProcessorInfo - Location.Core - 00000004
GetProcessorInfo - Location.Thread - 00000001
GetProcessorInfo - Location2.Package - 00000000
GetProcessorInfo - Location2.Die - 00000000
GetProcessorInfo - Location2.Tile - 00000000
GetProcessorInfo - Location2.Module - 00000000
GetProcessorInfo - Location2.Core - 00000004
GetProcessorInfo - Location2.Thread - 00000001
GetProcessorInfo - Index - A
GetProcessorInfo - ProcessorId - 000000000000000A
GetProcessorInfo - StatusFlag - 00000006
GetProcessorInfo - Location.Package - 00000000
GetProcessorInfo - Location.Core - 00000005
GetProcessorInfo - Location.Thread - 00000000
GetProcessorInfo - Location2.Package - 00000000
GetProcessorInfo - Location2.Die - 00000000
GetProcessorInfo - Location2.Tile - 00000000
GetProcessorInfo - Location2.Module - 00000000
GetProcessorInfo - Location2.Core - 00000005
GetProcessorInfo - Location2.Thread - 00000000
GetProcessorInfo - Index - B
GetProcessorInfo - ProcessorId - 000000000000000B
GetProcessorInfo - StatusFlag - 00000006
GetProcessorInfo - Location.Package - 00000000
GetProcessorInfo - Location.Core - 00000005
GetProcessorInfo - Location.Thread - 00000001
GetProcessorInfo - Location2.Package - 00000000
GetProcessorInfo - Location2.Die - 00000000
GetProcessorInfo - Location2.Tile - 00000000
GetProcessorInfo - Location2.Module - 00000000
GetProcessorInfo - Location2.Core - 00000005
GetProcessorInfo - Location2.Thread - 00000001
GetProcessorInfo - Index - C
GetProcessorInfo - ProcessorId - 000000000000000C
GetProcessorInfo - StatusFlag - 00000006
GetProcessorInfo - Location.Package - 00000000
GetProcessorInfo - Location.Core - 00000006
GetProcessorInfo - Location.Thread - 00000000
GetProcessorInfo - Location2.Package - 00000000
GetProcessorInfo - Location2.Die - 00000000
GetProcessorInfo - Location2.Tile - 00000000
GetProcessorInfo - Location2.Module - 00000000
GetProcessorInfo - Location2.Core - 00000006
GetProcessorInfo - Location2.Thread - 00000000
GetProcessorInfo - Index - D
GetProcessorInfo - ProcessorId - 000000000000000D
GetProcessorInfo - StatusFlag - 00000006
GetProcessorInfo - Location.Package - 00000000
GetProcessorInfo - Location.Core - 00000006
GetProcessorInfo - Location.Thread - 00000001
GetProcessorInfo - Location2.Package - 00000000
GetProcessorInfo - Location2.Die - 00000000
GetProcessorInfo - Location2.Tile - 00000000
GetProcessorInfo - Location2.Module - 00000000
GetProcessorInfo - Location2.Core - 00000006
GetProcessorInfo - Location2.Thread - 00000001
GetProcessorInfo - Index - E
GetProcessorInfo - ProcessorId - 000000000000000E
GetProcessorInfo - StatusFlag - 00000006
GetProcessorInfo - Location.Package - 00000000
GetProcessorInfo - Location.Core - 00000007
GetProcessorInfo - Location.Thread - 00000000
GetProcessorInfo - Location2.Package - 00000000
GetProcessorInfo - Location2.Die - 00000000
GetProcessorInfo - Location2.Tile - 00000000
GetProcessorInfo - Location2.Module - 00000000
GetProcessorInfo - Location2.Core - 00000007
GetProcessorInfo - Location2.Thread - 00000000
GetProcessorInfo - Index - F
GetProcessorInfo - ProcessorId - 000000000000000F
GetProcessorInfo - StatusFlag - 00000006
GetProcessorInfo - Location.Package - 00000000
GetProcessorInfo - Location.Core - 00000007
GetProcessorInfo - Location.Thread - 00000001
GetProcessorInfo - Location2.Package - 00000000
GetProcessorInfo - Location2.Die - 00000000
GetProcessorInfo - Location2.Tile - 00000000
GetProcessorInfo - Location2.Module - 00000000
GetProcessorInfo - Location2.Core - 00000007
GetProcessorInfo - Location2.Thread - 00000001
GetProcessorInfo - Index - 10
GetProcessorInfo - ProcessorId - 0000000000000010
GetProcessorInfo - StatusFlag - 00000006
GetProcessorInfo - Location.Package - 00000000
GetProcessorInfo - Location.Core - 00000008
GetProcessorInfo - Location.Thread - 00000000
GetProcessorInfo - Location2.Package - 00000000
GetProcessorInfo - Location2.Die - 00000000
GetProcessorInfo - Location2.Tile - 00000000
GetProcessorInfo - Location2.Module - 00000000
GetProcessorInfo - Location2.Core - 00000008
GetProcessorInfo - Location2.Thread - 00000000
GetProcessorInfo - Index - 11
GetProcessorInfo - ProcessorId - 0000000000000011
GetProcessorInfo - StatusFlag - 00000006
GetProcessorInfo - Location.Package - 00000000
GetProcessorInfo - Location.Core - 00000008
GetProcessorInfo - Location.Thread - 00000001
GetProcessorInfo - Location2.Package - 00000000
GetProcessorInfo - Location2.Die - 00000000
GetProcessorInfo - Location2.Tile - 00000000
GetProcessorInfo - Location2.Module - 00000000
GetProcessorInfo - Location2.Core - 00000008
GetProcessorInfo - Location2.Thread - 00000001
GetProcessorInfo - Index - 12
GetProcessorInfo - ProcessorId - 0000000000000012
GetProcessorInfo - StatusFlag - 00000006
GetProcessorInfo - Location.Package - 00000000
GetProcessorInfo - Location.Core - 00000009
GetProcessorInfo - Location.Thread - 00000000
GetProcessorInfo - Location2.Package - 00000000
GetProcessorInfo - Location2.Die - 00000000
GetProcessorInfo - Location2.Tile - 00000000
GetProcessorInfo - Location2.Module - 00000000
GetProcessorInfo - Location2.Core - 00000009
GetProcessorInfo - Location2.Thread - 00000000
GetProcessorInfo - Index - 13
GetProcessorInfo - ProcessorId - 0000000000000013
GetProcessorInfo - StatusFlag - 00000006
GetProcessorInfo - Location.Package - 00000000
GetProcessorInfo - Location.Core - 00000009
GetProcessorInfo - Location.Thread - 00000001
GetProcessorInfo - Location2.Package - 00000000
GetProcessorInfo - Location2.Die - 00000000
GetProcessorInfo - Location2.Tile - 00000000
GetProcessorInfo - Location2.Module - 00000000
GetProcessorInfo - Location2.Core - 00000009
GetProcessorInfo - Location2.Thread - 00000001
GetProcessorInfo - Index - 14
GetProcessorInfo - ProcessorId - 0000000000000014
GetProcessorInfo - StatusFlag - 00000006
GetProcessorInfo - Location.Package - 00000000
GetProcessorInfo - Location.Core - 0000000A
GetProcessorInfo - Location.Thread - 00000000
GetProcessorInfo - Location2.Package - 00000000
GetProcessorInfo - Location2.Die - 00000000
GetProcessorInfo - Location2.Tile - 00000000
GetProcessorInfo - Location2.Module - 00000000
GetProcessorInfo - Location2.Core - 0000000A
GetProcessorInfo - Location2.Thread - 00000000
GetProcessorInfo - Index - 15
GetProcessorInfo - ProcessorId - 0000000000000015
GetProcessorInfo - StatusFlag - 00000006
GetProcessorInfo - Location.Package - 00000000
GetProcessorInfo - Location.Core - 0000000A
GetProcessorInfo - Location.Thread - 00000001
GetProcessorInfo - Location2.Package - 00000000
GetProcessorInfo - Location2.Die - 00000000
GetProcessorInfo - Location2.Tile - 00000000
GetProcessorInfo - Location2.Module - 00000000
GetProcessorInfo - Location2.Core - 0000000A
GetProcessorInfo - Location2.Thread - 00000001
GetProcessorInfo - Index - 16
GetProcessorInfo - ProcessorId - 0000000000000016
GetProcessorInfo - StatusFlag - 00000006
GetProcessorInfo - Location.Package - 00000000
GetProcessorInfo - Location.Core - 0000000B
GetProcessorInfo - Location.Thread - 00000000
GetProcessorInfo - Location2.Package - 00000000
GetProcessorInfo - Location2.Die - 00000000
GetProcessorInfo - Location2.Tile - 00000000
GetProcessorInfo - Location2.Module - 00000000
GetProcessorInfo - Location2.Core - 0000000B
GetProcessorInfo - Location2.Thread - 00000000
GetProcessorInfo - Index - 17
GetProcessorInfo - ProcessorId - 0000000000000017
GetProcessorInfo - StatusFlag - 00000006
GetProcessorInfo - Location.Package - 00000000
GetProcessorInfo - Location.Core - 0000000B
GetProcessorInfo - Location.Thread - 00000001
GetProcessorInfo - Location2.Package - 00000000
GetProcessorInfo - Location2.Die - 00000000
GetProcessorInfo - Location2.Tile - 00000000
GetProcessorInfo - Location2.Module - 00000000
GetProcessorInfo - Location2.Core - 0000000B
GetProcessorInfo - Location2.Thread - 00000001
GetProcessorInfo - Index - 18
GetProcessorInfo - ProcessorId - 0000000000000018
GetProcessorInfo - StatusFlag - 00000006
GetProcessorInfo - Location.Package - 00000000
GetProcessorInfo - Location.Core - 0000000C
GetProcessorInfo - Location.Thread - 00000000
GetProcessorInfo - Location2.Package - 00000000
GetProcessorInfo - Location2.Die - 00000000
GetProcessorInfo - Location2.Tile - 00000000
GetProcessorInfo - Location2.Module - 00000000
GetProcessorInfo - Location2.Core - 0000000C
GetProcessorInfo - Location2.Thread - 00000000
GetProcessorInfo - Index - 19
GetProcessorInfo - ProcessorId - 0000000000000019
GetProcessorInfo - StatusFlag - 00000006
GetProcessorInfo - Location.Package - 00000000
GetProcessorInfo - Location.Core - 0000000C
GetProcessorInfo - Location.Thread - 00000001
GetProcessorInfo - Location2.Package - 00000000
GetProcessorInfo - Location2.Die - 00000000
GetProcessorInfo - Location2.Tile - 00000000
GetProcessorInfo - Location2.Module - 00000000
GetProcessorInfo - Location2.Core - 0000000C
GetProcessorInfo - Location2.Thread - 00000001
GetProcessorInfo - Index - 1A
GetProcessorInfo - ProcessorId - 000000000000001A
GetProcessorInfo - StatusFlag - 00000006
GetProcessorInfo - Location.Package - 00000000
GetProcessorInfo - Location.Core - 0000000D
GetProcessorInfo - Location.Thread - 00000000
GetProcessorInfo - Location2.Package - 00000000
GetProcessorInfo - Location2.Die - 00000000
GetProcessorInfo - Location2.Tile - 00000000
GetProcessorInfo - Location2.Module - 00000000
GetProcessorInfo - Location2.Core - 0000000D
GetProcessorInfo - Location2.Thread - 00000000
GetProcessorInfo - Index - 1B
GetProcessorInfo - ProcessorId - 000000000000001B
GetProcessorInfo - StatusFlag - 00000006
GetProcessorInfo - Location.Package - 00000000
GetProcessorInfo - Location.Core - 0000000D
GetProcessorInfo - Location.Thread - 00000001
GetProcessorInfo - Location2.Package - 00000000
GetProcessorInfo - Location2.Die - 00000000
GetProcessorInfo - Location2.Tile - 00000000
GetProcessorInfo - Location2.Module - 00000000
GetProcessorInfo - Location2.Core - 0000000D
GetProcessorInfo - Location2.Thread - 00000001
GetProcessorInfo - Index - 1C
GetProcessorInfo - ProcessorId - 000000000000001C
GetProcessorInfo - StatusFlag - 00000006
GetProcessorInfo - Location.Package - 00000000
GetProcessorInfo - Location.Core - 0000000E
GetProcessorInfo - Location.Thread - 00000000
GetProcessorInfo - Location2.Package - 00000000
GetProcessorInfo - Location2.Die - 00000000
GetProcessorInfo - Location2.Tile - 00000000
GetProcessorInfo - Location2.Module - 00000000
GetProcessorInfo - Location2.Core - 0000000E
GetProcessorInfo - Location2.Thread - 00000000
GetProcessorInfo - Index - 1D
GetProcessorInfo - ProcessorId - 000000000000001D
GetProcessorInfo - StatusFlag - 00000006
GetProcessorInfo - Location.Package - 00000000
GetProcessorInfo - Location.Core - 0000000E
GetProcessorInfo - Location.Thread - 00000001
GetProcessorInfo - Location2.Package - 00000000
GetProcessorInfo - Location2.Die - 00000000
GetProcessorInfo - Location2.Tile - 00000000
GetProcessorInfo - Location2.Module - 00000000
GetProcessorInfo - Location2.Core - 0000000E
GetProcessorInfo - Location2.Thread - 00000001
GetProcessorInfo - Index - 1E
GetProcessorInfo - ProcessorId - 000000000000001E
GetProcessorInfo - StatusFlag - 00000006
GetProcessorInfo - Location.Package - 00000000
GetProcessorInfo - Location.Core - 0000000F
GetProcessorInfo - Location.Thread - 00000000
GetProcessorInfo - Location2.Package - 00000000
GetProcessorInfo - Location2.Die - 00000000
GetProcessorInfo - Location2.Tile - 00000000
GetProcessorInfo - Location2.Module - 00000000
GetProcessorInfo - Location2.Core - 0000000F
GetProcessorInfo - Location2.Thread - 00000000
GetProcessorInfo - Index - 1F
GetProcessorInfo - ProcessorId - 000000000000001F
GetProcessorInfo - StatusFlag - 00000006
GetProcessorInfo - Location.Package - 00000000
GetProcessorInfo - Location.Core - 0000000F
GetProcessorInfo - Location.Thread - 00000001
GetProcessorInfo - Location2.Package - 00000000
GetProcessorInfo - Location2.Die - 00000000
GetProcessorInfo - Location2.Tile - 00000000
GetProcessorInfo - Location2.Module - 00000000
GetProcessorInfo - Location2.Core - 0000000F
GetProcessorInfo - Location2.Thread - 00000001
GetProcessorInfo - Index - 20
GetProcessorInfo - ProcessorId - 0000000000000020
GetProcessorInfo - StatusFlag - 00000006
GetProcessorInfo - Location.Package - 00000000
GetProcessorInfo - Location.Core - 00000010
GetProcessorInfo - Location.Thread - 00000000
GetProcessorInfo - Location2.Package - 00000000
GetProcessorInfo - Location2.Die - 00000000
GetProcessorInfo - Location2.Tile - 00000000
GetProcessorInfo - Location2.Module - 00000000
GetProcessorInfo - Location2.Core - 00000010
GetProcessorInfo - Location2.Thread - 00000000
GetProcessorInfo - Index - 21
GetProcessorInfo - ProcessorId - 0000000000000021
GetProcessorInfo - StatusFlag - 00000006
GetProcessorInfo - Location.Package - 00000000
GetProcessorInfo - Location.Core - 00000010
GetProcessorInfo - Location.Thread - 00000001
GetProcessorInfo - Location2.Package - 00000000
GetProcessorInfo - Location2.Die - 00000000
GetProcessorInfo - Location2.Tile - 00000000
GetProcessorInfo - Location2.Module - 00000000
GetProcessorInfo - Location2.Core - 00000010
GetProcessorInfo - Location2.Thread - 00000001
GetProcessorInfo - Index - 22
GetProcessorInfo - ProcessorId - 0000000000000022
GetProcessorInfo - StatusFlag - 00000006
GetProcessorInfo - Location.Package - 00000000
GetProcessorInfo - Location.Core - 00000011
GetProcessorInfo - Location.Thread - 00000000
GetProcessorInfo - Location2.Package - 00000000
GetProcessorInfo - Location2.Die - 00000000
GetProcessorInfo - Location2.Tile - 00000000
GetProcessorInfo - Location2.Module - 00000000
GetProcessorInfo - Location2.Core - 00000011
GetProcessorInfo - Location2.Thread - 00000000
GetProcessorInfo - Index - 23
GetProcessorInfo - ProcessorId - 0000000000000023
GetProcessorInfo - StatusFlag - 00000006
GetProcessorInfo - Location.Package - 00000000
GetProcessorInfo - Location.Core - 00000011
GetProcessorInfo - Location.Thread - 00000001
GetProcessorInfo - Location2.Package - 00000000
GetProcessorInfo - Location2.Die - 00000000
GetProcessorInfo - Location2.Tile - 00000000
GetProcessorInfo - Location2.Module - 00000000
GetProcessorInfo - Location2.Core - 00000011
GetProcessorInfo - Location2.Thread - 00000001
GetProcessorInfo - Index - 24
GetProcessorInfo - ProcessorId - 0000000000000024
GetProcessorInfo - StatusFlag - 00000006
GetProcessorInfo - Location.Package - 00000000
GetProcessorInfo - Location.Core - 00000012
GetProcessorInfo - Location.Thread - 00000000
GetProcessorInfo - Location2.Package - 00000000
GetProcessorInfo - Location2.Die - 00000000
GetProcessorInfo - Location2.Tile - 00000000
GetProcessorInfo - Location2.Module - 00000000
GetProcessorInfo - Location2.Core - 00000012
GetProcessorInfo - Location2.Thread - 00000000
GetProcessorInfo - Index - 25
GetProcessorInfo - ProcessorId - 0000000000000025
GetProcessorInfo - StatusFlag - 00000006
GetProcessorInfo - Location.Package - 00000000
GetProcessorInfo - Location.Core - 00000012
GetProcessorInfo - Location.Thread - 00000001
GetProcessorInfo - Location2.Package - 00000000
GetProcessorInfo - Location2.Die - 00000000
GetProcessorInfo - Location2.Tile - 00000000
GetProcessorInfo - Location2.Module - 00000000
GetProcessorInfo - Location2.Core - 00000012
GetProcessorInfo - Location2.Thread - 00000001
GetProcessorInfo - Index - 26
GetProcessorInfo - ProcessorId - 0000000000000026
GetProcessorInfo - StatusFlag - 00000006
GetProcessorInfo - Location.Package - 00000000
GetProcessorInfo - Location.Core - 00000013
GetProcessorInfo - Location.Thread - 00000000
GetProcessorInfo - Location2.Package - 00000000
GetProcessorInfo - Location2.Die - 00000000
GetProcessorInfo - Location2.Tile - 00000000
GetProcessorInfo - Location2.Module - 00000000
GetProcessorInfo - Location2.Core - 00000013
GetProcessorInfo - Location2.Thread - 00000000
GetProcessorInfo - Index - 27
GetProcessorInfo - ProcessorId - 0000000000000027
GetProcessorInfo - StatusFlag - 00000006
GetProcessorInfo - Location.Package - 00000000
GetProcessorInfo - Location.Core - 00000013
GetProcessorInfo - Location.Thread - 00000001
GetProcessorInfo - Location2.Package - 00000000
GetProcessorInfo - Location2.Die - 00000000
GetProcessorInfo - Location2.Tile - 00000000
GetProcessorInfo - Location2.Module - 00000000
GetProcessorInfo - Location2.Core - 00000013
GetProcessorInfo - Location2.Thread - 00000001
GetProcessorInfo - Index - 28
GetProcessorInfo - ProcessorId - 0000000000000028
GetProcessorInfo - StatusFlag - 00000006
GetProcessorInfo - Location.Package - 00000000
GetProcessorInfo - Location.Core - 00000014
GetProcessorInfo - Location.Thread - 00000000
GetProcessorInfo - Location2.Package - 00000000
GetProcessorInfo - Location2.Die - 00000000
GetProcessorInfo - Location2.Tile - 00000000
GetProcessorInfo - Location2.Module - 00000000
GetProcessorInfo - Location2.Core - 00000014
GetProcessorInfo - Location2.Thread - 00000000
GetProcessorInfo - Index - 29
GetProcessorInfo - ProcessorId - 0000000000000029
GetProcessorInfo - StatusFlag - 00000006
GetProcessorInfo - Location.Package - 00000000
GetProcessorInfo - Location.Core - 00000014
GetProcessorInfo - Location.Thread - 00000001
GetProcessorInfo - Location2.Package - 00000000
GetProcessorInfo - Location2.Die - 00000000
GetProcessorInfo - Location2.Tile - 00000000
GetProcessorInfo - Location2.Module - 00000000
GetProcessorInfo - Location2.Core - 00000014
GetProcessorInfo - Location2.Thread - 00000001
GetProcessorInfo - Index - 2A
GetProcessorInfo - ProcessorId - 000000000000002A
GetProcessorInfo - StatusFlag - 00000006
GetProcessorInfo - Location.Package - 00000000
GetProcessorInfo - Location.Core - 00000015
GetProcessorInfo - Location.Thread - 00000000
GetProcessorInfo - Location2.Package - 00000000
GetProcessorInfo - Location2.Die - 00000000
GetProcessorInfo - Location2.Tile - 00000000
GetProcessorInfo - Location2.Module - 00000000
GetProcessorInfo - Location2.Core - 00000015
GetProcessorInfo - Location2.Thread - 00000000
GetProcessorInfo - Index - 2B
GetProcessorInfo - ProcessorId - 000000000000002B
GetProcessorInfo - StatusFlag - 00000006
GetProcessorInfo - Location.Package - 00000000
GetProcessorInfo - Location.Core - 00000015
GetProcessorInfo - Location.Thread - 00000001
GetProcessorInfo - Location2.Package - 00000000
GetProcessorInfo - Location2.Die - 00000000
GetProcessorInfo - Location2.Tile - 00000000
GetProcessorInfo - Location2.Module - 00000000
GetProcessorInfo - Location2.Core - 00000015
GetProcessorInfo - Location2.Thread - 00000001
GetProcessorInfo - Index - 2C
GetProcessorInfo - ProcessorId - 000000000000002C
GetProcessorInfo - StatusFlag - 00000006
GetProcessorInfo - Location.Package - 00000000
GetProcessorInfo - Location.Core - 00000016
GetProcessorInfo - Location.Thread - 00000000
GetProcessorInfo - Location2.Package - 00000000
GetProcessorInfo - Location2.Die - 00000000
GetProcessorInfo - Location2.Tile - 00000000
GetProcessorInfo - Location2.Module - 00000000
GetProcessorInfo - Location2.Core - 00000016
GetProcessorInfo - Location2.Thread - 00000000
GetProcessorInfo - Index - 2D
GetProcessorInfo - ProcessorId - 000000000000002D
GetProcessorInfo - StatusFlag - 00000006
GetProcessorInfo - Location.Package - 00000000
GetProcessorInfo - Location.Core - 00000016
GetProcessorInfo - Location.Thread - 00000001
GetProcessorInfo - Location2.Package - 00000000
GetProcessorInfo - Location2.Die - 00000000
GetProcessorInfo - Location2.Tile - 00000000
GetProcessorInfo - Location2.Module - 00000000
GetProcessorInfo - Location2.Core - 00000016
GetProcessorInfo - Location2.Thread - 00000001
GetProcessorInfo - Index - 2E
GetProcessorInfo - ProcessorId - 000000000000002E
GetProcessorInfo - StatusFlag - 00000006
GetProcessorInfo - Location.Package - 00000000
GetProcessorInfo - Location.Core - 00000017
GetProcessorInfo - Location.Thread - 00000000
GetProcessorInfo - Location2.Package - 00000000
GetProcessorInfo - Location2.Die - 00000000
GetProcessorInfo - Location2.Tile - 00000000
GetProcessorInfo - Location2.Module - 00000000
GetProcessorInfo - Location2.Core - 00000017
GetProcessorInfo - Location2.Thread - 00000000
GetProcessorInfo - Index - 2F
GetProcessorInfo - ProcessorId - 000000000000002F
GetProcessorInfo - StatusFlag - 00000006
GetProcessorInfo - Location.Package - 00000000
GetProcessorInfo - Location.Core - 00000017
GetProcessorInfo - Location.Thread - 00000001
GetProcessorInfo - Location2.Package - 00000000
GetProcessorInfo - Location2.Die - 00000000
GetProcessorInfo - Location2.Tile - 00000000
GetProcessorInfo - Location2.Module - 00000000
GetProcessorInfo - Location2.Core - 00000017
GetProcessorInfo - Location2.Thread - 00000001
GetProcessorInfo - Index - 30
GetProcessorInfo - ProcessorId - 0000000000000030
GetProcessorInfo - StatusFlag - 00000006
GetProcessorInfo - Location.Package - 00000000
GetProcessorInfo - Location.Core - 00000018
GetProcessorInfo - Location.Thread - 00000000
GetProcessorInfo - Location2.Package - 00000000
GetProcessorInfo - Location2.Die - 00000000
GetProcessorInfo - Location2.Tile - 00000000
GetProcessorInfo - Location2.Module - 00000000
GetProcessorInfo - Location2.Core - 00000018
GetProcessorInfo - Location2.Thread - 00000000
GetProcessorInfo - Index - 31
GetProcessorInfo - ProcessorId - 0000000000000031
GetProcessorInfo - StatusFlag - 00000006
GetProcessorInfo - Location.Package - 00000000
GetProcessorInfo - Location.Core - 00000018
GetProcessorInfo - Location.Thread - 00000001
GetProcessorInfo - Location2.Package - 00000000
GetProcessorInfo - Location2.Die - 00000000
GetProcessorInfo - Location2.Tile - 00000000
GetProcessorInfo - Location2.Module - 00000000
GetProcessorInfo - Location2.Core - 00000018
GetProcessorInfo - Location2.Thread - 00000001
GetProcessorInfo - Index - 32
GetProcessorInfo - ProcessorId - 0000000000000032
GetProcessorInfo - StatusFlag - 00000006
GetProcessorInfo - Location.Package - 00000000
GetProcessorInfo - Location.Core - 00000019
GetProcessorInfo - Location.Thread - 00000000
GetProcessorInfo - Location2.Package - 00000000
GetProcessorInfo - Location2.Die - 00000000
GetProcessorInfo - Location2.Tile - 00000000
GetProcessorInfo - Location2.Module - 00000000
GetProcessorInfo - Location2.Core - 00000019
GetProcessorInfo - Location2.Thread - 00000000
GetProcessorInfo - Index - 33
GetProcessorInfo - ProcessorId - 0000000000000033
GetProcessorInfo - StatusFlag - 00000006
GetProcessorInfo - Location.Package - 00000000
GetProcessorInfo - Location.Core - 00000019
GetProcessorInfo - Location.Thread - 00000001
GetProcessorInfo - Location2.Package - 00000000
GetProcessorInfo - Location2.Die - 00000000
GetProcessorInfo - Location2.Tile - 00000000
GetProcessorInfo - Location2.Module - 00000000
GetProcessorInfo - Location2.Core - 00000019
GetProcessorInfo - Location2.Thread - 00000001
GetProcessorInfo - Index - 34
GetProcessorInfo - ProcessorId - 0000000000000034
GetProcessorInfo - StatusFlag - 00000006
GetProcessorInfo - Location.Package - 00000000
GetProcessorInfo - Location.Core - 0000001A
GetProcessorInfo - Location.Thread - 00000000
GetProcessorInfo - Location2.Package - 00000000
GetProcessorInfo - Location2.Die - 00000000
GetProcessorInfo - Location2.Tile - 00000000
GetProcessorInfo - Location2.Module - 00000000
GetProcessorInfo - Location2.Core - 0000001A
GetProcessorInfo - Location2.Thread - 00000000
GetProcessorInfo - Index - 35
GetProcessorInfo - ProcessorId - 0000000000000035
GetProcessorInfo - StatusFlag - 00000006
GetProcessorInfo - Location.Package - 00000000
GetProcessorInfo - Location.Core - 0000001A
GetProcessorInfo - Location.Thread - 00000001
GetProcessorInfo - Location2.Package - 00000000
GetProcessorInfo - Location2.Die - 00000000
GetProcessorInfo - Location2.Tile - 00000000
GetProcessorInfo - Location2.Module - 00000000
GetProcessorInfo - Location2.Core - 0000001A
GetProcessorInfo - Location2.Thread - 00000001
GetProcessorInfo - Index - 36
GetProcessorInfo - ProcessorId - 0000000000000036
GetProcessorInfo - StatusFlag - 00000006
GetProcessorInfo - Location.Package - 00000000
GetProcessorInfo - Location.Core - 0000001B
GetProcessorInfo - Location.Thread - 00000000
GetProcessorInfo - Location2.Package - 00000000
GetProcessorInfo - Location2.Die - 00000000
GetProcessorInfo - Location2.Tile - 00000000
GetProcessorInfo - Location2.Module - 00000000
GetProcessorInfo - Location2.Core - 0000001B
GetProcessorInfo - Location2.Thread - 00000000
GetProcessorInfo - Index - 37
GetProcessorInfo - ProcessorId - 0000000000000037
GetProcessorInfo - StatusFlag - 00000006
GetProcessorInfo - Location.Package - 00000000
GetProcessorInfo - Location.Core - 0000001B
GetProcessorInfo - Location.Thread - 00000001
GetProcessorInfo - Location2.Package - 00000000
GetProcessorInfo - Location2.Die - 00000000
GetProcessorInfo - Location2.Tile - 00000000
GetProcessorInfo - Location2.Module - 00000000
GetProcessorInfo - Location2.Core - 0000001B
GetProcessorInfo - Location2.Thread - 00000001
GetProcessorInfo - Index - 38
GetProcessorInfo - ProcessorId - 0000000000000038
GetProcessorInfo - StatusFlag - 00000006
GetProcessorInfo - Location.Package - 00000000
GetProcessorInfo - Location.Core - 0000001C
GetProcessorInfo - Location.Thread - 00000000
GetProcessorInfo - Location2.Package - 00000000
GetProcessorInfo - Location2.Die - 00000000
GetProcessorInfo - Location2.Tile - 00000000
GetProcessorInfo - Location2.Module - 00000000
GetProcessorInfo - Location2.Core - 0000001C
GetProcessorInfo - Location2.Thread - 00000000
GetProcessorInfo - Index - 39
GetProcessorInfo - ProcessorId - 0000000000000039
GetProcessorInfo - StatusFlag - 00000006
GetProcessorInfo - Location.Package - 00000000
GetProcessorInfo - Location.Core - 0000001C
GetProcessorInfo - Location.Thread - 00000001
GetProcessorInfo - Location2.Package - 00000000
GetProcessorInfo - Location2.Die - 00000000
GetProcessorInfo - Location2.Tile - 00000000
GetProcessorInfo - Location2.Module - 00000000
GetProcessorInfo - Location2.Core - 0000001C
GetProcessorInfo - Location2.Thread - 00000001
GetProcessorInfo - Index - 3A
GetProcessorInfo - ProcessorId - 000000000000003A
GetProcessorInfo - StatusFlag - 00000006
GetProcessorInfo - Location.Package - 00000000
GetProcessorInfo - Location.Core - 0000001D
GetProcessorInfo - Location.Thread - 00000000
GetProcessorInfo - Location2.Package - 00000000
GetProcessorInfo - Location2.Die - 00000000
GetProcessorInfo - Location2.Tile - 00000000
GetProcessorInfo - Location2.Module - 00000000
GetProcessorInfo - Location2.Core - 0000001D
GetProcessorInfo - Location2.Thread - 00000000
GetProcessorInfo - Index - 3B
GetProcessorInfo - ProcessorId - 000000000000003B
GetProcessorInfo - StatusFlag - 00000006
GetProcessorInfo - Location.Package - 00000000
GetProcessorInfo - Location.Core - 0000001D
GetProcessorInfo - Location.Thread - 00000001
GetProcessorInfo - Location2.Package - 00000000
GetProcessorInfo - Location2.Die - 00000000
GetProcessorInfo - Location2.Tile - 00000000
GetProcessorInfo - Location2.Module - 00000000
GetProcessorInfo - Location2.Core - 0000001D
GetProcessorInfo - Location2.Thread - 00000001
GetProcessorInfo - Index - 3C
GetProcessorInfo - ProcessorId - 000000000000003C
GetProcessorInfo - StatusFlag - 00000006
GetProcessorInfo - Location.Package - 00000000
GetProcessorInfo - Location.Core - 0000001E
GetProcessorInfo - Location.Thread - 00000000
GetProcessorInfo - Location2.Package - 00000000
GetProcessorInfo - Location2.Die - 00000000
GetProcessorInfo - Location2.Tile - 00000000
GetProcessorInfo - Location2.Module - 00000000
GetProcessorInfo - Location2.Core - 0000001E
GetProcessorInfo - Location2.Thread - 00000000
GetProcessorInfo - Index - 3D
GetProcessorInfo - ProcessorId - 000000000000003D
GetProcessorInfo - StatusFlag - 00000006
GetProcessorInfo - Location.Package - 00000000
GetProcessorInfo - Location.Core - 0000001E
GetProcessorInfo - Location.Thread - 00000001
GetProcessorInfo - Location2.Package - 00000000
GetProcessorInfo - Location2.Die - 00000000
GetProcessorInfo - Location2.Tile - 00000000
GetProcessorInfo - Location2.Module - 00000000
GetProcessorInfo - Location2.Core - 0000001E
GetProcessorInfo - Location2.Thread - 00000001
GetProcessorInfo - Index - 3E
GetProcessorInfo - ProcessorId - 000000000000003E
GetProcessorInfo - StatusFlag - 00000006
GetProcessorInfo - Location.Package - 00000000
GetProcessorInfo - Location.Core - 0000001F
GetProcessorInfo - Location.Thread - 00000000
GetProcessorInfo - Location2.Package - 00000000
GetProcessorInfo - Location2.Die - 00000000
GetProcessorInfo - Location2.Tile - 00000000
GetProcessorInfo - Location2.Module - 00000000
GetProcessorInfo - Location2.Core - 0000001F
GetProcessorInfo - Location2.Thread - 00000000
GetProcessorInfo - Index - 3F
GetProcessorInfo - ProcessorId - 000000000000003F
GetProcessorInfo - StatusFlag - 00000006
GetProcessorInfo - Location.Package - 00000000
GetProcessorInfo - Location.Core - 0000001F
GetProcessorInfo - Location.Thread - 00000001
GetProcessorInfo - Location2.Package - 00000000
GetProcessorInfo - Location2.Die - 00000000
GetProcessorInfo - Location2.Tile - 00000000
GetProcessorInfo - Location2.Module - 00000000
GetProcessorInfo - Location2.Core - 0000001F
GetProcessorInfo - Location2.Thread - 00000001
GetProcessorInfo - Index - 40
GetProcessorInfo - ProcessorId - 0000000000000040
GetProcessorInfo - StatusFlag - 00000006
GetProcessorInfo - Location.Package - 00000000
GetProcessorInfo - Location.Core - 00000020
GetProcessorInfo - Location.Thread - 00000000
GetProcessorInfo - Location2.Package - 00000000
GetProcessorInfo - Location2.Die - 00000000
GetProcessorInfo - Location2.Tile - 00000000
GetProcessorInfo - Location2.Module - 00000000
GetProcessorInfo - Location2.Core - 00000020
GetProcessorInfo - Location2.Thread - 00000000
GetProcessorInfo - Index - 41
GetProcessorInfo - ProcessorId - 0000000000000041
GetProcessorInfo - StatusFlag - 00000006
GetProcessorInfo - Location.Package - 00000000
GetProcessorInfo - Location.Core - 00000020
GetProcessorInfo - Location.Thread - 00000001
GetProcessorInfo - Location2.Package - 00000000
GetProcessorInfo - Location2.Die - 00000000
GetProcessorInfo - Location2.Tile - 00000000
GetProcessorInfo - Location2.Module - 00000000
GetProcessorInfo - Location2.Core - 00000020
GetProcessorInfo - Location2.Thread - 00000001
GetProcessorInfo - Index - 42
GetProcessorInfo - ProcessorId - 0000000000000042
GetProcessorInfo - StatusFlag - 00000006
GetProcessorInfo - Location.Package - 00000000
GetProcessorInfo - Location.Core - 00000021
GetProcessorInfo - Location.Thread - 00000000
GetProcessorInfo - Location2.Package - 00000000
GetProcessorInfo - Location2.Die - 00000000
GetProcessorInfo - Location2.Tile - 00000000
GetProcessorInfo - Location2.Module - 00000000
GetProcessorInfo - Location2.Core - 00000021
GetProcessorInfo - Location2.Thread - 00000000
GetProcessorInfo - Index - 43
GetProcessorInfo - ProcessorId - 0000000000000043
GetProcessorInfo - StatusFlag - 00000006
GetProcessorInfo - Location.Package - 00000000
GetProcessorInfo - Location.Core - 00000021
GetProcessorInfo - Location.Thread - 00000001
GetProcessorInfo - Location2.Package - 00000000
GetProcessorInfo - Location2.Die - 00000000
GetProcessorInfo - Location2.Tile - 00000000
GetProcessorInfo - Location2.Module - 00000000
GetProcessorInfo - Location2.Core - 00000021
GetProcessorInfo - Location2.Thread - 00000001
GetProcessorInfo - Index - 44
GetProcessorInfo - ProcessorId - 0000000000000044
GetProcessorInfo - StatusFlag - 00000006
GetProcessorInfo - Location.Package - 00000000
GetProcessorInfo - Location.Core - 00000022
GetProcessorInfo - Location.Thread - 00000000
GetProcessorInfo - Location2.Package - 00000000
GetProcessorInfo - Location2.Die - 00000000
GetProcessorInfo - Location2.Tile - 00000000
GetProcessorInfo - Location2.Module - 00000000
GetProcessorInfo - Location2.Core - 00000022
GetProcessorInfo - Location2.Thread - 00000000
GetProcessorInfo - Index - 45
GetProcessorInfo - ProcessorId - 0000000000000045
GetProcessorInfo - StatusFlag - 00000006
GetProcessorInfo - Location.Package - 00000000
GetProcessorInfo - Location.Core - 00000022
GetProcessorInfo - Location.Thread - 00000001
GetProcessorInfo - Location2.Package - 00000000
GetProcessorInfo - Location2.Die - 00000000
GetProcessorInfo - Location2.Tile - 00000000
GetProcessorInfo - Location2.Module - 00000000
GetProcessorInfo - Location2.Core - 00000022
GetProcessorInfo - Location2.Thread - 00000001
GetProcessorInfo - Index - 46
GetProcessorInfo - ProcessorId - 0000000000000046
GetProcessorInfo - StatusFlag - 00000006
GetProcessorInfo - Location.Package - 00000000
GetProcessorInfo - Location.Core - 00000023
GetProcessorInfo - Location.Thread - 00000000
GetProcessorInfo - Location2.Package - 00000000
GetProcessorInfo - Location2.Die - 00000000
GetProcessorInfo - Location2.Tile - 00000000
GetProcessorInfo - Location2.Module - 00000000
GetProcessorInfo - Location2.Core - 00000023
GetProcessorInfo - Location2.Thread - 00000000
GetProcessorInfo - Index - 47
GetProcessorInfo - ProcessorId - 0000000000000047
GetProcessorInfo - StatusFlag - 00000006
GetProcessorInfo - Location.Package - 00000000
GetProcessorInfo - Location.Core - 00000023
GetProcessorInfo - Location.Thread - 00000001
GetProcessorInfo - Location2.Package - 00000000
GetProcessorInfo - Location2.Die - 00000000
GetProcessorInfo - Location2.Tile - 00000000
GetProcessorInfo - Location2.Module - 00000000
GetProcessorInfo - Location2.Core - 00000023
GetProcessorInfo - Location2.Thread - 00000001
GetProcessorInfo - Index - 48
GetProcessorInfo - ProcessorId - 0000000000000048
GetProcessorInfo - StatusFlag - 00000006
GetProcessorInfo - Location.Package - 00000000
GetProcessorInfo - Location.Core - 00000024
GetProcessorInfo - Location.Thread - 00000000
GetProcessorInfo - Location2.Package - 00000000
GetProcessorInfo - Location2.Die - 00000000
GetProcessorInfo - Location2.Tile - 00000000
GetProcessorInfo - Location2.Module - 00000000
GetProcessorInfo - Location2.Core - 00000024
GetProcessorInfo - Location2.Thread - 00000000
GetProcessorInfo - Index - 49
GetProcessorInfo - ProcessorId - 0000000000000049
GetProcessorInfo - StatusFlag - 00000006
GetProcessorInfo - Location.Package - 00000000
GetProcessorInfo - Location.Core - 00000024
GetProcessorInfo - Location.Thread - 00000001
GetProcessorInfo - Location2.Package - 00000000
GetProcessorInfo - Location2.Die - 00000000
GetProcessorInfo - Location2.Tile - 00000000
GetProcessorInfo - Location2.Module - 00000000
GetProcessorInfo - Location2.Core - 00000024
GetProcessorInfo - Location2.Thread - 00000001
GetProcessorInfo - Index - 4A
GetProcessorInfo - ProcessorId - 000000000000004A
GetProcessorInfo - StatusFlag - 00000006
GetProcessorInfo - Location.Package - 00000000
GetProcessorInfo - Location.Core - 00000025
GetProcessorInfo - Location.Thread - 00000000
GetProcessorInfo - Location2.Package - 00000000
GetProcessorInfo - Location2.Die - 00000000
GetProcessorInfo - Location2.Tile - 00000000
GetProcessorInfo - Location2.Module - 00000000
GetProcessorInfo - Location2.Core - 00000025
GetProcessorInfo - Location2.Thread - 00000000
GetProcessorInfo - Index - 4B
GetProcessorInfo - ProcessorId - 000000000000004B
GetProcessorInfo - StatusFlag - 00000006
GetProcessorInfo - Location.Package - 00000000
GetProcessorInfo - Location.Core - 00000025
GetProcessorInfo - Location.Thread - 00000001
GetProcessorInfo - Location2.Package - 00000000
GetProcessorInfo - Location2.Die - 00000000
GetProcessorInfo - Location2.Tile - 00000000
GetProcessorInfo - Location2.Module - 00000000
GetProcessorInfo - Location2.Core - 00000025
GetProcessorInfo - Location2.Thread - 00000001
GetProcessorInfo - Index - 4C
GetProcessorInfo - ProcessorId - 000000000000004C
GetProcessorInfo - StatusFlag - 00000006
GetProcessorInfo - Location.Package - 00000000
GetProcessorInfo - Location.Core - 00000026
GetProcessorInfo - Location.Thread - 00000000
GetProcessorInfo - Location2.Package - 00000000
GetProcessorInfo - Location2.Die - 00000000
GetProcessorInfo - Location2.Tile - 00000000
GetProcessorInfo - Location2.Module - 00000000
GetProcessorInfo - Location2.Core - 00000026
GetProcessorInfo - Location2.Thread - 00000000
GetProcessorInfo - Index - 4D
GetProcessorInfo - ProcessorId - 000000000000004D
GetProcessorInfo - StatusFlag - 00000006
GetProcessorInfo - Location.Package - 00000000
GetProcessorInfo - Location.Core - 00000026
GetProcessorInfo - Location.Thread - 00000001
GetProcessorInfo - Location2.Package - 00000000
GetProcessorInfo - Location2.Die - 00000000
GetProcessorInfo - Location2.Tile - 00000000
GetProcessorInfo - Location2.Module - 00000000
GetProcessorInfo - Location2.Core - 00000026
GetProcessorInfo - Location2.Thread - 00000001
GetProcessorInfo - Index - 4E
GetProcessorInfo - ProcessorId - 000000000000004E
GetProcessorInfo - StatusFlag - 00000006
GetProcessorInfo - Location.Package - 00000000
GetProcessorInfo - Location.Core - 00000027
GetProcessorInfo - Location.Thread - 00000000
GetProcessorInfo - Location2.Package - 00000000
GetProcessorInfo - Location2.Die - 00000000
GetProcessorInfo - Location2.Tile - 00000000
GetProcessorInfo - Location2.Module - 00000000
GetProcessorInfo - Location2.Core - 00000027
GetProcessorInfo - Location2.Thread - 00000000
GetProcessorInfo - Index - 4F
GetProcessorInfo - ProcessorId - 000000000000004F
GetProcessorInfo - StatusFlag - 00000006
GetProcessorInfo - Location.Package - 00000000
GetProcessorInfo - Location.Core - 00000027
GetProcessorInfo - Location.Thread - 00000001
GetProcessorInfo - Location2.Package - 00000000
GetProcessorInfo - Location2.Die - 00000000
GetProcessorInfo - Location2.Tile - 00000000
GetProcessorInfo - Location2.Module - 00000000
GetProcessorInfo - Location2.Core - 00000027
GetProcessorInfo - Location2.Thread - 00000001
GetProcessorInfo - Index - 50
GetProcessorInfo - ProcessorId - 0000000000000080
GetProcessorInfo - StatusFlag - 00000006
GetProcessorInfo - Location.Package - 00000001
GetProcessorInfo - Location.Core - 00000000
GetProcessorInfo - Location.Thread - 00000000
GetProcessorInfo - Location2.Package - 00000001
GetProcessorInfo - Location2.Die - 00000000
GetProcessorInfo - Location2.Tile - 00000000
GetProcessorInfo - Location2.Module - 00000000
GetProcessorInfo - Location2.Core - 00000000
GetProcessorInfo - Location2.Thread - 00000000
GetProcessorInfo - Index - 51
GetProcessorInfo - ProcessorId - 0000000000000081
GetProcessorInfo - StatusFlag - 00000006
GetProcessorInfo - Location.Package - 00000001
GetProcessorInfo - Location.Core - 00000000
GetProcessorInfo - Location.Thread - 00000001
GetProcessorInfo - Location2.Package - 00000001
GetProcessorInfo - Location2.Die - 00000000
GetProcessorInfo - Location2.Tile - 00000000
GetProcessorInfo - Location2.Module - 00000000
GetProcessorInfo - Location2.Core - 00000000
GetProcessorInfo - Location2.Thread - 00000001
GetProcessorInfo - Index - 52
GetProcessorInfo - ProcessorId - 0000000000000082
GetProcessorInfo - StatusFlag - 00000006
GetProcessorInfo - Location.Package - 00000001
GetProcessorInfo - Location.Core - 00000001
GetProcessorInfo - Location.Thread - 00000000
GetProcessorInfo - Location2.Package - 00000001
GetProcessorInfo - Location2.Die - 00000000
GetProcessorInfo - Location2.Tile - 00000000
GetProcessorInfo - Location2.Module - 00000000
GetProcessorInfo - Location2.Core - 00000001
GetProcessorInfo - Location2.Thread - 00000000
GetProcessorInfo - Index - 53
GetProcessorInfo - ProcessorId - 0000000000000083
GetProcessorInfo - StatusFlag - 00000006
GetProcessorInfo - Location.Package - 00000001
GetProcessorInfo - Location.Core - 00000001
GetProcessorInfo - Location.Thread - 00000001
GetProcessorInfo - Location2.Package - 00000001
GetProcessorInfo - Location2.Die - 00000000
GetProcessorInfo - Location2.Tile - 00000000
GetProcessorInfo - Location2.Module - 00000000
GetProcessorInfo - Location2.Core - 00000001
GetProcessorInfo - Location2.Thread - 00000001
GetProcessorInfo - Index - 54
GetProcessorInfo - ProcessorId - 0000000000000084
GetProcessorInfo - StatusFlag - 00000006
GetProcessorInfo - Location.Package - 00000001
GetProcessorInfo - Location.Core - 00000002
GetProcessorInfo - Location.Thread - 00000000
GetProcessorInfo - Location2.Package - 00000001
GetProcessorInfo - Location2.Die - 00000000
GetProcessorInfo - Location2.Tile - 00000000
GetProcessorInfo - Location2.Module - 00000000
GetProcessorInfo - Location2.Core - 00000002
GetProcessorInfo - Location2.Thread - 00000000
GetProcessorInfo - Index - 55
GetProcessorInfo - ProcessorId - 0000000000000085
GetProcessorInfo - StatusFlag - 00000006
GetProcessorInfo - Location.Package - 00000001
GetProcessorInfo - Location.Core - 00000002
GetProcessorInfo - Location.Thread - 00000001
GetProcessorInfo - Location2.Package - 00000001
GetProcessorInfo - Location2.Die - 00000000
GetProcessorInfo - Location2.Tile - 00000000
GetProcessorInfo - Location2.Module - 00000000
GetProcessorInfo - Location2.Core - 00000002
GetProcessorInfo - Location2.Thread - 00000001
GetProcessorInfo - Index - 56
GetProcessorInfo - ProcessorId - 0000000000000086
GetProcessorInfo - StatusFlag - 00000006
GetProcessorInfo - Location.Package - 00000001
GetProcessorInfo - Location.Core - 00000003
GetProcessorInfo - Location.Thread - 00000000
GetProcessorInfo - Location2.Package - 00000001
GetProcessorInfo - Location2.Die - 00000000
GetProcessorInfo - Location2.Tile - 00000000
GetProcessorInfo - Location2.Module - 00000000
GetProcessorInfo - Location2.Core - 00000003
GetProcessorInfo - Location2.Thread - 00000000
GetProcessorInfo - Index - 57
GetProcessorInfo - ProcessorId - 0000000000000087
GetProcessorInfo - StatusFlag - 00000006
GetProcessorInfo - Location.Package - 00000001
GetProcessorInfo - Location.Core - 00000003
GetProcessorInfo - Location.Thread - 00000001
GetProcessorInfo - Location2.Package - 00000001
GetProcessorInfo - Location2.Die - 00000000
GetProcessorInfo - Location2.Tile - 00000000
GetProcessorInfo - Location2.Module - 00000000
GetProcessorInfo - Location2.Core - 00000003
GetProcessorInfo - Location2.Thread - 00000001
GetProcessorInfo - Index - 58
GetProcessorInfo - ProcessorId - 0000000000000088
GetProcessorInfo - StatusFlag - 00000006
GetProcessorInfo - Location.Package - 00000001
GetProcessorInfo - Location.Core - 00000004
GetProcessorInfo - Location.Thread - 00000000
GetProcessorInfo - Location2.Package - 00000001
GetProcessorInfo - Location2.Die - 00000000
GetProcessorInfo - Location2.Tile - 00000000
GetProcessorInfo - Location2.Module - 00000000
GetProcessorInfo - Location2.Core - 00000004
GetProcessorInfo - Location2.Thread - 00000000
GetProcessorInfo - Index - 59
GetProcessorInfo - ProcessorId - 0000000000000089
GetProcessorInfo - StatusFlag - 00000006
GetProcessorInfo - Location.Package - 00000001
GetProcessorInfo - Location.Core - 00000004
GetProcessorInfo - Location.Thread - 00000001
GetProcessorInfo - Location2.Package - 00000001
GetProcessorInfo - Location2.Die - 00000000
GetProcessorInfo - Location2.Tile - 00000000
GetProcessorInfo - Location2.Module - 00000000
GetProcessorInfo - Location2.Core - 00000004
GetProcessorInfo - Location2.Thread - 00000001
GetProcessorInfo - Index - 5A
GetProcessorInfo - ProcessorId - 000000000000008A
GetProcessorInfo - StatusFlag - 00000006
GetProcessorInfo - Location.Package - 00000001
GetProcessorInfo - Location.Core - 00000005
GetProcessorInfo - Location.Thread - 00000000
GetProcessorInfo - Location2.Package - 00000001
GetProcessorInfo - Location2.Die - 00000000
GetProcessorInfo - Location2.Tile - 00000000
GetProcessorInfo - Location2.Module - 00000000
GetProcessorInfo - Location2.Core - 00000005
GetProcessorInfo - Location2.Thread - 00000000
GetProcessorInfo - Index - 5B
GetProcessorInfo - ProcessorId - 000000000000008B
GetProcessorInfo - StatusFlag - 00000006
GetProcessorInfo - Location.Package - 00000001
GetProcessorInfo - Location.Core - 00000005
GetProcessorInfo - Location.Thread - 00000001
GetProcessorInfo - Location2.Package - 00000001
GetProcessorInfo - Location2.Die - 00000000
GetProcessorInfo - Location2.Tile - 00000000
GetProcessorInfo - Location2.Module - 00000000
GetProcessorInfo - Location2.Core - 00000005
GetProcessorInfo - Location2.Thread - 00000001
GetProcessorInfo - Index - 5C
GetProcessorInfo - ProcessorId - 000000000000008C
GetProcessorInfo - StatusFlag - 00000006
GetProcessorInfo - Location.Package - 00000001
GetProcessorInfo - Location.Core - 00000006
GetProcessorInfo - Location.Thread - 00000000
GetProcessorInfo - Location2.Package - 00000001
GetProcessorInfo - Location2.Die - 00000000
GetProcessorInfo - Location2.Tile - 00000000
GetProcessorInfo - Location2.Module - 00000000
GetProcessorInfo - Location2.Core - 00000006
GetProcessorInfo - Location2.Thread - 00000000
GetProcessorInfo - Index - 5D
GetProcessorInfo - ProcessorId - 000000000000008D
GetProcessorInfo - StatusFlag - 00000006
GetProcessorInfo - Location.Package - 00000001
GetProcessorInfo - Location.Core - 00000006
GetProcessorInfo - Location.Thread - 00000001
GetProcessorInfo - Location2.Package - 00000001
GetProcessorInfo - Location2.Die - 00000000
GetProcessorInfo - Location2.Tile - 00000000
GetProcessorInfo - Location2.Module - 00000000
GetProcessorInfo - Location2.Core - 00000006
GetProcessorInfo - Location2.Thread - 00000001
GetProcessorInfo - Index - 5E
GetProcessorInfo - ProcessorId - 000000000000008E
GetProcessorInfo - StatusFlag - 00000006
GetProcessorInfo - Location.Package - 00000001
GetProcessorInfo - Location.Core - 00000007
GetProcessorInfo - Location.Thread - 00000000
GetProcessorInfo - Location2.Package - 00000001
GetProcessorInfo - Location2.Die - 00000000
GetProcessorInfo - Location2.Tile - 00000000
GetProcessorInfo - Location2.Module - 00000000
GetProcessorInfo - Location2.Core - 00000007
GetProcessorInfo - Location2.Thread - 00000000
GetProcessorInfo - Index - 5F
GetProcessorInfo - ProcessorId - 000000000000008F
GetProcessorInfo - StatusFlag - 00000006
GetProcessorInfo - Location.Package - 00000001
GetProcessorInfo - Location.Core - 00000007
GetProcessorInfo - Location.Thread - 00000001
GetProcessorInfo - Location2.Package - 00000001
GetProcessorInfo - Location2.Die - 00000000
GetProcessorInfo - Location2.Tile - 00000000
GetProcessorInfo - Location2.Module - 00000000
GetProcessorInfo - Location2.Core - 00000007
GetProcessorInfo - Location2.Thread - 00000001
GetProcessorInfo - Index - 60
GetProcessorInfo - ProcessorId - 0000000000000090
GetProcessorInfo - StatusFlag - 00000006
GetProcessorInfo - Location.Package - 00000001
GetProcessorInfo - Location.Core - 00000008
GetProcessorInfo - Location.Thread - 00000000
GetProcessorInfo - Location2.Package - 00000001
GetProcessorInfo - Location2.Die - 00000000
GetProcessorInfo - Location2.Tile - 00000000
GetProcessorInfo - Location2.Module - 00000000
GetProcessorInfo - Location2.Core - 00000008
GetProcessorInfo - Location2.Thread - 00000000
GetProcessorInfo - Index - 61
GetProcessorInfo - ProcessorId - 0000000000000091
GetProcessorInfo - StatusFlag - 00000006
GetProcessorInfo - Location.Package - 00000001
GetProcessorInfo - Location.Core - 00000008
GetProcessorInfo - Location.Thread - 00000001
GetProcessorInfo - Location2.Package - 00000001
GetProcessorInfo - Location2.Die - 00000000
GetProcessorInfo - Location2.Tile - 00000000
GetProcessorInfo - Location2.Module - 00000000
GetProcessorInfo - Location2.Core - 00000008
GetProcessorInfo - Location2.Thread - 00000001
GetProcessorInfo - Index - 62
GetProcessorInfo - ProcessorId - 0000000000000092
GetProcessorInfo - StatusFlag - 00000006
GetProcessorInfo - Location.Package - 00000001
GetProcessorInfo - Location.Core - 00000009
GetProcessorInfo - Location.Thread - 00000000
GetProcessorInfo - Location2.Package - 00000001
GetProcessorInfo - Location2.Die - 00000000
GetProcessorInfo - Location2.Tile - 00000000
GetProcessorInfo - Location2.Module - 00000000
GetProcessorInfo - Location2.Core - 00000009
GetProcessorInfo - Location2.Thread - 00000000
GetProcessorInfo - Index - 63
GetProcessorInfo - ProcessorId - 0000000000000093
GetProcessorInfo - StatusFlag - 00000006
GetProcessorInfo - Location.Package - 00000001
GetProcessorInfo - Location.Core - 00000009
GetProcessorInfo - Location.Thread - 00000001
GetProcessorInfo - Location2.Package - 00000001
GetProcessorInfo - Location2.Die - 00000000
GetProcessorInfo - Location2.Tile - 00000000
GetProcessorInfo - Location2.Module - 00000000
GetProcessorInfo - Location2.Core - 00000009
GetProcessorInfo - Location2.Thread - 00000001
GetProcessorInfo - Index - 64
GetProcessorInfo - ProcessorId - 0000000000000094
GetProcessorInfo - StatusFlag - 00000006
GetProcessorInfo - Location.Package - 00000001
GetProcessorInfo - Location.Core - 0000000A
GetProcessorInfo - Location.Thread - 00000000
GetProcessorInfo - Location2.Package - 00000001
GetProcessorInfo - Location2.Die - 00000000
GetProcessorInfo - Location2.Tile - 00000000
GetProcessorInfo - Location2.Module - 00000000
GetProcessorInfo - Location2.Core - 0000000A
GetProcessorInfo - Location2.Thread - 00000000
GetProcessorInfo - Index - 65
GetProcessorInfo - ProcessorId - 0000000000000095
GetProcessorInfo - StatusFlag - 00000006
GetProcessorInfo - Location.Package - 00000001
GetProcessorInfo - Location.Core - 0000000A
GetProcessorInfo - Location.Thread - 00000001
GetProcessorInfo - Location2.Package - 00000001
GetProcessorInfo - Location2.Die - 00000000
GetProcessorInfo - Location2.Tile - 00000000
GetProcessorInfo - Location2.Module - 00000000
GetProcessorInfo - Location2.Core - 0000000A
GetProcessorInfo - Location2.Thread - 00000001
GetProcessorInfo - Index - 66
GetProcessorInfo - ProcessorId - 0000000000000096
GetProcessorInfo - StatusFlag - 00000006
GetProcessorInfo - Location.Package - 00000001
GetProcessorInfo - Location.Core - 0000000B
GetProcessorInfo - Location.Thread - 00000000
GetProcessorInfo - Location2.Package - 00000001
GetProcessorInfo - Location2.Die - 00000000
GetProcessorInfo - Location2.Tile - 00000000
GetProcessorInfo - Location2.Module - 00000000
GetProcessorInfo - Location2.Core - 0000000B
GetProcessorInfo - Location2.Thread - 00000000
GetProcessorInfo - Index - 67
GetProcessorInfo - ProcessorId - 0000000000000097
GetProcessorInfo - StatusFlag - 00000006
GetProcessorInfo - Location.Package - 00000001
GetProcessorInfo - Location.Core - 0000000B
GetProcessorInfo - Location.Thread - 00000001
GetProcessorInfo - Location2.Package - 00000001
GetProcessorInfo - Location2.Die - 00000000
GetProcessorInfo - Location2.Tile - 00000000
GetProcessorInfo - Location2.Module - 00000000
GetProcessorInfo - Location2.Core - 0000000B
GetProcessorInfo - Location2.Thread - 00000001
GetProcessorInfo - Index - 68
GetProcessorInfo - ProcessorId - 0000000000000098
GetProcessorInfo - StatusFlag - 00000006
GetProcessorInfo - Location.Package - 00000001
GetProcessorInfo - Location.Core - 0000000C
GetProcessorInfo - Location.Thread - 00000000
GetProcessorInfo - Location2.Package - 00000001
GetProcessorInfo - Location2.Die - 00000000
GetProcessorInfo - Location2.Tile - 00000000
GetProcessorInfo - Location2.Module - 00000000
GetProcessorInfo - Location2.Core - 0000000C
GetProcessorInfo - Location2.Thread - 00000000
GetProcessorInfo - Index - 69
GetProcessorInfo - ProcessorId - 0000000000000099
GetProcessorInfo - StatusFlag - 00000006
GetProcessorInfo - Location.Package - 00000001
GetProcessorInfo - Location.Core - 0000000C
GetProcessorInfo - Location.Thread - 00000001
GetProcessorInfo - Location2.Package - 00000001
GetProcessorInfo - Location2.Die - 00000000
GetProcessorInfo - Location2.Tile - 00000000
GetProcessorInfo - Location2.Module - 00000000
GetProcessorInfo - Location2.Core - 0000000C
GetProcessorInfo - Location2.Thread - 00000001
GetProcessorInfo - Index - 6A
GetProcessorInfo - ProcessorId - 000000000000009A
GetProcessorInfo - StatusFlag - 00000006
GetProcessorInfo - Location.Package - 00000001
GetProcessorInfo - Location.Core - 0000000D
GetProcessorInfo - Location.Thread - 00000000
GetProcessorInfo - Location2.Package - 00000001
GetProcessorInfo - Location2.Die - 00000000
GetProcessorInfo - Location2.Tile - 00000000
GetProcessorInfo - Location2.Module - 00000000
GetProcessorInfo - Location2.Core - 0000000D
GetProcessorInfo - Location2.Thread - 00000000
GetProcessorInfo - Index - 6B
GetProcessorInfo - ProcessorId - 000000000000009B
GetProcessorInfo - StatusFlag - 00000006
GetProcessorInfo - Location.Package - 00000001
GetProcessorInfo - Location.Core - 0000000D
GetProcessorInfo - Location.Thread - 00000001
GetProcessorInfo - Location2.Package - 00000001
GetProcessorInfo - Location2.Die - 00000000
GetProcessorInfo - Location2.Tile - 00000000
GetProcessorInfo - Location2.Module - 00000000
GetProcessorInfo - Location2.Core - 0000000D
GetProcessorInfo - Location2.Thread - 00000001
GetProcessorInfo - Index - 6C
GetProcessorInfo - ProcessorId - 000000000000009C
GetProcessorInfo - StatusFlag - 00000006
GetProcessorInfo - Location.Package - 00000001
GetProcessorInfo - Location.Core - 0000000E
GetProcessorInfo - Location.Thread - 00000000
GetProcessorInfo - Location2.Package - 00000001
GetProcessorInfo - Location2.Die - 00000000
GetProcessorInfo - Location2.Tile - 00000000
GetProcessorInfo - Location2.Module - 00000000
GetProcessorInfo - Location2.Core - 0000000E
GetProcessorInfo - Location2.Thread - 00000000
GetProcessorInfo - Index - 6D
GetProcessorInfo - ProcessorId - 000000000000009D
GetProcessorInfo - StatusFlag - 00000006
GetProcessorInfo - Location.Package - 00000001
GetProcessorInfo - Location.Core - 0000000E
GetProcessorInfo - Location.Thread - 00000001
GetProcessorInfo - Location2.Package - 00000001
GetProcessorInfo - Location2.Die - 00000000
GetProcessorInfo - Location2.Tile - 00000000
GetProcessorInfo - Location2.Module - 00000000
GetProcessorInfo - Location2.Core - 0000000E
GetProcessorInfo - Location2.Thread - 00000001
GetProcessorInfo - Index - 6E
GetProcessorInfo - ProcessorId - 000000000000009E
GetProcessorInfo - StatusFlag - 00000006
GetProcessorInfo - Location.Package - 00000001
GetProcessorInfo - Location.Core - 0000000F
GetProcessorInfo - Location.Thread - 00000000
GetProcessorInfo - Location2.Package - 00000001
GetProcessorInfo - Location2.Die - 00000000
GetProcessorInfo - Location2.Tile - 00000000
GetProcessorInfo - Location2.Module - 00000000
GetProcessorInfo - Location2.Core - 0000000F
GetProcessorInfo - Location2.Thread - 00000000
GetProcessorInfo - Index - 6F
GetProcessorInfo - ProcessorId - 000000000000009F
GetProcessorInfo - StatusFlag - 00000006
GetProcessorInfo - Location.Package - 00000001
GetProcessorInfo - Location.Core - 0000000F
GetProcessorInfo - Location.Thread - 00000001
GetProcessorInfo - Location2.Package - 00000001
GetProcessorInfo - Location2.Die - 00000000
GetProcessorInfo - Location2.Tile - 00000000
GetProcessorInfo - Location2.Module - 00000000
GetProcessorInfo - Location2.Core - 0000000F
GetProcessorInfo - Location2.Thread - 00000001
GetProcessorInfo - Index - 70
GetProcessorInfo - ProcessorId - 00000000000000A0
GetProcessorInfo - StatusFlag - 00000006
GetProcessorInfo - Location.Package - 00000001
GetProcessorInfo - Location.Core - 00000010
GetProcessorInfo - Location.Thread - 00000000
GetProcessorInfo - Location2.Package - 00000001
GetProcessorInfo - Location2.Die - 00000000
GetProcessorInfo - Location2.Tile - 00000000
GetProcessorInfo - Location2.Module - 00000000
GetProcessorInfo - Location2.Core - 00000010
GetProcessorInfo - Location2.Thread - 00000000
GetProcessorInfo - Index - 71
GetProcessorInfo - ProcessorId - 00000000000000A1
GetProcessorInfo - StatusFlag - 00000006
GetProcessorInfo - Location.Package - 00000001
GetProcessorInfo - Location.Core - 00000010
GetProcessorInfo - Location.Thread - 00000001
GetProcessorInfo - Location2.Package - 00000001
GetProcessorInfo - Location2.Die - 00000000
GetProcessorInfo - Location2.Tile - 00000000
GetProcessorInfo - Location2.Module - 00000000
GetProcessorInfo - Location2.Core - 00000010
GetProcessorInfo - Location2.Thread - 00000001
GetProcessorInfo - Index - 72
GetProcessorInfo - ProcessorId - 00000000000000A2
GetProcessorInfo - StatusFlag - 00000006
GetProcessorInfo - Location.Package - 00000001
GetProcessorInfo - Location.Core - 00000011
GetProcessorInfo - Location.Thread - 00000000
GetProcessorInfo - Location2.Package - 00000001
GetProcessorInfo - Location2.Die - 00000000
GetProcessorInfo - Location2.Tile - 00000000
GetProcessorInfo - Location2.Module - 00000000
GetProcessorInfo - Location2.Core - 00000011
GetProcessorInfo - Location2.Thread - 00000000
GetProcessorInfo - Index - 73
GetProcessorInfo - ProcessorId - 00000000000000A3
GetProcessorInfo - StatusFlag - 00000006
GetProcessorInfo - Location.Package - 00000001
GetProcessorInfo - Location.Core - 00000011
GetProcessorInfo - Location.Thread - 00000001
GetProcessorInfo - Location2.Package - 00000001
GetProcessorInfo - Location2.Die - 00000000
GetProcessorInfo - Location2.Tile - 00000000
GetProcessorInfo - Location2.Module - 00000000
GetProcessorInfo - Location2.Core - 00000011
GetProcessorInfo - Location2.Thread - 00000001
GetProcessorInfo - Index - 74
GetProcessorInfo - ProcessorId - 00000000000000A4
GetProcessorInfo - StatusFlag - 00000006
GetProcessorInfo - Location.Package - 00000001
GetProcessorInfo - Location.Core - 00000012
GetProcessorInfo - Location.Thread - 00000000
GetProcessorInfo - Location2.Package - 00000001
GetProcessorInfo - Location2.Die - 00000000
GetProcessorInfo - Location2.Tile - 00000000
GetProcessorInfo - Location2.Module - 00000000
GetProcessorInfo - Location2.Core - 00000012
GetProcessorInfo - Location2.Thread - 00000000
GetProcessorInfo - Index - 75
GetProcessorInfo - ProcessorId - 00000000000000A5
GetProcessorInfo - StatusFlag - 00000006
GetProcessorInfo - Location.Package - 00000001
GetProcessorInfo - Location.Core - 00000012
GetProcessorInfo - Location.Thread - 00000001
GetProcessorInfo - Location2.Package - 00000001
GetProcessorInfo - Location2.Die - 00000000
GetProcessorInfo - Location2.Tile - 00000000
GetProcessorInfo - Location2.Module - 00000000
GetProcessorInfo - Location2.Core - 00000012
GetProcessorInfo - Location2.Thread - 00000001
GetProcessorInfo - Index - 76
GetProcessorInfo - ProcessorId - 00000000000000A6
GetProcessorInfo - StatusFlag - 00000006
GetProcessorInfo - Location.Package - 00000001
GetProcessorInfo - Location.Core - 00000013
GetProcessorInfo - Location.Thread - 00000000
GetProcessorInfo - Location2.Package - 00000001
GetProcessorInfo - Location2.Die - 00000000
GetProcessorInfo - Location2.Tile - 00000000
GetProcessorInfo - Location2.Module - 00000000
GetProcessorInfo - Location2.Core - 00000013
GetProcessorInfo - Location2.Thread - 00000000
GetProcessorInfo - Index - 77
GetProcessorInfo - ProcessorId - 00000000000000A7
GetProcessorInfo - StatusFlag - 00000006
GetProcessorInfo - Location.Package - 00000001
GetProcessorInfo - Location.Core - 00000013
GetProcessorInfo - Location.Thread - 00000001
GetProcessorInfo - Location2.Package - 00000001
GetProcessorInfo - Location2.Die - 00000000
GetProcessorInfo - Location2.Tile - 00000000
GetProcessorInfo - Location2.Module - 00000000
GetProcessorInfo - Location2.Core - 00000013
GetProcessorInfo - Location2.Thread - 00000001
GetProcessorInfo - Index - 78
GetProcessorInfo - ProcessorId - 00000000000000A8
GetProcessorInfo - StatusFlag - 00000006
GetProcessorInfo - Location.Package - 00000001
GetProcessorInfo - Location.Core - 00000014
GetProcessorInfo - Location.Thread - 00000000
GetProcessorInfo - Location2.Package - 00000001
GetProcessorInfo - Location2.Die - 00000000
GetProcessorInfo - Location2.Tile - 00000000
GetProcessorInfo - Location2.Module - 00000000
GetProcessorInfo - Location2.Core - 00000014
GetProcessorInfo - Location2.Thread - 00000000
GetProcessorInfo - Index - 79
GetProcessorInfo - ProcessorId - 00000000000000A9
GetProcessorInfo - StatusFlag - 00000006
GetProcessorInfo - Location.Package - 00000001
GetProcessorInfo - Location.Core - 00000014
GetProcessorInfo - Location.Thread - 00000001
GetProcessorInfo - Location2.Package - 00000001
GetProcessorInfo - Location2.Die - 00000000
GetProcessorInfo - Location2.Tile - 00000000
GetProcessorInfo - Location2.Module - 00000000
GetProcessorInfo - Location2.Core - 00000014
GetProcessorInfo - Location2.Thread - 00000001
GetProcessorInfo - Index - 7A
GetProcessorInfo - ProcessorId - 00000000000000AA
GetProcessorInfo - StatusFlag - 00000006
GetProcessorInfo - Location.Package - 00000001
GetProcessorInfo - Location.Core - 00000015
GetProcessorInfo - Location.Thread - 00000000
GetProcessorInfo - Location2.Package - 00000001
GetProcessorInfo - Location2.Die - 00000000
GetProcessorInfo - Location2.Tile - 00000000
GetProcessorInfo - Location2.Module - 00000000
GetProcessorInfo - Location2.Core - 00000015
GetProcessorInfo - Location2.Thread - 00000000
GetProcessorInfo - Index - 7B
GetProcessorInfo - ProcessorId - 00000000000000AB
GetProcessorInfo - StatusFlag - 00000006
GetProcessorInfo - Location.Package - 00000001
GetProcessorInfo - Location.Core - 00000015
GetProcessorInfo - Location.Thread - 00000001
GetProcessorInfo - Location2.Package - 00000001
GetProcessorInfo - Location2.Die - 00000000
GetProcessorInfo - Location2.Tile - 00000000
GetProcessorInfo - Location2.Module - 00000000
GetProcessorInfo - Location2.Core - 00000015
GetProcessorInfo - Location2.Thread - 00000001
GetProcessorInfo - Index - 7C
GetProcessorInfo - ProcessorId - 00000000000000AC
GetProcessorInfo - StatusFlag - 00000006
GetProcessorInfo - Location.Package - 00000001
GetProcessorInfo - Location.Core - 00000016
GetProcessorInfo - Location.Thread - 00000000
GetProcessorInfo - Location2.Package - 00000001
GetProcessorInfo - Location2.Die - 00000000
GetProcessorInfo - Location2.Tile - 00000000
GetProcessorInfo - Location2.Module - 00000000
GetProcessorInfo - Location2.Core - 00000016
GetProcessorInfo - Location2.Thread - 00000000
GetProcessorInfo - Index - 7D
GetProcessorInfo - ProcessorId - 00000000000000AD
GetProcessorInfo - StatusFlag - 00000006
GetProcessorInfo - Location.Package - 00000001
GetProcessorInfo - Location.Core - 00000016
GetProcessorInfo - Location.Thread - 00000001
GetProcessorInfo - Location2.Package - 00000001
GetProcessorInfo - Location2.Die - 00000000
GetProcessorInfo - Location2.Tile - 00000000
GetProcessorInfo - Location2.Module - 00000000
GetProcessorInfo - Location2.Core - 00000016
GetProcessorInfo - Location2.Thread - 00000001
GetProcessorInfo - Index - 7E
GetProcessorInfo - ProcessorId - 00000000000000AE
GetProcessorInfo - StatusFlag - 00000006
GetProcessorInfo - Location.Package - 00000001
GetProcessorInfo - Location.Core - 00000017
GetProcessorInfo - Location.Thread - 00000000
GetProcessorInfo - Location2.Package - 00000001
GetProcessorInfo - Location2.Die - 00000000
GetProcessorInfo - Location2.Tile - 00000000
GetProcessorInfo - Location2.Module - 00000000
GetProcessorInfo - Location2.Core - 00000017
GetProcessorInfo - Location2.Thread - 00000000
GetProcessorInfo - Index - 7F
GetProcessorInfo - ProcessorId - 00000000000000AF
GetProcessorInfo - StatusFlag - 00000006
GetProcessorInfo - Location.Package - 00000001
GetProcessorInfo - Location.Core - 00000017
GetProcessorInfo - Location.Thread - 00000001
GetProcessorInfo - Location2.Package - 00000001
GetProcessorInfo - Location2.Die - 00000000
GetProcessorInfo - Location2.Tile - 00000000
GetProcessorInfo - Location2.Module - 00000000
GetProcessorInfo - Location2.Core - 00000017
GetProcessorInfo - Location2.Thread - 00000001
GetProcessorInfo - Index - 80
GetProcessorInfo - ProcessorId - 00000000000000B0
GetProcessorInfo - StatusFlag - 00000006
GetProcessorInfo - Location.Package - 00000001
GetProcessorInfo - Location.Core - 00000018
GetProcessorInfo - Location.Thread - 00000000
GetProcessorInfo - Location2.Package - 00000001
GetProcessorInfo - Location2.Die - 00000000
GetProcessorInfo - Location2.Tile - 00000000
GetProcessorInfo - Location2.Module - 00000000
GetProcessorInfo - Location2.Core - 00000018
GetProcessorInfo - Location2.Thread - 00000000
GetProcessorInfo - Index - 81
GetProcessorInfo - ProcessorId - 00000000000000B1
GetProcessorInfo - StatusFlag - 00000006
GetProcessorInfo - Location.Package - 00000001
GetProcessorInfo - Location.Core - 00000018
GetProcessorInfo - Location.Thread - 00000001
GetProcessorInfo - Location2.Package - 00000001
GetProcessorInfo - Location2.Die - 00000000
GetProcessorInfo - Location2.Tile - 00000000
GetProcessorInfo - Location2.Module - 00000000
GetProcessorInfo - Location2.Core - 00000018
GetProcessorInfo - Location2.Thread - 00000001
GetProcessorInfo - Index - 82
GetProcessorInfo - ProcessorId - 00000000000000B2
GetProcessorInfo - StatusFlag - 00000006
GetProcessorInfo - Location.Package - 00000001
GetProcessorInfo - Location.Core - 00000019
GetProcessorInfo - Location.Thread - 00000000
GetProcessorInfo - Location2.Package - 00000001
GetProcessorInfo - Location2.Die - 00000000
GetProcessorInfo - Location2.Tile - 00000000
GetProcessorInfo - Location2.Module - 00000000
GetProcessorInfo - Location2.Core - 00000019
GetProcessorInfo - Location2.Thread - 00000000
GetProcessorInfo - Index - 83
GetProcessorInfo - ProcessorId - 00000000000000B3
GetProcessorInfo - StatusFlag - 00000006
GetProcessorInfo - Location.Package - 00000001
GetProcessorInfo - Location.Core - 00000019
GetProcessorInfo - Location.Thread - 00000001
GetProcessorInfo - Location2.Package - 00000001
GetProcessorInfo - Location2.Die - 00000000
GetProcessorInfo - Location2.Tile - 00000000
GetProcessorInfo - Location2.Module - 00000000
GetProcessorInfo - Location2.Core - 00000019
GetProcessorInfo - Location2.Thread - 00000001
GetProcessorInfo - Index - 84
GetProcessorInfo - ProcessorId - 00000000000000B4
GetProcessorInfo - StatusFlag - 00000006
GetProcessorInfo - Location.Package - 00000001
GetProcessorInfo - Location.Core - 0000001A
GetProcessorInfo - Location.Thread - 00000000
GetProcessorInfo - Location2.Package - 00000001
GetProcessorInfo - Location2.Die - 00000000
GetProcessorInfo - Location2.Tile - 00000000
GetProcessorInfo - Location2.Module - 00000000
GetProcessorInfo - Location2.Core - 0000001A
GetProcessorInfo - Location2.Thread - 00000000
GetProcessorInfo - Index - 85
GetProcessorInfo - ProcessorId - 00000000000000B5
GetProcessorInfo - StatusFlag - 00000006
GetProcessorInfo - Location.Package - 00000001
GetProcessorInfo - Location.Core - 0000001A
GetProcessorInfo - Location.Thread - 00000001
GetProcessorInfo - Location2.Package - 00000001
GetProcessorInfo - Location2.Die - 00000000
GetProcessorInfo - Location2.Tile - 00000000
GetProcessorInfo - Location2.Module - 00000000
GetProcessorInfo - Location2.Core - 0000001A
GetProcessorInfo - Location2.Thread - 00000001
GetProcessorInfo - Index - 86
GetProcessorInfo - ProcessorId - 00000000000000B6
GetProcessorInfo - StatusFlag - 00000006
GetProcessorInfo - Location.Package - 00000001
GetProcessorInfo - Location.Core - 0000001B
GetProcessorInfo - Location.Thread - 00000000
GetProcessorInfo - Location2.Package - 00000001
GetProcessorInfo - Location2.Die - 00000000
GetProcessorInfo - Location2.Tile - 00000000
GetProcessorInfo - Location2.Module - 00000000
GetProcessorInfo - Location2.Core - 0000001B
GetProcessorInfo - Location2.Thread - 00000000
GetProcessorInfo - Index - 87
GetProcessorInfo - ProcessorId - 00000000000000B7
GetProcessorInfo - StatusFlag - 00000006
GetProcessorInfo - Location.Package - 00000001
GetProcessorInfo - Location.Core - 0000001B
GetProcessorInfo - Location.Thread - 00000001
GetProcessorInfo - Location2.Package - 00000001
GetProcessorInfo - Location2.Die - 00000000
GetProcessorInfo - Location2.Tile - 00000000
GetProcessorInfo - Location2.Module - 00000000
GetProcessorInfo - Location2.Core - 0000001B
GetProcessorInfo - Location2.Thread - 00000001
GetProcessorInfo - Index - 88
GetProcessorInfo - ProcessorId - 00000000000000B8
GetProcessorInfo - StatusFlag - 00000006
GetProcessorInfo - Location.Package - 00000001
GetProcessorInfo - Location.Core - 0000001C
GetProcessorInfo - Location.Thread - 00000000
GetProcessorInfo - Location2.Package - 00000001
GetProcessorInfo - Location2.Die - 00000000
GetProcessorInfo - Location2.Tile - 00000000
GetProcessorInfo - Location2.Module - 00000000
GetProcessorInfo - Location2.Core - 0000001C
GetProcessorInfo - Location2.Thread - 00000000
GetProcessorInfo - Index - 89
GetProcessorInfo - ProcessorId - 00000000000000B9
GetProcessorInfo - StatusFlag - 00000006
GetProcessorInfo - Location.Package - 00000001
GetProcessorInfo - Location.Core - 0000001C
GetProcessorInfo - Location.Thread - 00000001
GetProcessorInfo - Location2.Package - 00000001
GetProcessorInfo - Location2.Die - 00000000
GetProcessorInfo - Location2.Tile - 00000000
GetProcessorInfo - Location2.Module - 00000000
GetProcessorInfo - Location2.Core - 0000001C
GetProcessorInfo - Location2.Thread - 00000001
GetProcessorInfo - Index - 8A
GetProcessorInfo - ProcessorId - 00000000000000BA
GetProcessorInfo - StatusFlag - 00000006
GetProcessorInfo - Location.Package - 00000001
GetProcessorInfo - Location.Core - 0000001D
GetProcessorInfo - Location.Thread - 00000000
GetProcessorInfo - Location2.Package - 00000001
GetProcessorInfo - Location2.Die - 00000000
GetProcessorInfo - Location2.Tile - 00000000
GetProcessorInfo - Location2.Module - 00000000
GetProcessorInfo - Location2.Core - 0000001D
GetProcessorInfo - Location2.Thread - 00000000
GetProcessorInfo - Index - 8B
GetProcessorInfo - ProcessorId - 00000000000000BB
GetProcessorInfo - StatusFlag - 00000006
GetProcessorInfo - Location.Package - 00000001
GetProcessorInfo - Location.Core - 0000001D
GetProcessorInfo - Location.Thread - 00000001
GetProcessorInfo - Location2.Package - 00000001
GetProcessorInfo - Location2.Die - 00000000
GetProcessorInfo - Location2.Tile - 00000000
GetProcessorInfo - Location2.Module - 00000000
GetProcessorInfo - Location2.Core - 0000001D
GetProcessorInfo - Location2.Thread - 00000001
GetProcessorInfo - Index - 8C
GetProcessorInfo - ProcessorId - 00000000000000BC
GetProcessorInfo - StatusFlag - 00000006
GetProcessorInfo - Location.Package - 00000001
GetProcessorInfo - Location.Core - 0000001E
GetProcessorInfo - Location.Thread - 00000000
GetProcessorInfo - Location2.Package - 00000001
GetProcessorInfo - Location2.Die - 00000000
GetProcessorInfo - Location2.Tile - 00000000
GetProcessorInfo - Location2.Module - 00000000
GetProcessorInfo - Location2.Core - 0000001E
GetProcessorInfo - Location2.Thread - 00000000
GetProcessorInfo - Index - 8D
GetProcessorInfo - ProcessorId - 00000000000000BD
GetProcessorInfo - StatusFlag - 00000006
GetProcessorInfo - Location.Package - 00000001
GetProcessorInfo - Location.Core - 0000001E
GetProcessorInfo - Location.Thread - 00000001
GetProcessorInfo - Location2.Package - 00000001
GetProcessorInfo - Location2.Die - 00000000
GetProcessorInfo - Location2.Tile - 00000000
GetProcessorInfo - Location2.Module - 00000000
GetProcessorInfo - Location2.Core - 0000001E
GetProcessorInfo - Location2.Thread - 00000001
GetProcessorInfo - Index - 8E
GetProcessorInfo - ProcessorId - 00000000000000BE
GetProcessorInfo - StatusFlag - 00000006
GetProcessorInfo - Location.Package - 00000001
GetProcessorInfo - Location.Core - 0000001F
GetProcessorInfo - Location.Thread - 00000000
GetProcessorInfo - Location2.Package - 00000001
GetProcessorInfo - Location2.Die - 00000000
GetProcessorInfo - Location2.Tile - 00000000
GetProcessorInfo - Location2.Module - 00000000
GetProcessorInfo - Location2.Core - 0000001F
GetProcessorInfo - Location2.Thread - 00000000
GetProcessorInfo - Index - 8F
GetProcessorInfo - ProcessorId - 00000000000000BF
GetProcessorInfo - StatusFlag - 00000006
GetProcessorInfo - Location.Package - 00000001
GetProcessorInfo - Location.Core - 0000001F
GetProcessorInfo - Location.Thread - 00000001
GetProcessorInfo - Location2.Package - 00000001
GetProcessorInfo - Location2.Die - 00000000
GetProcessorInfo - Location2.Tile - 00000000
GetProcessorInfo - Location2.Module - 00000000
GetProcessorInfo - Location2.Core - 0000001F
GetProcessorInfo - Location2.Thread - 00000001
GetProcessorInfo - Index - 90
GetProcessorInfo - ProcessorId - 00000000000000C0
GetProcessorInfo - StatusFlag - 00000006
GetProcessorInfo - Location.Package - 00000001
GetProcessorInfo - Location.Core - 00000020
GetProcessorInfo - Location.Thread - 00000000
GetProcessorInfo - Location2.Package - 00000001
GetProcessorInfo - Location2.Die - 00000000
GetProcessorInfo - Location2.Tile - 00000000
GetProcessorInfo - Location2.Module - 00000000
GetProcessorInfo - Location2.Core - 00000020
GetProcessorInfo - Location2.Thread - 00000000
GetProcessorInfo - Index - 91
GetProcessorInfo - ProcessorId - 00000000000000C1
GetProcessorInfo - StatusFlag - 00000006
GetProcessorInfo - Location.Package - 00000001
GetProcessorInfo - Location.Core - 00000020
GetProcessorInfo - Location.Thread - 00000001
GetProcessorInfo - Location2.Package - 00000001
GetProcessorInfo - Location2.Die - 00000000
GetProcessorInfo - Location2.Tile - 00000000
GetProcessorInfo - Location2.Module - 00000000
GetProcessorInfo - Location2.Core - 00000020
GetProcessorInfo - Location2.Thread - 00000001
GetProcessorInfo - Index - 92
GetProcessorInfo - ProcessorId - 00000000000000C2
GetProcessorInfo - StatusFlag - 00000006
GetProcessorInfo - Location.Package - 00000001
GetProcessorInfo - Location.Core - 00000021
GetProcessorInfo - Location.Thread - 00000000
GetProcessorInfo - Location2.Package - 00000001
GetProcessorInfo - Location2.Die - 00000000
GetProcessorInfo - Location2.Tile - 00000000
GetProcessorInfo - Location2.Module - 00000000
GetProcessorInfo - Location2.Core - 00000021
GetProcessorInfo - Location2.Thread - 00000000
GetProcessorInfo - Index - 93
GetProcessorInfo - ProcessorId - 00000000000000C3
GetProcessorInfo - StatusFlag - 00000006
GetProcessorInfo - Location.Package - 00000001
GetProcessorInfo - Location.Core - 00000021
GetProcessorInfo - Location.Thread - 00000001
GetProcessorInfo - Location2.Package - 00000001
GetProcessorInfo - Location2.Die - 00000000
GetProcessorInfo - Location2.Tile - 00000000
GetProcessorInfo - Location2.Module - 00000000
GetProcessorInfo - Location2.Core - 00000021
GetProcessorInfo - Location2.Thread - 00000001
GetProcessorInfo - Index - 94
GetProcessorInfo - ProcessorId - 00000000000000C4
GetProcessorInfo - StatusFlag - 00000006
GetProcessorInfo - Location.Package - 00000001
GetProcessorInfo - Location.Core - 00000022
GetProcessorInfo - Location.Thread - 00000000
GetProcessorInfo - Location2.Package - 00000001
GetProcessorInfo - Location2.Die - 00000000
GetProcessorInfo - Location2.Tile - 00000000
GetProcessorInfo - Location2.Module - 00000000
GetProcessorInfo - Location2.Core - 00000022
GetProcessorInfo - Location2.Thread - 00000000
GetProcessorInfo - Index - 95
GetProcessorInfo - ProcessorId - 00000000000000C5
GetProcessorInfo - StatusFlag - 00000006
GetProcessorInfo - Location.Package - 00000001
GetProcessorInfo - Location.Core - 00000022
GetProcessorInfo - Location.Thread - 00000001
GetProcessorInfo - Location2.Package - 00000001
GetProcessorInfo - Location2.Die - 00000000
GetProcessorInfo - Location2.Tile - 00000000
GetProcessorInfo - Location2.Module - 00000000
GetProcessorInfo - Location2.Core - 00000022
GetProcessorInfo - Location2.Thread - 00000001
GetProcessorInfo - Index - 96
GetProcessorInfo - ProcessorId - 00000000000000C6
GetProcessorInfo - StatusFlag - 00000006
GetProcessorInfo - Location.Package - 00000001
GetProcessorInfo - Location.Core - 00000023
GetProcessorInfo - Location.Thread - 00000000
GetProcessorInfo - Location2.Package - 00000001
GetProcessorInfo - Location2.Die - 00000000
GetProcessorInfo - Location2.Tile - 00000000
GetProcessorInfo - Location2.Module - 00000000
GetProcessorInfo - Location2.Core - 00000023
GetProcessorInfo - Location2.Thread - 00000000
GetProcessorInfo - Index - 97
GetProcessorInfo - ProcessorId - 00000000000000C7
GetProcessorInfo - StatusFlag - 00000006
GetProcessorInfo - Location.Package - 00000001
GetProcessorInfo - Location.Core - 00000023
GetProcessorInfo - Location.Thread - 00000001
GetProcessorInfo - Location2.Package - 00000001
GetProcessorInfo - Location2.Die - 00000000
GetProcessorInfo - Location2.Tile - 00000000
GetProcessorInfo - Location2.Module - 00000000
GetProcessorInfo - Location2.Core - 00000023
GetProcessorInfo - Location2.Thread - 00000001
GetProcessorInfo - Index - 98
GetProcessorInfo - ProcessorId - 00000000000000C8
GetProcessorInfo - StatusFlag - 00000006
GetProcessorInfo - Location.Package - 00000001
GetProcessorInfo - Location.Core - 00000024
GetProcessorInfo - Location.Thread - 00000000
GetProcessorInfo - Location2.Package - 00000001
GetProcessorInfo - Location2.Die - 00000000
GetProcessorInfo - Location2.Tile - 00000000
GetProcessorInfo - Location2.Module - 00000000
GetProcessorInfo - Location2.Core - 00000024
GetProcessorInfo - Location2.Thread - 00000000
GetProcessorInfo - Index - 99
GetProcessorInfo - ProcessorId - 00000000000000C9
GetProcessorInfo - StatusFlag - 00000006
GetProcessorInfo - Location.Package - 00000001
GetProcessorInfo - Location.Core - 00000024
GetProcessorInfo - Location.Thread - 00000001
GetProcessorInfo - Location2.Package - 00000001
GetProcessorInfo - Location2.Die - 00000000
GetProcessorInfo - Location2.Tile - 00000000
GetProcessorInfo - Location2.Module - 00000000
GetProcessorInfo - Location2.Core - 00000024
GetProcessorInfo - Location2.Thread - 00000001
GetProcessorInfo - Index - 9A
GetProcessorInfo - ProcessorId - 00000000000000CA
GetProcessorInfo - StatusFlag - 00000006
GetProcessorInfo - Location.Package - 00000001
GetProcessorInfo - Location.Core - 00000025
GetProcessorInfo - Location.Thread - 00000000
GetProcessorInfo - Location2.Package - 00000001
GetProcessorInfo - Location2.Die - 00000000
GetProcessorInfo - Location2.Tile - 00000000
GetProcessorInfo - Location2.Module - 00000000
GetProcessorInfo - Location2.Core - 00000025
GetProcessorInfo - Location2.Thread - 00000000
GetProcessorInfo - Index - 9B
GetProcessorInfo - ProcessorId - 00000000000000CB
GetProcessorInfo - StatusFlag - 00000006
GetProcessorInfo - Location.Package - 00000001
GetProcessorInfo - Location.Core - 00000025
GetProcessorInfo - Location.Thread - 00000001
GetProcessorInfo - Location2.Package - 00000001
GetProcessorInfo - Location2.Die - 00000000
GetProcessorInfo - Location2.Tile - 00000000
GetProcessorInfo - Location2.Module - 00000000
GetProcessorInfo - Location2.Core - 00000025
GetProcessorInfo - Location2.Thread - 00000001
GetProcessorInfo - Index - 9C
GetProcessorInfo - ProcessorId - 00000000000000CC
GetProcessorInfo - StatusFlag - 00000006
GetProcessorInfo - Location.Package - 00000001
GetProcessorInfo - Location.Core - 00000026
GetProcessorInfo - Location.Thread - 00000000
GetProcessorInfo - Location2.Package - 00000001
GetProcessorInfo - Location2.Die - 00000000
GetProcessorInfo - Location2.Tile - 00000000
GetProcessorInfo - Location2.Module - 00000000
GetProcessorInfo - Location2.Core - 00000026
GetProcessorInfo - Location2.Thread - 00000000
GetProcessorInfo - Index - 9D
GetProcessorInfo - ProcessorId - 00000000000000CD
GetProcessorInfo - StatusFlag - 00000006
GetProcessorInfo - Location.Package - 00000001
GetProcessorInfo - Location.Core - 00000026
GetProcessorInfo - Location.Thread - 00000001
GetProcessorInfo - Location2.Package - 00000001
GetProcessorInfo - Location2.Die - 00000000
GetProcessorInfo - Location2.Tile - 00000000
GetProcessorInfo - Location2.Module - 00000000
GetProcessorInfo - Location2.Core - 00000026
GetProcessorInfo - Location2.Thread - 00000001
GetProcessorInfo - Index - 9E
GetProcessorInfo - ProcessorId - 00000000000000CE
GetProcessorInfo - StatusFlag - 00000006
GetProcessorInfo - Location.Package - 00000001
GetProcessorInfo - Location.Core - 00000027
GetProcessorInfo - Location.Thread - 00000000
GetProcessorInfo - Location2.Package - 00000001
GetProcessorInfo - Location2.Die - 00000000
GetProcessorInfo - Location2.Tile - 00000000
GetProcessorInfo - Location2.Module - 00000000
GetProcessorInfo - Location2.Core - 00000027
GetProcessorInfo - Location2.Thread - 00000000
GetProcessorInfo - Index - 9F
GetProcessorInfo - ProcessorId - 00000000000000CF
GetProcessorInfo - StatusFlag - 00000006
GetProcessorInfo - Location.Package - 00000001
GetProcessorInfo - Location.Core - 00000027
GetProcessorInfo - Location.Thread - 00000001
GetProcessorInfo - Location2.Package - 00000001
GetProcessorInfo - Location2.Die - 00000000
GetProcessorInfo - Location2.Tile - 00000000
GetProcessorInfo - Location2.Module - 00000000
GetProcessorInfo - Location2.Core - 00000027
GetProcessorInfo - Location2.Thread - 00000001
mCpuConfigLibConfigContextBuffer->NumberOfProcessors = A0
mCpuConfigLibConfigContextBuffer->BspNumber = 0
SMBIOS Package[0] - Processor[0]
SMBIOS Package[1] - Processor[80]
CPU[000]: ThreadCountOfPackage=80 ThreadCountOfDie=80 ThreadCountOfCore=2
CPU[080]: ThreadCountOfPackage=80 ThreadCountOfDie=80 ThreadCountOfCore=2
PROGRESS CODE: V03040003 I0
PDB = c:\efi\servergen2\intel\Build\EagleStreamRpPkg\DEBUG_VS2015x86\X64\ServerSecurityPkg\Tdx\TdxDxe\TdxDxe\DEBUG\TdxDxe.pdb
PROGRESS CODE: V03040002 I0
[MP_DISPATCH] MpDispatch4v0_CommonConstructor BEGIN
[MP_DISPATCH] MpDispatch4v0_CommonConstructor END (Success)
[TDX_LATE] TdxDxeEntryPoint BEGIN
TDX not capable
[TDX_LATE] TdxDxeEntryPoint END (Unsupported)
[MP_DISPATCH] MpDispatch4v0_CommonDestructor BEGIN
[MP_DISPATCH] MpDispatch4v0_CommonDestructor END (Success)
Error: Image at 0006A263000 start failed: Unsupported
PDB = c:\efi\servergen2\intel\Build\EagleStreamRpPkg\DEBUG_VS2015x86\X64\ServerSecurityPkg\Tdx\TdxDxe\TdxDxe\DEBUG\TdxDxe.pdb
PROGRESS CODE: V03040003 I0
PDB = c:\efi\servergen2\intel\Build\EagleStreamRpPkg\DEBUG_VS2015x86\X64\ServerSiliconPkg\Iio\Dxe\IioInit\IioInitSpr\DEBUG\IioInit.pdb
PROGRESS CODE: V03040002 I0
[IIO](TH) Trace Hub requested memory Size is 0. Not allocating memory.
[IIO](TH) PCH Trace Hub not accessible. Disabled.
[IIO](TH) ERROR Failed to configure PCH Trace Hub. Status= Not Ready
ERROR: IioTraceHubInitialize failed. Status= Not Ready
[IIO](SPK) IioSpkSocketInitialize: SocketId: 0
[IIO](SPK) IioSpkSocketInitialize: SocketId: 1
[0.1 p1] 00:15:01.0: Device is not present!
[0.2 p9] 00:26:01.0: Device is not present!
[0.3 p17] 00:37:01.0: Device is not present!
[0.4 p25] 00:48:01.0: Device is not present!
[0.4 p27] 00:48:03.0: Device is not present!
[0.4 p29] 00:48:05.0: Device is not present!
[0.4 p31] 00:48:07.0: Device is not present!
[0.5 p33] 00:59:01.0: Device is not present!
[0.5 p35] 00:59:03.0: Device is not present!
[0.5 p37] 00:59:05.0: Device is not present!
[0.5 p39] 00:59:07.0: Device is not present!
[1.1 p1] 00:97:01.0: Device is not present!
[1.2 p9] 00:A7:01.0: Device is not present!
[1.3 p17] 00:B7:01.0: Device is not present!
[1.4 p25] 00:C7:01.0: Device is not present!
[1.4 p27] 00:C7:03.0: Device is not present!
[1.4 p29] 00:C7:05.0: Device is not present!
[1.4 p31] 00:C7:07.0: Device is not present!
[1.5 p33] 00:D7:01.0: Device is not present!
[1.5 p35] 00:D7:03.0: Device is not present!
[1.5 p37] 00:D7:05.0: Device is not present!
[1.5 p39] 00:D7:07.0: Device is not present!
[1.6 p41] 00:80:01.0: Device is not present!
[1.6 p45] 00:80:05.0: Device is not present!
PROGRESS CODE: V03040003 I0
PDB = c:\efi\servergen2\intel\Build\EagleStreamRpPkg\DEBUG_VS2015x86\X64\ClientOneSiliconPkg\IpBlock\Sps\Sps\Dxe\SpsDxe\DEBUG\SpsDxe.pdb
PROGRESS CODE: V03040002 I0
[HECI Transport-1 DXE] Send pkt: 812E0007
00: 11 00 00 00 01 80 0B 00 - 00 00 00 00 02 00 50 00
10: 50 00 A0 00 00 11 81 FD - 2C 08 05 00 00 80 23 11
20: 10 0F 0E 0D 0C 0B 0A 09 - 08 00 00 00 00 00 0B 23
30: 11 10 0F 0E 0D 0C 0B 0A - 09 08 00 00 00 00 00 00
40: 00 00 00 00 00 00 00 00 - 00 00 00 00 00 00 00 00
50: 00 00 00 00 00 00 00 00 - 00 00 00 00 00 00 00 00
60: 00 00 00 00 00 00 00 00 - 00 00 00 00 00 00 00 00
70: 00 00 00 00 00 00 00 00 - 00 00 00 00 00 00 00 00
80: 00 00 00 00 00 00 00 00 - 00 00 00 00 00 00 00 00
90: 00 00 00 00 00 00 00 00 - 00 00 00 00 00 00 00 00
A0: 00 00 00 00 00 00 00 00 - 00 00 00 00 00 00 00 00
B0: 00 00 00 00 00 00 00 00 - 00 00 00 00 00 00 00 00
C0: 00 00 00 00 00 00 00 00 - 00 00 00 00 00 00 00 00
D0: 00 00 00 00 00 00 00 00 - 00 00 00 00 00 00 00 00
E0: 00 00 00 00 00 00 00 00 - 00 00 00 00 00 00 00 00
F0: 00 00 00 00 00 00 00 00 - 00 00 00 00 00 00 00 00
00: 00 00 00 00 00 00 00 00 - 00 00 00 00 00 00 00 00
10: 00 00 00 00 00 00 00 00 - 00 00 00 00 00 00 00 00
20: 00 00 00 00 00 00 00 00 - 00 00 00 00 00 00
[HECI Transport-1 DXE] Got pkt: 80080007
00: 11 80 00 00 00 00 00 00
PROGRESS CODE: V03040003 I0
PDB = c:\efi\servergen2\intel\Build\EagleStreamRpPkg\DEBUG_VS2015x86\X64\ClientOneSiliconPkg\IpBlock\MeIgnition\Dxe\MeIgnitionDxe\DEBUG\MeIgnitionDxe.pdb
PROGRESS CODE: V03040002 I0
PROGRESS CODE: V03040003 I0
PDB = c:\efi\servergen2\intel\Build\EagleStreamRpPkg\DEBUG_VS2015x86\X64\ClientOneSiliconPkg\IpBlock\Me\MeFwDowngrade\Dxe\MeFwDowngrade\DEBUG\MeFwDowngrade.pdb
PROGRESS CODE: V03040002 I0
Error: Image at 0006A252000 start failed: Unsupported
PDB = c:\efi\servergen2\intel\Build\EagleStreamRpPkg\DEBUG_VS2015x86\X64\ClientOneSiliconPkg\IpBlock\Me\MeFwDowngrade\Dxe\MeFwDowngrade\DEBUG\MeFwDowngrade.pdb
PROGRESS CODE: V03040003 I0
PDB = c:\efi\servergen2\intel\Build\EagleStreamRpPkg\DEBUG_VS2015x86\X64\ClientOneSiliconPkg\IpBlock\Me\MeSmbiosDxe\MeSmbiosDxe\DEBUG\MeSmbiosDxe.pdb
PROGRESS CODE: V03040002 I0
Error: Image at 0006A269000 start failed: Unsupported
PDB = c:\efi\servergen2\intel\Build\EagleStreamRpPkg\DEBUG_VS2015x86\X64\ClientOneSiliconPkg\IpBlock\Me\MeSmbiosDxe\MeSmbiosDxe\DEBUG\MeSmbiosDxe.pdb
PROGRESS CODE: V03040003 I0
PDB = c:\efi\servergen2\intel\Build\EagleStreamRpPkg\DEBUG_VS2015x86\X64\ServerPlatformPkg\Features\Me\Client\MeSmbiosUpdateConfigDxe\MeSmbiosUpdateConfigDxe\DEBUG\MeSmbiosUpdateConfig.pdb
PROGRESS CODE: V03040002 I0
Error: Image at 0006A268000 start failed: Unsupported
PDB = c:\efi\servergen2\intel\Build\EagleStreamRpPkg\DEBUG_VS2015x86\X64\ServerPlatformPkg\Features\Me\Client\MeSmbiosUpdateConfigDxe\MeSmbiosUpdateConfigDxe\DEBUG\MeSmbiosUpdateConfig.pdb
PROGRESS CODE: V03040003 I0
PDB = c:\efi\servergen2\intel\Build\EagleStreamRpPkg\DEBUG_VS2015x86\X64\ServerPlatformPkg\Features\Me\MeExtMeasurement\Dxe\MeExtMeasurement\DEBUG\MeExtMeasurement.pdb
PROGRESS CODE: V03040002 I0
MeExtMeasurementEntryPoint: not Me Type
PROGRESS CODE: V03040003 I0
PDB = c:\efi\servergen2\intel\Build\EagleStreamRpPkg\DEBUG_VS2015x86\X64\ServerPlatformPkg\Features\Me\Client\Amt\AmtSaveMebxConfigDxe\AmtSaveMebxConfigDxe\DEBUG\AmtSaveMebxConfig.pdb
PROGRESS CODE: V03040002 I0
Error: Image at 0006A259000 start failed: Unsupported
PDB = c:\efi\servergen2\intel\Build\EagleStreamRpPkg\DEBUG_VS2015x86\X64\ServerPlatformPkg\Features\Me\Client\Amt\AmtSaveMebxConfigDxe\AmtSaveMebxConfigDxe\DEBUG\AmtSaveMebxConfig.pdb
PROGRESS CODE: V03040003 I0
PDB = c:\efi\servergen2\intel\Build\EagleStreamRpPkg\DEBUG_VS2015x86\X64\XmlCliFeaturePkg\XmlCliCommon\Dxe\XmlCliCommonDxe\DEBUG\XmlCliCommonDxe.pdb
PROGRESS CODE: V03040002 I0
PROGRESS CODE: V03040003 I0
PDB = c:\efi\servergen2\intel\Build\EagleStreamRpPkg\DEBUG_VS2015x86\X64\ServerSecurityPkg\Pfr\DxeSmm\PfrDxe\DEBUG\PfrDxeDriver.pdb
PROGRESS CODE: V03040002 I0
PROGRESS CODE: V03040003 I0
PDB = c:\efi\servergen2\intel\Build\EagleStreamRpPkg\DEBUG_VS2015x86\X64\PcAtChipsetPkg\PcatRealTimeClockRuntimeDxe\PcatRealTimeClockRuntimeDxe\DEBUG\PcRtc.pdb
PROGRESS CODE: V03040002 I0
ERROR: C40000002:V0306000A I0 378D7B65-8DA9-4773-B6E4-A47826A833E1
PROGRESS CODE: V03040003 I0
PDB = c:\efi\servergen2\intel\Build\EagleStreamRpPkg\DEBUG_VS2015x86\X64\SecurityPkg\VariableAuthenticated\SecureBootConfigDxe\SecureBootConfigDxe\DEBUG\SecureBootConfigDxe.pdb
PROGRESS CODE: V03040002 I0
PROGRESS CODE: V03040003 I0
PDB = c:\efi\servergen2\intel\Build\EagleStreamRpPkg\DEBUG_VS2015x86\X64\MdeModulePkg\Universal\MonotonicCounterRuntimeDxe\MonotonicCounterRuntimeDxe\DEBUG\MonotonicCounterRuntimeDxe.pdb
PROGRESS CODE: V03040002 I0
PROGRESS CODE: V03040003 I0
PDB = c:\efi\servergen2\intel\Build\EagleStreamRpPkg\DEBUG_VS2015x86\X64\MdeModulePkg\Universal\CapsuleRuntimeDxe\CapsuleRuntimeDxe\DEBUG\CapsuleRuntimeDxe.pdb
PROGRESS CODE: V03040002 I0
PROGRESS CODE: V03040003 I0
PDB = c:\efi\servergen2\intel\Build\EagleStreamRpPkg\DEBUG_VS2015x86\X64\SecurityPkg\Tcg\MemoryOverwriteControl\TcgMor\DEBUG\TcgMor.pdb
PROGRESS CODE: V03040002 I0
PROGRESS CODE: V03040003 I0
PDB = c:\efi\servergen2\intel\Build\EagleStreamRpPkg\DEBUG_VS2015x86\X64\SecurityPkg\Tcg\Tcg2Config\Tcg2ConfigDxe\DEBUG\Tcg2ConfigDxe.pdb
PROGRESS CODE: V03040002 I0
PROGRESS CODE: V03040003 I0
PDB = c:\efi\servergen2\intel\Build\EagleStreamRpPkg\DEBUG_VS2015x86\X64\SecurityPkg\Tcg\Tcg2Acpi\Tcg2Acpi\DEBUG\Tcg2Acpi.pdb
PROGRESS CODE: V03040002 I0
PROGRESS CODE: V03040003 I0
PDB = c:\efi\servergen2\intel\Build\EagleStreamRpPkg\DEBUG_VS2015x86\X64\ServerPlatformPkg\Platform\Dxe\Tcg2PlatformDxe\Tcg2PlatformDxe\DEBUG\Tcg2PlatformDxe.pdb
PROGRESS CODE: V03040002 I0
Failed to locate gEfiDxeSmmReadyToLockProtocolGuid.
PROGRESS CODE: V03040003 I0
PDB = c:\efi\servergen2\intel\Build\EagleStreamRpPkg\DEBUG_VS2015x86\X64\IntelSiliconPkg\Feature\PcieSecurity\IntelPciDeviceSecurityDxe\IntelPciDeviceSecurityDxe\DEBUG\IntelPciDeviceSecurityDxe.pdb
PROGRESS CODE: V03040002 I0
PROGRESS CODE: V03040003 I0
PDB = c:\efi\servergen2\intel\Build\EagleStreamRpPkg\DEBUG_VS2015x86\X64\ServerPlatformPkg\Platform\Dxe\MemorySubClass\MemorySubClass\DEBUG\MemorySubClass.pdb
PROGRESS CODE: V03040002 I0
PROGRESS CODE: V03040003 I0
PDB = c:\efi\servergen2\intel\Build\EagleStreamRpPkg\DEBUG_VS2015x86\X64\ServerPlatformPkg\Platform\Dxe\EmulationDfxSetup\EmulationDfxSetup\DEBUG\EmulationDfxSetup.pdb
PROGRESS CODE: V03040002 I0
PROGRESS CODE: V03040003 I0
PDB = c:\efi\servergen2\intel\Build\EagleStreamRpPkg\DEBUG_VS2015x86\X64\ServerRasPkg\Driver\Dxe\IioRasInit\IioRasInit\DEBUG\IioRasInit.pdb
PROGRESS CODE: V03040002 I0
PROGRESS CODE: V03040003 I0
PDB = c:\efi\servergen2\intel\Build\EagleStreamRpPkg\DEBUG_VS2015x86\X64\ServerRasPkg\Driver\Dxe\AddressTranslationDxe\AddressTranslationDxe\DEBUG\AddressTranslationDxe.pdb
PROGRESS CODE: V03040002 I0
PROGRESS CODE: V03040003 I0
PDB = c:\efi\servergen2\intel\Build\EagleStreamRpPkg\DEBUG_VS2015x86\X64\ServerPlatformPkg\Features\PrmAddrTransDsmConfigDxe\PrmAddrTransDsmConfigDxe\DEBUG\PrmAddrTransDsmConfigDxe.pdb
PROGRESS CODE: V03040002 I0
PROGRESS CODE: V03040003 I0
PDB = c:\efi\servergen2\intel\Build\EagleStreamRpPkg\DEBUG_VS2015x86\X64\ServerPlatformPkg\Features\PrmAddrTransDsm\PrmAddrTransDsm\DEBUG\PrmAddrTransDsm.pdb
PROGRESS CODE: V03040002 I0
PROGRESS CODE: V03040003 I0
PDB = c:\efi\servergen2\intel\Build\EagleStreamRpPkg\DEBUG_VS2015x86\X64\XmlCliFeaturePkg\XmlCliCommon\Smm\XmlCliCommonSmm\DEBUG\XmlCliCommonSmm.pdb
PROGRESS CODE: V03070002 I0
PROGRESS CODE: V03070003 I0
PDB = c:\efi\servergen2\intel\Build\EagleStreamRpPkg\DEBUG_VS2015x86\X64\ServerSecurityPkg\Pfr\DxeSmm\PfrSmm\DEBUG\PfrSmmDriver.pdb
PROGRESS CODE: V03070002 I0
PROGRESS CODE: V03070003 I0
PDB = c:\efi\servergen2\intel\Build\EagleStreamRpPkg\DEBUG_VS2015x86\X64\UserAuthFeaturePkg\UserAuthenticationDxeSmm\UserAuthenticationSmm\DEBUG\UserAuthenticationSmm.pdb
PROGRESS CODE: V03070002 I0
PROGRESS CODE: V03070003 I0
PDB = c:\efi\servergen2\intel\Build\EagleStreamRpPkg\DEBUG_VS2015x86\X64\ServerRasPkg\Driver\Smm\MemTopology\MemTopology\DEBUG\MemTopology.pdb
PROGRESS CODE: V03070002 I0
PROGRESS CODE: V03070003 I0
PDB = c:\efi\servergen2\intel\Build\EagleStreamRpPkg\DEBUG_VS2015x86\X64\ServerRasPkg\PolicySample\PolicySample\DEBUG\PolicySampleDriver.pdb
PROGRESS CODE: V03070002 I0
InitializePolicyData
Enable Poison when 2LM is enabled
CxlMefnEn: 0x0
PROGRESS CODE: V03070003 I0
PDB = c:\efi\servergen2\intel\Build\EagleStreamRpPkg\DEBUG_VS2015x86\X64\ServerRasPkg\Driver\Smm\PartialMirrorHandler\PartialMirrorHandler\DEBUG\PartialMirrorHandler.pdb
PROGRESS CODE: V03070002 I0
PROGRESS CODE: V03070003 I0
PDB = c:\efi\servergen2\intel\Build\EagleStreamRpPkg\DEBUG_VS2015x86\X64\ServerRasPkg\Driver\Smm\Gen2\ImcErrorHandler\ImcErrorHandler\DEBUG\ImcErrorHandler.pdb
PROGRESS CODE: V03070002 I0
[ImcErrorHandler][CrystalRidgeLib] Failed to locate protocol: Not Found
InitializeImcErrorHandler start!
[imc] initialization start!
[PCLS]: InitPclsSparing()... Start
[PCLS]: Register CheckAndHandlePclsSparing()...
[imc] initialization start!
[imc] ConfigSystemRetryRegister start!
[imc] ImcCorrectableErrorEnable start!
PMemEccModeInit
[imc] initialization start!
[imc] ConfigSystemRetryRegister start!
[imc] ImcCorrectableErrorEnable start!
PMemEccModeInit
aend!
PROGRESS CODE: V03070003 I0
PDB = c:\efi\servergen2\intel\Build\EagleStreamRpPkg\DEBUG_VS2015x86\X64\ServerRasPkg\Driver\Smm\Gen2\ProcessorErrorHandler\ProcessorErrorHandler\DEBUG\ProcessorErrorHandler.pdb
PROGRESS CODE: V03070002 I0
[IEH] Start IEH initialization!
[IEH] Search all IEH device in the system
CXL Stack found, CxlValid 0x0, Cxl11CompatibilityMode 0x0
CXL Stack found, CxlValid 0x0, Cxl11CompatibilityMode 0x0
CXL Stack found, CxlValid 0x0, Cxl11CompatibilityMode 0x0
CXL Stack found, CxlValid 0x0, Cxl11CompatibilityMode 0x0
CXL Stack found, CxlValid 0x0, Cxl11CompatibilityMode 0x0
CXL Stack found, CxlValid 0x0, Cxl11CompatibilityMode 0x0
CXL Stack found, CxlValid 0x0, Cxl11CompatibilityMode 0x0
CXL Stack found, CxlValid 0x0, Cxl11CompatibilityMode 0x0
CXL Stack found, CxlValid 0x0, Cxl11CompatibilityMode 0x0
CXL Stack found, CxlValid 0x0, Cxl11CompatibilityMode 0x0
CXL Stack found, CxlValid 0x0, Cxl11CompatibilityMode 0x0
CXL Stack found, CxlValid 0x0, Cxl11CompatibilityMode 0x0
[IEH]-------------- Print created IEH tree -----------
socket:0x0 Bus:0x7E Dev:0x0 Func:0x3 -- Max Bit Index:0x1D BitIndex :0x0 DevCount on this bit :0x1,
ShareIdx:0x0 socket:0x0 Bus:0x7E Dev:0x0 Func:0x3 -- BitIndex :0x1 DevCount on this bit :0x1,
ShareIdx:0x0 socket:0x0 Bus:0x0 Dev:0x14 Func:0x4 -- BitIndex :0x0 DevCount on this bit :0x1,
ShareIdx:0x0 socket:0x0 Bus:0x0 Dev:0x14 Func:0x4 -- BitIndex :0x1 DevCount on this bit :0x1,
ShareIdx:0x0 socket:0x0 Bus:0x0 Dev:0x14 Func:0x0 -- BitIndex :0x2 DevCount on this bit :0x1,
ShareIdx:0x0 socket:0x0 Bus:0x0 Dev:0x1F Func:0x0 -- BitIndex :0x3 DevCount on this bit :0x1,
ShareIdx:0x0 socket:0x0 Bus:0x0 Dev:0x8 Func:0x0 -- BitIndex :0x4 DevCount on this bit :0x1,
ShareIdx:0x0 socket:0x0 Bus:0x0 Dev:0x9 Func:0x0 -- BitIndex :0x5 DevCount on this bit :0x1,
ShareIdx:0x0 socket:0x0 Bus:0x0 Dev:0xA Func:0x0 -- BitIndex :0x6 DevCount on this bit :0x1,
ShareIdx:0x0 socket:0x0 Bus:0x0 Dev:0xB Func:0x0 -- BitIndex :0x7 DevCount on this bit :0x1,
ShareIdx:0x0 socket:0x0 Bus:0x0 Dev:0xC Func:0x0 -- BitIndex :0x8 DevCount on this bit :0x1,
ShareIdx:0x0 socket:0x0 Bus:0x0 Dev:0xD Func:0x0 -- BitIndex :0x9 DevCount on this bit :0x1,
ShareIdx:0x0 socket:0x0 Bus:0x0 Dev:0xE Func:0x0 -- BitIndex :0xA DevCount on this bit :0x1,
ShareIdx:0x0 socket:0x0 Bus:0x0 Dev:0xF Func:0x0 -- BitIndex :0xB DevCount on this bit :0x1,
ShareIdx:0x0 socket:0x0 Bus:0x0 Dev:0x10 Func:0x0 -- BitIndex :0xC DevCount on this bit :0x1,
ShareIdx:0x0 socket:0x0 Bus:0x0 Dev:0x11 Func:0x0 -- BitIndex :0xD DevCount on this bit :0x1,
ShareIdx:0x0 socket:0x0 Bus:0x0 Dev:0x12 Func:0x0 -- BitIndex :0xE DevCount on this bit :0x1,
ShareIdx:0x0 socket:0x0 Bus:0x0 Dev:0x13 Func:0x0 -- BitIndex :0xF DevCount on this bit :0x1,
ShareIdx:0x0 socket:0x0 Bus:0x0 Dev:0x1A Func:0x0 -- BitIndex :0x10 DevCount on this bit :0x1,
ShareIdx:0x0 socket:0x0 Bus:0x0 Dev:0x1B Func:0x0 -- BitIndex :0x11 DevCount on this bit :0x1,
ShareIdx:0x0 socket:0x0 Bus:0x0 Dev:0x1C Func:0x0 -- BitIndex :0x12 DevCount on this bit :0x1,
ShareIdx:0x0 socket:0x0 Bus:0x0 Dev:0x1D Func:0x0 -- BitIndex :0x13 DevCount on this bit :0x1,
ShareIdx:0x0 socket:0x0 Bus:0x0 Dev:0x1F Func:0x7 -- BitIndex :0x14 DevCount on this bit :0x1,
ShareIdx:0x0 socket:0x0 Bus:0x0 Dev:0x1F Func:0x4 -- BitIndex :0x15 DevCount on this bit :0x1,
ShareIdx:0x0 socket:0x0 Bus:0x0 Dev:0x1F Func:0x0 -- BitIndex :0x16 DevCount on this bit :0x1,
ShareIdx:0x0 socket:0x0 Bus:0x0 Dev:0x17 Func:0x0 -- BitIndex :0x17 DevCount on this bit :0x1,
ShareIdx:0x0 socket:0x0 Bus:0x0 Dev:0x18 Func:0x0 -- BitIndex :0x18 DevCount on this bit :0x1,
ShareIdx:0x0 socket:0x0 Bus:0x0 Dev:0x19 Func:0x0 -- BitIndex :0x19 DevCount on this bit :0x1,
ShareIdx:0x0 socket:0x0 Bus:0x0 Dev:0x1F Func:0x6 -- BitIndex :0x1A DevCount on this bit :0x1,
ShareIdx:0x0 socket:0x0 Bus:0x0 Dev:0x1F Func:0x3 -- BitIndex :0x1B DevCount on this bit :0x1,
ShareIdx:0x0 socket:0x0 Bus:0x0 Dev:0x16 Func:0x0 -- BitIndex :0x1C DevCount on this bit :0x1,
ShareIdx:0x0 socket:0x0 Bus:0x0 Dev:0x0 Func:0x0 -- BitIndex :0x1D DevCount on this bit :0x1,
ShareIdx:0x0 socket:0x0 Bus:0x0 Dev:0x1 Func:0x0 -- BitIndex :0x1E DevCount on this bit :0x1,
ShareIdx:0x0 socket:0x0 Bus:0x0 Dev:0x0 Func:0x0 -- BitIndex :0x1F DevCount on this bit :0x1,
ShareIdx:0x0 socket:0x0 Bus:0x0 Dev:0x0 Func:0x0 -- BitIndex :0x2 DevCount on this bit :0x1,
ShareIdx:0x0 socket:0x0 Bus:0x6A Dev:0x0 Func:0x4 -- BitIndex :0x0 DevCount on this bit :0xA,
ShareIdx:0x0 socket:0x0 Bus:0x6A Dev:0x0 Func:0x4 -- ShareIdx:0x1 socket:0x0 Bus:0x6A Dev:0x0 Func:0x4 -- PSF Dino ShareIdx:0x2 socket:0x0 Bus:0x6A Dev:0x0 Func:0x4 -- PSF HCx ShareIdx:0x3 socket:0x0 Bus:0x6A Dev:0x1 Func:0x0 -- ShareIdx:0x4 socket:0x0 Bus:0x6A Dev:0x2 Func:0x0 -- ShareIdx:0x5 socket:0x0 Bus:0x6A Dev:0x3 Func:0x0 -- ShareIdx:0x6 socket:0x0 Bus:0x6A Dev:0x3 Func:0x1 -- ShareIdx:0x7 socket:0x0 Bus:0x6A Dev:0x3 Func:0x2 -- ShareIdx:0x8 socket:0x0 Bus:0x6B Dev:0x0 Func:0x0 -- ShareIdx:0x9 socket:0x0 Bus:0x6D Dev:0x0 Func:0x0 -- BitIndex :0x1 DevCount on this bit :0x3,
ShareIdx:0x0 socket:0x0 Bus:0x6A Dev:0x0 Func:0x0 -- ShareIdx:0x1 socket:0x0 Bus:0x6A Dev:0x0 Func:0x1 -- ShareIdx:0x2 socket:0x0 Bus:0x6A Dev:0x0 Func:0x2 -- BitIndex :0x3 DevCount on this bit :0x1,
ShareIdx:0x0 socket:0x0 Bus:0x0 Dev:0x0 Func:0x4 -- BitIndex :0x0 DevCount on this bit :0x7,
ShareIdx:0x0 socket:0x0 Bus:0x0 Dev:0x0 Func:0x4 -- ShareIdx:0x1 socket:0x0 Bus:0x0 Dev:0x0 Func:0x4 -- PSF PCIE Pi5 ShareIdx:0x2 socket:0x0 Bus:0x0 Dev:0x0 Func:0x4 -- PCIE GEN4 DMI Pi5 ShareIdx:0x3 socket:0x0 Bus:0x0 Dev:0x0 Func:0x4 -- PCIE GEN5 IAL Pi5 (CXL) ShareIdx:0x4 socket:0x0 Bus:0x0 Dev:0x0 Func:0x4 -- SPD I3C Bus ShareIdx:0x5 socket:0x0 Bus:0x0 Dev:0x0 Func:0x4 -- SPD I3C Bus ShareIdx:0x6 socket:0x0 Bus:0x0 Dev:0x0 Func:0x4 -- CXP SMBUS BitIndex :0x1 DevCount on this bit :0x3,
ShareIdx:0x0 socket:0x0 Bus:0x0 Dev:0x0 Func:0x0 -- ShareIdx:0x1 socket:0x0 Bus:0x0 Dev:0x0 Func:0x1 -- ShareIdx:0x2 socket:0x0 Bus:0x0 Dev:0x0 Func:0x2 -- BitIndex :0x2 DevCount on this bit :0x1,
ShareIdx:0x0 socket:0x0 Bus:0x0 Dev:0x8 Func:0x0 -- BitIndex :0x3 DevCount on this bit :0x1,
ShareIdx:0x0 socket:0x0 Bus:0x0 Dev:0x6 Func:0x0 -- BitIndex :0x4 DevCount on this bit :0x1,
ShareIdx:0x0 socket:0x0 Bus:0x0 Dev:0x4 Func:0x0 -- BitIndex :0x5 DevCount on this bit :0x1,
ShareIdx:0x0 socket:0x0 Bus:0x0 Dev:0x2 Func:0x0 -- BitIndex :0x6 DevCount on this bit :0x1,
ShareIdx:0x0 socket:0x0 Bus:0x0 Dev:0x1 Func:0x0 -- BitIndex :0x7 DevCount on this bit :0x1,
ShareIdx:0x0 socket:0x0 Bus:0x0 Dev:0x3 Func:0x0 -- BitIndex :0x8 DevCount on this bit :0x1,
ShareIdx:0x0 socket:0x0 Bus:0x0 Dev:0x5 Func:0x0 -- BitIndex :0x9 DevCount on this bit :0x1,
ShareIdx:0x0 socket:0x0 Bus:0x0 Dev:0x7 Func:0x0 -- BitIndex :0xA DevCount on this bit :0x1,
Skip Invalid Node
BitIndex :0x4 DevCount on this bit :0x1,
ShareIdx:0x0 socket:0x0 Bus:0x15 Dev:0x0 Func:0x4 -- BitIndex :0x0 DevCount on this bit :0x4,
ShareIdx:0x0 socket:0x0 Bus:0x15 Dev:0x0 Func:0x4 -- ShareIdx:0x1 socket:0x0 Bus:0x15 Dev:0x0 Func:0x4 -- PSF PCIE Pi5 ShareIdx:0x2 socket:0x0 Bus:0x15 Dev:0x0 Func:0x4 -- PCIE GEN4 DMI Pi5 ShareIdx:0x3 socket:0x0 Bus:0x15 Dev:0x0 Func:0x4 -- PCIE GEN5 IAL Pi5 (CXL) BitIndex :0x1 DevCount on this bit :0x3,
ShareIdx:0x0 socket:0x0 Bus:0x15 Dev:0x0 Func:0x0 -- ShareIdx:0x1 socket:0x0 Bus:0x15 Dev:0x0 Func:0x1 -- ShareIdx:0x2 socket:0x0 Bus:0x15 Dev:0x0 Func:0x2 -- BitIndex :0x2 DevCount on this bit :0x1,
ShareIdx:0x0 socket:0x0 Bus:0x15 Dev:0x8 Func:0x0 -- BitIndex :0x3 DevCount on this bit :0x1,
ShareIdx:0x0 socket:0x0 Bus:0x15 Dev:0x6 Func:0x0 -- BitIndex :0x4 DevCount on this bit :0x1,
ShareIdx:0x0 socket:0x0 Bus:0x15 Dev:0x4 Func:0x0 -- BitIndex :0x5 DevCount on this bit :0x1,
ShareIdx:0x0 socket:0x0 Bus:0x15 Dev:0x2 Func:0x0 -- BitIndex :0x6 DevCount on this bit :0x1,
ShareIdx:0x0 socket:0x0 Bus:0x15 Dev:0x1 Func:0x0 -- BitIndex :0x7 DevCount on this bit :0x1,
ShareIdx:0x0 socket:0x0 Bus:0x15 Dev:0x3 Func:0x0 -- BitIndex :0x8 DevCount on this bit :0x1,
ShareIdx:0x0 socket:0x0 Bus:0x15 Dev:0x5 Func:0x0 -- BitIndex :0x9 DevCount on this bit :0x1,
ShareIdx:0x0 socket:0x0 Bus:0x15 Dev:0x7 Func:0x0 -- BitIndex :0x5 DevCount on this bit :0x1,
ShareIdx:0x0 socket:0x0 Bus:0x6F Dev:0x0 Func:0x4 -- BitIndex :0x0 DevCount on this bit :0xA,
ShareIdx:0x0 socket:0x0 Bus:0x6F Dev:0x0 Func:0x4 -- ShareIdx:0x1 socket:0x0 Bus:0x6F Dev:0x0 Func:0x4 -- PSF Dino ShareIdx:0x2 socket:0x0 Bus:0x6F Dev:0x0 Func:0x4 -- PSF HCx ShareIdx:0x3 socket:0x0 Bus:0x6F Dev:0x1 Func:0x0 -- ShareIdx:0x4 socket:0x0 Bus:0x6F Dev:0x2 Func:0x0 -- ShareIdx:0x5 socket:0x0 Bus:0x6F Dev:0x3 Func:0x0 -- ShareIdx:0x6 socket:0x0 Bus:0x6F Dev:0x3 Func:0x1 -- ShareIdx:0x7 socket:0x0 Bus:0x6F Dev:0x3 Func:0x2 -- ShareIdx:0x8 socket:0x0 Bus:0x70 Dev:0x0 Func:0x0 -- ShareIdx:0x9 socket:0x0 Bus:0x72 Dev:0x0 Func:0x0 -- BitIndex :0x1 DevCount on this bit :0x3,
ShareIdx:0x0 socket:0x0 Bus:0x6F Dev:0x0 Func:0x0 -- ShareIdx:0x1 socket:0x0 Bus:0x6F Dev:0x0 Func:0x1 -- ShareIdx:0x2 socket:0x0 Bus:0x6F Dev:0x0 Func:0x2 -- BitIndex :0x6 DevCount on this bit :0x1,
Skip Invalid Node
BitIndex :0x7 DevCount on this bit :0x1,
ShareIdx:0x0 socket:0x0 Bus:0x59 Dev:0x0 Func:0x4 -- BitIndex :0x0 DevCount on this bit :0x4,
ShareIdx:0x0 socket:0x0 Bus:0x59 Dev:0x0 Func:0x4 -- ShareIdx:0x1 socket:0x0 Bus:0x59 Dev:0x0 Func:0x4 -- PSF PCIE Pi5 ShareIdx:0x2 socket:0x0 Bus:0x59 Dev:0x0 Func:0x4 -- PCIE GEN4 DMI Pi5 ShareIdx:0x3 socket:0x0 Bus:0x59 Dev:0x0 Func:0x4 -- PCIE GEN5 IAL Pi5 (CXL) BitIndex :0x1 DevCount on this bit :0x3,
ShareIdx:0x0 socket:0x0 Bus:0x59 Dev:0x0 Func:0x0 -- ShareIdx:0x1 socket:0x0 Bus:0x59 Dev:0x0 Func:0x1 -- ShareIdx:0x2 socket:0x0 Bus:0x59 Dev:0x0 Func:0x2 -- BitIndex :0x2 DevCount on this bit :0x1,
ShareIdx:0x0 socket:0x0 Bus:0x59 Dev:0x8 Func:0x0 -- BitIndex :0x3 DevCount on this bit :0x1,
ShareIdx:0x0 socket:0x0 Bus:0x59 Dev:0x6 Func:0x0 -- BitIndex :0x4 DevCount on this bit :0x1,
ShareIdx:0x0 socket:0x0 Bus:0x59 Dev:0x4 Func:0x0 -- BitIndex :0x5 DevCount on this bit :0x1,
ShareIdx:0x0 socket:0x0 Bus:0x59 Dev:0x2 Func:0x0 -- BitIndex :0x6 DevCount on this bit :0x1,
ShareIdx:0x0 socket:0x0 Bus:0x59 Dev:0x1 Func:0x0 -- BitIndex :0x7 DevCount on this bit :0x1,
ShareIdx:0x0 socket:0x0 Bus:0x59 Dev:0x3 Func:0x0 -- BitIndex :0x8 DevCount on this bit :0x1,
ShareIdx:0x0 socket:0x0 Bus:0x59 Dev:0x5 Func:0x0 -- BitIndex :0x9 DevCount on this bit :0x1,
ShareIdx:0x0 socket:0x0 Bus:0x59 Dev:0x7 Func:0x0 -- BitIndex :0x8 DevCount on this bit :0x1,
ShareIdx:0x0 socket:0x0 Bus:0x74 Dev:0x0 Func:0x4 -- BitIndex :0x0 DevCount on this bit :0xA,
ShareIdx:0x0 socket:0x0 Bus:0x74 Dev:0x0 Func:0x4 -- ShareIdx:0x1 socket:0x0 Bus:0x74 Dev:0x0 Func:0x4 -- PSF Dino ShareIdx:0x2 socket:0x0 Bus:0x74 Dev:0x0 Func:0x4 -- PSF HCx ShareIdx:0x3 socket:0x0 Bus:0x74 Dev:0x1 Func:0x0 -- ShareIdx:0x4 socket:0x0 Bus:0x74 Dev:0x2 Func:0x0 -- ShareIdx:0x5 socket:0x0 Bus:0x74 Dev:0x3 Func:0x0 -- ShareIdx:0x6 socket:0x0 Bus:0x74 Dev:0x3 Func:0x1 -- ShareIdx:0x7 socket:0x0 Bus:0x74 Dev:0x3 Func:0x2 -- ShareIdx:0x8 socket:0x0 Bus:0x75 Dev:0x0 Func:0x0 -- ShareIdx:0x9 socket:0x0 Bus:0x77 Dev:0x0 Func:0x0 -- BitIndex :0x1 DevCount on this bit :0x3,
ShareIdx:0x0 socket:0x0 Bus:0x74 Dev:0x0 Func:0x0 -- ShareIdx:0x1 socket:0x0 Bus:0x74 Dev:0x0 Func:0x1 -- ShareIdx:0x2 socket:0x0 Bus:0x74 Dev:0x0 Func:0x2 -- BitIndex :0x9 DevCount on this bit :0x1,
ShareIdx:0x0 socket:0x0 Bus:0x37 Dev:0x0 Func:0x4 -- BitIndex :0x0 DevCount on this bit :0x4,
ShareIdx:0x0 socket:0x0 Bus:0x37 Dev:0x0 Func:0x4 -- ShareIdx:0x1 socket:0x0 Bus:0x37 Dev:0x0 Func:0x4 -- PSF PCIE Pi5 ShareIdx:0x2 socket:0x0 Bus:0x37 Dev:0x0 Func:0x4 -- PCIE GEN4 DMI Pi5 ShareIdx:0x3 socket:0x0 Bus:0x37 Dev:0x0 Func:0x4 -- PCIE GEN5 IAL Pi5 (CXL) BitIndex :0x1 DevCount on this bit :0x3,
ShareIdx:0x0 socket:0x0 Bus:0x37 Dev:0x0 Func:0x0 -- ShareIdx:0x1 socket:0x0 Bus:0x37 Dev:0x0 Func:0x1 -- ShareIdx:0x2 socket:0x0 Bus:0x37 Dev:0x0 Func:0x2 -- BitIndex :0x2 DevCount on this bit :0x1,
ShareIdx:0x0 socket:0x0 Bus:0x37 Dev:0x8 Func:0x0 -- BitIndex :0x3 DevCount on this bit :0x1,
ShareIdx:0x0 socket:0x0 Bus:0x37 Dev:0x6 Func:0x0 -- BitIndex :0x4 DevCount on this bit :0x1,
ShareIdx:0x0 socket:0x0 Bus:0x37 Dev:0x4 Func:0x0 -- BitIndex :0x5 DevCount on this bit :0x1,
ShareIdx:0x0 socket:0x0 Bus:0x37 Dev:0x2 Func:0x0 -- BitIndex :0x6 DevCount on this bit :0x1,
ShareIdx:0x0 socket:0x0 Bus:0x37 Dev:0x1 Func:0x0 -- BitIndex :0x7 DevCount on this bit :0x1,
ShareIdx:0x0 socket:0x0 Bus:0x37 Dev:0x3 Func:0x0 -- BitIndex :0x8 DevCount on this bit :0x1,
ShareIdx:0x0 socket:0x0 Bus:0x37 Dev:0x5 Func:0x0 -- BitIndex :0x9 DevCount on this bit :0x1,
ShareIdx:0x0 socket:0x0 Bus:0x37 Dev:0x7 Func:0x0 -- BitIndex :0xA DevCount on this bit :0x1,
ShareIdx:0x0 socket:0x0 Bus:0x26 Dev:0x0 Func:0x4 -- BitIndex :0x0 DevCount on this bit :0x4,
ShareIdx:0x0 socket:0x0 Bus:0x26 Dev:0x0 Func:0x4 -- ShareIdx:0x1 socket:0x0 Bus:0x26 Dev:0x0 Func:0x4 -- PSF PCIE Pi5 ShareIdx:0x2 socket:0x0 Bus:0x26 Dev:0x0 Func:0x4 -- PCIE GEN4 DMI Pi5 ShareIdx:0x3 socket:0x0 Bus:0x26 Dev:0x0 Func:0x4 -- PCIE GEN5 IAL Pi5 (CXL) BitIndex :0x1 DevCount on this bit :0x3,
ShareIdx:0x0 socket:0x0 Bus:0x26 Dev:0x0 Func:0x0 -- ShareIdx:0x1 socket:0x0 Bus:0x26 Dev:0x0 Func:0x1 -- ShareIdx:0x2 socket:0x0 Bus:0x26 Dev:0x0 Func:0x2 -- BitIndex :0x2 DevCount on this bit :0x1,
ShareIdx:0x0 socket:0x0 Bus:0x26 Dev:0x8 Func:0x0 -- BitIndex :0x3 DevCount on this bit :0x1,
ShareIdx:0x0 socket:0x0 Bus:0x26 Dev:0x6 Func:0x0 -- BitIndex :0x4 DevCount on this bit :0x1,
ShareIdx:0x0 socket:0x0 Bus:0x26 Dev:0x4 Func:0x0 -- BitIndex :0x5 DevCount on this bit :0x1,
ShareIdx:0x0 socket:0x0 Bus:0x26 Dev:0x2 Func:0x0 -- BitIndex :0x6 DevCount on this bit :0x1,
ShareIdx:0x0 socket:0x0 Bus:0x26 Dev:0x1 Func:0x0 -- BitIndex :0x7 DevCount on this bit :0x1,
ShareIdx:0x0 socket:0x0 Bus:0x26 Dev:0x3 Func:0x0 -- BitIndex :0x8 DevCount on this bit :0x1,
ShareIdx:0x0 socket:0x0 Bus:0x26 Dev:0x5 Func:0x0 -- BitIndex :0x9 DevCount on this bit :0x1,
ShareIdx:0x0 socket:0x0 Bus:0x26 Dev:0x7 Func:0x0 -- BitIndex :0xB DevCount on this bit :0x1,
ShareIdx:0x0 socket:0x0 Bus:0x79 Dev:0x0 Func:0x4 -- BitIndex :0x0 DevCount on this bit :0xA,
ShareIdx:0x0 socket:0x0 Bus:0x79 Dev:0x0 Func:0x4 -- ShareIdx:0x1 socket:0x0 Bus:0x79 Dev:0x0 Func:0x4 -- PSF Dino ShareIdx:0x2 socket:0x0 Bus:0x79 Dev:0x0 Func:0x4 -- PSF HCx ShareIdx:0x3 socket:0x0 Bus:0x79 Dev:0x1 Func:0x0 -- ShareIdx:0x4 socket:0x0 Bus:0x79 Dev:0x2 Func:0x0 -- ShareIdx:0x5 socket:0x0 Bus:0x79 Dev:0x3 Func:0x0 -- ShareIdx:0x6 socket:0x0 Bus:0x79 Dev:0x3 Func:0x1 -- ShareIdx:0x7 socket:0x0 Bus:0x79 Dev:0x3 Func:0x2 -- ShareIdx:0x8 socket:0x0 Bus:0x7A Dev:0x0 Func:0x0 -- ShareIdx:0x9 socket:0x0 Bus:0x7C Dev:0x0 Func:0x0 -- BitIndex :0x1 DevCount on this bit :0x3,
ShareIdx:0x0 socket:0x0 Bus:0x79 Dev:0x0 Func:0x0 -- ShareIdx:0x1 socket:0x0 Bus:0x79 Dev:0x0 Func:0x1 -- ShareIdx:0x2 socket:0x0 Bus:0x79 Dev:0x0 Func:0x2 -- BitIndex :0xC DevCount on this bit :0x1,
Skip Invalid Node
BitIndex :0xD DevCount on this bit :0x1,
ShareIdx:0x0 socket:0x0 Bus:0x48 Dev:0x0 Func:0x4 -- BitIndex :0x0 DevCount on this bit :0x4,
ShareIdx:0x0 socket:0x0 Bus:0x48 Dev:0x0 Func:0x4 -- ShareIdx:0x1 socket:0x0 Bus:0x48 Dev:0x0 Func:0x4 -- PSF PCIE Pi5 ShareIdx:0x2 socket:0x0 Bus:0x48 Dev:0x0 Func:0x4 -- PCIE GEN4 DMI Pi5 ShareIdx:0x3 socket:0x0 Bus:0x48 Dev:0x0 Func:0x4 -- PCIE GEN5 IAL Pi5 (CXL) BitIndex :0x1 DevCount on this bit :0x3,
ShareIdx:0x0 socket:0x0 Bus:0x48 Dev:0x0 Func:0x0 -- ShareIdx:0x1 socket:0x0 Bus:0x48 Dev:0x0 Func:0x1 -- ShareIdx:0x2 socket:0x0 Bus:0x48 Dev:0x0 Func:0x2 -- BitIndex :0x2 DevCount on this bit :0x1,
ShareIdx:0x0 socket:0x0 Bus:0x48 Dev:0x8 Func:0x0 -- BitIndex :0x3 DevCount on this bit :0x1,
ShareIdx:0x0 socket:0x0 Bus:0x48 Dev:0x6 Func:0x0 -- BitIndex :0x4 DevCount on this bit :0x1,
ShareIdx:0x0 socket:0x0 Bus:0x48 Dev:0x4 Func:0x0 -- BitIndex :0x5 DevCount on this bit :0x1,
ShareIdx:0x0 socket:0x0 Bus:0x48 Dev:0x2 Func:0x0 -- BitIndex :0x6 DevCount on this bit :0x1,
ShareIdx:0x0 socket:0x0 Bus:0x48 Dev:0x1 Func:0x0 -- BitIndex :0x7 DevCount on this bit :0x1,
ShareIdx:0x0 socket:0x0 Bus:0x48 Dev:0x3 Func:0x0 -- BitIndex :0x8 DevCount on this bit :0x1,
ShareIdx:0x0 socket:0x0 Bus:0x48 Dev:0x5 Func:0x0 -- BitIndex :0x9 DevCount on this bit :0x1,
ShareIdx:0x0 socket:0x0 Bus:0x48 Dev:0x7 Func:0x0 -- BitIndex :0xE DevCount on this bit :0x0,
BitIndex :0xF DevCount on this bit :0x0,
BitIndex :0x10 DevCount on this bit :0x0,
BitIndex :0x11 DevCount on this bit :0x0,
BitIndex :0x12 DevCount on this bit :0x0,
BitIndex :0x13 DevCount on this bit :0x0,
BitIndex :0x14 DevCount on this bit :0x0,
BitIndex :0x15 DevCount on this bit :0x0,
BitIndex :0x16 DevCount on this bit :0x4,
ShareIdx:0x0 socket:0x0 Bus:0x7E Dev:0x0 Func:0x0 -- ShareIdx:0x1 socket:0x0 Bus:0x7E Dev:0x0 Func:0x0 -- ShareIdx:0x2 socket:0x0 Bus:0x7E Dev:0x0 Func:0x0 -- ShareIdx:0x3 socket:0x0 Bus:0x7E Dev:0x0 Func:0x0 -- BitIndex :0x17 DevCount on this bit :0x4,
ShareIdx:0x0 socket:0x0 Bus:0x7E Dev:0x0 Func:0x0 -- ShareIdx:0x1 socket:0x0 Bus:0x7E Dev:0x0 Func:0x0 -- ShareIdx:0x2 socket:0x0 Bus:0x7E Dev:0x0 Func:0x0 -- ShareIdx:0x3 socket:0x0 Bus:0x7E Dev:0x0 Func:0x0 -- BitIndex :0x18 DevCount on this bit :0x4,
ShareIdx:0x0 socket:0x0 Bus:0x7E Dev:0x0 Func:0x0 -- ShareIdx:0x1 socket:0x0 Bus:0x7E Dev:0x0 Func:0x0 -- ShareIdx:0x2 socket:0x0 Bus:0x7E Dev:0x0 Func:0x0 -- ShareIdx:0x3 socket:0x0 Bus:0x7E Dev:0x0 Func:0x0 -- BitIndex :0x19 DevCount on this bit :0x4,
ShareIdx:0x0 socket:0x0 Bus:0x7E Dev:0x0 Func:0x0 -- ShareIdx:0x1 socket:0x0 Bus:0x7E Dev:0x0 Func:0x0 -- ShareIdx:0x2 socket:0x0 Bus:0x7E Dev:0x0 Func:0x0 -- ShareIdx:0x3 socket:0x0 Bus:0x7E Dev:0x0 Func:0x0 -- BitIndex :0x1A DevCount on this bit :0x4,
ShareIdx:0x0 socket:0x0 Bus:0x7E Dev:0x0 Func:0x0 -- ShareIdx:0x1 socket:0x0 Bus:0x7E Dev:0x0 Func:0x0 -- ShareIdx:0x2 socket:0x0 Bus:0x7E Dev:0x0 Func:0x0 -- ShareIdx:0x3 socket:0x0 Bus:0x7E Dev:0x0 Func:0x0 -- BitIndex :0x1B DevCount on this bit :0x4,
ShareIdx:0x0 socket:0x0 Bus:0x7E Dev:0x0 Func:0x0 -- ShareIdx:0x1 socket:0x0 Bus:0x7E Dev:0x0 Func:0x0 -- ShareIdx:0x2 socket:0x0 Bus:0x7E Dev:0x0 Func:0x0 -- ShareIdx:0x3 socket:0x0 Bus:0x7E Dev:0x0 Func:0x0 -- BitIndex :0x1C DevCount on this bit :0x4,
ShareIdx:0x0 socket:0x0 Bus:0x7E Dev:0x0 Func:0x0 -- ShareIdx:0x1 socket:0x0 Bus:0x7E Dev:0x0 Func:0x0 -- ShareIdx:0x2 socket:0x0 Bus:0x7E Dev:0x0 Func:0x0 -- ShareIdx:0x3 socket:0x0 Bus:0x7E Dev:0x0 Func:0x0 -- BitIndex :0x1D DevCount on this bit :0x4,
ShareIdx:0x0 socket:0x0 Bus:0x7E Dev:0x0 Func:0x0 -- ShareIdx:0x1 socket:0x0 Bus:0x7E Dev:0x0 Func:0x0 -- ShareIdx:0x2 socket:0x0 Bus:0x7E Dev:0x0 Func:0x0 -- ShareIdx:0x3 socket:0x0 Bus:0x7E Dev:0x0 Func:0x0 -- socket:0x1 Bus:0xFE Dev:0x0 Func:0x3 -- Max Bit Index:0x1D BitIndex :0x0 DevCount on this bit :0x1,
ShareIdx:0x0 socket:0x1 Bus:0xFE Dev:0x0 Func:0x3 -- BitIndex :0x1 DevCount on this bit :0x1,
Skip Invalid Node
BitIndex :0x2 DevCount on this bit :0x1,
ShareIdx:0x0 socket:0x1 Bus:0xE7 Dev:0x0 Func:0x4 -- BitIndex :0x0 DevCount on this bit :0xA,
ShareIdx:0x0 socket:0x1 Bus:0xE7 Dev:0x0 Func:0x4 -- ShareIdx:0x1 socket:0x1 Bus:0xE7 Dev:0x0 Func:0x4 -- PSF Dino ShareIdx:0x2 socket:0x1 Bus:0xE7 Dev:0x0 Func:0x4 -- PSF HCx ShareIdx:0x3 socket:0x1 Bus:0xE7 Dev:0x1 Func:0x0 -- ShareIdx:0x4 socket:0x1 Bus:0xE7 Dev:0x2 Func:0x0 -- ShareIdx:0x5 socket:0x1 Bus:0xE7 Dev:0x3 Func:0x0 -- ShareIdx:0x6 socket:0x1 Bus:0xE7 Dev:0x3 Func:0x1 -- ShareIdx:0x7 socket:0x1 Bus:0xE7 Dev:0x3 Func:0x2 -- ShareIdx:0x8 socket:0x1 Bus:0xE8 Dev:0x0 Func:0x0 -- ShareIdx:0x9 socket:0x1 Bus:0xEA Dev:0x0 Func:0x0 -- BitIndex :0x1 DevCount on this bit :0x3,
ShareIdx:0x0 socket:0x1 Bus:0xE7 Dev:0x0 Func:0x0 -- ShareIdx:0x1 socket:0x1 Bus:0xE7 Dev:0x0 Func:0x1 -- ShareIdx:0x2 socket:0x1 Bus:0xE7 Dev:0x0 Func:0x2 -- BitIndex :0x3 DevCount on this bit :0x1,
ShareIdx:0x0 socket:0x1 Bus:0x80 Dev:0x0 Func:0x4 -- BitIndex :0x0 DevCount on this bit :0x7,
ShareIdx:0x0 socket:0x1 Bus:0x80 Dev:0x0 Func:0x4 -- ShareIdx:0x1 socket:0x1 Bus:0x80 Dev:0x0 Func:0x4 -- PSF PCIE Pi5 ShareIdx:0x2 socket:0x1 Bus:0x80 Dev:0x0 Func:0x4 -- PCIE GEN4 DMI Pi5 ShareIdx:0x3 socket:0x1 Bus:0x80 Dev:0x0 Func:0x4 -- PCIE GEN5 IAL Pi5 (CXL) ShareIdx:0x4 socket:0x1 Bus:0x80 Dev:0x0 Func:0x4 -- SPD I3C Bus ShareIdx:0x5 socket:0x1 Bus:0x80 Dev:0x0 Func:0x4 -- SPD I3C Bus ShareIdx:0x6 socket:0x1 Bus:0x80 Dev:0x0 Func:0x4 -- CXP SMBUS BitIndex :0x1 DevCount on this bit :0x3,
ShareIdx:0x0 socket:0x1 Bus:0x80 Dev:0x0 Func:0x0 -- ShareIdx:0x1 socket:0x1 Bus:0x80 Dev:0x0 Func:0x1 -- ShareIdx:0x2 socket:0x1 Bus:0x80 Dev:0x0 Func:0x2 -- BitIndex :0x2 DevCount on this bit :0x1,
ShareIdx:0x0 socket:0x1 Bus:0x80 Dev:0x8 Func:0x0 -- BitIndex :0x3 DevCount on this bit :0x1,
ShareIdx:0x0 socket:0x1 Bus:0x80 Dev:0x6 Func:0x0 -- BitIndex :0x4 DevCount on this bit :0x1,
ShareIdx:0x0 socket:0x1 Bus:0x80 Dev:0x4 Func:0x0 -- BitIndex :0x5 DevCount on this bit :0x1,
ShareIdx:0x0 socket:0x1 Bus:0x80 Dev:0x2 Func:0x0 -- BitIndex :0x6 DevCount on this bit :0x1,
ShareIdx:0x0 socket:0x1 Bus:0x80 Dev:0x1 Func:0x0 -- BitIndex :0x7 DevCount on this bit :0x1,
ShareIdx:0x0 socket:0x1 Bus:0x80 Dev:0x3 Func:0x0 -- BitIndex :0x8 DevCount on this bit :0x1,
ShareIdx:0x0 socket:0x1 Bus:0x80 Dev:0x5 Func:0x0 -- BitIndex :0x9 DevCount on this bit :0x1,
ShareIdx:0x0 socket:0x1 Bus:0x80 Dev:0x7 Func:0x0 -- BitIndex :0xA DevCount on this bit :0x1,
Skip Invalid Node
BitIndex :0x4 DevCount on this bit :0x1,
ShareIdx:0x0 socket:0x1 Bus:0x97 Dev:0x0 Func:0x4 -- BitIndex :0x0 DevCount on this bit :0x4,
ShareIdx:0x0 socket:0x1 Bus:0x97 Dev:0x0 Func:0x4 -- ShareIdx:0x1 socket:0x1 Bus:0x97 Dev:0x0 Func:0x4 -- PSF PCIE Pi5 ShareIdx:0x2 socket:0x1 Bus:0x97 Dev:0x0 Func:0x4 -- PCIE GEN4 DMI Pi5 ShareIdx:0x3 socket:0x1 Bus:0x97 Dev:0x0 Func:0x4 -- PCIE GEN5 IAL Pi5 (CXL) BitIndex :0x1 DevCount on this bit :0x3,
ShareIdx:0x0 socket:0x1 Bus:0x97 Dev:0x0 Func:0x0 -- ShareIdx:0x1 socket:0x1 Bus:0x97 Dev:0x0 Func:0x1 -- ShareIdx:0x2 socket:0x1 Bus:0x97 Dev:0x0 Func:0x2 -- BitIndex :0x2 DevCount on this bit :0x1,
ShareIdx:0x0 socket:0x1 Bus:0x97 Dev:0x8 Func:0x0 -- BitIndex :0x3 DevCount on this bit :0x1,
ShareIdx:0x0 socket:0x1 Bus:0x97 Dev:0x6 Func:0x0 -- BitIndex :0x4 DevCount on this bit :0x1,
ShareIdx:0x0 socket:0x1 Bus:0x97 Dev:0x4 Func:0x0 -- BitIndex :0x5 DevCount on this bit :0x1,
ShareIdx:0x0 socket:0x1 Bus:0x97 Dev:0x2 Func:0x0 -- BitIndex :0x6 DevCount on this bit :0x1,
ShareIdx:0x0 socket:0x1 Bus:0x97 Dev:0x1 Func:0x0 -- BitIndex :0x7 DevCount on this bit :0x1,
ShareIdx:0x0 socket:0x1 Bus:0x97 Dev:0x3 Func:0x0 -- BitIndex :0x8 DevCount on this bit :0x1,
ShareIdx:0x0 socket:0x1 Bus:0x97 Dev:0x5 Func:0x0 -- BitIndex :0x9 DevCount on this bit :0x1,
ShareIdx:0x0 socket:0x1 Bus:0x97 Dev:0x7 Func:0x0 -- BitIndex :0x5 DevCount on this bit :0x1,
ShareIdx:0x0 socket:0x1 Bus:0xEC Dev:0x0 Func:0x4 -- BitIndex :0x0 DevCount on this bit :0xA,
ShareIdx:0x0 socket:0x1 Bus:0xEC Dev:0x0 Func:0x4 -- ShareIdx:0x1 socket:0x1 Bus:0xEC Dev:0x0 Func:0x4 -- PSF Dino ShareIdx:0x2 socket:0x1 Bus:0xEC Dev:0x0 Func:0x4 -- PSF HCx ShareIdx:0x3 socket:0x1 Bus:0xEC Dev:0x1 Func:0x0 -- ShareIdx:0x4 socket:0x1 Bus:0xEC Dev:0x2 Func:0x0 -- ShareIdx:0x5 socket:0x1 Bus:0xEC Dev:0x3 Func:0x0 -- ShareIdx:0x6 socket:0x1 Bus:0xEC Dev:0x3 Func:0x1 -- ShareIdx:0x7 socket:0x1 Bus:0xEC Dev:0x3 Func:0x2 -- ShareIdx:0x8 socket:0x1 Bus:0xED Dev:0x0 Func:0x0 -- ShareIdx:0x9 socket:0x1 Bus:0xEF Dev:0x0 Func:0x0 -- BitIndex :0x1 DevCount on this bit :0x3,
ShareIdx:0x0 socket:0x1 Bus:0xEC Dev:0x0 Func:0x0 -- ShareIdx:0x1 socket:0x1 Bus:0xEC Dev:0x0 Func:0x1 -- ShareIdx:0x2 socket:0x1 Bus:0xEC Dev:0x0 Func:0x2 -- BitIndex :0x6 DevCount on this bit :0x1,
Skip Invalid Node
BitIndex :0x7 DevCount on this bit :0x1,
ShareIdx:0x0 socket:0x1 Bus:0xD7 Dev:0x0 Func:0x4 -- BitIndex :0x0 DevCount on this bit :0x4,
ShareIdx:0x0 socket:0x1 Bus:0xD7 Dev:0x0 Func:0x4 -- ShareIdx:0x1 socket:0x1 Bus:0xD7 Dev:0x0 Func:0x4 -- PSF PCIE Pi5 ShareIdx:0x2 socket:0x1 Bus:0xD7 Dev:0x0 Func:0x4 -- PCIE GEN4 DMI Pi5 ShareIdx:0x3 socket:0x1 Bus:0xD7 Dev:0x0 Func:0x4 -- PCIE GEN5 IAL Pi5 (CXL) BitIndex :0x1 DevCount on this bit :0x3,
ShareIdx:0x0 socket:0x1 Bus:0xD7 Dev:0x0 Func:0x0 -- ShareIdx:0x1 socket:0x1 Bus:0xD7 Dev:0x0 Func:0x1 -- ShareIdx:0x2 socket:0x1 Bus:0xD7 Dev:0x0 Func:0x2 -- BitIndex :0x2 DevCount on this bit :0x1,
ShareIdx:0x0 socket:0x1 Bus:0xD7 Dev:0x8 Func:0x0 -- BitIndex :0x3 DevCount on this bit :0x1,
ShareIdx:0x0 socket:0x1 Bus:0xD7 Dev:0x6 Func:0x0 -- BitIndex :0x4 DevCount on this bit :0x1,
ShareIdx:0x0 socket:0x1 Bus:0xD7 Dev:0x4 Func:0x0 -- BitIndex :0x5 DevCount on this bit :0x1,
ShareIdx:0x0 socket:0x1 Bus:0xD7 Dev:0x2 Func:0x0 -- BitIndex :0x6 DevCount on this bit :0x1,
ShareIdx:0x0 socket:0x1 Bus:0xD7 Dev:0x1 Func:0x0 -- BitIndex :0x7 DevCount on this bit :0x1,
ShareIdx:0x0 socket:0x1 Bus:0xD7 Dev:0x3 Func:0x0 -- BitIndex :0x8 DevCount on this bit :0x1,
ShareIdx:0x0 socket:0x1 Bus:0xD7 Dev:0x5 Func:0x0 -- BitIndex :0x9 DevCount on this bit :0x1,
ShareIdx:0x0 socket:0x1 Bus:0xD7 Dev:0x7 Func:0x0 -- BitIndex :0x8 DevCount on this bit :0x1,
ShareIdx:0x0 socket:0x1 Bus:0xF1 Dev:0x0 Func:0x4 -- BitIndex :0x0 DevCount on this bit :0xA,
ShareIdx:0x0 socket:0x1 Bus:0xF1 Dev:0x0 Func:0x4 -- ShareIdx:0x1 socket:0x1 Bus:0xF1 Dev:0x0 Func:0x4 -- PSF Dino ShareIdx:0x2 socket:0x1 Bus:0xF1 Dev:0x0 Func:0x4 -- PSF HCx ShareIdx:0x3 socket:0x1 Bus:0xF1 Dev:0x1 Func:0x0 -- ShareIdx:0x4 socket:0x1 Bus:0xF1 Dev:0x2 Func:0x0 -- ShareIdx:0x5 socket:0x1 Bus:0xF1 Dev:0x3 Func:0x0 -- ShareIdx:0x6 socket:0x1 Bus:0xF1 Dev:0x3 Func:0x1 -- ShareIdx:0x7 socket:0x1 Bus:0xF1 Dev:0x3 Func:0x2 -- ShareIdx:0x8 socket:0x1 Bus:0xF2 Dev:0x0 Func:0x0 -- ShareIdx:0x9 socket:0x1 Bus:0xF4 Dev:0x0 Func:0x0 -- BitIndex :0x1 DevCount on this bit :0x3,
ShareIdx:0x0 socket:0x1 Bus:0xF1 Dev:0x0 Func:0x0 -- ShareIdx:0x1 socket:0x1 Bus:0xF1 Dev:0x0 Func:0x1 -- ShareIdx:0x2 socket:0x1 Bus:0xF1 Dev:0x0 Func:0x2 -- BitIndex :0x9 DevCount on this bit :0x1,
ShareIdx:0x0 socket:0x1 Bus:0xB7 Dev:0x0 Func:0x4 -- BitIndex :0x0 DevCount on this bit :0x4,
ShareIdx:0x0 socket:0x1 Bus:0xB7 Dev:0x0 Func:0x4 -- ShareIdx:0x1 socket:0x1 Bus:0xB7 Dev:0x0 Func:0x4 -- PSF PCIE Pi5 ShareIdx:0x2 socket:0x1 Bus:0xB7 Dev:0x0 Func:0x4 -- PCIE GEN4 DMI Pi5 ShareIdx:0x3 socket:0x1 Bus:0xB7 Dev:0x0 Func:0x4 -- PCIE GEN5 IAL Pi5 (CXL) BitIndex :0x1 DevCount on this bit :0x3,
ShareIdx:0x0 socket:0x1 Bus:0xB7 Dev:0x0 Func:0x0 -- ShareIdx:0x1 socket:0x1 Bus:0xB7 Dev:0x0 Func:0x1 -- ShareIdx:0x2 socket:0x1 Bus:0xB7 Dev:0x0 Func:0x2 -- BitIndex :0x2 DevCount on this bit :0x1,
ShareIdx:0x0 socket:0x1 Bus:0xB7 Dev:0x8 Func:0x0 -- BitIndex :0x3 DevCount on this bit :0x1,
ShareIdx:0x0 socket:0x1 Bus:0xB7 Dev:0x6 Func:0x0 -- BitIndex :0x4 DevCount on this bit :0x1,
ShareIdx:0x0 socket:0x1 Bus:0xB7 Dev:0x4 Func:0x0 -- BitIndex :0x5 DevCount on this bit :0x1,
ShareIdx:0x0 socket:0x1 Bus:0xB7 Dev:0x2 Func:0x0 -- BitIndex :0x6 DevCount on this bit :0x1,
ShareIdx:0x0 socket:0x1 Bus:0xB7 Dev:0x1 Func:0x0 -- BitIndex :0x7 DevCount on this bit :0x1,
ShareIdx:0x0 socket:0x1 Bus:0xB7 Dev:0x3 Func:0x0 -- BitIndex :0x8 DevCount on this bit :0x1,
ShareIdx:0x0 socket:0x1 Bus:0xB7 Dev:0x5 Func:0x0 -- BitIndex :0x9 DevCount on this bit :0x1,
ShareIdx:0x0 socket:0x1 Bus:0xB7 Dev:0x7 Func:0x0 -- BitIndex :0xA DevCount on this bit :0x1,
ShareIdx:0x0 socket:0x1 Bus:0xA7 Dev:0x0 Func:0x4 -- BitIndex :0x0 DevCount on this bit :0x4,
ShareIdx:0x0 socket:0x1 Bus:0xA7 Dev:0x0 Func:0x4 -- ShareIdx:0x1 socket:0x1 Bus:0xA7 Dev:0x0 Func:0x4 -- PSF PCIE Pi5 ShareIdx:0x2 socket:0x1 Bus:0xA7 Dev:0x0 Func:0x4 -- PCIE GEN4 DMI Pi5 ShareIdx:0x3 socket:0x1 Bus:0xA7 Dev:0x0 Func:0x4 -- PCIE GEN5 IAL Pi5 (CXL) BitIndex :0x1 DevCount on this bit :0x3,
ShareIdx:0x0 socket:0x1 Bus:0xA7 Dev:0x0 Func:0x0 -- ShareIdx:0x1 socket:0x1 Bus:0xA7 Dev:0x0 Func:0x1 -- ShareIdx:0x2 socket:0x1 Bus:0xA7 Dev:0x0 Func:0x2 -- BitIndex :0x2 DevCount on this bit :0x1,
ShareIdx:0x0 socket:0x1 Bus:0xA7 Dev:0x8 Func:0x0 -- BitIndex :0x3 DevCount on this bit :0x1,
ShareIdx:0x0 socket:0x1 Bus:0xA7 Dev:0x6 Func:0x0 -- BitIndex :0x4 DevCount on this bit :0x1,
ShareIdx:0x0 socket:0x1 Bus:0xA7 Dev:0x4 Func:0x0 -- BitIndex :0x5 DevCount on this bit :0x1,
ShareIdx:0x0 socket:0x1 Bus:0xA7 Dev:0x2 Func:0x0 -- BitIndex :0x6 DevCount on this bit :0x1,
ShareIdx:0x0 socket:0x1 Bus:0xA7 Dev:0x1 Func:0x0 -- BitIndex :0x7 DevCount on this bit :0x1,
ShareIdx:0x0 socket:0x1 Bus:0xA7 Dev:0x3 Func:0x0 -- BitIndex :0x8 DevCount on this bit :0x1,
ShareIdx:0x0 socket:0x1 Bus:0xA7 Dev:0x5 Func:0x0 -- BitIndex :0x9 DevCount on this bit :0x1,
ShareIdx:0x0 socket:0x1 Bus:0xA7 Dev:0x7 Func:0x0 -- BitIndex :0xB DevCount on this bit :0x1,
ShareIdx:0x0 socket:0x1 Bus:0xF6 Dev:0x0 Func:0x4 -- BitIndex :0x0 DevCount on this bit :0xA,
ShareIdx:0x0 socket:0x1 Bus:0xF6 Dev:0x0 Func:0x4 -- ShareIdx:0x1 socket:0x1 Bus:0xF6 Dev:0x0 Func:0x4 -- PSF Dino ShareIdx:0x2 socket:0x1 Bus:0xF6 Dev:0x0 Func:0x4 -- PSF HCx ShareIdx:0x3 socket:0x1 Bus:0xF6 Dev:0x1 Func:0x0 -- ShareIdx:0x4 socket:0x1 Bus:0xF6 Dev:0x2 Func:0x0 -- ShareIdx:0x5 socket:0x1 Bus:0xF6 Dev:0x3 Func:0x0 -- ShareIdx:0x6 socket:0x1 Bus:0xF6 Dev:0x3 Func:0x1 -- ShareIdx:0x7 socket:0x1 Bus:0xF6 Dev:0x3 Func:0x2 -- ShareIdx:0x8 socket:0x1 Bus:0xF7 Dev:0x0 Func:0x0 -- ShareIdx:0x9 socket:0x1 Bus:0xF9 Dev:0x0 Func:0x0 -- BitIndex :0x1 DevCount on this bit :0x3,
ShareIdx:0x0 socket:0x1 Bus:0xF6 Dev:0x0 Func:0x0 -- ShareIdx:0x1 socket:0x1 Bus:0xF6 Dev:0x0 Func:0x1 -- ShareIdx:0x2 socket:0x1 Bus:0xF6 Dev:0x0 Func:0x2 -- BitIndex :0xC DevCount on this bit :0x1,
Skip Invalid Node
BitIndex :0xD DevCount on this bit :0x1,
ShareIdx:0x0 socket:0x1 Bus:0xC7 Dev:0x0 Func:0x4 -- BitIndex :0x0 DevCount on this bit :0x4,
ShareIdx:0x0 socket:0x1 Bus:0xC7 Dev:0x0 Func:0x4 -- ShareIdx:0x1 socket:0x1 Bus:0xC7 Dev:0x0 Func:0x4 -- PSF PCIE Pi5 ShareIdx:0x2 socket:0x1 Bus:0xC7 Dev:0x0 Func:0x4 -- PCIE GEN4 DMI Pi5 ShareIdx:0x3 socket:0x1 Bus:0xC7 Dev:0x0 Func:0x4 -- PCIE GEN5 IAL Pi5 (CXL) BitIndex :0x1 DevCount on this bit :0x3,
ShareIdx:0x0 socket:0x1 Bus:0xC7 Dev:0x0 Func:0x0 -- ShareIdx:0x1 socket:0x1 Bus:0xC7 Dev:0x0 Func:0x1 -- ShareIdx:0x2 socket:0x1 Bus:0xC7 Dev:0x0 Func:0x2 -- BitIndex :0x2 DevCount on this bit :0x1,
ShareIdx:0x0 socket:0x1 Bus:0xC7 Dev:0x8 Func:0x0 -- BitIndex :0x3 DevCount on this bit :0x1,
ShareIdx:0x0 socket:0x1 Bus:0xC7 Dev:0x6 Func:0x0 -- BitIndex :0x4 DevCount on this bit :0x1,
ShareIdx:0x0 socket:0x1 Bus:0xC7 Dev:0x4 Func:0x0 -- BitIndex :0x5 DevCount on this bit :0x1,
ShareIdx:0x0 socket:0x1 Bus:0xC7 Dev:0x2 Func:0x0 -- BitIndex :0x6 DevCount on this bit :0x1,
ShareIdx:0x0 socket:0x1 Bus:0xC7 Dev:0x1 Func:0x0 -- BitIndex :0x7 DevCount on this bit :0x1,
ShareIdx:0x0 socket:0x1 Bus:0xC7 Dev:0x3 Func:0x0 -- BitIndex :0x8 DevCount on this bit :0x1,
ShareIdx:0x0 socket:0x1 Bus:0xC7 Dev:0x5 Func:0x0 -- BitIndex :0x9 DevCount on this bit :0x1,
ShareIdx:0x0 socket:0x1 Bus:0xC7 Dev:0x7 Func:0x0 -- BitIndex :0xE DevCount on this bit :0x0,
BitIndex :0xF DevCount on this bit :0x0,
BitIndex :0x10 DevCount on this bit :0x0,
BitIndex :0x11 DevCount on this bit :0x0,
BitIndex :0x12 DevCount on this bit :0x0,
BitIndex :0x13 DevCount on this bit :0x0,
BitIndex :0x14 DevCount on this bit :0x0,
BitIndex :0x15 DevCount on this bit :0x0,
BitIndex :0x16 DevCount on this bit :0x4,
ShareIdx:0x0 socket:0x1 Bus:0xFE Dev:0x0 Func:0x0 -- ShareIdx:0x1 socket:0x1 Bus:0xFE Dev:0x0 Func:0x0 -- ShareIdx:0x2 socket:0x1 Bus:0xFE Dev:0x0 Func:0x0 -- ShareIdx:0x3 socket:0x1 Bus:0xFE Dev:0x0 Func:0x0 -- BitIndex :0x17 DevCount on this bit :0x4,
ShareIdx:0x0 socket:0x1 Bus:0xFE Dev:0x0 Func:0x0 -- ShareIdx:0x1 socket:0x1 Bus:0xFE Dev:0x0 Func:0x0 -- ShareIdx:0x2 socket:0x1 Bus:0xFE Dev:0x0 Func:0x0 -- ShareIdx:0x3 socket:0x1 Bus:0xFE Dev:0x0 Func:0x0 -- BitIndex :0x18 DevCount on this bit :0x4,
ShareIdx:0x0 socket:0x1 Bus:0xFE Dev:0x0 Func:0x0 -- ShareIdx:0x1 socket:0x1 Bus:0xFE Dev:0x0 Func:0x0 -- ShareIdx:0x2 socket:0x1 Bus:0xFE Dev:0x0 Func:0x0 -- ShareIdx:0x3 socket:0x1 Bus:0xFE Dev:0x0 Func:0x0 -- BitIndex :0x19 DevCount on this bit :0x4,
ShareIdx:0x0 socket:0x1 Bus:0xFE Dev:0x0 Func:0x0 -- ShareIdx:0x1 socket:0x1 Bus:0xFE Dev:0x0 Func:0x0 -- ShareIdx:0x2 socket:0x1 Bus:0xFE Dev:0x0 Func:0x0 -- ShareIdx:0x3 socket:0x1 Bus:0xFE Dev:0x0 Func:0x0 -- BitIndex :0x1A DevCount on this bit :0x4,
ShareIdx:0x0 socket:0x1 Bus:0xFE Dev:0x0 Func:0x0 -- ShareIdx:0x1 socket:0x1 Bus:0xFE Dev:0x0 Func:0x0 -- ShareIdx:0x2 socket:0x1 Bus:0xFE Dev:0x0 Func:0x0 -- ShareIdx:0x3 socket:0x1 Bus:0xFE Dev:0x0 Func:0x0 -- BitIndex :0x1B DevCount on this bit :0x4,
ShareIdx:0x0 socket:0x1 Bus:0xFE Dev:0x0 Func:0x0 -- ShareIdx:0x1 socket:0x1 Bus:0xFE Dev:0x0 Func:0x0 -- ShareIdx:0x2 socket:0x1 Bus:0xFE Dev:0x0 Func:0x0 -- ShareIdx:0x3 socket:0x1 Bus:0xFE Dev:0x0 Func:0x0 -- BitIndex :0x1C DevCount on this bit :0x4,
ShareIdx:0x0 socket:0x1 Bus:0xFE Dev:0x0 Func:0x0 -- ShareIdx:0x1 socket:0x1 Bus:0xFE Dev:0x0 Func:0x0 -- ShareIdx:0x2 socket:0x1 Bus:0xFE Dev:0x0 Func:0x0 -- ShareIdx:0x3 socket:0x1 Bus:0xFE Dev:0x0 Func:0x0 -- BitIndex :0x1D DevCount on this bit :0x4,
ShareIdx:0x0 socket:0x1 Bus:0xFE Dev:0x0 Func:0x0 -- ShareIdx:0x1 socket:0x1 Bus:0xFE Dev:0x0 Func:0x0 -- ShareIdx:0x2 socket:0x1 Bus:0xFE Dev:0x0 Func:0x0 -- ShareIdx:0x3 socket:0x1 Bus:0xFE Dev:0x0 Func:0x0 -- [ProcessorErrorHandler][CrystalRidgeLib] Failed to locate protocol: Not Found
[Mca]Entering InitializeProcessorErrHandler (0x7E82AEB8)
[Mca]Allocate Cpu Error Data structure at 7E7FA018
[Mca][Cap] EmcaGen1Cap=0x1
[Mca][Cap] EmcaGen2Cap=0x1
[Mca][Cap] LmceCap=0x1
[Mca][Setup] SystemErrorEn=0x1
[Mca][Setup] PoisonEn=0x1
[Mca][Setup] ViralEn=0x0
[Mca][Setup] CloakingEn=0x0
[Mca][Setup] FatalErrSpinLoopEn=0x0
[Mca][Setup] EmcaEn=0x1
[Mca][Setup] CsmiEn=0x2
[Mca][Setup] MsmiEn=0x2
[Mca][Setup] LmceEn=0x1
[Mca][Setup] MsmiBankBitFieldEn=0xFFFFFFFF
[Mca][Setup] CsmiBankBitFieldEn=0xFFFFFFFF
[Mca][Setup] EmcaSetFwUpdate=0x0
[Mca][Setup] OscEn=0x0
[Mca][Setup] mMode=0x2
[Mca][Setup] mProcessorRasSetup.UboxErrorMask=0
[Mca][Setup] mProcessorRasSetup.ShutdownSuppression=1
[Mca]Register MCA error handler Success
[Mca]Installing MCE Handler...
[Mca]SmiMcaHandler Address = 7E8322B4
[Mca]Enable MCA reporting
[Mca]EnableEmca2UncorrectableError
[Mca]Enable CSMI Gen2
[Mca]Enable LMCE
[Mca]System Cloaking is disabled.
[RasMisc] ConfigureShutdownSuppression!
PROGRESS CODE: V03070003 I0
PDB = c:\efi\servergen2\intel\Build\EagleStreamRpPkg\DEBUG_VS2015x86\X64\ServerRasPkg\Driver\Smm\Gen2\RasMisc\RasMisc\DEBUG\RASMiscDriver.pdb
PROGRESS CODE: V03070002 I0
[RASMiscDriver][CrystalRidgeLib] Failed to locate protocol: Not Found
[RasMisc] EnableSystemViralAndPoison!
[IIO VIRAL & POISON] Config Socket:0x0
[Config IIO Viral & Poison] Satallite IEH on BitIdx:0x2
[Config IIO Viral & Poison] Satallite IEH on BitIdx:0x3
[Config IIO Viral & Poison Stack] Device on BitIdx:0x2 doesn't exist
[Config IIO Viral & Poison Stack] Device on BitIdx:0x3 doesn't exist
[Config IIO Viral & Poison Stack] Device on BitIdx:0x4 doesn't exist
[Config IIO Viral & Poison Stack] Device on BitIdx:0x5 doesn't exist
[Config IIO Viral & Poison Stack] Device on BitIdx:0x6 doesn't exist
[Config IIO Viral & Poison Stack] Device on BitIdx:0x7 doesn't exist
[Config IIO Viral & Poison Stack] Device on BitIdx:0x8 doesn't exist
[Config IIO Viral & Poison Stack] Device on BitIdx:0x9 doesn't exist
[Config IIO Viral & Poison] Satallite IEH on BitIdx:0x4
[Config IIO Viral & Poison Stack] Device on BitIdx:0x2 doesn't exist
[Config IIO Viral & Poison Stack] Device on BitIdx:0x3 doesn't exist
[Config IIO Viral & Poison Stack] Device on BitIdx:0x4 doesn't exist
[Config IIO Viral & Poison Stack] Device on BitIdx:0x5 doesn't exist
[Config IIO Viral & Poison Stack] Device on BitIdx:0x6 doesn't exist
[Config IIO Viral & Poison Stack] Device on BitIdx:0x7 doesn't exist
[Config IIO Viral & Poison Stack] Device on BitIdx:0x8 doesn't exist
[Config IIO Viral & Poison Stack] Device on BitIdx:0x9 doesn't exist
[Config IIO Viral & Poison] Satallite IEH on BitIdx:0x5
[Config IIO Viral & Poison] Satallite IEH on BitIdx:0x7
[Config IIO Viral & Poison Stack] Device on BitIdx:0x2 doesn't exist
[Config IIO Viral & Poison Stack] Device on BitIdx:0x3 doesn't exist
[Config IIO Viral & Poison Stack] Device on BitIdx:0x4 doesn't exist
[Config IIO Viral & Poison Stack] Device on BitIdx:0x5 doesn't exist
[Config IIO Viral & Poison Stack] Device on BitIdx:0x6 doesn't exist
[Config IIO Viral & Poison Stack] Device on BitIdx:0x7 doesn't exist
[Config IIO Viral & Poison Stack] Device on BitIdx:0x8 doesn't exist
[Config IIO Viral & Poison Stack] Device on BitIdx:0x9 doesn't exist
[Config IIO Viral & Poison] Satallite IEH on BitIdx:0x8
[Config IIO Viral & Poison] Satallite IEH on BitIdx:0x9
[Config IIO Viral & Poison Stack] Device on BitIdx:0x2 doesn't exist
[Config IIO Viral & Poison Stack] Device on BitIdx:0x3 doesn't exist
[Config IIO Viral & Poison Stack] Device on BitIdx:0x4 doesn't exist
[Config IIO Viral & Poison Stack] Device on BitIdx:0x5 doesn't exist
[Config IIO Viral & Poison Stack] Device on BitIdx:0x6 doesn't exist
[Config IIO Viral & Poison Stack] Device on BitIdx:0x7 doesn't exist
[Config IIO Viral & Poison Stack] Device on BitIdx:0x8 doesn't exist
[Config IIO Viral & Poison Stack] Device on BitIdx:0x9 doesn't exist
[Config IIO Viral & Poison] Satallite IEH on BitIdx:0xA
[Config IIO Viral & Poison Stack] Device on BitIdx:0x2 doesn't exist
[Config IIO Viral & Poison Stack] Device on BitIdx:0x3 doesn't exist
[Config IIO Viral & Poison Stack] Device on BitIdx:0x4 doesn't exist
[Config IIO Viral & Poison Stack] Device on BitIdx:0x5 doesn't exist
[Config IIO Viral & Poison Stack] Device on BitIdx:0x6 doesn't exist
[Config IIO Viral & Poison Stack] Device on BitIdx:0x7 doesn't exist
[Config IIO Viral & Poison Stack] Device on BitIdx:0x8 doesn't exist
[Config IIO Viral & Poison Stack] Device on BitIdx:0x9 doesn't exist
[Config IIO Viral & Poison] Satallite IEH on BitIdx:0xB
[Config IIO Viral & Poison] Satallite IEH on BitIdx:0xD
[Config IIO Viral & Poison Stack] Device on BitIdx:0x2 doesn't exist
[Config IIO Viral & Poison Stack] Device on BitIdx:0x3 doesn't exist
[Config IIO Viral & Poison Stack] Device on BitIdx:0x4 doesn't exist
[Config IIO Viral & Poison Stack] Device on BitIdx:0x5 doesn't exist
[Config IIO Viral & Poison Stack] Device on BitIdx:0x6 doesn't exist
[Config IIO Viral & Poison Stack] Device on BitIdx:0x7 doesn't exist
[Config IIO Viral & Poison Stack] Device on BitIdx:0x8 doesn't exist
[Config IIO Viral & Poison Stack] Device on BitIdx:0x9 doesn't exist
[IIO VIRAL & POISON] Config Socket:0x0 End
[IIO VIRAL & POISON] Config Socket:0x1
[Config IIO Viral & Poison] Satallite IEH on BitIdx:0x2
[Config IIO Viral & Poison] Satallite IEH on BitIdx:0x3
[Config IIO Viral & Poison Stack] Device on BitIdx:0x2 doesn't exist
[Config IIO Viral & Poison Stack] Device on BitIdx:0x3 doesn't exist
[Config IIO Viral & Poison Stack] Device on BitIdx:0x4 doesn't exist
[Config IIO Viral & Poison Stack] Device on BitIdx:0x5 doesn't exist
[Config IIO Viral & Poison Stack] Device on BitIdx:0x6 doesn't exist
[Config IIO Viral & Poison Stack] Device on BitIdx:0x7 doesn't exist
[Config IIO Viral & Poison Stack] Device on BitIdx:0x8 doesn't exist
[Config IIO Viral & Poison Stack] Device on BitIdx:0x9 doesn't exist
[Config IIO Viral & Poison Stack] Device on BitIdx:0xA doesn't exist
[Config IIO Viral & Poison] Satallite IEH on BitIdx:0x4
[Config IIO Viral & Poison Stack] Device on BitIdx:0x2 doesn't exist
[Config IIO Viral & Poison Stack] Device on BitIdx:0x3 doesn't exist
[Config IIO Viral & Poison Stack] Device on BitIdx:0x4 doesn't exist
[Config IIO Viral & Poison Stack] Device on BitIdx:0x5 doesn't exist
[Config IIO Viral & Poison Stack] Device on BitIdx:0x6 doesn't exist
[Config IIO Viral & Poison Stack] Device on BitIdx:0x7 doesn't exist
[Config IIO Viral & Poison Stack] Device on BitIdx:0x8 doesn't exist
[Config IIO Viral & Poison Stack] Device on BitIdx:0x9 doesn't exist
[Config IIO Viral & Poison] Satallite IEH on BitIdx:0x5
[Config IIO Viral & Poison] Satallite IEH on BitIdx:0x7
[Config IIO Viral & Poison Stack] Device on BitIdx:0x2 doesn't exist
[Config IIO Viral & Poison Stack] Device on BitIdx:0x3 doesn't exist
[Config IIO Viral & Poison Stack] Device on BitIdx:0x4 doesn't exist
[Config IIO Viral & Poison Stack] Device on BitIdx:0x5 doesn't exist
[Config IIO Viral & Poison Stack] Device on BitIdx:0x6 doesn't exist
[Config IIO Viral & Poison Stack] Device on BitIdx:0x7 doesn't exist
[Config IIO Viral & Poison Stack] Device on BitIdx:0x8 doesn't exist
[Config IIO Viral & Poison Stack] Device on BitIdx:0x9 doesn't exist
[Config IIO Viral & Poison] Satallite IEH on BitIdx:0x8
[Config IIO Viral & Poison] Satallite IEH on BitIdx:0x9
[Config IIO Viral & Poison Stack] Device on BitIdx:0x2 doesn't exist
[Config IIO Viral & Poison Stack] Device on BitIdx:0x3 doesn't exist
[Config IIO Viral & Poison Stack] Device on BitIdx:0x4 doesn't exist
[Config IIO Viral & Poison Stack] Device on BitIdx:0x5 doesn't exist
[Config IIO Viral & Poison Stack] Device on BitIdx:0x6 doesn't exist
[Config IIO Viral & Poison Stack] Device on BitIdx:0x7 doesn't exist
[Config IIO Viral & Poison Stack] Device on BitIdx:0x8 doesn't exist
[Config IIO Viral & Poison Stack] Device on BitIdx:0x9 doesn't exist
[Config IIO Viral & Poison] Satallite IEH on BitIdx:0xA
[Config IIO Viral & Poison Stack] Device on BitIdx:0x2 doesn't exist
[Config IIO Viral & Poison Stack] Device on BitIdx:0x3 doesn't exist
[Config IIO Viral & Poison Stack] Device on BitIdx:0x4 doesn't exist
[Config IIO Viral & Poison Stack] Device on BitIdx:0x5 doesn't exist
[Config IIO Viral & Poison Stack] Device on BitIdx:0x6 doesn't exist
[Config IIO Viral & Poison Stack] Device on BitIdx:0x7 doesn't exist
[Config IIO Viral & Poison Stack] Device on BitIdx:0x8 doesn't exist
[Config IIO Viral & Poison Stack] Device on BitIdx:0x9 doesn't exist
[Config IIO Viral & Poison] Satallite IEH on BitIdx:0xB
[Config IIO Viral & Poison] Satallite IEH on BitIdx:0xD
[Config IIO Viral & Poison Stack] Device on BitIdx:0x2 doesn't exist
[Config IIO Viral & Poison Stack] Device on BitIdx:0x3 doesn't exist
[Config IIO Viral & Poison Stack] Device on BitIdx:0x4 doesn't exist
[Config IIO Viral & Poison Stack] Device on BitIdx:0x5 doesn't exist
[Config IIO Viral & Poison Stack] Device on BitIdx:0x6 doesn't exist
[Config IIO Viral & Poison Stack] Device on BitIdx:0x7 doesn't exist
[Config IIO Viral & Poison Stack] Device on BitIdx:0x8 doesn't exist
[Config IIO Viral & Poison Stack] Device on BitIdx:0x9 doesn't exist
[IIO VIRAL & POISON] Config Socket:0x1 End
PROGRESS CODE: V03070003 I0
PDB = c:\efi\servergen2\intel\Build\EagleStreamRpPkg\DEBUG_VS2015x86\X64\ServerRasPkg\Driver\Smm\CrashLogSmm\CrashLogSmm\DEBUG\CrashLogSmm.pdb
PROGRESS CODE: V03070002 I0
CrashLog Entry Point
Failed to locate CpuCrashLogRecordRegionProtocol !
Failed to locate PchCrashLogRecordRegionProtocol !
CrashLog is not present. Skip BERT creation
Error: SMM image at 0007E7BE000 start failed: Not Ready
PROGRESS CODE: V03070003 I0
PDB = c:\efi\servergen2\intel\Build\EagleStreamRpPkg\DEBUG_VS2015x86\X64\ServerRasPkg\Driver\Smm\WheaErrorInj\WheaErrorInj\DEBUG\WheaErrorInj2.pdb
PROGRESS CODE: V03070002 I0
[WheaErrorInj2][CrystalRidgeLib] Failed to locate protocol: Not Found
WHEA Error Injection is not enabled in Setup
PROGRESS CODE: V03070003 I0
PDB = c:\efi\servergen2\intel\Build\EagleStreamRpPkg\DEBUG_VS2015x86\X64\ServerRasPkg\Driver\Smm\WheaLastBootError\WheaLastBootError\DEBUG\WheaLastBootError.pdb
PROGRESS CODE: V03070002 I0
[WheaLastBootError][CrystalRidgeLib] Failed to locate protocol: Not Found
dump ACPI table
42 45 52 54 30 0 0 0 1 0 49 4E 54 45 4C 20 49
4E 54 45 4C 20 49 44 1 0 0 0 49 4E 54 4C 1
0 0 0 0 80 4 0 18 80 C4 76 0 0 0 0
[WHEAINIT] start to install WHEA ACPI tables
[WHEAINIT] install WHEA ACPI tables status:Success
PROGRESS CODE: V03070003 I0
PDB = c:\efi\servergen2\intel\Build\EagleStreamRpPkg\DEBUG_VS2015x86\X64\ServerRasPkg\Driver\Smm\WheaERST\WheaERST\DEBUG\WheaERST.pdb
PROGRESS CODE: V03070002 I0
dump ACPI table
45 52 53 54 30 2 0 0 1 0 49 4E 54 45 4C 20 49
4E 54 45 4C 20 49 44 1 0 0 0 49 4E 54 4C 1
0 0 0 30 0 0 0 0 0 0 0 10 0 0 0 0
3 0 0 0 40 0 4 18 50 C4 76 0 0 0 0 2
0 0 0 0 0 0 0 FF FF 0 0 0 0 0 0 1
3 0 0 0 40 0 4 18 50 C4 76 0 0 0 0 1
0 0 0 0 0 0 0 FF FF 0 0 0 0 0 0 2
3 0 0 0 40 0 4 18 50 C4 76 0 0 0 0 3
0 0 0 0 0 0 0 FF FF 0 0 0 0 0 0 3
4 1 0 0 40 0 4 18 50 C4 76 0 0 0 0 0
0 0 0 0 0 0 0 FF FF 0 0 0 0 0 0 4
2 0 0 0 40 0 4 30 50 C4 76 0 0 0 0 0
0 0 0 0 0 0 0 FF FF FF FF 0 0 0 0 5
3 0 0 1 8 0 1 B2 0 0 0 0 0 0 0 9C
0 0 0 0 0 0 0 FF FF 0 0 0 0 0 0 6
1 0 0 0 40 0 4 40 50 C4 76 0 0 0 0 1
0 0 0 0 0 0 0 1 0 0 0 0 0 0 0 7
0 0 0 0 40 0 4 38 50 C4 76 0 0 0 0 0
0 0 0 0 0 0 0 FF FF FF FF 0 0 0 0 8
0 0 0 0 40 0 4 70 50 C4 76 0 0 0 0 0
0 0 0 0 0 0 0 FF FF FF FF FF FF FF FF 9
2 0 0 0 40 0 4 20 50 C4 76 0 0 0 0 0
0 0 0 0 0 0 0 FF FF FF FF FF FF FF FF A
0 0 0 0 40 0 4 48 50 C4 76 0 0 0 0 0
0 0 0 0 0 0 0 FF FF FF FF 0 0 0 0 B
3 0 0 0 40 0 4 18 50 C4 76 0 0 0 0 F
0 0 0 0 0 0 0 FF FF 0 0 0 0 0 0 C
0 0 0 0 40 0 4 28 50 C4 76 0 0 0 0 0
0 0 0 0 0 0 0 FF FF FF FF 0 0 0 0 D
0 0 0 0 40 0 4 50 50 C4 76 0 0 0 0 0
0 0 0 0 0 0 0 FF FF FF FF FF FF FF FF E
0 0 0 0 40 0 4 58 50 C4 76 0 0 0 0 0
0 0 0 0 0 0 0 FF FF FF FF FF FF FF FF F
0 0 0 0 40 0 4 60 50 C4 76 0 0 0 0 0
0 0 0 0 0 0 0 FF FF FF FF FF FF FF FF
[WHEAINIT] start to install WHEA ACPI tables
[WHEAINIT] install WHEA ACPI tables status:Success
PROGRESS CODE: V03070003 I0
PDB = c:\efi\servergen2\intel\Build\EagleStreamRpPkg\DEBUG_VS2015x86\X64\ServerRasPkg\Driver\Smm\EnhancedMcaErrorLog\EnhancedMcaErrorLog\DEBUG\EnhancedMcaErrorLog.pdb
PROGRESS CODE: V03070002 I0
InitializEnhancedMcaErrorLogger++
EmcaEn: 1, ElogEn: 1, ElogIgnOptin: 0, ElogCorrErrEn: 1, ElogMemErrEn: 1, ElogProcErrEn: 1
EmcaL1DirAddr = 0x76C24000
InitializEnhancedMcaErrorLogger--, Success
PROGRESS CODE: V03070003 I0
PDB = c:\efi\servergen2\intel\Build\EagleStreamRpPkg\DEBUG_VS2015x86\X64\ServerRasPkg\Driver\Smm\PprVlsErrorLogListener\PprVlsErrorLogListener\DEBUG\PprVlsErrorLogListener.pdb
PROGRESS CODE: V03070002 I0
[PprVlsErrorLogListener][CrystalRidgeLib] Failed to locate protocol: Not Found
PROGRESS CODE: V03070003 I0
PDB = c:\efi\servergen2\intel\Build\EagleStreamRpPkg\DEBUG_VS2015x86\X64\ServerRasPkg\Driver\Smm\McBankErrorInjection\McBankErrorInjection\DEBUG\McBankErrorInjection.pdb
PROGRESS CODE: V03070002 I0
PROGRESS CODE: V03070003 I0
PDB = c:\efi\servergen2\intel\Build\EagleStreamRpPkg\DEBUG_VS2015x86\X64\ServerRasPkg\Driver\Smm\ErrorControl\ErrorControl\DEBUG\ErrorControl.pdb
PROGRESS CODE: V03070002 I0
PROGRESS CODE: V03070003 I0
PDB = c:\efi\servergen2\intel\Build\EagleStreamRpPkg\DEBUG_VS2015x86\X64\ServerSiliconPkg\Cpu\PowerManagement\PpmInitializeDxe\PpmInitializeDxe\DEBUG\PpmInitializeDxe.pdb
PROGRESS CODE: V03040002 I0
DXE PPM Initialization Entry
PROGRESS CODE: V03040003 I0
PDB = c:\efi\servergen2\intel\Build\EagleStreamRpPkg\DEBUG_VS2015x86\X64\ServerSiliconPkg\Universal\Dxe\CrystalRidge\CrystalRidge\DEBUG\CrystalRidge.pdb
PROGRESS CODE: V03040002 I0
No PMems, Crystal Ridge Driver is not going to be loaded.
PROGRESS CODE: V03040003 I0
PDB = c:\efi\servergen2\intel\Build\EagleStreamRpPkg\DEBUG_VS2015x86\X64\ClientOneSiliconPkg\IpBlock\Amt\Sol\Dxe\SerialOverLan\DEBUG\SerialOverLan.pdb
PROGRESS CODE: V03040002 I0
Error: Image at 00068F52000 start failed: Unsupported
PDB = c:\efi\servergen2\intel\Build\EagleStreamRpPkg\DEBUG_VS2015x86\X64\ClientOneSiliconPkg\IpBlock\Amt\Sol\Dxe\SerialOverLan\DEBUG\SerialOverLan.pdb
PROGRESS CODE: V03040003 I0
PDB = c:\efi\servergen2\intel\Build\EagleStreamRpPkg\DEBUG_VS2015x86\X64\ServerPlatformPkg\Features\Me\Client\MePolicyHelper\MePolicyHelper\DEBUG\MePolicyHelper.pdb
PROGRESS CODE: V03040002 I0
PROGRESS CODE: V03040003 I0
PDB = c:\efi\servergen2\intel\Build\EagleStreamRpPkg\DEBUG_VS2015x86\X64\XmlCliFeaturePkg\XmlCliRestricted\Dxe\XmlCliDxe\DEBUG\XmlCliDxe.pdb
PROGRESS CODE: V03040002 I0
PROGRESS CODE: V03040003 I0
PDB = d:\dde\63d22spr\intel\Build\EagleStreamRpPkg\DEBUG_VS2015x86\X64\ServerSecurityPkg\Pfr\Restricted\DebugTool\IShellCommand\IShellCommands\DEBUG\IShellCommands.pdb
PROGRESS CODE: V03040002 I0
PROGRESS CODE: V03040003 I0
PDB = c:\efi\servergen2\intel\Build\EagleStreamRpPkg\DEBUG_VS2015x86\X64\ServerPlatformPkg\Universal\PiPilotIII\PiPilotIIIDxe\DEBUG\PiPilotIIIDxe.pdb
PROGRESS CODE: V03040002 I0
PROGRESS CODE: V03040003 I0
PDB = c:\efi\servergen2\intel\Build\EagleStreamRpPkg\DEBUG_VS2015x86\X64\ServerPlatformPkg\Universal\PiAst2500\PiAst2500Dxe\DEBUG\PiAst2500Dxe.pdb
PROGRESS CODE: V03040002 I0
PROGRESS CODE: V03040003 I0
PDB = c:\efi\servergen2\intel\Build\EagleStreamRpPkg\DEBUG_VS2015x86\X64\FatPkg\EnhancedFatDxe\Fat\DEBUG\Fat.pdb
PROGRESS CODE: V03040002 I0
PROGRESS CODE: V03040003 I0
PDB = c:\efi\servergen2\intel\Build\EagleStreamRpPkg\DEBUG_VS2015x86\X64\ServerPlatformPkg\Platform\IsaHostController\IsaHostControllerDxe\DEBUG\IsaHostControllerDxe.pdb
PROGRESS CODE: V03040002 I0
PROGRESS CODE: V03040003 I0
PDB = c:\efi\servergen2\intel\Build\EagleStreamRpPkg\DEBUG_VS2015x86\X64\ServerPlatformPkg\Features\Sata\SataController\SataController\DEBUG\SataController.pdb
PROGRESS CODE: V03040002 I0
PROGRESS CODE: V03040003 I0
PDB = c:\efi\servergen2\intel\Build\EagleStreamRpPkg\DEBUG_VS2015x86\X64\MdeModulePkg\Bus\Pci\PciBusDxe\PciBusDxe\DEBUG\PciBusDxe.pdb
PROGRESS CODE: V03040002 I0
PROGRESS CODE: V03040003 I0
PDB = c:\efi\servergen2\intel\Build\EagleStreamRpPkg\DEBUG_VS2015x86\X64\ServerPlatformPkg\Features\Acpi\Dxe\AcpiPlatform\AcpiPlatformSpr\DEBUG\AcpiPlatform.pdb
PROGRESS CODE: V03040002 I0
PROGRESS CODE: V03048503 I0
Locate mFruRedirProtocol failed Not Found
ACPI MCFG table @ address 0x68F59398
Multi-Seg Support = 0
Number of Segments (sockets): 1
Table Length = 0x3C
Segment[ 0].BaseAddress = 80000000
Segment[ 0].PciSegmentGroupNumber = 0
Segment[ 0].StartBusNumber = 0
Segment[ 0].EndBusNumber = FF
Xhci TableHeader->OemTableId = 6E5F6878
[ACPI](KEYP) Not found any PCIe/CXL/NTB port
ExternSbExpected: 1787424408, ExternSbFound: 1787260952
ExternSbExpected: 0, ExternSbFound: 1993134098
PROGRESS CODE: V03040003 I0
PDB = c:\efi\servergen2\intel\Build\EagleStreamRpPkg\DEBUG_VS2015x86\X64\ServerPlatformPkg\Features\Acpi\Dxe\AcpiVtd\AcpiVTD\DEBUG\AcpiVTD.pdb
PROGRESS CODE: V03040002 I0
PROGRESS CODE: V03040003 I0
PDB = c:\efi\servergen2\intel\Build\EagleStreamRpPkg\DEBUG_VS2015x86\X64\OvmfPkg\QemuVideoDxe\QemuVideoDxe\DEBUG\QemuVideoDxe.pdb
PROGRESS CODE: V03040002 I0
PROGRESS CODE: V03040003 I0
PDB = c:\efi\servergen2\intel\Build\EagleStreamRpPkg\DEBUG_VS2015x86\X64\MdeModulePkg\Bus\Pci\XhciDxe\XhciDxe\DEBUG\XhciDxe.pdb
PROGRESS CODE: V03040002 I0
PROGRESS CODE: V03040003 I0
PDB = c:\efi\servergen2\intel\Build\EagleStreamRpPkg\DEBUG_VS2015x86\X64\MdeModulePkg\Bus\Pci\EhciDxe\EhciDxe\DEBUG\EhciDxe.pdb
PROGRESS CODE: V03040002 I0
PROGRESS CODE: V03040003 I0
PDB = c:\efi\servergen2\intel\Build\EagleStreamRpPkg\DEBUG_VS2015x86\X64\MdeModulePkg\Bus\Usb\UsbKbDxe\UsbKbDxe\DEBUG\UsbKbDxe.pdb
PROGRESS CODE: V03040002 I0
PROGRESS CODE: V03040003 I0
PDB = c:\efi\servergen2\intel\Build\EagleStreamRpPkg\DEBUG_VS2015x86\X64\MdeModulePkg\Bus\Usb\UsbMassStorageDxe\UsbMassStorageDxe\DEBUG\UsbMassStorageDxe.pdb
PROGRESS CODE: V03040002 I0
PROGRESS CODE: V03040003 I0
PDB = c:\efi\servergen2\intel\Build\EagleStreamRpPkg\DEBUG_VS2015x86\X64\MdeModulePkg\Bus\Usb\UsbMouseDxe\UsbMouseDxe\DEBUG\UsbMouseDxe.pdb
PROGRESS CODE: V03040002 I0
PROGRESS CODE: V03040003 I0
PDB = c:\efi\servergen2\intel\Build\EagleStreamRpPkg\DEBUG_VS2015x86\X64\MdeModulePkg\Bus\Pci\UhciDxe\UhciDxe\DEBUG\UhciDxe.pdb
PROGRESS CODE: V03040002 I0
PROGRESS CODE: V03040003 I0
PDB = c:\efi\servergen2\intel\Build\EagleStreamRpPkg\DEBUG_VS2015x86\X64\MdeModulePkg\Bus\Usb\UsbBusDxe\UsbBusDxe\DEBUG\UsbBusDxe.pdb
PROGRESS CODE: V03040002 I0
PROGRESS CODE: V03040003 I0
PDB = c:\efi\servergen2\intel\Build\EagleStreamRpPkg\DEBUG_VS2015x86\X64\MdeModulePkg\Bus\Pci\EhciDxe\EhciDxe\DEBUG\EhciDxe.pdb
PROGRESS CODE: V03040002 I0
PROGRESS CODE: V03040003 I0
PDB = c:\efi\servergen2\intel\Build\EagleStreamRpPkg\DEBUG_VS2015x86\X64\MdeModulePkg\Bus\Usb\UsbKbDxe\UsbKbDxe\DEBUG\UsbKbDxe.pdb
PROGRESS CODE: V03040002 I0
PROGRESS CODE: V03040003 I0
PDB = c:\efi\servergen2\intel\Build\EagleStreamRpPkg\DEBUG_VS2015x86\X64\MdeModulePkg\Bus\Usb\UsbMassStorageDxe\UsbMassStorageDxe\DEBUG\UsbMassStorageDxe.pdb
PROGRESS CODE: V03040002 I0
PROGRESS CODE: V03040003 I0
PDB = c:\efi\servergen2\intel\Build\EagleStreamRpPkg\DEBUG_VS2015x86\X64\MdeModulePkg\Bus\Usb\UsbMouseDxe\UsbMouseDxe\DEBUG\UsbMouseDxe.pdb
PROGRESS CODE: V03040002 I0
PROGRESS CODE: V03040003 I0
PDB = c:\efi\servergen2\intel\Build\EagleStreamRpPkg\DEBUG_VS2015x86\X64\MdeModulePkg\Bus\Pci\UhciDxe\UhciDxe\DEBUG\UhciDxe.pdb
PROGRESS CODE: V03040002 I0
PROGRESS CODE: V03040003 I0
PDB = c:\efi\servergen2\intel\Build\EagleStreamRpPkg\DEBUG_VS2015x86\X64\MdeModulePkg\Bus\Usb\UsbBusDxe\UsbBusDxe\DEBUG\UsbBusDxe.pdb
PROGRESS CODE: V03040002 I0
PROGRESS CODE: V03040003 I0
PDB = c:\efi\servergen2\intel\Build\EagleStreamRpPkg\DEBUG_VS2015x86\X64\MdeModulePkg\Bus\Scsi\ScsiBusDxe\ScsiBusDxe\DEBUG\ScsiBus.pdb
PROGRESS CODE: V03040002 I0
PROGRESS CODE: V03040003 I0
PDB = c:\efi\servergen2\intel\Build\EagleStreamRpPkg\DEBUG_VS2015x86\X64\MdeModulePkg\Bus\Scsi\ScsiDiskDxe\ScsiDiskDxe\DEBUG\ScsiDisk.pdb
PROGRESS CODE: V03040002 I0
PROGRESS CODE: V03040003 I0
PDB = c:\efi\servergen2\intel\Build\EagleStreamRpPkg\DEBUG_VS2015x86\X64\MdeModulePkg\Bus\Pci\NvmExpressDxe\NvmExpressDxe\DEBUG\NvmExpressDxe.pdb
PROGRESS CODE: V03040002 I0
PROGRESS CODE: V03040003 I0
PDB = c:\efi\servergen2\intel\Build\EagleStreamRpPkg\DEBUG_VS2015x86\X64\MdeModulePkg\Universal\Disk\UnicodeCollation\EnglishDxe\EnglishDxe\DEBUG\EnglishDxe.pdb
PROGRESS CODE: V03040002 I0
PROGRESS CODE: V03040003 I0
PDB = c:\efi\servergen2\intel\Build\EagleStreamRpPkg\DEBUG_VS2015x86\X64\MdeModulePkg\Universal\Console\ConPlatformDxe\ConPlatformDxe\DEBUG\ConPlatformDxe.pdb
PROGRESS CODE: V03040002 I0
PROGRESS CODE: V03040003 I0
PDB = c:\efi\servergen2\intel\Build\EagleStreamRpPkg\DEBUG_VS2015x86\X64\MdeModulePkg\Universal\Console\ConSplitterDxe\ConSplitterDxe\DEBUG\ConSplitterDxe.pdb
PROGRESS CODE: V03040002 I0
PROGRESS CODE: V03040003 I0
PDB = c:\efi\servergen2\intel\Build\EagleStreamRpPkg\DEBUG_VS2015x86\X64\MdeModulePkg\Universal\Console\GraphicsConsoleDxe\GraphicsConsoleDxe\DEBUG\GraphicsConsoleDxe.pdb
PROGRESS CODE: V03040002 I0
PROGRESS CODE: V03040003 I0
PDB = c:\efi\servergen2\intel\Build\EagleStreamRpPkg\DEBUG_VS2015x86\X64\MdeModulePkg\Universal\Console\TerminalDxe\TerminalDxe\DEBUG\TerminalDxe.pdb
PROGRESS CODE: V03040002 I0
PROGRESS CODE: V03040003 I0
PDB = c:\efi\servergen2\intel\Build\EagleStreamRpPkg\DEBUG_VS2015x86\X64\MdeModulePkg\Universal\Disk\DiskIoDxe\DiskIoDxe\DEBUG\DiskIoDxe.pdb
PROGRESS CODE: V03040002 I0
PROGRESS CODE: V03040003 I0
PDB = c:\efi\servergen2\intel\Build\EagleStreamRpPkg\DEBUG_VS2015x86\X64\MdeModulePkg\Universal\Disk\PartitionDxe\PartitionDxe\DEBUG\PartitionDxe.pdb
PROGRESS CODE: V03040002 I0
PROGRESS CODE: V03040003 I0
PDB = c:\efi\servergen2\intel\Build\EagleStreamRpPkg\DEBUG_VS2015x86\X64\MdeModulePkg\Bus\Isa\IsaBusDxe\IsaBusDxe\DEBUG\IsaBusDxe.pdb
PROGRESS CODE: V03040002 I0
PROGRESS CODE: V03040003 I0
PDB = c:\efi\servergen2\intel\Build\EagleStreamRpPkg\DEBUG_VS2015x86\X64\MdeModulePkg\Bus\Pci\PciSioSerialDxe\PciSioSerialDxe\DEBUG\PciSioSerialDxe.pdb
PROGRESS CODE: V03040002 I0
PROGRESS CODE: V03040003 I0
PDB = c:\efi\servergen2\intel\Build\EagleStreamRpPkg\DEBUG_VS2015x86\X64\MdeModulePkg\Bus\Isa\Ps2KeyboardDxe\Ps2KeyboardDxe\DEBUG\Ps2KeyboardDxe.pdb
PROGRESS CODE: V03040002 I0
PROGRESS CODE: V03040003 I0
PDB = c:\efi\servergen2\intel\Build\EagleStreamRpPkg\DEBUG_VS2015x86\X64\MdeModulePkg\Bus\Isa\Ps2MouseDxe\Ps2MouseDxe\DEBUG\Ps2MouseDxe.pdb
PROGRESS CODE: V03040002 I0
PROGRESS CODE: V03040003 I0
PDB = c:\efi\servergen2\intel\Build\EagleStreamRpPkg\DEBUG_VS2015x86\X64\MdeModulePkg\Bus\Ata\AtaBusDxe\AtaBusDxe\DEBUG\AtaBusDxe.pdb
PROGRESS CODE: V03040002 I0
PROGRESS CODE: V03040003 I0
PDB = c:\efi\servergen2\intel\Build\EagleStreamRpPkg\DEBUG_VS2015x86\X64\MdeModulePkg\Bus\Ata\AtaAtapiPassThru\AtaAtapiPassThru\DEBUG\AtaAtapiPassThruDxe.pdb
PROGRESS CODE: V03040002 I0
PROGRESS CODE: V03040003 I0
PDB = c:\efi\servergen2\intel\Build\EagleStreamRpPkg\DEBUG_VS2015x86\X64\NetworkPkg\SnpDxe\SnpDxe\DEBUG\SnpDxe.pdb
PROGRESS CODE: V03040002 I0
PROGRESS CODE: V03040003 I0
PDB = c:\efi\servergen2\intel\Build\EagleStreamRpPkg\DEBUG_VS2015x86\X64\NetworkPkg\VlanConfigDxe\VlanConfigDxe\DEBUG\VlanConfigDxe.pdb
PROGRESS CODE: V03040002 I0
PROGRESS CODE: V03040003 I0
PDB = c:\efi\servergen2\intel\Build\EagleStreamRpPkg\DEBUG_VS2015x86\X64\NetworkPkg\MnpDxe\MnpDxe\DEBUG\MnpDxe.pdb
PROGRESS CODE: V03040002 I0
PROGRESS CODE: V03040003 I0
PDB = c:\efi\servergen2\intel\Build\EagleStreamRpPkg\DEBUG_VS2015x86\X64\NetworkPkg\ArpDxe\ArpDxe\DEBUG\ArpDxe.pdb
PROGRESS CODE: V03040002 I0
PROGRESS CODE: V03040003 I0
PDB = c:\efi\servergen2\intel\Build\EagleStreamRpPkg\DEBUG_VS2015x86\X64\NetworkPkg\Dhcp4Dxe\Dhcp4Dxe\DEBUG\Dhcp4Dxe.pdb
PROGRESS CODE: V03040002 I0
PROGRESS CODE: V03040003 I0
PDB = c:\efi\servergen2\intel\Build\EagleStreamRpPkg\DEBUG_VS2015x86\X64\NetworkPkg\Ip4Dxe\Ip4Dxe\DEBUG\Ip4Dxe.pdb
PROGRESS CODE: V03040002 I0
PROGRESS CODE: V03040003 I0
PDB = c:\efi\servergen2\intel\Build\EagleStreamRpPkg\DEBUG_VS2015x86\X64\NetworkPkg\Udp4Dxe\Udp4Dxe\DEBUG\Udp4Dxe.pdb
PROGRESS CODE: V03040002 I0
PROGRESS CODE: V03040003 I0
PDB = c:\efi\servergen2\intel\Build\EagleStreamRpPkg\DEBUG_VS2015x86\X64\NetworkPkg\Mtftp4Dxe\Mtftp4Dxe\DEBUG\Mtftp4Dxe.pdb
PROGRESS CODE: V03040002 I0
PROGRESS CODE: V03040003 I0
PDB = c:\efi\servergen2\intel\Build\EagleStreamRpPkg\DEBUG_VS2015x86\X64\NetworkPkg\Dhcp6Dxe\Dhcp6Dxe\DEBUG\Dhcp6Dxe.pdb
PROGRESS CODE: V03040002 I0
PROGRESS CODE: V03040003 I0
PDB = c:\efi\servergen2\intel\Build\EagleStreamRpPkg\DEBUG_VS2015x86\X64\NetworkPkg\Ip6Dxe\Ip6Dxe\DEBUG\Ip6Dxe.pdb
PROGRESS CODE: V03040002 I0
PROGRESS CODE: V03040003 I0
PDB = c:\efi\servergen2\intel\Build\EagleStreamRpPkg\DEBUG_VS2015x86\X64\NetworkPkg\Udp6Dxe\Udp6Dxe\DEBUG\Udp6Dxe.pdb
PROGRESS CODE: V03040002 I0
PROGRESS CODE: V03040003 I0
PDB = c:\efi\servergen2\intel\Build\EagleStreamRpPkg\DEBUG_VS2015x86\X64\NetworkPkg\Mtftp6Dxe\Mtftp6Dxe\DEBUG\Mtftp6Dxe.pdb
PROGRESS CODE: V03040002 I0
PROGRESS CODE: V03040003 I0
PDB = c:\efi\servergen2\intel\Build\EagleStreamRpPkg\DEBUG_VS2015x86\X64\NetworkPkg\TcpDxe\TcpDxe\DEBUG\TcpDxe.pdb
PROGRESS CODE: V03040002 I0
PROGRESS CODE: V03040003 I0
PDB = c:\efi\servergen2\intel\Build\EagleStreamRpPkg\DEBUG_VS2015x86\X64\NetworkPkg\UefiPxeBcDxe\UefiPxeBcDxe\DEBUG\UefiPxeBcDxe.pdb
PROGRESS CODE: V03040002 I0
PROGRESS CODE: V03040003 I0
PDB = c:\efi\servergen2\intel\Build\EagleStreamRpPkg\DEBUG_VS2015x86\X64\NetworkPkg\TlsDxe\TlsDxe\DEBUG\TlsDxe.pdb
PROGRESS CODE: V03040002 I0
PROGRESS CODE: V03040003 I0
PDB = c:\efi\servergen2\intel\Build\EagleStreamRpPkg\DEBUG_VS2015x86\X64\NetworkPkg\DnsDxe\DnsDxe\DEBUG\DnsDxe.pdb
PROGRESS CODE: V03040002 I0
PROGRESS CODE: V03040003 I0
PDB = c:\efi\servergen2\intel\Build\EagleStreamRpPkg\DEBUG_VS2015x86\X64\NetworkPkg\HttpDxe\HttpDxe\DEBUG\HttpDxe.pdb
PROGRESS CODE: V03040002 I0
PROGRESS CODE: V03040003 I0
PDB = c:\efi\servergen2\intel\Build\EagleStreamRpPkg\DEBUG_VS2015x86\X64\NetworkPkg\HttpBootDxe\HttpBootDxe\DEBUG\HttpBootDxe.pdb
PROGRESS CODE: V03040002 I0
PROGRESS CODE: V03040003 I0
PROGRESS CODE: V03040002 I0
PROGRESS CODE: V03040003 I0
PROGRESS CODE: V03040002 I0
PROGRESS CODE: V03040003 I0
PROGRESS CODE: V03040002 I0
PROGRESS CODE: V03040003 I0
PROGRESS CODE: V03040002 I0
PROGRESS CODE: V03040003 I0
PDB = d:\qba1\workspace\39189\vmd_uefi\Build\MdeModule\DEBUG_VS2012x86\X64\MdeModulePkg\Bus\Pci\VmdDxe\VmdDxe\DEBUG\VmdDxe.pdb
PROGRESS CODE: V03040002 I0
PROGRESS CODE: V03040003 I0
PROGRESS CODE: V03040002 I0
PROGRESS CODE: V03040003 I0
PDB = c:\efi\servergen2\intel\Build\EagleStreamRpPkg\DEBUG_VS2015x86\X64\XmlCliFeaturePkg\XmlCliRestricted\Smm\XmlCliSmm\DEBUG\XmlCliSmm.pdb
PROGRESS CODE: V03070002 I0
PROGRESS CODE: V03070003 I0
PDB = c:\efi\servergen2\intel\Build\EagleStreamRpPkg\DEBUG_VS2015x86\X64\ServerPlatformPkg\Features\Acpi\DxeSmm\AcpiSmm\AcpiSmmPlatform\DEBUG\AcpiSmmPlatform.pdb
PROGRESS CODE: V03070002 I0
PROGRESS CODE: V03070003 I0
PDB = c:\efi\servergen2\intel\Build\EagleStreamRpPkg\DEBUG_VS2015x86\X64\ServerPlatformPkg\Restricted\SMIFlashSigned\SMIFlashSigned\DEBUG\SmiFlashSigned.pdb
PROGRESS CODE: V03070002 I0
PROGRESS CODE: V03070003 I0
PDB = c:\efi\servergen2\intel\Build\EagleStreamRpPkg\DEBUG_VS2015x86\X64\ServerRasPkg\Driver\Smm\Gen2\IioErrorHandler\IioErrorHandler\DEBUG\IioErrorHandler.pdb
PROGRESS CODE: V03070002 I0
MailBox->IioInitPar.CxlMefnEn = 0x0
PROGRESS CODE: V03070003 I0
PDB = c:\efi\servergen2\intel\Build\EagleStreamRpPkg\DEBUG_VS2015x86\X64\ServerRasPkg\Driver\Smm\WheaErrorLogListener\WheaErrorLogListener\DEBUG\WheaErrorLogListener.pdb
PROGRESS CODE: V03070002 I0
[HEST] Current source counter:1 table length:68 buffer address:76BEF018
[HEST] Current source counter:2 table length:A8 buffer address:76BEA018
[HEST] Current source counter:3 table length:D8 buffer address:0
[HEST] Current source counter:4 table length:104 buffer address:0
[HEST] Current source counter:5 table length:13C buffer address:0
dump ACPI table
48 45 53 54 3C 1 0 0 1 0 49 4E 54 45 4C 20 49
4E 54 45 4C 20 49 44 1 0 0 0 49 4E 54 4C 1
0 0 0 5 0 0 0 9 0 0 0 FF FF 0 1 1
0 0 0 F 0 0 0 F8 1F 0 0 0 40 0 4 18
F0 BE 76 0 0 0 0 3 1C 0 0 0 0 0 0 0
0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0
0 0 0 0 20 0 0 9 0 1 0 FF FF 0 1 1
0 0 0 1 0 0 0 F8 1F 0 0 0 40 0 4 18
A0 BE 76 0 0 0 0 4 1C 0 0 0 0 0 0 0
0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0
0 0 0 0 20 0 0 6 0 2 0 0 0 3 0 1
0 0 0 1 0 0 0 0 0 0 0 0 0 0 0 0
0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0
0 0 0 0 0 0 0 7 0 3 0 0 0 3 0 1
0 0 0 1 0 0 0 0 0 0 0 0 0 0 0 0
0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0
0 0 0 8 0 4 0 0 0 3 0 1 0 0 0 1
0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0
0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0
0 0 0 0 0 0 0 0 0 0 0
[WHEAINIT] start to install WHEA ACPI tables
[WHEAINIT] install WHEA ACPI tables status:Success
PROGRESS CODE: V03070003 I0
PDB = c:\efi\servergen2\intel\Build\EagleStreamRpPkg\DEBUG_VS2015x86\X64\ServerSecurityPkg\Mktme\MktmeLateInit\MktmeLateInit\DEBUG\MktmeLateInit.pdb
PROGRESS CODE: V03040002 I0
PROGRESS CODE: V03040003 I0
PDB = c:\efi\servergen2\intel\Build\EagleStreamRpPkg\DEBUG_VS2015x86\X64\ServerSecurityPkg\Sgx\SgxLateInit\Spr\SgxLateInit\DEBUG\SgxLateInitSPR.pdb
PROGRESS CODE: V03040002 I0
[SGX] SgxLateInitEntryPoint entry
SgxMpServicesData()
Thread 0 is BSP of Socket 0
Thread 80 is BSP of Socket 1
System BSP Thread = 000
System BSP Package = 000
[SGX] GetActmManifestHobArray BEGIN
Found ActmDimmManifestHob[0] = 0x70CA9788!
Found ActmDimmManifestHob[1] = 0x70CA9908!
[SGX] GetActmManifestHobArray END (Success)
[SGX] UpdateSocketSetupOptions Start
[SGX] UpdateSocketSetupOptions exit: Success
TDX: GuidHob pointer is NULL
GetVariableHelper - SgxRegistrationConfiguration not found in NVRAM, continue
GetVariableHelper - SgxUefiRegistrationConfiguration not found in NVRAM, continue
[SGX] Create RegistrationConfiguration from defaults.
SetRegistrationServerAddress: SgxRegistrationConfig->SgxRegServerInfo.Url = https://sbx.api.trustedservices.intel.com:443
[SGX] Update UpdateRegistrationConfigFlags
GetVariableHelper - SgxPlatformManifest not found in NVRAM, continue
GetVariableHelper - SgxUefiRegistrationServerRequest not found in NVRAM, continue
[SGX-DEBUG]: Get SgxRegistrationStatus
GetVariableHelper - SgxRegistrationStatus not found in NVRAM, continue
[SGX-DEBUG]: Get SgxUefiRegistrationStatus
GetVariableHelper - SgxUefiRegistrationStatus not found in NVRAM, continue
Warning: SGX is disabled on this system
[SGX] SgxDisabled_SgxLateInit: Success
[SGX] SgxErrorCode = 0x0
[SGX] PreviousStateVariablesSaving BEGIN
GetVariableHelper - SgxRegistrationServerResponse not found in NVRAM, continue
[SGX] SgxLateInit exit: Success
PROGRESS CODE: V03040003 I0
PDB = c:\efi\servergen2\intel\Build\EagleStreamRpPkg\DEBUG_VS2015x86\X64\ServerPlatformPkg\Platform\Dxe\S3NvramSave\S3NvramSave\DEBUG\S3NvramSave.pdb
PROGRESS CODE: V03040002 I0
Save data to NVRAM for socket_0_nvram_data / socket_0_nvram_data - = Saved
Save data to NVRAM for socket_1_nvram_data / socket_1_nvram_data - = Saved
Save data to NVRAM for socket_2_nvram_data / socket_2_nvram_data - = HOB not found or not populated
Save data to NVRAM for socket_3_nvram_data / socket_3_nvram_data - = HOB not found or not populatedPROGRESS CODE: V03040003 I0
PDB = c:\efi\servergen2\intel\Build\EagleStreamRpPkg\DEBUG_VS2015x86\X64\ServerPlatformPkg\Platform\Dxe\UncoreMiscDxe\UncoreMiscDxe\DEBUG\UncoreMiscDxe.pdb
PROGRESS CODE: V03040002 I0
PROGRESS CODE: V03040003 I0
PDB = c:\efi\servergen2\intel\Build\EagleStreamRpPkg\DEBUG_VS2015x86\X64\ServerPlatformPkg\Platform\Dxe\ReserveMemory\ReserveMem\DEBUG\ReserveMem.pdb
PROGRESS CODE: V03040002 I0
PROGRESS CODE: V03040003 I0
PDB = c:\efi\servergen2\intel\Build\EagleStreamRpPkg\DEBUG_VS2015x86\X64\ServerSecurityPkg\Universal\GetSec\Dxe\TxtDxe\DEBUG\TxtDxe.pdb
PROGRESS CODE: V03040002 I0
TXT is disabled
[TXT] DriverEntry: Exit
PROGRESS CODE: V03040003 I0
PDB = c:\efi\servergen2\intel\Build\EagleStreamRpPkg\DEBUG_VS2015x86\X64\UserAuthFeaturePkg\UserAuthenticationDxeSmm\UserAuthenticationDxe\DEBUG\UserAuthenticationDxe.pdb
PROGRESS CODE: V03040002 I0
PROGRESS CODE: V03040003 I0
PDB = c:\efi\servergen2\intel\Build\EagleStreamRpPkg\DEBUG_VS2015x86\X64\EagleStreamRpPkg\Platform\Dxe\Setup\DxePlatform\DEBUG\Platform.pdb
PROGRESS CODE: V03040002 I0
Is CMOS Bad = 1
[HECI Transport-1 DXE] Send pkt: 80040007
00: FF 02 00 00
[HECI Transport-1 DXE] Got pkt: 80140007
00: FF 82 00 00 00 00 06 18 - 00 01 03 00 00 00 06 18
10: 00 01 03 00
[HECI Transport-1 DXE] Send pkt: 80140008
00: 00 00 05 00 1F 00 00 00 - 00 00 00 00 00 00 00 00
10: 00 00 00 00
[HECI Transport-1 DXE] Got pkt: 805E0008
00: 00 00 05 00 1F 00 00 00 - 00 00 00 00 4A 00 00 00
10: 00 00 00 00 18 18 06 00 - 00 06 00 01 06 00 02 06
20: 00 03 56 00 04 56 00 05 - 56 00 06 56 00 07 5C 00
30: 08 7C 00 09 55 00 0A 55 - 00 0B 5B 00 0C 55 00 0D
40: 51 00 0E 51 00 0F 47 00 - 10 07 00 11 47 00 12 07
50: 00 13 47 00 14 07 00 15 - 47 00 16 07 00 17
PROGRESS CODE: V03040003 I0
PDB = c:\efi\servergen2\intel\Build\EagleStreamRpPkg\DEBUG_VS2015x86\X64\ServerPlatformPkg\Platform\Dxe\SocketSetup\SocketSetup\DEBUG\SocketSetup.pdb
PROGRESS CODE: V03040002 I0
PROGRESS CODE: V03040003 I0
PROGRESS CODE: V03041001 I0
PROGRESS CODE: V03051005 I0
PROGRESS CODE: V02010000 I0
PROGRESS CODE: V02011000 I0
PROGRESS CODE: V02011000 I0
PROGRESS CODE: V02011000 I0
PROGRESS CODE: V02011000 I0
PROGRESS CODE: V02011000 I0
PROGRESS CODE: V02011000 I0
PROGRESS CODE: V02011000 I0
PROGRESS CODE: V02011000 I0
PROGRESS CODE: V02011000 I0
PROGRESS CODE: V02011000 I0
PROGRESS CODE: V02011000 I0
PROGRESS CODE: V02011000 I0
PROGRESS CODE: V02011000 I0
PROGRESS CODE: V02011000 I0
PROGRESS CODE: V02011000 I0
PROGRESS CODE: V02011000 I0
PROGRESS CODE: V02011000 I0
PROGRESS CODE: V02011000 I0
PROGRESS CODE: V02011000 I0
PROGRESS CODE: V02011000 I0
PROGRESS CODE: V02011000 I0
PROGRESS CODE: V02011000 I0
PROGRESS CODE: V02011000 I0
PROGRESS CODE: V02011000 I0
PROGRESS CODE: V02011000 I0
PROGRESS CODE: V02011000 I0
PROGRESS CODE: V02011000 I0
PROGRESS CODE: V02011000 I0
PROGRESS CODE: V02011000 I0
PROGRESS CODE: V02011000 I0
PROGRESS CODE: V02011000 I0
PROGRESS CODE: V02011000 I0
PROGRESS CODE: V02011000 I0
PROGRESS CODE: V02011000 I0
PROGRESS CODE: V02011000 I0
PROGRESS CODE: V02011000 I0
PROGRESS CODE: V02011000 I0
PROGRESS CODE: V02011000 I0
PROGRESS CODE: V02011000 I0
PROGRESS CODE: V02011000 I0
PROGRESS CODE: V02011001 I0
Calling IoatInitBootEvent IioIndex: 0
IOAT_INIT_BOOT_EVENT_START
DSA init IioIndex : 0 InstId : 0
IAX init IioIndex : 0 InstId : 0
DSA init IioIndex : 0 InstId : 1
IAX init IioIndex : 0 InstId : 1
DSA init IioIndex : 0 InstId : 2
IAX init IioIndex : 0 InstId : 2
DSA init IioIndex : 0 InstId : 3
IAX init IioIndex : 0 InstId : 3
IOAT_INIT_BOOT_EVENT_END
Calling IioDisableLinkPorts IioIndex: 0
[0] Hide devices; Phase = B
Calling IoatInitBootEvent IioIndex: 1
IOAT_INIT_BOOT_EVENT_START
DSA init IioIndex : 1 InstId : 0
IAX init IioIndex : 1 InstId : 0
DSA init IioIndex : 1 InstId : 1
IAX init IioIndex : 1 InstId : 1
DSA init IioIndex : 1 InstId : 2
IAX init IioIndex : 1 InstId : 2
DSA init IioIndex : 1 InstId : 3
IAX init IioIndex : 1 InstId : 3
IOAT_INIT_BOOT_EVENT_END
Calling IioDisableLinkPorts IioIndex: 1
[1] Hide devices; Phase = B
PROGRESS CODE: V02010004 I0
PROGRESS CODE: V02010004 I0
PROGRESS CODE: V02010004 I0
[OOBMSM] BMC: Expected VID_DID = 0x11501A03
[OOBMSM] BMC: Bus[0x2]:Dev[0x0]:Fun[0x0]
[OOBMSM] PCH-PMT: Bus[0x0]:Dev[0x14]:Fun[0x6]
[GPIO Conflict Check] Identified conflict on pad GPIO_GPP_B12 (actual: 0x3, expected: 0x9)
[GPIO Conflict Check] Identified conflict on pad GPIO_GPP_B13 (actual: 0x3, expected: 0x9)
[GPIO Conflict Check] Identified conflict on pad GPIO_GPP_B14 (actual: 0x3, expected: 0x9)
[GPIO Conflict Check] Identified conflict on pad GPIO_GPP_B15 (actual: 0x3, expected: 0x9)
[OtaDxe.c] OtaEventHandler() {
[OOB] ExecuteOobOneTouchRequest() {
[LT EXISTS register at 0xFED30010]: 0x0000000000000000
TXT Supported Bitmap 0x0000
TXT Enabled Bitmap 0x0000
[LT EMIF register at 0xFED30200]: 0x1D003000, Bit28:27 = 0x03, Bit24:22 = 0x04
[LT FTIF register at 0xFED30800]: 0x0000000000052000, Bit18:16 = 0x05
TPM Supported Bitmap 0x0002
TPM2.0 PS NV Index 0x01C10103: Not Defined, Not Written, Not Write-Protected
TPM2.0 AUX NV Index 0x01C10102: Not Defined, Not Written, Not Write-Protected
TPM2.0 PO NV Index 0x01C10106: Not Defined, Not Written, Not Write-Protected
TPM2.0 Provisioned? No
TPM2.0 Ownership Claimed? No
TPM Enabled Bitmap 0x0002, TPM Usage Bitmap 0x0004
[IA32_TME_CAPABILITY MSR 981h] = 0x000007F7 80000003
[IA32_TME_ACTIVATE MSR 982h] = 0x00000000 00000001
[IA32_TME_MTRRCAP MSR FEh] = 0x00000000 00007D0A
TME/MK-TME/TDX: Supported Bitmap 0xC000, Enabled Bitmap 0x0000
[IA32_FEATURE_CONTROL MSR 3Ah] = 0x00000000 00100004
SGX Supported Bitmap 0x1000
SGX Enabled Bitmap 0x0000
-> PFR Support Bitmap: 0x0000, PFR Enabled Bitmap: 0x0000
PFR State: 0x0000, Recovery Count: 0x00, Last Recovery Reason 0x00
Panic Event Count: 0x00, Last Panic Reason 0x00
[OOB] ExecuteOobOneTouchRequest() -> Non-Volatile Storage Supported? Yes
ME Non-Volatile Storage: Supported
EFI Non-Volatile Storage: Supported
Maximum size of OOB Non-Volatile Storage: 0x00008400 bytes
[OOB] ExecuteOobOneTouchRequest() -> Allocate Memory for NV Storage Data (Total 0x00021000 bytes): Success
[HECI Transport-1 DXE] Send pkt: 800B0023
00: 00 00 00 00 00 00 00 00 - 00 00 00
[HECI Transport-1 DXE] Got pkt: 80040023
00: 00 80 02 00
[SPS] ERROR: ME Storage Service operation status: 2
[OOB] ExecuteOobOneTouchRequest() -> Use Default Use-Case 0x01 (OOB NV Storage Data Not used)
[OOB] ExecuteOobOneTouchRequest() -> Input OOB Data to process: Size = 0x00000044 bytes
----------------------------------------------------------------------
Offset 00 01 02 03 04 05 06 07 08 09 0A 0B 0C 0D 0E 0F
----------------------------------------------------------------------
0000 24 4F 58 50 44 00 20 00 01 DB 01 FF 00 00 00 00
0010 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00
0020 02 24 00 00 80 7E F8 83 06 00 00 00 00 00 00 00
0030 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00
0040 00 00 00 00
----------------------------------------------------------------------
[OOB] ExecuteOobOneTouchRequest() -> Updated State 0x30100000, Fatal Error 0x00000000
[OOB] ExecuteOobOneTouchRequest() -> OOB Data after processing
OOB Data after processing (before updating Checksum, State): Size = 0x00000044 bytes
----------------------------------------------------------------------
Offset 00 01 02 03 04 05 06 07 08 09 0A 0B 0C 0D 0E 0F
----------------------------------------------------------------------
0000 24 4F 58 50 44 00 20 00 02 DB 81 00 03 00 02 D0
0010 02 00 00 00 00 00 03 00 04 00 00 00 00 00 00 00
0020 02 24 00 00 E8 7E F8 83 06 00 00 00 00 00 00 00
0030 00 00 00 00 00 7F 00 07 00 00 00 00 00 00 00 00
0040 00 00 00 00
----------------------------------------------------------------------
[OOB] ExecuteOobOneTouchRequest() -> Write OOB Data, if necessary
State Non-Zero OR OOB Data modified
OOB input data size <> 0 AND valid input signature: Generate OOB Output Data
[OOB] ExecuteOobOneTouchRequest() -> OOB Output Data Size = 0x00000044 bytes, State = 0x30107900
----------------------------------------------------------------------
Offset 00 01 02 03 04 05 06 07 08 09 0A 0B 0C 0D 0E 0F
----------------------------------------------------------------------
0000 50 58 4F 24 44 00 20 00 02 D4 81 00 03 00 02 D0
0010 02 00 00 79 10 30 03 00 04 00 00 00 00 00 00 00
0020 02 24 00 00 E8 7E F8 83 06 00 00 00 00 00 00 00
0030 00 00 00 00 00 7F 00 07 00 00 00 00 00 00 00 00
0040 00 00 00 00
----------------------------------------------------------------------
Write OOB Output Data ->
[HECI Transport-1 DXE] Send pkt: 804F0023
00: 01 00 00 00 00 00 00 00 - 00 00 00 50 58 4F 24 44
10: 00 20 00 02 D4 81 00 03 - 00 02 D0 02 00 00 79 10
20: 30 03 00 04 00 00 00 00 - 00 00 00 02 24 00 00 E8
30: 7E F8 83 06 00 00 00 00 - 00 00 00 00 00 00 00 00
40: 7F 00 07 00 00 00 00 00 - 00 00 00 00 00 00 00
[HECI Transport-1 DXE] Got pkt: 80040023
00: 01 80 00 00
[OOB] ExecuteOobOneTouchRequest() -> Updated State: 0x30107900, Fatal Error: 0x00000000
[OOB-SMBIOS] GenerateSmbiosStructuresOTA() { Generate OTA SMBIOS Structures
[OOB-SMBIOS] AddOemStructureOTA() { Add OEM Structure Type-168 (0xA8)
Allocate memory for OEM Structure: Success
Form OEM Structure
[OOB-SMBIOS] AddStringAndAdd2Smbios() { Add String and Add Structure to SMBIOS
[OOB-SMBIOS] Unicode2AsciizString() { Convert Unicode string to ASCIIZ String
[OOB-SMBIOS] Unicode2AsciizString() } Success, ASCIIZ String length (including NULL) = 0x0020
Add Formed Structure to other SMBIOS structures, Handle before adding 0xFFFE
Structure addition to SMBIOS: EFI Status 0x00000000, Handle after adding 0x0048 -> Success
******** Formed SMBIOS Structure Data, Length 0x50
----------------------------------------------------------------------
Offset 00 01 02 03 04 05 06 07 08 09 0A 0B 0C 0D 0E 0F
----------------------------------------------------------------------
0000 A8 2F 48 00 01 00 01 02 03 00 02 D0 02 00 04 00
0010 7E F8 83 06 00 00 00 00 00 00 00 00 00 00 00 00
0020 7F 00 07 00 00 00 00 00 00 00 00 00 00 00 00 4D
0030 65 6D 62 65 72 3A 20 4F 54 41 20 47 65 6E 65 72
0040 61 6C 20 49 6E 66 6F 72 6D 61 74 69 6F 6E 00 00
----------------------------------------------------------------------
[OOB-SMBIOS] AddStringAndAdd2Smbios() } Success, Handle of added Structure = 0x0048
[OOB-SMBIOS] AddOemStructureOTA() } Success
[OOB-SMBIOS] AddGroupAssociationStructureOTA() { Add Group Association Structure Type-14 (0x0E)
Allocate memory for Group Association Structure: Success
Form Group Association Structure
[OOB-SMBIOS] AddStringAndAdd2Smbios() { Add String and Add Structure to SMBIOS
[OOB-SMBIOS] Unicode2AsciizString() { Convert Unicode string to ASCIIZ String
[OOB-SMBIOS] Unicode2AsciizString() } Success, ASCIIZ String length (including NULL) = 0x0022
Add Formed Structure to other SMBIOS structures, Handle before adding 0xFFFE
Structure addition to SMBIOS: EFI Status 0x00000000, Handle after adding 0x0049 -> Success
******** Formed SMBIOS Structure Data, Length 0x2B
----------------------------------------------------------------------
Offset 00 01 02 03 04 05 06 07 08 09 0A 0B 0C 0D 0E 0F
----------------------------------------------------------------------
0000 0E 08 49 00 01 A8 48 00 47 72 6F 75 70 3A 20 4F
0010 6E 65 20 54 6F 75 63 68 20 41 63 74 69 76 61 74
0020 69 6F 6E 20 28 4F 54 41 29 00 00
----------------------------------------------------------------------
[OOB-SMBIOS] AddStringAndAdd2Smbios() } Success, Handle of added Structure = 0x0049
[OOB-SMBIOS] AddGroupAssociationStructureOTA() } Success
[OOB-SMBIOS] GenerateSmbiosStructuresOTA() } Success
[OOB] ExecuteOobOneTouchRequest() -> Clear, Deallocate Memory used for OOB Data
Clear Memory used for OOB Data
Deallocate Memory used for OOB Data
Clear, Deallocate Memory used for Platform Information
[OOB] ExecuteOobOneTouchRequest() -> No task to perform OR Reset not required for the performed task
[OOB] ExecuteOobOneTouchRequest() }
[OtaDxe.c] OtaEventHandler() }
Console redirection ENABLED
Console redirection ENABLED
PROGRESS CODE: V03050000 I0
NfitTableUpdateProtocol is not installed.
No Table for current platform
No Table for current platform
:INIT - BIOS_RESET_CPL: Set CPL3 on #S1 into BIOS_RESET_CPL_PCU_FUN1_REG
:PM - Successfully got ACK CPL3 on #S1
:INIT - BIOS_RESET_CPL: Set CPL4 on #S1 into BIOS_RESET_CPL_PCU_FUN1_REG
:PM - Successfully got ACK CPL4 on #S1
:INIT - BIOS_RESET_CPL: Set CPL3 on #S0 into BIOS_RESET_CPL_PCU_FUN1_REG
:PM - Successfully got ACK CPL3 on #S0
:INIT - BIOS_RESET_CPL: Set CPL4 on #S0 into BIOS_RESET_CPL_PCU_FUN1_REG
:PM - Successfully got ACK CPL4 on #S0
DXE PPM Config Complete
[HECI Transport-1 DXE] Send pkt: 80040007
00: 0A 05 00 00
[HECI Transport-1 DXE] Got pkt: 80040007
00: 0A 85 00 00
IioSecureOnEndOfDxe...
Lock the CXL.Arb-Mux secured register if there is any CXL port
Lock the CXL.Arb-Mux secured register if there is any CXL port
[IEH INIT] Init Socket:0x0
[Init Global IEH] on Skt:0x0
[Init Satallite IEH] on BitIdx:0x1
[Init Satallite IEH] S:0 B:0x0 D:0x14 F:0x4
[Init Satallite IEH] Device on BitIdx:0x3 doesn't exist
[Init Satallite IEH] Device on BitIdx:0x4 doesn't exist
[Init Satallite IEH] Device on BitIdx:0x5 doesn't exist
[Init Satallite IEH] Device on BitIdx:0x6 doesn't exist
[Init Satallite IEH] Device on BitIdx:0x7 doesn't exist
[Init Satallite IEH] Device on BitIdx:0x9 doesn't exist
[Init Satallite IEH] Device on BitIdx:0xB doesn't exist
[Init Satallite IEH] Device on BitIdx:0xC doesn't exist
[Init Satallite IEH] Device on BitIdx:0xD doesn't exist
[Init Satallite IEH] Device on BitIdx:0xE doesn't exist
[Init Satallite IEH] Device on BitIdx:0xF doesn't exist
[Init Satallite IEH] Device on BitIdx:0x10 doesn't exist
[Init Satallite IEH] Device on BitIdx:0x11 doesn't exist
[Init Satallite IEH] Device on BitIdx:0x12 doesn't exist
[Init Satallite IEH] Device on BitIdx:0x13 doesn't exist
[Init Satallite IEH] Device on BitIdx:0x17 doesn't exist
[Init Satallite IEH] Device on BitIdx:0x18 doesn't exist
[Init Satallite IEH] Device on BitIdx:0x19 doesn't exist
[Init Satallite IEH] Device on BitIdx:0x1D doesn't exist
Clear IEH Global Error Status before enabling IEH error...
[Init Satallite IEH] S:0 B:0x0 D:0x14 F:0x4 End
[Init Satallite IEH] on BitIdx:0x2
[Init Satallite IEH] S:0 B:0x6A D:0x0 F:0x4
PSF Dino PSF HCx Clear IEH Global Error Status before enabling IEH error...
[Init Satallite IEH] S:0 B:0x6A D:0x0 F:0x4 End
[Init Satallite IEH] on BitIdx:0x3
[Init Satallite IEH] S:0 B:0x0 D:0x0 F:0x4
PSF PCIE Pi5 PCIE GEN4 DMI Pi5 PCIE GEN5 IAL Pi5 (CXL) SPD I3C Bus SPD I3C Bus CXP SMBUS [Init Satallite IEH] Device on BitIdx:0x2 doesn't exist
[Init Satallite IEH] Device on BitIdx:0x3 doesn't exist
[Init Satallite IEH] Device on BitIdx:0x4 doesn't exist
[Init Satallite IEH] Device on BitIdx:0x5 doesn't exist
[Init Satallite IEH] Device on BitIdx:0x6 doesn't exist
[Init Satallite IEH] Device on BitIdx:0x7 doesn't exist
[Init Satallite IEH] Device on BitIdx:0x8 doesn't exist
[Init Satallite IEH] Device on BitIdx:0x9 doesn't exist
Clear IEH Global Error Status before enabling IEH error...
[Init Satallite IEH] S:0 B:0x0 D:0x0 F:0x4 End
[Init Satallite IEH] on BitIdx:0x4
[Init Satallite IEH] S:0 B:0x15 D:0x0 F:0x4
PSF PCIE Pi5 PCIE GEN4 DMI Pi5 PCIE GEN5 IAL Pi5 (CXL) [Init Satallite IEH] Device on BitIdx:0x2 doesn't exist
[Init Satallite IEH] Device on BitIdx:0x3 doesn't exist
[Init Satallite IEH] Device on BitIdx:0x4 doesn't exist
[Init Satallite IEH] Device on BitIdx:0x5 doesn't exist
[Init Satallite IEH] Device on BitIdx:0x6 doesn't exist
[Init Satallite IEH] Device on BitIdx:0x7 doesn't exist
[Init Satallite IEH] Device on BitIdx:0x8 doesn't exist
[Init Satallite IEH] Device on BitIdx:0x9 doesn't exist
Clear IEH Global Error Status before enabling IEH error...
[Init Satallite IEH] S:0 B:0x15 D:0x0 F:0x4 End
[Init Satallite IEH] on BitIdx:0x5
[Init Satallite IEH] S:0 B:0x6F D:0x0 F:0x4
PSF Dino PSF HCx Clear IEH Global Error Status before enabling IEH error...
[Init Satallite IEH] S:0 B:0x6F D:0x0 F:0x4 End
[Init Satallite IEH] on BitIdx:0x7
[Init Satallite IEH] S:0 B:0x59 D:0x0 F:0x4
PSF PCIE Pi5 PCIE GEN4 DMI Pi5 PCIE GEN5 IAL Pi5 (CXL) [Init Satallite IEH] Device on BitIdx:0x2 doesn't exist
[Init Satallite IEH] Device on BitIdx:0x3 doesn't exist
[Init Satallite IEH] Device on BitIdx:0x4 doesn't exist
[Init Satallite IEH] Device on BitIdx:0x5 doesn't exist
[Init Satallite IEH] Device on BitIdx:0x6 doesn't exist
[Init Satallite IEH] Device on BitIdx:0x7 doesn't exist
[Init Satallite IEH] Device on BitIdx:0x8 doesn't exist
[Init Satallite IEH] Device on BitIdx:0x9 doesn't exist
Clear IEH Global Error Status before enabling IEH error...
[Init Satallite IEH] S:0 B:0x59 D:0x0 F:0x4 End
[Init Satallite IEH] on BitIdx:0x8
[Init Satallite IEH] S:0 B:0x74 D:0x0 F:0x4
PSF Dino PSF HCx Clear IEH Global Error Status before enabling IEH error...
[Init Satallite IEH] S:0 B:0x74 D:0x0 F:0x4 End
[Init Satallite IEH] on BitIdx:0x9
[Init Satallite IEH] S:0 B:0x37 D:0x0 F:0x4
PSF PCIE Pi5 PCIE GEN4 DMI Pi5 PCIE GEN5 IAL Pi5 (CXL) [Init Satallite IEH] Device on BitIdx:0x2 doesn't exist
[Init Satallite IEH] Device on BitIdx:0x3 doesn't exist
[Init Satallite IEH] Device on BitIdx:0x4 doesn't exist
[Init Satallite IEH] Device on BitIdx:0x5 doesn't exist
[Init Satallite IEH] Device on BitIdx:0x6 doesn't exist
[Init Satallite IEH] Device on BitIdx:0x7 doesn't exist
[Init Satallite IEH] Device on BitIdx:0x8 doesn't exist
[Init Satallite IEH] Device on BitIdx:0x9 doesn't exist
Clear IEH Global Error Status before enabling IEH error...
[Init Satallite IEH] S:0 B:0x37 D:0x0 F:0x4 End
[Init Satallite IEH] on BitIdx:0xA
[Init Satallite IEH] S:0 B:0x26 D:0x0 F:0x4
PSF PCIE Pi5 PCIE GEN4 DMI Pi5 PCIE GEN5 IAL Pi5 (CXL) [Init Satallite IEH] Device on BitIdx:0x2 doesn't exist
[Init Satallite IEH] Device on BitIdx:0x3 doesn't exist
[Init Satallite IEH] Device on BitIdx:0x4 doesn't exist
[Init Satallite IEH] Device on BitIdx:0x5 doesn't exist
[Init Satallite IEH] Device on BitIdx:0x6 doesn't exist
[Init Satallite IEH] Device on BitIdx:0x7 doesn't exist
[Init Satallite IEH] Device on BitIdx:0x8 doesn't exist
[Init Satallite IEH] Device on BitIdx:0x9 doesn't exist
Clear IEH Global Error Status before enabling IEH error...
[Init Satallite IEH] S:0 B:0x26 D:0x0 F:0x4 End
[Init Satallite IEH] on BitIdx:0xB
[Init Satallite IEH] S:0 B:0x79 D:0x0 F:0x4
PSF Dino PSF HCx Clear IEH Global Error Status before enabling IEH error...
[Init Satallite IEH] S:0 B:0x79 D:0x0 F:0x4 End
[Init Satallite IEH] on BitIdx:0xD
[Init Satallite IEH] S:0 B:0x48 D:0x0 F:0x4
PSF PCIE Pi5 PCIE GEN4 DMI Pi5 PCIE GEN5 IAL Pi5 (CXL) [Init Satallite IEH] Device on BitIdx:0x2 doesn't exist
[Init Satallite IEH] Device on BitIdx:0x3 doesn't exist
[Init Satallite IEH] Device on BitIdx:0x4 doesn't exist
[Init Satallite IEH] Device on BitIdx:0x5 doesn't exist
[Init Satallite IEH] Device on BitIdx:0x6 doesn't exist
[Init Satallite IEH] Device on BitIdx:0x7 doesn't exist
[Init Satallite IEH] Device on BitIdx:0x8 doesn't exist
[Init Satallite IEH] Device on BitIdx:0x9 doesn't exist
Clear IEH Global Error Status before enabling IEH error...
[Init Satallite IEH] S:0 B:0x48 D:0x0 F:0x4 End
Clear IEH Global Error Status before enabling IEH errors
[IEH INIT] Init Socket:0x0 End
[IEH INIT] Init Socket:0x1
[Init Global IEH] on Skt:0x1
[Init Satallite IEH] on BitIdx:0x2
[Init Satallite IEH] S:1 B:0xE7 D:0x0 F:0x4
PSF Dino PSF HCx Clear IEH Global Error Status before enabling IEH error...
[Init Satallite IEH] S:1 B:0xE7 D:0x0 F:0x4 End
[Init Satallite IEH] on BitIdx:0x3
[Init Satallite IEH] S:1 B:0x80 D:0x0 F:0x4
PSF PCIE Pi5 PCIE GEN4 DMI Pi5 PCIE GEN5 IAL Pi5 (CXL) SPD I3C Bus SPD I3C Bus CXP SMBUS [Init Satallite IEH] Device on BitIdx:0x2 doesn't exist
[Init Satallite IEH] Device on BitIdx:0x3 doesn't exist
[Init Satallite IEH] Device on BitIdx:0x4 doesn't exist
[Init Satallite IEH] Device on BitIdx:0x5 doesn't exist
[Init Satallite IEH] Device on BitIdx:0x6 doesn't exist
[Init Satallite IEH] Device on BitIdx:0x7 doesn't exist
[Init Satallite IEH] Device on BitIdx:0x8 doesn't exist
[Init Satallite IEH] Device on BitIdx:0x9 doesn't exist
[Init Satallite IEH] Device on BitIdx:0xA doesn't exist
Clear IEH Global Error Status before enabling IEH error...
[Init Satallite IEH] S:1 B:0x80 D:0x0 F:0x4 End
[Init Satallite IEH] on BitIdx:0x4
[Init Satallite IEH] S:1 B:0x97 D:0x0 F:0x4
PSF PCIE Pi5 PCIE GEN4 DMI Pi5 PCIE GEN5 IAL Pi5 (CXL) [Init Satallite IEH] Device on BitIdx:0x2 doesn't exist
[Init Satallite IEH] Device on BitIdx:0x3 doesn't exist
[Init Satallite IEH] Device on BitIdx:0x4 doesn't exist
[Init Satallite IEH] Device on BitIdx:0x5 doesn't exist
[Init Satallite IEH] Device on BitIdx:0x6 doesn't exist
[Init Satallite IEH] Device on BitIdx:0x7 doesn't exist
[Init Satallite IEH] Device on BitIdx:0x8 doesn't exist
[Init Satallite IEH] Device on BitIdx:0x9 doesn't exist
Clear IEH Global Error Status before enabling IEH error...
[Init Satallite IEH] S:1 B:0x97 D:0x0 F:0x4 End
[Init Satallite IEH] on BitIdx:0x5
[Init Satallite IEH] S:1 B:0xEC D:0x0 F:0x4
PSF Dino PSF HCx Clear IEH Global Error Status before enabling IEH error...
[Init Satallite IEH] S:1 B:0xEC D:0x0 F:0x4 End
[Init Satallite IEH] on BitIdx:0x7
[Init Satallite IEH] S:1 B:0xD7 D:0x0 F:0x4
PSF PCIE Pi5 PCIE GEN4 DMI Pi5 PCIE GEN5 IAL Pi5 (CXL) [Init Satallite IEH] Device on BitIdx:0x2 doesn't exist
[Init Satallite IEH] Device on BitIdx:0x3 doesn't exist
[Init Satallite IEH] Device on BitIdx:0x4 doesn't exist
[Init Satallite IEH] Device on BitIdx:0x5 doesn't exist
[Init Satallite IEH] Device on BitIdx:0x6 doesn't exist
[Init Satallite IEH] Device on BitIdx:0x7 doesn't exist
[Init Satallite IEH] Device on BitIdx:0x8 doesn't exist
[Init Satallite IEH] Device on BitIdx:0x9 doesn't exist
Clear IEH Global Error Status before enabling IEH error...
[Init Satallite IEH] S:1 B:0xD7 D:0x0 F:0x4 End
[Init Satallite IEH] on BitIdx:0x8
[Init Satallite IEH] S:1 B:0xF1 D:0x0 F:0x4
PSF Dino PSF HCx Clear IEH Global Error Status before enabling IEH error...
[Init Satallite IEH] S:1 B:0xF1 D:0x0 F:0x4 End
[Init Satallite IEH] on BitIdx:0x9
[Init Satallite IEH] S:1 B:0xB7 D:0x0 F:0x4
PSF PCIE Pi5 PCIE GEN4 DMI Pi5 PCIE GEN5 IAL Pi5 (CXL) [Init Satallite IEH] Device on BitIdx:0x2 doesn't exist
[Init Satallite IEH] Device on BitIdx:0x3 doesn't exist
[Init Satallite IEH] Device on BitIdx:0x4 doesn't exist
[Init Satallite IEH] Device on BitIdx:0x5 doesn't exist
[Init Satallite IEH] Device on BitIdx:0x6 doesn't exist
[Init Satallite IEH] Device on BitIdx:0x7 doesn't exist
[Init Satallite IEH] Device on BitIdx:0x8 doesn't exist
[Init Satallite IEH] Device on BitIdx:0x9 doesn't exist
Clear IEH Global Error Status before enabling IEH error...
[Init Satallite IEH] S:1 B:0xB7 D:0x0 F:0x4 End
[Init Satallite IEH] on BitIdx:0xA
[Init Satallite IEH] S:1 B:0xA7 D:0x0 F:0x4
PSF PCIE Pi5 PCIE GEN4 DMI Pi5 PCIE GEN5 IAL Pi5 (CXL) [Init Satallite IEH] Device on BitIdx:0x2 doesn't exist
[Init Satallite IEH] Device on BitIdx:0x3 doesn't exist
[Init Satallite IEH] Device on BitIdx:0x4 doesn't exist
[Init Satallite IEH] Device on BitIdx:0x5 doesn't exist
[Init Satallite IEH] Device on BitIdx:0x6 doesn't exist
[Init Satallite IEH] Device on BitIdx:0x7 doesn't exist
[Init Satallite IEH] Device on BitIdx:0x8 doesn't exist
[Init Satallite IEH] Device on BitIdx:0x9 doesn't exist
Clear IEH Global Error Status before enabling IEH error...
[Init Satallite IEH] S:1 B:0xA7 D:0x0 F:0x4 End
[Init Satallite IEH] on BitIdx:0xB
[Init Satallite IEH] S:1 B:0xF6 D:0x0 F:0x4
PSF Dino PSF HCx Clear IEH Global Error Status before enabling IEH error...
[Init Satallite IEH] S:1 B:0xF6 D:0x0 F:0x4 End
[Init Satallite IEH] on BitIdx:0xD
[Init Satallite IEH] S:1 B:0xC7 D:0x0 F:0x4
PSF PCIE Pi5 PCIE GEN4 DMI Pi5 PCIE GEN5 IAL Pi5 (CXL) [Init Satallite IEH] Device on BitIdx:0x2 doesn't exist
[Init Satallite IEH] Device on BitIdx:0x3 doesn't exist
[Init Satallite IEH] Device on BitIdx:0x4 doesn't exist
[Init Satallite IEH] Device on BitIdx:0x5 doesn't exist
[Init Satallite IEH] Device on BitIdx:0x6 doesn't exist
[Init Satallite IEH] Device on BitIdx:0x7 doesn't exist
[Init Satallite IEH] Device on BitIdx:0x8 doesn't exist
[Init Satallite IEH] Device on BitIdx:0x9 doesn't exist
Clear IEH Global Error Status before enabling IEH error...
[Init Satallite IEH] S:1 B:0xC7 D:0x0 F:0x4 End
Clear IEH Global Error Status before enabling IEH errors
[IEH INIT] Init Socket:0x1 End
AddMicrocodeSmbiosTable: No valid Utility installed.
AddMicrocodeSmbiosTable: MicrocodeStagingRegion is 1.
AddMicrocodeSmbiosTable: UtilityStagingRegion is FFFF.
All AfterEndOfDxeEvent callbacks have returned successfully
PDB = c:\efi\servergen2\intel\Build\EagleStreamRpPkg\DEBUG_VS2015x86\X64\MdeModulePkg\Universal\Acpi\BootScriptExecutorDxe\BootScriptExecutorDxe\DEBUG\BootScriptExecutorDxe.pdb
[SIO] Current system SIO exist bit:10
IioSecureOnReadyToLock...
MSR_BIOS_DONE[0x151] 0x00000000 -> 0x00000003
PROGRESS CODE: V02010000 I0
PROGRESS CODE: V02010004 I0
PROGRESS CODE: V02010004 I0
PROGRESS CODE: V02010004 I0
[SGX] SgxAfterPlatformLocksCallback entry
[SGX] PrepareMcheckBiosParamInfo BEGIN
PopulateBiosParamInfoCreationPolicy: BiosParamInfoCreationPolicy = 0x0
Error: BiosParamInfoCreationPolicy is not initialized
[SGX] PrepareMcheckBiosParamInfo END
[SGX] UpdateRegistrationPackageInfo BEGIN
[SGX] UpdateRegistrationPackageInfo END
[SGX] StatusVariable: update ErrorCode from BIOS: 19
ExposeAllScenariosSgxRegistrationUefiVariables Enter
Expose variable [SgxRegistrationConfiguration]:
SetVariable: Success
ExposeToOsRuntime: 1
ReadOnlyOsRuntime: 0
ExposeAllScenariosSgxRegistrationUefiVariables: SgxRegistrationConfig->SgxRegServerInfo.Url = https://sbx.api.trustedservices.intel.com:443
RegistrationRequestType 0
Expose variable [SgxRegistrationServerRequest]:
SetVariable: Success
ExposeToOsRuntime: 1
ReadOnlyOsRuntime: 1
SgxRegistrationPackageInfo SHA256 sum:
[BB] [EC] [C9] [F0] [69] [34] [92] [3B] [63] [74] [71] [F4] [F7] [75] [C4] [BA] [B1] [BD] [29] [53] [56] [F9] [A1] [DE] [B7] [06] [65] [3B] [6D] [FF] [F7] [E7]
Expose variable [SgxRegistrationPackageInfo]:
SetVariable: Success
ExposeToOsRuntime: 0
ReadOnlyOsRuntime: 0
[SGX-DEBUG] Late PrintByteArrays SgxRegistrationStatus:
[01] [00] [03] [00] [02] [00] [19]
Expose variable [SgxRegistrationStatus]:
SetVariable: Success
ExposeToOsRuntime: 1
ReadOnlyOsRuntime: 0
Success to expose Registration Variables, exiting...
[SGX] SgxAfterPlatformLocksCallback exit: success
[SGX] DeallocateMcheckBiosParamInfo BEGIN
Verbose: BiosParamInfo already deallocated
[SGX] DeallocateMcheckBiosParamInfo END
PROGRESS CODE: V0300850B I0
PROGRESS CODE: V01050004 I0
PROGRESS CODE: V01050003 I0
PROGRESS CODE: V01050001 I0
PROGRESS CODE: V01040001 I0
PROGRESS CODE: V01050001 I0
PROGRESS CODE: V02020000 I0
PROGRESS CODE: V02020004 I0
PROGRESS CODE: V02020003 I0
TranslateBmpToGopBlt: BmpHeader->Char fields incorrect
PROGRESS CODE: V02020000 I0
PROGRESS CODE: V02020006 I0
UsbEnumerateNewDev: No device present at port 5
PROGRESS CODE: V02020006 I0
PROGRESS CODE: V02010000 I0
PROGRESS CODE: V02010004 I0
PROGRESS CODE: V02010004 I0
PROGRESS CODE: V02010004 I0
PROGRESS CODE: V02020000 I0
PROGRESS CODE: V02010004 I0
PROGRESS CODE: V02010004 I0
PROGRESS CODE: V02081000 I0
PROGRESS CODE: V02081003 I0
PROGRESS CODE: V01070004 I0
PROGRESS CODE: V02080000 I0
PROGRESS CODE: V02080003 I0
PROGRESS CODE: V02080004 I0
PROGRESS CODE: V02070000 I0
PROGRESS CODE: V02070003 I0
PROGRESS CODE: V01050004 I0
PROGRESS CODE: V01050004 I0
PROGRESS CODE: V01050003 I0
PROGRESS CODE: V01050001 I0
PROGRESS CODE: V01040001 I0
PROGRESS CODE: V01050001 I0
PROGRESS CODE: V02010000 I0
PROGRESS CODE: V02010004 I0
PROGRESS CODE: V02010004 I0
PROGRESS CODE: V02010004 I0
PROGRESS CODE: V02010000 I0
PROGRESS CODE: V02010004 I0
PROGRESS CODE: V02010004 I0
PROGRESS CODE: V02010004 I0
PROGRESS CODE: V02010000 I0
PROGRESS CODE: V02010004 I0
PROGRESS CODE: V02010004 I0
PROGRESS CODE: V02010004 I0
PROGRESS CODE: V02010000 I0
PROGRESS CODE: V02010004 I0
PROGRESS CODE: V02010004 I0
PROGRESS CODE: V02010004 I0
PROGRESS CODE: V02010000 I0
PROGRESS CODE: V02010004 I0
PROGRESS CODE: V02010004 I0
PROGRESS CODE: V02010004 I0
PROGRESS CODE: V02010000 I0
PROGRESS CODE: V02010004 I0
PROGRESS CODE: V02010004 I0
PROGRESS CODE: V02010004 I0
PROGRESS CODE: V02010000 I0
PROGRESS CODE: V02010004 I0
PROGRESS CODE: V02010004 I0
PROGRESS CODE: V02010004 I0
PROGRESS CODE: V02010000 I0
PROGRESS CODE: V02010004 I0
PROGRESS CODE: V02010004 I0
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PROGRESS CODE: V02010000 I0
PROGRESS CODE: V02010004 I0
PROGRESS CODE: V02010004 I0
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PROGRESS CODE: V02010000 I0
PROGRESS CODE: V02010004 I0
PROGRESS CODE: V02010004 I0
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PROGRESS CODE: V02010000 I0
PROGRESS CODE: V02010004 I0
PROGRESS CODE: V02010004 I0
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PROGRESS CODE: V02010000 I0
PROGRESS CODE: V02010004 I0
PROGRESS CODE: V02010004 I0
PROGRESS CODE: V02010004 I0
PROGRESS CODE: V02010000 I0
PROGRESS CODE: V02010004 I0
PROGRESS CODE: V02010004 I0
PROGRESS CODE: V02010004 I0
PROGRESS CODE: V02010000 I0
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PDB = c:\efi\servergen2\intel\Build\EagleStreamRpPkg\DEBUG_VS2015x86\X64\ServerPlatformPkg\Features\Me\MeSps\Sps\PtuLoader\PtuLoader\DEBUG\PtuLoader.pdb
PROGRESS CODE: V03040002 I0
PROGRESS CODE: V03040003 I0
PDB = c:\efi\servergen2\intel\Build\EagleStreamRpPkg\DEBUG_VS2015x86\X64\ServerPlatformPkg\Features\Me\MeSps\Sps\Acpi\SpsAcpiHooks\DEBUG\SpsAcpiHooks.pdb
PROGRESS CODE: V03040002 I0
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PROGRESS CODE: V02020000 I0
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PROGRESS CODE: V02080003 I0
PROGRESS CODE: V02070000 I0
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PROGRESS CODE: V01050004 I0
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PROGRESS CODE: V02020000 I0
Press [Enter] to directly boot.
Press [F2] to enter setup and select boot options.
Press [F7] to show boot menu options.
Copyright (c) 2006-2022, Intel Corporation.
S0 S3M_S3MFW_CFR_SVN_N0_S3M_TREG_REG : 00000000
S0 S3M_S3MFW_REVID_N0_S3M_TREG_REG : 00000000
S0 S3M_S3MFW_CFR_SVN_N1_S3M_TREG_REG : 00010001
S0 S3M_S3MFW_REVID_N1_S3M_TREG_REG : 0000001E
S0 S3M_PUCODE_CFR_SVN_N0_S3M_TREG_REG: 00000000
S0 S3M_PUCODE_REVID_N0_S3M_TREG_REG : 00000000
S0 S3M_PUCODE_CFR_SVN_N1_S3M_TREG_REG: 00010001
S0 S3M_PUCODE_REVID_N1_S3M_TREG_REG : 130000C0
S1 S3M_S3MFW_CFR_SVN_N0_S3M_TREG_REG : 00000000
S1 S3M_S3MFW_REVID_N0_S3M_TREG_REG : 00000000
S1 S3M_S3MFW_CFR_SVN_N1_S3M_TREG_REG : 00010001
S1 S3M_S3MFW_REVID_N1_S3M_TREG_REG : 0000001E
S1 S3M_PUCODE_CFR_SVN_N0_S3M_TREG_REG: 00000000
S1 S3M_PUCODE_REVID_N0_S3M_TREG_REG : 00000000
S1 S3M_PUCODE_CFR_SVN_N1_S3M_TREG_REG: 00010001
S1 S3M_PUCODE_REVID_N1_S3M_TREG_REG : 130000C0
SocketIioConfigPtr->IioHcxType 0.0= 0
SocketIioConfigPtr->IioHcxType 0.1= 0
SocketIioConfigPtr->IioHcxType 0.2= 0
SocketIioConfigPtr->IioHcxType 0.3= 0
SocketIioConfigPtr->IioHcxType 0.4= 0
SocketIioConfigPtr->IioHcxType 0.5= 0
SocketIioConfigPtr->IioHcxType 0.6= 0
SocketIioConfigPtr->IioHcxType 0.7= 0
SocketIioConfigPtr->IioHcxType 0.8= 0
SocketIioConfigPtr->IioHcxType 0.9= 0
SocketIioConfigPtr->IioHcxType 0.A= 0
SocketIioConfigPtr->IioHcxType 0.B= 0
SocketIioConfigPtr->IioHcxType 1.0= 0
SocketIioConfigPtr->IioHcxType 1.1= 0
SocketIioConfigPtr->IioHcxType 1.2= 0
SocketIioConfigPtr->IioHcxType 1.3= 0
SocketIioConfigPtr->IioHcxType 1.4= 0
SocketIioConfigPtr->IioHcxType 1.5= 0
SocketIioConfigPtr->IioHcxType 1.6= 0
SocketIioConfigPtr->IioHcxType 1.7= 0
SocketIioConfigPtr->IioHcxType 1.8= 0
SocketIioConfigPtr->IioHcxType 1.9= 0
SocketIioConfigPtr->IioHcxType 1.A= 0
SocketIioConfigPtr->IioHcxType 1.B= 0
SocketIioConfigPtr->IioHcxType 2.0= 0
SocketIioConfigPtr->IioHcxType 2.1= 0
SocketIioConfigPtr->IioHcxType 2.2= 0
SocketIioConfigPtr->IioHcxType 2.3= 0
SocketIioConfigPtr->IioHcxType 2.4= 0
SocketIioConfigPtr->IioHcxType 2.5= 0
SocketIioConfigPtr->IioHcxType 2.6= 0
SocketIioConfigPtr->IioHcxType 2.7= 0
SocketIioConfigPtr->IioHcxType 2.8= 0
SocketIioConfigPtr->IioHcxType 2.9= 0
SocketIioConfigPtr->IioHcxType 2.A= 0
SocketIioConfigPtr->IioHcxType 2.B= 0
SocketIioConfigPtr->IioHcxType 3.0= 0
SocketIioConfigPtr->IioHcxType 3.1= 0
SocketIioConfigPtr->IioHcxType 3.2= 0
SocketIioConfigPtr->IioHcxType 3.3= 0
SocketIioConfigPtr->IioHcxType 3.4= 0
SocketIioConfigPtr->IioHcxType 3.5= 0
SocketIioConfigPtr->IioHcxType 3.6= 0
SocketIioConfigPtr->IioHcxType 3.7= 0
SocketIioConfigPtr->IioHcxType 3.8= 0
SocketIioConfigPtr->IioHcxType 3.9= 0
SocketIioConfigPtr->IioHcxType 3.A= 0
SocketIioConfigPtr->IioHcxType 3.B= 0
PROGRESS CODE: V03051007 I0
DebugModeIndicator = 1
InitData -> Protocol not found
CheckpointSend 0x09? No
-> Ready To Boot: Pause Resume Complete = 0x00 0x00 0x00
[HECI Transport-1 DXE] Send pkt: 80040007
00: FF 0C 00 00
[HECI Transport-1 DXE] Got pkt: 80080007
00: FF 8C 00 00 00 00 00 00
IioSecureOnOnReadyToBoot...
IOAT_INIT_READY_TO_BOOT_START
IOAT_INIT_READY_TO_BOOT_END
IOAT_INIT_READY_TO_BOOT_START
IOAT_INIT_READY_TO_BOOT_END
SmmInstallProtocolInterface: 6E057ECF-FA99-4F39-95BC-59F9921D17E4 0
[HECI Transport-1 DXE] Send pkt: 80040007
00: FF 02 00 00
[HECI Transport-1 DXE] Got pkt: 80140007
00: FF 82 00 00 00 00 06 18 - 00 01 03 00 00 00 06 18
10: 00 01 03 00
TPM Location configured (expected values: dTPM = 0x5 = 0x5
Value at TPM Base Address (0xFED40000) = 0xA1
HierarchyChangeAuth: Response Code error! 0x000009A2
PROGRESS CODE: V03051001 I0
PROGRESS CODE: V03058000 I0
PDB = bootmgfw.pdb
PROGRESS CODE: V03058001 I0
Windows Boot Manager Choose an operating system to start, or press TAB to select a tool: (Use the arrow keys to highlight your choice, then press ENTER.) Windows Server To specify an advanced option for this choice, press F8. Seconds until the highlighted choice will be started automatically: Tools: Windows Memory Diagnostic ENTER=Choose TAB=Menu ESC=Cancel Windows Server> To specify an advanced option for this choice, press F8. 5 PROGRESS CODE: V01040001 I0
PROGRESS CODE: V01050001 I0
PROGRESS CODE: V01010001 I0
PROGRESS CODE: V01011000 I0
PDB = bootmgfw.pdb
PROGRESS CODE: V03058000 I0
PDB = c:\efi\servergen2\intel\Build\EagleStreamRpPkg\DEBUG_VS2015x86\X64\ServerPlatformPkg\Applications\UiApp\UiApp\DEBUG\UiApp.pdb
PROGRESS CODE: V03058001 I0
PROGRESS CODE: V03050007 I0
[ME] MeOnEnterSetup() called
[HECI] Set MeType in MeOnEnterSetup (MeType is ME_TYPE_SPS)
[HECI Transport-1 DXE] Send pkt: 804D0007
00: 0A 02 00 00 2F 68 6F 6D - 65 2F 68 6F 74 68 61 6D
10: 2F 64 62 67 5F 64 61 6D - 5F 72 65 71 00 00 00 00
20: 00 00 00 00 00 00 00 00 - 00 00 00 00 00 00 00 00
30: 00 00 00 00 00 00 00 00 - 00 00 00 00 00 00 00 00
40: 00 00 00 00 00 00 00 00 - 01 00 00 00 00
[HECI Transport-1 DXE] Got pkt: 80090007
00: 0A 82 00 00 01 00 00 00 - 01
PROGRESS CODE: V03050006 I0
EAGLESTREAMGenuine Intel(R) CPU 0000%@1.70 GHzEGSDCRB1.ZHI.0091.D15.2211010657262144 MB RAMCopyright (c) 2006-2022, Intel Corporation >EDKII Menu >Boot Manager Menu >Boot Maintenance Manager Continue Reset ^v=Move Highlight <Enter>=Select Entry This selection will take you to the EDKII_MENU >EDKII Menu >Boot Manager Menu >Boot Maintenance Manager Continue Reset ^v=Move Highlight <Enter>=Select Entry This selection will take you to the EDKII_MENU This selection will take you to the EDKII_MENU This selection will take you to the EDKII_MENU This selection will take you to the EDKII_MENU This selection will take you to the EDKII_MENU >EDKII Menu ^v=Move Highlight <Enter>=Select Entry >Boot Manager Menu This selection will take you to the Boot Manager PROGRESS CODE: V02020000 I0
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/------------------------------------------------------------------------------\|| Boot Manager Menu \------------------------------------------------------------------------------//------------------------------------------------------------------------------\||||\------------------------------------------------------------------------------/Copyright (c) 2006-2022, Intel Corporation Boot Manager Menu UEFI WDC WD1005VBYZ-02RRWB2 WD-WMC6N0K69VYL UEFI Kingston DataTraveler 3.0 E0D55E62C78DF4C0D8A414B9 UEFI Internal Shell Use the <^> and <v> keys to choose a boot option, the <Enter> key to select a boot option, and the <Esc> key to exit the Boot Manager Menu. Esc=Exit ^v=Move Highlight <Enter>=Select Entry Device Path : PciRoot(0x0)/Pci(0x17, 0x0)/Sata(0x0,0xFFFF,0 x0) UEFI WDC WD1005VBYZ-02RRWB2 WD-WMC6N0K69VYL Esc=Exit ^v=Move Highlight <Enter>=Select Entry UEFI Kingston DataTraveler 3.0 E0D55E62C78DF4C0D8A414B9 Device Path : PciRoot(0x0)/Pci(0x14, 0x0)/USB(0x5,0x0) UEFI Kingston DataTraveler 3.0 E0D55E62C78DF4C0D8A414B9 Esc=Exit ^v=Move Highlight <Enter>=Select Entry UEFI Internal Shell Device Path : Fv(CDBB7B35-6833-4ED6- 9AB2-57D2ACDDF6F0)/FvF ile(7C04A583-9E3E-4F1C -AD65-E05268D0B4D1) IioSecureOnOnReadyToBoot...
PROGRESS CODE: V03051001 I0
PROGRESS CODE: V03058000 I0
PDB = c:\efi\servergen2\intel\Build\EagleStreamRpPkg\DEBUG_VS2015x86\X64\ShellPkg\Application\Shell\Shell\DEBUG\Shell.pdb
PROGRESS CODE: V03058001 I0
UEFI Interactive Shell v2.2
EDK II
UEFI v2.70 (EDK II, 0x00010000)
Mapping table
FS0: Alias(s):HD0f0b:;BLK1:
PciRoot(0x0)/Pci(0x14,0x0)/USB(0x5,0x0)/HD(1,MBR,0x2EBE6405,0x3F,0x39A2C81)
FS1: Alias(s):HD1a65535a2:;BLK4:
PciRoot(0x0)/Pci(0x17,0x0)/Sata(0x0,0xFFFF,0x0)/HD(2,GPT,901ED09D-0CC1-4B78-A258-58391A5D6567,0xDC800,0x82000)
BLK0: Alias(s):
PciRoot(0x0)/Pci(0x14,0x0)/USB(0x5,0x0)
BLK2: Alias(s):
PciRoot(0x0)/Pci(0x17,0x0)/Sata(0x0,0xFFFF,0x0)
BLK3: Alias(s):
PciRoot(0x0)/Pci(0x17,0x0)/Sata(0x0,0xFFFF,0x0)/HD(1,GPT,07AE39FD-788D-490A-B7F2-D61CC80B130F,0x800,0xDC000)
BLK5: Alias(s):
PciRoot(0x0)/Pci(0x17,0x0)/Sata(0x0,0xFFFF,0x0)/HD(3,GPT,83E10836-37FC-4554-9CC3-71A59B1794AB,0x15E800,0x40000)
BLK6: Alias(s):
PciRoot(0x0)/Pci(0x17,0x0)/Sata(0x0,0xFFFF,0x0)/HD(4,GPT,9A20A927-C8F3-4053-9E5E-2807F07E38FD,0x19E800,0x1BD85800)
Press ESC in 5 seconds to skip startup.nsh or any other key to continue.Press ESC in 4 seconds to skip startup.nsh or any other key to continue.
Shell> s fs0:
FS0:\> cd zzhihao
FS0:\zhihao\> ls
Directory of: FS0:\zhihao\
11/01/2022 13:34 <DIR> 16,384 .
11/01/2022 13:34 <DIR> 0 ..
11/01/2022 14:32 67,108,864 EGSDCRB1.ZHI.0091.D15.2211010626_Pa0320_SPR_EBG_SPS.bin
11/01/2022 14:58 10,752 TestApp.efi
10/28/2022 14:31 16,736 TestAppLib.efi
11/01/2022 13:28 11,200 TestAppprotocol.efi
4 File(s) 67,147,552 bytes
2 Dir(s)
FS0:\zhihao\> teTestAppLib.efi.efi .efi .efi EGEGSDCRB1.ZHI.0091.D15.2211010626_Pa0320_SPR_EBG_SPS.bin
PDB = c:\efi\servergen2\intel\Build\EagleStreamRpPkg\DEBUG_VS2015x86\X64\EagleStreamRpPkg\Applications\TestApp\TestApp\DEBUG\TestApp.pdb
[DxeCryptLib] Failed to locate Crypto Protocol. Status = Not Found
ASSERT_EFI_ERROR (Status = Not Found)
DXE_ASSERT!: [TestApp] C:\efi\ServerGen2\Edk2\CryptoPkg\Library\BaseCryptLibOnProtocolPpi\DxeCryptLib.c (62): !(((INTN)(RETURN_STATUS)(Status)) < 0)
ÿPROGRESS CODE: V03020003 I0
PROGRESS CODE: V03020002 I0
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[IPMI PEI] BMC Device ID: 0x23, firmware version: 2.03 UpdateMode:1
[IPMI] BMC in Forced Update mode, skip waiting for BMC_READY.
PROGRESS CODE: V03020003 I0
PROGRESS CODE: V03020002 I0
PROGRESS CODE: V03020003 I0
PROGRESS CODE: V03020002 I0
InstallHeciTransportPpis, start
InstallHeciTransportPpis, end
[HECI CONTROL PEI] HECI Transport found: 2
[HECI Control-1 PEI]: ERROR: HeciControlSendAndReceiveSinglePch() : Heci 1 is not initialized
HECI: ME type not recognized (MEFS1: 0x00000355, MEFS2: 0x80502006)
Initialization is allowed
[HECI Transport-1 PEI] Send pkt: 80040007
00: F0 11 00 00
[HECI Transport-1 PEI] Got pkt: 80080007
00: F0 91 00 00 09 00 00 00
HECI: Create MeType HOB for ME: 1
HECI: Set MeType HOB info to: 1
[HECI] [ME] (MeType is ME_TYPE_SPS)
Initialization is allowed
PROGRESS CODE: V03020003 I0
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IioVmdDisableForPchRpInit: DonePCH Series : EBG PCH
PCH Stepping : B0
PROGRESS CODE: V03020003 I0
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UbaInitPeim: PlatformType=0x16
UbaInitPeim: PlatformType=0x16
UbaInitPeim: PlatformType=0x16
UbaInitPeim: PlatformType=0x16
PROGRESS CODE: V03020003 I0
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UBA:GpioTable size 0x9CC, blocks: 0xD1.
UBA: Start ConfigureGpio().
UBA: ConfigureGpio() end.
Unable to read FlashSecOvrdVal
FiaMuxRecordsCount = 0
[HECI] PeiMeServerPolicy (MeType is ME_TYPE_SPS)
Can't finde more CFR image in CFR FV - Not Found!
PPR Variable not found or CRC mismatch - Status: 0x8000000E, Crc: 0x0, calc. Crc: 0x0!
UpdatePeiSecurityPolicy: Create Status=Success
FIT not found, skip LT-SX
Platform Type = 22
Bios ID: EGSDCRB1.ZHI.0091.D15.2211010801
PROGRESS CODE: V03020003 I0
[HECI Transport-1 PEI] Send pkt: 80010020
00: 01
[HECI Transport-1 PEI] Got pkt: 800B0020
00: 81 01 01 14 00 88 00 01 - 00 00 00
[HECI Transport-1 PEI] Send pkt: 80300008
00: 00 00 05 00 1A 00 00 00 - 00 00 00 00 1C 00 00 00
10: 00 00 00 00 00 00 00 00 - 00 00 00 00 00 00 00 00
20: 00 00 00 00 00 00 00 00 - 00 00 00 00 00 00 00 00
[HECI Transport-1 PEI] Got pkt: 80300008
00: 00 00 05 00 1A 00 00 00 - 00 00 00 00 1C 00 00 00
10: 00 00 00 00 00 00 00 02 - 00 00 00 00 00 00 00 00
20: 00 00 00 00 00 00 00 00 - 00 00 00 00 00 00 00 00
Fail to Configure PSYS_CRIT
PROGRESS CODE: V03020002 I0
PROGRESS CODE: V03020003 I0
PROGRESS CODE: V03020002 I0
PROGRESS CODE: V03020003 I0
PROGRESS CODE: V03020002 I0
PROGRESS CODE: V03020003 I0
PROGRESS CODE: V03020002 I0
PROGRESS CODE: V03020003 I0
PROGRESS CODE: V03020002 I0
LtStatusRegister[0xFED30000] = 0x0000000000000003
LtExtendedStatusError[0xFED30008] = 0x0000000000000000
BootGuardBootStatus[0xFED300A0] = 0x0000000000000000
BootGuardAcmError[0xFED30328] = 0x0000000000000000
BootGuardLtExists[0xFED30010] = 0x0000000000000000
BootGuardLtCrash[0xFED30030] = 0x0000000000000000
MSR_DEBUG_INTERFACE[0x00000C80] = 0x0000000080000001
MSR_BOOT_GUARD_SACM_INFO[0x0000013A] = 0x0000000C00000000
AcmPolicyStatus = 0x0, IsTxtFailedWithScrtm 0
None of BtG/TXT is enabled or TXT failed with scrtm.
PROGRESS CODE: V03020003 I0
PROGRESS CODE: V03020002 I0
PROGRESS CODE: V03020003 I0
PROGRESS CODE: V03020002 I0
InitializeDefaultData()
[Enter] Initialize Reference Code Policy!
>>> Print the default settings of Reference Code Policy! Begin >>>
ReferenceCodePolicyPtr->NumaEn = 1
ReferenceCodePolicyPtr->UmaBasedClustering = 0
<<< Print the default settings of Reference Code Policy! End <<<
[Exit] Initialize Reference Code Policy!
SBSP socket = 0
InitializePlatformData()
InstallPpi MrcHooksServicesPpiDesc Status = 00000000
CacheMrcHooksServicesPpi in HOST: Host->MrcHooksServicesPpi = FFEA57C0
InstallPpi MrcHooksChipServicesPpiDesc Status = 00000000
CacheMrcChipHooksServicesPpi in HOST: Host->MrcHooksChipServicesPpi = FFEA5820
PROGRESS CODE: V030F100B I0
LoadNvramData: LoadSysInfoNvram failed, Status = Not Found
[HECI Transport-1 PEI] Send pkt: 80100007
00: F0 0C 00 00 DF FF FF FF - FF FF FF FF 00 00 00 00
[HECI Transport-1 PEI] Got pkt: 80100007
00: F0 8C 00 00 00 00 00 00 - 00 00 00 00 00 00 00 00
MeUmaConfigureRequestedSegmentSize: Exiting (Status = Success)
GetEmulationMemFlows: Simics $mrc value = 0
memFlows = 0xFFFFFFFF, memFlowsExt = 0xFFBF7FFF, memFlowsExt2 = 0xBF9E1F7F, memFlowsExt3 = 0xFFFFFFFF
Emulation Value is: 0!
Running on hardware
SPR processor detected
Warning: Newer CPU Stepping 4 detected
RC Version: 1.1.1.01BC
sizeof sysHost = 363776
SsaLoader - Entry
SsaLoader - Exit
KTI Init starting...
******* KTI Setup Structure *******
Bus Ratio (per socket): S0: 1 S1: 1 S2: 1 S3: 1
D2KCreditConfig: 0 [1:Low,2:Med,3:High]
SnoopThrottleConfig: 0 [0:Dis,1:Low,2:Med,3:High,4:Auto]
LegacyVgaSoc: 0
LegacyVgaStack: 0
P2pRelaxedOrdering: 0
DebugPrintLevel: 15
DegradePrecedence: 0
Degrade4SPreference: 0 (4SFullyConnect)
KtiLinkSpeedMode: 1 (FAST)
DfxWarmResetEliminationEn: 0
KtiLinkSpeed: 127 (MAX_SUPPORTED)
KtiAdaptationEn: 2 (UNKNOWN)
KtiAdaptationSpeed: 127 (MAX_SUPPORTED)
KtiLinkL0pEn: 2 (AUTO)
KtiLinkL1En: 2 (AUTO)
KtiFailoverEn: 2 (AUTO)
KtiLbEn: 0
SncEn: 15 (AUTO)
IoDcMode: 1 (AUTO)
DirectoryModeEn: 2
XptPrefetchEn: 2
KtiPrefetchEn: 2
XptRemotePrefetchEn: 2
RdCurForXptPrefetchEn: 2
StaleAtoSOptEn: 2
LLCDeadLineAlloc: 1
OppoLLC2SfMigrationEn: 0 (MANUAL)
MbeBWCalChoice: 3 [0:Linear,1:Biased,2:Legacy,3:Auto]
PmmMbaBWDownscale: 0 [0:1x,1:1/2x,2:1/4x,3:1/8x]
CxlMbaBWDownscale: 0 [0:1x,1:1/2x,2:1/4x,3:1/8x]
RemoteTargetMbaBWDownscale 0 [0:1x,1:1/2x,2:1/4x,3:1/8x]
SplitLock: 0
DdrtQosMode: 0
ClockModulationEn: 2 (AUTO)
KtiFpgaEnable (per socket): S0: 2 S1: 2 S2: 2 S3: 2
StackDisableBitMap (per socket): S0: 0x0 S1: 0x0 S2: 0x0 S3: 0x0
KtiCrcMode: 0 (16BIT)
KtiCpuSktHotPlugEn: 0
KtiCpuSktHotPlugTopology: 0 (4S)
KtiSkuMismatchCheck: 1
MctpBusOwner: 0 (PCH SPS as Bus Owner (Proxy))
KtiPortDisable (per port):
S0:0 0 0 0
S1:0 0 0 0
S2:0 0 0 0
S3:0 0 0 0
KtiLinkVnaOverride (per port):
S0:254 254 254 254
S1:254 254 254 254
S2:254 254 254 254
S3:254 254 254 254
KtiLinkSpeed (per port):
S0:7 7 7 7
S1:7 7 7 7
S2:7 7 7 7
S3:7 7 7 7
Rsvd (per port):
S0:0 0 0 0
S1:0 0 0 0
S2:0 0 0 0
S3:0 0 0 0
**KTI Setup Structure DfxParms **
DfxHaltLinkFailReset: 2 (AUTO)
DfxKtiMaxInitAbort: 2 (AUTO)
DfxLlcShareDrdCrd 2 (AUTO)
DfxBiasFwdMode: 5 (AUTO)
DfxSnoopFanoutEn: 2 (AUTO)
DfxHitMeEn: 2 (AUTO)
DfxFrcfwdinv 2 (AUTO)
DfxDbpEnable 2 (AUTO)
DfxCleanEvictAlwaysLive: 2 (AUTO)
DfxModifiedEvictAlwaysLive: 2 (AUTO)
DfxOsbEn 2 (AUTO)
DfxHitMeRfoDirsEn 2 (AUTO)
DfxGateOsbIodcAllocEn 2 (AUTO)
DfxDualLinksInterleavingMode 2 (AUTO)
DfxSystemDegradeMode: 1
DfxVn1En: 2 (AUTO)
DfxD2cEn: 2 (AUTO)
DfxD2kEn: 2 (AUTO)
DfxLockPrimary: 4 (AUTO)
DfxOsbLocRd: 2 (AUTO)
DfxOsbLocRdCur: 2 (AUTO)
DfxOsbRmtRd: 2 (AUTO)
DfxM3KtiCountMismatchEn: 2 (AUTO)
DfxSnoopFanoutChaInterleaveEn: 2 (AUTO)
DfxXptFifoEnabledCredit: 0x5
DfxMdfisTrainingEn: 2 (AUTO)
DfxClippedFreq: 23
DfxLlpEndcntClipped: 650
DfxLlpEndcntNonClipped: 576
DfxCxlSecLvl: 3 (AUTO)
DfxCxlStcge: 2 (AUTO)
DfxCxlSdcge: 2 (AUTO)
DfxCxlDlcge: 2 (AUTO)
DfxCxlLtcge: 2 (AUTO)
DfxCxlVid: 2 (AUTO)
DfxIioDfxEnabled: 0 (MANUAL)
DfxHqmEn: 2 (AUTO)
DfxRsfEnabledForDram: 2 (AUTO)
DfxS3mSoftStrap: 2 (AUTO)
DfxPmonConfig: 3 (AUTO)
DfxM2IosfPmonAccessControl: 2 (AUTO)
DfxMaxCache: 256 (AUTO)
DfxMaxCacheAtomic: 256 (AUTO)
DfxCtagEntryAvailMask: 256 (AUTO)
DfxXptPrefetchEn: 2 (AUTO)
DfxPrqBlockEn: 2 (AUTO)
DfxAeg0CounterLowVal: 65535 (AUTO)
DfxAeg0CounterHighVal: 65535 (AUTO)
DfxCrcMode (per port):
S0:2 (AUTO) 2 (AUTO) 2 (AUTO) 2 (AUTO)
S1:2 (AUTO) 2 (AUTO) 2 (AUTO) 2 (AUTO)
S2:2 (AUTO) 2 (AUTO) 2 (AUTO) 2 (AUTO)
S3:2 (AUTO) 2 (AUTO) 2 (AUTO) 2 (AUTO)
DfxL0pEnable (per port):
S0:2 (AUTO) 2 (AUTO) 2 (AUTO) 2 (AUTO)
S1:2 (AUTO) 2 (AUTO) 2 (AUTO) 2 (AUTO)
S2:2 (AUTO) 2 (AUTO) 2 (AUTO) 2 (AUTO)
S3:2 (AUTO) 2 (AUTO) 2 (AUTO) 2 (AUTO)
DfxL1Enable (per port):
S0:2 (AUTO) 2 (AUTO) 2 (AUTO) 2 (AUTO)
S1:2 (AUTO) 2 (AUTO) 2 (AUTO) 2 (AUTO)
S2:2 (AUTO) 2 (AUTO) 2 (AUTO) 2 (AUTO)
S3:2 (AUTO) 2 (AUTO) 2 (AUTO) 2 (AUTO)
DfxKtiFailoverEn (per port):
S0:2 (AUTO) 2 (AUTO) 2 (AUTO) 2 (AUTO)
S1:2 (AUTO) 2 (AUTO) 2 (AUTO) 2 (AUTO)
S2:2 (AUTO) 2 (AUTO) 2 (AUTO) 2 (AUTO)
S3:2 (AUTO) 2 (AUTO) 2 (AUTO) 2 (AUTO)
**Common Setup Structure**
mmCfgBase: 6 (AUTO)
mmCfgSize: 6 (AUTO)
mmiohBase: 0x00002000
CpuPaLimit: 0
mmiohSize: 3 (64GB per stack)
numaEn: 1
UmaClustering: 4
isocEn: 0
dcaEn: 0
**Common Var Structure **
resetRequired: 0
state: 0
numCpus: 0
socketPresentBitMap: 0x01
mmCfgBase: 0x80000000
meRequestedSize: 0
******* Collecting Early System Information - START *******
SBSP Socket: 0 Ways: 0x01 Ras: 0x06 Stepping: 0x04 DieCount: 4 Chop: XCC
Total Chas: 52 Cha List Map:
Cha List[0]: 0xBFCFF9FF
Cha List[1]: 0x0FEBFBFF
Total M3Kti: 04 Total KtiAgent: 04 Total M2M: 20 M2M list map: 0x000FFFFF
Current bus numbers:
Socket | Ins00 | Ins01 | Ins02 | Ins03 | Ins04 | Ins05 | Ins06 | Ins07 | Ins08 | Ins09 | Ins0A | Ins0B | Rsvd | Ubox0 | Ubox1 | LastBus | Seg
-----------------------------------------------------------------------------------------------------------------------------------------------
0 | 0x00 | 0x11 | 0x12 | 0x13 | 0x14 | 0x15 | 0x16 | 0x17 | 0x18 | 0x19 | 0x1A | 0x1B | --- | 0x1E | 0x1F | 0x1F | 0
1 | 0x20 | 0x21 | 0x22 | 0x23 | 0x24 | 0x25 | 0x26 | 0x27 | 0x28 | 0x29 | 0x2A | 0x2B | --- | 0x3E | 0x3F | 0x3F | 0
2 | 0x40 | 0x41 | 0x42 | 0x43 | 0x44 | 0x45 | 0x46 | 0x47 | 0x48 | 0x49 | 0x4A | 0x4B | --- | 0x5E | 0x5F | 0x5F | 0
3 | 0x60 | 0x61 | 0x62 | 0x63 | 0x64 | 0x65 | 0x66 | 0x67 | 0x68 | 0x69 | 0x6A | 0x6B | --- | 0x7E | 0x7F | 0x7F | 0
-----------------------------------------------------------------------------------------------------------------------------------------------
Assuming maximal config: TotCpus: 4 CpuList: 0x0F
Default UpiInterleaveMode: 0
Reset Type: Cold Reset
******* Collecting Early System Information - END *******
(Spr) UpiIpWrInit
MaxSocket 4, MaxKtiPort 4
UpiIpWrSingleInit
IpUpiIpInit(UpiAgent[0][0]):
UpiIpWrSingleInit
IpUpiIpInit(UpiAgent[0][1]):
UpiIpWrSingleInit
IpUpiIpInit(UpiAgent[0][2]):
UpiIpWrSingleInit
IpUpiIpInit(UpiAgent[0][3]):
UpiIpWrSingleInit
IpUpiIpInit(UpiAgent[1][0]):
UpiIpWrSingleInit
IpUpiIpInit(UpiAgent[1][1]):
UpiIpWrSingleInit
IpUpiIpInit(UpiAgent[1][2]):
UpiIpWrSingleInit
IpUpiIpInit(UpiAgent[1][3]):
UpiIpWrSingleInit
IpUpiIpInit(UpiAgent[2][0]):
UpiIpWrSingleInit
IpUpiIpInit(UpiAgent[2][1]):
UpiIpWrSingleInit
IpUpiIpInit(UpiAgent[2][2]):
UpiIpWrSingleInit
IpUpiIpInit(UpiAgent[2][3]):
UpiIpWrSingleInit
IpUpiIpInit(UpiAgent[3][0]):
UpiIpWrSingleInit
IpUpiIpInit(UpiAgent[3][1]):
UpiIpWrSingleInit
IpUpiIpInit(UpiAgent[3][2]):
UpiIpWrSingleInit
IpUpiIpInit(UpiAgent[3][3]):
******* Setting up Minimum Path - START *******
Constructing SBSP minimum path Topology Tree
--------------------------------------------
Adding SBSP (CPU0) to the tree
CPU0 Link Exchange
: LEP0(0,CPU1) Socket 0 Port 0:Primary - Peer Socket 1 Port 0 Secondary
: LEP1(1,CPU1) Socket 0 Port 1:Primary - Peer Socket 1 Port 1 Secondary
: LEP2(2,CPU1) Socket 0 Port 2:Primary - Peer Socket 1 Port 2 Secondary
: LEP3(3,CPU1) Socket 0 Port 3:Primary - Peer Socket 1 Port 3 Secondary
Adding CPU1 to the tree
Setting path between SBSP and CPU1.
In SBSP setting route to CPU1 using port 0.
In CPU1 using port 0 to set the M2UPCIe0 route.
CPU1 Link Exchange
: LEP0(0,CPU0) : LEP1(1,CPU0) : LEP2(2,CPU0) : LEP3(3,CPU0)
Setting boot path for CPU1
In CPU1 setting Cbo route to port 0
Socket[2] is removed
Socket[3] is removed
SBSP Minimum Path Tree
----------------------
Index Socket ParentPort Hop ParentIndex
00 CPU0 -- 0 --
01 CPU1 00 1 00
******* Setting up Minimum Path - END *******
******* Check for KTI Topology Degradation - START *******
Link Exchange Parameter
-----------------------
CPU0 : LEP0(0:CPU1) : LEP1(1:CPU1) : LEP2(2:CPU1) : LEP3(3:CPU1)
CPU1 : LEP0(0:CPU0) : LEP1(1:CPU0) : LEP2(2:CPU0) : LEP3(3:CPU0)
Already Reduced to Supported Topology
System will be treated 2S4L Configuration
******* Check for KTI Topology Degradation - END *******
******* Enable UBOX MMIO Addr Range - START *******
Current Bars:
Socket | SCF | PCU | MEM0 | MEM1 | MEM2 | MEM3 | MEM4 | MEM5 | MEM6 | MEM7 | SBREG |
-------------------------------------------------------------------------------------------------------------------------------------------------------
0 | 0xF8000000 | 0xF8200000 | 0xF8280000 | 0xF8300000 | 0xF8380000 | 0xF8400000 | 0xF8480000 | 0xF8500000 | 0xF8580000 | 0xF8600000 | 0xF8680000 |
1 | 0xF8800000 | 0xF8A00000 | 0xF8A80000 | 0xF8B00000 | 0xF8B80000 | 0xF8C00000 | 0xF8C80000 | 0xF8D00000 | 0xF8D80000 | 0xF8E00000 | 0xF8E80000 |
2 | 0xF9000000 | 0xF9200000 | 0xF9280000 | 0xF9300000 | 0xF9380000 | 0xF9400000 | 0xF9480000 | 0xF9500000 | 0xF9580000 | 0xF9600000 | 0xF9680000 |
3 | 0xF9800000 | 0xF9A00000 | 0xF9A80000 | 0xF9B00000 | 0xF9B80000 | 0xF9C00000 | 0xF9C80000 | 0xF9D00000 | 0xF9D80000 | 0xF9E00000 | 0xF9E80000 |
-------------------------------------------------------------------------------------------------------------------------------------------------------
******* Enable UBOX MMIO Addr Range - END *******
******* Process Straps Config - START *******
S3M Read SoftStrap Disabled, Exit.
******* Process Straps Config - END *******
******* Detecting IIO count - START *******
Socket 0 Stack Bitmap:F3F.
Stack Instance Bitmap:F3F.
IioCount: 10.
B2HotCount(LS): 00.
Socket 1 Stack Bitmap:F3F.
Stack Instance Bitmap:F3F.
IioCount: 10.
B2HotCount(LS): 00.
******* Detecting IIO count - END *******
******* Disable UBOX MMIO Addr Range - START *******
Current Bars:
Socket | SCF | PCU | MEM0 | MEM1 | MEM2 | MEM3 | MEM4 | MEM5 | MEM6 | MEM7 | SBREG |
-------------------------------------------------------------------------------------------------------------------------------------------------------
0 | 0x00000000 | 0x00000000 | 0x00000000 | 0x00000000 | 0x00000000 | 0x00000000 | 0x00000000 | 0x00000000 | 0x00000000 | 0x00000000 | 0x00000000 |
1 | 0x00000000 | 0x00000000 | 0x00000000 | 0x00000000 | 0x00000000 | 0x00000000 | 0x00000000 | 0x00000000 | 0x00000000 | 0x00000000 | 0x00000000 |
2 | 0x00000000 | 0x00000000 | 0x00000000 | 0x00000000 | 0x00000000 | 0x00000000 | 0x00000000 | 0x00000000 | 0x00000000 | 0x00000000 | 0x00000000 |
3 | 0x00000000 | 0x00000000 | 0x00000000 | 0x00000000 | 0x00000000 | 0x00000000 | 0x00000000 | 0x00000000 | 0x00000000 | 0x00000000 | 0x00000000 |
-------------------------------------------------------------------------------------------------------------------------------------------------------
******* Disable UBOX MMIO Addr Range - END *******
******* Checking KTIRC Input Structure - START *******
Desired MMCFG Config: Base = 0x80000000, Size = 0x10000000
OutSncPrefetchEn=4, OutSncEn=4
IpUpiGetCapability(UpiAgent[0][0], id=12):
IpUpiVersionSpecificConfigurationEnabled: unknown ID=2
IpWrError 0 49
IpUpiGetCapability(UpiAgent[0][0], id=7):
IpUpiGetCapability(UpiAgent[0][0], id=9):
IpUpiGetCapability(UpiAgent[0][0], id=10):
IpUpiGetCapability(UpiAgent[0][0], id=8):
IpUpiGetCapability(UpiAgent[0][1], id=12):
IpUpiVersionSpecificConfigurationEnabled: unknown ID=2
IpWrError 0 49
IpUpiGetCapability(UpiAgent[0][1], id=7):
IpUpiGetCapability(UpiAgent[0][1], id=9):
IpUpiGetCapability(UpiAgent[0][1], id=10):
IpUpiGetCapability(UpiAgent[0][1], id=8):
IpUpiGetCapability(UpiAgent[0][2], id=12):
IpUpiVersionSpecificConfigurationEnabled: unknown ID=2
IpWrError 0 49
IpUpiGetCapability(UpiAgent[0][2], id=7):
IpUpiGetCapability(UpiAgent[0][2], id=9):
IpUpiGetCapability(UpiAgent[0][2], id=10):
IpUpiGetCapability(UpiAgent[0][2], id=8):
IpUpiGetCapability(UpiAgent[0][3], id=12):
IpUpiVersionSpecificConfigurationEnabled: unknown ID=2
IpWrError 0 49
IpUpiGetCapability(UpiAgent[0][3], id=7):
IpUpiGetCapability(UpiAgent[0][3], id=9):
IpUpiGetCapability(UpiAgent[0][3], id=10):
IpUpiGetCapability(UpiAgent[0][3], id=8):
IpUpiGetCapability(UpiAgent[1][0], id=12):
IpUpiVersionSpecificConfigurationEnabled: unknown ID=2
IpWrError 0 49
IpUpiGetCapability(UpiAgent[1][0], id=7):
IpUpiGetCapability(UpiAgent[1][0], id=9):
IpUpiGetCapability(UpiAgent[1][0], id=10):
IpUpiGetCapability(UpiAgent[1][0], id=8):
IpUpiGetCapability(UpiAgent[1][1], id=12):
IpUpiVersionSpecificConfigurationEnabled: unknown ID=2
IpWrError 0 49
IpUpiGetCapability(UpiAgent[1][1], id=7):
IpUpiGetCapability(UpiAgent[1][1], id=9):
IpUpiGetCapability(UpiAgent[1][1], id=10):
IpUpiGetCapability(UpiAgent[1][1], id=8):
IpUpiGetCapability(UpiAgent[1][2], id=12):
IpUpiVersionSpecificConfigurationEnabled: unknown ID=2
IpWrError 0 49
IpUpiGetCapability(UpiAgent[1][2], id=7):
IpUpiGetCapability(UpiAgent[1][2], id=9):
IpUpiGetCapability(UpiAgent[1][2], id=10):
IpUpiGetCapability(UpiAgent[1][2], id=8):
IpUpiGetCapability(UpiAgent[1][3], id=12):
IpUpiVersionSpecificConfigurationEnabled: unknown ID=2
IpWrError 0 49
IpUpiGetCapability(UpiAgent[1][3], id=7):
IpUpiGetCapability(UpiAgent[1][3], id=9):
IpUpiGetCapability(UpiAgent[1][3], id=10):
IpUpiGetCapability(UpiAgent[1][3], id=8):
****** Selecting KTI freq. - START ******
Max supported KTI Speed requested: 16.0 GT/s
Selected KTI Freq is 16.0 GT/s
****** Selecting KTI freq. - END ******
MaxAddress=52
******* Checking KTIRC Input Structure - END *******
******* KTI NVRAM Verification - START *******
----------Update Kti Nvram in COLD BOOT ----------
******* KTI NVRAM Verification - END *******
******* Calculate Resource Allocation - START *******
S0 - AddressMap.hi=209F
S1 - AddressMap.hi=21BF
BitPos=2E
CPU Resource Allocation
--------------------------------------------------------------------------------------------------------------------------------------------------------------
| StkId | Seg | Bus | Io | IoApic | Mmiol | Mmioh | StkBmp |
--------------------------------------------------------------------------------------------------------------------------------------------------------------
CPU0 | | 0 | 0x00 - 0x7F | 0x0000 - 0x9FFF | 0xFEC00000 - 0xFECFFFFF | 0x90000000 - 0xC8FFFFFF | 0x00002000 00000000 - 0x0000209F FFFFFFFF | 0xF3F |
Ins00 | 0x00 | 0 | 0x00 - 0x14 | 0x0000 - 0x3FFF | 0xFEC00000 - 0xFECFFFFF | 0x90000000 - 0x957FFFFF | 0x00002000 00000000 - 0x0000200F FFFFFFFF | |
Ins01 | 0x01 | 0 | 0x15 - 0x25 | 0x4000 - 0x5FFF | 0xFFFFFFFF - 0x00000000 | 0x95800000 - 0x9F7FFFFF | 0x00002010 00000000 - 0x0000201F FFFFFFFF | |
Ins02 | 0x04 | 0 | 0x26 - 0x36 | 0x6000 - 0x6FFF | 0xFFFFFFFF - 0x00000000 | 0x9F800000 - 0xA93FFFFF | 0x00002020 00000000 - 0x0000202F FFFFFFFF | |
Ins03 | 0x03 | 0 | 0x37 - 0x47 | 0x7000 - 0x7FFF | 0xFFFFFFFF - 0x00000000 | 0xA9400000 - 0xB2FFFFFF | 0x00002030 00000000 - 0x0000203F FFFFFFFF | |
Ins04 | 0x05 | 0 | 0x48 - 0x58 | 0x8000 - 0x8FFF | 0xFFFFFFFF - 0x00000000 | 0xB3000000 - 0xBCBFFFFF | 0x00002040 00000000 - 0x0000204F FFFFFFFF | |
Ins05 | 0x02 | 0 | 0x59 - 0x69 | 0x9000 - 0x9FFF | 0xFFFFFFFF - 0x00000000 | 0xBCC00000 - 0xC67FFFFF | 0x00002050 00000000 - 0x0000205F FFFFFFFF | |
Ins06 | 0x06 | 0 | 0xFF - 0x00 | 0xFFFF - 0x0000 | 0xFFFFFFFF - 0x00000000 | 0xFFFFFFFF - 0x00000000 | 0xFFFFFFFF FFFFFFFF - 0x00000000 00000000 | |
Ins07 | 0x07 | 0 | 0xFF - 0x00 | 0xFFFF - 0x0000 | 0xFFFFFFFF - 0x00000000 | 0xFFFFFFFF - 0x00000000 | 0xFFFFFFFF FFFFFFFF - 0x00000000 00000000 | |
Ins08 | 0x08 | 0 | 0x6A - 0x6E | 0xFFFF - 0x0000 | 0xFFFFFFFF - 0x00000000 | 0xC6800000 - 0xC6FFFFFF | 0x00002060 00000000 - 0x0000206F FFFFFFFF | |
Ins09 | 0x09 | 0 | 0x6F - 0x73 | 0xFFFF - 0x0000 | 0xFFFFFFFF - 0x00000000 | 0xC7000000 - 0xC77FFFFF | 0x00002070 00000000 - 0x0000207F FFFFFFFF | |
Ins10 | 0x0A | 0 | 0x74 - 0x78 | 0xFFFF - 0x0000 | 0xFFFFFFFF - 0x00000000 | 0xC7800000 - 0xC7FFFFFF | 0x00002080 00000000 - 0x0000208F FFFFFFFF | |
Ins11 | 0x0B | 0 | 0x79 - 0x7D | 0xFFFF - 0x0000 | 0xFFFFFFFF - 0x00000000 | 0xC8000000 - 0xC87FFFFF | 0x00002090 00000000 - 0x0000209F FFFFFFFF | |
Rsvd | 0x0C | 0 | 0xFB - 0xFD | 0xFFFF - 0x0000 | 0xFFFFFFFF - 0x00000000 | 0xFFFFFFFF - 0x00000000 | 0xFFFFFFFF FFFFFFFF - 0x00000000 00000000 | |
Ubox | 0x0D | 0 | 0x7E - 0x7F | 0xFFFF - 0x0000 | 0xFFFFFFFF - 0x00000000 | 0xC8800000 - 0xC8FFFFFF | 0xFFFFFFFF FFFFFFFF - 0x00000000 00000000 | |
CPU1 | | 0 | 0x80 - 0xFF | 0xA000 - 0xFFFF | 0xFFFFFFFF - 0x00000000 | 0xC9000000 - 0xFBFFFFFF | 0x000020A0 00000000 - 0x0000213F FFFFFFFF | 0xF3F |
Ins00 | 0x00 | 0 | 0x80 - 0x96 | 0xA000 - 0xAFFF | 0xFFFFFFFF - 0x00000000 | 0xC9000000 - 0xD13FFFFF | 0x000020A0 00000000 - 0x000020AF FFFFFFFF | |
Ins01 | 0x01 | 0 | 0x97 - 0xA6 | 0xB000 - 0xBFFF | 0xFFFFFFFF - 0x00000000 | 0xD1400000 - 0xD97FFFFF | 0x000020B0 00000000 - 0x000020BF FFFFFFFF | |
Ins02 | 0x04 | 0 | 0xA7 - 0xB6 | 0xC000 - 0xCFFF | 0xFFFFFFFF - 0x00000000 | 0xD9800000 - 0xE17FFFFF | 0x000020C0 00000000 - 0x000020CF FFFFFFFF | |
Ins03 | 0x03 | 0 | 0xB7 - 0xC6 | 0xD000 - 0xDFFF | 0xFFFFFFFF - 0x00000000 | 0xE1800000 - 0xE97FFFFF | 0x000020D0 00000000 - 0x000020DF FFFFFFFF | |
Ins04 | 0x05 | 0 | 0xC7 - 0xD6 | 0xE000 - 0xEFFF | 0xFFFFFFFF - 0x00000000 | 0xE9800000 - 0xF17FFFFF | 0x000020E0 00000000 - 0x000020EF FFFFFFFF | |
Ins05 | 0x02 | 0 | 0xD7 - 0xE6 | 0xF000 - 0xFFFF | 0xFFFFFFFF - 0x00000000 | 0xF1800000 - 0xF97FFFFF | 0x000020F0 00000000 - 0x000020FF FFFFFFFF | |
Ins06 | 0x06 | 0 | 0xFF - 0x00 | 0xFFFF - 0x0000 | 0xFFFFFFFF - 0x00000000 | 0xFFFFFFFF - 0x00000000 | 0xFFFFFFFF FFFFFFFF - 0x00000000 00000000 | |
Ins07 | 0x07 | 0 | 0xFF - 0x00 | 0xFFFF - 0x0000 | 0xFFFFFFFF - 0x00000000 | 0xFFFFFFFF - 0x00000000 | 0xFFFFFFFF FFFFFFFF - 0x00000000 00000000 | |
Ins08 | 0x08 | 0 | 0xE7 - 0xEB | 0xFFFF - 0x0000 | 0xFFFFFFFF - 0x00000000 | 0xF9800000 - 0xF9FFFFFF | 0x00002100 00000000 - 0x0000210F FFFFFFFF | |
Ins09 | 0x09 | 0 | 0xEC - 0xF0 | 0xFFFF - 0x0000 | 0xFFFFFFFF - 0x00000000 | 0xFA000000 - 0xFA7FFFFF | 0x00002110 00000000 - 0x0000211F FFFFFFFF | |
Ins10 | 0x0A | 0 | 0xF1 - 0xF5 | 0xFFFF - 0x0000 | 0xFFFFFFFF - 0x00000000 | 0xFA800000 - 0xFAFFFFFF | 0x00002120 00000000 - 0x0000212F FFFFFFFF | |
Ins11 | 0x0B | 0 | 0xF6 - 0xFA | 0xFFFF - 0x0000 | 0xFFFFFFFF - 0x00000000 | 0xFB000000 - 0xFB7FFFFF | 0x00002130 00000000 - 0x0000213F FFFFFFFF | |
Rsvd | 0x0C | 0 | 0xFB - 0xFD | 0xFFFF - 0x0000 | 0xFFFFFFFF - 0x00000000 | 0xFFFFFFFF - 0x00000000 | 0xFFFFFFFF FFFFFFFF - 0x00000000 00000000 | |
Ubox | 0x0D | 0 | 0xFE - 0xFF | 0xFFFF - 0x0000 | 0xFFFFFFFF - 0x00000000 | 0xFB800000 - 0xFBFFFFFF | 0xFFFFFFFF FFFFFFFF - 0x00000000 00000000 | |
******* Calculate Resource Allocation - END *******
******* Sync Up PBSPs - START *******
Setting Ubox Sticky to save KTI topology to 0x000000000000FF03
Verifying if the remote socket(s) checked-in.
Inter-socket CSR access En request POST_RESET_WARM reset
packageBspStepping[0]=4
packageBspStepping[1]=4
******* Sync Up PBSPs - END *******
******* Program Mmcfg and bus numbers - START *******
Initiate S1 update
KtiVar->MmCfgBase = 0x80000000
KtiVar->segmentSocket[0] = 0x00
KtiVar->SocketFirstBus[0] = 0x00
KtiVar->SocketLastBus[0] = 0x7F
KtiVar->SocketMmCfgBase[0]= 0x80000000
KtiVar->segmentSocket[1] = 0x00
KtiVar->SocketFirstBus[1] = 0x80
KtiVar->SocketLastBus[1] = 0xFF
KtiVar->SocketMmCfgBase[1]= 0x80000000
Current bus numbers:
Socket | Ins00 | Ins01 | Ins02 | Ins03 | Ins04 | Ins05 | Ins06 | Ins07 | Ins08 | Ins09 | Ins0A | Ins0B | Rsvd | Ubox0 | Ubox1 | LastBus | Seg
-----------------------------------------------------------------------------------------------------------------------------------------------
0 | 0x00 | 0x15 | 0x26 | 0x37 | 0x48 | 0x59 | --- | --- | 0x6A | 0x6F | 0x74 | 0x79 | --- | 0x7E | 0x7F | 0x7F | 0
1 | 0x80 | 0x97 | 0xA7 | 0xB7 | 0xC7 | 0xD7 | --- | --- | 0xE7 | 0xEC | 0xF1 | 0xF6 | --- | 0xFE | 0xFF | 0xFF | 0
-----------------------------------------------------------------------------------------------------------------------------------------------
Wait for S1 to update
Change in Cache size request POST_RESET_WARM reset
Change in Cache size request POST_RESET_WARM reset
Change in Cache size request POST_RESET_WARM reset
Change in Cache size request POST_RESET_WARM reset
Change in Cache size request POST_RESET_WARM reset
Change in Cache size request POST_RESET_WARM reset
Change in Cache size request POST_RESET_WARM reset
Change in Cache size request POST_RESET_WARM reset
Change in Cache size request POST_RESET_WARM reset
Change in Cache size request POST_RESET_WARM reset
Change in Cache size request POST_RESET_WARM reset
Change in Cache size request POST_RESET_WARM reset
Change in Cache size request POST_RESET_WARM reset
Change in Cache size request POST_RESET_WARM reset
Change in Cache size request POST_RESET_WARM reset
Change in Cache size request POST_RESET_WARM reset
Change in Cache size request POST_RESET_WARM reset
Change in Cache size request POST_RESET_WARM reset
Change in Cache size request POST_RESET_WARM reset
Change in Cache size request POST_RESET_WARM reset
******* Program Mmcfg and bus numbers - END *******
Current Bars:
Socket | SCF | PCU | MEM0 | MEM1 | MEM2 | MEM3 | MEM4 | MEM5 | MEM6 | MEM7 | SBREG |
-------------------------------------------------------------------------------------------------------------------------------------------------------
0 | 0xC8800000 | 0xC8A00000 | 0xC8A80000 | 0xC8B00000 | 0xC8B80000 | 0xC8C00000 | 0xC8C80000 | 0xC8D00000 | 0xC8D80000 | 0xC8E00000 | 0xC8E80000 |
1 | 0xFB800000 | 0xFBA00000 | 0xFBA80000 | 0xFBB00000 | 0xFBB80000 | 0xFBC00000 | 0xFBC80000 | 0xFBD00000 | 0xFBD80000 | 0xFBE00000 | 0xFBE80000 |
-------------------------------------------------------------------------------------------------------------------------------------------------------
******* Programming Misc CSRs before WR - START *******
******* Programming Misc CSRs before WR - END *******
******* Pre-work before MDFIS Training *******
S0 S3M_S3MFW_CFR_SVN_N0_S3M_TREG_REG : 00000000
S0 S3M_S3MFW_REVID_N0_S3M_TREG_REG : 00000000
S0 S3M_S3MFW_CFR_SVN_N1_S3M_TREG_REG : 00010001
S0 S3M_S3MFW_REVID_N1_S3M_TREG_REG : 0000001E
******* Mdfs Sweep Training START *******
Get Uncore P0 Ratio = 24, Uncore Pm Ratio = 8
Dispatching command to notify Pbsp S1 to go to halt state
Send the Pipe data to S1 Successfully!
Mdfs training send command to pcode
All PBSPs resume from halt START
All PBSPs resume from halt END
Dispatching command to notify Pbsp S1 to go to halt state
Send the Pipe data to S1 Successfully!
Mdfs training send command to pcode
All PBSPs resume from halt START
All PBSPs resume from halt END
Dispatching command to notify Pbsp S1 to go to halt state
Send the Pipe data to S1 Successfully!
Mdfs training send command to pcode
All PBSPs resume from halt START
All PBSPs resume from halt END
******* Mdfs Sweep Training END *******
******* Post-work after MDFIS Training *******
******* Full Speed Transition - START *******
IpUpiVersionSpecificConfigurationEnabled: unknown ID=5
IpWrError 0 49
IpUpiVersionSpecificConfigurationEnabled: unknown ID=5
IpWrError 0 49
IpUpiVersionSpecificConfigurationEnabled: unknown ID=5
IpWrError 0 49
IpUpiVersionSpecificConfigurationEnabled: unknown ID=5
IpWrError 0 49
IpUpiVersionSpecificConfigurationEnabled: unknown ID=5
IpWrError 0 49
IpUpiVersionSpecificConfigurationEnabled: unknown ID=5
IpWrError 0 49
IpUpiVersionSpecificConfigurationEnabled: unknown ID=5
IpWrError 0 49
IpUpiVersionSpecificConfigurationEnabled: unknown ID=5
IpWrError 0 49
Skip UPI speed transition as there is a comming reset!
******* Full Speed Transition - END *******
******* Programming Credits - START *******
SPR M2IOSF -> M2UPI credit value: 34 is bigger than 31, force it to 31.
SPR M2IOSF -> M2UPI credit value: 34 is bigger than 31, force it to 31.
SPR M2IOSF -> M2UPI credit value: 34 is bigger than 31, force it to 31.
SPR M2IOSF -> M2UPI credit value: 34 is bigger than 31, force it to 31.
SPR M2IOSF -> M2UPI credit value: 50 is bigger than 31, force it to 31.
SPR M2IOSF -> M2UPI credit value: 50 is bigger than 31, force it to 31.
SPR M2IOSF -> M2UPI credit value: 33 is bigger than 31, force it to 31.
SPR M2IOSF -> M2UPI credit value: 49 is bigger than 31, force it to 31.
SPR M2IOSF -> M2UPI credit value: 33 is bigger than 31, force it to 31.
SPR M2IOSF -> M2UPI credit value: 49 is bigger than 31, force it to 31.
SPR M2IOSF -> M2UPI credit value: 34 is bigger than 31, force it to 31.
SPR M2IOSF -> M2UPI credit value: 34 is bigger than 31, force it to 31.
SPR M2IOSF -> M2UPI credit value: 34 is bigger than 31, force it to 31.
SPR M2IOSF -> M2UPI credit value: 34 is bigger than 31, force it to 31.
SPR M2IOSF -> M2UPI credit value: 50 is bigger than 31, force it to 31.
SPR M2IOSF -> M2UPI credit value: 50 is bigger than 31, force it to 31.
SPR M2IOSF -> M2UPI credit value: 33 is bigger than 31, force it to 31.
SPR M2IOSF -> M2UPI credit value: 49 is bigger than 31, force it to 31.
SPR M2IOSF -> M2UPI credit value: 33 is bigger than 31, force it to 31.
SPR M2IOSF -> M2UPI credit value: 49 is bigger than 31, force it to 31.
Mesh Credit Program request POST_RESET_WARM reset
******* Programming Credits - END *******
******* Pcu Misc Config - START *******
******* Pcu Misc Config - END *******
Setup Uncore Misc:
Write Socket 0 GLOBAL_PKG_C_S_CONTROL_REGISTER = 4
Write Socket 1 GLOBAL_PKG_C_S_CONTROL_REGISTER = 100
:INIT - BIOS_RESET_CPL: Set CPL1 on #S1
:INIT - BIOS_RESET_CPL: Set CPL1 on #S0
Initalize DMI RCRB region.
SetRcrbBar (): RcrbBase = 0x90000000
Warning: Created a Memory Hole: 0x90002000 ~ 0x9001FFFF
MEMBAR0: Base = 0x90020000, Size = 0x20000
Socket: 0;DMI MemBar locates on 0x90020000, Size: 0x20000
ProgramNumOfChaPerCluster
ProgramNumOfChaPerCluster
*******SOCKET1 STACKID SWAPPING - START *******
*******SOCKET1 STACKID SWAPPING - END *******
Current bus numbers:
Socket | Ins00 | Ins01 | Ins02 | Ins03 | Ins04 | Ins05 | Ins06 | Ins07 | Ins08 | Ins09 | Ins0A | Ins0B | Rsvd | Ubox0 | Ubox1 | LastBus | Seg
-----------------------------------------------------------------------------------------------------------------------------------------------
0 | 0x00 | 0x15 | 0x26 | 0x37 | 0x48 | 0x59 | --- | --- | 0x6A | 0x6F | 0x74 | 0x79 | --- | 0x7E | 0x7F | 0x7F | 0
1 | --- | 0x97 | 0xA7 | 0xB7 | 0xC7 | 0xD7 | 0x80 | --- | 0xE7 | 0xEC | 0xF1 | 0xF6 | --- | 0xFE | 0xFF | 0xFF | 0
-----------------------------------------------------------------------------------------------------------------------------------------------
Get FM_PCIE_FV_BIF_EN Status = Success, GpioVal = 0
**KTI Output Structure **
OutD2KCreditConfig: 0 [1:Low,2:Med,3:High]
SnoopThrottleConfig: 0 [0:Dis,1:Low,2:Med,3:High,4:Auto]
OutUpiAffinityEn for CHA and M2M: 0
OutTwoSktTopology : 5
OutM2iosfToUpiAffinity: 1
OutPmonConfig: 2 [1:Reduced,2:Full,3:Auto,0:Disabled]
OutM2IosfPmonAccessControl: 0 [0:Restricted,1:Full,2:Auto]
OutD2kEn: 0
OutLegacyVgaSoc: 0
OutLegacyVgaStack: 0
OutIsocEn: 0
OutHitMeEn: 1
OutSncEn: 4 (SNC4)
OutUmaClustering: 0
OutSysDirectoryModeEn: 1
OutKtiPrefetch: 0
OutXptPrefetch: 0
OutXptRemotePrefetch: 0
OutSncPrefetchEn: 4
OutSncGbAlignRequired: 0
OutIsRouteThrough: 0
OutStaleAtoSOptEn: 2
OutSystemRasType: 6 (ADVANCED)
OutIoDcMode: 5 (IODC_EN_REM_INVITOM_AND_WCILF)
KtiCurrentLinkSpeedMode: 0 (SLOW)
OutKtiLinkSpeed: 2 (16.0)
OutKtiLinkL0pEn: 0 (DISABLED)
OutKtiLinkL1En: 1 (ENABLED)
OutKtiFailoverEn: 1 (ENABLED)
OutKtiCrcMode: 0 (16BIT)
OutBoardVsCpuConflict: 0x0
OutKtiAdaptationEnable: 0x0
OutKtiPerLinkL1En (per port):
S0:0 0 0 0
S1:0 0 0 0
S2:0 0 0 0
S3:0 0 0 0
PchPresentBitMap: 0x01
OutKtiFpgaPresent (per socket): S0: 0 S1: 0 S2: 0 S3: 0
OutKtiFpgaEnable (per socket): S0: 0 S1: 0 S2: 0 S3: 0
OutFpgaHomeAgent (per socket): S0: 0 S1: 0 S2: 0 S3: 0
OutFpgaCacheAgent (per socket): S0: 0 S1: 0 S2: 0 S3: 0
OutStackDisableBitMap (per socket): S0: 0x0 S1: 0x0 S2: 0x0 S3: 0x0
mmCfgBase: 0x80000000
mmCfgSize: 0x10000000
mmiolBase: 0x90000000
mmiolSize: 0x6C000000
mmiohBase: 0x00002000
lowGap : 0x20
SecondaryNodeBitMap: 0x00
CpuPaLimit: 0
KtiInternalGlobal:
->SnoopFanoutEn: 0
->SysOsbEn: 1
->D2cEn: 1
->D2kEn: 0
->SnoopFilter: 0
->DualLinksInterleavingMode: 2
->UpiInterleaveMode: 2
->EightSocketTopology: 0
->SnoopFanoutChaInterleaveEn: 0
KtiLinkVnaOverride (per port - final values):
S0:254 254 254 254
S1:254 254 254 254
S2:254 254 254 254
S3:254 254 254 254
IIO STACK rootbus ID mapping table
Stack ID | Root Bus ID
0 ------- 0
1 ------- 1
2 ------- 2
3 ------- 3
4 ------- 4
5 ------- 5
6 ------- 6
7 ------- 7
8 ------- 8
9 ------- 9
10 ------- 10
11 ------- 11
OutDfxPrqBlockEn: 0
OutDfxAeg0CounterLowVal: 40
OutDfxAeg0CounterHighVal: 60
**KTI Output Structure End**
******* KTIRC Exit *******
KTI Init completed! Reset Requested: 2
IIO EarlyLink Init Start.
HcxType[0] = NONE
[IIO](VMD) [0] VMD disabled for RPs init.
MS2IOSF Traffic Controller Credits: Recipe Revision v1.11
Program HW_INIT using SB access
Program HW_INIT using SB access
Program HW_INIT using SB access
Program HW_INIT using SB access
Program HW_INIT using SB access
Program HW_INIT using SB access
Program HW_INIT using SB access
Program HW_INIT using SB access
Program HW_INIT using SB access
[0] Cpxsmb enabled
WARNING: Platform does not support uplink port!
HcxType[1] = NONE
[IIO](VMD) [1] VMD disabled for RPs init.
MS2IOSF Traffic Controller Credits: Recipe Revision v1.11
Program HW_INIT using SB access
Program HW_INIT using SB access
Program HW_INIT using SB access
Program HW_INIT using SB access
Program HW_INIT using SB access
Program HW_INIT using SB access
Program HW_INIT using SB access
Program HW_INIT using SB access
Program HW_INIT using SB access
Program HW_INIT using SB access
[1] Cpxsmb enabled
IIO EarlyLink Init completed! Reset Requested: 2
RC debug buffering, compression, and sync ready
Pipe Init starting...
Pass PIPE_DISPATCH_SYNCH_PSYSHOST to socket 1
Pass PeiPipeFollowerInit
CAR MEM Range 0xFE800000 - 0xFE97A14F
Pass pointer to Host: 0xFE800014
Sending address of Memory Policy: 0xFE96FF80
Pass boot mode 0
Send data buffer
Send data dwordcount 5E854
Send data...complete
CAR MEM Range2 0xFE9DC000 - 0xFE9DFFFF
Send data buffer
Send data dwordcount 1000
Send data...complete
Send data buffer
Send data dwordcount 18F
Send data...complete
N1 Checked into Pipe
Pipe Init completed! Reset Requested: 2
CPU Feature Early Config starting...
CpuInit Start
CpuUncoreInit()
: Get UncoreRatioLimit MaxClrRatio: 24, MinClrRatio: 8, UncoreRatioLimit.Uint32 = 0x818
: Get UncoreRatioLimit MaxClrRatio: 24, MinClrRatio: 8, UncoreRatioLimit.Uint32 = 0x818
:UFS: Update BIOS_SPARE2_PCU Bit[20] = 0 on S0
Write Socket 0 MSR_UNCORE_RATIO_LIMIT.MinClrRatio [14:8] = 8, MSR_UNCORE_RATIO_LIMIT.MaxClrRatio [6:0] = 24
:UFS: Update BIOS_SPARE2_PCU Bit[20] = 0 on S1
Write Socket 1 MSR_UNCORE_RATIO_LIMIT.MinClrRatio [14:8] = 8, MSR_UNCORE_RATIO_LIMIT.MaxClrRatio [6:0] = 24
Get socket PPIN
: PPIN = 22E546CB1AD8E915
Get socket PPIN
: PPIN = 22E548CB80015B4D
:: ProgramProcessorFlexRatio()
:: System Capable : AVX SST-CP SST-BF
1 1 0
:: SstPpCapableSystem : LevelEnableMask MaxLevel
0 00 00
S0_0 FusedCoresMask = 0x0DABBB6EAF4EE9DB FusedCoreCount = 40
GetAllConfigTdpLevels() Enter
S0_0 ConfigTdpLevel(0) IssCoreMask = 0x0DABBB6EAF4EE9DB IssCoreCount = 40
GetAllConfigTdpLevels() Exit
:: S0 MaxRatio : MinRatio : MinOpRatio : ConfigTdpMaxLevel
17 08 05 02
:: S0 Current SST-PP Level : Current SST-PP Lock
00 0
Level : PkgTDP : SSE P1 : AVX2 P1 : AVX3 P1 : Core Count
0 : 000350 : 000017 : 000014 : 000011 : 040, [0] 40
3 : 000000 : 000000 : 000000 : 000000 : 000, [0] 00
4 : 000000 : 000000 : 000000 : 000000 : 000, [0] 00
Level : Turbo Ratio Limit - SSE P1 : AVX2 P1 : AVX3 P1
0 : - : 181818191A1E2023 : 17171718191E2023 : 16161617171D1F22
3 : - : 0000000000000000 : 0000000000000000 : 0000000000000000
4 : - : 0000000000000000 : 0000000000000000 : 0000000000000000
Level : TJMax : CoreMask
0 : 100 : [0] 0DABBB6EAF4EE9DB
3 : 000 : [0] 0000000000000000
4 : 000 : [0] 0000000000000000
Level : SstBf - P1_Hi : P1_Lo : CoreMask
0 : 0000 : 0000 : [0] 0000000000000000
3 : 0000 : 0000 : [0] 0000000000000000
4 : 0000 : 0000 : [0] 0000000000000000
Core Ratio Info
Level : P0 : P1 : Pn : Pm
0 : 000035 : 000017 : 000008 : 000005
3 : 000000 : 000000 : 000000 : 000000
4 : 000000 : 000000 : 000000 : 000000
Uncore Ratio Info
Level : P0 : P1 : Pn : Pm
0 : 000024 : 000014 : 000008 : 000008
3 : 000000 : 000000 : 000000 : 000000
4 : 000000 : 000000 : 000000 : 000000
S1_0 FusedCoresMask = 0x0DB9772F6F4EE9DB FusedCoreCount = 40
GetAllConfigTdpLevels() Enter
S1_0 ConfigTdpLevel(0) IssCoreMask = 0x0DB9772F6F4EE9DB IssCoreCount = 40
GetAllConfigTdpLevels() Exit
:: S1 MaxRatio : MinRatio : MinOpRatio : ConfigTdpMaxLevel
17 08 05 02
:: S1 Current SST-PP Level : Current SST-PP Lock
00 0
Level : PkgTDP : SSE P1 : AVX2 P1 : AVX3 P1 : Core Count
0 : 000350 : 000017 : 000014 : 000011 : 040, [0] 40
3 : 000000 : 000000 : 000000 : 000000 : 000, [0] 00
4 : 000000 : 000000 : 000000 : 000000 : 000, [0] 00
Level : Turbo Ratio Limit - SSE P1 : AVX2 P1 : AVX3 P1
0 : - : 181818191A1E2023 : 17171718191E2023 : 16161617171D1F22
3 : - : 0000000000000000 : 0000000000000000 : 0000000000000000
4 : - : 0000000000000000 : 0000000000000000 : 0000000000000000
Level : TJMax : CoreMask
0 : 100 : [0] 0DB9772F6F4EE9DB
3 : 000 : [0] 0000000000000000
4 : 000 : [0] 0000000000000000
Level : SstBf - P1_Hi : P1_Lo : CoreMask
0 : 0000 : 0000 : [0] 0000000000000000
3 : 0000 : 0000 : [0] 0000000000000000
4 : 0000 : 0000 : [0] 0000000000000000
Core Ratio Info
Level : P0 : P1 : Pn : Pm
0 : 000035 : 000017 : 000008 : 000005
3 : 000000 : 000000 : 000000 : 000000
4 : 000000 : 000000 : 000000 : 000000
Uncore Ratio Info
Level : P0 : P1 : Pn : Pm
0 : 000024 : 000014 : 000008 : 000008
3 : 000000 : 000000 : 000000 : 000000
4 : 000000 : 000000 : 000000 : 000000
:: CommonMaxRatio : CommonMinRatio : Target Ratio
17 08 17
:: IssTdpLevel : AvxP1Level
00 00
:: TargetRatio: 17 is ready (RatioChangeFlag: 0), SstPpCurrentLevel: 0
:: SetActiveCoresAndLpEnableDisable()
:: S0_0 BIST_FAILURE_LOCAL_MASK = 0000000000000000
:: S0 setup input disable = 0000000000000000
:: S0_0 AvailCoresMask = 0DABBB6EAF4EE9DB
:: S0_0 ResolvedCoresMask = 0DABBB6EAF4EE9DB
:: S0_0 DesiredCoresCurrent = 0000000000000000
:: S0_0 BistResultMask = 0000000000000000
:: S0_0 CoreDisableReqMask = 0000000000000000
:: S0_0 NumberOfCoresDisabledMask = 0000000000000000
:: CheckCpuBist = 1
:: CoreFailover = 1
[s0_0] MaxLpEnable = 0, LpCapable = 1, MaxLpEnable knob = 0, Lock Status = 0
S0_0 MaxEnabledCores = 0
S0_0 FusedCoreCount = 40
S0_0 NonSparingCoresMask= FFFFFFFFFFFFFFFF
:: S0_0 DesiredCoresNew = 0000000000000000
:: S1_0 BIST_FAILURE_LOCAL_MASK = 0000000000000000
:: S1 setup input disable = 0000000000000000
:: S1_0 AvailCoresMask = 0DB9772F6F4EE9DB
:: S1_0 ResolvedCoresMask = 0DB9772F6F4EE9DB
:: S1_0 DesiredCoresCurrent = 0000000000000000
:: S1_0 BistResultMask = 0000000000000000
:: S1_0 CoreDisableReqMask = 0000000000000000
:: S1_0 NumberOfCoresDisabledMask = 0000000000000000
:: CheckCpuBist = 1
:: CoreFailover = 1
[s1_0] MaxLpEnable = 0, LpCapable = 1, MaxLpEnable knob = 0, Lock Status = 0
S1_0 MaxEnabledCores = 0
S1_0 FusedCoreCount = 40
S1_0 NonSparingCoresMask= FFFFFFFFFFFFFFFF
:: S1_0 DesiredCoresNew = 0000000000000000
CPUMISC Current S 0:
ITBM is not supported
CPUMISC Current S 1:
ITBM is not supported
CPU Feature Early Config completed! Reset Requested: 2
[CSR PCI BAR Access] Address:0xFFFFFFFF000000D4; PCI Cmd: 0xFFFF
START_MRC_RUN
Detect ColdBootSlowRequiredFlag and will force slow cold boot.
N0: Bus Instance = 0; I2C speed = 3; I3C speed = 2; Bus mode = 0
N0: Bus Instance = 1; I2C speed = 3; I3C speed = 2; Bus mode = 0
N0: Bus Instance = 0; I2C speed = 3; I3C speed = 2; Bus mode = 1
N0: Bus Instance = 0; I2C speed = 3; I3C speed = 2; Bus mode = 1
N0: Bus Instance = 0; I2C speed = 3; I3C speed = 2; Bus mode = 1
N0: Bus Instance = 0; I2C speed = 3; I3C speed = 2; Bus mode = 1
N0: Bus Instance = 0; I2C speed = 3; I3C speed = 2; Bus mode = 1
N0: Bus Instance = 0; I2C speed = 3; I3C speed = 2; Bus mode = 1
N0: Bus Instance = 1; I2C speed = 3; I3C speed = 2; Bus mode = 1
N0: Bus Instance = 1; I2C speed = 3; I3C speed = 2; Bus mode = 1
N0: Bus Instance = 1; I2C speed = 3; I3C speed = 2; Bus mode = 1
N0: Bus Instance = 1; I2C speed = 3; I3C speed = 2; Bus mode = 1
N0: Bus Instance = 1; I2C speed = 3; I3C speed = 2; Bus mode = 1
N0: Bus Instance = 1; I2C speed = 3; I3C speed = 2; Bus mode = 1
N0: Bus Instance = 0; I2C speed = 3; I3C speed = 2; Bus mode = 0
N0: Bus Instance = 0; I2C speed = 3; I3C speed = 2; Bus mode = 0
N0: Bus Instance = 0; I2C speed = 3; I3C speed = 2; Bus mode = 0
N0: Bus Instance = 0; I2C speed = 3; I3C speed = 2; Bus mode = 0
N0: Bus Instance = 0; I2C speed = 3; I3C speed = 2; Bus mode = 0
N0: Bus Instance = 0; I2C speed = 3; I3C speed = 2; Bus mode = 0
N0: Bus Instance = 1; I2C speed = 3; I3C speed = 2; Bus mode = 0
N0: Bus Instance = 1; I2C speed = 3; I3C speed = 2; Bus mode = 0
N0: Bus Instance = 1; I2C speed = 3; I3C speed = 2; Bus mode = 0
N0: Bus Instance = 1; I2C speed = 3; I3C speed = 2; Bus mode = 0
N0: Bus Instance = 1; I2C speed = 3; I3C speed = 2; Bus mode = 0
N0: Bus Instance = 1; I2C speed = 3; I3C speed = 2; Bus mode = 0
N0: Dimm changed.
Processors changed.
Get socket PPIN
: PPIN = 22E546CB1AD8E915
setupChanged: 1
Clearing the MRC NVRAM structure.
bootMode = NormalBoot
subBootMode = ColdBoot
[ScktId: 0] Parallel Mode Dispatch -- Started
Dispatch N1 for MemInit
N1 Entering MRC
Detect ColdBootSlowRequiredFlag and will force slow cold boot.
N1: Bus Instance = 0; I2C speed = 3; I3C speed = 2; Bus mode = 0
N1: Bus Instance = 1; I2C speed = 3; I3C speed = 2; Bus mode = 0
N1: Bus Instance = 0; I2C speed = 3; I3C speed = 2; Bus mode = 1
N1: Bus Instance = 0; I2C speed = 3; I3C speed = 2; Bus mode = 1
N1: Bus Instance = 0; I2C speed = 3; I3C speed = 2; Bus mode = 1
N1: Bus Instance = 0; I2C speed = 3; I3C speed = 2; Bus mode = 1
N1: Bus Instance = 0; I2C speed = 3; I3C speed = 2; Bus mode = 1
N1: Bus Instance = 0; I2C speed = 3; I3C speed = 2; Bus mode = 1
N1: Bus Instance = 1; I2C speed = 3; I3C speed = 2; Bus mode = 1
N1: Bus Instance = 1; I2C speed = 3; I3C speed = 2; Bus mode = 1
N1: Bus Instance = 1; I2C speed = 3; I3C speed = 2; Bus mode = 1
N1: Bus Instance = 1; I2C speed = 3; I3C speed = 2; Bus mode = 1
N1: Bus Instance = 1; I2C speed = 3; I3C speed = 2; Bus mode = 1
N1: Bus Instance = 1; I2C speed = 3; I3C speed = 2; Bus mode = 1
N1: Bus Instance = 0; I2C speed = 3; I3C speed = 2; Bus mode = 0
N1: Bus Instance = 0; I2C speed = 3; I3C speed = 2; Bus mode = 0
N1: Bus Instance = 0; I2C speed = 3; I3C speed = 2; Bus mode = 0
N1: Bus Instance = 0; I2C speed = 3; I3C speed = 2; Bus mode = 0
N1: Bus Instance = 0; I2C speed = 3; I3C speed = 2; Bus mode = 0
N1: Bus Instance = 0; I2C speed = 3; I3C speed = 2; Bus mode = 0
N1: Bus Instance = 1; I2C speed = 3; I3C speed = 2; Bus mode = 0
N1: Bus Instance = 1; I2C speed = 3; I3C speed = 2; Bus mode = 0
N1: Bus Instance = 1; I2C speed = 3; I3C speed = 2; Bus mode = 0
N1: Bus Instance = 1; I2C speed = 3; I3C speed = 2; Bus mode = 0
N1: Bus Instance = 1; I2C speed = 3; I3C speed = 2; Bus mode = 0
N1: Bus Instance = 1; I2C speed = 3; I3C speed = 2; Bus mode = 0
N1: Dimm changed.
Get socket PPIN
: PPIN = 22E548CB80015B4D
setupChanged: 1
Clearing the MRC NVRAM structure.
bootMode = NormalBoot
subBootMode = ColdBoot
[ScktId: 1] Parallel Mode Dispatch -- Started
[ScktId: 1] Parallel Mode Dispatch - 4ms
[ScktId: 0] Parallel Mode Dispatch - 203ms
[ScktId: 1] Pipe Sync AP Boot Mode -- Started
[ScktId: 0] Pipe Sync AP Boot Mode -- Started
[ScktId: 0] Pipe Sync AP Boot Mode - 9ms
[ScktId: 1] Pipe Sync AP Boot Mode - 13ms
N1 Checked into Pipe
[ScktId: 0] Select Boot Mode -- Started
DetermineBootMode: ColdBoot
[ScktId: 0] Select Boot Mode - 8ms
[ScktId: 1] Pipe Sync SBSP Boot Mode -- Started
[ScktId: 0] Pipe Sync SBSP Boot Mode -- Started
[ScktId: 1] Pipe Sync SBSP Boot Mode - 9ms
[ScktId: 0] Pipe Sync SBSP Boot Mode - 9ms
[ScktId: 1] Init Structures Late -- Started
[ScktId: 0] Init Structures Late -- Started
[ScktId: 1] Init Structures Late - 8ms
[ScktId: 0] Init Structures Late - 8ms
[ScktId: 1] Detect DIMM Configuration -- Started
[ScktId: 0] Detect DIMM Configuration -- Started
N1: Bus Instance = 0; I2C speed = 3; I3C speed = 2; Bus mode = 0
N0: Bus Instance = 0; I2C speed = 3; I3C speed = 2; Bus mode = 0
N1: Bus Instance = 0; I2C speed = 3; I3C speed = 2; Bus mode = 0
N0: Bus Instance = 0; I2C speed = 3; I3C speed = 2; Bus mode = 0
N1: Bus Instance = 0; I2C speed = 3; I3C speed = 2; Bus mode = 0
N0: Bus Instance = 0; I2C speed = 3; I3C speed = 2; Bus mode = 0
N1: Bus Instance = 0; I2C speed = 3; I3C speed = 2; Bus mode = 0
N0: Bus Instance = 0; I2C speed = 3; I3C speed = 2; Bus mode = 0
N1: Bus Instance = 0; I2C speed = 3; I3C speed = 2; Bus mode = 0
N0: Bus Instance = 0; I2C speed = 3; I3C speed = 2; Bus mode = 0
N1: Bus Instance = 0; I2C speed = 3; I3C speed = 2; Bus mode = 0
N0: Bus Instance = 0; I2C speed = 3; I3C speed = 2; Bus mode = 0
N1: Bus Instance = 1; I2C speed = 3; I3C speed = 2; Bus mode = 0
N0: Bus Instance = 1; I2C speed = 3; I3C speed = 2; Bus mode = 0
N1: Bus Instance = 1; I2C speed = 3; I3C speed = 2; Bus mode = 0
N0: Bus Instance = 1; I2C speed = 3; I3C speed = 2; Bus mode = 0
N1: Bus Instance = 1; I2C speed = 3; I3C speed = 2; Bus mode = 0
N0: Bus Instance = 1; I2C speed = 3; I3C speed = 2; Bus mode = 0
N1: Bus Instance = 1; I2C speed = 3; I3C speed = 2; Bus mode = 0
N0: Bus Instance = 1; I2C speed = 3; I3C speed = 2; Bus mode = 0
N1: Bus Instance = 1; I2C speed = 3; I3C speed = 2; Bus mode = 0
N0: Bus Instance = 1; I2C speed = 3; I3C speed = 2; Bus mode = 0
N1: Bus Instance = 1; I2C speed = 3; I3C speed = 2; Bus mode = 0
N0: Bus Instance = 1; I2C speed = 3; I3C speed = 2; Bus mode = 0
[ScktId: 1] Detect DIMM Configuration - 318ms
[ScktId: 0] Detect DIMM Configuration - 320ms
[ScktId: 1] Pipe Sync AP Data -- Started
[ScktId: 0] Pipe Sync AP Data -- Started
[ScktId: 0] Pipe Sync AP Data - 23ms
[ScktId: 1] Pipe Sync AP Data - 27ms
N1 Checked into Pipe
[ScktId: 0] Check POR Compatibility -- Started
[ScktId: 0] Check POR Compatibility - 6ms
N1 Checked into Pipe
[ScktId: 0] HBM Init Clock -- Started
PCU: API - Command->0xA6, sending data -> 0x0000F260
PCU: API - Command->0xA6, sending data -> 0x0000F260
[ScktId: 0] HBM Init Clock - 16ms
N1 Checked into Pipe
[ScktId: 0] Initialize clocks for all MemSs -- Started
N0: Platform segment mapping found. UseServerPor: 1; SegmentType: 7; ChopType: 3; PlatformSegment: 0
N0: Platform segment mapping found. UseServerPor: 1; SegmentType: 7; ChopType: 3; PlatformSegment: 0
N0: Platform segment mapping found. UseServerPor: 1; SegmentType: 7; ChopType: 3; PlatformSegment: 0
N0: Platform segment mapping found. UseServerPor: 1; SegmentType: 7; ChopType: 3; PlatformSegment: 0
N0: Platform segment mapping found. UseServerPor: 1; SegmentType: 7; ChopType: 3; PlatformSegment: 0
N0: Platform segment mapping found. UseServerPor: 1; SegmentType: 7; ChopType: 3; PlatformSegment: 0
N0: Platform segment mapping found. UseServerPor: 1; SegmentType: 7; ChopType: 3; PlatformSegment: 0
N0: Platform segment mapping found. UseServerPor: 1; SegmentType: 7; ChopType: 3; PlatformSegment: 0
Reset requested: non-MRC
PCU: API - Command->0xA6, sending data -> 0x8000F170
Reset requested: non-MRC
PCU: API - Command->0xA6, sending data -> 0x8000F170
[ScktId: 0] Initialize clocks for all MemSs - 103ms
[ScktId: 1] Pipe Sync SBSP Data -- Started
[ScktId: 0] Pipe Sync SBSP Data -- Started
[ScktId: 1] Pipe Sync SBSP Data - 22ms
[ScktId: 0] Pipe Sync SBSP Data - 22ms
[ScktId: 1] Unlock Memory -- Started
[ScktId: 0] Unlock Memory -- Started
[ScktId: 1] Unlock Memory - 7ms
[ScktId: 0] Unlock Memory - 7ms
[ScktId: 1] Pipe Sync AP Data -- Started
[ScktId: 0] Pipe Sync AP Data -- Started
[ScktId: 0] Pipe Sync AP Data - 23ms
[ScktId: 1] Pipe Sync AP Data - 26ms
[ScktId: 0] HBM Pre-Training -- Started
[ScktId: 1] HBM Pre-Training -- Started
HBMIO flows: set to 0xFFFFFF7F!
HBMIO flows: set to 0xFFFFFF7F!
Get socket PPIN
Get socket PPIN
: PPIN = 22E546CB1AD8E915
: PPIN = 22E548CB80015B4D
HBM frequency = 3200MHz
HBM frequency = 3200MHz
Socket0 HbmIo0, HW Rev: 0x110, FW Rev: 0x2180, Patch ID: 0x0, Unique ID: 0x18, Product ID: 0x2
Socket1 HbmIo0, HW Rev: 0x110, FW Rev: 0x2180, Patch ID: 0x0, Unique ID: 0x18, Product ID: 0x2
Socket0 HbmIo1, HW Rev: 0x110, FW Rev: 0x2180, Patch ID: 0x0, Unique ID: 0x18, Product ID: 0x2
Socket1 HbmIo1, HW Rev: 0x110, FW Rev: 0x2180, Patch ID: 0x0, Unique ID: 0x18, Product ID: 0x2
Socket0 HbmIo2, HW Rev: 0x110, FW Rev: 0x2180, Patch ID: 0x0, Unique ID: 0x18, Product ID: 0x2
Socket1 HbmIo2, HW Rev: 0x110, FW Rev: 0x2180, Patch ID: 0x0, Unique ID: 0x18, Product ID: 0x2
Socket0 HbmIo3, HW Rev: 0x110, FW Rev: 0x2180, Patch ID: 0x0, Unique ID: 0x18, Product ID: 0x2
Socket1 HbmIo3, HW Rev: 0x110, FW Rev: 0x2180, Patch ID: 0x0, Unique ID: 0x18, Product ID: 0x2
[ScktId: 0] HBM Pre-Training - 117ms
[ScktId: 1] HBM Pre-Training - 125ms
[ScktId: 0] AP HBM Information -- Started
[ScktId: 1] AP HBM Information -- Started
[ScktId: 0] AP HBM Information - 13ms
[ScktId: 1] AP HBM Information - 9ms
[ScktId: 0] Pipe Sync SBSP Status -- Started
[ScktId: 1] Pipe Sync SBSP Status -- Started
[ScktId: 1] Pipe Sync SBSP Status - 8ms
[ScktId: 0] Pipe Sync SBSP Status - 12ms
-- EXIT, status = MRC_STATUS_RESET_REQUIRED
-- EXIT, status = MRC_STATUS_RESET_REQUIRED
Total MRC time = 822ms
Total MRC time = 1026ms
STOP_MRC_RUN
Final Rc Heap usage:
******* Configure Mesh Mode - START *******
Configure Socket 0 2LM Hash -Enabled
Configure Socket 0 2LM Hash on KTI and IIO-Enabled
Configure Socket 1 2LM Hash -Enabled
Configure Socket 1 2LM Hash on KTI and IIO-Enabled
Socket 0 Mc 0 channel 0 enabled 1
Socket 0 Mc 0 Ch 0 maxDimm 1 Dimm = 0 numRanks= 1 TechIndex = 3 DimmSize 0x80
Memory Size = 0x80
Socket 0 has 1st 4G memory on Channel 0
Socket 0 Mc 0 channel 1 enabled 0
Socket 0 Mc 1 channel 2 enabled 1
Socket 0 Mc 1 Ch 0 maxDimm 1 Dimm = 0 numRanks= 1 TechIndex = 3 DimmSize 0x80
Memory Size = 0x80
Socket 0 Mc 1 channel 3 enabled 0
Socket 0 Mc 2 channel 4 enabled 1
Socket 0 Mc 2 Ch 0 maxDimm 1 Dimm = 0 numRanks= 1 TechIndex = 3 DimmSize 0x80
Memory Size = 0x80
Socket 0 Mc 2 channel 5 enabled 0
Socket 0 Mc 3 channel 6 enabled 1
Socket 0 Mc 3 Ch 0 maxDimm 1 Dimm = 0 numRanks= 1 TechIndex = 3 DimmSize 0x80
Memory Size = 0x80
Socket 0 Mc 3 channel 7 enabled 0
MaxHbmIo: 4 MemInfo->SncInfo[0].NumOfHbmioEnabled: 4
Socket 1 Mc 0 channel 0 enabled 1
Socket 1 Mc 0 Ch 0 maxDimm 1 Dimm = 0 numRanks= 1 TechIndex = 3 DimmSize 0x80
Memory Size = 0x80
Socket 1 Mc 0 channel 1 enabled 0
Socket 1 Mc 1 channel 2 enabled 1
Socket 1 Mc 1 Ch 0 maxDimm 1 Dimm = 0 numRanks= 1 TechIndex = 3 DimmSize 0x80
Memory Size = 0x80
Socket 1 Mc 1 channel 3 enabled 0
Socket 1 Mc 2 channel 4 enabled 1
Socket 1 Mc 2 Ch 0 maxDimm 1 Dimm = 0 numRanks= 1 TechIndex = 3 DimmSize 0x80
Memory Size = 0x80
Socket 1 Mc 2 channel 5 enabled 0
Socket 1 Mc 3 channel 6 enabled 1
Socket 1 Mc 3 Ch 0 maxDimm 1 Dimm = 0 numRanks= 1 TechIndex = 3 DimmSize 0x80
Memory Size = 0x80
Socket 1 Mc 3 channel 7 enabled 0
MaxHbmIo: 4 MemInfo->SncInfo[1].NumOfHbmioEnabled: 4
Socket 0
S0: SNC_Base_1 = 0000 GB
S0: SNC_Base_2 = 0004 GB
S0: SNC_Base_3 = 0004 GB
S0: SNC_Base_4 = 0004 GB
S0: SNC_Base_5 = 0004 GB
Socket 1
S1: SNC_Base_1 = 0004 GB
S1: SNC_Base_2 = 0004 GB
S1: SNC_Base_3 = 0004 GB
S1: SNC_Base_4 = 0004 GB
S1: SNC_Base_5 = 0004 GB
ProgramSncShadowReg
Socket:0 Base1 0x0FFF0000
Socket:0 Base2 0x1FE00004
Socket:0 Base3 0x00000004
Socket:0 Base4 0x00000004
Socket:0 Base5 0x00000004
Socket:0 UpperBase1 0x00000000
Socket:0 SncConfig 0x0000000A
Socket:1 Base1 0x0FFF0004
Socket:1 Base2 0x1FE00004
Socket:1 Base3 0x00000004
Socket:1 Base4 0x00000004
Socket:1 Base5 0x00000004
Socket:1 UpperBase1 0x00000000
Socket:1 SncConfig 0x0000000A
******* Configure Mesh Mode - END *******
S3M Provisioning SoftStrap Disabled, Exit.
PUcode Patch provisioning/commit flow
S3mPucodeCfrPatchProvisionCommit didn't find suitable CFR image, Exit.
S3M Patch provisioning/commit flow
Get Image :FF800090 11FF4
CFR Patch Provision start...
IFWI integrated S3M CFR patch revision SVN: 00000001, RevID: 0000001E.
S0 S3M_S3MFW_CFR_SVN_N0_S3M_TREG_REG : 00000000
S0 S3M_S3MFW_REVID_N0_S3M_TREG_REG : 00000000
S0 S3M_S3MFW_CFR_SVN_N1_S3M_TREG_REG : 00010001
S0 S3M_S3MFW_REVID_N1_S3M_TREG_REG : 0000001E
Committed region with the latest patch, skip provision.
Socket 0 Can't Provision, Skip.
IFWI integrated S3M CFR patch revision SVN: 00000001, RevID: 0000001E.
S1 S3M_S3MFW_CFR_SVN_N0_S3M_TREG_REG : 00000000
S1 S3M_S3MFW_REVID_N0_S3M_TREG_REG : 00000000
S1 S3M_S3MFW_CFR_SVN_N1_S3M_TREG_REG : 00010001
S1 S3M_S3MFW_REVID_N1_S3M_TREG_REG : 0000001E
Committed region with the latest patch, skip provision.
Socket 1 Can't Provision, Skip.
CFR Patch Commit start...
S0 S3M_S3MFW_CFR_SVN_N0_S3M_TREG_REG : 00000000
S0 S3M_S3MFW_REVID_N0_S3M_TREG_REG : 00000000
Socket 0 can't commit, skip
S1 S3M_S3MFW_CFR_SVN_N0_S3M_TREG_REG : 00000000
S1 S3M_S3MFW_REVID_N0_S3M_TREG_REG : 00000000
Socket 1 can't commit, skip
CFR Patch Provision/Commit Completed.
Reset Requested: 2
Pipe Exit starting...
Pipe Exit completed! Reset Requested: 2
Enhanced Warning Log:
Checking for Reset Requests...
ResetRequired: 02
[HECI Transport-1 PEI] Send pkt: 80040007
00: F3 01 00 00
[HECI Transport-1 PEI] Got pkt: 80050007
00: F3 81 00 00 00
Issue WARM RESET!
PROGRESS CODE: V03020003 I0
PROGRESS CODE: V03020002 I0
PROGRESS CODE: V03020003 I0
PROGRESS CODE: V03020002 I0
PROGRESS CODE: V03020003 I0
PROGRESS CODE: V03020002 I0
PROGRESS CODE: V03020003 I0
PROGRESS CODE: V03020002 I0
[IPMI PEI] BMC Device ID: 0x23, firmware version: 2.03 UpdateMode:1
[IPMI] BMC in Forced Update mode, skip waiting for BMC_READY.
PROGRESS CODE: V03020003 I0
PROGRESS CODE: V03020002 I0
PROGRESS CODE: V03020003 I0
PROGRESS CODE: V03020002 I0
InstallHeciTransportPpis, start
InstallHeciTransportPpis, end
[HECI CONTROL PEI] HECI Transport found: 2
[HECI Control-1 PEI]: ERROR: HeciControlSendAndReceiveSinglePch() : Heci 1 is not initialized
HECI: ME type not recognized (MEFS1: 0x00000355, MEFS2: 0x80508006)
Initialization is allowed
[HECI Transport-1 PEI] Send pkt: 80040007
00: F0 11 00 00
[HECI Transport-1 PEI] Got pkt: 80080007
00: F0 91 00 00 09 00 00 00
HECI: Create MeType HOB for ME: 1
HECI: Set MeType HOB info to: 1
[HECI] [ME] (MeType is ME_TYPE_SPS)
Initialization is allowed
PROGRESS CODE: V03020003 I0
PROGRESS CODE: V03020002 I0
PROGRESS CODE: V03020003 I0
PROGRESS CODE: V03020002 I0
IioVmdDisableForPchRpInit: DonePCH Series : EBG PCH
PCH Stepping : B0
PROGRESS CODE: V03020003 I0
PROGRESS CODE: V03020002 I0
PROGRESS CODE: V03020003 I0
PROGRESS CODE: V03020002 I0
PROGRESS CODE: V03020003 I0
PROGRESS CODE: V03020002 I0
UbaInitPeim: PlatformType=0x16
UbaInitPeim: PlatformType=0x16
UbaInitPeim: PlatformType=0x16
UbaInitPeim: PlatformType=0x16
PROGRESS CODE: V03020003 I0
PROGRESS CODE: V03020002 I0
PROGRESS CODE: V03020003 I0
PROGRESS CODE: V03020002 I0
UBA:GpioTable size 0x9CC, blocks: 0xD1.
UBA: Start ConfigureGpio().
UBA: ConfigureGpio() end.
Unable to read FlashSecOvrdVal
FiaMuxRecordsCount = 0
[HECI] PeiMeServerPolicy (MeType is ME_TYPE_SPS)
Can't finde more CFR image in CFR FV - Not Found!
PPR Variable not found or CRC mismatch - Status: 0x8000000E, Crc: 0x0, calc. Crc: 0x0!
UpdatePeiSecurityPolicy: Create Status=Success
FIT not found, skip LT-SX
Platform Type = 22
Bios ID: EGSDCRB1.ZHI.0091.D15.2211010801
PROGRESS CODE: V03020003 I0
[HECI Transport-1 PEI] Send pkt: 80010020
00: 01
[HECI Transport-1 PEI] Got pkt: 800B0020
00: 81 01 01 14 00 88 00 01 - 00 00 00
[HECI Transport-1 PEI] Send pkt: 80300008
00: 00 00 05 00 1A 00 00 00 - 00 00 00 00 1C 00 00 00
10: 00 00 00 00 00 00 00 00 - 00 00 00 00 00 00 00 00
20: 00 00 00 00 00 00 00 00 - 00 00 00 00 00 00 00 00
[HECI Transport-1 PEI] Got pkt: 80300008
00: 00 00 05 00 1A 00 00 00 - 00 00 00 00 1C 00 00 00
10: 00 00 00 00 00 00 00 02 - 00 00 00 00 00 00 00 00
20: 00 00 00 00 00 00 00 00 - 00 00 00 00 00 00 00 00
Fail to Configure PSYS_CRIT
PROGRESS CODE: V03020002 I0
PROGRESS CODE: V03020003 I0
PROGRESS CODE: V03020002 I0
PROGRESS CODE: V03020003 I0
PROGRESS CODE: V03020002 I0
PROGRESS CODE: V03020003 I0
PROGRESS CODE: V03020002 I0
PROGRESS CODE: V03020003 I0
PROGRESS CODE: V03020002 I0
LtStatusRegister[0xFED30000] = 0x0000000000000003
LtExtendedStatusError[0xFED30008] = 0x0000000000000000
BootGuardBootStatus[0xFED300A0] = 0x0000000000000000
BootGuardAcmError[0xFED30328] = 0x0000000000000000
BootGuardLtExists[0xFED30010] = 0x0000000000000000
BootGuardLtCrash[0xFED30030] = 0x0000000000000000
MSR_DEBUG_INTERFACE[0x00000C80] = 0x0000000080000001
MSR_BOOT_GUARD_SACM_INFO[0x0000013A] = 0x0000000C00000000
AcmPolicyStatus = 0x0, IsTxtFailedWithScrtm 0
None of BtG/TXT is enabled or TXT failed with scrtm.
PROGRESS CODE: V03020003 I0
PROGRESS CODE: V03020002 I0
PROGRESS CODE: V03020003 I0
PROGRESS CODE: V03020002 I0
InitializeDefaultData()
[Enter] Initialize Reference Code Policy!
>>> Print the default settings of Reference Code Policy! Begin >>>
ReferenceCodePolicyPtr->NumaEn = 1
ReferenceCodePolicyPtr->UmaBasedClustering = 0
<<< Print the default settings of Reference Code Policy! End <<<
[Exit] Initialize Reference Code Policy!
SBSP socket = 0
InitializePlatformData()
InstallPpi MrcHooksServicesPpiDesc Status = 00000000
CacheMrcHooksServicesPpi in HOST: Host->MrcHooksServicesPpi = FFEA57C0
InstallPpi MrcHooksChipServicesPpiDesc Status = 00000000
CacheMrcChipHooksServicesPpi in HOST: Host->MrcHooksChipServicesPpi = FFEA5820
PROGRESS CODE: V030F100B I0
LoadNvramData: LoadSysInfoNvram failed, Status = Not Found
[HECI Transport-1 PEI] Send pkt: 80100007
00: F0 0C 00 00 DF FF FF FF - FF FF FF FF 00 00 00 00
[HECI Transport-1 PEI] Got pkt: 80100007
00: F0 8C 00 00 00 00 00 00 - 00 00 00 00 00 00 00 00
MeUmaConfigureRequestedSegmentSize: Exiting (Status = Success)
GetEmulationMemFlows: Simics $mrc value = 0
memFlows = 0xFFFFFFFF, memFlowsExt = 0xFFBF7FFF, memFlowsExt2 = 0xBF9E1F7F, memFlowsExt3 = 0xFFFFFFFF
Emulation Value is: 0!
Running on hardware
SPR processor detected
Warning: Newer CPU Stepping 4 detected
RC Version: 1.1.1.01BC
sizeof sysHost = 363776
SsaLoader - Entry
SsaLoader - Exit
KTI Init starting...
******* KTI Setup Structure *******
Bus Ratio (per socket): S0: 1 S1: 1 S2: 1 S3: 1
D2KCreditConfig: 0 [1:Low,2:Med,3:High]
SnoopThrottleConfig: 0 [0:Dis,1:Low,2:Med,3:High,4:Auto]
LegacyVgaSoc: 0
LegacyVgaStack: 0
P2pRelaxedOrdering: 0
DebugPrintLevel: 15
DegradePrecedence: 0
Degrade4SPreference: 0 (4SFullyConnect)
KtiLinkSpeedMode: 1 (FAST)
DfxWarmResetEliminationEn: 0
KtiLinkSpeed: 127 (MAX_SUPPORTED)
KtiAdaptationEn: 2 (UNKNOWN)
KtiAdaptationSpeed: 127 (MAX_SUPPORTED)
KtiLinkL0pEn: 2 (AUTO)
KtiLinkL1En: 2 (AUTO)
KtiFailoverEn: 2 (AUTO)
KtiLbEn: 0
SncEn: 15 (AUTO)
IoDcMode: 1 (AUTO)
DirectoryModeEn: 2
XptPrefetchEn: 2
KtiPrefetchEn: 2
XptRemotePrefetchEn: 2
RdCurForXptPrefetchEn: 2
StaleAtoSOptEn: 2
LLCDeadLineAlloc: 1
OppoLLC2SfMigrationEn: 0 (MANUAL)
MbeBWCalChoice: 3 [0:Linear,1:Biased,2:Legacy,3:Auto]
PmmMbaBWDownscale: 0 [0:1x,1:1/2x,2:1/4x,3:1/8x]
CxlMbaBWDownscale: 0 [0:1x,1:1/2x,2:1/4x,3:1/8x]
RemoteTargetMbaBWDownscale 0 [0:1x,1:1/2x,2:1/4x,3:1/8x]
SplitLock: 0
DdrtQosMode: 0
ClockModulationEn: 2 (AUTO)
KtiFpgaEnable (per socket): S0: 2 S1: 2 S2: 2 S3: 2
StackDisableBitMap (per socket): S0: 0x0 S1: 0x0 S2: 0x0 S3: 0x0
KtiCrcMode: 0 (16BIT)
KtiCpuSktHotPlugEn: 0
KtiCpuSktHotPlugTopology: 0 (4S)
KtiSkuMismatchCheck: 1
MctpBusOwner: 0 (PCH SPS as Bus Owner (Proxy))
KtiPortDisable (per port):
S0:0 0 0 0
S1:0 0 0 0
S2:0 0 0 0
S3:0 0 0 0
KtiLinkVnaOverride (per port):
S0:254 254 254 254
S1:254 254 254 254
S2:254 254 254 254
S3:254 254 254 254
KtiLinkSpeed (per port):
S0:7 7 7 7
S1:7 7 7 7
S2:7 7 7 7
S3:7 7 7 7
Rsvd (per port):
S0:0 0 0 0
S1:0 0 0 0
S2:0 0 0 0
S3:0 0 0 0
**KTI Setup Structure DfxParms **
DfxHaltLinkFailReset: 2 (AUTO)
DfxKtiMaxInitAbort: 2 (AUTO)
DfxLlcShareDrdCrd 2 (AUTO)
DfxBiasFwdMode: 5 (AUTO)
DfxSnoopFanoutEn: 2 (AUTO)
DfxHitMeEn: 2 (AUTO)
DfxFrcfwdinv 2 (AUTO)
DfxDbpEnable 2 (AUTO)
DfxCleanEvictAlwaysLive: 2 (AUTO)
DfxModifiedEvictAlwaysLive: 2 (AUTO)
DfxOsbEn 2 (AUTO)
DfxHitMeRfoDirsEn 2 (AUTO)
DfxGateOsbIodcAllocEn 2 (AUTO)
DfxDualLinksInterleavingMode 2 (AUTO)
DfxSystemDegradeMode: 1
DfxVn1En: 2 (AUTO)
DfxD2cEn: 2 (AUTO)
DfxD2kEn: 2 (AUTO)
DfxLockPrimary: 4 (AUTO)
DfxOsbLocRd: 2 (AUTO)
DfxOsbLocRdCur: 2 (AUTO)
DfxOsbRmtRd: 2 (AUTO)
DfxM3KtiCountMismatchEn: 2 (AUTO)
DfxSnoopFanoutChaInterleaveEn: 2 (AUTO)
DfxXptFifoEnabledCredit: 0x5
DfxMdfisTrainingEn: 2 (AUTO)
DfxClippedFreq: 23
DfxLlpEndcntClipped: 650
DfxLlpEndcntNonClipped: 576
DfxCxlSecLvl: 3 (AUTO)
DfxCxlStcge: 2 (AUTO)
DfxCxlSdcge: 2 (AUTO)
DfxCxlDlcge: 2 (AUTO)
DfxCxlLtcge: 2 (AUTO)
DfxCxlVid: 2 (AUTO)
DfxIioDfxEnabled: 0 (MANUAL)
DfxHqmEn: 2 (AUTO)
DfxRsfEnabledForDram: 2 (AUTO)
DfxS3mSoftStrap: 2 (AUTO)
DfxPmonConfig: 3 (AUTO)
DfxM2IosfPmonAccessControl: 2 (AUTO)
DfxMaxCache: 256 (AUTO)
DfxMaxCacheAtomic: 256 (AUTO)
DfxCtagEntryAvailMask: 256 (AUTO)
DfxXptPrefetchEn: 2 (AUTO)
DfxPrqBlockEn: 2 (AUTO)
DfxAeg0CounterLowVal: 65535 (AUTO)
DfxAeg0CounterHighVal: 65535 (AUTO)
DfxCrcMode (per port):
S0:2 (AUTO) 2 (AUTO) 2 (AUTO) 2 (AUTO)
S1:2 (AUTO) 2 (AUTO) 2 (AUTO) 2 (AUTO)
S2:2 (AUTO) 2 (AUTO) 2 (AUTO) 2 (AUTO)
S3:2 (AUTO) 2 (AUTO) 2 (AUTO) 2 (AUTO)
DfxL0pEnable (per port):
S0:2 (AUTO) 2 (AUTO) 2 (AUTO) 2 (AUTO)
S1:2 (AUTO) 2 (AUTO) 2 (AUTO) 2 (AUTO)
S2:2 (AUTO) 2 (AUTO) 2 (AUTO) 2 (AUTO)
S3:2 (AUTO) 2 (AUTO) 2 (AUTO) 2 (AUTO)
DfxL1Enable (per port):
S0:2 (AUTO) 2 (AUTO) 2 (AUTO) 2 (AUTO)
S1:2 (AUTO) 2 (AUTO) 2 (AUTO) 2 (AUTO)
S2:2 (AUTO) 2 (AUTO) 2 (AUTO) 2 (AUTO)
S3:2 (AUTO) 2 (AUTO) 2 (AUTO) 2 (AUTO)
DfxKtiFailoverEn (per port):
S0:2 (AUTO) 2 (AUTO) 2 (AUTO) 2 (AUTO)
S1:2 (AUTO) 2 (AUTO) 2 (AUTO) 2 (AUTO)
S2:2 (AUTO) 2 (AUTO) 2 (AUTO) 2 (AUTO)
S3:2 (AUTO) 2 (AUTO) 2 (AUTO) 2 (AUTO)
**Common Setup Structure**
mmCfgBase: 6 (AUTO)
mmCfgSize: 6 (AUTO)
mmiohBase: 0x00002000
CpuPaLimit: 0
mmiohSize: 3 (64GB per stack)
numaEn: 1
UmaClustering: 4
isocEn: 0
dcaEn: 0
**Common Var Structure **
resetRequired: 0
state: 0
numCpus: 0
socketPresentBitMap: 0x01
mmCfgBase: 0x80000000
meRequestedSize: 0
******* Collecting Early System Information - START *******
SBSP Socket: 0 Ways: 0x01 Ras: 0x06 Stepping: 0x04 DieCount: 4 Chop: XCC
Total Chas: 52 Cha List Map:
Cha List[0]: 0xBFCFF9FF
Cha List[1]: 0x0FEBFBFF
Total M3Kti: 04 Total KtiAgent: 04 Total M2M: 20 M2M list map: 0x000FFFFF
Current bus numbers:
Socket | Ins00 | Ins01 | Ins02 | Ins03 | Ins04 | Ins05 | Ins06 | Ins07 | Ins08 | Ins09 | Ins0A | Ins0B | Rsvd | Ubox0 | Ubox1 | LastBus | Seg
-----------------------------------------------------------------------------------------------------------------------------------------------
0 | 0x00 | 0x11 | 0x12 | 0x13 | 0x14 | 0x15 | 0x16 | 0x17 | 0x18 | 0x19 | 0x1A | 0x1B | --- | 0x1E | 0x1F | 0x1F | 0
1 | 0x20 | 0x21 | 0x22 | 0x23 | 0x24 | 0x25 | 0x26 | 0x27 | 0x28 | 0x29 | 0x2A | 0x2B | --- | 0x3E | 0x3F | 0x3F | 0
2 | 0x40 | 0x41 | 0x42 | 0x43 | 0x44 | 0x45 | 0x46 | 0x47 | 0x48 | 0x49 | 0x4A | 0x4B | --- | 0x5E | 0x5F | 0x5F | 0
3 | 0x60 | 0x61 | 0x62 | 0x63 | 0x64 | 0x65 | 0x66 | 0x67 | 0x68 | 0x69 | 0x6A | 0x6B | --- | 0x7E | 0x7F | 0x7F | 0
-----------------------------------------------------------------------------------------------------------------------------------------------
Assuming maximal config: TotCpus: 4 CpuList: 0x0F
Default UpiInterleaveMode: 0
Reset Type: Warm Reset
******* Collecting Early System Information - END *******
(Spr) UpiIpWrInit
MaxSocket 4, MaxKtiPort 4
UpiIpWrSingleInit
IpUpiIpInit(UpiAgent[0][0]):
UpiIpWrSingleInit
IpUpiIpInit(UpiAgent[0][1]):
UpiIpWrSingleInit
IpUpiIpInit(UpiAgent[0][2]):
UpiIpWrSingleInit
IpUpiIpInit(UpiAgent[0][3]):
UpiIpWrSingleInit
IpUpiIpInit(UpiAgent[1][0]):
UpiIpWrSingleInit
IpUpiIpInit(UpiAgent[1][1]):
UpiIpWrSingleInit
IpUpiIpInit(UpiAgent[1][2]):
UpiIpWrSingleInit
IpUpiIpInit(UpiAgent[1][3]):
UpiIpWrSingleInit
IpUpiIpInit(UpiAgent[2][0]):
UpiIpWrSingleInit
IpUpiIpInit(UpiAgent[2][1]):
UpiIpWrSingleInit
IpUpiIpInit(UpiAgent[2][2]):
UpiIpWrSingleInit
IpUpiIpInit(UpiAgent[2][3]):
UpiIpWrSingleInit
IpUpiIpInit(UpiAgent[3][0]):
UpiIpWrSingleInit
IpUpiIpInit(UpiAgent[3][1]):
UpiIpWrSingleInit
IpUpiIpInit(UpiAgent[3][2]):
UpiIpWrSingleInit
IpUpiIpInit(UpiAgent[3][3]):
******* Setting up Minimum Path - START *******
Constructing SBSP minimum path Topology Tree
--------------------------------------------
Adding SBSP (CPU0) to the tree
CPU0 Link Exchange
: LEP0(0,CPU1) Socket 0 Port 0:Primary - Peer Socket 1 Port 0 Secondary
: LEP1(1,CPU1) Socket 0 Port 1:Primary - Peer Socket 1 Port 1 Secondary
: LEP2(2,CPU1) Socket 0 Port 2:Primary - Peer Socket 1 Port 2 Secondary
: LEP3(3,CPU1) Socket 0 Port 3:Primary - Peer Socket 1 Port 3 Secondary
Adding CPU1 to the tree
Setting path between SBSP and CPU1.
In SBSP setting route to CPU1 using port 0.
In CPU1 using port 0 to set the M2UPCIe0 route.
CPU1 Link Exchange
: LEP0(0,CPU0) : LEP1(1,CPU0) : LEP2(2,CPU0) : LEP3(3,CPU0)
Setting boot path for CPU1
In CPU1 setting Cbo route to port 0
Socket[2] is removed
Socket[3] is removed
SBSP Minimum Path Tree
----------------------
Index Socket ParentPort Hop ParentIndex
00 CPU0 -- 0 --
01 CPU1 00 1 00
******* Setting up Minimum Path - END *******
******* Check for KTI Topology Degradation - START *******
Link Exchange Parameter
-----------------------
CPU0 : LEP0(0:CPU1) : LEP1(1:CPU1) : LEP2(2:CPU1) : LEP3(3:CPU1)
CPU1 : LEP0(0:CPU0) : LEP1(1:CPU0) : LEP2(2:CPU0) : LEP3(3:CPU0)
Already Reduced to Supported Topology
System will be treated 2S4L Configuration
******* Check for KTI Topology Degradation - END *******
******* Enable UBOX MMIO Addr Range - START *******
Current Bars:
Socket | SCF | PCU | MEM0 | MEM1 | MEM2 | MEM3 | MEM4 | MEM5 | MEM6 | MEM7 | SBREG |
-------------------------------------------------------------------------------------------------------------------------------------------------------
0 | 0xF8000000 | 0xF8200000 | 0xF8280000 | 0xF8300000 | 0xF8380000 | 0xF8400000 | 0xF8480000 | 0xF8500000 | 0xF8580000 | 0xF8600000 | 0xF8680000 |
1 | 0xF8800000 | 0xF8A00000 | 0xF8A80000 | 0xF8B00000 | 0xF8B80000 | 0xF8C00000 | 0xF8C80000 | 0xF8D00000 | 0xF8D80000 | 0xF8E00000 | 0xF8E80000 |
2 | 0xF9000000 | 0xF9200000 | 0xF9280000 | 0xF9300000 | 0xF9380000 | 0xF9400000 | 0xF9480000 | 0xF9500000 | 0xF9580000 | 0xF9600000 | 0xF9680000 |
3 | 0xF9800000 | 0xF9A00000 | 0xF9A80000 | 0xF9B00000 | 0xF9B80000 | 0xF9C00000 | 0xF9C80000 | 0xF9D00000 | 0xF9D80000 | 0xF9E00000 | 0xF9E80000 |
-------------------------------------------------------------------------------------------------------------------------------------------------------
******* Enable UBOX MMIO Addr Range - END *******
******* Process Straps Config - START *******
S3M Read SoftStrap Disabled, Exit.
******* Process Straps Config - END *******
******* Detecting IIO count - START *******
Socket 0 Stack Bitmap:F3F.
Stack Instance Bitmap:F3F.
IioCount: 10.
B2HotCount(LS): 00.
Socket 1 Stack Bitmap:F3F.
Stack Instance Bitmap:F3F.
IioCount: 10.
B2HotCount(LS): 00.
******* Detecting IIO count - END *******
******* Disable UBOX MMIO Addr Range - START *******
Current Bars:
Socket | SCF | PCU | MEM0 | MEM1 | MEM2 | MEM3 | MEM4 | MEM5 | MEM6 | MEM7 | SBREG |
-------------------------------------------------------------------------------------------------------------------------------------------------------
0 | 0x00000000 | 0x00000000 | 0x00000000 | 0x00000000 | 0x00000000 | 0x00000000 | 0x00000000 | 0x00000000 | 0x00000000 | 0x00000000 | 0x00000000 |
1 | 0x00000000 | 0x00000000 | 0x00000000 | 0x00000000 | 0x00000000 | 0x00000000 | 0x00000000 | 0x00000000 | 0x00000000 | 0x00000000 | 0x00000000 |
2 | 0x00000000 | 0x00000000 | 0x00000000 | 0x00000000 | 0x00000000 | 0x00000000 | 0x00000000 | 0x00000000 | 0x00000000 | 0x00000000 | 0x00000000 |
3 | 0x00000000 | 0x00000000 | 0x00000000 | 0x00000000 | 0x00000000 | 0x00000000 | 0x00000000 | 0x00000000 | 0x00000000 | 0x00000000 | 0x00000000 |
-------------------------------------------------------------------------------------------------------------------------------------------------------
******* Disable UBOX MMIO Addr Range - END *******
******* Checking KTIRC Input Structure - START *******
Desired MMCFG Config: Base = 0x80000000, Size = 0x10000000
OutSncPrefetchEn=4, OutSncEn=4
IpUpiGetCapability(UpiAgent[0][0], id=12):
IpUpiVersionSpecificConfigurationEnabled: unknown ID=2
IpWrError 0 49
IpUpiGetCapability(UpiAgent[0][0], id=7):
IpUpiGetCapability(UpiAgent[0][0], id=9):
IpUpiGetCapability(UpiAgent[0][0], id=10):
IpUpiGetCapability(UpiAgent[0][0], id=8):
IpUpiGetCapability(UpiAgent[0][1], id=12):
IpUpiVersionSpecificConfigurationEnabled: unknown ID=2
IpWrError 0 49
IpUpiGetCapability(UpiAgent[0][1], id=7):
IpUpiGetCapability(UpiAgent[0][1], id=9):
IpUpiGetCapability(UpiAgent[0][1], id=10):
IpUpiGetCapability(UpiAgent[0][1], id=8):
IpUpiGetCapability(UpiAgent[0][2], id=12):
IpUpiVersionSpecificConfigurationEnabled: unknown ID=2
IpWrError 0 49
IpUpiGetCapability(UpiAgent[0][2], id=7):
IpUpiGetCapability(UpiAgent[0][2], id=9):
IpUpiGetCapability(UpiAgent[0][2], id=10):
IpUpiGetCapability(UpiAgent[0][2], id=8):
IpUpiGetCapability(UpiAgent[0][3], id=12):
IpUpiVersionSpecificConfigurationEnabled: unknown ID=2
IpWrError 0 49
IpUpiGetCapability(UpiAgent[0][3], id=7):
IpUpiGetCapability(UpiAgent[0][3], id=9):
IpUpiGetCapability(UpiAgent[0][3], id=10):
IpUpiGetCapability(UpiAgent[0][3], id=8):
IpUpiGetCapability(UpiAgent[1][0], id=12):
IpUpiVersionSpecificConfigurationEnabled: unknown ID=2
IpWrError 0 49
IpUpiGetCapability(UpiAgent[1][0], id=7):
IpUpiGetCapability(UpiAgent[1][0], id=9):
IpUpiGetCapability(UpiAgent[1][0], id=10):
IpUpiGetCapability(UpiAgent[1][0], id=8):
IpUpiGetCapability(UpiAgent[1][1], id=12):
IpUpiVersionSpecificConfigurationEnabled: unknown ID=2
IpWrError 0 49
IpUpiGetCapability(UpiAgent[1][1], id=7):
IpUpiGetCapability(UpiAgent[1][1], id=9):
IpUpiGetCapability(UpiAgent[1][1], id=10):
IpUpiGetCapability(UpiAgent[1][1], id=8):
IpUpiGetCapability(UpiAgent[1][2], id=12):
IpUpiVersionSpecificConfigurationEnabled: unknown ID=2
IpWrError 0 49
IpUpiGetCapability(UpiAgent[1][2], id=7):
IpUpiGetCapability(UpiAgent[1][2], id=9):
IpUpiGetCapability(UpiAgent[1][2], id=10):
IpUpiGetCapability(UpiAgent[1][2], id=8):
IpUpiGetCapability(UpiAgent[1][3], id=12):
IpUpiVersionSpecificConfigurationEnabled: unknown ID=2
IpWrError 0 49
IpUpiGetCapability(UpiAgent[1][3], id=7):
IpUpiGetCapability(UpiAgent[1][3], id=9):
IpUpiGetCapability(UpiAgent[1][3], id=10):
IpUpiGetCapability(UpiAgent[1][3], id=8):
****** Selecting KTI freq. - START ******
Max supported KTI Speed requested: 16.0 GT/s
Selected KTI Freq is 16.0 GT/s
****** Selecting KTI freq. - END ******
MaxAddress=52
******* Checking KTIRC Input Structure - END *******
******* KTI NVRAM Verification - START *******
******* KTI NVRAM Verification - END *******
******* Calculate Resource Allocation - START *******
S0 - AddressMap.hi=209F
S1 - AddressMap.hi=21BF
BitPos=2E
CPU Resource Allocation
--------------------------------------------------------------------------------------------------------------------------------------------------------------
| StkId | Seg | Bus | Io | IoApic | Mmiol | Mmioh | StkBmp |
--------------------------------------------------------------------------------------------------------------------------------------------------------------
CPU0 | | 0 | 0x00 - 0x7F | 0x0000 - 0x9FFF | 0xFEC00000 - 0xFECFFFFF | 0x90000000 - 0xC8FFFFFF | 0x00002000 00000000 - 0x0000209F FFFFFFFF | 0xF3F |
Ins00 | 0x00 | 0 | 0x00 - 0x14 | 0x0000 - 0x3FFF | 0xFEC00000 - 0xFECFFFFF | 0x90000000 - 0x957FFFFF | 0x00002000 00000000 - 0x0000200F FFFFFFFF | |
Ins01 | 0x01 | 0 | 0x15 - 0x25 | 0x4000 - 0x5FFF | 0xFFFFFFFF - 0x00000000 | 0x95800000 - 0x9F7FFFFF | 0x00002010 00000000 - 0x0000201F FFFFFFFF | |
Ins02 | 0x04 | 0 | 0x26 - 0x36 | 0x6000 - 0x6FFF | 0xFFFFFFFF - 0x00000000 | 0x9F800000 - 0xA93FFFFF | 0x00002020 00000000 - 0x0000202F FFFFFFFF | |
Ins03 | 0x03 | 0 | 0x37 - 0x47 | 0x7000 - 0x7FFF | 0xFFFFFFFF - 0x00000000 | 0xA9400000 - 0xB2FFFFFF | 0x00002030 00000000 - 0x0000203F FFFFFFFF | |
Ins04 | 0x05 | 0 | 0x48 - 0x58 | 0x8000 - 0x8FFF | 0xFFFFFFFF - 0x00000000 | 0xB3000000 - 0xBCBFFFFF | 0x00002040 00000000 - 0x0000204F FFFFFFFF | |
Ins05 | 0x02 | 0 | 0x59 - 0x69 | 0x9000 - 0x9FFF | 0xFFFFFFFF - 0x00000000 | 0xBCC00000 - 0xC67FFFFF | 0x00002050 00000000 - 0x0000205F FFFFFFFF | |
Ins06 | 0x06 | 0 | 0xFF - 0x00 | 0xFFFF - 0x0000 | 0xFFFFFFFF - 0x00000000 | 0xFFFFFFFF - 0x00000000 | 0xFFFFFFFF FFFFFFFF - 0x00000000 00000000 | |
Ins07 | 0x07 | 0 | 0xFF - 0x00 | 0xFFFF - 0x0000 | 0xFFFFFFFF - 0x00000000 | 0xFFFFFFFF - 0x00000000 | 0xFFFFFFFF FFFFFFFF - 0x00000000 00000000 | |
Ins08 | 0x08 | 0 | 0x6A - 0x6E | 0xFFFF - 0x0000 | 0xFFFFFFFF - 0x00000000 | 0xC6800000 - 0xC6FFFFFF | 0x00002060 00000000 - 0x0000206F FFFFFFFF | |
Ins09 | 0x09 | 0 | 0x6F - 0x73 | 0xFFFF - 0x0000 | 0xFFFFFFFF - 0x00000000 | 0xC7000000 - 0xC77FFFFF | 0x00002070 00000000 - 0x0000207F FFFFFFFF | |
Ins10 | 0x0A | 0 | 0x74 - 0x78 | 0xFFFF - 0x0000 | 0xFFFFFFFF - 0x00000000 | 0xC7800000 - 0xC7FFFFFF | 0x00002080 00000000 - 0x0000208F FFFFFFFF | |
Ins11 | 0x0B | 0 | 0x79 - 0x7D | 0xFFFF - 0x0000 | 0xFFFFFFFF - 0x00000000 | 0xC8000000 - 0xC87FFFFF | 0x00002090 00000000 - 0x0000209F FFFFFFFF | |
Rsvd | 0x0C | 0 | 0xFB - 0xFD | 0xFFFF - 0x0000 | 0xFFFFFFFF - 0x00000000 | 0xFFFFFFFF - 0x00000000 | 0xFFFFFFFF FFFFFFFF - 0x00000000 00000000 | |
Ubox | 0x0D | 0 | 0x7E - 0x7F | 0xFFFF - 0x0000 | 0xFFFFFFFF - 0x00000000 | 0xC8800000 - 0xC8FFFFFF | 0xFFFFFFFF FFFFFFFF - 0x00000000 00000000 | |
CPU1 | | 0 | 0x80 - 0xFF | 0xA000 - 0xFFFF | 0xFFFFFFFF - 0x00000000 | 0xC9000000 - 0xFBFFFFFF | 0x000020A0 00000000 - 0x0000213F FFFFFFFF | 0xF3F |
Ins00 | 0x00 | 0 | 0x80 - 0x96 | 0xA000 - 0xAFFF | 0xFFFFFFFF - 0x00000000 | 0xC9000000 - 0xD13FFFFF | 0x000020A0 00000000 - 0x000020AF FFFFFFFF | |
Ins01 | 0x01 | 0 | 0x97 - 0xA6 | 0xB000 - 0xBFFF | 0xFFFFFFFF - 0x00000000 | 0xD1400000 - 0xD97FFFFF | 0x000020B0 00000000 - 0x000020BF FFFFFFFF | |
Ins02 | 0x04 | 0 | 0xA7 - 0xB6 | 0xC000 - 0xCFFF | 0xFFFFFFFF - 0x00000000 | 0xD9800000 - 0xE17FFFFF | 0x000020C0 00000000 - 0x000020CF FFFFFFFF | |
Ins03 | 0x03 | 0 | 0xB7 - 0xC6 | 0xD000 - 0xDFFF | 0xFFFFFFFF - 0x00000000 | 0xE1800000 - 0xE97FFFFF | 0x000020D0 00000000 - 0x000020DF FFFFFFFF | |
Ins04 | 0x05 | 0 | 0xC7 - 0xD6 | 0xE000 - 0xEFFF | 0xFFFFFFFF - 0x00000000 | 0xE9800000 - 0xF17FFFFF | 0x000020E0 00000000 - 0x000020EF FFFFFFFF | |
Ins05 | 0x02 | 0 | 0xD7 - 0xE6 | 0xF000 - 0xFFFF | 0xFFFFFFFF - 0x00000000 | 0xF1800000 - 0xF97FFFFF | 0x000020F0 00000000 - 0x000020FF FFFFFFFF | |
Ins06 | 0x06 | 0 | 0xFF - 0x00 | 0xFFFF - 0x0000 | 0xFFFFFFFF - 0x00000000 | 0xFFFFFFFF - 0x00000000 | 0xFFFFFFFF FFFFFFFF - 0x00000000 00000000 | |
Ins07 | 0x07 | 0 | 0xFF - 0x00 | 0xFFFF - 0x0000 | 0xFFFFFFFF - 0x00000000 | 0xFFFFFFFF - 0x00000000 | 0xFFFFFFFF FFFFFFFF - 0x00000000 00000000 | |
Ins08 | 0x08 | 0 | 0xE7 - 0xEB | 0xFFFF - 0x0000 | 0xFFFFFFFF - 0x00000000 | 0xF9800000 - 0xF9FFFFFF | 0x00002100 00000000 - 0x0000210F FFFFFFFF | |
Ins09 | 0x09 | 0 | 0xEC - 0xF0 | 0xFFFF - 0x0000 | 0xFFFFFFFF - 0x00000000 | 0xFA000000 - 0xFA7FFFFF | 0x00002110 00000000 - 0x0000211F FFFFFFFF | |
Ins10 | 0x0A | 0 | 0xF1 - 0xF5 | 0xFFFF - 0x0000 | 0xFFFFFFFF - 0x00000000 | 0xFA800000 - 0xFAFFFFFF | 0x00002120 00000000 - 0x0000212F FFFFFFFF | |
Ins11 | 0x0B | 0 | 0xF6 - 0xFA | 0xFFFF - 0x0000 | 0xFFFFFFFF - 0x00000000 | 0xFB000000 - 0xFB7FFFFF | 0x00002130 00000000 - 0x0000213F FFFFFFFF | |
Rsvd | 0x0C | 0 | 0xFB - 0xFD | 0xFFFF - 0x0000 | 0xFFFFFFFF - 0x00000000 | 0xFFFFFFFF - 0x00000000 | 0xFFFFFFFF FFFFFFFF - 0x00000000 00000000 | |
Ubox | 0x0D | 0 | 0xFE - 0xFF | 0xFFFF - 0x0000 | 0xFFFFFFFF - 0x00000000 | 0xFB800000 - 0xFBFFFFFF | 0xFFFFFFFF FFFFFFFF - 0x00000000 00000000 | |
******* Calculate Resource Allocation - END *******
******* Check for KTI Topology change across reset - START *******
******* Check for KTI Topology change across reset - END *******
******* Sync Up PBSPs - START *******
Setting Ubox Sticky to save KTI topology to 0x000000000000FF03
Verifying if the remote socket(s) checked-in.
packageBspStepping[0]=4
packageBspStepping[1]=4
******* Sync Up PBSPs - END *******
******* Program Mmcfg and bus numbers - START *******
Initiate S1 update
KtiVar->MmCfgBase = 0x80000000
KtiVar->segmentSocket[0] = 0x00
KtiVar->SocketFirstBus[0] = 0x00
KtiVar->SocketLastBus[0] = 0x7F
KtiVar->SocketMmCfgBase[0]= 0x80000000
KtiVar->segmentSocket[1] = 0x00
KtiVar->SocketFirstBus[1] = 0x80
KtiVar->SocketLastBus[1] = 0xFF
KtiVar->SocketMmCfgBase[1]= 0x80000000
Current bus numbers:
Socket | Ins00 | Ins01 | Ins02 | Ins03 | Ins04 | Ins05 | Ins06 | Ins07 | Ins08 | Ins09 | Ins0A | Ins0B | Rsvd | Ubox0 | Ubox1 | LastBus | Seg
-----------------------------------------------------------------------------------------------------------------------------------------------
0 | 0x00 | 0x15 | 0x26 | 0x37 | 0x48 | 0x59 | --- | --- | 0x6A | 0x6F | 0x74 | 0x79 | --- | 0x7E | 0x7F | 0x7F | 0
1 | 0x80 | 0x97 | 0xA7 | 0xB7 | 0xC7 | 0xD7 | --- | --- | 0xE7 | 0xEC | 0xF1 | 0xF6 | --- | 0xFE | 0xFF | 0xFF | 0
-----------------------------------------------------------------------------------------------------------------------------------------------
Wait for S1 to update
******* Program Mmcfg and bus numbers - END *******
Current Bars:
Socket | SCF | PCU | MEM0 | MEM1 | MEM2 | MEM3 | MEM4 | MEM5 | MEM6 | MEM7 | SBREG |
-------------------------------------------------------------------------------------------------------------------------------------------------------
0 | 0xC8800000 | 0xC8A00000 | 0xC8A80000 | 0xC8B00000 | 0xC8B80000 | 0xC8C00000 | 0xC8C80000 | 0xC8D00000 | 0xC8D80000 | 0xC8E00000 | 0xC8E80000 |
1 | 0xFB800000 | 0xFBA00000 | 0xFBA80000 | 0xFBB00000 | 0xFBB80000 | 0xFBC00000 | 0xFBC80000 | 0xFBD00000 | 0xFBD80000 | 0xFBE00000 | 0xFBE80000 |
-------------------------------------------------------------------------------------------------------------------------------------------------------
******* Full Speed Transition - START *******
Clearing KTI DFX Locks
****** S0p0 Program Eparams - START ******
S0 P0's Preset Coeff table, all lane table size: 0x0; per lane table size: 0x10
Per Lane Preset coeffcients Index table located for Socket 0 Link 0, RedriverStatus: 0
Socket 0 Port 0 : EPARAM entry programmed
IpUpiSetTxCoefficient(UpiAgent[0][0]): 4B01
****** S0p0 Program Eparams - END ******
****** S0p0 Program UniPhy Recipe - START ******
Socket 0 Port 0 : UPI EV Recipe v2.009 programmed
****** S0p0 Program UniPhy Recipe - END ******
IpUpiGetCapability(UpiAgent[0][0], id=12):
IpUpiVersionSpecificConfigurationEnabled: unknown ID=2
IpWrError 0 49
IpUpiSpeedChangePart1(UpiAgent[0][0]):
IpUpiVersionSpecificConfigurationEnabled: unknown ID=1
IpWrError 0 49
IpUpiVersionSpecificConfigurationEnabled: unknown ID=3
IpWrError 0 49
IpUpiVersionSpecificConfigurationEnabled: unknown ID=4
IpWrError 0 49
IpUpiVersionSpecificConfigurationEnabled: unknown ID=6
IpWrError 0 49
IpUpiDfxSetValue(0, 4, 0x8A)
****** S0p1 Program Eparams - START ******
S0 P1's Preset Coeff table, all lane table size: 0x0; per lane table size: 0x10
Per Lane Preset coeffcients Index table located for Socket 0 Link 1, RedriverStatus: 0
Socket 0 Port 1 : EPARAM entry programmed
IpUpiSetTxCoefficient(UpiAgent[0][1]): 4B01
****** S0p1 Program Eparams - END ******
****** S0p1 Program UniPhy Recipe - START ******
Socket 0 Port 1 : UPI EV Recipe v2.009 programmed
****** S0p1 Program UniPhy Recipe - END ******
IpUpiGetCapability(UpiAgent[0][1], id=12):
IpUpiVersionSpecificConfigurationEnabled: unknown ID=2
IpWrError 0 49
IpUpiSpeedChangePart1(UpiAgent[0][1]):
IpUpiVersionSpecificConfigurationEnabled: unknown ID=1
IpWrError 0 49
IpUpiVersionSpecificConfigurationEnabled: unknown ID=3
IpWrError 0 49
IpUpiVersionSpecificConfigurationEnabled: unknown ID=4
IpWrError 0 49
IpUpiVersionSpecificConfigurationEnabled: unknown ID=6
IpWrError 0 49
IpUpiDfxSetValue(0, 4, 0x8A)
****** S0p2 Program Eparams - START ******
S0 P2's Preset Coeff table, all lane table size: 0x0; per lane table size: 0x10
Per Lane Preset coeffcients Index table located for Socket 0 Link 2, RedriverStatus: 0
Socket 0 Port 2 : EPARAM entry programmed
IpUpiSetTxCoefficient(UpiAgent[0][2]): 4B01
****** S0p2 Program Eparams - END ******
****** S0p2 Program UniPhy Recipe - START ******
Socket 0 Port 2 : UPI EV Recipe v2.009 programmed
****** S0p2 Program UniPhy Recipe - END ******
IpUpiGetCapability(UpiAgent[0][2], id=12):
IpUpiVersionSpecificConfigurationEnabled: unknown ID=2
IpWrError 0 49
IpUpiSpeedChangePart1(UpiAgent[0][2]):
IpUpiVersionSpecificConfigurationEnabled: unknown ID=1
IpWrError 0 49
IpUpiVersionSpecificConfigurationEnabled: unknown ID=3
IpWrError 0 49
IpUpiVersionSpecificConfigurationEnabled: unknown ID=4
IpWrError 0 49
IpUpiVersionSpecificConfigurationEnabled: unknown ID=6
IpWrError 0 49
IpUpiDfxSetValue(0, 4, 0x8A)
****** S0p3 Program Eparams - START ******
S0 P3's Preset Coeff table, all lane table size: 0x0; per lane table size: 0x10
Per Lane Preset coeffcients Index table located for Socket 0 Link 3, RedriverStatus: 0
Socket 0 Port 3 : EPARAM entry programmed
IpUpiSetTxCoefficient(UpiAgent[0][3]): 4B01
****** S0p3 Program Eparams - END ******
****** S0p3 Program UniPhy Recipe - START ******
Socket 0 Port 3 : UPI EV Recipe v2.009 programmed
****** S0p3 Program UniPhy Recipe - END ******
IpUpiGetCapability(UpiAgent[0][3], id=12):
IpUpiVersionSpecificConfigurationEnabled: unknown ID=2
IpWrError 0 49
IpUpiSpeedChangePart1(UpiAgent[0][3]):
IpUpiVersionSpecificConfigurationEnabled: unknown ID=1
IpWrError 0 49
IpUpiVersionSpecificConfigurationEnabled: unknown ID=3
IpWrError 0 49
IpUpiVersionSpecificConfigurationEnabled: unknown ID=4
IpWrError 0 49
IpUpiVersionSpecificConfigurationEnabled: unknown ID=6
IpWrError 0 49
IpUpiDfxSetValue(0, 4, 0x8A)
****** S1p0 Program Eparams - START ******
S1 P0's Preset Coeff table, all lane table size: 0x0; per lane table size: 0x10
Per Lane Preset coeffcients Index table located for Socket 1 Link 0, RedriverStatus: 0
Socket 1 Port 0 : EPARAM entry programmed
IpUpiSetTxCoefficient(UpiAgent[1][0]): 4B01
****** S1p0 Program Eparams - END ******
****** S1p0 Program UniPhy Recipe - START ******
Socket 1 Port 0 : UPI EV Recipe v2.009 programmed
****** S1p0 Program UniPhy Recipe - END ******
IpUpiGetCapability(UpiAgent[1][0], id=12):
IpUpiVersionSpecificConfigurationEnabled: unknown ID=2
IpWrError 0 49
IpUpiSpeedChangePart1(UpiAgent[1][0]):
IpUpiVersionSpecificConfigurationEnabled: unknown ID=1
IpWrError 0 49
IpUpiVersionSpecificConfigurationEnabled: unknown ID=3
IpWrError 0 49
IpUpiVersionSpecificConfigurationEnabled: unknown ID=4
IpWrError 0 49
IpUpiVersionSpecificConfigurationEnabled: unknown ID=6
IpWrError 0 49
IpUpiDfxSetValue(0, 4, 0x8A)
****** S1p1 Program Eparams - START ******
S1 P1's Preset Coeff table, all lane table size: 0x0; per lane table size: 0x10
Per Lane Preset coeffcients Index table located for Socket 1 Link 1, RedriverStatus: 0
Socket 1 Port 1 : EPARAM entry programmed
IpUpiSetTxCoefficient(UpiAgent[1][1]): 4B01
****** S1p1 Program Eparams - END ******
****** S1p1 Program UniPhy Recipe - START ******
Socket 1 Port 1 : UPI EV Recipe v2.009 programmed
****** S1p1 Program UniPhy Recipe - END ******
IpUpiGetCapability(UpiAgent[1][1], id=12):
IpUpiVersionSpecificConfigurationEnabled: unknown ID=2
IpWrError 0 49
IpUpiSpeedChangePart1(UpiAgent[1][1]):
IpUpiVersionSpecificConfigurationEnabled: unknown ID=1
IpWrError 0 49
IpUpiVersionSpecificConfigurationEnabled: unknown ID=3
IpWrError 0 49
IpUpiVersionSpecificConfigurationEnabled: unknown ID=4
IpWrError 0 49
IpUpiVersionSpecificConfigurationEnabled: unknown ID=6
IpWrError 0 49
IpUpiDfxSetValue(0, 4, 0x8A)
****** S1p2 Program Eparams - START ******
S1 P2's Preset Coeff table, all lane table size: 0x0; per lane table size: 0x10
Per Lane Preset coeffcients Index table located for Socket 1 Link 2, RedriverStatus: 0
Socket 1 Port 2 : EPARAM entry programmed
IpUpiSetTxCoefficient(UpiAgent[1][2]): 4B01
****** S1p2 Program Eparams - END ******
****** S1p2 Program UniPhy Recipe - START ******
Socket 1 Port 2 : UPI EV Recipe v2.009 programmed
****** S1p2 Program UniPhy Recipe - END ******
IpUpiGetCapability(UpiAgent[1][2], id=12):
IpUpiVersionSpecificConfigurationEnabled: unknown ID=2
IpWrError 0 49
IpUpiSpeedChangePart1(UpiAgent[1][2]):
IpUpiVersionSpecificConfigurationEnabled: unknown ID=1
IpWrError 0 49
IpUpiVersionSpecificConfigurationEnabled: unknown ID=3
IpWrError 0 49
IpUpiVersionSpecificConfigurationEnabled: unknown ID=4
IpWrError 0 49
IpUpiVersionSpecificConfigurationEnabled: unknown ID=6
IpWrError 0 49
IpUpiDfxSetValue(0, 4, 0x8A)
****** S1p3 Program Eparams - START ******
S1 P3's Preset Coeff table, all lane table size: 0x0; per lane table size: 0x10
Per Lane Preset coeffcients Index table located for Socket 1 Link 3, RedriverStatus: 0
Socket 1 Port 3 : EPARAM entry programmed
IpUpiSetTxCoefficient(UpiAgent[1][3]): 4B01
****** S1p3 Program Eparams - END ******
****** S1p3 Program UniPhy Recipe - START ******
Socket 1 Port 3 : UPI EV Recipe v2.009 programmed
****** S1p3 Program UniPhy Recipe - END ******
IpUpiGetCapability(UpiAgent[1][3], id=12):
IpUpiVersionSpecificConfigurationEnabled: unknown ID=2
IpWrError 0 49
IpUpiSpeedChangePart1(UpiAgent[1][3]):
IpUpiVersionSpecificConfigurationEnabled: unknown ID=1
IpWrError 0 49
IpUpiVersionSpecificConfigurationEnabled: unknown ID=3
IpWrError 0 49
IpUpiVersionSpecificConfigurationEnabled: unknown ID=4
IpWrError 0 49
IpUpiVersionSpecificConfigurationEnabled: unknown ID=6
IpWrError 0 49
IpUpiDfxSetValue(0, 4, 0x8A)
Dispatching the APs to do Kti Speed Transition.
Dispatching the AP 1's for switching to the AllLinksRatio: 14141414IpUpiSpeedChangePart2(UpiAgent[0][0]):
IpUpiSpeedChangePart2a(UpiAgent[0][0]):
IpUpiSpeedChangePart2b(UpiAgent[0][0]):
IpUpiSpeedChangePart2(UpiAgent[0][1]):
IpUpiSpeedChangePart2a(UpiAgent[0][1]):
IpUpiSpeedChangePart2b(UpiAgent[0][1]):
IpUpiSpeedChangePart2(UpiAgent[0][2]):
IpUpiSpeedChangePart2a(UpiAgent[0][2]):
IpUpiSpeedChangePart2b(UpiAgent[0][2]):
IpUpiSpeedChangePart2(UpiAgent[0][3]):
IpUpiSpeedChangePart2a(UpiAgent[0][3]):
IpUpiSpeedChangePart2b(UpiAgent[0][3]):
IpUpiSpeedChangePart3(UpiAgent[0][0]):
IpUpiSpeedChangePart3(UpiAgent[0][1]):
IpUpiSpeedChangePart3(UpiAgent[0][2]):
IpUpiSpeedChangePart3(UpiAgent[0][3]):
Socket 0 KTI Link 0 Freq is currently 16.0GT.
Socket 0 KTI Link 1 Freq is currently 16.0GT.
Socket 0 KTI Link 2 Freq is currently 16.0GT.
Socket 0 KTI Link 3 Freq is currently 16.0GT.
Socket 1 KTI Link 0 Freq is currently 16.0GT.
Socket 1 KTI Link 1 Freq is currently 16.0GT.
Socket 1 KTI Link 2 Freq is currently 16.0GT.
Socket 1 KTI Link 3 Freq is currently 16.0GT.
******* Full Speed Transition - END *******
******* Phy/Link Updates On Warm Reset - START *******
******* Phy/Link Updates On Warm Reset - END *******
******* Topology Discovery and Optimum Route Calculation - START *******
Locating the Rings Present in the Topology
No Rings Found
Constructing Topology Tree
Adjacency Table
----------------
S0 P0 VN0 TX (00) : S1 P0 VN0 RX (17)
S0 P0 VN0 RX (01) :
S1 P0 VN0 TX (16) : S0 P0 VN0 RX (01)
S1 P0 VN0 RX (17) :
Checking for Deadlock...
CPU0 Topology Tree
-------------------
Index Socket ParentSocket ParentPort ParentIndex Hop XOR
00 CPU0 -- -- -- 0 --
01 CPU1 CPU0 00 00 1 0
CPU1 Topology Tree
-------------------
Index Socket ParentSocket ParentPort ParentIndex Hop XOR
00 CPU1 -- -- -- 0 --
01 CPU0 CPU1 00 00 1 0
"S0 P0 VN0 TX" -> "S1 P0 VN0 RX";
"S1 P0 VN0 TX" -> "S0 P0 VN0 RX";
Calculating Route for CPU0
Calculating Route for CPU1
CPU0 Routing Table (UPI_ROUTING_TABLE*_CHA)
----------------------------------------------------
DestSocket Port
CPU1 0
1
2
3
CPU1 Routing Table (UPI_ROUTING_TABLE*_CHA)
----------------------------------------------------
DestSocket Port
CPU0 0
1
2
3
CPU0 M3KTI Route Table (M3KKRT*_M3KTI_MAIN_REG)
----------------------------------------------------------------
InPort M3KtiNum CPU0 CPU1 CPU2 CPU3 CPU4 CPU5 CPU6 CPU7
0 0 3 0 - -
1 1 3 0 - -
2 2 3 0 - -
3 3 3 0 - -
CPU1 M3KTI Route Table (M3KKRT*_M3KTI_MAIN_REG)
----------------------------------------------------------------
InPort M3KtiNum CPU0 CPU1 CPU2 CPU3 CPU4 CPU5 CPU6 CPU7
0 0 0 3 - -
1 1 0 3 - -
2 2 0 3 - -
3 3 0 3 - -
******* Topology Discovery and Optimum Route Calculation - END *******
******* Program Final IO SAD Setting - START *******
Current Bars:
Socket | SCF | PCU | MEM0 | MEM1 | MEM2 | MEM3 | MEM4 | MEM5 | MEM6 | MEM7 | SBREG |
-------------------------------------------------------------------------------------------------------------------------------------------------------
0 | 0xC8800000 | 0xC8A00000 | 0xC8A80000 | 0xC8B00000 | 0xC8B80000 | 0xC8C00000 | 0xC8C80000 | 0xC8D00000 | 0xC8D80000 | 0xC8E00000 | 0xC8E80000 |
1 | 0xFB800000 | 0xFBA00000 | 0xFBA80000 | 0xFBB00000 | 0xFBB80000 | 0xFBC00000 | 0xFBC80000 | 0xFBD00000 | 0xFBD80000 | 0xFBE00000 | 0xFBE80000 |
-------------------------------------------------------------------------------------------------------------------------------------------------------
******* Program Final IO SAD Setting - END *******
******* Program Optimum Route Table Settings - START *******
[WARNING]: S0 StackIdx:0 Read of side band register R2PGNCTRL returned 0
[WARNING]: S0 StackIdx:1 Read of side band register R2PGNCTRL returned 0
[WARNING]: S0 StackIdx:2 Read of side band register R2PGNCTRL returned 0
[WARNING]: S0 StackIdx:3 Read of side band register R2PGNCTRL returned 0
[WARNING]: S0 StackIdx:4 Read of side band register R2PGNCTRL returned 0
[WARNING]: S0 StackIdx:5 Read of side band register R2PGNCTRL returned 0
[WARNING]: S0 StackIdx:8 Read of side band register R2PGNCTRL returned 0
[WARNING]: S0 StackIdx:9 Read of side band register R2PGNCTRL returned 0
[WARNING]: S0 StackIdx:10 Read of side band register R2PGNCTRL returned 0
[WARNING]: S0 StackIdx:11 Read of side band register R2PGNCTRL returned 0
[WARNING]: S1 StackIdx:0 Read of side band register R2PGNCTRL returned 0
[WARNING]: S1 StackIdx:1 Read of side band register R2PGNCTRL returned 0
[WARNING]: S1 StackIdx:2 Read of side band register R2PGNCTRL returned 0
[WARNING]: S1 StackIdx:3 Read of side band register R2PGNCTRL returned 0
[WARNING]: S1 StackIdx:4 Read of side band register R2PGNCTRL returned 0
[WARNING]: S1 StackIdx:5 Read of side band register R2PGNCTRL returned 0
[WARNING]: S1 StackIdx:8 Read of side band register R2PGNCTRL returned 0
[WARNING]: S1 StackIdx:9 Read of side band register R2PGNCTRL returned 0
[WARNING]: S1 StackIdx:10 Read of side band register R2PGNCTRL returned 0
[WARNING]: S1 StackIdx:11 Read of side band register R2PGNCTRL returned 0
******* Program Optimum Route Table Settings - END *******
******* Program Misc. KTI Parameters - START *******
Dispatching the AP 1's for m2upi meshcreditupdate: FBE8000F
******* Program Misc. KTI Parameters - END *******
******* Program System Coherency Registers - START *******
******* Program System Coherency Registers - END *******
******* Check for S3 Resume - START *******
******* Check for S3 Resume - END *******
******* SNC Misc and Recovery - START *******
OutNumOfCluster = 4, FullSncEnable=1, SncIndEnable=1, NumClusters=3
OutNumOfCluster = 4, FullSncEnable=1, SncIndEnable=1, NumClusters=3
******* SNC Misc and Recovery - END *******
******* Collect Previous Boot Error - START *******
******* Collect Previous Boot Error - END *******
Setup Uncore Misc:
Write Socket 0 GLOBAL_PKG_C_S_CONTROL_REGISTER = 4
Write Socket 1 GLOBAL_PKG_C_S_CONTROL_REGISTER = 100
:INIT - BIOS_RESET_CPL: Set CPL1 on #S1
:INIT - BIOS_RESET_CPL: Set CPL1 on #S0
Initalize DMI RCRB region.
SetRcrbBar (): RcrbBase = 0x90000000
Warning: Created a Memory Hole: 0x90002000 ~ 0x9001FFFF
MEMBAR0: Base = 0x90020000, Size = 0x20000
Socket: 0;DMI MemBar locates on 0x90020000, Size: 0x20000
ProgramSncConfigureInChaBeforeMemoryReady
Socket0: NumOfCluster=4, UmaEn=0, BaseChaOfCluster1=13, BaseChaOfCluster2=26, BaseChaOfCluster3=39
Socket1: NumOfCluster=4, UmaEn=0, BaseChaOfCluster1=13, BaseChaOfCluster2=26, BaseChaOfCluster3=39
******* Configure M2IOSF P2P Credits - START *******
Soc 0, Shared P2P BL VNA credits: 59595959, 5959, 59595959, 61616161.
Soc 1, Shared P2P BL VNA credits: 59595959, 5959, 59595959, 61616161.
******* Configure M2IOSF P2P Credits - END *******
*******SOCKET1 STACKID SWAPPING - START *******
*******SOCKET1 STACKID SWAPPING - END *******
Current bus numbers:
Socket | Ins00 | Ins01 | Ins02 | Ins03 | Ins04 | Ins05 | Ins06 | Ins07 | Ins08 | Ins09 | Ins0A | Ins0B | Rsvd | Ubox0 | Ubox1 | LastBus | Seg
-----------------------------------------------------------------------------------------------------------------------------------------------
0 | 0x00 | 0x15 | 0x26 | 0x37 | 0x48 | 0x59 | --- | --- | 0x6A | 0x6F | 0x74 | 0x79 | --- | 0x7E | 0x7F | 0x7F | 0
1 | --- | 0x97 | 0xA7 | 0xB7 | 0xC7 | 0xD7 | 0x80 | --- | 0xE7 | 0xEC | 0xF1 | 0xF6 | --- | 0xFE | 0xFF | 0xFF | 0
-----------------------------------------------------------------------------------------------------------------------------------------------
Get FM_PCIE_FV_BIF_EN Status = Success, GpioVal = 0
******* Initialize CXL - START *******
CXL: IIO EarlyLink Init Start.
HcxType[0] = NONE
[IIO](VMD) [0] VMD disabled for RPs init.
Program HW_INIT using SB access
Program HW_INIT using SB access
Program HW_INIT using SB access
Program HW_INIT using SB access
Program HW_INIT using SB access
Program HW_INIT using SB access
Program HW_INIT using SB access
Program HW_INIT using SB access
Program HW_INIT using SB access
[0] Cpxsmb enabled
MS2IOSF_BANK_DECODER_INIT_START
MS2IOSF BankDecoder: TableSize 119, Recipe Revision 1.16
Hiding DSA Psf1DsaConfig: 0
Hiding DSA Psf1DsaConfig: 0
Hiding DSA Psf1DsaConfig: 0
Hiding DSA Psf1DsaConfig: 0
Hiding DSA Psf1DsaConfig: 100
Hiding DSA Psf1DsaConfig: 100
Hiding DSA Psf1DsaConfig: 100
Hiding DSA Psf1DsaConfig: 100
Hiding DSA Psf1DsaConfig: 100
Hiding DSA Psf1DsaConfig: 100
Hiding DSA Psf1DsaConfig: 100
Hiding DSA Psf1DsaConfig: 100
Hiding DSA Psf1DsaConfig: 100
Hiding DSA Psf1DsaConfig: 100
Hiding DSA Psf1DsaConfig: 100
Hiding DSA Psf1DsaConfig: 100
Hiding DSA Psf1DsaConfig: 100
Hiding DSA Psf1DsaConfig: 100
Hiding DSA Psf1DsaConfig: 100
Hiding DSA Psf1DsaConfig: 100
Hiding DSA Psf1DsaConfig: 100
Hiding DSA Psf1DsaConfig: 100
Hiding DSA Psf1DsaConfig: 100
Hiding DSA Psf1DsaConfig: 100
Hiding DSA Psf1DsaConfig: 100
Hiding DSA Psf1DsaConfig: 100
Hiding DSA Psf1DsaConfig: 100
Hiding DSA Psf1DsaConfig: 100
Hiding DSA Psf1DsaConfig: 100
Hiding DSA Psf1DsaConfig: 100
Hiding DSA Psf1DsaConfig: 100
Hiding DSA Psf1DsaConfig: 100
Hiding DSA Psf1DsaConfig: 100
Hiding DSA Psf1DsaConfig: 100
Hiding DSA Psf1DsaConfig: 100
Hiding DSA Psf1DsaConfig: 100
Hiding DSA Psf1DsaConfig: 100
Hiding DSA Psf1DsaConfig: 100
Hiding DSA Psf1DsaConfig: 100
Hiding DSA Psf1DsaConfig: 100
Hiding DSA Psf1DsaConfig: 100
Hiding DSA Psf1DsaConfig: 100
Hiding DSA Psf1DsaConfig: 100
Hiding DSA Psf1DsaConfig: 100
Hiding DSA Psf1DsaConfig: 100
Hiding DSA Psf1DsaConfig: 100
Hiding DSA Psf1DsaConfig: 100
Hiding DSA Psf1DsaConfig: 100
Hiding DSA Psf1DsaConfig: 100
Hiding DSA Psf1DsaConfig: 100
Hiding DSA Psf1DsaConfig: 100
Hiding DSA Psf1DsaConfig: 100
Hiding DSA Psf1DsaConfig: 100
Hiding DSA Psf1DsaConfig: 100
Hiding DSA Psf1DsaConfig: 100
Hiding DSA Psf1DsaConfig: 100
Hiding IAX Psf1IaxConfig: 0
Hiding IAX Psf1IaxConfig: 0
Hiding IAX Psf1IaxConfig: 0
Hiding IAX Psf1IaxConfig: 0
Hiding IAX Psf1IaxConfig: 100
Hiding IAX Psf1IaxConfig: 100
Hiding IAX Psf1IaxConfig: 100
Hiding IAX Psf1IaxConfig: 100
Hiding IAX Psf1IaxConfig: 100
Hiding IAX Psf1IaxConfig: 100
Hiding IAX Psf1IaxConfig: 100
Hiding IAX Psf1IaxConfig: 100
Hiding IAX Psf1IaxConfig: 100
Hiding IAX Psf1IaxConfig: 100
Hiding IAX Psf1IaxConfig: 100
Hiding IAX Psf1IaxConfig: 100
Hiding IAX Psf1IaxConfig: 100
Hiding IAX Psf1IaxConfig: 100
Hiding IAX Psf1IaxConfig: 100
Hiding IAX Psf1IaxConfig: 100
Hiding IAX Psf1IaxConfig: 100
Hiding IAX Psf1IaxConfig: 100
Hiding IAX Psf1IaxConfig: 100
Hiding IAX Psf1IaxConfig: 100
Hiding IAX Psf1IaxConfig: 100
Hiding IAX Psf1IaxConfig: 100
Hiding IAX Psf1IaxConfig: 100
Hiding IAX Psf1IaxConfig: 100
Hiding IAX Psf1IaxConfig: 100
Hiding IAX Psf1IaxConfig: 100
Hiding IAX Psf1IaxConfig: 100
Hiding IAX Psf1IaxConfig: 100
Hiding IAX Psf1IaxConfig: 100
Hiding IAX Psf1IaxConfig: 100
Hiding IAX Psf1IaxConfig: 100
Hiding IAX Psf1IaxConfig: 100
Hiding IAX Psf1IaxConfig: 100
Hiding IAX Psf1IaxConfig: 100
Hiding IAX Psf1IaxConfig: 100
Hiding IAX Psf1IaxConfig: 100
Hiding IAX Psf1IaxConfig: 100
Hiding IAX Psf1IaxConfig: 100
Hiding IAX Psf1IaxConfig: 100
Hiding IAX Psf1IaxConfig: 100
Hiding IAX Psf1IaxConfig: 100
Hiding IAX Psf1IaxConfig: 100
Hiding IAX Psf1IaxConfig: 100
Hiding IAX Psf1IaxConfig: 100
Hiding IAX Psf1IaxConfig: 100
Hiding IAX Psf1IaxConfig: 100
Hiding IAX Psf1IaxConfig: 100
Hiding IAX Psf1IaxConfig: 100
Hiding IAX Psf1IaxConfig: 100
Hiding IAX Psf1IaxConfig: 100
Hiding IAX Psf1IaxConfig: 100
Hiding IAX Psf1IaxConfig: 100
MS2IOSF_BANK_DECODER_INIT_END
[0 p0] DMI device is enabled
[0.1 p1] 00:15:01.0: PCI device 8086:352A is enabled
[0.1 p2] 00:15:02.0: PCI device FFFF:FFFF is disabled (not present)
[0.1 p3] 00:15:03.0: PCI device FFFF:FFFF is disabled (not present)
[0.1 p4] 00:15:04.0: PCI device FFFF:FFFF is disabled (not present)
[0.1 p5] 00:15:05.0: PCI device FFFF:FFFF is disabled (not present)
[0.1 p6] 00:15:06.0: PCI device FFFF:FFFF is disabled (not present)
[0.1 p7] 00:15:07.0: PCI device FFFF:FFFF is disabled (not present)
[0.1 p8] 00:15:08.0: PCI device FFFF:FFFF is disabled (not present)
[0.2 p9] 00:26:01.0: PCI device 8086:352A is enabled
[0.2 p10] 00:26:02.0: PCI device FFFF:FFFF is disabled (not present)
[0.2 p11] 00:26:03.0: PCI device FFFF:FFFF is disabled (not present)
[0.2 p12] 00:26:04.0: PCI device FFFF:FFFF is disabled (not present)
[0.2 p13] 00:26:05.0: PCI device FFFF:FFFF is disabled (not present)
[0.2 p14] 00:26:06.0: PCI device FFFF:FFFF is disabled (not present)
[0.2 p15] 00:26:07.0: PCI device FFFF:FFFF is disabled (not present)
[0.2 p16] 00:26:08.0: PCI device FFFF:FFFF is disabled (not present)
[0.3 p17] 00:37:01.0: PCI device 8086:352A is enabled
[0.3 p18] 00:37:02.0: PCI device FFFF:FFFF is disabled (not present)
[0.3 p19] 00:37:03.0: PCI device FFFF:FFFF is disabled (not present)
[0.3 p20] 00:37:04.0: PCI device FFFF:FFFF is disabled (not present)
[0.3 p21] 00:37:05.0: PCI device FFFF:FFFF is disabled (not present)
[0.3 p22] 00:37:06.0: PCI device FFFF:FFFF is disabled (not present)
[0.3 p23] 00:37:07.0: PCI device FFFF:FFFF is disabled (not present)
[0.3 p24] 00:37:08.0: PCI device FFFF:FFFF is disabled (not present)
[0.4 p25] 00:48:01.0: PCI device 8086:352A is enabled
[0.4 p26] 00:48:02.0: PCI device FFFF:FFFF is disabled (not present)
[0.4 p27] 00:48:03.0: PCI device 8086:352B is enabled
[0.4 p28] 00:48:04.0: PCI device FFFF:FFFF is disabled (not present)
[0.4 p29] 00:48:05.0: PCI device 8086:352C is enabled
[0.4 p30] 00:48:06.0: PCI device FFFF:FFFF is disabled (not present)
[0.4 p31] 00:48:07.0: PCI device 8086:352D is enabled
[0.4 p32] 00:48:08.0: PCI device FFFF:FFFF is disabled (not present)
[0.5 p33] 00:59:01.0: PCI device 8086:352A is enabled
[0.5 p34] 00:59:02.0: PCI device FFFF:FFFF is disabled (not present)
[0.5 p35] 00:59:03.0: PCI device 8086:352B is enabled
[0.5 p36] 00:59:04.0: PCI device FFFF:FFFF is disabled (not present)
[0.5 p37] 00:59:05.0: PCI device 8086:352C is enabled
[0.5 p38] 00:59:06.0: PCI device FFFF:FFFF is disabled (not present)
[0.5 p39] 00:59:07.0: PCI device 8086:352D is enabled
[0.5 p40] 00:59:08.0: PCI device FFFF:FFFF is disabled (not present)
WARNING: Platform does not support uplink port!
HcxType[1] = NONE
[IIO](VMD) [1] VMD disabled for RPs init.
Program HW_INIT using SB access
Program HW_INIT using SB access
Program HW_INIT using SB access
Program HW_INIT using SB access
Program HW_INIT using SB access
Program HW_INIT using SB access
Program HW_INIT using SB access
Program HW_INIT using SB access
Program HW_INIT using SB access
Program HW_INIT using SB access
[1] Cpxsmb enabled
MS2IOSF_BANK_DECODER_INIT_START
MS2IOSF BankDecoder: TableSize 119, Recipe Revision 1.16
Hiding DSA Psf1DsaConfig: 0
Hiding DSA Psf1DsaConfig: 0
Hiding DSA Psf1DsaConfig: 0
Hiding DSA Psf1DsaConfig: 0
Hiding DSA Psf1DsaConfig: 100
Hiding DSA Psf1DsaConfig: 100
Hiding DSA Psf1DsaConfig: 100
Hiding DSA Psf1DsaConfig: 100
Hiding DSA Psf1DsaConfig: 100
Hiding DSA Psf1DsaConfig: 100
Hiding DSA Psf1DsaConfig: 100
Hiding DSA Psf1DsaConfig: 100
Hiding DSA Psf1DsaConfig: 100
Hiding DSA Psf1DsaConfig: 100
Hiding DSA Psf1DsaConfig: 100
Hiding DSA Psf1DsaConfig: 100
Hiding DSA Psf1DsaConfig: 100
Hiding DSA Psf1DsaConfig: 100
Hiding DSA Psf1DsaConfig: 100
Hiding DSA Psf1DsaConfig: 100
Hiding DSA Psf1DsaConfig: 100
Hiding DSA Psf1DsaConfig: 100
Hiding DSA Psf1DsaConfig: 100
Hiding DSA Psf1DsaConfig: 100
Hiding DSA Psf1DsaConfig: 100
Hiding DSA Psf1DsaConfig: 100
Hiding DSA Psf1DsaConfig: 100
Hiding DSA Psf1DsaConfig: 100
Hiding DSA Psf1DsaConfig: 100
Hiding DSA Psf1DsaConfig: 100
Hiding DSA Psf1DsaConfig: 100
Hiding DSA Psf1DsaConfig: 100
Hiding DSA Psf1DsaConfig: 100
Hiding DSA Psf1DsaConfig: 100
Hiding DSA Psf1DsaConfig: 100
Hiding DSA Psf1DsaConfig: 100
Hiding DSA Psf1DsaConfig: 100
Hiding DSA Psf1DsaConfig: 100
Hiding DSA Psf1DsaConfig: 100
Hiding DSA Psf1DsaConfig: 100
Hiding DSA Psf1DsaConfig: 100
Hiding DSA Psf1DsaConfig: 100
Hiding DSA Psf1DsaConfig: 100
Hiding DSA Psf1DsaConfig: 100
Hiding DSA Psf1DsaConfig: 100
Hiding DSA Psf1DsaConfig: 100
Hiding DSA Psf1DsaConfig: 100
Hiding DSA Psf1DsaConfig: 100
Hiding DSA Psf1DsaConfig: 100
Hiding DSA Psf1DsaConfig: 100
Hiding DSA Psf1DsaConfig: 100
Hiding DSA Psf1DsaConfig: 100
Hiding DSA Psf1DsaConfig: 100
Hiding DSA Psf1DsaConfig: 100
Hiding DSA Psf1DsaConfig: 100
Hiding DSA Psf1DsaConfig: 100
Hiding IAX Psf1IaxConfig: 0
Hiding IAX Psf1IaxConfig: 0
Hiding IAX Psf1IaxConfig: 0
Hiding IAX Psf1IaxConfig: 0
Hiding IAX Psf1IaxConfig: 100
Hiding IAX Psf1IaxConfig: 100
Hiding IAX Psf1IaxConfig: 100
Hiding IAX Psf1IaxConfig: 100
Hiding IAX Psf1IaxConfig: 100
Hiding IAX Psf1IaxConfig: 100
Hiding IAX Psf1IaxConfig: 100
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Hiding IAX Psf1IaxConfig: 100
MS2IOSF_BANK_DECODER_INIT_END
[1.1 p1] 00:97:01.0: PCI device 8086:352A is enabled
[1.1 p2] 00:97:02.0: PCI device FFFF:FFFF is disabled (not present)
[1.1 p3] 00:97:03.0: PCI device FFFF:FFFF is disabled (not present)
[1.1 p4] 00:97:04.0: PCI device FFFF:FFFF is disabled (not present)
[1.1 p5] 00:97:05.0: PCI device FFFF:FFFF is disabled (not present)
[1.1 p6] 00:97:06.0: PCI device FFFF:FFFF is disabled (not present)
[1.1 p7] 00:97:07.0: PCI device FFFF:FFFF is disabled (not present)
[1.1 p8] 00:97:08.0: PCI device FFFF:FFFF is disabled (not present)
[1.2 p9] 00:A7:01.0: PCI device 8086:352A is enabled
[1.2 p10] 00:A7:02.0: PCI device FFFF:FFFF is disabled (not present)
[1.2 p11] 00:A7:03.0: PCI device FFFF:FFFF is disabled (not present)
[1.2 p12] 00:A7:04.0: PCI device FFFF:FFFF is disabled (not present)
[1.2 p13] 00:A7:05.0: PCI device FFFF:FFFF is disabled (not present)
[1.2 p14] 00:A7:06.0: PCI device FFFF:FFFF is disabled (not present)
[1.2 p15] 00:A7:07.0: PCI device FFFF:FFFF is disabled (not present)
[1.2 p16] 00:A7:08.0: PCI device FFFF:FFFF is disabled (not present)
[1.3 p17] 00:B7:01.0: PCI device 8086:352A is enabled
[1.3 p18] 00:B7:02.0: PCI device FFFF:FFFF is disabled (not present)
[1.3 p19] 00:B7:03.0: PCI device FFFF:FFFF is disabled (not present)
[1.3 p20] 00:B7:04.0: PCI device FFFF:FFFF is disabled (not present)
[1.3 p21] 00:B7:05.0: PCI device FFFF:FFFF is disabled (not present)
[1.3 p22] 00:B7:06.0: PCI device FFFF:FFFF is disabled (not present)
[1.3 p23] 00:B7:07.0: PCI device FFFF:FFFF is disabled (not present)
[1.3 p24] 00:B7:08.0: PCI device FFFF:FFFF is disabled (not present)
[1.4 p25] 00:C7:01.0: PCI device 8086:352A is enabled
[1.4 p26] 00:C7:02.0: PCI device FFFF:FFFF is disabled (not present)
[1.4 p27] 00:C7:03.0: PCI device 8086:352B is enabled
[1.4 p28] 00:C7:04.0: PCI device FFFF:FFFF is disabled (not present)
[1.4 p29] 00:C7:05.0: PCI device 8086:352C is enabled
[1.4 p30] 00:C7:06.0: PCI device FFFF:FFFF is disabled (not present)
[1.4 p31] 00:C7:07.0: PCI device 8086:352D is enabled
[1.4 p32] 00:C7:08.0: PCI device FFFF:FFFF is disabled (not present)
[1.5 p33] 00:D7:01.0: PCI device 8086:352A is enabled
[1.5 p34] 00:D7:02.0: PCI device FFFF:FFFF is disabled (not present)
[1.5 p35] 00:D7:03.0: PCI device 8086:352B is enabled
[1.5 p36] 00:D7:04.0: PCI device FFFF:FFFF is disabled (not present)
[1.5 p37] 00:D7:05.0: PCI device 8086:352C is enabled
[1.5 p38] 00:D7:06.0: PCI device FFFF:FFFF is disabled (not present)
[1.5 p39] 00:D7:07.0: PCI device 8086:352D is enabled
[1.5 p40] 00:D7:08.0: PCI device FFFF:FFFF is disabled (not present)
[1.6 p41] 00:80:01.0: PCI device 8086:352A is enabled
[1.6 p42] 00:80:02.0: PCI device FFFF:FFFF is disabled (not present)
[1.6 p43] 00:80:03.0: PCI device FFFF:FFFF is disabled (not present)
[1.6 p44] 00:80:04.0: PCI device FFFF:FFFF is disabled (not present)
[1.6 p45] 00:80:05.0: PCI device 8086:352C is enabled
[1.6 p46] 00:80:06.0: PCI device FFFF:FFFF is disabled (not present)
[1.6 p47] 00:80:07.0: PCI device FFFF:FFFF is disabled (not present)
[1.6 p48] 00:80:08.0: PCI device FFFF:FFFF is disabled (not present)
Calling IioEarlyIntiazeEntry Start
[0] IioAllocateMmioResource: Seg=0, MaxStackPerSocket=12
[0.0] Temp BUS: 0x00 -> 0x00 | MMIOL: 0x90122000 -> 0x957FFFFF
[0.1] Temp BUS: 0x15 -> 0x15 | MMIOL: 0x95900000 -> 0x9F7FFFFF
[0.2] Temp BUS: 0x26 -> 0x26 | MMIOL: 0x9F900000 -> 0xA93FFFFF
[0.3] Temp BUS: 0x37 -> 0x37 | MMIOL: 0xA9500000 -> 0xB2FFFFFF
[0.4] Temp BUS: 0x48 -> 0x48 | MMIOL: 0xB3100000 -> 0xBCBFFFFF
[0.5] Temp BUS: 0x59 -> 0x59 | MMIOL: 0xBCD00000 -> 0xC67FFFFF
[0.8] Temp BUS: 0x6A -> 0x6A | MMIOL: 0xC6900000 -> 0xC6FFFFFF
[0.9] Temp BUS: 0x6F -> 0x6F | MMIOL: 0xC7100000 -> 0xC77FFFFF
[0.10] Temp BUS: 0x74 -> 0x74 | MMIOL: 0xC7900000 -> 0xC7FFFFFF
[0.11] Temp BUS: 0x79 -> 0x79 | MMIOL: 0xC8100000 -> 0xC87FFFFF
[0] IIO Early Link Training Starting...
Recipy decompressing...
Socket[0] Stack[0] Program RX recipe values START...
Program recipe revision 2.009 (Info : 1.5:, len 2556)
[0] Program RX recipe values END
Recipy decompressing...
Socket[0] Stack[1] Program RX recipe values START...
Program recipe revision 2.009 (Info : 1.5:, len 2966)
[0] Program RX recipe values END
Socket[0] Stack[2] Program RX recipe values START...
Program recipe revision 2.009 (Info : 1.5:, len 2966)
[0] Program RX recipe values END
Socket[0] Stack[3] Program RX recipe values START...
Program recipe revision 2.009 (Info : 1.5:, len 2966)
[0] Program RX recipe values END
Socket[0] Stack[4] Program RX recipe values START...
Program recipe revision 2.009 (Info : 1.5:, len 2966)
[0] Program RX recipe values END
Socket[0] Stack[5] Program RX recipe values START...
Program recipe revision 2.009 (Info : 1.5:, len 2966)
[0] Program RX recipe values END
CXL_IO_PRE_TRAIN_INIT_START
CXL_IO_PRE_TRAIN_INIT_END
FBLP_PRE_TRAIN_INIT_START
FBLP_PRE_TRAIN_INIT_END
[0 p0] IioDmiLinkInit
[0 p0] DMI link speed vector IIO 0xF, PCH 0x7 -> target speed 3
[0] IIO Early Link Training Completed!
[1] IioAllocateMmioResource: Seg=0, MaxStackPerSocket=12
[1.1] Temp BUS: 0x97 -> 0x97 | MMIOL: 0xD1500000 -> 0xD97FFFFF
[1.2] Temp BUS: 0xA7 -> 0xA7 | MMIOL: 0xD9900000 -> 0xE17FFFFF
[1.3] Temp BUS: 0xB7 -> 0xB7 | MMIOL: 0xE1900000 -> 0xE97FFFFF
[1.4] Temp BUS: 0xC7 -> 0xC7 | MMIOL: 0xE9900000 -> 0xF17FFFFF
[1.5] Temp BUS: 0xD7 -> 0xD7 | MMIOL: 0xF1900000 -> 0xF97FFFFF
[1.6] Temp BUS: 0x80 -> 0x80 | MMIOL: 0xC9100000 -> 0xD13FFFFF
[1.8] Temp BUS: 0xE7 -> 0xE7 | MMIOL: 0xF9900000 -> 0xF9FFFFFF
[1.9] Temp BUS: 0xEC -> 0xEC | MMIOL: 0xFA100000 -> 0xFA7FFFFF
[1.10] Temp BUS: 0xF1 -> 0xF1 | MMIOL: 0xFA900000 -> 0xFAFFFFFF
[1.11] Temp BUS: 0xF6 -> 0xF6 | MMIOL: 0xFB100000 -> 0xFB7FFFFF
[1] IIO Early Link Training Starting...
Recipy decompressing...
Recipy decompressing...
Socket[1] Stack[1] Program RX recipe values START...
Program recipe revision 2.009 (Info : 1.5:, len 2966)
[1] Program RX recipe values END
Socket[1] Stack[2] Program RX recipe values START...
Program recipe revision 2.009 (Info : 1.5:, len 2966)
[1] Program RX recipe values END
Socket[1] Stack[3] Program RX recipe values START...
Program recipe revision 2.009 (Info : 1.5:, len 2966)
[1] Program RX recipe values END
Socket[1] Stack[4] Program RX recipe values START...
Program recipe revision 2.009 (Info : 1.5:, len 2966)
[1] Program RX recipe values END
Socket[1] Stack[5] Program RX recipe values START...
Program recipe revision 2.009 (Info : 1.5:, len 2966)
[1] Program RX recipe values END
Socket[1] Stack[6] Program RX recipe values START...
Program recipe revision 2.009 (Info : 1.5:, len 2966)
[1] Program RX recipe values END
CXL_IO_PRE_TRAIN_INIT_START
CXL_IO_PRE_TRAIN_INIT_END
FBLP_PRE_TRAIN_INIT_START
FBLP_PRE_TRAIN_INIT_END
[1] IIO Early Link Training Completed!
IIO CXL Status Socket 0:
[0.1] NotTrained
[0.2] NotTrained
[0.3] NotTrained
[0.4] NotSupportCxlMode
[0.5] NotSupportCxlMode
[0.6] NotSupportCxlMode
[0.7] NotSupportCxlMode
IIO CXL Status Socket 1:
[1.1] NotTrained
[1.2] NotTrained
[1.3] NotTrained
[1.4] NotSupportCxlMode
[1.5] NotSupportCxlMode
[1.6] NotSupportCxlMode
[1.7] NotSupportCxlMode
CXL_NOTIFY_PCODE_START
CXL_NOTIFY_PCODE_END
IIO Early Link Tc/Vc Configuration Start
Final Tc/VC mapping:
[0] Program TC/VC mapping on IIO side
[0] Program/Poll TC/VC mapping on PCH side
Poll TC/VC mapping on IIO side
IIO Early Link Tc/Vc Configuration End
Calling IioEarlyIntiazeEntry Stop
******* Initialize CXL - END *******
******* OOBMSM PreMem Configure - START *******
******* UncoreEnablePeciAccess - START *******
******* UncoreEnablePeciAccess - END *******
******* OOBMSM PreMem Configure - END *******
**KTI Output Structure **
OutD2KCreditConfig: 0 [1:Low,2:Med,3:High]
SnoopThrottleConfig: 0 [0:Dis,1:Low,2:Med,3:High,4:Auto]
OutUpiAffinityEn for CHA and M2M: 0
OutTwoSktTopology : 5
OutM2iosfToUpiAffinity: 1
OutPmonConfig: 2 [1:Reduced,2:Full,3:Auto,0:Disabled]
OutM2IosfPmonAccessControl: 0 [0:Restricted,1:Full,2:Auto]
OutD2kEn: 0
OutLegacyVgaSoc: 0
OutLegacyVgaStack: 0
OutIsocEn: 0
OutHitMeEn: 1
OutSncEn: 4 (SNC4)
OutUmaClustering: 0
OutSysDirectoryModeEn: 1
OutKtiPrefetch: 0
OutXptPrefetch: 0
OutXptRemotePrefetch: 0
OutSncPrefetchEn: 4
OutSncGbAlignRequired: 1
OutIsRouteThrough: 0
OutStaleAtoSOptEn: 2
OutSystemRasType: 6 (ADVANCED)
OutIoDcMode: 5 (IODC_EN_REM_INVITOM_AND_WCILF)
KtiCurrentLinkSpeedMode: 1 (FAST)
OutKtiLinkSpeed: 2 (16.0)
OutKtiLinkL0pEn: 0 (DISABLED)
OutKtiLinkL1En: 1 (ENABLED)
OutKtiFailoverEn: 1 (ENABLED)
OutKtiCrcMode: 0 (16BIT)
OutBoardVsCpuConflict: 0x0
OutKtiAdaptationEnable: 0x0
OutKtiPerLinkL1En (per port):
S0:1 1 1 1
S1:1 1 1 1
S2:0 0 0 0
S3:0 0 0 0
PchPresentBitMap: 0x01
OutKtiFpgaPresent (per socket): S0: 0 S1: 0 S2: 0 S3: 0
OutKtiFpgaEnable (per socket): S0: 0 S1: 0 S2: 0 S3: 0
OutFpgaHomeAgent (per socket): S0: 0 S1: 0 S2: 0 S3: 0
OutFpgaCacheAgent (per socket): S0: 0 S1: 0 S2: 0 S3: 0
OutStackDisableBitMap (per socket): S0: 0x0 S1: 0x0 S2: 0x0 S3: 0x0
mmCfgBase: 0x80000000
mmCfgSize: 0x10000000
mmiolBase: 0x90000000
mmiolSize: 0x6C000000
mmiohBase: 0x00002000
lowGap : 0x20
SecondaryNodeBitMap: 0x00
CpuPaLimit: 0
KtiInternalGlobal:
->SnoopFanoutEn: 0
->SysOsbEn: 1
->D2cEn: 1
->D2kEn: 0
->SnoopFilter: 0
->DualLinksInterleavingMode: 2
->UpiInterleaveMode: 2
->EightSocketTopology: 0
->SnoopFanoutChaInterleaveEn: 0
KtiLinkVnaOverride (per port - final values):
S0:138 138 138 138
S1:138 138 138 138
S2:254 254 254 254
S3:254 254 254 254
IIO STACK rootbus ID mapping table
Stack ID | Root Bus ID
0 ------- 0
1 ------- 1
2 ------- 2
3 ------- 3
4 ------- 4
5 ------- 5
6 ------- 6
7 ------- 7
8 ------- 8
9 ------- 9
10 ------- 10
11 ------- 11
OutDfxPrqBlockEn: 0
OutDfxAeg0CounterLowVal: 40
OutDfxAeg0CounterHighVal: 60
**KTI Output Structure End**
******* KTIRC Exit *******
KTI Init completed! Reset Requested: 0
RC debug buffering, compression, and sync ready
Pipe Init starting...
Pass PIPE_DISPATCH_SYNCH_PSYSHOST to socket 1
Pass PeiPipeFollowerInit
CAR MEM Range 0xFE800000 - 0xFE983B67
Pass pointer to Host: 0xFE800014
Sending address of Memory Policy: 0xFE96FF80
Pass boot mode 0
Send data buffer
Send data dwordcount 60EDA
Send data...complete
CAR MEM Range2 0xFE9DC000 - 0xFE9DFFFF
Send data buffer
Send data dwordcount 1000
Send data...complete
Send data buffer
Send data dwordcount 18F
Send data...complete
N1 Checked into Pipe
Pipe Init completed! Reset Requested: 0
CPU Feature Early Config starting...
CpuInit Start
CpuUncoreInit()
: Get UncoreRatioLimit MaxClrRatio: 24, MinClrRatio: 8, UncoreRatioLimit.Uint32 = 0x818
: Get UncoreRatioLimit MaxClrRatio: 24, MinClrRatio: 8, UncoreRatioLimit.Uint32 = 0x818
:UFS: Update BIOS_SPARE2_PCU Bit[20] = 0 on S0
Write Socket 0 MSR_UNCORE_RATIO_LIMIT.MinClrRatio [14:8] = 8, MSR_UNCORE_RATIO_LIMIT.MaxClrRatio [6:0] = 24
:UFS: Update BIOS_SPARE2_PCU Bit[20] = 0 on S1
Write Socket 1 MSR_UNCORE_RATIO_LIMIT.MinClrRatio [14:8] = 8, MSR_UNCORE_RATIO_LIMIT.MaxClrRatio [6:0] = 24
Get socket PPIN
: PPIN = 22E546CB1AD8E915
Get socket PPIN
: PPIN = 22E548CB80015B4D
:: ProgramProcessorFlexRatio()
:: System Capable : AVX SST-CP SST-BF
1 1 0
:: SstPpCapableSystem : LevelEnableMask MaxLevel
0 00 00
S0_0 FusedCoresMask = 0x0DABBB6EAF4EE9DB FusedCoreCount = 40
GetAllConfigTdpLevels() Enter
S0_0 ConfigTdpLevel(0) IssCoreMask = 0x0DABBB6EAF4EE9DB IssCoreCount = 40
GetAllConfigTdpLevels() Exit
:: S0 MaxRatio : MinRatio : MinOpRatio : ConfigTdpMaxLevel
17 08 05 02
:: S0 Current SST-PP Level : Current SST-PP Lock
00 0
Level : PkgTDP : SSE P1 : AVX2 P1 : AVX3 P1 : Core Count
0 : 000350 : 000017 : 000014 : 000011 : 040, [0] 40
3 : 000000 : 000000 : 000000 : 000000 : 000, [0] 00
4 : 000000 : 000000 : 000000 : 000000 : 000, [0] 00
Level : Turbo Ratio Limit - SSE P1 : AVX2 P1 : AVX3 P1
0 : - : 181818191A1E2023 : 17171718191E2023 : 16161617171D1F22
3 : - : 0000000000000000 : 0000000000000000 : 0000000000000000
4 : - : 0000000000000000 : 0000000000000000 : 0000000000000000
Level : TJMax : CoreMask
0 : 100 : [0] 0DABBB6EAF4EE9DB
3 : 000 : [0] 0000000000000000
4 : 000 : [0] 0000000000000000
Level : SstBf - P1_Hi : P1_Lo : CoreMask
0 : 0000 : 0000 : [0] 0000000000000000
3 : 0000 : 0000 : [0] 0000000000000000
4 : 0000 : 0000 : [0] 0000000000000000
Core Ratio Info
Level : P0 : P1 : Pn : Pm
0 : 000035 : 000017 : 000008 : 000005
3 : 000000 : 000000 : 000000 : 000000
4 : 000000 : 000000 : 000000 : 000000
Uncore Ratio Info
Level : P0 : P1 : Pn : Pm
0 : 000024 : 000014 : 000008 : 000008
3 : 000000 : 000000 : 000000 : 000000
4 : 000000 : 000000 : 000000 : 000000
S1_0 FusedCoresMask = 0x0DB9772F6F4EE9DB FusedCoreCount = 40
GetAllConfigTdpLevels() Enter
S1_0 ConfigTdpLevel(0) IssCoreMask = 0x0DB9772F6F4EE9DB IssCoreCount = 40
GetAllConfigTdpLevels() Exit
:: S1 MaxRatio : MinRatio : MinOpRatio : ConfigTdpMaxLevel
17 08 05 02
:: S1 Current SST-PP Level : Current SST-PP Lock
00 0
Level : PkgTDP : SSE P1 : AVX2 P1 : AVX3 P1 : Core Count
0 : 000350 : 000017 : 000014 : 000011 : 040, [0] 40
3 : 000000 : 000000 : 000000 : 000000 : 000, [0] 00
4 : 000000 : 000000 : 000000 : 000000 : 000, [0] 00
Level : Turbo Ratio Limit - SSE P1 : AVX2 P1 : AVX3 P1
0 : - : 181818191A1E2023 : 17171718191E2023 : 16161617171D1F22
3 : - : 0000000000000000 : 0000000000000000 : 0000000000000000
4 : - : 0000000000000000 : 0000000000000000 : 0000000000000000
Level : TJMax : CoreMask
0 : 100 : [0] 0DB9772F6F4EE9DB
3 : 000 : [0] 0000000000000000
4 : 000 : [0] 0000000000000000
Level : SstBf - P1_Hi : P1_Lo : CoreMask
0 : 0000 : 0000 : [0] 0000000000000000
3 : 0000 : 0000 : [0] 0000000000000000
4 : 0000 : 0000 : [0] 0000000000000000
Core Ratio Info
Level : P0 : P1 : Pn : Pm
0 : 000035 : 000017 : 000008 : 000005
3 : 000000 : 000000 : 000000 : 000000
4 : 000000 : 000000 : 000000 : 000000
Uncore Ratio Info
Level : P0 : P1 : Pn : Pm
0 : 000024 : 000014 : 000008 : 000008
3 : 000000 : 000000 : 000000 : 000000
4 : 000000 : 000000 : 000000 : 000000
:: CommonMaxRatio : CommonMinRatio : Target Ratio
17 08 17
:: IssTdpLevel : AvxP1Level
00 00
:: TargetRatio: 17 is ready (RatioChangeFlag: 0), SstPpCurrentLevel: 0
:: SetActiveCoresAndLpEnableDisable()
:: S0_0 BIST_FAILURE_LOCAL_MASK = 0000000000000000
:: S0 setup input disable = 0000000000000000
:: S0_0 AvailCoresMask = 0DABBB6EAF4EE9DB
:: S0_0 ResolvedCoresMask = 0DABBB6EAF4EE9DB
:: S0_0 DesiredCoresCurrent = 0000000000000000
:: S0_0 BistResultMask = 0000000000000000
:: S0_0 CoreDisableReqMask = 0000000000000000
:: S0_0 NumberOfCoresDisabledMask = 0000000000000000
:: CheckCpuBist = 1
:: CoreFailover = 1
[s0_0] MaxLpEnable = 0, LpCapable = 1, MaxLpEnable knob = 0, Lock Status = 0
S0_0 MaxEnabledCores = 0
S0_0 FusedCoreCount = 40
S0_0 NonSparingCoresMask= FFFFFFFFFFFFFFFF
:: S0_0 DesiredCoresNew = 0000000000000000
:: S1_0 BIST_FAILURE_LOCAL_MASK = 0000000000000000
:: S1 setup input disable = 0000000000000000
:: S1_0 AvailCoresMask = 0DB9772F6F4EE9DB
:: S1_0 ResolvedCoresMask = 0DB9772F6F4EE9DB
:: S1_0 DesiredCoresCurrent = 0000000000000000
:: S1_0 BistResultMask = 0000000000000000
:: S1_0 CoreDisableReqMask = 0000000000000000
:: S1_0 NumberOfCoresDisabledMask = 0000000000000000
:: CheckCpuBist = 1
:: CoreFailover = 1
[s1_0] MaxLpEnable = 0, LpCapable = 1, MaxLpEnable knob = 0, Lock Status = 0
S1_0 MaxEnabledCores = 0
S1_0 FusedCoreCount = 40
S1_0 NonSparingCoresMask= FFFFFFFFFFFFFFFF
:: S1_0 DesiredCoresNew = 0000000000000000
CPUMISC Current S 0:
ITBM is not supported
CPUMISC Current S 1:
ITBM is not supported
CPU Feature Early Config completed! Reset Requested: 0
PrevBootErrors: No Memory MCA Error Found
PrevBootErrors - Valid MCA UC entries: 0
[CSR PCI BAR Access] Address:0xFFFFFFFF000000D4; PCI Cmd: 0xFFFF
[CSR PCI BAR Access] Address:0xFFFFFFFF000000D4; PCI Cmd: 0xFFFF
START_MRC_RUN
Detect ColdBootSlowRequiredFlag and will force slow cold boot.
N0: Bus Instance = 0; I2C speed = 3; I3C speed = 2; Bus mode = 0
N0: Bus Instance = 1; I2C speed = 3; I3C speed = 2; Bus mode = 0
N0: Bus Instance = 0; I2C speed = 3; I3C speed = 2; Bus mode = 1
N0: Bus Instance = 0; I2C speed = 3; I3C speed = 2; Bus mode = 1
N0: Bus Instance = 0; I2C speed = 3; I3C speed = 2; Bus mode = 1
N0: Bus Instance = 0; I2C speed = 3; I3C speed = 2; Bus mode = 1
N0: Bus Instance = 0; I2C speed = 3; I3C speed = 2; Bus mode = 1
N0: Bus Instance = 0; I2C speed = 3; I3C speed = 2; Bus mode = 1
N0: Bus Instance = 1; I2C speed = 3; I3C speed = 2; Bus mode = 1
N0: Bus Instance = 1; I2C speed = 3; I3C speed = 2; Bus mode = 1
N0: Bus Instance = 1; I2C speed = 3; I3C speed = 2; Bus mode = 1
N0: Bus Instance = 1; I2C speed = 3; I3C speed = 2; Bus mode = 1
N0: Bus Instance = 1; I2C speed = 3; I3C speed = 2; Bus mode = 1
N0: Bus Instance = 1; I2C speed = 3; I3C speed = 2; Bus mode = 1
N0: Bus Instance = 0; I2C speed = 3; I3C speed = 2; Bus mode = 0
N0: Bus Instance = 0; I2C speed = 3; I3C speed = 2; Bus mode = 0
N0: Bus Instance = 0; I2C speed = 3; I3C speed = 2; Bus mode = 0
N0: Bus Instance = 0; I2C speed = 3; I3C speed = 2; Bus mode = 0
N0: Bus Instance = 0; I2C speed = 3; I3C speed = 2; Bus mode = 0
N0: Bus Instance = 0; I2C speed = 3; I3C speed = 2; Bus mode = 0
N0: Bus Instance = 1; I2C speed = 3; I3C speed = 2; Bus mode = 0
N0: Bus Instance = 1; I2C speed = 3; I3C speed = 2; Bus mode = 0
N0: Bus Instance = 1; I2C speed = 3; I3C speed = 2; Bus mode = 0
N0: Bus Instance = 1; I2C speed = 3; I3C speed = 2; Bus mode = 0
N0: Bus Instance = 1; I2C speed = 3; I3C speed = 2; Bus mode = 0
N0: Bus Instance = 1; I2C speed = 3; I3C speed = 2; Bus mode = 0
N0: Dimm changed.
Processors changed.
Get socket PPIN
: PPIN = 22E546CB1AD8E915
setupChanged: 1
Clearing the MRC NVRAM structure.
bootMode = NormalBoot
subBootMode = ColdBoot
[ScktId: 0] Parallel Mode Dispatch -- Started
Dispatch N1 for MemInit
N1 Entering MRC
Detect ColdBootSlowRequiredFlag and will force slow cold boot.
N1: Bus Instance = 0; I2C speed = 3; I3C speed = 2; Bus mode = 0
N1: Bus Instance = 1; I2C speed = 3; I3C speed = 2; Bus mode = 0
N1: Bus Instance = 0; I2C speed = 3; I3C speed = 2; Bus mode = 1
N1: Bus Instance = 0; I2C speed = 3; I3C speed = 2; Bus mode = 1
N1: Bus Instance = 0; I2C speed = 3; I3C speed = 2; Bus mode = 1
N1: Bus Instance = 0; I2C speed = 3; I3C speed = 2; Bus mode = 1
N1: Bus Instance = 0; I2C speed = 3; I3C speed = 2; Bus mode = 1
N1: Bus Instance = 0; I2C speed = 3; I3C speed = 2; Bus mode = 1
N1: Bus Instance = 1; I2C speed = 3; I3C speed = 2; Bus mode = 1
N1: Bus Instance = 1; I2C speed = 3; I3C speed = 2; Bus mode = 1
N1: Bus Instance = 1; I2C speed = 3; I3C speed = 2; Bus mode = 1
N1: Bus Instance = 1; I2C speed = 3; I3C speed = 2; Bus mode = 1
N1: Bus Instance = 1; I2C speed = 3; I3C speed = 2; Bus mode = 1
N1: Bus Instance = 1; I2C speed = 3; I3C speed = 2; Bus mode = 1
N1: Bus Instance = 0; I2C speed = 3; I3C speed = 2; Bus mode = 0
N1: Bus Instance = 0; I2C speed = 3; I3C speed = 2; Bus mode = 0
N1: Bus Instance = 0; I2C speed = 3; I3C speed = 2; Bus mode = 0
N1: Bus Instance = 0; I2C speed = 3; I3C speed = 2; Bus mode = 0
N1: Bus Instance = 0; I2C speed = 3; I3C speed = 2; Bus mode = 0
N1: Bus Instance = 0; I2C speed = 3; I3C speed = 2; Bus mode = 0
N1: Bus Instance = 1; I2C speed = 3; I3C speed = 2; Bus mode = 0
N1: Bus Instance = 1; I2C speed = 3; I3C speed = 2; Bus mode = 0
N1: Bus Instance = 1; I2C speed = 3; I3C speed = 2; Bus mode = 0
N1: Bus Instance = 1; I2C speed = 3; I3C speed = 2; Bus mode = 0
N1: Bus Instance = 1; I2C speed = 3; I3C speed = 2; Bus mode = 0
N1: Bus Instance = 1; I2C speed = 3; I3C speed = 2; Bus mode = 0
N1: Dimm changed.
Get socket PPIN
: PPIN = 22E548CB80015B4D
setupChanged: 1
Clearing the MRC NVRAM structure.
bootMode = NormalBoot
subBootMode = ColdBoot
[ScktId: 1] Parallel Mode Dispatch -- Started
[ScktId: 0] Parallel Mode Dispatch - 203ms
[ScktId: 1] Parallel Mode Dispatch - 4ms
[ScktId: 0] Pipe Sync AP Boot Mode -- Started
[ScktId: 1] Pipe Sync AP Boot Mode -- Started
[ScktId: 0] Pipe Sync AP Boot Mode - 13ms
[ScktId: 1] Pipe Sync AP Boot Mode - 9ms
N1 Checked into Pipe
[ScktId: 0] Select Boot Mode -- Started
DetermineBootMode: ColdBoot
[ScktId: 0] Select Boot Mode - 8ms
[ScktId: 1] Pipe Sync SBSP Boot Mode -- Started
[ScktId: 0] Pipe Sync SBSP Boot Mode -- Started
[ScktId: 1] Pipe Sync SBSP Boot Mode - 9ms
[ScktId: 0] Pipe Sync SBSP Boot Mode - 9ms
[ScktId: 1] Init Structures Late -- Started
[ScktId: 0] Init Structures Late -- Started
[ScktId: 1] Init Structures Late - 8ms
[ScktId: 0] Init Structures Late - 8ms
[ScktId: 1] Detect DIMM Configuration -- Started
[ScktId: 0] Detect DIMM Configuration -- Started
N1: Bus Instance = 0; I2C speed = 3; I3C speed = 2; Bus mode = 0
N0: Bus Instance = 0; I2C speed = 3; I3C speed = 2; Bus mode = 0
N1: Bus Instance = 0; I2C speed = 3; I3C speed = 2; Bus mode = 0
N0: Bus Instance = 0; I2C speed = 3; I3C speed = 2; Bus mode = 0
N1: Bus Instance = 0; I2C speed = 3; I3C speed = 2; Bus mode = 0
N0: Bus Instance = 0; I2C speed = 3; I3C speed = 2; Bus mode = 0
N1: Bus Instance = 0; I2C speed = 3; I3C speed = 2; Bus mode = 0
N0: Bus Instance = 0; I2C speed = 3; I3C speed = 2; Bus mode = 0
N1: Bus Instance = 0; I2C speed = 3; I3C speed = 2; Bus mode = 0
N0: Bus Instance = 0; I2C speed = 3; I3C speed = 2; Bus mode = 0
N1: Bus Instance = 0; I2C speed = 3; I3C speed = 2; Bus mode = 0
N0: Bus Instance = 0; I2C speed = 3; I3C speed = 2; Bus mode = 0
N1: Bus Instance = 1; I2C speed = 3; I3C speed = 2; Bus mode = 0
N0: Bus Instance = 1; I2C speed = 3; I3C speed = 2; Bus mode = 0
N1: Bus Instance = 1; I2C speed = 3; I3C speed = 2; Bus mode = 0
N0: Bus Instance = 1; I2C speed = 3; I3C speed = 2; Bus mode = 0
N1: Bus Instance = 1; I2C speed = 3; I3C speed = 2; Bus mode = 0
N0: Bus Instance = 1; I2C speed = 3; I3C speed = 2; Bus mode = 0
N1: Bus Instance = 1; I2C speed = 3; I3C speed = 2; Bus mode = 0
N0: Bus Instance = 1; I2C speed = 3; I3C speed = 2; Bus mode = 0
N1: Bus Instance = 1; I2C speed = 3; I3C speed = 2; Bus mode = 0
N0: Bus Instance = 1; I2C speed = 3; I3C speed = 2; Bus mode = 0
N1: Bus Instance = 1; I2C speed = 3; I3C speed = 2; Bus mode = 0
N0: Bus Instance = 1; I2C speed = 3; I3C speed = 2; Bus mode = 0
[ScktId: 1] Detect DIMM Configuration - 319ms
[ScktId: 0] Detect DIMM Configuration - 321ms
[ScktId: 1] Pipe Sync AP Data -- Started
[ScktId: 0] Pipe Sync AP Data -- Started
[ScktId: 0] Pipe Sync AP Data - 21ms
[ScktId: 1] Pipe Sync AP Data - 25ms
N1 Checked into Pipe
[ScktId: 0] Check POR Compatibility -- Started
[ScktId: 0] Check POR Compatibility - 6ms
N1 Checked into Pipe
[ScktId: 0] HBM Init Clock -- Started
[ScktId: 0] HBM Init Clock - 5ms
N1 Checked into Pipe
[ScktId: 0] Initialize clocks for all MemSs -- Started
N0: Platform segment mapping found. UseServerPor: 1; SegmentType: 7; ChopType: 3; PlatformSegment: 0
N0: Platform segment mapping found. UseServerPor: 1; SegmentType: 7; ChopType: 3; PlatformSegment: 0
N0: Platform segment mapping found. UseServerPor: 1; SegmentType: 7; ChopType: 3; PlatformSegment: 0
N0: Platform segment mapping found. UseServerPor: 1; SegmentType: 7; ChopType: 3; PlatformSegment: 0
N0: Platform segment mapping found. UseServerPor: 1; SegmentType: 7; ChopType: 3; PlatformSegment: 0
N0: Platform segment mapping found. UseServerPor: 1; SegmentType: 7; ChopType: 3; PlatformSegment: 0
N0: Platform segment mapping found. UseServerPor: 1; SegmentType: 7; ChopType: 3; PlatformSegment: 0
N0: Platform segment mapping found. UseServerPor: 1; SegmentType: 7; ChopType: 3; PlatformSegment: 0
Memory behind processor 0 running at DDR-4800
Memory behind processor 1 running at DDR-4800
[ScktId: 0] Initialize clocks for all MemSs - 96ms
[ScktId: 1] Pipe Sync SBSP Data -- Started
[ScktId: 0] Pipe Sync SBSP Data -- Started
[ScktId: 1] Pipe Sync SBSP Data - 21ms
[ScktId: 0] Pipe Sync SBSP Data - 21ms
[ScktId: 1] Unlock Memory -- Started
[ScktId: 0] Unlock Memory -- Started
[ScktId: 1] Unlock Memory - 7ms
[ScktId: 0] Unlock Memory - 7ms
[ScktId: 1] Pipe Sync AP Data -- Started
[ScktId: 0] Pipe Sync AP Data -- Started
[ScktId: 0] Pipe Sync AP Data - 21ms
[ScktId: 1] Pipe Sync AP Data - 24ms
[ScktId: 0] HBM Pre-Training -- Started
[ScktId: 1] HBM Pre-Training -- Started
HBMIO flows: set to 0xFFFFFF7F!
HBMIO flows: set to 0xFFFFFF7F!
Get socket PPIN
Get socket PPIN
: PPIN = 22E546CB1AD8E915
: PPIN = 22E548CB80015B4D
HBM frequency = 3200MHz
HBM frequency = 3200MHz
Hbm Policy Option: DisableRefreshPostpone = 0
Socket1 HbmIo0, HW Rev: 0x110, FW Rev: 0x2180, Patch ID: 0x0, Unique ID: 0x18, Product ID: 0x2
Hbm Policy Option: RefreshMode = 1
Socket1 HbmIo1, HW Rev: 0x110, FW Rev: 0x2180, Patch ID: 0x0, Unique ID: 0x18, Product ID: 0x2
Socket0 HbmIo0, HW Rev: 0x110, FW Rev: 0x2180, Patch ID: 0x0, Unique ID: 0x18, Product ID: 0x2
Socket1 HbmIo2, HW Rev: 0x110, FW Rev: 0x2180, Patch ID: 0x0, Unique ID: 0x18, Product ID: 0x2
Socket0 HbmIo1, HW Rev: 0x110, FW Rev: 0x2180, Patch ID: 0x0, Unique ID: 0x18, Product ID: 0x2
Socket1 HbmIo3, HW Rev: 0x110, FW Rev: 0x2180, Patch ID: 0x0, Unique ID: 0x18, Product ID: 0x2
Socket0 HbmIo2, HW Rev: 0x110, FW Rev: 0x2180, Patch ID: 0x0, Unique ID: 0x18, Product ID: 0x2
[ScktId: 1] HBM Pre-Training - 109ms
Socket0 HbmIo3, HW Rev: 0x110, FW Rev: 0x2180, Patch ID: 0x0, Unique ID: 0x18, Product ID: 0x2
[ScktId: 1] AP HBM Information -- Started
[ScktId: 0] HBM Pre-Training - 141ms
[ScktId: 0] AP HBM Information -- Started
[ScktId: 0] AP HBM Information - 5ms
[ScktId: 1] AP HBM Information - 25ms
[ScktId: 0] Pipe Sync SBSP Status -- Started
[ScktId: 1] Pipe Sync SBSP Status -- Started
[ScktId: 1] Pipe Sync SBSP Status - 8ms
[ScktId: 0] Pipe Sync SBSP Status - 12ms
[ScktId: 1] Check XMP -- Started
[ScktId: 0] Check XMP -- Started
[ScktId: 1] Check XMP - 7ms
[ScktId: 0] Check XMP - 6ms
N1 Checked into Pipe
[ScktId: 0] Set Vdd -- Started
[ScktId: 0] Set Vdd - 5ms
[ScktId: 1] Power on Memory -- Started
[ScktId: 0] Power on Memory -- Started
N1.C00.D0: PMIC in Secure Mode, PMIC voltage programming aborted!
N0.C00.D0: PMIC in Secure Mode, PMIC voltage programming aborted!
N1.C02.D0: PMIC in Secure Mode, PMIC voltage programming aborted!
N0.C02.D0: PMIC in Secure Mode, PMIC voltage programming aborted!
N1.C04.D0: PMIC in Secure Mode, PMIC voltage programming aborted!
N0.C04.D0: PMIC in Secure Mode, PMIC voltage programming aborted!
N1.C06.D0: PMIC in Secure Mode, PMIC voltage programming aborted!
N0.C06.D0: PMIC in Secure Mode, PMIC voltage programming aborted!
[ScktId: 1] Power on Memory - 216ms
[ScktId: 0] Power on Memory - 223ms
[ScktId: 1] Ddrio Power Status Check -- Started
[ScktId: 0] Ddrio Power Status Check -- Started
[ScktId: 1] Ddrio Power Status Check - 8ms
[ScktId: 0] Ddrio Power Status Check - 9ms
[ScktId: 1] Pipe Sync AP Data -- Started
[ScktId: 0] Pipe Sync AP Data -- Started
[ScktId: 0] Pipe Sync AP Data - 21ms
[ScktId: 1] Pipe Sync AP Data - 25ms
N1 Checked into Pipe
[ScktId: 0] Configure DIMM Ranks -- Started
[ScktId: 0] Configure DIMM Ranks - 6ms
[ScktId: 1] Pipe Sync SBSP Data -- Started
[ScktId: 0] Pipe Sync SBSP Data -- Started
[ScktId: 1] Pipe Sync SBSP Data - 21ms
[ScktId: 0] Pipe Sync SBSP Data - 21ms
[ScktId: 1] Initialize Throttling Early -- Started
[ScktId: 0] Initialize Throttling Early -- Started
[ScktId: 1] Initialize Throttling Early - 9ms
[ScktId: 0] Initialize Throttling Early - 10ms
[ScktId: 1] Initialize Memory -- Started
[ScktId: 0] Initialize Memory -- Started
[ScktId: 1] Initialize Memory - 8ms
[ScktId: 0] Initialize Memory - 8ms
[ScktId: 1] Gather SPD Data -- Started
[ScktId: 0] Gather SPD Data -- Started
N1: Bus Instance = 0; I2C speed = 3; I3C speed = 2; Bus mode = 0
N0: Bus Instance = 0; I2C speed = 3; I3C speed = 2; Bus mode = 0
N1: Bus Instance = 0; I2C speed = 3; I3C speed = 2; Bus mode = 1
N0: Bus Instance = 0; I2C speed = 3; I3C speed = 2; Bus mode = 1
N1: I3C Instance 0: Switch to I3C mode - Status = Success
N0: I3C Instance 0: Switch to I3C mode - Status = Success
N1: Bus Instance = 1; I2C speed = 3; I3C speed = 2; Bus mode = 0
N0: Bus Instance = 1; I2C speed = 3; I3C speed = 2; Bus mode = 0
N1: Bus Instance = 1; I2C speed = 3; I3C speed = 2; Bus mode = 1
N0: Bus Instance = 1; I2C speed = 3; I3C speed = 2; Bus mode = 1
N1: I3C Instance 1: Switch to I3C mode - Status = Success
N0: I3C Instance 1: Switch to I3C mode - Status = Success
[ScktId: 1] Gather SPD Data - 86ms
[ScktId: 1] Socket DIMM Information -- Started
[ScktId: 0] Gather SPD Data - 88ms
==========================================================================================================================================================================
START_SOCKET_1_DIMMINFO_TABLE
SPR Ex - Socket 2S
==========================================================================================================================================================================
S| Channel 0 | Channel 1 | Channel 2 | Channel 3 | Channel 4 | Channel 5 | Channel 6 | Channel 7 |
==========================================================================================================================================================================
0| DIMM: Micron | Not installed | DIMM: Micron | Not installed | DIMM: Micron | Not installed | DIMM: Micron | Not installed |
| DRAM: Micron | | DRAM: Micron | | DRAM: Micron | | DRAM: Micron | |
| RCD: IDT | | RCD: IDT | | RCD: IDT | | RCD: IDT | |
|RCD Rev: 0x33 | |RCD Rev: 0x33 | |RCD Rev: 0x33 | |RCD Rev: 0x33 | |
| DB Ven: N/A | | DB Ven: N/A | | DB Ven: N/A | | DB Ven: N/A | |
| DB Rev: N/A | | DB Rev: N/A | | DB Rev: N/A | | DB Rev: N/A | |
| PMIC: MPS | | PMIC: MPS | | PMIC: MPS | | PMIC: MPS | |
|PMICRev: 0x12 | |PMICRev: 0x12 | |PMICRev: 0x12 | |PMICRev: 0x12 | |
|SPD Dev: IDT | |SPD Dev: IDT | |SPD Dev: IDT | |SPD Dev: IDT | |
|Dev Rev: 0x21 | |Dev Rev: 0x21 | |Dev Rev: 0x21 | |Dev Rev: 0x21 | |
| SPD BL: 0.9 | | SPD BL: 0.9 | | SPD BL: 0.9 | | SPD BL: 0.9 | |
| TSOD: IDT | | TSOD: IDT | | TSOD: IDT | | TSOD: IDT | |
|TSODRev: 0x12 | |TSODRev: 0x12 | |TSODRev: 0x12 | |TSODRev: 0x12 | |
| | | | | | | | |
| 32GB( 16Gbx4 SR)| | 32GB( 16Gbx4 SR)| | 32GB( 16Gbx4 SR)| | 32GB( 16Gbx4 SR)| |
| DDR5 RDIMM R/C-F | | DDR5 RDIMM R/C-F | | DDR5 RDIMM R/C-F | | DDR5 RDIMM R/C-F | |
| 4800 39-39-39 | | 4800 39-39-39 | | 4800 39-39-39 | | 4800 39-39-39 | |
| ww51 2021 | | ww51 2021 | | ww51 2021 | | ww51 2021 | |
|MTC18F1045S1PC48BA2 | |MTC18F1045S1PC48BA2 | |MTC18F1045S1PC48BA2 | |MTC18F1045S1PC48BA2 | |
| | | | | | | | |
|0x002C0F2151336C7DD8| |0x002C0F2151336C7E17| |0x002C0F2151336C7DDA| |0x002C0F2151336C7E33| |
| | | | | | | | |
--------------------------------------------------------------------------------------------------------------------------------------------------------------------------
1| Not installed | Not installed | Not installed | Not installed | Not installed | Not installed | Not installed | Not installed |
--------------------------------------------------------------------------------------------------------------------------------------------------------------------------
STOP_SOCKET_1_DIMMINFO_TABLE
==========================================================================================================================================================================
[ScktId: 0] Socket DIMM Information -- Started
[ScktId: 1] Socket DIMM Information - 580ms
==========================================================================================================================================================================
START_SOCKET_0_DIMMINFO_TABLE
SPR Ex - Socket 2S
==========================================================================================================================================================================
S| Channel 0 | Channel 1 | Channel 2 | Channel 3 | Channel 4 | Channel 5 | Channel 6 | Channel 7 |
==========================================================================================================================================================================
0| DIMM: Micron | Not installed | DIMM: Micron | Not installed | DIMM: Micron | Not installed | DIMM: Micron | Not installed |
| DRAM: Micron | | DRAM: Micron | | DRAM: Micron | | DRAM: Micron | |
| RCD: IDT | | RCD: IDT | | RCD: IDT | | RCD: IDT | |
|RCD Rev: 0x33 | |RCD Rev: 0x33 | |RCD Rev: 0x33 | |RCD Rev: 0x33 | |
| DB Ven: N/A | | DB Ven: N/A | | DB Ven: N/A | | DB Ven: N/A | |
| DB Rev: N/A | | DB Rev: N/A | | DB Rev: N/A | | DB Rev: N/A | |
| PMIC: MPS | | PMIC: MPS | | PMIC: MPS | | PMIC: MPS | |
|PMICRev: 0x12 | |PMICRev: 0x12 | |PMICRev: 0x12 | |PMICRev: 0x12 | |
|SPD Dev: IDT | |SPD Dev: IDT | |SPD Dev: IDT | |SPD Dev: IDT | |
|Dev Rev: 0x21 | |Dev Rev: 0x21 | |Dev Rev: 0x21 | |Dev Rev: 0x21 | |
| SPD BL: 0.9 | | SPD BL: 0.9 | | SPD BL: 0.9 | | SPD BL: 0.9 | |
| TSOD: IDT | | TSOD: IDT | | TSOD: IDT | | TSOD: IDT | |
|TSODRev: 0x12 | |TSODRev: 0x12 | |TSODRev: 0x12 | |TSODRev: 0x12 | |
| | | | | | | | |
| 32GB( 16Gbx4 SR)| | 32GB( 16Gbx4 SR)| | 32GB( 16Gbx4 SR)| | 32GB( 16Gbx4 SR)| |
| DDR5 RDIMM R/C-F | | DDR5 RDIMM R/C-F | | DDR5 RDIMM R/C-F | | DDR5 RDIMM R/C-F | |
| 4800 39-39-39 | | 4800 39-39-39 | | 4800 39-39-39 | | 4800 39-39-39 | |
| ww51 2021 | | ww51 2021 | | ww51 2021 | | ww51 2021 | |
|MTC18F1045S1PC48BA2 | |MTC18F1045S1PC48BA2 | |MTC18F1045S1PC48BA2 | |MTC18F1045S1PC48BA2 | |
| | | | | | | | |
|0x002C0F2151336C7E2C| |0x002C0F2151336C7E24| |0x002C0F2151336C7E3A| |0x002C0F2151336C7E3F| |
| | | | | | | | |
--------------------------------------------------------------------------------------------------------------------------------------------------------------------------
1| Not installed | Not installed | Not installed | Not installed | Not installed | Not installed | Not installed | Not installed |
--------------------------------------------------------------------------------------------------------------------------------------------------------------------------
STOP_SOCKET_0_DIMMINFO_TABLE
==========================================================================================================================================================================
[ScktId: 1] Early Configuration -- Started
[ScktId: 0] Socket DIMM Information - 1153ms
N1.C00: MCSCRAMBLE_SEED_SEL_MCDDC_DP_REG access function - average write latency = 419 ns
[ScktId: 0] Early Configuration -- Started
N1.C01: MCSCRAMBLE_SEED_SEL_MCDDC_DP_REG access function - average write latency = 400 ns
N0.C00: MCSCRAMBLE_SEED_SEL_MCDDC_DP_REG access function - average write latency = 333 ns
N1.C02: MCSCRAMBLE_SEED_SEL_MCDDC_DP_REG access function - average write latency = 510 ns
N0.C01: MCSCRAMBLE_SEED_SEL_MCDDC_DP_REG access function - average write latency = 349 ns
N1.C03: MCSCRAMBLE_SEED_SEL_MCDDC_DP_REG access function - average write latency = 524 ns
N0.C02: MCSCRAMBLE_SEED_SEL_MCDDC_DP_REG access function - average write latency = 440 ns
N1.C04: MCSCRAMBLE_SEED_SEL_MCDDC_DP_REG access function - average write latency = 561 ns
N0.C03: MCSCRAMBLE_SEED_SEL_MCDDC_DP_REG access function - average write latency = 440 ns
N1.C05: MCSCRAMBLE_SEED_SEL_MCDDC_DP_REG access function - average write latency = 583 ns
N0.C04: MCSCRAMBLE_SEED_SEL_MCDDC_DP_REG access function - average write latency = 529 ns
N1.C06: MCSCRAMBLE_SEED_SEL_MCDDC_DP_REG access function - average write latency = 686 ns
N0.C05: MCSCRAMBLE_SEED_SEL_MCDDC_DP_REG access function - average write latency = 509 ns
N1.C07: MCSCRAMBLE_SEED_SEL_MCDDC_DP_REG access function - average write latency = 675 ns
N0.C06: MCSCRAMBLE_SEED_SEL_MCDDC_DP_REG access function - average write latency = 624 ns
N1.C00: MCSCRAMBLE_SEED_SEL_MCDDC_DP_REG access function - average read latency = 373 ns
N0.C07: MCSCRAMBLE_SEED_SEL_MCDDC_DP_REG access function - average write latency = 603 ns
N1.C01: MCSCRAMBLE_SEED_SEL_MCDDC_DP_REG access function - average read latency = 361 ns
N0.C00: MCSCRAMBLE_SEED_SEL_MCDDC_DP_REG access function - average read latency = 318 ns
N1.C02: MCSCRAMBLE_SEED_SEL_MCDDC_DP_REG access function - average read latency = 463 ns
N0.C01: MCSCRAMBLE_SEED_SEL_MCDDC_DP_REG access function - average read latency = 328 ns
N1.C03: MCSCRAMBLE_SEED_SEL_MCDDC_DP_REG access function - average read latency = 475 ns
N0.C02: MCSCRAMBLE_SEED_SEL_MCDDC_DP_REG access function - average read latency = 416 ns
N1.C04: MCSCRAMBLE_SEED_SEL_MCDDC_DP_REG access function - average read latency = 528 ns
N0.C03: MCSCRAMBLE_SEED_SEL_MCDDC_DP_REG access function - average read latency = 418 ns
N1.C05: MCSCRAMBLE_SEED_SEL_MCDDC_DP_REG access function - average read latency = 537 ns
N0.C04: MCSCRAMBLE_SEED_SEL_MCDDC_DP_REG access function - average read latency = 503 ns
N1.C06: MCSCRAMBLE_SEED_SEL_MCDDC_DP_REG access function - average read latency = 638 ns
N0.C05: MCSCRAMBLE_SEED_SEL_MCDDC_DP_REG access function - average read latency = 489 ns
N1.C07: MCSCRAMBLE_SEED_SEL_MCDDC_DP_REG access function - average read latency = 630 ns
N0.C06: MCSCRAMBLE_SEED_SEL_MCDDC_DP_REG access function - average read latency = 599 ns
S1 TME CPUID = 1
S1 TmeActivated = 0
S1 TME CPUID = 1
S1 TmeActivated = 0
N0.C07: MCSCRAMBLE_SEED_SEL_MCDDC_DP_REG access function - average read latency = 583 ns
S1 TME CPUID = 1
S0 TME CPUID = 1
S1 TmeActivated = 0
S0 TmeActivated = 0
S1 TME CPUID = 1
S0 TME CPUID = 1
S1 TmeActivated = 0
S0 TmeActivated = 0
tRRDD -- MinVal = 0x2, value = 0x0, adjusted to MinVal.
S0 TME CPUID = 1
tWWDD -- MinVal = 0x2, value = 0x0, adjusted to MinVal.
S0 TmeActivated = 0
tRWDD -- MinVal = 0x2, value = 0x0, adjusted to MinVal.
S0 TME CPUID = 1
tWRDD -- MinVal = 0x2, value = 0x0, adjusted to MinVal.
S0 TmeActivated = 0
tRRDS -- MinVal = 0x2, value = 0x0, adjusted to MinVal.
tRRDD -- MinVal = 0x2, value = 0x0, adjusted to MinVal.
tWWDS -- MinVal = 0x2, value = 0x0, adjusted to MinVal.
tWWDD -- MinVal = 0x2, value = 0x0, adjusted to MinVal.
tRWDS -- MinVal = 0x2, value = 0x0, adjusted to MinVal.
tRWDD -- MinVal = 0x2, value = 0x0, adjusted to MinVal.
tRRDS -- MinVal = 0x2, value = 0x0, adjusted to MinVal.
tWRDD -- MinVal = 0x2, value = 0x0, adjusted to MinVal.
tRRDD -- MinVal = 0x2, value = 0x0, adjusted to MinVal.
tRRDS -- MinVal = 0x2, value = 0x0, adjusted to MinVal.
tWWDD -- MinVal = 0x2, value = 0x0, adjusted to MinVal.
tWWDS -- MinVal = 0x2, value = 0x0, adjusted to MinVal.
tRWDD -- MinVal = 0x2, value = 0x0, adjusted to MinVal.
tRWDS -- MinVal = 0x2, value = 0x0, adjusted to MinVal.
tWRDD -- MinVal = 0x2, value = 0x0, adjusted to MinVal.
tRRDS -- MinVal = 0x2, value = 0x0, adjusted to MinVal.
tRRDS -- MinVal = 0x2, value = 0x0, adjusted to MinVal.
tRRDD -- MinVal = 0x2, value = 0x0, adjusted to MinVal.
tWWDS -- MinVal = 0x2, value = 0x0, adjusted to MinVal.
tWWDD -- MinVal = 0x2, value = 0x0, adjusted to MinVal.
tRWDS -- MinVal = 0x2, value = 0x0, adjusted to MinVal.
tRWDD -- MinVal = 0x2, value = 0x0, adjusted to MinVal.
tRRDS -- MinVal = 0x2, value = 0x0, adjusted to MinVal.
tWRDD -- MinVal = 0x2, value = 0x0, adjusted to MinVal.
tRRDD -- MinVal = 0x2, value = 0x0, adjusted to MinVal.
tRRDS -- MinVal = 0x2, value = 0x0, adjusted to MinVal.
tWWDD -- MinVal = 0x2, value = 0x0, adjusted to MinVal.
tWWDS -- MinVal = 0x2, value = 0x0, adjusted to MinVal.
tRWDD -- MinVal = 0x2, value = 0x0, adjusted to MinVal.
tRWDS -- MinVal = 0x2, value = 0x0, adjusted to MinVal.
tWRDD -- MinVal = 0x2, value = 0x0, adjusted to MinVal.
tRRDS -- MinVal = 0x2, value = 0x0, adjusted to MinVal.
tRRDS -- MinVal = 0x2, value = 0x0, adjusted to MinVal.
tRRDD -- MinVal = 0x2, value = 0x0, adjusted to MinVal.
tWWDS -- MinVal = 0x2, value = 0x0, adjusted to MinVal.
tWWDD -- MinVal = 0x2, value = 0x0, adjusted to MinVal.
tRWDS -- MinVal = 0x2, value = 0x0, adjusted to MinVal.
tRWDD -- MinVal = 0x2, value = 0x0, adjusted to MinVal.
tRRDS -- MinVal = 0x2, value = 0x0, adjusted to MinVal.
tWRDD -- MinVal = 0x2, value = 0x0, adjusted to MinVal.
tRRDD -- MinVal = 0x2, value = 0x0, adjusted to MinVal.
tRRDS -- MinVal = 0x2, value = 0x0, adjusted to MinVal.
tWWDD -- MinVal = 0x2, value = 0x0, adjusted to MinVal.
tWWDS -- MinVal = 0x2, value = 0x0, adjusted to MinVal.
tRWDD -- MinVal = 0x2, value = 0x0, adjusted to MinVal.
tRWDS -- MinVal = 0x2, value = 0x0, adjusted to MinVal.
tWRDD -- MinVal = 0x2, value = 0x0, adjusted to MinVal.
tRRDS -- MinVal = 0x2, value = 0x0, adjusted to MinVal.
tRRDS -- MinVal = 0x2, value = 0x0, adjusted to MinVal.
tRRDD -- MinVal = 0x2, value = 0x0, adjusted to MinVal.
tWWDS -- MinVal = 0x2, value = 0x0, adjusted to MinVal.
tWWDD -- MinVal = 0x2, value = 0x0, adjusted to MinVal.
tRWDS -- MinVal = 0x2, value = 0x0, adjusted to MinVal.
tRWDD -- MinVal = 0x2, value = 0x0, adjusted to MinVal.
tRRDS -- MinVal = 0x2, value = 0x0, adjusted to MinVal.
tWRDD -- MinVal = 0x2, value = 0x0, adjusted to MinVal.
[ScktId: 1] Early Configuration - 1272ms
tRRDS -- MinVal = 0x2, value = 0x0, adjusted to MinVal.
[ScktId: 1] DDRIO Initialization -- Started
tWWDS -- MinVal = 0x2, value = 0x0, adjusted to MinVal.
tRWDS -- MinVal = 0x2, value = 0x0, adjusted to MinVal.
tRRDS -- MinVal = 0x2, value = 0x0, adjusted to MinVal.
[ScktId: 0] Early Configuration - 728ms
[ScktId: 0] DDRIO Initialization -- Started
[ScktId: 1] DDRIO Initialization - 38ms
[ScktId: 1] DDRIO Initialization Late -- Started
DfxTimingOverride10nm Starts
[ScktId: 1] DDRIO Initialization Late - 17ms
[ScktId: 0] DDRIO Initialization - 32ms
[ScktId: 1] Pipe Sync AP Data -- Started
[ScktId: 0] DDRIO Initialization Late -- Started
DfxTimingOverride10nm Starts
[ScktId: 0] DDRIO Initialization Late - 20ms
[ScktId: 0] Pipe Sync AP Data -- Started
[ScktId: 0] Pipe Sync AP Data - 17ms
[ScktId: 1] Pipe Sync AP Data - 46ms
[ScktId: 0] Pipe Sync AP Smbus Mode -- Started
[ScktId: 1] Pipe Sync AP Smbus Mode -- Started
[ScktId: 0] Pipe Sync AP Smbus Mode - 13ms
[ScktId: 1] Pipe Sync AP Smbus Mode - 9ms
[ScktId: 0] Pipe Sync AP Reset Status -- Started
[ScktId: 1] Pipe Sync AP Reset Status -- Started
[ScktId: 0] Pipe Sync AP Reset Status - 13ms
[ScktId: 1] Pipe Sync AP Reset Status - 9ms
[ScktId: 0] Pipe Sync SBSP Status -- Started
[ScktId: 1] Pipe Sync SBSP Status -- Started
[ScktId: 1] Pipe Sync SBSP Status - 8ms
[ScktId: 0] Pipe Sync SBSP Status - 13ms
[ScktId: 1] DDR Training -- Started
[ScktId: 0] DDR Training -- Started
[ScktId: 1] Pre-Training Initialization -- Started
[ScktId: 0] Pre-Training Initialization -- Started
N1: Bus Instance = 0; I2C speed = 3; I3C speed = 2; Bus mode = 0
N0: Bus Instance = 0; I2C speed = 3; I3C speed = 2; Bus mode = 0
N1: Bus Instance = 0; I2C speed = 3; I3C speed = 2; Bus mode = 1
N0: Bus Instance = 0; I2C speed = 3; I3C speed = 2; Bus mode = 1
N1: I3C Instance 0: Switch to I3C mode - Status = Success
N0: I3C Instance 0: Switch to I3C mode - Status = Success
N1: Bus Instance = 1; I2C speed = 3; I3C speed = 2; Bus mode = 0
N0: Bus Instance = 1; I2C speed = 3; I3C speed = 2; Bus mode = 0
N1: Bus Instance = 1; I2C speed = 3; I3C speed = 2; Bus mode = 1
N0: Bus Instance = 1; I2C speed = 3; I3C speed = 2; Bus mode = 1
N1: I3C Instance 1: Switch to I3C mode - Status = Success
N0: I3C Instance 1: Switch to I3C mode - Status = Success
Socket 1 - Sending 3 NOPS sequence to exit clockstop.
[ScktId: 1] Pre-Training Initialization - 104ms
Socket 0 - Sending 3 NOPS sequence to exit clockstop.
[ScktId: 1] Host CS Training -- Started
[ScktId: 0] Pre-Training Initialization - 111ms
[ScktId: 0] Host CS Training -- Started
N0: Bus Instance = 0; I2C speed = 3; I3C speed = 2; Bus mode = 0
N0: Bus Instance = 0; I2C speed = 3; I3C speed = 2; Bus mode = 1
N1: Bus Instance = 0; I2C speed = 3; I3C speed = 2; Bus mode = 0
N0: I3C Instance 0: Switch to I3C mode - Status = Success
N1: Bus Instance = 0; I2C speed = 3; I3C speed = 2; Bus mode = 1
N0: Bus Instance = 1; I2C speed = 3; I3C speed = 2; Bus mode = 0
N1: I3C Instance 0: Switch to I3C mode - Status = Success
N0: Bus Instance = 1; I2C speed = 3; I3C speed = 2; Bus mode = 1
N1: Bus Instance = 1; I2C speed = 3; I3C speed = 2; Bus mode = 0
N0: I3C Instance 1: Switch to I3C mode - Status = Success
N1: Bus Instance = 1; I2C speed = 3; I3C speed = 2; Bus mode = 1
N1: I3C Instance 1: Switch to I3C mode - Status = Success
[ScktId: 0] Host CS Training - 218ms
[ScktId: 0] Host CA Training Simple -- Started
[ScktId: 1] Host CS Training - 244ms
[ScktId: 1] Host CA Training Simple -- Started
[ScktId: 0] Host CA Training Simple - 341ms
[ScktId: 0] RCD DCA DFE Training -- Started
[ScktId: 1] Host CA Training Simple - 371ms
[ScktId: 1] RCD DCA DFE Training -- Started
[ScktId: 0] RCD DCA DFE Training - 3667ms
[ScktId: 0] Host CA Training Complex -- Started
[ScktId: 0] Host CA Training Complex - 163ms
[ScktId: 0] RCD DCA Slew Rate Training -- Started
[ScktId: 0] RCD DCA Slew Rate Training - 4ms
[ScktId: 0] RCD DCA TCO Training -- Started
[ScktId: 1] RCD DCA DFE Training - 4095ms
[ScktId: 1] Host CA Training Complex -- Started
[ScktId: 0] RCD DCA TCO Training - 550ms
[ScktId: 0] RCD DCA/DCK Duty Cycle Training -- Started
[ScktId: 1] Host CA Training Complex - 171ms
[ScktId: 0] RCD DCA/DCK Duty Cycle Training - 411ms
[ScktId: 1] RCD DCA Slew Rate Training -- Started
[ScktId: 0] Re-center Host CA Training -- Started
[ScktId: 1] RCD DCA Slew Rate Training - 10ms
[ScktId: 1] RCD DCA TCO Training -- Started
[ScktId: 0] Re-center Host CA Training - 169ms
[ScktId: 0] CA temperature compensation -- Started
[ScktId: 0] CA temperature compensation - 5ms
[ScktId: 0] BCOM Training -- Started
[ScktId: 0] BCOM Training - 3ms
[ScktId: 0] RCD QCS Training -- Started
[ScktId: 0] RCD QCS Training - 104ms
[ScktId: 0] RCD QCA Training -- Started
[ScktId: 0] RCD QCA Training - 324ms
[ScktId: 0] PBA Enumeration -- Started
[ScktId: 0] PBA Enumeration - 3ms
[ScktId: 0] REQ Training -- Started
[ScktId: 0] REQ Training - 3ms
[ScktId: 1] RCD DCA TCO Training - 624ms
[ScktId: 0] MDQS Receive Enable Training -- Started
[ScktId: 1] RCD DCA/DCK Duty Cycle Training -- Started
[ScktId: 0] MDQS Receive Enable Training - 9ms
[ScktId: 0] MDQS Read Delay Training -- Started
[ScktId: 1] RCD DCA/DCK Duty Cycle Training - 468ms
[ScktId: 0] MDQS Read Delay Training - 457ms
[ScktId: 1] Re-center Host CA Training -- Started
[ScktId: 0] Receive Enable Training -- Started
[ScktId: 0] Receive Enable Training - 24ms
[ScktId: 0] Read Dq Dqs: Coarse Read DQ/DQS -- Started
[ScktId: 1] Re-center Host CA Training - 180ms
[ScktId: 1] CA temperature compensation -- Started
[ScktId: 1] CA temperature compensation - 5ms
[ScktId: 1] BCOM Training -- Started
[ScktId: 1] BCOM Training - 3ms
[ScktId: 1] RCD QCS Training -- Started
[ScktId: 1] RCD QCS Training - 111ms
[ScktId: 1] RCD QCA Training -- Started
[ScktId: 0] Read Dq Dqs: Coarse Read DQ/DQS - 341ms
[ScktId: 1] RCD QCA Training - 348ms
[ScktId: 0] Read Dq Dqs: Swizzle Discovery -- Started
[ScktId: 1] PBA Enumeration -- Started
[ScktId: 0] Read Dq Dqs: Swizzle Discovery - 10ms
[ScktId: 1] PBA Enumeration - 9ms
[ScktId: 0] Read Dq Dqs: Pre-DFE Read 2D Centering -- Started
[ScktId: 1] REQ Training -- Started
[ScktId: 1] REQ Training - 9ms
[ScktId: 1] MDQS Receive Enable Training -- Started
[ScktId: 1] MDQS Receive Enable Training - 5ms
[ScktId: 1] MDQS Read Delay Training -- Started
[ScktId: 1] MDQS Read Delay Training - 4ms
[ScktId: 1] Receive Enable Training -- Started
[ScktId: 1] Receive Enable Training - 22ms
[ScktId: 1] Read Dq Dqs: Coarse Read DQ/DQS -- Started
[ScktId: 0] Read Dq Dqs: Pre-DFE Read 2D Centering - 94ms
[ScktId: 0] Read Dq Dqs: Duty Cycle Adjuster -- Started
[ScktId: 0] Read Dq Dqs: Duty Cycle Adjuster - 5ms
[ScktId: 0] Read Dq Dqs: Read DFE Training -- Started
[ScktId: 1] Read Dq Dqs: Coarse Read DQ/DQS - 372ms
[ScktId: 1] Read Dq Dqs: Swizzle Discovery -- Started
[ScktId: 1] Read Dq Dqs: Swizzle Discovery - 6ms
[ScktId: 1] Read Dq Dqs: Pre-DFE Read 2D Centering -- Started
[ScktId: 1] Read Dq Dqs: Pre-DFE Read 2D Centering - 95ms
[ScktId: 1] Read Dq Dqs: Duty Cycle Adjuster -- Started
[ScktId: 1] Read Dq Dqs: Duty Cycle Adjuster - 5ms
[ScktId: 1] Read Dq Dqs: Read DFE Training -- Started
[ScktId: 0] Read Dq Dqs: Read DFE Training - 3359ms
[ScktId: 0] Read Dq Dqs: Post-DFE Read 2D Centering -- Started
[ScktId: 0] Read Dq Dqs: Post-DFE Read 2D Centering - 611ms
[ScktId: 0] Switch to DDRT2 Mode -- Started
[ScktId: 0] Switch to DDRT2 Mode - 4ms
[ScktId: 0] Buffer DRAM Write Leveling Training -- Started
[ScktId: 0] Buffer DRAM Write Leveling Training - 5ms
[ScktId: 0] Buffer Write Delay Training -- Started
[ScktId: 0] Buffer Write Delay Training - 5ms
[ScktId: 0] Write Leveling Training -- Started
[ScktId: 0] Write Leveling Training - 95ms
[ScktId: 0] Write Dq Dqs: Coarse Write DQ/DQS -- Started
[ScktId: 1] Read Dq Dqs: Read DFE Training - 3668ms
[ScktId: 1] Read Dq Dqs: Post-DFE Read 2D Centering -- Started
[ScktId: 0] Write Dq Dqs: Coarse Write DQ/DQS - 541ms
[ScktId: 0] Write Dq Dqs: Pre-DFE Write 2D Centering -- Started
N0.C00.D0.R0: High = 19 - Low = -25
N0.C00: Composite High = 19 - Composite Low = -25
N0.C02.D0.R0: High = 18 - Low = -21
N0.C02: Composite High = 18 - Composite Low = -21
N0.C04.D0.R0: High = 22 - Low = -22
[ScktId: 1] Read Dq Dqs: Post-DFE Read 2D Centering - 688ms
N0.C04: Composite High = 22 - Composite Low = -22
[ScktId: 1] Switch to DDRT2 Mode -- Started
N0.C06.D0.R0: High = 18 - Low = -20
[ScktId: 1] Switch to DDRT2 Mode - 9ms
N0.C06: Composite High = 18 - Composite Low = -20
[ScktId: 1] Buffer DRAM Write Leveling Training -- Started
N0: Get eye height
[ScktId: 1] Buffer DRAM Write Leveling Training - 10ms
N0: Low: -20 High: 18
[ScktId: 1] Buffer Write Delay Training -- Started
N0: Eye height = 38
[ScktId: 1] Buffer Write Delay Training - 7ms
N0: Timing Limited
[ScktId: 1] Write Leveling Training -- Started
[ScktId: 0] Write Dq Dqs: Pre-DFE Write 2D Centering - 309ms
[ScktId: 0] Write Dq Dqs: Slew Rate DQ -- Started
[ScktId: 1] Write Leveling Training - 105ms
[ScktId: 0] Write Dq Dqs: Slew Rate DQ - 4ms
[ScktId: 1] Write Dq Dqs: Coarse Write DQ/DQS -- Started
[ScktId: 0] Write Dq Dqs: TCO DQ -- Started
[ScktId: 0] Write Dq Dqs: TCO DQ - 9ms
[ScktId: 0] Write Dq Dqs: Write DFE Training -- Started
[ScktId: 1] Write Dq Dqs: Coarse Write DQ/DQS - 608ms
[ScktId: 1] Write Dq Dqs: Pre-DFE Write 2D Centering -- Started
N1.C00.D0.R0: High = 20 - Low = -24
N1.C00: Composite High = 20 - Composite Low = -24
N1.C02.D0.R0: High = 19 - Low = -23
N1.C02: Composite High = 19 - Composite Low = -23
N1.C04.D0.R0: High = 20 - Low = -22
N1.C04: Composite High = 20 - Composite Low = -22
N1.C06.D0.R0: High = 20 - Low = -19
N1.C06: Composite High = 20 - Composite Low = -19
N1: Get eye height
N1: Low: -19 High: 19
N1: Eye height = 38
N1: Timing Limited
[ScktId: 1] Write Dq Dqs: Pre-DFE Write 2D Centering - 305ms
[ScktId: 1] Write Dq Dqs: Slew Rate DQ -- Started
[ScktId: 1] Write Dq Dqs: Slew Rate DQ - 4ms
[ScktId: 1] Write Dq Dqs: TCO DQ -- Started
[ScktId: 1] Write Dq Dqs: TCO DQ - 4ms
[ScktId: 1] Write Dq Dqs: Write DFE Training -- Started
[ScktId: 0] Write Dq Dqs: Write DFE Training - 4267ms
[ScktId: 0] Buffer Write DFE Training -- Started
[ScktId: 0] Buffer Write DFE Training - 4ms
[ScktId: 0] Write Dq Dqs: Write ODT Latency Training -- Started
[ScktId: 0] Write Dq Dqs: Write ODT Latency Training - 8ms
[ScktId: 0] Command Normalization -- Started
[ScktId: 0] Command Normalization - 20ms
[ScktId: 0] Write Dq Dqs: Post-DFE Write 2D Centering -- Started
N0.C00.D0.R0: High = 21 - Low = -20
N0.C00: Composite High = 21 - Composite Low = -20
N0.C02.D0.R0: High = 21 - Low = -21
N0.C02: Composite High = 21 - Composite Low = -21
N0.C04.D0.R0: High = 22 - Low = -21
N0.C04: Composite High = 22 - Composite Low = -21
N0.C06.D0.R0: High = 20 - Low = -20
N0.C06: Composite High = 20 - Composite Low = -20
N0: Get eye height
N0: Low: -20 High: 20
N0: Eye height = 40
N0: Timing Limited
[ScktId: 1] Write Dq Dqs: Write DFE Training - 4614ms
[ScktId: 1] Buffer Write DFE Training -- Started
[ScktId: 1] Buffer Write DFE Training - 4ms
[ScktId: 1] Write Dq Dqs: Write ODT Latency Training -- Started
[ScktId: 1] Write Dq Dqs: Write ODT Latency Training - 8ms
[ScktId: 1] Command Normalization -- Started
[ScktId: 1] Command Normalization - 22ms
[ScktId: 1] Write Dq Dqs: Post-DFE Write 2D Centering -- Started
N1.C00.D0.R0: High = 21 - Low = -21
N1.C00: Composite High = 21 - Composite Low = -21
N1.C02.D0.R0: High = 20 - Low = -20
N1.C02: Composite High = 20 - Composite Low = -20
N1.C04.D0.R0: High = 21 - Low = -21
N1.C04: Composite High = 21 - Composite Low = -21
N1.C06.D0.R0: High = 19 - Low = -20
N1.C06: Composite High = 19 - Composite Low = -20
N1: Get eye height
N1: Low: -20 High: 19
N1: Eye height = 39
N1: Timing Limited
[ScktId: 0] Write Dq Dqs: Post-DFE Write 2D Centering - 1699ms
[ScktId: 0] Initialize Tx DQ Periodic Retraining -- Started
[ScktId: 0] Initialize Tx DQ Periodic Retraining - 7ms
[ScktId: 0] Read Dq Dqs: Post-DFE Read 2D Centering Late -- Started
[ScktId: 1] Write Dq Dqs: Post-DFE Write 2D Centering - 1676ms
[ScktId: 1] Initialize Tx DQ Periodic Retraining -- Started
[ScktId: 1] Initialize Tx DQ Periodic Retraining - 7ms
[ScktId: 1] Read Dq Dqs: Post-DFE Read 2D Centering Late -- Started
[ScktId: 0] Read Dq Dqs: Post-DFE Read 2D Centering Late - 12527ms
[ScktId: 0] Initialize Rx DQS Periodic Retraining -- Started
[ScktId: 0] Initialize Rx DQS Periodic Retraining - 6ms
[ScktId: 0] MemSweepTester -- Started
[ScktId: 0] MemSweepTester - 3ms
[ScktId: 0] PPR Flow -- Started
Calling PostPackageRepair
[ScktId: 0] PPR Flow - 6ms
[ScktId: 0] Roundtrip Latency Optimization -- Started
[ScktId: 0] Roundtrip Latency Optimization - 844ms
[ScktId: 0] Turnarounds Training -- Started
[ScktId: 1] Read Dq Dqs: Post-DFE Read 2D Centering Late - 12555ms
[ScktId: 1] Initialize Rx DQS Periodic Retraining -- Started
[ScktId: 1] Initialize Rx DQS Periodic Retraining - 6ms
[ScktId: 1] MemSweepTester -- Started
[ScktId: 1] MemSweepTester - 3ms
[ScktId: 1] PPR Flow -- Started
Calling PostPackageRepair
[ScktId: 1] PPR Flow - 6ms
[ScktId: 1] Roundtrip Latency Optimization -- Started
[ScktId: 0] Turnarounds Training - 536ms
Total MRC time = 32521ms
[ScktId: 0] DDR Training - 32531ms
[ScktId: 0] Pipe Sync AP Smbus Mode -- Started
[ScktId: 1] Roundtrip Latency Optimization - 878ms
[ScktId: 1] Turnarounds Training -- Started
[ScktId: 1] Turnarounds Training - 529ms
Total MRC time = 33830ms
[ScktId: 1] DDR Training - 33841ms
[ScktId: 1] Pipe Sync AP Smbus Mode -- Started
[ScktId: 0] Pipe Sync AP Smbus Mode - 1310ms
[ScktId: 1] Pipe Sync AP Smbus Mode - 4ms
[ScktId: 0] Display Training Results -- Started
[ScktId: 1] Display Training Results -- Started
[ScktId: 0] Display Training Results - 105ms
[ScktId: 1] Display Training Results - 205ms
[ScktId: 0] Check Training Results -- Started
[ScktId: 1] Check Training Results -- Started
[ScktId: 0] Check Training Results - 9ms
[ScktId: 1] Check Training Results - 9ms
[ScktId: 0] HBM Training -- Started
[ScktId: 1] HBM Training -- Started
HbmioMailbox -In Mailbox Full Prod Training (Cold Reset)
HbmioMailbox -In Mailbox Full Prod Training (Cold Reset)
Executing full_prod_training on Socket 0, HBMIO 0
Executing full_prod_training on Socket 1, HBMIO 0
Training result: return_data0 = 0x0, return_data1 = 0xB00
Training result: return_data0 = 0x0, return_data1 = 0xB00
Executing full_prod_training on Socket 0, HBMIO 1
Executing full_prod_training on Socket 1, HBMIO 1
Training result: return_data0 = 0x0, return_data1 = 0xB00
Training result: return_data0 = 0x0, return_data1 = 0xB00
Executing full_prod_training on Socket 0, HBMIO 2
Executing full_prod_training on Socket 1, HBMIO 2
Training result: return_data0 = 0x0, return_data1 = 0xB00
Training result: return_data0 = 0x0, return_data1 = 0xB00
Executing full_prod_training on Socket 0, HBMIO 3
Executing full_prod_training on Socket 1, HBMIO 3
Training result: return_data0 = 0x0, return_data1 = 0xB00
Training result: return_data0 = 0x0, return_data1 = 0xB00
Socket0 HbmCh0, PI Code:
Socket1 HbmCh0, PI Code:
DWord DQ: txdq_pi0_code = 0x1, txdq_pi1_code = 0x41
DWord DQ: txdq_pi0_code = 0x1, txdq_pi1_code = 0x41
DWord DQS: dqs_pi0_code = 0x20, dqs_pi1_code = 0x60
DWord DQS: dqs_pi0_code = 0x20, dqs_pi1_code = 0x60
AWord DQ: txdq_pi0_code = 0x7E, txdq_pi1_code = 0x3E
AWord DQ: txdq_pi0_code = 0x0, txdq_pi1_code = 0x40
AWord DQS: dqs_pi0_code = 0x20, dqs_pi1_code = 0x60
AWord DQS: dqs_pi0_code = 0x20, dqs_pi1_code = 0x60
Socket0 HbmCh1, PI Code:
Socket1 HbmCh1, PI Code:
DWord DQ: txdq_pi0_code = 0x0, txdq_pi1_code = 0x40
DWord DQ: txdq_pi0_code = 0x1, txdq_pi1_code = 0x41
DWord DQS: dqs_pi0_code = 0x20, dqs_pi1_code = 0x60
DWord DQS: dqs_pi0_code = 0x20, dqs_pi1_code = 0x60
AWord DQ: txdq_pi0_code = 0x7F, txdq_pi1_code = 0x3F
AWord DQ: txdq_pi0_code = 0x7E, txdq_pi1_code = 0x3E
AWord DQS: dqs_pi0_code = 0x20, dqs_pi1_code = 0x60
AWord DQS: dqs_pi0_code = 0x20, dqs_pi1_code = 0x60
Socket0 HbmCh2, PI Code:
Socket1 HbmCh2, PI Code:
DWord DQ: txdq_pi0_code = 0x0, txdq_pi1_code = 0x40
DWord DQ: txdq_pi0_code = 0x0, txdq_pi1_code = 0x40
DWord DQS: dqs_pi0_code = 0x20, dqs_pi1_code = 0x60
DWord DQS: dqs_pi0_code = 0x20, dqs_pi1_code = 0x60
AWord DQ: txdq_pi0_code = 0x7F, txdq_pi1_code = 0x3F
AWord DQ: txdq_pi0_code = 0x7F, txdq_pi1_code = 0x3F
AWord DQS: dqs_pi0_code = 0x20, dqs_pi1_code = 0x60
AWord DQS: dqs_pi0_code = 0x20, dqs_pi1_code = 0x60
Socket0 HbmCh3, PI Code:
Socket1 HbmCh3, PI Code:
DWord DQ: txdq_pi0_code = 0x1, txdq_pi1_code = 0x41
DWord DQ: txdq_pi0_code = 0x7F, txdq_pi1_code = 0x3F
DWord DQS: dqs_pi0_code = 0x20, dqs_pi1_code = 0x60
DWord DQS: dqs_pi0_code = 0x20, dqs_pi1_code = 0x60
AWord DQ: txdq_pi0_code = 0x7E, txdq_pi1_code = 0x3E
AWord DQ: txdq_pi0_code = 0x7F, txdq_pi1_code = 0x3F
AWord DQS: dqs_pi0_code = 0x20, dqs_pi1_code = 0x60
AWord DQS: dqs_pi0_code = 0x20, dqs_pi1_code = 0x60
Socket0 HbmCh4, PI Code:
Socket1 HbmCh4, PI Code:
DWord DQ: txdq_pi0_code = 0x2, txdq_pi1_code = 0x42
DWord DQ: txdq_pi0_code = 0x2, txdq_pi1_code = 0x42
DWord DQS: dqs_pi0_code = 0x20, dqs_pi1_code = 0x60
DWord DQS: dqs_pi0_code = 0x20, dqs_pi1_code = 0x60
AWord DQ: txdq_pi0_code = 0x7F, txdq_pi1_code = 0x3F
AWord DQ: txdq_pi0_code = 0x7F, txdq_pi1_code = 0x3F
AWord DQS: dqs_pi0_code = 0x20, dqs_pi1_code = 0x60
AWord DQS: dqs_pi0_code = 0x20, dqs_pi1_code = 0x60
Socket0 HbmCh5, PI Code:
Socket1 HbmCh5, PI Code:
DWord DQ: txdq_pi0_code = 0x1, txdq_pi1_code = 0x41
DWord DQ: txdq_pi0_code = 0x2, txdq_pi1_code = 0x42
DWord DQS: dqs_pi0_code = 0x20, dqs_pi1_code = 0x60
DWord DQS: dqs_pi0_code = 0x20, dqs_pi1_code = 0x60
AWord DQ: txdq_pi0_code = 0x7F, txdq_pi1_code = 0x3F
AWord DQ: txdq_pi0_code = 0x7E, txdq_pi1_code = 0x3E
AWord DQS: dqs_pi0_code = 0x20, dqs_pi1_code = 0x60
AWord DQS: dqs_pi0_code = 0x20, dqs_pi1_code = 0x60
Socket0 HbmCh6, PI Code:
Socket1 HbmCh6, PI Code:
DWord DQ: txdq_pi0_code = 0x2, txdq_pi1_code = 0x42
DWord DQ: txdq_pi0_code = 0x1, txdq_pi1_code = 0x41
DWord DQS: dqs_pi0_code = 0x20, dqs_pi1_code = 0x60
DWord DQS: dqs_pi0_code = 0x20, dqs_pi1_code = 0x60
AWord DQ: txdq_pi0_code = 0x7E, txdq_pi1_code = 0x3E
AWord DQ: txdq_pi0_code = 0x7E, txdq_pi1_code = 0x3E
AWord DQS: dqs_pi0_code = 0x20, dqs_pi1_code = 0x60
AWord DQS: dqs_pi0_code = 0x20, dqs_pi1_code = 0x60
Socket0 HbmCh7, PI Code:
Socket1 HbmCh7, PI Code:
DWord DQ: txdq_pi0_code = 0x1, txdq_pi1_code = 0x41
DWord DQ: txdq_pi0_code = 0x0, txdq_pi1_code = 0x40
DWord DQS: dqs_pi0_code = 0x20, dqs_pi1_code = 0x60
DWord DQS: dqs_pi0_code = 0x20, dqs_pi1_code = 0x60
AWord DQ: txdq_pi0_code = 0x7E, txdq_pi1_code = 0x3E
AWord DQ: txdq_pi0_code = 0x7E, txdq_pi1_code = 0x3E
AWord DQS: dqs_pi0_code = 0x20, dqs_pi1_code = 0x60
AWord DQS: dqs_pi0_code = 0x20, dqs_pi1_code = 0x60
Socket0 HbmCh8, PI Code:
Socket1 HbmCh8, PI Code:
DWord DQ: txdq_pi0_code = 0x0, txdq_pi1_code = 0x40
DWord DQ: txdq_pi0_code = 0x0, txdq_pi1_code = 0x40
DWord DQS: dqs_pi0_code = 0x20, dqs_pi1_code = 0x60
DWord DQS: dqs_pi0_code = 0x20, dqs_pi1_code = 0x60
AWord DQ: txdq_pi0_code = 0x0, txdq_pi1_code = 0x40
AWord DQ: txdq_pi0_code = 0x7F, txdq_pi1_code = 0x3F
AWord DQS: dqs_pi0_code = 0x20, dqs_pi1_code = 0x60
AWord DQS: dqs_pi0_code = 0x20, dqs_pi1_code = 0x60
Socket0 HbmCh9, PI Code:
Socket1 HbmCh9, PI Code:
DWord DQ: txdq_pi0_code = 0x0, txdq_pi1_code = 0x40
DWord DQ: txdq_pi0_code = 0x1, txdq_pi1_code = 0x41
DWord DQS: dqs_pi0_code = 0x20, dqs_pi1_code = 0x60
DWord DQS: dqs_pi0_code = 0x20, dqs_pi1_code = 0x60
AWord DQ: txdq_pi0_code = 0x1, txdq_pi1_code = 0x41
AWord DQ: txdq_pi0_code = 0x0, txdq_pi1_code = 0x40
AWord DQS: dqs_pi0_code = 0x20, dqs_pi1_code = 0x60
AWord DQS: dqs_pi0_code = 0x20, dqs_pi1_code = 0x60
Socket0 HbmCh10, PI Code:
Socket1 HbmCh10, PI Code:
DWord DQ: txdq_pi0_code = 0x1, txdq_pi1_code = 0x41
DWord DQ: txdq_pi0_code = 0x0, txdq_pi1_code = 0x40
DWord DQS: dqs_pi0_code = 0x20, dqs_pi1_code = 0x60
DWord DQS: dqs_pi0_code = 0x20, dqs_pi1_code = 0x60
AWord DQ: txdq_pi0_code = 0x0, txdq_pi1_code = 0x40
AWord DQ: txdq_pi0_code = 0x0, txdq_pi1_code = 0x40
AWord DQS: dqs_pi0_code = 0x20, dqs_pi1_code = 0x60
AWord DQS: dqs_pi0_code = 0x20, dqs_pi1_code = 0x60
Socket0 HbmCh11, PI Code:
Socket1 HbmCh11, PI Code:
DWord DQ: txdq_pi0_code = 0x1, txdq_pi1_code = 0x41
DWord DQ: txdq_pi0_code = 0x0, txdq_pi1_code = 0x40
DWord DQS: dqs_pi0_code = 0x20, dqs_pi1_code = 0x60
DWord DQS: dqs_pi0_code = 0x20, dqs_pi1_code = 0x60
AWord DQ: txdq_pi0_code = 0x0, txdq_pi1_code = 0x40
AWord DQ: txdq_pi0_code = 0x7F, txdq_pi1_code = 0x3F
AWord DQS: dqs_pi0_code = 0x20, dqs_pi1_code = 0x60
AWord DQS: dqs_pi0_code = 0x20, dqs_pi1_code = 0x60
Socket0 HbmCh12, PI Code:
Socket1 HbmCh12, PI Code:
DWord DQ: txdq_pi0_code = 0x1, txdq_pi1_code = 0x41
DWord DQ: txdq_pi0_code = 0x0, txdq_pi1_code = 0x40
DWord DQS: dqs_pi0_code = 0x20, dqs_pi1_code = 0x60
DWord DQS: dqs_pi0_code = 0x20, dqs_pi1_code = 0x60
AWord DQ: txdq_pi0_code = 0x0, txdq_pi1_code = 0x40
AWord DQ: txdq_pi0_code = 0x7F, txdq_pi1_code = 0x3F
AWord DQS: dqs_pi0_code = 0x20, dqs_pi1_code = 0x60
AWord DQS: dqs_pi0_code = 0x20, dqs_pi1_code = 0x60
Socket0 HbmCh13, PI Code:
Socket1 HbmCh13, PI Code:
DWord DQ: txdq_pi0_code = 0x2, txdq_pi1_code = 0x42
DWord DQ: txdq_pi0_code = 0x1, txdq_pi1_code = 0x41
DWord DQS: dqs_pi0_code = 0x20, dqs_pi1_code = 0x60
DWord DQS: dqs_pi0_code = 0x20, dqs_pi1_code = 0x60
AWord DQ: txdq_pi0_code = 0x7E, txdq_pi1_code = 0x3E
AWord DQ: txdq_pi0_code = 0x0, txdq_pi1_code = 0x40
AWord DQS: dqs_pi0_code = 0x20, dqs_pi1_code = 0x60
AWord DQS: dqs_pi0_code = 0x20, dqs_pi1_code = 0x60
Socket0 HbmCh14, PI Code:
Socket1 HbmCh14, PI Code:
DWord DQ: txdq_pi0_code = 0x1, txdq_pi1_code = 0x41
DWord DQ: txdq_pi0_code = 0x1, txdq_pi1_code = 0x41
DWord DQS: dqs_pi0_code = 0x20, dqs_pi1_code = 0x60
DWord DQS: dqs_pi0_code = 0x20, dqs_pi1_code = 0x60
AWord DQ: txdq_pi0_code = 0x7F, txdq_pi1_code = 0x3F
AWord DQ: txdq_pi0_code = 0x7E, txdq_pi1_code = 0x3E
AWord DQS: dqs_pi0_code = 0x20, dqs_pi1_code = 0x60
AWord DQS: dqs_pi0_code = 0x20, dqs_pi1_code = 0x60
Socket0 HbmCh15, PI Code:
Socket1 HbmCh15, PI Code:
DWord DQ: txdq_pi0_code = 0x3, txdq_pi1_code = 0x43
DWord DQ: txdq_pi0_code = 0x1, txdq_pi1_code = 0x41
DWord DQS: dqs_pi0_code = 0x20, dqs_pi1_code = 0x60
DWord DQS: dqs_pi0_code = 0x20, dqs_pi1_code = 0x60
AWord DQ: txdq_pi0_code = 0x7F, txdq_pi1_code = 0x3F
AWord DQ: txdq_pi0_code = 0x7F, txdq_pi1_code = 0x3F
AWord DQS: dqs_pi0_code = 0x20, dqs_pi1_code = 0x60
AWord DQS: dqs_pi0_code = 0x20, dqs_pi1_code = 0x60
Socket0 HbmCh16, PI Code:
Socket1 HbmCh16, PI Code:
DWord DQ: txdq_pi0_code = 0x1, txdq_pi1_code = 0x41
DWord DQ: txdq_pi0_code = 0x1, txdq_pi1_code = 0x41
DWord DQS: dqs_pi0_code = 0x20, dqs_pi1_code = 0x60
DWord DQS: dqs_pi0_code = 0x20, dqs_pi1_code = 0x60
AWord DQ: txdq_pi0_code = 0x0, txdq_pi1_code = 0x40
AWord DQ: txdq_pi0_code = 0x0, txdq_pi1_code = 0x40
AWord DQS: dqs_pi0_code = 0x20, dqs_pi1_code = 0x60
AWord DQS: dqs_pi0_code = 0x20, dqs_pi1_code = 0x60
Socket0 HbmCh17, PI Code:
Socket1 HbmCh17, PI Code:
DWord DQ: txdq_pi0_code = 0x0, txdq_pi1_code = 0x40
DWord DQ: txdq_pi0_code = 0x1, txdq_pi1_code = 0x41
DWord DQS: dqs_pi0_code = 0x20, dqs_pi1_code = 0x60
DWord DQS: dqs_pi0_code = 0x20, dqs_pi1_code = 0x60
AWord DQ: txdq_pi0_code = 0x7F, txdq_pi1_code = 0x3F
AWord DQ: txdq_pi0_code = 0x0, txdq_pi1_code = 0x40
AWord DQS: dqs_pi0_code = 0x20, dqs_pi1_code = 0x60
AWord DQS: dqs_pi0_code = 0x20, dqs_pi1_code = 0x60
Socket0 HbmCh18, PI Code:
Socket1 HbmCh18, PI Code:
DWord DQ: txdq_pi0_code = 0x1, txdq_pi1_code = 0x41
DWord DQ: txdq_pi0_code = 0x2, txdq_pi1_code = 0x42
DWord DQS: dqs_pi0_code = 0x20, dqs_pi1_code = 0x60
DWord DQS: dqs_pi0_code = 0x20, dqs_pi1_code = 0x60
AWord DQ: txdq_pi0_code = 0x7F, txdq_pi1_code = 0x3F
AWord DQ: txdq_pi0_code = 0x0, txdq_pi1_code = 0x40
AWord DQS: dqs_pi0_code = 0x20, dqs_pi1_code = 0x60
AWord DQS: dqs_pi0_code = 0x20, dqs_pi1_code = 0x60
Socket0 HbmCh19, PI Code:
Socket1 HbmCh19, PI Code:
DWord DQ: txdq_pi0_code = 0x0, txdq_pi1_code = 0x40
DWord DQ: txdq_pi0_code = 0x0, txdq_pi1_code = 0x40
DWord DQS: dqs_pi0_code = 0x20, dqs_pi1_code = 0x60
DWord DQS: dqs_pi0_code = 0x20, dqs_pi1_code = 0x60
AWord DQ: txdq_pi0_code = 0x7E, txdq_pi1_code = 0x3E
AWord DQ: txdq_pi0_code = 0x7F, txdq_pi1_code = 0x3F
AWord DQS: dqs_pi0_code = 0x20, dqs_pi1_code = 0x60
AWord DQS: dqs_pi0_code = 0x20, dqs_pi1_code = 0x60
Socket0 HbmCh20, PI Code:
Socket1 HbmCh20, PI Code:
DWord DQ: txdq_pi0_code = 0x2, txdq_pi1_code = 0x42
DWord DQ: txdq_pi0_code = 0x3, txdq_pi1_code = 0x43
DWord DQS: dqs_pi0_code = 0x20, dqs_pi1_code = 0x60
DWord DQS: dqs_pi0_code = 0x20, dqs_pi1_code = 0x60
AWord DQ: txdq_pi0_code = 0x7F, txdq_pi1_code = 0x3F
AWord DQ: txdq_pi0_code = 0x7F, txdq_pi1_code = 0x3F
AWord DQS: dqs_pi0_code = 0x20, dqs_pi1_code = 0x60
AWord DQS: dqs_pi0_code = 0x20, dqs_pi1_code = 0x60
Socket0 HbmCh21, PI Code:
Socket1 HbmCh21, PI Code:
DWord DQ: txdq_pi0_code = 0x1, txdq_pi1_code = 0x41
DWord DQ: txdq_pi0_code = 0x3, txdq_pi1_code = 0x43
DWord DQS: dqs_pi0_code = 0x20, dqs_pi1_code = 0x60
DWord DQS: dqs_pi0_code = 0x20, dqs_pi1_code = 0x60
AWord DQ: txdq_pi0_code = 0x7E, txdq_pi1_code = 0x3E
AWord DQ: txdq_pi0_code = 0x7F, txdq_pi1_code = 0x3F
AWord DQS: dqs_pi0_code = 0x20, dqs_pi1_code = 0x60
AWord DQS: dqs_pi0_code = 0x20, dqs_pi1_code = 0x60
Socket0 HbmCh22, PI Code:
Socket1 HbmCh22, PI Code:
DWord DQ: txdq_pi0_code = 0x2, txdq_pi1_code = 0x42
DWord DQ: txdq_pi0_code = 0x3, txdq_pi1_code = 0x43
DWord DQS: dqs_pi0_code = 0x20, dqs_pi1_code = 0x60
DWord DQS: dqs_pi0_code = 0x20, dqs_pi1_code = 0x60
AWord DQ: txdq_pi0_code = 0x7F, txdq_pi1_code = 0x3F
AWord DQ: txdq_pi0_code = 0x7F, txdq_pi1_code = 0x3F
AWord DQS: dqs_pi0_code = 0x20, dqs_pi1_code = 0x60
AWord DQS: dqs_pi0_code = 0x20, dqs_pi1_code = 0x60
Socket0 HbmCh23, PI Code:
Socket1 HbmCh23, PI Code:
DWord DQ: txdq_pi0_code = 0x2, txdq_pi1_code = 0x42
DWord DQ: txdq_pi0_code = 0x1, txdq_pi1_code = 0x41
DWord DQS: dqs_pi0_code = 0x20, dqs_pi1_code = 0x60
DWord DQS: dqs_pi0_code = 0x20, dqs_pi1_code = 0x60
AWord DQ: txdq_pi0_code = 0x7E, txdq_pi1_code = 0x3E
AWord DQ: txdq_pi0_code = 0x7E, txdq_pi1_code = 0x3E
AWord DQS: dqs_pi0_code = 0x20, dqs_pi1_code = 0x60
AWord DQS: dqs_pi0_code = 0x20, dqs_pi1_code = 0x60
Socket0 HbmCh24, PI Code:
Socket1 HbmCh24, PI Code:
DWord DQ: txdq_pi0_code = 0x0, txdq_pi1_code = 0x40
DWord DQ: txdq_pi0_code = 0x7F, txdq_pi1_code = 0x3F
DWord DQS: dqs_pi0_code = 0x20, dqs_pi1_code = 0x60
DWord DQS: dqs_pi0_code = 0x20, dqs_pi1_code = 0x60
AWord DQ: txdq_pi0_code = 0x7D, txdq_pi1_code = 0x3D
AWord DQ: txdq_pi0_code = 0x7F, txdq_pi1_code = 0x3F
AWord DQS: dqs_pi0_code = 0x20, dqs_pi1_code = 0x60
AWord DQS: dqs_pi0_code = 0x20, dqs_pi1_code = 0x60
Socket0 HbmCh25, PI Code:
Socket1 HbmCh25, PI Code:
DWord DQ: txdq_pi0_code = 0x0, txdq_pi1_code = 0x40
DWord DQ: txdq_pi0_code = 0x0, txdq_pi1_code = 0x40
DWord DQS: dqs_pi0_code = 0x20, dqs_pi1_code = 0x60
DWord DQS: dqs_pi0_code = 0x20, dqs_pi1_code = 0x60
AWord DQ: txdq_pi0_code = 0x0, txdq_pi1_code = 0x40
AWord DQ: txdq_pi0_code = 0x1, txdq_pi1_code = 0x41
AWord DQS: dqs_pi0_code = 0x20, dqs_pi1_code = 0x60
AWord DQS: dqs_pi0_code = 0x20, dqs_pi1_code = 0x60
Socket0 HbmCh26, PI Code:
Socket1 HbmCh26, PI Code:
DWord DQ: txdq_pi0_code = 0x7E, txdq_pi1_code = 0x3E
DWord DQ: txdq_pi0_code = 0x0, txdq_pi1_code = 0x40
DWord DQS: dqs_pi0_code = 0x20, dqs_pi1_code = 0x60
DWord DQS: dqs_pi0_code = 0x20, dqs_pi1_code = 0x60
AWord DQ: txdq_pi0_code = 0x0, txdq_pi1_code = 0x40
AWord DQ: txdq_pi0_code = 0x0, txdq_pi1_code = 0x40
AWord DQS: dqs_pi0_code = 0x20, dqs_pi1_code = 0x60
AWord DQS: dqs_pi0_code = 0x20, dqs_pi1_code = 0x60
Socket0 HbmCh27, PI Code:
Socket1 HbmCh27, PI Code:
DWord DQ: txdq_pi0_code = 0x7F, txdq_pi1_code = 0x3F
DWord DQ: txdq_pi0_code = 0x7F, txdq_pi1_code = 0x3F
DWord DQS: dqs_pi0_code = 0x20, dqs_pi1_code = 0x60
DWord DQS: dqs_pi0_code = 0x20, dqs_pi1_code = 0x60
AWord DQ: txdq_pi0_code = 0x0, txdq_pi1_code = 0x40
AWord DQ: txdq_pi0_code = 0x7F, txdq_pi1_code = 0x3F
AWord DQS: dqs_pi0_code = 0x20, dqs_pi1_code = 0x60
AWord DQS: dqs_pi0_code = 0x20, dqs_pi1_code = 0x60
Socket0 HbmCh28, PI Code:
Socket1 HbmCh28, PI Code:
DWord DQ: txdq_pi0_code = 0x2, txdq_pi1_code = 0x42
DWord DQ: txdq_pi0_code = 0x0, txdq_pi1_code = 0x40
DWord DQS: dqs_pi0_code = 0x20, dqs_pi1_code = 0x60
DWord DQS: dqs_pi0_code = 0x20, dqs_pi1_code = 0x60
AWord DQ: txdq_pi0_code = 0x7D, txdq_pi1_code = 0x3D
AWord DQ: txdq_pi0_code = 0x7E, txdq_pi1_code = 0x3E
AWord DQS: dqs_pi0_code = 0x20, dqs_pi1_code = 0x60
AWord DQS: dqs_pi0_code = 0x20, dqs_pi1_code = 0x60
Socket0 HbmCh29, PI Code:
Socket1 HbmCh29, PI Code:
DWord DQ: txdq_pi0_code = 0x1, txdq_pi1_code = 0x41
DWord DQ: txdq_pi0_code = 0x1, txdq_pi1_code = 0x41
DWord DQS: dqs_pi0_code = 0x20, dqs_pi1_code = 0x60
DWord DQS: dqs_pi0_code = 0x20, dqs_pi1_code = 0x60
AWord DQ: txdq_pi0_code = 0x7D, txdq_pi1_code = 0x3D
AWord DQ: txdq_pi0_code = 0x7E, txdq_pi1_code = 0x3E
AWord DQS: dqs_pi0_code = 0x20, dqs_pi1_code = 0x60
AWord DQS: dqs_pi0_code = 0x20, dqs_pi1_code = 0x60
Socket0 HbmCh30, PI Code:
Socket1 HbmCh30, PI Code:
DWord DQ: txdq_pi0_code = 0x1, txdq_pi1_code = 0x41
DWord DQ: txdq_pi0_code = 0x1, txdq_pi1_code = 0x41
DWord DQS: dqs_pi0_code = 0x20, dqs_pi1_code = 0x60
DWord DQS: dqs_pi0_code = 0x20, dqs_pi1_code = 0x60
AWord DQ: txdq_pi0_code = 0x7F, txdq_pi1_code = 0x3F
AWord DQ: txdq_pi0_code = 0x7D, txdq_pi1_code = 0x3D
AWord DQS: dqs_pi0_code = 0x20, dqs_pi1_code = 0x60
AWord DQS: dqs_pi0_code = 0x20, dqs_pi1_code = 0x60
Socket0 HbmCh31, PI Code:
Socket1 HbmCh31, PI Code:
DWord DQ: txdq_pi0_code = 0x2, txdq_pi1_code = 0x42
DWord DQ: txdq_pi0_code = 0x7F, txdq_pi1_code = 0x3F
DWord DQS: dqs_pi0_code = 0x20, dqs_pi1_code = 0x60
DWord DQS: dqs_pi0_code = 0x20, dqs_pi1_code = 0x60
AWord DQ: txdq_pi0_code = 0x7D, txdq_pi1_code = 0x3D
AWord DQ: txdq_pi0_code = 0x7F, txdq_pi1_code = 0x3F
AWord DQS: dqs_pi0_code = 0x20, dqs_pi1_code = 0x60
AWord DQS: dqs_pi0_code = 0x20, dqs_pi1_code = 0x60
Socket0 HbmIo0, HbmPhyCfg0Fuse = 0xF2099D47, HbmPhyCfg1Fuse = 0x26C8A033
Socket1 HbmIo0, HbmPhyCfg0Fuse = 0xF2099D47, HbmPhyCfg1Fuse = 0x26C8A033
Socket0 HbmIo1, HbmPhyCfg0Fuse = 0xF2099D47, HbmPhyCfg1Fuse = 0x26C8A833
Socket1 HbmIo1, HbmPhyCfg0Fuse = 0xF2099D47, HbmPhyCfg1Fuse = 0x26C8A833
Socket0 HbmIo2, HbmPhyCfg0Fuse = 0xF2099D47, HbmPhyCfg1Fuse = 0x26C8A833
Socket1 HbmIo2, HbmPhyCfg0Fuse = 0xF2099D47, HbmPhyCfg1Fuse = 0x26C8A833
Socket0 HbmIo3, HbmPhyCfg0Fuse = 0xF2099D47, HbmPhyCfg1Fuse = 0x26C8A033
Socket1 HbmIo3, HbmPhyCfg0Fuse = 0xF2099D47, HbmPhyCfg1Fuse = 0x26C8A033
Socket0 HbmCh0, AWordReadTiming = 0x83E59423, AWordWriteTiming = 0x1D3400A5
Socket1 HbmCh0, AWordReadTiming = 0x83E59423, AWordWriteTiming = 0x1D3400A5
Socket0 HbmCh1, AWordReadTiming = 0x83E59423, AWordWriteTiming = 0x1D3400A5
Socket1 HbmCh1, AWordReadTiming = 0x83E59423, AWordWriteTiming = 0x1D3400A5
Socket0 HbmCh2, AWordReadTiming = 0x83E59423, AWordWriteTiming = 0x1D3400A5
Socket1 HbmCh2, AWordReadTiming = 0x83E59423, AWordWriteTiming = 0x1D3400A5
Socket0 HbmCh3, AWordReadTiming = 0x83E59423, AWordWriteTiming = 0x1D3400A5
Socket1 HbmCh3, AWordReadTiming = 0x83E59423, AWordWriteTiming = 0x1D3400A5
Socket0 HbmCh4, AWordReadTiming = 0x83E59423, AWordWriteTiming = 0x1D3400A5
Socket1 HbmCh4, AWordReadTiming = 0x83E59423, AWordWriteTiming = 0x1D3400A5
Socket0 HbmCh5, AWordReadTiming = 0x83E59423, AWordWriteTiming = 0x1D3400A5
Socket1 HbmCh5, AWordReadTiming = 0x83E59423, AWordWriteTiming = 0x1D3400A5
Socket0 HbmCh6, AWordReadTiming = 0x83E59423, AWordWriteTiming = 0x1D3400A5
Socket1 HbmCh6, AWordReadTiming = 0x83E59423, AWordWriteTiming = 0x1D3400A5
Socket0 HbmCh7, AWordReadTiming = 0x83E59423, AWordWriteTiming = 0x1D3400A5
Socket1 HbmCh7, AWordReadTiming = 0x83E59423, AWordWriteTiming = 0x1D3400A5
Socket0 HbmCh8, AWordReadTiming = 0x83E59423, AWordWriteTiming = 0x1D3400A5
Socket1 HbmCh8, AWordReadTiming = 0x83E59423, AWordWriteTiming = 0x1D3400A5
Socket0 HbmCh9, AWordReadTiming = 0x83E59423, AWordWriteTiming = 0x1D3400A5
Socket1 HbmCh9, AWordReadTiming = 0x83E59423, AWordWriteTiming = 0x1D3400A5
Socket0 HbmCh10, AWordReadTiming = 0x83E59423, AWordWriteTiming = 0x1D3400A5
Socket1 HbmCh10, AWordReadTiming = 0x83E59423, AWordWriteTiming = 0x1D3400A5
Socket0 HbmCh11, AWordReadTiming = 0x83E59423, AWordWriteTiming = 0x1D3400A5
Socket1 HbmCh11, AWordReadTiming = 0x83E59423, AWordWriteTiming = 0x1D3400A5
Socket0 HbmCh12, AWordReadTiming = 0x83E59423, AWordWriteTiming = 0x1D3400A5
Socket1 HbmCh12, AWordReadTiming = 0x83E59423, AWordWriteTiming = 0x1D3400A5
Socket0 HbmCh13, AWordReadTiming = 0x83E59423, AWordWriteTiming = 0x1D3400A5
Socket1 HbmCh13, AWordReadTiming = 0x83E59423, AWordWriteTiming = 0x1D3400A5
Socket0 HbmCh14, AWordReadTiming = 0x83E59423, AWordWriteTiming = 0x1D3400A5
Socket1 HbmCh14, AWordReadTiming = 0x83E59423, AWordWriteTiming = 0x1D3400A5
Socket0 HbmCh15, AWordReadTiming = 0x83E59423, AWordWriteTiming = 0x1D3400A5
Socket1 HbmCh15, AWordReadTiming = 0x83E59423, AWordWriteTiming = 0x1D3400A5
Socket0 HbmCh16, AWordReadTiming = 0x83E59423, AWordWriteTiming = 0x1D3400A5
Socket1 HbmCh16, AWordReadTiming = 0x83E59423, AWordWriteTiming = 0x1D3400A5
Socket0 HbmCh17, AWordReadTiming = 0x83E59423, AWordWriteTiming = 0x1D3400A5
Socket1 HbmCh17, AWordReadTiming = 0x83E59423, AWordWriteTiming = 0x1D3400A5
Socket0 HbmCh18, AWordReadTiming = 0x83E59423, AWordWriteTiming = 0x1D3400A5
Socket1 HbmCh18, AWordReadTiming = 0x83E59423, AWordWriteTiming = 0x1D3400A5
Socket0 HbmCh19, AWordReadTiming = 0x83E59423, AWordWriteTiming = 0x1D3400A5
Socket1 HbmCh19, AWordReadTiming = 0x83E59423, AWordWriteTiming = 0x1D3400A5
Socket0 HbmCh20, AWordReadTiming = 0x83E59423, AWordWriteTiming = 0x1D3400A5
Socket1 HbmCh20, AWordReadTiming = 0x83E59423, AWordWriteTiming = 0x1D3400A5
Socket0 HbmCh21, AWordReadTiming = 0x83E59423, AWordWriteTiming = 0x1D3400A5
Socket1 HbmCh21, AWordReadTiming = 0x83E59423, AWordWriteTiming = 0x1D3400A5
Socket0 HbmCh22, AWordReadTiming = 0x83E59423, AWordWriteTiming = 0x1D3400A5
Socket1 HbmCh22, AWordReadTiming = 0x83E59423, AWordWriteTiming = 0x1D3400A5
Socket0 HbmCh23, AWordReadTiming = 0x83E59423, AWordWriteTiming = 0x1D3400A5
Socket1 HbmCh23, AWordReadTiming = 0x83E59423, AWordWriteTiming = 0x1D3400A5
Socket0 HbmCh24, AWordReadTiming = 0x83E59423, AWordWriteTiming = 0x1D3400A5
Socket1 HbmCh24, AWordReadTiming = 0x83E59423, AWordWriteTiming = 0x1D3400A5
Socket0 HbmCh25, AWordReadTiming = 0x83E59423, AWordWriteTiming = 0x1D3400A5
Socket1 HbmCh25, AWordReadTiming = 0x83E59423, AWordWriteTiming = 0x1D3400A5
Socket0 HbmCh26, AWordReadTiming = 0x83E59423, AWordWriteTiming = 0x1D3400A5
Socket1 HbmCh26, AWordReadTiming = 0x83E59423, AWordWriteTiming = 0x1D3400A5
Socket0 HbmCh27, AWordReadTiming = 0x83E59423, AWordWriteTiming = 0x1D3400A5
Socket1 HbmCh27, AWordReadTiming = 0x83E59423, AWordWriteTiming = 0x1D3400A5
Socket0 HbmCh28, AWordReadTiming = 0x83E59423, AWordWriteTiming = 0x1D3400A5
Socket1 HbmCh28, AWordReadTiming = 0x83E59423, AWordWriteTiming = 0x1D3400A5
Socket0 HbmCh29, AWordReadTiming = 0x83E59423, AWordWriteTiming = 0x1D3400A5
Socket1 HbmCh29, AWordReadTiming = 0x83E59423, AWordWriteTiming = 0x1D3400A5
Socket0 HbmCh30, AWordReadTiming = 0x83E59423, AWordWriteTiming = 0x1D3400A5
Socket1 HbmCh30, AWordReadTiming = 0x83E59423, AWordWriteTiming = 0x1D3400A5
Socket0 HbmCh31, AWordReadTiming = 0x83E59423, AWordWriteTiming = 0x1D3400A5
Socket1 HbmCh31, AWordReadTiming = 0x83E59423, AWordWriteTiming = 0x1D3400A5
Socket0 HbmIo0, UcRamEccLog0 = 0x0, UcRamEccLog1 = 0x0
Socket1 HbmIo0, UcRamEccLog0 = 0x0, UcRamEccLog1 = 0x0
Socket0 HbmIo1, UcRamEccLog0 = 0x0, UcRamEccLog1 = 0x0
Socket1 HbmIo1, UcRamEccLog0 = 0x0, UcRamEccLog1 = 0x0
Socket0 HbmIo2, UcRamEccLog0 = 0x0, UcRamEccLog1 = 0x0
Socket1 HbmIo2, UcRamEccLog0 = 0x0, UcRamEccLog1 = 0x0
Socket0 HbmIo3, UcRamEccLog0 = 0x0, UcRamEccLog1 = 0x0
Socket1 HbmIo3, UcRamEccLog0 = 0x0, UcRamEccLog1 = 0x0
Socket0 HbmIo0, UcScratchPad0 = 0x60000000, UcScratchPad1 = 0x40000006, UcScratchPad2 = 0x0
Socket1 HbmIo0, UcScratchPad0 = 0x60000000, UcScratchPad1 = 0x40000006, UcScratchPad2 = 0x0
Socket0 HbmIo1, UcScratchPad0 = 0x60000000, UcScratchPad1 = 0x40000006, UcScratchPad2 = 0x0
Socket1 HbmIo1, UcScratchPad0 = 0x60000000, UcScratchPad1 = 0x40000006, UcScratchPad2 = 0x0
Socket0 HbmIo2, UcScratchPad0 = 0x60000000, UcScratchPad1 = 0x40000006, UcScratchPad2 = 0x0
Socket1 HbmIo2, UcScratchPad0 = 0x60000000, UcScratchPad1 = 0x40000006, UcScratchPad2 = 0x0
Socket0 HbmIo3, UcScratchPad0 = 0x60000000, UcScratchPad1 = 0x40000006, UcScratchPad2 = 0x0
Socket1 HbmIo3, UcScratchPad0 = 0x60000000, UcScratchPad1 = 0x40000006, UcScratchPad2 = 0x0
HbmioMailbox -IEEE 1500 Read Device ID for Socket 0 HbmIoId 0
HbmioMailbox -IEEE 1500 Read Device ID for Socket 1 HbmIoId 0
HBM: DeviceIdData = {0x3389FFC3, 0xA0A80431, 0x0003A1D0}
HBM: DeviceIdData = {0xAAE9FFC3, 0xA0A80400, 0x0003A1D0}
HbmioMailbox -IEEE 1500 Read Device ID for Socket 0 HbmIoId 1
HbmioMailbox -IEEE 1500 Read Device ID for Socket 1 HbmIoId 1
HBM: DeviceIdData = {0x2309FFC3, 0xA0A80431, 0x0003A1D0}
HBM: DeviceIdData = {0xAE09FFC3, 0xA0A80400, 0x0003A1D0}
HbmioMailbox -IEEE 1500 Read Device ID for Socket 0 HbmIoId 2
HbmioMailbox -IEEE 1500 Read Device ID for Socket 1 HbmIoId 2
HBM: DeviceIdData = {0x3DC9FFC3, 0xA0A80431, 0x0003A1D0}
HBM: DeviceIdData = {0xA271FFC3, 0xA0A80400, 0x0003A1D0}
HbmioMailbox -IEEE 1500 Read Device ID for Socket 0 HbmIoId 3
HbmioMailbox -IEEE 1500 Read Device ID for Socket 1 HbmIoId 3
HBM: DeviceIdData = {0x2669FFC3, 0xA0A00020, 0x0003A1D0}
HBM: DeviceIdData = {0xB299FFC3, 0xA0A80400, 0x0003A1D0}
| HBM Socket:0 Display Device Info |
| Field | HBMIO MODULE 0 | HBMIO MODULE 1 | HBMIO MODULE 2 | HBMIO MODULE 3 |
|Module Enable | ENABLED | ENABLED | ENABLED | ENABLED |
|Model num | 43 | 43 | 43 | 43 |
|Stack High | 8 | 8 | 8 | 8 |
|Channel enable| 11111111 | 11111111 | 11111111 | 11111111 |
|Address Mode | Pseudo Ch | Pseudo Ch | Pseudo Ch | Pseudo Ch |
|Serial number | 02010C4CE2 | 02010C48C2 | 02010C4F72 | 000008099A |
|Manuf. Week | WW10 | WW10 | WW10 | WW10 |
|Manuf. Year | 2021 | 2021 | 2021 | 2021 |
|Manuf. loc | 000D | 000D | 000D | 000D |
|Manuf. ID | SAMSUNG | SAMSUNG | SAMSUNG | SAMSUNG |
|Density | 16 Gbit | 16 Gbit | 16 Gbit | 16 Gbit |
|ECC | ECC | ECC | ECC | ECC |
|Gen2 Test | Supported | Supported | Supported | Supported |
| HBM Socket:1 Display Device Info |
| Field | HBMIO MODULE 0 | HBMIO MODULE 1 | HBMIO MODULE 2 | HBMIO MODULE 3 |
|Module Enable | ENABLED | ENABLED | ENABLED | ENABLED |
|Model num | 43 | 43 | 43 | 43 |
|Stack High | 8 | 8 | 8 | 8 |
|Channel enable| 11111111 | 11111111 | 11111111 | 11111111 |
|Address Mode | Pseudo Ch | Pseudo Ch | Pseudo Ch | Pseudo Ch |
|Serial number | 0201002ABA | 0201002B82 | 020100289C | 0201002CA6 |
|Manuf. Week | WW10 | WW10 | WW10 | WW10 |
|Manuf. Year | 2021 | 2021 | 2021 | 2021 |
|Manuf. loc | 000D | 000D | 000D | 000D |
|Manuf. ID | SAMSUNG | SAMSUNG | SAMSUNG | SAMSUNG |
|Density | 16 Gbit | 16 Gbit | 16 Gbit | 16 Gbit |
|ECC | ECC | ECC | ECC | ECC |
|Gen2 Test | Supported | Supported | Supported | Supported |
N0: DDR and HBM memory populated!
N1: DDR and HBM memory populated!
[ScktId: 0] HBM Training - 2916ms
[ScktId: 1] HBM Training - 2915ms
[ScktId: 0] HBM PPR Flow -- Started
[ScktId: 1] HBM PPR Flow -- Started
[ScktId: 0] HBM PPR Flow - 6ms
[ScktId: 1] HBM PPR Flow - 7ms
[ScktId: 0] HBM mBIST Flow -- Started
[ScktId: 1] HBM mBIST Flow -- Started
[ScktId: 0] HBM mBIST Flow - 6ms
[ScktId: 1] HBM mBIST Flow - 7ms
[ScktId: 0] HBM ReTraining -- Started
[ScktId: 1] HBM ReTraining -- Started
[ScktId: 0] HBM ReTraining - 7ms
[ScktId: 1] HBM ReTraining - 7ms
[ScktId: 0] AP HBM Information -- Started
[ScktId: 1] AP HBM Information -- Started
[ScktId: 0] AP HBM Information - 12ms
[ScktId: 1] AP HBM Information - 9ms
[ScktId: 0] Post-Training Initialization -- Started
[ScktId: 1] Post-Training Initialization -- Started
[ScktId: 0] Post-Training Initialization - 9ms
[ScktId: 1] Post-Training Initialization - 10ms
[ScktId: 0] Pipe Sync AP Pre SSA Data -- Started
[ScktId: 1] Pipe Sync AP Pre SSA Data -- Started
[ScktId: 0] Pipe Sync AP Pre SSA Data - 27ms
[ScktId: 1] Pipe Sync AP Pre SSA Data - 22ms
[ScktId: 0] Enable RX Retraining -- Started
[ScktId: 1] Enable RX Retraining -- Started
[ScktId: 0] Enable RX Retraining - 8ms
[ScktId: 1] Enable RX Retraining - 8ms
[ScktId: 0] Enable TX Retraining -- Started
[ScktId: 1] Enable TX Retraining -- Started
[ScktId: 0] Enable TX Retraining - 521ms
[ScktId: 0] Rank Margin Test -- Started
[ScktId: 1] Enable TX Retraining - 521ms
[ScktId: 0] Rank Margin Test - 3ms
[ScktId: 1] Rank Margin Test -- Started
[ScktId: 0] Pipe Sync SBSP Post SSA Data -- Started
[ScktId: 1] Rank Margin Test - 7ms
[ScktId: 1] Pipe Sync SBSP Post SSA Data -- Started
[ScktId: 1] Pipe Sync SBSP Post SSA Data - 5ms
[ScktId: 0] Pipe Sync SBSP Post SSA Data - 17ms
[ScktId: 1] Pipe Sync AP Pre I/O Health Check Data -- Started
[ScktId: 0] Pipe Sync AP Pre I/O Health Check Data -- Started
[ScktId: 0] Pipe Sync AP Pre I/O Health Check Data - 25ms
[ScktId: 1] Pipe Sync AP Pre I/O Health Check Data - 30ms
[ScktId: 0] Perform I/O Health Check -- Started
[ScktId: 1] Perform I/O Health Check -- Started
I/O Health Check Passed
[ScktId: 0] Perform I/O Health Check - 1605ms
I/O Health Check Passed
[ScktId: 0] Pipe Sync SBSP Post I/O Heath Check -- Started
[ScktId: 1] Perform I/O Health Check - 1606ms
[ScktId: 1] Pipe Sync SBSP Post I/O Heath Check -- Started
[ScktId: 0] Pipe Sync SBSP Post I/O Heath Check - 18ms
[ScktId: 1] Pipe Sync SBSP Post I/O Heath Check - 5ms
N1 Checked into Pipe
[ScktId: 0] Check I/O Health Check Status -- Started
[ScktId: 0] Check I/O Health Check Status - 7ms
[ScktId: 1] Offset training results -- Started
[ScktId: 0] Offset training results -- Started
[ScktId: 1] Offset training results - 4ms
[ScktId: 0] Offset training results - 9ms
[ScktId: 1] HBM Post-Training -- Started
[ScktId: 0] HBM Post-Training -- Started
N1.C00: HBM Density: 10 N0.C00: HBM Density: 10 N1.C00: Column Address width: 0; N0.C00: Column Address width: 0; N1.C00: Row Address width: 3; N0.C00: Row Address width: 3; N1.C00: Number of banks: 2
N0.C00: Number of banks: 2
N1.C08: HBM Density: 10 N0.C08: HBM Density: 10 N1.C08: Column Address width: 0; N0.C08: Column Address width: 0; N1.C08: Row Address width: 3; N0.C08: Row Address width: 3; N1.C08: Number of banks: 2
N0.C08: Number of banks: 2
N1.C16: HBM Density: 10 N0.C16: HBM Density: 10 N1.C16: Column Address width: 0; N0.C16: Column Address width: 0; N1.C16: Row Address width: 3; N0.C16: Row Address width: 3; N1.C16: Number of banks: 2
N0.C16: Number of banks: 2
N1.C24: HBM Density: 10 N0.C24: HBM Density: 10 N1.C24: Column Address width: 0; N0.C24: Column Address width: 0; N1.C24: Row Address width: 3; N0.C24: Row Address width: 3; N1.C24: Number of banks: 2
N0.C24: Number of banks: 2
MemHotOutputOnlyOpt set to :0
MemHotOutputOnlyOpt set to :0
Socket 1 Ch 0 - CkeLl0.Data = 0x10000080
Socket 1 Ch 0 - CkeLl1.Data = 0x10000260
Socket 1 Ch 0 - CkeLl2.Data = 0x10000230
Socket 1 Ch 0 - CkeLl3.Data = 0x10000230
Socket 1 Ch 0 - PkgcCke.Data = 0x10000230
Socket 0 Ch 0 - CkeLl0.Data = 0x10000080
Socket 0 Ch 0 - CkeLl1.Data = 0x10000260
Socket 0 Ch 0 - CkeLl2.Data = 0x10000230
Socket 0 Ch 0 - CkeLl3.Data = 0x10000230
Socket 0 Ch 0 - PkgcCke.Data = 0x10000230
LpModePmControlN0.Data Original = 0x8806C
LpModePmControlN0.Data Original = 0x8806C
LpModePmControlN1.Data Original = 0x0
LpModePmControlN1.Data Original = 0x0
LpModePmControlN0.Data New = 0xC3F4206B
LpModePmControlN0.Data New = 0xC3F4206B
LpModePmControlN1.Data New = 0x87
LpModePmControlN1.Data New = 0x87
N1.C00: HBM Tcrftp.t_rfc = 0xA for density 0x00000001
N0.C00: HBM Tcrftp.t_rfc = 0xA for density 0x00000000
Socket 1 Ch 1 - CkeLl0.Data = 0x10000080
Socket 1 Ch 1 - CkeLl1.Data = 0x10000260
Socket 1 Ch 1 - CkeLl2.Data = 0x10000230
Socket 1 Ch 1 - CkeLl3.Data = 0x10000230
Socket 1 Ch 1 - PkgcCke.Data = 0x10000230
Socket 0 Ch 1 - CkeLl0.Data = 0x10000080
Socket 0 Ch 1 - CkeLl1.Data = 0x10000260
Socket 0 Ch 1 - CkeLl2.Data = 0x10000230
Socket 0 Ch 1 - CkeLl3.Data = 0x10000230
Socket 0 Ch 1 - PkgcCke.Data = 0x10000230
LpModePmControlN0.Data Original = 0x8806C
LpModePmControlN0.Data Original = 0x8806C
LpModePmControlN1.Data Original = 0x0
LpModePmControlN1.Data Original = 0x0
LpModePmControlN0.Data New = 0xC3F4206B
LpModePmControlN0.Data New = 0xC3F4206B
LpModePmControlN1.Data New = 0x87
LpModePmControlN1.Data New = 0x87
N1.C01: HBM Tcrftp.t_rfc = 0xA for density 0x00000001
N0.C01: HBM Tcrftp.t_rfc = 0xA for density 0x00000000
Socket 1 Ch 2 - CkeLl0.Data = 0x10000080
Socket 1 Ch 2 - CkeLl1.Data = 0x10000260
Socket 1 Ch 2 - CkeLl2.Data = 0x10000230
Socket 1 Ch 2 - CkeLl3.Data = 0x10000230
Socket 1 Ch 2 - PkgcCke.Data = 0x10000230
Socket 0 Ch 2 - CkeLl0.Data = 0x10000080
Socket 0 Ch 2 - CkeLl1.Data = 0x10000260
Socket 0 Ch 2 - CkeLl2.Data = 0x10000230
Socket 0 Ch 2 - CkeLl3.Data = 0x10000230
Socket 0 Ch 2 - PkgcCke.Data = 0x10000230
LpModePmControlN0.Data Original = 0x8806C
LpModePmControlN0.Data Original = 0x8806C
LpModePmControlN1.Data Original = 0x0
LpModePmControlN1.Data Original = 0x0
LpModePmControlN0.Data New = 0xC3F4206B
LpModePmControlN0.Data New = 0xC3F4206B
LpModePmControlN1.Data New = 0x87
LpModePmControlN1.Data New = 0x87
N1.C02: HBM Tcrftp.t_rfc = 0xA for density 0x00000001
N0.C02: HBM Tcrftp.t_rfc = 0xA for density 0x00000000
Socket 1 Ch 3 - CkeLl0.Data = 0x10000080
Socket 1 Ch 3 - CkeLl1.Data = 0x10000260
Socket 1 Ch 3 - CkeLl2.Data = 0x10000230
Socket 1 Ch 3 - CkeLl3.Data = 0x10000230
Socket 1 Ch 3 - PkgcCke.Data = 0x10000230
Socket 0 Ch 3 - CkeLl0.Data = 0x10000080
Socket 0 Ch 3 - CkeLl1.Data = 0x10000260
Socket 0 Ch 3 - CkeLl2.Data = 0x10000230
Socket 0 Ch 3 - CkeLl3.Data = 0x10000230
Socket 0 Ch 3 - PkgcCke.Data = 0x10000230
LpModePmControlN0.Data Original = 0x8806C
LpModePmControlN0.Data Original = 0x8806C
LpModePmControlN1.Data Original = 0x0
LpModePmControlN1.Data Original = 0x0
LpModePmControlN0.Data New = 0xC3F4206B
LpModePmControlN0.Data New = 0xC3F4206B
LpModePmControlN1.Data New = 0x87
LpModePmControlN1.Data New = 0x87
N1.C03: HBM Tcrftp.t_rfc = 0xA for density 0x00000001
N0.C03: HBM Tcrftp.t_rfc = 0xA for density 0x00000000
Socket 1 Ch 4 - CkeLl0.Data = 0x10000080
Socket 1 Ch 4 - CkeLl1.Data = 0x10000260
Socket 1 Ch 4 - CkeLl2.Data = 0x10000230
Socket 1 Ch 4 - CkeLl3.Data = 0x10000230
Socket 1 Ch 4 - PkgcCke.Data = 0x10000230
Socket 0 Ch 4 - CkeLl0.Data = 0x10000080
Socket 0 Ch 4 - CkeLl1.Data = 0x10000260
Socket 0 Ch 4 - CkeLl2.Data = 0x10000230
Socket 0 Ch 4 - CkeLl3.Data = 0x10000230
Socket 0 Ch 4 - PkgcCke.Data = 0x10000230
LpModePmControlN0.Data Original = 0x8806C
LpModePmControlN0.Data Original = 0x8806C
LpModePmControlN1.Data Original = 0x0
LpModePmControlN1.Data Original = 0x0
LpModePmControlN0.Data New = 0xC3F4206B
LpModePmControlN0.Data New = 0xC3F4206B
LpModePmControlN1.Data New = 0x87
LpModePmControlN1.Data New = 0x87
N1.C04: HBM Tcrftp.t_rfc = 0xA for density 0x00000001
N0.C04: HBM Tcrftp.t_rfc = 0xA for density 0x00000000
Socket 1 Ch 5 - CkeLl0.Data = 0x10000080
Socket 1 Ch 5 - CkeLl1.Data = 0x10000260
Socket 1 Ch 5 - CkeLl2.Data = 0x10000230
Socket 1 Ch 5 - CkeLl3.Data = 0x10000230
Socket 1 Ch 5 - PkgcCke.Data = 0x10000230
Socket 0 Ch 5 - CkeLl0.Data = 0x10000080
Socket 0 Ch 5 - CkeLl1.Data = 0x10000260
Socket 0 Ch 5 - CkeLl2.Data = 0x10000230
Socket 0 Ch 5 - CkeLl3.Data = 0x10000230
Socket 0 Ch 5 - PkgcCke.Data = 0x10000230
LpModePmControlN0.Data Original = 0x8806C
LpModePmControlN0.Data Original = 0x8806C
LpModePmControlN1.Data Original = 0x0
LpModePmControlN1.Data Original = 0x0
LpModePmControlN0.Data New = 0xC3F4206B
LpModePmControlN0.Data New = 0xC3F4206B
LpModePmControlN1.Data New = 0x87
LpModePmControlN1.Data New = 0x87
N1.C05: HBM Tcrftp.t_rfc = 0xA for density 0x00000001
N0.C05: HBM Tcrftp.t_rfc = 0xA for density 0x00000000
Socket 1 Ch 6 - CkeLl0.Data = 0x10000080
Socket 1 Ch 6 - CkeLl1.Data = 0x10000260
Socket 1 Ch 6 - CkeLl2.Data = 0x10000230
Socket 1 Ch 6 - CkeLl3.Data = 0x10000230
Socket 1 Ch 6 - PkgcCke.Data = 0x10000230
Socket 0 Ch 6 - CkeLl0.Data = 0x10000080
Socket 0 Ch 6 - CkeLl1.Data = 0x10000260
Socket 0 Ch 6 - CkeLl2.Data = 0x10000230
Socket 0 Ch 6 - CkeLl3.Data = 0x10000230
Socket 0 Ch 6 - PkgcCke.Data = 0x10000230
LpModePmControlN0.Data Original = 0x8806C
LpModePmControlN0.Data Original = 0x8806C
LpModePmControlN1.Data Original = 0x0
LpModePmControlN1.Data Original = 0x0
LpModePmControlN0.Data New = 0xC3F4206B
LpModePmControlN0.Data New = 0xC3F4206B
LpModePmControlN1.Data New = 0x87
LpModePmControlN1.Data New = 0x87
N1.C06: HBM Tcrftp.t_rfc = 0xA for density 0x00000001
N0.C06: HBM Tcrftp.t_rfc = 0xA for density 0x00000000
Socket 1 Ch 7 - CkeLl0.Data = 0x10000080
Socket 1 Ch 7 - CkeLl1.Data = 0x10000260
Socket 1 Ch 7 - CkeLl2.Data = 0x10000230
Socket 1 Ch 7 - CkeLl3.Data = 0x10000230
Socket 1 Ch 7 - PkgcCke.Data = 0x10000230
Socket 0 Ch 7 - CkeLl0.Data = 0x10000080
Socket 0 Ch 7 - CkeLl1.Data = 0x10000260
Socket 0 Ch 7 - CkeLl2.Data = 0x10000230
Socket 0 Ch 7 - CkeLl3.Data = 0x10000230
Socket 0 Ch 7 - PkgcCke.Data = 0x10000230
LpModePmControlN0.Data Original = 0x8806C
LpModePmControlN0.Data Original = 0x8806C
LpModePmControlN1.Data Original = 0x0
LpModePmControlN1.Data Original = 0x0
LpModePmControlN0.Data New = 0xC3F4206B
LpModePmControlN0.Data New = 0xC3F4206B
LpModePmControlN1.Data New = 0x87
LpModePmControlN1.Data New = 0x87
N1.C07: HBM Tcrftp.t_rfc = 0xA for density 0x00000001
N0.C07: HBM Tcrftp.t_rfc = 0xA for density 0x00000000
Socket 1 Ch 8 - CkeLl0.Data = 0x10000080
Socket 1 Ch 8 - CkeLl1.Data = 0x10000260
Socket 1 Ch 8 - CkeLl2.Data = 0x10000230
Socket 1 Ch 8 - CkeLl3.Data = 0x10000230
Socket 1 Ch 8 - PkgcCke.Data = 0x10000230
Socket 0 Ch 8 - CkeLl0.Data = 0x10000080
Socket 0 Ch 8 - CkeLl1.Data = 0x10000260
Socket 0 Ch 8 - CkeLl2.Data = 0x10000230
Socket 0 Ch 8 - CkeLl3.Data = 0x10000230
Socket 0 Ch 8 - PkgcCke.Data = 0x10000230
LpModePmControlN0.Data Original = 0x8806C
LpModePmControlN0.Data Original = 0x8806C
LpModePmControlN1.Data Original = 0x0
LpModePmControlN1.Data Original = 0x0
LpModePmControlN0.Data New = 0xC3F4206B
LpModePmControlN0.Data New = 0xC3F4206B
LpModePmControlN1.Data New = 0x87
LpModePmControlN1.Data New = 0x87
N1.C08: HBM Tcrftp.t_rfc = 0xA for density 0x00000001
N0.C08: HBM Tcrftp.t_rfc = 0xA for density 0x00000000
Socket 1 Ch 9 - CkeLl0.Data = 0x10000080
Socket 1 Ch 9 - CkeLl1.Data = 0x10000260
Socket 1 Ch 9 - CkeLl2.Data = 0x10000230
Socket 1 Ch 9 - CkeLl3.Data = 0x10000230
Socket 1 Ch 9 - PkgcCke.Data = 0x10000230
Socket 0 Ch 9 - CkeLl0.Data = 0x10000080
Socket 0 Ch 9 - CkeLl1.Data = 0x10000260
Socket 0 Ch 9 - CkeLl2.Data = 0x10000230
Socket 0 Ch 9 - CkeLl3.Data = 0x10000230
Socket 0 Ch 9 - PkgcCke.Data = 0x10000230
LpModePmControlN0.Data Original = 0x8806C
LpModePmControlN0.Data Original = 0x8806C
LpModePmControlN1.Data Original = 0x0
LpModePmControlN1.Data Original = 0x0
LpModePmControlN0.Data New = 0xC3F4206B
LpModePmControlN0.Data New = 0xC3F4206B
LpModePmControlN1.Data New = 0x87
LpModePmControlN1.Data New = 0x87
N1.C09: HBM Tcrftp.t_rfc = 0xA for density 0x00000001
N0.C09: HBM Tcrftp.t_rfc = 0xA for density 0x00000000
Socket 1 Ch 10 - CkeLl0.Data = 0x10000080
Socket 1 Ch 10 - CkeLl1.Data = 0x10000260
Socket 1 Ch 10 - CkeLl2.Data = 0x10000230
Socket 1 Ch 10 - CkeLl3.Data = 0x10000230
Socket 1 Ch 10 - PkgcCke.Data = 0x10000230
Socket 0 Ch 10 - CkeLl0.Data = 0x10000080
Socket 0 Ch 10 - CkeLl1.Data = 0x10000260
Socket 0 Ch 10 - CkeLl2.Data = 0x10000230
Socket 0 Ch 10 - CkeLl3.Data = 0x10000230
Socket 0 Ch 10 - PkgcCke.Data = 0x10000230
LpModePmControlN0.Data Original = 0x8806C
LpModePmControlN0.Data Original = 0x8806C
LpModePmControlN1.Data Original = 0x0
LpModePmControlN1.Data Original = 0x0
LpModePmControlN0.Data New = 0xC3F4206B
LpModePmControlN0.Data New = 0xC3F4206B
LpModePmControlN1.Data New = 0x87
LpModePmControlN1.Data New = 0x87
N1.C10: HBM Tcrftp.t_rfc = 0xA for density 0x00000001
N0.C10: HBM Tcrftp.t_rfc = 0xA for density 0x00000000
Socket 1 Ch 11 - CkeLl0.Data = 0x10000080
Socket 1 Ch 11 - CkeLl1.Data = 0x10000260
Socket 1 Ch 11 - CkeLl2.Data = 0x10000230
Socket 1 Ch 11 - CkeLl3.Data = 0x10000230
Socket 1 Ch 11 - PkgcCke.Data = 0x10000230
Socket 0 Ch 11 - CkeLl0.Data = 0x10000080
Socket 0 Ch 11 - CkeLl1.Data = 0x10000260
Socket 0 Ch 11 - CkeLl2.Data = 0x10000230
Socket 0 Ch 11 - CkeLl3.Data = 0x10000230
Socket 0 Ch 11 - PkgcCke.Data = 0x10000230
LpModePmControlN0.Data Original = 0x8806C
LpModePmControlN0.Data Original = 0x8806C
LpModePmControlN1.Data Original = 0x0
LpModePmControlN1.Data Original = 0x0
LpModePmControlN0.Data New = 0xC3F4206B
LpModePmControlN0.Data New = 0xC3F4206B
LpModePmControlN1.Data New = 0x87
LpModePmControlN1.Data New = 0x87
N1.C11: HBM Tcrftp.t_rfc = 0xA for density 0x00000001
N0.C11: HBM Tcrftp.t_rfc = 0xA for density 0x00000000
Socket 1 Ch 12 - CkeLl0.Data = 0x10000080
Socket 1 Ch 12 - CkeLl1.Data = 0x10000260
Socket 1 Ch 12 - CkeLl2.Data = 0x10000230
Socket 1 Ch 12 - CkeLl3.Data = 0x10000230
Socket 1 Ch 12 - PkgcCke.Data = 0x10000230
Socket 0 Ch 12 - CkeLl0.Data = 0x10000080
Socket 0 Ch 12 - CkeLl1.Data = 0x10000260
Socket 0 Ch 12 - CkeLl2.Data = 0x10000230
Socket 0 Ch 12 - CkeLl3.Data = 0x10000230
Socket 0 Ch 12 - PkgcCke.Data = 0x10000230
LpModePmControlN0.Data Original = 0x8806C
LpModePmControlN0.Data Original = 0x8806C
LpModePmControlN1.Data Original = 0x0
LpModePmControlN1.Data Original = 0x0
LpModePmControlN0.Data New = 0xC3F4206B
LpModePmControlN0.Data New = 0xC3F4206B
LpModePmControlN1.Data New = 0x87
LpModePmControlN1.Data New = 0x87
N1.C12: HBM Tcrftp.t_rfc = 0xA for density 0x00000001
N0.C12: HBM Tcrftp.t_rfc = 0xA for density 0x00000000
Socket 1 Ch 13 - CkeLl0.Data = 0x10000080
Socket 1 Ch 13 - CkeLl1.Data = 0x10000260
Socket 1 Ch 13 - CkeLl2.Data = 0x10000230
Socket 1 Ch 13 - CkeLl3.Data = 0x10000230
Socket 1 Ch 13 - PkgcCke.Data = 0x10000230
Socket 0 Ch 13 - CkeLl0.Data = 0x10000080
Socket 0 Ch 13 - CkeLl1.Data = 0x10000260
Socket 0 Ch 13 - CkeLl2.Data = 0x10000230
Socket 0 Ch 13 - CkeLl3.Data = 0x10000230
Socket 0 Ch 13 - PkgcCke.Data = 0x10000230
LpModePmControlN0.Data Original = 0x8806C
LpModePmControlN0.Data Original = 0x8806C
LpModePmControlN1.Data Original = 0x0
LpModePmControlN1.Data Original = 0x0
LpModePmControlN0.Data New = 0xC3F4206B
LpModePmControlN0.Data New = 0xC3F4206B
LpModePmControlN1.Data New = 0x87
LpModePmControlN1.Data New = 0x87
N1.C13: HBM Tcrftp.t_rfc = 0xA for density 0x00000001
N0.C13: HBM Tcrftp.t_rfc = 0xA for density 0x00000000
Socket 1 Ch 14 - CkeLl0.Data = 0x10000080
Socket 1 Ch 14 - CkeLl1.Data = 0x10000260
Socket 1 Ch 14 - CkeLl2.Data = 0x10000230
Socket 1 Ch 14 - CkeLl3.Data = 0x10000230
Socket 1 Ch 14 - PkgcCke.Data = 0x10000230
Socket 0 Ch 14 - CkeLl0.Data = 0x10000080
Socket 0 Ch 14 - CkeLl1.Data = 0x10000260
Socket 0 Ch 14 - CkeLl2.Data = 0x10000230
Socket 0 Ch 14 - CkeLl3.Data = 0x10000230
Socket 0 Ch 14 - PkgcCke.Data = 0x10000230
LpModePmControlN0.Data Original = 0x8806C
LpModePmControlN0.Data Original = 0x8806C
LpModePmControlN1.Data Original = 0x0
LpModePmControlN1.Data Original = 0x0
LpModePmControlN0.Data New = 0xC3F4206B
LpModePmControlN0.Data New = 0xC3F4206B
LpModePmControlN1.Data New = 0x87
LpModePmControlN1.Data New = 0x87
N1.C14: HBM Tcrftp.t_rfc = 0xA for density 0x00000001
N0.C14: HBM Tcrftp.t_rfc = 0xA for density 0x00000000
Socket 1 Ch 15 - CkeLl0.Data = 0x10000080
Socket 1 Ch 15 - CkeLl1.Data = 0x10000260
Socket 1 Ch 15 - CkeLl2.Data = 0x10000230
Socket 1 Ch 15 - CkeLl3.Data = 0x10000230
Socket 1 Ch 15 - PkgcCke.Data = 0x10000230
Socket 0 Ch 15 - CkeLl0.Data = 0x10000080
Socket 0 Ch 15 - CkeLl1.Data = 0x10000260
Socket 0 Ch 15 - CkeLl2.Data = 0x10000230
Socket 0 Ch 15 - CkeLl3.Data = 0x10000230
Socket 0 Ch 15 - PkgcCke.Data = 0x10000230
LpModePmControlN0.Data Original = 0x8806C
LpModePmControlN0.Data Original = 0x8806C
LpModePmControlN1.Data Original = 0x0
LpModePmControlN1.Data Original = 0x0
LpModePmControlN0.Data New = 0xC3F4206B
LpModePmControlN0.Data New = 0xC3F4206B
LpModePmControlN1.Data New = 0x87
LpModePmControlN1.Data New = 0x87
N1.C15: HBM Tcrftp.t_rfc = 0xA for density 0x00000001
N0.C15: HBM Tcrftp.t_rfc = 0xA for density 0x00000000
Socket 1 Ch 16 - CkeLl0.Data = 0x10000080
Socket 1 Ch 16 - CkeLl1.Data = 0x10000260
Socket 1 Ch 16 - CkeLl2.Data = 0x10000230
Socket 1 Ch 16 - CkeLl3.Data = 0x10000230
Socket 1 Ch 16 - PkgcCke.Data = 0x10000230
Socket 0 Ch 16 - CkeLl0.Data = 0x10000080
Socket 0 Ch 16 - CkeLl1.Data = 0x10000260
Socket 0 Ch 16 - CkeLl2.Data = 0x10000230
Socket 0 Ch 16 - CkeLl3.Data = 0x10000230
Socket 0 Ch 16 - PkgcCke.Data = 0x10000230
LpModePmControlN0.Data Original = 0x8806C
LpModePmControlN0.Data Original = 0x8806C
LpModePmControlN1.Data Original = 0x0
LpModePmControlN1.Data Original = 0x0
LpModePmControlN0.Data New = 0xC3F4206B
LpModePmControlN0.Data New = 0xC3F4206B
LpModePmControlN1.Data New = 0x87
LpModePmControlN1.Data New = 0x87
N1.C16: HBM Tcrftp.t_rfc = 0xA for density 0x00000001
N0.C16: HBM Tcrftp.t_rfc = 0xA for density 0x00000000
Socket 1 Ch 17 - CkeLl0.Data = 0x10000080
Socket 1 Ch 17 - CkeLl1.Data = 0x10000260
Socket 1 Ch 17 - CkeLl2.Data = 0x10000230
Socket 1 Ch 17 - CkeLl3.Data = 0x10000230
Socket 1 Ch 17 - PkgcCke.Data = 0x10000230
Socket 0 Ch 17 - CkeLl0.Data = 0x10000080
Socket 0 Ch 17 - CkeLl1.Data = 0x10000260
Socket 0 Ch 17 - CkeLl2.Data = 0x10000230
Socket 0 Ch 17 - CkeLl3.Data = 0x10000230
Socket 0 Ch 17 - PkgcCke.Data = 0x10000230
LpModePmControlN0.Data Original = 0x8806C
LpModePmControlN0.Data Original = 0x8806C
LpModePmControlN1.Data Original = 0x0
LpModePmControlN1.Data Original = 0x0
LpModePmControlN0.Data New = 0xC3F4206B
LpModePmControlN0.Data New = 0xC3F4206B
LpModePmControlN1.Data New = 0x87
LpModePmControlN1.Data New = 0x87
N1.C17: HBM Tcrftp.t_rfc = 0xA for density 0x00000001
N0.C17: HBM Tcrftp.t_rfc = 0xA for density 0x00000000
Socket 1 Ch 18 - CkeLl0.Data = 0x10000080
Socket 1 Ch 18 - CkeLl1.Data = 0x10000260
Socket 1 Ch 18 - CkeLl2.Data = 0x10000230
Socket 1 Ch 18 - CkeLl3.Data = 0x10000230
Socket 1 Ch 18 - PkgcCke.Data = 0x10000230
Socket 0 Ch 18 - CkeLl0.Data = 0x10000080
Socket 0 Ch 18 - CkeLl1.Data = 0x10000260
Socket 0 Ch 18 - CkeLl2.Data = 0x10000230
Socket 0 Ch 18 - CkeLl3.Data = 0x10000230
Socket 0 Ch 18 - PkgcCke.Data = 0x10000230
LpModePmControlN0.Data Original = 0x8806C
LpModePmControlN0.Data Original = 0x8806C
LpModePmControlN1.Data Original = 0x0
LpModePmControlN1.Data Original = 0x0
LpModePmControlN0.Data New = 0xC3F4206B
LpModePmControlN0.Data New = 0xC3F4206B
LpModePmControlN1.Data New = 0x87
LpModePmControlN1.Data New = 0x87
N1.C18: HBM Tcrftp.t_rfc = 0xA for density 0x00000001
N0.C18: HBM Tcrftp.t_rfc = 0xA for density 0x00000000
Socket 1 Ch 19 - CkeLl0.Data = 0x10000080
Socket 1 Ch 19 - CkeLl1.Data = 0x10000260
Socket 1 Ch 19 - CkeLl2.Data = 0x10000230
Socket 1 Ch 19 - CkeLl3.Data = 0x10000230
Socket 1 Ch 19 - PkgcCke.Data = 0x10000230
Socket 0 Ch 19 - CkeLl0.Data = 0x10000080
Socket 0 Ch 19 - CkeLl1.Data = 0x10000260
Socket 0 Ch 19 - CkeLl2.Data = 0x10000230
Socket 0 Ch 19 - CkeLl3.Data = 0x10000230
Socket 0 Ch 19 - PkgcCke.Data = 0x10000230
LpModePmControlN0.Data Original = 0x8806C
LpModePmControlN0.Data Original = 0x8806C
LpModePmControlN1.Data Original = 0x0
LpModePmControlN1.Data Original = 0x0
LpModePmControlN0.Data New = 0xC3F4206B
LpModePmControlN0.Data New = 0xC3F4206B
LpModePmControlN1.Data New = 0x87
LpModePmControlN1.Data New = 0x87
N1.C19: HBM Tcrftp.t_rfc = 0xA for density 0x00000001
N0.C19: HBM Tcrftp.t_rfc = 0xA for density 0x00000000
Socket 1 Ch 20 - CkeLl0.Data = 0x10000080
Socket 1 Ch 20 - CkeLl1.Data = 0x10000260
Socket 1 Ch 20 - CkeLl2.Data = 0x10000230
Socket 1 Ch 20 - CkeLl3.Data = 0x10000230
Socket 1 Ch 20 - PkgcCke.Data = 0x10000230
Socket 0 Ch 20 - CkeLl0.Data = 0x10000080
Socket 0 Ch 20 - CkeLl1.Data = 0x10000260
Socket 0 Ch 20 - CkeLl2.Data = 0x10000230
Socket 0 Ch 20 - CkeLl3.Data = 0x10000230
Socket 0 Ch 20 - PkgcCke.Data = 0x10000230
LpModePmControlN0.Data Original = 0x8806C
LpModePmControlN0.Data Original = 0x8806C
LpModePmControlN1.Data Original = 0x0
LpModePmControlN1.Data Original = 0x0
LpModePmControlN0.Data New = 0xC3F4206B
LpModePmControlN0.Data New = 0xC3F4206B
LpModePmControlN1.Data New = 0x87
LpModePmControlN1.Data New = 0x87
N1.C20: HBM Tcrftp.t_rfc = 0xA for density 0x00000001
N0.C20: HBM Tcrftp.t_rfc = 0xA for density 0x00000000
Socket 1 Ch 21 - CkeLl0.Data = 0x10000080
Socket 1 Ch 21 - CkeLl1.Data = 0x10000260
Socket 1 Ch 21 - CkeLl2.Data = 0x10000230
Socket 1 Ch 21 - CkeLl3.Data = 0x10000230
Socket 1 Ch 21 - PkgcCke.Data = 0x10000230
Socket 0 Ch 21 - CkeLl0.Data = 0x10000080
Socket 0 Ch 21 - CkeLl1.Data = 0x10000260
Socket 0 Ch 21 - CkeLl2.Data = 0x10000230
Socket 0 Ch 21 - CkeLl3.Data = 0x10000230
Socket 0 Ch 21 - PkgcCke.Data = 0x10000230
LpModePmControlN0.Data Original = 0x8806C
LpModePmControlN0.Data Original = 0x8806C
LpModePmControlN1.Data Original = 0x0
LpModePmControlN1.Data Original = 0x0
LpModePmControlN0.Data New = 0xC3F4206B
LpModePmControlN0.Data New = 0xC3F4206B
LpModePmControlN1.Data New = 0x87
LpModePmControlN1.Data New = 0x87
N1.C21: HBM Tcrftp.t_rfc = 0xA for density 0x00000001
N0.C21: HBM Tcrftp.t_rfc = 0xA for density 0x00000000
Socket 1 Ch 22 - CkeLl0.Data = 0x10000080
Socket 1 Ch 22 - CkeLl1.Data = 0x10000260
Socket 1 Ch 22 - CkeLl2.Data = 0x10000230
Socket 1 Ch 22 - CkeLl3.Data = 0x10000230
Socket 1 Ch 22 - PkgcCke.Data = 0x10000230
Socket 0 Ch 22 - CkeLl0.Data = 0x10000080
Socket 0 Ch 22 - CkeLl1.Data = 0x10000260
Socket 0 Ch 22 - CkeLl2.Data = 0x10000230
Socket 0 Ch 22 - CkeLl3.Data = 0x10000230
Socket 0 Ch 22 - PkgcCke.Data = 0x10000230
LpModePmControlN0.Data Original = 0x8806C
LpModePmControlN0.Data Original = 0x8806C
LpModePmControlN1.Data Original = 0x0
LpModePmControlN1.Data Original = 0x0
LpModePmControlN0.Data New = 0xC3F4206B
LpModePmControlN0.Data New = 0xC3F4206B
LpModePmControlN1.Data New = 0x87
LpModePmControlN1.Data New = 0x87
N1.C22: HBM Tcrftp.t_rfc = 0xA for density 0x00000001
N0.C22: HBM Tcrftp.t_rfc = 0xA for density 0x00000000
Socket 1 Ch 23 - CkeLl0.Data = 0x10000080
Socket 1 Ch 23 - CkeLl1.Data = 0x10000260
Socket 1 Ch 23 - CkeLl2.Data = 0x10000230
Socket 1 Ch 23 - CkeLl3.Data = 0x10000230
Socket 1 Ch 23 - PkgcCke.Data = 0x10000230
Socket 0 Ch 23 - CkeLl0.Data = 0x10000080
Socket 0 Ch 23 - CkeLl1.Data = 0x10000260
Socket 0 Ch 23 - CkeLl2.Data = 0x10000230
Socket 0 Ch 23 - CkeLl3.Data = 0x10000230
Socket 0 Ch 23 - PkgcCke.Data = 0x10000230
LpModePmControlN0.Data Original = 0x8806C
LpModePmControlN0.Data Original = 0x8806C
LpModePmControlN1.Data Original = 0x0
LpModePmControlN1.Data Original = 0x0
LpModePmControlN0.Data New = 0xC3F4206B
LpModePmControlN0.Data New = 0xC3F4206B
LpModePmControlN1.Data New = 0x87
LpModePmControlN1.Data New = 0x87
N1.C23: HBM Tcrftp.t_rfc = 0xA for density 0x00000001
N0.C23: HBM Tcrftp.t_rfc = 0xA for density 0x00000000
Socket 1 Ch 24 - CkeLl0.Data = 0x10000080
Socket 1 Ch 24 - CkeLl1.Data = 0x10000260
Socket 1 Ch 24 - CkeLl2.Data = 0x10000230
Socket 1 Ch 24 - CkeLl3.Data = 0x10000230
Socket 1 Ch 24 - PkgcCke.Data = 0x10000230
Socket 0 Ch 24 - CkeLl0.Data = 0x10000080
Socket 0 Ch 24 - CkeLl1.Data = 0x10000260
Socket 0 Ch 24 - CkeLl2.Data = 0x10000230
Socket 0 Ch 24 - CkeLl3.Data = 0x10000230
Socket 0 Ch 24 - PkgcCke.Data = 0x10000230
LpModePmControlN0.Data Original = 0x8806C
LpModePmControlN0.Data Original = 0x8806C
LpModePmControlN1.Data Original = 0x0
LpModePmControlN1.Data Original = 0x0
LpModePmControlN0.Data New = 0xC3F4206B
LpModePmControlN0.Data New = 0xC3F4206B
LpModePmControlN1.Data New = 0x87
LpModePmControlN1.Data New = 0x87
N1.C24: HBM Tcrftp.t_rfc = 0xA for density 0x00000001
N0.C24: HBM Tcrftp.t_rfc = 0xA for density 0x00000000
Socket 1 Ch 25 - CkeLl0.Data = 0x10000080
Socket 1 Ch 25 - CkeLl1.Data = 0x10000260
Socket 1 Ch 25 - CkeLl2.Data = 0x10000230
Socket 1 Ch 25 - CkeLl3.Data = 0x10000230
Socket 1 Ch 25 - PkgcCke.Data = 0x10000230
Socket 0 Ch 25 - CkeLl0.Data = 0x10000080
Socket 0 Ch 25 - CkeLl1.Data = 0x10000260
Socket 0 Ch 25 - CkeLl2.Data = 0x10000230
Socket 0 Ch 25 - CkeLl3.Data = 0x10000230
Socket 0 Ch 25 - PkgcCke.Data = 0x10000230
LpModePmControlN0.Data Original = 0x8806C
LpModePmControlN0.Data Original = 0x8806C
LpModePmControlN1.Data Original = 0x0
LpModePmControlN1.Data Original = 0x0
LpModePmControlN0.Data New = 0xC3F4206B
LpModePmControlN0.Data New = 0xC3F4206B
LpModePmControlN1.Data New = 0x87
LpModePmControlN1.Data New = 0x87
N1.C25: HBM Tcrftp.t_rfc = 0xA for density 0x00000001
N0.C25: HBM Tcrftp.t_rfc = 0xA for density 0x00000000
Socket 1 Ch 26 - CkeLl0.Data = 0x10000080
Socket 1 Ch 26 - CkeLl1.Data = 0x10000260
Socket 1 Ch 26 - CkeLl2.Data = 0x10000230
Socket 1 Ch 26 - CkeLl3.Data = 0x10000230
Socket 1 Ch 26 - PkgcCke.Data = 0x10000230
Socket 0 Ch 26 - CkeLl0.Data = 0x10000080
Socket 0 Ch 26 - CkeLl1.Data = 0x10000260
Socket 0 Ch 26 - CkeLl2.Data = 0x10000230
Socket 0 Ch 26 - CkeLl3.Data = 0x10000230
Socket 0 Ch 26 - PkgcCke.Data = 0x10000230
LpModePmControlN0.Data Original = 0x8806C
LpModePmControlN0.Data Original = 0x8806C
LpModePmControlN1.Data Original = 0x0
LpModePmControlN1.Data Original = 0x0
LpModePmControlN0.Data New = 0xC3F4206B
LpModePmControlN0.Data New = 0xC3F4206B
LpModePmControlN1.Data New = 0x87
LpModePmControlN1.Data New = 0x87
N1.C26: HBM Tcrftp.t_rfc = 0xA for density 0x00000001
N0.C26: HBM Tcrftp.t_rfc = 0xA for density 0x00000000
Socket 1 Ch 27 - CkeLl0.Data = 0x10000080
Socket 1 Ch 27 - CkeLl1.Data = 0x10000260
Socket 1 Ch 27 - CkeLl2.Data = 0x10000230
Socket 1 Ch 27 - CkeLl3.Data = 0x10000230
Socket 1 Ch 27 - PkgcCke.Data = 0x10000230
Socket 0 Ch 27 - CkeLl0.Data = 0x10000080
Socket 0 Ch 27 - CkeLl1.Data = 0x10000260
Socket 0 Ch 27 - CkeLl2.Data = 0x10000230
Socket 0 Ch 27 - CkeLl3.Data = 0x10000230
Socket 0 Ch 27 - PkgcCke.Data = 0x10000230
LpModePmControlN0.Data Original = 0x8806C
LpModePmControlN0.Data Original = 0x8806C
LpModePmControlN1.Data Original = 0x0
LpModePmControlN1.Data Original = 0x0
LpModePmControlN0.Data New = 0xC3F4206B
LpModePmControlN0.Data New = 0xC3F4206B
LpModePmControlN1.Data New = 0x87
LpModePmControlN1.Data New = 0x87
N1.C27: HBM Tcrftp.t_rfc = 0xA for density 0x00000001
N0.C27: HBM Tcrftp.t_rfc = 0xA for density 0x00000000
Socket 1 Ch 28 - CkeLl0.Data = 0x10000080
Socket 1 Ch 28 - CkeLl1.Data = 0x10000260
Socket 1 Ch 28 - CkeLl2.Data = 0x10000230
Socket 1 Ch 28 - CkeLl3.Data = 0x10000230
Socket 1 Ch 28 - PkgcCke.Data = 0x10000230
Socket 0 Ch 28 - CkeLl0.Data = 0x10000080
Socket 0 Ch 28 - CkeLl1.Data = 0x10000260
Socket 0 Ch 28 - CkeLl2.Data = 0x10000230
Socket 0 Ch 28 - CkeLl3.Data = 0x10000230
Socket 0 Ch 28 - PkgcCke.Data = 0x10000230
LpModePmControlN0.Data Original = 0x8806C
LpModePmControlN0.Data Original = 0x8806C
LpModePmControlN1.Data Original = 0x0
LpModePmControlN1.Data Original = 0x0
LpModePmControlN0.Data New = 0xC3F4206B
LpModePmControlN0.Data New = 0xC3F4206B
LpModePmControlN1.Data New = 0x87
LpModePmControlN1.Data New = 0x87
N1.C28: HBM Tcrftp.t_rfc = 0xA for density 0x00000001
N0.C28: HBM Tcrftp.t_rfc = 0xA for density 0x00000000
Socket 1 Ch 29 - CkeLl0.Data = 0x10000080
Socket 1 Ch 29 - CkeLl1.Data = 0x10000260
Socket 1 Ch 29 - CkeLl2.Data = 0x10000230
Socket 1 Ch 29 - CkeLl3.Data = 0x10000230
Socket 1 Ch 29 - PkgcCke.Data = 0x10000230
Socket 0 Ch 29 - CkeLl0.Data = 0x10000080
Socket 0 Ch 29 - CkeLl1.Data = 0x10000260
Socket 0 Ch 29 - CkeLl2.Data = 0x10000230
Socket 0 Ch 29 - CkeLl3.Data = 0x10000230
Socket 0 Ch 29 - PkgcCke.Data = 0x10000230
LpModePmControlN0.Data Original = 0x8806C
LpModePmControlN0.Data Original = 0x8806C
LpModePmControlN1.Data Original = 0x0
LpModePmControlN1.Data Original = 0x0
LpModePmControlN0.Data New = 0xC3F4206B
LpModePmControlN0.Data New = 0xC3F4206B
LpModePmControlN1.Data New = 0x87
LpModePmControlN1.Data New = 0x87
N1.C29: HBM Tcrftp.t_rfc = 0xA for density 0x00000001
N0.C29: HBM Tcrftp.t_rfc = 0xA for density 0x00000000
Socket 1 Ch 30 - CkeLl0.Data = 0x10000080
Socket 1 Ch 30 - CkeLl1.Data = 0x10000260
Socket 1 Ch 30 - CkeLl2.Data = 0x10000230
Socket 1 Ch 30 - CkeLl3.Data = 0x10000230
Socket 1 Ch 30 - PkgcCke.Data = 0x10000230
Socket 0 Ch 30 - CkeLl0.Data = 0x10000080
Socket 0 Ch 30 - CkeLl1.Data = 0x10000260
Socket 0 Ch 30 - CkeLl2.Data = 0x10000230
Socket 0 Ch 30 - CkeLl3.Data = 0x10000230
Socket 0 Ch 30 - PkgcCke.Data = 0x10000230
LpModePmControlN0.Data Original = 0x8806C
LpModePmControlN0.Data Original = 0x8806C
LpModePmControlN1.Data Original = 0x0
LpModePmControlN1.Data Original = 0x0
LpModePmControlN0.Data New = 0xC3F4206B
LpModePmControlN0.Data New = 0xC3F4206B
LpModePmControlN1.Data New = 0x87
LpModePmControlN1.Data New = 0x87
N1.C30: HBM Tcrftp.t_rfc = 0xA for density 0x00000001
N0.C30: HBM Tcrftp.t_rfc = 0xA for density 0x00000000
Socket 1 Ch 31 - CkeLl0.Data = 0x10000080
Socket 1 Ch 31 - CkeLl1.Data = 0x10000260
Socket 1 Ch 31 - CkeLl2.Data = 0x10000230
Socket 1 Ch 31 - CkeLl3.Data = 0x10000230
Socket 1 Ch 31 - PkgcCke.Data = 0x10000230
Socket 0 Ch 31 - CkeLl0.Data = 0x10000080
Socket 0 Ch 31 - CkeLl1.Data = 0x10000260
Socket 0 Ch 31 - CkeLl2.Data = 0x10000230
Socket 0 Ch 31 - CkeLl3.Data = 0x10000230
Socket 0 Ch 31 - PkgcCke.Data = 0x10000230
LpModePmControlN0.Data Original = 0x8806C
LpModePmControlN0.Data Original = 0x8806C
LpModePmControlN1.Data Original = 0x0
LpModePmControlN1.Data Original = 0x0
LpModePmControlN0.Data New = 0xC3F4206B
LpModePmControlN0.Data New = 0xC3F4206B
LpModePmControlN1.Data New = 0x87
LpModePmControlN1.Data New = 0x87
N1.C31: HBM Tcrftp.t_rfc = 0xA for density 0x00000001
N0.C31: HBM Tcrftp.t_rfc = 0xA for density 0x00000000
[ScktId: 1] HBM Post-Training - 2817ms
[ScktId: 0] HBM Post-Training - 2818ms
[ScktId: 1] MemTest -- Started
[ScktId: 0] MemTest -- Started
N1: MemTestScram Starts
N0: MemTestScram Starts
...N1:
MemTestScram TestType 10 Ends
.TestType 10 Latency = 2 sec
N0:
MemTestScram TestType 10 Ends
[ScktId: 1] MemTest - 2031ms
TestType 10 Latency = 2 sec
[ScktId: 1] Pipe Sync AP Final Error Sync -- Started
[ScktId: 0] MemTest - 2036ms
[ScktId: 0] Pipe Sync AP Final Error Sync -- Started
[ScktId: 1] Pipe Sync AP Final Error Sync - 16ms
[ScktId: 0] Pipe Sync AP Final Error Sync - 5ms
[ScktId: 1] Late Configuration -- Started
[ScktId: 0] Late Configuration -- Started
S1 TME CPUID = 1
S0 TME CPUID = 1
S1 TmeActivated = 0
S0 TmeActivated = 0
S1 TME CPUID = 1
S0 TME CPUID = 1
S1 TmeActivated = 0
S0 TmeActivated = 0
S1 TME CPUID = 1
S0 TME CPUID = 1
S1 TmeActivated = 0
S0 TmeActivated = 0
S1 TME CPUID = 1
S0 TME CPUID = 1
S1 TmeActivated = 0
S0 TmeActivated = 0
[ScktId: 1] Late Configuration - 41ms
[ScktId: 0] Late Configuration - 38ms
[ScktId: 1] Initialize Memory RAS before refresh enable -- Started
[ScktId: 0] Initialize Memory RAS before refresh enable -- Started
[ScktId: 1] Initialize Memory RAS before refresh enable - 12ms
[ScktId: 0] Initialize Memory RAS before refresh enable - 15ms
[ScktId: 1] Initialize Throttling -- Started
[ScktId: 0] Initialize Throttling -- Started
Data received from mailbox: 0x20000002
N1: McId = 0, VR SVID = 10
N1: McId = 1, VR SVID = 10
N1: McId = 2, VR SVID = 10
N1: McId = 3, VR SVID = 10
Data received from mailbox: 0x20000002
N0: McId = 0, VR SVID = 10
N0: McId = 1, VR SVID = 10
N0: McId = 2, VR SVID = 10
N0: McId = 3, VR SVID = 10
[ScktId: 1] Initialize Throttling - 31ms
[ScktId: 0] Initialize Throttling - 40ms
[ScktId: 1] Publish ACTM DIMM Manifest -- Started
[ScktId: 0] Publish ACTM DIMM Manifest -- Started
[ScktId: 0] Publish ACTM DIMM Manifest - 10ms
[ScktId: 1] Publish ACTM DIMM Manifest - 14ms
[ScktId: 0] Setup SVL and Scrambling -- Started
[ScktId: 1] Setup SVL and Scrambling -- Started
[ScktId: 0] Setup SVL and Scrambling - 9ms
[ScktId: 1] Setup SVL and Scrambling - 9ms
N1 Checked into Pipe
[ScktId: 0] Mem ALIAS Check -- Started
[ScktId: 0] Mem ALIAS Check - 6ms
[ScktId: 1] Switch to Cpgc Out Of Order Mode -- Started
[ScktId: 0] Switch to Cpgc Out Of Order Mode -- Started
[ScktId: 1] Switch to Cpgc Out Of Order Mode - 5ms
[ScktId: 0] Switch to Cpgc Out Of Order Mode - 11ms
[ScktId: 1] Enable Host Refresh -- Started
[ScktId: 0] Enable Host Refresh -- Started
C00: REFRESH_SYNC_TIME_PerCh= 7800
C00: REFRESH_SYNC_TIME_PerCh= 7800
C02: REFRESH_SYNC_TIME_PerCh= 7800
C02: REFRESH_SYNC_TIME_PerCh= 7800
C04: REFRESH_SYNC_TIME_PerCh= 7800
C04: REFRESH_SYNC_TIME_PerCh= 7800
C06: REFRESH_SYNC_TIME_PerCh= 7800
C06: REFRESH_SYNC_TIME_PerCh= 7800
C00: HostRefreshStartTime= 7800
C00: HostRefreshStartTime= 7800
C02: HostRefreshStartTime= 7755
C02: HostRefreshStartTime= 7747
C04: HostRefreshStartTime= 7775
C04: HostRefreshStartTime= 7756
C06: HostRefreshStartTime= 7738
C06: HostRefreshStartTime= 7753
EnableHostRefresh Start Write Time diff[2]=455 ns
EnableHostRefresh Start Write Time diff[2]=272 ns
EnableHostRefresh Start Write Time diff[4]=525 ns
EnableHostRefresh Start Write Time diff[4]=343 ns
EnableHostRefresh Start Write Time diff[6]=581 ns
EnableHostRefresh Start Write Time diff[6]=428 ns
[ScktId: 1] Enable Host Refresh - 92ms
[ScktId: 0] Enable Host Refresh - 91ms
[ScktId: 1] MemInit -- Started
[ScktId: 0] MemInit -- Started
.[ScktId: 1] MemInit - 1224ms
.[ScktId: 1] HBM Mem Test -- Started
[ScktId: 0] MemInit - 1223ms
SetCpgcCurrentTechType: MemTechType = 1
[ScktId: 0] HBM Mem Test -- Started
SetCpgcCurrentTechType: MemTechType = 1
...TestType 10 Latency = 0 sec
.TestType 10 Latency = 0 sec
...TestType 10 Latency = 0 sec
.TestType 10 Latency = 0 sec
...TestType 10 Latency = 0 sec
.TestType 10 Latency = 0 sec
...TestType 10 Latency = 0 sec
SetCpgcCurrentTechType: MemTechType = 0
.[ScktId: 1] HBM Mem Test - 1187ms
TestType 10 Latency = 0 sec
[ScktId: 1] HBM Setup Scrambling -- Started
SetCpgcCurrentTechType: MemTechType = 0
[ScktId: 1] HBM Setup Scrambling - 7ms
[ScktId: 0] HBM Mem Test - 1195ms
[ScktId: 1] AP HBM Information -- Started
[ScktId: 0] HBM Setup Scrambling -- Started
[ScktId: 0] HBM Setup Scrambling - 8ms
[ScktId: 0] AP HBM Information -- Started
[ScktId: 0] AP HBM Information - 5ms
[ScktId: 1] AP HBM Information - 21ms
N1 Checked into Pipe
[ScktId: 0] HBM Fault Resilient Boot -- Started
[ScktId: 0] HBM Fault Resilient Boot - 6ms
N1 Checked into Pipe
[ScktId: 0] HBM Reset System -- Started
[ScktId: 0] HBM Reset System - 6ms
[ScktId: 1] SBSP HBM Information -- Started
[ScktId: 0] SBSP HBM Information -- Started
[ScktId: 1] SBSP HBM Information - 9ms
[ScktId: 0] SBSP HBM Information - 9ms
[ScktId: 1] HBM Mem Init -- Started
[ScktId: 0] HBM Mem Init -- Started
SetCpgcCurrentTechType: MemTechType = 1
SetCpgcCurrentTechType: MemTechType = 1
.TestType 9 Latency = 0 sec
SetCpgcCurrentTechType: MemTechType = 0
.[ScktId: 1] HBM Mem Init - 706ms
TestType 9 Latency = 0 sec
[ScktId: 1] Pipe Sync AP NVRAM Data -- Started
SetCpgcCurrentTechType: MemTechType = 0
[ScktId: 0] HBM Mem Init - 716ms
[ScktId: 0] Pipe Sync AP NVRAM Data -- Started
[ScktId: 0] Pipe Sync AP NVRAM Data - 17ms
[ScktId: 1] Pipe Sync AP NVRAM Data - 32ms
N1 Checked into Pipe
[ScktId: 0] Check Memory Topology -- Started
GetPorTablePtr - Using SPR HBM Matrix
[ScktId: 0] Check Memory Topology - 10ms
[ScktId: 1] Pipe Sync AP Final Error Sync -- Started
[ScktId: 0] Pipe Sync AP Final Error Sync -- Started
[ScktId: 1] Pipe Sync AP Final Error Sync - 10ms
[ScktId: 0] Pipe Sync AP Final Error Sync - 10ms
N1 Checked into Pipe
[ScktId: 0] Check Ras Support After MemInit -- Started
[ScktId: 0] Check Ras Support After MemInit - 7ms
N1 Checked into Pipe
[ScktId: 0] Initialize Memory Map -- Started
N0.C00.D0: Memory Found!
N0.C02.D0: Memory Found!
N0.C04.D0: Memory Found!
N0.C06.D0: Memory Found!
N1.C00.D0: Memory Found!
N1.C02.D0: Memory Found!
N1.C04.D0: Memory Found!
N1.C06.D0: Memory Found!
sizeof (MEMORY_MAP_HOST) = 66360
***BEGIN MEMORY MAPPING***
mmiohbasefrom setup: 2000 MMIOH base = 80000 (64mb)
Silicon capability does not support persistent modes, forcing to non-persistent mode.
Silicon capability does not support persistent modes, forcing to non-persistent mode.
PMem mgmt Driver is available..
CXL: Socket 0 Stack 0, CXL device not found
CXL: Socket 0 Stack 1, CXL device not found
CXL: Socket 0 Stack 2, CXL device not found
CXL: Socket 0 Stack 3, CXL device not found
CXL: Socket 0 Stack 4, CXL device not found
CXL: Socket 0 Stack 5, CXL device not found
CXL: Socket 0 Stack 6, CXL device not found
CXL: Socket 0 Stack 7, CXL device not found
CXL: Socket 1 Stack 0, CXL device not found
CXL: Socket 1 Stack 1, CXL device not found
CXL: Socket 1 Stack 2, CXL device not found
CXL: Socket 1 Stack 3, CXL device not found
CXL: Socket 1 Stack 4, CXL device not found
CXL: Socket 1 Stack 5, CXL device not found
CXL: Socket 1 Stack 6, CXL device not found
CXL: Socket 1 Stack 7, CXL device not found
N0: HBM: MemSizePerStack: 0x100 (64MB), StackValidBitMask: 0xF
N0: Hbm size = 1024
N1: HBM: MemSizePerStack: 0x100 (64MB), StackValidBitMask: 0xF
N1: Hbm size = 1024
Total Hbm size = 2048
N0.C00.D0.R0: ranksize = 200, NVranksize = 0 (rank enabled)
N0.C02.D0.R0: ranksize = 200, NVranksize = 0 (rank enabled)
N0.C04.D0.R0: ranksize = 200, NVranksize = 0 (rank enabled)
N0.C06.D0.R0: ranksize = 200, NVranksize = 0 (rank enabled)
N1.C00.D0.R0: ranksize = 200, NVranksize = 0 (rank enabled)
N1.C02.D0.R0: ranksize = 200, NVranksize = 0 (rank enabled)
N1.C04.D0.R0: ranksize = 200, NVranksize = 0 (rank enabled)
N1.C06.D0.R0: ranksize = 200, NVranksize = 0 (rank enabled)
N0: Total mem size = 2048; mem size = 2048; per size = 0
N1: Total mem size = 4096; mem size = 2048; per size = 0
^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^
Platform DIMM Configuration(num_chunks(chunk_size))
^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^
Socket : 0
Channel : 0 DDR Size : 512(64MB) PMem volatile Size : 0(64MB) PMem non volatile Size : 0(64MB) NVDIMM-N Memory Size : 0(64MB)
Channel : 1 DDR Size : 0(64MB) PMem volatile Size : 0(64MB) PMem non volatile Size : 0(64MB) NVDIMM-N Memory Size : 0(64MB)
Channel : 2 DDR Size : 512(64MB) PMem volatile Size : 0(64MB) PMem non volatile Size : 0(64MB) NVDIMM-N Memory Size : 0(64MB)
Channel : 3 DDR Size : 0(64MB) PMem volatile Size : 0(64MB) PMem non volatile Size : 0(64MB) NVDIMM-N Memory Size : 0(64MB)
Channel : 4 DDR Size : 512(64MB) PMem volatile Size : 0(64MB) PMem non volatile Size : 0(64MB) NVDIMM-N Memory Size : 0(64MB)
Channel : 5 DDR Size : 0(64MB) PMem volatile Size : 0(64MB) PMem non volatile Size : 0(64MB) NVDIMM-N Memory Size : 0(64MB)
Channel : 6 DDR Size : 512(64MB) PMem volatile Size : 0(64MB) PMem non volatile Size : 0(64MB) NVDIMM-N Memory Size : 0(64MB)
Channel : 7 DDR Size : 0(64MB) PMem volatile Size : 0(64MB) PMem non volatile Size : 0(64MB) NVDIMM-N Memory Size : 0(64MB)
Socket : 1
Channel : 0 DDR Size : 512(64MB) PMem volatile Size : 0(64MB) PMem non volatile Size : 0(64MB) NVDIMM-N Memory Size : 0(64MB)
Channel : 1 DDR Size : 0(64MB) PMem volatile Size : 0(64MB) PMem non volatile Size : 0(64MB) NVDIMM-N Memory Size : 0(64MB)
Channel : 2 DDR Size : 512(64MB) PMem volatile Size : 0(64MB) PMem non volatile Size : 0(64MB) NVDIMM-N Memory Size : 0(64MB)
Channel : 3 DDR Size : 0(64MB) PMem volatile Size : 0(64MB) PMem non volatile Size : 0(64MB) NVDIMM-N Memory Size : 0(64MB)
Channel : 4 DDR Size : 512(64MB) PMem volatile Size : 0(64MB) PMem non volatile Size : 0(64MB) NVDIMM-N Memory Size : 0(64MB)
Channel : 5 DDR Size : 0(64MB) PMem volatile Size : 0(64MB) PMem non volatile Size : 0(64MB) NVDIMM-N Memory Size : 0(64MB)
Channel : 6 DDR Size : 512(64MB) PMem volatile Size : 0(64MB) PMem non volatile Size : 0(64MB) NVDIMM-N Memory Size : 0(64MB)
Channel : 7 DDR Size : 0(64MB) PMem volatile Size : 0(64MB) PMem non volatile Size : 0(64MB) NVDIMM-N Memory Size : 0(64MB)
N0: Memory population doesn't support SGX
System Memory Population doesn't support SGX
CollectCpuPrmSizeBitmap BEGIN
CollectCpuPrmSizeBitmap ProtectedMemValidBitMask = 0x000000FFF0000000
tCollectCpuPrmSizeBitmap END
SGX Status 0 PrmrrSize 0
PrmrrCountRequested 8 PrmrrCountPerPackage 4
Value set for Channel Interleave to 3
Value set for Imc Interleave to 4
Checkpoint Code: Socket 0, 0xBB, 0x03, 0x0000
N0: Map 2LM (HBM/DDR)
N0: Map 2LM (HBM/DDR)
N0: Map 2LM (HBM/DDR)
N0: Map 2LM (HBM/DDR)
N0: ClusterId 0 SadCount = 2
N0: ClusterId 1 SadCount = 1
N0: ClusterId 2 SadCount = 1
N0: ClusterId 3 SadCount = 1
N0: Adding NXM at ClusterId 1 SadIndex 17
N0: Adding NXM at ClusterId 2 SadIndex 33
N0: Adding NXM at ClusterId 3 SadIndex 49
N1: Map 2LM (HBM/DDR)
N1: Map 2LM (HBM/DDR)
N1: Map 2LM (HBM/DDR)
N1: Map 2LM (HBM/DDR)
N1: ClusterId 0 SadCount = 1
N1: ClusterId 1 SadCount = 1
N1: ClusterId 2 SadCount = 1
N1: ClusterId 3 SadCount = 1
N0: Not an FPGA Socket
N1: Not an FPGA Socket
N2: Not an FPGA Socket
N3: Not an FPGA Socket
AdjustMemAddrMapForMirror: In the function
N0:
Mirroring population not met
Checkpoint Code: Socket 0, 0xBB, 0x04, 0x0000
HBM: CreateHbmTadRules
Checkpoint Code: Socket 0, 0xBB, 0x05, 0x0000
PMem mgmt Driver is available..
CXL: Socket 0 Stack 0, CXL device not found
CXL: Socket 0 Stack 1, CXL device not found
CXL: Socket 0 Stack 2, CXL device not found
CXL: Socket 0 Stack 3, CXL device not found
CXL: Socket 0 Stack 4, CXL device not found
CXL: Socket 0 Stack 5, CXL device not found
CXL: Socket 0 Stack 6, CXL device not found
CXL: Socket 0 Stack 7, CXL device not found
CXL: Socket 1 Stack 0, CXL device not found
CXL: Socket 1 Stack 1, CXL device not found
CXL: Socket 1 Stack 2, CXL device not found
CXL: Socket 1 Stack 3, CXL device not found
CXL: Socket 1 Stack 4, CXL device not found
CXL: Socket 1 Stack 5, CXL device not found
CXL: Socket 1 Stack 6, CXL device not found
CXL: Socket 1 Stack 7, CXL device not found
N0: HBM: MemSizePerStack: 0x100 (64MB), StackValidBitMask: 0xF
N0: Hbm size = 1024
N1: HBM: MemSizePerStack: 0x100 (64MB), StackValidBitMask: 0xF
N1: Hbm size = 1024
Total Hbm size = 2048
N0.C00.D0.R0: ranksize = 200, NVranksize = 0 (rank enabled)
N0.C02.D0.R0: ranksize = 200, NVranksize = 0 (rank enabled)
N0.C04.D0.R0: ranksize = 200, NVranksize = 0 (rank enabled)
N0.C06.D0.R0: ranksize = 200, NVranksize = 0 (rank enabled)
N1.C00.D0.R0: ranksize = 200, NVranksize = 0 (rank enabled)
N1.C02.D0.R0: ranksize = 200, NVranksize = 0 (rank enabled)
N1.C04.D0.R0: ranksize = 200, NVranksize = 0 (rank enabled)
N1.C06.D0.R0: ranksize = 200, NVranksize = 0 (rank enabled)
N0: Total mem size = 2048; mem size = 2048; per size = 0
N1: Total mem size = 4096; mem size = 2048; per size = 0
N0: Memory population doesn't support SGX
System Memory Population doesn't support SGX
CollectCpuPrmSizeBitmap BEGIN
CollectCpuPrmSizeBitmap ProtectedMemValidBitMask = 0x000000FFF0000000
tCollectCpuPrmSizeBitmap END
SGX Status 0 PrmrrSize 0
PrmrrCountRequested 8 PrmrrCountPerPackage 4
Value set for Channel Interleave to 3
Value set for Imc Interleave to 4
Checkpoint Code: Socket 0, 0xBB, 0x03, 0x0000
N0: Map 2LM (HBM/DDR)
N0: Map 2LM (HBM/DDR)
N0: Map 2LM (HBM/DDR)
N0: Map 2LM (HBM/DDR)
N0: ClusterId 0 SadCount = 2
N0: ClusterId 1 SadCount = 1
N0: ClusterId 2 SadCount = 1
N0: ClusterId 3 SadCount = 1
N0: Adding NXM at ClusterId 1 SadIndex 17
N0: Adding NXM at ClusterId 2 SadIndex 33
N0: Adding NXM at ClusterId 3 SadIndex 49
N1: Map 2LM (HBM/DDR)
N1: Map 2LM (HBM/DDR)
N1: Map 2LM (HBM/DDR)
N1: Map 2LM (HBM/DDR)
N1: ClusterId 0 SadCount = 1
N1: ClusterId 1 SadCount = 1
N1: ClusterId 2 SadCount = 1
N1: ClusterId 3 SadCount = 1
N0: Not an FPGA Socket
N1: Not an FPGA Socket
N2: Not an FPGA Socket
N3: Not an FPGA Socket
AdjustMemAddrMapForMirror: In the function
N0:
Mirroring population not met
Checkpoint Code: Socket 0, 0xBB, 0x04, 0x0000
HBM: CreateHbmTadRules
Checkpoint Code: Socket 0, 0xBB, 0x05, 0x0000
********SAD table for socket 0*******
Type Base Limit Ways McIntBitmap ChIntBitmap[MC00] FmChIntBitmap[MC00] ChIntBitmap[MC01] FmChIntBitmap[MC01] ChIntBitmap[MC02] FmChIntBitmap[MC02] ChIntBitmap[MC03] FmChIntBitmap[MC03] Granularity Tgtgranularity Attr Cluster
HBM 2LM DDR 0x00000 0x00040 1 1 3 1 3 0 3 0 3 0 1 1 3 0
HBM 2LM DDR 0x00040 0x00220 1 1 3 1 3 0 3 0 3 0 1 1 3 0
HBM 2LM DDR 0x00220 0x00420 1 2 3 0 3 1 3 0 3 0 1 1 3 1
NXM 0x00420 0x00420 0 0 0 0 0 0 0 0 0 0 0 0 0 1
HBM 2LM DDR 0x00420 0x00620 1 4 3 0 3 0 3 1 3 0 1 1 3 2
NXM 0x00620 0x00620 0 0 0 0 0 0 0 0 0 0 0 0 0 2
HBM 2LM DDR 0x00620 0x00820 1 8 3 0 3 0 3 0 3 1 1 1 3 3
NXM 0x00820 0x00820 0 0 0 0 0 0 0 0 0 0 0 0 0 3
<<SAD Interleave List>>
1 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0
1 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0
0 1 0 0 0 0 0 0 0 0 0 0 0 0 0 0
0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0
0 0 1 0 0 0 0 0 0 0 0 0 0 0 0 0
0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0
0 0 0 1 0 0 0 0 0 0 0 0 0 0 0 0
0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0
********SAD table for socket 1*******
Type Base Limit Ways McIntBitmap ChIntBitmap[MC00] FmChIntBitmap[MC00] ChIntBitmap[MC01] FmChIntBitmap[MC01] ChIntBitmap[MC02] FmChIntBitmap[MC02] ChIntBitmap[MC03] FmChIntBitmap[MC03] Granularity Tgtgranularity Attr Cluster
HBM 2LM DDR 0x00820 0x00A20 1 1 3 1 3 0 3 0 3 0 1 1 3 0
HBM 2LM DDR 0x00A20 0x00C20 1 2 3 0 3 1 3 0 3 0 1 1 3 1
HBM 2LM DDR 0x00C20 0x00E20 1 4 3 0 3 0 3 1 3 0 1 1 3 2
HBM 2LM DDR 0x00E20 0x01020 1 8 3 0 3 0 3 0 3 1 1 1 3 3
<<SAD Interleave List>>
0 0 0 0 1 0 0 0 0 0 0 0 0 0 0 0
0 0 0 0 0 1 0 0 0 0 0 0 0 0 0 0
0 0 0 0 0 0 1 0 0 0 0 0 0 0 0 0
0 0 0 0 0 0 0 1 0 0 0 0 0 0 0 0
</SADTable>
*******TAD Table for socket 0 Mc 0*******
Enable SadID Limit SktWays TargetGran ChGran NmTadIndex FmTadIndex
1 0 0x00020 1 1 1 0 0
1 1 0x00220 1 1 1 0 0
</TADTable>
*******TAD Table for socket 0 Mc 1*******
Enable SadID Limit SktWays TargetGran ChGran NmTadIndex FmTadIndex
1 16 0x00420 1 1 1 0 0
</TADTable>
*******TAD Table for socket 0 Mc 2*******
Enable SadID Limit SktWays TargetGran ChGran NmTadIndex FmTadIndex
1 32 0x00620 1 1 1 0 0
</TADTable>
*******TAD Table for socket 0 Mc 3*******
Enable SadID Limit SktWays TargetGran ChGran NmTadIndex FmTadIndex
1 48 0x00820 1 1 1 0 0
</TADTable>
*******TAD Table for Socket 0 Stack 0*******
Enable SadID Limit SktWays TargetGran ChGran
1 0 0x00000 1 1 1
</TADTable>
*******TAD Table for Socket 0 Stack 1*******
Enable SadID Limit SktWays TargetGran ChGran
1 16 0x00000 1 1 1
</TADTable>
*******TAD Table for Socket 0 Stack 2*******
Enable SadID Limit SktWays TargetGran ChGran
1 32 0x00000 1 1 1
</TADTable>
*******TAD Table for Socket 0 Stack 3*******
Enable SadID Limit SktWays TargetGran ChGran
1 48 0x00000 1 1 1
</TADTable>
*******TAD Table for socket 1 Mc 0*******
Enable SadID Limit SktWays TargetGran ChGran NmTadIndex FmTadIndex
1 0 0x00A20 1 1 1 0 0
</TADTable>
*******TAD Table for socket 1 Mc 1*******
Enable SadID Limit SktWays TargetGran ChGran NmTadIndex FmTadIndex
1 16 0x00C20 1 1 1 0 0
</TADTable>
*******TAD Table for socket 1 Mc 2*******
Enable SadID Limit SktWays TargetGran ChGran NmTadIndex FmTadIndex
1 32 0x00E20 1 1 1 0 0
</TADTable>
*******TAD Table for socket 1 Mc 3*******
Enable SadID Limit SktWays TargetGran ChGran NmTadIndex FmTadIndex
1 48 0x01020 1 1 1 0 0
</TADTable>
*******TAD Table for Socket 1 Stack 0*******
Enable SadID Limit SktWays TargetGran ChGran
1 0 0x00000 1 1 1
</TADTable>
*******TAD Table for Socket 1 Stack 1*******
Enable SadID Limit SktWays TargetGran ChGran
1 16 0x00000 1 1 1
</TADTable>
*******TAD Table for Socket 1 Stack 2*******
Enable SadID Limit SktWays TargetGran ChGran
1 32 0x00000 1 1 1
</TADTable>
*******TAD Table for Socket 1 Stack 3*******
Enable SadID Limit SktWays TargetGran ChGran
1 48 0x00000 1 1 1
</TADTable>
Checkpoint Code: Socket 0, 0xBB, 0x06, 0x0000
^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^
Write CHA Remote SAD CSRs for Socket: 0
^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^
En Base Limit NodeId Attr
1 0x00820 0x0101F 0x1 0x3
^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^
Write CHA SAD CSRs for Socket: 0
^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^
CHA unlock DRAM cluster 0 snc_lock bits: 0xE
Program Channel Interleaves
rt0_interleave_mode: 7
rt1_interleave_shift: 7
rt2_interleave_shift: 2
Program CSRs for SAD Rule 0 (HBM 2LM DDR)
En Limit Mode Attr NMCacheable
1 0x0003F 0x1 0x3 1
Interleave List: 0x0000000088888888
Single Target: H0 Index 0
DRAM_RULE_CFG2: cxl_accelerator_mem Durable_mem_en cxl_mem_expander NXM
0 0 0 0
TgtRt: 00 ChnRt: 00
Program CSRs for SAD Rule 1 (HBM 2LM DDR)
En Limit Mode Attr NMCacheable
1 0x0021F 0x1 0x3 1
Interleave List: 0x0000000088888888
Single Target: H0 Index 0
DRAM_RULE_CFG2: cxl_accelerator_mem Durable_mem_en cxl_mem_expander NXM
0 0 0 0
TgtRt: 00 ChnRt: 00
Program target config: 00000000
Program channel config: 00000000
Program Mode config.
H0 DramRt0Mode0Cfg: 00000036
H0 DramRt0Mode1Cfg: 00000000
H1 DramRt0Mode0Cfg: 00000000
H1 DramRt0Mode1Cfg: 00000000
H0 DramRt1Mode0Cfg: 00000000
H0 DramRt1Mode1Cfg: 00000000
H1 DramRt1Mode0Cfg: 00000000
H1 DramRt1Mode1Cfg: 00000000
H0 DramRt2Mode0Cfg: 00000000
H0 DramRt2Mode1Cfg: 00000000
H1 DramRt2Mode0Cfg: 00000000
H1 DramRt2Mode1Cfg: 00000000
CHA unlock DRAM cluster 1 snc_lock bits: 0xD
Program Channel Interleaves
rt0_interleave_mode: 7
rt1_interleave_shift: 7
rt2_interleave_shift: 2
Program CSRs for SAD Rule 0 (HBM 2LM DDR)
En Limit Mode Attr NMCacheable
1 0x0041F 0x1 0x3 1
Interleave List: 0x0000000088888888
Single Target: H0 Index 0
DRAM_RULE_CFG2: cxl_accelerator_mem Durable_mem_en cxl_mem_expander NXM
0 0 0 0
TgtRt: 00 ChnRt: 00
Program CSRs for SAD Rule 1 (NXM)
En Limit Mode Attr NMCacheable
1 0x0041F 0x0 0x0 0
Interleave List: 0xFFFFFFFFFFFFFFFF
DRAM_RULE_CFG2: cxl_accelerator_mem Durable_mem_en cxl_mem_expander NXM
0 0 0 1
Program target config: 00000000
Program channel config: 00000000
Program Mode config.
H0 DramRt0Mode0Cfg: 00000006
H0 DramRt0Mode1Cfg: 00000000
H1 DramRt0Mode0Cfg: 00000000
H1 DramRt0Mode1Cfg: 00000000
H0 DramRt1Mode0Cfg: 00000000
H0 DramRt1Mode1Cfg: 00000000
H1 DramRt1Mode0Cfg: 00000000
H1 DramRt1Mode1Cfg: 00000000
H0 DramRt2Mode0Cfg: 00000000
H0 DramRt2Mode1Cfg: 00000000
H1 DramRt2Mode0Cfg: 00000000
H1 DramRt2Mode1Cfg: 00000000
CHA unlock DRAM cluster 2 snc_lock bits: 0xB
Program Channel Interleaves
rt0_interleave_mode: 7
rt1_interleave_shift: 7
rt2_interleave_shift: 2
Program CSRs for SAD Rule 0 (HBM 2LM DDR)
En Limit Mode Attr NMCacheable
1 0x0061F 0x1 0x3 1
Interleave List: 0x0000000088888888
Single Target: H0 Index 0
DRAM_RULE_CFG2: cxl_accelerator_mem Durable_mem_en cxl_mem_expander NXM
0 0 0 0
TgtRt: 00 ChnRt: 00
Program CSRs for SAD Rule 1 (NXM)
En Limit Mode Attr NMCacheable
1 0x0061F 0x0 0x0 0
Interleave List: 0xFFFFFFFFFFFFFFFF
DRAM_RULE_CFG2: cxl_accelerator_mem Durable_mem_en cxl_mem_expander NXM
0 0 0 1
Program target config: 00000000
Program channel config: 00000000
Program Mode config.
H0 DramRt0Mode0Cfg: 00000006
H0 DramRt0Mode1Cfg: 00000000
H1 DramRt0Mode0Cfg: 00000000
H1 DramRt0Mode1Cfg: 00000000
H0 DramRt1Mode0Cfg: 00000000
H0 DramRt1Mode1Cfg: 00000000
H1 DramRt1Mode0Cfg: 00000000
H1 DramRt1Mode1Cfg: 00000000
H0 DramRt2Mode0Cfg: 00000000
H0 DramRt2Mode1Cfg: 00000000
H1 DramRt2Mode0Cfg: 00000000
H1 DramRt2Mode1Cfg: 00000000
CHA unlock DRAM cluster 3 snc_lock bits: 0x7
Program Channel Interleaves
rt0_interleave_mode: 7
rt1_interleave_shift: 7
rt2_interleave_shift: 2
Program CSRs for SAD Rule 0 (HBM 2LM DDR)
En Limit Mode Attr NMCacheable
1 0x0081F 0x1 0x3 1
Interleave List: 0x0000000088888888
Single Target: H0 Index 0
DRAM_RULE_CFG2: cxl_accelerator_mem Durable_mem_en cxl_mem_expander NXM
0 0 0 0
TgtRt: 00 ChnRt: 00
Program CSRs for SAD Rule 1 (NXM)
En Limit Mode Attr NMCacheable
1 0x0081F 0x0 0x0 0
Interleave List: 0xFFFFFFFFFFFFFFFF
DRAM_RULE_CFG2: cxl_accelerator_mem Durable_mem_en cxl_mem_expander NXM
0 0 0 1
Program target config: 00000000
Program channel config: 00000000
Program Mode config.
H0 DramRt0Mode0Cfg: 00000006
H0 DramRt0Mode1Cfg: 00000000
H1 DramRt0Mode0Cfg: 00000000
H1 DramRt0Mode1Cfg: 00000000
H0 DramRt1Mode0Cfg: 00000000
H0 DramRt1Mode1Cfg: 00000000
H1 DramRt1Mode0Cfg: 00000000
H1 DramRt1Mode1Cfg: 00000000
H0 DramRt2Mode0Cfg: 00000000
H0 DramRt2Mode1Cfg: 00000000
H1 DramRt2Mode0Cfg: 00000000
H1 DramRt2Mode1Cfg: 00000000
CHA lock all DRAM clusters snc_lock bits: 0xF
^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^
Write Route Table CSRs for Socket: 0
^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^
CSR: Cluster 0 H0_CH_ROUTE_TABLE_0 - 0x0 0x1 0x0 0x1 0x0 0x1 0x0 0x1
CSR: Cluster 0 H0_TGT_ROUTE_TABLE_0 - 0x4 0x4 0x5 0x5 0x6 0x6 0x7 0x7
CSR: Cluster 0 H1_CH_ROUTE_TABLE_0 - 0x0 0x0 0x0 0x0 0x0 0x0 0x0 0x0
CSR: Cluster 0 H1_TGT_ROUTE_TABLE_0 - 0x0 0x0 0x0 0x0 0x0 0x0 0x0 0x0
CSR: Cluster 1 H0_CH_ROUTE_TABLE_0 - 0x0 0x1 0x0 0x1 0x0 0x1 0x0 0x1
CSR: Cluster 1 H0_TGT_ROUTE_TABLE_0 - 0x4 0x4 0x5 0x5 0x6 0x6 0x7 0x7
CSR: Cluster 1 H1_CH_ROUTE_TABLE_0 - 0x0 0x0 0x0 0x0 0x0 0x0 0x0 0x0
CSR: Cluster 1 H1_TGT_ROUTE_TABLE_0 - 0x0 0x0 0x0 0x0 0x0 0x0 0x0 0x0
CSR: Cluster 2 H0_CH_ROUTE_TABLE_0 - 0x0 0x1 0x0 0x1 0x0 0x1 0x0 0x1
CSR: Cluster 2 H0_TGT_ROUTE_TABLE_0 - 0x7 0x7 0x6 0x6 0x5 0x5 0x4 0x4
CSR: Cluster 2 H1_CH_ROUTE_TABLE_0 - 0x0 0x0 0x0 0x0 0x0 0x0 0x0 0x0
CSR: Cluster 2 H1_TGT_ROUTE_TABLE_0 - 0x0 0x0 0x0 0x0 0x0 0x0 0x0 0x0
CSR: Cluster 3 H0_CH_ROUTE_TABLE_0 - 0x0 0x1 0x0 0x1 0x0 0x1 0x0 0x1
CSR: Cluster 3 H0_TGT_ROUTE_TABLE_0 - 0x7 0x7 0x6 0x6 0x5 0x5 0x4 0x4
CSR: Cluster 3 H1_CH_ROUTE_TABLE_0 - 0x0 0x0 0x0 0x0 0x0 0x0 0x0 0x0
CSR: Cluster 3 H1_TGT_ROUTE_TABLE_0 - 0x0 0x0 0x0 0x0 0x0 0x0 0x0 0x0
^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^
Write MESH2MEM CSRs for Socket: 0
^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^
Memory Controller : 0
------------------------
DEFEATURES0_M2MEM_MAIN_REG
wrcmpfromnm: 1
MODE_M2MEM_MAIN_REG
nmcaching:0x1 pmem:0x0 blockregion:0x0 in-tile caching: 0x1
Memory Controller : 1
------------------------
DEFEATURES0_M2MEM_MAIN_REG
wrcmpfromnm: 1
MODE_M2MEM_MAIN_REG
nmcaching:0x1 pmem:0x0 blockregion:0x0 in-tile caching: 0x1
Memory Controller : 2
------------------------
DEFEATURES0_M2MEM_MAIN_REG
wrcmpfromnm: 1
MODE_M2MEM_MAIN_REG
nmcaching:0x1 pmem:0x0 blockregion:0x0 in-tile caching: 0x1
Memory Controller : 3
------------------------
DEFEATURES0_M2MEM_MAIN_REG
wrcmpfromnm: 1
MODE_M2MEM_MAIN_REG
nmcaching:0x1 pmem:0x0 blockregion:0x0 in-tile caching: 0x1
MC: 0
tadid:0x0 tadvld:0x1 pmemvld:0x0 blkvld:0x0 ddr4tadid:0x0 ddrttadid:0x0 ddr4:0x1 nmcacheablevld:0x0 mirror:0x0 secondary1st:0x0 frcnpwr:0x0 spare:0x0 addresslimit[51:26]:0x1F nonpersistentfm:0x1
MC: 0
tadid:0x1 tadvld:0x1 pmemvld:0x0 blkvld:0x0 ddr4tadid:0x1 ddrttadid:0x0 ddr4:0x1 nmcacheablevld:0x0 mirror:0x0 secondary1st:0x0 frcnpwr:0x0 spare:0x0 addresslimit[51:26]:0x21F nonpersistentfm:0x1
MC: 1
tadid:0x0 tadvld:0x1 pmemvld:0x0 blkvld:0x0 ddr4tadid:0x0 ddrttadid:0x0 ddr4:0x1 nmcacheablevld:0x0 mirror:0x0 secondary1st:0x0 frcnpwr:0x0 spare:0x0 addresslimit[51:26]:0x41F nonpersistentfm:0x1
MC: 2
tadid:0x0 tadvld:0x1 pmemvld:0x0 blkvld:0x0 ddr4tadid:0x0 ddrttadid:0x0 ddr4:0x1 nmcacheablevld:0x0 mirror:0x0 secondary1st:0x0 frcnpwr:0x0 spare:0x0 addresslimit[51:26]:0x61F nonpersistentfm:0x1
MC: 3
tadid:0x0 tadvld:0x1 pmemvld:0x0 blkvld:0x0 ddr4tadid:0x0 ddrttadid:0x0 ddr4:0x1 nmcacheablevld:0x0 mirror:0x0 secondary1st:0x0 frcnpwr:0x0 spare:0x0 addresslimit[51:26]:0x81F nonpersistentfm:0x1
Programs feature registers for MC 0
Programs feature registers for MC 1
Programs feature registers for MC 2
Programs feature registers for MC 3
^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^
Write HBM MESH2MEM CSRs for Socket: 0
^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^
HBM Stack: 0
Mesh2Mem misc: nmcaching: 1 wrcmpfromnm: 1
Mesh2Mem TAD: tadid:0x0 ddrtadid:0x0 nmcacheablevld:0x1 addresslimit[51:26]:0x21F
HBM Stack: 1
Mesh2Mem misc: nmcaching: 1 wrcmpfromnm: 1
Mesh2Mem TAD: tadid:0x0 ddrtadid:0x0 nmcacheablevld:0x1 addresslimit[51:26]:0x41F
HBM Stack: 2
Mesh2Mem misc: nmcaching: 1 wrcmpfromnm: 1
Mesh2Mem TAD: tadid:0x0 ddrtadid:0x0 nmcacheablevld:0x1 addresslimit[51:26]:0x61F
HBM Stack: 3
Mesh2Mem misc: nmcaching: 1 wrcmpfromnm: 1
Mesh2Mem TAD: tadid:0x0 ddrtadid:0x0 nmcacheablevld:0x1 addresslimit[51:26]:0x81F
Programs feature registers for MC 0
N0.C00: CSR : SYSFEATURES0_MC_2LM_REG: 0x10
N0.C01: CSR : SYSFEATURES0_MC_2LM_REG: 0x10
Programs feature registers for MC 1
N0.C00: CSR : SYSFEATURES0_MC_2LM_REG: 0x10
N0.C01: CSR : SYSFEATURES0_MC_2LM_REG: 0x10
Programs feature registers for MC 2
N0.C00: CSR : SYSFEATURES0_MC_2LM_REG: 0x10
N0.C01: CSR : SYSFEATURES0_MC_2LM_REG: 0x10
Programs feature registers for MC 3
N0.C00: CSR : SYSFEATURES0_MC_2LM_REG: 0x10
N0.C01: CSR : SYSFEATURES0_MC_2LM_REG: 0x10
Programs feature registers for MC 4
N0.C00: CSR : SYSFEATURES0_MC_2LM_REG: 0x10
N0.C01: CSR : SYSFEATURES0_MC_2LM_REG: 0x10
Programs feature registers for MC 5
N0.C00: CSR : SYSFEATURES0_MC_2LM_REG: 0x10
N0.C01: CSR : SYSFEATURES0_MC_2LM_REG: 0x10
Programs feature registers for MC 6
N0.C00: CSR : SYSFEATURES0_MC_2LM_REG: 0x10
N0.C01: CSR : SYSFEATURES0_MC_2LM_REG: 0x10
Programs feature registers for MC 7
N0.C00: CSR : SYSFEATURES0_MC_2LM_REG: 0x10
N0.C01: CSR : SYSFEATURES0_MC_2LM_REG: 0x10
Programs feature registers for MC 8
N0.C00: CSR : SYSFEATURES0_MC_2LM_REG: 0x10
N0.C01: CSR : SYSFEATURES0_MC_2LM_REG: 0x10
Programs feature registers for MC 9
N0.C00: CSR : SYSFEATURES0_MC_2LM_REG: 0x10
N0.C01: CSR : SYSFEATURES0_MC_2LM_REG: 0x10
Programs feature registers for MC 10
N0.C00: CSR : SYSFEATURES0_MC_2LM_REG: 0x10
N0.C01: CSR : SYSFEATURES0_MC_2LM_REG: 0x10
Programs feature registers for MC 11
N0.C00: CSR : SYSFEATURES0_MC_2LM_REG: 0x10
N0.C01: CSR : SYSFEATURES0_MC_2LM_REG: 0x10
Programs feature registers for MC 12
N0.C00: CSR : SYSFEATURES0_MC_2LM_REG: 0x10
N0.C01: CSR : SYSFEATURES0_MC_2LM_REG: 0x10
Programs feature registers for MC 13
N0.C00: CSR : SYSFEATURES0_MC_2LM_REG: 0x10
N0.C01: CSR : SYSFEATURES0_MC_2LM_REG: 0x10
Programs feature registers for MC 14
N0.C00: CSR : SYSFEATURES0_MC_2LM_REG: 0x10
N0.C01: CSR : SYSFEATURES0_MC_2LM_REG: 0x10
Programs feature registers for MC 15
N0.C00: CSR : SYSFEATURES0_MC_2LM_REG: 0x10
N0.C01: CSR : SYSFEATURES0_MC_2LM_REG: 0x10
Checkpoint Code: Socket 0, 0xBB, 0x07, 0x0000
^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^
Write TAD CSRs for Socket: 0
^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^
Write Patrol and Sparing CSR's for MC 0
C00: TADWAYNESS[0]:
target_lid: 0 chn_lid: 0 tad_limit: 0x1F
C00: TADBASE[0]:
mirror_en: 0 en_failover: 0 ign_ptrl_uc: 0 base: 0x0
C00: TADWAYNESS[1]:
target_lid: 0 chn_lid: 0 tad_limit: 0x21F
C00: TADBASE[1]:
mirror_en: 0 en_failover: 0 ign_ptrl_uc: 0 base: 0x40
NM_DRAM_RULE[0]:
rule_enable: 1 limit: 0x3F nm_chn_ways: 0 nm_chn_gran: 1 nm_target_ways: 0 nm_gran_eq: 0 nm_chn_l2pid: 0x00FFFFF8
Logical Ch Id: 0 1 2 3 4 5 6 7
Physical Ch Id: 0 7 7 7 7 7 7 7
C00: NM_DRAM_RULE[0]:
NM_DRAM_RULE[1]:
rule_enable: 1 limit: 0x21F nm_chn_ways: 0 nm_chn_gran: 1 nm_target_ways: 0 nm_gran_eq: 0 nm_chn_l2pid: 0x00FFFFF8
Logical Ch Id: 0 1 2 3 4 5 6 7
Physical Ch Id: 0 7 7 7 7 7 7 7
C00: NM_DRAM_RULE[1]:
Write 1LM Decoder CSR's for MC 0
C00: TADCHNILVOFFSET[0]:
target_ways: 0 chn_ways: 0 target_gran: 1 chn_gran: 1 tad_offset: 0x0 tad_offset_sign: 0
C00: TADCHNILVOFFSET[1]:
target_ways: 0 chn_ways: 0 target_gran: 1 chn_gran: 1 tad_offset: 0x20 tad_offset_sign: 0
C00: MCNMCACHINGCFG:
mcnmcachingenb: 0 mcpmemenb: 0 mcnmcachingpmemwt: 0
C01: MCNMCACHINGCFG:
mcnmcachingenb: 0 mcpmemenb: 0 mcnmcachingpmemwt: 0
Write Patrol and Sparing CSR's for MC 1
C00: TADWAYNESS[0]:
target_lid: 0 chn_lid: 0 tad_limit: 0x41F
C00: TADBASE[0]:
mirror_en: 0 en_failover: 0 ign_ptrl_uc: 0 base: 0x220
NM_DRAM_RULE[0]:
rule_enable: 1 limit: 0x41F nm_chn_ways: 0 nm_chn_gran: 1 nm_target_ways: 0 nm_gran_eq: 0 nm_chn_l2pid: 0x00FFFFF8
Logical Ch Id: 0 1 2 3 4 5 6 7
Physical Ch Id: 0 7 7 7 7 7 7 7
C00: NM_DRAM_RULE[0]:
Write 1LM Decoder CSR's for MC 1
C00: TADCHNILVOFFSET[0]:
target_ways: 0 chn_ways: 0 target_gran: 1 chn_gran: 1 tad_offset: 0x220 tad_offset_sign: 0
C00: MCNMCACHINGCFG:
mcnmcachingenb: 0 mcpmemenb: 0 mcnmcachingpmemwt: 0
C01: MCNMCACHINGCFG:
mcnmcachingenb: 0 mcpmemenb: 0 mcnmcachingpmemwt: 0
Write Patrol and Sparing CSR's for MC 2
C00: TADWAYNESS[0]:
target_lid: 0 chn_lid: 0 tad_limit: 0x61F
C00: TADBASE[0]:
mirror_en: 0 en_failover: 0 ign_ptrl_uc: 0 base: 0x420
NM_DRAM_RULE[0]:
rule_enable: 1 limit: 0x61F nm_chn_ways: 0 nm_chn_gran: 1 nm_target_ways: 0 nm_gran_eq: 0 nm_chn_l2pid: 0x00FFFFF8
Logical Ch Id: 0 1 2 3 4 5 6 7
Physical Ch Id: 0 7 7 7 7 7 7 7
C00: NM_DRAM_RULE[0]:
Write 1LM Decoder CSR's for MC 2
C00: TADCHNILVOFFSET[0]:
target_ways: 0 chn_ways: 0 target_gran: 1 chn_gran: 1 tad_offset: 0x420 tad_offset_sign: 0
C00: MCNMCACHINGCFG:
mcnmcachingenb: 0 mcpmemenb: 0 mcnmcachingpmemwt: 0
C01: MCNMCACHINGCFG:
mcnmcachingenb: 0 mcpmemenb: 0 mcnmcachingpmemwt: 0
Write Patrol and Sparing CSR's for MC 3
C00: TADWAYNESS[0]:
target_lid: 0 chn_lid: 0 tad_limit: 0x81F
C00: TADBASE[0]:
mirror_en: 0 en_failover: 0 ign_ptrl_uc: 0 base: 0x620
NM_DRAM_RULE[0]:
rule_enable: 1 limit: 0x81F nm_chn_ways: 0 nm_chn_gran: 1 nm_target_ways: 0 nm_gran_eq: 0 nm_chn_l2pid: 0x00FFFFF8
Logical Ch Id: 0 1 2 3 4 5 6 7
Physical Ch Id: 0 7 7 7 7 7 7 7
C00: NM_DRAM_RULE[0]:
Write 1LM Decoder CSR's for MC 3
C00: TADCHNILVOFFSET[0]:
target_ways: 0 chn_ways: 0 target_gran: 1 chn_gran: 1 tad_offset: 0x620 tad_offset_sign: 0
C00: MCNMCACHINGCFG:
mcnmcachingenb: 0 mcpmemenb: 0 mcnmcachingpmemwt: 0
C01: MCNMCACHINGCFG:
mcnmcachingenb: 0 mcpmemenb: 0 mcnmcachingpmemwt: 0
Write Patrol and Sparing TAD range CSR's for HBM Stack 0 MC 0
C00: TADWAYNESS[0]:
target_lid: 0 chn_lid: 0 tad_limit: 0x1F
C00: TADBASE[0]:
mirror_en: 0 en_failover: 0 ign_ptrl_uc: 0 base: 0x0
C01: TADWAYNESS[0]:
target_lid: 0 chn_lid: 1 tad_limit: 0x1F
C01: TADBASE[0]:
mirror_en: 0 en_failover: 0 ign_ptrl_uc: 0 base: 0x0
Write Patrol and Sparing TAD range CSR's for HBM Stack 0 MC 1
C00: TADWAYNESS[0]:
target_lid: 0 chn_lid: 2 tad_limit: 0x1F
C00: TADBASE[0]:
mirror_en: 0 en_failover: 0 ign_ptrl_uc: 0 base: 0x0
C01: TADWAYNESS[0]:
target_lid: 0 chn_lid: 3 tad_limit: 0x1F
C01: TADBASE[0]:
mirror_en: 0 en_failover: 0 ign_ptrl_uc: 0 base: 0x0
Write Patrol and Sparing TAD range CSR's for HBM Stack 0 MC 2
C00: TADWAYNESS[0]:
target_lid: 0 chn_lid: 4 tad_limit: 0x1F
C00: TADBASE[0]:
mirror_en: 0 en_failover: 0 ign_ptrl_uc: 0 base: 0x0
C01: TADWAYNESS[0]:
target_lid: 0 chn_lid: 5 tad_limit: 0x1F
C01: TADBASE[0]:
mirror_en: 0 en_failover: 0 ign_ptrl_uc: 0 base: 0x0
Write Patrol and Sparing TAD range CSR's for HBM Stack 0 MC 3
C00: TADWAYNESS[0]:
target_lid: 0 chn_lid: 6 tad_limit: 0x1F
C00: TADBASE[0]:
mirror_en: 0 en_failover: 0 ign_ptrl_uc: 0 base: 0x0
C01: TADWAYNESS[0]:
target_lid: 0 chn_lid: 7 tad_limit: 0x1F
C01: TADBASE[0]:
mirror_en: 0 en_failover: 0 ign_ptrl_uc: 0 base: 0x0
Write Hbm Nm Caching Tad CSR's for HBM Stack 0 MC 0
C00: MCNMCACHINGCFG 2LM TAD:
nmcachingtaden: 1 nmcachingtad: 0
C01: MCNMCACHINGCFG 2LM TAD:
nmcachingtaden: 1 nmcachingtad: 0
Write Hbm Nm Caching Tad CSR's for HBM Stack 0 MC 1
C00: MCNMCACHINGCFG 2LM TAD:
nmcachingtaden: 1 nmcachingtad: 0
C01: MCNMCACHINGCFG 2LM TAD:
nmcachingtaden: 1 nmcachingtad: 0
Write Hbm Nm Caching Tad CSR's for HBM Stack 0 MC 2
C00: MCNMCACHINGCFG 2LM TAD:
nmcachingtaden: 1 nmcachingtad: 0
C01: MCNMCACHINGCFG 2LM TAD:
nmcachingtaden: 1 nmcachingtad: 0
Write Hbm Nm Caching Tad CSR's for HBM Stack 0 MC 3
C00: MCNMCACHINGCFG 2LM TAD:
nmcachingtaden: 1 nmcachingtad: 0
C01: MCNMCACHINGCFG 2LM TAD:
nmcachingtaden: 1 nmcachingtad: 0
Write 1LM Decoder CSR's for HBM Stack 0 MC 0
C00: TADCHNILVOFFSET[0]:
target_ways: 0 chn_ways: 0 target_gran: 1 chn_gran: 1 tad_offset: 0x0 tad_offset_sign: 0
C01: TADCHNILVOFFSET[0]:
target_ways: 0 chn_ways: 0 target_gran: 1 chn_gran: 1 tad_offset: 0x0 tad_offset_sign: 0
Write 1LM Decoder CSR's for HBM Stack 0 MC 1
C00: TADCHNILVOFFSET[0]:
target_ways: 0 chn_ways: 0 target_gran: 1 chn_gran: 1 tad_offset: 0x0 tad_offset_sign: 0
C01: TADCHNILVOFFSET[0]:
target_ways: 0 chn_ways: 0 target_gran: 1 chn_gran: 1 tad_offset: 0x0 tad_offset_sign: 0
Write 1LM Decoder CSR's for HBM Stack 0 MC 2
C00: TADCHNILVOFFSET[0]:
target_ways: 0 chn_ways: 0 target_gran: 1 chn_gran: 1 tad_offset: 0x0 tad_offset_sign: 0
C01: TADCHNILVOFFSET[0]:
target_ways: 0 chn_ways: 0 target_gran: 1 chn_gran: 1 tad_offset: 0x0 tad_offset_sign: 0
Write 1LM Decoder CSR's for HBM Stack 0 MC 3
C00: TADCHNILVOFFSET[0]:
target_ways: 0 chn_ways: 0 target_gran: 1 chn_gran: 1 tad_offset: 0x0 tad_offset_sign: 0
C01: TADCHNILVOFFSET[0]:
target_ways: 0 chn_ways: 0 target_gran: 1 chn_gran: 1 tad_offset: 0x0 tad_offset_sign: 0
Write MCNMCACHINGCFG for HBM Stack 0 MC 0
C00: MCNMCACHINGCFG:
mcnmcachingenb: 1 mcpmemenb: 0 mcnmcachingpmemwt: 0
C01: MCNMCACHINGCFG:
mcnmcachingenb: 1 mcpmemenb: 0 mcnmcachingpmemwt: 0
Write MCNMCACHINGCFG for HBM Stack 0 MC 1
C00: MCNMCACHINGCFG:
mcnmcachingenb: 1 mcpmemenb: 0 mcnmcachingpmemwt: 0
C01: MCNMCACHINGCFG:
mcnmcachingenb: 1 mcpmemenb: 0 mcnmcachingpmemwt: 0
Write MCNMCACHINGCFG for HBM Stack 0 MC 2
C00: MCNMCACHINGCFG:
mcnmcachingenb: 1 mcpmemenb: 0 mcnmcachingpmemwt: 0
C01: MCNMCACHINGCFG:
mcnmcachingenb: 1 mcpmemenb: 0 mcnmcachingpmemwt: 0
Write MCNMCACHINGCFG for HBM Stack 0 MC 3
C00: MCNMCACHINGCFG:
mcnmcachingenb: 1 mcpmemenb: 0 mcnmcachingpmemwt: 0
C01: MCNMCACHINGCFG:
mcnmcachingenb: 1 mcpmemenb: 0 mcnmcachingpmemwt: 0
Write 2LM NM Decoder CSR's for HBM Stack 0 MC 0
C00: MCNMCACHINGINTLV:
nm_target_ways: 0 nm_chn_ways: 3 nm_target_lid: 0 nm_target_gran: 1 nm_chn_gran: 1 nm_chn_lid: 0
C00: MCNMCACHINGCFG_MC_2LM_REG:
en_2way: 0 prefer_way_sel: 0 chn_cap: 0xB nm_ratio_chn_cap: 0
C00: MCNMCACHINGOFFSET:
mcnmcachingoffsetlower: 0x0 mcnmcachingoffset: 0x0 mcnmcachingoffseten: 0
C01: MCNMCACHINGINTLV:
nm_target_ways: 0 nm_chn_ways: 3 nm_target_lid: 0 nm_target_gran: 1 nm_chn_gran: 1 nm_chn_lid: 1
C01: MCNMCACHINGCFG_MC_2LM_REG:
en_2way: 0 prefer_way_sel: 0 chn_cap: 0xB nm_ratio_chn_cap: 0
C01: MCNMCACHINGOFFSET:
mcnmcachingoffsetlower: 0x0 mcnmcachingoffset: 0x0 mcnmcachingoffseten: 0
Write 2LM NM Decoder CSR's for HBM Stack 0 MC 1
C00: MCNMCACHINGINTLV:
nm_target_ways: 0 nm_chn_ways: 3 nm_target_lid: 0 nm_target_gran: 1 nm_chn_gran: 1 nm_chn_lid: 2
C00: MCNMCACHINGCFG_MC_2LM_REG:
en_2way: 0 prefer_way_sel: 0 chn_cap: 0xB nm_ratio_chn_cap: 0
C00: MCNMCACHINGOFFSET:
mcnmcachingoffsetlower: 0x0 mcnmcachingoffset: 0x0 mcnmcachingoffseten: 0
C01: MCNMCACHINGINTLV:
nm_target_ways: 0 nm_chn_ways: 3 nm_target_lid: 0 nm_target_gran: 1 nm_chn_gran: 1 nm_chn_lid: 3
C01: MCNMCACHINGCFG_MC_2LM_REG:
en_2way: 0 prefer_way_sel: 0 chn_cap: 0xB nm_ratio_chn_cap: 0
C01: MCNMCACHINGOFFSET:
mcnmcachingoffsetlower: 0x0 mcnmcachingoffset: 0x0 mcnmcachingoffseten: 0
Write 2LM NM Decoder CSR's for HBM Stack 0 MC 2
C00: MCNMCACHINGINTLV:
nm_target_ways: 0 nm_chn_ways: 3 nm_target_lid: 0 nm_target_gran: 1 nm_chn_gran: 1 nm_chn_lid: 4
C00: MCNMCACHINGCFG_MC_2LM_REG:
en_2way: 0 prefer_way_sel: 0 chn_cap: 0xB nm_ratio_chn_cap: 0
C00: MCNMCACHINGOFFSET:
mcnmcachingoffsetlower: 0x0 mcnmcachingoffset: 0x0 mcnmcachingoffseten: 0
C01: MCNMCACHINGINTLV:
nm_target_ways: 0 nm_chn_ways: 3 nm_target_lid: 0 nm_target_gran: 1 nm_chn_gran: 1 nm_chn_lid: 5
C01: MCNMCACHINGCFG_MC_2LM_REG:
en_2way: 0 prefer_way_sel: 0 chn_cap: 0xB nm_ratio_chn_cap: 0
C01: MCNMCACHINGOFFSET:
mcnmcachingoffsetlower: 0x0 mcnmcachingoffset: 0x0 mcnmcachingoffseten: 0
Write 2LM NM Decoder CSR's for HBM Stack 0 MC 3
C00: MCNMCACHINGINTLV:
nm_target_ways: 0 nm_chn_ways: 3 nm_target_lid: 0 nm_target_gran: 1 nm_chn_gran: 1 nm_chn_lid: 6
C00: MCNMCACHINGCFG_MC_2LM_REG:
en_2way: 0 prefer_way_sel: 0 chn_cap: 0xB nm_ratio_chn_cap: 0
C00: MCNMCACHINGOFFSET:
mcnmcachingoffsetlower: 0x0 mcnmcachingoffset: 0x0 mcnmcachingoffseten: 0
C01: MCNMCACHINGINTLV:
nm_target_ways: 0 nm_chn_ways: 3 nm_target_lid: 0 nm_target_gran: 1 nm_chn_gran: 1 nm_chn_lid: 7
C01: MCNMCACHINGCFG_MC_2LM_REG:
en_2way: 0 prefer_way_sel: 0 chn_cap: 0xB nm_ratio_chn_cap: 0
C01: MCNMCACHINGOFFSET:
mcnmcachingoffsetlower: 0x0 mcnmcachingoffset: 0x0 mcnmcachingoffseten: 0
Write 2LM FM Decoder CSR's for HBM Stack 0 MC 0 TAD 0
C00: DRAM_RULE[0]:
rule_enable: 1 limit: 0x3F fm_target: 0 fm_chn_ways: 0 fm_chn_gran: 1 fm_target_ways: 0 fm_gran_eq: 0 fm_chn_l2pid: 0x00000000
C01: DRAM_RULE[0]:
rule_enable: 1 limit: 0x3F fm_target: 0 fm_chn_ways: 0 fm_chn_gran: 1 fm_target_ways: 0 fm_gran_eq: 0 fm_chn_l2pid: 0x00000000
Write 2LM FM Decoder CSR's for HBM Stack 0 MC 1 TAD 0
C00: DRAM_RULE[0]:
rule_enable: 1 limit: 0x3F fm_target: 0 fm_chn_ways: 0 fm_chn_gran: 1 fm_target_ways: 0 fm_gran_eq: 0 fm_chn_l2pid: 0x00000000
C01: DRAM_RULE[0]:
rule_enable: 1 limit: 0x3F fm_target: 0 fm_chn_ways: 0 fm_chn_gran: 1 fm_target_ways: 0 fm_gran_eq: 0 fm_chn_l2pid: 0x00000000
Write 2LM FM Decoder CSR's for HBM Stack 0 MC 2 TAD 0
C00: DRAM_RULE[0]:
rule_enable: 1 limit: 0x3F fm_target: 0 fm_chn_ways: 0 fm_chn_gran: 1 fm_target_ways: 0 fm_gran_eq: 0 fm_chn_l2pid: 0x00000000
C01: DRAM_RULE[0]:
rule_enable: 1 limit: 0x3F fm_target: 0 fm_chn_ways: 0 fm_chn_gran: 1 fm_target_ways: 0 fm_gran_eq: 0 fm_chn_l2pid: 0x00000000
Write 2LM FM Decoder CSR's for HBM Stack 0 MC 3 TAD 0
C00: DRAM_RULE[0]:
rule_enable: 1 limit: 0x3F fm_target: 0 fm_chn_ways: 0 fm_chn_gran: 1 fm_target_ways: 0 fm_gran_eq: 0 fm_chn_l2pid: 0x00000000
C01: DRAM_RULE[0]:
rule_enable: 1 limit: 0x3F fm_target: 0 fm_chn_ways: 0 fm_chn_gran: 1 fm_target_ways: 0 fm_gran_eq: 0 fm_chn_l2pid: 0x00000000
Write 2LM FM Decoder CSR's for HBM Stack 0 MC 0 TAD 1
C00: DRAM_RULE[1]:
rule_enable: 1 limit: 0x21F fm_target: 0 fm_chn_ways: 0 fm_chn_gran: 1 fm_target_ways: 0 fm_gran_eq: 0 fm_chn_l2pid: 0x00000000
C01: DRAM_RULE[1]:
rule_enable: 1 limit: 0x21F fm_target: 0 fm_chn_ways: 0 fm_chn_gran: 1 fm_target_ways: 0 fm_gran_eq: 0 fm_chn_l2pid: 0x00000000
Write 2LM FM Decoder CSR's for HBM Stack 0 MC 1 TAD 1
C00: DRAM_RULE[1]:
rule_enable: 1 limit: 0x21F fm_target: 0 fm_chn_ways: 0 fm_chn_gran: 1 fm_target_ways: 0 fm_gran_eq: 0 fm_chn_l2pid: 0x00000000
C01: DRAM_RULE[1]:
rule_enable: 1 limit: 0x21F fm_target: 0 fm_chn_ways: 0 fm_chn_gran: 1 fm_target_ways: 0 fm_gran_eq: 0 fm_chn_l2pid: 0x00000000
Write 2LM FM Decoder CSR's for HBM Stack 0 MC 2 TAD 1
C00: DRAM_RULE[1]:
rule_enable: 1 limit: 0x21F fm_target: 0 fm_chn_ways: 0 fm_chn_gran: 1 fm_target_ways: 0 fm_gran_eq: 0 fm_chn_l2pid: 0x00000000
C01: DRAM_RULE[1]:
rule_enable: 1 limit: 0x21F fm_target: 0 fm_chn_ways: 0 fm_chn_gran: 1 fm_target_ways: 0 fm_gran_eq: 0 fm_chn_l2pid: 0x00000000
Write 2LM FM Decoder CSR's for HBM Stack 0 MC 3 TAD 1
C00: DRAM_RULE[1]:
rule_enable: 1 limit: 0x21F fm_target: 0 fm_chn_ways: 0 fm_chn_gran: 1 fm_target_ways: 0 fm_gran_eq: 0 fm_chn_l2pid: 0x00000000
C01: DRAM_RULE[1]:
rule_enable: 1 limit: 0x21F fm_target: 0 fm_chn_ways: 0 fm_chn_gran: 1 fm_target_ways: 0 fm_gran_eq: 0 fm_chn_l2pid: 0x00000000
Write Patrol and Sparing TAD range CSR's for HBM Stack 1 MC 0
C00: TADWAYNESS[0]:
target_lid: 0 chn_lid: 0 tad_limit: 0x1F
C00: TADBASE[0]:
mirror_en: 0 en_failover: 0 ign_ptrl_uc: 0 base: 0x0
C01: TADWAYNESS[0]:
target_lid: 0 chn_lid: 1 tad_limit: 0x1F
C01: TADBASE[0]:
mirror_en: 0 en_failover: 0 ign_ptrl_uc: 0 base: 0x0
Write Patrol and Sparing TAD range CSR's for HBM Stack 1 MC 1
C00: TADWAYNESS[0]:
target_lid: 0 chn_lid: 2 tad_limit: 0x1F
C00: TADBASE[0]:
mirror_en: 0 en_failover: 0 ign_ptrl_uc: 0 base: 0x0
C01: TADWAYNESS[0]:
target_lid: 0 chn_lid: 3 tad_limit: 0x1F
C01: TADBASE[0]:
mirror_en: 0 en_failover: 0 ign_ptrl_uc: 0 base: 0x0
Write Patrol and Sparing TAD range CSR's for HBM Stack 1 MC 2
C00: TADWAYNESS[0]:
target_lid: 0 chn_lid: 4 tad_limit: 0x1F
C00: TADBASE[0]:
mirror_en: 0 en_failover: 0 ign_ptrl_uc: 0 base: 0x0
C01: TADWAYNESS[0]:
target_lid: 0 chn_lid: 5 tad_limit: 0x1F
C01: TADBASE[0]:
mirror_en: 0 en_failover: 0 ign_ptrl_uc: 0 base: 0x0
Write Patrol and Sparing TAD range CSR's for HBM Stack 1 MC 3
C00: TADWAYNESS[0]:
target_lid: 0 chn_lid: 6 tad_limit: 0x1F
C00: TADBASE[0]:
mirror_en: 0 en_failover: 0 ign_ptrl_uc: 0 base: 0x0
C01: TADWAYNESS[0]:
target_lid: 0 chn_lid: 7 tad_limit: 0x1F
C01: TADBASE[0]:
mirror_en: 0 en_failover: 0 ign_ptrl_uc: 0 base: 0x0
Write Hbm Nm Caching Tad CSR's for HBM Stack 1 MC 0
C00: MCNMCACHINGCFG 2LM TAD:
nmcachingtaden: 1 nmcachingtad: 0
C01: MCNMCACHINGCFG 2LM TAD:
nmcachingtaden: 1 nmcachingtad: 0
Write Hbm Nm Caching Tad CSR's for HBM Stack 1 MC 1
C00: MCNMCACHINGCFG 2LM TAD:
nmcachingtaden: 1 nmcachingtad: 0
C01: MCNMCACHINGCFG 2LM TAD:
nmcachingtaden: 1 nmcachingtad: 0
Write Hbm Nm Caching Tad CSR's for HBM Stack 1 MC 2
C00: MCNMCACHINGCFG 2LM TAD:
nmcachingtaden: 1 nmcachingtad: 0
C01: MCNMCACHINGCFG 2LM TAD:
nmcachingtaden: 1 nmcachingtad: 0
Write Hbm Nm Caching Tad CSR's for HBM Stack 1 MC 3
C00: MCNMCACHINGCFG 2LM TAD:
nmcachingtaden: 1 nmcachingtad: 0
C01: MCNMCACHINGCFG 2LM TAD:
nmcachingtaden: 1 nmcachingtad: 0
Write 1LM Decoder CSR's for HBM Stack 1 MC 0
C00: TADCHNILVOFFSET[0]:
target_ways: 0 chn_ways: 0 target_gran: 1 chn_gran: 1 tad_offset: 0x0 tad_offset_sign: 0
C01: TADCHNILVOFFSET[0]:
target_ways: 0 chn_ways: 0 target_gran: 1 chn_gran: 1 tad_offset: 0x0 tad_offset_sign: 0
Write 1LM Decoder CSR's for HBM Stack 1 MC 1
C00: TADCHNILVOFFSET[0]:
target_ways: 0 chn_ways: 0 target_gran: 1 chn_gran: 1 tad_offset: 0x0 tad_offset_sign: 0
C01: TADCHNILVOFFSET[0]:
target_ways: 0 chn_ways: 0 target_gran: 1 chn_gran: 1 tad_offset: 0x0 tad_offset_sign: 0
Write 1LM Decoder CSR's for HBM Stack 1 MC 2
C00: TADCHNILVOFFSET[0]:
target_ways: 0 chn_ways: 0 target_gran: 1 chn_gran: 1 tad_offset: 0x0 tad_offset_sign: 0
C01: TADCHNILVOFFSET[0]:
target_ways: 0 chn_ways: 0 target_gran: 1 chn_gran: 1 tad_offset: 0x0 tad_offset_sign: 0
Write 1LM Decoder CSR's for HBM Stack 1 MC 3
C00: TADCHNILVOFFSET[0]:
target_ways: 0 chn_ways: 0 target_gran: 1 chn_gran: 1 tad_offset: 0x0 tad_offset_sign: 0
C01: TADCHNILVOFFSET[0]:
target_ways: 0 chn_ways: 0 target_gran: 1 chn_gran: 1 tad_offset: 0x0 tad_offset_sign: 0
Write MCNMCACHINGCFG for HBM Stack 1 MC 0
C00: MCNMCACHINGCFG:
mcnmcachingenb: 1 mcpmemenb: 0 mcnmcachingpmemwt: 0
C01: MCNMCACHINGCFG:
mcnmcachingenb: 1 mcpmemenb: 0 mcnmcachingpmemwt: 0
Write MCNMCACHINGCFG for HBM Stack 1 MC 1
C00: MCNMCACHINGCFG:
mcnmcachingenb: 1 mcpmemenb: 0 mcnmcachingpmemwt: 0
C01: MCNMCACHINGCFG:
mcnmcachingenb: 1 mcpmemenb: 0 mcnmcachingpmemwt: 0
Write MCNMCACHINGCFG for HBM Stack 1 MC 2
C00: MCNMCACHINGCFG:
mcnmcachingenb: 1 mcpmemenb: 0 mcnmcachingpmemwt: 0
C01: MCNMCACHINGCFG:
mcnmcachingenb: 1 mcpmemenb: 0 mcnmcachingpmemwt: 0
Write MCNMCACHINGCFG for HBM Stack 1 MC 3
C00: MCNMCACHINGCFG:
mcnmcachingenb: 1 mcpmemenb: 0 mcnmcachingpmemwt: 0
C01: MCNMCACHINGCFG:
mcnmcachingenb: 1 mcpmemenb: 0 mcnmcachingpmemwt: 0
Write 2LM NM Decoder CSR's for HBM Stack 1 MC 0
C00: CSR for force_lat bit : AMAP_MC_MAIN_REG: 0x52
C00: MCNMCACHINGINTLV:
nm_target_ways: 0 nm_chn_ways: 3 nm_target_lid: 0 nm_target_gran: 1 nm_chn_gran: 1 nm_chn_lid: 0
C00: MCNMCACHINGCFG_MC_2LM_REG:
en_2way: 0 prefer_way_sel: 0 chn_cap: 0xB nm_ratio_chn_cap: 0
C00: MCNMCACHINGOFFSET:
mcnmcachingoffsetlower: 0x2 mcnmcachingoffset: 0x1 mcnmcachingoffseten: 1
C01: CSR for force_lat bit : AMAP_MC_MAIN_REG: 0x52
C01: MCNMCACHINGINTLV:
nm_target_ways: 0 nm_chn_ways: 3 nm_target_lid: 0 nm_target_gran: 1 nm_chn_gran: 1 nm_chn_lid: 1
C01: MCNMCACHINGCFG_MC_2LM_REG:
en_2way: 0 prefer_way_sel: 0 chn_cap: 0xB nm_ratio_chn_cap: 0
C01: MCNMCACHINGOFFSET:
mcnmcachingoffsetlower: 0x2 mcnmcachingoffset: 0x1 mcnmcachingoffseten: 1
Write 2LM NM Decoder CSR's for HBM Stack 1 MC 1
C00: CSR for force_lat bit : AMAP_MC_MAIN_REG: 0x52
C00: MCNMCACHINGINTLV:
nm_target_ways: 0 nm_chn_ways: 3 nm_target_lid: 0 nm_target_gran: 1 nm_chn_gran: 1 nm_chn_lid: 2
C00: MCNMCACHINGCFG_MC_2LM_REG:
en_2way: 0 prefer_way_sel: 0 chn_cap: 0xB nm_ratio_chn_cap: 0
C00: MCNMCACHINGOFFSET:
mcnmcachingoffsetlower: 0x2 mcnmcachingoffset: 0x1 mcnmcachingoffseten: 1
C01: CSR for force_lat bit : AMAP_MC_MAIN_REG: 0x52
C01: MCNMCACHINGINTLV:
nm_target_ways: 0 nm_chn_ways: 3 nm_target_lid: 0 nm_target_gran: 1 nm_chn_gran: 1 nm_chn_lid: 3
C01: MCNMCACHINGCFG_MC_2LM_REG:
en_2way: 0 prefer_way_sel: 0 chn_cap: 0xB nm_ratio_chn_cap: 0
C01: MCNMCACHINGOFFSET:
mcnmcachingoffsetlower: 0x2 mcnmcachingoffset: 0x1 mcnmcachingoffseten: 1
Write 2LM NM Decoder CSR's for HBM Stack 1 MC 2
C00: CSR for force_lat bit : AMAP_MC_MAIN_REG: 0x52
C00: MCNMCACHINGINTLV:
nm_target_ways: 0 nm_chn_ways: 3 nm_target_lid: 0 nm_target_gran: 1 nm_chn_gran: 1 nm_chn_lid: 4
C00: MCNMCACHINGCFG_MC_2LM_REG:
en_2way: 0 prefer_way_sel: 0 chn_cap: 0xB nm_ratio_chn_cap: 0
C00: MCNMCACHINGOFFSET:
mcnmcachingoffsetlower: 0x2 mcnmcachingoffset: 0x1 mcnmcachingoffseten: 1
C01: CSR for force_lat bit : AMAP_MC_MAIN_REG: 0x52
C01: MCNMCACHINGINTLV:
nm_target_ways: 0 nm_chn_ways: 3 nm_target_lid: 0 nm_target_gran: 1 nm_chn_gran: 1 nm_chn_lid: 5
C01: MCNMCACHINGCFG_MC_2LM_REG:
en_2way: 0 prefer_way_sel: 0 chn_cap: 0xB nm_ratio_chn_cap: 0
C01: MCNMCACHINGOFFSET:
mcnmcachingoffsetlower: 0x2 mcnmcachingoffset: 0x1 mcnmcachingoffseten: 1
Write 2LM NM Decoder CSR's for HBM Stack 1 MC 3
C00: CSR for force_lat bit : AMAP_MC_MAIN_REG: 0x52
C00: MCNMCACHINGINTLV:
nm_target_ways: 0 nm_chn_ways: 3 nm_target_lid: 0 nm_target_gran: 1 nm_chn_gran: 1 nm_chn_lid: 6
C00: MCNMCACHINGCFG_MC_2LM_REG:
en_2way: 0 prefer_way_sel: 0 chn_cap: 0xB nm_ratio_chn_cap: 0
C00: MCNMCACHINGOFFSET:
mcnmcachingoffsetlower: 0x2 mcnmcachingoffset: 0x1 mcnmcachingoffseten: 1
C01: CSR for force_lat bit : AMAP_MC_MAIN_REG: 0x52
C01: MCNMCACHINGINTLV:
nm_target_ways: 0 nm_chn_ways: 3 nm_target_lid: 0 nm_target_gran: 1 nm_chn_gran: 1 nm_chn_lid: 7
C01: MCNMCACHINGCFG_MC_2LM_REG:
en_2way: 0 prefer_way_sel: 0 chn_cap: 0xB nm_ratio_chn_cap: 0
C01: MCNMCACHINGOFFSET:
mcnmcachingoffsetlower: 0x2 mcnmcachingoffset: 0x1 mcnmcachingoffseten: 1
Write 2LM FM Decoder CSR's for HBM Stack 1 MC 0 TAD 0
C00: DRAM_RULE[0]:
rule_enable: 1 limit: 0x41F fm_target: 0 fm_chn_ways: 0 fm_chn_gran: 1 fm_target_ways: 0 fm_gran_eq: 0 fm_chn_l2pid: 0x00000000
C01: DRAM_RULE[0]:
rule_enable: 1 limit: 0x41F fm_target: 0 fm_chn_ways: 0 fm_chn_gran: 1 fm_target_ways: 0 fm_gran_eq: 0 fm_chn_l2pid: 0x00000000
Write 2LM FM Decoder CSR's for HBM Stack 1 MC 1 TAD 0
C00: DRAM_RULE[0]:
rule_enable: 1 limit: 0x41F fm_target: 0 fm_chn_ways: 0 fm_chn_gran: 1 fm_target_ways: 0 fm_gran_eq: 0 fm_chn_l2pid: 0x00000000
C01: DRAM_RULE[0]:
rule_enable: 1 limit: 0x41F fm_target: 0 fm_chn_ways: 0 fm_chn_gran: 1 fm_target_ways: 0 fm_gran_eq: 0 fm_chn_l2pid: 0x00000000
Write 2LM FM Decoder CSR's for HBM Stack 1 MC 2 TAD 0
C00: DRAM_RULE[0]:
rule_enable: 1 limit: 0x41F fm_target: 0 fm_chn_ways: 0 fm_chn_gran: 1 fm_target_ways: 0 fm_gran_eq: 0 fm_chn_l2pid: 0x00000000
C01: DRAM_RULE[0]:
rule_enable: 1 limit: 0x41F fm_target: 0 fm_chn_ways: 0 fm_chn_gran: 1 fm_target_ways: 0 fm_gran_eq: 0 fm_chn_l2pid: 0x00000000
Write 2LM FM Decoder CSR's for HBM Stack 1 MC 3 TAD 0
C00: DRAM_RULE[0]:
rule_enable: 1 limit: 0x41F fm_target: 0 fm_chn_ways: 0 fm_chn_gran: 1 fm_target_ways: 0 fm_gran_eq: 0 fm_chn_l2pid: 0x00000000
C01: DRAM_RULE[0]:
rule_enable: 1 limit: 0x41F fm_target: 0 fm_chn_ways: 0 fm_chn_gran: 1 fm_target_ways: 0 fm_gran_eq: 0 fm_chn_l2pid: 0x00000000
Write Patrol and Sparing TAD range CSR's for HBM Stack 2 MC 0
C00: TADWAYNESS[0]:
target_lid: 0 chn_lid: 0 tad_limit: 0x1F
C00: TADBASE[0]:
mirror_en: 0 en_failover: 0 ign_ptrl_uc: 0 base: 0x0
C01: TADWAYNESS[0]:
target_lid: 0 chn_lid: 1 tad_limit: 0x1F
C01: TADBASE[0]:
mirror_en: 0 en_failover: 0 ign_ptrl_uc: 0 base: 0x0
Write Patrol and Sparing TAD range CSR's for HBM Stack 2 MC 1
C00: TADWAYNESS[0]:
target_lid: 0 chn_lid: 2 tad_limit: 0x1F
C00: TADBASE[0]:
mirror_en: 0 en_failover: 0 ign_ptrl_uc: 0 base: 0x0
C01: TADWAYNESS[0]:
target_lid: 0 chn_lid: 3 tad_limit: 0x1F
C01: TADBASE[0]:
mirror_en: 0 en_failover: 0 ign_ptrl_uc: 0 base: 0x0
Write Patrol and Sparing TAD range CSR's for HBM Stack 2 MC 2
C00: TADWAYNESS[0]:
target_lid: 0 chn_lid: 4 tad_limit: 0x1F
C00: TADBASE[0]:
mirror_en: 0 en_failover: 0 ign_ptrl_uc: 0 base: 0x0
C01: TADWAYNESS[0]:
target_lid: 0 chn_lid: 5 tad_limit: 0x1F
C01: TADBASE[0]:
mirror_en: 0 en_failover: 0 ign_ptrl_uc: 0 base: 0x0
Write Patrol and Sparing TAD range CSR's for HBM Stack 2 MC 3
C00: TADWAYNESS[0]:
target_lid: 0 chn_lid: 6 tad_limit: 0x1F
C00: TADBASE[0]:
mirror_en: 0 en_failover: 0 ign_ptrl_uc: 0 base: 0x0
C01: TADWAYNESS[0]:
target_lid: 0 chn_lid: 7 tad_limit: 0x1F
C01: TADBASE[0]:
mirror_en: 0 en_failover: 0 ign_ptrl_uc: 0 base: 0x0
Write Hbm Nm Caching Tad CSR's for HBM Stack 2 MC 0
C00: MCNMCACHINGCFG 2LM TAD:
nmcachingtaden: 1 nmcachingtad: 0
C01: MCNMCACHINGCFG 2LM TAD:
nmcachingtaden: 1 nmcachingtad: 0
Write Hbm Nm Caching Tad CSR's for HBM Stack 2 MC 1
C00: MCNMCACHINGCFG 2LM TAD:
nmcachingtaden: 1 nmcachingtad: 0
C01: MCNMCACHINGCFG 2LM TAD:
nmcachingtaden: 1 nmcachingtad: 0
Write Hbm Nm Caching Tad CSR's for HBM Stack 2 MC 2
C00: MCNMCACHINGCFG 2LM TAD:
nmcachingtaden: 1 nmcachingtad: 0
C01: MCNMCACHINGCFG 2LM TAD:
nmcachingtaden: 1 nmcachingtad: 0
Write Hbm Nm Caching Tad CSR's for HBM Stack 2 MC 3
C00: MCNMCACHINGCFG 2LM TAD:
nmcachingtaden: 1 nmcachingtad: 0
C01: MCNMCACHINGCFG 2LM TAD:
nmcachingtaden: 1 nmcachingtad: 0
Write 1LM Decoder CSR's for HBM Stack 2 MC 0
C00: TADCHNILVOFFSET[0]:
target_ways: 0 chn_ways: 0 target_gran: 1 chn_gran: 1 tad_offset: 0x0 tad_offset_sign: 0
C01: TADCHNILVOFFSET[0]:
target_ways: 0 chn_ways: 0 target_gran: 1 chn_gran: 1 tad_offset: 0x0 tad_offset_sign: 0
Write 1LM Decoder CSR's for HBM Stack 2 MC 1
C00: TADCHNILVOFFSET[0]:
target_ways: 0 chn_ways: 0 target_gran: 1 chn_gran: 1 tad_offset: 0x0 tad_offset_sign: 0
C01: TADCHNILVOFFSET[0]:
target_ways: 0 chn_ways: 0 target_gran: 1 chn_gran: 1 tad_offset: 0x0 tad_offset_sign: 0
Write 1LM Decoder CSR's for HBM Stack 2 MC 2
C00: TADCHNILVOFFSET[0]:
target_ways: 0 chn_ways: 0 target_gran: 1 chn_gran: 1 tad_offset: 0x0 tad_offset_sign: 0
C01: TADCHNILVOFFSET[0]:
target_ways: 0 chn_ways: 0 target_gran: 1 chn_gran: 1 tad_offset: 0x0 tad_offset_sign: 0
Write 1LM Decoder CSR's for HBM Stack 2 MC 3
C00: TADCHNILVOFFSET[0]:
target_ways: 0 chn_ways: 0 target_gran: 1 chn_gran: 1 tad_offset: 0x0 tad_offset_sign: 0
C01: TADCHNILVOFFSET[0]:
target_ways: 0 chn_ways: 0 target_gran: 1 chn_gran: 1 tad_offset: 0x0 tad_offset_sign: 0
Write MCNMCACHINGCFG for HBM Stack 2 MC 0
C00: MCNMCACHINGCFG:
mcnmcachingenb: 1 mcpmemenb: 0 mcnmcachingpmemwt: 0
C01: MCNMCACHINGCFG:
mcnmcachingenb: 1 mcpmemenb: 0 mcnmcachingpmemwt: 0
Write MCNMCACHINGCFG for HBM Stack 2 MC 1
C00: MCNMCACHINGCFG:
mcnmcachingenb: 1 mcpmemenb: 0 mcnmcachingpmemwt: 0
C01: MCNMCACHINGCFG:
mcnmcachingenb: 1 mcpmemenb: 0 mcnmcachingpmemwt: 0
Write MCNMCACHINGCFG for HBM Stack 2 MC 2
C00: MCNMCACHINGCFG:
mcnmcachingenb: 1 mcpmemenb: 0 mcnmcachingpmemwt: 0
C01: MCNMCACHINGCFG:
mcnmcachingenb: 1 mcpmemenb: 0 mcnmcachingpmemwt: 0
Write MCNMCACHINGCFG for HBM Stack 2 MC 3
C00: MCNMCACHINGCFG:
mcnmcachingenb: 1 mcpmemenb: 0 mcnmcachingpmemwt: 0
C01: MCNMCACHINGCFG:
mcnmcachingenb: 1 mcpmemenb: 0 mcnmcachingpmemwt: 0
Write 2LM NM Decoder CSR's for HBM Stack 2 MC 0
C00: CSR for force_lat bit : AMAP_MC_MAIN_REG: 0x52
C00: MCNMCACHINGINTLV:
nm_target_ways: 0 nm_chn_ways: 3 nm_target_lid: 0 nm_target_gran: 1 nm_chn_gran: 1 nm_chn_lid: 0
C00: MCNMCACHINGCFG_MC_2LM_REG:
en_2way: 0 prefer_way_sel: 0 chn_cap: 0xB nm_ratio_chn_cap: 0
C00: MCNMCACHINGOFFSET:
mcnmcachingoffsetlower: 0x2 mcnmcachingoffset: 0x2 mcnmcachingoffseten: 1
C01: CSR for force_lat bit : AMAP_MC_MAIN_REG: 0x52
C01: MCNMCACHINGINTLV:
nm_target_ways: 0 nm_chn_ways: 3 nm_target_lid: 0 nm_target_gran: 1 nm_chn_gran: 1 nm_chn_lid: 1
C01: MCNMCACHINGCFG_MC_2LM_REG:
en_2way: 0 prefer_way_sel: 0 chn_cap: 0xB nm_ratio_chn_cap: 0
C01: MCNMCACHINGOFFSET:
mcnmcachingoffsetlower: 0x2 mcnmcachingoffset: 0x2 mcnmcachingoffseten: 1
Write 2LM NM Decoder CSR's for HBM Stack 2 MC 1
C00: CSR for force_lat bit : AMAP_MC_MAIN_REG: 0x52
C00: MCNMCACHINGINTLV:
nm_target_ways: 0 nm_chn_ways: 3 nm_target_lid: 0 nm_target_gran: 1 nm_chn_gran: 1 nm_chn_lid: 2
C00: MCNMCACHINGCFG_MC_2LM_REG:
en_2way: 0 prefer_way_sel: 0 chn_cap: 0xB nm_ratio_chn_cap: 0
C00: MCNMCACHINGOFFSET:
mcnmcachingoffsetlower: 0x2 mcnmcachingoffset: 0x2 mcnmcachingoffseten: 1
C01: CSR for force_lat bit : AMAP_MC_MAIN_REG: 0x52
C01: MCNMCACHINGINTLV:
nm_target_ways: 0 nm_chn_ways: 3 nm_target_lid: 0 nm_target_gran: 1 nm_chn_gran: 1 nm_chn_lid: 3
C01: MCNMCACHINGCFG_MC_2LM_REG:
en_2way: 0 prefer_way_sel: 0 chn_cap: 0xB nm_ratio_chn_cap: 0
C01: MCNMCACHINGOFFSET:
mcnmcachingoffsetlower: 0x2 mcnmcachingoffset: 0x2 mcnmcachingoffseten: 1
Write 2LM NM Decoder CSR's for HBM Stack 2 MC 2
C00: CSR for force_lat bit : AMAP_MC_MAIN_REG: 0x52
C00: MCNMCACHINGINTLV:
nm_target_ways: 0 nm_chn_ways: 3 nm_target_lid: 0 nm_target_gran: 1 nm_chn_gran: 1 nm_chn_lid: 4
C00: MCNMCACHINGCFG_MC_2LM_REG:
en_2way: 0 prefer_way_sel: 0 chn_cap: 0xB nm_ratio_chn_cap: 0
C00: MCNMCACHINGOFFSET:
mcnmcachingoffsetlower: 0x2 mcnmcachingoffset: 0x2 mcnmcachingoffseten: 1
C01: CSR for force_lat bit : AMAP_MC_MAIN_REG: 0x52
C01: MCNMCACHINGINTLV:
nm_target_ways: 0 nm_chn_ways: 3 nm_target_lid: 0 nm_target_gran: 1 nm_chn_gran: 1 nm_chn_lid: 5
C01: MCNMCACHINGCFG_MC_2LM_REG:
en_2way: 0 prefer_way_sel: 0 chn_cap: 0xB nm_ratio_chn_cap: 0
C01: MCNMCACHINGOFFSET:
mcnmcachingoffsetlower: 0x2 mcnmcachingoffset: 0x2 mcnmcachingoffseten: 1
Write 2LM NM Decoder CSR's for HBM Stack 2 MC 3
C00: CSR for force_lat bit : AMAP_MC_MAIN_REG: 0x52
C00: MCNMCACHINGINTLV:
nm_target_ways: 0 nm_chn_ways: 3 nm_target_lid: 0 nm_target_gran: 1 nm_chn_gran: 1 nm_chn_lid: 6
C00: MCNMCACHINGCFG_MC_2LM_REG:
en_2way: 0 prefer_way_sel: 0 chn_cap: 0xB nm_ratio_chn_cap: 0
C00: MCNMCACHINGOFFSET:
mcnmcachingoffsetlower: 0x2 mcnmcachingoffset: 0x2 mcnmcachingoffseten: 1
C01: CSR for force_lat bit : AMAP_MC_MAIN_REG: 0x52
C01: MCNMCACHINGINTLV:
nm_target_ways: 0 nm_chn_ways: 3 nm_target_lid: 0 nm_target_gran: 1 nm_chn_gran: 1 nm_chn_lid: 7
C01: MCNMCACHINGCFG_MC_2LM_REG:
en_2way: 0 prefer_way_sel: 0 chn_cap: 0xB nm_ratio_chn_cap: 0
C01: MCNMCACHINGOFFSET:
mcnmcachingoffsetlower: 0x2 mcnmcachingoffset: 0x2 mcnmcachingoffseten: 1
Write 2LM FM Decoder CSR's for HBM Stack 2 MC 0 TAD 0
C00: DRAM_RULE[0]:
rule_enable: 1 limit: 0x61F fm_target: 0 fm_chn_ways: 0 fm_chn_gran: 1 fm_target_ways: 0 fm_gran_eq: 0 fm_chn_l2pid: 0x00000000
C01: DRAM_RULE[0]:
rule_enable: 1 limit: 0x61F fm_target: 0 fm_chn_ways: 0 fm_chn_gran: 1 fm_target_ways: 0 fm_gran_eq: 0 fm_chn_l2pid: 0x00000000
Write 2LM FM Decoder CSR's for HBM Stack 2 MC 1 TAD 0
C00: DRAM_RULE[0]:
rule_enable: 1 limit: 0x61F fm_target: 0 fm_chn_ways: 0 fm_chn_gran: 1 fm_target_ways: 0 fm_gran_eq: 0 fm_chn_l2pid: 0x00000000
C01: DRAM_RULE[0]:
rule_enable: 1 limit: 0x61F fm_target: 0 fm_chn_ways: 0 fm_chn_gran: 1 fm_target_ways: 0 fm_gran_eq: 0 fm_chn_l2pid: 0x00000000
Write 2LM FM Decoder CSR's for HBM Stack 2 MC 2 TAD 0
C00: DRAM_RULE[0]:
rule_enable: 1 limit: 0x61F fm_target: 0 fm_chn_ways: 0 fm_chn_gran: 1 fm_target_ways: 0 fm_gran_eq: 0 fm_chn_l2pid: 0x00000000
C01: DRAM_RULE[0]:
rule_enable: 1 limit: 0x61F fm_target: 0 fm_chn_ways: 0 fm_chn_gran: 1 fm_target_ways: 0 fm_gran_eq: 0 fm_chn_l2pid: 0x00000000
Write 2LM FM Decoder CSR's for HBM Stack 2 MC 3 TAD 0
C00: DRAM_RULE[0]:
rule_enable: 1 limit: 0x61F fm_target: 0 fm_chn_ways: 0 fm_chn_gran: 1 fm_target_ways: 0 fm_gran_eq: 0 fm_chn_l2pid: 0x00000000
C01: DRAM_RULE[0]:
rule_enable: 1 limit: 0x61F fm_target: 0 fm_chn_ways: 0 fm_chn_gran: 1 fm_target_ways: 0 fm_gran_eq: 0 fm_chn_l2pid: 0x00000000
Write Patrol and Sparing TAD range CSR's for HBM Stack 3 MC 0
C00: TADWAYNESS[0]:
target_lid: 0 chn_lid: 0 tad_limit: 0x1F
C00: TADBASE[0]:
mirror_en: 0 en_failover: 0 ign_ptrl_uc: 0 base: 0x0
C01: TADWAYNESS[0]:
target_lid: 0 chn_lid: 1 tad_limit: 0x1F
C01: TADBASE[0]:
mirror_en: 0 en_failover: 0 ign_ptrl_uc: 0 base: 0x0
Write Patrol and Sparing TAD range CSR's for HBM Stack 3 MC 1
C00: TADWAYNESS[0]:
target_lid: 0 chn_lid: 2 tad_limit: 0x1F
C00: TADBASE[0]:
mirror_en: 0 en_failover: 0 ign_ptrl_uc: 0 base: 0x0
C01: TADWAYNESS[0]:
target_lid: 0 chn_lid: 3 tad_limit: 0x1F
C01: TADBASE[0]:
mirror_en: 0 en_failover: 0 ign_ptrl_uc: 0 base: 0x0
Write Patrol and Sparing TAD range CSR's for HBM Stack 3 MC 2
C00: TADWAYNESS[0]:
target_lid: 0 chn_lid: 4 tad_limit: 0x1F
C00: TADBASE[0]:
mirror_en: 0 en_failover: 0 ign_ptrl_uc: 0 base: 0x0
C01: TADWAYNESS[0]:
target_lid: 0 chn_lid: 5 tad_limit: 0x1F
C01: TADBASE[0]:
mirror_en: 0 en_failover: 0 ign_ptrl_uc: 0 base: 0x0
Write Patrol and Sparing TAD range CSR's for HBM Stack 3 MC 3
C00: TADWAYNESS[0]:
target_lid: 0 chn_lid: 6 tad_limit: 0x1F
C00: TADBASE[0]:
mirror_en: 0 en_failover: 0 ign_ptrl_uc: 0 base: 0x0
C01: TADWAYNESS[0]:
target_lid: 0 chn_lid: 7 tad_limit: 0x1F
C01: TADBASE[0]:
mirror_en: 0 en_failover: 0 ign_ptrl_uc: 0 base: 0x0
Write Hbm Nm Caching Tad CSR's for HBM Stack 3 MC 0
C00: MCNMCACHINGCFG 2LM TAD:
nmcachingtaden: 1 nmcachingtad: 0
C01: MCNMCACHINGCFG 2LM TAD:
nmcachingtaden: 1 nmcachingtad: 0
Write Hbm Nm Caching Tad CSR's for HBM Stack 3 MC 1
C00: MCNMCACHINGCFG 2LM TAD:
nmcachingtaden: 1 nmcachingtad: 0
C01: MCNMCACHINGCFG 2LM TAD:
nmcachingtaden: 1 nmcachingtad: 0
Write Hbm Nm Caching Tad CSR's for HBM Stack 3 MC 2
C00: MCNMCACHINGCFG 2LM TAD:
nmcachingtaden: 1 nmcachingtad: 0
C01: MCNMCACHINGCFG 2LM TAD:
nmcachingtaden: 1 nmcachingtad: 0
Write Hbm Nm Caching Tad CSR's for HBM Stack 3 MC 3
C00: MCNMCACHINGCFG 2LM TAD:
nmcachingtaden: 1 nmcachingtad: 0
C01: MCNMCACHINGCFG 2LM TAD:
nmcachingtaden: 1 nmcachingtad: 0
Write 1LM Decoder CSR's for HBM Stack 3 MC 0
C00: TADCHNILVOFFSET[0]:
target_ways: 0 chn_ways: 0 target_gran: 1 chn_gran: 1 tad_offset: 0x0 tad_offset_sign: 0
C01: TADCHNILVOFFSET[0]:
target_ways: 0 chn_ways: 0 target_gran: 1 chn_gran: 1 tad_offset: 0x0 tad_offset_sign: 0
Write 1LM Decoder CSR's for HBM Stack 3 MC 1
C00: TADCHNILVOFFSET[0]:
target_ways: 0 chn_ways: 0 target_gran: 1 chn_gran: 1 tad_offset: 0x0 tad_offset_sign: 0
C01: TADCHNILVOFFSET[0]:
target_ways: 0 chn_ways: 0 target_gran: 1 chn_gran: 1 tad_offset: 0x0 tad_offset_sign: 0
Write 1LM Decoder CSR's for HBM Stack 3 MC 2
C00: TADCHNILVOFFSET[0]:
target_ways: 0 chn_ways: 0 target_gran: 1 chn_gran: 1 tad_offset: 0x0 tad_offset_sign: 0
C01: TADCHNILVOFFSET[0]:
target_ways: 0 chn_ways: 0 target_gran: 1 chn_gran: 1 tad_offset: 0x0 tad_offset_sign: 0
Write 1LM Decoder CSR's for HBM Stack 3 MC 3
C00: TADCHNILVOFFSET[0]:
target_ways: 0 chn_ways: 0 target_gran: 1 chn_gran: 1 tad_offset: 0x0 tad_offset_sign: 0
C01: TADCHNILVOFFSET[0]:
target_ways: 0 chn_ways: 0 target_gran: 1 chn_gran: 1 tad_offset: 0x0 tad_offset_sign: 0
Write MCNMCACHINGCFG for HBM Stack 3 MC 0
C00: MCNMCACHINGCFG:
mcnmcachingenb: 1 mcpmemenb: 0 mcnmcachingpmemwt: 0
C01: MCNMCACHINGCFG:
mcnmcachingenb: 1 mcpmemenb: 0 mcnmcachingpmemwt: 0
Write MCNMCACHINGCFG for HBM Stack 3 MC 1
C00: MCNMCACHINGCFG:
mcnmcachingenb: 1 mcpmemenb: 0 mcnmcachingpmemwt: 0
C01: MCNMCACHINGCFG:
mcnmcachingenb: 1 mcpmemenb: 0 mcnmcachingpmemwt: 0
Write MCNMCACHINGCFG for HBM Stack 3 MC 2
C00: MCNMCACHINGCFG:
mcnmcachingenb: 1 mcpmemenb: 0 mcnmcachingpmemwt: 0
C01: MCNMCACHINGCFG:
mcnmcachingenb: 1 mcpmemenb: 0 mcnmcachingpmemwt: 0
Write MCNMCACHINGCFG for HBM Stack 3 MC 3
C00: MCNMCACHINGCFG:
mcnmcachingenb: 1 mcpmemenb: 0 mcnmcachingpmemwt: 0
C01: MCNMCACHINGCFG:
mcnmcachingenb: 1 mcpmemenb: 0 mcnmcachingpmemwt: 0
Write 2LM NM Decoder CSR's for HBM Stack 3 MC 0
C00: CSR for force_lat bit : AMAP_MC_MAIN_REG: 0x52
C00: MCNMCACHINGINTLV:
nm_target_ways: 0 nm_chn_ways: 3 nm_target_lid: 0 nm_target_gran: 1 nm_chn_gran: 1 nm_chn_lid: 0
C00: MCNMCACHINGCFG_MC_2LM_REG:
en_2way: 0 prefer_way_sel: 0 chn_cap: 0xB nm_ratio_chn_cap: 0
C00: MCNMCACHINGOFFSET:
mcnmcachingoffsetlower: 0x2 mcnmcachingoffset: 0x3 mcnmcachingoffseten: 1
C01: CSR for force_lat bit : AMAP_MC_MAIN_REG: 0x52
C01: MCNMCACHINGINTLV:
nm_target_ways: 0 nm_chn_ways: 3 nm_target_lid: 0 nm_target_gran: 1 nm_chn_gran: 1 nm_chn_lid: 1
C01: MCNMCACHINGCFG_MC_2LM_REG:
en_2way: 0 prefer_way_sel: 0 chn_cap: 0xB nm_ratio_chn_cap: 0
C01: MCNMCACHINGOFFSET:
mcnmcachingoffsetlower: 0x2 mcnmcachingoffset: 0x3 mcnmcachingoffseten: 1
Write 2LM NM Decoder CSR's for HBM Stack 3 MC 1
C00: CSR for force_lat bit : AMAP_MC_MAIN_REG: 0x52
C00: MCNMCACHINGINTLV:
nm_target_ways: 0 nm_chn_ways: 3 nm_target_lid: 0 nm_target_gran: 1 nm_chn_gran: 1 nm_chn_lid: 2
C00: MCNMCACHINGCFG_MC_2LM_REG:
en_2way: 0 prefer_way_sel: 0 chn_cap: 0xB nm_ratio_chn_cap: 0
C00: MCNMCACHINGOFFSET:
mcnmcachingoffsetlower: 0x2 mcnmcachingoffset: 0x3 mcnmcachingoffseten: 1
C01: CSR for force_lat bit : AMAP_MC_MAIN_REG: 0x52
C01: MCNMCACHINGINTLV:
nm_target_ways: 0 nm_chn_ways: 3 nm_target_lid: 0 nm_target_gran: 1 nm_chn_gran: 1 nm_chn_lid: 3
C01: MCNMCACHINGCFG_MC_2LM_REG:
en_2way: 0 prefer_way_sel: 0 chn_cap: 0xB nm_ratio_chn_cap: 0
C01: MCNMCACHINGOFFSET:
mcnmcachingoffsetlower: 0x2 mcnmcachingoffset: 0x3 mcnmcachingoffseten: 1
Write 2LM NM Decoder CSR's for HBM Stack 3 MC 2
C00: CSR for force_lat bit : AMAP_MC_MAIN_REG: 0x52
C00: MCNMCACHINGINTLV:
nm_target_ways: 0 nm_chn_ways: 3 nm_target_lid: 0 nm_target_gran: 1 nm_chn_gran: 1 nm_chn_lid: 4
C00: MCNMCACHINGCFG_MC_2LM_REG:
en_2way: 0 prefer_way_sel: 0 chn_cap: 0xB nm_ratio_chn_cap: 0
C00: MCNMCACHINGOFFSET:
mcnmcachingoffsetlower: 0x2 mcnmcachingoffset: 0x3 mcnmcachingoffseten: 1
C01: CSR for force_lat bit : AMAP_MC_MAIN_REG: 0x52
C01: MCNMCACHINGINTLV:
nm_target_ways: 0 nm_chn_ways: 3 nm_target_lid: 0 nm_target_gran: 1 nm_chn_gran: 1 nm_chn_lid: 5
C01: MCNMCACHINGCFG_MC_2LM_REG:
en_2way: 0 prefer_way_sel: 0 chn_cap: 0xB nm_ratio_chn_cap: 0
C01: MCNMCACHINGOFFSET:
mcnmcachingoffsetlower: 0x2 mcnmcachingoffset: 0x3 mcnmcachingoffseten: 1
Write 2LM NM Decoder CSR's for HBM Stack 3 MC 3
C00: CSR for force_lat bit : AMAP_MC_MAIN_REG: 0x52
C00: MCNMCACHINGINTLV:
nm_target_ways: 0 nm_chn_ways: 3 nm_target_lid: 0 nm_target_gran: 1 nm_chn_gran: 1 nm_chn_lid: 6
C00: MCNMCACHINGCFG_MC_2LM_REG:
en_2way: 0 prefer_way_sel: 0 chn_cap: 0xB nm_ratio_chn_cap: 0
C00: MCNMCACHINGOFFSET:
mcnmcachingoffsetlower: 0x2 mcnmcachingoffset: 0x3 mcnmcachingoffseten: 1
C01: CSR for force_lat bit : AMAP_MC_MAIN_REG: 0x52
C01: MCNMCACHINGINTLV:
nm_target_ways: 0 nm_chn_ways: 3 nm_target_lid: 0 nm_target_gran: 1 nm_chn_gran: 1 nm_chn_lid: 7
C01: MCNMCACHINGCFG_MC_2LM_REG:
en_2way: 0 prefer_way_sel: 0 chn_cap: 0xB nm_ratio_chn_cap: 0
C01: MCNMCACHINGOFFSET:
mcnmcachingoffsetlower: 0x2 mcnmcachingoffset: 0x3 mcnmcachingoffseten: 1
Write 2LM FM Decoder CSR's for HBM Stack 3 MC 0 TAD 0
C00: DRAM_RULE[0]:
rule_enable: 1 limit: 0x81F fm_target: 0 fm_chn_ways: 0 fm_chn_gran: 1 fm_target_ways: 0 fm_gran_eq: 0 fm_chn_l2pid: 0x00000000
C01: DRAM_RULE[0]:
rule_enable: 1 limit: 0x81F fm_target: 0 fm_chn_ways: 0 fm_chn_gran: 1 fm_target_ways: 0 fm_gran_eq: 0 fm_chn_l2pid: 0x00000000
Write 2LM FM Decoder CSR's for HBM Stack 3 MC 1 TAD 0
C00: DRAM_RULE[0]:
rule_enable: 1 limit: 0x81F fm_target: 0 fm_chn_ways: 0 fm_chn_gran: 1 fm_target_ways: 0 fm_gran_eq: 0 fm_chn_l2pid: 0x00000000
C01: DRAM_RULE[0]:
rule_enable: 1 limit: 0x81F fm_target: 0 fm_chn_ways: 0 fm_chn_gran: 1 fm_target_ways: 0 fm_gran_eq: 0 fm_chn_l2pid: 0x00000000
Write 2LM FM Decoder CSR's for HBM Stack 3 MC 2 TAD 0
C00: DRAM_RULE[0]:
rule_enable: 1 limit: 0x81F fm_target: 0 fm_chn_ways: 0 fm_chn_gran: 1 fm_target_ways: 0 fm_gran_eq: 0 fm_chn_l2pid: 0x00000000
C01: DRAM_RULE[0]:
rule_enable: 1 limit: 0x81F fm_target: 0 fm_chn_ways: 0 fm_chn_gran: 1 fm_target_ways: 0 fm_gran_eq: 0 fm_chn_l2pid: 0x00000000
Write 2LM FM Decoder CSR's for HBM Stack 3 MC 3 TAD 0
C00: DRAM_RULE[0]:
rule_enable: 1 limit: 0x81F fm_target: 0 fm_chn_ways: 0 fm_chn_gran: 1 fm_target_ways: 0 fm_gran_eq: 0 fm_chn_l2pid: 0x00000000
C01: DRAM_RULE[0]:
rule_enable: 1 limit: 0x81F fm_target: 0 fm_chn_ways: 0 fm_chn_gran: 1 fm_target_ways: 0 fm_gran_eq: 0 fm_chn_l2pid: 0x00000000
Checkpoint Code: Socket 0, 0xBB, 0x08, 0x0000
^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^
Write RIR CSRs for Socket: 0
^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^
Channel - 0
RIRWAYNESSLIMIT_0_MC_MAIN_REG
rir_val: 1 rir_limit: 0x1F rir_way: 0x0
RIRILV0OFFSET_0_MC_MAIN_REG
rir_rnk_tgt0: 0x0 rir_offset0: 0x0
RIRILV1OFFSET_0_MC_MAIN_REG
rir_rnk_tgt0: 0x0 rir_offset0: 0x0
RIRILV2OFFSET_0_MC_MAIN_REG
rir_rnk_tgt0: 0x0 rir_offset0: 0x0
RIRILV3OFFSET_0_MC_MAIN_REG
rir_rnk_tgt0: 0x0 rir_offset0: 0x0
RIRILV4OFFSET_0_MC_MAIN_REG
rir_rnk_tgt0: 0x0 rir_offset0: 0x0
RIRILV5OFFSET_0_MC_MAIN_REG
rir_rnk_tgt0: 0x0 rir_offset0: 0x0
RIRILV6OFFSET_0_MC_MAIN_REG
rir_rnk_tgt0: 0x0 rir_offset0: 0x0
RIRILV7OFFSET_0_MC_MAIN_REG
rir_rnk_tgt0: 0x0 rir_offset0: 0x0
RIRWAYNESSLIMIT_1_MC_MAIN_REG
rir_val: 0 rir_limit: 0x1F rir_way: 0x0
RIRILV0OFFSET_1_MC_MAIN_REG
rir_rnk_tgt0: 0x0 rir_offset0: 0x0
RIRILV1OFFSET_1_MC_MAIN_REG
rir_rnk_tgt0: 0x0 rir_offset0: 0x0
RIRILV2OFFSET_1_MC_MAIN_REG
rir_rnk_tgt0: 0x0 rir_offset0: 0x0
RIRILV3OFFSET_1_MC_MAIN_REG
rir_rnk_tgt0: 0x0 rir_offset0: 0x0
RIRILV4OFFSET_1_MC_MAIN_REG
rir_rnk_tgt0: 0x0 rir_offset0: 0x0
RIRILV5OFFSET_1_MC_MAIN_REG
rir_rnk_tgt0: 0x0 rir_offset0: 0x0
RIRILV6OFFSET_1_MC_MAIN_REG
rir_rnk_tgt0: 0x0 rir_offset0: 0x0
RIRILV7OFFSET_1_MC_MAIN_REG
rir_rnk_tgt0: 0x0 rir_offset0: 0x0
RIRWAYNESSLIMIT_2_MC_MAIN_REG
rir_val: 0 rir_limit: 0x1F rir_way: 0x0
RIRILV0OFFSET_2_MC_MAIN_REG
rir_rnk_tgt0: 0x0 rir_offset0: 0x0
RIRILV1OFFSET_2_MC_MAIN_REG
rir_rnk_tgt0: 0x0 rir_offset0: 0x0
RIRILV2OFFSET_2_MC_MAIN_REG
rir_rnk_tgt0: 0x0 rir_offset0: 0x0
RIRILV3OFFSET_2_MC_MAIN_REG
rir_rnk_tgt0: 0x0 rir_offset0: 0x0
RIRILV4OFFSET_2_MC_MAIN_REG
rir_rnk_tgt0: 0x0 rir_offset0: 0x0
RIRILV5OFFSET_2_MC_MAIN_REG
rir_rnk_tgt0: 0x0 rir_offset0: 0x0
RIRILV6OFFSET_2_MC_MAIN_REG
rir_rnk_tgt0: 0x0 rir_offset0: 0x0
RIRILV7OFFSET_2_MC_MAIN_REG
rir_rnk_tgt0: 0x0 rir_offset0: 0x0
RIRWAYNESSLIMIT_3_MC_MAIN_REG
rir_val: 0 rir_limit: 0x1F rir_way: 0x0
RIRILV0OFFSET_3_MC_MAIN_REG
rir_rnk_tgt0: 0x0 rir_offset0: 0x0
RIRILV1OFFSET_3_MC_MAIN_REG
rir_rnk_tgt0: 0x0 rir_offset0: 0x0
RIRILV2OFFSET_3_MC_MAIN_REG
rir_rnk_tgt0: 0x0 rir_offset0: 0x0
RIRILV3OFFSET_3_MC_MAIN_REG
rir_rnk_tgt0: 0x0 rir_offset0: 0x0
RIRILV4OFFSET_3_MC_MAIN_REG
rir_rnk_tgt0: 0x0 rir_offset0: 0x0
RIRILV5OFFSET_3_MC_MAIN_REG
rir_rnk_tgt0: 0x0 rir_offset0: 0x0
RIRILV6OFFSET_3_MC_MAIN_REG
rir_rnk_tgt0: 0x0 rir_offset0: 0x0
RIRILV7OFFSET_3_MC_MAIN_REG
rir_rnk_tgt0: 0x0 rir_offset0: 0x0
Channel - 2
RIRWAYNESSLIMIT_0_MC_MAIN_REG
rir_val: 1 rir_limit: 0x1F rir_way: 0x0
RIRILV0OFFSET_0_MC_MAIN_REG
rir_rnk_tgt0: 0x0 rir_offset0: 0x0
RIRILV1OFFSET_0_MC_MAIN_REG
rir_rnk_tgt0: 0x0 rir_offset0: 0x0
RIRILV2OFFSET_0_MC_MAIN_REG
rir_rnk_tgt0: 0x0 rir_offset0: 0x0
RIRILV3OFFSET_0_MC_MAIN_REG
rir_rnk_tgt0: 0x0 rir_offset0: 0x0
RIRILV4OFFSET_0_MC_MAIN_REG
rir_rnk_tgt0: 0x0 rir_offset0: 0x0
RIRILV5OFFSET_0_MC_MAIN_REG
rir_rnk_tgt0: 0x0 rir_offset0: 0x0
RIRILV6OFFSET_0_MC_MAIN_REG
rir_rnk_tgt0: 0x0 rir_offset0: 0x0
RIRILV7OFFSET_0_MC_MAIN_REG
rir_rnk_tgt0: 0x0 rir_offset0: 0x0
RIRWAYNESSLIMIT_1_MC_MAIN_REG
rir_val: 0 rir_limit: 0x1F rir_way: 0x0
RIRILV0OFFSET_1_MC_MAIN_REG
rir_rnk_tgt0: 0x0 rir_offset0: 0x0
RIRILV1OFFSET_1_MC_MAIN_REG
rir_rnk_tgt0: 0x0 rir_offset0: 0x0
RIRILV2OFFSET_1_MC_MAIN_REG
rir_rnk_tgt0: 0x0 rir_offset0: 0x0
RIRILV3OFFSET_1_MC_MAIN_REG
rir_rnk_tgt0: 0x0 rir_offset0: 0x0
RIRILV4OFFSET_1_MC_MAIN_REG
rir_rnk_tgt0: 0x0 rir_offset0: 0x0
RIRILV5OFFSET_1_MC_MAIN_REG
rir_rnk_tgt0: 0x0 rir_offset0: 0x0
RIRILV6OFFSET_1_MC_MAIN_REG
rir_rnk_tgt0: 0x0 rir_offset0: 0x0
RIRILV7OFFSET_1_MC_MAIN_REG
rir_rnk_tgt0: 0x0 rir_offset0: 0x0
RIRWAYNESSLIMIT_2_MC_MAIN_REG
rir_val: 0 rir_limit: 0x1F rir_way: 0x0
RIRILV0OFFSET_2_MC_MAIN_REG
rir_rnk_tgt0: 0x0 rir_offset0: 0x0
RIRILV1OFFSET_2_MC_MAIN_REG
rir_rnk_tgt0: 0x0 rir_offset0: 0x0
RIRILV2OFFSET_2_MC_MAIN_REG
rir_rnk_tgt0: 0x0 rir_offset0: 0x0
RIRILV3OFFSET_2_MC_MAIN_REG
rir_rnk_tgt0: 0x0 rir_offset0: 0x0
RIRILV4OFFSET_2_MC_MAIN_REG
rir_rnk_tgt0: 0x0 rir_offset0: 0x0
RIRILV5OFFSET_2_MC_MAIN_REG
rir_rnk_tgt0: 0x0 rir_offset0: 0x0
RIRILV6OFFSET_2_MC_MAIN_REG
rir_rnk_tgt0: 0x0 rir_offset0: 0x0
RIRILV7OFFSET_2_MC_MAIN_REG
rir_rnk_tgt0: 0x0 rir_offset0: 0x0
RIRWAYNESSLIMIT_3_MC_MAIN_REG
rir_val: 0 rir_limit: 0x1F rir_way: 0x0
RIRILV0OFFSET_3_MC_MAIN_REG
rir_rnk_tgt0: 0x0 rir_offset0: 0x0
RIRILV1OFFSET_3_MC_MAIN_REG
rir_rnk_tgt0: 0x0 rir_offset0: 0x0
RIRILV2OFFSET_3_MC_MAIN_REG
rir_rnk_tgt0: 0x0 rir_offset0: 0x0
RIRILV3OFFSET_3_MC_MAIN_REG
rir_rnk_tgt0: 0x0 rir_offset0: 0x0
RIRILV4OFFSET_3_MC_MAIN_REG
rir_rnk_tgt0: 0x0 rir_offset0: 0x0
RIRILV5OFFSET_3_MC_MAIN_REG
rir_rnk_tgt0: 0x0 rir_offset0: 0x0
RIRILV6OFFSET_3_MC_MAIN_REG
rir_rnk_tgt0: 0x0 rir_offset0: 0x0
RIRILV7OFFSET_3_MC_MAIN_REG
rir_rnk_tgt0: 0x0 rir_offset0: 0x0
Channel - 4
RIRWAYNESSLIMIT_0_MC_MAIN_REG
rir_val: 1 rir_limit: 0x1F rir_way: 0x0
RIRILV0OFFSET_0_MC_MAIN_REG
rir_rnk_tgt0: 0x0 rir_offset0: 0x0
RIRILV1OFFSET_0_MC_MAIN_REG
rir_rnk_tgt0: 0x0 rir_offset0: 0x0
RIRILV2OFFSET_0_MC_MAIN_REG
rir_rnk_tgt0: 0x0 rir_offset0: 0x0
RIRILV3OFFSET_0_MC_MAIN_REG
rir_rnk_tgt0: 0x0 rir_offset0: 0x0
RIRILV4OFFSET_0_MC_MAIN_REG
rir_rnk_tgt0: 0x0 rir_offset0: 0x0
RIRILV5OFFSET_0_MC_MAIN_REG
rir_rnk_tgt0: 0x0 rir_offset0: 0x0
RIRILV6OFFSET_0_MC_MAIN_REG
rir_rnk_tgt0: 0x0 rir_offset0: 0x0
RIRILV7OFFSET_0_MC_MAIN_REG
rir_rnk_tgt0: 0x0 rir_offset0: 0x0
RIRWAYNESSLIMIT_1_MC_MAIN_REG
rir_val: 0 rir_limit: 0x1F rir_way: 0x0
RIRILV0OFFSET_1_MC_MAIN_REG
rir_rnk_tgt0: 0x0 rir_offset0: 0x0
RIRILV1OFFSET_1_MC_MAIN_REG
rir_rnk_tgt0: 0x0 rir_offset0: 0x0
RIRILV2OFFSET_1_MC_MAIN_REG
rir_rnk_tgt0: 0x0 rir_offset0: 0x0
RIRILV3OFFSET_1_MC_MAIN_REG
rir_rnk_tgt0: 0x0 rir_offset0: 0x0
RIRILV4OFFSET_1_MC_MAIN_REG
rir_rnk_tgt0: 0x0 rir_offset0: 0x0
RIRILV5OFFSET_1_MC_MAIN_REG
rir_rnk_tgt0: 0x0 rir_offset0: 0x0
RIRILV6OFFSET_1_MC_MAIN_REG
rir_rnk_tgt0: 0x0 rir_offset0: 0x0
RIRILV7OFFSET_1_MC_MAIN_REG
rir_rnk_tgt0: 0x0 rir_offset0: 0x0
RIRWAYNESSLIMIT_2_MC_MAIN_REG
rir_val: 0 rir_limit: 0x1F rir_way: 0x0
RIRILV0OFFSET_2_MC_MAIN_REG
rir_rnk_tgt0: 0x0 rir_offset0: 0x0
RIRILV1OFFSET_2_MC_MAIN_REG
rir_rnk_tgt0: 0x0 rir_offset0: 0x0
RIRILV2OFFSET_2_MC_MAIN_REG
rir_rnk_tgt0: 0x0 rir_offset0: 0x0
RIRILV3OFFSET_2_MC_MAIN_REG
rir_rnk_tgt0: 0x0 rir_offset0: 0x0
RIRILV4OFFSET_2_MC_MAIN_REG
rir_rnk_tgt0: 0x0 rir_offset0: 0x0
RIRILV5OFFSET_2_MC_MAIN_REG
rir_rnk_tgt0: 0x0 rir_offset0: 0x0
RIRILV6OFFSET_2_MC_MAIN_REG
rir_rnk_tgt0: 0x0 rir_offset0: 0x0
RIRILV7OFFSET_2_MC_MAIN_REG
rir_rnk_tgt0: 0x0 rir_offset0: 0x0
RIRWAYNESSLIMIT_3_MC_MAIN_REG
rir_val: 0 rir_limit: 0x1F rir_way: 0x0
RIRILV0OFFSET_3_MC_MAIN_REG
rir_rnk_tgt0: 0x0 rir_offset0: 0x0
RIRILV1OFFSET_3_MC_MAIN_REG
rir_rnk_tgt0: 0x0 rir_offset0: 0x0
RIRILV2OFFSET_3_MC_MAIN_REG
rir_rnk_tgt0: 0x0 rir_offset0: 0x0
RIRILV3OFFSET_3_MC_MAIN_REG
rir_rnk_tgt0: 0x0 rir_offset0: 0x0
RIRILV4OFFSET_3_MC_MAIN_REG
rir_rnk_tgt0: 0x0 rir_offset0: 0x0
RIRILV5OFFSET_3_MC_MAIN_REG
rir_rnk_tgt0: 0x0 rir_offset0: 0x0
RIRILV6OFFSET_3_MC_MAIN_REG
rir_rnk_tgt0: 0x0 rir_offset0: 0x0
RIRILV7OFFSET_3_MC_MAIN_REG
rir_rnk_tgt0: 0x0 rir_offset0: 0x0
Channel - 6
RIRWAYNESSLIMIT_0_MC_MAIN_REG
rir_val: 1 rir_limit: 0x1F rir_way: 0x0
RIRILV0OFFSET_0_MC_MAIN_REG
rir_rnk_tgt0: 0x0 rir_offset0: 0x0
RIRILV1OFFSET_0_MC_MAIN_REG
rir_rnk_tgt0: 0x0 rir_offset0: 0x0
RIRILV2OFFSET_0_MC_MAIN_REG
rir_rnk_tgt0: 0x0 rir_offset0: 0x0
RIRILV3OFFSET_0_MC_MAIN_REG
rir_rnk_tgt0: 0x0 rir_offset0: 0x0
RIRILV4OFFSET_0_MC_MAIN_REG
rir_rnk_tgt0: 0x0 rir_offset0: 0x0
RIRILV5OFFSET_0_MC_MAIN_REG
rir_rnk_tgt0: 0x0 rir_offset0: 0x0
RIRILV6OFFSET_0_MC_MAIN_REG
rir_rnk_tgt0: 0x0 rir_offset0: 0x0
RIRILV7OFFSET_0_MC_MAIN_REG
rir_rnk_tgt0: 0x0 rir_offset0: 0x0
RIRWAYNESSLIMIT_1_MC_MAIN_REG
rir_val: 0 rir_limit: 0x1F rir_way: 0x0
RIRILV0OFFSET_1_MC_MAIN_REG
rir_rnk_tgt0: 0x0 rir_offset0: 0x0
RIRILV1OFFSET_1_MC_MAIN_REG
rir_rnk_tgt0: 0x0 rir_offset0: 0x0
RIRILV2OFFSET_1_MC_MAIN_REG
rir_rnk_tgt0: 0x0 rir_offset0: 0x0
RIRILV3OFFSET_1_MC_MAIN_REG
rir_rnk_tgt0: 0x0 rir_offset0: 0x0
RIRILV4OFFSET_1_MC_MAIN_REG
rir_rnk_tgt0: 0x0 rir_offset0: 0x0
RIRILV5OFFSET_1_MC_MAIN_REG
rir_rnk_tgt0: 0x0 rir_offset0: 0x0
RIRILV6OFFSET_1_MC_MAIN_REG
rir_rnk_tgt0: 0x0 rir_offset0: 0x0
RIRILV7OFFSET_1_MC_MAIN_REG
rir_rnk_tgt0: 0x0 rir_offset0: 0x0
RIRWAYNESSLIMIT_2_MC_MAIN_REG
rir_val: 0 rir_limit: 0x1F rir_way: 0x0
RIRILV0OFFSET_2_MC_MAIN_REG
rir_rnk_tgt0: 0x0 rir_offset0: 0x0
RIRILV1OFFSET_2_MC_MAIN_REG
rir_rnk_tgt0: 0x0 rir_offset0: 0x0
RIRILV2OFFSET_2_MC_MAIN_REG
rir_rnk_tgt0: 0x0 rir_offset0: 0x0
RIRILV3OFFSET_2_MC_MAIN_REG
rir_rnk_tgt0: 0x0 rir_offset0: 0x0
RIRILV4OFFSET_2_MC_MAIN_REG
rir_rnk_tgt0: 0x0 rir_offset0: 0x0
RIRILV5OFFSET_2_MC_MAIN_REG
rir_rnk_tgt0: 0x0 rir_offset0: 0x0
RIRILV6OFFSET_2_MC_MAIN_REG
rir_rnk_tgt0: 0x0 rir_offset0: 0x0
RIRILV7OFFSET_2_MC_MAIN_REG
rir_rnk_tgt0: 0x0 rir_offset0: 0x0
RIRWAYNESSLIMIT_3_MC_MAIN_REG
rir_val: 0 rir_limit: 0x1F rir_way: 0x0
RIRILV0OFFSET_3_MC_MAIN_REG
rir_rnk_tgt0: 0x0 rir_offset0: 0x0
RIRILV1OFFSET_3_MC_MAIN_REG
rir_rnk_tgt0: 0x0 rir_offset0: 0x0
RIRILV2OFFSET_3_MC_MAIN_REG
rir_rnk_tgt0: 0x0 rir_offset0: 0x0
RIRILV3OFFSET_3_MC_MAIN_REG
rir_rnk_tgt0: 0x0 rir_offset0: 0x0
RIRILV4OFFSET_3_MC_MAIN_REG
rir_rnk_tgt0: 0x0 rir_offset0: 0x0
RIRILV5OFFSET_3_MC_MAIN_REG
rir_rnk_tgt0: 0x0 rir_offset0: 0x0
RIRILV6OFFSET_3_MC_MAIN_REG
rir_rnk_tgt0: 0x0 rir_offset0: 0x0
RIRILV7OFFSET_3_MC_MAIN_REG
rir_rnk_tgt0: 0x0 rir_offset0: 0x0
^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^
Write CHA CSRs for Socket: 0
^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^
TWO_LM_CONFIG_CHA_PMA_REG
enable: 0x1 mask: 0x3F mask_hi: 0x0
HA_COH_CHABC_SAD1_REG
dis_spec_rd: 0x0
lowMemBase: 0x0
lowMemSize: 0x20
highMemBase: 0x40
highMemSize: 0xFE0
TOLM: 0x1F
TOHM: 0x101F
C00: CSR for wait4bothhalves bit: AMAP_MC_MAIN_REG: 0x49
C00: CSR for wait4bothhalves bit: AMAP_MC_MAIN_REG: 0x49
C00: CSR for wait4bothhalves bit: AMAP_MC_MAIN_REG: 0x49
C00: CSR for wait4bothhalves bit: AMAP_MC_MAIN_REG: 0x49
Checkpoint Code: Socket 0, 0xBB, 0x06, 0x0001
^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^
Write CHA Remote SAD CSRs for Socket: 1
^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^
En Base Limit NodeId Attr
1 0x00000 0x0081F 0x0 0x3
^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^
Write CHA SAD CSRs for Socket: 1
^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^
CHA unlock DRAM cluster 0 snc_lock bits: 0xE
Program Channel Interleaves
rt0_interleave_mode: 7
rt1_interleave_shift: 7
rt2_interleave_shift: 2
Program CSRs for SAD Rule 0 (HBM 2LM DDR)
En Limit Mode Attr NMCacheable
1 0x00A1F 0x1 0x3 1
Interleave List: 0x0000000088888888
Single Target: H0 Index 0
DRAM_RULE_CFG2: cxl_accelerator_mem Durable_mem_en cxl_mem_expander NXM
0 0 0 0
TgtRt: 00 ChnRt: 00
Program target config: 00000000
Program channel config: 00000000
Program Mode config.
H0 DramRt0Mode0Cfg: 00000006
H0 DramRt0Mode1Cfg: 00000000
H1 DramRt0Mode0Cfg: 00000000
H1 DramRt0Mode1Cfg: 00000000
H0 DramRt1Mode0Cfg: 00000000
H0 DramRt1Mode1Cfg: 00000000
H1 DramRt1Mode0Cfg: 00000000
H1 DramRt1Mode1Cfg: 00000000
H0 DramRt2Mode0Cfg: 00000000
H0 DramRt2Mode1Cfg: 00000000
H1 DramRt2Mode0Cfg: 00000000
H1 DramRt2Mode1Cfg: 00000000
CHA unlock DRAM cluster 1 snc_lock bits: 0xD
Program Channel Interleaves
rt0_interleave_mode: 7
rt1_interleave_shift: 7
rt2_interleave_shift: 2
Program CSRs for SAD Rule 0 (HBM 2LM DDR)
En Limit Mode Attr NMCacheable
1 0x00C1F 0x1 0x3 1
Interleave List: 0x0000000088888888
Single Target: H0 Index 0
DRAM_RULE_CFG2: cxl_accelerator_mem Durable_mem_en cxl_mem_expander NXM
0 0 0 0
TgtRt: 00 ChnRt: 00
Program target config: 00000000
Program channel config: 00000000
Program Mode config.
H0 DramRt0Mode0Cfg: 00000006
H0 DramRt0Mode1Cfg: 00000000
H1 DramRt0Mode0Cfg: 00000000
H1 DramRt0Mode1Cfg: 00000000
H0 DramRt1Mode0Cfg: 00000000
H0 DramRt1Mode1Cfg: 00000000
H1 DramRt1Mode0Cfg: 00000000
H1 DramRt1Mode1Cfg: 00000000
H0 DramRt2Mode0Cfg: 00000000
H0 DramRt2Mode1Cfg: 00000000
H1 DramRt2Mode0Cfg: 00000000
H1 DramRt2Mode1Cfg: 00000000
CHA unlock DRAM cluster 2 snc_lock bits: 0xB
Program Channel Interleaves
rt0_interleave_mode: 7
rt1_interleave_shift: 7
rt2_interleave_shift: 2
Program CSRs for SAD Rule 0 (HBM 2LM DDR)
En Limit Mode Attr NMCacheable
1 0x00E1F 0x1 0x3 1
Interleave List: 0x0000000088888888
Single Target: H0 Index 0
DRAM_RULE_CFG2: cxl_accelerator_mem Durable_mem_en cxl_mem_expander NXM
0 0 0 0
TgtRt: 00 ChnRt: 00
Program target config: 00000000
Program channel config: 00000000
Program Mode config.
H0 DramRt0Mode0Cfg: 00000006
H0 DramRt0Mode1Cfg: 00000000
H1 DramRt0Mode0Cfg: 00000000
H1 DramRt0Mode1Cfg: 00000000
H0 DramRt1Mode0Cfg: 00000000
H0 DramRt1Mode1Cfg: 00000000
H1 DramRt1Mode0Cfg: 00000000
H1 DramRt1Mode1Cfg: 00000000
H0 DramRt2Mode0Cfg: 00000000
H0 DramRt2Mode1Cfg: 00000000
H1 DramRt2Mode0Cfg: 00000000
H1 DramRt2Mode1Cfg: 00000000
CHA unlock DRAM cluster 3 snc_lock bits: 0x7
Program Channel Interleaves
rt0_interleave_mode: 7
rt1_interleave_shift: 7
rt2_interleave_shift: 2
Program CSRs for SAD Rule 0 (HBM 2LM DDR)
En Limit Mode Attr NMCacheable
1 0x0101F 0x1 0x3 1
Interleave List: 0x0000000088888888
Single Target: H0 Index 0
DRAM_RULE_CFG2: cxl_accelerator_mem Durable_mem_en cxl_mem_expander NXM
0 0 0 0
TgtRt: 00 ChnRt: 00
Program target config: 00000000
Program channel config: 00000000
Program Mode config.
H0 DramRt0Mode0Cfg: 00000006
H0 DramRt0Mode1Cfg: 00000000
H1 DramRt0Mode0Cfg: 00000000
H1 DramRt0Mode1Cfg: 00000000
H0 DramRt1Mode0Cfg: 00000000
H0 DramRt1Mode1Cfg: 00000000
H1 DramRt1Mode0Cfg: 00000000
H1 DramRt1Mode1Cfg: 00000000
H0 DramRt2Mode0Cfg: 00000000
H0 DramRt2Mode1Cfg: 00000000
H1 DramRt2Mode0Cfg: 00000000
H1 DramRt2Mode1Cfg: 00000000
CHA lock all DRAM clusters snc_lock bits: 0xF
^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^
Write Route Table CSRs for Socket: 1
^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^
CSR: Cluster 0 H0_CH_ROUTE_TABLE_0 - 0x0 0x1 0x0 0x1 0x0 0x1 0x0 0x1
CSR: Cluster 0 H0_TGT_ROUTE_TABLE_0 - 0x4 0x4 0x5 0x5 0x6 0x6 0x7 0x7
CSR: Cluster 0 H1_CH_ROUTE_TABLE_0 - 0x0 0x0 0x0 0x0 0x0 0x0 0x0 0x0
CSR: Cluster 0 H1_TGT_ROUTE_TABLE_0 - 0x0 0x0 0x0 0x0 0x0 0x0 0x0 0x0
CSR: Cluster 1 H0_CH_ROUTE_TABLE_0 - 0x0 0x1 0x0 0x1 0x0 0x1 0x0 0x1
CSR: Cluster 1 H0_TGT_ROUTE_TABLE_0 - 0x4 0x4 0x5 0x5 0x6 0x6 0x7 0x7
CSR: Cluster 1 H1_CH_ROUTE_TABLE_0 - 0x0 0x0 0x0 0x0 0x0 0x0 0x0 0x0
CSR: Cluster 1 H1_TGT_ROUTE_TABLE_0 - 0x0 0x0 0x0 0x0 0x0 0x0 0x0 0x0
CSR: Cluster 2 H0_CH_ROUTE_TABLE_0 - 0x0 0x1 0x0 0x1 0x0 0x1 0x0 0x1
CSR: Cluster 2 H0_TGT_ROUTE_TABLE_0 - 0x7 0x7 0x6 0x6 0x5 0x5 0x4 0x4
CSR: Cluster 2 H1_CH_ROUTE_TABLE_0 - 0x0 0x0 0x0 0x0 0x0 0x0 0x0 0x0
CSR: Cluster 2 H1_TGT_ROUTE_TABLE_0 - 0x0 0x0 0x0 0x0 0x0 0x0 0x0 0x0
CSR: Cluster 3 H0_CH_ROUTE_TABLE_0 - 0x0 0x1 0x0 0x1 0x0 0x1 0x0 0x1
CSR: Cluster 3 H0_TGT_ROUTE_TABLE_0 - 0x7 0x7 0x6 0x6 0x5 0x5 0x4 0x4
CSR: Cluster 3 H1_CH_ROUTE_TABLE_0 - 0x0 0x0 0x0 0x0 0x0 0x0 0x0 0x0
CSR: Cluster 3 H1_TGT_ROUTE_TABLE_0 - 0x0 0x0 0x0 0x0 0x0 0x0 0x0 0x0
^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^
Write MESH2MEM CSRs for Socket: 1
^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^
Memory Controller : 0
------------------------
DEFEATURES0_M2MEM_MAIN_REG
wrcmpfromnm: 1
MODE_M2MEM_MAIN_REG
nmcaching:0x1 pmem:0x0 blockregion:0x0 in-tile caching: 0x1
Memory Controller : 1
------------------------
DEFEATURES0_M2MEM_MAIN_REG
wrcmpfromnm: 1
MODE_M2MEM_MAIN_REG
nmcaching:0x1 pmem:0x0 blockregion:0x0 in-tile caching: 0x1
Memory Controller : 2
------------------------
DEFEATURES0_M2MEM_MAIN_REG
wrcmpfromnm: 1
MODE_M2MEM_MAIN_REG
nmcaching:0x1 pmem:0x0 blockregion:0x0 in-tile caching: 0x1
Memory Controller : 3
------------------------
DEFEATURES0_M2MEM_MAIN_REG
wrcmpfromnm: 1
MODE_M2MEM_MAIN_REG
nmcaching:0x1 pmem:0x0 blockregion:0x0 in-tile caching: 0x1
MC: 0
tadid:0x0 tadvld:0x1 pmemvld:0x0 blkvld:0x0 ddr4tadid:0x0 ddrttadid:0x0 ddr4:0x1 nmcacheablevld:0x0 mirror:0x0 secondary1st:0x0 frcnpwr:0x0 spare:0x0 addresslimit[51:26]:0xA1F nonpersistentfm:0x1
MC: 1
tadid:0x0 tadvld:0x1 pmemvld:0x0 blkvld:0x0 ddr4tadid:0x0 ddrttadid:0x0 ddr4:0x1 nmcacheablevld:0x0 mirror:0x0 secondary1st:0x0 frcnpwr:0x0 spare:0x0 addresslimit[51:26]:0xC1F nonpersistentfm:0x1
MC: 2
tadid:0x0 tadvld:0x1 pmemvld:0x0 blkvld:0x0 ddr4tadid:0x0 ddrttadid:0x0 ddr4:0x1 nmcacheablevld:0x0 mirror:0x0 secondary1st:0x0 frcnpwr:0x0 spare:0x0 addresslimit[51:26]:0xE1F nonpersistentfm:0x1
MC: 3
tadid:0x0 tadvld:0x1 pmemvld:0x0 blkvld:0x0 ddr4tadid:0x0 ddrttadid:0x0 ddr4:0x1 nmcacheablevld:0x0 mirror:0x0 secondary1st:0x0 frcnpwr:0x0 spare:0x0 addresslimit[51:26]:0x101F nonpersistentfm:0x1
Programs feature registers for MC 0
Programs feature registers for MC 1
Programs feature registers for MC 2
Programs feature registers for MC 3
^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^
Write HBM MESH2MEM CSRs for Socket: 1
^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^
HBM Stack: 0
Mesh2Mem misc: nmcaching: 1 wrcmpfromnm: 1
Mesh2Mem TAD: tadid:0x0 ddrtadid:0x0 nmcacheablevld:0x1 addresslimit[51:26]:0xA1F
HBM Stack: 1
Mesh2Mem misc: nmcaching: 1 wrcmpfromnm: 1
Mesh2Mem TAD: tadid:0x0 ddrtadid:0x0 nmcacheablevld:0x1 addresslimit[51:26]:0xC1F
HBM Stack: 2
Mesh2Mem misc: nmcaching: 1 wrcmpfromnm: 1
Mesh2Mem TAD: tadid:0x0 ddrtadid:0x0 nmcacheablevld:0x1 addresslimit[51:26]:0xE1F
HBM Stack: 3
Mesh2Mem misc: nmcaching: 1 wrcmpfromnm: 1
Mesh2Mem TAD: tadid:0x0 ddrtadid:0x0 nmcacheablevld:0x1 addresslimit[51:26]:0x101F
Programs feature registers for MC 0
N1.C00: CSR : SYSFEATURES0_MC_2LM_REG: 0x10
N1.C01: CSR : SYSFEATURES0_MC_2LM_REG: 0x10
Programs feature registers for MC 1
N1.C00: CSR : SYSFEATURES0_MC_2LM_REG: 0x10
N1.C01: CSR : SYSFEATURES0_MC_2LM_REG: 0x10
Programs feature registers for MC 2
N1.C00: CSR : SYSFEATURES0_MC_2LM_REG: 0x10
N1.C01: CSR : SYSFEATURES0_MC_2LM_REG: 0x10
Programs feature registers for MC 3
N1.C00: CSR : SYSFEATURES0_MC_2LM_REG: 0x10
N1.C01: CSR : SYSFEATURES0_MC_2LM_REG: 0x10
Programs feature registers for MC 4
N1.C00: CSR : SYSFEATURES0_MC_2LM_REG: 0x10
N1.C01: CSR : SYSFEATURES0_MC_2LM_REG: 0x10
Programs feature registers for MC 5
N1.C00: CSR : SYSFEATURES0_MC_2LM_REG: 0x10
N1.C01: CSR : SYSFEATURES0_MC_2LM_REG: 0x10
Programs feature registers for MC 6
N1.C00: CSR : SYSFEATURES0_MC_2LM_REG: 0x10
N1.C01: CSR : SYSFEATURES0_MC_2LM_REG: 0x10
Programs feature registers for MC 7
N1.C00: CSR : SYSFEATURES0_MC_2LM_REG: 0x10
N1.C01: CSR : SYSFEATURES0_MC_2LM_REG: 0x10
Programs feature registers for MC 8
N1.C00: CSR : SYSFEATURES0_MC_2LM_REG: 0x10
N1.C01: CSR : SYSFEATURES0_MC_2LM_REG: 0x10
Programs feature registers for MC 9
N1.C00: CSR : SYSFEATURES0_MC_2LM_REG: 0x10
N1.C01: CSR : SYSFEATURES0_MC_2LM_REG: 0x10
Programs feature registers for MC 10
N1.C00: CSR : SYSFEATURES0_MC_2LM_REG: 0x10
N1.C01: CSR : SYSFEATURES0_MC_2LM_REG: 0x10
Programs feature registers for MC 11
N1.C00: CSR : SYSFEATURES0_MC_2LM_REG: 0x10
N1.C01: CSR : SYSFEATURES0_MC_2LM_REG: 0x10
Programs feature registers for MC 12
N1.C00: CSR : SYSFEATURES0_MC_2LM_REG: 0x10
N1.C01: CSR : SYSFEATURES0_MC_2LM_REG: 0x10
Programs feature registers for MC 13
N1.C00: CSR : SYSFEATURES0_MC_2LM_REG: 0x10
N1.C01: CSR : SYSFEATURES0_MC_2LM_REG: 0x10
Programs feature registers for MC 14
N1.C00: CSR : SYSFEATURES0_MC_2LM_REG: 0x10
N1.C01: CSR : SYSFEATURES0_MC_2LM_REG: 0x10
Programs feature registers for MC 15
N1.C00: CSR : SYSFEATURES0_MC_2LM_REG: 0x10
N1.C01: CSR : SYSFEATURES0_MC_2LM_REG: 0x10
Checkpoint Code: Socket 0, 0xBB, 0x07, 0x0001
^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^
Write TAD CSRs for Socket: 1
^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^
Write Patrol and Sparing CSR's for MC 0
C00: TADWAYNESS[0]:
target_lid: 0 chn_lid: 0 tad_limit: 0xA1F
C00: TADBASE[0]:
mirror_en: 0 en_failover: 0 ign_ptrl_uc: 0 base: 0x820
NM_DRAM_RULE[0]:
rule_enable: 1 limit: 0xA1F nm_chn_ways: 0 nm_chn_gran: 1 nm_target_ways: 0 nm_gran_eq: 0 nm_chn_l2pid: 0x00FFFFF8
Logical Ch Id: 0 1 2 3 4 5 6 7
Physical Ch Id: 0 7 7 7 7 7 7 7
C00: NM_DRAM_RULE[0]:
Write 1LM Decoder CSR's for MC 0
C00: TADCHNILVOFFSET[0]:
target_ways: 0 chn_ways: 0 target_gran: 1 chn_gran: 1 tad_offset: 0x820 tad_offset_sign: 0
C00: MCNMCACHINGCFG:
mcnmcachingenb: 0 mcpmemenb: 0 mcnmcachingpmemwt: 0
C01: MCNMCACHINGCFG:
mcnmcachingenb: 0 mcpmemenb: 0 mcnmcachingpmemwt: 0
Write Patrol and Sparing CSR's for MC 1
C00: TADWAYNESS[0]:
target_lid: 0 chn_lid: 0 tad_limit: 0xC1F
C00: TADBASE[0]:
mirror_en: 0 en_failover: 0 ign_ptrl_uc: 0 base: 0xA20
NM_DRAM_RULE[0]:
rule_enable: 1 limit: 0xC1F nm_chn_ways: 0 nm_chn_gran: 1 nm_target_ways: 0 nm_gran_eq: 0 nm_chn_l2pid: 0x00FFFFF8
Logical Ch Id: 0 1 2 3 4 5 6 7
Physical Ch Id: 0 7 7 7 7 7 7 7
C00: NM_DRAM_RULE[0]:
Write 1LM Decoder CSR's for MC 1
C00: TADCHNILVOFFSET[0]:
target_ways: 0 chn_ways: 0 target_gran: 1 chn_gran: 1 tad_offset: 0xA20 tad_offset_sign: 0
C00: MCNMCACHINGCFG:
mcnmcachingenb: 0 mcpmemenb: 0 mcnmcachingpmemwt: 0
C01: MCNMCACHINGCFG:
mcnmcachingenb: 0 mcpmemenb: 0 mcnmcachingpmemwt: 0
Write Patrol and Sparing CSR's for MC 2
C00: TADWAYNESS[0]:
target_lid: 0 chn_lid: 0 tad_limit: 0xE1F
C00: TADBASE[0]:
mirror_en: 0 en_failover: 0 ign_ptrl_uc: 0 base: 0xC20
NM_DRAM_RULE[0]:
rule_enable: 1 limit: 0xE1F nm_chn_ways: 0 nm_chn_gran: 1 nm_target_ways: 0 nm_gran_eq: 0 nm_chn_l2pid: 0x00FFFFF8
Logical Ch Id: 0 1 2 3 4 5 6 7
Physical Ch Id: 0 7 7 7 7 7 7 7
C00: NM_DRAM_RULE[0]:
Write 1LM Decoder CSR's for MC 2
C00: TADCHNILVOFFSET[0]:
target_ways: 0 chn_ways: 0 target_gran: 1 chn_gran: 1 tad_offset: 0xC20 tad_offset_sign: 0
C00: MCNMCACHINGCFG:
mcnmcachingenb: 0 mcpmemenb: 0 mcnmcachingpmemwt: 0
C01: MCNMCACHINGCFG:
mcnmcachingenb: 0 mcpmemenb: 0 mcnmcachingpmemwt: 0
Write Patrol and Sparing CSR's for MC 3
C00: TADWAYNESS[0]:
target_lid: 0 chn_lid: 0 tad_limit: 0x101F
C00: TADBASE[0]:
mirror_en: 0 en_failover: 0 ign_ptrl_uc: 0 base: 0xE20
NM_DRAM_RULE[0]:
rule_enable: 1 limit: 0x101F nm_chn_ways: 0 nm_chn_gran: 1 nm_target_ways: 0 nm_gran_eq: 0 nm_chn_l2pid: 0x00FFFFF8
Logical Ch Id: 0 1 2 3 4 5 6 7
Physical Ch Id: 0 7 7 7 7 7 7 7
C00: NM_DRAM_RULE[0]:
Write 1LM Decoder CSR's for MC 3
C00: TADCHNILVOFFSET[0]:
target_ways: 0 chn_ways: 0 target_gran: 1 chn_gran: 1 tad_offset: 0xE20 tad_offset_sign: 0
C00: MCNMCACHINGCFG:
mcnmcachingenb: 0 mcpmemenb: 0 mcnmcachingpmemwt: 0
C01: MCNMCACHINGCFG:
mcnmcachingenb: 0 mcpmemenb: 0 mcnmcachingpmemwt: 0
Write Patrol and Sparing TAD range CSR's for HBM Stack 0 MC 0
C00: TADWAYNESS[0]:
target_lid: 0 chn_lid: 0 tad_limit: 0x1F
C00: TADBASE[0]:
mirror_en: 0 en_failover: 0 ign_ptrl_uc: 0 base: 0x0
C01: TADWAYNESS[0]:
target_lid: 0 chn_lid: 1 tad_limit: 0x1F
C01: TADBASE[0]:
mirror_en: 0 en_failover: 0 ign_ptrl_uc: 0 base: 0x0
Write Patrol and Sparing TAD range CSR's for HBM Stack 0 MC 1
C00: TADWAYNESS[0]:
target_lid: 0 chn_lid: 2 tad_limit: 0x1F
C00: TADBASE[0]:
mirror_en: 0 en_failover: 0 ign_ptrl_uc: 0 base: 0x0
C01: TADWAYNESS[0]:
target_lid: 0 chn_lid: 3 tad_limit: 0x1F
C01: TADBASE[0]:
mirror_en: 0 en_failover: 0 ign_ptrl_uc: 0 base: 0x0
Write Patrol and Sparing TAD range CSR's for HBM Stack 0 MC 2
C00: TADWAYNESS[0]:
target_lid: 0 chn_lid: 4 tad_limit: 0x1F
C00: TADBASE[0]:
mirror_en: 0 en_failover: 0 ign_ptrl_uc: 0 base: 0x0
C01: TADWAYNESS[0]:
target_lid: 0 chn_lid: 5 tad_limit: 0x1F
C01: TADBASE[0]:
mirror_en: 0 en_failover: 0 ign_ptrl_uc: 0 base: 0x0
Write Patrol and Sparing TAD range CSR's for HBM Stack 0 MC 3
C00: TADWAYNESS[0]:
target_lid: 0 chn_lid: 6 tad_limit: 0x1F
C00: TADBASE[0]:
mirror_en: 0 en_failover: 0 ign_ptrl_uc: 0 base: 0x0
C01: TADWAYNESS[0]:
target_lid: 0 chn_lid: 7 tad_limit: 0x1F
C01: TADBASE[0]:
mirror_en: 0 en_failover: 0 ign_ptrl_uc: 0 base: 0x0
Write Hbm Nm Caching Tad CSR's for HBM Stack 0 MC 0
C00: MCNMCACHINGCFG 2LM TAD:
nmcachingtaden: 1 nmcachingtad: 0
C01: MCNMCACHINGCFG 2LM TAD:
nmcachingtaden: 1 nmcachingtad: 0
Write Hbm Nm Caching Tad CSR's for HBM Stack 0 MC 1
C00: MCNMCACHINGCFG 2LM TAD:
nmcachingtaden: 1 nmcachingtad: 0
C01: MCNMCACHINGCFG 2LM TAD:
nmcachingtaden: 1 nmcachingtad: 0
Write Hbm Nm Caching Tad CSR's for HBM Stack 0 MC 2
C00: MCNMCACHINGCFG 2LM TAD:
nmcachingtaden: 1 nmcachingtad: 0
C01: MCNMCACHINGCFG 2LM TAD:
nmcachingtaden: 1 nmcachingtad: 0
Write Hbm Nm Caching Tad CSR's for HBM Stack 0 MC 3
C00: MCNMCACHINGCFG 2LM TAD:
nmcachingtaden: 1 nmcachingtad: 0
C01: MCNMCACHINGCFG 2LM TAD:
nmcachingtaden: 1 nmcachingtad: 0
Write 1LM Decoder CSR's for HBM Stack 0 MC 0
C00: TADCHNILVOFFSET[0]:
target_ways: 0 chn_ways: 0 target_gran: 1 chn_gran: 1 tad_offset: 0x0 tad_offset_sign: 0
C01: TADCHNILVOFFSET[0]:
target_ways: 0 chn_ways: 0 target_gran: 1 chn_gran: 1 tad_offset: 0x0 tad_offset_sign: 0
Write 1LM Decoder CSR's for HBM Stack 0 MC 1
C00: TADCHNILVOFFSET[0]:
target_ways: 0 chn_ways: 0 target_gran: 1 chn_gran: 1 tad_offset: 0x0 tad_offset_sign: 0
C01: TADCHNILVOFFSET[0]:
target_ways: 0 chn_ways: 0 target_gran: 1 chn_gran: 1 tad_offset: 0x0 tad_offset_sign: 0
Write 1LM Decoder CSR's for HBM Stack 0 MC 2
C00: TADCHNILVOFFSET[0]:
target_ways: 0 chn_ways: 0 target_gran: 1 chn_gran: 1 tad_offset: 0x0 tad_offset_sign: 0
C01: TADCHNILVOFFSET[0]:
target_ways: 0 chn_ways: 0 target_gran: 1 chn_gran: 1 tad_offset: 0x0 tad_offset_sign: 0
Write 1LM Decoder CSR's for HBM Stack 0 MC 3
C00: TADCHNILVOFFSET[0]:
target_ways: 0 chn_ways: 0 target_gran: 1 chn_gran: 1 tad_offset: 0x0 tad_offset_sign: 0
C01: TADCHNILVOFFSET[0]:
target_ways: 0 chn_ways: 0 target_gran: 1 chn_gran: 1 tad_offset: 0x0 tad_offset_sign: 0
Write MCNMCACHINGCFG for HBM Stack 0 MC 0
C00: MCNMCACHINGCFG:
mcnmcachingenb: 1 mcpmemenb: 0 mcnmcachingpmemwt: 0
C01: MCNMCACHINGCFG:
mcnmcachingenb: 1 mcpmemenb: 0 mcnmcachingpmemwt: 0
Write MCNMCACHINGCFG for HBM Stack 0 MC 1
C00: MCNMCACHINGCFG:
mcnmcachingenb: 1 mcpmemenb: 0 mcnmcachingpmemwt: 0
C01: MCNMCACHINGCFG:
mcnmcachingenb: 1 mcpmemenb: 0 mcnmcachingpmemwt: 0
Write MCNMCACHINGCFG for HBM Stack 0 MC 2
C00: MCNMCACHINGCFG:
mcnmcachingenb: 1 mcpmemenb: 0 mcnmcachingpmemwt: 0
C01: MCNMCACHINGCFG:
mcnmcachingenb: 1 mcpmemenb: 0 mcnmcachingpmemwt: 0
Write MCNMCACHINGCFG for HBM Stack 0 MC 3
C00: MCNMCACHINGCFG:
mcnmcachingenb: 1 mcpmemenb: 0 mcnmcachingpmemwt: 0
C01: MCNMCACHINGCFG:
mcnmcachingenb: 1 mcpmemenb: 0 mcnmcachingpmemwt: 0
Write 2LM NM Decoder CSR's for HBM Stack 0 MC 0
C00: CSR for force_lat bit : AMAP_MC_MAIN_REG: 0x52
C00: MCNMCACHINGINTLV:
nm_target_ways: 0 nm_chn_ways: 3 nm_target_lid: 0 nm_target_gran: 1 nm_chn_gran: 1 nm_chn_lid: 0
C00: MCNMCACHINGCFG_MC_2LM_REG:
en_2way: 0 prefer_way_sel: 0 chn_cap: 0xB nm_ratio_chn_cap: 0
C00: MCNMCACHINGOFFSET:
mcnmcachingoffsetlower: 0x2 mcnmcachingoffset: 0x4 mcnmcachingoffseten: 1
C01: CSR for force_lat bit : AMAP_MC_MAIN_REG: 0x52
C01: MCNMCACHINGINTLV:
nm_target_ways: 0 nm_chn_ways: 3 nm_target_lid: 0 nm_target_gran: 1 nm_chn_gran: 1 nm_chn_lid: 1
C01: MCNMCACHINGCFG_MC_2LM_REG:
en_2way: 0 prefer_way_sel: 0 chn_cap: 0xB nm_ratio_chn_cap: 0
C01: MCNMCACHINGOFFSET:
mcnmcachingoffsetlower: 0x2 mcnmcachingoffset: 0x4 mcnmcachingoffseten: 1
Write 2LM NM Decoder CSR's for HBM Stack 0 MC 1
C00: CSR for force_lat bit : AMAP_MC_MAIN_REG: 0x52
C00: MCNMCACHINGINTLV:
nm_target_ways: 0 nm_chn_ways: 3 nm_target_lid: 0 nm_target_gran: 1 nm_chn_gran: 1 nm_chn_lid: 2
C00: MCNMCACHINGCFG_MC_2LM_REG:
en_2way: 0 prefer_way_sel: 0 chn_cap: 0xB nm_ratio_chn_cap: 0
C00: MCNMCACHINGOFFSET:
mcnmcachingoffsetlower: 0x2 mcnmcachingoffset: 0x4 mcnmcachingoffseten: 1
C01: CSR for force_lat bit : AMAP_MC_MAIN_REG: 0x52
C01: MCNMCACHINGINTLV:
nm_target_ways: 0 nm_chn_ways: 3 nm_target_lid: 0 nm_target_gran: 1 nm_chn_gran: 1 nm_chn_lid: 3
C01: MCNMCACHINGCFG_MC_2LM_REG:
en_2way: 0 prefer_way_sel: 0 chn_cap: 0xB nm_ratio_chn_cap: 0
C01: MCNMCACHINGOFFSET:
mcnmcachingoffsetlower: 0x2 mcnmcachingoffset: 0x4 mcnmcachingoffseten: 1
Write 2LM NM Decoder CSR's for HBM Stack 0 MC 2
C00: CSR for force_lat bit : AMAP_MC_MAIN_REG: 0x52
C00: MCNMCACHINGINTLV:
nm_target_ways: 0 nm_chn_ways: 3 nm_target_lid: 0 nm_target_gran: 1 nm_chn_gran: 1 nm_chn_lid: 4
C00: MCNMCACHINGCFG_MC_2LM_REG:
en_2way: 0 prefer_way_sel: 0 chn_cap: 0xB nm_ratio_chn_cap: 0
C00: MCNMCACHINGOFFSET:
mcnmcachingoffsetlower: 0x2 mcnmcachingoffset: 0x4 mcnmcachingoffseten: 1
C01: CSR for force_lat bit : AMAP_MC_MAIN_REG: 0x52
C01: MCNMCACHINGINTLV:
nm_target_ways: 0 nm_chn_ways: 3 nm_target_lid: 0 nm_target_gran: 1 nm_chn_gran: 1 nm_chn_lid: 5
C01: MCNMCACHINGCFG_MC_2LM_REG:
en_2way: 0 prefer_way_sel: 0 chn_cap: 0xB nm_ratio_chn_cap: 0
C01: MCNMCACHINGOFFSET:
mcnmcachingoffsetlower: 0x2 mcnmcachingoffset: 0x4 mcnmcachingoffseten: 1
Write 2LM NM Decoder CSR's for HBM Stack 0 MC 3
C00: CSR for force_lat bit : AMAP_MC_MAIN_REG: 0x52
C00: MCNMCACHINGINTLV:
nm_target_ways: 0 nm_chn_ways: 3 nm_target_lid: 0 nm_target_gran: 1 nm_chn_gran: 1 nm_chn_lid: 6
C00: MCNMCACHINGCFG_MC_2LM_REG:
en_2way: 0 prefer_way_sel: 0 chn_cap: 0xB nm_ratio_chn_cap: 0
C00: MCNMCACHINGOFFSET:
mcnmcachingoffsetlower: 0x2 mcnmcachingoffset: 0x4 mcnmcachingoffseten: 1
C01: CSR for force_lat bit : AMAP_MC_MAIN_REG: 0x52
C01: MCNMCACHINGINTLV:
nm_target_ways: 0 nm_chn_ways: 3 nm_target_lid: 0 nm_target_gran: 1 nm_chn_gran: 1 nm_chn_lid: 7
C01: MCNMCACHINGCFG_MC_2LM_REG:
en_2way: 0 prefer_way_sel: 0 chn_cap: 0xB nm_ratio_chn_cap: 0
C01: MCNMCACHINGOFFSET:
mcnmcachingoffsetlower: 0x2 mcnmcachingoffset: 0x4 mcnmcachingoffseten: 1
Write 2LM FM Decoder CSR's for HBM Stack 0 MC 0 TAD 0
C00: DRAM_RULE[0]:
rule_enable: 1 limit: 0xA1F fm_target: 0 fm_chn_ways: 0 fm_chn_gran: 1 fm_target_ways: 0 fm_gran_eq: 0 fm_chn_l2pid: 0x00000000
C01: DRAM_RULE[0]:
rule_enable: 1 limit: 0xA1F fm_target: 0 fm_chn_ways: 0 fm_chn_gran: 1 fm_target_ways: 0 fm_gran_eq: 0 fm_chn_l2pid: 0x00000000
Write 2LM FM Decoder CSR's for HBM Stack 0 MC 1 TAD 0
C00: DRAM_RULE[0]:
rule_enable: 1 limit: 0xA1F fm_target: 0 fm_chn_ways: 0 fm_chn_gran: 1 fm_target_ways: 0 fm_gran_eq: 0 fm_chn_l2pid: 0x00000000
C01: DRAM_RULE[0]:
rule_enable: 1 limit: 0xA1F fm_target: 0 fm_chn_ways: 0 fm_chn_gran: 1 fm_target_ways: 0 fm_gran_eq: 0 fm_chn_l2pid: 0x00000000
Write 2LM FM Decoder CSR's for HBM Stack 0 MC 2 TAD 0
C00: DRAM_RULE[0]:
rule_enable: 1 limit: 0xA1F fm_target: 0 fm_chn_ways: 0 fm_chn_gran: 1 fm_target_ways: 0 fm_gran_eq: 0 fm_chn_l2pid: 0x00000000
C01: DRAM_RULE[0]:
rule_enable: 1 limit: 0xA1F fm_target: 0 fm_chn_ways: 0 fm_chn_gran: 1 fm_target_ways: 0 fm_gran_eq: 0 fm_chn_l2pid: 0x00000000
Write 2LM FM Decoder CSR's for HBM Stack 0 MC 3 TAD 0
C00: DRAM_RULE[0]:
rule_enable: 1 limit: 0xA1F fm_target: 0 fm_chn_ways: 0 fm_chn_gran: 1 fm_target_ways: 0 fm_gran_eq: 0 fm_chn_l2pid: 0x00000000
C01: DRAM_RULE[0]:
rule_enable: 1 limit: 0xA1F fm_target: 0 fm_chn_ways: 0 fm_chn_gran: 1 fm_target_ways: 0 fm_gran_eq: 0 fm_chn_l2pid: 0x00000000
Write Patrol and Sparing TAD range CSR's for HBM Stack 1 MC 0
C00: TADWAYNESS[0]:
target_lid: 0 chn_lid: 0 tad_limit: 0x1F
C00: TADBASE[0]:
mirror_en: 0 en_failover: 0 ign_ptrl_uc: 0 base: 0x0
C01: TADWAYNESS[0]:
target_lid: 0 chn_lid: 1 tad_limit: 0x1F
C01: TADBASE[0]:
mirror_en: 0 en_failover: 0 ign_ptrl_uc: 0 base: 0x0
Write Patrol and Sparing TAD range CSR's for HBM Stack 1 MC 1
C00: TADWAYNESS[0]:
target_lid: 0 chn_lid: 2 tad_limit: 0x1F
C00: TADBASE[0]:
mirror_en: 0 en_failover: 0 ign_ptrl_uc: 0 base: 0x0
C01: TADWAYNESS[0]:
target_lid: 0 chn_lid: 3 tad_limit: 0x1F
C01: TADBASE[0]:
mirror_en: 0 en_failover: 0 ign_ptrl_uc: 0 base: 0x0
Write Patrol and Sparing TAD range CSR's for HBM Stack 1 MC 2
C00: TADWAYNESS[0]:
target_lid: 0 chn_lid: 4 tad_limit: 0x1F
C00: TADBASE[0]:
mirror_en: 0 en_failover: 0 ign_ptrl_uc: 0 base: 0x0
C01: TADWAYNESS[0]:
target_lid: 0 chn_lid: 5 tad_limit: 0x1F
C01: TADBASE[0]:
mirror_en: 0 en_failover: 0 ign_ptrl_uc: 0 base: 0x0
Write Patrol and Sparing TAD range CSR's for HBM Stack 1 MC 3
C00: TADWAYNESS[0]:
target_lid: 0 chn_lid: 6 tad_limit: 0x1F
C00: TADBASE[0]:
mirror_en: 0 en_failover: 0 ign_ptrl_uc: 0 base: 0x0
C01: TADWAYNESS[0]:
target_lid: 0 chn_lid: 7 tad_limit: 0x1F
C01: TADBASE[0]:
mirror_en: 0 en_failover: 0 ign_ptrl_uc: 0 base: 0x0
Write Hbm Nm Caching Tad CSR's for HBM Stack 1 MC 0
C00: MCNMCACHINGCFG 2LM TAD:
nmcachingtaden: 1 nmcachingtad: 0
C01: MCNMCACHINGCFG 2LM TAD:
nmcachingtaden: 1 nmcachingtad: 0
Write Hbm Nm Caching Tad CSR's for HBM Stack 1 MC 1
C00: MCNMCACHINGCFG 2LM TAD:
nmcachingtaden: 1 nmcachingtad: 0
C01: MCNMCACHINGCFG 2LM TAD:
nmcachingtaden: 1 nmcachingtad: 0
Write Hbm Nm Caching Tad CSR's for HBM Stack 1 MC 2
C00: MCNMCACHINGCFG 2LM TAD:
nmcachingtaden: 1 nmcachingtad: 0
C01: MCNMCACHINGCFG 2LM TAD:
nmcachingtaden: 1 nmcachingtad: 0
Write Hbm Nm Caching Tad CSR's for HBM Stack 1 MC 3
C00: MCNMCACHINGCFG 2LM TAD:
nmcachingtaden: 1 nmcachingtad: 0
C01: MCNMCACHINGCFG 2LM TAD:
nmcachingtaden: 1 nmcachingtad: 0
Write 1LM Decoder CSR's for HBM Stack 1 MC 0
C00: TADCHNILVOFFSET[0]:
target_ways: 0 chn_ways: 0 target_gran: 1 chn_gran: 1 tad_offset: 0x0 tad_offset_sign: 0
C01: TADCHNILVOFFSET[0]:
target_ways: 0 chn_ways: 0 target_gran: 1 chn_gran: 1 tad_offset: 0x0 tad_offset_sign: 0
Write 1LM Decoder CSR's for HBM Stack 1 MC 1
C00: TADCHNILVOFFSET[0]:
target_ways: 0 chn_ways: 0 target_gran: 1 chn_gran: 1 tad_offset: 0x0 tad_offset_sign: 0
C01: TADCHNILVOFFSET[0]:
target_ways: 0 chn_ways: 0 target_gran: 1 chn_gran: 1 tad_offset: 0x0 tad_offset_sign: 0
Write 1LM Decoder CSR's for HBM Stack 1 MC 2
C00: TADCHNILVOFFSET[0]:
target_ways: 0 chn_ways: 0 target_gran: 1 chn_gran: 1 tad_offset: 0x0 tad_offset_sign: 0
C01: TADCHNILVOFFSET[0]:
target_ways: 0 chn_ways: 0 target_gran: 1 chn_gran: 1 tad_offset: 0x0 tad_offset_sign: 0
Write 1LM Decoder CSR's for HBM Stack 1 MC 3
C00: TADCHNILVOFFSET[0]:
target_ways: 0 chn_ways: 0 target_gran: 1 chn_gran: 1 tad_offset: 0x0 tad_offset_sign: 0
C01: TADCHNILVOFFSET[0]:
target_ways: 0 chn_ways: 0 target_gran: 1 chn_gran: 1 tad_offset: 0x0 tad_offset_sign: 0
Write MCNMCACHINGCFG for HBM Stack 1 MC 0
C00: MCNMCACHINGCFG:
mcnmcachingenb: 1 mcpmemenb: 0 mcnmcachingpmemwt: 0
C01: MCNMCACHINGCFG:
mcnmcachingenb: 1 mcpmemenb: 0 mcnmcachingpmemwt: 0
Write MCNMCACHINGCFG for HBM Stack 1 MC 1
C00: MCNMCACHINGCFG:
mcnmcachingenb: 1 mcpmemenb: 0 mcnmcachingpmemwt: 0
C01: MCNMCACHINGCFG:
mcnmcachingenb: 1 mcpmemenb: 0 mcnmcachingpmemwt: 0
Write MCNMCACHINGCFG for HBM Stack 1 MC 2
C00: MCNMCACHINGCFG:
mcnmcachingenb: 1 mcpmemenb: 0 mcnmcachingpmemwt: 0
C01: MCNMCACHINGCFG:
mcnmcachingenb: 1 mcpmemenb: 0 mcnmcachingpmemwt: 0
Write MCNMCACHINGCFG for HBM Stack 1 MC 3
C00: MCNMCACHINGCFG:
mcnmcachingenb: 1 mcpmemenb: 0 mcnmcachingpmemwt: 0
C01: MCNMCACHINGCFG:
mcnmcachingenb: 1 mcpmemenb: 0 mcnmcachingpmemwt: 0
Write 2LM NM Decoder CSR's for HBM Stack 1 MC 0
C00: CSR for force_lat bit : AMAP_MC_MAIN_REG: 0x52
C00: MCNMCACHINGINTLV:
nm_target_ways: 0 nm_chn_ways: 3 nm_target_lid: 0 nm_target_gran: 1 nm_chn_gran: 1 nm_chn_lid: 0
C00: MCNMCACHINGCFG_MC_2LM_REG:
en_2way: 0 prefer_way_sel: 0 chn_cap: 0xB nm_ratio_chn_cap: 0
C00: MCNMCACHINGOFFSET:
mcnmcachingoffsetlower: 0x2 mcnmcachingoffset: 0x5 mcnmcachingoffseten: 1
C01: CSR for force_lat bit : AMAP_MC_MAIN_REG: 0x52
C01: MCNMCACHINGINTLV:
nm_target_ways: 0 nm_chn_ways: 3 nm_target_lid: 0 nm_target_gran: 1 nm_chn_gran: 1 nm_chn_lid: 1
C01: MCNMCACHINGCFG_MC_2LM_REG:
en_2way: 0 prefer_way_sel: 0 chn_cap: 0xB nm_ratio_chn_cap: 0
C01: MCNMCACHINGOFFSET:
mcnmcachingoffsetlower: 0x2 mcnmcachingoffset: 0x5 mcnmcachingoffseten: 1
Write 2LM NM Decoder CSR's for HBM Stack 1 MC 1
C00: CSR for force_lat bit : AMAP_MC_MAIN_REG: 0x52
C00: MCNMCACHINGINTLV:
nm_target_ways: 0 nm_chn_ways: 3 nm_target_lid: 0 nm_target_gran: 1 nm_chn_gran: 1 nm_chn_lid: 2
C00: MCNMCACHINGCFG_MC_2LM_REG:
en_2way: 0 prefer_way_sel: 0 chn_cap: 0xB nm_ratio_chn_cap: 0
C00: MCNMCACHINGOFFSET:
mcnmcachingoffsetlower: 0x2 mcnmcachingoffset: 0x5 mcnmcachingoffseten: 1
C01: CSR for force_lat bit : AMAP_MC_MAIN_REG: 0x52
C01: MCNMCACHINGINTLV:
nm_target_ways: 0 nm_chn_ways: 3 nm_target_lid: 0 nm_target_gran: 1 nm_chn_gran: 1 nm_chn_lid: 3
C01: MCNMCACHINGCFG_MC_2LM_REG:
en_2way: 0 prefer_way_sel: 0 chn_cap: 0xB nm_ratio_chn_cap: 0
C01: MCNMCACHINGOFFSET:
mcnmcachingoffsetlower: 0x2 mcnmcachingoffset: 0x5 mcnmcachingoffseten: 1
Write 2LM NM Decoder CSR's for HBM Stack 1 MC 2
C00: CSR for force_lat bit : AMAP_MC_MAIN_REG: 0x52
C00: MCNMCACHINGINTLV:
nm_target_ways: 0 nm_chn_ways: 3 nm_target_lid: 0 nm_target_gran: 1 nm_chn_gran: 1 nm_chn_lid: 4
C00: MCNMCACHINGCFG_MC_2LM_REG:
en_2way: 0 prefer_way_sel: 0 chn_cap: 0xB nm_ratio_chn_cap: 0
C00: MCNMCACHINGOFFSET:
mcnmcachingoffsetlower: 0x2 mcnmcachingoffset: 0x5 mcnmcachingoffseten: 1
C01: CSR for force_lat bit : AMAP_MC_MAIN_REG: 0x52
C01: MCNMCACHINGINTLV:
nm_target_ways: 0 nm_chn_ways: 3 nm_target_lid: 0 nm_target_gran: 1 nm_chn_gran: 1 nm_chn_lid: 5
C01: MCNMCACHINGCFG_MC_2LM_REG:
en_2way: 0 prefer_way_sel: 0 chn_cap: 0xB nm_ratio_chn_cap: 0
C01: MCNMCACHINGOFFSET:
mcnmcachingoffsetlower: 0x2 mcnmcachingoffset: 0x5 mcnmcachingoffseten: 1
Write 2LM NM Decoder CSR's for HBM Stack 1 MC 3
C00: CSR for force_lat bit : AMAP_MC_MAIN_REG: 0x52
C00: MCNMCACHINGINTLV:
nm_target_ways: 0 nm_chn_ways: 3 nm_target_lid: 0 nm_target_gran: 1 nm_chn_gran: 1 nm_chn_lid: 6
C00: MCNMCACHINGCFG_MC_2LM_REG:
en_2way: 0 prefer_way_sel: 0 chn_cap: 0xB nm_ratio_chn_cap: 0
C00: MCNMCACHINGOFFSET:
mcnmcachingoffsetlower: 0x2 mcnmcachingoffset: 0x5 mcnmcachingoffseten: 1
C01: CSR for force_lat bit : AMAP_MC_MAIN_REG: 0x52
C01: MCNMCACHINGINTLV:
nm_target_ways: 0 nm_chn_ways: 3 nm_target_lid: 0 nm_target_gran: 1 nm_chn_gran: 1 nm_chn_lid: 7
C01: MCNMCACHINGCFG_MC_2LM_REG:
en_2way: 0 prefer_way_sel: 0 chn_cap: 0xB nm_ratio_chn_cap: 0
C01: MCNMCACHINGOFFSET:
mcnmcachingoffsetlower: 0x2 mcnmcachingoffset: 0x5 mcnmcachingoffseten: 1
Write 2LM FM Decoder CSR's for HBM Stack 1 MC 0 TAD 0
C00: DRAM_RULE[0]:
rule_enable: 1 limit: 0xC1F fm_target: 0 fm_chn_ways: 0 fm_chn_gran: 1 fm_target_ways: 0 fm_gran_eq: 0 fm_chn_l2pid: 0x00000000
C01: DRAM_RULE[0]:
rule_enable: 1 limit: 0xC1F fm_target: 0 fm_chn_ways: 0 fm_chn_gran: 1 fm_target_ways: 0 fm_gran_eq: 0 fm_chn_l2pid: 0x00000000
Write 2LM FM Decoder CSR's for HBM Stack 1 MC 1 TAD 0
C00: DRAM_RULE[0]:
rule_enable: 1 limit: 0xC1F fm_target: 0 fm_chn_ways: 0 fm_chn_gran: 1 fm_target_ways: 0 fm_gran_eq: 0 fm_chn_l2pid: 0x00000000
C01: DRAM_RULE[0]:
rule_enable: 1 limit: 0xC1F fm_target: 0 fm_chn_ways: 0 fm_chn_gran: 1 fm_target_ways: 0 fm_gran_eq: 0 fm_chn_l2pid: 0x00000000
Write 2LM FM Decoder CSR's for HBM Stack 1 MC 2 TAD 0
C00: DRAM_RULE[0]:
rule_enable: 1 limit: 0xC1F fm_target: 0 fm_chn_ways: 0 fm_chn_gran: 1 fm_target_ways: 0 fm_gran_eq: 0 fm_chn_l2pid: 0x00000000
C01: DRAM_RULE[0]:
rule_enable: 1 limit: 0xC1F fm_target: 0 fm_chn_ways: 0 fm_chn_gran: 1 fm_target_ways: 0 fm_gran_eq: 0 fm_chn_l2pid: 0x00000000
Write 2LM FM Decoder CSR's for HBM Stack 1 MC 3 TAD 0
C00: DRAM_RULE[0]:
rule_enable: 1 limit: 0xC1F fm_target: 0 fm_chn_ways: 0 fm_chn_gran: 1 fm_target_ways: 0 fm_gran_eq: 0 fm_chn_l2pid: 0x00000000
C01: DRAM_RULE[0]:
rule_enable: 1 limit: 0xC1F fm_target: 0 fm_chn_ways: 0 fm_chn_gran: 1 fm_target_ways: 0 fm_gran_eq: 0 fm_chn_l2pid: 0x00000000
Write Patrol and Sparing TAD range CSR's for HBM Stack 2 MC 0
C00: TADWAYNESS[0]:
target_lid: 0 chn_lid: 0 tad_limit: 0x1F
C00: TADBASE[0]:
mirror_en: 0 en_failover: 0 ign_ptrl_uc: 0 base: 0x0
C01: TADWAYNESS[0]:
target_lid: 0 chn_lid: 1 tad_limit: 0x1F
C01: TADBASE[0]:
mirror_en: 0 en_failover: 0 ign_ptrl_uc: 0 base: 0x0
Write Patrol and Sparing TAD range CSR's for HBM Stack 2 MC 1
C00: TADWAYNESS[0]:
target_lid: 0 chn_lid: 2 tad_limit: 0x1F
C00: TADBASE[0]:
mirror_en: 0 en_failover: 0 ign_ptrl_uc: 0 base: 0x0
C01: TADWAYNESS[0]:
target_lid: 0 chn_lid: 3 tad_limit: 0x1F
C01: TADBASE[0]:
mirror_en: 0 en_failover: 0 ign_ptrl_uc: 0 base: 0x0
Write Patrol and Sparing TAD range CSR's for HBM Stack 2 MC 2
C00: TADWAYNESS[0]:
target_lid: 0 chn_lid: 4 tad_limit: 0x1F
C00: TADBASE[0]:
mirror_en: 0 en_failover: 0 ign_ptrl_uc: 0 base: 0x0
C01: TADWAYNESS[0]:
target_lid: 0 chn_lid: 5 tad_limit: 0x1F
C01: TADBASE[0]:
mirror_en: 0 en_failover: 0 ign_ptrl_uc: 0 base: 0x0
Write Patrol and Sparing TAD range CSR's for HBM Stack 2 MC 3
C00: TADWAYNESS[0]:
target_lid: 0 chn_lid: 6 tad_limit: 0x1F
C00: TADBASE[0]:
mirror_en: 0 en_failover: 0 ign_ptrl_uc: 0 base: 0x0
C01: TADWAYNESS[0]:
target_lid: 0 chn_lid: 7 tad_limit: 0x1F
C01: TADBASE[0]:
mirror_en: 0 en_failover: 0 ign_ptrl_uc: 0 base: 0x0
Write Hbm Nm Caching Tad CSR's for HBM Stack 2 MC 0
C00: MCNMCACHINGCFG 2LM TAD:
nmcachingtaden: 1 nmcachingtad: 0
C01: MCNMCACHINGCFG 2LM TAD:
nmcachingtaden: 1 nmcachingtad: 0
Write Hbm Nm Caching Tad CSR's for HBM Stack 2 MC 1
C00: MCNMCACHINGCFG 2LM TAD:
nmcachingtaden: 1 nmcachingtad: 0
C01: MCNMCACHINGCFG 2LM TAD:
nmcachingtaden: 1 nmcachingtad: 0
Write Hbm Nm Caching Tad CSR's for HBM Stack 2 MC 2
C00: MCNMCACHINGCFG 2LM TAD:
nmcachingtaden: 1 nmcachingtad: 0
C01: MCNMCACHINGCFG 2LM TAD:
nmcachingtaden: 1 nmcachingtad: 0
Write Hbm Nm Caching Tad CSR's for HBM Stack 2 MC 3
C00: MCNMCACHINGCFG 2LM TAD:
nmcachingtaden: 1 nmcachingtad: 0
C01: MCNMCACHINGCFG 2LM TAD:
nmcachingtaden: 1 nmcachingtad: 0
Write 1LM Decoder CSR's for HBM Stack 2 MC 0
C00: TADCHNILVOFFSET[0]:
target_ways: 0 chn_ways: 0 target_gran: 1 chn_gran: 1 tad_offset: 0x0 tad_offset_sign: 0
C01: TADCHNILVOFFSET[0]:
target_ways: 0 chn_ways: 0 target_gran: 1 chn_gran: 1 tad_offset: 0x0 tad_offset_sign: 0
Write 1LM Decoder CSR's for HBM Stack 2 MC 1
C00: TADCHNILVOFFSET[0]:
target_ways: 0 chn_ways: 0 target_gran: 1 chn_gran: 1 tad_offset: 0x0 tad_offset_sign: 0
C01: TADCHNILVOFFSET[0]:
target_ways: 0 chn_ways: 0 target_gran: 1 chn_gran: 1 tad_offset: 0x0 tad_offset_sign: 0
Write 1LM Decoder CSR's for HBM Stack 2 MC 2
C00: TADCHNILVOFFSET[0]:
target_ways: 0 chn_ways: 0 target_gran: 1 chn_gran: 1 tad_offset: 0x0 tad_offset_sign: 0
C01: TADCHNILVOFFSET[0]:
target_ways: 0 chn_ways: 0 target_gran: 1 chn_gran: 1 tad_offset: 0x0 tad_offset_sign: 0
Write 1LM Decoder CSR's for HBM Stack 2 MC 3
C00: TADCHNILVOFFSET[0]:
target_ways: 0 chn_ways: 0 target_gran: 1 chn_gran: 1 tad_offset: 0x0 tad_offset_sign: 0
C01: TADCHNILVOFFSET[0]:
target_ways: 0 chn_ways: 0 target_gran: 1 chn_gran: 1 tad_offset: 0x0 tad_offset_sign: 0
Write MCNMCACHINGCFG for HBM Stack 2 MC 0
C00: MCNMCACHINGCFG:
mcnmcachingenb: 1 mcpmemenb: 0 mcnmcachingpmemwt: 0
C01: MCNMCACHINGCFG:
mcnmcachingenb: 1 mcpmemenb: 0 mcnmcachingpmemwt: 0
Write MCNMCACHINGCFG for HBM Stack 2 MC 1
C00: MCNMCACHINGCFG:
mcnmcachingenb: 1 mcpmemenb: 0 mcnmcachingpmemwt: 0
C01: MCNMCACHINGCFG:
mcnmcachingenb: 1 mcpmemenb: 0 mcnmcachingpmemwt: 0
Write MCNMCACHINGCFG for HBM Stack 2 MC 2
C00: MCNMCACHINGCFG:
mcnmcachingenb: 1 mcpmemenb: 0 mcnmcachingpmemwt: 0
C01: MCNMCACHINGCFG:
mcnmcachingenb: 1 mcpmemenb: 0 mcnmcachingpmemwt: 0
Write MCNMCACHINGCFG for HBM Stack 2 MC 3
C00: MCNMCACHINGCFG:
mcnmcachingenb: 1 mcpmemenb: 0 mcnmcachingpmemwt: 0
C01: MCNMCACHINGCFG:
mcnmcachingenb: 1 mcpmemenb: 0 mcnmcachingpmemwt: 0
Write 2LM NM Decoder CSR's for HBM Stack 2 MC 0
C00: CSR for force_lat bit : AMAP_MC_MAIN_REG: 0x52
C00: MCNMCACHINGINTLV:
nm_target_ways: 0 nm_chn_ways: 3 nm_target_lid: 0 nm_target_gran: 1 nm_chn_gran: 1 nm_chn_lid: 0
C00: MCNMCACHINGCFG_MC_2LM_REG:
en_2way: 0 prefer_way_sel: 0 chn_cap: 0xB nm_ratio_chn_cap: 0
C00: MCNMCACHINGOFFSET:
mcnmcachingoffsetlower: 0x2 mcnmcachingoffset: 0x6 mcnmcachingoffseten: 1
C01: CSR for force_lat bit : AMAP_MC_MAIN_REG: 0x52
C01: MCNMCACHINGINTLV:
nm_target_ways: 0 nm_chn_ways: 3 nm_target_lid: 0 nm_target_gran: 1 nm_chn_gran: 1 nm_chn_lid: 1
C01: MCNMCACHINGCFG_MC_2LM_REG:
en_2way: 0 prefer_way_sel: 0 chn_cap: 0xB nm_ratio_chn_cap: 0
C01: MCNMCACHINGOFFSET:
mcnmcachingoffsetlower: 0x2 mcnmcachingoffset: 0x6 mcnmcachingoffseten: 1
Write 2LM NM Decoder CSR's for HBM Stack 2 MC 1
C00: CSR for force_lat bit : AMAP_MC_MAIN_REG: 0x52
C00: MCNMCACHINGINTLV:
nm_target_ways: 0 nm_chn_ways: 3 nm_target_lid: 0 nm_target_gran: 1 nm_chn_gran: 1 nm_chn_lid: 2
C00: MCNMCACHINGCFG_MC_2LM_REG:
en_2way: 0 prefer_way_sel: 0 chn_cap: 0xB nm_ratio_chn_cap: 0
C00: MCNMCACHINGOFFSET:
mcnmcachingoffsetlower: 0x2 mcnmcachingoffset: 0x6 mcnmcachingoffseten: 1
C01: CSR for force_lat bit : AMAP_MC_MAIN_REG: 0x52
C01: MCNMCACHINGINTLV:
nm_target_ways: 0 nm_chn_ways: 3 nm_target_lid: 0 nm_target_gran: 1 nm_chn_gran: 1 nm_chn_lid: 3
C01: MCNMCACHINGCFG_MC_2LM_REG:
en_2way: 0 prefer_way_sel: 0 chn_cap: 0xB nm_ratio_chn_cap: 0
C01: MCNMCACHINGOFFSET:
mcnmcachingoffsetlower: 0x2 mcnmcachingoffset: 0x6 mcnmcachingoffseten: 1
Write 2LM NM Decoder CSR's for HBM Stack 2 MC 2
C00: CSR for force_lat bit : AMAP_MC_MAIN_REG: 0x52
C00: MCNMCACHINGINTLV:
nm_target_ways: 0 nm_chn_ways: 3 nm_target_lid: 0 nm_target_gran: 1 nm_chn_gran: 1 nm_chn_lid: 4
C00: MCNMCACHINGCFG_MC_2LM_REG:
en_2way: 0 prefer_way_sel: 0 chn_cap: 0xB nm_ratio_chn_cap: 0
C00: MCNMCACHINGOFFSET:
mcnmcachingoffsetlower: 0x2 mcnmcachingoffset: 0x6 mcnmcachingoffseten: 1
C01: CSR for force_lat bit : AMAP_MC_MAIN_REG: 0x52
C01: MCNMCACHINGINTLV:
nm_target_ways: 0 nm_chn_ways: 3 nm_target_lid: 0 nm_target_gran: 1 nm_chn_gran: 1 nm_chn_lid: 5
C01: MCNMCACHINGCFG_MC_2LM_REG:
en_2way: 0 prefer_way_sel: 0 chn_cap: 0xB nm_ratio_chn_cap: 0
C01: MCNMCACHINGOFFSET:
mcnmcachingoffsetlower: 0x2 mcnmcachingoffset: 0x6 mcnmcachingoffseten: 1
Write 2LM NM Decoder CSR's for HBM Stack 2 MC 3
C00: CSR for force_lat bit : AMAP_MC_MAIN_REG: 0x52
C00: MCNMCACHINGINTLV:
nm_target_ways: 0 nm_chn_ways: 3 nm_target_lid: 0 nm_target_gran: 1 nm_chn_gran: 1 nm_chn_lid: 6
C00: MCNMCACHINGCFG_MC_2LM_REG:
en_2way: 0 prefer_way_sel: 0 chn_cap: 0xB nm_ratio_chn_cap: 0
C00: MCNMCACHINGOFFSET:
mcnmcachingoffsetlower: 0x2 mcnmcachingoffset: 0x6 mcnmcachingoffseten: 1
C01: CSR for force_lat bit : AMAP_MC_MAIN_REG: 0x52
C01: MCNMCACHINGINTLV:
nm_target_ways: 0 nm_chn_ways: 3 nm_target_lid: 0 nm_target_gran: 1 nm_chn_gran: 1 nm_chn_lid: 7
C01: MCNMCACHINGCFG_MC_2LM_REG:
en_2way: 0 prefer_way_sel: 0 chn_cap: 0xB nm_ratio_chn_cap: 0
C01: MCNMCACHINGOFFSET:
mcnmcachingoffsetlower: 0x2 mcnmcachingoffset: 0x6 mcnmcachingoffseten: 1
Write 2LM FM Decoder CSR's for HBM Stack 2 MC 0 TAD 0
C00: DRAM_RULE[0]:
rule_enable: 1 limit: 0xE1F fm_target: 0 fm_chn_ways: 0 fm_chn_gran: 1 fm_target_ways: 0 fm_gran_eq: 0 fm_chn_l2pid: 0x00000000
C01: DRAM_RULE[0]:
rule_enable: 1 limit: 0xE1F fm_target: 0 fm_chn_ways: 0 fm_chn_gran: 1 fm_target_ways: 0 fm_gran_eq: 0 fm_chn_l2pid: 0x00000000
Write 2LM FM Decoder CSR's for HBM Stack 2 MC 1 TAD 0
C00: DRAM_RULE[0]:
rule_enable: 1 limit: 0xE1F fm_target: 0 fm_chn_ways: 0 fm_chn_gran: 1 fm_target_ways: 0 fm_gran_eq: 0 fm_chn_l2pid: 0x00000000
C01: DRAM_RULE[0]:
rule_enable: 1 limit: 0xE1F fm_target: 0 fm_chn_ways: 0 fm_chn_gran: 1 fm_target_ways: 0 fm_gran_eq: 0 fm_chn_l2pid: 0x00000000
Write 2LM FM Decoder CSR's for HBM Stack 2 MC 2 TAD 0
C00: DRAM_RULE[0]:
rule_enable: 1 limit: 0xE1F fm_target: 0 fm_chn_ways: 0 fm_chn_gran: 1 fm_target_ways: 0 fm_gran_eq: 0 fm_chn_l2pid: 0x00000000
C01: DRAM_RULE[0]:
rule_enable: 1 limit: 0xE1F fm_target: 0 fm_chn_ways: 0 fm_chn_gran: 1 fm_target_ways: 0 fm_gran_eq: 0 fm_chn_l2pid: 0x00000000
Write 2LM FM Decoder CSR's for HBM Stack 2 MC 3 TAD 0
C00: DRAM_RULE[0]:
rule_enable: 1 limit: 0xE1F fm_target: 0 fm_chn_ways: 0 fm_chn_gran: 1 fm_target_ways: 0 fm_gran_eq: 0 fm_chn_l2pid: 0x00000000
C01: DRAM_RULE[0]:
rule_enable: 1 limit: 0xE1F fm_target: 0 fm_chn_ways: 0 fm_chn_gran: 1 fm_target_ways: 0 fm_gran_eq: 0 fm_chn_l2pid: 0x00000000
Write Patrol and Sparing TAD range CSR's for HBM Stack 3 MC 0
C00: TADWAYNESS[0]:
target_lid: 0 chn_lid: 0 tad_limit: 0x1F
C00: TADBASE[0]:
mirror_en: 0 en_failover: 0 ign_ptrl_uc: 0 base: 0x0
C01: TADWAYNESS[0]:
target_lid: 0 chn_lid: 1 tad_limit: 0x1F
C01: TADBASE[0]:
mirror_en: 0 en_failover: 0 ign_ptrl_uc: 0 base: 0x0
Write Patrol and Sparing TAD range CSR's for HBM Stack 3 MC 1
C00: TADWAYNESS[0]:
target_lid: 0 chn_lid: 2 tad_limit: 0x1F
C00: TADBASE[0]:
mirror_en: 0 en_failover: 0 ign_ptrl_uc: 0 base: 0x0
C01: TADWAYNESS[0]:
target_lid: 0 chn_lid: 3 tad_limit: 0x1F
C01: TADBASE[0]:
mirror_en: 0 en_failover: 0 ign_ptrl_uc: 0 base: 0x0
Write Patrol and Sparing TAD range CSR's for HBM Stack 3 MC 2
C00: TADWAYNESS[0]:
target_lid: 0 chn_lid: 4 tad_limit: 0x1F
C00: TADBASE[0]:
mirror_en: 0 en_failover: 0 ign_ptrl_uc: 0 base: 0x0
C01: TADWAYNESS[0]:
target_lid: 0 chn_lid: 5 tad_limit: 0x1F
C01: TADBASE[0]:
mirror_en: 0 en_failover: 0 ign_ptrl_uc: 0 base: 0x0
Write Patrol and Sparing TAD range CSR's for HBM Stack 3 MC 3
C00: TADWAYNESS[0]:
target_lid: 0 chn_lid: 6 tad_limit: 0x1F
C00: TADBASE[0]:
mirror_en: 0 en_failover: 0 ign_ptrl_uc: 0 base: 0x0
C01: TADWAYNESS[0]:
target_lid: 0 chn_lid: 7 tad_limit: 0x1F
C01: TADBASE[0]:
mirror_en: 0 en_failover: 0 ign_ptrl_uc: 0 base: 0x0
Write Hbm Nm Caching Tad CSR's for HBM Stack 3 MC 0
C00: MCNMCACHINGCFG 2LM TAD:
nmcachingtaden: 1 nmcachingtad: 0
C01: MCNMCACHINGCFG 2LM TAD:
nmcachingtaden: 1 nmcachingtad: 0
Write Hbm Nm Caching Tad CSR's for HBM Stack 3 MC 1
C00: MCNMCACHINGCFG 2LM TAD:
nmcachingtaden: 1 nmcachingtad: 0
C01: MCNMCACHINGCFG 2LM TAD:
nmcachingtaden: 1 nmcachingtad: 0
Write Hbm Nm Caching Tad CSR's for HBM Stack 3 MC 2
C00: MCNMCACHINGCFG 2LM TAD:
nmcachingtaden: 1 nmcachingtad: 0
C01: MCNMCACHINGCFG 2LM TAD:
nmcachingtaden: 1 nmcachingtad: 0
Write Hbm Nm Caching Tad CSR's for HBM Stack 3 MC 3
C00: MCNMCACHINGCFG 2LM TAD:
nmcachingtaden: 1 nmcachingtad: 0
C01: MCNMCACHINGCFG 2LM TAD:
nmcachingtaden: 1 nmcachingtad: 0
Write 1LM Decoder CSR's for HBM Stack 3 MC 0
C00: TADCHNILVOFFSET[0]:
target_ways: 0 chn_ways: 0 target_gran: 1 chn_gran: 1 tad_offset: 0x0 tad_offset_sign: 0
C01: TADCHNILVOFFSET[0]:
target_ways: 0 chn_ways: 0 target_gran: 1 chn_gran: 1 tad_offset: 0x0 tad_offset_sign: 0
Write 1LM Decoder CSR's for HBM Stack 3 MC 1
C00: TADCHNILVOFFSET[0]:
target_ways: 0 chn_ways: 0 target_gran: 1 chn_gran: 1 tad_offset: 0x0 tad_offset_sign: 0
C01: TADCHNILVOFFSET[0]:
target_ways: 0 chn_ways: 0 target_gran: 1 chn_gran: 1 tad_offset: 0x0 tad_offset_sign: 0
Write 1LM Decoder CSR's for HBM Stack 3 MC 2
C00: TADCHNILVOFFSET[0]:
target_ways: 0 chn_ways: 0 target_gran: 1 chn_gran: 1 tad_offset: 0x0 tad_offset_sign: 0
C01: TADCHNILVOFFSET[0]:
target_ways: 0 chn_ways: 0 target_gran: 1 chn_gran: 1 tad_offset: 0x0 tad_offset_sign: 0
Write 1LM Decoder CSR's for HBM Stack 3 MC 3
C00: TADCHNILVOFFSET[0]:
target_ways: 0 chn_ways: 0 target_gran: 1 chn_gran: 1 tad_offset: 0x0 tad_offset_sign: 0
C01: TADCHNILVOFFSET[0]:
target_ways: 0 chn_ways: 0 target_gran: 1 chn_gran: 1 tad_offset: 0x0 tad_offset_sign: 0
Write MCNMCACHINGCFG for HBM Stack 3 MC 0
C00: MCNMCACHINGCFG:
mcnmcachingenb: 1 mcpmemenb: 0 mcnmcachingpmemwt: 0
C01: MCNMCACHINGCFG:
mcnmcachingenb: 1 mcpmemenb: 0 mcnmcachingpmemwt: 0
Write MCNMCACHINGCFG for HBM Stack 3 MC 1
C00: MCNMCACHINGCFG:
mcnmcachingenb: 1 mcpmemenb: 0 mcnmcachingpmemwt: 0
C01: MCNMCACHINGCFG:
mcnmcachingenb: 1 mcpmemenb: 0 mcnmcachingpmemwt: 0
Write MCNMCACHINGCFG for HBM Stack 3 MC 2
C00: MCNMCACHINGCFG:
mcnmcachingenb: 1 mcpmemenb: 0 mcnmcachingpmemwt: 0
C01: MCNMCACHINGCFG:
mcnmcachingenb: 1 mcpmemenb: 0 mcnmcachingpmemwt: 0
Write MCNMCACHINGCFG for HBM Stack 3 MC 3
C00: MCNMCACHINGCFG:
mcnmcachingenb: 1 mcpmemenb: 0 mcnmcachingpmemwt: 0
C01: MCNMCACHINGCFG:
mcnmcachingenb: 1 mcpmemenb: 0 mcnmcachingpmemwt: 0
Write 2LM NM Decoder CSR's for HBM Stack 3 MC 0
C00: CSR for force_lat bit : AMAP_MC_MAIN_REG: 0x52
C00: MCNMCACHINGINTLV:
nm_target_ways: 0 nm_chn_ways: 3 nm_target_lid: 0 nm_target_gran: 1 nm_chn_gran: 1 nm_chn_lid: 0
C00: MCNMCACHINGCFG_MC_2LM_REG:
en_2way: 0 prefer_way_sel: 0 chn_cap: 0xB nm_ratio_chn_cap: 0
C00: MCNMCACHINGOFFSET:
mcnmcachingoffsetlower: 0x2 mcnmcachingoffset: 0x7 mcnmcachingoffseten: 1
C01: CSR for force_lat bit : AMAP_MC_MAIN_REG: 0x52
C01: MCNMCACHINGINTLV:
nm_target_ways: 0 nm_chn_ways: 3 nm_target_lid: 0 nm_target_gran: 1 nm_chn_gran: 1 nm_chn_lid: 1
C01: MCNMCACHINGCFG_MC_2LM_REG:
en_2way: 0 prefer_way_sel: 0 chn_cap: 0xB nm_ratio_chn_cap: 0
C01: MCNMCACHINGOFFSET:
mcnmcachingoffsetlower: 0x2 mcnmcachingoffset: 0x7 mcnmcachingoffseten: 1
Write 2LM NM Decoder CSR's for HBM Stack 3 MC 1
C00: CSR for force_lat bit : AMAP_MC_MAIN_REG: 0x52
C00: MCNMCACHINGINTLV:
nm_target_ways: 0 nm_chn_ways: 3 nm_target_lid: 0 nm_target_gran: 1 nm_chn_gran: 1 nm_chn_lid: 2
C00: MCNMCACHINGCFG_MC_2LM_REG:
en_2way: 0 prefer_way_sel: 0 chn_cap: 0xB nm_ratio_chn_cap: 0
C00: MCNMCACHINGOFFSET:
mcnmcachingoffsetlower: 0x2 mcnmcachingoffset: 0x7 mcnmcachingoffseten: 1
C01: CSR for force_lat bit : AMAP_MC_MAIN_REG: 0x52
C01: MCNMCACHINGINTLV:
nm_target_ways: 0 nm_chn_ways: 3 nm_target_lid: 0 nm_target_gran: 1 nm_chn_gran: 1 nm_chn_lid: 3
C01: MCNMCACHINGCFG_MC_2LM_REG:
en_2way: 0 prefer_way_sel: 0 chn_cap: 0xB nm_ratio_chn_cap: 0
C01: MCNMCACHINGOFFSET:
mcnmcachingoffsetlower: 0x2 mcnmcachingoffset: 0x7 mcnmcachingoffseten: 1
Write 2LM NM Decoder CSR's for HBM Stack 3 MC 2
C00: CSR for force_lat bit : AMAP_MC_MAIN_REG: 0x52
C00: MCNMCACHINGINTLV:
nm_target_ways: 0 nm_chn_ways: 3 nm_target_lid: 0 nm_target_gran: 1 nm_chn_gran: 1 nm_chn_lid: 4
C00: MCNMCACHINGCFG_MC_2LM_REG:
en_2way: 0 prefer_way_sel: 0 chn_cap: 0xB nm_ratio_chn_cap: 0
C00: MCNMCACHINGOFFSET:
mcnmcachingoffsetlower: 0x2 mcnmcachingoffset: 0x7 mcnmcachingoffseten: 1
C01: CSR for force_lat bit : AMAP_MC_MAIN_REG: 0x52
C01: MCNMCACHINGINTLV:
nm_target_ways: 0 nm_chn_ways: 3 nm_target_lid: 0 nm_target_gran: 1 nm_chn_gran: 1 nm_chn_lid: 5
C01: MCNMCACHINGCFG_MC_2LM_REG:
en_2way: 0 prefer_way_sel: 0 chn_cap: 0xB nm_ratio_chn_cap: 0
C01: MCNMCACHINGOFFSET:
mcnmcachingoffsetlower: 0x2 mcnmcachingoffset: 0x7 mcnmcachingoffseten: 1
Write 2LM NM Decoder CSR's for HBM Stack 3 MC 3
C00: CSR for force_lat bit : AMAP_MC_MAIN_REG: 0x52
C00: MCNMCACHINGINTLV:
nm_target_ways: 0 nm_chn_ways: 3 nm_target_lid: 0 nm_target_gran: 1 nm_chn_gran: 1 nm_chn_lid: 6
C00: MCNMCACHINGCFG_MC_2LM_REG:
en_2way: 0 prefer_way_sel: 0 chn_cap: 0xB nm_ratio_chn_cap: 0
C00: MCNMCACHINGOFFSET:
mcnmcachingoffsetlower: 0x2 mcnmcachingoffset: 0x7 mcnmcachingoffseten: 1
C01: CSR for force_lat bit : AMAP_MC_MAIN_REG: 0x52
C01: MCNMCACHINGINTLV:
nm_target_ways: 0 nm_chn_ways: 3 nm_target_lid: 0 nm_target_gran: 1 nm_chn_gran: 1 nm_chn_lid: 7
C01: MCNMCACHINGCFG_MC_2LM_REG:
en_2way: 0 prefer_way_sel: 0 chn_cap: 0xB nm_ratio_chn_cap: 0
C01: MCNMCACHINGOFFSET:
mcnmcachingoffsetlower: 0x2 mcnmcachingoffset: 0x7 mcnmcachingoffseten: 1
Write 2LM FM Decoder CSR's for HBM Stack 3 MC 0 TAD 0
C00: DRAM_RULE[0]:
rule_enable: 1 limit: 0x101F fm_target: 0 fm_chn_ways: 0 fm_chn_gran: 1 fm_target_ways: 0 fm_gran_eq: 0 fm_chn_l2pid: 0x00000000
C01: DRAM_RULE[0]:
rule_enable: 1 limit: 0x101F fm_target: 0 fm_chn_ways: 0 fm_chn_gran: 1 fm_target_ways: 0 fm_gran_eq: 0 fm_chn_l2pid: 0x00000000
Write 2LM FM Decoder CSR's for HBM Stack 3 MC 1 TAD 0
C00: DRAM_RULE[0]:
rule_enable: 1 limit: 0x101F fm_target: 0 fm_chn_ways: 0 fm_chn_gran: 1 fm_target_ways: 0 fm_gran_eq: 0 fm_chn_l2pid: 0x00000000
C01: DRAM_RULE[0]:
rule_enable: 1 limit: 0x101F fm_target: 0 fm_chn_ways: 0 fm_chn_gran: 1 fm_target_ways: 0 fm_gran_eq: 0 fm_chn_l2pid: 0x00000000
Write 2LM FM Decoder CSR's for HBM Stack 3 MC 2 TAD 0
C00: DRAM_RULE[0]:
rule_enable: 1 limit: 0x101F fm_target: 0 fm_chn_ways: 0 fm_chn_gran: 1 fm_target_ways: 0 fm_gran_eq: 0 fm_chn_l2pid: 0x00000000
C01: DRAM_RULE[0]:
rule_enable: 1 limit: 0x101F fm_target: 0 fm_chn_ways: 0 fm_chn_gran: 1 fm_target_ways: 0 fm_gran_eq: 0 fm_chn_l2pid: 0x00000000
Write 2LM FM Decoder CSR's for HBM Stack 3 MC 3 TAD 0
C00: DRAM_RULE[0]:
rule_enable: 1 limit: 0x101F fm_target: 0 fm_chn_ways: 0 fm_chn_gran: 1 fm_target_ways: 0 fm_gran_eq: 0 fm_chn_l2pid: 0x00000000
C01: DRAM_RULE[0]:
rule_enable: 1 limit: 0x101F fm_target: 0 fm_chn_ways: 0 fm_chn_gran: 1 fm_target_ways: 0 fm_gran_eq: 0 fm_chn_l2pid: 0x00000000
Checkpoint Code: Socket 0, 0xBB, 0x08, 0x0001
^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^
Write RIR CSRs for Socket: 1
^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^
Channel - 0
RIRWAYNESSLIMIT_0_MC_MAIN_REG
rir_val: 1 rir_limit: 0x1F rir_way: 0x0
RIRILV0OFFSET_0_MC_MAIN_REG
rir_rnk_tgt0: 0x0 rir_offset0: 0x0
RIRILV1OFFSET_0_MC_MAIN_REG
rir_rnk_tgt0: 0x0 rir_offset0: 0x0
RIRILV2OFFSET_0_MC_MAIN_REG
rir_rnk_tgt0: 0x0 rir_offset0: 0x0
RIRILV3OFFSET_0_MC_MAIN_REG
rir_rnk_tgt0: 0x0 rir_offset0: 0x0
RIRILV4OFFSET_0_MC_MAIN_REG
rir_rnk_tgt0: 0x0 rir_offset0: 0x0
RIRILV5OFFSET_0_MC_MAIN_REG
rir_rnk_tgt0: 0x0 rir_offset0: 0x0
RIRILV6OFFSET_0_MC_MAIN_REG
rir_rnk_tgt0: 0x0 rir_offset0: 0x0
RIRILV7OFFSET_0_MC_MAIN_REG
rir_rnk_tgt0: 0x0 rir_offset0: 0x0
RIRWAYNESSLIMIT_1_MC_MAIN_REG
rir_val: 0 rir_limit: 0x1F rir_way: 0x0
RIRILV0OFFSET_1_MC_MAIN_REG
rir_rnk_tgt0: 0x0 rir_offset0: 0x0
RIRILV1OFFSET_1_MC_MAIN_REG
rir_rnk_tgt0: 0x0 rir_offset0: 0x0
RIRILV2OFFSET_1_MC_MAIN_REG
rir_rnk_tgt0: 0x0 rir_offset0: 0x0
RIRILV3OFFSET_1_MC_MAIN_REG
rir_rnk_tgt0: 0x0 rir_offset0: 0x0
RIRILV4OFFSET_1_MC_MAIN_REG
rir_rnk_tgt0: 0x0 rir_offset0: 0x0
RIRILV5OFFSET_1_MC_MAIN_REG
rir_rnk_tgt0: 0x0 rir_offset0: 0x0
RIRILV6OFFSET_1_MC_MAIN_REG
rir_rnk_tgt0: 0x0 rir_offset0: 0x0
RIRILV7OFFSET_1_MC_MAIN_REG
rir_rnk_tgt0: 0x0 rir_offset0: 0x0
RIRWAYNESSLIMIT_2_MC_MAIN_REG
rir_val: 0 rir_limit: 0x1F rir_way: 0x0
RIRILV0OFFSET_2_MC_MAIN_REG
rir_rnk_tgt0: 0x0 rir_offset0: 0x0
RIRILV1OFFSET_2_MC_MAIN_REG
rir_rnk_tgt0: 0x0 rir_offset0: 0x0
RIRILV2OFFSET_2_MC_MAIN_REG
rir_rnk_tgt0: 0x0 rir_offset0: 0x0
RIRILV3OFFSET_2_MC_MAIN_REG
rir_rnk_tgt0: 0x0 rir_offset0: 0x0
RIRILV4OFFSET_2_MC_MAIN_REG
rir_rnk_tgt0: 0x0 rir_offset0: 0x0
RIRILV5OFFSET_2_MC_MAIN_REG
rir_rnk_tgt0: 0x0 rir_offset0: 0x0
RIRILV6OFFSET_2_MC_MAIN_REG
rir_rnk_tgt0: 0x0 rir_offset0: 0x0
RIRILV7OFFSET_2_MC_MAIN_REG
rir_rnk_tgt0: 0x0 rir_offset0: 0x0
RIRWAYNESSLIMIT_3_MC_MAIN_REG
rir_val: 0 rir_limit: 0x1F rir_way: 0x0
RIRILV0OFFSET_3_MC_MAIN_REG
rir_rnk_tgt0: 0x0 rir_offset0: 0x0
RIRILV1OFFSET_3_MC_MAIN_REG
rir_rnk_tgt0: 0x0 rir_offset0: 0x0
RIRILV2OFFSET_3_MC_MAIN_REG
rir_rnk_tgt0: 0x0 rir_offset0: 0x0
RIRILV3OFFSET_3_MC_MAIN_REG
rir_rnk_tgt0: 0x0 rir_offset0: 0x0
RIRILV4OFFSET_3_MC_MAIN_REG
rir_rnk_tgt0: 0x0 rir_offset0: 0x0
RIRILV5OFFSET_3_MC_MAIN_REG
rir_rnk_tgt0: 0x0 rir_offset0: 0x0
RIRILV6OFFSET_3_MC_MAIN_REG
rir_rnk_tgt0: 0x0 rir_offset0: 0x0
RIRILV7OFFSET_3_MC_MAIN_REG
rir_rnk_tgt0: 0x0 rir_offset0: 0x0
Channel - 2
RIRWAYNESSLIMIT_0_MC_MAIN_REG
rir_val: 1 rir_limit: 0x1F rir_way: 0x0
RIRILV0OFFSET_0_MC_MAIN_REG
rir_rnk_tgt0: 0x0 rir_offset0: 0x0
RIRILV1OFFSET_0_MC_MAIN_REG
rir_rnk_tgt0: 0x0 rir_offset0: 0x0
RIRILV2OFFSET_0_MC_MAIN_REG
rir_rnk_tgt0: 0x0 rir_offset0: 0x0
RIRILV3OFFSET_0_MC_MAIN_REG
rir_rnk_tgt0: 0x0 rir_offset0: 0x0
RIRILV4OFFSET_0_MC_MAIN_REG
rir_rnk_tgt0: 0x0 rir_offset0: 0x0
RIRILV5OFFSET_0_MC_MAIN_REG
rir_rnk_tgt0: 0x0 rir_offset0: 0x0
RIRILV6OFFSET_0_MC_MAIN_REG
rir_rnk_tgt0: 0x0 rir_offset0: 0x0
RIRILV7OFFSET_0_MC_MAIN_REG
rir_rnk_tgt0: 0x0 rir_offset0: 0x0
RIRWAYNESSLIMIT_1_MC_MAIN_REG
rir_val: 0 rir_limit: 0x1F rir_way: 0x0
RIRILV0OFFSET_1_MC_MAIN_REG
rir_rnk_tgt0: 0x0 rir_offset0: 0x0
RIRILV1OFFSET_1_MC_MAIN_REG
rir_rnk_tgt0: 0x0 rir_offset0: 0x0
RIRILV2OFFSET_1_MC_MAIN_REG
rir_rnk_tgt0: 0x0 rir_offset0: 0x0
RIRILV3OFFSET_1_MC_MAIN_REG
rir_rnk_tgt0: 0x0 rir_offset0: 0x0
RIRILV4OFFSET_1_MC_MAIN_REG
rir_rnk_tgt0: 0x0 rir_offset0: 0x0
RIRILV5OFFSET_1_MC_MAIN_REG
rir_rnk_tgt0: 0x0 rir_offset0: 0x0
RIRILV6OFFSET_1_MC_MAIN_REG
rir_rnk_tgt0: 0x0 rir_offset0: 0x0
RIRILV7OFFSET_1_MC_MAIN_REG
rir_rnk_tgt0: 0x0 rir_offset0: 0x0
RIRWAYNESSLIMIT_2_MC_MAIN_REG
rir_val: 0 rir_limit: 0x1F rir_way: 0x0
RIRILV0OFFSET_2_MC_MAIN_REG
rir_rnk_tgt0: 0x0 rir_offset0: 0x0
RIRILV1OFFSET_2_MC_MAIN_REG
rir_rnk_tgt0: 0x0 rir_offset0: 0x0
RIRILV2OFFSET_2_MC_MAIN_REG
rir_rnk_tgt0: 0x0 rir_offset0: 0x0
RIRILV3OFFSET_2_MC_MAIN_REG
rir_rnk_tgt0: 0x0 rir_offset0: 0x0
RIRILV4OFFSET_2_MC_MAIN_REG
rir_rnk_tgt0: 0x0 rir_offset0: 0x0
RIRILV5OFFSET_2_MC_MAIN_REG
rir_rnk_tgt0: 0x0 rir_offset0: 0x0
RIRILV6OFFSET_2_MC_MAIN_REG
rir_rnk_tgt0: 0x0 rir_offset0: 0x0
RIRILV7OFFSET_2_MC_MAIN_REG
rir_rnk_tgt0: 0x0 rir_offset0: 0x0
RIRWAYNESSLIMIT_3_MC_MAIN_REG
rir_val: 0 rir_limit: 0x1F rir_way: 0x0
RIRILV0OFFSET_3_MC_MAIN_REG
rir_rnk_tgt0: 0x0 rir_offset0: 0x0
RIRILV1OFFSET_3_MC_MAIN_REG
rir_rnk_tgt0: 0x0 rir_offset0: 0x0
RIRILV2OFFSET_3_MC_MAIN_REG
rir_rnk_tgt0: 0x0 rir_offset0: 0x0
RIRILV3OFFSET_3_MC_MAIN_REG
rir_rnk_tgt0: 0x0 rir_offset0: 0x0
RIRILV4OFFSET_3_MC_MAIN_REG
rir_rnk_tgt0: 0x0 rir_offset0: 0x0
RIRILV5OFFSET_3_MC_MAIN_REG
rir_rnk_tgt0: 0x0 rir_offset0: 0x0
RIRILV6OFFSET_3_MC_MAIN_REG
rir_rnk_tgt0: 0x0 rir_offset0: 0x0
RIRILV7OFFSET_3_MC_MAIN_REG
rir_rnk_tgt0: 0x0 rir_offset0: 0x0
Channel - 4
RIRWAYNESSLIMIT_0_MC_MAIN_REG
rir_val: 1 rir_limit: 0x1F rir_way: 0x0
RIRILV0OFFSET_0_MC_MAIN_REG
rir_rnk_tgt0: 0x0 rir_offset0: 0x0
RIRILV1OFFSET_0_MC_MAIN_REG
rir_rnk_tgt0: 0x0 rir_offset0: 0x0
RIRILV2OFFSET_0_MC_MAIN_REG
rir_rnk_tgt0: 0x0 rir_offset0: 0x0
RIRILV3OFFSET_0_MC_MAIN_REG
rir_rnk_tgt0: 0x0 rir_offset0: 0x0
RIRILV4OFFSET_0_MC_MAIN_REG
rir_rnk_tgt0: 0x0 rir_offset0: 0x0
RIRILV5OFFSET_0_MC_MAIN_REG
rir_rnk_tgt0: 0x0 rir_offset0: 0x0
RIRILV6OFFSET_0_MC_MAIN_REG
rir_rnk_tgt0: 0x0 rir_offset0: 0x0
RIRILV7OFFSET_0_MC_MAIN_REG
rir_rnk_tgt0: 0x0 rir_offset0: 0x0
RIRWAYNESSLIMIT_1_MC_MAIN_REG
rir_val: 0 rir_limit: 0x1F rir_way: 0x0
RIRILV0OFFSET_1_MC_MAIN_REG
rir_rnk_tgt0: 0x0 rir_offset0: 0x0
RIRILV1OFFSET_1_MC_MAIN_REG
rir_rnk_tgt0: 0x0 rir_offset0: 0x0
RIRILV2OFFSET_1_MC_MAIN_REG
rir_rnk_tgt0: 0x0 rir_offset0: 0x0
RIRILV3OFFSET_1_MC_MAIN_REG
rir_rnk_tgt0: 0x0 rir_offset0: 0x0
RIRILV4OFFSET_1_MC_MAIN_REG
rir_rnk_tgt0: 0x0 rir_offset0: 0x0
RIRILV5OFFSET_1_MC_MAIN_REG
rir_rnk_tgt0: 0x0 rir_offset0: 0x0
RIRILV6OFFSET_1_MC_MAIN_REG
rir_rnk_tgt0: 0x0 rir_offset0: 0x0
RIRILV7OFFSET_1_MC_MAIN_REG
rir_rnk_tgt0: 0x0 rir_offset0: 0x0
RIRWAYNESSLIMIT_2_MC_MAIN_REG
rir_val: 0 rir_limit: 0x1F rir_way: 0x0
RIRILV0OFFSET_2_MC_MAIN_REG
rir_rnk_tgt0: 0x0 rir_offset0: 0x0
RIRILV1OFFSET_2_MC_MAIN_REG
rir_rnk_tgt0: 0x0 rir_offset0: 0x0
RIRILV2OFFSET_2_MC_MAIN_REG
rir_rnk_tgt0: 0x0 rir_offset0: 0x0
RIRILV3OFFSET_2_MC_MAIN_REG
rir_rnk_tgt0: 0x0 rir_offset0: 0x0
RIRILV4OFFSET_2_MC_MAIN_REG
rir_rnk_tgt0: 0x0 rir_offset0: 0x0
RIRILV5OFFSET_2_MC_MAIN_REG
rir_rnk_tgt0: 0x0 rir_offset0: 0x0
RIRILV6OFFSET_2_MC_MAIN_REG
rir_rnk_tgt0: 0x0 rir_offset0: 0x0
RIRILV7OFFSET_2_MC_MAIN_REG
rir_rnk_tgt0: 0x0 rir_offset0: 0x0
RIRWAYNESSLIMIT_3_MC_MAIN_REG
rir_val: 0 rir_limit: 0x1F rir_way: 0x0
RIRILV0OFFSET_3_MC_MAIN_REG
rir_rnk_tgt0: 0x0 rir_offset0: 0x0
RIRILV1OFFSET_3_MC_MAIN_REG
rir_rnk_tgt0: 0x0 rir_offset0: 0x0
RIRILV2OFFSET_3_MC_MAIN_REG
rir_rnk_tgt0: 0x0 rir_offset0: 0x0
RIRILV3OFFSET_3_MC_MAIN_REG
rir_rnk_tgt0: 0x0 rir_offset0: 0x0
RIRILV4OFFSET_3_MC_MAIN_REG
rir_rnk_tgt0: 0x0 rir_offset0: 0x0
RIRILV5OFFSET_3_MC_MAIN_REG
rir_rnk_tgt0: 0x0 rir_offset0: 0x0
RIRILV6OFFSET_3_MC_MAIN_REG
rir_rnk_tgt0: 0x0 rir_offset0: 0x0
RIRILV7OFFSET_3_MC_MAIN_REG
rir_rnk_tgt0: 0x0 rir_offset0: 0x0
Channel - 6
RIRWAYNESSLIMIT_0_MC_MAIN_REG
rir_val: 1 rir_limit: 0x1F rir_way: 0x0
RIRILV0OFFSET_0_MC_MAIN_REG
rir_rnk_tgt0: 0x0 rir_offset0: 0x0
RIRILV1OFFSET_0_MC_MAIN_REG
rir_rnk_tgt0: 0x0 rir_offset0: 0x0
RIRILV2OFFSET_0_MC_MAIN_REG
rir_rnk_tgt0: 0x0 rir_offset0: 0x0
RIRILV3OFFSET_0_MC_MAIN_REG
rir_rnk_tgt0: 0x0 rir_offset0: 0x0
RIRILV4OFFSET_0_MC_MAIN_REG
rir_rnk_tgt0: 0x0 rir_offset0: 0x0
RIRILV5OFFSET_0_MC_MAIN_REG
rir_rnk_tgt0: 0x0 rir_offset0: 0x0
RIRILV6OFFSET_0_MC_MAIN_REG
rir_rnk_tgt0: 0x0 rir_offset0: 0x0
RIRILV7OFFSET_0_MC_MAIN_REG
rir_rnk_tgt0: 0x0 rir_offset0: 0x0
RIRWAYNESSLIMIT_1_MC_MAIN_REG
rir_val: 0 rir_limit: 0x1F rir_way: 0x0
RIRILV0OFFSET_1_MC_MAIN_REG
rir_rnk_tgt0: 0x0 rir_offset0: 0x0
RIRILV1OFFSET_1_MC_MAIN_REG
rir_rnk_tgt0: 0x0 rir_offset0: 0x0
RIRILV2OFFSET_1_MC_MAIN_REG
rir_rnk_tgt0: 0x0 rir_offset0: 0x0
RIRILV3OFFSET_1_MC_MAIN_REG
rir_rnk_tgt0: 0x0 rir_offset0: 0x0
RIRILV4OFFSET_1_MC_MAIN_REG
rir_rnk_tgt0: 0x0 rir_offset0: 0x0
RIRILV5OFFSET_1_MC_MAIN_REG
rir_rnk_tgt0: 0x0 rir_offset0: 0x0
RIRILV6OFFSET_1_MC_MAIN_REG
rir_rnk_tgt0: 0x0 rir_offset0: 0x0
RIRILV7OFFSET_1_MC_MAIN_REG
rir_rnk_tgt0: 0x0 rir_offset0: 0x0
RIRWAYNESSLIMIT_2_MC_MAIN_REG
rir_val: 0 rir_limit: 0x1F rir_way: 0x0
RIRILV0OFFSET_2_MC_MAIN_REG
rir_rnk_tgt0: 0x0 rir_offset0: 0x0
RIRILV1OFFSET_2_MC_MAIN_REG
rir_rnk_tgt0: 0x0 rir_offset0: 0x0
RIRILV2OFFSET_2_MC_MAIN_REG
rir_rnk_tgt0: 0x0 rir_offset0: 0x0
RIRILV3OFFSET_2_MC_MAIN_REG
rir_rnk_tgt0: 0x0 rir_offset0: 0x0
RIRILV4OFFSET_2_MC_MAIN_REG
rir_rnk_tgt0: 0x0 rir_offset0: 0x0
RIRILV5OFFSET_2_MC_MAIN_REG
rir_rnk_tgt0: 0x0 rir_offset0: 0x0
RIRILV6OFFSET_2_MC_MAIN_REG
rir_rnk_tgt0: 0x0 rir_offset0: 0x0
RIRILV7OFFSET_2_MC_MAIN_REG
rir_rnk_tgt0: 0x0 rir_offset0: 0x0
RIRWAYNESSLIMIT_3_MC_MAIN_REG
rir_val: 0 rir_limit: 0x1F rir_way: 0x0
RIRILV0OFFSET_3_MC_MAIN_REG
rir_rnk_tgt0: 0x0 rir_offset0: 0x0
RIRILV1OFFSET_3_MC_MAIN_REG
rir_rnk_tgt0: 0x0 rir_offset0: 0x0
RIRILV2OFFSET_3_MC_MAIN_REG
rir_rnk_tgt0: 0x0 rir_offset0: 0x0
RIRILV3OFFSET_3_MC_MAIN_REG
rir_rnk_tgt0: 0x0 rir_offset0: 0x0
RIRILV4OFFSET_3_MC_MAIN_REG
rir_rnk_tgt0: 0x0 rir_offset0: 0x0
RIRILV5OFFSET_3_MC_MAIN_REG
rir_rnk_tgt0: 0x0 rir_offset0: 0x0
RIRILV6OFFSET_3_MC_MAIN_REG
rir_rnk_tgt0: 0x0 rir_offset0: 0x0
RIRILV7OFFSET_3_MC_MAIN_REG
rir_rnk_tgt0: 0x0 rir_offset0: 0x0
^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^
Write CHA CSRs for Socket: 1
^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^
TWO_LM_CONFIG_CHA_PMA_REG
enable: 0x1 mask: 0x3F mask_hi: 0x0
HA_COH_CHABC_SAD1_REG
dis_spec_rd: 0x0
lowMemBase: 0x0
lowMemSize: 0x20
highMemBase: 0x40
highMemSize: 0xFE0
TOLM: 0x1F
TOHM: 0x101F
C00: CSR for wait4bothhalves bit: AMAP_MC_MAIN_REG: 0x49
C00: CSR for wait4bothhalves bit: AMAP_MC_MAIN_REG: 0x49
C00: CSR for wait4bothhalves bit: AMAP_MC_MAIN_REG: 0x49
C00: CSR for wait4bothhalves bit: AMAP_MC_MAIN_REG: 0x49
M2mTwoWayCache: Enable 0 NonPreferredWayMask 0x001 PreferredReadFirst 1
M2mTwoWayCache: Enable 0 NonPreferredWayMask 0x001 PreferredReadFirst 1
SGX memory map status: 1
ValidPrmrrBitMap: 0x0
PrmrrCountPerPackage: 4
CPU encryptable range count: 0
Enter MemReservePsmiBuffers
Volatile memory mode not in 1LM, cannot allocate PSMI buffers.
Memory could not be reserved for PSMI buffers
N0:
<AdjustMemorySizeFieldsforMirror>
N1:
<AdjustMemorySizeFieldsforMirror>
N2:
<AdjustMemorySizeFieldsforMirror>
N3:
<AdjustMemorySizeFieldsforMirror>
N0: Total NM size:0x20
N0: SktTotMemMapSPA:0x0
N0: PMem performance knobs override disabled
N1: Total NM size:0x20
N1: SktTotMemMapSPA:0x0
N1: PMem performance knobs override disabled
DDR clustering mode is SNC4
[ScktId: 0] Initialize Memory Map - 16853ms
[ScktId: 1] Pipe Sync SBSP Variable Data -- Started
[ScktId: 0] Pipe Sync SBSP Variable Data -- Started
[ScktId: 1] Pipe Sync SBSP Variable Data - 15ms
[ScktId: 0] Pipe Sync SBSP Variable Data - 15ms
[ScktId: 1] Pipe Sync SBSP Memory Mode -- Started
[ScktId: 0] Pipe Sync SBSP Memory Mode -- Started
[ScktId: 1] Pipe Sync SBSP Memory Mode - 41ms
[ScktId: 0] Pipe Sync SBSP Memory Mode - 36ms
N1 Checked into Pipe
[ScktId: 0] TME Init Flow -- Started
[TME] Error: There is no TME encryptable memory ranges present in the system. Disabling TME...
[TME] 2lm detected! Disabling TME.
[ScktId: 0] TME Init Flow - 21ms
[ScktId: 1] Pipe Sync AP Final Error Sync -- Started
[ScktId: 0] Pipe Sync AP Final Error Sync -- Started
[ScktId: 1] Pipe Sync AP Final Error Sync - 10ms
[ScktId: 0] Pipe Sync AP Final Error Sync - 10ms
[ScktId: 1] MK-TME Flow -- Started
[ScktId: 0] MK-TME Flow -- Started
[ScktId: 1] MK-TME Flow - 12ms
[ScktId: 0] MK-TME Flow - 7ms
[ScktId: 1] Pipe Sync AP Final Error Sync -- Started
[ScktId: 0] Pipe Sync AP Final Error Sync -- Started
[ScktId: 1] Pipe Sync AP Final Error Sync - 13ms
[ScktId: 0] Pipe Sync AP Final Error Sync - 10ms
[ScktId: 1] TME Flow - PROGRAM_MSRS -- Started
[ScktId: 0] TME Flow - PROGRAM_MSRS -- Started
[ScktId: 0] TME Flow - PROGRAM_MSRS - 9ms
[ScktId: 1] TME Flow - PROGRAM_MSRS - 14ms
[ScktId: 0] Pipe Sync AP Final Error Sync -- Started
[ScktId: 1] Pipe Sync AP Final Error Sync -- Started
[ScktId: 1] Pipe Sync AP Final Error Sync - 10ms
[ScktId: 0] Pipe Sync AP Final Error Sync - 14ms
[ScktId: 1] SGX PreMem Check Capability MT -- Started
[ScktId: 0] SGX PreMem Check Capability MT -- Started
IsSafCapSupportedMt: MSR_FUSA_CAPABILITIES SafCap.Uint32 0xFE970AB800000011
[ScktId: 1] SGX PreMem Check Capability MT - 24ms
[ScktId: 0] SGX PreMem Check Capability MT - 19ms
[ScktId: 1] Pipe Sync AP Final Error Sync -- Started
[ScktId: 0] Pipe Sync AP Final Error Sync -- Started
[ScktId: 1] Pipe Sync AP Final Error Sync - 15ms
[ScktId: 0] Pipe Sync AP Final Error Sync - 10ms
[ScktId: 1] SGX PreMem Init -- Started
[ScktId: 0] SGX PreMem Init -- Started
[SGX] SgxPreMemInitSbsp BEGIN
[SGX] VerifyFeatureControl BEGIN
[SGX] MSR_IA32_FEATURE_CONTROL 0x0000000000000000
[SGX] SecurityPolicy.EnableSgx 0 SecurityPolicy.SgxLaunchControlEnable 1
[SGX] VerifyFeatureControl END
[SGX] VerifyHardwarePreconditions BEGIN
[SGX] VerifyHardwarePreconditions END
[ScktId: 1] SGX PreMem Init - 42ms
Error: GetSgxPrmrrData (Unsupported), continue...
[ScktId: 1] Pipe Sync AP Final Error Sync -- Started
Memory configuration is NOT valid for SGX!
SgxErrorCode = 0x19
[SGX] SgxPreMemInitSbsp END
[ScktId: 0] SGX PreMem Init - 61ms
[ScktId: 0] Pipe Sync AP Final Error Sync -- Started
[ScktId: 1] Pipe Sync AP Final Error Sync - 28ms
[ScktId: 0] Pipe Sync AP Final Error Sync - 5ms
[ScktId: 1] HBM Normal Mode -- Started
[ScktId: 0] HBM Normal Mode -- Started
HbmioMailbox - Disabling HBMIO uController
HbmioMailbox - Disabling HBMIO uController
Executing uc_halt on Socket 1, HBMIO 0
Executing uc_halt on Socket 0, HBMIO 0
Executing uc_halt on Socket 1, HBMIO 1
Executing uc_halt on Socket 0, HBMIO 1
Executing uc_halt on Socket 1, HBMIO 2
Executing uc_halt on Socket 0, HBMIO 2
Executing uc_halt on Socket 1, HBMIO 3
Executing uc_halt on Socket 0, HBMIO 3
Cmi Option Auto Selected
Cmi Option Auto Selected
[ScktId: 1] HBM Normal Mode - 55ms
[ScktId: 0] HBM Normal Mode - 53ms
[ScktId: 1] AP HBM Information -- Started
[ScktId: 0] AP HBM Information -- Started
[ScktId: 0] AP HBM Information - 9ms
[ScktId: 1] AP HBM Information - 13ms
[ScktId: 0] Switch to Normal Mode -- Started
[ScktId: 1] Switch to Normal Mode -- Started
S0 TME CPUID = 1
S1 TME CPUID = 1
S0 TmeActivated = 0
S1 TmeActivated = 0
S0 TME CPUID = 1
S1 TME CPUID = 1
S0 TmeActivated = 0
S1 TmeActivated = 0
S0 TME CPUID = 1
S1 TME CPUID = 1
S0 TmeActivated = 0
S1 TmeActivated = 0
S0 TME CPUID = 1
S1 TME CPUID = 1
S0 TmeActivated = 0
S1 TmeActivated = 0
S0 TME CPUID = 1
S1 TME CPUID = 1
S0 TmeActivated = 0
S1 TmeActivated = 0
S0 TME CPUID = 1
S1 TME CPUID = 1
S0 TmeActivated = 0
S1 TmeActivated = 0
S0 TME CPUID = 1
S1 TME CPUID = 1
S0 TmeActivated = 0
S1 TmeActivated = 0
S0 TME CPUID = 1
S1 TME CPUID = 1
S0 TmeActivated = 0
S1 TmeActivated = 0
S0 TME CPUID = 1
S1 TME CPUID = 1
S0 IntegrityActivated = 0
S1 IntegrityActivated = 0
DDRT-Link-Failure-WA-Applied: err_ack_timer_limit = 0xF0
DDRT-Link-Failure-WA-Applied: err_ack_timer_limit = 0xF0
DDRT-Link-Failure-WA-Applied: err_ack_cnt_limit = 0x0
DDRT-Link-Failure-WA-Applied: err_ack_cnt_limit = 0x0
DDRT-Link-Failure-WA-Applied: err_ack_timer_limit = 0xF0
DDRT-Link-Failure-WA-Applied: err_ack_timer_limit = 0xF0
DDRT-Link-Failure-WA-Applied: err_ack_cnt_limit = 0x0
DDRT-Link-Failure-WA-Applied: err_ack_cnt_limit = 0x0
DDRT-Link-Failure-WA-Applied: err_ack_timer_limit = 0xF0
DDRT-Link-Failure-WA-Applied: err_ack_timer_limit = 0xF0
DDRT-Link-Failure-WA-Applied: err_ack_cnt_limit = 0x0
DDRT-Link-Failure-WA-Applied: err_ack_cnt_limit = 0x0
DDRT-Link-Failure-WA-Applied: err_ack_timer_limit = 0xF0
DDRT-Link-Failure-WA-Applied: err_ack_timer_limit = 0xF0
DDRT-Link-Failure-WA-Applied: err_ack_cnt_limit = 0x0
DDRT-Link-Failure-WA-Applied: err_ack_cnt_limit = 0x0
LpModePmControlN0.Data Original = 0x88063
LpModePmControlN0.Data Original = 0x88063
LpModePmControlN1.Data Original = 0x71D00
LpModePmControlN1.Data Original = 0x71D00
LpModePmControlN0.Bits.datadllwakeuptime = 0x3
LpModePmControlN0.Bits.datadllwakeuptime = 0x3
LpModePmControlN1.Bits.datadllwakeuptime = 0x6
LpModePmControlN1.Bits.datadllwakeuptime = 0x6
MininalTclByHCLK = 0x13
MininalTclByHCLK = 0x13
LpModePmControlN0.Bits.lpmode_block_rd = 0x8
LpModePmControlN0.Bits.lpmode_block_rd = 0x8
LpModePmControlN0.Data New = 0xC1088063
LpModePmControlN0.Data New = 0xC1088063
LpModePmControlN1.Data New = 0x71D86
LpModePmControlN1.Data New = 0x71D86
LpModePmControlN0.Data Original = 0x88063
LpModePmControlN0.Data Original = 0x88063
LpModePmControlN1.Data Original = 0x71D00
LpModePmControlN1.Data Original = 0x71D00
LpModePmControlN0.Bits.datadllwakeuptime = 0x3
LpModePmControlN0.Bits.datadllwakeuptime = 0x3
LpModePmControlN1.Bits.datadllwakeuptime = 0x6
LpModePmControlN1.Bits.datadllwakeuptime = 0x6
MininalTclByHCLK = 0x13
MininalTclByHCLK = 0x13
LpModePmControlN0.Bits.lpmode_block_rd = 0x8
LpModePmControlN0.Bits.lpmode_block_rd = 0x8
LpModePmControlN0.Data New = 0xC1088063
LpModePmControlN0.Data New = 0xC1088063
LpModePmControlN1.Data New = 0x71D86
LpModePmControlN1.Data New = 0x71D86
LpModePmControlN0.Data Original = 0x88063
LpModePmControlN0.Data Original = 0x88063
LpModePmControlN1.Data Original = 0x71D00
LpModePmControlN1.Data Original = 0x71D00
LpModePmControlN0.Bits.datadllwakeuptime = 0x3
LpModePmControlN0.Bits.datadllwakeuptime = 0x3
LpModePmControlN1.Bits.datadllwakeuptime = 0x6
LpModePmControlN1.Bits.datadllwakeuptime = 0x6
MininalTclByHCLK = 0x13
MininalTclByHCLK = 0x13
LpModePmControlN0.Bits.lpmode_block_rd = 0x8
LpModePmControlN0.Bits.lpmode_block_rd = 0x8
LpModePmControlN0.Data New = 0xC1088063
LpModePmControlN0.Data New = 0xC1088063
LpModePmControlN1.Data New = 0x71D86
LpModePmControlN1.Data New = 0x71D86
LpModePmControlN0.Data Original = 0x88063
LpModePmControlN0.Data Original = 0x88063
LpModePmControlN1.Data Original = 0x71D00
LpModePmControlN1.Data Original = 0x71D00
LpModePmControlN0.Bits.datadllwakeuptime = 0x3
LpModePmControlN0.Bits.datadllwakeuptime = 0x3
LpModePmControlN1.Bits.datadllwakeuptime = 0x6
LpModePmControlN1.Bits.datadllwakeuptime = 0x6
MininalTclByHCLK = 0x13
MininalTclByHCLK = 0x13
LpModePmControlN0.Bits.lpmode_block_rd = 0x8
LpModePmControlN0.Bits.lpmode_block_rd = 0x8
LpModePmControlN0.Data New = 0xC1088063
LpModePmControlN0.Data New = 0xC1088063
LpModePmControlN1.Data New = 0x71D86
LpModePmControlN1.Data New = 0x71D86
[ScktId: 0] Switch to Normal Mode - 435ms
[ScktId: 1] Switch to Normal Mode - 435ms
[ScktId: 0] Init CMI Credit Programming -- Started
[ScktId: 1] Init CMI Credit Programming -- Started
Cmi Option Auto Selected
Cmi Option Auto Selected
MemMc Cmi Data Version: 1
MemMc Cmi Data Version: 1
S0 TME CPUID = 1
S1 TME CPUID = 1
S0 TmeActivated = 0
S1 TmeActivated = 0
TmeEnabled: 0
TmeEnabled: 0
TwoLmEnabled: 0
TwoLmEnabled: 0
2LM_XTILE: 0
2LM_XTILE: 0
CMI Credit Data for CPU Stepping: Ex and Later
CMI Credit Data for CPU Stepping: Ex and Later
S0 TME CPUID = 1
S1 TME CPUID = 1
S0 TmeActivated = 0
S1 TmeActivated = 0
TmeEnabled: 0
TmeEnabled: 0
TwoLmEnabled: 0
TwoLmEnabled: 0
2LM_XTILE: 0
2LM_XTILE: 0
CMI Credit Data for CPU Stepping: Ex and Later
CMI Credit Data for CPU Stepping: Ex and Later
S0 TME CPUID = 1
S1 TME CPUID = 1
S0 TmeActivated = 0
S1 TmeActivated = 0
TmeEnabled: 0
TmeEnabled: 0
TwoLmEnabled: 0
TwoLmEnabled: 0
2LM_XTILE: 0
2LM_XTILE: 0
CMI Credit Data for CPU Stepping: Ex and Later
CMI Credit Data for CPU Stepping: Ex and Later
S0 TME CPUID = 1
S1 TME CPUID = 1
S0 TmeActivated = 0
S1 TmeActivated = 0
TmeEnabled: 0
TmeEnabled: 0
TwoLmEnabled: 0
TwoLmEnabled: 0
2LM_XTILE: 0
2LM_XTILE: 0
CMI Credit Data for CPU Stepping: Ex and Later
CMI Credit Data for CPU Stepping: Ex and Later
S0 TME CPUID = 1
S1 TME CPUID = 1
S0 TmeActivated = 0
S1 TmeActivated = 0
TmeEnabled: 0
TmeEnabled: 0
TwoLmEnabled: 0
TwoLmEnabled: 0
2LM_XTILE: 0
2LM_XTILE: 0
CMI Credit Data for CPU Stepping: Ex and Later
CMI Credit Data for CPU Stepping: Ex and Later
S0 TME CPUID = 1
S1 TME CPUID = 1
S0 TmeActivated = 0
S1 TmeActivated = 0
TmeEnabled: 0
TmeEnabled: 0
TwoLmEnabled: 0
TwoLmEnabled: 0
2LM_XTILE: 0
2LM_XTILE: 0
CMI Credit Data for CPU Stepping: Ex and Later
CMI Credit Data for CPU Stepping: Ex and Later
S0 TME CPUID = 1
S1 TME CPUID = 1
S0 TmeActivated = 0
S1 TmeActivated = 0
TmeEnabled: 0
TmeEnabled: 0
TwoLmEnabled: 0
TwoLmEnabled: 0
2LM_XTILE: 0
2LM_XTILE: 0
CMI Credit Data for CPU Stepping: Ex and Later
CMI Credit Data for CPU Stepping: Ex and Later
S0 TME CPUID = 1
S1 TME CPUID = 1
S0 TmeActivated = 0
S1 TmeActivated = 0
TmeEnabled: 0
TmeEnabled: 0
TwoLmEnabled: 0
TwoLmEnabled: 0
2LM_XTILE: 0
2LM_XTILE: 0
CMI Credit Data for CPU Stepping: Ex and Later
CMI Credit Data for CPU Stepping: Ex and Later
S0 TME CPUID = 1
S1 TME CPUID = 1
S0 TmeActivated = 0
S1 TmeActivated = 0
TmeEnabled: 0
TmeEnabled: 0
TwoLmEnabled: 0
TwoLmEnabled: 0
2LM_XTILE: 0
2LM_XTILE: 0
CMI Credit Data for CPU Stepping: Ex and Later
CMI Credit Data for CPU Stepping: Ex and Later
S0 TME CPUID = 1
S1 TME CPUID = 1
S0 TmeActivated = 0
S1 TmeActivated = 0
TmeEnabled: 0
TmeEnabled: 0
TwoLmEnabled: 0
TwoLmEnabled: 0
2LM_XTILE: 0
2LM_XTILE: 0
CMI Credit Data for CPU Stepping: Ex and Later
CMI Credit Data for CPU Stepping: Ex and Later
S0 TME CPUID = 1
S1 TME CPUID = 1
S0 TmeActivated = 0
S1 TmeActivated = 0
TmeEnabled: 0
TmeEnabled: 0
TwoLmEnabled: 0
TwoLmEnabled: 0
2LM_XTILE: 0
2LM_XTILE: 0
CMI Credit Data for CPU Stepping: Ex and Later
CMI Credit Data for CPU Stepping: Ex and Later
S0 TME CPUID = 1
S1 TME CPUID = 1
S0 TmeActivated = 0
S1 TmeActivated = 0
TmeEnabled: 0
TmeEnabled: 0
TwoLmEnabled: 0
TwoLmEnabled: 0
2LM_XTILE: 0
2LM_XTILE: 0
CMI Credit Data for CPU Stepping: Ex and Later
CMI Credit Data for CPU Stepping: Ex and Later
S0 TME CPUID = 1
S1 TME CPUID = 1
S0 TmeActivated = 0
S1 TmeActivated = 0
TmeEnabled: 0
TmeEnabled: 0
TwoLmEnabled: 0
TwoLmEnabled: 0
2LM_XTILE: 0
2LM_XTILE: 0
CMI Credit Data for CPU Stepping: Ex and Later
CMI Credit Data for CPU Stepping: Ex and Later
S0 TME CPUID = 1
S1 TME CPUID = 1
S0 TmeActivated = 0
S1 TmeActivated = 0
TmeEnabled: 0
TmeEnabled: 0
TwoLmEnabled: 0
TwoLmEnabled: 0
2LM_XTILE: 0
2LM_XTILE: 0
CMI Credit Data for CPU Stepping: Ex and Later
CMI Credit Data for CPU Stepping: Ex and Later
S0 TME CPUID = 1
S1 TME CPUID = 1
S0 TmeActivated = 0
S1 TmeActivated = 0
TmeEnabled: 0
TmeEnabled: 0
TwoLmEnabled: 0
TwoLmEnabled: 0
2LM_XTILE: 0
2LM_XTILE: 0
CMI Credit Data for CPU Stepping: Ex and Later
CMI Credit Data for CPU Stepping: Ex and Later
S0 TME CPUID = 1
S1 TME CPUID = 1
S0 TmeActivated = 0
S1 TmeActivated = 0
TmeEnabled: 0
TmeEnabled: 0
TwoLmEnabled: 0
TwoLmEnabled: 0
2LM_XTILE: 0
2LM_XTILE: 0
CMI Credit Data for CPU Stepping: Ex and Later
CMI Credit Data for CPU Stepping: Ex and Later
S0 TME CPUID = 1
S1 TME CPUID = 1
S0 TmeActivated = 0
S1 TmeActivated = 0
TmeEnabled: 0
TmeEnabled: 0
TwoLmEnabled: 0
TwoLmEnabled: 0
2LM_XTILE: 0
2LM_XTILE: 0
CMI Credit Data for CPU Stepping: Ex and Later
CMI Credit Data for CPU Stepping: Ex and Later
S0 TME CPUID = 1
S1 TME CPUID = 1
S0 TmeActivated = 0
S1 TmeActivated = 0
TmeEnabled: 0
TmeEnabled: 0
TwoLmEnabled: 0
TwoLmEnabled: 0
2LM_XTILE: 0
2LM_XTILE: 0
CMI Credit Data for CPU Stepping: Ex and Later
CMI Credit Data for CPU Stepping: Ex and Later
S0 TME CPUID = 1
S1 TME CPUID = 1
S0 TmeActivated = 0
S1 TmeActivated = 0
TmeEnabled: 0
TmeEnabled: 0
TwoLmEnabled: 0
TwoLmEnabled: 0
2LM_XTILE: 0
2LM_XTILE: 0
CMI Credit Data for CPU Stepping: Ex and Later
CMI Credit Data for CPU Stepping: Ex and Later
S0 TME CPUID = 1
S1 TME CPUID = 1
S0 TmeActivated = 0
S1 TmeActivated = 0
TmeEnabled: 0
TmeEnabled: 0
TwoLmEnabled: 0
TwoLmEnabled: 0
2LM_XTILE: 0
2LM_XTILE: 0
CMI Credit Data for CPU Stepping: Ex and Later
CMI Credit Data for CPU Stepping: Ex and Later
S0 TME CPUID = 1
S1 TME CPUID = 1
S0 TmeActivated = 0
S1 TmeActivated = 0
TmeEnabled: 0
TmeEnabled: 0
TwoLmEnabled: 0
TwoLmEnabled: 0
2LM_XTILE: 0
2LM_XTILE: 0
CMI Credit Data for CPU Stepping: Ex and Later
CMI Credit Data for CPU Stepping: Ex and Later
S0 TME CPUID = 1
S1 TME CPUID = 1
S0 TmeActivated = 0
S1 TmeActivated = 0
TmeEnabled: 0
TmeEnabled: 0
TwoLmEnabled: 0
TwoLmEnabled: 0
2LM_XTILE: 0
2LM_XTILE: 0
CMI Credit Data for CPU Stepping: Ex and Later
CMI Credit Data for CPU Stepping: Ex and Later
S0 TME CPUID = 1
S1 TME CPUID = 1
S0 TmeActivated = 0
S1 TmeActivated = 0
TmeEnabled: 0
TmeEnabled: 0
TwoLmEnabled: 0
TwoLmEnabled: 0
2LM_XTILE: 0
2LM_XTILE: 0
CMI Credit Data for CPU Stepping: Ex and Later
CMI Credit Data for CPU Stepping: Ex and Later
S0 TME CPUID = 1
S1 TME CPUID = 1
S0 TmeActivated = 0
S1 TmeActivated = 0
TmeEnabled: 0
TmeEnabled: 0
TwoLmEnabled: 0
TwoLmEnabled: 0
2LM_XTILE: 0
2LM_XTILE: 0
CMI Credit Data for CPU Stepping: Ex and Later
CMI Credit Data for CPU Stepping: Ex and Later
S0 TME CPUID = 1
S1 TME CPUID = 1
S0 TmeActivated = 0
S1 TmeActivated = 0
TmeEnabled: 0
TmeEnabled: 0
TwoLmEnabled: 0
TwoLmEnabled: 0
2LM_XTILE: 0
2LM_XTILE: 0
CMI Credit Data for CPU Stepping: Ex and Later
CMI Credit Data for CPU Stepping: Ex and Later
S0 TME CPUID = 1
S1 TME CPUID = 1
S0 TmeActivated = 0
S1 TmeActivated = 0
TmeEnabled: 0
TmeEnabled: 0
TwoLmEnabled: 0
TwoLmEnabled: 0
2LM_XTILE: 0
2LM_XTILE: 0
CMI Credit Data for CPU Stepping: Ex and Later
CMI Credit Data for CPU Stepping: Ex and Later
S0 TME CPUID = 1
S1 TME CPUID = 1
S0 TmeActivated = 0
S1 TmeActivated = 0
TmeEnabled: 0
TmeEnabled: 0
TwoLmEnabled: 0
TwoLmEnabled: 0
2LM_XTILE: 0
2LM_XTILE: 0
CMI Credit Data for CPU Stepping: Ex and Later
CMI Credit Data for CPU Stepping: Ex and Later
S0 TME CPUID = 1
S1 TME CPUID = 1
S0 TmeActivated = 0
S1 TmeActivated = 0
TmeEnabled: 0
TmeEnabled: 0
TwoLmEnabled: 0
TwoLmEnabled: 0
2LM_XTILE: 0
2LM_XTILE: 0
CMI Credit Data for CPU Stepping: Ex and Later
CMI Credit Data for CPU Stepping: Ex and Later
S0 TME CPUID = 1
S1 TME CPUID = 1
S0 TmeActivated = 0
S1 TmeActivated = 0
TmeEnabled: 0
TmeEnabled: 0
TwoLmEnabled: 0
TwoLmEnabled: 0
2LM_XTILE: 0
2LM_XTILE: 0
CMI Credit Data for CPU Stepping: Ex and Later
CMI Credit Data for CPU Stepping: Ex and Later
S0 TME CPUID = 1
S1 TME CPUID = 1
S0 TmeActivated = 0
S1 TmeActivated = 0
TmeEnabled: 0
TmeEnabled: 0
TwoLmEnabled: 0
TwoLmEnabled: 0
2LM_XTILE: 0
2LM_XTILE: 0
CMI Credit Data for CPU Stepping: Ex and Later
CMI Credit Data for CPU Stepping: Ex and Later
S0 TME CPUID = 1
S1 TME CPUID = 1
S0 TmeActivated = 0
S1 TmeActivated = 0
TmeEnabled: 0
TmeEnabled: 0
TwoLmEnabled: 0
TwoLmEnabled: 0
2LM_XTILE: 0
2LM_XTILE: 0
CMI Credit Data for CPU Stepping: Ex and Later
CMI Credit Data for CPU Stepping: Ex and Later
S0 TME CPUID = 1
S1 TME CPUID = 1
S0 TmeActivated = 0
S1 TmeActivated = 0
TmeEnabled: 0
TmeEnabled: 0
TwoLmEnabled: 0
TwoLmEnabled: 0
2LM_XTILE: 0
2LM_XTILE: 0
CMI Credit Data for CPU Stepping: Ex and Later
CMI Credit Data for CPU Stepping: Ex and Later
S0 TME CPUID = 1
S1 TME CPUID = 1
S0 TmeActivated = 0
S1 TmeActivated = 0
TmeEnabled: 0
TmeEnabled: 0
TwoLmEnabled: 0
TwoLmEnabled: 0
2LM_XTILE: 0
2LM_XTILE: 0
CMI Credit Data for CPU Stepping: Ex and Later
CMI Credit Data for CPU Stepping: Ex and Later
S0 TME CPUID = 1
S1 TME CPUID = 1
S0 TmeActivated = 0
S1 TmeActivated = 0
TmeEnabled: 0
TmeEnabled: 0
TwoLmEnabled: 0
TwoLmEnabled: 0
2LM_XTILE: 0
2LM_XTILE: 0
CMI Credit Data for CPU Stepping: Ex and Later
CMI Credit Data for CPU Stepping: Ex and Later
S0 TME CPUID = 1
S1 TME CPUID = 1
S0 TmeActivated = 0
S1 TmeActivated = 0
TmeEnabled: 0
TmeEnabled: 0
TwoLmEnabled: 0
TwoLmEnabled: 0
2LM_XTILE: 0
2LM_XTILE: 0
CMI Credit Data for CPU Stepping: Ex and Later
CMI Credit Data for CPU Stepping: Ex and Later
S0 TME CPUID = 1
S1 TME CPUID = 1
S0 TmeActivated = 0
S1 TmeActivated = 0
TmeEnabled: 0
TmeEnabled: 0
TwoLmEnabled: 0
TwoLmEnabled: 0
2LM_XTILE: 0
2LM_XTILE: 0
CMI Credit Data for CPU Stepping: Ex and Later
CMI Credit Data for CPU Stepping: Ex and Later
Mesh2Mem CMI Data Version: 1
Mesh2Mem CMI Data Version: 1
S0 TME CPUID = 1
S1 TME CPUID = 1
S0 TmeActivated = 0
S1 TmeActivated = 0
TmeEnabled: 0
TmeEnabled: 0
TwoLmEnabled: 0
TwoLmEnabled: 0
2LM_XTILE: 0
2LM_XTILE: 0
CMI Credit Data for CPU Stepping: Ex and Later
CMI Credit Data for CPU Stepping: Ex and Later
S0 TME CPUID = 1
S1 TME CPUID = 1
S0 TmeActivated = 0
S1 TmeActivated = 0
TmeEnabled: 0
TmeEnabled: 0
TwoLmEnabled: 0
TwoLmEnabled: 0
2LM_XTILE: 0
2LM_XTILE: 0
CMI Credit Data for CPU Stepping: Ex and Later
CMI Credit Data for CPU Stepping: Ex and Later
S0 TME CPUID = 1
S1 TME CPUID = 1
S0 TmeActivated = 0
S1 TmeActivated = 0
TmeEnabled: 0
TmeEnabled: 0
TwoLmEnabled: 0
TwoLmEnabled: 0
2LM_XTILE: 0
2LM_XTILE: 0
CMI Credit Data for CPU Stepping: Ex and Later
CMI Credit Data for CPU Stepping: Ex and Later
S0 TME CPUID = 1
S1 TME CPUID = 1
S0 TmeActivated = 0
S1 TmeActivated = 0
McTme CMI Data Version: 1
McTme CMI Data Version: 1
S0 TME CPUID = 1
S1 TME CPUID = 1
S0 TmeActivated = 0
S1 TmeActivated = 0
TmeEnabled: 0
TmeEnabled: 0
TwoLmEnabled: 0
TwoLmEnabled: 0
2LM_XTILE: 0
2LM_XTILE: 0
CMI Credit Data for CPU Stepping: Ex and Later
CMI Credit Data for CPU Stepping: Ex and Later
S0 TME CPUID = 1
S1 TME CPUID = 1
S0 TmeActivated = 0
S1 TmeActivated = 0
TmeEnabled: 0
TmeEnabled: 0
TwoLmEnabled: 0
TwoLmEnabled: 0
2LM_XTILE: 0
2LM_XTILE: 0
CMI Credit Data for CPU Stepping: Ex and Later
CMI Credit Data for CPU Stepping: Ex and Later
S0 TME CPUID = 1
S1 TME CPUID = 1
S0 TmeActivated = 0
S1 TmeActivated = 0
TmeEnabled: 0
TmeEnabled: 0
TwoLmEnabled: 0
TwoLmEnabled: 0
2LM_XTILE: 0
2LM_XTILE: 0
CMI Credit Data for CPU Stepping: Ex and Later
CMI Credit Data for CPU Stepping: Ex and Later
S0 TME CPUID = 1
S1 TME CPUID = 1
S0 TmeActivated = 0
S1 TmeActivated = 0
TmeEnabled: 0
TmeEnabled: 0
TwoLmEnabled: 0
TwoLmEnabled: 0
2LM_XTILE: 0
2LM_XTILE: 0
CMI Credit Data for CPU Stepping: Ex and Later
CMI Credit Data for CPU Stepping: Ex and Later
S0 TME CPUID = 1
S1 TME CPUID = 1
S0 TmeActivated = 0
S1 TmeActivated = 0
TmeEnabled: 0
TmeEnabled: 0
TwoLmEnabled: 0
TwoLmEnabled: 0
2LM_XTILE: 0
2LM_XTILE: 0
CMI Credit Data for CPU Stepping: Ex and Later
CMI Credit Data for CPU Stepping: Ex and Later
Mesh2Mem CMI Data Version: 1
Mesh2Mem CMI Data Version: 1
S0 TME CPUID = 1
S1 TME CPUID = 1
S0 TmeActivated = 0
S1 TmeActivated = 0
TmeEnabled: 0
TmeEnabled: 0
TwoLmEnabled: 0
TwoLmEnabled: 0
2LM_XTILE: 0
2LM_XTILE: 0
CMI Credit Data for CPU Stepping: Ex and Later
CMI Credit Data for CPU Stepping: Ex and Later
S0 TME CPUID = 1
S1 TME CPUID = 1
S0 TmeActivated = 0
S1 TmeActivated = 0
TmeEnabled: 0
TmeEnabled: 0
TwoLmEnabled: 0
TwoLmEnabled: 0
2LM_XTILE: 0
2LM_XTILE: 0
CMI Credit Data for CPU Stepping: Ex and Later
CMI Credit Data for CPU Stepping: Ex and Later
S0 TME CPUID = 1
S1 TME CPUID = 1
S0 TmeActivated = 0
S1 TmeActivated = 0
TmeEnabled: 0
TmeEnabled: 0
TwoLmEnabled: 0
TwoLmEnabled: 0
2LM_XTILE: 0
2LM_XTILE: 0
CMI Credit Data for CPU Stepping: Ex and Later
CMI Credit Data for CPU Stepping: Ex and Later
S0 TME CPUID = 1
S1 TME CPUID = 1
S0 TmeActivated = 0
S1 TmeActivated = 0
S0 TME CPUID = 1
S1 TME CPUID = 1
S0 TmeActivated = 0
S1 TmeActivated = 0
TmeEnabled: 0
TmeEnabled: 0
TwoLmEnabled: 0
TwoLmEnabled: 0
2LM_XTILE: 0
2LM_XTILE: 0
CMI Credit Data for CPU Stepping: Ex and Later
CMI Credit Data for CPU Stepping: Ex and Later
S0 TME CPUID = 1
S1 TME CPUID = 1
S0 TmeActivated = 0
S1 TmeActivated = 0
TmeEnabled: 0
TmeEnabled: 0
TwoLmEnabled: 0
TwoLmEnabled: 0
2LM_XTILE: 0
2LM_XTILE: 0
CMI Credit Data for CPU Stepping: Ex and Later
CMI Credit Data for CPU Stepping: Ex and Later
S0 TME CPUID = 1
S1 TME CPUID = 1
S0 TmeActivated = 0
S1 TmeActivated = 0
TmeEnabled: 0
TmeEnabled: 0
TwoLmEnabled: 0
TwoLmEnabled: 0
2LM_XTILE: 0
2LM_XTILE: 0
CMI Credit Data for CPU Stepping: Ex and Later
CMI Credit Data for CPU Stepping: Ex and Later
S0 TME CPUID = 1
S1 TME CPUID = 1
S0 TmeActivated = 0
S1 TmeActivated = 0
TmeEnabled: 0
TmeEnabled: 0
TwoLmEnabled: 0
TwoLmEnabled: 0
2LM_XTILE: 0
2LM_XTILE: 0
CMI Credit Data for CPU Stepping: Ex and Later
CMI Credit Data for CPU Stepping: Ex and Later
S0 TME CPUID = 1
S1 TME CPUID = 1
S0 TmeActivated = 0
S1 TmeActivated = 0
TmeEnabled: 0
TmeEnabled: 0
TwoLmEnabled: 0
TwoLmEnabled: 0
2LM_XTILE: 0
2LM_XTILE: 0
CMI Credit Data for CPU Stepping: Ex and Later
CMI Credit Data for CPU Stepping: Ex and Later
Mesh2Mem CMI Data Version: 1
Mesh2Mem CMI Data Version: 1
S0 TME CPUID = 1
S1 TME CPUID = 1
S0 TmeActivated = 0
S1 TmeActivated = 0
TmeEnabled: 0
TmeEnabled: 0
TwoLmEnabled: 0
TwoLmEnabled: 0
2LM_XTILE: 0
2LM_XTILE: 0
CMI Credit Data for CPU Stepping: Ex and Later
CMI Credit Data for CPU Stepping: Ex and Later
S0 TME CPUID = 1
S1 TME CPUID = 1
S0 TmeActivated = 0
S1 TmeActivated = 0
TmeEnabled: 0
TmeEnabled: 0
TwoLmEnabled: 0
TwoLmEnabled: 0
2LM_XTILE: 0
2LM_XTILE: 0
CMI Credit Data for CPU Stepping: Ex and Later
CMI Credit Data for CPU Stepping: Ex and Later
S0 TME CPUID = 1
S1 TME CPUID = 1
S0 TmeActivated = 0
S1 TmeActivated = 0
TmeEnabled: 0
TmeEnabled: 0
TwoLmEnabled: 0
TwoLmEnabled: 0
2LM_XTILE: 0
2LM_XTILE: 0
CMI Credit Data for CPU Stepping: Ex and Later
CMI Credit Data for CPU Stepping: Ex and Later
S0 TME CPUID = 1
S1 TME CPUID = 1
S0 TmeActivated = 0
S1 TmeActivated = 0
S0 TME CPUID = 1
S1 TME CPUID = 1
S0 TmeActivated = 0
S1 TmeActivated = 0
TmeEnabled: 0
TmeEnabled: 0
TwoLmEnabled: 0
TwoLmEnabled: 0
2LM_XTILE: 0
2LM_XTILE: 0
CMI Credit Data for CPU Stepping: Ex and Later
CMI Credit Data for CPU Stepping: Ex and Later
S0 TME CPUID = 1
S1 TME CPUID = 1
S0 TmeActivated = 0
S1 TmeActivated = 0
TmeEnabled: 0
TmeEnabled: 0
TwoLmEnabled: 0
TwoLmEnabled: 0
2LM_XTILE: 0
2LM_XTILE: 0
CMI Credit Data for CPU Stepping: Ex and Later
CMI Credit Data for CPU Stepping: Ex and Later
S0 TME CPUID = 1
S1 TME CPUID = 1
S0 TmeActivated = 0
S1 TmeActivated = 0
TmeEnabled: 0
TmeEnabled: 0
TwoLmEnabled: 0
TwoLmEnabled: 0
2LM_XTILE: 0
2LM_XTILE: 0
CMI Credit Data for CPU Stepping: Ex and Later
CMI Credit Data for CPU Stepping: Ex and Later
S0 TME CPUID = 1
S1 TME CPUID = 1
S0 TmeActivated = 0
S1 TmeActivated = 0
TmeEnabled: 0
TmeEnabled: 0
TwoLmEnabled: 0
TwoLmEnabled: 0
2LM_XTILE: 0
2LM_XTILE: 0
CMI Credit Data for CPU Stepping: Ex and Later
CMI Credit Data for CPU Stepping: Ex and Later
S0 TME CPUID = 1
S1 TME CPUID = 1
S0 TmeActivated = 0
S1 TmeActivated = 0
TmeEnabled: 0
TmeEnabled: 0
TwoLmEnabled: 0
TwoLmEnabled: 0
2LM_XTILE: 0
2LM_XTILE: 0
CMI Credit Data for CPU Stepping: Ex and Later
CMI Credit Data for CPU Stepping: Ex and Later
Mesh2Mem CMI Data Version: 1
Mesh2Mem CMI Data Version: 1
S0 TME CPUID = 1
S1 TME CPUID = 1
S0 TmeActivated = 0
S1 TmeActivated = 0
TmeEnabled: 0
TmeEnabled: 0
TwoLmEnabled: 0
TwoLmEnabled: 0
2LM_XTILE: 0
2LM_XTILE: 0
CMI Credit Data for CPU Stepping: Ex and Later
CMI Credit Data for CPU Stepping: Ex and Later
S0 TME CPUID = 1
S1 TME CPUID = 1
S0 TmeActivated = 0
S1 TmeActivated = 0
TmeEnabled: 0
TmeEnabled: 0
TwoLmEnabled: 0
TwoLmEnabled: 0
2LM_XTILE: 0
2LM_XTILE: 0
CMI Credit Data for CPU Stepping: Ex and Later
CMI Credit Data for CPU Stepping: Ex and Later
S0 TME CPUID = 1
S1 TME CPUID = 1
S0 TmeActivated = 0
S1 TmeActivated = 0
TmeEnabled: 0
TmeEnabled: 0
TwoLmEnabled: 0
TwoLmEnabled: 0
2LM_XTILE: 0
2LM_XTILE: 0
CMI Credit Data for CPU Stepping: Ex and Later
CMI Credit Data for CPU Stepping: Ex and Later
S0 TME CPUID = 1
S1 TME CPUID = 1
S0 TmeActivated = 0
S1 TmeActivated = 0
S0 TME CPUID = 1
S1 TME CPUID = 1
S0 TmeActivated = 0
S1 TmeActivated = 0
TmeEnabled: 0
TmeEnabled: 0
TwoLmEnabled: 0
TwoLmEnabled: 0
2LM_XTILE: 0
2LM_XTILE: 0
CMI Credit Data for CPU Stepping: Ex and Later
CMI Credit Data for CPU Stepping: Ex and Later
S0 TME CPUID = 1
S1 TME CPUID = 1
S0 TmeActivated = 0
S1 TmeActivated = 0
TmeEnabled: 0
TmeEnabled: 0
TwoLmEnabled: 0
TwoLmEnabled: 0
2LM_XTILE: 0
2LM_XTILE: 0
CMI Credit Data for CPU Stepping: Ex and Later
CMI Credit Data for CPU Stepping: Ex and Later
S0 TME CPUID = 1
S1 TME CPUID = 1
S0 TmeActivated = 0
S1 TmeActivated = 0
TmeEnabled: 0
TmeEnabled: 0
TwoLmEnabled: 0
TwoLmEnabled: 0
2LM_XTILE: 0
2LM_XTILE: 0
CMI Credit Data for CPU Stepping: Ex and Later
CMI Credit Data for CPU Stepping: Ex and Later
S0 TME CPUID = 1
S1 TME CPUID = 1
S0 TmeActivated = 0
S1 TmeActivated = 0
TmeEnabled: 0
TmeEnabled: 0
TwoLmEnabled: 0
TwoLmEnabled: 0
2LM_XTILE: 0
2LM_XTILE: 0
CMI Credit Data for CPU Stepping: Ex and Later
CMI Credit Data for CPU Stepping: Ex and Later
S0 TME CPUID = 1
S1 TME CPUID = 1
S0 TmeActivated = 0
S1 TmeActivated = 0
TmeEnabled: 0
TmeEnabled: 0
TwoLmEnabled: 0
TwoLmEnabled: 0
2LM_XTILE: 0
2LM_XTILE: 0
CMI Credit Data for CPU Stepping: Ex and Later
CMI Credit Data for CPU Stepping: Ex and Later
S0 TME CPUID = 1
S1 TME CPUID = 1
S0 TmeActivated = 0
S1 TmeActivated = 0
S0 TME CPUID = 1
S1 TME CPUID = 1
S0 TmeActivated = 0
S1 TmeActivated = 0
S0 TME CPUID = 1
S1 TME CPUID = 1
S0 TmeActivated = 0
S1 TmeActivated = 0
S0 TME CPUID = 1
S1 TME CPUID = 1
S0 TmeActivated = 0
S1 TmeActivated = 0
S0 TME CPUID = 1
S1 TME CPUID = 1
S0 TmeActivated = 0
S1 TmeActivated = 0
S0 TME CPUID = 1
S1 TME CPUID = 1
S0 TmeActivated = 0
S1 TmeActivated = 0
S0 TME CPUID = 1
S1 TME CPUID = 1
S0 TmeActivated = 0
S1 TmeActivated = 0
S0 TME CPUID = 1
S1 TME CPUID = 1
S0 TmeActivated = 0
S1 TmeActivated = 0
[ScktId: 0] Init CMI Credit Programming - 1904ms
[ScktId: 1] Init CMI Credit Programming - 1902ms
[ScktId: 0] Program TME Cfg register for SGX/TDX -- Started
[ScktId: 1] Program TME Cfg register for SGX/TDX -- Started
DisableTdxTdMismatchBit return fail: Aborted
DisableTdxTdMismatchBit return fail: Aborted
[ScktId: 1] Program TME Cfg register for SGX/TDX - 17ms
[ScktId: 0] Program TME Cfg register for SGX/TDX - 26ms
[ScktId: 1] Pipe Sync AP Final Error Sync -- Started
[ScktId: 0] Pipe Sync AP Final Error Sync -- Started
[ScktId: 1] Pipe Sync AP Final Error Sync - 16ms
[ScktId: 0] Pipe Sync AP Final Error Sync - 10ms
N1 Checked into Pipe
[ScktId: 0] Initialize ADR -- Started
[ScktId: 0] Initialize ADR - 5ms
N1 Checked into Pipe
[ScktId: 0] Set RAS Configuration -- Started
N0: ProbabilisticTargetedRowRefreshInit Enable
SetPatrolScrub execution on Skt 0
N0: ScrubFactor: 86400, MemSize: 20, Scrub Interval:29E8
N0: ScrubFactor: 86400, MemSize: 20, Scrub Interval:29E8
N0: ScrubFactor: 86400, MemSize: 20, Scrub Interval:29E8
N0: ScrubFactor: 86400, MemSize: 20, Scrub Interval:29E8
N0: ScrubFactor: 86400, MemSize: 20, Scrub Interval:29E8
N0: ScrubFactor: 86400, MemSize: 20, Scrub Interval:29E8
N0: ScrubFactor: 86400, MemSize: 20, Scrub Interval:29E8
N0: ScrubFactor: 86400, MemSize: 20, Scrub Interval:29E8
N0: ScrubFactor: 86400, MemSize: 20, Scrub Interval:29E8
N0: ScrubFactor: 86400, MemSize: 20, Scrub Interval:29E8
N0: ScrubFactor: 86400, MemSize: 20, Scrub Interval:29E8
N0: ScrubFactor: 86400, MemSize: 20, Scrub Interval:29E8
N0: ScrubFactor: 86400, MemSize: 20, Scrub Interval:29E8
N0: ScrubFactor: 86400, MemSize: 20, Scrub Interval:29E8
N0: ScrubFactor: 86400, MemSize: 20, Scrub Interval:29E8
N0: ScrubFactor: 86400, MemSize: 20, Scrub Interval:29E8
[imc] ConfigSystemRetryRegister start
N1: ProbabilisticTargetedRowRefreshInit Enable
SetPatrolScrub execution on Skt 1
N1: ScrubFactor: 86400, MemSize: 20, Scrub Interval:29E8
N1: ScrubFactor: 86400, MemSize: 20, Scrub Interval:29E8
N1: ScrubFactor: 86400, MemSize: 20, Scrub Interval:29E8
N1: ScrubFactor: 86400, MemSize: 20, Scrub Interval:29E8
N1: ScrubFactor: 86400, MemSize: 20, Scrub Interval:29E8
N1: ScrubFactor: 86400, MemSize: 20, Scrub Interval:29E8
N1: ScrubFactor: 86400, MemSize: 20, Scrub Interval:29E8
N1: ScrubFactor: 86400, MemSize: 20, Scrub Interval:29E8
N1: ScrubFactor: 86400, MemSize: 20, Scrub Interval:29E8
N1: ScrubFactor: 86400, MemSize: 20, Scrub Interval:29E8
N1: ScrubFactor: 86400, MemSize: 20, Scrub Interval:29E8
N1: ScrubFactor: 86400, MemSize: 20, Scrub Interval:29E8
N1: ScrubFactor: 86400, MemSize: 20, Scrub Interval:29E8
N1: ScrubFactor: 86400, MemSize: 20, Scrub Interval:29E8
N1: ScrubFactor: 86400, MemSize: 20, Scrub Interval:29E8
N1: ScrubFactor: 86400, MemSize: 20, Scrub Interval:29E8
[imc] ConfigSystemRetryRegister start
SetRASConfig End
[ScktId: 0] Set RAS Configuration - 213ms
N1 Checked into Pipe
[ScktId: 0] Memory Late -- Started
[ScktId: 0] Memory Late - 5ms
[ScktId: 1] Print All Stats -- Started
[ScktId: 0] Print All Stats -- Started
Performance statistics for socket 1
FmcMaxCached = 0
FmcCachedReads = 0
MRC Phase | PCI | PCI | Polling |JEDEC | FixedDelay | Vref | CPGC | SMBUS | SMBUS | MRS | Duration | GetSysHostPointer
| Read | Write | Count | | Time | Count | Count | Read | Write | Write | Time | Calls
--------------------------------------------------------------------------------------------------------------------------------------------
Total Stats | 94788022| 16966561| 63709450 | 1| 2392 | 760320 | 556890 | 3264 | 33400 | 132847 | 52211 | 0 |
PreMrc | 67777| 174374| 1218 | 0| 1 | 0 | 32 | 56 | 24 | 16 | 12 | 0 |
PipeSync | 330191| 152491| 0 | 0| 0 | 0 | 0 | 0 | 0 | 0 | 536 | 0 |
InitStructLate | 12994| 3| 0 | 0| 0 | 0 | 0 | 0 | 0 | 0 | 8 | 0 |
DetectDimmConfig | 267327| 13527| 79157 | 0| 0 | 0 | 0 | 2236 | 2204 | 0 | 319 | 0 |
UnlockMemRegs | 11814| 5| 0 | 0| 0 | 0 | 0 | 0 | 0 | 0 | 7 | 0 |
HBM Pre-Training | 135341| 1707| 0 | 0| 0 | 0 | 0 | 0 | 0 | 0 | 109 | 0 |
ConfigXmp | 12413| 1| 0 | 0| 0 | 0 | 0 | 0 | 0 | 0 | 7 | 0 |
SetPmicVdd | 60018| 85| 457 | 0| 166 | 0 | 0 | 16 | 8 | 0 | 216 | 0 |
EarlyDdrTherm | 11934| 107| 0 | 0| 0 | 0 | 0 | 0 | 0 | 0 | 9 | 0 |
EarlyInitMem | 14184| 1| 0 | 0| 0 | 0 | 0 | 0 | 0 | 0 | 8 | 0 |
HBM Training | 4329681| 236| 0 | 0| 58 | 0 | 0 | 0 | 0 | 0 | 2915 | 0 |
HBM PostPkgRepair | 10928| 1| 0 | 0| 0 | 0 | 0 | 0 | 0 | 0 | 7 | 0 |
HBM Mem BIST | 11516| 1| 0 | 0| 0 | 0 | 0 | 0 | 0 | 0 | 7 | 0 |
HBM ReTraining | 11518| 1| 0 | 0| 0 | 0 | 0 | 0 | 0 | 0 | 7 | 0 |
GatherSPDData | 122377| 817| 2863 | 0| 0 | 0 | 0 | 256 | 4 | 0 | 86 | 0 |
DisplayDimmInfo | 10348| 2| 0 | 0| 0 | 0 | 0 | 0 | 0 | 0 | 580 | 0 |
ChannelEarlyConfig | 2600133| 80597| 176 | 0| 0 | 0 | 0 | 16 | 0 | 0 | 1272 | 0 |
DdrioPowerStatusCheck| 10934| 1| 0 | 0| 0 | 0 | 0 | 0 | 0 | 0 | 8 | 0 |
InitDdrioInterface | 29500| 3706| 0 | 0| 24 | 0 | 0 | 0 | 0 | 0 | 55 | 0 |
X-Over Calib | 732| 398| 0 | 0| 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 |
RcompStaticLeg | 166| 352| 0 | 0| 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 |
DdrPreTrainingInit | 121205| 744| 298 | 1| 16 | 0 | 0 | 0 | 32 | 16 | 104 | 0 |
CsClockEarly | 259634| 189277| 3570 | 0| 26 | 0 | 20 | 16 | 376 | 120 | 244 | 0 |
CaClockEarlySimple | 316169| 350534| 31157 | 0| 20 | 0 | 32 | 192 | 3240 | 3172 | 371 | 0 |
CaClockEarlyComplex| 99919| 78056| 31589 | 0| 5 | 0 | 32 | 192 | 3308 | 3244 | 171 | 0 |
CaClkEarCompRecent | 122328| 79548| 31791 | 0| 5 | 0 | 32 | 192 | 3336 | 3272 | 180 | 0 |
DcaSlewRate | 15656| 1| 0 | 0| 0 | 0 | 0 | 0 | 0 | 0 | 10 | 0 |
RcdDcaDckDutyCycle | 495361| 602315| 2268 | 0| 33 | 0 | 32 | 0 | 260 | 260 | 468 | 0 |
Lrdimm Bcom Train | 2| 1| 0 | 0| 0 | 0 | 0 | 0 | 0 | 0 | 3 | 0 |
DcaDfeTraining | 4334637| 4339202| 75197 | 0| 398 | 0 | 98800 | 0 | 8604 | 3276 | 4095 | 0 |
BsCsClockEarly | 67776| 42085| 20706 | 0| 4 | 0 | 472 | 16 | 2340 | 2320 | 111 | 0 |
BsCaClockEarly | 252660| 138195| 59630 | 0| 8 | 0 | 77 | 0 | 6776 | 6816 | 348 | 0 |
Lrdimm Pba Enu Id | 16245| 1| 0 | 0| 0 | 0 | 0 | 0 | 0 | 0 | 9 | 0 |
Early Req Clk Train| 18616| 2| 0 | 0| 0 | 0 | 0 | 0 | 0 | 0 | 9 | 0 |
LRDIMM RX | 4| 2| 0 | 0| 0 | 0 | 0 | 0 | 0 | 0 | 9 | 0 |
Receive Enable | 20230| 17337| 1686 | 0| 0 | 0 | 570 | 0 | 0 | 8 | 22 | 0 |
Rd Dq/Dqs | 450424| 304583| 57094 | 0| 11 | 44 | 7776 | 0 | 0 | 32 | 372 | 0 |
Swizzle Discovery | 1408| 2422| 48 | 0| 0 | 0 | 48 | 0 | 0 | 32 | 6 | 0 |
Dram Duty Cycle Adj| 2| 1| 0 | 0| 0 | 0 | 0 | 0 | 0 | 0 | 5 | 0 |
RdDqDqsDfeCentering| 70476| 69197| 30980 | 0| 3 | 9804 | 2636 | 0 | 0 | 364 | 95 | 0 |
READ DFE | 3419350| 2694690| 1895132 | 0| 202 | 566840 | 126660 | 0 | 0 | 25320 | 3668 | 0 |
Rx Dq/Dqs Post Dfe | 615351| 525822| 332055 | 0| 39 | 43904 | 24284 | 0 | 0 | 5220 | 688 | 0 |
Periodic Rx Retrain| 89| 21| 0 | 0| 0 | 0 | 0 | 0 | 0 | 0 | 6 | 0 |
Switch DDRT2 Mode | 15064| 33| 0 | 0| 0 | 0 | 0 | 0 | 0 | 0 | 9 | 0 |
LRDIMM TX | 7087| 1| 0 | 0| 0 | 0 | 0 | 0 | 0 | 0 | 7 | 0 |
Write Leveling | 63977| 82456| 4656 | 0| 19 | 0 | 1856 | 0 | 0 | 160 | 105 | 0 |
Wr Dq/Dqs | 472644| 732420| 50688 | 0| 8 | 48 | 17140 | 0 | 0 | 244 | 608 | 0 |
Tx DQ Slew Rate | 2| 1| 0 | 0| 0 | 0 | 0 | 0 | 0 | 0 | 4 | 0 |
WrDqDqsDfeCentering| 133672| 301099| 6132 | 0| 36 | 2380 | 15184 | 0 | 0 | 4380 | 305 | 0 |
PostPkgRepair | 8| 4| 0 | 0| 0 | 0 | 0 | 0 | 0 | 0 | 6 | 0 |
LRDIMM Bs Write | 15060| 1| 0 | 0| 0 | 0 | 0 | 0 | 0 | 0 | 10 | 0 |
DCA TCO | 538904| 608756| 25388 | 0| 31 | 0 | 240 | 0 | 2880 | 2880 | 624 | 0 |
TCO_DQDQS | 2| 1| 0 | 0| 0 | 0 | 0 | 0 | 0 | 0 | 4 | 0 |
TX ODT | 1302| 3393| 0 | 0| 0 | 0 | 216 | 0 | 0 | 72 | 8 | 0 |
WRITE DFE | 5422873| 4023454| 3704185 | 0| 660 | 110584 | 213699 | 0 | 0 | 65113 | 4614 | 0 |
WRITE DB DFE | 2| 1| 0 | 0| 0 | 0 | 0 | 0 | 0 | 0 | 4 | 0 |
Tx Dq/Dqs Post Dfe | 4134543| 320231| 3996973 | 0| 46 | 7512 | 15839 | 0 | 0 | 4517 | 1676 | 0 |
Read Post Dfe Late | 35269200| 656062| 34898768 | 0| 20 | 15180 | 18218 | 0 | 0 | 0 | 12555 | 0 |
MemSweepTester | 2| 1| 0 | 0| 0 | 0 | 0 | 0 | 0 | 0 | 3 | 0 |
Periodic Tx Retrain| 1338| 1629| 24 | 0| 0 | 0 | 16 | 0 | 0 | 4 | 7 | 0 |
Round Trip Opt | 2485852| 29443| 2458054 | 0| 1 | 0 | 1412 | 0 | 0 | 0 | 878 | 0 |
TurnaroundTrain | 1309713| 115152| 1258025 | 0| 19 | 3304 | 5899 | 0 | 0 | 1721 | 529 | 0 |
DisplayResults | 393670| 157746| 5832 | 0| 3 | 360 | 3384 | 0 | 0 | 0 | 205 | 0 |
PostTrainingInit | 15845| 373| 0 | 0| 0 | 0 | 4 | 0 | 0 | 4 | 10 | 0 |
One Time TxRt | 14259| 913| 24 | 0| 512 | 0 | 8 | 0 | 0 | 0 | 521 | 0 |
ExecuteSsaRmt | 10641| 2| 0 | 0| 0 | 0 | 0 | 0 | 0 | 0 | 7 | 0 |
Offset training | 2| 1| 0 | 0| 0 | 0 | 0 | 0 | 0 | 0 | 4 | 0 |
HBM Post-Training | 4268157| 2834| 0 | 0| 0 | 0 | 0 | 0 | 0 | 0 | 2817 | 0 |
LateConfig | 66934| 331| 40 | 0| 0 | 0 | 12 | 4 | 0 | 12 | 41 | 0 |
InitThrottling | 33216| 211| 352 | 0| 0 | 0 | 0 | 32 | 0 | 0 | 31 | 0 |
MEMTEST | 5985288| 4405| 5965076 | 0| 0 | 0 | 60 | 8 | 0 | 12 | 2031 | 0 |
HBM Mem Test | 2413800| 18443| 2395516 | 0| 0 | 0 | 256 | 0 | 0 | 0 | 1187 | 0 |
HBM Scrambling | 8619| 65| 0 | 0| 0 | 0 | 0 | 0 | 0 | 0 | 7 | 0 |
HBM Mem Init | 1448108| 2985| 1423880 | 0| 0 | 0 | 32 | 0 | 0 | 0 | 706 | 0 |
Pub DIMM Manifest | 12793| 252| 264 | 0| 0 | 0 | 0 | 24 | 0 | 0 | 14 | 0 |
SvlAndScrambling | 14470| 5| 0 | 0| 0 | 0 | 0 | 0 | 0 | 0 | 9 | 0 |
CpgcOutOfOrderMode | 50| 45| 0 | 0| 0 | 0 | 0 | 0 | 0 | 0 | 5 | 0 |
EnableHostRefresh | 140381| 104| 0 | 0| 0 | 0 | 0 | 0 | 0 | 0 | 92 | 0 |
MEMINIT | 2988357| 1311| 2976111 | 0| 0 | 0 | 16 | 0 | 0 | 0 | 1224 | 0 |
CmiCreditProg | 2906361| 581| 0 | 0| 0 | 0 | 0 | 0 | 0 | 0 | 1902 | 0 |
HBM Normal Mode | 85702| 1275| 0 | 0| 0 | 0 | 0 | 0 | 0 | 0 | 55 | 0 |
Normal Mode | 658746| 1037| 136 | 0| 1 | 0 | 0 | 8 | 8 | 0 | 435 | 0 |
CallTableOverhead | 2687569| 591| 0 | 0| 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 |
Normalize CMD | 20458| 18716| 1680 | 0| 0 | 0 | 592 | 0 | 0 | 24 | 22 | 0 |
No Zone 0 | 2| 2| 0 | 0| 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 |
No Zone 1 | 0| 1| 0 | 0| 0 | 0 | 0 | 0 | 0 | 0 | 4 | 0 |
No Zone 2 | 8210| 1| 0 | 0| 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 |
No Zone 3 | 0| 3| 0 | 0| 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 |
No Zone 4 | 0| 3| 0 | 0| 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 |
No Zone 5 | 0| 3| 0 | 0| 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 |
No Zone 6 | 0| 1| 0 | 0| 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 |
No Zone 7 | 1| 0| 0 | 0| 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 |
No Zone 8 | 0| 1| 0 | 0| 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 |
No Zone 9 | 1975770| 16555| 1880574 | 0| 2 | 360 | 1304 | 0 | 0 | 216 | 1764 | 0 |
Performance statistics for socket 0
FmcMaxCached = 0
FmcCachedReads = 0
MRC Phase | PCI | PCI | Polling |JEDEC | FixedDelay | Vref | CPGC | SMBUS | SMBUS | MRS | Duration | GetSysHostPointer
| Read | Write | Count | | Time | Count | Count | Read | Write | Write | Time | Calls
--------------------------------------------------------------------------------------------------------------------------------------------
Total Stats | 109843419| 16966645| 62535875 | 1| 2400 | 750696 | 557141 | 3264 | 33428 | 133259 | 69809 | 0 |
PreMrc | 149645| 189846| 1273 | 0| 1 | 0 | 32 | 56 | 24 | 16 | 25 | 0 |
PipeSync | 610438| 130845| 0 | 0| 0 | 0 | 0 | 0 | 0 | 0 | 420 | 0 |
SelectBootMode | 11235| 5| 0 | 0| 0 | 0 | 0 | 0 | 0 | 0 | 8 | 0 |
InitStructLate | 22998| 3| 0 | 0| 0 | 0 | 0 | 0 | 0 | 0 | 8 | 0 |
DetectDimmConfig | 415814| 13527| 82120 | 0| 0 | 0 | 0 | 2236 | 2204 | 0 | 321 | 0 |
CheckPor | 11248| 4| 0 | 0| 0 | 0 | 0 | 0 | 0 | 0 | 6 | 0 |
HBM Init Clock | 11194| 4| 0 | 0| 0 | 0 | 0 | 0 | 0 | 0 | 5 | 0 |
Clock Init | 11258| 28| 0 | 0| 0 | 0 | 0 | 0 | 0 | 0 | 96 | 0 |
UnlockMemRegs | 19416| 5| 0 | 0| 0 | 0 | 0 | 0 | 0 | 0 | 7 | 0 |
HBM Pre-Training | 360871| 1709| 0 | 0| 0 | 0 | 0 | 0 | 0 | 0 | 141 | 0 |
ConfigXmp | 17381| 1| 0 | 0| 0 | 0 | 0 | 0 | 0 | 0 | 6 | 0 |
SetClkVdd | 11294| 44| 0 | 0| 0 | 0 | 0 | 0 | 0 | 0 | 5 | 0 |
SetPmicVdd | 137076| 85| 472 | 0| 166 | 0 | 0 | 16 | 8 | 0 | 223 | 0 |
CheckDimmRanks | 11257| 36| 0 | 0| 0 | 0 | 0 | 0 | 0 | 0 | 6 | 0 |
EarlyDdrTherm | 26664| 107| 0 | 0| 0 | 0 | 0 | 0 | 0 | 0 | 10 | 0 |
EarlyInitMem | 21459| 1| 0 | 0| 0 | 0 | 0 | 0 | 0 | 0 | 8 | 0 |
HBM Training | 7479072| 236| 0 | 0| 58 | 0 | 0 | 0 | 0 | 0 | 2916 | 0 |
HBM PostPkgRepair | 17852| 1| 0 | 0| 0 | 0 | 0 | 0 | 0 | 0 | 6 | 0 |
HBM Mem BIST | 16345| 1| 0 | 0| 0 | 0 | 0 | 0 | 0 | 0 | 6 | 0 |
HBM ReTraining | 17361| 1| 0 | 0| 0 | 0 | 0 | 0 | 0 | 0 | 7 | 0 |
GatherSPDData | 220143| 817| 2866 | 0| 0 | 0 | 0 | 256 | 4 | 0 | 88 | 0 |
DisplayDimmInfo | 3042999| 2| 0 | 0| 0 | 0 | 0 | 0 | 0 | 0 | 1153 | 0 |
ChannelEarlyConfig | 1612199| 80597| 176 | 0| 0 | 0 | 0 | 16 | 0 | 0 | 728 | 0 |
DdrioPowerStatusCheck| 25037| 1| 0 | 0| 0 | 0 | 0 | 0 | 0 | 0 | 9 | 0 |
InitDdrioInterface | 33993| 3707| 0 | 0| 24 | 0 | 0 | 0 | 0 | 0 | 52 | 0 |
X-Over Calib | 732| 398| 0 | 0| 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 |
RcompStaticLeg | 179| 352| 0 | 0| 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 |
DdrPreTrainingInit | 244395| 744| 301 | 1| 16 | 0 | 0 | 0 | 32 | 16 | 111 | 0 |
CsClockEarly | 282997| 189277| 3621 | 0| 26 | 0 | 20 | 16 | 376 | 120 | 218 | 0 |
CaClockEarlySimple | 317504| 350914| 32100 | 0| 20 | 0 | 32 | 192 | 3268 | 3200 | 341 | 0 |
CaClockEarlyComplex| 102054| 79028| 32820 | 0| 5 | 0 | 32 | 192 | 3348 | 3284 | 163 | 0 |
CaClkEarCompRecent | 140171| 78892| 32352 | 0| 5 | 0 | 32 | 192 | 3296 | 3232 | 169 | 0 |
DcaSlewRate | 2| 1| 0 | 0| 0 | 0 | 0 | 0 | 0 | 0 | 4 | 0 |
RcdDcaDckDutyCycle | 465726| 602311| 2340 | 0| 33 | 0 | 32 | 0 | 260 | 260 | 411 | 0 |
Lrdimm Bcom Train | 2| 1| 0 | 0| 0 | 0 | 0 | 0 | 0 | 0 | 3 | 0 |
DcaDfeTraining | 4336876| 4339202| 77436 | 0| 398 | 0 | 98800 | 0 | 8604 | 3276 | 3667 | 0 |
BsCsClockEarly | 68462| 42085| 21392 | 0| 4 | 0 | 472 | 16 | 2340 | 2320 | 104 | 0 |
BsCaClockEarly | 254014| 138195| 60984 | 0| 8 | 0 | 77 | 0 | 6776 | 6816 | 324 | 0 |
Lrdimm Pba Enu Id | 2| 1| 0 | 0| 0 | 0 | 0 | 0 | 0 | 0 | 3 | 0 |
Early Req Clk Train| 4| 2| 0 | 0| 0 | 0 | 0 | 0 | 0 | 0 | 3 | 0 |
LRDIMM RX | 2411531| 2| 0 | 0| 0 | 0 | 0 | 0 | 0 | 0 | 466 | 0 |
Receive Enable | 46274| 17334| 1686 | 0| 0 | 0 | 570 | 0 | 0 | 8 | 24 | 0 |
Rd Dq/Dqs | 450970| 304581| 57640 | 0| 11 | 44 | 7776 | 0 | 0 | 32 | 341 | 0 |
Swizzle Discovery | 20797| 2422| 48 | 0| 0 | 0 | 48 | 0 | 0 | 32 | 10 | 0 |
Dram Duty Cycle Adj| 2| 1| 0 | 0| 0 | 0 | 0 | 0 | 0 | 0 | 5 | 0 |
RdDqDqsDfeCentering| 88803| 69089| 31242 | 0| 3 | 9652 | 2648 | 0 | 0 | 364 | 94 | 0 |
READ DFE | 3323391| 2667702| 1818325 | 0| 201 | 557552 | 125652 | 0 | 0 | 25320 | 3359 | 0 |
Rx Dq/Dqs Post Dfe | 576701| 516964| 303817 | 0| 39 | 42692 | 23736 | 0 | 0 | 5220 | 611 | 0 |
Periodic Rx Retrain| 95| 21| 0 | 0| 0 | 0 | 0 | 0 | 0 | 0 | 6 | 0 |
Switch DDRT2 Mode | 10| 33| 0 | 0| 0 | 0 | 0 | 0 | 0 | 0 | 4 | 0 |
LRDIMM TX | 2| 1| 0 | 0| 0 | 0 | 0 | 0 | 0 | 0 | 5 | 0 |
Write Leveling | 58071| 82461| 4656 | 0| 19 | 0 | 1856 | 0 | 0 | 160 | 95 | 0 |
Wr Dq/Dqs | 459058| 732415| 50688 | 0| 8 | 48 | 17140 | 0 | 0 | 244 | 541 | 0 |
Tx DQ Slew Rate | 2| 1| 0 | 0| 0 | 0 | 0 | 0 | 0 | 0 | 4 | 0 |
WrDqDqsDfeCentering| 317661| 302098| 6108 | 0| 36 | 2380 | 15272 | 0 | 0 | 4412 | 309 | 0 |
PostPkgRepair | 8| 4| 0 | 0| 0 | 0 | 0 | 0 | 0 | 0 | 6 | 0 |
LRDIMM Bs Write | 2| 1| 0 | 0| 0 | 0 | 0 | 0 | 0 | 0 | 5 | 0 |
DCA TCO | 470682| 610061| 25920 | 0| 31 | 0 | 240 | 0 | 2880 | 2880 | 550 | 0 |
TCO_DQDQS | 29603| 1| 0 | 0| 0 | 0 | 0 | 0 | 0 | 0 | 9 | 0 |
TX ODT | 1302| 3393| 0 | 0| 0 | 0 | 216 | 0 | 0 | 72 | 8 | 0 |
WRITE DFE | 5345495| 4049065| 3606913 | 0| 669 | 113564 | 215362 | 0 | 0 | 65510 | 4267 | 0 |
WRITE DB DFE | 2| 1| 0 | 0| 0 | 0 | 0 | 0 | 0 | 0 | 4 | 0 |
Tx Dq/Dqs Post Dfe | 4125552| 321640| 3986966 | 0| 46 | 7576 | 15823 | 0 | 0 | 4481 | 1699 | 0 |
Read Post Dfe Late | 33945500| 663896| 33572892 | 0| 20 | 13236 | 18324 | 0 | 0 | 0 | 12527 | 0 |
MemSweepTester | 2| 1| 0 | 0| 0 | 0 | 0 | 0 | 0 | 0 | 3 | 0 |
Periodic Tx Retrain| 1338| 1629| 24 | 0| 0 | 0 | 16 | 0 | 0 | 4 | 7 | 0 |
Round Trip Opt | 2297280| 27827| 2270470 | 0| 1 | 0 | 1360 | 0 | 0 | 0 | 844 | 0 |
TurnaroundTrain | 1311328| 114714| 1259278 | 0| 18 | 3232 | 5904 | 0 | 0 | 1712 | 536 | 0 |
DisplayResults | 147124| 157746| 5832 | 0| 3 | 360 | 3384 | 0 | 0 | 0 | 105 | 0 |
PostTrainingInit | 19586| 373| 0 | 0| 0 | 0 | 4 | 0 | 0 | 4 | 9 | 0 |
One Time TxRt | 21339| 913| 24 | 0| 512 | 0 | 8 | 0 | 0 | 0 | 521 | 0 |
ExecuteSsaRmt | 4| 2| 0 | 0| 0 | 0 | 0 | 0 | 0 | 0 | 3 | 0 |
Offset training | 24500| 1| 0 | 0| 0 | 0 | 0 | 0 | 0 | 0 | 9 | 0 |
HBM Post-Training | 7378873| 2834| 0 | 0| 0 | 0 | 0 | 0 | 0 | 0 | 2818 | 0 |
LateConfig | 101249| 331| 42 | 0| 0 | 0 | 12 | 4 | 0 | 12 | 38 | 0 |
InitThrottling | 108626| 211| 352 | 0| 0 | 0 | 0 | 32 | 0 | 0 | 40 | 0 |
MEMTEST | 5840952| 4405| 5778833 | 0| 0 | 0 | 60 | 8 | 0 | 12 | 2036 | 0 |
HBM Mem Test | 2629772| 18443| 2554734 | 0| 0 | 0 | 256 | 0 | 0 | 0 | 1195 | 0 |
HBM Scrambling | 22005| 65| 0 | 0| 0 | 0 | 0 | 0 | 0 | 0 | 8 | 0 |
HBMFaultResilientBoot| 11219| 4| 0 | 0| 0 | 0 | 0 | 0 | 0 | 0 | 6 | 0 |
HBM Reset System | 11169| 4| 0 | 0| 0 | 0 | 0 | 0 | 0 | 0 | 6 | 0 |
HBM Mem Init | 1629602| 2985| 1531554 | 0| 0 | 0 | 32 | 0 | 0 | 0 | 716 | 0 |
Pub DIMM Manifest | 26549| 163| 264 | 0| 0 | 0 | 0 | 24 | 0 | 0 | 10 | 0 |
SvlAndScrambling | 23972| 5| 0 | 0| 0 | 0 | 0 | 0 | 0 | 0 | 9 | 0 |
Mem ALIAS Check | 11231| 4| 0 | 0| 0 | 0 | 0 | 0 | 0 | 0 | 6 | 0 |
CpgcOutOfOrderMode | 29163| 45| 0 | 0| 0 | 0 | 0 | 0 | 0 | 0 | 11 | 0 |
EnableHostRefresh | 241742| 104| 0 | 0| 0 | 0 | 0 | 0 | 0 | 0 | 91 | 0 |
MEMINIT | 3538108| 1311| 3508029 | 0| 0 | 0 | 16 | 0 | 0 | 0 | 1223 | 0 |
CmiCreditProg | 5011842| 581| 0 | 0| 0 | 0 | 0 | 0 | 0 | 0 | 1904 | 0 |
CheckRasPostMrc | 11506| 148| 0 | 0| 0 | 0 | 0 | 0 | 0 | 0 | 7 | 0 |
MemLate | 11248| 47| 0 | 0| 0 | 0 | 0 | 0 | 0 | 0 | 5 | 0 |
Memory Mapping | 17861| 5369| 0 | 0| 0 | 0 | 0 | 0 | 0 | 0 | 16853 | 0 |
HBM Normal Mode | 135713| 1275| 0 | 0| 0 | 0 | 0 | 0 | 0 | 0 | 53 | 0 |
Normal Mode | 1139610| 1037| 137 | 0| 1 | 0 | 0 | 8 | 8 | 0 | 435 | 0 |
InitAdr | 11205| 4| 0 | 0| 0 | 0 | 0 | 0 | 0 | 0 | 5 | 0 |
RAS Config | 14184| 2031| 0 | 0| 0 | 0 | 0 | 0 | 0 | 0 | 213 | 0 |
CallTableOverhead | 3870793| 301| 0 | 0| 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 |
Normalize CMD | 20494| 18736| 1683 | 0| 0 | 0 | 593 | 0 | 0 | 24 | 20 | 0 |
No Zone 0 | 6| 5| 0 | 0| 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 |
No Zone 1 | 0| 1| 0 | 0| 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 |
No Zone 2 | 0| 0| 0 | 0| 0 | 0 | 0 | 0 | 0 | 0 | 203 | 0 |
No Zone 3 | 8569| 2| 0 | 0| 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 |
No Zone 4 | 1| 0| 0 | 0| 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 |
No Zone 5 | 0| 2| 0 | 0| 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 |
No Zone 6 | 1| 0| 0 | 0| 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 |
No Zone 7 | 0| 2| 0 | 0| 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 |
No Zone 8 | 1| 0| 0 | 0| 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 |
No Zone 9 | 1964769| 16781| 1807465 | 0| 2 | 360 | 1304 | 0 | 0 | 216 | 3131 | 0 |
[ScktId: 1] Print All Stats - 3220ms
[ScktId: 0] Print All Stats - 3220ms
[ScktId: 1] Print Performance Settings -- Started
[ScktId: 0] Print Performance Settings -- Started
[ScktId: 1] Print Performance Settings - 9ms
[ScktId: 0] Print Performance Settings - 11ms
N1 Checked into Pipe
[ScktId: 0] DIMM Information After MRC -- Started
======================================================================================
START_DIMMINFO_SYSTEM_TABLE
======================================================================================
| Socket 0 | Socket 1 | Socket 2 | Socket 3 | System |
======================================================================================
Active Memory | 128GB | 128GB | N/A | N/A | 256GB |
DDR Freq | | | | | DDR5-4800 |
Ch0 CL-RCD-RP-CMD |40-39-39-1n |40-39-39-1n | | | |
Ch2 CL-RCD-RP-CMD |40-39-39-1n |40-39-39-1n | | | |
Ch4 CL-RCD-RP-CMD |40-39-39-1n |40-39-39-1n | | | |
Ch6 CL-RCD-RP-CMD |40-39-39-1n |40-39-39-1n | | | |
DDR Vdd | 1.145V | 1.145V | N/A | N/A | |
ECC Checking | | | | | On |
Patrol/Demand Scrub | | | | | Off |
RAS Mode | | | | | Indep |
Paging Policy | | | | | Closed |
Data Scrambling | | | | | On |
CCMRC Revision | | | | | 00.50.00 |
RC Version | | | | | 1.1.1.01BC |
======================================================================================
STOP_DIMMINFO_SYSTEM_TABLE
======================================================================================
[ScktId: 0] DIMM Information After MRC - 195ms
N1 Checked into Pipe
[ScktId: 0] DDR Reset Loop -- Started
[ScktId: 0] DDR Reset Loop - 5ms
[ScktId: 1] Pipe Sync AP Final Error Sync -- Started
[ScktId: 0] Pipe Sync AP Final Error Sync -- Started
[ScktId: 1] Pipe Sync AP Final Error Sync - 10ms
[ScktId: 0] Pipe Sync AP Final Error Sync - 10ms
Total MRC time = 74535ms
Total MRC time = 74739ms
STOP_MRC_RUN
Final Rc Heap usage:
******* Configure Mesh Mode - START *******
Configure Socket 0 2LM Hash on KTI and IIO-Enabled
Configure Socket 1 2LM Hash on KTI and IIO-Enabled
Socket 0 Tolm 20
SADEntry Local Base Limit Cluster Ways NmChWays ImcIntBitmap NmImcIntBitmap Mc0ChIntMap Mc1ChIntMap Mc2ChIntMap Mc3ChIntMap Type
0 1 0x0000000 0x0000040 0 1 8 0x1 0x1 0x3 0x3 0x3 0x3 2LM HBM cache DDR Granularity=256B IntGranularity=2
MemInfo->imcBitmap[0][MC_TECH_DDR]=0x1 McBitmapPerCluster[0]=0x1 XorDefeature[socket=0]=0
Ways[socket=0][cluster=0]=8
1 1 0x0000040 0x0000220 0 1 8 0x1 0x1 0x3 0x3 0x3 0x3 2LM HBM cache DDR Granularity=256B IntGranularity=2
MemInfo->imcBitmap[0][MC_TECH_DDR]=0x1 XorDefeature[socket=0]=0
Ways[socket=0][cluster=0]=8
16 1 0x0000220 0x0000420 1 1 8 0x2 0x2 0x3 0x3 0x3 0x3 2LM HBM cache DDR Granularity=256B IntGranularity=2
MemInfo->imcBitmap[0][MC_TECH_DDR]=0x3 McBitmapPerCluster[1]=0x2 XorDefeature[socket=0]=0
Ways[socket=0][cluster=1]=8
17 0 0x0000420 0x0000420 1 0 0 0x0 0x0 0x0 0x0 0x0 0x0 NXM Granularity=Unknown
32 1 0x0000420 0x0000620 2 1 8 0x4 0x4 0x3 0x3 0x3 0x3 2LM HBM cache DDR Granularity=256B IntGranularity=2
MemInfo->imcBitmap[0][MC_TECH_DDR]=0x7 McBitmapPerCluster[2]=0x4 XorDefeature[socket=0]=0
Ways[socket=0][cluster=2]=8
33 0 0x0000620 0x0000620 2 0 0 0x0 0x0 0x0 0x0 0x0 0x0 NXM Granularity=Unknown
48 1 0x0000620 0x0000820 3 1 8 0x8 0x8 0x3 0x3 0x3 0x3 2LM HBM cache DDR Granularity=256B IntGranularity=2
MemInfo->imcBitmap[0][MC_TECH_DDR]=0xF McBitmapPerCluster[3]=0x8 XorDefeature[socket=0]=0
Ways[socket=0][cluster=3]=8
49 0 0x0000820 0x0000820 3 0 0 0x0 0x0 0x0 0x0 0x0 0x0 NXM Granularity=Unknown
MC-Cluster InterleaveEn PrefetchEn Membase MemLimit
0 0 0 0x0000000 0x0000220
NumOfMcEnabled=1, NumOfMcPerCluster=1
1 0 0 0x0000220 0x0000420
NumOfMcEnabled=2, NumOfMcPerCluster=1
2 0 0 0x0000420 0x0000620
NumOfMcEnabled=3, NumOfMcPerCluster=1
3 0 0 0x0000620 0x0000820
NumOfMcEnabled=4, NumOfMcPerCluster=1
Number of clusters = 4
Socket 1 Tolm 20
SADEntry Local Base Limit Cluster Ways NmChWays ImcIntBitmap NmImcIntBitmap Mc0ChIntMap Mc1ChIntMap Mc2ChIntMap Mc3ChIntMap Type
0 1 0x0000820 0x0000A20 0 1 8 0x1 0x1 0x3 0x3 0x3 0x3 2LM HBM cache DDR Granularity=256B IntGranularity=2
MemInfo->imcBitmap[1][MC_TECH_DDR]=0x1 McBitmapPerCluster[0]=0x1 XorDefeature[socket=1]=0
Ways[socket=1][cluster=0]=8
16 1 0x0000A20 0x0000C20 1 1 8 0x2 0x2 0x3 0x3 0x3 0x3 2LM HBM cache DDR Granularity=256B IntGranularity=2
MemInfo->imcBitmap[1][MC_TECH_DDR]=0x3 McBitmapPerCluster[1]=0x2 XorDefeature[socket=1]=0
Ways[socket=1][cluster=1]=8
32 1 0x0000C20 0x0000E20 2 1 8 0x4 0x4 0x3 0x3 0x3 0x3 2LM HBM cache DDR Granularity=256B IntGranularity=2
MemInfo->imcBitmap[1][MC_TECH_DDR]=0x7 McBitmapPerCluster[2]=0x4 XorDefeature[socket=1]=0
Ways[socket=1][cluster=2]=8
48 1 0x0000E20 0x0001020 3 1 8 0x8 0x8 0x3 0x3 0x3 0x3 2LM HBM cache DDR Granularity=256B IntGranularity=2
MemInfo->imcBitmap[1][MC_TECH_DDR]=0xF McBitmapPerCluster[3]=0x8 XorDefeature[socket=1]=0
Ways[socket=1][cluster=3]=8
MC-Cluster InterleaveEn PrefetchEn Membase MemLimit
0 0 0 0x0000820 0x0000A20
NumOfMcEnabled=1, NumOfMcPerCluster=1
1 0 0 0x0000A20 0x0000C20
NumOfMcEnabled=2, NumOfMcPerCluster=1
2 0 0 0x0000C20 0x0000E20
NumOfMcEnabled=3, NumOfMcPerCluster=1
3 0 0 0x0000E20 0x0001020
NumOfMcEnabled=4, NumOfMcPerCluster=1
Number of clusters = 4
Socket 0
SNC_Base_1 = 0000 GB
SNC_Base_2 = 0034 GB
SNC_Base_3 = 0066 GB
SNC_Base_4 = 0098 GB
SNC_Base_5 = 0130 GB
Socket 1
SNC_Base_1 = 0130 GB
SNC_Base_2 = 0162 GB
SNC_Base_3 = 0194 GB
SNC_Base_4 = 0226 GB
SNC_Base_5 = 0258 GB
Socket 0 XPT and KTI prefetch Disabled
Programming credits for clustering mode
Socket 1 XPT and KTI prefetch Disabled
Programming credits for clustering mode
[SDSi] Init for Socket[0] - Begin
[VSEC] VSEC discovery - S:B:D:F = 0x0:0x6A:0x3:0x1, VidDid = 0x09A78086
VsecId: 0x00000041 SDSI VSEC capability offset: 0x00000160
[OOBMSM] InitOobMsmBar() Enter
Socket[0], OobMsm.Func[1], BAR[1]
Disable MSE and BME
Original StsCmdReg Value = 0x00100006
BarSize: 0x00040000
BarBase: 0xC6B40000(Already assigned)
Enable MSE and BME
[OOBMSM] InitOobMsmBar() Exit
SDSi MMIO Layout Address = 0xC6B42000
SdsiMmio.Ppin Address = 0xC6B42408, Value = 0x22E546CB1AD8E915
[OOBMSM] InitOobMsmBar() Enter
Socket[0], OobMsm.Func[1], BAR[0]
Disable MSE and BME
Original StsCmdReg Value = 0x00100006
BarSize: 0x00002000
BarBase: 0xC6B00000(Already assigned)
Enable MSE and BME
[OOBMSM] InitOobMsmBar() Exit
PMon Bar0 address: 0xC6B00000
Global Discovery State at address: 0xC6B00000
Access Type|Max Blocks|Block Stride|Type ||GlobalControlAddr||NumBlockStatusBits|GblCtrStatAddr
[63:62] |[25:16] |[15:8] |[7:0]||[63:0] ||[23:8] |[7:0]
0 |221 |4 |5 ||0x2FF0 ||209 |0xE
Unit Discovery State at address: 0xC6B00020
Access Type|UnitStatus Offset|Counter0 Offset|Ctrl Width|Ctrl0 Offset|Num Ctrl Regs||UnitCounterControlAddr||Gbl Stat Pos|Unit ID|UnitType|Offset
[63:62] |[39:32] |[31:24] |[23:16] |[15:8] |[7:0] ||[63:0] ||[47:32] |[31:16]|[15:0]|
UNIT_TYPE_CHA
0 |0x01 |0x08 |48 |0x02 |4 ||0x00002000 || 0 | 0 |0|0x0040
UNIT_TYPE_CHA
0 |0x01 |0x08 |48 |0x02 |4 ||0x00002010 || 1 | 1 |0|0x0060
UNIT_TYPE_CHA
0 |0x01 |0x08 |48 |0x02 |4 ||0x00002020 || 2 | 2 |0|0x0080
UNIT_TYPE_CHA
0 |0x01 |0x08 |48 |0x02 |4 ||0x00002030 || 3 | 3 |0|0x00A0
UNIT_TYPE_CHA
0 |0x01 |0x08 |48 |0x02 |4 ||0x00002040 || 4 | 4 |0|0x00C0
UNIT_TYPE_CHA
0 |0x01 |0x08 |48 |0x02 |4 ||0x00002050 || 5 | 5 |0|0x00E0
UNIT_TYPE_CHA
0 |0x01 |0x08 |48 |0x02 |4 ||0x00002060 || 6 | 6 |0|0x0100
UNIT_TYPE_CHA
0 |0x01 |0x08 |48 |0x02 |4 ||0x00002070 || 7 | 7 |0|0x0120
UNIT_TYPE_CHA
0 |0x01 |0x08 |48 |0x02 |4 ||0x00002080 || 8 | 8 |0|0x0140
UNIT_TYPE_CHA
0 |0x01 |0x08 |48 |0x02 |4 ||0x00002090 || 9 | 9 |0|0x0160
UNIT_TYPE_CHA
0 |0x01 |0x08 |48 |0x02 |4 ||0x000020A0 ||10 |10 |0|0x0180
UNIT_TYPE_CHA
0 |0x01 |0x08 |48 |0x02 |4 ||0x000020B0 ||11 |11 |0|0x01A0
UNIT_TYPE_CHA
0 |0x01 |0x08 |48 |0x02 |4 ||0x000020C0 ||12 |12 |0|0x01C0
UNIT_TYPE_CHA
0 |0x01 |0x08 |48 |0x02 |4 ||0x000020D0 ||13 |13 |0|0x01E0
UNIT_TYPE_CHA
0 |0x01 |0x08 |48 |0x02 |4 ||0x000020E0 ||14 |14 |0|0x0200
UNIT_TYPE_CHA
0 |0x01 |0x08 |48 |0x02 |4 ||0x000020F0 ||15 |15 |0|0x0220
UNIT_TYPE_CHA
0 |0x01 |0x08 |48 |0x02 |4 ||0x00002100 ||16 |16 |0|0x0240
UNIT_TYPE_CHA
0 |0x01 |0x08 |48 |0x02 |4 ||0x00002110 ||17 |17 |0|0x0260
UNIT_TYPE_CHA
0 |0x01 |0x08 |48 |0x02 |4 ||0x00002120 ||18 |18 |0|0x0280
UNIT_TYPE_CHA
0 |0x01 |0x08 |48 |0x02 |4 ||0x00002130 ||19 |19 |0|0x02A0
UNIT_TYPE_CHA
0 |0x01 |0x08 |48 |0x02 |4 ||0x00002140 ||20 |20 |0|0x02C0
UNIT_TYPE_CHA
0 |0x01 |0x08 |48 |0x02 |4 ||0x00002150 ||21 |21 |0|0x02E0
UNIT_TYPE_CHA
0 |0x01 |0x08 |48 |0x02 |4 ||0x00002160 ||22 |22 |0|0x0300
UNIT_TYPE_CHA
0 |0x01 |0x08 |48 |0x02 |4 ||0x00002170 ||23 |23 |0|0x0320
UNIT_TYPE_CHA
0 |0x01 |0x08 |48 |0x02 |4 ||0x00002180 ||24 |24 |0|0x0340
UNIT_TYPE_CHA
0 |0x01 |0x08 |48 |0x02 |4 ||0x00002190 ||25 |25 |0|0x0360
UNIT_TYPE_CHA
0 |0x01 |0x08 |48 |0x02 |4 ||0x000021A0 ||26 |26 |0|0x0380
UNIT_TYPE_CHA
0 |0x01 |0x08 |48 |0x02 |4 ||0x000021B0 ||27 |27 |0|0x03A0
UNIT_TYPE_CHA
0 |0x01 |0x08 |48 |0x02 |4 ||0x000021C0 ||28 |28 |0|0x03C0
UNIT_TYPE_CHA
0 |0x01 |0x08 |48 |0x02 |4 ||0x000021D0 ||29 |29 |0|0x03E0
UNIT_TYPE_CHA
0 |0x01 |0x08 |48 |0x02 |4 ||0x000021E0 ||30 |30 |0|0x0400
UNIT_TYPE_CHA
0 |0x01 |0x08 |48 |0x02 |4 ||0x000021F0 ||31 |31 |0|0x0420
UNIT_TYPE_CHA
0 |0x01 |0x08 |48 |0x02 |4 ||0x00002200 ||32 |32 |0|0x0440
UNIT_TYPE_CHA
0 |0x01 |0x08 |48 |0x02 |4 ||0x00002210 ||33 |33 |0|0x0460
UNIT_TYPE_CHA
0 |0x01 |0x08 |48 |0x02 |4 ||0x00002220 ||34 |34 |0|0x0480
UNIT_TYPE_CHA
0 |0x01 |0x08 |48 |0x02 |4 ||0x00002230 ||35 |35 |0|0x04A0
UNIT_TYPE_CHA
0 |0x01 |0x08 |48 |0x02 |4 ||0x00002240 ||36 |36 |0|0x04C0
UNIT_TYPE_CHA
0 |0x01 |0x08 |48 |0x02 |4 ||0x00002250 ||37 |37 |0|0x04E0
UNIT_TYPE_CHA
0 |0x01 |0x08 |48 |0x02 |4 ||0x00002260 ||38 |38 |0|0x0500
UNIT_TYPE_CHA
0 |0x01 |0x08 |48 |0x02 |4 ||0x00002270 ||39 |39 |0|0x0520
UNIT_TYPE_CHA
0 |0x01 |0x08 |48 |0x02 |4 ||0x00002280 ||40 |40 |0|0x0540
UNIT_TYPE_CHA
0 |0x01 |0x08 |48 |0x02 |4 ||0x00002290 ||41 |41 |0|0x0560
UNIT_TYPE_CHA
0 |0x01 |0x08 |48 |0x02 |4 ||0x000022A0 ||42 |42 |0|0x0580
UNIT_TYPE_CHA
0 |0x01 |0x08 |48 |0x02 |4 ||0x000022B0 ||43 |43 |0|0x05A0
UNIT_TYPE_CHA
0 |0x01 |0x08 |48 |0x02 |4 ||0x000022C0 ||44 |44 |0|0x05C0
UNIT_TYPE_CHA
0 |0x01 |0x08 |48 |0x02 |4 ||0x000022D0 ||45 |45 |0|0x05E0
UNIT_TYPE_CHA
0 |0x01 |0x08 |48 |0x02 |4 ||0x000022E0 ||46 |46 |0|0x0600
UNIT_TYPE_CHA
0 |0x01 |0x08 |48 |0x02 |4 ||0x000022F0 ||47 |47 |0|0x0620
UNIT_TYPE_CHA
0 |0x01 |0x08 |48 |0x02 |4 ||0x00002300 ||48 |48 |0|0x0640
UNIT_TYPE_CHA
0 |0x01 |0x08 |48 |0x02 |4 ||0x00002310 ||49 |49 |0|0x0660
UNIT_TYPE_CHA
0 |0x01 |0x08 |48 |0x02 |4 ||0x00002320 ||50 |50 |0|0x0680
UNIT_TYPE_CHA
0 |0x01 |0x08 |48 |0x02 |4 ||0x00002330 ||51 |51 |0|0x06A0
UNIT_TYPE_CHA
0 |0x01 |0x08 |48 |0x02 |4 ||0x00002340 ||52 |52 |0|0x06C0
UNIT_TYPE_CHA
0 |0x01 |0x08 |48 |0x02 |4 ||0x00002350 ||53 |53 |0|0x06E0
UNIT_TYPE_CHA
0 |0x01 |0x08 |48 |0x02 |4 ||0x00002360 ||54 |54 |0|0x0700
UNIT_TYPE_CHA
0 |0x01 |0x08 |48 |0x02 |4 ||0x00002370 ||55 |55 |0|0x0720
UNIT_TYPE_CHA
0 |0x01 |0x08 |48 |0x02 |4 ||0x00002380 ||56 |56 |0|0x0740
UNIT_TYPE_CHA
0 |0x01 |0x08 |48 |0x02 |4 ||0x00002390 ||57 |57 |0|0x0760
UNIT_TYPE_CHA
0 |0x01 |0x08 |48 |0x02 |4 ||0x000023A0 ||58 |58 |0|0x0780
UNIT_TYPE_CHA
0 |0x01 |0x08 |48 |0x02 |4 ||0x000023B0 ||59 |59 |0|0x07A0
UNIT_TYPE_TC
0 |0x01 |0x08 |48 |0x02 |4 ||0x00003000 ||100 | 0 |1|0x0C60
UNIT_TYPE_TC
0 |0x01 |0x08 |48 |0x02 |4 ||0x00003010 ||101 | 1 |1|0x0CC0
UNIT_TYPE_TC
0 |0x01 |0x08 |48 |0x02 |4 ||0x00003020 ||102 | 2 |1|0x0D20
UNIT_TYPE_TC
0 |0x01 |0x08 |48 |0x02 |4 ||0x00003030 ||103 | 3 |1|0x0D80
UNIT_TYPE_TC
0 |0x00 |0x00 | 0 |0x00 |0 ||0x00000000 || 0 | 0 |0|0x0DE0
UNIT_TYPE_TC
0 |0x01 |0x08 |48 |0x02 |4 ||0x00003040 ||105 | 5 |1|0x0E40
UNIT_TYPE_TC
0 |0x01 |0x08 |48 |0x02 |4 ||0x00003050 ||106 | 6 |1|0x0EA0
UNIT_TYPE_TC
0 |0x01 |0x08 |48 |0x02 |4 ||0x00003060 ||107 | 7 |1|0x0F00
UNIT_TYPE_TC
0 |0x01 |0x08 |48 |0x02 |4 ||0x00003070 ||108 | 8 |1|0x0F60
UNIT_TYPE_TC
0 |0x01 |0x08 |48 |0x02 |4 ||0x00003080 ||109 | 9 |1|0x0FC0
UNIT_TYPE_TC
0 |0x00 |0x00 | 0 |0x00 |0 ||0x00000000 || 0 | 0 |0|0x1020
UNIT_TYPE_TC
0 |0x01 |0x08 |48 |0x02 |4 ||0x00003090 ||111 |11 |1|0x1080
UNIT_TYPE_IRP
0 |0x01 |0x08 |48 |0x02 |2 ||0x00003400 ||112 | 0 |2|0x0C80
UNIT_TYPE_IRP
0 |0x01 |0x08 |48 |0x02 |2 ||0x00003410 ||113 | 1 |2|0x0CE0
UNIT_TYPE_IRP
0 |0x01 |0x08 |48 |0x02 |2 ||0x00003420 ||114 | 2 |2|0x0D40
UNIT_TYPE_IRP
0 |0x01 |0x08 |48 |0x02 |2 ||0x00003430 ||115 | 3 |2|0x0DA0
UNIT_TYPE_IRP
0 |0x00 |0x00 | 0 |0x00 |0 ||0x00000000 || 0 | 0 |0|0x0E00
UNIT_TYPE_IRP
0 |0x01 |0x08 |48 |0x02 |2 ||0x00003440 ||117 | 5 |2|0x0E60
UNIT_TYPE_IRP
0 |0x01 |0x08 |48 |0x02 |2 ||0x00003450 ||118 | 6 |2|0x0EC0
UNIT_TYPE_IRP
0 |0x01 |0x08 |48 |0x02 |2 ||0x00003460 ||119 | 7 |2|0x0F20
UNIT_TYPE_IRP
0 |0x01 |0x08 |48 |0x02 |2 ||0x00003470 ||120 | 8 |2|0x0F80
UNIT_TYPE_IRP
0 |0x01 |0x08 |48 |0x02 |2 ||0x00003480 ||121 | 9 |2|0x0FE0
UNIT_TYPE_IRP
0 |0x00 |0x00 | 0 |0x00 |0 ||0x00000000 || 0 | 0 |0|0x1040
UNIT_TYPE_IRP
0 |0x01 |0x08 |48 |0x02 |2 ||0x00003490 ||123 |11 |2|0x10A0
UNIT_TYPE_M2PCIE
0 |0x01 |0x08 |48 |0x02 |4 ||0x00003200 ||124 | 0 |3|0x0C40
UNIT_TYPE_M2PCIE
0 |0x01 |0x08 |48 |0x02 |4 ||0x00003210 ||125 | 1 |3|0x0CA0
UNIT_TYPE_M2PCIE
0 |0x01 |0x08 |48 |0x02 |4 ||0x00003220 ||126 | 2 |3|0x0D00
UNIT_TYPE_M2PCIE
0 |0x01 |0x08 |48 |0x02 |4 ||0x00003230 ||127 | 3 |3|0x0D60
UNIT_TYPE_M2PCIE
0 |0x00 |0x00 | 0 |0x00 |0 ||0x00000000 || 0 | 0 |0|0x0DC0
UNIT_TYPE_M2PCIE
0 |0x01 |0x08 |48 |0x02 |4 ||0x00003240 ||129 | 5 |3|0x0E20
UNIT_TYPE_M2PCIE
0 |0x01 |0x08 |48 |0x02 |4 ||0x00003250 ||130 | 6 |3|0x0E80
UNIT_TYPE_M2PCIE
0 |0x01 |0x08 |48 |0x02 |4 ||0x00003260 ||131 | 7 |3|0x0EE0
UNIT_TYPE_M2PCIE
0 |0x01 |0x08 |48 |0x02 |4 ||0x00003270 ||132 | 8 |3|0x0F40
UNIT_TYPE_M2PCIE
0 |0x01 |0x08 |48 |0x02 |4 ||0x00003280 ||133 | 9 |3|0x0FA0
UNIT_TYPE_M2PCIE
0 |0x00 |0x00 | 0 |0x00 |0 ||0x00000000 || 0 | 0 |0|0x1000
UNIT_TYPE_M2PCIE
0 |0x01 |0x08 |48 |0x02 |4 ||0x00003290 ||135 |11 |3|0x1060
UNIT_TYPE_PCU
0 |0x01 |0x08 |48 |0x02 |4 ||0x00002FC0 ||136 | 0 |4|0x0020
UNIT_TYPE_MC
1 |0x5C |0x08 |48 |0x40 |4 ||0xC8AA2800 ||138 | 0 |6|0x08C0
UNIT_TYPE_MC
1 |0x5C |0x08 |48 |0x40 |4 ||0xC8AAA800 ||139 | 1 |6|0x08E0
UNIT_TYPE_MC
1 |0x5C |0x08 |48 |0x40 |4 ||0xC8B22800 ||140 | 2 |6|0x0900
UNIT_TYPE_MC
1 |0x5C |0x08 |48 |0x40 |4 ||0xC8B2A800 ||141 | 3 |6|0x0920
UNIT_TYPE_MC
1 |0x5C |0x08 |48 |0x40 |4 ||0xC8BA2800 ||142 | 4 |6|0x0940
UNIT_TYPE_MC
1 |0x5C |0x08 |48 |0x40 |4 ||0xC8BAA800 ||143 | 5 |6|0x0960
UNIT_TYPE_MC
1 |0x5C |0x08 |48 |0x40 |4 ||0xC8C22800 ||144 | 6 |6|0x0980
UNIT_TYPE_MC
1 |0x5C |0x08 |48 |0x40 |4 ||0xC8C2A800 ||145 | 7 |6|0x09A0
UNIT_TYPE_M2M
2 |0x70 |0x08 |48 |0x30 |4 ||0x87E60438 ||146 | 0 |7|0x09C0
UNIT_TYPE_M2M
2 |0x70 |0x08 |48 |0x30 |4 ||0x87E68438 ||147 | 1 |7|0x09E0
UNIT_TYPE_M2M
2 |0x70 |0x08 |48 |0x30 |4 ||0x87E70438 ||148 | 2 |7|0x0A00
UNIT_TYPE_M2M
2 |0x70 |0x08 |48 |0x30 |4 ||0x87E78438 ||149 | 3 |7|0x0A20
UNIT_TYPE_M2M
2 |0x70 |0x08 |48 |0x30 |4 ||0x87E80438 ||150 | 4 |7|0x0A40
UNIT_TYPE_M2M
2 |0x70 |0x08 |48 |0x30 |4 ||0x87E88438 ||151 | 5 |7|0x0A60
UNIT_TYPE_M2M
2 |0x70 |0x08 |48 |0x30 |4 ||0x87E90438 ||152 | 6 |7|0x0A80
UNIT_TYPE_M2M
2 |0x70 |0x08 |48 |0x30 |4 ||0x87E98438 ||153 | 7 |7|0x0AA0
UNIT_TYPE_M2M
2 |0x70 |0x08 |48 |0x30 |4 ||0x87EA0438 ||154 | 8 |7|0x0AC0
UNIT_TYPE_M2M
2 |0x70 |0x08 |48 |0x30 |4 ||0x87EA8438 ||155 | 9 |7|0x0AE0
UNIT_TYPE_M2M
2 |0x70 |0x08 |48 |0x30 |4 ||0x87EB0438 ||156 |10 |7|0x0B00
UNIT_TYPE_M2M
2 |0x70 |0x08 |48 |0x30 |4 ||0x87EB8438 ||157 |11 |7|0x0B20
UNIT_TYPE_M2M
2 |0x70 |0x08 |48 |0x30 |4 ||0x87EC0438 ||158 |12 |7|0x0B40
UNIT_TYPE_M2M
2 |0x70 |0x08 |48 |0x30 |4 ||0x87EC8438 ||159 |13 |7|0x0B60
UNIT_TYPE_M2M
2 |0x70 |0x08 |48 |0x30 |4 ||0x87ED0438 ||160 |14 |7|0x0B80
UNIT_TYPE_M2M
2 |0x70 |0x08 |48 |0x30 |4 ||0x87ED8438 ||161 |15 |7|0x0BA0
UNIT_TYPE_M2M
2 |0x70 |0x08 |48 |0x30 |4 ||0x87EE0438 ||162 |16 |7|0x0BC0
UNIT_TYPE_M2M
2 |0x70 |0x08 |48 |0x30 |4 ||0x87EE8438 ||163 |17 |7|0x0BE0
UNIT_TYPE_M2M
2 |0x70 |0x08 |48 |0x30 |4 ||0x87EF0438 ||164 |18 |7|0x0C00
UNIT_TYPE_M2M
2 |0x70 |0x08 |48 |0x30 |4 ||0x87EF8438 ||165 |19 |7|0x0C20
UNIT_TYPE_UPI_LL
2 |0x64 |0x08 |48 |0x38 |4 ||0x87E09318 ||166 | 0 |8|0x07E0
UNIT_TYPE_UPI_LL
2 |0x64 |0x08 |48 |0x38 |4 ||0x87E11318 ||167 | 1 |8|0x0820
UNIT_TYPE_UPI_LL
2 |0x64 |0x08 |48 |0x38 |4 ||0x87E19318 ||168 | 2 |8|0x0860
UNIT_TYPE_UPI_LL
2 |0x64 |0x08 |48 |0x38 |4 ||0x87E21318 ||169 | 3 |8|0x08A0
UNIT_TYPE_M3UPI
2 |0x58 |0x08 |48 |0x38 |4 ||0x87E290A0 ||170 | 0 |9|0x07C0
UNIT_TYPE_M3UPI
2 |0x58 |0x08 |48 |0x38 |4 ||0x87E310A0 ||171 | 1 |9|0x0800
UNIT_TYPE_M3UPI
2 |0x58 |0x08 |48 |0x38 |4 ||0x87E390A0 ||172 | 2 |9|0x0840
UNIT_TYPE_M3UPI
2 |0x58 |0x08 |48 |0x38 |4 ||0x87E410A0 ||173 | 3 |9|0x0880
UNIT_TYPE_MDF
0 |0x01 |0x08 |48 |0x02 |4 ||0x00002840 ||60 | 0 |11|0x12C0
UNIT_TYPE_MDF
0 |0x01 |0x08 |48 |0x02 |4 ||0x00002850 ||61 | 1 |11|0x12E0
UNIT_TYPE_MDF
0 |0x01 |0x08 |48 |0x02 |4 ||0x00002860 ||62 | 2 |11|0x1300
UNIT_TYPE_MDF
0 |0x01 |0x08 |48 |0x02 |4 ||0x00002870 ||63 | 3 |11|0x1320
UNIT_TYPE_MDF
0 |0x01 |0x08 |48 |0x02 |4 ||0x00002880 ||64 | 4 |11|0x1340
UNIT_TYPE_MDF
0 |0x01 |0x08 |48 |0x02 |4 ||0x00002890 ||65 | 5 |11|0x1360
UNIT_TYPE_MDF
0 |0x01 |0x08 |48 |0x02 |4 ||0x000028E0 ||66 | 6 |11|0x1380
UNIT_TYPE_MDF
0 |0x01 |0x08 |48 |0x02 |4 ||0x000028F0 ||67 | 7 |11|0x13A0
UNIT_TYPE_MDF
0 |0x01 |0x08 |48 |0x02 |4 ||0x00002900 ||68 | 8 |11|0x13C0
UNIT_TYPE_MDF
0 |0x01 |0x08 |48 |0x02 |4 ||0x00002910 ||69 | 9 |11|0x13E0
UNIT_TYPE_MDF
0 |0x01 |0x08 |48 |0x02 |4 ||0x00002920 ||70 |10 |11|0x1400
UNIT_TYPE_MDF
0 |0x01 |0x08 |48 |0x02 |4 ||0x00002930 ||71 |11 |11|0x1420
UNIT_TYPE_MDF
0 |0x01 |0x08 |48 |0x02 |4 ||0x00002980 ||72 |12 |11|0x1440
UNIT_TYPE_MDF
0 |0x01 |0x08 |48 |0x02 |4 ||0x00002990 ||73 |13 |11|0x1460
UNIT_TYPE_MDF
0 |0x01 |0x08 |48 |0x02 |4 ||0x000029A0 ||74 |14 |11|0x1480
UNIT_TYPE_MDF
0 |0x01 |0x08 |48 |0x02 |4 ||0x000029B0 ||75 |15 |11|0x14A0
UNIT_TYPE_MDF
0 |0x01 |0x08 |48 |0x02 |4 ||0x000029C0 ||76 |16 |11|0x14C0
UNIT_TYPE_MDF
0 |0x01 |0x08 |48 |0x02 |4 ||0x000029D0 ||77 |17 |11|0x14E0
UNIT_TYPE_MDF
0 |0x01 |0x08 |48 |0x02 |4 ||0x00002A20 ||78 |18 |11|0x1500
UNIT_TYPE_MDF
0 |0x01 |0x08 |48 |0x02 |4 ||0x00002A30 ||79 |19 |11|0x1520
UNIT_TYPE_MDF
0 |0x01 |0x08 |48 |0x02 |4 ||0x00002A40 ||80 |20 |11|0x1540
UNIT_TYPE_MDF
0 |0x01 |0x08 |48 |0x02 |4 ||0x00002A50 ||81 |21 |11|0x1560
UNIT_TYPE_MDF
0 |0x01 |0x08 |48 |0x02 |4 ||0x00002A60 ||82 |22 |11|0x1580
UNIT_TYPE_MDF
0 |0x01 |0x08 |48 |0x02 |4 ||0x00002A70 ||83 |23 |11|0x15A0
UNIT_TYPE_MDF
0 |0x01 |0x08 |48 |0x02 |4 ||0x00002800 ||84 |24 |11|0x15C0
UNIT_TYPE_MDF
0 |0x01 |0x08 |48 |0x02 |4 ||0x00002810 ||85 |25 |11|0x15E0
UNIT_TYPE_MDF
0 |0x01 |0x08 |48 |0x02 |4 ||0x00002820 ||86 |26 |11|0x1600
UNIT_TYPE_MDF
0 |0x01 |0x08 |48 |0x02 |4 ||0x00002830 ||87 |27 |11|0x1620
UNIT_TYPE_MDF
0 |0x01 |0x08 |48 |0x02 |4 ||0x000028A0 ||88 |28 |11|0x1640
UNIT_TYPE_MDF
0 |0x01 |0x08 |48 |0x02 |4 ||0x000028B0 ||89 |29 |11|0x1660
UNIT_TYPE_MDF
0 |0x01 |0x08 |48 |0x02 |4 ||0x000028C0 ||90 |30 |11|0x1680
UNIT_TYPE_MDF
0 |0x01 |0x08 |48 |0x02 |4 ||0x000028D0 ||91 |31 |11|0x16A0
UNIT_TYPE_MDF
0 |0x01 |0x08 |48 |0x02 |4 ||0x00002970 ||92 |32 |11|0x16C0
UNIT_TYPE_MDF
0 |0x01 |0x08 |48 |0x02 |4 ||0x00002960 ||93 |33 |11|0x16E0
UNIT_TYPE_MDF
0 |0x01 |0x08 |48 |0x02 |4 ||0x00002950 ||94 |34 |11|0x1700
UNIT_TYPE_MDF
0 |0x01 |0x08 |48 |0x02 |4 ||0x00002940 ||95 |35 |11|0x1720
UNIT_TYPE_MDF
0 |0x01 |0x08 |48 |0x02 |4 ||0x00002A10 ||96 |36 |11|0x1740
UNIT_TYPE_MDF
0 |0x01 |0x08 |48 |0x02 |4 ||0x00002A00 ||97 |37 |11|0x1760
UNIT_TYPE_MDF
0 |0x01 |0x08 |48 |0x02 |4 ||0x000029F0 ||98 |38 |11|0x1780
UNIT_TYPE_MDF
0 |0x01 |0x08 |48 |0x02 |4 ||0x000029E0 ||99 |39 |11|0x17A0
UNIT_TYPE_IAL_0
0 |0x00 |0x00 | 0 |0x00 |0 ||0x00000000 || 0 | 0 |0|0x10C0
UNIT_TYPE_IAL_0
0 |0x00 |0x00 | 0 |0x00 |0 ||0x00000000 || 0 | 0 |0|0x1100
UNIT_TYPE_IAL_0
0 |0x00 |0x00 | 0 |0x00 |0 ||0x00000000 || 0 | 0 |0|0x1140
UNIT_TYPE_IAL_0
0 |0x00 |0x00 | 0 |0x00 |0 ||0x00000000 || 0 | 0 |0|0x1180
UNIT_TYPE_IAL_0
0 |0x00 |0x00 | 0 |0x00 |0 ||0x00000000 || 0 | 0 |0|0x11C0
UNIT_TYPE_IAL_0
0 |0x00 |0x00 | 0 |0x00 |0 ||0x00000000 || 0 | 0 |0|0x1200
UNIT_TYPE_IAL_0
0 |0x00 |0x00 | 0 |0x00 |0 ||0x00000000 || 0 | 0 |0|0x1240
UNIT_TYPE_IAL_0
0 |0x00 |0x00 | 0 |0x00 |0 ||0x00000000 || 0 | 0 |0|0x1280
UNIT_TYPE_IAL_1
0 |0x00 |0x00 | 0 |0x00 |0 ||0x00000000 || 0 | 0 |0|0x10E0
UNIT_TYPE_IAL_1
0 |0x00 |0x00 | 0 |0x00 |0 ||0x00000000 || 0 | 0 |0|0x1120
UNIT_TYPE_IAL_1
0 |0x00 |0x00 | 0 |0x00 |0 ||0x00000000 || 0 | 0 |0|0x1160
UNIT_TYPE_IAL_1
0 |0x00 |0x00 | 0 |0x00 |0 ||0x00000000 || 0 | 0 |0|0x11A0
UNIT_TYPE_IAL_1
0 |0x00 |0x00 | 0 |0x00 |0 ||0x00000000 || 0 | 0 |0|0x11E0
UNIT_TYPE_IAL_1
0 |0x00 |0x00 | 0 |0x00 |0 ||0x00000000 || 0 | 0 |0|0x1220
UNIT_TYPE_IAL_1
0 |0x00 |0x00 | 0 |0x00 |0 ||0x00000000 || 0 | 0 |0|0x1260
UNIT_TYPE_IAL_1
0 |0x00 |0x00 | 0 |0x00 |0 ||0x00000000 || 0 | 0 |0|0x12A0
UNIT_TYPE_HBM
1 |0x5C |0x08 |48 |0x40 |4 ||0xC8941C00 ||190 | 0 |14|0x17C0
UNIT_TYPE_HBM
1 |0x5C |0x08 |48 |0x40 |4 ||0xC8945C00 ||191 | 1 |14|0x17E0
UNIT_TYPE_HBM
1 |0x5C |0x08 |48 |0x40 |4 ||0xC894AC00 ||192 | 2 |14|0x1800
UNIT_TYPE_HBM
1 |0x5C |0x08 |48 |0x40 |4 ||0xC894EC00 ||193 | 3 |14|0x1820
UNIT_TYPE_HBM
1 |0x5C |0x08 |48 |0x40 |4 ||0xC8953C00 ||194 | 4 |14|0x1840
UNIT_TYPE_HBM
1 |0x5C |0x08 |48 |0x40 |4 ||0xC8957C00 ||195 | 5 |14|0x1860
UNIT_TYPE_HBM
1 |0x5C |0x08 |48 |0x40 |4 ||0xC895CC00 ||196 | 6 |14|0x1880
UNIT_TYPE_HBM
1 |0x5C |0x08 |48 |0x40 |4 ||0xC8960C00 ||197 | 7 |14|0x18A0
UNIT_TYPE_HBM
1 |0x5C |0x08 |48 |0x40 |4 ||0xC8965C00 ||198 | 8 |14|0x18C0
UNIT_TYPE_HBM
1 |0x5C |0x08 |48 |0x40 |4 ||0xC8969C00 ||199 | 9 |14|0x18E0
UNIT_TYPE_HBM
1 |0x5C |0x08 |48 |0x40 |4 ||0xC896EC00 ||200 |10 |14|0x1900
UNIT_TYPE_HBM
1 |0x5C |0x08 |48 |0x40 |4 ||0xC8972C00 ||201 |11 |14|0x1920
UNIT_TYPE_HBM
1 |0x5C |0x08 |48 |0x40 |4 ||0xC8977C00 ||202 |12 |14|0x1940
UNIT_TYPE_HBM
1 |0x5C |0x08 |48 |0x40 |4 ||0xC897BC00 ||203 |13 |14|0x1960
UNIT_TYPE_HBM
1 |0x5C |0x08 |48 |0x40 |4 ||0xC8980C00 ||204 |14 |14|0x1980
UNIT_TYPE_HBM
1 |0x5C |0x08 |48 |0x40 |4 ||0xC8984C00 ||205 |15 |14|0x19A0
UNIT_TYPE_HBM
1 |0x5C |0x08 |48 |0x40 |4 ||0xC8989C00 ||206 |16 |14|0x19C0
UNIT_TYPE_HBM
1 |0x5C |0x08 |48 |0x40 |4 ||0xC898DC00 ||207 |17 |14|0x19E0
UNIT_TYPE_HBM
1 |0x5C |0x08 |48 |0x40 |4 ||0xC8992C00 ||208 |18 |14|0x1A00
UNIT_TYPE_HBM
1 |0x5C |0x08 |48 |0x40 |4 ||0xC8996C00 ||209 |19 |14|0x1A20
UNIT_TYPE_HBM
1 |0x5C |0x08 |48 |0x40 |4 ||0xC899BC00 ||210 |20 |14|0x1A40
UNIT_TYPE_HBM
1 |0x5C |0x08 |48 |0x40 |4 ||0xC899FC00 ||211 |21 |14|0x1A60
UNIT_TYPE_HBM
1 |0x5C |0x08 |48 |0x40 |4 ||0xC89A4C00 ||212 |22 |14|0x1A80
UNIT_TYPE_HBM
1 |0x5C |0x08 |48 |0x40 |4 ||0xC89A8C00 ||213 |23 |14|0x1AA0
UNIT_TYPE_HBM
1 |0x5C |0x08 |48 |0x40 |4 ||0xC89ADC00 ||214 |24 |14|0x1AC0
UNIT_TYPE_HBM
1 |0x5C |0x08 |48 |0x40 |4 ||0xC89B1C00 ||215 |25 |14|0x1AE0
UNIT_TYPE_HBM
1 |0x5C |0x08 |48 |0x40 |4 ||0xC89B6C00 ||216 |26 |14|0x1B00
UNIT_TYPE_HBM
1 |0x5C |0x08 |48 |0x40 |4 ||0xC89BAC00 ||217 |27 |14|0x1B20
UNIT_TYPE_HBM
1 |0x5C |0x08 |48 |0x40 |4 ||0xC89BFC00 ||218 |28 |14|0x1B40
UNIT_TYPE_HBM
1 |0x5C |0x08 |48 |0x40 |4 ||0xC89C3C00 ||219 |29 |14|0x1B60
UNIT_TYPE_HBM
1 |0x5C |0x08 |48 |0x40 |4 ||0xC89C8C00 ||220 |30 |14|0x1B80
UNIT_TYPE_HBM
1 |0x5C |0x08 |48 |0x40 |4 ||0xC89CCC00 ||221 |31 |14|0x1BA0
[OOBMSM] InitOobMsmBar() Enter
Socket[0], OobMsm.Func[2], BAR[0]
Disable MSE and BME
Original StsCmdReg Value = 0x00100004
BarSize: 0x00200000
BarBase: 0xC6C00000(Already assigned)
Enable MSE and BME
[OOBMSM] InitOobMsmBar() Exit
SPK Bar0 address: 0xC6C00000
SPK instance 0: BAR offset: 0x00058000
SPK SNC Base Address 1: 0x0FFF0000
SPK SNC Base Address 2: 0x1FE00022
SPK SNC Base Address 3: 0x00000042
SPK SNC Base Address 4: 0x00000062
SPK SNC Base Address 5: 0x00000082
SPK SNC Upper Base Address: 0x00000000
SPK_SNC_CONFIG: 0x0000000F
SPK_UNCORE_SNC_CONFIG: NumChaPerCluster:13, BaseChaCluster1:13, BaseChaCluster2:26, BaseChaCluster3:39
SPK_UMA_CLUSTER_CFG: UmaClusterEn: 0, XorDefeatur: 0
SPK instance 1: BAR offset: 0x00059000
SPK SNC Base Address 1: 0x0FFF0000
SPK SNC Base Address 2: 0x1FE00022
SPK SNC Base Address 3: 0x00000042
SPK SNC Base Address 4: 0x00000062
SPK SNC Base Address 5: 0x00000082
SPK SNC Upper Base Address: 0x00000000
SPK_SNC_CONFIG: 0x0000000F
SPK_UNCORE_SNC_CONFIG: NumChaPerCluster:13, BaseChaCluster1:13, BaseChaCluster2:26, BaseChaCluster3:39
SPK_UMA_CLUSTER_CFG: UmaClusterEn: 0, XorDefeatur: 0
SPK instance 2: BAR offset: 0x0005A000
SPK SNC Base Address 1: 0x0FFF0000
SPK SNC Base Address 2: 0x1FE00022
SPK SNC Base Address 3: 0x00000042
SPK SNC Base Address 4: 0x00000062
SPK SNC Base Address 5: 0x00000082
SPK SNC Upper Base Address: 0x00000000
SPK_SNC_CONFIG: 0x0000000F
SPK_UNCORE_SNC_CONFIG: NumChaPerCluster:13, BaseChaCluster1:13, BaseChaCluster2:26, BaseChaCluster3:39
SPK_UMA_CLUSTER_CFG: UmaClusterEn: 0, XorDefeatur: 0
SPK instance 3: BAR offset: 0x0005B000
SPK SNC Base Address 1: 0x0FFF0000
SPK SNC Base Address 2: 0x1FE00022
SPK SNC Base Address 3: 0x00000042
SPK SNC Base Address 4: 0x00000062
SPK SNC Base Address 5: 0x00000082
SPK SNC Upper Base Address: 0x00000000
SPK_SNC_CONFIG: 0x0000000F
SPK_UNCORE_SNC_CONFIG: NumChaPerCluster:13, BaseChaCluster1:13, BaseChaCluster2:26, BaseChaCluster3:39
SPK_UMA_CLUSTER_CFG: UmaClusterEn: 0, XorDefeatur: 0
SPK instance 4: BAR offset: 0x0005C000
SPK SNC Base Address 1: 0x0FFF0000
SPK SNC Base Address 2: 0x1FE00022
SPK SNC Base Address 3: 0x00000042
SPK SNC Base Address 4: 0x00000062
SPK SNC Base Address 5: 0x00000082
SPK SNC Upper Base Address: 0x00000000
SPK_SNC_CONFIG: 0x0000000F
SPK_UNCORE_SNC_CONFIG: NumChaPerCluster:13, BaseChaCluster1:13, BaseChaCluster2:26, BaseChaCluster3:39
SPK_UMA_CLUSTER_CFG: UmaClusterEn: 0, XorDefeatur: 0
SPK instance 5: BAR offset: 0x0005D000
SPK SNC Base Address 1: 0x0FFF0000
SPK SNC Base Address 2: 0x1FE00022
SPK SNC Base Address 3: 0x00000042
SPK SNC Base Address 4: 0x00000062
SPK SNC Base Address 5: 0x00000082
SPK SNC Upper Base Address: 0x00000000
SPK_SNC_CONFIG: 0x0000000F
SPK_UNCORE_SNC_CONFIG: NumChaPerCluster:13, BaseChaCluster1:13, BaseChaCluster2:26, BaseChaCluster3:39
SPK_UMA_CLUSTER_CFG: UmaClusterEn: 0, XorDefeatur: 0
SPK instance 6: BAR offset: 0x0005E000
SPK SNC Base Address 1: 0x0FFF0000
SPK SNC Base Address 2: 0x1FE00022
SPK SNC Base Address 3: 0x00000042
SPK SNC Base Address 4: 0x00000062
SPK SNC Base Address 5: 0x00000082
SPK SNC Upper Base Address: 0x00000000
SPK_SNC_CONFIG: 0x0000000F
SPK_UNCORE_SNC_CONFIG: NumChaPerCluster:13, BaseChaCluster1:13, BaseChaCluster2:26, BaseChaCluster3:39
SPK_UMA_CLUSTER_CFG: UmaClusterEn: 0, XorDefeatur: 0
SPK instance 7: BAR offset: 0x0005F000
SPK SNC Base Address 1: 0x0FFF0000
SPK SNC Base Address 2: 0x1FE00022
SPK SNC Base Address 3: 0x00000042
SPK SNC Base Address 4: 0x00000062
SPK SNC Base Address 5: 0x00000082
SPK SNC Upper Base Address: 0x00000000
SPK_SNC_CONFIG: 0x0000000F
SPK_UNCORE_SNC_CONFIG: NumChaPerCluster:13, BaseChaCluster1:13, BaseChaCluster2:26, BaseChaCluster3:39
SPK_UMA_CLUSTER_CFG: UmaClusterEn: 0, XorDefeatur: 0
SPK instance 8: BAR offset: 0x00060000
SPK SNC Base Address 1: 0x0FFF0000
SPK SNC Base Address 2: 0x1FE00022
SPK SNC Base Address 3: 0x00000042
SPK SNC Base Address 4: 0x00000062
SPK SNC Base Address 5: 0x00000082
SPK SNC Upper Base Address: 0x00000000
SPK_SNC_CONFIG: 0x0000000F
SPK_UNCORE_SNC_CONFIG: NumChaPerCluster:13, BaseChaCluster1:13, BaseChaCluster2:26, BaseChaCluster3:39
SPK_UMA_CLUSTER_CFG: UmaClusterEn: 0, XorDefeatur: 0
SPK instance 9: BAR offset: 0x00061000
SPK SNC Base Address 1: 0x0FFF0000
SPK SNC Base Address 2: 0x1FE00022
SPK SNC Base Address 3: 0x00000042
SPK SNC Base Address 4: 0x00000062
SPK SNC Base Address 5: 0x00000082
SPK SNC Upper Base Address: 0x00000000
SPK_SNC_CONFIG: 0x0000000F
SPK_UNCORE_SNC_CONFIG: NumChaPerCluster:13, BaseChaCluster1:13, BaseChaCluster2:26, BaseChaCluster3:39
SPK_UMA_CLUSTER_CFG: UmaClusterEn: 0, XorDefeatur: 0
SPK instance 10: BAR offset: 0x00062000
SPK SNC Base Address 1: 0x0FFF0000
SPK SNC Base Address 2: 0x1FE00022
SPK SNC Base Address 3: 0x00000042
SPK SNC Base Address 4: 0x00000062
SPK SNC Base Address 5: 0x00000082
SPK SNC Upper Base Address: 0x00000000
SPK_SNC_CONFIG: 0x0000000F
SPK_UNCORE_SNC_CONFIG: NumChaPerCluster:13, BaseChaCluster1:13, BaseChaCluster2:26, BaseChaCluster3:39
SPK_UMA_CLUSTER_CFG: UmaClusterEn: 0, XorDefeatur: 0
SPK instance 11: BAR offset: 0x00063000
SPK SNC Base Address 1: 0x0FFF0000
SPK SNC Base Address 2: 0x1FE00022
SPK SNC Base Address 3: 0x00000042
SPK SNC Base Address 4: 0x00000062
SPK SNC Base Address 5: 0x00000082
SPK SNC Upper Base Address: 0x00000000
SPK_SNC_CONFIG: 0x0000000F
SPK_UNCORE_SNC_CONFIG: NumChaPerCluster:13, BaseChaCluster1:13, BaseChaCluster2:26, BaseChaCluster3:39
SPK_UMA_CLUSTER_CFG: UmaClusterEn: 0, XorDefeatur: 0
SPK instance 12: BAR offset: 0x00070000
SPK SNC Base Address 1: 0x0FFF0000
SPK SNC Base Address 2: 0x1FE00022
SPK SNC Base Address 3: 0x00000042
SPK SNC Base Address 4: 0x00000062
SPK SNC Base Address 5: 0x00000082
SPK SNC Upper Base Address: 0x00000000
SPK_SNC_CONFIG: 0x0000000F
SPK_UNCORE_SNC_CONFIG: NumChaPerCluster:13, BaseChaCluster1:13, BaseChaCluster2:26, BaseChaCluster3:39
SPK_UMA_CLUSTER_CFG: UmaClusterEn: 0, XorDefeatur: 0
SPK instance 13: BAR offset: 0x00071000
SPK SNC Base Address 1: 0x0FFF0000
SPK SNC Base Address 2: 0x1FE00022
SPK SNC Base Address 3: 0x00000042
SPK SNC Base Address 4: 0x00000062
SPK SNC Base Address 5: 0x00000082
SPK SNC Upper Base Address: 0x00000000
SPK_SNC_CONFIG: 0x0000000F
SPK_UNCORE_SNC_CONFIG: NumChaPerCluster:13, BaseChaCluster1:13, BaseChaCluster2:26, BaseChaCluster3:39
SPK_UMA_CLUSTER_CFG: UmaClusterEn: 0, XorDefeatur: 0
SPK instance 14: BAR offset: 0x00072000
SPK SNC Base Address 1: 0x0FFF0000
SPK SNC Base Address 2: 0x1FE00022
SPK SNC Base Address 3: 0x00000042
SPK SNC Base Address 4: 0x00000062
SPK SNC Base Address 5: 0x00000082
SPK SNC Upper Base Address: 0x00000000
SPK_SNC_CONFIG: 0x0000000F
SPK_UNCORE_SNC_CONFIG: NumChaPerCluster:13, BaseChaCluster1:13, BaseChaCluster2:26, BaseChaCluster3:39
SPK_UMA_CLUSTER_CFG: UmaClusterEn: 0, XorDefeatur: 0
SPK instance 15: BAR offset: 0x00073000
SPK SNC Base Address 1: 0x0FFF0000
SPK SNC Base Address 2: 0x1FE00022
SPK SNC Base Address 3: 0x00000042
SPK SNC Base Address 4: 0x00000062
SPK SNC Base Address 5: 0x00000082
SPK SNC Upper Base Address: 0x00000000
SPK_SNC_CONFIG: 0x0000000F
SPK_UNCORE_SNC_CONFIG: NumChaPerCluster:13, BaseChaCluster1:13, BaseChaCluster2:26, BaseChaCluster3:39
SPK_UMA_CLUSTER_CFG: UmaClusterEn: 0, XorDefeatur: 0
[SDSi] Init for Socket[1] - Begin
[VSEC] VSEC discovery - S:B:D:F = 0x0:0xE7:0x3:0x1, VidDid = 0x09A78086
VsecId: 0x00000041 SDSI VSEC capability offset: 0x00000160
[OOBMSM] InitOobMsmBar() Enter
Socket[1], OobMsm.Func[1], BAR[1]
Disable MSE and BME
Original StsCmdReg Value = 0x00100006
BarSize: 0x00040000
BarBase: 0xF9B40000(Already assigned)
Enable MSE and BME
[OOBMSM] InitOobMsmBar() Exit
SDSi MMIO Layout Address = 0xF9B42000
SdsiMmio.Ppin Address = 0xF9B42408, Value = 0x22E548CB80015B4D
[OOBMSM] InitOobMsmBar() Enter
Socket[1], OobMsm.Func[1], BAR[0]
Disable MSE and BME
Original StsCmdReg Value = 0x00100006
BarSize: 0x00002000
BarBase: 0xF9B00000(Already assigned)
Enable MSE and BME
[OOBMSM] InitOobMsmBar() Exit
PMon Bar0 address: 0xF9B00000
Global Discovery State at address: 0xF9B00000
Access Type|Max Blocks|Block Stride|Type ||GlobalControlAddr||NumBlockStatusBits|GblCtrStatAddr
[63:62] |[25:16] |[15:8] |[7:0]||[63:0] ||[23:8] |[7:0]
0 |221 |4 |5 ||0x2FF0 ||209 |0xE
Unit Discovery State at address: 0xF9B00020
Access Type|UnitStatus Offset|Counter0 Offset|Ctrl Width|Ctrl0 Offset|Num Ctrl Regs||UnitCounterControlAddr||Gbl Stat Pos|Unit ID|UnitType|Offset
[63:62] |[39:32] |[31:24] |[23:16] |[15:8] |[7:0] ||[63:0] ||[47:32] |[31:16]|[15:0]|
UNIT_TYPE_CHA
0 |0x01 |0x08 |48 |0x02 |4 ||0x00002000 || 0 | 0 |0|0x0040
UNIT_TYPE_CHA
0 |0x01 |0x08 |48 |0x02 |4 ||0x00002010 || 1 | 1 |0|0x0060
UNIT_TYPE_CHA
0 |0x01 |0x08 |48 |0x02 |4 ||0x00002020 || 2 | 2 |0|0x0080
UNIT_TYPE_CHA
0 |0x01 |0x08 |48 |0x02 |4 ||0x00002030 || 3 | 3 |0|0x00A0
UNIT_TYPE_CHA
0 |0x01 |0x08 |48 |0x02 |4 ||0x00002040 || 4 | 4 |0|0x00C0
UNIT_TYPE_CHA
0 |0x01 |0x08 |48 |0x02 |4 ||0x00002050 || 5 | 5 |0|0x00E0
UNIT_TYPE_CHA
0 |0x01 |0x08 |48 |0x02 |4 ||0x00002060 || 6 | 6 |0|0x0100
UNIT_TYPE_CHA
0 |0x01 |0x08 |48 |0x02 |4 ||0x00002070 || 7 | 7 |0|0x0120
UNIT_TYPE_CHA
0 |0x01 |0x08 |48 |0x02 |4 ||0x00002080 || 8 | 8 |0|0x0140
UNIT_TYPE_CHA
0 |0x01 |0x08 |48 |0x02 |4 ||0x00002090 || 9 | 9 |0|0x0160
UNIT_TYPE_CHA
0 |0x01 |0x08 |48 |0x02 |4 ||0x000020A0 ||10 |10 |0|0x0180
UNIT_TYPE_CHA
0 |0x01 |0x08 |48 |0x02 |4 ||0x000020B0 ||11 |11 |0|0x01A0
UNIT_TYPE_CHA
0 |0x01 |0x08 |48 |0x02 |4 ||0x000020C0 ||12 |12 |0|0x01C0
UNIT_TYPE_CHA
0 |0x01 |0x08 |48 |0x02 |4 ||0x000020D0 ||13 |13 |0|0x01E0
UNIT_TYPE_CHA
0 |0x01 |0x08 |48 |0x02 |4 ||0x000020E0 ||14 |14 |0|0x0200
UNIT_TYPE_CHA
0 |0x01 |0x08 |48 |0x02 |4 ||0x000020F0 ||15 |15 |0|0x0220
UNIT_TYPE_CHA
0 |0x01 |0x08 |48 |0x02 |4 ||0x00002100 ||16 |16 |0|0x0240
UNIT_TYPE_CHA
0 |0x01 |0x08 |48 |0x02 |4 ||0x00002110 ||17 |17 |0|0x0260
UNIT_TYPE_CHA
0 |0x01 |0x08 |48 |0x02 |4 ||0x00002120 ||18 |18 |0|0x0280
UNIT_TYPE_CHA
0 |0x01 |0x08 |48 |0x02 |4 ||0x00002130 ||19 |19 |0|0x02A0
UNIT_TYPE_CHA
0 |0x01 |0x08 |48 |0x02 |4 ||0x00002140 ||20 |20 |0|0x02C0
UNIT_TYPE_CHA
0 |0x01 |0x08 |48 |0x02 |4 ||0x00002150 ||21 |21 |0|0x02E0
UNIT_TYPE_CHA
0 |0x01 |0x08 |48 |0x02 |4 ||0x00002160 ||22 |22 |0|0x0300
UNIT_TYPE_CHA
0 |0x01 |0x08 |48 |0x02 |4 ||0x00002170 ||23 |23 |0|0x0320
UNIT_TYPE_CHA
0 |0x01 |0x08 |48 |0x02 |4 ||0x00002180 ||24 |24 |0|0x0340
UNIT_TYPE_CHA
0 |0x01 |0x08 |48 |0x02 |4 ||0x00002190 ||25 |25 |0|0x0360
UNIT_TYPE_CHA
0 |0x01 |0x08 |48 |0x02 |4 ||0x000021A0 ||26 |26 |0|0x0380
UNIT_TYPE_CHA
0 |0x01 |0x08 |48 |0x02 |4 ||0x000021B0 ||27 |27 |0|0x03A0
UNIT_TYPE_CHA
0 |0x01 |0x08 |48 |0x02 |4 ||0x000021C0 ||28 |28 |0|0x03C0
UNIT_TYPE_CHA
0 |0x01 |0x08 |48 |0x02 |4 ||0x000021D0 ||29 |29 |0|0x03E0
UNIT_TYPE_CHA
0 |0x01 |0x08 |48 |0x02 |4 ||0x000021E0 ||30 |30 |0|0x0400
UNIT_TYPE_CHA
0 |0x01 |0x08 |48 |0x02 |4 ||0x000021F0 ||31 |31 |0|0x0420
UNIT_TYPE_CHA
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1 |0x5C |0x08 |48 |0x40 |4 ||0xFB9A4C00 ||212 |22 |14|0x1A80
UNIT_TYPE_HBM
1 |0x5C |0x08 |48 |0x40 |4 ||0xFB9A8C00 ||213 |23 |14|0x1AA0
UNIT_TYPE_HBM
1 |0x5C |0x08 |48 |0x40 |4 ||0xFB9ADC00 ||214 |24 |14|0x1AC0
UNIT_TYPE_HBM
1 |0x5C |0x08 |48 |0x40 |4 ||0xFB9B1C00 ||215 |25 |14|0x1AE0
UNIT_TYPE_HBM
1 |0x5C |0x08 |48 |0x40 |4 ||0xFB9B6C00 ||216 |26 |14|0x1B00
UNIT_TYPE_HBM
1 |0x5C |0x08 |48 |0x40 |4 ||0xFB9BAC00 ||217 |27 |14|0x1B20
UNIT_TYPE_HBM
1 |0x5C |0x08 |48 |0x40 |4 ||0xFB9BFC00 ||218 |28 |14|0x1B40
UNIT_TYPE_HBM
1 |0x5C |0x08 |48 |0x40 |4 ||0xFB9C3C00 ||219 |29 |14|0x1B60
UNIT_TYPE_HBM
1 |0x5C |0x08 |48 |0x40 |4 ||0xFB9C8C00 ||220 |30 |14|0x1B80
UNIT_TYPE_HBM
1 |0x5C |0x08 |48 |0x40 |4 ||0xFB9CCC00 ||221 |31 |14|0x1BA0
[OOBMSM] InitOobMsmBar() Enter
Socket[1], OobMsm.Func[2], BAR[0]
Disable MSE and BME
Original StsCmdReg Value = 0x00100004
BarSize: 0x00200000
BarBase: 0xF9C00000(Already assigned)
Enable MSE and BME
[OOBMSM] InitOobMsmBar() Exit
SPK Bar0 address: 0xF9C00000
SPK instance 0: BAR offset: 0x00058000
SPK SNC Base Address 1: 0x0FFF0082
SPK SNC Base Address 2: 0x1FE000A2
SPK SNC Base Address 3: 0x000000C2
SPK SNC Base Address 4: 0x000000E2
SPK SNC Base Address 5: 0x00000102
SPK SNC Upper Base Address: 0x00000000
SPK_SNC_CONFIG: 0x0000000F
SPK_UNCORE_SNC_CONFIG: NumChaPerCluster:13, BaseChaCluster1:13, BaseChaCluster2:26, BaseChaCluster3:39
SPK_UMA_CLUSTER_CFG: UmaClusterEn: 0, XorDefeatur: 0
SPK instance 1: BAR offset: 0x00059000
SPK SNC Base Address 1: 0x0FFF0082
SPK SNC Base Address 2: 0x1FE000A2
SPK SNC Base Address 3: 0x000000C2
SPK SNC Base Address 4: 0x000000E2
SPK SNC Base Address 5: 0x00000102
SPK SNC Upper Base Address: 0x00000000
SPK_SNC_CONFIG: 0x0000000F
SPK_UNCORE_SNC_CONFIG: NumChaPerCluster:13, BaseChaCluster1:13, BaseChaCluster2:26, BaseChaCluster3:39
SPK_UMA_CLUSTER_CFG: UmaClusterEn: 0, XorDefeatur: 0
SPK instance 2: BAR offset: 0x0005A000
SPK SNC Base Address 1: 0x0FFF0082
SPK SNC Base Address 2: 0x1FE000A2
SPK SNC Base Address 3: 0x000000C2
SPK SNC Base Address 4: 0x000000E2
SPK SNC Base Address 5: 0x00000102
SPK SNC Upper Base Address: 0x00000000
SPK_SNC_CONFIG: 0x0000000F
SPK_UNCORE_SNC_CONFIG: NumChaPerCluster:13, BaseChaCluster1:13, BaseChaCluster2:26, BaseChaCluster3:39
SPK_UMA_CLUSTER_CFG: UmaClusterEn: 0, XorDefeatur: 0
SPK instance 3: BAR offset: 0x0005B000
SPK SNC Base Address 1: 0x0FFF0082
SPK SNC Base Address 2: 0x1FE000A2
SPK SNC Base Address 3: 0x000000C2
SPK SNC Base Address 4: 0x000000E2
SPK SNC Base Address 5: 0x00000102
SPK SNC Upper Base Address: 0x00000000
SPK_SNC_CONFIG: 0x0000000F
SPK_UNCORE_SNC_CONFIG: NumChaPerCluster:13, BaseChaCluster1:13, BaseChaCluster2:26, BaseChaCluster3:39
SPK_UMA_CLUSTER_CFG: UmaClusterEn: 0, XorDefeatur: 0
SPK instance 4: BAR offset: 0x0005C000
SPK SNC Base Address 1: 0x0FFF0082
SPK SNC Base Address 2: 0x1FE000A2
SPK SNC Base Address 3: 0x000000C2
SPK SNC Base Address 4: 0x000000E2
SPK SNC Base Address 5: 0x00000102
SPK SNC Upper Base Address: 0x00000000
SPK_SNC_CONFIG: 0x0000000F
SPK_UNCORE_SNC_CONFIG: NumChaPerCluster:13, BaseChaCluster1:13, BaseChaCluster2:26, BaseChaCluster3:39
SPK_UMA_CLUSTER_CFG: UmaClusterEn: 0, XorDefeatur: 0
SPK instance 5: BAR offset: 0x0005D000
SPK SNC Base Address 1: 0x0FFF0082
SPK SNC Base Address 2: 0x1FE000A2
SPK SNC Base Address 3: 0x000000C2
SPK SNC Base Address 4: 0x000000E2
SPK SNC Base Address 5: 0x00000102
SPK SNC Upper Base Address: 0x00000000
SPK_SNC_CONFIG: 0x0000000F
SPK_UNCORE_SNC_CONFIG: NumChaPerCluster:13, BaseChaCluster1:13, BaseChaCluster2:26, BaseChaCluster3:39
SPK_UMA_CLUSTER_CFG: UmaClusterEn: 0, XorDefeatur: 0
SPK instance 6: BAR offset: 0x0005E000
SPK SNC Base Address 1: 0x0FFF0082
SPK SNC Base Address 2: 0x1FE000A2
SPK SNC Base Address 3: 0x000000C2
SPK SNC Base Address 4: 0x000000E2
SPK SNC Base Address 5: 0x00000102
SPK SNC Upper Base Address: 0x00000000
SPK_SNC_CONFIG: 0x0000000F
SPK_UNCORE_SNC_CONFIG: NumChaPerCluster:13, BaseChaCluster1:13, BaseChaCluster2:26, BaseChaCluster3:39
SPK_UMA_CLUSTER_CFG: UmaClusterEn: 0, XorDefeatur: 0
SPK instance 7: BAR offset: 0x0005F000
SPK SNC Base Address 1: 0x0FFF0082
SPK SNC Base Address 2: 0x1FE000A2
SPK SNC Base Address 3: 0x000000C2
SPK SNC Base Address 4: 0x000000E2
SPK SNC Base Address 5: 0x00000102
SPK SNC Upper Base Address: 0x00000000
SPK_SNC_CONFIG: 0x0000000F
SPK_UNCORE_SNC_CONFIG: NumChaPerCluster:13, BaseChaCluster1:13, BaseChaCluster2:26, BaseChaCluster3:39
SPK_UMA_CLUSTER_CFG: UmaClusterEn: 0, XorDefeatur: 0
SPK instance 8: BAR offset: 0x00060000
SPK SNC Base Address 1: 0x0FFF0082
SPK SNC Base Address 2: 0x1FE000A2
SPK SNC Base Address 3: 0x000000C2
SPK SNC Base Address 4: 0x000000E2
SPK SNC Base Address 5: 0x00000102
SPK SNC Upper Base Address: 0x00000000
SPK_SNC_CONFIG: 0x0000000F
SPK_UNCORE_SNC_CONFIG: NumChaPerCluster:13, BaseChaCluster1:13, BaseChaCluster2:26, BaseChaCluster3:39
SPK_UMA_CLUSTER_CFG: UmaClusterEn: 0, XorDefeatur: 0
SPK instance 9: BAR offset: 0x00061000
SPK SNC Base Address 1: 0x0FFF0082
SPK SNC Base Address 2: 0x1FE000A2
SPK SNC Base Address 3: 0x000000C2
SPK SNC Base Address 4: 0x000000E2
SPK SNC Base Address 5: 0x00000102
SPK SNC Upper Base Address: 0x00000000
SPK_SNC_CONFIG: 0x0000000F
SPK_UNCORE_SNC_CONFIG: NumChaPerCluster:13, BaseChaCluster1:13, BaseChaCluster2:26, BaseChaCluster3:39
SPK_UMA_CLUSTER_CFG: UmaClusterEn: 0, XorDefeatur: 0
SPK instance 10: BAR offset: 0x00062000
SPK SNC Base Address 1: 0x0FFF0082
SPK SNC Base Address 2: 0x1FE000A2
SPK SNC Base Address 3: 0x000000C2
SPK SNC Base Address 4: 0x000000E2
SPK SNC Base Address 5: 0x00000102
SPK SNC Upper Base Address: 0x00000000
SPK_SNC_CONFIG: 0x0000000F
SPK_UNCORE_SNC_CONFIG: NumChaPerCluster:13, BaseChaCluster1:13, BaseChaCluster2:26, BaseChaCluster3:39
SPK_UMA_CLUSTER_CFG: UmaClusterEn: 0, XorDefeatur: 0
SPK instance 11: BAR offset: 0x00063000
SPK SNC Base Address 1: 0x0FFF0082
SPK SNC Base Address 2: 0x1FE000A2
SPK SNC Base Address 3: 0x000000C2
SPK SNC Base Address 4: 0x000000E2
SPK SNC Base Address 5: 0x00000102
SPK SNC Upper Base Address: 0x00000000
SPK_SNC_CONFIG: 0x0000000F
SPK_UNCORE_SNC_CONFIG: NumChaPerCluster:13, BaseChaCluster1:13, BaseChaCluster2:26, BaseChaCluster3:39
SPK_UMA_CLUSTER_CFG: UmaClusterEn: 0, XorDefeatur: 0
SPK instance 12: BAR offset: 0x00070000
SPK SNC Base Address 1: 0x0FFF0082
SPK SNC Base Address 2: 0x1FE000A2
SPK SNC Base Address 3: 0x000000C2
SPK SNC Base Address 4: 0x000000E2
SPK SNC Base Address 5: 0x00000102
SPK SNC Upper Base Address: 0x00000000
SPK_SNC_CONFIG: 0x0000000F
SPK_UNCORE_SNC_CONFIG: NumChaPerCluster:13, BaseChaCluster1:13, BaseChaCluster2:26, BaseChaCluster3:39
SPK_UMA_CLUSTER_CFG: UmaClusterEn: 0, XorDefeatur: 0
SPK instance 13: BAR offset: 0x00071000
SPK SNC Base Address 1: 0x0FFF0082
SPK SNC Base Address 2: 0x1FE000A2
SPK SNC Base Address 3: 0x000000C2
SPK SNC Base Address 4: 0x000000E2
SPK SNC Base Address 5: 0x00000102
SPK SNC Upper Base Address: 0x00000000
SPK_SNC_CONFIG: 0x0000000F
SPK_UNCORE_SNC_CONFIG: NumChaPerCluster:13, BaseChaCluster1:13, BaseChaCluster2:26, BaseChaCluster3:39
SPK_UMA_CLUSTER_CFG: UmaClusterEn: 0, XorDefeatur: 0
SPK instance 14: BAR offset: 0x00072000
SPK SNC Base Address 1: 0x0FFF0082
SPK SNC Base Address 2: 0x1FE000A2
SPK SNC Base Address 3: 0x000000C2
SPK SNC Base Address 4: 0x000000E2
SPK SNC Base Address 5: 0x00000102
SPK SNC Upper Base Address: 0x00000000
SPK_SNC_CONFIG: 0x0000000F
SPK_UNCORE_SNC_CONFIG: NumChaPerCluster:13, BaseChaCluster1:13, BaseChaCluster2:26, BaseChaCluster3:39
SPK_UMA_CLUSTER_CFG: UmaClusterEn: 0, XorDefeatur: 0
SPK instance 15: BAR offset: 0x00073000
SPK SNC Base Address 1: 0x0FFF0082
SPK SNC Base Address 2: 0x1FE000A2
SPK SNC Base Address 3: 0x000000C2
SPK SNC Base Address 4: 0x000000E2
SPK SNC Base Address 5: 0x00000102
SPK SNC Upper Base Address: 0x00000000
SPK_SNC_CONFIG: 0x0000000F
SPK_UNCORE_SNC_CONFIG: NumChaPerCluster:13, BaseChaCluster1:13, BaseChaCluster2:26, BaseChaCluster3:39
SPK_UMA_CLUSTER_CFG: UmaClusterEn: 0, XorDefeatur: 0
**** SNC XPT DUMP START ****
**** CPU 0: ****
SNC_CONFIG_MS2IDI : 0x0000000F
UNCORE_SNC_CONFIG_MS2IDI : 0x271A0D0D
UMA_CLUSTER_MS2IDI : 0x00000000
XPT_2_ENTRY_MINISAD_TABLE : 0x00000000
XPT_LOCAL_PREFETCH_CONFIG1 : 0x000400BD
XPT_LOCAL_PREFETCH_CONFIG2 : 0x008186A0
XPT_32_ENTRY_MINISAD_TABLE_0 : 0x00000000
XPT_32_ENTRY_MINISAD_TABLE_1 : 0x00000000
XPT_32_ENTRY_MINISAD_TABLE_2 : 0x00000000
XPT_32_ENTRY_MINISAD_TABLE_3 : 0x00000000
XPT_32_ENTRY_MINISAD_TABLE_4 : 0x00000000
XPT_32_ENTRY_MINISAD_TABLE_5 : 0x00000000
XPT_32_ENTRY_PREFETCH_BASE_0 : 0x00000000
XPT_32_ENTRY_PREFETCH_BASE_1 : 0x00000000
XPT_32_ENTRY_PREFETCH_BASE_2 : 0x00000000
XPT_32_ENTRY_PREFETCH_BASE_3 : 0x00000000
XPT_REMOTE_PREFETCH_CONFIG1 : 0x000400BD
XPT_REMOTE_PREFETCH_CONFIG2 : 0x008186A0
XPT_UPI_DECODE_TABLE_0_N0: 0x00000000
XPT_UPI_DECODE_TABLE_0_N1: 0x00000000
XPT_UPI_DECODE_TABLE_1_N0: 0x00000000
XPT_UPI_DECODE_TABLE_1_N1: 0x00000000
XPT_UPI_DECODE_TABLE_2_N0: 0x00000000
XPT_UPI_DECODE_TABLE_2_N1: 0x00000000
XPT_UPI_DECODE_TABLE_3_N0: 0x00000000
XPT_UPI_DECODE_TABLE_3_N1: 0x00000000
KTI_0_SNC_CONFIG_KTI : 0x0000000F
KTI_0_KTIAGCTRL : 0x00101012
KTI_0_KTI_SNC_BASE_1 : 0x0FFF0000
KTI_0_KTI_SNC_BASE_2 : 0x1FE00022
KTI_0_KTI_SNC_BASE_3 : 0x00000042
KTI_0_KTI_SNC_BASE_4 : 0x00000062
KTI_0_KTI_SNC_BASE_5 : 0x00000082
M3KTI 0:
M3KPRECTRL_0 : 0x00000040
M3KPRETL_0 : 0x00000000
KTI_1_SNC_CONFIG_KTI : 0x0000000F
KTI_1_KTIAGCTRL : 0x00101012
KTI_1_KTI_SNC_BASE_1 : 0x0FFF0000
KTI_1_KTI_SNC_BASE_2 : 0x1FE00022
KTI_1_KTI_SNC_BASE_3 : 0x00000042
KTI_1_KTI_SNC_BASE_4 : 0x00000062
KTI_1_KTI_SNC_BASE_5 : 0x00000082
M3KTI 1:
M3KPRECTRL_1 : 0x00000040
M3KPRETL_1 : 0x00000000
KTI_2_SNC_CONFIG_KTI : 0x0000000F
KTI_2_KTIAGCTRL : 0x00101012
KTI_2_KTI_SNC_BASE_1 : 0x0FFF0000
KTI_2_KTI_SNC_BASE_2 : 0x1FE00022
KTI_2_KTI_SNC_BASE_3 : 0x00000042
KTI_2_KTI_SNC_BASE_4 : 0x00000062
KTI_2_KTI_SNC_BASE_5 : 0x00000082
M3KTI 2:
M3KPRECTRL_2 : 0x00000040
M3KPRETL_2 : 0x00000000
KTI_3_SNC_CONFIG_KTI : 0x0000000F
KTI_3_KTIAGCTRL : 0x00101012
KTI_3_KTI_SNC_BASE_1 : 0x0FFF0000
KTI_3_KTI_SNC_BASE_2 : 0x1FE00022
KTI_3_KTI_SNC_BASE_3 : 0x00000042
KTI_3_KTI_SNC_BASE_4 : 0x00000062
KTI_3_KTI_SNC_BASE_5 : 0x00000082
M3KTI 3:
M3KPRECTRL_3 : 0x00000040
M3KPRETL_3 : 0x00000000
CHA_SNC_CONFIG_CHA_PMA : 0x271A0D0F
SNC_CONFIG_IIO_VTD : 0x0000000F
UNCORE_SNC_IIO_VTD : 0x04E6868D
SNC_BASE_1_IIO_VTD : 0x0FFF0000
SNC_BASE_2_IIO_VTD : 0x1FE00022
SNC_BASE_3_IIO_VTD : 0x00000042
SNC_BASE_4_IIO_VTD : 0x00000062
SNC_BASE_5_IIO_VTD : 0x00000082
IIO 0:
IIO_0_SNC_CONFIG_IIO : 0x0000000F
IIO_0_SNC_BASE_1 : 0x0FFF0000
IIO_0_SNC_BASE_2 : 0x1FE00022
IIO_0_SNC_BASE_3 : 0x00000042
IIO_0_SNC_BASE_4 : 0x00000062
IIO_0_SNC_BASE_5 : 0x00000082
IIO 1:
IIO_1_SNC_CONFIG_IIO : 0x0000000F
IIO_1_SNC_BASE_1 : 0x0FFF0000
IIO_1_SNC_BASE_2 : 0x1FE00022
IIO_1_SNC_BASE_3 : 0x00000042
IIO_1_SNC_BASE_4 : 0x00000062
IIO_1_SNC_BASE_5 : 0x00000082
IIO 2:
IIO_2_SNC_CONFIG_IIO : 0x0000000F
IIO_2_SNC_BASE_1 : 0x0FFF0000
IIO_2_SNC_BASE_2 : 0x1FE00022
IIO_2_SNC_BASE_3 : 0x00000042
IIO_2_SNC_BASE_4 : 0x00000062
IIO_2_SNC_BASE_5 : 0x00000082
IIO 3:
IIO_3_SNC_CONFIG_IIO : 0x0000000F
IIO_3_SNC_BASE_1 : 0x0FFF0000
IIO_3_SNC_BASE_2 : 0x1FE00022
IIO_3_SNC_BASE_3 : 0x00000042
IIO_3_SNC_BASE_4 : 0x00000062
IIO_3_SNC_BASE_5 : 0x00000082
IIO 4:
IIO_4_SNC_CONFIG_IIO : 0x0000000F
IIO_4_SNC_BASE_1 : 0x0FFF0000
IIO_4_SNC_BASE_2 : 0x1FE00022
IIO_4_SNC_BASE_3 : 0x00000042
IIO_4_SNC_BASE_4 : 0x00000062
IIO_4_SNC_BASE_5 : 0x00000082
IIO 5:
IIO_5_SNC_CONFIG_IIO : 0x0000000F
IIO_5_SNC_BASE_1 : 0x0FFF0000
IIO_5_SNC_BASE_2 : 0x1FE00022
IIO_5_SNC_BASE_3 : 0x00000042
IIO_5_SNC_BASE_4 : 0x00000062
IIO_5_SNC_BASE_5 : 0x00000082
IIO 8:
IIO_8_SNC_CONFIG_IIO : 0x0000000F
IIO_8_SNC_BASE_1 : 0x0FFF0000
IIO_8_SNC_BASE_2 : 0x1FE00022
IIO_8_SNC_BASE_3 : 0x00000042
IIO_8_SNC_BASE_4 : 0x00000062
IIO_8_SNC_BASE_5 : 0x00000082
IIO 9:
IIO_9_SNC_CONFIG_IIO : 0x0000000F
IIO_9_SNC_BASE_1 : 0x0FFF0000
IIO_9_SNC_BASE_2 : 0x1FE00022
IIO_9_SNC_BASE_3 : 0x00000042
IIO_9_SNC_BASE_4 : 0x00000062
IIO_9_SNC_BASE_5 : 0x00000082
IIO 10:
IIO_10_SNC_CONFIG_IIO : 0x0000000F
IIO_10_SNC_BASE_1 : 0x0FFF0000
IIO_10_SNC_BASE_2 : 0x1FE00022
IIO_10_SNC_BASE_3 : 0x00000042
IIO_10_SNC_BASE_4 : 0x00000062
IIO_10_SNC_BASE_5 : 0x00000082
IIO 11:
IIO_11_SNC_CONFIG_IIO : 0x0000000F
IIO_11_SNC_BASE_1 : 0x0FFF0000
IIO_11_SNC_BASE_2 : 0x1FE00022
IIO_11_SNC_BASE_3 : 0x00000042
IIO_11_SNC_BASE_4 : 0x00000062
IIO_11_SNC_BASE_5 : 0x00000082
M2MEM_0_TOPOLOGY : 0x00018000
M2MEM_0_PREFSADCONFIG0 : 0x00000000
M2MEM_0_PREFSADCONFIG1 : 0x00000000
M2MEM_0_PREFETCHSADSTARTADDR0 : 0x00000000
M2MEM_0_PREFETCHSADLIMITADDR0 : 0x00000000
M2MEM_0_PREFETCHSADSTARTADDR1 : 0x00000000
M2MEM_0_PREFETCHSADLIMITADDR1 : 0x00000000
M2MEM_0_PREFETCHSADSTARTADDR2 : 0x00000000
M2MEM_0_PREFETCHSADLIMITADDR2 : 0x00000000
M2MEM_0_SYSFEATURES0 : 0x1340008D
M2MEM_1_TOPOLOGY : 0x00032340
M2MEM_1_PREFSADCONFIG0 : 0x00000000
M2MEM_1_PREFSADCONFIG1 : 0x00000000
M2MEM_1_PREFETCHSADSTARTADDR0 : 0x00000000
M2MEM_1_PREFETCHSADLIMITADDR0 : 0x00000000
M2MEM_1_PREFETCHSADSTARTADDR1 : 0x00000000
M2MEM_1_PREFETCHSADLIMITADDR1 : 0x00000000
M2MEM_1_PREFETCHSADSTARTADDR2 : 0x00000000
M2MEM_1_PREFETCHSADLIMITADDR2 : 0x00000000
M2MEM_1_SYSFEATURES0 : 0x1340008D
M2MEM_2_TOPOLOGY : 0x0004C680
M2MEM_2_PREFSADCONFIG0 : 0x00000000
M2MEM_2_PREFSADCONFIG1 : 0x00000000
M2MEM_2_PREFETCHSADSTARTADDR0 : 0x00000000
M2MEM_2_PREFETCHSADLIMITADDR0 : 0x00000000
M2MEM_2_PREFETCHSADSTARTADDR1 : 0x00000000
M2MEM_2_PREFETCHSADLIMITADDR1 : 0x00000000
M2MEM_2_PREFETCHSADSTARTADDR2 : 0x00000000
M2MEM_2_PREFETCHSADLIMITADDR2 : 0x00000000
M2MEM_2_SYSFEATURES0 : 0x1340008D
M2MEM_3_TOPOLOGY : 0x000669C0
M2MEM_3_PREFSADCONFIG0 : 0x00000000
M2MEM_3_PREFSADCONFIG1 : 0x00000000
M2MEM_3_PREFETCHSADSTARTADDR0 : 0x00000000
M2MEM_3_PREFETCHSADLIMITADDR0 : 0x00000000
M2MEM_3_PREFETCHSADSTARTADDR1 : 0x00000000
M2MEM_3_PREFETCHSADLIMITADDR1 : 0x00000000
M2MEM_3_PREFETCHSADSTARTADDR2 : 0x00000000
M2MEM_3_PREFETCHSADLIMITADDR2 : 0x00000000
M2MEM_3_SYSFEATURES0 : 0x1340008D
M2MEM_4_TOPOLOGY : 0x00018000
M2MEM_4_PREFSADCONFIG0 : 0x00000000
M2MEM_4_PREFSADCONFIG1 : 0x00000000
M2MEM_4_PREFETCHSADSTARTADDR0 : 0x00000000
M2MEM_4_PREFETCHSADLIMITADDR0 : 0x00000000
M2MEM_4_PREFETCHSADSTARTADDR1 : 0x00000000
M2MEM_4_PREFETCHSADLIMITADDR1 : 0x00000000
M2MEM_4_PREFETCHSADSTARTADDR2 : 0x00000000
M2MEM_4_PREFETCHSADLIMITADDR2 : 0x00000000
M2MEM_4_SYSFEATURES0 : 0x1368009C
M2MEM_5_TOPOLOGY : 0x00018000
M2MEM_5_PREFSADCONFIG0 : 0x00000000
M2MEM_5_PREFSADCONFIG1 : 0x00000000
M2MEM_5_PREFETCHSADSTARTADDR0 : 0x00000000
M2MEM_5_PREFETCHSADLIMITADDR0 : 0x00000000
M2MEM_5_PREFETCHSADSTARTADDR1 : 0x00000000
M2MEM_5_PREFETCHSADLIMITADDR1 : 0x00000000
M2MEM_5_PREFETCHSADSTARTADDR2 : 0x00000000
M2MEM_5_PREFETCHSADLIMITADDR2 : 0x00000000
M2MEM_5_SYSFEATURES0 : 0x1368009C
M2MEM_6_TOPOLOGY : 0x00018000
M2MEM_6_PREFSADCONFIG0 : 0x00000000
M2MEM_6_PREFSADCONFIG1 : 0x00000000
M2MEM_6_PREFETCHSADSTARTADDR0 : 0x00000000
M2MEM_6_PREFETCHSADLIMITADDR0 : 0x00000000
M2MEM_6_PREFETCHSADSTARTADDR1 : 0x00000000
M2MEM_6_PREFETCHSADLIMITADDR1 : 0x00000000
M2MEM_6_PREFETCHSADSTARTADDR2 : 0x00000000
M2MEM_6_PREFETCHSADLIMITADDR2 : 0x00000000
M2MEM_6_SYSFEATURES0 : 0x1368009C
M2MEM_7_TOPOLOGY : 0x00018000
M2MEM_7_PREFSADCONFIG0 : 0x00000000
M2MEM_7_PREFSADCONFIG1 : 0x00000000
M2MEM_7_PREFETCHSADSTARTADDR0 : 0x00000000
M2MEM_7_PREFETCHSADLIMITADDR0 : 0x00000000
M2MEM_7_PREFETCHSADSTARTADDR1 : 0x00000000
M2MEM_7_PREFETCHSADLIMITADDR1 : 0x00000000
M2MEM_7_PREFETCHSADSTARTADDR2 : 0x00000000
M2MEM_7_PREFETCHSADLIMITADDR2 : 0x00000000
M2MEM_7_SYSFEATURES0 : 0x1368009C
M2MEM_8_TOPOLOGY : 0x00032340
M2MEM_8_PREFSADCONFIG0 : 0x00000000
M2MEM_8_PREFSADCONFIG1 : 0x00000000
M2MEM_8_PREFETCHSADSTARTADDR0 : 0x00000000
M2MEM_8_PREFETCHSADLIMITADDR0 : 0x00000000
M2MEM_8_PREFETCHSADSTARTADDR1 : 0x00000000
M2MEM_8_PREFETCHSADLIMITADDR1 : 0x00000000
M2MEM_8_PREFETCHSADSTARTADDR2 : 0x00000000
M2MEM_8_PREFETCHSADLIMITADDR2 : 0x00000000
M2MEM_8_SYSFEATURES0 : 0x1368009C
M2MEM_9_TOPOLOGY : 0x00032340
M2MEM_9_PREFSADCONFIG0 : 0x00000000
M2MEM_9_PREFSADCONFIG1 : 0x00000000
M2MEM_9_PREFETCHSADSTARTADDR0 : 0x00000000
M2MEM_9_PREFETCHSADLIMITADDR0 : 0x00000000
M2MEM_9_PREFETCHSADSTARTADDR1 : 0x00000000
M2MEM_9_PREFETCHSADLIMITADDR1 : 0x00000000
M2MEM_9_PREFETCHSADSTARTADDR2 : 0x00000000
M2MEM_9_PREFETCHSADLIMITADDR2 : 0x00000000
M2MEM_9_SYSFEATURES0 : 0x1368009C
M2MEM_10_TOPOLOGY : 0x00032340
M2MEM_10_PREFSADCONFIG0 : 0x00000000
M2MEM_10_PREFSADCONFIG1 : 0x00000000
M2MEM_10_PREFETCHSADSTARTADDR0 : 0x00000000
M2MEM_10_PREFETCHSADLIMITADDR0 : 0x00000000
M2MEM_10_PREFETCHSADSTARTADDR1 : 0x00000000
M2MEM_10_PREFETCHSADLIMITADDR1 : 0x00000000
M2MEM_10_PREFETCHSADSTARTADDR2 : 0x00000000
M2MEM_10_PREFETCHSADLIMITADDR2 : 0x00000000
M2MEM_10_SYSFEATURES0 : 0x1368009C
M2MEM_11_TOPOLOGY : 0x00032340
M2MEM_11_PREFSADCONFIG0 : 0x00000000
M2MEM_11_PREFSADCONFIG1 : 0x00000000
M2MEM_11_PREFETCHSADSTARTADDR0 : 0x00000000
M2MEM_11_PREFETCHSADLIMITADDR0 : 0x00000000
M2MEM_11_PREFETCHSADSTARTADDR1 : 0x00000000
M2MEM_11_PREFETCHSADLIMITADDR1 : 0x00000000
M2MEM_11_PREFETCHSADSTARTADDR2 : 0x00000000
M2MEM_11_PREFETCHSADLIMITADDR2 : 0x00000000
M2MEM_11_SYSFEATURES0 : 0x1368009C
M2MEM_12_TOPOLOGY : 0x0004C680
M2MEM_12_PREFSADCONFIG0 : 0x00000000
M2MEM_12_PREFSADCONFIG1 : 0x00000000
M2MEM_12_PREFETCHSADSTARTADDR0 : 0x00000000
M2MEM_12_PREFETCHSADLIMITADDR0 : 0x00000000
M2MEM_12_PREFETCHSADSTARTADDR1 : 0x00000000
M2MEM_12_PREFETCHSADLIMITADDR1 : 0x00000000
M2MEM_12_PREFETCHSADSTARTADDR2 : 0x00000000
M2MEM_12_PREFETCHSADLIMITADDR2 : 0x00000000
M2MEM_12_SYSFEATURES0 : 0x1368009C
M2MEM_13_TOPOLOGY : 0x0004C680
M2MEM_13_PREFSADCONFIG0 : 0x00000000
M2MEM_13_PREFSADCONFIG1 : 0x00000000
M2MEM_13_PREFETCHSADSTARTADDR0 : 0x00000000
M2MEM_13_PREFETCHSADLIMITADDR0 : 0x00000000
M2MEM_13_PREFETCHSADSTARTADDR1 : 0x00000000
M2MEM_13_PREFETCHSADLIMITADDR1 : 0x00000000
M2MEM_13_PREFETCHSADSTARTADDR2 : 0x00000000
M2MEM_13_PREFETCHSADLIMITADDR2 : 0x00000000
M2MEM_13_SYSFEATURES0 : 0x1368009C
M2MEM_14_TOPOLOGY : 0x0004C680
M2MEM_14_PREFSADCONFIG0 : 0x00000000
M2MEM_14_PREFSADCONFIG1 : 0x00000000
M2MEM_14_PREFETCHSADSTARTADDR0 : 0x00000000
M2MEM_14_PREFETCHSADLIMITADDR0 : 0x00000000
M2MEM_14_PREFETCHSADSTARTADDR1 : 0x00000000
M2MEM_14_PREFETCHSADLIMITADDR1 : 0x00000000
M2MEM_14_PREFETCHSADSTARTADDR2 : 0x00000000
M2MEM_14_PREFETCHSADLIMITADDR2 : 0x00000000
M2MEM_14_SYSFEATURES0 : 0x1368009C
M2MEM_15_TOPOLOGY : 0x0004C680
M2MEM_15_PREFSADCONFIG0 : 0x00000000
M2MEM_15_PREFSADCONFIG1 : 0x00000000
M2MEM_15_PREFETCHSADSTARTADDR0 : 0x00000000
M2MEM_15_PREFETCHSADLIMITADDR0 : 0x00000000
M2MEM_15_PREFETCHSADSTARTADDR1 : 0x00000000
M2MEM_15_PREFETCHSADLIMITADDR1 : 0x00000000
M2MEM_15_PREFETCHSADSTARTADDR2 : 0x00000000
M2MEM_15_PREFETCHSADLIMITADDR2 : 0x00000000
M2MEM_15_SYSFEATURES0 : 0x1368009C
M2MEM_16_TOPOLOGY : 0x000669C0
M2MEM_16_PREFSADCONFIG0 : 0x00000000
M2MEM_16_PREFSADCONFIG1 : 0x00000000
M2MEM_16_PREFETCHSADSTARTADDR0 : 0x00000000
M2MEM_16_PREFETCHSADLIMITADDR0 : 0x00000000
M2MEM_16_PREFETCHSADSTARTADDR1 : 0x00000000
M2MEM_16_PREFETCHSADLIMITADDR1 : 0x00000000
M2MEM_16_PREFETCHSADSTARTADDR2 : 0x00000000
M2MEM_16_PREFETCHSADLIMITADDR2 : 0x00000000
M2MEM_16_SYSFEATURES0 : 0x1368009C
M2MEM_17_TOPOLOGY : 0x000669C0
M2MEM_17_PREFSADCONFIG0 : 0x00000000
M2MEM_17_PREFSADCONFIG1 : 0x00000000
M2MEM_17_PREFETCHSADSTARTADDR0 : 0x00000000
M2MEM_17_PREFETCHSADLIMITADDR0 : 0x00000000
M2MEM_17_PREFETCHSADSTARTADDR1 : 0x00000000
M2MEM_17_PREFETCHSADLIMITADDR1 : 0x00000000
M2MEM_17_PREFETCHSADSTARTADDR2 : 0x00000000
M2MEM_17_PREFETCHSADLIMITADDR2 : 0x00000000
M2MEM_17_SYSFEATURES0 : 0x1368009C
M2MEM_18_TOPOLOGY : 0x000669C0
M2MEM_18_PREFSADCONFIG0 : 0x00000000
M2MEM_18_PREFSADCONFIG1 : 0x00000000
M2MEM_18_PREFETCHSADSTARTADDR0 : 0x00000000
M2MEM_18_PREFETCHSADLIMITADDR0 : 0x00000000
M2MEM_18_PREFETCHSADSTARTADDR1 : 0x00000000
M2MEM_18_PREFETCHSADLIMITADDR1 : 0x00000000
M2MEM_18_PREFETCHSADSTARTADDR2 : 0x00000000
M2MEM_18_PREFETCHSADLIMITADDR2 : 0x00000000
M2MEM_18_SYSFEATURES0 : 0x1368009C
M2MEM_19_TOPOLOGY : 0x000669C0
M2MEM_19_PREFSADCONFIG0 : 0x00000000
M2MEM_19_PREFSADCONFIG1 : 0x00000000
M2MEM_19_PREFETCHSADSTARTADDR0 : 0x00000000
M2MEM_19_PREFETCHSADLIMITADDR0 : 0x00000000
M2MEM_19_PREFETCHSADSTARTADDR1 : 0x00000000
M2MEM_19_PREFETCHSADLIMITADDR1 : 0x00000000
M2MEM_19_PREFETCHSADSTARTADDR2 : 0x00000000
M2MEM_19_PREFETCHSADLIMITADDR2 : 0x00000000
M2MEM_19_SYSFEATURES0 : 0x1368009C
**** CPU 1: ****
SNC_CONFIG_MS2IDI : 0x0000000F
UNCORE_SNC_CONFIG_MS2IDI : 0x271A0D0D
UMA_CLUSTER_MS2IDI : 0x00000000
XPT_2_ENTRY_MINISAD_TABLE : 0x00000000
XPT_LOCAL_PREFETCH_CONFIG1 : 0x000400BD
XPT_LOCAL_PREFETCH_CONFIG2 : 0x008186A0
XPT_32_ENTRY_MINISAD_TABLE_0 : 0x00000000
XPT_32_ENTRY_MINISAD_TABLE_1 : 0x00000000
XPT_32_ENTRY_MINISAD_TABLE_2 : 0x00000000
XPT_32_ENTRY_MINISAD_TABLE_3 : 0x00000000
XPT_32_ENTRY_MINISAD_TABLE_4 : 0x00000000
XPT_32_ENTRY_MINISAD_TABLE_5 : 0x00000000
XPT_32_ENTRY_PREFETCH_BASE_0 : 0x00000000
XPT_32_ENTRY_PREFETCH_BASE_1 : 0x00000000
XPT_32_ENTRY_PREFETCH_BASE_2 : 0x00000000
XPT_32_ENTRY_PREFETCH_BASE_3 : 0x00000000
XPT_REMOTE_PREFETCH_CONFIG1 : 0x000400BD
XPT_REMOTE_PREFETCH_CONFIG2 : 0x008186A0
XPT_UPI_DECODE_TABLE_0_N0: 0x00000000
XPT_UPI_DECODE_TABLE_0_N1: 0x00000000
XPT_UPI_DECODE_TABLE_1_N0: 0x00000000
XPT_UPI_DECODE_TABLE_1_N1: 0x00000000
XPT_UPI_DECODE_TABLE_2_N0: 0x00000000
XPT_UPI_DECODE_TABLE_2_N1: 0x00000000
XPT_UPI_DECODE_TABLE_3_N0: 0x00000000
XPT_UPI_DECODE_TABLE_3_N1: 0x00000000
KTI_0_SNC_CONFIG_KTI : 0x0000000F
KTI_0_KTIAGCTRL : 0x00101012
KTI_0_KTI_SNC_BASE_1 : 0x0FFF0082
KTI_0_KTI_SNC_BASE_2 : 0x1FE000A2
KTI_0_KTI_SNC_BASE_3 : 0x000000C2
KTI_0_KTI_SNC_BASE_4 : 0x000000E2
KTI_0_KTI_SNC_BASE_5 : 0x00000102
M3KTI 0:
M3KPRECTRL_0 : 0x00000040
M3KPRETL_0 : 0x00000000
KTI_1_SNC_CONFIG_KTI : 0x0000000F
KTI_1_KTIAGCTRL : 0x00101012
KTI_1_KTI_SNC_BASE_1 : 0x0FFF0082
KTI_1_KTI_SNC_BASE_2 : 0x1FE000A2
KTI_1_KTI_SNC_BASE_3 : 0x000000C2
KTI_1_KTI_SNC_BASE_4 : 0x000000E2
KTI_1_KTI_SNC_BASE_5 : 0x00000102
M3KTI 1:
M3KPRECTRL_1 : 0x00000040
M3KPRETL_1 : 0x00000000
KTI_2_SNC_CONFIG_KTI : 0x0000000F
KTI_2_KTIAGCTRL : 0x00101012
KTI_2_KTI_SNC_BASE_1 : 0x0FFF0082
KTI_2_KTI_SNC_BASE_2 : 0x1FE000A2
KTI_2_KTI_SNC_BASE_3 : 0x000000C2
KTI_2_KTI_SNC_BASE_4 : 0x000000E2
KTI_2_KTI_SNC_BASE_5 : 0x00000102
M3KTI 2:
M3KPRECTRL_2 : 0x00000040
M3KPRETL_2 : 0x00000000
KTI_3_SNC_CONFIG_KTI : 0x0000000F
KTI_3_KTIAGCTRL : 0x00101012
KTI_3_KTI_SNC_BASE_1 : 0x0FFF0082
KTI_3_KTI_SNC_BASE_2 : 0x1FE000A2
KTI_3_KTI_SNC_BASE_3 : 0x000000C2
KTI_3_KTI_SNC_BASE_4 : 0x000000E2
KTI_3_KTI_SNC_BASE_5 : 0x00000102
M3KTI 3:
M3KPRECTRL_3 : 0x00000040
M3KPRETL_3 : 0x00000000
CHA_SNC_CONFIG_CHA_PMA : 0x271A0D0F
SNC_CONFIG_IIO_VTD : 0x0000000F
UNCORE_SNC_IIO_VTD : 0x04E6868D
SNC_BASE_1_IIO_VTD : 0x0FFF0082
SNC_BASE_2_IIO_VTD : 0x1FE000A2
SNC_BASE_3_IIO_VTD : 0x000000C2
SNC_BASE_4_IIO_VTD : 0x000000E2
SNC_BASE_5_IIO_VTD : 0x00000102
IIO 1:
IIO_1_SNC_CONFIG_IIO : 0x0000000F
IIO_1_SNC_BASE_1 : 0x0FFF0082
IIO_1_SNC_BASE_2 : 0x1FE000A2
IIO_1_SNC_BASE_3 : 0x000000C2
IIO_1_SNC_BASE_4 : 0x000000E2
IIO_1_SNC_BASE_5 : 0x00000102
IIO 2:
IIO_2_SNC_CONFIG_IIO : 0x0000000F
IIO_2_SNC_BASE_1 : 0x0FFF0082
IIO_2_SNC_BASE_2 : 0x1FE000A2
IIO_2_SNC_BASE_3 : 0x000000C2
IIO_2_SNC_BASE_4 : 0x000000E2
IIO_2_SNC_BASE_5 : 0x00000102
IIO 3:
IIO_3_SNC_CONFIG_IIO : 0x0000000F
IIO_3_SNC_BASE_1 : 0x0FFF0082
IIO_3_SNC_BASE_2 : 0x1FE000A2
IIO_3_SNC_BASE_3 : 0x000000C2
IIO_3_SNC_BASE_4 : 0x000000E2
IIO_3_SNC_BASE_5 : 0x00000102
IIO 4:
IIO_4_SNC_CONFIG_IIO : 0x0000000F
IIO_4_SNC_BASE_1 : 0x0FFF0082
IIO_4_SNC_BASE_2 : 0x1FE000A2
IIO_4_SNC_BASE_3 : 0x000000C2
IIO_4_SNC_BASE_4 : 0x000000E2
IIO_4_SNC_BASE_5 : 0x00000102
IIO 5:
IIO_5_SNC_CONFIG_IIO : 0x0000000F
IIO_5_SNC_BASE_1 : 0x0FFF0082
IIO_5_SNC_BASE_2 : 0x1FE000A2
IIO_5_SNC_BASE_3 : 0x000000C2
IIO_5_SNC_BASE_4 : 0x000000E2
IIO_5_SNC_BASE_5 : 0x00000102
IIO 6:
IIO_6_SNC_CONFIG_IIO : 0x0000000F
IIO_6_SNC_BASE_1 : 0x0FFF0082
IIO_6_SNC_BASE_2 : 0x1FE000A2
IIO_6_SNC_BASE_3 : 0x000000C2
IIO_6_SNC_BASE_4 : 0x000000E2
IIO_6_SNC_BASE_5 : 0x00000102
IIO 8:
IIO_8_SNC_CONFIG_IIO : 0x0000000F
IIO_8_SNC_BASE_1 : 0x0FFF0082
IIO_8_SNC_BASE_2 : 0x1FE000A2
IIO_8_SNC_BASE_3 : 0x000000C2
IIO_8_SNC_BASE_4 : 0x000000E2
IIO_8_SNC_BASE_5 : 0x00000102
IIO 9:
IIO_9_SNC_CONFIG_IIO : 0x0000000F
IIO_9_SNC_BASE_1 : 0x0FFF0082
IIO_9_SNC_BASE_2 : 0x1FE000A2
IIO_9_SNC_BASE_3 : 0x000000C2
IIO_9_SNC_BASE_4 : 0x000000E2
IIO_9_SNC_BASE_5 : 0x00000102
IIO 10:
IIO_10_SNC_CONFIG_IIO : 0x0000000F
IIO_10_SNC_BASE_1 : 0x0FFF0082
IIO_10_SNC_BASE_2 : 0x1FE000A2
IIO_10_SNC_BASE_3 : 0x000000C2
IIO_10_SNC_BASE_4 : 0x000000E2
IIO_10_SNC_BASE_5 : 0x00000102
IIO 11:
IIO_11_SNC_CONFIG_IIO : 0x0000000F
IIO_11_SNC_BASE_1 : 0x0FFF0082
IIO_11_SNC_BASE_2 : 0x1FE000A2
IIO_11_SNC_BASE_3 : 0x000000C2
IIO_11_SNC_BASE_4 : 0x000000E2
IIO_11_SNC_BASE_5 : 0x00000102
M2MEM_0_TOPOLOGY : 0x00018001
M2MEM_0_PREFSADCONFIG0 : 0x00000000
M2MEM_0_PREFSADCONFIG1 : 0x00000000
M2MEM_0_PREFETCHSADSTARTADDR0 : 0x00000000
M2MEM_0_PREFETCHSADLIMITADDR0 : 0x00000000
M2MEM_0_PREFETCHSADSTARTADDR1 : 0x00000000
M2MEM_0_PREFETCHSADLIMITADDR1 : 0x00000000
M2MEM_0_PREFETCHSADSTARTADDR2 : 0x00000000
M2MEM_0_PREFETCHSADLIMITADDR2 : 0x00000000
M2MEM_0_SYSFEATURES0 : 0x1340008D
M2MEM_1_TOPOLOGY : 0x00032341
M2MEM_1_PREFSADCONFIG0 : 0x00000000
M2MEM_1_PREFSADCONFIG1 : 0x00000000
M2MEM_1_PREFETCHSADSTARTADDR0 : 0x00000000
M2MEM_1_PREFETCHSADLIMITADDR0 : 0x00000000
M2MEM_1_PREFETCHSADSTARTADDR1 : 0x00000000
M2MEM_1_PREFETCHSADLIMITADDR1 : 0x00000000
M2MEM_1_PREFETCHSADSTARTADDR2 : 0x00000000
M2MEM_1_PREFETCHSADLIMITADDR2 : 0x00000000
M2MEM_1_SYSFEATURES0 : 0x1340008D
M2MEM_2_TOPOLOGY : 0x0004C681
M2MEM_2_PREFSADCONFIG0 : 0x00000000
M2MEM_2_PREFSADCONFIG1 : 0x00000000
M2MEM_2_PREFETCHSADSTARTADDR0 : 0x00000000
M2MEM_2_PREFETCHSADLIMITADDR0 : 0x00000000
M2MEM_2_PREFETCHSADSTARTADDR1 : 0x00000000
M2MEM_2_PREFETCHSADLIMITADDR1 : 0x00000000
M2MEM_2_PREFETCHSADSTARTADDR2 : 0x00000000
M2MEM_2_PREFETCHSADLIMITADDR2 : 0x00000000
M2MEM_2_SYSFEATURES0 : 0x1340008D
M2MEM_3_TOPOLOGY : 0x000669C1
M2MEM_3_PREFSADCONFIG0 : 0x00000000
M2MEM_3_PREFSADCONFIG1 : 0x00000000
M2MEM_3_PREFETCHSADSTARTADDR0 : 0x00000000
M2MEM_3_PREFETCHSADLIMITADDR0 : 0x00000000
M2MEM_3_PREFETCHSADSTARTADDR1 : 0x00000000
M2MEM_3_PREFETCHSADLIMITADDR1 : 0x00000000
M2MEM_3_PREFETCHSADSTARTADDR2 : 0x00000000
M2MEM_3_PREFETCHSADLIMITADDR2 : 0x00000000
M2MEM_3_SYSFEATURES0 : 0x1340008D
M2MEM_4_TOPOLOGY : 0x00018001
M2MEM_4_PREFSADCONFIG0 : 0x00000000
M2MEM_4_PREFSADCONFIG1 : 0x00000000
M2MEM_4_PREFETCHSADSTARTADDR0 : 0x00000000
M2MEM_4_PREFETCHSADLIMITADDR0 : 0x00000000
M2MEM_4_PREFETCHSADSTARTADDR1 : 0x00000000
M2MEM_4_PREFETCHSADLIMITADDR1 : 0x00000000
M2MEM_4_PREFETCHSADSTARTADDR2 : 0x00000000
M2MEM_4_PREFETCHSADLIMITADDR2 : 0x00000000
M2MEM_4_SYSFEATURES0 : 0x1368009C
M2MEM_5_TOPOLOGY : 0x00018001
M2MEM_5_PREFSADCONFIG0 : 0x00000000
M2MEM_5_PREFSADCONFIG1 : 0x00000000
M2MEM_5_PREFETCHSADSTARTADDR0 : 0x00000000
M2MEM_5_PREFETCHSADLIMITADDR0 : 0x00000000
M2MEM_5_PREFETCHSADSTARTADDR1 : 0x00000000
M2MEM_5_PREFETCHSADLIMITADDR1 : 0x00000000
M2MEM_5_PREFETCHSADSTARTADDR2 : 0x00000000
M2MEM_5_PREFETCHSADLIMITADDR2 : 0x00000000
M2MEM_5_SYSFEATURES0 : 0x1368009C
M2MEM_6_TOPOLOGY : 0x00018001
M2MEM_6_PREFSADCONFIG0 : 0x00000000
M2MEM_6_PREFSADCONFIG1 : 0x00000000
M2MEM_6_PREFETCHSADSTARTADDR0 : 0x00000000
M2MEM_6_PREFETCHSADLIMITADDR0 : 0x00000000
M2MEM_6_PREFETCHSADSTARTADDR1 : 0x00000000
M2MEM_6_PREFETCHSADLIMITADDR1 : 0x00000000
M2MEM_6_PREFETCHSADSTARTADDR2 : 0x00000000
M2MEM_6_PREFETCHSADLIMITADDR2 : 0x00000000
M2MEM_6_SYSFEATURES0 : 0x1368009C
M2MEM_7_TOPOLOGY : 0x00018001
M2MEM_7_PREFSADCONFIG0 : 0x00000000
M2MEM_7_PREFSADCONFIG1 : 0x00000000
M2MEM_7_PREFETCHSADSTARTADDR0 : 0x00000000
M2MEM_7_PREFETCHSADLIMITADDR0 : 0x00000000
M2MEM_7_PREFETCHSADSTARTADDR1 : 0x00000000
M2MEM_7_PREFETCHSADLIMITADDR1 : 0x00000000
M2MEM_7_PREFETCHSADSTARTADDR2 : 0x00000000
M2MEM_7_PREFETCHSADLIMITADDR2 : 0x00000000
M2MEM_7_SYSFEATURES0 : 0x1368009C
M2MEM_8_TOPOLOGY : 0x00032341
M2MEM_8_PREFSADCONFIG0 : 0x00000000
M2MEM_8_PREFSADCONFIG1 : 0x00000000
M2MEM_8_PREFETCHSADSTARTADDR0 : 0x00000000
M2MEM_8_PREFETCHSADLIMITADDR0 : 0x00000000
M2MEM_8_PREFETCHSADSTARTADDR1 : 0x00000000
M2MEM_8_PREFETCHSADLIMITADDR1 : 0x00000000
M2MEM_8_PREFETCHSADSTARTADDR2 : 0x00000000
M2MEM_8_PREFETCHSADLIMITADDR2 : 0x00000000
M2MEM_8_SYSFEATURES0 : 0x1368009C
M2MEM_9_TOPOLOGY : 0x00032341
M2MEM_9_PREFSADCONFIG0 : 0x00000000
M2MEM_9_PREFSADCONFIG1 : 0x00000000
M2MEM_9_PREFETCHSADSTARTADDR0 : 0x00000000
M2MEM_9_PREFETCHSADLIMITADDR0 : 0x00000000
M2MEM_9_PREFETCHSADSTARTADDR1 : 0x00000000
M2MEM_9_PREFETCHSADLIMITADDR1 : 0x00000000
M2MEM_9_PREFETCHSADSTARTADDR2 : 0x00000000
M2MEM_9_PREFETCHSADLIMITADDR2 : 0x00000000
M2MEM_9_SYSFEATURES0 : 0x1368009C
M2MEM_10_TOPOLOGY : 0x00032341
M2MEM_10_PREFSADCONFIG0 : 0x00000000
M2MEM_10_PREFSADCONFIG1 : 0x00000000
M2MEM_10_PREFETCHSADSTARTADDR0 : 0x00000000
M2MEM_10_PREFETCHSADLIMITADDR0 : 0x00000000
M2MEM_10_PREFETCHSADSTARTADDR1 : 0x00000000
M2MEM_10_PREFETCHSADLIMITADDR1 : 0x00000000
M2MEM_10_PREFETCHSADSTARTADDR2 : 0x00000000
M2MEM_10_PREFETCHSADLIMITADDR2 : 0x00000000
M2MEM_10_SYSFEATURES0 : 0x1368009C
M2MEM_11_TOPOLOGY : 0x00032341
M2MEM_11_PREFSADCONFIG0 : 0x00000000
M2MEM_11_PREFSADCONFIG1 : 0x00000000
M2MEM_11_PREFETCHSADSTARTADDR0 : 0x00000000
M2MEM_11_PREFETCHSADLIMITADDR0 : 0x00000000
M2MEM_11_PREFETCHSADSTARTADDR1 : 0x00000000
M2MEM_11_PREFETCHSADLIMITADDR1 : 0x00000000
M2MEM_11_PREFETCHSADSTARTADDR2 : 0x00000000
M2MEM_11_PREFETCHSADLIMITADDR2 : 0x00000000
M2MEM_11_SYSFEATURES0 : 0x1368009C
M2MEM_12_TOPOLOGY : 0x0004C681
M2MEM_12_PREFSADCONFIG0 : 0x00000000
M2MEM_12_PREFSADCONFIG1 : 0x00000000
M2MEM_12_PREFETCHSADSTARTADDR0 : 0x00000000
M2MEM_12_PREFETCHSADLIMITADDR0 : 0x00000000
M2MEM_12_PREFETCHSADSTARTADDR1 : 0x00000000
M2MEM_12_PREFETCHSADLIMITADDR1 : 0x00000000
M2MEM_12_PREFETCHSADSTARTADDR2 : 0x00000000
M2MEM_12_PREFETCHSADLIMITADDR2 : 0x00000000
M2MEM_12_SYSFEATURES0 : 0x1368009C
M2MEM_13_TOPOLOGY : 0x0004C681
M2MEM_13_PREFSADCONFIG0 : 0x00000000
M2MEM_13_PREFSADCONFIG1 : 0x00000000
M2MEM_13_PREFETCHSADSTARTADDR0 : 0x00000000
M2MEM_13_PREFETCHSADLIMITADDR0 : 0x00000000
M2MEM_13_PREFETCHSADSTARTADDR1 : 0x00000000
M2MEM_13_PREFETCHSADLIMITADDR1 : 0x00000000
M2MEM_13_PREFETCHSADSTARTADDR2 : 0x00000000
M2MEM_13_PREFETCHSADLIMITADDR2 : 0x00000000
M2MEM_13_SYSFEATURES0 : 0x1368009C
M2MEM_14_TOPOLOGY : 0x0004C681
M2MEM_14_PREFSADCONFIG0 : 0x00000000
M2MEM_14_PREFSADCONFIG1 : 0x00000000
M2MEM_14_PREFETCHSADSTARTADDR0 : 0x00000000
M2MEM_14_PREFETCHSADLIMITADDR0 : 0x00000000
M2MEM_14_PREFETCHSADSTARTADDR1 : 0x00000000
M2MEM_14_PREFETCHSADLIMITADDR1 : 0x00000000
M2MEM_14_PREFETCHSADSTARTADDR2 : 0x00000000
M2MEM_14_PREFETCHSADLIMITADDR2 : 0x00000000
M2MEM_14_SYSFEATURES0 : 0x1368009C
M2MEM_15_TOPOLOGY : 0x0004C681
M2MEM_15_PREFSADCONFIG0 : 0x00000000
M2MEM_15_PREFSADCONFIG1 : 0x00000000
M2MEM_15_PREFETCHSADSTARTADDR0 : 0x00000000
M2MEM_15_PREFETCHSADLIMITADDR0 : 0x00000000
M2MEM_15_PREFETCHSADSTARTADDR1 : 0x00000000
M2MEM_15_PREFETCHSADLIMITADDR1 : 0x00000000
M2MEM_15_PREFETCHSADSTARTADDR2 : 0x00000000
M2MEM_15_PREFETCHSADLIMITADDR2 : 0x00000000
M2MEM_15_SYSFEATURES0 : 0x1368009C
M2MEM_16_TOPOLOGY : 0x000669C1
M2MEM_16_PREFSADCONFIG0 : 0x00000000
M2MEM_16_PREFSADCONFIG1 : 0x00000000
M2MEM_16_PREFETCHSADSTARTADDR0 : 0x00000000
M2MEM_16_PREFETCHSADLIMITADDR0 : 0x00000000
M2MEM_16_PREFETCHSADSTARTADDR1 : 0x00000000
M2MEM_16_PREFETCHSADLIMITADDR1 : 0x00000000
M2MEM_16_PREFETCHSADSTARTADDR2 : 0x00000000
M2MEM_16_PREFETCHSADLIMITADDR2 : 0x00000000
M2MEM_16_SYSFEATURES0 : 0x1368009C
M2MEM_17_TOPOLOGY : 0x000669C1
M2MEM_17_PREFSADCONFIG0 : 0x00000000
M2MEM_17_PREFSADCONFIG1 : 0x00000000
M2MEM_17_PREFETCHSADSTARTADDR0 : 0x00000000
M2MEM_17_PREFETCHSADLIMITADDR0 : 0x00000000
M2MEM_17_PREFETCHSADSTARTADDR1 : 0x00000000
M2MEM_17_PREFETCHSADLIMITADDR1 : 0x00000000
M2MEM_17_PREFETCHSADSTARTADDR2 : 0x00000000
M2MEM_17_PREFETCHSADLIMITADDR2 : 0x00000000
M2MEM_17_SYSFEATURES0 : 0x1368009C
M2MEM_18_TOPOLOGY : 0x000669C1
M2MEM_18_PREFSADCONFIG0 : 0x00000000
M2MEM_18_PREFSADCONFIG1 : 0x00000000
M2MEM_18_PREFETCHSADSTARTADDR0 : 0x00000000
M2MEM_18_PREFETCHSADLIMITADDR0 : 0x00000000
M2MEM_18_PREFETCHSADSTARTADDR1 : 0x00000000
M2MEM_18_PREFETCHSADLIMITADDR1 : 0x00000000
M2MEM_18_PREFETCHSADSTARTADDR2 : 0x00000000
M2MEM_18_PREFETCHSADLIMITADDR2 : 0x00000000
M2MEM_18_SYSFEATURES0 : 0x1368009C
M2MEM_19_TOPOLOGY : 0x000669C1
M2MEM_19_PREFSADCONFIG0 : 0x00000000
M2MEM_19_PREFSADCONFIG1 : 0x00000000
M2MEM_19_PREFETCHSADSTARTADDR0 : 0x00000000
M2MEM_19_PREFETCHSADLIMITADDR0 : 0x00000000
M2MEM_19_PREFETCHSADSTARTADDR1 : 0x00000000
M2MEM_19_PREFETCHSADLIMITADDR1 : 0x00000000
M2MEM_19_PREFETCHSADSTARTADDR2 : 0x00000000
M2MEM_19_PREFETCHSADLIMITADDR2 : 0x00000000
M2MEM_19_SYSFEATURES0 : 0x1368009C
**** SNC XPT DUMP END ****
Socket 0 AdTransgressCredits: 0x0, BlTransgressCredits: 0x0
Socket 1 AdTransgressCredits: 0x0, BlTransgressCredits: 0x0
MBA2.0 calibration tables
Mbe BW Calibration: 0 (0 - Linear, 1 - Biased, 2 - Legacy)
ProgramSncShadowReg
Socket:0 Base1 0x0FFF0000
Socket:0 Base2 0x1FE00022
Socket:0 Base3 0x00000042
Socket:0 Base4 0x00000062
Socket:0 Base5 0x00000082
Socket:0 UpperBase1 0x00000000
Socket:0 SncConfig 0x0000000A
Socket:1 Base1 0x0FFF0082
Socket:1 Base2 0x1FE000A2
Socket:1 Base3 0x000000C2
Socket:1 Base4 0x000000E2
Socket:1 Base5 0x00000102
Socket:1 UpperBase1 0x00000000
Socket:1 SncConfig 0x0000000A
******* Configure Mesh Mode - END *******
S3M Provisioning SoftStrap Disabled, Exit.
PUcode Patch provisioning/commit flow
S3mPucodeCfrPatchProvisionCommit didn't find suitable CFR image, Exit.
S3M Patch provisioning/commit flow
Get Image :FF800090 11FF4
CFR Patch Provision start...
IFWI integrated S3M CFR patch revision SVN: 00000001, RevID: 0000001E.
S0 S3M_S3MFW_CFR_SVN_N0_S3M_TREG_REG : 00000000
S0 S3M_S3MFW_REVID_N0_S3M_TREG_REG : 00000000
S0 S3M_S3MFW_CFR_SVN_N1_S3M_TREG_REG : 00010001
S0 S3M_S3MFW_REVID_N1_S3M_TREG_REG : 0000001E
Committed region with the latest patch, skip provision.
Socket 0 Can't Provision, Skip.
IFWI integrated S3M CFR patch revision SVN: 00000001, RevID: 0000001E.
S1 S3M_S3MFW_CFR_SVN_N0_S3M_TREG_REG : 00000000
S1 S3M_S3MFW_REVID_N0_S3M_TREG_REG : 00000000
S1 S3M_S3MFW_CFR_SVN_N1_S3M_TREG_REG : 00010001
S1 S3M_S3MFW_REVID_N1_S3M_TREG_REG : 0000001E
Committed region with the latest patch, skip provision.
Socket 1 Can't Provision, Skip.
CFR Patch Commit start...
S0 S3M_S3MFW_CFR_SVN_N0_S3M_TREG_REG : 00000000
S0 S3M_S3MFW_REVID_N0_S3M_TREG_REG : 00000000
Socket 0 can't commit, skip
S1 S3M_S3MFW_CFR_SVN_N0_S3M_TREG_REG : 00000000
S1 S3M_S3MFW_REVID_N0_S3M_TREG_REG : 00000000
Socket 1 can't commit, skip
CFR Patch Provision/Commit Completed.
IIO Early Post Link Training Starting...
[0.1 p1] 00:15:01.0: Link Down!
[0.2 p9] 00:26:01.0: Link Down!
[0.3 p17] 00:37:01.0: Link Down!
[0.4 p25] 00:48:01.0: Link Down!
[0.4 p27] 00:48:03.0: Link Down!
[0.4 p29] 00:48:05.0: Link Down!
[0.4 p31] 00:48:07.0: Link Down!
[0.5 p33] 00:59:01.0: Link Down!
[0.5 p35] 00:59:03.0: Link Down!
[0.5 p37] 00:59:05.0: Link Down!
[0.5 p39] 00:59:07.0: Link Down!
[1.1 p1] 00:97:01.0: Link Down!
[1.2 p9] 00:A7:01.0: Link Down!
[1.3 p17] 00:B7:01.0: Link Down!
[1.4 p25] 00:C7:01.0: Link Down!
[1.4 p27] 00:C7:03.0: Link Down!
[1.4 p29] 00:C7:05.0: Link Down!
[1.4 p31] 00:C7:07.0: Link Down!
[1.5 p33] 00:D7:01.0: Link Down!
[1.5 p35] 00:D7:03.0: Link Down!
[1.5 p37] 00:D7:05.0: Link Down!
[1.5 p39] 00:D7:07.0: Link Down!
[1.6 p41] 00:80:01.0: Link Down!
[1.6 p45] 00:80:05.0: Link Down!
IioLateInitialization for Socket = 0 Start..
[0] IioEarlyPostLinkTrainingPhase Start
[0 p0] DEVCAP2 7117D6 DEVCTL2 0010 -> 0009 -> 0009
CXL_IO_INIT_START
CXL_IO_INIT_END
FBLP_POST_TRAIN_INIT_START
FBLP_POST_TRAIN_INIT_END
[0.0] VT-d initialization, BAR=957FC000
[0.1] VT-d initialization, BAR=9F7FC000
[0.2] VT-d initialization, BAR=A93FC000
[0.3] VT-d initialization, BAR=B2FFC000
[0.4] VT-d initialization, BAR=BCBFC000
[0.5] VT-d initialization, BAR=C67FC000
[0.8] VT-d initialization, BAR=C6FFC000
[0.9] VT-d initialization, BAR=C77FC000
[0.10] VT-d initialization, BAR=C7FFC000
[0.11] VT-d initialization, BAR=C87FC000
IIO_PSF_INIT_START
IIO_PSF_INIT_END
[0] Hide devices; Phase = A
IioLateInitialization for Socket = 1 Start..
[1] IioEarlyPostLinkTrainingPhase Start
CXL_IO_INIT_START
CXL_IO_INIT_END
FBLP_POST_TRAIN_INIT_START
FBLP_POST_TRAIN_INIT_END
[1.1] VT-d initialization, BAR=D97FC000
[1.2] VT-d initialization, BAR=E17FC000
[1.3] VT-d initialization, BAR=E97FC000
[1.4] VT-d initialization, BAR=F17FC000
[1.5] VT-d initialization, BAR=F97FC000
[1.6] VT-d initialization, BAR=D13FC000
[1.8] VT-d initialization, BAR=F9FFC000
[1.9] VT-d initialization, BAR=FA7FC000
[1.10] VT-d initialization, BAR=FAFFC000
[1.11] VT-d initialization, BAR=FB7FC000
IIO_PSF_INIT_START
IIO_PSF_INIT_END
[1] Hide devices; Phase = A
[0.1 p1] 00:15:01.0: Device is not present!
[0.2 p9] 00:26:01.0: Device is not present!
[0.3 p17] 00:37:01.0: Device is not present!
[0.4 p25] 00:48:01.0: Device is not present!
[0.4 p27] 00:48:03.0: Device is not present!
[0.4 p29] 00:48:05.0: Device is not present!
[0.4 p31] 00:48:07.0: Device is not present!
[0.5 p33] 00:59:01.0: Device is not present!
[0.5 p35] 00:59:03.0: Device is not present!
[0.5 p37] 00:59:05.0: Device is not present!
[0.5 p39] 00:59:07.0: Device is not present!
[1.1 p1] 00:97:01.0: Device is not present!
[1.2 p9] 00:A7:01.0: Device is not present!
[1.3 p17] 00:B7:01.0: Device is not present!
[1.4 p25] 00:C7:01.0: Device is not present!
[1.4 p27] 00:C7:03.0: Device is not present!
[1.4 p29] 00:C7:05.0: Device is not present!
[1.4 p31] 00:C7:07.0: Device is not present!
[1.5 p33] 00:D7:01.0: Device is not present!
[1.5 p35] 00:D7:03.0: Device is not present!
[1.5 p37] 00:D7:05.0: Device is not present!
[1.5 p39] 00:D7:07.0: Device is not present!
[1.6 p41] 00:80:01.0: Device is not present!
[1.6 p45] 00:80:05.0: Device is not present!
[IIO](VMD) VMD init registered on endOfPei.
IIO Early Post Link Training Completed!
InstallEfiMemory()
GetMemoryMap: TsegBase: 78000000
GetMemoryMap: TsegRange: 08000000
RequiredMemSize for ACPI = 0xE44000 bytes
Found 0x00000000000A0000 bytes at 0x0000000000000000
Found 0x0000000000060000 bytes at 0x00000000000A0000
Found 0x0000000077700000 bytes at 0x0000000000100000
Found 0x0000000008000000 bytes at 0x0000000078000000
Found 0x0000000000800000 bytes at 0x0000000077800000
Save MemoryMap data into Hob
Building RESOURCE_SYSTEM_MEMORY Hob:
PeiMemoryBaseAddress = 0x629D0000, PeiMemoryLength = 0x14E30000
TOHM:0x0000004080000000
Reset Requested: 0
Pipe Exit starting...
S[01] Waiting on...
S[00] SBSP...
S[01] Waiting on...
Skt1 NEM Tear Down @ 769BB000
Pipe Exit completed! Reset Requested: 0
Enhanced Warning Log:
Checking for Reset Requests...
ResetRequired: 00
ConfigurePsmi () - Trace region size is 0 for all cache types; Socket: 0
ConfigurePsmi () - Trace region size is 0 for all cache types; Socket: 1
None
Continue with system BIOS POST ...
PROGRESS CODE: V03020003 I0
[HECI Transport-1 PEI] Send pkt: 80010020
00: 01
[HECI Transport-1 PEI] Got pkt: 800B0020
00: 81 01 01 14 00 88 00 01 - 00 00 00
[HECI Transport-1 PEI] Send pkt: 80300008
00: 00 00 05 00 1A 00 00 00 - 00 00 00 00 1C 00 00 00
10: 00 00 00 00 00 00 00 00 - 00 00 00 00 00 00 00 00
20: 00 00 00 00 00 00 00 00 - 00 00 00 00 00 00 00 00
[HECI Transport-1 PEI] Got pkt: 80300008
00: 00 00 05 00 1A 00 00 00 - 00 00 00 00 1C 00 00 00
10: 00 00 00 00 00 00 00 02 - 00 00 00 00 00 00 00 00
20: 00 00 00 00 00 00 00 00 - 00 00 00 00 00 00 00 00
Fail to Configure PSYS_CRIT
[HECI Transport-1 PEI] Send pkt: 80140007
00: F2 02 00 00 00 00 00 00 - 00 00 00 00 00 00 00 00
10: 0C 00 00 00
[HECI Transport-1 PEI] Got pkt: 80240007
00: F2 82 00 00 00 00 00 00 - 50 16 00 00 00 00 00 00
10: 0C 00 00 00 00 00 00 02 - 6D 32 FF FF FF FF 6E 11
20: 00 00 08 00
DDR PPR data hub created! Number of entries = 0
HBM PPR data hub created! Number of entries = 0
-> LIB data: Initialize
-> IBB Block Start, Status 0x80000007
IioVmdDisableForPchRpInit: DonePCH Series : EBG PCH
PCH Stepping : B0
[HECI Transport-1 PEI] Send pkt: 80010020
00: 01
[HECI Transport-1 PEI] Got pkt: 800B0020
00: 81 01 01 14 00 88 00 01 - 00 00 00
[HECI Transport-1 PEI] Send pkt: 80300008
00: 00 00 05 00 1A 00 00 00 - 00 00 00 00 1C 00 00 00
10: 00 00 00 00 00 00 00 00 - 00 00 00 00 00 00 00 00
20: 00 00 00 00 00 00 00 00 - 00 00 00 00 00 00 00 00
[HECI Transport-1 PEI] Got pkt: 80300008
00: 00 00 05 00 1A 00 00 00 - 00 00 00 00 1C 00 00 00
10: 00 00 00 00 00 00 00 02 - 00 00 00 00 00 00 00 00
20: 00 00 00 00 00 00 00 00 - 00 00 00 00 00 00 00 00
Fail to Configure PSYS_CRIT
[HECI Transport-1 PEI] Send pkt: 80010020
00: 01
[HECI Transport-1 PEI] Got pkt: 800B0020
00: 81 01 01 14 00 88 00 01 - 00 00 00
[HECI Transport-1 PEI] Send pkt: 80300008
00: 00 00 05 00 1A 00 00 00 - 00 00 00 00 1C 00 00 00
10: 00 00 00 00 00 00 00 00 - 00 00 00 00 00 00 00 00
20: 00 00 00 00 00 00 00 00 - 00 00 00 00 00 00 00 00
[HECI Transport-1 PEI] Got pkt: 80300008
00: 00 00 05 00 1A 00 00 00 - 00 00 00 00 1C 00 00 00
10: 00 00 00 00 00 00 00 02 - 00 00 00 00 00 00 00 00
20: 00 00 00 00 00 00 00 00 - 00 00 00 00 00 00 00 00
Fail to Configure PSYS_CRIT
[HECI Transport-1 PEI] Send pkt: 80140007
00: F2 02 00 00 00 00 00 00 - 00 00 00 00 00 00 00 00
10: 0C 00 00 00
[HECI Transport-1 PEI] Got pkt: 80240007
00: F2 82 00 00 00 00 00 00 - 50 16 00 00 00 00 00 00
10: 0C 00 00 00 00 00 00 02 - 6D 32 FF FF FF FF 6E 11
20: 00 00 08 00
PROGRESS CODE: V03020002 I0
PROGRESS CODE: V03020003 I0
PROGRESS CODE: V03020002 I0
PROGRESS CODE: V03020003 I0
PROGRESS CODE: V03020002 I0
PROGRESS CODE: V03020003 I0
PROGRESS CODE: V03020002 I0
PROGRESS CODE: V03020003 I0
-> LIB data: Already initialized
-> IBB Block End, Status 0x80000007
-> LIB data: Already initialized
-> OBB Block Start, Status 0x80000007
PROGRESS CODE: V03020002 I0
Common PPM policy update, PackageCState:3
PROGRESS CODE: V03020003 I0
PROGRESS CODE: V03020002 I0
PROGRESS CODE: V03020003 I0
PROGRESS CODE: V03020002 I0
PROGRESS CODE: V03020003 I0
PROGRESS CODE: V03020002 I0
PROGRESS CODE: V03020003 I0
PROGRESS CODE: V03020002 I0
PROGRESS CODE: V03020003 I0
PROGRESS CODE: V03020002 I0
[HECI Transport-1 PEI] Send pkt: 80280007
00: FF 03 00 00 02 00 00 00 - 00 00 18 6A 01 00 18 E7
10: 00 00 00 00 00 00 00 00 - 00 00 00 00 00 00 00 00
20: 00 00 00 00 00 00 00 00
[HECI Transport-1 PEI] Got pkt: 80040007
00: FF 83 00 00
PROGRESS CODE: V03020003 I0
PROGRESS CODE: V03020002 I0
PROGRESS CODE: V03020003 I0
PROGRESS CODE: V03020002 I0
PROGRESS CODE: V03020003 I0
PROGRESS CODE: V03020002 I0
PROGRESS CODE: V03020003 I0
PROGRESS CODE: V03020002 I0
!!! Invalid IIO LLC WAYS Bit Mask: 0x00000000
In CryptParallelhash
Return in function 2
ParallelHash256HashAll1(): Calculate code parallel hash failed!
Performance test = 10610297
In CryptParallelhash
Return in function 5
Dump data from 62CC1880, size: 0x3
62CC1880: 01 01 01 | ...
Dump data from 62CC1880, size: 0x3
62CC1880: 01 01 01 | ...
Return in function 6,retrunvalue=1
Dump data from 62ACF888, size: 0x40
62ACF888: CD F1 52 89 B5 4F 62 12 B4 BC 27 05 28 B4 95 26 | ..R..Ob...'.(..&
62ACF898: 00 6D D9 B5 4E 2B 6A DD 1E F6 90 0D DA 39 63 BB | .m..N+j......9c.
62ACF8A8: 33 A7 24 91 F2 36 96 9C A8 AF AE A2 9C 68 2D 47 | 3.$..6.......h-G
62ACF8B8: A3 93 C0 65 B3 8E 29 FA E6 51 A2 09 1C 83 31 10 | ...e..)..Q....1.
Accuracy test = 0
PROGRESS CODE: V03020003 I0
PROGRESS CODE: V03020002 I0
PROGRESS CODE: V03020003 I0
PROGRESS CODE: V03020002 I0
PROGRESS CODE: V03020003 I0
PROGRESS CODE: V03020002 I0
PROGRESS CODE: V03020003 I0
PROGRESS CODE: V03020002 I0
[MP_DISPATCH] MpDispatch4v0_CommonConstructor BEGIN
[MP_DISPATCH] MpDispatch4v0_CommonConstructor END (Success)
[FRU_MKTME] FruCpuFeatureMkTme3v0EntryPoint BEGIN
[FRU_MKTME] FruCpuFeatureMkTme3v0EntryPoint END (Success)
[FRU_SGX] FruCpuFeatureSgx3v0EntryPoint BEGIN
[FRU_SGX] FruCpuFeatureSgx3v0EntryPoint END (Success)
PROGRESS CODE: V03020003 I0
PROGRESS CODE: V03020002 I0
[APP_ADAPTER] AppAdapterMkTme3v0EntryPoint BEGIN
[APP_ADAPTER] AppAdapterMkTme3v0EntryPoint END (Success)
PROGRESS CODE: V03020003 I0
PROGRESS CODE: V03020002 I0
PROGRESS CODE: V03020003 I0
PROGRESS CODE: V03020002 I0
PROGRESS CODE: V03020003 I0
PROGRESS CODE: V03020002 I0
[SGX] SgxEarlyInit entry
IsSgxCapable = 1 Status = Success
IsSgxRequested = 0 Status = Success
IsTdxCapable = 0 Status = Success
IsTdxRequested = 0 Status = Success
IsTdxActivated = 0 Status = Success
SgxMpServicesData()
Thread 0 is BSP of Socket 0
Thread 80 is BSP of Socket 1
System BSP Thread = 000
System BSP Package = 000
[SGX_VAR_MANIFEST] HobSize: 8512, Hash:
[12] [56] [ED] [9C] [D5] [9D] [C8] [1A] [E0] [44] [25] [30] [1B] [26] [71] [76] [DB] [8B] [BF] [5C] [29] [96] [F3] [A2] [58] [29] [7F] [97] [42] [AF] [E0] [C0]
[SGX-DEBUG] GetVariableHelper: VariableName: (SgxRegistrationState), VendorGuid: (2C65F1A3), DataSize: (64), Data: (F)
GetVariable - SgxRegistrationState not found, continue
UefiFwRegistrationState not found in NVRAM!
GetRegistrationVariablesFromNvram Enter
[SGX-DEBUG] GetVariableHelper: VariableName: (SgxRegistrationConfiguration), VendorGuid: (18B3BC81), DataSize: (1520), Data: (F)
GetVariable - SgxRegistrationConfiguration not found, continue
[SGX-DEBUG] GetVariableHelper: VariableName: (SgxUefiRegistrationConfiguration), VendorGuid: (8D4CA9E8), DataSize: (1520), Data: (F)
GetVariable - SgxUefiRegistrationConfiguration not found, continue
[SGX-DEBUG]: Get SgxRegistrationStatus
[SGX-DEBUG] GetVariableHelper: VariableName: (SgxRegistrationStatus), VendorGuid: (F236C5DC), DataSize: (7), Data: (F)
GetVariable - SgxRegistrationStatus not found, continue
[SGX-DEBUG]: Get SgxUefiRegistrationStatus
[SGX-DEBUG] GetVariableHelper: VariableName: (SgxUefiRegistrationStatus), VendorGuid: (CF24D5E9), DataSize: (7), Data: (F)
GetVariable - SgxUefiRegistrationStatus not found, continue
[SGX-DEBUG] Early PrintByteArrays SgxRegistrationStatus:
[00] [00] [00] [00] [00] [00] [00]
[SGX-DEBUG] GetVariableHelper: VariableName: (SgxRegistrationServerResponse), VendorGuid: (89589C7B), DataSize: (10060), Data: (F)
GetVariable - SgxRegistrationServerResponse not found, continue
[SGX-DEBUG] GetVariableHelper: VariableName: (SgxUefiRegistrationServerResponse), VendorGuid: (35D93155), DataSize: (10060), Data: (F)
GetVariable - SgxUefiRegistrationServerResponse not found, continue
RegistrationVariables presence:
RegistrationConfig = 0
RegistrationStatus = 0
RegistrationResponse = 0
[SGX] RestoreKeyBlobsInternalSgxInitDataHobFieldsFromNvram BEGIN
[SGX] RestoreUefiFwKeyBlobsVariable BEGIN
[SGX-DEBUG] GetVariableHelper: VariableName: (SgxKeyBlobs), VendorGuid: (60F76511), DataSize: (14720), Data: (F)
GetVariable - SgxKeyBlobs not found, continue
Error: Unable to get SgxUefiFwKeyBlobs
[SGX] RestoreUefiFwKeyBlobsVariable END
KeyBlobs were NOT restored from SgxUefiFwKeyBlobs!
KeyBlobs were NOT restored from SgxRegistrationPackageInfo contents due to PackageInfoInBandAccess = FALSE!
KeyBlobsExistInNvram = (FALSE)
[SGX] RestoreKeyBlobsInternalSgxInitDataHobFieldsFromNvram END
KeyBlobs were not found in NVRAM. Continue boot...
[SGX-KEYBLOB-PEI-REST] KeyBlob for socket no 0
Present: FALSE
TimeStamp: 0-0-0, 0:0:0:0, Pad1: 0, Pad2: 0, TimeZone: 0, Daylight: 0
KeyBlob:
Header:
SGX UUID:
[00] [00] [00] [00] [00] [00] [00] [00] [00] [00] [00] [00] [00] [00] [00] [00]
CpuSvn:
[00]
Security Properties:
[00] [00] [00] [00]
Prid:
[00] [00] [00] [00] [00] [00] [00] [00] [00] [00] [00] [00] [00] [00] [00] [00]
PlatformEpoch:
[00] [00] [00] [00] [00] [00] [00] [00] [00] [00] [00] [00] [00] [00] [00] [00] [00] [00] [00] [00] [00] [00] [00] [00] [00] [00] [00] [00] [00] [00] [00] [00]
RsakHash:
[00] [00] [00] [00] [00] [00] [00] [00] [00] [00] [00] [00] [00] [00] [00] [00] [00] [00] [00] [00] [00] [00] [00] [00] [00] [00] [00] [00] [00] [00] [00] [00]
RsakHash:
[00] [00] [00] [00] [00] [00] [00] [00] [00] [00] [00] [00] [00] [00] [00] [00] [00] [00] [00] [00] [00] [00] [00] [00] [00] [00] [00] [00] [00] [00] [00] [00]
Pfk1:
[00] [00] [00] [00] [00] [00] [00] [00] [00] [00] [00] [00] [00] [00] [00] [00]
PprResetKey:
[00] [00] [00] [00]
[00] [00] [00] [00]
[00] [00] [00] [00]
[00] [00] [00] [00]
[00] [00] [00] [00]
[00] [00] [00] [00]
[00] [00] [00] [00]
[00] [00] [00] [00]
[00] [00] [00] [00]
[00] [00] [00] [00]
[00] [00] [00] [00]
[00] [00] [00] [00]
[00] [00] [00] [00]
[00] [00] [00] [00]
[00] [00] [00] [00]
[00] [00] [00] [00]
[00] [00] [00] [00]
[00] [00] [00] [00]
[00] [00] [00] [00]
[00] [00] [00] [00]
[00] [00] [00] [00]
[00] [00] [00] [00]
[00] [00] [00] [00]
[00] [00] [00] [00]
[00] [00] [00] [00]
[00] [00] [00] [00]
[00] [00] [00] [00]
[00] [00] [00] [00]
[00] [00] [00] [00]
[00] [00] [00] [00]
[00] [00] [00] [00]
[00] [00] [00] [00]
LastUsedSvn:
[00]
Reserved2:
[00] [00] [00] [00] [00] [00] [00] [00] [00] [00] [00] [00] [00] [00] [00]
TargetPrid:
[00] [00] [00] [00] [00] [00] [00] [00] [00] [00] [00] [00] [00] [00] [00] [00]
PrimaryComms:
[00] [00] [00] [00] [00] [00] [00] [00] [00] [00] [00] [00] [00] [00] [00] [00]
Iv:
[00] [00] [00] [00] [00] [00] [00] [00] [00] [00] [00] [00]
[00] [00] [00] [00] [00] [00] [00] [00] [00] [00] [00] [00]
[00] [00] [00] [00] [00] [00] [00] [00] [00] [00] [00] [00]
[00] [00] [00] [00] [00] [00] [00] [00] [00] [00] [00] [00]
[00] [00] [00] [00] [00] [00] [00] [00] [00] [00] [00] [00]
[00] [00] [00] [00] [00] [00] [00] [00] [00] [00] [00] [00]
[00] [00] [00] [00] [00] [00] [00] [00] [00] [00] [00] [00]
[00] [00] [00] [00] [00] [00] [00] [00] [00] [00] [00] [00]
[00] [00] [00] [00] [00] [00] [00] [00] [00] [00] [00] [00]
[00] [00] [00] [00] [00] [00] [00] [00] [00] [00] [00] [00]
[00] [00] [00] [00] [00] [00] [00] [00] [00] [00] [00] [00]
[00] [00] [00] [00] [00] [00] [00] [00] [00] [00] [00] [00]
[00] [00] [00] [00] [00] [00] [00] [00] [00] [00] [00] [00]
[00] [00] [00] [00] [00] [00] [00] [00] [00] [00] [00] [00]
[00] [00] [00] [00] [00] [00] [00] [00] [00] [00] [00] [00]
[00] [00] [00] [00] [00] [00] [00] [00] [00] [00] [00] [00]
[00] [00] [00] [00] [00] [00] [00] [00] [00] [00] [00] [00]
[00] [00] [00] [00] [00] [00] [00] [00] [00] [00] [00] [00]
[00] [00] [00] [00] [00] [00] [00] [00] [00] [00] [00] [00]
[00] [00] [00] [00] [00] [00] [00] [00] [00] [00] [00] [00]
[00] [00] [00] [00] [00] [00] [00] [00] [00] [00] [00] [00]
[00] [00] [00] [00] [00] [00] [00] [00] [00] [00] [00] [00]
[00] [00] [00] [00] [00] [00] [00] [00] [00] [00] [00] [00]
[00] [00] [00] [00] [00] [00] [00] [00] [00] [00] [00] [00]
[00] [00] [00] [00] [00] [00] [00] [00] [00] [00] [00] [00]
[00] [00] [00] [00] [00] [00] [00] [00] [00] [00] [00] [00]
[00] [00] [00] [00] [00] [00] [00] [00] [00] [00] [00] [00]
[00] [00] [00] [00] [00] [00] [00] [00] [00] [00] [00] [00]
[00] [00] [00] [00] [00] [00] [00] [00] [00] [00] [00] [00]
[00] [00] [00] [00] [00] [00] [00] [00] [00] [00] [00] [00]
[00] [00] [00] [00] [00] [00] [00] [00] [00] [00] [00] [00]
[00] [00] [00] [00] [00] [00] [00] [00] [00] [00] [00] [00]
Mac:
[00] [00] [00] [00] [00] [00] [00] [00] [00] [00] [00] [00] [00] [00] [00] [00]
[00] [00] [00] [00] [00] [00] [00] [00] [00] [00] [00] [00] [00] [00] [00] [00]
[00] [00] [00] [00] [00] [00] [00] [00] [00] [00] [00] [00] [00] [00] [00] [00]
[00] [00] [00] [00] [00] [00] [00] [00] [00] [00] [00] [00] [00] [00] [00] [00]
[00] [00] [00] [00] [00] [00] [00] [00] [00] [00] [00] [00] [00] [00] [00] [00]
[00] [00] [00] [00] [00] [00] [00] [00] [00] [00] [00] [00] [00] [00] [00] [00]
[00] [00] [00] [00] [00] [00] [00] [00] [00] [00] [00] [00] [00] [00] [00] [00]
[00] [00] [00] [00] [00] [00] [00] [00] [00] [00] [00] [00] [00] [00] [00] [00]
[00] [00] [00] [00] [00] [00] [00] [00] [00] [00] [00] [00] [00] [00] [00] [00]
[00] [00] [00] [00] [00] [00] [00] [00] [00] [00] [00] [00] [00] [00] [00] [00]
[00] [00] [00] [00] [00] [00] [00] [00] [00] [00] [00] [00] [00] [00] [00] [00]
[00] [00] [00] [00] [00] [00] [00] [00] [00] [00] [00] [00] [00] [00] [00] [00]
[00] [00] [00] [00] [00] [00] [00] [00] [00] [00] [00] [00] [00] [00] [00] [00]
[00] [00] [00] [00] [00] [00] [00] [00] [00] [00] [00] [00] [00] [00] [00] [00]
[00] [00] [00] [00] [00] [00] [00] [00] [00] [00] [00] [00] [00] [00] [00] [00]
[00] [00] [00] [00] [00] [00] [00] [00] [00] [00] [00] [00] [00] [00] [00] [00]
[00] [00] [00] [00] [00] [00] [00] [00] [00] [00] [00] [00] [00] [00] [00] [00]
[00] [00] [00] [00] [00] [00] [00] [00] [00] [00] [00] [00] [00] [00] [00] [00]
[00] [00] [00] [00] [00] [00] [00] [00] [00] [00] [00] [00] [00] [00] [00] [00]
[00] [00] [00] [00] [00] [00] [00] [00] [00] [00] [00] [00] [00] [00] [00] [00]
[00] [00] [00] [00] [00] [00] [00] [00] [00] [00] [00] [00] [00] [00] [00] [00]
[00] [00] [00] [00] [00] [00] [00] [00] [00] [00] [00] [00] [00] [00] [00] [00]
[00] [00] [00] [00] [00] [00] [00] [00] [00] [00] [00] [00] [00] [00] [00] [00]
[00] [00] [00] [00] [00] [00] [00] [00] [00] [00] [00] [00] [00] [00] [00] [00]
[00] [00] [00] [00] [00] [00] [00] [00] [00] [00] [00] [00] [00] [00] [00] [00]
[00] [00] [00] [00] [00] [00] [00] [00] [00] [00] [00] [00] [00] [00] [00] [00]
[00] [00] [00] [00] [00] [00] [00] [00] [00] [00] [00] [00] [00] [00] [00] [00]
[00] [00] [00] [00] [00] [00] [00] [00] [00] [00] [00] [00] [00] [00] [00] [00]
[00] [00] [00] [00] [00] [00] [00] [00] [00] [00] [00] [00] [00] [00] [00] [00]
[00] [00] [00] [00] [00] [00] [00] [00] [00] [00] [00] [00] [00] [00] [00] [00]
[00] [00] [00] [00] [00] [00] [00] [00] [00] [00] [00] [00] [00] [00] [00] [00]
[00] [00] [00] [00] [00] [00] [00] [00] [00] [00] [00] [00] [00] [00] [00] [00]
IvComm:
[00] [00] [00] [00] [00] [00] [00] [00] [00] [00] [00] [00]
MacComm:
[00] [00] [00] [00] [00] [00] [00] [00] [00] [00] [00] [00] [00] [00] [00] [00]
[SGX-KEYBLOB-PEI-REST] KeyBlob for socket no 1
Present: FALSE
TimeStamp: 0-0-0, 0:0:0:0, Pad1: 0, Pad2: 0, TimeZone: 0, Daylight: 0
KeyBlob:
Header:
SGX UUID:
[00] [00] [00] [00] [00] [00] [00] [00] [00] [00] [00] [00] [00] [00] [00] [00]
CpuSvn:
[00]
Security Properties:
[00] [00] [00] [00]
Prid:
[00] [00] [00] [00] [00] [00] [00] [00] [00] [00] [00] [00] [00] [00] [00] [00]
PlatformEpoch:
[00] [00] [00] [00] [00] [00] [00] [00] [00] [00] [00] [00] [00] [00] [00] [00] [00] [00] [00] [00] [00] [00] [00] [00] [00] [00] [00] [00] [00] [00] [00] [00]
RsakHash:
[00] [00] [00] [00] [00] [00] [00] [00] [00] [00] [00] [00] [00] [00] [00] [00] [00] [00] [00] [00] [00] [00] [00] [00] [00] [00] [00] [00] [00] [00] [00] [00]
RsakHash:
[00] [00] [00] [00] [00] [00] [00] [00] [00] [00] [00] [00] [00] [00] [00] [00] [00] [00] [00] [00] [00] [00] [00] [00] [00] [00] [00] [00] [00] [00] [00] [00]
Pfk1:
[00] [00] [00] [00] [00] [00] [00] [00] [00] [00] [00] [00] [00] [00] [00] [00]
PprResetKey:
[00] [00] [00] [00]
[00] [00] [00] [00]
[00] [00] [00] [00]
[00] [00] [00] [00]
[00] [00] [00] [00]
[00] [00] [00] [00]
[00] [00] [00] [00]
[00] [00] [00] [00]
[00] [00] [00] [00]
[00] [00] [00] [00]
[00] [00] [00] [00]
[00] [00] [00] [00]
[00] [00] [00] [00]
[00] [00] [00] [00]
[00] [00] [00] [00]
[00] [00] [00] [00]
[00] [00] [00] [00]
[00] [00] [00] [00]
[00] [00] [00] [00]
[00] [00] [00] [00]
[00] [00] [00] [00]
[00] [00] [00] [00]
[00] [00] [00] [00]
[00] [00] [00] [00]
[00] [00] [00] [00]
[00] [00] [00] [00]
[00] [00] [00] [00]
[00] [00] [00] [00]
[00] [00] [00] [00]
[00] [00] [00] [00]
[00] [00] [00] [00]
[00] [00] [00] [00]
LastUsedSvn:
[00]
Reserved2:
[00] [00] [00] [00] [00] [00] [00] [00] [00] [00] [00] [00] [00] [00] [00]
TargetPrid:
[00] [00] [00] [00] [00] [00] [00] [00] [00] [00] [00] [00] [00] [00] [00] [00]
PrimaryComms:
[00] [00] [00] [00] [00] [00] [00] [00] [00] [00] [00] [00] [00] [00] [00] [00]
Iv:
[00] [00] [00] [00] [00] [00] [00] [00] [00] [00] [00] [00]
[00] [00] [00] [00] [00] [00] [00] [00] [00] [00] [00] [00]
[00] [00] [00] [00] [00] [00] [00] [00] [00] [00] [00] [00]
[00] [00] [00] [00] [00] [00] [00] [00] [00] [00] [00] [00]
[00] [00] [00] [00] [00] [00] [00] [00] [00] [00] [00] [00]
[00] [00] [00] [00] [00] [00] [00] [00] [00] [00] [00] [00]
[00] [00] [00] [00] [00] [00] [00] [00] [00] [00] [00] [00]
[00] [00] [00] [00] [00] [00] [00] [00] [00] [00] [00] [00]
[00] [00] [00] [00] [00] [00] [00] [00] [00] [00] [00] [00]
[00] [00] [00] [00] [00] [00] [00] [00] [00] [00] [00] [00]
[00] [00] [00] [00] [00] [00] [00] [00] [00] [00] [00] [00]
[00] [00] [00] [00] [00] [00] [00] [00] [00] [00] [00] [00]
[00] [00] [00] [00] [00] [00] [00] [00] [00] [00] [00] [00]
[00] [00] [00] [00] [00] [00] [00] [00] [00] [00] [00] [00]
[00] [00] [00] [00] [00] [00] [00] [00] [00] [00] [00] [00]
[00] [00] [00] [00] [00] [00] [00] [00] [00] [00] [00] [00]
[00] [00] [00] [00] [00] [00] [00] [00] [00] [00] [00] [00]
[00] [00] [00] [00] [00] [00] [00] [00] [00] [00] [00] [00]
[00] [00] [00] [00] [00] [00] [00] [00] [00] [00] [00] [00]
[00] [00] [00] [00] [00] [00] [00] [00] [00] [00] [00] [00]
[00] [00] [00] [00] [00] [00] [00] [00] [00] [00] [00] [00]
[00] [00] [00] [00] [00] [00] [00] [00] [00] [00] [00] [00]
[00] [00] [00] [00] [00] [00] [00] [00] [00] [00] [00] [00]
[00] [00] [00] [00] [00] [00] [00] [00] [00] [00] [00] [00]
[00] [00] [00] [00] [00] [00] [00] [00] [00] [00] [00] [00]
[00] [00] [00] [00] [00] [00] [00] [00] [00] [00] [00] [00]
[00] [00] [00] [00] [00] [00] [00] [00] [00] [00] [00] [00]
[00] [00] [00] [00] [00] [00] [00] [00] [00] [00] [00] [00]
[00] [00] [00] [00] [00] [00] [00] [00] [00] [00] [00] [00]
[00] [00] [00] [00] [00] [00] [00] [00] [00] [00] [00] [00]
[00] [00] [00] [00] [00] [00] [00] [00] [00] [00] [00] [00]
[00] [00] [00] [00] [00] [00] [00] [00] [00] [00] [00] [00]
Mac:
[00] [00] [00] [00] [00] [00] [00] [00] [00] [00] [00] [00] [00] [00] [00] [00]
[00] [00] [00] [00] [00] [00] [00] [00] [00] [00] [00] [00] [00] [00] [00] [00]
[00] [00] [00] [00] [00] [00] [00] [00] [00] [00] [00] [00] [00] [00] [00] [00]
[00] [00] [00] [00] [00] [00] [00] [00] [00] [00] [00] [00] [00] [00] [00] [00]
[00] [00] [00] [00] [00] [00] [00] [00] [00] [00] [00] [00] [00] [00] [00] [00]
[00] [00] [00] [00] [00] [00] [00] [00] [00] [00] [00] [00] [00] [00] [00] [00]
[00] [00] [00] [00] [00] [00] [00] [00] [00] [00] [00] [00] [00] [00] [00] [00]
[00] [00] [00] [00] [00] [00] [00] [00] [00] [00] [00] [00] [00] [00] [00] [00]
[00] [00] [00] [00] [00] [00] [00] [00] [00] [00] [00] [00] [00] [00] [00] [00]
[00] [00] [00] [00] [00] [00] [00] [00] [00] [00] [00] [00] [00] [00] [00] [00]
[00] [00] [00] [00] [00] [00] [00] [00] [00] [00] [00] [00] [00] [00] [00] [00]
[00] [00] [00] [00] [00] [00] [00] [00] [00] [00] [00] [00] [00] [00] [00] [00]
[00] [00] [00] [00] [00] [00] [00] [00] [00] [00] [00] [00] [00] [00] [00] [00]
[00] [00] [00] [00] [00] [00] [00] [00] [00] [00] [00] [00] [00] [00] [00] [00]
[00] [00] [00] [00] [00] [00] [00] [00] [00] [00] [00] [00] [00] [00] [00] [00]
[00] [00] [00] [00] [00] [00] [00] [00] [00] [00] [00] [00] [00] [00] [00] [00]
[00] [00] [00] [00] [00] [00] [00] [00] [00] [00] [00] [00] [00] [00] [00] [00]
[00] [00] [00] [00] [00] [00] [00] [00] [00] [00] [00] [00] [00] [00] [00] [00]
[00] [00] [00] [00] [00] [00] [00] [00] [00] [00] [00] [00] [00] [00] [00] [00]
[00] [00] [00] [00] [00] [00] [00] [00] [00] [00] [00] [00] [00] [00] [00] [00]
[00] [00] [00] [00] [00] [00] [00] [00] [00] [00] [00] [00] [00] [00] [00] [00]
[00] [00] [00] [00] [00] [00] [00] [00] [00] [00] [00] [00] [00] [00] [00] [00]
[00] [00] [00] [00] [00] [00] [00] [00] [00] [00] [00] [00] [00] [00] [00] [00]
[00] [00] [00] [00] [00] [00] [00] [00] [00] [00] [00] [00] [00] [00] [00] [00]
[00] [00] [00] [00] [00] [00] [00] [00] [00] [00] [00] [00] [00] [00] [00] [00]
[00] [00] [00] [00] [00] [00] [00] [00] [00] [00] [00] [00] [00] [00] [00] [00]
[00] [00] [00] [00] [00] [00] [00] [00] [00] [00] [00] [00] [00] [00] [00] [00]
[00] [00] [00] [00] [00] [00] [00] [00] [00] [00] [00] [00] [00] [00] [00] [00]
[00] [00] [00] [00] [00] [00] [00] [00] [00] [00] [00] [00] [00] [00] [00] [00]
[00] [00] [00] [00] [00] [00] [00] [00] [00] [00] [00] [00] [00] [00] [00] [00]
[00] [00] [00] [00] [00] [00] [00] [00] [00] [00] [00] [00] [00] [00] [00] [00]
[00] [00] [00] [00] [00] [00] [00] [00] [00] [00] [00] [00] [00] [00] [00] [00]
IvComm:
[00] [00] [00] [00] [00] [00] [00] [00] [00] [00] [00] [00]
MacComm:
[00] [00] [00] [00] [00] [00] [00] [00] [00] [00] [00] [00] [00] [00] [00] [00]
[SGX-KEYBLOB-PEI-REST] KeyBlob for socket no 2
Present: FALSE
TimeStamp: 0-0-0, 0:0:0:0, Pad1: 0, Pad2: 0, TimeZone: 0, Daylight: 0
KeyBlob:
Header:
SGX UUID:
[00] [00] [00] [00] [00] [00] [00] [00] [00] [00] [00] [00] [00] [00] [00] [00]
CpuSvn:
[00]
Security Properties:
[00] [00] [00] [00]
Prid:
[00] [00] [00] [00] [00] [00] [00] [00] [00] [00] [00] [00] [00] [00] [00] [00]
PlatformEpoch:
[00] [00] [00] [00] [00] [00] [00] [00] [00] [00] [00] [00] [00] [00] [00] [00] [00] [00] [00] [00] [00] [00] [00] [00] [00] [00] [00] [00] [00] [00] [00] [00]
RsakHash:
[00] [00] [00] [00] [00] [00] [00] [00] [00] [00] [00] [00] [00] [00] [00] [00] [00] [00] [00] [00] [00] [00] [00] [00] [00] [00] [00] [00] [00] [00] [00] [00]
RsakHash:
[00] [00] [00] [00] [00] [00] [00] [00] [00] [00] [00] [00] [00] [00] [00] [00] [00] [00] [00] [00] [00] [00] [00] [00] [00] [00] [00] [00] [00] [00] [00] [00]
Pfk1:
[00] [00] [00] [00] [00] [00] [00] [00] [00] [00] [00] [00] [00] [00] [00] [00]
PprResetKey:
[00] [00] [00] [00]
[00] [00] [00] [00]
[00] [00] [00] [00]
[00] [00] [00] [00]
[00] [00] [00] [00]
[00] [00] [00] [00]
[00] [00] [00] [00]
[00] [00] [00] [00]
[00] [00] [00] [00]
[00] [00] [00] [00]
[00] [00] [00] [00]
[00] [00] [00] [00]
[00] [00] [00] [00]
[00] [00] [00] [00]
[00] [00] [00] [00]
[00] [00] [00] [00]
[00] [00] [00] [00]
[00] [00] [00] [00]
[00] [00] [00] [00]
[00] [00] [00] [00]
[00] [00] [00] [00]
[00] [00] [00] [00]
[00] [00] [00] [00]
[00] [00] [00] [00]
[00] [00] [00] [00]
[00] [00] [00] [00]
[00] [00] [00] [00]
[00] [00] [00] [00]
[00] [00] [00] [00]
[00] [00] [00] [00]
[00] [00] [00] [00]
[00] [00] [00] [00]
LastUsedSvn:
[00]
Reserved2:
[00] [00] [00] [00] [00] [00] [00] [00] [00] [00] [00] [00] [00] [00] [00]
TargetPrid:
[00] [00] [00] [00] [00] [00] [00] [00] [00] [00] [00] [00] [00] [00] [00] [00]
PrimaryComms:
[00] [00] [00] [00] [00] [00] [00] [00] [00] [00] [00] [00] [00] [00] [00] [00]
Iv:
[00] [00] [00] [00] [00] [00] [00] [00] [00] [00] [00] [00]
[00] [00] [00] [00] [00] [00] [00] [00] [00] [00] [00] [00]
[00] [00] [00] [00] [00] [00] [00] [00] [00] [00] [00] [00]
[00] [00] [00] [00] [00] [00] [00] [00] [00] [00] [00] [00]
[00] [00] [00] [00] [00] [00] [00] [00] [00] [00] [00] [00]
[00] [00] [00] [00] [00] [00] [00] [00] [00] [00] [00] [00]
[00] [00] [00] [00] [00] [00] [00] [00] [00] [00] [00] [00]
[00] [00] [00] [00] [00] [00] [00] [00] [00] [00] [00] [00]
[00] [00] [00] [00] [00] [00] [00] [00] [00] [00] [00] [00]
[00] [00] [00] [00] [00] [00] [00] [00] [00] [00] [00] [00]
[00] [00] [00] [00] [00] [00] [00] [00] [00] [00] [00] [00]
[00] [00] [00] [00] [00] [00] [00] [00] [00] [00] [00] [00]
[00] [00] [00] [00] [00] [00] [00] [00] [00] [00] [00] [00]
[00] [00] [00] [00] [00] [00] [00] [00] [00] [00] [00] [00]
[00] [00] [00] [00] [00] [00] [00] [00] [00] [00] [00] [00]
[00] [00] [00] [00] [00] [00] [00] [00] [00] [00] [00] [00]
[00] [00] [00] [00] [00] [00] [00] [00] [00] [00] [00] [00]
[00] [00] [00] [00] [00] [00] [00] [00] [00] [00] [00] [00]
[00] [00] [00] [00] [00] [00] [00] [00] [00] [00] [00] [00]
[00] [00] [00] [00] [00] [00] [00] [00] [00] [00] [00] [00]
[00] [00] [00] [00] [00] [00] [00] [00] [00] [00] [00] [00]
[00] [00] [00] [00] [00] [00] [00] [00] [00] [00] [00] [00]
[00] [00] [00] [00] [00] [00] [00] [00] [00] [00] [00] [00]
[00] [00] [00] [00] [00] [00] [00] [00] [00] [00] [00] [00]
[00] [00] [00] [00] [00] [00] [00] [00] [00] [00] [00] [00]
[00] [00] [00] [00] [00] [00] [00] [00] [00] [00] [00] [00]
[00] [00] [00] [00] [00] [00] [00] [00] [00] [00] [00] [00]
[00] [00] [00] [00] [00] [00] [00] [00] [00] [00] [00] [00]
[00] [00] [00] [00] [00] [00] [00] [00] [00] [00] [00] [00]
[00] [00] [00] [00] [00] [00] [00] [00] [00] [00] [00] [00]
[00] [00] [00] [00] [00] [00] [00] [00] [00] [00] [00] [00]
[00] [00] [00] [00] [00] [00] [00] [00] [00] [00] [00] [00]
Mac:
[00] [00] [00] [00] [00] [00] [00] [00] [00] [00] [00] [00] [00] [00] [00] [00]
[00] [00] [00] [00] [00] [00] [00] [00] [00] [00] [00] [00] [00] [00] [00] [00]
[00] [00] [00] [00] [00] [00] [00] [00] [00] [00] [00] [00] [00] [00] [00] [00]
[00] [00] [00] [00] [00] [00] [00] [00] [00] [00] [00] [00] [00] [00] [00] [00]
[00] [00] [00] [00] [00] [00] [00] [00] [00] [00] [00] [00] [00] [00] [00] [00]
[00] [00] [00] [00] [00] [00] [00] [00] [00] [00] [00] [00] [00] [00] [00] [00]
[00] [00] [00] [00] [00] [00] [00] [00] [00] [00] [00] [00] [00] [00] [00] [00]
[00] [00] [00] [00] [00] [00] [00] [00] [00] [00] [00] [00] [00] [00] [00] [00]
[00] [00] [00] [00] [00] [00] [00] [00] [00] [00] [00] [00] [00] [00] [00] [00]
[00] [00] [00] [00] [00] [00] [00] [00] [00] [00] [00] [00] [00] [00] [00] [00]
[00] [00] [00] [00] [00] [00] [00] [00] [00] [00] [00] [00] [00] [00] [00] [00]
[00] [00] [00] [00] [00] [00] [00] [00] [00] [00] [00] [00] [00] [00] [00] [00]
[00] [00] [00] [00] [00] [00] [00] [00] [00] [00] [00] [00] [00] [00] [00] [00]
[00] [00] [00] [00] [00] [00] [00] [00] [00] [00] [00] [00] [00] [00] [00] [00]
[00] [00] [00] [00] [00] [00] [00] [00] [00] [00] [00] [00] [00] [00] [00] [00]
[00] [00] [00] [00] [00] [00] [00] [00] [00] [00] [00] [00] [00] [00] [00] [00]
[00] [00] [00] [00] [00] [00] [00] [00] [00] [00] [00] [00] [00] [00] [00] [00]
[00] [00] [00] [00] [00] [00] [00] [00] [00] [00] [00] [00] [00] [00] [00] [00]
[00] [00] [00] [00] [00] [00] [00] [00] [00] [00] [00] [00] [00] [00] [00] [00]
[00] [00] [00] [00] [00] [00] [00] [00] [00] [00] [00] [00] [00] [00] [00] [00]
[00] [00] [00] [00] [00] [00] [00] [00] [00] [00] [00] [00] [00] [00] [00] [00]
[00] [00] [00] [00] [00] [00] [00] [00] [00] [00] [00] [00] [00] [00] [00] [00]
[00] [00] [00] [00] [00] [00] [00] [00] [00] [00] [00] [00] [00] [00] [00] [00]
[00] [00] [00] [00] [00] [00] [00] [00] [00] [00] [00] [00] [00] [00] [00] [00]
[00] [00] [00] [00] [00] [00] [00] [00] [00] [00] [00] [00] [00] [00] [00] [00]
[00] [00] [00] [00] [00] [00] [00] [00] [00] [00] [00] [00] [00] [00] [00] [00]
[00] [00] [00] [00] [00] [00] [00] [00] [00] [00] [00] [00] [00] [00] [00] [00]
[00] [00] [00] [00] [00] [00] [00] [00] [00] [00] [00] [00] [00] [00] [00] [00]
[00] [00] [00] [00] [00] [00] [00] [00] [00] [00] [00] [00] [00] [00] [00] [00]
[00] [00] [00] [00] [00] [00] [00] [00] [00] [00] [00] [00] [00] [00] [00] [00]
[00] [00] [00] [00] [00] [00] [00] [00] [00] [00] [00] [00] [00] [00] [00] [00]
[00] [00] [00] [00] [00] [00] [00] [00] [00] [00] [00] [00] [00] [00] [00] [00]
IvComm:
[00] [00] [00] [00] [00] [00] [00] [00] [00] [00] [00] [00]
MacComm:
[00] [00] [00] [00] [00] [00] [00] [00] [00] [00] [00] [00] [00] [00] [00] [00]
[SGX-KEYBLOB-PEI-REST] KeyBlob for socket no 3
Present: FALSE
TimeStamp: 0-0-0, 0:0:0:0, Pad1: 0, Pad2: 0, TimeZone: 0, Daylight: 0
KeyBlob:
Header:
SGX UUID:
[00] [00] [00] [00] [00] [00] [00] [00] [00] [00] [00] [00] [00] [00] [00] [00]
CpuSvn:
[00]
Security Properties:
[00] [00] [00] [00]
Prid:
[00] [00] [00] [00] [00] [00] [00] [00] [00] [00] [00] [00] [00] [00] [00] [00]
PlatformEpoch:
[00] [00] [00] [00] [00] [00] [00] [00] [00] [00] [00] [00] [00] [00] [00] [00] [00] [00] [00] [00] [00] [00] [00] [00] [00] [00] [00] [00] [00] [00] [00] [00]
RsakHash:
[00] [00] [00] [00] [00] [00] [00] [00] [00] [00] [00] [00] [00] [00] [00] [00] [00] [00] [00] [00] [00] [00] [00] [00] [00] [00] [00] [00] [00] [00] [00] [00]
RsakHash:
[00] [00] [00] [00] [00] [00] [00] [00] [00] [00] [00] [00] [00] [00] [00] [00] [00] [00] [00] [00] [00] [00] [00] [00] [00] [00] [00] [00] [00] [00] [00] [00]
Pfk1:
[00] [00] [00] [00] [00] [00] [00] [00] [00] [00] [00] [00] [00] [00] [00] [00]
PprResetKey:
[00] [00] [00] [00]
[00] [00] [00] [00]
[00] [00] [00] [00]
[00] [00] [00] [00]
[00] [00] [00] [00]
[00] [00] [00] [00]
[00] [00] [00] [00]
[00] [00] [00] [00]
[00] [00] [00] [00]
[00] [00] [00] [00]
[00] [00] [00] [00]
[00] [00] [00] [00]
[00] [00] [00] [00]
[00] [00] [00] [00]
[00] [00] [00] [00]
[00] [00] [00] [00]
[00] [00] [00] [00]
[00] [00] [00] [00]
[00] [00] [00] [00]
[00] [00] [00] [00]
[00] [00] [00] [00]
[00] [00] [00] [00]
[00] [00] [00] [00]
[00] [00] [00] [00]
[00] [00] [00] [00]
[00] [00] [00] [00]
[00] [00] [00] [00]
[00] [00] [00] [00]
[00] [00] [00] [00]
[00] [00] [00] [00]
[00] [00] [00] [00]
[00] [00] [00] [00]
LastUsedSvn:
[00]
Reserved2:
[00] [00] [00] [00] [00] [00] [00] [00] [00] [00] [00] [00] [00] [00] [00]
TargetPrid:
[00] [00] [00] [00] [00] [00] [00] [00] [00] [00] [00] [00] [00] [00] [00] [00]
PrimaryComms:
[00] [00] [00] [00] [00] [00] [00] [00] [00] [00] [00] [00] [00] [00] [00] [00]
Iv:
[00] [00] [00] [00] [00] [00] [00] [00] [00] [00] [00] [00]
[00] [00] [00] [00] [00] [00] [00] [00] [00] [00] [00] [00]
[00] [00] [00] [00] [00] [00] [00] [00] [00] [00] [00] [00]
[00] [00] [00] [00] [00] [00] [00] [00] [00] [00] [00] [00]
[00] [00] [00] [00] [00] [00] [00] [00] [00] [00] [00] [00]
[00] [00] [00] [00] [00] [00] [00] [00] [00] [00] [00] [00]
[00] [00] [00] [00] [00] [00] [00] [00] [00] [00] [00] [00]
[00] [00] [00] [00] [00] [00] [00] [00] [00] [00] [00] [00]
[00] [00] [00] [00] [00] [00] [00] [00] [00] [00] [00] [00]
[00] [00] [00] [00] [00] [00] [00] [00] [00] [00] [00] [00]
[00] [00] [00] [00] [00] [00] [00] [00] [00] [00] [00] [00]
[00] [00] [00] [00] [00] [00] [00] [00] [00] [00] [00] [00]
[00] [00] [00] [00] [00] [00] [00] [00] [00] [00] [00] [00]
[00] [00] [00] [00] [00] [00] [00] [00] [00] [00] [00] [00]
[00] [00] [00] [00] [00] [00] [00] [00] [00] [00] [00] [00]
[00] [00] [00] [00] [00] [00] [00] [00] [00] [00] [00] [00]
[00] [00] [00] [00] [00] [00] [00] [00] [00] [00] [00] [00]
[00] [00] [00] [00] [00] [00] [00] [00] [00] [00] [00] [00]
[00] [00] [00] [00] [00] [00] [00] [00] [00] [00] [00] [00]
[00] [00] [00] [00] [00] [00] [00] [00] [00] [00] [00] [00]
[00] [00] [00] [00] [00] [00] [00] [00] [00] [00] [00] [00]
[00] [00] [00] [00] [00] [00] [00] [00] [00] [00] [00] [00]
[00] [00] [00] [00] [00] [00] [00] [00] [00] [00] [00] [00]
[00] [00] [00] [00] [00] [00] [00] [00] [00] [00] [00] [00]
[00] [00] [00] [00] [00] [00] [00] [00] [00] [00] [00] [00]
[00] [00] [00] [00] [00] [00] [00] [00] [00] [00] [00] [00]
[00] [00] [00] [00] [00] [00] [00] [00] [00] [00] [00] [00]
[00] [00] [00] [00] [00] [00] [00] [00] [00] [00] [00] [00]
[00] [00] [00] [00] [00] [00] [00] [00] [00] [00] [00] [00]
[00] [00] [00] [00] [00] [00] [00] [00] [00] [00] [00] [00]
[00] [00] [00] [00] [00] [00] [00] [00] [00] [00] [00] [00]
[00] [00] [00] [00] [00] [00] [00] [00] [00] [00] [00] [00]
Mac:
[00] [00] [00] [00] [00] [00] [00] [00] [00] [00] [00] [00] [00] [00] [00] [00]
[00] [00] [00] [00] [00] [00] [00] [00] [00] [00] [00] [00] [00] [00] [00] [00]
[00] [00] [00] [00] [00] [00] [00] [00] [00] [00] [00] [00] [00] [00] [00] [00]
[00] [00] [00] [00] [00] [00] [00] [00] [00] [00] [00] [00] [00] [00] [00] [00]
[00] [00] [00] [00] [00] [00] [00] [00] [00] [00] [00] [00] [00] [00] [00] [00]
[00] [00] [00] [00] [00] [00] [00] [00] [00] [00] [00] [00] [00] [00] [00] [00]
[00] [00] [00] [00] [00] [00] [00] [00] [00] [00] [00] [00] [00] [00] [00] [00]
[00] [00] [00] [00] [00] [00] [00] [00] [00] [00] [00] [00] [00] [00] [00] [00]
[00] [00] [00] [00] [00] [00] [00] [00] [00] [00] [00] [00] [00] [00] [00] [00]
[00] [00] [00] [00] [00] [00] [00] [00] [00] [00] [00] [00] [00] [00] [00] [00]
[00] [00] [00] [00] [00] [00] [00] [00] [00] [00] [00] [00] [00] [00] [00] [00]
[00] [00] [00] [00] [00] [00] [00] [00] [00] [00] [00] [00] [00] [00] [00] [00]
[00] [00] [00] [00] [00] [00] [00] [00] [00] [00] [00] [00] [00] [00] [00] [00]
[00] [00] [00] [00] [00] [00] [00] [00] [00] [00] [00] [00] [00] [00] [00] [00]
[00] [00] [00] [00] [00] [00] [00] [00] [00] [00] [00] [00] [00] [00] [00] [00]
[00] [00] [00] [00] [00] [00] [00] [00] [00] [00] [00] [00] [00] [00] [00] [00]
[00] [00] [00] [00] [00] [00] [00] [00] [00] [00] [00] [00] [00] [00] [00] [00]
[00] [00] [00] [00] [00] [00] [00] [00] [00] [00] [00] [00] [00] [00] [00] [00]
[00] [00] [00] [00] [00] [00] [00] [00] [00] [00] [00] [00] [00] [00] [00] [00]
[00] [00] [00] [00] [00] [00] [00] [00] [00] [00] [00] [00] [00] [00] [00] [00]
[00] [00] [00] [00] [00] [00] [00] [00] [00] [00] [00] [00] [00] [00] [00] [00]
[00] [00] [00] [00] [00] [00] [00] [00] [00] [00] [00] [00] [00] [00] [00] [00]
[00] [00] [00] [00] [00] [00] [00] [00] [00] [00] [00] [00] [00] [00] [00] [00]
[00] [00] [00] [00] [00] [00] [00] [00] [00] [00] [00] [00] [00] [00] [00] [00]
[00] [00] [00] [00] [00] [00] [00] [00] [00] [00] [00] [00] [00] [00] [00] [00]
[00] [00] [00] [00] [00] [00] [00] [00] [00] [00] [00] [00] [00] [00] [00] [00]
[00] [00] [00] [00] [00] [00] [00] [00] [00] [00] [00] [00] [00] [00] [00] [00]
[00] [00] [00] [00] [00] [00] [00] [00] [00] [00] [00] [00] [00] [00] [00] [00]
[00] [00] [00] [00] [00] [00] [00] [00] [00] [00] [00] [00] [00] [00] [00] [00]
[00] [00] [00] [00] [00] [00] [00] [00] [00] [00] [00] [00] [00] [00] [00] [00]
[00] [00] [00] [00] [00] [00] [00] [00] [00] [00] [00] [00] [00] [00] [00] [00]
[00] [00] [00] [00] [00] [00] [00] [00] [00] [00] [00] [00] [00] [00] [00] [00]
IvComm:
[00] [00] [00] [00] [00] [00] [00] [00] [00] [00] [00] [00]
MacComm:
[00] [00] [00] [00] [00] [00] [00] [00] [00] [00] [00] [00] [00] [00] [00] [00]
[SGX-KEYBLOB-PEI-REST] KeyBlob for socket no 4
Present: FALSE
TimeStamp: 0-0-0, 0:0:0:0, Pad1: 0, Pad2: 0, TimeZone: 0, Daylight: 0
KeyBlob:
Header:
SGX UUID:
[00] [00] [00] [00] [00] [00] [00] [00] [00] [00] [00] [00] [00] [00] [00] [00]
CpuSvn:
[00]
Security Properties:
[00] [00] [00] [00]
Prid:
[00] [00] [00] [00] [00] [00] [00] [00] [00] [00] [00] [00] [00] [00] [00] [00]
PlatformEpoch:
[00] [00] [00] [00] [00] [00] [00] [00] [00] [00] [00] [00] [00] [00] [00] [00] [00] [00] [00] [00] [00] [00] [00] [00] [00] [00] [00] [00] [00] [00] [00] [00]
RsakHash:
[00] [00] [00] [00] [00] [00] [00] [00] [00] [00] [00] [00] [00] [00] [00] [00] [00] [00] [00] [00] [00] [00] [00] [00] [00] [00] [00] [00] [00] [00] [00] [00]
RsakHash:
[00] [00] [00] [00] [00] [00] [00] [00] [00] [00] [00] [00] [00] [00] [00] [00] [00] [00] [00] [00] [00] [00] [00] [00] [00] [00] [00] [00] [00] [00] [00] [00]
Pfk1:
[00] [00] [00] [00] [00] [00] [00] [00] [00] [00] [00] [00] [00] [00] [00] [00]
PprResetKey:
[00] [00] [00] [00]
[00] [00] [00] [00]
[00] [00] [00] [00]
[00] [00] [00] [00]
[00] [00] [00] [00]
[00] [00] [00] [00]
[00] [00] [00] [00]
[00] [00] [00] [00]
[00] [00] [00] [00]
[00] [00] [00] [00]
[00] [00] [00] [00]
[00] [00] [00] [00]
[00] [00] [00] [00]
[00] [00] [00] [00]
[00] [00] [00] [00]
[00] [00] [00] [00]
[00] [00] [00] [00]
[00] [00] [00] [00]
[00] [00] [00] [00]
[00] [00] [00] [00]
[00] [00] [00] [00]
[00] [00] [00] [00]
[00] [00] [00] [00]
[00] [00] [00] [00]
[00] [00] [00] [00]
[00] [00] [00] [00]
[00] [00] [00] [00]
[00] [00] [00] [00]
[00] [00] [00] [00]
[00] [00] [00] [00]
[00] [00] [00] [00]
[00] [00] [00] [00]
LastUsedSvn:
[00]
Reserved2:
[00] [00] [00] [00] [00] [00] [00] [00] [00] [00] [00] [00] [00] [00] [00]
TargetPrid:
[00] [00] [00] [00] [00] [00] [00] [00] [00] [00] [00] [00] [00] [00] [00] [00]
PrimaryComms:
[00] [00] [00] [00] [00] [00] [00] [00] [00] [00] [00] [00] [00] [00] [00] [00]
Iv:
[00] [00] [00] [00] [00] [00] [00] [00] [00] [00] [00] [00]
[00] [00] [00] [00] [00] [00] [00] [00] [00] [00] [00] [00]
[00] [00] [00] [00] [00] [00] [00] [00] [00] [00] [00] [00]
[00] [00] [00] [00] [00] [00] [00] [00] [00] [00] [00] [00]
[00] [00] [00] [00] [00] [00] [00] [00] [00] [00] [00] [00]
[00] [00] [00] [00] [00] [00] [00] [00] [00] [00] [00] [00]
[00] [00] [00] [00] [00] [00] [00] [00] [00] [00] [00] [00]
[00] [00] [00] [00] [00] [00] [00] [00] [00] [00] [00] [00]
[00] [00] [00] [00] [00] [00] [00] [00] [00] [00] [00] [00]
[00] [00] [00] [00] [00] [00] [00] [00] [00] [00] [00] [00]
[00] [00] [00] [00] [00] [00] [00] [00] [00] [00] [00] [00]
[00] [00] [00] [00] [00] [00] [00] [00] [00] [00] [00] [00]
[00] [00] [00] [00] [00] [00] [00] [00] [00] [00] [00] [00]
[00] [00] [00] [00] [00] [00] [00] [00] [00] [00] [00] [00]
[00] [00] [00] [00] [00] [00] [00] [00] [00] [00] [00] [00]
[00] [00] [00] [00] [00] [00] [00] [00] [00] [00] [00] [00]
[00] [00] [00] [00] [00] [00] [00] [00] [00] [00] [00] [00]
[00] [00] [00] [00] [00] [00] [00] [00] [00] [00] [00] [00]
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[00] [00] [00] [00] [00] [00] [00] [00] [00] [00] [00] [00]
[00] [00] [00] [00] [00] [00] [00] [00] [00] [00] [00] [00]
[00] [00] [00] [00] [00] [00] [00] [00] [00] [00] [00] [00]
[00] [00] [00] [00] [00] [00] [00] [00] [00] [00] [00] [00]
[00] [00] [00] [00] [00] [00] [00] [00] [00] [00] [00] [00]
[00] [00] [00] [00] [00] [00] [00] [00] [00] [00] [00] [00]
[00] [00] [00] [00] [00] [00] [00] [00] [00] [00] [00] [00]
[00] [00] [00] [00] [00] [00] [00] [00] [00] [00] [00] [00]
[00] [00] [00] [00] [00] [00] [00] [00] [00] [00] [00] [00]
[00] [00] [00] [00] [00] [00] [00] [00] [00] [00] [00] [00]
[00] [00] [00] [00] [00] [00] [00] [00] [00] [00] [00] [00]
[00] [00] [00] [00] [00] [00] [00] [00] [00] [00] [00] [00]
[00] [00] [00] [00] [00] [00] [00] [00] [00] [00] [00] [00]
Mac:
[00] [00] [00] [00] [00] [00] [00] [00] [00] [00] [00] [00] [00] [00] [00] [00]
[00] [00] [00] [00] [00] [00] [00] [00] [00] [00] [00] [00] [00] [00] [00] [00]
[00] [00] [00] [00] [00] [00] [00] [00] [00] [00] [00] [00] [00] [00] [00] [00]
[00] [00] [00] [00] [00] [00] [00] [00] [00] [00] [00] [00] [00] [00] [00] [00]
[00] [00] [00] [00] [00] [00] [00] [00] [00] [00] [00] [00] [00] [00] [00] [00]
[00] [00] [00] [00] [00] [00] [00] [00] [00] [00] [00] [00] [00] [00] [00] [00]
[00] [00] [00] [00] [00] [00] [00] [00] [00] [00] [00] [00] [00] [00] [00] [00]
[00] [00] [00] [00] [00] [00] [00] [00] [00] [00] [00] [00] [00] [00] [00] [00]
[00] [00] [00] [00] [00] [00] [00] [00] [00] [00] [00] [00] [00] [00] [00] [00]
[00] [00] [00] [00] [00] [00] [00] [00] [00] [00] [00] [00] [00] [00] [00] [00]
[00] [00] [00] [00] [00] [00] [00] [00] [00] [00] [00] [00] [00] [00] [00] [00]
[00] [00] [00] [00] [00] [00] [00] [00] [00] [00] [00] [00] [00] [00] [00] [00]
[00] [00] [00] [00] [00] [00] [00] [00] [00] [00] [00] [00] [00] [00] [00] [00]
[00] [00] [00] [00] [00] [00] [00] [00] [00] [00] [00] [00] [00] [00] [00] [00]
[00] [00] [00] [00] [00] [00] [00] [00] [00] [00] [00] [00] [00] [00] [00] [00]
[00] [00] [00] [00] [00] [00] [00] [00] [00] [00] [00] [00] [00] [00] [00] [00]
[00] [00] [00] [00] [00] [00] [00] [00] [00] [00] [00] [00] [00] [00] [00] [00]
[00] [00] [00] [00] [00] [00] [00] [00] [00] [00] [00] [00] [00] [00] [00] [00]
[00] [00] [00] [00] [00] [00] [00] [00] [00] [00] [00] [00] [00] [00] [00] [00]
[00] [00] [00] [00] [00] [00] [00] [00] [00] [00] [00] [00] [00] [00] [00] [00]
[00] [00] [00] [00] [00] [00] [00] [00] [00] [00] [00] [00] [00] [00] [00] [00]
[00] [00] [00] [00] [00] [00] [00] [00] [00] [00] [00] [00] [00] [00] [00] [00]
[00] [00] [00] [00] [00] [00] [00] [00] [00] [00] [00] [00] [00] [00] [00] [00]
[00] [00] [00] [00] [00] [00] [00] [00] [00] [00] [00] [00] [00] [00] [00] [00]
[00] [00] [00] [00] [00] [00] [00] [00] [00] [00] [00] [00] [00] [00] [00] [00]
[00] [00] [00] [00] [00] [00] [00] [00] [00] [00] [00] [00] [00] [00] [00] [00]
[00] [00] [00] [00] [00] [00] [00] [00] [00] [00] [00] [00] [00] [00] [00] [00]
[00] [00] [00] [00] [00] [00] [00] [00] [00] [00] [00] [00] [00] [00] [00] [00]
[00] [00] [00] [00] [00] [00] [00] [00] [00] [00] [00] [00] [00] [00] [00] [00]
[00] [00] [00] [00] [00] [00] [00] [00] [00] [00] [00] [00] [00] [00] [00] [00]
[00] [00] [00] [00] [00] [00] [00] [00] [00] [00] [00] [00] [00] [00] [00] [00]
[00] [00] [00] [00] [00] [00] [00] [00] [00] [00] [00] [00] [00] [00] [00] [00]
IvComm:
[00] [00] [00] [00] [00] [00] [00] [00] [00] [00] [00] [00]
MacComm:
[00] [00] [00] [00] [00] [00] [00] [00] [00] [00] [00] [00] [00] [00] [00] [00]
[SGX-KEYBLOB-PEI-REST] KeyBlob for socket no 5
Present: FALSE
TimeStamp: 0-0-0, 0:0:0:0, Pad1: 0, Pad2: 0, TimeZone: 0, Daylight: 0
KeyBlob:
Header:
SGX UUID:
[00] [00] [00] [00] [00] [00] [00] [00] [00] [00] [00] [00] [00] [00] [00] [00]
CpuSvn:
[00]
Security Properties:
[00] [00] [00] [00]
Prid:
[00] [00] [00] [00] [00] [00] [00] [00] [00] [00] [00] [00] [00] [00] [00] [00]
PlatformEpoch:
[00] [00] [00] [00] [00] [00] [00] [00] [00] [00] [00] [00] [00] [00] [00] [00] [00] [00] [00] [00] [00] [00] [00] [00] [00] [00] [00] [00] [00] [00] [00] [00]
RsakHash:
[00] [00] [00] [00] [00] [00] [00] [00] [00] [00] [00] [00] [00] [00] [00] [00] [00] [00] [00] [00] [00] [00] [00] [00] [00] [00] [00] [00] [00] [00] [00] [00]
RsakHash:
[00] [00] [00] [00] [00] [00] [00] [00] [00] [00] [00] [00] [00] [00] [00] [00] [00] [00] [00] [00] [00] [00] [00] [00] [00] [00] [00] [00] [00] [00] [00] [00]
Pfk1:
[00] [00] [00] [00] [00] [00] [00] [00] [00] [00] [00] [00] [00] [00] [00] [00]
PprResetKey:
[00] [00] [00] [00]
[00] [00] [00] [00]
[00] [00] [00] [00]
[00] [00] [00] [00]
[00] [00] [00] [00]
[00] [00] [00] [00]
[00] [00] [00] [00]
[00] [00] [00] [00]
[00] [00] [00] [00]
[00] [00] [00] [00]
[00] [00] [00] [00]
[00] [00] [00] [00]
[00] [00] [00] [00]
[00] [00] [00] [00]
[00] [00] [00] [00]
[00] [00] [00] [00]
[00] [00] [00] [00]
[00] [00] [00] [00]
[00] [00] [00] [00]
[00] [00] [00] [00]
[00] [00] [00] [00]
[00] [00] [00] [00]
[00] [00] [00] [00]
[00] [00] [00] [00]
[00] [00] [00] [00]
[00] [00] [00] [00]
[00] [00] [00] [00]
[00] [00] [00] [00]
[00] [00] [00] [00]
[00] [00] [00] [00]
[00] [00] [00] [00]
[00] [00] [00] [00]
LastUsedSvn:
[00]
Reserved2:
[00] [00] [00] [00] [00] [00] [00] [00] [00] [00] [00] [00] [00] [00] [00]
TargetPrid:
[00] [00] [00] [00] [00] [00] [00] [00] [00] [00] [00] [00] [00] [00] [00] [00]
PrimaryComms:
[00] [00] [00] [00] [00] [00] [00] [00] [00] [00] [00] [00] [00] [00] [00] [00]
Iv:
[00] [00] [00] [00] [00] [00] [00] [00] [00] [00] [00] [00]
[00] [00] [00] [00] [00] [00] [00] [00] [00] [00] [00] [00]
[00] [00] [00] [00] [00] [00] [00] [00] [00] [00] [00] [00]
[00] [00] [00] [00] [00] [00] [00] [00] [00] [00] [00] [00]
[00] [00] [00] [00] [00] [00] [00] [00] [00] [00] [00] [00]
[00] [00] [00] [00] [00] [00] [00] [00] [00] [00] [00] [00]
[00] [00] [00] [00] [00] [00] [00] [00] [00] [00] [00] [00]
[00] [00] [00] [00] [00] [00] [00] [00] [00] [00] [00] [00]
[00] [00] [00] [00] [00] [00] [00] [00] [00] [00] [00] [00]
[00] [00] [00] [00] [00] [00] [00] [00] [00] [00] [00] [00]
[00] [00] [00] [00] [00] [00] [00] [00] [00] [00] [00] [00]
[00] [00] [00] [00] [00] [00] [00] [00] [00] [00] [00] [00]
[00] [00] [00] [00] [00] [00] [00] [00] [00] [00] [00] [00]
[00] [00] [00] [00] [00] [00] [00] [00] [00] [00] [00] [00]
[00] [00] [00] [00] [00] [00] [00] [00] [00] [00] [00] [00]
[00] [00] [00] [00] [00] [00] [00] [00] [00] [00] [00] [00]
[00] [00] [00] [00] [00] [00] [00] [00] [00] [00] [00] [00]
[00] [00] [00] [00] [00] [00] [00] [00] [00] [00] [00] [00]
[00] [00] [00] [00] [00] [00] [00] [00] [00] [00] [00] [00]
[00] [00] [00] [00] [00] [00] [00] [00] [00] [00] [00] [00]
[00] [00] [00] [00] [00] [00] [00] [00] [00] [00] [00] [00]
[00] [00] [00] [00] [00] [00] [00] [00] [00] [00] [00] [00]
[00] [00] [00] [00] [00] [00] [00] [00] [00] [00] [00] [00]
[00] [00] [00] [00] [00] [00] [00] [00] [00] [00] [00] [00]
[00] [00] [00] [00] [00] [00] [00] [00] [00] [00] [00] [00]
[00] [00] [00] [00] [00] [00] [00] [00] [00] [00] [00] [00]
[00] [00] [00] [00] [00] [00] [00] [00] [00] [00] [00] [00]
[00] [00] [00] [00] [00] [00] [00] [00] [00] [00] [00] [00]
[00] [00] [00] [00] [00] [00] [00] [00] [00] [00] [00] [00]
[00] [00] [00] [00] [00] [00] [00] [00] [00] [00] [00] [00]
[00] [00] [00] [00] [00] [00] [00] [00] [00] [00] [00] [00]
[00] [00] [00] [00] [00] [00] [00] [00] [00] [00] [00] [00]
Mac:
[00] [00] [00] [00] [00] [00] [00] [00] [00] [00] [00] [00] [00] [00] [00] [00]
[00] [00] [00] [00] [00] [00] [00] [00] [00] [00] [00] [00] [00] [00] [00] [00]
[00] [00] [00] [00] [00] [00] [00] [00] [00] [00] [00] [00] [00] [00] [00] [00]
[00] [00] [00] [00] [00] [00] [00] [00] [00] [00] [00] [00] [00] [00] [00] [00]
[00] [00] [00] [00] [00] [00] [00] [00] [00] [00] [00] [00] [00] [00] [00] [00]
[00] [00] [00] [00] [00] [00] [00] [00] [00] [00] [00] [00] [00] [00] [00] [00]
[00] [00] [00] [00] [00] [00] [00] [00] [00] [00] [00] [00] [00] [00] [00] [00]
[00] [00] [00] [00] [00] [00] [00] [00] [00] [00] [00] [00] [00] [00] [00] [00]
[00] [00] [00] [00] [00] [00] [00] [00] [00] [00] [00] [00] [00] [00] [00] [00]
[00] [00] [00] [00] [00] [00] [00] [00] [00] [00] [00] [00] [00] [00] [00] [00]
[00] [00] [00] [00] [00] [00] [00] [00] [00] [00] [00] [00] [00] [00] [00] [00]
[00] [00] [00] [00] [00] [00] [00] [00] [00] [00] [00] [00] [00] [00] [00] [00]
[00] [00] [00] [00] [00] [00] [00] [00] [00] [00] [00] [00] [00] [00] [00] [00]
[00] [00] [00] [00] [00] [00] [00] [00] [00] [00] [00] [00] [00] [00] [00] [00]
[00] [00] [00] [00] [00] [00] [00] [00] [00] [00] [00] [00] [00] [00] [00] [00]
[00] [00] [00] [00] [00] [00] [00] [00] [00] [00] [00] [00] [00] [00] [00] [00]
[00] [00] [00] [00] [00] [00] [00] [00] [00] [00] [00] [00] [00] [00] [00] [00]
[00] [00] [00] [00] [00] [00] [00] [00] [00] [00] [00] [00] [00] [00] [00] [00]
[00] [00] [00] [00] [00] [00] [00] [00] [00] [00] [00] [00] [00] [00] [00] [00]
[00] [00] [00] [00] [00] [00] [00] [00] [00] [00] [00] [00] [00] [00] [00] [00]
[00] [00] [00] [00] [00] [00] [00] [00] [00] [00] [00] [00] [00] [00] [00] [00]
[00] [00] [00] [00] [00] [00] [00] [00] [00] [00] [00] [00] [00] [00] [00] [00]
[00] [00] [00] [00] [00] [00] [00] [00] [00] [00] [00] [00] [00] [00] [00] [00]
[00] [00] [00] [00] [00] [00] [00] [00] [00] [00] [00] [00] [00] [00] [00] [00]
[00] [00] [00] [00] [00] [00] [00] [00] [00] [00] [00] [00] [00] [00] [00] [00]
[00] [00] [00] [00] [00] [00] [00] [00] [00] [00] [00] [00] [00] [00] [00] [00]
[00] [00] [00] [00] [00] [00] [00] [00] [00] [00] [00] [00] [00] [00] [00] [00]
[00] [00] [00] [00] [00] [00] [00] [00] [00] [00] [00] [00] [00] [00] [00] [00]
[00] [00] [00] [00] [00] [00] [00] [00] [00] [00] [00] [00] [00] [00] [00] [00]
[00] [00] [00] [00] [00] [00] [00] [00] [00] [00] [00] [00] [00] [00] [00] [00]
[00] [00] [00] [00] [00] [00] [00] [00] [00] [00] [00] [00] [00] [00] [00] [00]
[00] [00] [00] [00] [00] [00] [00] [00] [00] [00] [00] [00] [00] [00] [00] [00]
IvComm:
[00] [00] [00] [00] [00] [00] [00] [00] [00] [00] [00] [00]
MacComm:
[00] [00] [00] [00] [00] [00] [00] [00] [00] [00] [00] [00] [00] [00] [00] [00]
[SGX-KEYBLOB-PEI-REST] KeyBlob for socket no 6
Present: FALSE
TimeStamp: 0-0-0, 0:0:0:0, Pad1: 0, Pad2: 0, TimeZone: 0, Daylight: 0
KeyBlob:
Header:
SGX UUID:
[00] [00] [00] [00] [00] [00] [00] [00] [00] [00] [00] [00] [00] [00] [00] [00]
CpuSvn:
[00]
Security Properties:
[00] [00] [00] [00]
Prid:
[00] [00] [00] [00] [00] [00] [00] [00] [00] [00] [00] [00] [00] [00] [00] [00]
PlatformEpoch:
[00] [00] [00] [00] [00] [00] [00] [00] [00] [00] [00] [00] [00] [00] [00] [00] [00] [00] [00] [00] [00] [00] [00] [00] [00] [00] [00] [00] [00] [00] [00] [00]
RsakHash:
[00] [00] [00] [00] [00] [00] [00] [00] [00] [00] [00] [00] [00] [00] [00] [00] [00] [00] [00] [00] [00] [00] [00] [00] [00] [00] [00] [00] [00] [00] [00] [00]
RsakHash:
[00] [00] [00] [00] [00] [00] [00] [00] [00] [00] [00] [00] [00] [00] [00] [00] [00] [00] [00] [00] [00] [00] [00] [00] [00] [00] [00] [00] [00] [00] [00] [00]
Pfk1:
[00] [00] [00] [00] [00] [00] [00] [00] [00] [00] [00] [00] [00] [00] [00] [00]
PprResetKey:
[00] [00] [00] [00]
[00] [00] [00] [00]
[00] [00] [00] [00]
[00] [00] [00] [00]
[00] [00] [00] [00]
[00] [00] [00] [00]
[00] [00] [00] [00]
[00] [00] [00] [00]
[00] [00] [00] [00]
[00] [00] [00] [00]
[00] [00] [00] [00]
[00] [00] [00] [00]
[00] [00] [00] [00]
[00] [00] [00] [00]
[00] [00] [00] [00]
[00] [00] [00] [00]
[00] [00] [00] [00]
[00] [00] [00] [00]
[00] [00] [00] [00]
[00] [00] [00] [00]
[00] [00] [00] [00]
[00] [00] [00] [00]
[00] [00] [00] [00]
[00] [00] [00] [00]
[00] [00] [00] [00]
[00] [00] [00] [00]
[00] [00] [00] [00]
[00] [00] [00] [00]
[00] [00] [00] [00]
[00] [00] [00] [00]
[00] [00] [00] [00]
[00] [00] [00] [00]
LastUsedSvn:
[00]
Reserved2:
[00] [00] [00] [00] [00] [00] [00] [00] [00] [00] [00] [00] [00] [00] [00]
TargetPrid:
[00] [00] [00] [00] [00] [00] [00] [00] [00] [00] [00] [00] [00] [00] [00] [00]
PrimaryComms:
[00] [00] [00] [00] [00] [00] [00] [00] [00] [00] [00] [00] [00] [00] [00] [00]
Iv:
[00] [00] [00] [00] [00] [00] [00] [00] [00] [00] [00] [00]
[00] [00] [00] [00] [00] [00] [00] [00] [00] [00] [00] [00]
[00] [00] [00] [00] [00] [00] [00] [00] [00] [00] [00] [00]
[00] [00] [00] [00] [00] [00] [00] [00] [00] [00] [00] [00]
[00] [00] [00] [00] [00] [00] [00] [00] [00] [00] [00] [00]
[00] [00] [00] [00] [00] [00] [00] [00] [00] [00] [00] [00]
[00] [00] [00] [00] [00] [00] [00] [00] [00] [00] [00] [00]
[00] [00] [00] [00] [00] [00] [00] [00] [00] [00] [00] [00]
[00] [00] [00] [00] [00] [00] [00] [00] [00] [00] [00] [00]
[00] [00] [00] [00] [00] [00] [00] [00] [00] [00] [00] [00]
[00] [00] [00] [00] [00] [00] [00] [00] [00] [00] [00] [00]
[00] [00] [00] [00] [00] [00] [00] [00] [00] [00] [00] [00]
[00] [00] [00] [00] [00] [00] [00] [00] [00] [00] [00] [00]
[00] [00] [00] [00] [00] [00] [00] [00] [00] [00] [00] [00]
[00] [00] [00] [00] [00] [00] [00] [00] [00] [00] [00] [00]
[00] [00] [00] [00] [00] [00] [00] [00] [00] [00] [00] [00]
[00] [00] [00] [00] [00] [00] [00] [00] [00] [00] [00] [00]
[00] [00] [00] [00] [00] [00] [00] [00] [00] [00] [00] [00]
[00] [00] [00] [00] [00] [00] [00] [00] [00] [00] [00] [00]
[00] [00] [00] [00] [00] [00] [00] [00] [00] [00] [00] [00]
[00] [00] [00] [00] [00] [00] [00] [00] [00] [00] [00] [00]
[00] [00] [00] [00] [00] [00] [00] [00] [00] [00] [00] [00]
[00] [00] [00] [00] [00] [00] [00] [00] [00] [00] [00] [00]
[00] [00] [00] [00] [00] [00] [00] [00] [00] [00] [00] [00]
[00] [00] [00] [00] [00] [00] [00] [00] [00] [00] [00] [00]
[00] [00] [00] [00] [00] [00] [00] [00] [00] [00] [00] [00]
[00] [00] [00] [00] [00] [00] [00] [00] [00] [00] [00] [00]
[00] [00] [00] [00] [00] [00] [00] [00] [00] [00] [00] [00]
[00] [00] [00] [00] [00] [00] [00] [00] [00] [00] [00] [00]
[00] [00] [00] [00] [00] [00] [00] [00] [00] [00] [00] [00]
[00] [00] [00] [00] [00] [00] [00] [00] [00] [00] [00] [00]
[00] [00] [00] [00] [00] [00] [00] [00] [00] [00] [00] [00]
Mac:
[00] [00] [00] [00] [00] [00] [00] [00] [00] [00] [00] [00] [00] [00] [00] [00]
[00] [00] [00] [00] [00] [00] [00] [00] [00] [00] [00] [00] [00] [00] [00] [00]
[00] [00] [00] [00] [00] [00] [00] [00] [00] [00] [00] [00] [00] [00] [00] [00]
[00] [00] [00] [00] [00] [00] [00] [00] [00] [00] [00] [00] [00] [00] [00] [00]
[00] [00] [00] [00] [00] [00] [00] [00] [00] [00] [00] [00] [00] [00] [00] [00]
[00] [00] [00] [00] [00] [00] [00] [00] [00] [00] [00] [00] [00] [00] [00] [00]
[00] [00] [00] [00] [00] [00] [00] [00] [00] [00] [00] [00] [00] [00] [00] [00]
[00] [00] [00] [00] [00] [00] [00] [00] [00] [00] [00] [00] [00] [00] [00] [00]
[00] [00] [00] [00] [00] [00] [00] [00] [00] [00] [00] [00] [00] [00] [00] [00]
[00] [00] [00] [00] [00] [00] [00] [00] [00] [00] [00] [00] [00] [00] [00] [00]
[00] [00] [00] [00] [00] [00] [00] [00] [00] [00] [00] [00] [00] [00] [00] [00]
[00] [00] [00] [00] [00] [00] [00] [00] [00] [00] [00] [00] [00] [00] [00] [00]
[00] [00] [00] [00] [00] [00] [00] [00] [00] [00] [00] [00] [00] [00] [00] [00]
[00] [00] [00] [00] [00] [00] [00] [00] [00] [00] [00] [00] [00] [00] [00] [00]
[00] [00] [00] [00] [00] [00] [00] [00] [00] [00] [00] [00] [00] [00] [00] [00]
[00] [00] [00] [00] [00] [00] [00] [00] [00] [00] [00] [00] [00] [00] [00] [00]
[00] [00] [00] [00] [00] [00] [00] [00] [00] [00] [00] [00] [00] [00] [00] [00]
[00] [00] [00] [00] [00] [00] [00] [00] [00] [00] [00] [00] [00] [00] [00] [00]
[00] [00] [00] [00] [00] [00] [00] [00] [00] [00] [00] [00] [00] [00] [00] [00]
[00] [00] [00] [00] [00] [00] [00] [00] [00] [00] [00] [00] [00] [00] [00] [00]
[00] [00] [00] [00] [00] [00] [00] [00] [00] [00] [00] [00] [00] [00] [00] [00]
[00] [00] [00] [00] [00] [00] [00] [00] [00] [00] [00] [00] [00] [00] [00] [00]
[00] [00] [00] [00] [00] [00] [00] [00] [00] [00] [00] [00] [00] [00] [00] [00]
[00] [00] [00] [00] [00] [00] [00] [00] [00] [00] [00] [00] [00] [00] [00] [00]
[00] [00] [00] [00] [00] [00] [00] [00] [00] [00] [00] [00] [00] [00] [00] [00]
[00] [00] [00] [00] [00] [00] [00] [00] [00] [00] [00] [00] [00] [00] [00] [00]
[00] [00] [00] [00] [00] [00] [00] [00] [00] [00] [00] [00] [00] [00] [00] [00]
[00] [00] [00] [00] [00] [00] [00] [00] [00] [00] [00] [00] [00] [00] [00] [00]
[00] [00] [00] [00] [00] [00] [00] [00] [00] [00] [00] [00] [00] [00] [00] [00]
[00] [00] [00] [00] [00] [00] [00] [00] [00] [00] [00] [00] [00] [00] [00] [00]
[00] [00] [00] [00] [00] [00] [00] [00] [00] [00] [00] [00] [00] [00] [00] [00]
[00] [00] [00] [00] [00] [00] [00] [00] [00] [00] [00] [00] [00] [00] [00] [00]
IvComm:
[00] [00] [00] [00] [00] [00] [00] [00] [00] [00] [00] [00]
MacComm:
[00] [00] [00] [00] [00] [00] [00] [00] [00] [00] [00] [00] [00] [00] [00] [00]
[SGX-KEYBLOB-PEI-REST] KeyBlob for socket no 7
Present: FALSE
TimeStamp: 0-0-0, 0:0:0:0, Pad1: 0, Pad2: 0, TimeZone: 0, Daylight: 0
KeyBlob:
Header:
SGX UUID:
[00] [00] [00] [00] [00] [00] [00] [00] [00] [00] [00] [00] [00] [00] [00] [00]
CpuSvn:
[00]
Security Properties:
[00] [00] [00] [00]
Prid:
[00] [00] [00] [00] [00] [00] [00] [00] [00] [00] [00] [00] [00] [00] [00] [00]
PlatformEpoch:
[00] [00] [00] [00] [00] [00] [00] [00] [00] [00] [00] [00] [00] [00] [00] [00] [00] [00] [00] [00] [00] [00] [00] [00] [00] [00] [00] [00] [00] [00] [00] [00]
RsakHash:
[00] [00] [00] [00] [00] [00] [00] [00] [00] [00] [00] [00] [00] [00] [00] [00] [00] [00] [00] [00] [00] [00] [00] [00] [00] [00] [00] [00] [00] [00] [00] [00]
RsakHash:
[00] [00] [00] [00] [00] [00] [00] [00] [00] [00] [00] [00] [00] [00] [00] [00] [00] [00] [00] [00] [00] [00] [00] [00] [00] [00] [00] [00] [00] [00] [00] [00]
Pfk1:
[00] [00] [00] [00] [00] [00] [00] [00] [00] [00] [00] [00] [00] [00] [00] [00]
PprResetKey:
[00] [00] [00] [00]
[00] [00] [00] [00]
[00] [00] [00] [00]
[00] [00] [00] [00]
[00] [00] [00] [00]
[00] [00] [00] [00]
[00] [00] [00] [00]
[00] [00] [00] [00]
[00] [00] [00] [00]
[00] [00] [00] [00]
[00] [00] [00] [00]
[00] [00] [00] [00]
[00] [00] [00] [00]
[00] [00] [00] [00]
[00] [00] [00] [00]
[00] [00] [00] [00]
[00] [00] [00] [00]
[00] [00] [00] [00]
[00] [00] [00] [00]
[00] [00] [00] [00]
[00] [00] [00] [00]
[00] [00] [00] [00]
[00] [00] [00] [00]
[00] [00] [00] [00]
[00] [00] [00] [00]
[00] [00] [00] [00]
[00] [00] [00] [00]
[00] [00] [00] [00]
[00] [00] [00] [00]
[00] [00] [00] [00]
[00] [00] [00] [00]
[00] [00] [00] [00]
LastUsedSvn:
[00]
Reserved2:
[00] [00] [00] [00] [00] [00] [00] [00] [00] [00] [00] [00] [00] [00] [00]
TargetPrid:
[00] [00] [00] [00] [00] [00] [00] [00] [00] [00] [00] [00] [00] [00] [00] [00]
PrimaryComms:
[00] [00] [00] [00] [00] [00] [00] [00] [00] [00] [00] [00] [00] [00] [00] [00]
Iv:
[00] [00] [00] [00] [00] [00] [00] [00] [00] [00] [00] [00]
[00] [00] [00] [00] [00] [00] [00] [00] [00] [00] [00] [00]
[00] [00] [00] [00] [00] [00] [00] [00] [00] [00] [00] [00]
[00] [00] [00] [00] [00] [00] [00] [00] [00] [00] [00] [00]
[00] [00] [00] [00] [00] [00] [00] [00] [00] [00] [00] [00]
[00] [00] [00] [00] [00] [00] [00] [00] [00] [00] [00] [00]
[00] [00] [00] [00] [00] [00] [00] [00] [00] [00] [00] [00]
[00] [00] [00] [00] [00] [00] [00] [00] [00] [00] [00] [00]
[00] [00] [00] [00] [00] [00] [00] [00] [00] [00] [00] [00]
[00] [00] [00] [00] [00] [00] [00] [00] [00] [00] [00] [00]
[00] [00] [00] [00] [00] [00] [00] [00] [00] [00] [00] [00]
[00] [00] [00] [00] [00] [00] [00] [00] [00] [00] [00] [00]
[00] [00] [00] [00] [00] [00] [00] [00] [00] [00] [00] [00]
[00] [00] [00] [00] [00] [00] [00] [00] [00] [00] [00] [00]
[00] [00] [00] [00] [00] [00] [00] [00] [00] [00] [00] [00]
[00] [00] [00] [00] [00] [00] [00] [00] [00] [00] [00] [00]
[00] [00] [00] [00] [00] [00] [00] [00] [00] [00] [00] [00]
[00] [00] [00] [00] [00] [00] [00] [00] [00] [00] [00] [00]
[00] [00] [00] [00] [00] [00] [00] [00] [00] [00] [00] [00]
[00] [00] [00] [00] [00] [00] [00] [00] [00] [00] [00] [00]
[00] [00] [00] [00] [00] [00] [00] [00] [00] [00] [00] [00]
[00] [00] [00] [00] [00] [00] [00] [00] [00] [00] [00] [00]
[00] [00] [00] [00] [00] [00] [00] [00] [00] [00] [00] [00]
[00] [00] [00] [00] [00] [00] [00] [00] [00] [00] [00] [00]
[00] [00] [00] [00] [00] [00] [00] [00] [00] [00] [00] [00]
[00] [00] [00] [00] [00] [00] [00] [00] [00] [00] [00] [00]
[00] [00] [00] [00] [00] [00] [00] [00] [00] [00] [00] [00]
[00] [00] [00] [00] [00] [00] [00] [00] [00] [00] [00] [00]
[00] [00] [00] [00] [00] [00] [00] [00] [00] [00] [00] [00]
[00] [00] [00] [00] [00] [00] [00] [00] [00] [00] [00] [00]
[00] [00] [00] [00] [00] [00] [00] [00] [00] [00] [00] [00]
[00] [00] [00] [00] [00] [00] [00] [00] [00] [00] [00] [00]
Mac:
[00] [00] [00] [00] [00] [00] [00] [00] [00] [00] [00] [00] [00] [00] [00] [00]
[00] [00] [00] [00] [00] [00] [00] [00] [00] [00] [00] [00] [00] [00] [00] [00]
[00] [00] [00] [00] [00] [00] [00] [00] [00] [00] [00] [00] [00] [00] [00] [00]
[00] [00] [00] [00] [00] [00] [00] [00] [00] [00] [00] [00] [00] [00] [00] [00]
[00] [00] [00] [00] [00] [00] [00] [00] [00] [00] [00] [00] [00] [00] [00] [00]
[00] [00] [00] [00] [00] [00] [00] [00] [00] [00] [00] [00] [00] [00] [00] [00]
[00] [00] [00] [00] [00] [00] [00] [00] [00] [00] [00] [00] [00] [00] [00] [00]
[00] [00] [00] [00] [00] [00] [00] [00] [00] [00] [00] [00] [00] [00] [00] [00]
[00] [00] [00] [00] [00] [00] [00] [00] [00] [00] [00] [00] [00] [00] [00] [00]
[00] [00] [00] [00] [00] [00] [00] [00] [00] [00] [00] [00] [00] [00] [00] [00]
[00] [00] [00] [00] [00] [00] [00] [00] [00] [00] [00] [00] [00] [00] [00] [00]
[00] [00] [00] [00] [00] [00] [00] [00] [00] [00] [00] [00] [00] [00] [00] [00]
[00] [00] [00] [00] [00] [00] [00] [00] [00] [00] [00] [00] [00] [00] [00] [00]
[00] [00] [00] [00] [00] [00] [00] [00] [00] [00] [00] [00] [00] [00] [00] [00]
[00] [00] [00] [00] [00] [00] [00] [00] [00] [00] [00] [00] [00] [00] [00] [00]
[00] [00] [00] [00] [00] [00] [00] [00] [00] [00] [00] [00] [00] [00] [00] [00]
[00] [00] [00] [00] [00] [00] [00] [00] [00] [00] [00] [00] [00] [00] [00] [00]
[00] [00] [00] [00] [00] [00] [00] [00] [00] [00] [00] [00] [00] [00] [00] [00]
[00] [00] [00] [00] [00] [00] [00] [00] [00] [00] [00] [00] [00] [00] [00] [00]
[00] [00] [00] [00] [00] [00] [00] [00] [00] [00] [00] [00] [00] [00] [00] [00]
[00] [00] [00] [00] [00] [00] [00] [00] [00] [00] [00] [00] [00] [00] [00] [00]
[00] [00] [00] [00] [00] [00] [00] [00] [00] [00] [00] [00] [00] [00] [00] [00]
[00] [00] [00] [00] [00] [00] [00] [00] [00] [00] [00] [00] [00] [00] [00] [00]
[00] [00] [00] [00] [00] [00] [00] [00] [00] [00] [00] [00] [00] [00] [00] [00]
[00] [00] [00] [00] [00] [00] [00] [00] [00] [00] [00] [00] [00] [00] [00] [00]
[00] [00] [00] [00] [00] [00] [00] [00] [00] [00] [00] [00] [00] [00] [00] [00]
[00] [00] [00] [00] [00] [00] [00] [00] [00] [00] [00] [00] [00] [00] [00] [00]
[00] [00] [00] [00] [00] [00] [00] [00] [00] [00] [00] [00] [00] [00] [00] [00]
[00] [00] [00] [00] [00] [00] [00] [00] [00] [00] [00] [00] [00] [00] [00] [00]
[00] [00] [00] [00] [00] [00] [00] [00] [00] [00] [00] [00] [00] [00] [00] [00]
[00] [00] [00] [00] [00] [00] [00] [00] [00] [00] [00] [00] [00] [00] [00] [00]
[00] [00] [00] [00] [00] [00] [00] [00] [00] [00] [00] [00] [00] [00] [00] [00]
IvComm:
[00] [00] [00] [00] [00] [00] [00] [00] [00] [00] [00] [00]
MacComm:
[00] [00] [00] [00] [00] [00] [00] [00] [00] [00] [00] [00] [00] [00] [00] [00]
SGX disabled, exiting
[SGX] SgxEarlyInit exit: Success
SgxDisabledFlow entry
LockUncoreM2mPrmrrs START
SocketIndex = 0
[SGX] LockUncoreM2mPrmrrs: Sgx M2M_PRMRR_BASE Socket0 Imc0 = 0x0000000000000000
[SGX] LockUncoreM2mPrmrrs: Sgx M2M_PRMRR_MASK Socket0 Imc0 = 0x0000000000000400
[SGX] LockUncoreM2mPrmrrs: Sgx M2M_PRMRR_BASE Socket0 Imc1 = 0x0000000000000000
[SGX] LockUncoreM2mPrmrrs: Sgx M2M_PRMRR_MASK Socket0 Imc1 = 0x0000000000000400
[SGX] LockUncoreM2mPrmrrs: Sgx M2M_PRMRR_BASE Socket0 Imc2 = 0x0000000000000000
[SGX] LockUncoreM2mPrmrrs: Sgx M2M_PRMRR_MASK Socket0 Imc2 = 0x0000000000000400
[SGX] LockUncoreM2mPrmrrs: Sgx M2M_PRMRR_BASE Socket0 Imc3 = 0x0000000000000000
[SGX] LockUncoreM2mPrmrrs: Sgx M2M_PRMRR_MASK Socket0 Imc3 = 0x0000000000000400
SocketIndex = 1
[SGX] LockUncoreM2mPrmrrs: Sgx M2M_PRMRR_BASE Socket1 Imc0 = 0x0000000000000000
[SGX] LockUncoreM2mPrmrrs: Sgx M2M_PRMRR_MASK Socket1 Imc0 = 0x0000000000000400
[SGX] LockUncoreM2mPrmrrs: Sgx M2M_PRMRR_BASE Socket1 Imc1 = 0x0000000000000000
[SGX] LockUncoreM2mPrmrrs: Sgx M2M_PRMRR_MASK Socket1 Imc1 = 0x0000000000000400
[SGX] LockUncoreM2mPrmrrs: Sgx M2M_PRMRR_BASE Socket1 Imc2 = 0x0000000000000000
[SGX] LockUncoreM2mPrmrrs: Sgx M2M_PRMRR_MASK Socket1 Imc2 = 0x0000000000000400
[SGX] LockUncoreM2mPrmrrs: Sgx M2M_PRMRR_BASE Socket1 Imc3 = 0x0000000000000000
[SGX] LockUncoreM2mPrmrrs: Sgx M2M_PRMRR_MASK Socket1 Imc3 = 0x0000000000000400
LockUncoreM2mPrmrrs END
SgxDisabledFlow exit
PROGRESS CODE: V03020003 I0
PROGRESS CODE: V03020002 I0
PEI PPM Initialization Entry
::PEI Power Management CSR, B2P and TPMI Programming
Data received from mailbox: 0x20000802
Data received from mailbox: 0x20000902
InitializeUfsMeshBoostConfig() Not supported or not enabled, Exit
Data received from mailbox: 0x20000802
Data received from mailbox: 0x20000902
InitializeUfsMeshBoostConfig() Not supported or not enabled, Exit
PROGRESS CODE: V03020003 I0
PROGRESS CODE: V03020002 I0
[NEW] FeatureName: AESNI
[NEW] FeatureName: MWAIT
[NEW] FeatureName: ACPI
[NEW] FeatureName: EIST
[NEW] FeatureName: FastStrings
[NEW] FeatureName: Lock Feature Control Register
[NEW] FeatureName: SMX
[NEW] FeatureName: VMX
[NEW] FeatureName: Limit CpuId Maximum Value
[NEW] FeatureName: Machine Check Enable
[NEW] FeatureName: Machine Check Architect
[NEW] FeatureName: MCG_CTL
[NEW] FeatureName: Pending Break
[NEW] FeatureName: C1E
[NEW] FeatureName: X2Apic
[NEW] FeatureName: PPIN
[NEW] FeatureName: LMCE
[NEW] FeatureName: Proc Trace
[OVERRIDE] FeatureName: ACPI
[OVERRIDE] FeatureName: EIST
[OVERRIDE] FeatureName: FastStrings
[OVERRIDE] FeatureName: Lock Feature Control Register
[OVERRIDE] FeatureName: Limit CpuId Maximum Value
[OVERRIDE] FeatureName: Pending Break
[OVERRIDE] FeatureName: C1E
[OVERRIDE] FeatureName: PPIN
[OVERRIDE] FeatureName: LMCE
[OVERRIDE] FeatureName: Proc Trace
[NEW] FeatureName: L1 Next Page Prefetcher
[NEW] FeatureName: DCU Streamer Prefetcher
[NEW] FeatureName: DCU IP Prefetcher
[NEW] FeatureName: Mlc Streamer Prefetcher
[NEW] FeatureName: Mlc Spatial Prefetcher
[NEW] FeatureName: AMP Prefetcher
[NEW] FeatureName: Three Strike Counter
[NEW] FeatureName: DBP-F
[NEW] FeatureName: Energy Performance Bias
[NEW] FeatureName: C State
[NEW] FeatureName: Thermal management
[NEW] FeatureName: SncInit
[NEW] FeatureName: MbmInit
[NEW] FeatureName: IioLlcWays
[NEW] FeatureName: AcSplitLock
[NEW] FeatureName: CrashDataGprs
:IioLlcWays: Socket = 0
Capid5Csr = 0x6700000B iio_llcconfig_en (Bit[1]) = 1
:IioLlcWays: Socket = 1
Capid5Csr = 0x6700000B iio_llcconfig_en (Bit[1]) = 1
Processor Info: Package: 2, MaxCore : 40, MaxThread: 2
P00: Thread Count = 80
P00 C0000, Thread Count = 2
P00 C0001, Thread Count = 2
P00 C0002, Thread Count = 2
P00 C0003, Thread Count = 2
P00 C0004, Thread Count = 2
P00 C0005, Thread Count = 2
P00 C0006, Thread Count = 2
P00 C0007, Thread Count = 2
P00 C0008, Thread Count = 2
P00 C0009, Thread Count = 2
P00 C0010, Thread Count = 2
P00 C0011, Thread Count = 2
P00 C0012, Thread Count = 2
P00 C0013, Thread Count = 2
P00 C0014, Thread Count = 2
P00 C0015, Thread Count = 2
P00 C0016, Thread Count = 2
P00 C0017, Thread Count = 2
P00 C0018, Thread Count = 2
P00 C0019, Thread Count = 2
P00 C0020, Thread Count = 2
P00 C0021, Thread Count = 2
P00 C0022, Thread Count = 2
P00 C0023, Thread Count = 2
P00 C0024, Thread Count = 2
P00 C0025, Thread Count = 2
P00 C0026, Thread Count = 2
P00 C0027, Thread Count = 2
P00 C0028, Thread Count = 2
P00 C0029, Thread Count = 2
P00 C0030, Thread Count = 2
P00 C0031, Thread Count = 2
P00 C0032, Thread Count = 2
P00 C0033, Thread Count = 2
P00 C0034, Thread Count = 2
P00 C0035, Thread Count = 2
P00 C0036, Thread Count = 2
P00 C0037, Thread Count = 2
P00 C0038, Thread Count = 2
P00 C0039, Thread Count = 2
P01: Thread Count = 80
P01 C0000, Thread Count = 2
P01 C0001, Thread Count = 2
P01 C0002, Thread Count = 2
P01 C0003, Thread Count = 2
P01 C0004, Thread Count = 2
P01 C0005, Thread Count = 2
P01 C0006, Thread Count = 2
P01 C0007, Thread Count = 2
P01 C0008, Thread Count = 2
P01 C0009, Thread Count = 2
P01 C0010, Thread Count = 2
P01 C0011, Thread Count = 2
P01 C0012, Thread Count = 2
P01 C0013, Thread Count = 2
P01 C0014, Thread Count = 2
P01 C0015, Thread Count = 2
P01 C0016, Thread Count = 2
P01 C0017, Thread Count = 2
P01 C0018, Thread Count = 2
P01 C0019, Thread Count = 2
P01 C0020, Thread Count = 2
P01 C0021, Thread Count = 2
P01 C0022, Thread Count = 2
P01 C0023, Thread Count = 2
P01 C0024, Thread Count = 2
P01 C0025, Thread Count = 2
P01 C0026, Thread Count = 2
P01 C0027, Thread Count = 2
P01 C0028, Thread Count = 2
P01 C0029, Thread Count = 2
P01 C0030, Thread Count = 2
P01 C0031, Thread Count = 2
P01 C0032, Thread Count = 2
P01 C0033, Thread Count = 2
P01 C0034, Thread Count = 2
P01 C0035, Thread Count = 2
P01 C0036, Thread Count = 2
P01 C0037, Thread Count = 2
P01 C0038, Thread Count = 2
P01 C0039, Thread Count = 2
Last CPU features list...
[Enable ] FeatureName: AESNI
[Enable ] FeatureName: MWAIT
[Unsupport] FeatureName: ACPI
[Enable ] FeatureName: EIST
[Enable ] FeatureName: FastStrings
[Enable ] FeatureName: VMX
[Unsupport] FeatureName: LMCE
[Disable ] FeatureName: SMX
[Unsupport] FeatureName: Lock Feature Control Register
[Unsupport] FeatureName: Limit CpuId Maximum Value
[Enable ] FeatureName: Machine Check Enable
[Enable ] FeatureName: Machine Check Architect
[Unsupport] FeatureName: MCG_CTL
[Unsupport] FeatureName: Pending Break
[Unsupport] FeatureName: C1E
[Enable ] FeatureName: X2Apic
[Enable ] FeatureName: PPIN
[Unsupport] FeatureName: Proc Trace
[Unsupport] FeatureName: L1 Next Page Prefetcher
[Enable ] FeatureName: DCU Streamer Prefetcher
[Enable ] FeatureName: DCU IP Prefetcher
[Enable ] FeatureName: Mlc Streamer Prefetcher
[Enable ] FeatureName: Mlc Spatial Prefetcher
[Disable ] FeatureName: AMP Prefetcher
[Enable ] FeatureName: Three Strike Counter
[Disable ] FeatureName: DBP-F
[Enable ] FeatureName: Energy Performance Bias
[Enable ] FeatureName: C State
[Enable ] FeatureName: Thermal management
[Enable ] FeatureName: SncInit
[Enable ] FeatureName: MbmInit
[Disable ] FeatureName: IioLlcWays
[Unsupport] FeatureName: AcSplitLock
[Unsupport] FeatureName: CrashDataGprs
PcdCpuFeaturesCapability:
D5 31 60 E9 F1 0D 00 00
Origin PcdCpuFeaturesSetting:
D5 70 60 C5 F0 0D 00 00
Final PcdCpuFeaturesSetting:
D5 30 60 C1 F0 0D 00 00
:SNC: Socket = 0, Processor = 0
SncConfigMsr = 0xA
SncBaseCsr [0x0] = 0xFFF0000
SncBaseCsr [0x1] = 0x1FE00022
SncBaseCsr [0x2] = 0x42
SncBaseCsr [0x3] = 0x62
SncBaseCsr [0x4] = 0x82
SncConfigCsr = 0xF
:MBM: S0 Processor = 0, LlcQosMonEnable = 1
ChasPerCluster = 13, ChaThresholdWithinCluster = 12, CorrectionFactorHi = 123 CorrectionFactorLo = 98
Dump final value for PcdCpuFeaturesSetting:
D5 30 60 C1 F0 0D 00 00
RegisterTable->TableLength = 71
Processor: 0000: Index 0000, MSR : 0000013C, Bit Start: 00, Bit Length: 02, Value: 0000000000000001
Processor: 0000: Index 0001, MSR : 000001A0, Bit Start: 18, Bit Length: 01, Value: 0000000000000001
Processor: 0000: Index 0002, SEMAP: Package
Processor: 0000: Index 0003, MSR : 000001A0, Bit Start: 16, Bit Length: 01, Value: 0000000000000001
Processor: 0000: Index 0004, SEMAP: Package
Processor: 0000: Index 0005, SEMAP: Package
Processor: 0000: Index 0006, MSR : 000001A0, Bit Start: 38, Bit Length: 01, Value: 0000000000000000
Processor: 0000: Index 0007, SEMAP: Package
Processor: 0000: Index 0008, MSR : 00000199, Bit Start: 08, Bit Length: 07, Value: 0000000000000011
Processor: 0000: Index 0009, MSR : 000001A0, Bit Start: 00, Bit Length: 01, Value: 0000000000000001
Processor: 0000: Index 0010, MSR : 0000003A, Bit Start: 02, Bit Length: 01, Value: 0000000000000001
Processor: 0000: Index 0011, CR : 00000004, Bit Start: 14, Bit Length: 01, Value: 0000000000000000
Processor: 0000: Index 0012, MSR : 0000003A, Bit Start: 08, Bit Length: 07, Value: 0000000000000000
Processor: 0000: Index 0013, MSR : 0000003A, Bit Start: 15, Bit Length: 01, Value: 0000000000000000
Processor: 0000: Index 0014, MSR : 0000003A, Bit Start: 01, Bit Length: 01, Value: 0000000000000000
Processor: 0000: Index 0015, CR : 00000004, Bit Start: 06, Bit Length: 01, Value: 0000000000000001
Processor: 0000: Index 0016, MSR : 00000400, Bit Start: 00, Bit Length: 64, Value: FFFFFFFFFFFFFFFF
Processor: 0000: Index 0017, MSR : 00000404, Bit Start: 00, Bit Length: 64, Value: FFFFFFFFFFFFFFFF
Processor: 0000: Index 0018, MSR : 00000408, Bit Start: 00, Bit Length: 64, Value: FFFFFFFFFFFFFFFF
Processor: 0000: Index 0019, MSR : 0000040C, Bit Start: 00, Bit Length: 64, Value: FFFFFFFFFFFFFFFF
Processor: 0000: Index 0020, MSR : 00000410, Bit Start: 00, Bit Length: 64, Value: FFFFFFFFFFFFFFFF
Processor: 0000: Index 0021, MSR : 00000414, Bit Start: 00, Bit Length: 64, Value: FFFFFFFFFFFFFFFF
Processor: 0000: Index 0022, MSR : 00000418, Bit Start: 00, Bit Length: 64, Value: FFFFFFFFFFFFFFFF
Processor: 0000: Index 0023, MSR : 0000041C, Bit Start: 00, Bit Length: 64, Value: FFFFFFFFFFFFFFFF
Processor: 0000: Index 0024, MSR : 00000420, Bit Start: 00, Bit Length: 64, Value: FFFFFFFFFFFFFFFF
Processor: 0000: Index 0025, MSR : 00000424, Bit Start: 00, Bit Length: 64, Value: FFFFFFFFFFFFFFFF
Processor: 0000: Index 0026, MSR : 00000428, Bit Start: 00, Bit Length: 64, Value: FFFFFFFFFFFFFFFF
Processor: 0000: Index 0027, MSR : 0000042C, Bit Start: 00, Bit Length: 64, Value: FFFFFFFFFFFFFFFF
Processor: 0000: Index 0028, MSR : 00000430, Bit Start: 00, Bit Length: 64, Value: FFFFFFFFFFFFFFFF
Processor: 0000: Index 0029, MSR : 00000434, Bit Start: 00, Bit Length: 64, Value: FFFFFFFFFFFFFFFF
Processor: 0000: Index 0030, MSR : 00000438, Bit Start: 00, Bit Length: 64, Value: FFFFFFFFFFFFFFFF
Processor: 0000: Index 0031, MSR : 0000043C, Bit Start: 00, Bit Length: 64, Value: FFFFFFFFFFFFFFFF
Processor: 0000: Index 0032, MSR : 00000440, Bit Start: 00, Bit Length: 64, Value: FFFFFFFFFFFFFFFF
Processor: 0000: Index 0033, MSR : 00000444, Bit Start: 00, Bit Length: 64, Value: FFFFFFFFFFFFFFFF
Processor: 0000: Index 0034, MSR : 00000448, Bit Start: 00, Bit Length: 64, Value: FFFFFFFFFFFFFFFF
Processor: 0000: Index 0035, MSR : 0000044C, Bit Start: 00, Bit Length: 64, Value: FFFFFFFFFFFFFFFF
Processor: 0000: Index 0036, MSR : 00000450, Bit Start: 00, Bit Length: 64, Value: FFFFFFFFFFFFFFFF
Processor: 0000: Index 0037, MSR : 00000454, Bit Start: 00, Bit Length: 64, Value: FFFFFFFFFFFFFFFF
Processor: 0000: Index 0038, MSR : 00000458, Bit Start: 00, Bit Length: 64, Value: FFFFFFFFFFFFFFFF
Processor: 0000: Index 0039, MSR : 0000045C, Bit Start: 00, Bit Length: 64, Value: FFFFFFFFFFFFFFFF
Processor: 0000: Index 0040, MSR : 00000460, Bit Start: 00, Bit Length: 64, Value: FFFFFFFFFFFFFFFF
Processor: 0000: Index 0041, MSR : 00000464, Bit Start: 00, Bit Length: 64, Value: FFFFFFFFFFFFFFFF
Processor: 0000: Index 0042, MSR : 00000468, Bit Start: 00, Bit Length: 64, Value: FFFFFFFFFFFFFFFF
Processor: 0000: Index 0043, MSR : 0000046C, Bit Start: 00, Bit Length: 64, Value: FFFFFFFFFFFFFFFF
Processor: 0000: Index 0044, MSR : 00000470, Bit Start: 00, Bit Length: 64, Value: FFFFFFFFFFFFFFFF
Processor: 0000: Index 0045, MSR : 00000474, Bit Start: 00, Bit Length: 64, Value: FFFFFFFFFFFFFFFF
Processor: 0000: Index 0046, MSR : 00000478, Bit Start: 00, Bit Length: 64, Value: FFFFFFFFFFFFFFFF
Processor: 0000: Index 0047, MSR : 0000047C, Bit Start: 00, Bit Length: 64, Value: FFFFFFFFFFFFFFFF
Processor: 0000: Index 0048, MSR : 0000001B, Bit Start: 10, Bit Length: 01, Value: 0000000000000001
Processor: 0000: Index 0049, MSR : 0000004E, Bit Start: 00, Bit Length: 64, Value: 0000000000000002
Processor: 0000: Index 0050, CACHE: 00000000, Bit Start: 00, Bit Length: 01, Value: 0000000000000000
Processor: 0000: Index 0051, MSR : 000001A4, Bit Start: 05, Bit Length: 01, Value: 0000000000000001
Processor: 0000: Index 0052, CACHE: 00000000, Bit Start: 00, Bit Length: 01, Value: 0000000000000001
Processor: 0000: Index 0053, MSR : 000001A4, Bit Start: 11, Bit Length: 01, Value: 0000000000000000
Processor: 0000: Index 0054, MSR : 0000006D, Bit Start: 02, Bit Length: 02, Value: 0000000000000000
Processor: 0000: Index 0055, MSR : 000001FC, Bit Start: 18, Bit Length: 01, Value: 0000000000000001
Processor: 0000: Index 0056, SEMAP: Package
Processor: 0000: Index 0057, MSR : 000001B0, Bit Start: 00, Bit Length: 04, Value: 0000000000000000
Processor: 0000: Index 0058, MSR : 000000E2, Bit Start: 00, Bit Length: 64, Value: 0000000014000403
Processor: 0000: Index 0059, MSR : 000000E4, Bit Start: 00, Bit Length: 64, Value: 0000000000010514
Processor: 0000: Index 0060, MSR : 000001A0, Bit Start: 03, Bit Length: 01, Value: 0000000000000001
Processor: 0000: Index 0061, MSR : 000001AA, Bit Start: 22, Bit Length: 01, Value: 0000000000000001
Processor: 0000: Index 0062, MSR : 000001A2, Bit Start: 00, Bit Length: 64, Value: 0000000080640800
Processor: 0000: Index 0063, MSR : 00000153, Bit Start: 00, Bit Length: 16, Value: 0000000000000000
Processor: 0000: Index 0064, MSR : 00000154, Bit Start: 00, Bit Length: 16, Value: 0000000000000022
Processor: 0000: Index 0065, MSR : 00000155, Bit Start: 00, Bit Length: 16, Value: 0000000000000042
Processor: 0000: Index 0066, MSR : 00000156, Bit Start: 00, Bit Length: 16, Value: 0000000000000062
Processor: 0000: Index 0067, MSR : 00000157, Bit Start: 00, Bit Length: 16, Value: 0000000000000082
Processor: 0000: Index 0068, MSR : 00000159, Bit Start: 00, Bit Length: 30, Value: 0000000000000000
Processor: 0000: Index 0069, MSR : 00000152, Bit Start: 00, Bit Length: 64, Value: 000000000000000A
Processor: 0000: Index 0070, MSR : 00000CA1, Bit Start: 00, Bit Length: 32, Value: 00000000627B0C0D
Dump final value for PcdCpuFeaturesSetting:
D5 30 60 C1 F0 0D 00 00
:SNC: Socket = 0, Processor = 2
SncConfigMsr = 0xA
SncBaseCsr [0x0] = 0xFFF0000
SncBaseCsr [0x1] = 0x1FE00022
SncBaseCsr [0x2] = 0x42
SncBaseCsr [0x3] = 0x62
SncBaseCsr [0x4] = 0x82
SncConfigCsr = 0xF
Dump final value for PcdCpuFeaturesSetting:
D5 30 60 C1 F0 0D 00 00
Dump final value for PcdCpuFeaturesSetting:
D5 30 60 C1 F0 0D 00 00
:SNC: Socket = 0, Processor = 4
SncConfigMsr = 0xA
SncBaseCsr [0x0] = 0xFFF0000
SncBaseCsr [0x1] = 0x1FE00022
SncBaseCsr [0x2] = 0x42
SncBaseCsr [0x3] = 0x62
SncBaseCsr [0x4] = 0x82
SncConfigCsr = 0xF
Dump final value for PcdCpuFeaturesSetting:
D5 30 60 C1 F0 0D 00 00
Dump final value for PcdCpuFeaturesSetting:
D5 30 60 C1 F0 0D 00 00
:SNC: Socket = 0, Processor = 6
SncConfigMsr = 0xA
SncBaseCsr [0x0] = 0xFFF0000
SncBaseCsr [0x1] = 0x1FE00022
SncBaseCsr [0x2] = 0x42
SncBaseCsr [0x3] = 0x62
SncBaseCsr [0x4] = 0x82
SncConfigCsr = 0xF
Dump final value for PcdCpuFeaturesSetting:
D5 30 60 C1 F0 0D 00 00
Dump final value for PcdCpuFeaturesSetting:
D5 30 60 C1 F0 0D 00 00
:SNC: Socket = 0, Processor = 8
SncConfigMsr = 0xA
SncBaseCsr [0x0] = 0xFFF0000
SncBaseCsr [0x1] = 0x1FE00022
SncBaseCsr [0x2] = 0x42
SncBaseCsr [0x3] = 0x62
SncBaseCsr [0x4] = 0x82
SncConfigCsr = 0xF
Dump final value for PcdCpuFeaturesSetting:
D5 30 60 C1 F0 0D 00 00
Dump final value for PcdCpuFeaturesSetting:
D5 30 60 C1 F0 0D 00 00
:SNC: Socket = 0, Processor = 10
SncConfigMsr = 0xA
SncBaseCsr [0x0] = 0xFFF0000
SncBaseCsr [0x1] = 0x1FE00022
SncBaseCsr [0x2] = 0x42
SncBaseCsr [0x3] = 0x62
SncBaseCsr [0x4] = 0x82
SncConfigCsr = 0xF
Dump final value for PcdCpuFeaturesSetting:
D5 30 60 C1 F0 0D 00 00
Dump final value for PcdCpuFeaturesSetting:
D5 30 60 C1 F0 0D 00 00
:SNC: Socket = 0, Processor = 12
SncConfigMsr = 0xA
SncBaseCsr [0x0] = 0xFFF0000
SncBaseCsr [0x1] = 0x1FE00022
SncBaseCsr [0x2] = 0x42
SncBaseCsr [0x3] = 0x62
SncBaseCsr [0x4] = 0x82
SncConfigCsr = 0xF
Dump final value for PcdCpuFeaturesSetting:
D5 30 60 C1 F0 0D 00 00
Dump final value for PcdCpuFeaturesSetting:
D5 30 60 C1 F0 0D 00 00
:SNC: Socket = 0, Processor = 14
SncConfigMsr = 0xA
SncBaseCsr [0x0] = 0xFFF0000
SncBaseCsr [0x1] = 0x1FE00022
SncBaseCsr [0x2] = 0x42
SncBaseCsr [0x3] = 0x62
SncBaseCsr [0x4] = 0x82
SncConfigCsr = 0xF
Dump final value for PcdCpuFeaturesSetting:
D5 30 60 C1 F0 0D 00 00
Dump final value for PcdCpuFeaturesSetting:
D5 30 60 C1 F0 0D 00 00
:SNC: Socket = 0, Processor = 16
SncConfigMsr = 0xA
SncBaseCsr [0x0] = 0xFFF0000
SncBaseCsr [0x1] = 0x1FE00022
SncBaseCsr [0x2] = 0x42
SncBaseCsr [0x3] = 0x62
SncBaseCsr [0x4] = 0x82
SncConfigCsr = 0xF
Dump final value for PcdCpuFeaturesSetting:
D5 30 60 C1 F0 0D 00 00
Dump final value for PcdCpuFeaturesSetting:
D5 30 60 C1 F0 0D 00 00
:SNC: Socket = 0, Processor = 18
SncConfigMsr = 0xA
SncBaseCsr [0x0] = 0xFFF0000
SncBaseCsr [0x1] = 0x1FE00022
SncBaseCsr [0x2] = 0x42
SncBaseCsr [0x3] = 0x62
SncBaseCsr [0x4] = 0x82
SncConfigCsr = 0xF
Dump final value for PcdCpuFeaturesSetting:
D5 30 60 C1 F0 0D 00 00
Dump final value for PcdCpuFeaturesSetting:
D5 30 60 C1 F0 0D 00 00
:SNC: Socket = 0, Processor = 20
SncConfigMsr = 0xA
SncBaseCsr [0x0] = 0xFFF0000
SncBaseCsr [0x1] = 0x1FE00022
SncBaseCsr [0x2] = 0x42
SncBaseCsr [0x3] = 0x62
SncBaseCsr [0x4] = 0x82
SncConfigCsr = 0xF
Dump final value for PcdCpuFeaturesSetting:
D5 30 60 C1 F0 0D 00 00
Dump final value for PcdCpuFeaturesSetting:
D5 30 60 C1 F0 0D 00 00
:SNC: Socket = 0, Processor = 22
SncConfigMsr = 0xA
SncBaseCsr [0x0] = 0xFFF0000
SncBaseCsr [0x1] = 0x1FE00022
SncBaseCsr [0x2] = 0x42
SncBaseCsr [0x3] = 0x62
SncBaseCsr [0x4] = 0x82
SncConfigCsr = 0xF
Dump final value for PcdCpuFeaturesSetting:
D5 30 60 C1 F0 0D 00 00
Dump final value for PcdCpuFeaturesSetting:
D5 30 60 C1 F0 0D 00 00
:SNC: Socket = 0, Processor = 24
SncConfigMsr = 0xA
SncBaseCsr [0x0] = 0xFFF0000
SncBaseCsr [0x1] = 0x1FE00022
SncBaseCsr [0x2] = 0x42
SncBaseCsr [0x3] = 0x62
SncBaseCsr [0x4] = 0x82
SncConfigCsr = 0xF
Dump final value for PcdCpuFeaturesSetting:
D5 30 60 C1 F0 0D 00 00
Dump final value for PcdCpuFeaturesSetting:
D5 30 60 C1 F0 0D 00 00
:SNC: Socket = 0, Processor = 26
SncConfigMsr = 0xA
SncBaseCsr [0x0] = 0xFFF0000
SncBaseCsr [0x1] = 0x1FE00022
SncBaseCsr [0x2] = 0x42
SncBaseCsr [0x3] = 0x62
SncBaseCsr [0x4] = 0x82
SncConfigCsr = 0xF
Dump final value for PcdCpuFeaturesSetting:
D5 30 60 C1 F0 0D 00 00
Dump final value for PcdCpuFeaturesSetting:
D5 30 60 C1 F0 0D 00 00
:SNC: Socket = 0, Processor = 28
SncConfigMsr = 0xA
SncBaseCsr [0x0] = 0xFFF0000
SncBaseCsr [0x1] = 0x1FE00022
SncBaseCsr [0x2] = 0x42
SncBaseCsr [0x3] = 0x62
SncBaseCsr [0x4] = 0x82
SncConfigCsr = 0xF
Dump final value for PcdCpuFeaturesSetting:
D5 30 60 C1 F0 0D 00 00
Dump final value for PcdCpuFeaturesSetting:
D5 30 60 C1 F0 0D 00 00
:SNC: Socket = 0, Processor = 30
SncConfigMsr = 0xA
SncBaseCsr [0x0] = 0xFFF0000
SncBaseCsr [0x1] = 0x1FE00022
SncBaseCsr [0x2] = 0x42
SncBaseCsr [0x3] = 0x62
SncBaseCsr [0x4] = 0x82
SncConfigCsr = 0xF
Dump final value for PcdCpuFeaturesSetting:
D5 30 60 C1 F0 0D 00 00
Dump final value for PcdCpuFeaturesSetting:
D5 30 60 C1 F0 0D 00 00
:SNC: Socket = 0, Processor = 32
SncConfigMsr = 0xA
SncBaseCsr [0x0] = 0xFFF0000
SncBaseCsr [0x1] = 0x1FE00022
SncBaseCsr [0x2] = 0x42
SncBaseCsr [0x3] = 0x62
SncBaseCsr [0x4] = 0x82
SncConfigCsr = 0xF
Dump final value for PcdCpuFeaturesSetting:
D5 30 60 C1 F0 0D 00 00
Dump final value for PcdCpuFeaturesSetting:
D5 30 60 C1 F0 0D 00 00
:SNC: Socket = 0, Processor = 34
SncConfigMsr = 0xA
SncBaseCsr [0x0] = 0xFFF0000
SncBaseCsr [0x1] = 0x1FE00022
SncBaseCsr [0x2] = 0x42
SncBaseCsr [0x3] = 0x62
SncBaseCsr [0x4] = 0x82
SncConfigCsr = 0xF
Dump final value for PcdCpuFeaturesSetting:
D5 30 60 C1 F0 0D 00 00
Dump final value for PcdCpuFeaturesSetting:
D5 30 60 C1 F0 0D 00 00
:SNC: Socket = 0, Processor = 36
SncConfigMsr = 0xA
SncBaseCsr [0x0] = 0xFFF0000
SncBaseCsr [0x1] = 0x1FE00022
SncBaseCsr [0x2] = 0x42
SncBaseCsr [0x3] = 0x62
SncBaseCsr [0x4] = 0x82
SncConfigCsr = 0xF
Dump final value for PcdCpuFeaturesSetting:
D5 30 60 C1 F0 0D 00 00
Dump final value for PcdCpuFeaturesSetting:
D5 30 60 C1 F0 0D 00 00
:SNC: Socket = 0, Processor = 38
SncConfigMsr = 0xA
SncBaseCsr [0x0] = 0xFFF0000
SncBaseCsr [0x1] = 0x1FE00022
SncBaseCsr [0x2] = 0x42
SncBaseCsr [0x3] = 0x62
SncBaseCsr [0x4] = 0x82
SncConfigCsr = 0xF
Dump final value for PcdCpuFeaturesSetting:
D5 30 60 C1 F0 0D 00 00
Dump final value for PcdCpuFeaturesSetting:
D5 30 60 C1 F0 0D 00 00
:SNC: Socket = 0, Processor = 40
SncConfigMsr = 0xA
SncBaseCsr [0x0] = 0xFFF0000
SncBaseCsr [0x1] = 0x1FE00022
SncBaseCsr [0x2] = 0x42
SncBaseCsr [0x3] = 0x62
SncBaseCsr [0x4] = 0x82
SncConfigCsr = 0xF
Dump final value for PcdCpuFeaturesSetting:
D5 30 60 C1 F0 0D 00 00
Dump final value for PcdCpuFeaturesSetting:
D5 30 60 C1 F0 0D 00 00
:SNC: Socket = 0, Processor = 42
SncConfigMsr = 0xA
SncBaseCsr [0x0] = 0xFFF0000
SncBaseCsr [0x1] = 0x1FE00022
SncBaseCsr [0x2] = 0x42
SncBaseCsr [0x3] = 0x62
SncBaseCsr [0x4] = 0x82
SncConfigCsr = 0xF
Dump final value for PcdCpuFeaturesSetting:
D5 30 60 C1 F0 0D 00 00
Dump final value for PcdCpuFeaturesSetting:
D5 30 60 C1 F0 0D 00 00
:SNC: Socket = 0, Processor = 44
SncConfigMsr = 0xA
SncBaseCsr [0x0] = 0xFFF0000
SncBaseCsr [0x1] = 0x1FE00022
SncBaseCsr [0x2] = 0x42
SncBaseCsr [0x3] = 0x62
SncBaseCsr [0x4] = 0x82
SncConfigCsr = 0xF
Dump final value for PcdCpuFeaturesSetting:
D5 30 60 C1 F0 0D 00 00
Dump final value for PcdCpuFeaturesSetting:
D5 30 60 C1 F0 0D 00 00
:SNC: Socket = 0, Processor = 46
SncConfigMsr = 0xA
SncBaseCsr [0x0] = 0xFFF0000
SncBaseCsr [0x1] = 0x1FE00022
SncBaseCsr [0x2] = 0x42
SncBaseCsr [0x3] = 0x62
SncBaseCsr [0x4] = 0x82
SncConfigCsr = 0xF
Dump final value for PcdCpuFeaturesSetting:
D5 30 60 C1 F0 0D 00 00
Dump final value for PcdCpuFeaturesSetting:
D5 30 60 C1 F0 0D 00 00
:SNC: Socket = 0, Processor = 48
SncConfigMsr = 0xA
SncBaseCsr [0x0] = 0xFFF0000
SncBaseCsr [0x1] = 0x1FE00022
SncBaseCsr [0x2] = 0x42
SncBaseCsr [0x3] = 0x62
SncBaseCsr [0x4] = 0x82
SncConfigCsr = 0xF
Dump final value for PcdCpuFeaturesSetting:
D5 30 60 C1 F0 0D 00 00
Dump final value for PcdCpuFeaturesSetting:
D5 30 60 C1 F0 0D 00 00
:SNC: Socket = 0, Processor = 50
SncConfigMsr = 0xA
SncBaseCsr [0x0] = 0xFFF0000
SncBaseCsr [0x1] = 0x1FE00022
SncBaseCsr [0x2] = 0x42
SncBaseCsr [0x3] = 0x62
SncBaseCsr [0x4] = 0x82
SncConfigCsr = 0xF
Dump final value for PcdCpuFeaturesSetting:
D5 30 60 C1 F0 0D 00 00
Dump final value for PcdCpuFeaturesSetting:
D5 30 60 C1 F0 0D 00 00
:SNC: Socket = 0, Processor = 52
SncConfigMsr = 0xA
SncBaseCsr [0x0] = 0xFFF0000
SncBaseCsr [0x1] = 0x1FE00022
SncBaseCsr [0x2] = 0x42
SncBaseCsr [0x3] = 0x62
SncBaseCsr [0x4] = 0x82
SncConfigCsr = 0xF
Dump final value for PcdCpuFeaturesSetting:
D5 30 60 C1 F0 0D 00 00
Dump final value for PcdCpuFeaturesSetting:
D5 30 60 C1 F0 0D 00 00
:SNC: Socket = 0, Processor = 54
SncConfigMsr = 0xA
SncBaseCsr [0x0] = 0xFFF0000
SncBaseCsr [0x1] = 0x1FE00022
SncBaseCsr [0x2] = 0x42
SncBaseCsr [0x3] = 0x62
SncBaseCsr [0x4] = 0x82
SncConfigCsr = 0xF
Dump final value for PcdCpuFeaturesSetting:
D5 30 60 C1 F0 0D 00 00
Dump final value for PcdCpuFeaturesSetting:
D5 30 60 C1 F0 0D 00 00
:SNC: Socket = 0, Processor = 56
SncConfigMsr = 0xA
SncBaseCsr [0x0] = 0xFFF0000
SncBaseCsr [0x1] = 0x1FE00022
SncBaseCsr [0x2] = 0x42
SncBaseCsr [0x3] = 0x62
SncBaseCsr [0x4] = 0x82
SncConfigCsr = 0xF
Dump final value for PcdCpuFeaturesSetting:
D5 30 60 C1 F0 0D 00 00
Dump final value for PcdCpuFeaturesSetting:
D5 30 60 C1 F0 0D 00 00
:SNC: Socket = 0, Processor = 58
SncConfigMsr = 0xA
SncBaseCsr [0x0] = 0xFFF0000
SncBaseCsr [0x1] = 0x1FE00022
SncBaseCsr [0x2] = 0x42
SncBaseCsr [0x3] = 0x62
SncBaseCsr [0x4] = 0x82
SncConfigCsr = 0xF
Dump final value for PcdCpuFeaturesSetting:
D5 30 60 C1 F0 0D 00 00
Dump final value for PcdCpuFeaturesSetting:
D5 30 60 C1 F0 0D 00 00
:SNC: Socket = 0, Processor = 60
SncConfigMsr = 0xA
SncBaseCsr [0x0] = 0xFFF0000
SncBaseCsr [0x1] = 0x1FE00022
SncBaseCsr [0x2] = 0x42
SncBaseCsr [0x3] = 0x62
SncBaseCsr [0x4] = 0x82
SncConfigCsr = 0xF
Dump final value for PcdCpuFeaturesSetting:
D5 30 60 C1 F0 0D 00 00
Dump final value for PcdCpuFeaturesSetting:
D5 30 60 C1 F0 0D 00 00
:SNC: Socket = 0, Processor = 62
SncConfigMsr = 0xA
SncBaseCsr [0x0] = 0xFFF0000
SncBaseCsr [0x1] = 0x1FE00022
SncBaseCsr [0x2] = 0x42
SncBaseCsr [0x3] = 0x62
SncBaseCsr [0x4] = 0x82
SncConfigCsr = 0xF
Dump final value for PcdCpuFeaturesSetting:
D5 30 60 C1 F0 0D 00 00
Dump final value for PcdCpuFeaturesSetting:
D5 30 60 C1 F0 0D 00 00
:SNC: Socket = 0, Processor = 64
SncConfigMsr = 0xA
SncBaseCsr [0x0] = 0xFFF0000
SncBaseCsr [0x1] = 0x1FE00022
SncBaseCsr [0x2] = 0x42
SncBaseCsr [0x3] = 0x62
SncBaseCsr [0x4] = 0x82
SncConfigCsr = 0xF
Dump final value for PcdCpuFeaturesSetting:
D5 30 60 C1 F0 0D 00 00
Dump final value for PcdCpuFeaturesSetting:
D5 30 60 C1 F0 0D 00 00
:SNC: Socket = 0, Processor = 66
SncConfigMsr = 0xA
SncBaseCsr [0x0] = 0xFFF0000
SncBaseCsr [0x1] = 0x1FE00022
SncBaseCsr [0x2] = 0x42
SncBaseCsr [0x3] = 0x62
SncBaseCsr [0x4] = 0x82
SncConfigCsr = 0xF
Dump final value for PcdCpuFeaturesSetting:
D5 30 60 C1 F0 0D 00 00
Dump final value for PcdCpuFeaturesSetting:
D5 30 60 C1 F0 0D 00 00
:SNC: Socket = 0, Processor = 68
SncConfigMsr = 0xA
SncBaseCsr [0x0] = 0xFFF0000
SncBaseCsr [0x1] = 0x1FE00022
SncBaseCsr [0x2] = 0x42
SncBaseCsr [0x3] = 0x62
SncBaseCsr [0x4] = 0x82
SncConfigCsr = 0xF
Dump final value for PcdCpuFeaturesSetting:
D5 30 60 C1 F0 0D 00 00
Dump final value for PcdCpuFeaturesSetting:
D5 30 60 C1 F0 0D 00 00
:SNC: Socket = 0, Processor = 70
SncConfigMsr = 0xA
SncBaseCsr [0x0] = 0xFFF0000
SncBaseCsr [0x1] = 0x1FE00022
SncBaseCsr [0x2] = 0x42
SncBaseCsr [0x3] = 0x62
SncBaseCsr [0x4] = 0x82
SncConfigCsr = 0xF
Dump final value for PcdCpuFeaturesSetting:
D5 30 60 C1 F0 0D 00 00
Dump final value for PcdCpuFeaturesSetting:
D5 30 60 C1 F0 0D 00 00
:SNC: Socket = 0, Processor = 72
SncConfigMsr = 0xA
SncBaseCsr [0x0] = 0xFFF0000
SncBaseCsr [0x1] = 0x1FE00022
SncBaseCsr [0x2] = 0x42
SncBaseCsr [0x3] = 0x62
SncBaseCsr [0x4] = 0x82
SncConfigCsr = 0xF
Dump final value for PcdCpuFeaturesSetting:
D5 30 60 C1 F0 0D 00 00
Dump final value for PcdCpuFeaturesSetting:
D5 30 60 C1 F0 0D 00 00
:SNC: Socket = 0, Processor = 74
SncConfigMsr = 0xA
SncBaseCsr [0x0] = 0xFFF0000
SncBaseCsr [0x1] = 0x1FE00022
SncBaseCsr [0x2] = 0x42
SncBaseCsr [0x3] = 0x62
SncBaseCsr [0x4] = 0x82
SncConfigCsr = 0xF
Dump final value for PcdCpuFeaturesSetting:
D5 30 60 C1 F0 0D 00 00
Dump final value for PcdCpuFeaturesSetting:
D5 30 60 C1 F0 0D 00 00
:SNC: Socket = 0, Processor = 76
SncConfigMsr = 0xA
SncBaseCsr [0x0] = 0xFFF0000
SncBaseCsr [0x1] = 0x1FE00022
SncBaseCsr [0x2] = 0x42
SncBaseCsr [0x3] = 0x62
SncBaseCsr [0x4] = 0x82
SncConfigCsr = 0xF
Dump final value for PcdCpuFeaturesSetting:
D5 30 60 C1 F0 0D 00 00
Dump final value for PcdCpuFeaturesSetting:
D5 30 60 C1 F0 0D 00 00
:SNC: Socket = 0, Processor = 78
SncConfigMsr = 0xA
SncBaseCsr [0x0] = 0xFFF0000
SncBaseCsr [0x1] = 0x1FE00022
SncBaseCsr [0x2] = 0x42
SncBaseCsr [0x3] = 0x62
SncBaseCsr [0x4] = 0x82
SncConfigCsr = 0xF
Dump final value for PcdCpuFeaturesSetting:
D5 30 60 C1 F0 0D 00 00
Dump final value for PcdCpuFeaturesSetting:
D5 30 60 C1 F0 0D 00 00
:SNC: Socket = 1, Processor = 80
SncConfigMsr = 0xA
SncBaseCsr [0x0] = 0xFFF0082
SncBaseCsr [0x1] = 0x1FE000A2
SncBaseCsr [0x2] = 0xC2
SncBaseCsr [0x3] = 0xE2
SncBaseCsr [0x4] = 0x102
SncConfigCsr = 0xF
:MBM: S1 Processor = 80, LlcQosMonEnable = 1
ChasPerCluster = 13, ChaThresholdWithinCluster = 12, CorrectionFactorHi = 123 CorrectionFactorLo = 98
Dump final value for PcdCpuFeaturesSetting:
D5 30 60 C1 F0 0D 00 00
Dump final value for PcdCpuFeaturesSetting:
D5 30 60 C1 F0 0D 00 00
:SNC: Socket = 1, Processor = 82
SncConfigMsr = 0xA
SncBaseCsr [0x0] = 0xFFF0082
SncBaseCsr [0x1] = 0x1FE000A2
SncBaseCsr [0x2] = 0xC2
SncBaseCsr [0x3] = 0xE2
SncBaseCsr [0x4] = 0x102
SncConfigCsr = 0xF
Dump final value for PcdCpuFeaturesSetting:
D5 30 60 C1 F0 0D 00 00
Dump final value for PcdCpuFeaturesSetting:
D5 30 60 C1 F0 0D 00 00
:SNC: Socket = 1, Processor = 84
SncConfigMsr = 0xA
SncBaseCsr [0x0] = 0xFFF0082
SncBaseCsr [0x1] = 0x1FE000A2
SncBaseCsr [0x2] = 0xC2
SncBaseCsr [0x3] = 0xE2
SncBaseCsr [0x4] = 0x102
SncConfigCsr = 0xF
Dump final value for PcdCpuFeaturesSetting:
D5 30 60 C1 F0 0D 00 00
Dump final value for PcdCpuFeaturesSetting:
D5 30 60 C1 F0 0D 00 00
:SNC: Socket = 1, Processor = 86
SncConfigMsr = 0xA
SncBaseCsr [0x0] = 0xFFF0082
SncBaseCsr [0x1] = 0x1FE000A2
SncBaseCsr [0x2] = 0xC2
SncBaseCsr [0x3] = 0xE2
SncBaseCsr [0x4] = 0x102
SncConfigCsr = 0xF
Dump final value for PcdCpuFeaturesSetting:
D5 30 60 C1 F0 0D 00 00
Dump final value for PcdCpuFeaturesSetting:
D5 30 60 C1 F0 0D 00 00
:SNC: Socket = 1, Processor = 88
SncConfigMsr = 0xA
SncBaseCsr [0x0] = 0xFFF0082
SncBaseCsr [0x1] = 0x1FE000A2
SncBaseCsr [0x2] = 0xC2
SncBaseCsr [0x3] = 0xE2
SncBaseCsr [0x4] = 0x102
SncConfigCsr = 0xF
Dump final value for PcdCpuFeaturesSetting:
D5 30 60 C1 F0 0D 00 00
Dump final value for PcdCpuFeaturesSetting:
D5 30 60 C1 F0 0D 00 00
:SNC: Socket = 1, Processor = 90
SncConfigMsr = 0xA
SncBaseCsr [0x0] = 0xFFF0082
SncBaseCsr [0x1] = 0x1FE000A2
SncBaseCsr [0x2] = 0xC2
SncBaseCsr [0x3] = 0xE2
SncBaseCsr [0x4] = 0x102
SncConfigCsr = 0xF
Dump final value for PcdCpuFeaturesSetting:
D5 30 60 C1 F0 0D 00 00
Dump final value for PcdCpuFeaturesSetting:
D5 30 60 C1 F0 0D 00 00
:SNC: Socket = 1, Processor = 92
SncConfigMsr = 0xA
SncBaseCsr [0x0] = 0xFFF0082
SncBaseCsr [0x1] = 0x1FE000A2
SncBaseCsr [0x2] = 0xC2
SncBaseCsr [0x3] = 0xE2
SncBaseCsr [0x4] = 0x102
SncConfigCsr = 0xF
Dump final value for PcdCpuFeaturesSetting:
D5 30 60 C1 F0 0D 00 00
Dump final value for PcdCpuFeaturesSetting:
D5 30 60 C1 F0 0D 00 00
:SNC: Socket = 1, Processor = 94
SncConfigMsr = 0xA
SncBaseCsr [0x0] = 0xFFF0082
SncBaseCsr [0x1] = 0x1FE000A2
SncBaseCsr [0x2] = 0xC2
SncBaseCsr [0x3] = 0xE2
SncBaseCsr [0x4] = 0x102
SncConfigCsr = 0xF
Dump final value for PcdCpuFeaturesSetting:
D5 30 60 C1 F0 0D 00 00
Dump final value for PcdCpuFeaturesSetting:
D5 30 60 C1 F0 0D 00 00
:SNC: Socket = 1, Processor = 96
SncConfigMsr = 0xA
SncBaseCsr [0x0] = 0xFFF0082
SncBaseCsr [0x1] = 0x1FE000A2
SncBaseCsr [0x2] = 0xC2
SncBaseCsr [0x3] = 0xE2
SncBaseCsr [0x4] = 0x102
SncConfigCsr = 0xF
Dump final value for PcdCpuFeaturesSetting:
D5 30 60 C1 F0 0D 00 00
Dump final value for PcdCpuFeaturesSetting:
D5 30 60 C1 F0 0D 00 00
:SNC: Socket = 1, Processor = 98
SncConfigMsr = 0xA
SncBaseCsr [0x0] = 0xFFF0082
SncBaseCsr [0x1] = 0x1FE000A2
SncBaseCsr [0x2] = 0xC2
SncBaseCsr [0x3] = 0xE2
SncBaseCsr [0x4] = 0x102
SncConfigCsr = 0xF
Dump final value for PcdCpuFeaturesSetting:
D5 30 60 C1 F0 0D 00 00
Dump final value for PcdCpuFeaturesSetting:
D5 30 60 C1 F0 0D 00 00
:SNC: Socket = 1, Processor = 100
SncConfigMsr = 0xA
SncBaseCsr [0x0] = 0xFFF0082
SncBaseCsr [0x1] = 0x1FE000A2
SncBaseCsr [0x2] = 0xC2
SncBaseCsr [0x3] = 0xE2
SncBaseCsr [0x4] = 0x102
SncConfigCsr = 0xF
Dump final value for PcdCpuFeaturesSetting:
D5 30 60 C1 F0 0D 00 00
Dump final value for PcdCpuFeaturesSetting:
D5 30 60 C1 F0 0D 00 00
:SNC: Socket = 1, Processor = 102
SncConfigMsr = 0xA
SncBaseCsr [0x0] = 0xFFF0082
SncBaseCsr [0x1] = 0x1FE000A2
SncBaseCsr [0x2] = 0xC2
SncBaseCsr [0x3] = 0xE2
SncBaseCsr [0x4] = 0x102
SncConfigCsr = 0xF
Dump final value for PcdCpuFeaturesSetting:
D5 30 60 C1 F0 0D 00 00
Dump final value for PcdCpuFeaturesSetting:
D5 30 60 C1 F0 0D 00 00
:SNC: Socket = 1, Processor = 104
SncConfigMsr = 0xA
SncBaseCsr [0x0] = 0xFFF0082
SncBaseCsr [0x1] = 0x1FE000A2
SncBaseCsr [0x2] = 0xC2
SncBaseCsr [0x3] = 0xE2
SncBaseCsr [0x4] = 0x102
SncConfigCsr = 0xF
Dump final value for PcdCpuFeaturesSetting:
D5 30 60 C1 F0 0D 00 00
Dump final value for PcdCpuFeaturesSetting:
D5 30 60 C1 F0 0D 00 00
:SNC: Socket = 1, Processor = 106
SncConfigMsr = 0xA
SncBaseCsr [0x0] = 0xFFF0082
SncBaseCsr [0x1] = 0x1FE000A2
SncBaseCsr [0x2] = 0xC2
SncBaseCsr [0x3] = 0xE2
SncBaseCsr [0x4] = 0x102
SncConfigCsr = 0xF
Dump final value for PcdCpuFeaturesSetting:
D5 30 60 C1 F0 0D 00 00
Dump final value for PcdCpuFeaturesSetting:
D5 30 60 C1 F0 0D 00 00
:SNC: Socket = 1, Processor = 108
SncConfigMsr = 0xA
SncBaseCsr [0x0] = 0xFFF0082
SncBaseCsr [0x1] = 0x1FE000A2
SncBaseCsr [0x2] = 0xC2
SncBaseCsr [0x3] = 0xE2
SncBaseCsr [0x4] = 0x102
SncConfigCsr = 0xF
Dump final value for PcdCpuFeaturesSetting:
D5 30 60 C1 F0 0D 00 00
Dump final value for PcdCpuFeaturesSetting:
D5 30 60 C1 F0 0D 00 00
:SNC: Socket = 1, Processor = 110
SncConfigMsr = 0xA
SncBaseCsr [0x0] = 0xFFF0082
SncBaseCsr [0x1] = 0x1FE000A2
SncBaseCsr [0x2] = 0xC2
SncBaseCsr [0x3] = 0xE2
SncBaseCsr [0x4] = 0x102
SncConfigCsr = 0xF
Dump final value for PcdCpuFeaturesSetting:
D5 30 60 C1 F0 0D 00 00
Dump final value for PcdCpuFeaturesSetting:
D5 30 60 C1 F0 0D 00 00
:SNC: Socket = 1, Processor = 112
SncConfigMsr = 0xA
SncBaseCsr [0x0] = 0xFFF0082
SncBaseCsr [0x1] = 0x1FE000A2
SncBaseCsr [0x2] = 0xC2
SncBaseCsr [0x3] = 0xE2
SncBaseCsr [0x4] = 0x102
SncConfigCsr = 0xF
Dump final value for PcdCpuFeaturesSetting:
D5 30 60 C1 F0 0D 00 00
Dump final value for PcdCpuFeaturesSetting:
D5 30 60 C1 F0 0D 00 00
:SNC: Socket = 1, Processor = 114
SncConfigMsr = 0xA
SncBaseCsr [0x0] = 0xFFF0082
SncBaseCsr [0x1] = 0x1FE000A2
SncBaseCsr [0x2] = 0xC2
SncBaseCsr [0x3] = 0xE2
SncBaseCsr [0x4] = 0x102
SncConfigCsr = 0xF
Dump final value for PcdCpuFeaturesSetting:
D5 30 60 C1 F0 0D 00 00
Dump final value for PcdCpuFeaturesSetting:
D5 30 60 C1 F0 0D 00 00
:SNC: Socket = 1, Processor = 116
SncConfigMsr = 0xA
SncBaseCsr [0x0] = 0xFFF0082
SncBaseCsr [0x1] = 0x1FE000A2
SncBaseCsr [0x2] = 0xC2
SncBaseCsr [0x3] = 0xE2
SncBaseCsr [0x4] = 0x102
SncConfigCsr = 0xF
Dump final value for PcdCpuFeaturesSetting:
D5 30 60 C1 F0 0D 00 00
Dump final value for PcdCpuFeaturesSetting:
D5 30 60 C1 F0 0D 00 00
:SNC: Socket = 1, Processor = 118
SncConfigMsr = 0xA
SncBaseCsr [0x0] = 0xFFF0082
SncBaseCsr [0x1] = 0x1FE000A2
SncBaseCsr [0x2] = 0xC2
SncBaseCsr [0x3] = 0xE2
SncBaseCsr [0x4] = 0x102
SncConfigCsr = 0xF
Dump final value for PcdCpuFeaturesSetting:
D5 30 60 C1 F0 0D 00 00
Dump final value for PcdCpuFeaturesSetting:
D5 30 60 C1 F0 0D 00 00
:SNC: Socket = 1, Processor = 120
SncConfigMsr = 0xA
SncBaseCsr [0x0] = 0xFFF0082
SncBaseCsr [0x1] = 0x1FE000A2
SncBaseCsr [0x2] = 0xC2
SncBaseCsr [0x3] = 0xE2
SncBaseCsr [0x4] = 0x102
SncConfigCsr = 0xF
Dump final value for PcdCpuFeaturesSetting:
D5 30 60 C1 F0 0D 00 00
Dump final value for PcdCpuFeaturesSetting:
D5 30 60 C1 F0 0D 00 00
:SNC: Socket = 1, Processor = 122
SncConfigMsr = 0xA
SncBaseCsr [0x0] = 0xFFF0082
SncBaseCsr [0x1] = 0x1FE000A2
SncBaseCsr [0x2] = 0xC2
SncBaseCsr [0x3] = 0xE2
SncBaseCsr [0x4] = 0x102
SncConfigCsr = 0xF
Dump final value for PcdCpuFeaturesSetting:
D5 30 60 C1 F0 0D 00 00
Dump final value for PcdCpuFeaturesSetting:
D5 30 60 C1 F0 0D 00 00
:SNC: Socket = 1, Processor = 124
SncConfigMsr = 0xA
SncBaseCsr [0x0] = 0xFFF0082
SncBaseCsr [0x1] = 0x1FE000A2
SncBaseCsr [0x2] = 0xC2
SncBaseCsr [0x3] = 0xE2
SncBaseCsr [0x4] = 0x102
SncConfigCsr = 0xF
Dump final value for PcdCpuFeaturesSetting:
D5 30 60 C1 F0 0D 00 00
Dump final value for PcdCpuFeaturesSetting:
D5 30 60 C1 F0 0D 00 00
:SNC: Socket = 1, Processor = 126
SncConfigMsr = 0xA
SncBaseCsr [0x0] = 0xFFF0082
SncBaseCsr [0x1] = 0x1FE000A2
SncBaseCsr [0x2] = 0xC2
SncBaseCsr [0x3] = 0xE2
SncBaseCsr [0x4] = 0x102
SncConfigCsr = 0xF
Dump final value for PcdCpuFeaturesSetting:
D5 30 60 C1 F0 0D 00 00
Dump final value for PcdCpuFeaturesSetting:
D5 30 60 C1 F0 0D 00 00
:SNC: Socket = 1, Processor = 128
SncConfigMsr = 0xA
SncBaseCsr [0x0] = 0xFFF0082
SncBaseCsr [0x1] = 0x1FE000A2
SncBaseCsr [0x2] = 0xC2
SncBaseCsr [0x3] = 0xE2
SncBaseCsr [0x4] = 0x102
SncConfigCsr = 0xF
Dump final value for PcdCpuFeaturesSetting:
D5 30 60 C1 F0 0D 00 00
Dump final value for PcdCpuFeaturesSetting:
D5 30 60 C1 F0 0D 00 00
:SNC: Socket = 1, Processor = 130
SncConfigMsr = 0xA
SncBaseCsr [0x0] = 0xFFF0082
SncBaseCsr [0x1] = 0x1FE000A2
SncBaseCsr [0x2] = 0xC2
SncBaseCsr [0x3] = 0xE2
SncBaseCsr [0x4] = 0x102
SncConfigCsr = 0xF
Dump final value for PcdCpuFeaturesSetting:
D5 30 60 C1 F0 0D 00 00
Dump final value for PcdCpuFeaturesSetting:
D5 30 60 C1 F0 0D 00 00
:SNC: Socket = 1, Processor = 132
SncConfigMsr = 0xA
SncBaseCsr [0x0] = 0xFFF0082
SncBaseCsr [0x1] = 0x1FE000A2
SncBaseCsr [0x2] = 0xC2
SncBaseCsr [0x3] = 0xE2
SncBaseCsr [0x4] = 0x102
SncConfigCsr = 0xF
Dump final value for PcdCpuFeaturesSetting:
D5 30 60 C1 F0 0D 00 00
Dump final value for PcdCpuFeaturesSetting:
D5 30 60 C1 F0 0D 00 00
:SNC: Socket = 1, Processor = 134
SncConfigMsr = 0xA
SncBaseCsr [0x0] = 0xFFF0082
SncBaseCsr [0x1] = 0x1FE000A2
SncBaseCsr [0x2] = 0xC2
SncBaseCsr [0x3] = 0xE2
SncBaseCsr [0x4] = 0x102
SncConfigCsr = 0xF
Dump final value for PcdCpuFeaturesSetting:
D5 30 60 C1 F0 0D 00 00
Dump final value for PcdCpuFeaturesSetting:
D5 30 60 C1 F0 0D 00 00
:SNC: Socket = 1, Processor = 136
SncConfigMsr = 0xA
SncBaseCsr [0x0] = 0xFFF0082
SncBaseCsr [0x1] = 0x1FE000A2
SncBaseCsr [0x2] = 0xC2
SncBaseCsr [0x3] = 0xE2
SncBaseCsr [0x4] = 0x102
SncConfigCsr = 0xF
Dump final value for PcdCpuFeaturesSetting:
D5 30 60 C1 F0 0D 00 00
Dump final value for PcdCpuFeaturesSetting:
D5 30 60 C1 F0 0D 00 00
:SNC: Socket = 1, Processor = 138
SncConfigMsr = 0xA
SncBaseCsr [0x0] = 0xFFF0082
SncBaseCsr [0x1] = 0x1FE000A2
SncBaseCsr [0x2] = 0xC2
SncBaseCsr [0x3] = 0xE2
SncBaseCsr [0x4] = 0x102
SncConfigCsr = 0xF
Dump final value for PcdCpuFeaturesSetting:
D5 30 60 C1 F0 0D 00 00
Dump final value for PcdCpuFeaturesSetting:
D5 30 60 C1 F0 0D 00 00
:SNC: Socket = 1, Processor = 140
SncConfigMsr = 0xA
SncBaseCsr [0x0] = 0xFFF0082
SncBaseCsr [0x1] = 0x1FE000A2
SncBaseCsr [0x2] = 0xC2
SncBaseCsr [0x3] = 0xE2
SncBaseCsr [0x4] = 0x102
SncConfigCsr = 0xF
Dump final value for PcdCpuFeaturesSetting:
D5 30 60 C1 F0 0D 00 00
Dump final value for PcdCpuFeaturesSetting:
D5 30 60 C1 F0 0D 00 00
:SNC: Socket = 1, Processor = 142
SncConfigMsr = 0xA
SncBaseCsr [0x0] = 0xFFF0082
SncBaseCsr [0x1] = 0x1FE000A2
SncBaseCsr [0x2] = 0xC2
SncBaseCsr [0x3] = 0xE2
SncBaseCsr [0x4] = 0x102
SncConfigCsr = 0xF
Dump final value for PcdCpuFeaturesSetting:
D5 30 60 C1 F0 0D 00 00
Dump final value for PcdCpuFeaturesSetting:
D5 30 60 C1 F0 0D 00 00
:SNC: Socket = 1, Processor = 144
SncConfigMsr = 0xA
SncBaseCsr [0x0] = 0xFFF0082
SncBaseCsr [0x1] = 0x1FE000A2
SncBaseCsr [0x2] = 0xC2
SncBaseCsr [0x3] = 0xE2
SncBaseCsr [0x4] = 0x102
SncConfigCsr = 0xF
Dump final value for PcdCpuFeaturesSetting:
D5 30 60 C1 F0 0D 00 00
Dump final value for PcdCpuFeaturesSetting:
D5 30 60 C1 F0 0D 00 00
:SNC: Socket = 1, Processor = 146
SncConfigMsr = 0xA
SncBaseCsr [0x0] = 0xFFF0082
SncBaseCsr [0x1] = 0x1FE000A2
SncBaseCsr [0x2] = 0xC2
SncBaseCsr [0x3] = 0xE2
SncBaseCsr [0x4] = 0x102
SncConfigCsr = 0xF
Dump final value for PcdCpuFeaturesSetting:
D5 30 60 C1 F0 0D 00 00
Dump final value for PcdCpuFeaturesSetting:
D5 30 60 C1 F0 0D 00 00
:SNC: Socket = 1, Processor = 148
SncConfigMsr = 0xA
SncBaseCsr [0x0] = 0xFFF0082
SncBaseCsr [0x1] = 0x1FE000A2
SncBaseCsr [0x2] = 0xC2
SncBaseCsr [0x3] = 0xE2
SncBaseCsr [0x4] = 0x102
SncConfigCsr = 0xF
Dump final value for PcdCpuFeaturesSetting:
D5 30 60 C1 F0 0D 00 00
Dump final value for PcdCpuFeaturesSetting:
D5 30 60 C1 F0 0D 00 00
:SNC: Socket = 1, Processor = 150
SncConfigMsr = 0xA
SncBaseCsr [0x0] = 0xFFF0082
SncBaseCsr [0x1] = 0x1FE000A2
SncBaseCsr [0x2] = 0xC2
SncBaseCsr [0x3] = 0xE2
SncBaseCsr [0x4] = 0x102
SncConfigCsr = 0xF
Dump final value for PcdCpuFeaturesSetting:
D5 30 60 C1 F0 0D 00 00
Dump final value for PcdCpuFeaturesSetting:
D5 30 60 C1 F0 0D 00 00
:SNC: Socket = 1, Processor = 152
SncConfigMsr = 0xA
SncBaseCsr [0x0] = 0xFFF0082
SncBaseCsr [0x1] = 0x1FE000A2
SncBaseCsr [0x2] = 0xC2
SncBaseCsr [0x3] = 0xE2
SncBaseCsr [0x4] = 0x102
SncConfigCsr = 0xF
Dump final value for PcdCpuFeaturesSetting:
D5 30 60 C1 F0 0D 00 00
Dump final value for PcdCpuFeaturesSetting:
D5 30 60 C1 F0 0D 00 00
:SNC: Socket = 1, Processor = 154
SncConfigMsr = 0xA
SncBaseCsr [0x0] = 0xFFF0082
SncBaseCsr [0x1] = 0x1FE000A2
SncBaseCsr [0x2] = 0xC2
SncBaseCsr [0x3] = 0xE2
SncBaseCsr [0x4] = 0x102
SncConfigCsr = 0xF
Dump final value for PcdCpuFeaturesSetting:
D5 30 60 C1 F0 0D 00 00
Dump final value for PcdCpuFeaturesSetting:
D5 30 60 C1 F0 0D 00 00
:SNC: Socket = 1, Processor = 156
SncConfigMsr = 0xA
SncBaseCsr [0x0] = 0xFFF0082
SncBaseCsr [0x1] = 0x1FE000A2
SncBaseCsr [0x2] = 0xC2
SncBaseCsr [0x3] = 0xE2
SncBaseCsr [0x4] = 0x102
SncConfigCsr = 0xF
Dump final value for PcdCpuFeaturesSetting:
D5 30 60 C1 F0 0D 00 00
Dump final value for PcdCpuFeaturesSetting:
D5 30 60 C1 F0 0D 00 00
:SNC: Socket = 1, Processor = 158
SncConfigMsr = 0xA
SncBaseCsr [0x0] = 0xFFF0082
SncBaseCsr [0x1] = 0x1FE000A2
SncBaseCsr [0x2] = 0xC2
SncBaseCsr [0x3] = 0xE2
SncBaseCsr [0x4] = 0x102
SncConfigCsr = 0xF
Dump final value for PcdCpuFeaturesSetting:
D5 30 60 C1 F0 0D 00 00
Dump final value for PcdCpuFeaturesSetting:
D5 30 60 C1 F0 0D 00 00
PROGRESS CODE: V03020003 I0
PROGRESS CODE: V03020002 I0
This is VMB data Parse Pei
Locate PPI Status : 0
Get Variable Status : 0 CoreMegaBlock : 0
CoreMegaBlock [0x00000000]
SizeBelow1MB [0x00000000]
SizeAbove1MB [0x00000000]
SizeAbove4GB [0x00000000]
BaseBelow1MB [0x00050000]
BaseAbove1MB [0x00100000]
BaseAbove4GB [100000000]
VMBdataDiscovered Ppi installation status: 0
PROGRESS CODE: V03020003 I0
PROGRESS CODE: V03020002 I0
This is Validation Mega block Pei
Blocks Count : 3
MegaBlocks in PEIM ...
VMB[0] Attr[4]Addr[50000]Size[0]
VMB[1] Attr[4]Addr[100000]Size[0]
VMB[2] Attr[4]Addr[100000000]Size[0]
PROGRESS CODE: V03020003 I0
PROGRESS CODE: V03020002 I0
UbaInitPeim: PlatformType=0x16
UbaInitPeim: PlatformType=0x16
UbaInitPeim: PlatformType=0x16
PROGRESS CODE: V03020003 I0
PROGRESS CODE: V03020002 I0
PROGRESS CODE: V03020003 I0
PROGRESS CODE: V03020002 I0
PROGRESS CODE: V03020003 I0
PROGRESS CODE: V03020002 I0
Lt Disabled - Disabling BIOS lock
FiaMuxRecordsCount = 0
FiaMuxRecordsCount = 0
FiaMuxRecordsCount = 0
PROGRESS CODE: V03020003 I0
ME UMA PostMem: SendDramInitDone (): InitStat = 0
[HECI Transport-1 PEI] Send pkt: 80140007
00: F0 01 00 00 00 00 00 00 - 00 00 00 00 00 00 00 00
10: 00 00 00 00
[HECI Transport-1 PEI] Got pkt: 80240007
00: F0 81 00 00 00 00 00 00 - 00 00 00 00 00 00 00 00
10: 00 00 00 00 00 00 00 00 - 00 00 00 00 00 04 00 00
20: 00 00 00 00
ME UMA PostMem: BiosAction = 4
ME UMA PostMem: MeDramInitDone Complete. Checking for reset...
[HECI Transport-1 PEI] Send pkt: 80010020
00: 01
[HECI Transport-1 PEI] Got pkt: 800B0020
00: 81 01 01 1D 92 9F 33 01 - 00 00 00
[HECI Transport-1 PEI] Send pkt: 80140008
00: 00 00 05 00 1F 00 00 00 - 00 00 00 00 00 00 00 00
10: 00 00 00 00
[HECI Transport-1 PEI] Got pkt: 805E0008
00: 00 00 05 00 1F 00 00 00 - 00 00 00 00 4A 00 00 00
10: 00 00 00 00 18 18 06 00 - 00 06 00 01 06 00 02 06
20: 00 03 56 00 04 56 00 05 - 56 00 06 56 00 07 5C 00
30: 08 7C 00 09 55 00 0A 55 - 00 0B 5B 00 0C 55 00 0D
40: 51 00 0E 51 00 0F 47 00 - 10 07 00 11 47 00 12 07
50: 00 13 47 00 14 07 00 15 - 47 00 16 07 00 17
PeiFiaMuxConfigInit: IOExpanders number = 0
PeiFiaMuxConfigInit: Request ME FIA MUX configuration fail with status = Not Ready
[HECI Control-1 PEI][HECI Transport-1 PEI] Send pkt: 80010020
00: 01
[HECI Transport-1 PEI] Got pkt: 800B0020
00: 81 01 01 1D 92 9F 33 01 - 00 00 00
Detected I/O Expanders: 0
IoExpanderInit - End
SDI#0 has HD-Audio device.
SDI#1 has no HD-Audio device.
SDI#2 has no HD-Audio device.
PROGRESS CODE: V03020002 I0
PROGRESS CODE: V03020003 I0
PROGRESS CODE: V03020002 I0
PROGRESS CODE: V03020003 I0
PROGRESS CODE: V03020002 I0
PROGRESS CODE: V03020003 I0
PROGRESS CODE: V03020002 I0
NearTdpLockOcPeimEntryPoint
BootMode = 0
ProcessorLtsxEnable is disabled
PROGRESS CODE: V03020003 I0
PROGRESS CODE: V03020002 I0
PROGRESS CODE: V03020003 I0
PROGRESS CODE: V03020002 I0
PROGRESS CODE: V03020003 I0
PROGRESS CODE: V03020002 I0
[FRU_TDX] _ProgramSeamrr BEGIN
[IP_CORE_MSR] IpCoreMsr3v0_ProgramSeamrr BEGIN
_InternalProgramSeamrr (Unsupported) (0x000)
_InternalProgramSeamrr (Unsupported) (0x002)
_InternalProgramSeamrr (Unsupported) (0x004)
_InternalProgramSeamrr (Unsupported) (0x006)
_InternalProgramSeamrr (Unsupported) (0x008)
_InternalProgramSeamrr (Unsupported) (0x00A)
_InternalProgramSeamrr (Unsupported) (0x00C)
_InternalProgramSeamrr (Unsupported) (0x00E)
_InternalProgramSeamrr (Unsupported) (0x010)
_InternalProgramSeamrr (Unsupported) (0x012)
_InternalProgramSeamrr (Unsupported) (0x014)
_InternalProgramSeamrr (Unsupported) (0x016)
_InternalProgramSeamrr (Unsupported) (0x018)
_InternalProgramSeamrr (Unsupported) (0x01A)
_InternalProgramSeamrr (Unsupported) (0x01C)
_InternalProgramSeamrr (Unsupported) (0x01E)
_InternalProgramSeamrr (Unsupported) (0x020)
_InternalProgramSeamrr (Unsupported) (0x022)
_InternalProgramSeamrr (Unsupported) (0x024)
_InternalProgramSeamrr (Unsupported) (0x026)
_InternalProgramSeamrr (Unsupported) (0x028)
_InternalProgramSeamrr (Unsupported) (0x02A)
_InternalProgramSeamrr (Unsupported) (0x02C)
_InternalProgramSeamrr (Unsupported) (0x02E)
_InternalProgramSeamrr (Unsupported) (0x030)
_InternalProgramSeamrr (Unsupported) (0x032)
_InternalProgramSeamrr (Unsupported) (0x034)
_InternalProgramSeamrr (Unsupported) (0x036)
_InternalProgramSeamrr (Unsupported) (0x038)
_InternalProgramSeamrr (Unsupported) (0x03A)
_InternalProgramSeamrr (Unsupported) (0x03C)
_InternalProgramSeamrr (Unsupported) (0x03E)
_InternalProgramSeamrr (Unsupported) (0x040)
_InternalProgramSeamrr (Unsupported) (0x042)
_InternalProgramSeamrr (Unsupported) (0x044)
_InternalProgramSeamrr (Unsupported) (0x046)
_InternalProgramSeamrr (Unsupported) (0x048)
_InternalProgramSeamrr (Unsupported) (0x04A)
_InternalProgramSeamrr (Unsupported) (0x04C)
_InternalProgramSeamrr (Unsupported) (0x04E)
_InternalProgramSeamrr (Unsupported) (0x050)
_InternalProgramSeamrr (Unsupported) (0x052)
_InternalProgramSeamrr (Unsupported) (0x054)
_InternalProgramSeamrr (Unsupported) (0x056)
_InternalProgramSeamrr (Unsupported) (0x058)
_InternalProgramSeamrr (Unsupported) (0x05A)
_InternalProgramSeamrr (Unsupported) (0x05C)
_InternalProgramSeamrr (Unsupported) (0x05E)
_InternalProgramSeamrr (Unsupported) (0x060)
_InternalProgramSeamrr (Unsupported) (0x062)
_InternalProgramSeamrr (Unsupported) (0x064)
_InternalProgramSeamrr (Unsupported) (0x066)
_InternalProgramSeamrr (Unsupported) (0x068)
_InternalProgramSeamrr (Unsupported) (0x06A)
_InternalProgramSeamrr (Unsupported) (0x06C)
_InternalProgramSeamrr (Unsupported) (0x06E)
_InternalProgramSeamrr (Unsupported) (0x070)
_InternalProgramSeamrr (Unsupported) (0x072)
_InternalProgramSeamrr (Unsupported) (0x074)
_InternalProgramSeamrr (Unsupported) (0x076)
_InternalProgramSeamrr (Unsupported) (0x078)
_InternalProgramSeamrr (Unsupported) (0x07A)
_InternalProgramSeamrr (Unsupported) (0x07C)
_InternalProgramSeamrr (Unsupported) (0x07E)
_InternalProgramSeamrr (Unsupported) (0x080)
_InternalProgramSeamrr (Unsupported) (0x082)
_InternalProgramSeamrr (Unsupported) (0x084)
_InternalProgramSeamrr (Unsupported) (0x086)
_InternalProgramSeamrr (Unsupported) (0x088)
_InternalProgramSeamrr (Unsupported) (0x08A)
_InternalProgramSeamrr (Unsupported) (0x08C)
_InternalProgramSeamrr (Unsupported) (0x08E)
_InternalProgramSeamrr (Unsupported) (0x090)
_InternalProgramSeamrr (Unsupported) (0x092)
_InternalProgramSeamrr (Unsupported) (0x094)
_InternalProgramSeamrr (Unsupported) (0x096)
_InternalProgramSeamrr (Unsupported) (0x098)
_InternalProgramSeamrr (Unsupported) (0x09A)
_InternalProgramSeamrr (Unsupported) (0x09C)
_InternalProgramSeamrr (Unsupported) (0x09E)
[IP_CORE_MSR] IpCoreMsr3v0_ProgramSeamrr END, Unsupported
[FRU_TDX] _ProgramSeamrr END (Unsupported)PROGRESS CODE: V03020003 I0
PROGRESS CODE: V03020002 I0
PROGRESS CODE: V03020003 I0
PROGRESS CODE: V03021001 I0
[SIO] Current system SIO exist bit:10
PROGRESS CODE: V03040003 I0
PDB = c:\efi\servergen2\intel\Build\EagleStreamRpPkg\DEBUG_VS2015x86\X64\ServerPlatformPkg\Universal\TraceHubStatusCodeHandler\RuntimeDxe\TraceHubStatusCodeHandlerRuntimeDxe\DEBUG\TraceHubStatusCodeHandlerRuntimeDxe.pdb
PROGRESS CODE: V03040002 I0
PROGRESS CODE: V03040003 I0
PDB = c:\efi\servergen2\intel\Build\EagleStreamRpPkg\DEBUG_VS2015x86\X64\ServerPlatformPkg\Universal\StatusCodeHandlerUsb\RuntimeDxe\StatusCodeHandlerRuntimeDxeUsb\DEBUG\StatusCodeHandlerRuntimeDxeUsb.pdb
PROGRESS CODE: V03040002 I0
PROGRESS CODE: V03040003 I0
PDB = c:\efi\servergen2\intel\Build\EagleStreamRpPkg\DEBUG_VS2015x86\X64\MdeModulePkg\Universal\Acpi\FirmwarePerformanceDataTableDxe\FirmwarePerformanceDxe\DEBUG\FirmwarePerformanceDxe.pdb
PROGRESS CODE: V03040002 I0
PROGRESS CODE: V03040003 I0
PDB = c:\efi\servergen2\intel\Build\EagleStreamRpPkg\DEBUG_VS2015x86\X64\ShellPkg\DynamicCommand\DpDynamicCommand\DpDynamicCommand\DEBUG\dpDynamicCommand.pdb
PROGRESS CODE: V03040002 I0
PROGRESS CODE: V03040003 I0
PDB = c:\efi\servergen2\intel\Build\EagleStreamRpPkg\DEBUG_VS2015x86\X64\EagleStreamOpenBoardPkg\Uba\BoardInit\Dxe\BoardInitDxe\DEBUG\BoardInitDxe.pdb
PROGRESS CODE: V03040002 I0
PROGRESS CODE: V03040003 I0
PDB = c:\efi\servergen2\intel\Build\EagleStreamRpPkg\DEBUG_VS2015x86\X64\EagleStreamRpPkg\Platform\Dxe\IioCxl2CedtDevIou\IioCxl2SsdtInstallDxe\DEBUG\IioCxl2SsdtInstallDxe.pdb
PROGRESS CODE: V03040002 I0
PROGRESS CODE: V03040003 I0
PDB = c:\efi\servergen2\intel\Build\EagleStreamRpPkg\DEBUG_VS2015x86\X64\ServerRestrictedPkg\VariableSmi\VariableSmiExportHii\DEBUG\VariableSmiExportHii.pdb
PROGRESS CODE: V03040002 I0
PROGRESS CODE: V03040003 I0
PDB = c:\efi\servergen2\intel\Build\EagleStreamRpPkg\DEBUG_VS2015x86\X64\ServerPlatformPkg\Platform\Dxe\ConsoleBdsUpdateDxe\ConsoleBdsUpdateDxe\DEBUG\ConsoleBdsUpdateDxe.pdb
PROGRESS CODE: V03040002 I0
PROGRESS CODE: V03040003 I0
PDB = c:\efi\servergen2\intel\Build\EagleStreamRpPkg\DEBUG_VS2015x86\X64\PrmPkg\PrmSsdtInstallDxe\PrmSsdtInstallDxe\DEBUG\PrmSsdtInstallDxe.pdb
PROGRESS CODE: V03040002 I0
PROGRESS CODE: V03040003 I0
PDB = c:\efi\servergen2\intel\Build\EagleStreamRpPkg\DEBUG_VS2015x86\X64\ServerPlatformPkg\Features\PrmPlatformSample\PrmSampleSsdtDxe\PrmSampleSsdtDxe\DEBUG\PrmSampleSsdtDxe.pdb
PROGRESS CODE: V03040002 I0
PROGRESS CODE: V03040003 I0
PDB = c:\efi\servergen2\intel\Build\EagleStreamRpPkg\DEBUG_VS2015x86\X64\ServerPlatformPkg\Features\PrmPeLoader\PrmPeLoaderConfigDxe\PrmPeLoaderConfigDxe\DEBUG\PrmPeLoaderConfigDxe.pdb
PROGRESS CODE: V03040002 I0
[PRM CONFIG] Entry
Error: Image at 0006B82B000 start failed: Unsupported
PDB = c:\efi\servergen2\intel\Build\EagleStreamRpPkg\DEBUG_VS2015x86\X64\ServerPlatformPkg\Features\PrmPeLoader\PrmPeLoaderConfigDxe\PrmPeLoaderConfigDxe\DEBUG\PrmPeLoaderConfigDxe.pdb
PROGRESS CODE: V03040003 I0
PDB = c:\efi\servergen2\intel\Build\EagleStreamRpPkg\DEBUG_VS2015x86\X64\MdeModulePkg\Universal\SetupBrowserDxe\SetupBrowserDxe\DEBUG\SetupBrowser.pdb
PROGRESS CODE: V03040002 I0
PROGRESS CODE: V03040003 I0
PDB = c:\efi\servergen2\intel\Build\EagleStreamRpPkg\DEBUG_VS2015x86\X64\MdeModulePkg\Universal\SmbiosMeasurementDxe\SmbiosMeasurementDxe\DEBUG\SmbiosMeasurementDxe.pdb
PROGRESS CODE: V03040002 I0
PROGRESS CODE: V03040003 I0
PDB = c:\efi\servergen2\intel\Build\EagleStreamRpPkg\DEBUG_VS2015x86\X64\ServerSiliconPkg\Universal\Dxe\CxlInit\CxlCedt\CxlCedt\DEBUG\CxlCedt.pdb
PROGRESS CODE: V03040002 I0
PROGRESS CODE: V03040003 I0
PDB = c:\efi\servergen2\intel\Build\EagleStreamRpPkg\DEBUG_VS2015x86\X64\ServerSiliconPkg\Universal\Dxe\OobMsmDxe\OobMsmDxe\DEBUG\OobMsmDxeDriver.pdb
PROGRESS CODE: V03040002 I0
PROGRESS CODE: V03040003 I0
PDB = c:\efi\servergen2\intel\Build\EagleStreamRpPkg\DEBUG_VS2015x86\X64\ClientOneSiliconPkg\Product\EagleStream\SiInit\Dxe\SiInitDxe\DEBUG\SiInitDxe.pdb
PROGRESS CODE: V03040002 I0
PROGRESS CODE: V03040003 I0
PDB = c:\efi\servergen2\intel\Build\EagleStreamRpPkg\DEBUG_VS2015x86\X64\ClientOneSiliconPkg\IpBlock\Smbus\Dxe\SmbusDxe\DEBUG\SmbusDxe.pdb
PROGRESS CODE: V03040002 I0
PROGRESS CODE: V03040003 I0
PDB = c:\efi\servergen2\intel\Build\EagleStreamRpPkg\DEBUG_VS2015x86\X64\ClientOneSiliconPkg\IpBlock\Wdt\Dxe\WdtDxe\DEBUG\WdtDxe.pdb
PROGRESS CODE: V03040002 I0
PROGRESS CODE: V03040003 I0
PDB = c:\efi\servergen2\intel\Build\EagleStreamRpPkg\DEBUG_VS2015x86\X64\ClientOneSiliconPkg\IpBlock\Sps\Heci\HeciAccess\DxeSmm\HeciAccessDxe\DEBUG\HeciAccessDxe.pdb
PROGRESS CODE: V03040002 I0
PROGRESS CODE: V03040003 I0
PDB = c:\efi\servergen2\intel\Build\EagleStreamRpPkg\DEBUG_VS2015x86\X64\ClientOneSiliconPkg\Fru\EbgPch\PchInit\GpioV2ProtocolInit\Dxe\GpioV2ProtocolInitDxe\DEBUG\GpioV2ProtocolInitDxe.pdb
PROGRESS CODE: V03040002 I0
PROGRESS CODE: V03040003 I0
PDB = c:\efi\servergen2\intel\Build\EagleStreamRpPkg\DEBUG_VS2015x86\X64\EagleStreamOpenBoardPkg\Uba\UbaMain\Common\Dxe\SystemBoardInfoDxe\SystemBoardInfoDxe\DEBUG\SystemBoardInfo.pdb
PROGRESS CODE: V03040002 I0
PROGRESS CODE: V03040003 I0
PDB = c:\efi\servergen2\intel\Build\EagleStreamRpPkg\DEBUG_VS2015x86\X64\EagleStreamOpenBoardPkg\Uba\UbaMain\Common\Dxe\SystemConfigUpdateDxe\SystemConfigUpdateDxe\DEBUG\SystemConfigUpdate.pdb
PROGRESS CODE: V03040002 I0
PROGRESS CODE: V03040003 I0
PDB = c:\efi\servergen2\intel\Build\EagleStreamRpPkg\DEBUG_VS2015x86\X64\EagleStreamOpenBoardPkg\Uba\UbaMain\TypeArcherCityRP\Dxe\StaticSkuDataDxe\StaticSkuDataDxe\DEBUG\StaticSkuDataDxeArcherCityRP.pdb
PROGRESS CODE: V03040002 I0
PROGRESS CODE: V03040003 I0
PDB = c:\efi\servergen2\intel\Build\EagleStreamRpPkg\DEBUG_VS2015x86\X64\EagleStreamOpenBoardPkg\Uba\UbaMain\TypeArcherCityRP\Dxe\SetupCfgUpdateDxe\SetupCfgUpdateDxe\DEBUG\SetupConfigUpdateDxeArcherCityRP.pdb
PROGRESS CODE: V03040002 I0
PROGRESS CODE: V03040003 I0
PDB = c:\efi\servergen2\intel\Build\EagleStreamRpPkg\DEBUG_VS2015x86\X64\EagleStreamOpenBoardPkg\Uba\UbaMain\TypeArcherCityRP\Dxe\SmbiosDataUpdateDxe\SmbiosDataUpdateDxe\DEBUG\SmbiosDataUpdateDxeArcherCityRP.pdb
PROGRESS CODE: V03040002 I0
UBA:SmbiosDataUpdateEntry Image GUID=09813137-B2A5-4462-8A2A-48F77ECA31BF
PROGRESS CODE: V03040003 I0
PDB = c:\efi\servergen2\intel\Build\EagleStreamRpPkg\DEBUG_VS2015x86\X64\EagleStreamOpenBoardPkg\Uba\UbaMain\TypeArcherCityRP\Dxe\UsbOcUpdateDxe\UsbOcUpdateDxe\DEBUG\UsbOcUpdateDxeArcherCityRP.pdb
PROGRESS CODE: V03040002 I0
PROGRESS CODE: V03040003 I0
PDB = c:\efi\servergen2\intel\Build\EagleStreamRpPkg\DEBUG_VS2015x86\X64\ServerPlatformPkg\Platform\Dxe\PlatformType\PlatformType\DEBUG\PlatformType.pdb
PROGRESS CODE: V03040002 I0
PROGRESS CODE: V03040003 I0
PDB = c:\efi\servergen2\intel\Build\EagleStreamRpPkg\DEBUG_VS2015x86\X64\ServerPlatformPkg\Platform\Dxe\PlatformEarlyDxe\PlatformEarlyDxe\DEBUG\PlatformEarlyDxe.pdb
PROGRESS CODE: V03040002 I0
PROGRESS CODE: V03040003 I0
PDB = c:\efi\servergen2\intel\Build\EagleStreamRpPkg\DEBUG_VS2015x86\X64\ServerPlatformPkg\Platform\Dxe\OtaDxe\OtaDxe\DEBUG\OtaDxeDriver.pdb
PROGRESS CODE: V03040002 I0
[OtaDxe.c] OtaDxeDriverEntry() {
[OtaDxe.c] OtaDxeDriverEntry() -> Create OTA Event
[OtaDxe.c] OtaDxeDriverEntry() -> OTA Event creation: Success
[OtaDxe.c] OtaDxeDriverEntry() } Success
PROGRESS CODE: V03040003 I0
PDB = c:\efi\servergen2\intel\Build\EagleStreamRpPkg\DEBUG_VS2015x86\X64\ServerSecurityPkg\Pfr\Restricted\DebugTool\PxdDxe\DEBUG\PxdDxeDriver.pdb
PROGRESS CODE: V03040002 I0
[PxdDxe.c] PxdDxeDriverEntry() {
[PxdDxe.c] PxdDxeDriverEntry() } Success
PROGRESS CODE: V03040003 I0
PDB = c:\efi\servergen2\intel\Build\EagleStreamRpPkg\DEBUG_VS2015x86\X64\UefiCpuPkg\CpuDxe\CpuDxe\DEBUG\CpuDxe.pdb
PROGRESS CODE: V03040002 I0
ConvertPages: failed to find range A0000 - FFFFF
ConvertPages: failed to find range 77800000 - 7FFFFFFF
ConvertPages: failed to find range FC800000 - FE00FFFF
ConvertPages: failed to find range FE010000 - FE010FFF
ConvertPages: failed to find range FE011000 - FE7FFFFF
ConvertPages: failed to find range FEC00000 - FEC00FFF
ConvertPages: failed to find range FEC80000 - FED00FFF
PROGRESS CODE: V03040003 I0
PDB = c:\efi\servergen2\intel\Build\EagleStreamRpPkg\DEBUG_VS2015x86\X64\ServerPlatformPkg\Features\Bmc\PlatformHookSpiAccess\PlatformHookSpiAccessDxe\DEBUG\PlatformHookSpiAccessDxe.pdb
PROGRESS CODE: V03040002 I0
PROGRESS CODE: V03040003 I0
PDB = c:\efi\servergen2\intel\Build\EagleStreamRpPkg\DEBUG_VS2015x86\X64\MdeModulePkg\Universal\BdsDxe\BdsDxe\DEBUG\BdsDxe.pdb
PROGRESS CODE: V03040002 I0
PROGRESS CODE: V03040003 I0
PDB = c:\efi\servergen2\intel\Build\EagleStreamRpPkg\DEBUG_VS2015x86\X64\ServerPlatformPkg\Platform\Dxe\Hsti\HstiIhvProviderDxe\HstiIhvProviderDxeEGS\DEBUG\HstiIhvProviderDxeEGS.pdb
PROGRESS CODE: V03040002 I0
PROGRESS CODE: V03040003 I0
PDB = c:\efi\servergen2\intel\Build\EagleStreamRpPkg\DEBUG_VS2015x86\X64\MdeModulePkg\Universal\Acpi\S3SaveStateDxe\S3SaveStateDxe\DEBUG\S3SaveStateDxe.pdb
PROGRESS CODE: V03040002 I0
PROGRESS CODE: V03040003 I0
PDB = c:\efi\servergen2\intel\Build\EagleStreamRpPkg\DEBUG_VS2015x86\X64\ServerPlatformPkg\Platform\Dxe\PlatformFirmwareVersionInfoDxe\PlatformFirmwareVersionInfoDxe\DEBUG\PlatformFirmwareVersionInfo.pdb
PROGRESS CODE: V03040002 I0
PROGRESS CODE: V03040003 I0
PDB = c:\efi\servergen2\intel\Build\EagleStreamRpPkg\DEBUG_VS2015x86\X64\ServerPlatformPkg\Features\Acpi\BmcAcpiDxe\BmcAcpiDxe\DEBUG\BmcAcpiDxe.pdb
PROGRESS CODE: V03040002 I0
PROGRESS CODE: V03040003 I0
PDB = c:\efi\servergen2\intel\Build\EagleStreamRpPkg\DEBUG_VS2015x86\X64\ClientOneSiliconPkg\IpBlock\Me\ResetHandler\Dxe\ResetHandler\DEBUG\ResetHandler.pdb
PROGRESS CODE: V03040002 I0
PROGRESS CODE: V03040003 I0
PDB = c:\efi\servergen2\intel\Build\EagleStreamRpPkg\DEBUG_VS2015x86\X64\ServerRasPkg\Driver\Dxe\CrashLogDxe\CrashLogDxe\DEBUG\CrashLogDxe.pdb
PROGRESS CODE: V03040002 I0
Reading CPU 0 WatcherCfgBlk->Data64[0x0] = 0x10000700 address = 0xC6B57000!
Reading CPU 0 WatcherCfgBlk->Data64[0x1] = 0x0 address = 0xC6B57008!
Reading CPU 0 WatcherCfgBlk->Data64[0x0] = 0x10000700 address = 0xC6B57000!
Reading CPU 0 WatcherCfgBlk->Data64[0x1] = 0x0 address = 0xC6B57008!
Writing CPU 0 WatcherCfgBlk->Data64[0x0] = 0x10000700! address = 0xC6B57000
Writing CPU 0 WatcherCfgBlk->Data64[0x1] = 0x0! address = 0xC6B57008
Reading CPU 0 WatcherCfgBlk->Data64[0x0] = 0x10000700 address = 0xC6B57000!
Reading CPU 0 WatcherCfgBlk->Data64[0x1] = 0x0 address = 0xC6B57008!
Reading CPU 1 WatcherCfgBlk->Data64[0x0] = 0x10000700 address = 0xF9B57000!
Reading CPU 1 WatcherCfgBlk->Data64[0x1] = 0x0 address = 0xF9B57008!
Reading CPU 1 WatcherCfgBlk->Data64[0x0] = 0x10000700 address = 0xF9B57000!
Reading CPU 1 WatcherCfgBlk->Data64[0x1] = 0x0 address = 0xF9B57008!
Writing CPU 1 WatcherCfgBlk->Data64[0x0] = 0x10000700! address = 0xF9B57000
Writing CPU 1 WatcherCfgBlk->Data64[0x1] = 0x0! address = 0xF9B57008
Reading CPU 1 WatcherCfgBlk->Data64[0x0] = 0x10000700 address = 0xF9B57000!
Reading CPU 1 WatcherCfgBlk->Data64[0x1] = 0x0 address = 0xF9B57008!
Reading CPU 0 WatcherCfgBlk->Data64[0x0] = 0x10000700 address = 0xC6B57000!
Reading CPU 0 WatcherCfgBlk->Data64[0x1] = 0x0 address = 0xC6B57008!
Socket 0 entry 0 CrashDump_Complete is not set in CPU CrashLog Discovery Header!
Socket 0 entry 1 CrashDump_Complete is not set in CPU CrashLog Discovery Header!
Socket 0 entry 2 CrashDump_Complete is not set in CPU CrashLog Discovery Header!
Socket 0 entry 3 CrashDump_Complete is not set in CPU CrashLog Discovery Header!
Socket 0 entry 4 CrashDump_Complete is not set in CPU CrashLog Discovery Header!
Socket 0 entry 5 CrashDump_Complete is not set in CPU CrashLog Discovery Header!
Socket 0 entry 6 CrashDump_Complete is not set in CPU CrashLog Discovery Header!
Unknown AccessType = F !
can't get CPU CrashLog Region Address and size !
Reading CPU 1 WatcherCfgBlk->Data64[0x0] = 0x10000700 address = 0xF9B57000!
Reading CPU 1 WatcherCfgBlk->Data64[0x1] = 0x0 address = 0xF9B57008!
Socket 1 entry 0 CrashDump_Complete is not set in CPU CrashLog Discovery Header!
Socket 1 entry 1 CrashDump_Complete is not set in CPU CrashLog Discovery Header!
Socket 1 entry 2 CrashDump_Complete is not set in CPU CrashLog Discovery Header!
Socket 1 entry 3 CrashDump_Complete is not set in CPU CrashLog Discovery Header!
Unknown AccessType = F !
can't get CPU CrashLog Region Address and size !
Unknown AccessType = F !
can't get CPU CrashLog Region Address and size !
Unknown AccessType = F !
can't get CPU CrashLog Region Address and size !
Unknown AccessType = F !
can't get CPU CrashLog Region Address and size !
PchCrashLogDiscovery - first DWORD of Record 0 is Zero
PchCrashLogDiscovery - first DWORD of Record 1 is Zero
PchCrashLogDiscovery - first DWORD of Record 2 is Zero
PROGRESS CODE: V03040003 I0
PDB = c:\efi\servergen2\intel\Build\EagleStreamRpPkg\DEBUG_VS2015x86\X64\ServerRasPkg\Driver\Dxe\RasMiscDxe\RasMiscDxe\DEBUG\RasMiscDxe.pdb
PROGRESS CODE: V03040002 I0
PROGRESS CODE: V03040003 I0
PDB = c:\efi\servergen2\intel\Build\EagleStreamRpPkg\DEBUG_VS2015x86\X64\MdeModulePkg\Universal\PlatformDriOverrideDxe\PlatformDriOverrideDxe\DEBUG\PlatDriOverrideDxe.pdb
PROGRESS CODE: V03040002 I0
PROGRESS CODE: V03040003 I0
PDB = c:\efi\servergen2\intel\Build\EagleStreamRpPkg\DEBUG_VS2015x86\X64\MdeModulePkg\Universal\DisplayEngineDxe\DisplayEngineDxe\DEBUG\DisplayEngine.pdb
PROGRESS CODE: V03040002 I0
PROGRESS CODE: V03040003 I0
PDB = c:\efi\servergen2\intel\Build\EagleStreamRpPkg\DEBUG_VS2015x86\X64\NetworkPkg\TlsAuthConfigDxe\TlsAuthConfigDxe\DEBUG\TlsAuthConfigDxe.pdb
PROGRESS CODE: V03040002 I0
PROGRESS CODE: V03040003 I0
PDB = c:\efi\servergen2\intel\Build\EagleStreamRpPkg\DEBUG_VS2015x86\X64\ServerSiliconPkg\Universal\Dxe\CxlInit\MemMap\CxlDxe\DEBUG\CxlDxe.pdb
PROGRESS CODE: V03040002 I0
PROGRESS CODE: V03040003 I0
PDB = c:\efi\servergen2\intel\Build\EagleStreamRpPkg\DEBUG_VS2015x86\X64\ServerSiliconPkg\Universal\Dxe\HbmMemMap\HbmMemMap\DEBUG\HbmMemMap.pdb
PROGRESS CODE: V03040002 I0
PROGRESS CODE: V03040003 I0
PDB = c:\efi\servergen2\intel\Build\EagleStreamRpPkg\DEBUG_VS2015x86\X64\ClientOneSiliconPkg\IpBlock\Me\HeciTransport\DxeSmm\HeciTransportDxe\DEBUG\HeciTransportDxe.pdb
PROGRESS CODE: V03040002 I0
PROGRESS CODE: V03040003 I0
PDB = c:\efi\servergen2\intel\Build\EagleStreamRpPkg\DEBUG_VS2015x86\X64\ServerSiliconPkg\Me\Client\ClientCore\Dxe\ClientCore\DEBUG\ClientCore.pdb
PROGRESS CODE: V03040002 I0
PROGRESS CODE: V03040003 I0
PDB = c:\efi\servergen2\intel\Build\EagleStreamRpPkg\DEBUG_VS2015x86\X64\PcAtChipsetPkg\HpetTimerDxe\HpetTimerDxe\DEBUG\HpetTimerDxe.pdb
PROGRESS CODE: V03040002 I0
PROGRESS CODE: V03040003 I0
PDB = c:\efi\servergen2\intel\Build\EagleStreamRpPkg\DEBUG_VS2015x86\X64\UefiCpuPkg\CpuS3DataDxe\CpuS3DataDxe\DEBUG\CpuS3DataDxe.pdb
PROGRESS CODE: V03040002 I0
PROGRESS CODE: V03040003 I0
PDB = c:\efi\servergen2\intel\Build\EagleStreamRpPkg\DEBUG_VS2015x86\X64\ServerPlatformPkg\Features\Pci\Dxe\PciHostBridge\PciHostBridgeSpr\DEBUG\PciHostBridge.pdb
PROGRESS CODE: V03040002 I0
PROGRESS CODE: V03040003 I0
PDB = c:\efi\servergen2\intel\Build\EagleStreamRpPkg\DEBUG_VS2015x86\X64\ServerPlatformPkg\Platform\Dxe\Hsti\HstiIbvPlatformDxe\HstiIbvPlatformDxe\DEBUG\HstiPlatformDxe.pdb
PROGRESS CODE: V03040002 I0
PROGRESS CODE: V03040003 I0
PDB = c:\efi\servergen2\intel\Build\EagleStreamRpPkg\DEBUG_VS2015x86\X64\ServerPlatformPkg\Features\Cpu\Dxe\GetCpuInfo\GetCpuInfo\DEBUG\GetCpuInfo.pdb
PROGRESS CODE: V03040002 I0
PROGRESS CODE: V03040003 I0
PDB = c:\efi\servergen2\intel\Build\EagleStreamRpPkg\DEBUG_VS2015x86\X64\ServerPlatformPkg\Restricted\Overclocking\NearTDPClearOc\NearTDPClearOc\DEBUG\NearTDPClearOc.pdb
PROGRESS CODE: V03040002 I0
PROGRESS CODE: V03040003 I0
PDB = c:\efi\servergen2\intel\Build\EagleStreamRpPkg\DEBUG_VS2015x86\X64\MicrocodeUpdateFeaturePkg\MicrocodeUtility\MicrocodeUtilityDxe\DEBUG\MicrocodeUtilityDxe.pdb
PROGRESS CODE: V03040002 I0
Microcode utility not supported.
PROGRESS CODE: V03040003 I0
PDB = c:\efi\servergen2\intel\Build\EagleStreamRpPkg\DEBUG_VS2015x86\X64\MicrocodeUpdateFeaturePkg\MicrocodeUtility\MicrocodeUtilityDxe\DEBUG\MicrocodeUtilityDxe.pdb
PROGRESS CODE: V03040002 I0
Microcode utility not supported.
PROGRESS CODE: V03040003 I0
PDB = c:\efi\servergen2\intel\Build\EagleStreamRpPkg\DEBUG_VS2015x86\X64\ClientOneSiliconPkg\Fru\EbgPch\PchInit\Dxe\PchInitDxe\DEBUG\PchInitDxeEbg.pdb
PROGRESS CODE: V03040002 I0
PROGRESS CODE: V03040003 I0
PDB = c:\efi\servergen2\intel\Build\EagleStreamRpPkg\DEBUG_VS2015x86\X64\ServerSiliconPkg\Universal\Smm\Access\SmmAccess\DEBUG\SmmAccess.pdb
PROGRESS CODE: V03040002 I0
PROGRESS CODE: V03040003 I0
PDB = c:\efi\servergen2\intel\Build\EagleStreamRpPkg\DEBUG_VS2015x86\X64\ClientOneSiliconPkg\IpBlock\Sps\Heci\HeciControl\DxeSmm\HeciControlDxe\DEBUG\HeciControlDxe.pdb
PROGRESS CODE: V03040002 I0
Initialization is allowed
Initialization is allowed
PROGRESS CODE: V03040003 I0
PDB = c:\efi\servergen2\intel\Build\EagleStreamRpPkg\DEBUG_VS2015x86\X64\MdeModulePkg\Universal\WatchdogTimerDxe\WatchdogTimer\DEBUG\WatchdogTimer.pdb
PROGRESS CODE: V03040002 I0
PROGRESS CODE: V03040003 I0
PDB = c:\efi\servergen2\intel\Build\EagleStreamRpPkg\DEBUG_VS2015x86\X64\ServerPlatformPkg\Platform\SpiFvbServices\PlatformSpi\DEBUG\FwBlockService.pdb
PROGRESS CODE: V03040002 I0
FvImage on FvHandle 6AEA4C98 and 769B0518 has the same FvNameGuid 27A72E80-3118-4C0C-8673-AA5B4EFA9613.
FvImage on FvHandle 6AEA4718 and 769A6818 has the same FvNameGuid 5A515240-D1F1-4C58-9590-27B1F0E86827.
FvImage on FvHandle 6AEA3918 and 769A9A18 has the same FvNameGuid D2C29BA7-3809-480F-9C3D-DE389C61425A.
FvImage on FvHandle 6AE7CD18 and 769B0618 has the same FvNameGuid 6522280D-28F9-4131-ADC4-F40EBFA45864.
PROGRESS CODE: V03040003 I0
PDB = c:\efi\servergen2\intel\Build\EagleStreamRpPkg\DEBUG_VS2015x86\X64\ServerPlatformPkg\Features\Pci\Dxe\PciPlatform\PciPlatform\DEBUG\PciPlatform.pdb
PROGRESS CODE: V03040002 I0
PROGRESS CODE: V03040003 I0
PDB = c:\efi\servergen2\intel\Build\EagleStreamRpPkg\DEBUG_VS2015x86\X64\IntelSiliconPkg\Feature\VTd\IntelVTdDxe\IntelVTdDxe\DEBUG\IntelVTdDxe.pdb
PROGRESS CODE: V03040002 I0
Error: Image at 0006AE0B000 start failed: Unsupported
PDB = c:\efi\servergen2\intel\Build\EagleStreamRpPkg\DEBUG_VS2015x86\X64\IntelSiliconPkg\Feature\VTd\IntelVTdDxe\IntelVTdDxe\DEBUG\IntelVTdDxe.pdb
PROGRESS CODE: V03040003 I0
PDB = c:\efi\servergen2\intel\Build\EagleStreamRpPkg\DEBUG_VS2015x86\X64\ClientOneSiliconPkg\IpBlock\Sps\Heci\HeciLegacyDxe\HeciLegacyDxe\DEBUG\HeciLegacyDxe.pdb
PROGRESS CODE: V03040002 I0
PROGRESS CODE: V03040003 I0
PDB = c:\efi\servergen2\intel\Build\EagleStreamRpPkg\DEBUG_VS2015x86\X64\MdeModulePkg\Core\PiSmmCore\PiSmmIpl\DEBUG\PiSmmIpl.pdb
PROGRESS CODE: V03040002 I0
ConvertPages: failed to find range 78000000 - 7FFFFFFF
PDB = c:\efi\servergen2\intel\Build\EagleStreamRpPkg\DEBUG_VS2015x86\X64\MdeModulePkg\Core\PiSmmCore\PiSmmCore\DEBUG\PiSmmCore.pdb
[SIO] Current system SIO exist bit:10
PROGRESS CODE: V03040003 I0
PDB = c:\efi\servergen2\intel\Build\EagleStreamRpPkg\DEBUG_VS2015x86\X64\ServerSiliconPkg\Universal\Smm\CsrPseudoOffsetInit\CsrPseudoOffsetInitSmm\DEBUG\CsrPseudoOffsetInitSmm.pdb
PDB = c:\efi\servergen2\intel\Build\EagleStreamRpPkg\DEBUG_VS2015x86\X64\ServerSiliconPkg\Universal\Smm\SiliconDataInit\SiliconDataInitSmm\DEBUG\SiliconDataInitSmm.pdb
PDB = c:\efi\servergen2\intel\Build\EagleStreamRpPkg\DEBUG_VS2015x86\X64\ServerSiliconPkg\Universal\Smm\SpdPlatformInfoSmm\SpdPlatformInfoSmm\DEBUG\SpdPlatformInfoSmm.pdb
PDB = c:\efi\servergen2\intel\Build\EagleStreamRpPkg\DEBUG_VS2015x86\X64\MdeModulePkg\Universal\ReportStatusCodeRouter\Smm\ReportStatusCodeRouterSmm\DEBUG\ReportStatusCodeRouterSmm.pdb
PDB = c:\efi\servergen2\intel\Build\EagleStreamRpPkg\DEBUG_VS2015x86\X64\MdeModulePkg\Universal\Variable\RuntimeDxe\VariableSmm\DEBUG\VariableSmm.pdb
PDB = c:\efi\servergen2\intel\Build\EagleStreamRpPkg\DEBUG_VS2015x86\X64\UefiCpuPkg\CpuIo2Smm\CpuIo2Smm\DEBUG\CpuIo2Smm.pdb
PDB = c:\efi\servergen2\intel\Build\EagleStreamRpPkg\DEBUG_VS2015x86\X64\MdeModulePkg\Universal\LockBox\SmmLockBox\SmmLockBox\DEBUG\SmmLockBox.pdb
PDB = c:\efi\servergen2\intel\Build\EagleStreamRpPkg\DEBUG_VS2015x86\X64\CpRcPkg\Universal\RegAccess\Smm\RegAccessSMM\DEBUG\RegAccessSMM.pdb
PDB = c:\efi\servergen2\intel\Build\EagleStreamRpPkg\DEBUG_VS2015x86\X64\ServerPlatformPkg\Universal\TraceHubStatusCodeHandler\Smm\TraceHubStatusCodeHandlerSmm\DEBUG\TraceHubStatusCodeHandlerSmm.pdb
PDB = c:\efi\servergen2\intel\Build\EagleStreamRpPkg\DEBUG_VS2015x86\X64\MdeModulePkg\Universal\Acpi\FirmwarePerformanceDataTableSmm\FirmwarePerformanceSmm\DEBUG\FirmwarePerformanceSmm.pdb
PDB = c:\efi\servergen2\intel\Build\EagleStreamRpPkg\DEBUG_VS2015x86\X64\ServerPlatformPkg\Features\Variable\PlatformVariable\Smm\PlatformSecureVariableSmm\DEBUG\PlatformSecureVariableSmm.pdb
PDB = c:\efi\servergen2\intel\Build\EagleStreamRpPkg\DEBUG_VS2015x86\X64\ServerSiliconPkg\Universal\Dxe\CpuCsrAccess\CpuCsrAccessSMM\DEBUG\CpuCsrAccessSMM.pdb
PDB = c:\efi\servergen2\intel\Build\EagleStreamRpPkg\DEBUG_VS2015x86\X64\ClientOneSiliconPkg\IpBlock\Smbus\Smm\SmbusSmm\DEBUG\SmbusSmm.pdb
PDB = c:\efi\servergen2\intel\Build\EagleStreamRpPkg\DEBUG_VS2015x86\X64\ClientOneSiliconPkg\IpBlock\Sps\Heci\HeciAccess\DxeSmm\HeciAccessSmm\DEBUG\HeciAccessSmm.pdb
PDB = c:\efi\servergen2\intel\Build\EagleStreamRpPkg\DEBUG_VS2015x86\X64\MdeModulePkg\Universal\StatusCodeHandler\Smm\StatusCodeHandlerSmm\DEBUG\StatusCodeHandlerSmm.pdb
PROGRESS CODE: V03070003 I0
PDB = c:\efi\servergen2\intel\Build\EagleStreamRpPkg\DEBUG_VS2015x86\X64\ServerPlatformPkg\Features\Bmc\PlatformHookSpiAccess\PlatformHookSpiAccessSmm\DEBUG\PlatformHookSpiAccessSmm.pdb
PROGRESS CODE: V03070002 I0
PROGRESS CODE: V03070003 I0
PDB = c:\efi\servergen2\intel\Build\EagleStreamRpPkg\DEBUG_VS2015x86\X64\ClientOneSiliconPkg\IpBlock\Me\HeciTransport\DxeSmm\HeciTransportSmm\DEBUG\HeciTransportSmm.pdb
PROGRESS CODE: V03070002 I0
PROGRESS CODE: V03070003 I0
PDB = c:\efi\servergen2\intel\Build\EagleStreamRpPkg\DEBUG_VS2015x86\X64\ClientOneSiliconPkg\IpBlock\Sps\Heci\HeciControl\DxeSmm\HeciControlSmm\DEBUG\HeciControlSmm.pdb
PROGRESS CODE: V03070002 I0
Initialization is allowed
Initialization is allowed
PROGRESS CODE: V03070003 I0
PDB = c:\efi\servergen2\intel\Build\EagleStreamRpPkg\DEBUG_VS2015x86\X64\ServerSiliconPkg\Universal\Dxe\PmemResetNotify\PmemResetNotify\DEBUG\PmemResetNotify.pdb
PROGRESS CODE: V03040002 I0
[PMem](DXE) PMem Always-ON 12v support disabled
[PMem](DXE) PMem reset notification driver init failed (status Aborted)
Error: Image at 00076AD7000 start failed: Aborted
PDB = c:\efi\servergen2\intel\Build\EagleStreamRpPkg\DEBUG_VS2015x86\X64\ServerSiliconPkg\Universal\Dxe\PmemResetNotify\PmemResetNotify\DEBUG\PmemResetNotify.pdb
PROGRESS CODE: V03040003 I0
PDB = c:\efi\servergen2\intel\Build\EagleStreamRpPkg\DEBUG_VS2015x86\X64\ServerSiliconPkg\Universal\Dxe\CrystalRidge\CrystalRidgeMeasurement\DEBUG\CrystalRidgeMeasurement.pdb
PROGRESS CODE: V03040002 I0
PROGRESS CODE: V03040003 I0
PDB = c:\efi\servergen2\intel\Build\EagleStreamRpPkg\DEBUG_VS2015x86\X64\ClientOneSiliconPkg\IpBlock\Spi\Dxe\SpiSmmDxe\DEBUG\SpiDxe.pdb
PROGRESS CODE: V03040002 I0
PROGRESS CODE: V03040003 I0
PDB = c:\efi\servergen2\intel\Build\EagleStreamRpPkg\DEBUG_VS2015x86\X64\ClientOneSiliconPkg\IpBlock\Me\HwAsset\Dxe\HwAssetDxe\DEBUG\HwAssetDxe.pdb
PROGRESS CODE: V03040002 I0
Error: Image at 0006A8A0000 start failed: Unsupported
PDB = c:\efi\servergen2\intel\Build\EagleStreamRpPkg\DEBUG_VS2015x86\X64\ClientOneSiliconPkg\IpBlock\Me\HwAsset\Dxe\HwAssetDxe\DEBUG\HwAssetDxe.pdb
PROGRESS CODE: V03040003 I0
PDB = c:\efi\servergen2\intel\Build\EagleStreamRpPkg\DEBUG_VS2015x86\X64\ClientOneSiliconPkg\IpBlock\Me\Asf\Dxe\AsfDxe\DEBUG\AsfDxe.pdb
PROGRESS CODE: V03040002 I0
Error: Image at 0006A8A4000 start failed: Unsupported
PDB = c:\efi\servergen2\intel\Build\EagleStreamRpPkg\DEBUG_VS2015x86\X64\ClientOneSiliconPkg\IpBlock\Me\Asf\Dxe\AsfDxe\DEBUG\AsfDxe.pdb
PROGRESS CODE: V03040003 I0
PDB = c:\efi\servergen2\intel\Build\EagleStreamRpPkg\DEBUG_VS2015x86\X64\ServerSiliconPkg\Me\Client\BiosExtensionLoader\Dxe\BiosExtensionLoader\DEBUG\BiosExtensionLoader.pdb
PROGRESS CODE: V03040002 I0
Error: Image at 0006A8A0000 start failed: Unsupported
PDB = c:\efi\servergen2\intel\Build\EagleStreamRpPkg\DEBUG_VS2015x86\X64\ServerSiliconPkg\Me\Client\BiosExtensionLoader\Dxe\BiosExtensionLoader\DEBUG\BiosExtensionLoader.pdb
PROGRESS CODE: V03040003 I0
PDB = c:\efi\servergen2\intel\Build\EagleStreamRpPkg\DEBUG_VS2015x86\X64\MdeModulePkg\Universal\Variable\RuntimeDxe\VariableSmmRuntimeDxe\DEBUG\VariableSmmRuntimeDxe.pdb
PROGRESS CODE: V03040002 I0
PROGRESS CODE: V03040003 I0
PDB = c:\efi\servergen2\intel\Build\EagleStreamRpPkg\DEBUG_VS2015x86\X64\MdeModulePkg\Universal\Acpi\BootScriptExecutorDxe\BootScriptExecutorDxe\DEBUG\BootScriptExecutorDxe.pdb
PROGRESS CODE: V03040002 I0
[SIO] Current system SIO exist bit:10
PROGRESS CODE: V03040003 I0
PDB = c:\efi\servergen2\intel\Build\EagleStreamRpPkg\DEBUG_VS2015x86\X64\ServerPlatformPkg\Features\IPMI\GenericIpmi\Dxe\GenericIpmi\DEBUG\GenericIpmi.pdb
PROGRESS CODE: V03040002 I0
[IPMI] mIpmiInstance->KcsTimeoutPeriod: 0x186A0
[IPMI] BMC Device ID: 0x23, firmware version: 2.03 UpdateMode:1
[IPMI] BMC in Forced Update mode, skip waiting for BMC_READY.
PROGRESS CODE: V03040003 I0
PDB = c:\efi\servergen2\intel\Build\EagleStreamRpPkg\DEBUG_VS2015x86\X64\EagleStreamRpPkg\Platform\Dxe\SmbiosRpTable\SmbiosRpTable\DEBUG\SmbiosRpTable.pdb
PROGRESS CODE: V03040002 I0
Allocated Communication Buffer address = 775B9000
Smbios protocol addition (Type 133) returns Success
PROGRESS CODE: V03040003 I0
PDB = c:\efi\servergen2\intel\Build\EagleStreamRpPkg\DEBUG_VS2015x86\X64\ServerPlatformPkg\Features\Cpu\Dxe\PlatformCpuPolicyDxe\PlatformCpuPolicyDxe\DEBUG\PlatformCpuPolicyDxe.pdb
PROGRESS CODE: V03040002 I0
Common PPM policy update, PackageCState:3
PROGRESS CODE: V03040003 I0
PDB = c:\efi\servergen2\intel\Build\EagleStreamRpPkg\DEBUG_VS2015x86\X64\ServerPlatformPkg\Platform\Dxe\PolicyInitDxe\PolicyInitDxe\DEBUG\PolicyInitDxe.pdb
PROGRESS CODE: V03040002 I0
[HECI] DxeMeServerPolicy (MeType is ME_TYPE_SPS)
PROGRESS CODE: V03040003 I0
PDB = c:\efi\servergen2\intel\Build\EagleStreamRpPkg\DEBUG_VS2015x86\X64\SecurityPkg\Tcg\Tcg2Dxe\Tcg2Dxe\DEBUG\Tcg2Dxe.pdb
PROGRESS CODE: V03040002 I0
PROGRESS CODE: V03040003 I0
PDB = c:\efi\servergen2\intel\Build\EagleStreamRpPkg\DEBUG_VS2015x86\X64\ServerPlatformPkg\Platform\Dxe\SmbiosMiscDxe\SmbiosMiscDxe\DEBUG\SmbiosMiscDxe.pdb
PROGRESS CODE: V03040002 I0
PROGRESS CODE: V03040003 I0
PDB = c:\efi\servergen2\intel\Build\EagleStreamRpPkg\DEBUG_VS2015x86\X64\EagleStreamOpenBoardPkg\Platform\Dxe\PlatformVTdSampleDxe\PlatformVTdSampleDxe\DEBUG\PlatformVTdSampleDxe.pdb
PROGRESS CODE: V03040002 I0
PROGRESS CODE: V03040003 I0
PDB = c:\efi\servergen2\intel\Build\EagleStreamRpPkg\DEBUG_VS2015x86\X64\ServerPlatformPkg\Features\Bmc\OsTransparentUpdate\OsTransparentUpdate\DEBUG\OsTransparentUpdate.pdb
PROGRESS CODE: V03040002 I0
PROGRESS CODE: V03040003 I0
PDB = c:\efi\servergen2\intel\Build\EagleStreamRpPkg\DEBUG_VS2015x86\X64\ClientOneSiliconPkg\IpBlock\Sps\Sps\Smm\SpsSmm\DEBUG\SpsSmm.pdb
PROGRESS CODE: V03070002 I0
[HECI Transport-1 SMM] Send pkt: 80040007
00: FF 02 00 00
[HECI Transport-1 SMM] Got pkt: 80140007
00: FF 82 00 00 00 00 06 18 - 00 01 03 00 00 00 06 18
10: 00 01 03 00
HeciBufferClear (): HeciCsrHost 0x806C6C09 (Clear H_RDY)
HeciBufferClear (): HeciCsrHost 0x806C6C01 (CBLength = 128, H_RDY = 0)
[HECI Transport-1 SMM] Send pkt: 80080007
00: 05 02 00 00 00 00 00 00
[HECI Transport-1 SMM] Got pkt: 80180007
00: 05 82 00 00 B3 E6 B8 6D - 59 5B 4D 18 00 00 00 00
10: 00 40 1A 00 00 00 00 00
HeciBufferClear (): HeciCsrHost 0x80030309 (Clear H_RDY)
HeciBufferClear (): HeciCsrHost 0x80030301 (CBLength = 128, H_RDY = 0)
PROGRESS CODE: V03070003 I0
PDB = c:\efi\servergen2\intel\Build\EagleStreamRpPkg\DEBUG_VS2015x86\X64\UefiCpuPkg\PiSmmCpuDxeSmm\PiSmmCpuDxeSmm\DEBUG\PiSmmCpuDxeSmm.pdb
PROGRESS CODE: V03070002 I0
PROGRESS CODE: V00011008 I0
PROGRESS CODE: V03070003 I0
PDB = c:\efi\servergen2\intel\Build\EagleStreamRpPkg\DEBUG_VS2015x86\X64\ClientOneSiliconPkg\Pch\PchSmiDispatcher\Smm\PchSmiDispatcherServer\DEBUG\PchSmiDispatcher.pdb
PROGRESS CODE: V03070002 I0
PROGRESS CODE: V03070003 I0
PDB = c:\efi\servergen2\intel\Build\EagleStreamRpPkg\DEBUG_VS2015x86\X64\ClientOneSiliconPkg\IpBlock\Spi\Smm\SpiSmm\DEBUG\SpiSmm.pdb
PROGRESS CODE: V03070002 I0
PROGRESS CODE: V03070003 I0
PDB = c:\efi\servergen2\intel\Build\EagleStreamRpPkg\DEBUG_VS2015x86\X64\ServerPlatformPkg\Platform\DxeSmm\BiosGuard\BiosGuardServices\DEBUG\BiosGuardServices.pdb
PROGRESS CODE: V03070002 I0
PROGRESS CODE: V03070003 I0
PDB = c:\efi\servergen2\intel\Build\EagleStreamRpPkg\DEBUG_VS2015x86\X64\ServerRasPkg\Driver\Smm\RasAcpi\RasAcpi\DEBUG\RasAcpi.pdb
PROGRESS CODE: V03070002 I0
PROGRESS CODE: V03070003 I0
PDB = c:\efi\servergen2\intel\Build\EagleStreamRpPkg\DEBUG_VS2015x86\X64\ServerSiliconPkg\Universal\Smm\OobMsmSmm\OobMsmSmm\DEBUG\OobMsmSmm.pdb
PROGRESS CODE: V03070002 I0
OobMsmSmmDriverEntry(): Enter Entrypoint
PROGRESS CODE: V03070003 I0
PDB = c:\efi\servergen2\intel\Build\EagleStreamRpPkg\DEBUG_VS2015x86\X64\ServerSiliconPkg\Universal\Smm\PlatformResetNotify\PlatformResetNotifySmm\DEBUG\PlatformResetNotifySmm.pdb
PROGRESS CODE: V03070002 I0
PROGRESS CODE: V03070003 I0
PDB = c:\efi\servergen2\intel\Build\EagleStreamRpPkg\DEBUG_VS2015x86\X64\ClientOneSiliconPkg\Pch\PchInit\Smm\PchInitSmm\DEBUG\PchInitSmm.pdb
PROGRESS CODE: V03070002 I0
PROGRESS CODE: V03070003 I0
PDB = c:\efi\servergen2\intel\Build\EagleStreamRpPkg\DEBUG_VS2015x86\X64\ServerSecurityPkg\Pfr\Restricted\DebugTool\PxdSmm\DEBUG\PxdSmmDriver.pdb
PROGRESS CODE: V03070002 I0
[PxdSmm.c] PxdSmmDriverEntry() {
[PxdSmm.c] PxdSmmDriverEntry() } Success
PROGRESS CODE: V03070003 I0
PDB = c:\efi\servergen2\intel\Build\EagleStreamRpPkg\DEBUG_VS2015x86\X64\ServerPlatformPkg\Platform\SpiFvbServices\PlatformSmmSpi\DEBUG\FwBlockServiceSmm.pdb
PROGRESS CODE: V03070002 I0
PROGRESS CODE: V03070003 I0
PDB = c:\efi\servergen2\intel\Build\EagleStreamRpPkg\DEBUG_VS2015x86\X64\ServerRestrictedPkg\VariableSmi\VariableSmiSmm\DEBUG\VariableSmiSmm.pdb
PROGRESS CODE: V03070002 I0
PROGRESS CODE: V03070003 I0
PDB = c:\efi\servergen2\intel\Build\EagleStreamRpPkg\DEBUG_VS2015x86\X64\ServerPlatformPkg\Platform\Dxe\PlatformPowerButton\PlatformPowerButton\DEBUG\PowerButtonHandler.pdb
PROGRESS CODE: V03070002 I0
PROGRESS CODE: V03070003 I0
PDB = c:\efi\servergen2\intel\Build\EagleStreamRpPkg\DEBUG_VS2015x86\X64\SecurityPkg\Tcg\Tcg2Smm\Tcg2Smm\DEBUG\Tcg2Smm.pdb
PROGRESS CODE: V03070002 I0
PROGRESS CODE: V03070003 I0
PDB = c:\efi\servergen2\intel\Build\EagleStreamRpPkg\DEBUG_VS2015x86\X64\UefiCpuPkg\PiSmmCommunication\PiSmmCommunicationSmm\DEBUG\PiSmmCommunicationSmm.pdb
PROGRESS CODE: V03070002 I0
PROGRESS CODE: V03070003 I0
PDB = c:\efi\servergen2\intel\Build\EagleStreamRpPkg\DEBUG_VS2015x86\X64\ServerRasPkg\Driver\Smm\AddressTranslationDsm\AddressTranslationDsm\DEBUG\AddressTranslationDsm.pdb
PROGRESS CODE: V03070002 I0
[GetNmCaching] NM caching Cfg:B OffData:0 IntLv:458
[GetNmCaching] NM caching Cfg:B OffData:0 IntLv:40458
[GetNmCaching] NM caching Cfg:B OffData:0 IntLv:80458
[GetNmCaching] NM caching Cfg:B OffData:0 IntLv:C0458
[GetNmCaching] NM caching Cfg:B OffData:0 IntLv:100458
[GetNmCaching] NM caching Cfg:B OffData:0 IntLv:140458
[GetNmCaching] NM caching Cfg:B OffData:0 IntLv:180458
[GetNmCaching] NM caching Cfg:B OffData:0 IntLv:1C0458
[GetNmCaching] NM caching Cfg:B OffData:80000022 IntLv:458
[GetNmCaching] NM caching Cfg:B OffData:80000022 IntLv:40458
[GetNmCaching] NM caching Cfg:B OffData:80000022 IntLv:80458
[GetNmCaching] NM caching Cfg:B OffData:80000022 IntLv:C0458
[GetNmCaching] NM caching Cfg:B OffData:80000022 IntLv:100458
[GetNmCaching] NM caching Cfg:B OffData:80000022 IntLv:140458
[GetNmCaching] NM caching Cfg:B OffData:80000022 IntLv:180458
[GetNmCaching] NM caching Cfg:B OffData:80000022 IntLv:1C0458
[GetNmCaching] NM caching Cfg:B OffData:80000042 IntLv:458
[GetNmCaching] NM caching Cfg:B OffData:80000042 IntLv:40458
[GetNmCaching] NM caching Cfg:B OffData:80000042 IntLv:80458
[GetNmCaching] NM caching Cfg:B OffData:80000042 IntLv:C0458
[GetNmCaching] NM caching Cfg:B OffData:80000042 IntLv:100458
[GetNmCaching] NM caching Cfg:B OffData:80000042 IntLv:140458
[GetNmCaching] NM caching Cfg:B OffData:80000042 IntLv:180458
[GetNmCaching] NM caching Cfg:B OffData:80000042 IntLv:1C0458
[GetNmCaching] NM caching Cfg:B OffData:80000062 IntLv:458
[GetNmCaching] NM caching Cfg:B OffData:80000062 IntLv:40458
[GetNmCaching] NM caching Cfg:B OffData:80000062 IntLv:80458
[GetNmCaching] NM caching Cfg:B OffData:80000062 IntLv:C0458
[GetNmCaching] NM caching Cfg:B OffData:80000062 IntLv:100458
[GetNmCaching] NM caching Cfg:B OffData:80000062 IntLv:140458
[GetNmCaching] NM caching Cfg:B OffData:80000062 IntLv:180458
[GetNmCaching] NM caching Cfg:B OffData:80000062 IntLv:1C0458
[GetNmCaching] NM caching Cfg:B OffData:80000082 IntLv:458
[GetNmCaching] NM caching Cfg:B OffData:80000082 IntLv:40458
[GetNmCaching] NM caching Cfg:B OffData:80000082 IntLv:80458
[GetNmCaching] NM caching Cfg:B OffData:80000082 IntLv:C0458
[GetNmCaching] NM caching Cfg:B OffData:80000082 IntLv:100458
[GetNmCaching] NM caching Cfg:B OffData:80000082 IntLv:140458
[GetNmCaching] NM caching Cfg:B OffData:80000082 IntLv:180458
[GetNmCaching] NM caching Cfg:B OffData:80000082 IntLv:1C0458
[GetNmCaching] NM caching Cfg:B OffData:800000A2 IntLv:458
[GetNmCaching] NM caching Cfg:B OffData:800000A2 IntLv:40458
[GetNmCaching] NM caching Cfg:B OffData:800000A2 IntLv:80458
[GetNmCaching] NM caching Cfg:B OffData:800000A2 IntLv:C0458
[GetNmCaching] NM caching Cfg:B OffData:800000A2 IntLv:100458
[GetNmCaching] NM caching Cfg:B OffData:800000A2 IntLv:140458
[GetNmCaching] NM caching Cfg:B OffData:800000A2 IntLv:180458
[GetNmCaching] NM caching Cfg:B OffData:800000A2 IntLv:1C0458
[GetNmCaching] NM caching Cfg:B OffData:800000C2 IntLv:458
[GetNmCaching] NM caching Cfg:B OffData:800000C2 IntLv:40458
[GetNmCaching] NM caching Cfg:B OffData:800000C2 IntLv:80458
[GetNmCaching] NM caching Cfg:B OffData:800000C2 IntLv:C0458
[GetNmCaching] NM caching Cfg:B OffData:800000C2 IntLv:100458
[GetNmCaching] NM caching Cfg:B OffData:800000C2 IntLv:140458
[GetNmCaching] NM caching Cfg:B OffData:800000C2 IntLv:180458
[GetNmCaching] NM caching Cfg:B OffData:800000C2 IntLv:1C0458
[GetNmCaching] NM caching Cfg:B OffData:800000E2 IntLv:458
[GetNmCaching] NM caching Cfg:B OffData:800000E2 IntLv:40458
[GetNmCaching] NM caching Cfg:B OffData:800000E2 IntLv:80458
[GetNmCaching] NM caching Cfg:B OffData:800000E2 IntLv:C0458
[GetNmCaching] NM caching Cfg:B OffData:800000E2 IntLv:100458
[GetNmCaching] NM caching Cfg:B OffData:800000E2 IntLv:140458
[GetNmCaching] NM caching Cfg:B OffData:800000E2 IntLv:180458
[GetNmCaching] NM caching Cfg:B OffData:800000E2 IntLv:1C0458
PROGRESS CODE: V03070003 I0
PDB = c:\efi\servergen2\intel\Build\EagleStreamRpPkg\DEBUG_VS2015x86\X64\SmmRuntimeUpdateFeaturePkg\SmmRuntimeUpdate\SmmCodeInjection\DEBUG\SmmRuntimUpdate.pdb
PROGRESS CODE: V03070002 I0
PROGRESS CODE: V03070003 I0
PDB = c:\efi\servergen2\intel\Build\EagleStreamRpPkg\DEBUG_VS2015x86\X64\ServerSiliconPkg\Universal\Dxe\PmemResetNotify\PmemResetNotifySmm\DEBUG\PmemResetNotifySmm.pdb
PROGRESS CODE: V03070002 I0
[PMem](SMM) PMem Always-ON 12v support disabled
[PMem](SMM) PMem reset notification driver init failed (status Aborted)
Error: SMM image at 0007EC2D000 start failed: Aborted
PROGRESS CODE: V03070003 I0
PDB = c:\efi\servergen2\intel\Build\EagleStreamRpPkg\DEBUG_VS2015x86\X64\MdeModulePkg\Universal\FaultTolerantWriteDxe\FaultTolerantWriteSmm\DEBUG\SmmFaultTolerantWriteDxe.pdb
PROGRESS CODE: V03070002 I0
PROGRESS CODE: V03070003 I0
PDB = c:\efi\servergen2\intel\Build\EagleStreamRpPkg\DEBUG_VS2015x86\X64\ServerSiliconPkg\Cpu\SiCpuInit\Dxe\SiCpuInitDxe\DEBUG\SiCpuInitDxe.pdb
PROGRESS CODE: V03040002 I0
GetProcessorInfo - Index - 0
GetProcessorInfo - ProcessorId - 0000000000000000
GetProcessorInfo - StatusFlag - 00000007
GetProcessorInfo - Location.Package - 00000000
GetProcessorInfo - Location.Core - 00000000
GetProcessorInfo - Location.Thread - 00000000
GetProcessorInfo - Location2.Package - 00000000
GetProcessorInfo - Location2.Die - 00000000
GetProcessorInfo - Location2.Tile - 00000000
GetProcessorInfo - Location2.Module - 00000000
GetProcessorInfo - Location2.Core - 00000000
GetProcessorInfo - Location2.Thread - 00000000
GetProcessorInfo - Index - 1
GetProcessorInfo - ProcessorId - 0000000000000001
GetProcessorInfo - StatusFlag - 00000006
GetProcessorInfo - Location.Package - 00000000
GetProcessorInfo - Location.Core - 00000000
GetProcessorInfo - Location.Thread - 00000001
GetProcessorInfo - Location2.Package - 00000000
GetProcessorInfo - Location2.Die - 00000000
GetProcessorInfo - Location2.Tile - 00000000
GetProcessorInfo - Location2.Module - 00000000
GetProcessorInfo - Location2.Core - 00000000
GetProcessorInfo - Location2.Thread - 00000001
GetProcessorInfo - Index - 2
GetProcessorInfo - ProcessorId - 0000000000000002
GetProcessorInfo - StatusFlag - 00000006
GetProcessorInfo - Location.Package - 00000000
GetProcessorInfo - Location.Core - 00000001
GetProcessorInfo - Location.Thread - 00000000
GetProcessorInfo - Location2.Package - 00000000
GetProcessorInfo - Location2.Die - 00000000
GetProcessorInfo - Location2.Tile - 00000000
GetProcessorInfo - Location2.Module - 00000000
GetProcessorInfo - Location2.Core - 00000001
GetProcessorInfo - Location2.Thread - 00000000
GetProcessorInfo - Index - 3
GetProcessorInfo - ProcessorId - 0000000000000003
GetProcessorInfo - StatusFlag - 00000006
GetProcessorInfo - Location.Package - 00000000
GetProcessorInfo - Location.Core - 00000001
GetProcessorInfo - Location.Thread - 00000001
GetProcessorInfo - Location2.Package - 00000000
GetProcessorInfo - Location2.Die - 00000000
GetProcessorInfo - Location2.Tile - 00000000
GetProcessorInfo - Location2.Module - 00000000
GetProcessorInfo - Location2.Core - 00000001
GetProcessorInfo - Location2.Thread - 00000001
GetProcessorInfo - Index - 4
GetProcessorInfo - ProcessorId - 0000000000000004
GetProcessorInfo - StatusFlag - 00000006
GetProcessorInfo - Location.Package - 00000000
GetProcessorInfo - Location.Core - 00000002
GetProcessorInfo - Location.Thread - 00000000
GetProcessorInfo - Location2.Package - 00000000
GetProcessorInfo - Location2.Die - 00000000
GetProcessorInfo - Location2.Tile - 00000000
GetProcessorInfo - Location2.Module - 00000000
GetProcessorInfo - Location2.Core - 00000002
GetProcessorInfo - Location2.Thread - 00000000
GetProcessorInfo - Index - 5
GetProcessorInfo - ProcessorId - 0000000000000005
GetProcessorInfo - StatusFlag - 00000006
GetProcessorInfo - Location.Package - 00000000
GetProcessorInfo - Location.Core - 00000002
GetProcessorInfo - Location.Thread - 00000001
GetProcessorInfo - Location2.Package - 00000000
GetProcessorInfo - Location2.Die - 00000000
GetProcessorInfo - Location2.Tile - 00000000
GetProcessorInfo - Location2.Module - 00000000
GetProcessorInfo - Location2.Core - 00000002
GetProcessorInfo - Location2.Thread - 00000001
GetProcessorInfo - Index - 6
GetProcessorInfo - ProcessorId - 0000000000000006
GetProcessorInfo - StatusFlag - 00000006
GetProcessorInfo - Location.Package - 00000000
GetProcessorInfo - Location.Core - 00000003
GetProcessorInfo - Location.Thread - 00000000
GetProcessorInfo - Location2.Package - 00000000
GetProcessorInfo - Location2.Die - 00000000
GetProcessorInfo - Location2.Tile - 00000000
GetProcessorInfo - Location2.Module - 00000000
GetProcessorInfo - Location2.Core - 00000003
GetProcessorInfo - Location2.Thread - 00000000
GetProcessorInfo - Index - 7
GetProcessorInfo - ProcessorId - 0000000000000007
GetProcessorInfo - StatusFlag - 00000006
GetProcessorInfo - Location.Package - 00000000
GetProcessorInfo - Location.Core - 00000003
GetProcessorInfo - Location.Thread - 00000001
GetProcessorInfo - Location2.Package - 00000000
GetProcessorInfo - Location2.Die - 00000000
GetProcessorInfo - Location2.Tile - 00000000
GetProcessorInfo - Location2.Module - 00000000
GetProcessorInfo - Location2.Core - 00000003
GetProcessorInfo - Location2.Thread - 00000001
GetProcessorInfo - Index - 8
GetProcessorInfo - ProcessorId - 0000000000000008
GetProcessorInfo - StatusFlag - 00000006
GetProcessorInfo - Location.Package - 00000000
GetProcessorInfo - Location.Core - 00000004
GetProcessorInfo - Location.Thread - 00000000
GetProcessorInfo - Location2.Package - 00000000
GetProcessorInfo - Location2.Die - 00000000
GetProcessorInfo - Location2.Tile - 00000000
GetProcessorInfo - Location2.Module - 00000000
GetProcessorInfo - Location2.Core - 00000004
GetProcessorInfo - Location2.Thread - 00000000
GetProcessorInfo - Index - 9
GetProcessorInfo - ProcessorId - 0000000000000009
GetProcessorInfo - StatusFlag - 00000006
GetProcessorInfo - Location.Package - 00000000
GetProcessorInfo - Location.Core - 00000004
GetProcessorInfo - Location.Thread - 00000001
GetProcessorInfo - Location2.Package - 00000000
GetProcessorInfo - Location2.Die - 00000000
GetProcessorInfo - Location2.Tile - 00000000
GetProcessorInfo - Location2.Module - 00000000
GetProcessorInfo - Location2.Core - 00000004
GetProcessorInfo - Location2.Thread - 00000001
GetProcessorInfo - Index - A
GetProcessorInfo - ProcessorId - 000000000000000A
GetProcessorInfo - StatusFlag - 00000006
GetProcessorInfo - Location.Package - 00000000
GetProcessorInfo - Location.Core - 00000005
GetProcessorInfo - Location.Thread - 00000000
GetProcessorInfo - Location2.Package - 00000000
GetProcessorInfo - Location2.Die - 00000000
GetProcessorInfo - Location2.Tile - 00000000
GetProcessorInfo - Location2.Module - 00000000
GetProcessorInfo - Location2.Core - 00000005
GetProcessorInfo - Location2.Thread - 00000000
GetProcessorInfo - Index - B
GetProcessorInfo - ProcessorId - 000000000000000B
GetProcessorInfo - StatusFlag - 00000006
GetProcessorInfo - Location.Package - 00000000
GetProcessorInfo - Location.Core - 00000005
GetProcessorInfo - Location.Thread - 00000001
GetProcessorInfo - Location2.Package - 00000000
GetProcessorInfo - Location2.Die - 00000000
GetProcessorInfo - Location2.Tile - 00000000
GetProcessorInfo - Location2.Module - 00000000
GetProcessorInfo - Location2.Core - 00000005
GetProcessorInfo - Location2.Thread - 00000001
GetProcessorInfo - Index - C
GetProcessorInfo - ProcessorId - 000000000000000C
GetProcessorInfo - StatusFlag - 00000006
GetProcessorInfo - Location.Package - 00000000
GetProcessorInfo - Location.Core - 00000006
GetProcessorInfo - Location.Thread - 00000000
GetProcessorInfo - Location2.Package - 00000000
GetProcessorInfo - Location2.Die - 00000000
GetProcessorInfo - Location2.Tile - 00000000
GetProcessorInfo - Location2.Module - 00000000
GetProcessorInfo - Location2.Core - 00000006
GetProcessorInfo - Location2.Thread - 00000000
GetProcessorInfo - Index - D
GetProcessorInfo - ProcessorId - 000000000000000D
GetProcessorInfo - StatusFlag - 00000006
GetProcessorInfo - Location.Package - 00000000
GetProcessorInfo - Location.Core - 00000006
GetProcessorInfo - Location.Thread - 00000001
GetProcessorInfo - Location2.Package - 00000000
GetProcessorInfo - Location2.Die - 00000000
GetProcessorInfo - Location2.Tile - 00000000
GetProcessorInfo - Location2.Module - 00000000
GetProcessorInfo - Location2.Core - 00000006
GetProcessorInfo - Location2.Thread - 00000001
GetProcessorInfo - Index - E
GetProcessorInfo - ProcessorId - 000000000000000E
GetProcessorInfo - StatusFlag - 00000006
GetProcessorInfo - Location.Package - 00000000
GetProcessorInfo - Location.Core - 00000007
GetProcessorInfo - Location.Thread - 00000000
GetProcessorInfo - Location2.Package - 00000000
GetProcessorInfo - Location2.Die - 00000000
GetProcessorInfo - Location2.Tile - 00000000
GetProcessorInfo - Location2.Module - 00000000
GetProcessorInfo - Location2.Core - 00000007
GetProcessorInfo - Location2.Thread - 00000000
GetProcessorInfo - Index - F
GetProcessorInfo - ProcessorId - 000000000000000F
GetProcessorInfo - StatusFlag - 00000006
GetProcessorInfo - Location.Package - 00000000
GetProcessorInfo - Location.Core - 00000007
GetProcessorInfo - Location.Thread - 00000001
GetProcessorInfo - Location2.Package - 00000000
GetProcessorInfo - Location2.Die - 00000000
GetProcessorInfo - Location2.Tile - 00000000
GetProcessorInfo - Location2.Module - 00000000
GetProcessorInfo - Location2.Core - 00000007
GetProcessorInfo - Location2.Thread - 00000001
GetProcessorInfo - Index - 10
GetProcessorInfo - ProcessorId - 0000000000000010
GetProcessorInfo - StatusFlag - 00000006
GetProcessorInfo - Location.Package - 00000000
GetProcessorInfo - Location.Core - 00000008
GetProcessorInfo - Location.Thread - 00000000
GetProcessorInfo - Location2.Package - 00000000
GetProcessorInfo - Location2.Die - 00000000
GetProcessorInfo - Location2.Tile - 00000000
GetProcessorInfo - Location2.Module - 00000000
GetProcessorInfo - Location2.Core - 00000008
GetProcessorInfo - Location2.Thread - 00000000
GetProcessorInfo - Index - 11
GetProcessorInfo - ProcessorId - 0000000000000011
GetProcessorInfo - StatusFlag - 00000006
GetProcessorInfo - Location.Package - 00000000
GetProcessorInfo - Location.Core - 00000008
GetProcessorInfo - Location.Thread - 00000001
GetProcessorInfo - Location2.Package - 00000000
GetProcessorInfo - Location2.Die - 00000000
GetProcessorInfo - Location2.Tile - 00000000
GetProcessorInfo - Location2.Module - 00000000
GetProcessorInfo - Location2.Core - 00000008
GetProcessorInfo - Location2.Thread - 00000001
GetProcessorInfo - Index - 12
GetProcessorInfo - ProcessorId - 0000000000000012
GetProcessorInfo - StatusFlag - 00000006
GetProcessorInfo - Location.Package - 00000000
GetProcessorInfo - Location.Core - 00000009
GetProcessorInfo - Location.Thread - 00000000
GetProcessorInfo - Location2.Package - 00000000
GetProcessorInfo - Location2.Die - 00000000
GetProcessorInfo - Location2.Tile - 00000000
GetProcessorInfo - Location2.Module - 00000000
GetProcessorInfo - Location2.Core - 00000009
GetProcessorInfo - Location2.Thread - 00000000
GetProcessorInfo - Index - 13
GetProcessorInfo - ProcessorId - 0000000000000013
GetProcessorInfo - StatusFlag - 00000006
GetProcessorInfo - Location.Package - 00000000
GetProcessorInfo - Location.Core - 00000009
GetProcessorInfo - Location.Thread - 00000001
GetProcessorInfo - Location2.Package - 00000000
GetProcessorInfo - Location2.Die - 00000000
GetProcessorInfo - Location2.Tile - 00000000
GetProcessorInfo - Location2.Module - 00000000
GetProcessorInfo - Location2.Core - 00000009
GetProcessorInfo - Location2.Thread - 00000001
GetProcessorInfo - Index - 14
GetProcessorInfo - ProcessorId - 0000000000000014
GetProcessorInfo - StatusFlag - 00000006
GetProcessorInfo - Location.Package - 00000000
GetProcessorInfo - Location.Core - 0000000A
GetProcessorInfo - Location.Thread - 00000000
GetProcessorInfo - Location2.Package - 00000000
GetProcessorInfo - Location2.Die - 00000000
GetProcessorInfo - Location2.Tile - 00000000
GetProcessorInfo - Location2.Module - 00000000
GetProcessorInfo - Location2.Core - 0000000A
GetProcessorInfo - Location2.Thread - 00000000
GetProcessorInfo - Index - 15
GetProcessorInfo - ProcessorId - 0000000000000015
GetProcessorInfo - StatusFlag - 00000006
GetProcessorInfo - Location.Package - 00000000
GetProcessorInfo - Location.Core - 0000000A
GetProcessorInfo - Location.Thread - 00000001
GetProcessorInfo - Location2.Package - 00000000
GetProcessorInfo - Location2.Die - 00000000
GetProcessorInfo - Location2.Tile - 00000000
GetProcessorInfo - Location2.Module - 00000000
GetProcessorInfo - Location2.Core - 0000000A
GetProcessorInfo - Location2.Thread - 00000001
GetProcessorInfo - Index - 16
GetProcessorInfo - ProcessorId - 0000000000000016
GetProcessorInfo - StatusFlag - 00000006
GetProcessorInfo - Location.Package - 00000000
GetProcessorInfo - Location.Core - 0000000B
GetProcessorInfo - Location.Thread - 00000000
GetProcessorInfo - Location2.Package - 00000000
GetProcessorInfo - Location2.Die - 00000000
GetProcessorInfo - Location2.Tile - 00000000
GetProcessorInfo - Location2.Module - 00000000
GetProcessorInfo - Location2.Core - 0000000B
GetProcessorInfo - Location2.Thread - 00000000
GetProcessorInfo - Index - 17
GetProcessorInfo - ProcessorId - 0000000000000017
GetProcessorInfo - StatusFlag - 00000006
GetProcessorInfo - Location.Package - 00000000
GetProcessorInfo - Location.Core - 0000000B
GetProcessorInfo - Location.Thread - 00000001
GetProcessorInfo - Location2.Package - 00000000
GetProcessorInfo - Location2.Die - 00000000
GetProcessorInfo - Location2.Tile - 00000000
GetProcessorInfo - Location2.Module - 00000000
GetProcessorInfo - Location2.Core - 0000000B
GetProcessorInfo - Location2.Thread - 00000001
GetProcessorInfo - Index - 18
GetProcessorInfo - ProcessorId - 0000000000000018
GetProcessorInfo - StatusFlag - 00000006
GetProcessorInfo - Location.Package - 00000000
GetProcessorInfo - Location.Core - 0000000C
GetProcessorInfo - Location.Thread - 00000000
GetProcessorInfo - Location2.Package - 00000000
GetProcessorInfo - Location2.Die - 00000000
GetProcessorInfo - Location2.Tile - 00000000
GetProcessorInfo - Location2.Module - 00000000
GetProcessorInfo - Location2.Core - 0000000C
GetProcessorInfo - Location2.Thread - 00000000
GetProcessorInfo - Index - 19
GetProcessorInfo - ProcessorId - 0000000000000019
GetProcessorInfo - StatusFlag - 00000006
GetProcessorInfo - Location.Package - 00000000
GetProcessorInfo - Location.Core - 0000000C
GetProcessorInfo - Location.Thread - 00000001
GetProcessorInfo - Location2.Package - 00000000
GetProcessorInfo - Location2.Die - 00000000
GetProcessorInfo - Location2.Tile - 00000000
GetProcessorInfo - Location2.Module - 00000000
GetProcessorInfo - Location2.Core - 0000000C
GetProcessorInfo - Location2.Thread - 00000001
GetProcessorInfo - Index - 1A
GetProcessorInfo - ProcessorId - 000000000000001A
GetProcessorInfo - StatusFlag - 00000006
GetProcessorInfo - Location.Package - 00000000
GetProcessorInfo - Location.Core - 0000000D
GetProcessorInfo - Location.Thread - 00000000
GetProcessorInfo - Location2.Package - 00000000
GetProcessorInfo - Location2.Die - 00000000
GetProcessorInfo - Location2.Tile - 00000000
GetProcessorInfo - Location2.Module - 00000000
GetProcessorInfo - Location2.Core - 0000000D
GetProcessorInfo - Location2.Thread - 00000000
GetProcessorInfo - Index - 1B
GetProcessorInfo - ProcessorId - 000000000000001B
GetProcessorInfo - StatusFlag - 00000006
GetProcessorInfo - Location.Package - 00000000
GetProcessorInfo - Location.Core - 0000000D
GetProcessorInfo - Location.Thread - 00000001
GetProcessorInfo - Location2.Package - 00000000
GetProcessorInfo - Location2.Die - 00000000
GetProcessorInfo - Location2.Tile - 00000000
GetProcessorInfo - Location2.Module - 00000000
GetProcessorInfo - Location2.Core - 0000000D
GetProcessorInfo - Location2.Thread - 00000001
GetProcessorInfo - Index - 1C
GetProcessorInfo - ProcessorId - 000000000000001C
GetProcessorInfo - StatusFlag - 00000006
GetProcessorInfo - Location.Package - 00000000
GetProcessorInfo - Location.Core - 0000000E
GetProcessorInfo - Location.Thread - 00000000
GetProcessorInfo - Location2.Package - 00000000
GetProcessorInfo - Location2.Die - 00000000
GetProcessorInfo - Location2.Tile - 00000000
GetProcessorInfo - Location2.Module - 00000000
GetProcessorInfo - Location2.Core - 0000000E
GetProcessorInfo - Location2.Thread - 00000000
GetProcessorInfo - Index - 1D
GetProcessorInfo - ProcessorId - 000000000000001D
GetProcessorInfo - StatusFlag - 00000006
GetProcessorInfo - Location.Package - 00000000
GetProcessorInfo - Location.Core - 0000000E
GetProcessorInfo - Location.Thread - 00000001
GetProcessorInfo - Location2.Package - 00000000
GetProcessorInfo - Location2.Die - 00000000
GetProcessorInfo - Location2.Tile - 00000000
GetProcessorInfo - Location2.Module - 00000000
GetProcessorInfo - Location2.Core - 0000000E
GetProcessorInfo - Location2.Thread - 00000001
GetProcessorInfo - Index - 1E
GetProcessorInfo - ProcessorId - 000000000000001E
GetProcessorInfo - StatusFlag - 00000006
GetProcessorInfo - Location.Package - 00000000
GetProcessorInfo - Location.Core - 0000000F
GetProcessorInfo - Location.Thread - 00000000
GetProcessorInfo - Location2.Package - 00000000
GetProcessorInfo - Location2.Die - 00000000
GetProcessorInfo - Location2.Tile - 00000000
GetProcessorInfo - Location2.Module - 00000000
GetProcessorInfo - Location2.Core - 0000000F
GetProcessorInfo - Location2.Thread - 00000000
GetProcessorInfo - Index - 1F
GetProcessorInfo - ProcessorId - 000000000000001F
GetProcessorInfo - StatusFlag - 00000006
GetProcessorInfo - Location.Package - 00000000
GetProcessorInfo - Location.Core - 0000000F
GetProcessorInfo - Location.Thread - 00000001
GetProcessorInfo - Location2.Package - 00000000
GetProcessorInfo - Location2.Die - 00000000
GetProcessorInfo - Location2.Tile - 00000000
GetProcessorInfo - Location2.Module - 00000000
GetProcessorInfo - Location2.Core - 0000000F
GetProcessorInfo - Location2.Thread - 00000001
GetProcessorInfo - Index - 20
GetProcessorInfo - ProcessorId - 0000000000000020
GetProcessorInfo - StatusFlag - 00000006
GetProcessorInfo - Location.Package - 00000000
GetProcessorInfo - Location.Core - 00000010
GetProcessorInfo - Location.Thread - 00000000
GetProcessorInfo - Location2.Package - 00000000
GetProcessorInfo - Location2.Die - 00000000
GetProcessorInfo - Location2.Tile - 00000000
GetProcessorInfo - Location2.Module - 00000000
GetProcessorInfo - Location2.Core - 00000010
GetProcessorInfo - Location2.Thread - 00000000
GetProcessorInfo - Index - 21
GetProcessorInfo - ProcessorId - 0000000000000021
GetProcessorInfo - StatusFlag - 00000006
GetProcessorInfo - Location.Package - 00000000
GetProcessorInfo - Location.Core - 00000010
GetProcessorInfo - Location.Thread - 00000001
GetProcessorInfo - Location2.Package - 00000000
GetProcessorInfo - Location2.Die - 00000000
GetProcessorInfo - Location2.Tile - 00000000
GetProcessorInfo - Location2.Module - 00000000
GetProcessorInfo - Location2.Core - 00000010
GetProcessorInfo - Location2.Thread - 00000001
GetProcessorInfo - Index - 22
GetProcessorInfo - ProcessorId - 0000000000000022
GetProcessorInfo - StatusFlag - 00000006
GetProcessorInfo - Location.Package - 00000000
GetProcessorInfo - Location.Core - 00000011
GetProcessorInfo - Location.Thread - 00000000
GetProcessorInfo - Location2.Package - 00000000
GetProcessorInfo - Location2.Die - 00000000
GetProcessorInfo - Location2.Tile - 00000000
GetProcessorInfo - Location2.Module - 00000000
GetProcessorInfo - Location2.Core - 00000011
GetProcessorInfo - Location2.Thread - 00000000
GetProcessorInfo - Index - 23
GetProcessorInfo - ProcessorId - 0000000000000023
GetProcessorInfo - StatusFlag - 00000006
GetProcessorInfo - Location.Package - 00000000
GetProcessorInfo - Location.Core - 00000011
GetProcessorInfo - Location.Thread - 00000001
GetProcessorInfo - Location2.Package - 00000000
GetProcessorInfo - Location2.Die - 00000000
GetProcessorInfo - Location2.Tile - 00000000
GetProcessorInfo - Location2.Module - 00000000
GetProcessorInfo - Location2.Core - 00000011
GetProcessorInfo - Location2.Thread - 00000001
GetProcessorInfo - Index - 24
GetProcessorInfo - ProcessorId - 0000000000000024
GetProcessorInfo - StatusFlag - 00000006
GetProcessorInfo - Location.Package - 00000000
GetProcessorInfo - Location.Core - 00000012
GetProcessorInfo - Location.Thread - 00000000
GetProcessorInfo - Location2.Package - 00000000
GetProcessorInfo - Location2.Die - 00000000
GetProcessorInfo - Location2.Tile - 00000000
GetProcessorInfo - Location2.Module - 00000000
GetProcessorInfo - Location2.Core - 00000012
GetProcessorInfo - Location2.Thread - 00000000
GetProcessorInfo - Index - 25
GetProcessorInfo - ProcessorId - 0000000000000025
GetProcessorInfo - StatusFlag - 00000006
GetProcessorInfo - Location.Package - 00000000
GetProcessorInfo - Location.Core - 00000012
GetProcessorInfo - Location.Thread - 00000001
GetProcessorInfo - Location2.Package - 00000000
GetProcessorInfo - Location2.Die - 00000000
GetProcessorInfo - Location2.Tile - 00000000
GetProcessorInfo - Location2.Module - 00000000
GetProcessorInfo - Location2.Core - 00000012
GetProcessorInfo - Location2.Thread - 00000001
GetProcessorInfo - Index - 26
GetProcessorInfo - ProcessorId - 0000000000000026
GetProcessorInfo - StatusFlag - 00000006
GetProcessorInfo - Location.Package - 00000000
GetProcessorInfo - Location.Core - 00000013
GetProcessorInfo - Location.Thread - 00000000
GetProcessorInfo - Location2.Package - 00000000
GetProcessorInfo - Location2.Die - 00000000
GetProcessorInfo - Location2.Tile - 00000000
GetProcessorInfo - Location2.Module - 00000000
GetProcessorInfo - Location2.Core - 00000013
GetProcessorInfo - Location2.Thread - 00000000
GetProcessorInfo - Index - 27
GetProcessorInfo - ProcessorId - 0000000000000027
GetProcessorInfo - StatusFlag - 00000006
GetProcessorInfo - Location.Package - 00000000
GetProcessorInfo - Location.Core - 00000013
GetProcessorInfo - Location.Thread - 00000001
GetProcessorInfo - Location2.Package - 00000000
GetProcessorInfo - Location2.Die - 00000000
GetProcessorInfo - Location2.Tile - 00000000
GetProcessorInfo - Location2.Module - 00000000
GetProcessorInfo - Location2.Core - 00000013
GetProcessorInfo - Location2.Thread - 00000001
GetProcessorInfo - Index - 28
GetProcessorInfo - ProcessorId - 0000000000000028
GetProcessorInfo - StatusFlag - 00000006
GetProcessorInfo - Location.Package - 00000000
GetProcessorInfo - Location.Core - 00000014
GetProcessorInfo - Location.Thread - 00000000
GetProcessorInfo - Location2.Package - 00000000
GetProcessorInfo - Location2.Die - 00000000
GetProcessorInfo - Location2.Tile - 00000000
GetProcessorInfo - Location2.Module - 00000000
GetProcessorInfo - Location2.Core - 00000014
GetProcessorInfo - Location2.Thread - 00000000
GetProcessorInfo - Index - 29
GetProcessorInfo - ProcessorId - 0000000000000029
GetProcessorInfo - StatusFlag - 00000006
GetProcessorInfo - Location.Package - 00000000
GetProcessorInfo - Location.Core - 00000014
GetProcessorInfo - Location.Thread - 00000001
GetProcessorInfo - Location2.Package - 00000000
GetProcessorInfo - Location2.Die - 00000000
GetProcessorInfo - Location2.Tile - 00000000
GetProcessorInfo - Location2.Module - 00000000
GetProcessorInfo - Location2.Core - 00000014
GetProcessorInfo - Location2.Thread - 00000001
GetProcessorInfo - Index - 2A
GetProcessorInfo - ProcessorId - 000000000000002A
GetProcessorInfo - StatusFlag - 00000006
GetProcessorInfo - Location.Package - 00000000
GetProcessorInfo - Location.Core - 00000015
GetProcessorInfo - Location.Thread - 00000000
GetProcessorInfo - Location2.Package - 00000000
GetProcessorInfo - Location2.Die - 00000000
GetProcessorInfo - Location2.Tile - 00000000
GetProcessorInfo - Location2.Module - 00000000
GetProcessorInfo - Location2.Core - 00000015
GetProcessorInfo - Location2.Thread - 00000000
GetProcessorInfo - Index - 2B
GetProcessorInfo - ProcessorId - 000000000000002B
GetProcessorInfo - StatusFlag - 00000006
GetProcessorInfo - Location.Package - 00000000
GetProcessorInfo - Location.Core - 00000015
GetProcessorInfo - Location.Thread - 00000001
GetProcessorInfo - Location2.Package - 00000000
GetProcessorInfo - Location2.Die - 00000000
GetProcessorInfo - Location2.Tile - 00000000
GetProcessorInfo - Location2.Module - 00000000
GetProcessorInfo - Location2.Core - 00000015
GetProcessorInfo - Location2.Thread - 00000001
GetProcessorInfo - Index - 2C
GetProcessorInfo - ProcessorId - 000000000000002C
GetProcessorInfo - StatusFlag - 00000006
GetProcessorInfo - Location.Package - 00000000
GetProcessorInfo - Location.Core - 00000016
GetProcessorInfo - Location.Thread - 00000000
GetProcessorInfo - Location2.Package - 00000000
GetProcessorInfo - Location2.Die - 00000000
GetProcessorInfo - Location2.Tile - 00000000
GetProcessorInfo - Location2.Module - 00000000
GetProcessorInfo - Location2.Core - 00000016
GetProcessorInfo - Location2.Thread - 00000000
GetProcessorInfo - Index - 2D
GetProcessorInfo - ProcessorId - 000000000000002D
GetProcessorInfo - StatusFlag - 00000006
GetProcessorInfo - Location.Package - 00000000
GetProcessorInfo - Location.Core - 00000016
GetProcessorInfo - Location.Thread - 00000001
GetProcessorInfo - Location2.Package - 00000000
GetProcessorInfo - Location2.Die - 00000000
GetProcessorInfo - Location2.Tile - 00000000
GetProcessorInfo - Location2.Module - 00000000
GetProcessorInfo - Location2.Core - 00000016
GetProcessorInfo - Location2.Thread - 00000001
GetProcessorInfo - Index - 2E
GetProcessorInfo - ProcessorId - 000000000000002E
GetProcessorInfo - StatusFlag - 00000006
GetProcessorInfo - Location.Package - 00000000
GetProcessorInfo - Location.Core - 00000017
GetProcessorInfo - Location.Thread - 00000000
GetProcessorInfo - Location2.Package - 00000000
GetProcessorInfo - Location2.Die - 00000000
GetProcessorInfo - Location2.Tile - 00000000
GetProcessorInfo - Location2.Module - 00000000
GetProcessorInfo - Location2.Core - 00000017
GetProcessorInfo - Location2.Thread - 00000000
GetProcessorInfo - Index - 2F
GetProcessorInfo - ProcessorId - 000000000000002F
GetProcessorInfo - StatusFlag - 00000006
GetProcessorInfo - Location.Package - 00000000
GetProcessorInfo - Location.Core - 00000017
GetProcessorInfo - Location.Thread - 00000001
GetProcessorInfo - Location2.Package - 00000000
GetProcessorInfo - Location2.Die - 00000000
GetProcessorInfo - Location2.Tile - 00000000
GetProcessorInfo - Location2.Module - 00000000
GetProcessorInfo - Location2.Core - 00000017
GetProcessorInfo - Location2.Thread - 00000001
GetProcessorInfo - Index - 30
GetProcessorInfo - ProcessorId - 0000000000000030
GetProcessorInfo - StatusFlag - 00000006
GetProcessorInfo - Location.Package - 00000000
GetProcessorInfo - Location.Core - 00000018
GetProcessorInfo - Location.Thread - 00000000
GetProcessorInfo - Location2.Package - 00000000
GetProcessorInfo - Location2.Die - 00000000
GetProcessorInfo - Location2.Tile - 00000000
GetProcessorInfo - Location2.Module - 00000000
GetProcessorInfo - Location2.Core - 00000018
GetProcessorInfo - Location2.Thread - 00000000
GetProcessorInfo - Index - 31
GetProcessorInfo - ProcessorId - 0000000000000031
GetProcessorInfo - StatusFlag - 00000006
GetProcessorInfo - Location.Package - 00000000
GetProcessorInfo - Location.Core - 00000018
GetProcessorInfo - Location.Thread - 00000001
GetProcessorInfo - Location2.Package - 00000000
GetProcessorInfo - Location2.Die - 00000000
GetProcessorInfo - Location2.Tile - 00000000
GetProcessorInfo - Location2.Module - 00000000
GetProcessorInfo - Location2.Core - 00000018
GetProcessorInfo - Location2.Thread - 00000001
GetProcessorInfo - Index - 32
GetProcessorInfo - ProcessorId - 0000000000000032
GetProcessorInfo - StatusFlag - 00000006
GetProcessorInfo - Location.Package - 00000000
GetProcessorInfo - Location.Core - 00000019
GetProcessorInfo - Location.Thread - 00000000
GetProcessorInfo - Location2.Package - 00000000
GetProcessorInfo - Location2.Die - 00000000
GetProcessorInfo - Location2.Tile - 00000000
GetProcessorInfo - Location2.Module - 00000000
GetProcessorInfo - Location2.Core - 00000019
GetProcessorInfo - Location2.Thread - 00000000
GetProcessorInfo - Index - 33
GetProcessorInfo - ProcessorId - 0000000000000033
GetProcessorInfo - StatusFlag - 00000006
GetProcessorInfo - Location.Package - 00000000
GetProcessorInfo - Location.Core - 00000019
GetProcessorInfo - Location.Thread - 00000001
GetProcessorInfo - Location2.Package - 00000000
GetProcessorInfo - Location2.Die - 00000000
GetProcessorInfo - Location2.Tile - 00000000
GetProcessorInfo - Location2.Module - 00000000
GetProcessorInfo - Location2.Core - 00000019
GetProcessorInfo - Location2.Thread - 00000001
GetProcessorInfo - Index - 34
GetProcessorInfo - ProcessorId - 0000000000000034
GetProcessorInfo - StatusFlag - 00000006
GetProcessorInfo - Location.Package - 00000000
GetProcessorInfo - Location.Core - 0000001A
GetProcessorInfo - Location.Thread - 00000000
GetProcessorInfo - Location2.Package - 00000000
GetProcessorInfo - Location2.Die - 00000000
GetProcessorInfo - Location2.Tile - 00000000
GetProcessorInfo - Location2.Module - 00000000
GetProcessorInfo - Location2.Core - 0000001A
GetProcessorInfo - Location2.Thread - 00000000
GetProcessorInfo - Index - 35
GetProcessorInfo - ProcessorId - 0000000000000035
GetProcessorInfo - StatusFlag - 00000006
GetProcessorInfo - Location.Package - 00000000
GetProcessorInfo - Location.Core - 0000001A
GetProcessorInfo - Location.Thread - 00000001
GetProcessorInfo - Location2.Package - 00000000
GetProcessorInfo - Location2.Die - 00000000
GetProcessorInfo - Location2.Tile - 00000000
GetProcessorInfo - Location2.Module - 00000000
GetProcessorInfo - Location2.Core - 0000001A
GetProcessorInfo - Location2.Thread - 00000001
GetProcessorInfo - Index - 36
GetProcessorInfo - ProcessorId - 0000000000000036
GetProcessorInfo - StatusFlag - 00000006
GetProcessorInfo - Location.Package - 00000000
GetProcessorInfo - Location.Core - 0000001B
GetProcessorInfo - Location.Thread - 00000000
GetProcessorInfo - Location2.Package - 00000000
GetProcessorInfo - Location2.Die - 00000000
GetProcessorInfo - Location2.Tile - 00000000
GetProcessorInfo - Location2.Module - 00000000
GetProcessorInfo - Location2.Core - 0000001B
GetProcessorInfo - Location2.Thread - 00000000
GetProcessorInfo - Index - 37
GetProcessorInfo - ProcessorId - 0000000000000037
GetProcessorInfo - StatusFlag - 00000006
GetProcessorInfo - Location.Package - 00000000
GetProcessorInfo - Location.Core - 0000001B
GetProcessorInfo - Location.Thread - 00000001
GetProcessorInfo - Location2.Package - 00000000
GetProcessorInfo - Location2.Die - 00000000
GetProcessorInfo - Location2.Tile - 00000000
GetProcessorInfo - Location2.Module - 00000000
GetProcessorInfo - Location2.Core - 0000001B
GetProcessorInfo - Location2.Thread - 00000001
GetProcessorInfo - Index - 38
GetProcessorInfo - ProcessorId - 0000000000000038
GetProcessorInfo - StatusFlag - 00000006
GetProcessorInfo - Location.Package - 00000000
GetProcessorInfo - Location.Core - 0000001C
GetProcessorInfo - Location.Thread - 00000000
GetProcessorInfo - Location2.Package - 00000000
GetProcessorInfo - Location2.Die - 00000000
GetProcessorInfo - Location2.Tile - 00000000
GetProcessorInfo - Location2.Module - 00000000
GetProcessorInfo - Location2.Core - 0000001C
GetProcessorInfo - Location2.Thread - 00000000
GetProcessorInfo - Index - 39
GetProcessorInfo - ProcessorId - 0000000000000039
GetProcessorInfo - StatusFlag - 00000006
GetProcessorInfo - Location.Package - 00000000
GetProcessorInfo - Location.Core - 0000001C
GetProcessorInfo - Location.Thread - 00000001
GetProcessorInfo - Location2.Package - 00000000
GetProcessorInfo - Location2.Die - 00000000
GetProcessorInfo - Location2.Tile - 00000000
GetProcessorInfo - Location2.Module - 00000000
GetProcessorInfo - Location2.Core - 0000001C
GetProcessorInfo - Location2.Thread - 00000001
GetProcessorInfo - Index - 3A
GetProcessorInfo - ProcessorId - 000000000000003A
GetProcessorInfo - StatusFlag - 00000006
GetProcessorInfo - Location.Package - 00000000
GetProcessorInfo - Location.Core - 0000001D
GetProcessorInfo - Location.Thread - 00000000
GetProcessorInfo - Location2.Package - 00000000
GetProcessorInfo - Location2.Die - 00000000
GetProcessorInfo - Location2.Tile - 00000000
GetProcessorInfo - Location2.Module - 00000000
GetProcessorInfo - Location2.Core - 0000001D
GetProcessorInfo - Location2.Thread - 00000000
GetProcessorInfo - Index - 3B
GetProcessorInfo - ProcessorId - 000000000000003B
GetProcessorInfo - StatusFlag - 00000006
GetProcessorInfo - Location.Package - 00000000
GetProcessorInfo - Location.Core - 0000001D
GetProcessorInfo - Location.Thread - 00000001
GetProcessorInfo - Location2.Package - 00000000
GetProcessorInfo - Location2.Die - 00000000
GetProcessorInfo - Location2.Tile - 00000000
GetProcessorInfo - Location2.Module - 00000000
GetProcessorInfo - Location2.Core - 0000001D
GetProcessorInfo - Location2.Thread - 00000001
GetProcessorInfo - Index - 3C
GetProcessorInfo - ProcessorId - 000000000000003C
GetProcessorInfo - StatusFlag - 00000006
GetProcessorInfo - Location.Package - 00000000
GetProcessorInfo - Location.Core - 0000001E
GetProcessorInfo - Location.Thread - 00000000
GetProcessorInfo - Location2.Package - 00000000
GetProcessorInfo - Location2.Die - 00000000
GetProcessorInfo - Location2.Tile - 00000000
GetProcessorInfo - Location2.Module - 00000000
GetProcessorInfo - Location2.Core - 0000001E
GetProcessorInfo - Location2.Thread - 00000000
GetProcessorInfo - Index - 3D
GetProcessorInfo - ProcessorId - 000000000000003D
GetProcessorInfo - StatusFlag - 00000006
GetProcessorInfo - Location.Package - 00000000
GetProcessorInfo - Location.Core - 0000001E
GetProcessorInfo - Location.Thread - 00000001
GetProcessorInfo - Location2.Package - 00000000
GetProcessorInfo - Location2.Die - 00000000
GetProcessorInfo - Location2.Tile - 00000000
GetProcessorInfo - Location2.Module - 00000000
GetProcessorInfo - Location2.Core - 0000001E
GetProcessorInfo - Location2.Thread - 00000001
GetProcessorInfo - Index - 3E
GetProcessorInfo - ProcessorId - 000000000000003E
GetProcessorInfo - StatusFlag - 00000006
GetProcessorInfo - Location.Package - 00000000
GetProcessorInfo - Location.Core - 0000001F
GetProcessorInfo - Location.Thread - 00000000
GetProcessorInfo - Location2.Package - 00000000
GetProcessorInfo - Location2.Die - 00000000
GetProcessorInfo - Location2.Tile - 00000000
GetProcessorInfo - Location2.Module - 00000000
GetProcessorInfo - Location2.Core - 0000001F
GetProcessorInfo - Location2.Thread - 00000000
GetProcessorInfo - Index - 3F
GetProcessorInfo - ProcessorId - 000000000000003F
GetProcessorInfo - StatusFlag - 00000006
GetProcessorInfo - Location.Package - 00000000
GetProcessorInfo - Location.Core - 0000001F
GetProcessorInfo - Location.Thread - 00000001
GetProcessorInfo - Location2.Package - 00000000
GetProcessorInfo - Location2.Die - 00000000
GetProcessorInfo - Location2.Tile - 00000000
GetProcessorInfo - Location2.Module - 00000000
GetProcessorInfo - Location2.Core - 0000001F
GetProcessorInfo - Location2.Thread - 00000001
GetProcessorInfo - Index - 40
GetProcessorInfo - ProcessorId - 0000000000000040
GetProcessorInfo - StatusFlag - 00000006
GetProcessorInfo - Location.Package - 00000000
GetProcessorInfo - Location.Core - 00000020
GetProcessorInfo - Location.Thread - 00000000
GetProcessorInfo - Location2.Package - 00000000
GetProcessorInfo - Location2.Die - 00000000
GetProcessorInfo - Location2.Tile - 00000000
GetProcessorInfo - Location2.Module - 00000000
GetProcessorInfo - Location2.Core - 00000020
GetProcessorInfo - Location2.Thread - 00000000
GetProcessorInfo - Index - 41
GetProcessorInfo - ProcessorId - 0000000000000041
GetProcessorInfo - StatusFlag - 00000006
GetProcessorInfo - Location.Package - 00000000
GetProcessorInfo - Location.Core - 00000020
GetProcessorInfo - Location.Thread - 00000001
GetProcessorInfo - Location2.Package - 00000000
GetProcessorInfo - Location2.Die - 00000000
GetProcessorInfo - Location2.Tile - 00000000
GetProcessorInfo - Location2.Module - 00000000
GetProcessorInfo - Location2.Core - 00000020
GetProcessorInfo - Location2.Thread - 00000001
GetProcessorInfo - Index - 42
GetProcessorInfo - ProcessorId - 0000000000000042
GetProcessorInfo - StatusFlag - 00000006
GetProcessorInfo - Location.Package - 00000000
GetProcessorInfo - Location.Core - 00000021
GetProcessorInfo - Location.Thread - 00000000
GetProcessorInfo - Location2.Package - 00000000
GetProcessorInfo - Location2.Die - 00000000
GetProcessorInfo - Location2.Tile - 00000000
GetProcessorInfo - Location2.Module - 00000000
GetProcessorInfo - Location2.Core - 00000021
GetProcessorInfo - Location2.Thread - 00000000
GetProcessorInfo - Index - 43
GetProcessorInfo - ProcessorId - 0000000000000043
GetProcessorInfo - StatusFlag - 00000006
GetProcessorInfo - Location.Package - 00000000
GetProcessorInfo - Location.Core - 00000021
GetProcessorInfo - Location.Thread - 00000001
GetProcessorInfo - Location2.Package - 00000000
GetProcessorInfo - Location2.Die - 00000000
GetProcessorInfo - Location2.Tile - 00000000
GetProcessorInfo - Location2.Module - 00000000
GetProcessorInfo - Location2.Core - 00000021
GetProcessorInfo - Location2.Thread - 00000001
GetProcessorInfo - Index - 44
GetProcessorInfo - ProcessorId - 0000000000000044
GetProcessorInfo - StatusFlag - 00000006
GetProcessorInfo - Location.Package - 00000000
GetProcessorInfo - Location.Core - 00000022
GetProcessorInfo - Location.Thread - 00000000
GetProcessorInfo - Location2.Package - 00000000
GetProcessorInfo - Location2.Die - 00000000
GetProcessorInfo - Location2.Tile - 00000000
GetProcessorInfo - Location2.Module - 00000000
GetProcessorInfo - Location2.Core - 00000022
GetProcessorInfo - Location2.Thread - 00000000
GetProcessorInfo - Index - 45
GetProcessorInfo - ProcessorId - 0000000000000045
GetProcessorInfo - StatusFlag - 00000006
GetProcessorInfo - Location.Package - 00000000
GetProcessorInfo - Location.Core - 00000022
GetProcessorInfo - Location.Thread - 00000001
GetProcessorInfo - Location2.Package - 00000000
GetProcessorInfo - Location2.Die - 00000000
GetProcessorInfo - Location2.Tile - 00000000
GetProcessorInfo - Location2.Module - 00000000
GetProcessorInfo - Location2.Core - 00000022
GetProcessorInfo - Location2.Thread - 00000001
GetProcessorInfo - Index - 46
GetProcessorInfo - ProcessorId - 0000000000000046
GetProcessorInfo - StatusFlag - 00000006
GetProcessorInfo - Location.Package - 00000000
GetProcessorInfo - Location.Core - 00000023
GetProcessorInfo - Location.Thread - 00000000
GetProcessorInfo - Location2.Package - 00000000
GetProcessorInfo - Location2.Die - 00000000
GetProcessorInfo - Location2.Tile - 00000000
GetProcessorInfo - Location2.Module - 00000000
GetProcessorInfo - Location2.Core - 00000023
GetProcessorInfo - Location2.Thread - 00000000
GetProcessorInfo - Index - 47
GetProcessorInfo - ProcessorId - 0000000000000047
GetProcessorInfo - StatusFlag - 00000006
GetProcessorInfo - Location.Package - 00000000
GetProcessorInfo - Location.Core - 00000023
GetProcessorInfo - Location.Thread - 00000001
GetProcessorInfo - Location2.Package - 00000000
GetProcessorInfo - Location2.Die - 00000000
GetProcessorInfo - Location2.Tile - 00000000
GetProcessorInfo - Location2.Module - 00000000
GetProcessorInfo - Location2.Core - 00000023
GetProcessorInfo - Location2.Thread - 00000001
GetProcessorInfo - Index - 48
GetProcessorInfo - ProcessorId - 0000000000000048
GetProcessorInfo - StatusFlag - 00000006
GetProcessorInfo - Location.Package - 00000000
GetProcessorInfo - Location.Core - 00000024
GetProcessorInfo - Location.Thread - 00000000
GetProcessorInfo - Location2.Package - 00000000
GetProcessorInfo - Location2.Die - 00000000
GetProcessorInfo - Location2.Tile - 00000000
GetProcessorInfo - Location2.Module - 00000000
GetProcessorInfo - Location2.Core - 00000024
GetProcessorInfo - Location2.Thread - 00000000
GetProcessorInfo - Index - 49
GetProcessorInfo - ProcessorId - 0000000000000049
GetProcessorInfo - StatusFlag - 00000006
GetProcessorInfo - Location.Package - 00000000
GetProcessorInfo - Location.Core - 00000024
GetProcessorInfo - Location.Thread - 00000001
GetProcessorInfo - Location2.Package - 00000000
GetProcessorInfo - Location2.Die - 00000000
GetProcessorInfo - Location2.Tile - 00000000
GetProcessorInfo - Location2.Module - 00000000
GetProcessorInfo - Location2.Core - 00000024
GetProcessorInfo - Location2.Thread - 00000001
GetProcessorInfo - Index - 4A
GetProcessorInfo - ProcessorId - 000000000000004A
GetProcessorInfo - StatusFlag - 00000006
GetProcessorInfo - Location.Package - 00000000
GetProcessorInfo - Location.Core - 00000025
GetProcessorInfo - Location.Thread - 00000000
GetProcessorInfo - Location2.Package - 00000000
GetProcessorInfo - Location2.Die - 00000000
GetProcessorInfo - Location2.Tile - 00000000
GetProcessorInfo - Location2.Module - 00000000
GetProcessorInfo - Location2.Core - 00000025
GetProcessorInfo - Location2.Thread - 00000000
GetProcessorInfo - Index - 4B
GetProcessorInfo - ProcessorId - 000000000000004B
GetProcessorInfo - StatusFlag - 00000006
GetProcessorInfo - Location.Package - 00000000
GetProcessorInfo - Location.Core - 00000025
GetProcessorInfo - Location.Thread - 00000001
GetProcessorInfo - Location2.Package - 00000000
GetProcessorInfo - Location2.Die - 00000000
GetProcessorInfo - Location2.Tile - 00000000
GetProcessorInfo - Location2.Module - 00000000
GetProcessorInfo - Location2.Core - 00000025
GetProcessorInfo - Location2.Thread - 00000001
GetProcessorInfo - Index - 4C
GetProcessorInfo - ProcessorId - 000000000000004C
GetProcessorInfo - StatusFlag - 00000006
GetProcessorInfo - Location.Package - 00000000
GetProcessorInfo - Location.Core - 00000026
GetProcessorInfo - Location.Thread - 00000000
GetProcessorInfo - Location2.Package - 00000000
GetProcessorInfo - Location2.Die - 00000000
GetProcessorInfo - Location2.Tile - 00000000
GetProcessorInfo - Location2.Module - 00000000
GetProcessorInfo - Location2.Core - 00000026
GetProcessorInfo - Location2.Thread - 00000000
GetProcessorInfo - Index - 4D
GetProcessorInfo - ProcessorId - 000000000000004D
GetProcessorInfo - StatusFlag - 00000006
GetProcessorInfo - Location.Package - 00000000
GetProcessorInfo - Location.Core - 00000026
GetProcessorInfo - Location.Thread - 00000001
GetProcessorInfo - Location2.Package - 00000000
GetProcessorInfo - Location2.Die - 00000000
GetProcessorInfo - Location2.Tile - 00000000
GetProcessorInfo - Location2.Module - 00000000
GetProcessorInfo - Location2.Core - 00000026
GetProcessorInfo - Location2.Thread - 00000001
GetProcessorInfo - Index - 4E
GetProcessorInfo - ProcessorId - 000000000000004E
GetProcessorInfo - StatusFlag - 00000006
GetProcessorInfo - Location.Package - 00000000
GetProcessorInfo - Location.Core - 00000027
GetProcessorInfo - Location.Thread - 00000000
GetProcessorInfo - Location2.Package - 00000000
GetProcessorInfo - Location2.Die - 00000000
GetProcessorInfo - Location2.Tile - 00000000
GetProcessorInfo - Location2.Module - 00000000
GetProcessorInfo - Location2.Core - 00000027
GetProcessorInfo - Location2.Thread - 00000000
GetProcessorInfo - Index - 4F
GetProcessorInfo - ProcessorId - 000000000000004F
GetProcessorInfo - StatusFlag - 00000006
GetProcessorInfo - Location.Package - 00000000
GetProcessorInfo - Location.Core - 00000027
GetProcessorInfo - Location.Thread - 00000001
GetProcessorInfo - Location2.Package - 00000000
GetProcessorInfo - Location2.Die - 00000000
GetProcessorInfo - Location2.Tile - 00000000
GetProcessorInfo - Location2.Module - 00000000
GetProcessorInfo - Location2.Core - 00000027
GetProcessorInfo - Location2.Thread - 00000001
GetProcessorInfo - Index - 50
GetProcessorInfo - ProcessorId - 0000000000000080
GetProcessorInfo - StatusFlag - 00000006
GetProcessorInfo - Location.Package - 00000001
GetProcessorInfo - Location.Core - 00000000
GetProcessorInfo - Location.Thread - 00000000
GetProcessorInfo - Location2.Package - 00000001
GetProcessorInfo - Location2.Die - 00000000
GetProcessorInfo - Location2.Tile - 00000000
GetProcessorInfo - Location2.Module - 00000000
GetProcessorInfo - Location2.Core - 00000000
GetProcessorInfo - Location2.Thread - 00000000
GetProcessorInfo - Index - 51
GetProcessorInfo - ProcessorId - 0000000000000081
GetProcessorInfo - StatusFlag - 00000006
GetProcessorInfo - Location.Package - 00000001
GetProcessorInfo - Location.Core - 00000000
GetProcessorInfo - Location.Thread - 00000001
GetProcessorInfo - Location2.Package - 00000001
GetProcessorInfo - Location2.Die - 00000000
GetProcessorInfo - Location2.Tile - 00000000
GetProcessorInfo - Location2.Module - 00000000
GetProcessorInfo - Location2.Core - 00000000
GetProcessorInfo - Location2.Thread - 00000001
GetProcessorInfo - Index - 52
GetProcessorInfo - ProcessorId - 0000000000000082
GetProcessorInfo - StatusFlag - 00000006
GetProcessorInfo - Location.Package - 00000001
GetProcessorInfo - Location.Core - 00000001
GetProcessorInfo - Location.Thread - 00000000
GetProcessorInfo - Location2.Package - 00000001
GetProcessorInfo - Location2.Die - 00000000
GetProcessorInfo - Location2.Tile - 00000000
GetProcessorInfo - Location2.Module - 00000000
GetProcessorInfo - Location2.Core - 00000001
GetProcessorInfo - Location2.Thread - 00000000
GetProcessorInfo - Index - 53
GetProcessorInfo - ProcessorId - 0000000000000083
GetProcessorInfo - StatusFlag - 00000006
GetProcessorInfo - Location.Package - 00000001
GetProcessorInfo - Location.Core - 00000001
GetProcessorInfo - Location.Thread - 00000001
GetProcessorInfo - Location2.Package - 00000001
GetProcessorInfo - Location2.Die - 00000000
GetProcessorInfo - Location2.Tile - 00000000
GetProcessorInfo - Location2.Module - 00000000
GetProcessorInfo - Location2.Core - 00000001
GetProcessorInfo - Location2.Thread - 00000001
GetProcessorInfo - Index - 54
GetProcessorInfo - ProcessorId - 0000000000000084
GetProcessorInfo - StatusFlag - 00000006
GetProcessorInfo - Location.Package - 00000001
GetProcessorInfo - Location.Core - 00000002
GetProcessorInfo - Location.Thread - 00000000
GetProcessorInfo - Location2.Package - 00000001
GetProcessorInfo - Location2.Die - 00000000
GetProcessorInfo - Location2.Tile - 00000000
GetProcessorInfo - Location2.Module - 00000000
GetProcessorInfo - Location2.Core - 00000002
GetProcessorInfo - Location2.Thread - 00000000
GetProcessorInfo - Index - 55
GetProcessorInfo - ProcessorId - 0000000000000085
GetProcessorInfo - StatusFlag - 00000006
GetProcessorInfo - Location.Package - 00000001
GetProcessorInfo - Location.Core - 00000002
GetProcessorInfo - Location.Thread - 00000001
GetProcessorInfo - Location2.Package - 00000001
GetProcessorInfo - Location2.Die - 00000000
GetProcessorInfo - Location2.Tile - 00000000
GetProcessorInfo - Location2.Module - 00000000
GetProcessorInfo - Location2.Core - 00000002
GetProcessorInfo - Location2.Thread - 00000001
GetProcessorInfo - Index - 56
GetProcessorInfo - ProcessorId - 0000000000000086
GetProcessorInfo - StatusFlag - 00000006
GetProcessorInfo - Location.Package - 00000001
GetProcessorInfo - Location.Core - 00000003
GetProcessorInfo - Location.Thread - 00000000
GetProcessorInfo - Location2.Package - 00000001
GetProcessorInfo - Location2.Die - 00000000
GetProcessorInfo - Location2.Tile - 00000000
GetProcessorInfo - Location2.Module - 00000000
GetProcessorInfo - Location2.Core - 00000003
GetProcessorInfo - Location2.Thread - 00000000
GetProcessorInfo - Index - 57
GetProcessorInfo - ProcessorId - 0000000000000087
GetProcessorInfo - StatusFlag - 00000006
GetProcessorInfo - Location.Package - 00000001
GetProcessorInfo - Location.Core - 00000003
GetProcessorInfo - Location.Thread - 00000001
GetProcessorInfo - Location2.Package - 00000001
GetProcessorInfo - Location2.Die - 00000000
GetProcessorInfo - Location2.Tile - 00000000
GetProcessorInfo - Location2.Module - 00000000
GetProcessorInfo - Location2.Core - 00000003
GetProcessorInfo - Location2.Thread - 00000001
GetProcessorInfo - Index - 58
GetProcessorInfo - ProcessorId - 0000000000000088
GetProcessorInfo - StatusFlag - 00000006
GetProcessorInfo - Location.Package - 00000001
GetProcessorInfo - Location.Core - 00000004
GetProcessorInfo - Location.Thread - 00000000
GetProcessorInfo - Location2.Package - 00000001
GetProcessorInfo - Location2.Die - 00000000
GetProcessorInfo - Location2.Tile - 00000000
GetProcessorInfo - Location2.Module - 00000000
GetProcessorInfo - Location2.Core - 00000004
GetProcessorInfo - Location2.Thread - 00000000
GetProcessorInfo - Index - 59
GetProcessorInfo - ProcessorId - 0000000000000089
GetProcessorInfo - StatusFlag - 00000006
GetProcessorInfo - Location.Package - 00000001
GetProcessorInfo - Location.Core - 00000004
GetProcessorInfo - Location.Thread - 00000001
GetProcessorInfo - Location2.Package - 00000001
GetProcessorInfo - Location2.Die - 00000000
GetProcessorInfo - Location2.Tile - 00000000
GetProcessorInfo - Location2.Module - 00000000
GetProcessorInfo - Location2.Core - 00000004
GetProcessorInfo - Location2.Thread - 00000001
GetProcessorInfo - Index - 5A
GetProcessorInfo - ProcessorId - 000000000000008A
GetProcessorInfo - StatusFlag - 00000006
GetProcessorInfo - Location.Package - 00000001
GetProcessorInfo - Location.Core - 00000005
GetProcessorInfo - Location.Thread - 00000000
GetProcessorInfo - Location2.Package - 00000001
GetProcessorInfo - Location2.Die - 00000000
GetProcessorInfo - Location2.Tile - 00000000
GetProcessorInfo - Location2.Module - 00000000
GetProcessorInfo - Location2.Core - 00000005
GetProcessorInfo - Location2.Thread - 00000000
GetProcessorInfo - Index - 5B
GetProcessorInfo - ProcessorId - 000000000000008B
GetProcessorInfo - StatusFlag - 00000006
GetProcessorInfo - Location.Package - 00000001
GetProcessorInfo - Location.Core - 00000005
GetProcessorInfo - Location.Thread - 00000001
GetProcessorInfo - Location2.Package - 00000001
GetProcessorInfo - Location2.Die - 00000000
GetProcessorInfo - Location2.Tile - 00000000
GetProcessorInfo - Location2.Module - 00000000
GetProcessorInfo - Location2.Core - 00000005
GetProcessorInfo - Location2.Thread - 00000001
GetProcessorInfo - Index - 5C
GetProcessorInfo - ProcessorId - 000000000000008C
GetProcessorInfo - StatusFlag - 00000006
GetProcessorInfo - Location.Package - 00000001
GetProcessorInfo - Location.Core - 00000006
GetProcessorInfo - Location.Thread - 00000000
GetProcessorInfo - Location2.Package - 00000001
GetProcessorInfo - Location2.Die - 00000000
GetProcessorInfo - Location2.Tile - 00000000
GetProcessorInfo - Location2.Module - 00000000
GetProcessorInfo - Location2.Core - 00000006
GetProcessorInfo - Location2.Thread - 00000000
GetProcessorInfo - Index - 5D
GetProcessorInfo - ProcessorId - 000000000000008D
GetProcessorInfo - StatusFlag - 00000006
GetProcessorInfo - Location.Package - 00000001
GetProcessorInfo - Location.Core - 00000006
GetProcessorInfo - Location.Thread - 00000001
GetProcessorInfo - Location2.Package - 00000001
GetProcessorInfo - Location2.Die - 00000000
GetProcessorInfo - Location2.Tile - 00000000
GetProcessorInfo - Location2.Module - 00000000
GetProcessorInfo - Location2.Core - 00000006
GetProcessorInfo - Location2.Thread - 00000001
GetProcessorInfo - Index - 5E
GetProcessorInfo - ProcessorId - 000000000000008E
GetProcessorInfo - StatusFlag - 00000006
GetProcessorInfo - Location.Package - 00000001
GetProcessorInfo - Location.Core - 00000007
GetProcessorInfo - Location.Thread - 00000000
GetProcessorInfo - Location2.Package - 00000001
GetProcessorInfo - Location2.Die - 00000000
GetProcessorInfo - Location2.Tile - 00000000
GetProcessorInfo - Location2.Module - 00000000
GetProcessorInfo - Location2.Core - 00000007
GetProcessorInfo - Location2.Thread - 00000000
GetProcessorInfo - Index - 5F
GetProcessorInfo - ProcessorId - 000000000000008F
GetProcessorInfo - StatusFlag - 00000006
GetProcessorInfo - Location.Package - 00000001
GetProcessorInfo - Location.Core - 00000007
GetProcessorInfo - Location.Thread - 00000001
GetProcessorInfo - Location2.Package - 00000001
GetProcessorInfo - Location2.Die - 00000000
GetProcessorInfo - Location2.Tile - 00000000
GetProcessorInfo - Location2.Module - 00000000
GetProcessorInfo - Location2.Core - 00000007
GetProcessorInfo - Location2.Thread - 00000001
GetProcessorInfo - Index - 60
GetProcessorInfo - ProcessorId - 0000000000000090
GetProcessorInfo - StatusFlag - 00000006
GetProcessorInfo - Location.Package - 00000001
GetProcessorInfo - Location.Core - 00000008
GetProcessorInfo - Location.Thread - 00000000
GetProcessorInfo - Location2.Package - 00000001
GetProcessorInfo - Location2.Die - 00000000
GetProcessorInfo - Location2.Tile - 00000000
GetProcessorInfo - Location2.Module - 00000000
GetProcessorInfo - Location2.Core - 00000008
GetProcessorInfo - Location2.Thread - 00000000
GetProcessorInfo - Index - 61
GetProcessorInfo - ProcessorId - 0000000000000091
GetProcessorInfo - StatusFlag - 00000006
GetProcessorInfo - Location.Package - 00000001
GetProcessorInfo - Location.Core - 00000008
GetProcessorInfo - Location.Thread - 00000001
GetProcessorInfo - Location2.Package - 00000001
GetProcessorInfo - Location2.Die - 00000000
GetProcessorInfo - Location2.Tile - 00000000
GetProcessorInfo - Location2.Module - 00000000
GetProcessorInfo - Location2.Core - 00000008
GetProcessorInfo - Location2.Thread - 00000001
GetProcessorInfo - Index - 62
GetProcessorInfo - ProcessorId - 0000000000000092
GetProcessorInfo - StatusFlag - 00000006
GetProcessorInfo - Location.Package - 00000001
GetProcessorInfo - Location.Core - 00000009
GetProcessorInfo - Location.Thread - 00000000
GetProcessorInfo - Location2.Package - 00000001
GetProcessorInfo - Location2.Die - 00000000
GetProcessorInfo - Location2.Tile - 00000000
GetProcessorInfo - Location2.Module - 00000000
GetProcessorInfo - Location2.Core - 00000009
GetProcessorInfo - Location2.Thread - 00000000
GetProcessorInfo - Index - 63
GetProcessorInfo - ProcessorId - 0000000000000093
GetProcessorInfo - StatusFlag - 00000006
GetProcessorInfo - Location.Package - 00000001
GetProcessorInfo - Location.Core - 00000009
GetProcessorInfo - Location.Thread - 00000001
GetProcessorInfo - Location2.Package - 00000001
GetProcessorInfo - Location2.Die - 00000000
GetProcessorInfo - Location2.Tile - 00000000
GetProcessorInfo - Location2.Module - 00000000
GetProcessorInfo - Location2.Core - 00000009
GetProcessorInfo - Location2.Thread - 00000001
GetProcessorInfo - Index - 64
GetProcessorInfo - ProcessorId - 0000000000000094
GetProcessorInfo - StatusFlag - 00000006
GetProcessorInfo - Location.Package - 00000001
GetProcessorInfo - Location.Core - 0000000A
GetProcessorInfo - Location.Thread - 00000000
GetProcessorInfo - Location2.Package - 00000001
GetProcessorInfo - Location2.Die - 00000000
GetProcessorInfo - Location2.Tile - 00000000
GetProcessorInfo - Location2.Module - 00000000
GetProcessorInfo - Location2.Core - 0000000A
GetProcessorInfo - Location2.Thread - 00000000
GetProcessorInfo - Index - 65
GetProcessorInfo - ProcessorId - 0000000000000095
GetProcessorInfo - StatusFlag - 00000006
GetProcessorInfo - Location.Package - 00000001
GetProcessorInfo - Location.Core - 0000000A
GetProcessorInfo - Location.Thread - 00000001
GetProcessorInfo - Location2.Package - 00000001
GetProcessorInfo - Location2.Die - 00000000
GetProcessorInfo - Location2.Tile - 00000000
GetProcessorInfo - Location2.Module - 00000000
GetProcessorInfo - Location2.Core - 0000000A
GetProcessorInfo - Location2.Thread - 00000001
GetProcessorInfo - Index - 66
GetProcessorInfo - ProcessorId - 0000000000000096
GetProcessorInfo - StatusFlag - 00000006
GetProcessorInfo - Location.Package - 00000001
GetProcessorInfo - Location.Core - 0000000B
GetProcessorInfo - Location.Thread - 00000000
GetProcessorInfo - Location2.Package - 00000001
GetProcessorInfo - Location2.Die - 00000000
GetProcessorInfo - Location2.Tile - 00000000
GetProcessorInfo - Location2.Module - 00000000
GetProcessorInfo - Location2.Core - 0000000B
GetProcessorInfo - Location2.Thread - 00000000
GetProcessorInfo - Index - 67
GetProcessorInfo - ProcessorId - 0000000000000097
GetProcessorInfo - StatusFlag - 00000006
GetProcessorInfo - Location.Package - 00000001
GetProcessorInfo - Location.Core - 0000000B
GetProcessorInfo - Location.Thread - 00000001
GetProcessorInfo - Location2.Package - 00000001
GetProcessorInfo - Location2.Die - 00000000
GetProcessorInfo - Location2.Tile - 00000000
GetProcessorInfo - Location2.Module - 00000000
GetProcessorInfo - Location2.Core - 0000000B
GetProcessorInfo - Location2.Thread - 00000001
GetProcessorInfo - Index - 68
GetProcessorInfo - ProcessorId - 0000000000000098
GetProcessorInfo - StatusFlag - 00000006
GetProcessorInfo - Location.Package - 00000001
GetProcessorInfo - Location.Core - 0000000C
GetProcessorInfo - Location.Thread - 00000000
GetProcessorInfo - Location2.Package - 00000001
GetProcessorInfo - Location2.Die - 00000000
GetProcessorInfo - Location2.Tile - 00000000
GetProcessorInfo - Location2.Module - 00000000
GetProcessorInfo - Location2.Core - 0000000C
GetProcessorInfo - Location2.Thread - 00000000
GetProcessorInfo - Index - 69
GetProcessorInfo - ProcessorId - 0000000000000099
GetProcessorInfo - StatusFlag - 00000006
GetProcessorInfo - Location.Package - 00000001
GetProcessorInfo - Location.Core - 0000000C
GetProcessorInfo - Location.Thread - 00000001
GetProcessorInfo - Location2.Package - 00000001
GetProcessorInfo - Location2.Die - 00000000
GetProcessorInfo - Location2.Tile - 00000000
GetProcessorInfo - Location2.Module - 00000000
GetProcessorInfo - Location2.Core - 0000000C
GetProcessorInfo - Location2.Thread - 00000001
GetProcessorInfo - Index - 6A
GetProcessorInfo - ProcessorId - 000000000000009A
GetProcessorInfo - StatusFlag - 00000006
GetProcessorInfo - Location.Package - 00000001
GetProcessorInfo - Location.Core - 0000000D
GetProcessorInfo - Location.Thread - 00000000
GetProcessorInfo - Location2.Package - 00000001
GetProcessorInfo - Location2.Die - 00000000
GetProcessorInfo - Location2.Tile - 00000000
GetProcessorInfo - Location2.Module - 00000000
GetProcessorInfo - Location2.Core - 0000000D
GetProcessorInfo - Location2.Thread - 00000000
GetProcessorInfo - Index - 6B
GetProcessorInfo - ProcessorId - 000000000000009B
GetProcessorInfo - StatusFlag - 00000006
GetProcessorInfo - Location.Package - 00000001
GetProcessorInfo - Location.Core - 0000000D
GetProcessorInfo - Location.Thread - 00000001
GetProcessorInfo - Location2.Package - 00000001
GetProcessorInfo - Location2.Die - 00000000
GetProcessorInfo - Location2.Tile - 00000000
GetProcessorInfo - Location2.Module - 00000000
GetProcessorInfo - Location2.Core - 0000000D
GetProcessorInfo - Location2.Thread - 00000001
GetProcessorInfo - Index - 6C
GetProcessorInfo - ProcessorId - 000000000000009C
GetProcessorInfo - StatusFlag - 00000006
GetProcessorInfo - Location.Package - 00000001
GetProcessorInfo - Location.Core - 0000000E
GetProcessorInfo - Location.Thread - 00000000
GetProcessorInfo - Location2.Package - 00000001
GetProcessorInfo - Location2.Die - 00000000
GetProcessorInfo - Location2.Tile - 00000000
GetProcessorInfo - Location2.Module - 00000000
GetProcessorInfo - Location2.Core - 0000000E
GetProcessorInfo - Location2.Thread - 00000000
GetProcessorInfo - Index - 6D
GetProcessorInfo - ProcessorId - 000000000000009D
GetProcessorInfo - StatusFlag - 00000006
GetProcessorInfo - Location.Package - 00000001
GetProcessorInfo - Location.Core - 0000000E
GetProcessorInfo - Location.Thread - 00000001
GetProcessorInfo - Location2.Package - 00000001
GetProcessorInfo - Location2.Die - 00000000
GetProcessorInfo - Location2.Tile - 00000000
GetProcessorInfo - Location2.Module - 00000000
GetProcessorInfo - Location2.Core - 0000000E
GetProcessorInfo - Location2.Thread - 00000001
GetProcessorInfo - Index - 6E
GetProcessorInfo - ProcessorId - 000000000000009E
GetProcessorInfo - StatusFlag - 00000006
GetProcessorInfo - Location.Package - 00000001
GetProcessorInfo - Location.Core - 0000000F
GetProcessorInfo - Location.Thread - 00000000
GetProcessorInfo - Location2.Package - 00000001
GetProcessorInfo - Location2.Die - 00000000
GetProcessorInfo - Location2.Tile - 00000000
GetProcessorInfo - Location2.Module - 00000000
GetProcessorInfo - Location2.Core - 0000000F
GetProcessorInfo - Location2.Thread - 00000000
GetProcessorInfo - Index - 6F
GetProcessorInfo - ProcessorId - 000000000000009F
GetProcessorInfo - StatusFlag - 00000006
GetProcessorInfo - Location.Package - 00000001
GetProcessorInfo - Location.Core - 0000000F
GetProcessorInfo - Location.Thread - 00000001
GetProcessorInfo - Location2.Package - 00000001
GetProcessorInfo - Location2.Die - 00000000
GetProcessorInfo - Location2.Tile - 00000000
GetProcessorInfo - Location2.Module - 00000000
GetProcessorInfo - Location2.Core - 0000000F
GetProcessorInfo - Location2.Thread - 00000001
GetProcessorInfo - Index - 70
GetProcessorInfo - ProcessorId - 00000000000000A0
GetProcessorInfo - StatusFlag - 00000006
GetProcessorInfo - Location.Package - 00000001
GetProcessorInfo - Location.Core - 00000010
GetProcessorInfo - Location.Thread - 00000000
GetProcessorInfo - Location2.Package - 00000001
GetProcessorInfo - Location2.Die - 00000000
GetProcessorInfo - Location2.Tile - 00000000
GetProcessorInfo - Location2.Module - 00000000
GetProcessorInfo - Location2.Core - 00000010
GetProcessorInfo - Location2.Thread - 00000000
GetProcessorInfo - Index - 71
GetProcessorInfo - ProcessorId - 00000000000000A1
GetProcessorInfo - StatusFlag - 00000006
GetProcessorInfo - Location.Package - 00000001
GetProcessorInfo - Location.Core - 00000010
GetProcessorInfo - Location.Thread - 00000001
GetProcessorInfo - Location2.Package - 00000001
GetProcessorInfo - Location2.Die - 00000000
GetProcessorInfo - Location2.Tile - 00000000
GetProcessorInfo - Location2.Module - 00000000
GetProcessorInfo - Location2.Core - 00000010
GetProcessorInfo - Location2.Thread - 00000001
GetProcessorInfo - Index - 72
GetProcessorInfo - ProcessorId - 00000000000000A2
GetProcessorInfo - StatusFlag - 00000006
GetProcessorInfo - Location.Package - 00000001
GetProcessorInfo - Location.Core - 00000011
GetProcessorInfo - Location.Thread - 00000000
GetProcessorInfo - Location2.Package - 00000001
GetProcessorInfo - Location2.Die - 00000000
GetProcessorInfo - Location2.Tile - 00000000
GetProcessorInfo - Location2.Module - 00000000
GetProcessorInfo - Location2.Core - 00000011
GetProcessorInfo - Location2.Thread - 00000000
GetProcessorInfo - Index - 73
GetProcessorInfo - ProcessorId - 00000000000000A3
GetProcessorInfo - StatusFlag - 00000006
GetProcessorInfo - Location.Package - 00000001
GetProcessorInfo - Location.Core - 00000011
GetProcessorInfo - Location.Thread - 00000001
GetProcessorInfo - Location2.Package - 00000001
GetProcessorInfo - Location2.Die - 00000000
GetProcessorInfo - Location2.Tile - 00000000
GetProcessorInfo - Location2.Module - 00000000
GetProcessorInfo - Location2.Core - 00000011
GetProcessorInfo - Location2.Thread - 00000001
GetProcessorInfo - Index - 74
GetProcessorInfo - ProcessorId - 00000000000000A4
GetProcessorInfo - StatusFlag - 00000006
GetProcessorInfo - Location.Package - 00000001
GetProcessorInfo - Location.Core - 00000012
GetProcessorInfo - Location.Thread - 00000000
GetProcessorInfo - Location2.Package - 00000001
GetProcessorInfo - Location2.Die - 00000000
GetProcessorInfo - Location2.Tile - 00000000
GetProcessorInfo - Location2.Module - 00000000
GetProcessorInfo - Location2.Core - 00000012
GetProcessorInfo - Location2.Thread - 00000000
GetProcessorInfo - Index - 75
GetProcessorInfo - ProcessorId - 00000000000000A5
GetProcessorInfo - StatusFlag - 00000006
GetProcessorInfo - Location.Package - 00000001
GetProcessorInfo - Location.Core - 00000012
GetProcessorInfo - Location.Thread - 00000001
GetProcessorInfo - Location2.Package - 00000001
GetProcessorInfo - Location2.Die - 00000000
GetProcessorInfo - Location2.Tile - 00000000
GetProcessorInfo - Location2.Module - 00000000
GetProcessorInfo - Location2.Core - 00000012
GetProcessorInfo - Location2.Thread - 00000001
GetProcessorInfo - Index - 76
GetProcessorInfo - ProcessorId - 00000000000000A6
GetProcessorInfo - StatusFlag - 00000006
GetProcessorInfo - Location.Package - 00000001
GetProcessorInfo - Location.Core - 00000013
GetProcessorInfo - Location.Thread - 00000000
GetProcessorInfo - Location2.Package - 00000001
GetProcessorInfo - Location2.Die - 00000000
GetProcessorInfo - Location2.Tile - 00000000
GetProcessorInfo - Location2.Module - 00000000
GetProcessorInfo - Location2.Core - 00000013
GetProcessorInfo - Location2.Thread - 00000000
GetProcessorInfo - Index - 77
GetProcessorInfo - ProcessorId - 00000000000000A7
GetProcessorInfo - StatusFlag - 00000006
GetProcessorInfo - Location.Package - 00000001
GetProcessorInfo - Location.Core - 00000013
GetProcessorInfo - Location.Thread - 00000001
GetProcessorInfo - Location2.Package - 00000001
GetProcessorInfo - Location2.Die - 00000000
GetProcessorInfo - Location2.Tile - 00000000
GetProcessorInfo - Location2.Module - 00000000
GetProcessorInfo - Location2.Core - 00000013
GetProcessorInfo - Location2.Thread - 00000001
GetProcessorInfo - Index - 78
GetProcessorInfo - ProcessorId - 00000000000000A8
GetProcessorInfo - StatusFlag - 00000006
GetProcessorInfo - Location.Package - 00000001
GetProcessorInfo - Location.Core - 00000014
GetProcessorInfo - Location.Thread - 00000000
GetProcessorInfo - Location2.Package - 00000001
GetProcessorInfo - Location2.Die - 00000000
GetProcessorInfo - Location2.Tile - 00000000
GetProcessorInfo - Location2.Module - 00000000
GetProcessorInfo - Location2.Core - 00000014
GetProcessorInfo - Location2.Thread - 00000000
GetProcessorInfo - Index - 79
GetProcessorInfo - ProcessorId - 00000000000000A9
GetProcessorInfo - StatusFlag - 00000006
GetProcessorInfo - Location.Package - 00000001
GetProcessorInfo - Location.Core - 00000014
GetProcessorInfo - Location.Thread - 00000001
GetProcessorInfo - Location2.Package - 00000001
GetProcessorInfo - Location2.Die - 00000000
GetProcessorInfo - Location2.Tile - 00000000
GetProcessorInfo - Location2.Module - 00000000
GetProcessorInfo - Location2.Core - 00000014
GetProcessorInfo - Location2.Thread - 00000001
GetProcessorInfo - Index - 7A
GetProcessorInfo - ProcessorId - 00000000000000AA
GetProcessorInfo - StatusFlag - 00000006
GetProcessorInfo - Location.Package - 00000001
GetProcessorInfo - Location.Core - 00000015
GetProcessorInfo - Location.Thread - 00000000
GetProcessorInfo - Location2.Package - 00000001
GetProcessorInfo - Location2.Die - 00000000
GetProcessorInfo - Location2.Tile - 00000000
GetProcessorInfo - Location2.Module - 00000000
GetProcessorInfo - Location2.Core - 00000015
GetProcessorInfo - Location2.Thread - 00000000
GetProcessorInfo - Index - 7B
GetProcessorInfo - ProcessorId - 00000000000000AB
GetProcessorInfo - StatusFlag - 00000006
GetProcessorInfo - Location.Package - 00000001
GetProcessorInfo - Location.Core - 00000015
GetProcessorInfo - Location.Thread - 00000001
GetProcessorInfo - Location2.Package - 00000001
GetProcessorInfo - Location2.Die - 00000000
GetProcessorInfo - Location2.Tile - 00000000
GetProcessorInfo - Location2.Module - 00000000
GetProcessorInfo - Location2.Core - 00000015
GetProcessorInfo - Location2.Thread - 00000001
GetProcessorInfo - Index - 7C
GetProcessorInfo - ProcessorId - 00000000000000AC
GetProcessorInfo - StatusFlag - 00000006
GetProcessorInfo - Location.Package - 00000001
GetProcessorInfo - Location.Core - 00000016
GetProcessorInfo - Location.Thread - 00000000
GetProcessorInfo - Location2.Package - 00000001
GetProcessorInfo - Location2.Die - 00000000
GetProcessorInfo - Location2.Tile - 00000000
GetProcessorInfo - Location2.Module - 00000000
GetProcessorInfo - Location2.Core - 00000016
GetProcessorInfo - Location2.Thread - 00000000
GetProcessorInfo - Index - 7D
GetProcessorInfo - ProcessorId - 00000000000000AD
GetProcessorInfo - StatusFlag - 00000006
GetProcessorInfo - Location.Package - 00000001
GetProcessorInfo - Location.Core - 00000016
GetProcessorInfo - Location.Thread - 00000001
GetProcessorInfo - Location2.Package - 00000001
GetProcessorInfo - Location2.Die - 00000000
GetProcessorInfo - Location2.Tile - 00000000
GetProcessorInfo - Location2.Module - 00000000
GetProcessorInfo - Location2.Core - 00000016
GetProcessorInfo - Location2.Thread - 00000001
GetProcessorInfo - Index - 7E
GetProcessorInfo - ProcessorId - 00000000000000AE
GetProcessorInfo - StatusFlag - 00000006
GetProcessorInfo - Location.Package - 00000001
GetProcessorInfo - Location.Core - 00000017
GetProcessorInfo - Location.Thread - 00000000
GetProcessorInfo - Location2.Package - 00000001
GetProcessorInfo - Location2.Die - 00000000
GetProcessorInfo - Location2.Tile - 00000000
GetProcessorInfo - Location2.Module - 00000000
GetProcessorInfo - Location2.Core - 00000017
GetProcessorInfo - Location2.Thread - 00000000
GetProcessorInfo - Index - 7F
GetProcessorInfo - ProcessorId - 00000000000000AF
GetProcessorInfo - StatusFlag - 00000006
GetProcessorInfo - Location.Package - 00000001
GetProcessorInfo - Location.Core - 00000017
GetProcessorInfo - Location.Thread - 00000001
GetProcessorInfo - Location2.Package - 00000001
GetProcessorInfo - Location2.Die - 00000000
GetProcessorInfo - Location2.Tile - 00000000
GetProcessorInfo - Location2.Module - 00000000
GetProcessorInfo - Location2.Core - 00000017
GetProcessorInfo - Location2.Thread - 00000001
GetProcessorInfo - Index - 80
GetProcessorInfo - ProcessorId - 00000000000000B0
GetProcessorInfo - StatusFlag - 00000006
GetProcessorInfo - Location.Package - 00000001
GetProcessorInfo - Location.Core - 00000018
GetProcessorInfo - Location.Thread - 00000000
GetProcessorInfo - Location2.Package - 00000001
GetProcessorInfo - Location2.Die - 00000000
GetProcessorInfo - Location2.Tile - 00000000
GetProcessorInfo - Location2.Module - 00000000
GetProcessorInfo - Location2.Core - 00000018
GetProcessorInfo - Location2.Thread - 00000000
GetProcessorInfo - Index - 81
GetProcessorInfo - ProcessorId - 00000000000000B1
GetProcessorInfo - StatusFlag - 00000006
GetProcessorInfo - Location.Package - 00000001
GetProcessorInfo - Location.Core - 00000018
GetProcessorInfo - Location.Thread - 00000001
GetProcessorInfo - Location2.Package - 00000001
GetProcessorInfo - Location2.Die - 00000000
GetProcessorInfo - Location2.Tile - 00000000
GetProcessorInfo - Location2.Module - 00000000
GetProcessorInfo - Location2.Core - 00000018
GetProcessorInfo - Location2.Thread - 00000001
GetProcessorInfo - Index - 82
GetProcessorInfo - ProcessorId - 00000000000000B2
GetProcessorInfo - StatusFlag - 00000006
GetProcessorInfo - Location.Package - 00000001
GetProcessorInfo - Location.Core - 00000019
GetProcessorInfo - Location.Thread - 00000000
GetProcessorInfo - Location2.Package - 00000001
GetProcessorInfo - Location2.Die - 00000000
GetProcessorInfo - Location2.Tile - 00000000
GetProcessorInfo - Location2.Module - 00000000
GetProcessorInfo - Location2.Core - 00000019
GetProcessorInfo - Location2.Thread - 00000000
GetProcessorInfo - Index - 83
GetProcessorInfo - ProcessorId - 00000000000000B3
GetProcessorInfo - StatusFlag - 00000006
GetProcessorInfo - Location.Package - 00000001
GetProcessorInfo - Location.Core - 00000019
GetProcessorInfo - Location.Thread - 00000001
GetProcessorInfo - Location2.Package - 00000001
GetProcessorInfo - Location2.Die - 00000000
GetProcessorInfo - Location2.Tile - 00000000
GetProcessorInfo - Location2.Module - 00000000
GetProcessorInfo - Location2.Core - 00000019
GetProcessorInfo - Location2.Thread - 00000001
GetProcessorInfo - Index - 84
GetProcessorInfo - ProcessorId - 00000000000000B4
GetProcessorInfo - StatusFlag - 00000006
GetProcessorInfo - Location.Package - 00000001
GetProcessorInfo - Location.Core - 0000001A
GetProcessorInfo - Location.Thread - 00000000
GetProcessorInfo - Location2.Package - 00000001
GetProcessorInfo - Location2.Die - 00000000
GetProcessorInfo - Location2.Tile - 00000000
GetProcessorInfo - Location2.Module - 00000000
GetProcessorInfo - Location2.Core - 0000001A
GetProcessorInfo - Location2.Thread - 00000000
GetProcessorInfo - Index - 85
GetProcessorInfo - ProcessorId - 00000000000000B5
GetProcessorInfo - StatusFlag - 00000006
GetProcessorInfo - Location.Package - 00000001
GetProcessorInfo - Location.Core - 0000001A
GetProcessorInfo - Location.Thread - 00000001
GetProcessorInfo - Location2.Package - 00000001
GetProcessorInfo - Location2.Die - 00000000
GetProcessorInfo - Location2.Tile - 00000000
GetProcessorInfo - Location2.Module - 00000000
GetProcessorInfo - Location2.Core - 0000001A
GetProcessorInfo - Location2.Thread - 00000001
GetProcessorInfo - Index - 86
GetProcessorInfo - ProcessorId - 00000000000000B6
GetProcessorInfo - StatusFlag - 00000006
GetProcessorInfo - Location.Package - 00000001
GetProcessorInfo - Location.Core - 0000001B
GetProcessorInfo - Location.Thread - 00000000
GetProcessorInfo - Location2.Package - 00000001
GetProcessorInfo - Location2.Die - 00000000
GetProcessorInfo - Location2.Tile - 00000000
GetProcessorInfo - Location2.Module - 00000000
GetProcessorInfo - Location2.Core - 0000001B
GetProcessorInfo - Location2.Thread - 00000000
GetProcessorInfo - Index - 87
GetProcessorInfo - ProcessorId - 00000000000000B7
GetProcessorInfo - StatusFlag - 00000006
GetProcessorInfo - Location.Package - 00000001
GetProcessorInfo - Location.Core - 0000001B
GetProcessorInfo - Location.Thread - 00000001
GetProcessorInfo - Location2.Package - 00000001
GetProcessorInfo - Location2.Die - 00000000
GetProcessorInfo - Location2.Tile - 00000000
GetProcessorInfo - Location2.Module - 00000000
GetProcessorInfo - Location2.Core - 0000001B
GetProcessorInfo - Location2.Thread - 00000001
GetProcessorInfo - Index - 88
GetProcessorInfo - ProcessorId - 00000000000000B8
GetProcessorInfo - StatusFlag - 00000006
GetProcessorInfo - Location.Package - 00000001
GetProcessorInfo - Location.Core - 0000001C
GetProcessorInfo - Location.Thread - 00000000
GetProcessorInfo - Location2.Package - 00000001
GetProcessorInfo - Location2.Die - 00000000
GetProcessorInfo - Location2.Tile - 00000000
GetProcessorInfo - Location2.Module - 00000000
GetProcessorInfo - Location2.Core - 0000001C
GetProcessorInfo - Location2.Thread - 00000000
GetProcessorInfo - Index - 89
GetProcessorInfo - ProcessorId - 00000000000000B9
GetProcessorInfo - StatusFlag - 00000006
GetProcessorInfo - Location.Package - 00000001
GetProcessorInfo - Location.Core - 0000001C
GetProcessorInfo - Location.Thread - 00000001
GetProcessorInfo - Location2.Package - 00000001
GetProcessorInfo - Location2.Die - 00000000
GetProcessorInfo - Location2.Tile - 00000000
GetProcessorInfo - Location2.Module - 00000000
GetProcessorInfo - Location2.Core - 0000001C
GetProcessorInfo - Location2.Thread - 00000001
GetProcessorInfo - Index - 8A
GetProcessorInfo - ProcessorId - 00000000000000BA
GetProcessorInfo - StatusFlag - 00000006
GetProcessorInfo - Location.Package - 00000001
GetProcessorInfo - Location.Core - 0000001D
GetProcessorInfo - Location.Thread - 00000000
GetProcessorInfo - Location2.Package - 00000001
GetProcessorInfo - Location2.Die - 00000000
GetProcessorInfo - Location2.Tile - 00000000
GetProcessorInfo - Location2.Module - 00000000
GetProcessorInfo - Location2.Core - 0000001D
GetProcessorInfo - Location2.Thread - 00000000
GetProcessorInfo - Index - 8B
GetProcessorInfo - ProcessorId - 00000000000000BB
GetProcessorInfo - StatusFlag - 00000006
GetProcessorInfo - Location.Package - 00000001
GetProcessorInfo - Location.Core - 0000001D
GetProcessorInfo - Location.Thread - 00000001
GetProcessorInfo - Location2.Package - 00000001
GetProcessorInfo - Location2.Die - 00000000
GetProcessorInfo - Location2.Tile - 00000000
GetProcessorInfo - Location2.Module - 00000000
GetProcessorInfo - Location2.Core - 0000001D
GetProcessorInfo - Location2.Thread - 00000001
GetProcessorInfo - Index - 8C
GetProcessorInfo - ProcessorId - 00000000000000BC
GetProcessorInfo - StatusFlag - 00000006
GetProcessorInfo - Location.Package - 00000001
GetProcessorInfo - Location.Core - 0000001E
GetProcessorInfo - Location.Thread - 00000000
GetProcessorInfo - Location2.Package - 00000001
GetProcessorInfo - Location2.Die - 00000000
GetProcessorInfo - Location2.Tile - 00000000
GetProcessorInfo - Location2.Module - 00000000
GetProcessorInfo - Location2.Core - 0000001E
GetProcessorInfo - Location2.Thread - 00000000
GetProcessorInfo - Index - 8D
GetProcessorInfo - ProcessorId - 00000000000000BD
GetProcessorInfo - StatusFlag - 00000006
GetProcessorInfo - Location.Package - 00000001
GetProcessorInfo - Location.Core - 0000001E
GetProcessorInfo - Location.Thread - 00000001
GetProcessorInfo - Location2.Package - 00000001
GetProcessorInfo - Location2.Die - 00000000
GetProcessorInfo - Location2.Tile - 00000000
GetProcessorInfo - Location2.Module - 00000000
GetProcessorInfo - Location2.Core - 0000001E
GetProcessorInfo - Location2.Thread - 00000001
GetProcessorInfo - Index - 8E
GetProcessorInfo - ProcessorId - 00000000000000BE
GetProcessorInfo - StatusFlag - 00000006
GetProcessorInfo - Location.Package - 00000001
GetProcessorInfo - Location.Core - 0000001F
GetProcessorInfo - Location.Thread - 00000000
GetProcessorInfo - Location2.Package - 00000001
GetProcessorInfo - Location2.Die - 00000000
GetProcessorInfo - Location2.Tile - 00000000
GetProcessorInfo - Location2.Module - 00000000
GetProcessorInfo - Location2.Core - 0000001F
GetProcessorInfo - Location2.Thread - 00000000
GetProcessorInfo - Index - 8F
GetProcessorInfo - ProcessorId - 00000000000000BF
GetProcessorInfo - StatusFlag - 00000006
GetProcessorInfo - Location.Package - 00000001
GetProcessorInfo - Location.Core - 0000001F
GetProcessorInfo - Location.Thread - 00000001
GetProcessorInfo - Location2.Package - 00000001
GetProcessorInfo - Location2.Die - 00000000
GetProcessorInfo - Location2.Tile - 00000000
GetProcessorInfo - Location2.Module - 00000000
GetProcessorInfo - Location2.Core - 0000001F
GetProcessorInfo - Location2.Thread - 00000001
GetProcessorInfo - Index - 90
GetProcessorInfo - ProcessorId - 00000000000000C0
GetProcessorInfo - StatusFlag - 00000006
GetProcessorInfo - Location.Package - 00000001
GetProcessorInfo - Location.Core - 00000020
GetProcessorInfo - Location.Thread - 00000000
GetProcessorInfo - Location2.Package - 00000001
GetProcessorInfo - Location2.Die - 00000000
GetProcessorInfo - Location2.Tile - 00000000
GetProcessorInfo - Location2.Module - 00000000
GetProcessorInfo - Location2.Core - 00000020
GetProcessorInfo - Location2.Thread - 00000000
GetProcessorInfo - Index - 91
GetProcessorInfo - ProcessorId - 00000000000000C1
GetProcessorInfo - StatusFlag - 00000006
GetProcessorInfo - Location.Package - 00000001
GetProcessorInfo - Location.Core - 00000020
GetProcessorInfo - Location.Thread - 00000001
GetProcessorInfo - Location2.Package - 00000001
GetProcessorInfo - Location2.Die - 00000000
GetProcessorInfo - Location2.Tile - 00000000
GetProcessorInfo - Location2.Module - 00000000
GetProcessorInfo - Location2.Core - 00000020
GetProcessorInfo - Location2.Thread - 00000001
GetProcessorInfo - Index - 92
GetProcessorInfo - ProcessorId - 00000000000000C2
GetProcessorInfo - StatusFlag - 00000006
GetProcessorInfo - Location.Package - 00000001
GetProcessorInfo - Location.Core - 00000021
GetProcessorInfo - Location.Thread - 00000000
GetProcessorInfo - Location2.Package - 00000001
GetProcessorInfo - Location2.Die - 00000000
GetProcessorInfo - Location2.Tile - 00000000
GetProcessorInfo - Location2.Module - 00000000
GetProcessorInfo - Location2.Core - 00000021
GetProcessorInfo - Location2.Thread - 00000000
GetProcessorInfo - Index - 93
GetProcessorInfo - ProcessorId - 00000000000000C3
GetProcessorInfo - StatusFlag - 00000006
GetProcessorInfo - Location.Package - 00000001
GetProcessorInfo - Location.Core - 00000021
GetProcessorInfo - Location.Thread - 00000001
GetProcessorInfo - Location2.Package - 00000001
GetProcessorInfo - Location2.Die - 00000000
GetProcessorInfo - Location2.Tile - 00000000
GetProcessorInfo - Location2.Module - 00000000
GetProcessorInfo - Location2.Core - 00000021
GetProcessorInfo - Location2.Thread - 00000001
GetProcessorInfo - Index - 94
GetProcessorInfo - ProcessorId - 00000000000000C4
GetProcessorInfo - StatusFlag - 00000006
GetProcessorInfo - Location.Package - 00000001
GetProcessorInfo - Location.Core - 00000022
GetProcessorInfo - Location.Thread - 00000000
GetProcessorInfo - Location2.Package - 00000001
GetProcessorInfo - Location2.Die - 00000000
GetProcessorInfo - Location2.Tile - 00000000
GetProcessorInfo - Location2.Module - 00000000
GetProcessorInfo - Location2.Core - 00000022
GetProcessorInfo - Location2.Thread - 00000000
GetProcessorInfo - Index - 95
GetProcessorInfo - ProcessorId - 00000000000000C5
GetProcessorInfo - StatusFlag - 00000006
GetProcessorInfo - Location.Package - 00000001
GetProcessorInfo - Location.Core - 00000022
GetProcessorInfo - Location.Thread - 00000001
GetProcessorInfo - Location2.Package - 00000001
GetProcessorInfo - Location2.Die - 00000000
GetProcessorInfo - Location2.Tile - 00000000
GetProcessorInfo - Location2.Module - 00000000
GetProcessorInfo - Location2.Core - 00000022
GetProcessorInfo - Location2.Thread - 00000001
GetProcessorInfo - Index - 96
GetProcessorInfo - ProcessorId - 00000000000000C6
GetProcessorInfo - StatusFlag - 00000006
GetProcessorInfo - Location.Package - 00000001
GetProcessorInfo - Location.Core - 00000023
GetProcessorInfo - Location.Thread - 00000000
GetProcessorInfo - Location2.Package - 00000001
GetProcessorInfo - Location2.Die - 00000000
GetProcessorInfo - Location2.Tile - 00000000
GetProcessorInfo - Location2.Module - 00000000
GetProcessorInfo - Location2.Core - 00000023
GetProcessorInfo - Location2.Thread - 00000000
GetProcessorInfo - Index - 97
GetProcessorInfo - ProcessorId - 00000000000000C7
GetProcessorInfo - StatusFlag - 00000006
GetProcessorInfo - Location.Package - 00000001
GetProcessorInfo - Location.Core - 00000023
GetProcessorInfo - Location.Thread - 00000001
GetProcessorInfo - Location2.Package - 00000001
GetProcessorInfo - Location2.Die - 00000000
GetProcessorInfo - Location2.Tile - 00000000
GetProcessorInfo - Location2.Module - 00000000
GetProcessorInfo - Location2.Core - 00000023
GetProcessorInfo - Location2.Thread - 00000001
GetProcessorInfo - Index - 98
GetProcessorInfo - ProcessorId - 00000000000000C8
GetProcessorInfo - StatusFlag - 00000006
GetProcessorInfo - Location.Package - 00000001
GetProcessorInfo - Location.Core - 00000024
GetProcessorInfo - Location.Thread - 00000000
GetProcessorInfo - Location2.Package - 00000001
GetProcessorInfo - Location2.Die - 00000000
GetProcessorInfo - Location2.Tile - 00000000
GetProcessorInfo - Location2.Module - 00000000
GetProcessorInfo - Location2.Core - 00000024
GetProcessorInfo - Location2.Thread - 00000000
GetProcessorInfo - Index - 99
GetProcessorInfo - ProcessorId - 00000000000000C9
GetProcessorInfo - StatusFlag - 00000006
GetProcessorInfo - Location.Package - 00000001
GetProcessorInfo - Location.Core - 00000024
GetProcessorInfo - Location.Thread - 00000001
GetProcessorInfo - Location2.Package - 00000001
GetProcessorInfo - Location2.Die - 00000000
GetProcessorInfo - Location2.Tile - 00000000
GetProcessorInfo - Location2.Module - 00000000
GetProcessorInfo - Location2.Core - 00000024
GetProcessorInfo - Location2.Thread - 00000001
GetProcessorInfo - Index - 9A
GetProcessorInfo - ProcessorId - 00000000000000CA
GetProcessorInfo - StatusFlag - 00000006
GetProcessorInfo - Location.Package - 00000001
GetProcessorInfo - Location.Core - 00000025
GetProcessorInfo - Location.Thread - 00000000
GetProcessorInfo - Location2.Package - 00000001
GetProcessorInfo - Location2.Die - 00000000
GetProcessorInfo - Location2.Tile - 00000000
GetProcessorInfo - Location2.Module - 00000000
GetProcessorInfo - Location2.Core - 00000025
GetProcessorInfo - Location2.Thread - 00000000
GetProcessorInfo - Index - 9B
GetProcessorInfo - ProcessorId - 00000000000000CB
GetProcessorInfo - StatusFlag - 00000006
GetProcessorInfo - Location.Package - 00000001
GetProcessorInfo - Location.Core - 00000025
GetProcessorInfo - Location.Thread - 00000001
GetProcessorInfo - Location2.Package - 00000001
GetProcessorInfo - Location2.Die - 00000000
GetProcessorInfo - Location2.Tile - 00000000
GetProcessorInfo - Location2.Module - 00000000
GetProcessorInfo - Location2.Core - 00000025
GetProcessorInfo - Location2.Thread - 00000001
GetProcessorInfo - Index - 9C
GetProcessorInfo - ProcessorId - 00000000000000CC
GetProcessorInfo - StatusFlag - 00000006
GetProcessorInfo - Location.Package - 00000001
GetProcessorInfo - Location.Core - 00000026
GetProcessorInfo - Location.Thread - 00000000
GetProcessorInfo - Location2.Package - 00000001
GetProcessorInfo - Location2.Die - 00000000
GetProcessorInfo - Location2.Tile - 00000000
GetProcessorInfo - Location2.Module - 00000000
GetProcessorInfo - Location2.Core - 00000026
GetProcessorInfo - Location2.Thread - 00000000
GetProcessorInfo - Index - 9D
GetProcessorInfo - ProcessorId - 00000000000000CD
GetProcessorInfo - StatusFlag - 00000006
GetProcessorInfo - Location.Package - 00000001
GetProcessorInfo - Location.Core - 00000026
GetProcessorInfo - Location.Thread - 00000001
GetProcessorInfo - Location2.Package - 00000001
GetProcessorInfo - Location2.Die - 00000000
GetProcessorInfo - Location2.Tile - 00000000
GetProcessorInfo - Location2.Module - 00000000
GetProcessorInfo - Location2.Core - 00000026
GetProcessorInfo - Location2.Thread - 00000001
GetProcessorInfo - Index - 9E
GetProcessorInfo - ProcessorId - 00000000000000CE
GetProcessorInfo - StatusFlag - 00000006
GetProcessorInfo - Location.Package - 00000001
GetProcessorInfo - Location.Core - 00000027
GetProcessorInfo - Location.Thread - 00000000
GetProcessorInfo - Location2.Package - 00000001
GetProcessorInfo - Location2.Die - 00000000
GetProcessorInfo - Location2.Tile - 00000000
GetProcessorInfo - Location2.Module - 00000000
GetProcessorInfo - Location2.Core - 00000027
GetProcessorInfo - Location2.Thread - 00000000
GetProcessorInfo - Index - 9F
GetProcessorInfo - ProcessorId - 00000000000000CF
GetProcessorInfo - StatusFlag - 00000006
GetProcessorInfo - Location.Package - 00000001
GetProcessorInfo - Location.Core - 00000027
GetProcessorInfo - Location.Thread - 00000001
GetProcessorInfo - Location2.Package - 00000001
GetProcessorInfo - Location2.Die - 00000000
GetProcessorInfo - Location2.Tile - 00000000
GetProcessorInfo - Location2.Module - 00000000
GetProcessorInfo - Location2.Core - 00000027
GetProcessorInfo - Location2.Thread - 00000001
mCpuConfigLibConfigContextBuffer->NumberOfProcessors = A0
mCpuConfigLibConfigContextBuffer->BspNumber = 0
SMBIOS Package[0] - Processor[0]
SMBIOS Package[1] - Processor[80]
CPU[000]: ThreadCountOfPackage=80 ThreadCountOfDie=80 ThreadCountOfCore=2
CPU[080]: ThreadCountOfPackage=80 ThreadCountOfDie=80 ThreadCountOfCore=2
PROGRESS CODE: V03040003 I0
PDB = c:\efi\servergen2\intel\Build\EagleStreamRpPkg\DEBUG_VS2015x86\X64\ServerSecurityPkg\Tdx\TdxDxe\TdxDxe\DEBUG\TdxDxe.pdb
PROGRESS CODE: V03040002 I0
[MP_DISPATCH] MpDispatch4v0_CommonConstructor BEGIN
[MP_DISPATCH] MpDispatch4v0_CommonConstructor END (Success)
[TDX_LATE] TdxDxeEntryPoint BEGIN
TDX not capable
[TDX_LATE] TdxDxeEntryPoint END (Unsupported)
[MP_DISPATCH] MpDispatch4v0_CommonDestructor BEGIN
[MP_DISPATCH] MpDispatch4v0_CommonDestructor END (Success)
Error: Image at 0006A238000 start failed: Unsupported
PDB = c:\efi\servergen2\intel\Build\EagleStreamRpPkg\DEBUG_VS2015x86\X64\ServerSecurityPkg\Tdx\TdxDxe\TdxDxe\DEBUG\TdxDxe.pdb
PROGRESS CODE: V03040003 I0
PDB = c:\efi\servergen2\intel\Build\EagleStreamRpPkg\DEBUG_VS2015x86\X64\ServerSiliconPkg\Iio\Dxe\IioInit\IioInitSpr\DEBUG\IioInit.pdb
PROGRESS CODE: V03040002 I0
[IIO](TH) Trace Hub requested memory Size is 0. Not allocating memory.
[IIO](TH) PCH Trace Hub not accessible. Disabled.
[IIO](TH) ERROR Failed to configure PCH Trace Hub. Status= Not Ready
ERROR: IioTraceHubInitialize failed. Status= Not Ready
[IIO](SPK) IioSpkSocketInitialize: SocketId: 0
[IIO](SPK) IioSpkSocketInitialize: SocketId: 1
[0.1 p1] 00:15:01.0: Device is not present!
[0.2 p9] 00:26:01.0: Device is not present!
[0.3 p17] 00:37:01.0: Device is not present!
[0.4 p25] 00:48:01.0: Device is not present!
[0.4 p27] 00:48:03.0: Device is not present!
[0.4 p29] 00:48:05.0: Device is not present!
[0.4 p31] 00:48:07.0: Device is not present!
[0.5 p33] 00:59:01.0: Device is not present!
[0.5 p35] 00:59:03.0: Device is not present!
[0.5 p37] 00:59:05.0: Device is not present!
[0.5 p39] 00:59:07.0: Device is not present!
[1.1 p1] 00:97:01.0: Device is not present!
[1.2 p9] 00:A7:01.0: Device is not present!
[1.3 p17] 00:B7:01.0: Device is not present!
[1.4 p25] 00:C7:01.0: Device is not present!
[1.4 p27] 00:C7:03.0: Device is not present!
[1.4 p29] 00:C7:05.0: Device is not present!
[1.4 p31] 00:C7:07.0: Device is not present!
[1.5 p33] 00:D7:01.0: Device is not present!
[1.5 p35] 00:D7:03.0: Device is not present!
[1.5 p37] 00:D7:05.0: Device is not present!
[1.5 p39] 00:D7:07.0: Device is not present!
[1.6 p41] 00:80:01.0: Device is not present!
[1.6 p45] 00:80:05.0: Device is not present!
PROGRESS CODE: V03040003 I0
PDB = c:\efi\servergen2\intel\Build\EagleStreamRpPkg\DEBUG_VS2015x86\X64\ClientOneSiliconPkg\IpBlock\Sps\Sps\Dxe\SpsDxe\DEBUG\SpsDxe.pdb
PROGRESS CODE: V03040002 I0
[HECI Transport-1 DXE] Send pkt: 812E0007
00: 11 00 00 00 01 80 0B 00 - 00 00 00 00 02 00 50 00
10: 50 00 A0 00 00 11 81 FD - 2C 08 05 00 00 80 23 11
20: 10 0F 0E 0D 0C 0B 0A 09 - 08 00 00 00 00 00 0B 23
30: 11 10 0F 0E 0D 0C 0B 0A - 09 08 00 00 00 00 00 00
40: 00 00 00 00 00 00 00 00 - 00 00 00 00 00 00 00 00
50: 00 00 00 00 00 00 00 00 - 00 00 00 00 00 00 00 00
60: 00 00 00 00 00 00 00 00 - 00 00 00 00 00 00 00 00
70: 00 00 00 00 00 00 00 00 - 00 00 00 00 00 00 00 00
80: 00 00 00 00 00 00 00 00 - 00 00 00 00 00 00 00 00
90: 00 00 00 00 00 00 00 00 - 00 00 00 00 00 00 00 00
A0: 00 00 00 00 00 00 00 00 - 00 00 00 00 00 00 00 00
B0: 00 00 00 00 00 00 00 00 - 00 00 00 00 00 00 00 00
C0: 00 00 00 00 00 00 00 00 - 00 00 00 00 00 00 00 00
D0: 00 00 00 00 00 00 00 00 - 00 00 00 00 00 00 00 00
E0: 00 00 00 00 00 00 00 00 - 00 00 00 00 00 00 00 00
F0: 00 00 00 00 00 00 00 00 - 00 00 00 00 00 00 00 00
00: 00 00 00 00 00 00 00 00 - 00 00 00 00 00 00 00 00
10: 00 00 00 00 00 00 00 00 - 00 00 00 00 00 00 00 00
20: 00 00 00 00 00 00 00 00 - 00 00 00 00 00 00
[HECI Transport-1 DXE] Got pkt: 80080007
00: 11 80 00 00 00 00 00 00
PROGRESS CODE: V03040003 I0
PDB = c:\efi\servergen2\intel\Build\EagleStreamRpPkg\DEBUG_VS2015x86\X64\ClientOneSiliconPkg\IpBlock\MeIgnition\Dxe\MeIgnitionDxe\DEBUG\MeIgnitionDxe.pdb
PROGRESS CODE: V03040002 I0
PROGRESS CODE: V03040003 I0
PDB = c:\efi\servergen2\intel\Build\EagleStreamRpPkg\DEBUG_VS2015x86\X64\ClientOneSiliconPkg\IpBlock\Me\MeFwDowngrade\Dxe\MeFwDowngrade\DEBUG\MeFwDowngrade.pdb
PROGRESS CODE: V03040002 I0
Error: Image at 0006A225000 start failed: Unsupported
PDB = c:\efi\servergen2\intel\Build\EagleStreamRpPkg\DEBUG_VS2015x86\X64\ClientOneSiliconPkg\IpBlock\Me\MeFwDowngrade\Dxe\MeFwDowngrade\DEBUG\MeFwDowngrade.pdb
PROGRESS CODE: V03040003 I0
PDB = c:\efi\servergen2\intel\Build\EagleStreamRpPkg\DEBUG_VS2015x86\X64\ClientOneSiliconPkg\IpBlock\Me\MeSmbiosDxe\MeSmbiosDxe\DEBUG\MeSmbiosDxe.pdb
PROGRESS CODE: V03040002 I0
Error: Image at 0006A23C000 start failed: Unsupported
PDB = c:\efi\servergen2\intel\Build\EagleStreamRpPkg\DEBUG_VS2015x86\X64\ClientOneSiliconPkg\IpBlock\Me\MeSmbiosDxe\MeSmbiosDxe\DEBUG\MeSmbiosDxe.pdb
PROGRESS CODE: V03040003 I0
PDB = c:\efi\servergen2\intel\Build\EagleStreamRpPkg\DEBUG_VS2015x86\X64\ServerPlatformPkg\Features\Me\Client\MeSmbiosUpdateConfigDxe\MeSmbiosUpdateConfigDxe\DEBUG\MeSmbiosUpdateConfig.pdb
PROGRESS CODE: V03040002 I0
Error: Image at 0006A22B000 start failed: Unsupported
PDB = c:\efi\servergen2\intel\Build\EagleStreamRpPkg\DEBUG_VS2015x86\X64\ServerPlatformPkg\Features\Me\Client\MeSmbiosUpdateConfigDxe\MeSmbiosUpdateConfigDxe\DEBUG\MeSmbiosUpdateConfig.pdb
PROGRESS CODE: V03040003 I0
PDB = c:\efi\servergen2\intel\Build\EagleStreamRpPkg\DEBUG_VS2015x86\X64\ServerPlatformPkg\Features\Me\MeExtMeasurement\Dxe\MeExtMeasurement\DEBUG\MeExtMeasurement.pdb
PROGRESS CODE: V03040002 I0
MeExtMeasurementEntryPoint: not Me Type
PROGRESS CODE: V03040003 I0
PDB = c:\efi\servergen2\intel\Build\EagleStreamRpPkg\DEBUG_VS2015x86\X64\ServerPlatformPkg\Features\Me\Client\Amt\AmtSaveMebxConfigDxe\AmtSaveMebxConfigDxe\DEBUG\AmtSaveMebxConfig.pdb
PROGRESS CODE: V03040002 I0
Error: Image at 0006A23C000 start failed: Unsupported
PDB = c:\efi\servergen2\intel\Build\EagleStreamRpPkg\DEBUG_VS2015x86\X64\ServerPlatformPkg\Features\Me\Client\Amt\AmtSaveMebxConfigDxe\AmtSaveMebxConfigDxe\DEBUG\AmtSaveMebxConfig.pdb
PROGRESS CODE: V03040003 I0
PDB = c:\efi\servergen2\intel\Build\EagleStreamRpPkg\DEBUG_VS2015x86\X64\XmlCliFeaturePkg\XmlCliCommon\Dxe\XmlCliCommonDxe\DEBUG\XmlCliCommonDxe.pdb
PROGRESS CODE: V03040002 I0
PROGRESS CODE: V03040003 I0
PDB = c:\efi\servergen2\intel\Build\EagleStreamRpPkg\DEBUG_VS2015x86\X64\ServerSecurityPkg\Pfr\DxeSmm\PfrDxe\DEBUG\PfrDxeDriver.pdb
PROGRESS CODE: V03040002 I0
PROGRESS CODE: V03040003 I0
PDB = c:\efi\servergen2\intel\Build\EagleStreamRpPkg\DEBUG_VS2015x86\X64\PcAtChipsetPkg\PcatRealTimeClockRuntimeDxe\PcatRealTimeClockRuntimeDxe\DEBUG\PcRtc.pdb
PROGRESS CODE: V03040002 I0
ERROR: C40000002:V0306000A I0 378D7B65-8DA9-4773-B6E4-A47826A833E1
PROGRESS CODE: V03040003 I0
PDB = c:\efi\servergen2\intel\Build\EagleStreamRpPkg\DEBUG_VS2015x86\X64\SecurityPkg\VariableAuthenticated\SecureBootConfigDxe\SecureBootConfigDxe\DEBUG\SecureBootConfigDxe.pdb
PROGRESS CODE: V03040002 I0
PROGRESS CODE: V03040003 I0
PDB = c:\efi\servergen2\intel\Build\EagleStreamRpPkg\DEBUG_VS2015x86\X64\MdeModulePkg\Universal\MonotonicCounterRuntimeDxe\MonotonicCounterRuntimeDxe\DEBUG\MonotonicCounterRuntimeDxe.pdb
PROGRESS CODE: V03040002 I0
PROGRESS CODE: V03040003 I0
PDB = c:\efi\servergen2\intel\Build\EagleStreamRpPkg\DEBUG_VS2015x86\X64\MdeModulePkg\Universal\CapsuleRuntimeDxe\CapsuleRuntimeDxe\DEBUG\CapsuleRuntimeDxe.pdb
PROGRESS CODE: V03040002 I0
PROGRESS CODE: V03040003 I0
PDB = c:\efi\servergen2\intel\Build\EagleStreamRpPkg\DEBUG_VS2015x86\X64\SecurityPkg\Tcg\MemoryOverwriteControl\TcgMor\DEBUG\TcgMor.pdb
PROGRESS CODE: V03040002 I0
PROGRESS CODE: V03040003 I0
PDB = c:\efi\servergen2\intel\Build\EagleStreamRpPkg\DEBUG_VS2015x86\X64\SecurityPkg\Tcg\Tcg2Config\Tcg2ConfigDxe\DEBUG\Tcg2ConfigDxe.pdb
PROGRESS CODE: V03040002 I0
PROGRESS CODE: V03040003 I0
PDB = c:\efi\servergen2\intel\Build\EagleStreamRpPkg\DEBUG_VS2015x86\X64\SecurityPkg\Tcg\Tcg2Acpi\Tcg2Acpi\DEBUG\Tcg2Acpi.pdb
PROGRESS CODE: V03040002 I0
PROGRESS CODE: V03040003 I0
PDB = c:\efi\servergen2\intel\Build\EagleStreamRpPkg\DEBUG_VS2015x86\X64\ServerPlatformPkg\Platform\Dxe\Tcg2PlatformDxe\Tcg2PlatformDxe\DEBUG\Tcg2PlatformDxe.pdb
PROGRESS CODE: V03040002 I0
Failed to locate gEfiDxeSmmReadyToLockProtocolGuid.
PROGRESS CODE: V03040003 I0
PDB = c:\efi\servergen2\intel\Build\EagleStreamRpPkg\DEBUG_VS2015x86\X64\IntelSiliconPkg\Feature\PcieSecurity\IntelPciDeviceSecurityDxe\IntelPciDeviceSecurityDxe\DEBUG\IntelPciDeviceSecurityDxe.pdb
PROGRESS CODE: V03040002 I0
PROGRESS CODE: V03040003 I0
PDB = c:\efi\servergen2\intel\Build\EagleStreamRpPkg\DEBUG_VS2015x86\X64\ServerPlatformPkg\Platform\Dxe\MemorySubClass\MemorySubClass\DEBUG\MemorySubClass.pdb
PROGRESS CODE: V03040002 I0
PROGRESS CODE: V03040003 I0
PDB = c:\efi\servergen2\intel\Build\EagleStreamRpPkg\DEBUG_VS2015x86\X64\ServerPlatformPkg\Platform\Dxe\EmulationDfxSetup\EmulationDfxSetup\DEBUG\EmulationDfxSetup.pdb
PROGRESS CODE: V03040002 I0
PROGRESS CODE: V03040003 I0
PDB = c:\efi\servergen2\intel\Build\EagleStreamRpPkg\DEBUG_VS2015x86\X64\ServerRasPkg\Driver\Dxe\IioRasInit\IioRasInit\DEBUG\IioRasInit.pdb
PROGRESS CODE: V03040002 I0
PROGRESS CODE: V03040003 I0
PDB = c:\efi\servergen2\intel\Build\EagleStreamRpPkg\DEBUG_VS2015x86\X64\ServerRasPkg\Driver\Dxe\AddressTranslationDxe\AddressTranslationDxe\DEBUG\AddressTranslationDxe.pdb
PROGRESS CODE: V03040002 I0
PROGRESS CODE: V03040003 I0
PDB = c:\efi\servergen2\intel\Build\EagleStreamRpPkg\DEBUG_VS2015x86\X64\ServerPlatformPkg\Features\PrmAddrTransDsmConfigDxe\PrmAddrTransDsmConfigDxe\DEBUG\PrmAddrTransDsmConfigDxe.pdb
PROGRESS CODE: V03040002 I0
PROGRESS CODE: V03040003 I0
PDB = c:\efi\servergen2\intel\Build\EagleStreamRpPkg\DEBUG_VS2015x86\X64\ServerPlatformPkg\Features\PrmAddrTransDsm\PrmAddrTransDsm\DEBUG\PrmAddrTransDsm.pdb
PROGRESS CODE: V03040002 I0
PROGRESS CODE: V03040003 I0
PDB = c:\efi\servergen2\intel\Build\EagleStreamRpPkg\DEBUG_VS2015x86\X64\XmlCliFeaturePkg\XmlCliCommon\Smm\XmlCliCommonSmm\DEBUG\XmlCliCommonSmm.pdb
PROGRESS CODE: V03070002 I0
PROGRESS CODE: V03070003 I0
PDB = c:\efi\servergen2\intel\Build\EagleStreamRpPkg\DEBUG_VS2015x86\X64\ServerSecurityPkg\Pfr\DxeSmm\PfrSmm\DEBUG\PfrSmmDriver.pdb
PROGRESS CODE: V03070002 I0
PROGRESS CODE: V03070003 I0
PDB = c:\efi\servergen2\intel\Build\EagleStreamRpPkg\DEBUG_VS2015x86\X64\UserAuthFeaturePkg\UserAuthenticationDxeSmm\UserAuthenticationSmm\DEBUG\UserAuthenticationSmm.pdb
PROGRESS CODE: V03070002 I0
PROGRESS CODE: V03070003 I0
PDB = c:\efi\servergen2\intel\Build\EagleStreamRpPkg\DEBUG_VS2015x86\X64\ServerRasPkg\Driver\Smm\MemTopology\MemTopology\DEBUG\MemTopology.pdb
PROGRESS CODE: V03070002 I0
PROGRESS CODE: V03070003 I0
PDB = c:\efi\servergen2\intel\Build\EagleStreamRpPkg\DEBUG_VS2015x86\X64\ServerRasPkg\PolicySample\PolicySample\DEBUG\PolicySampleDriver.pdb
PROGRESS CODE: V03070002 I0
InitializePolicyData
Enable Poison when 2LM is enabled
CxlMefnEn: 0x0
PROGRESS CODE: V03070003 I0
PDB = c:\efi\servergen2\intel\Build\EagleStreamRpPkg\DEBUG_VS2015x86\X64\ServerRasPkg\Driver\Smm\PartialMirrorHandler\PartialMirrorHandler\DEBUG\PartialMirrorHandler.pdb
PROGRESS CODE: V03070002 I0
PROGRESS CODE: V03070003 I0
PDB = c:\efi\servergen2\intel\Build\EagleStreamRpPkg\DEBUG_VS2015x86\X64\ServerRasPkg\Driver\Smm\Gen2\ImcErrorHandler\ImcErrorHandler\DEBUG\ImcErrorHandler.pdb
PROGRESS CODE: V03070002 I0
[ImcErrorHandler][CrystalRidgeLib] Failed to locate protocol: Not Found
InitializeImcErrorHandler start!
[imc] initialization start!
[PCLS]: InitPclsSparing()... Start
[PCLS]: Register CheckAndHandlePclsSparing()...
[imc] initialization start!
[imc] ConfigSystemRetryRegister start!
[imc] ImcCorrectableErrorEnable start!
PMemEccModeInit
[imc] initialization start!
[imc] ConfigSystemRetryRegister start!
[imc] ImcCorrectableErrorEnable start!
PMemEccModeInit
aend!
PROGRESS CODE: V03070003 I0
PDB = c:\efi\servergen2\intel\Build\EagleStreamRpPkg\DEBUG_VS2015x86\X64\ServerRasPkg\Driver\Smm\Gen2\ProcessorErrorHandler\ProcessorErrorHandler\DEBUG\ProcessorErrorHandler.pdb
PROGRESS CODE: V03070002 I0
[IEH] Start IEH initialization!
[IEH] Search all IEH device in the system
CXL Stack found, CxlValid 0x0, Cxl11CompatibilityMode 0x0
CXL Stack found, CxlValid 0x0, Cxl11CompatibilityMode 0x0
CXL Stack found, CxlValid 0x0, Cxl11CompatibilityMode 0x0
CXL Stack found, CxlValid 0x0, Cxl11CompatibilityMode 0x0
CXL Stack found, CxlValid 0x0, Cxl11CompatibilityMode 0x0
CXL Stack found, CxlValid 0x0, Cxl11CompatibilityMode 0x0
CXL Stack found, CxlValid 0x0, Cxl11CompatibilityMode 0x0
CXL Stack found, CxlValid 0x0, Cxl11CompatibilityMode 0x0
CXL Stack found, CxlValid 0x0, Cxl11CompatibilityMode 0x0
CXL Stack found, CxlValid 0x0, Cxl11CompatibilityMode 0x0
CXL Stack found, CxlValid 0x0, Cxl11CompatibilityMode 0x0
CXL Stack found, CxlValid 0x0, Cxl11CompatibilityMode 0x0
[IEH]-------------- Print created IEH tree -----------
socket:0x0 Bus:0x7E Dev:0x0 Func:0x3 -- Max Bit Index:0x1D BitIndex :0x0 DevCount on this bit :0x1,
ShareIdx:0x0 socket:0x0 Bus:0x7E Dev:0x0 Func:0x3 -- BitIndex :0x1 DevCount on this bit :0x1,
ShareIdx:0x0 socket:0x0 Bus:0x0 Dev:0x14 Func:0x4 -- BitIndex :0x0 DevCount on this bit :0x1,
ShareIdx:0x0 socket:0x0 Bus:0x0 Dev:0x14 Func:0x4 -- BitIndex :0x1 DevCount on this bit :0x1,
ShareIdx:0x0 socket:0x0 Bus:0x0 Dev:0x14 Func:0x0 -- BitIndex :0x2 DevCount on this bit :0x1,
ShareIdx:0x0 socket:0x0 Bus:0x0 Dev:0x1F Func:0x0 -- BitIndex :0x3 DevCount on this bit :0x1,
ShareIdx:0x0 socket:0x0 Bus:0x0 Dev:0x8 Func:0x0 -- BitIndex :0x4 DevCount on this bit :0x1,
ShareIdx:0x0 socket:0x0 Bus:0x0 Dev:0x9 Func:0x0 -- BitIndex :0x5 DevCount on this bit :0x1,
ShareIdx:0x0 socket:0x0 Bus:0x0 Dev:0xA Func:0x0 -- BitIndex :0x6 DevCount on this bit :0x1,
ShareIdx:0x0 socket:0x0 Bus:0x0 Dev:0xB Func:0x0 -- BitIndex :0x7 DevCount on this bit :0x1,
ShareIdx:0x0 socket:0x0 Bus:0x0 Dev:0xC Func:0x0 -- BitIndex :0x8 DevCount on this bit :0x1,
ShareIdx:0x0 socket:0x0 Bus:0x0 Dev:0xD Func:0x0 -- BitIndex :0x9 DevCount on this bit :0x1,
ShareIdx:0x0 socket:0x0 Bus:0x0 Dev:0xE Func:0x0 -- BitIndex :0xA DevCount on this bit :0x1,
ShareIdx:0x0 socket:0x0 Bus:0x0 Dev:0xF Func:0x0 -- BitIndex :0xB DevCount on this bit :0x1,
ShareIdx:0x0 socket:0x0 Bus:0x0 Dev:0x10 Func:0x0 -- BitIndex :0xC DevCount on this bit :0x1,
ShareIdx:0x0 socket:0x0 Bus:0x0 Dev:0x11 Func:0x0 -- BitIndex :0xD DevCount on this bit :0x1,
ShareIdx:0x0 socket:0x0 Bus:0x0 Dev:0x12 Func:0x0 -- BitIndex :0xE DevCount on this bit :0x1,
ShareIdx:0x0 socket:0x0 Bus:0x0 Dev:0x13 Func:0x0 -- BitIndex :0xF DevCount on this bit :0x1,
ShareIdx:0x0 socket:0x0 Bus:0x0 Dev:0x1A Func:0x0 -- BitIndex :0x10 DevCount on this bit :0x1,
ShareIdx:0x0 socket:0x0 Bus:0x0 Dev:0x1B Func:0x0 -- BitIndex :0x11 DevCount on this bit :0x1,
ShareIdx:0x0 socket:0x0 Bus:0x0 Dev:0x1C Func:0x0 -- BitIndex :0x12 DevCount on this bit :0x1,
ShareIdx:0x0 socket:0x0 Bus:0x0 Dev:0x1D Func:0x0 -- BitIndex :0x13 DevCount on this bit :0x1,
ShareIdx:0x0 socket:0x0 Bus:0x0 Dev:0x1F Func:0x7 -- BitIndex :0x14 DevCount on this bit :0x1,
ShareIdx:0x0 socket:0x0 Bus:0x0 Dev:0x1F Func:0x4 -- BitIndex :0x15 DevCount on this bit :0x1,
ShareIdx:0x0 socket:0x0 Bus:0x0 Dev:0x1F Func:0x0 -- BitIndex :0x16 DevCount on this bit :0x1,
ShareIdx:0x0 socket:0x0 Bus:0x0 Dev:0x17 Func:0x0 -- BitIndex :0x17 DevCount on this bit :0x1,
ShareIdx:0x0 socket:0x0 Bus:0x0 Dev:0x18 Func:0x0 -- BitIndex :0x18 DevCount on this bit :0x1,
ShareIdx:0x0 socket:0x0 Bus:0x0 Dev:0x19 Func:0x0 -- BitIndex :0x19 DevCount on this bit :0x1,
ShareIdx:0x0 socket:0x0 Bus:0x0 Dev:0x1F Func:0x6 -- BitIndex :0x1A DevCount on this bit :0x1,
ShareIdx:0x0 socket:0x0 Bus:0x0 Dev:0x1F Func:0x3 -- BitIndex :0x1B DevCount on this bit :0x1,
ShareIdx:0x0 socket:0x0 Bus:0x0 Dev:0x16 Func:0x0 -- BitIndex :0x1C DevCount on this bit :0x1,
ShareIdx:0x0 socket:0x0 Bus:0x0 Dev:0x0 Func:0x0 -- BitIndex :0x1D DevCount on this bit :0x1,
ShareIdx:0x0 socket:0x0 Bus:0x0 Dev:0x1 Func:0x0 -- BitIndex :0x1E DevCount on this bit :0x1,
ShareIdx:0x0 socket:0x0 Bus:0x0 Dev:0x0 Func:0x0 -- BitIndex :0x1F DevCount on this bit :0x1,
ShareIdx:0x0 socket:0x0 Bus:0x0 Dev:0x0 Func:0x0 -- BitIndex :0x2 DevCount on this bit :0x1,
ShareIdx:0x0 socket:0x0 Bus:0x6A Dev:0x0 Func:0x4 -- BitIndex :0x0 DevCount on this bit :0xA,
ShareIdx:0x0 socket:0x0 Bus:0x6A Dev:0x0 Func:0x4 -- ShareIdx:0x1 socket:0x0 Bus:0x6A Dev:0x0 Func:0x4 -- PSF Dino ShareIdx:0x2 socket:0x0 Bus:0x6A Dev:0x0 Func:0x4 -- PSF HCx ShareIdx:0x3 socket:0x0 Bus:0x6A Dev:0x1 Func:0x0 -- ShareIdx:0x4 socket:0x0 Bus:0x6A Dev:0x2 Func:0x0 -- ShareIdx:0x5 socket:0x0 Bus:0x6A Dev:0x3 Func:0x0 -- ShareIdx:0x6 socket:0x0 Bus:0x6A Dev:0x3 Func:0x1 -- ShareIdx:0x7 socket:0x0 Bus:0x6A Dev:0x3 Func:0x2 -- ShareIdx:0x8 socket:0x0 Bus:0x6B Dev:0x0 Func:0x0 -- ShareIdx:0x9 socket:0x0 Bus:0x6D Dev:0x0 Func:0x0 -- BitIndex :0x1 DevCount on this bit :0x3,
ShareIdx:0x0 socket:0x0 Bus:0x6A Dev:0x0 Func:0x0 -- ShareIdx:0x1 socket:0x0 Bus:0x6A Dev:0x0 Func:0x1 -- ShareIdx:0x2 socket:0x0 Bus:0x6A Dev:0x0 Func:0x2 -- BitIndex :0x3 DevCount on this bit :0x1,
ShareIdx:0x0 socket:0x0 Bus:0x0 Dev:0x0 Func:0x4 -- BitIndex :0x0 DevCount on this bit :0x7,
ShareIdx:0x0 socket:0x0 Bus:0x0 Dev:0x0 Func:0x4 -- ShareIdx:0x1 socket:0x0 Bus:0x0 Dev:0x0 Func:0x4 -- PSF PCIE Pi5 ShareIdx:0x2 socket:0x0 Bus:0x0 Dev:0x0 Func:0x4 -- PCIE GEN4 DMI Pi5 ShareIdx:0x3 socket:0x0 Bus:0x0 Dev:0x0 Func:0x4 -- PCIE GEN5 IAL Pi5 (CXL) ShareIdx:0x4 socket:0x0 Bus:0x0 Dev:0x0 Func:0x4 -- SPD I3C Bus ShareIdx:0x5 socket:0x0 Bus:0x0 Dev:0x0 Func:0x4 -- SPD I3C Bus ShareIdx:0x6 socket:0x0 Bus:0x0 Dev:0x0 Func:0x4 -- CXP SMBUS BitIndex :0x1 DevCount on this bit :0x3,
ShareIdx:0x0 socket:0x0 Bus:0x0 Dev:0x0 Func:0x0 -- ShareIdx:0x1 socket:0x0 Bus:0x0 Dev:0x0 Func:0x1 -- ShareIdx:0x2 socket:0x0 Bus:0x0 Dev:0x0 Func:0x2 -- BitIndex :0x2 DevCount on this bit :0x1,
ShareIdx:0x0 socket:0x0 Bus:0x0 Dev:0x8 Func:0x0 -- BitIndex :0x3 DevCount on this bit :0x1,
ShareIdx:0x0 socket:0x0 Bus:0x0 Dev:0x6 Func:0x0 -- BitIndex :0x4 DevCount on this bit :0x1,
ShareIdx:0x0 socket:0x0 Bus:0x0 Dev:0x4 Func:0x0 -- BitIndex :0x5 DevCount on this bit :0x1,
ShareIdx:0x0 socket:0x0 Bus:0x0 Dev:0x2 Func:0x0 -- BitIndex :0x6 DevCount on this bit :0x1,
ShareIdx:0x0 socket:0x0 Bus:0x0 Dev:0x1 Func:0x0 -- BitIndex :0x7 DevCount on this bit :0x1,
ShareIdx:0x0 socket:0x0 Bus:0x0 Dev:0x3 Func:0x0 -- BitIndex :0x8 DevCount on this bit :0x1,
ShareIdx:0x0 socket:0x0 Bus:0x0 Dev:0x5 Func:0x0 -- BitIndex :0x9 DevCount on this bit :0x1,
ShareIdx:0x0 socket:0x0 Bus:0x0 Dev:0x7 Func:0x0 -- BitIndex :0xA DevCount on this bit :0x1,
Skip Invalid Node
BitIndex :0x4 DevCount on this bit :0x1,
ShareIdx:0x0 socket:0x0 Bus:0x15 Dev:0x0 Func:0x4 -- BitIndex :0x0 DevCount on this bit :0x4,
ShareIdx:0x0 socket:0x0 Bus:0x15 Dev:0x0 Func:0x4 -- ShareIdx:0x1 socket:0x0 Bus:0x15 Dev:0x0 Func:0x4 -- PSF PCIE Pi5 ShareIdx:0x2 socket:0x0 Bus:0x15 Dev:0x0 Func:0x4 -- PCIE GEN4 DMI Pi5 ShareIdx:0x3 socket:0x0 Bus:0x15 Dev:0x0 Func:0x4 -- PCIE GEN5 IAL Pi5 (CXL) BitIndex :0x1 DevCount on this bit :0x3,
ShareIdx:0x0 socket:0x0 Bus:0x15 Dev:0x0 Func:0x0 -- ShareIdx:0x1 socket:0x0 Bus:0x15 Dev:0x0 Func:0x1 -- ShareIdx:0x2 socket:0x0 Bus:0x15 Dev:0x0 Func:0x2 -- BitIndex :0x2 DevCount on this bit :0x1,
ShareIdx:0x0 socket:0x0 Bus:0x15 Dev:0x8 Func:0x0 -- BitIndex :0x3 DevCount on this bit :0x1,
ShareIdx:0x0 socket:0x0 Bus:0x15 Dev:0x6 Func:0x0 -- BitIndex :0x4 DevCount on this bit :0x1,
ShareIdx:0x0 socket:0x0 Bus:0x15 Dev:0x4 Func:0x0 -- BitIndex :0x5 DevCount on this bit :0x1,
ShareIdx:0x0 socket:0x0 Bus:0x15 Dev:0x2 Func:0x0 -- BitIndex :0x6 DevCount on this bit :0x1,
ShareIdx:0x0 socket:0x0 Bus:0x15 Dev:0x1 Func:0x0 -- BitIndex :0x7 DevCount on this bit :0x1,
ShareIdx:0x0 socket:0x0 Bus:0x15 Dev:0x3 Func:0x0 -- BitIndex :0x8 DevCount on this bit :0x1,
ShareIdx:0x0 socket:0x0 Bus:0x15 Dev:0x5 Func:0x0 -- BitIndex :0x9 DevCount on this bit :0x1,
ShareIdx:0x0 socket:0x0 Bus:0x15 Dev:0x7 Func:0x0 -- BitIndex :0x5 DevCount on this bit :0x1,
ShareIdx:0x0 socket:0x0 Bus:0x6F Dev:0x0 Func:0x4 -- BitIndex :0x0 DevCount on this bit :0xA,
ShareIdx:0x0 socket:0x0 Bus:0x6F Dev:0x0 Func:0x4 -- ShareIdx:0x1 socket:0x0 Bus:0x6F Dev:0x0 Func:0x4 -- PSF Dino ShareIdx:0x2 socket:0x0 Bus:0x6F Dev:0x0 Func:0x4 -- PSF HCx ShareIdx:0x3 socket:0x0 Bus:0x6F Dev:0x1 Func:0x0 -- ShareIdx:0x4 socket:0x0 Bus:0x6F Dev:0x2 Func:0x0 -- ShareIdx:0x5 socket:0x0 Bus:0x6F Dev:0x3 Func:0x0 -- ShareIdx:0x6 socket:0x0 Bus:0x6F Dev:0x3 Func:0x1 -- ShareIdx:0x7 socket:0x0 Bus:0x6F Dev:0x3 Func:0x2 -- ShareIdx:0x8 socket:0x0 Bus:0x70 Dev:0x0 Func:0x0 -- ShareIdx:0x9 socket:0x0 Bus:0x72 Dev:0x0 Func:0x0 -- BitIndex :0x1 DevCount on this bit :0x3,
ShareIdx:0x0 socket:0x0 Bus:0x6F Dev:0x0 Func:0x0 -- ShareIdx:0x1 socket:0x0 Bus:0x6F Dev:0x0 Func:0x1 -- ShareIdx:0x2 socket:0x0 Bus:0x6F Dev:0x0 Func:0x2 -- BitIndex :0x6 DevCount on this bit :0x1,
Skip Invalid Node
BitIndex :0x7 DevCount on this bit :0x1,
ShareIdx:0x0 socket:0x0 Bus:0x59 Dev:0x0 Func:0x4 -- BitIndex :0x0 DevCount on this bit :0x4,
ShareIdx:0x0 socket:0x0 Bus:0x59 Dev:0x0 Func:0x4 -- ShareIdx:0x1 socket:0x0 Bus:0x59 Dev:0x0 Func:0x4 -- PSF PCIE Pi5 ShareIdx:0x2 socket:0x0 Bus:0x59 Dev:0x0 Func:0x4 -- PCIE GEN4 DMI Pi5 ShareIdx:0x3 socket:0x0 Bus:0x59 Dev:0x0 Func:0x4 -- PCIE GEN5 IAL Pi5 (CXL) BitIndex :0x1 DevCount on this bit :0x3,
ShareIdx:0x0 socket:0x0 Bus:0x59 Dev:0x0 Func:0x0 -- ShareIdx:0x1 socket:0x0 Bus:0x59 Dev:0x0 Func:0x1 -- ShareIdx:0x2 socket:0x0 Bus:0x59 Dev:0x0 Func:0x2 -- BitIndex :0x2 DevCount on this bit :0x1,
ShareIdx:0x0 socket:0x0 Bus:0x59 Dev:0x8 Func:0x0 -- BitIndex :0x3 DevCount on this bit :0x1,
ShareIdx:0x0 socket:0x0 Bus:0x59 Dev:0x6 Func:0x0 -- BitIndex :0x4 DevCount on this bit :0x1,
ShareIdx:0x0 socket:0x0 Bus:0x59 Dev:0x4 Func:0x0 -- BitIndex :0x5 DevCount on this bit :0x1,
ShareIdx:0x0 socket:0x0 Bus:0x59 Dev:0x2 Func:0x0 -- BitIndex :0x6 DevCount on this bit :0x1,
ShareIdx:0x0 socket:0x0 Bus:0x59 Dev:0x1 Func:0x0 -- BitIndex :0x7 DevCount on this bit :0x1,
ShareIdx:0x0 socket:0x0 Bus:0x59 Dev:0x3 Func:0x0 -- BitIndex :0x8 DevCount on this bit :0x1,
ShareIdx:0x0 socket:0x0 Bus:0x59 Dev:0x5 Func:0x0 -- BitIndex :0x9 DevCount on this bit :0x1,
ShareIdx:0x0 socket:0x0 Bus:0x59 Dev:0x7 Func:0x0 -- BitIndex :0x8 DevCount on this bit :0x1,
ShareIdx:0x0 socket:0x0 Bus:0x74 Dev:0x0 Func:0x4 -- BitIndex :0x0 DevCount on this bit :0xA,
ShareIdx:0x0 socket:0x0 Bus:0x74 Dev:0x0 Func:0x4 -- ShareIdx:0x1 socket:0x0 Bus:0x74 Dev:0x0 Func:0x4 -- PSF Dino ShareIdx:0x2 socket:0x0 Bus:0x74 Dev:0x0 Func:0x4 -- PSF HCx ShareIdx:0x3 socket:0x0 Bus:0x74 Dev:0x1 Func:0x0 -- ShareIdx:0x4 socket:0x0 Bus:0x74 Dev:0x2 Func:0x0 -- ShareIdx:0x5 socket:0x0 Bus:0x74 Dev:0x3 Func:0x0 -- ShareIdx:0x6 socket:0x0 Bus:0x74 Dev:0x3 Func:0x1 -- ShareIdx:0x7 socket:0x0 Bus:0x74 Dev:0x3 Func:0x2 -- ShareIdx:0x8 socket:0x0 Bus:0x75 Dev:0x0 Func:0x0 -- ShareIdx:0x9 socket:0x0 Bus:0x77 Dev:0x0 Func:0x0 -- BitIndex :0x1 DevCount on this bit :0x3,
ShareIdx:0x0 socket:0x0 Bus:0x74 Dev:0x0 Func:0x0 -- ShareIdx:0x1 socket:0x0 Bus:0x74 Dev:0x0 Func:0x1 -- ShareIdx:0x2 socket:0x0 Bus:0x74 Dev:0x0 Func:0x2 -- BitIndex :0x9 DevCount on this bit :0x1,
ShareIdx:0x0 socket:0x0 Bus:0x37 Dev:0x0 Func:0x4 -- BitIndex :0x0 DevCount on this bit :0x4,
ShareIdx:0x0 socket:0x0 Bus:0x37 Dev:0x0 Func:0x4 -- ShareIdx:0x1 socket:0x0 Bus:0x37 Dev:0x0 Func:0x4 -- PSF PCIE Pi5 ShareIdx:0x2 socket:0x0 Bus:0x37 Dev:0x0 Func:0x4 -- PCIE GEN4 DMI Pi5 ShareIdx:0x3 socket:0x0 Bus:0x37 Dev:0x0 Func:0x4 -- PCIE GEN5 IAL Pi5 (CXL) BitIndex :0x1 DevCount on this bit :0x3,
ShareIdx:0x0 socket:0x0 Bus:0x37 Dev:0x0 Func:0x0 -- ShareIdx:0x1 socket:0x0 Bus:0x37 Dev:0x0 Func:0x1 -- ShareIdx:0x2 socket:0x0 Bus:0x37 Dev:0x0 Func:0x2 -- BitIndex :0x2 DevCount on this bit :0x1,
ShareIdx:0x0 socket:0x0 Bus:0x37 Dev:0x8 Func:0x0 -- BitIndex :0x3 DevCount on this bit :0x1,
ShareIdx:0x0 socket:0x0 Bus:0x37 Dev:0x6 Func:0x0 -- BitIndex :0x4 DevCount on this bit :0x1,
ShareIdx:0x0 socket:0x0 Bus:0x37 Dev:0x4 Func:0x0 -- BitIndex :0x5 DevCount on this bit :0x1,
ShareIdx:0x0 socket:0x0 Bus:0x37 Dev:0x2 Func:0x0 -- BitIndex :0x6 DevCount on this bit :0x1,
ShareIdx:0x0 socket:0x0 Bus:0x37 Dev:0x1 Func:0x0 -- BitIndex :0x7 DevCount on this bit :0x1,
ShareIdx:0x0 socket:0x0 Bus:0x37 Dev:0x3 Func:0x0 -- BitIndex :0x8 DevCount on this bit :0x1,
ShareIdx:0x0 socket:0x0 Bus:0x37 Dev:0x5 Func:0x0 -- BitIndex :0x9 DevCount on this bit :0x1,
ShareIdx:0x0 socket:0x0 Bus:0x37 Dev:0x7 Func:0x0 -- BitIndex :0xA DevCount on this bit :0x1,
ShareIdx:0x0 socket:0x0 Bus:0x26 Dev:0x0 Func:0x4 -- BitIndex :0x0 DevCount on this bit :0x4,
ShareIdx:0x0 socket:0x0 Bus:0x26 Dev:0x0 Func:0x4 -- ShareIdx:0x1 socket:0x0 Bus:0x26 Dev:0x0 Func:0x4 -- PSF PCIE Pi5 ShareIdx:0x2 socket:0x0 Bus:0x26 Dev:0x0 Func:0x4 -- PCIE GEN4 DMI Pi5 ShareIdx:0x3 socket:0x0 Bus:0x26 Dev:0x0 Func:0x4 -- PCIE GEN5 IAL Pi5 (CXL) BitIndex :0x1 DevCount on this bit :0x3,
ShareIdx:0x0 socket:0x0 Bus:0x26 Dev:0x0 Func:0x0 -- ShareIdx:0x1 socket:0x0 Bus:0x26 Dev:0x0 Func:0x1 -- ShareIdx:0x2 socket:0x0 Bus:0x26 Dev:0x0 Func:0x2 -- BitIndex :0x2 DevCount on this bit :0x1,
ShareIdx:0x0 socket:0x0 Bus:0x26 Dev:0x8 Func:0x0 -- BitIndex :0x3 DevCount on this bit :0x1,
ShareIdx:0x0 socket:0x0 Bus:0x26 Dev:0x6 Func:0x0 -- BitIndex :0x4 DevCount on this bit :0x1,
ShareIdx:0x0 socket:0x0 Bus:0x26 Dev:0x4 Func:0x0 -- BitIndex :0x5 DevCount on this bit :0x1,
ShareIdx:0x0 socket:0x0 Bus:0x26 Dev:0x2 Func:0x0 -- BitIndex :0x6 DevCount on this bit :0x1,
ShareIdx:0x0 socket:0x0 Bus:0x26 Dev:0x1 Func:0x0 -- BitIndex :0x7 DevCount on this bit :0x1,
ShareIdx:0x0 socket:0x0 Bus:0x26 Dev:0x3 Func:0x0 -- BitIndex :0x8 DevCount on this bit :0x1,
ShareIdx:0x0 socket:0x0 Bus:0x26 Dev:0x5 Func:0x0 -- BitIndex :0x9 DevCount on this bit :0x1,
ShareIdx:0x0 socket:0x0 Bus:0x26 Dev:0x7 Func:0x0 -- BitIndex :0xB DevCount on this bit :0x1,
ShareIdx:0x0 socket:0x0 Bus:0x79 Dev:0x0 Func:0x4 -- BitIndex :0x0 DevCount on this bit :0xA,
ShareIdx:0x0 socket:0x0 Bus:0x79 Dev:0x0 Func:0x4 -- ShareIdx:0x1 socket:0x0 Bus:0x79 Dev:0x0 Func:0x4 -- PSF Dino ShareIdx:0x2 socket:0x0 Bus:0x79 Dev:0x0 Func:0x4 -- PSF HCx ShareIdx:0x3 socket:0x0 Bus:0x79 Dev:0x1 Func:0x0 -- ShareIdx:0x4 socket:0x0 Bus:0x79 Dev:0x2 Func:0x0 -- ShareIdx:0x5 socket:0x0 Bus:0x79 Dev:0x3 Func:0x0 -- ShareIdx:0x6 socket:0x0 Bus:0x79 Dev:0x3 Func:0x1 -- ShareIdx:0x7 socket:0x0 Bus:0x79 Dev:0x3 Func:0x2 -- ShareIdx:0x8 socket:0x0 Bus:0x7A Dev:0x0 Func:0x0 -- ShareIdx:0x9 socket:0x0 Bus:0x7C Dev:0x0 Func:0x0 -- BitIndex :0x1 DevCount on this bit :0x3,
ShareIdx:0x0 socket:0x0 Bus:0x79 Dev:0x0 Func:0x0 -- ShareIdx:0x1 socket:0x0 Bus:0x79 Dev:0x0 Func:0x1 -- ShareIdx:0x2 socket:0x0 Bus:0x79 Dev:0x0 Func:0x2 -- BitIndex :0xC DevCount on this bit :0x1,
Skip Invalid Node
BitIndex :0xD DevCount on this bit :0x1,
ShareIdx:0x0 socket:0x0 Bus:0x48 Dev:0x0 Func:0x4 -- BitIndex :0x0 DevCount on this bit :0x4,
ShareIdx:0x0 socket:0x0 Bus:0x48 Dev:0x0 Func:0x4 -- ShareIdx:0x1 socket:0x0 Bus:0x48 Dev:0x0 Func:0x4 -- PSF PCIE Pi5 ShareIdx:0x2 socket:0x0 Bus:0x48 Dev:0x0 Func:0x4 -- PCIE GEN4 DMI Pi5 ShareIdx:0x3 socket:0x0 Bus:0x48 Dev:0x0 Func:0x4 -- PCIE GEN5 IAL Pi5 (CXL) BitIndex :0x1 DevCount on this bit :0x3,
ShareIdx:0x0 socket:0x0 Bus:0x48 Dev:0x0 Func:0x0 -- ShareIdx:0x1 socket:0x0 Bus:0x48 Dev:0x0 Func:0x1 -- ShareIdx:0x2 socket:0x0 Bus:0x48 Dev:0x0 Func:0x2 -- BitIndex :0x2 DevCount on this bit :0x1,
ShareIdx:0x0 socket:0x0 Bus:0x48 Dev:0x8 Func:0x0 -- BitIndex :0x3 DevCount on this bit :0x1,
ShareIdx:0x0 socket:0x0 Bus:0x48 Dev:0x6 Func:0x0 -- BitIndex :0x4 DevCount on this bit :0x1,
ShareIdx:0x0 socket:0x0 Bus:0x48 Dev:0x4 Func:0x0 -- BitIndex :0x5 DevCount on this bit :0x1,
ShareIdx:0x0 socket:0x0 Bus:0x48 Dev:0x2 Func:0x0 -- BitIndex :0x6 DevCount on this bit :0x1,
ShareIdx:0x0 socket:0x0 Bus:0x48 Dev:0x1 Func:0x0 -- BitIndex :0x7 DevCount on this bit :0x1,
ShareIdx:0x0 socket:0x0 Bus:0x48 Dev:0x3 Func:0x0 -- BitIndex :0x8 DevCount on this bit :0x1,
ShareIdx:0x0 socket:0x0 Bus:0x48 Dev:0x5 Func:0x0 -- BitIndex :0x9 DevCount on this bit :0x1,
ShareIdx:0x0 socket:0x0 Bus:0x48 Dev:0x7 Func:0x0 -- BitIndex :0xE DevCount on this bit :0x0,
BitIndex :0xF DevCount on this bit :0x0,
BitIndex :0x10 DevCount on this bit :0x0,
BitIndex :0x11 DevCount on this bit :0x0,
BitIndex :0x12 DevCount on this bit :0x0,
BitIndex :0x13 DevCount on this bit :0x0,
BitIndex :0x14 DevCount on this bit :0x0,
BitIndex :0x15 DevCount on this bit :0x0,
BitIndex :0x16 DevCount on this bit :0x4,
ShareIdx:0x0 socket:0x0 Bus:0x7E Dev:0x0 Func:0x0 -- ShareIdx:0x1 socket:0x0 Bus:0x7E Dev:0x0 Func:0x0 -- ShareIdx:0x2 socket:0x0 Bus:0x7E Dev:0x0 Func:0x0 -- ShareIdx:0x3 socket:0x0 Bus:0x7E Dev:0x0 Func:0x0 -- BitIndex :0x17 DevCount on this bit :0x4,
ShareIdx:0x0 socket:0x0 Bus:0x7E Dev:0x0 Func:0x0 -- ShareIdx:0x1 socket:0x0 Bus:0x7E Dev:0x0 Func:0x0 -- ShareIdx:0x2 socket:0x0 Bus:0x7E Dev:0x0 Func:0x0 -- ShareIdx:0x3 socket:0x0 Bus:0x7E Dev:0x0 Func:0x0 -- BitIndex :0x18 DevCount on this bit :0x4,
ShareIdx:0x0 socket:0x0 Bus:0x7E Dev:0x0 Func:0x0 -- ShareIdx:0x1 socket:0x0 Bus:0x7E Dev:0x0 Func:0x0 -- ShareIdx:0x2 socket:0x0 Bus:0x7E Dev:0x0 Func:0x0 -- ShareIdx:0x3 socket:0x0 Bus:0x7E Dev:0x0 Func:0x0 -- BitIndex :0x19 DevCount on this bit :0x4,
ShareIdx:0x0 socket:0x0 Bus:0x7E Dev:0x0 Func:0x0 -- ShareIdx:0x1 socket:0x0 Bus:0x7E Dev:0x0 Func:0x0 -- ShareIdx:0x2 socket:0x0 Bus:0x7E Dev:0x0 Func:0x0 -- ShareIdx:0x3 socket:0x0 Bus:0x7E Dev:0x0 Func:0x0 -- BitIndex :0x1A DevCount on this bit :0x4,
ShareIdx:0x0 socket:0x0 Bus:0x7E Dev:0x0 Func:0x0 -- ShareIdx:0x1 socket:0x0 Bus:0x7E Dev:0x0 Func:0x0 -- ShareIdx:0x2 socket:0x0 Bus:0x7E Dev:0x0 Func:0x0 -- ShareIdx:0x3 socket:0x0 Bus:0x7E Dev:0x0 Func:0x0 -- BitIndex :0x1B DevCount on this bit :0x4,
ShareIdx:0x0 socket:0x0 Bus:0x7E Dev:0x0 Func:0x0 -- ShareIdx:0x1 socket:0x0 Bus:0x7E Dev:0x0 Func:0x0 -- ShareIdx:0x2 socket:0x0 Bus:0x7E Dev:0x0 Func:0x0 -- ShareIdx:0x3 socket:0x0 Bus:0x7E Dev:0x0 Func:0x0 -- BitIndex :0x1C DevCount on this bit :0x4,
ShareIdx:0x0 socket:0x0 Bus:0x7E Dev:0x0 Func:0x0 -- ShareIdx:0x1 socket:0x0 Bus:0x7E Dev:0x0 Func:0x0 -- ShareIdx:0x2 socket:0x0 Bus:0x7E Dev:0x0 Func:0x0 -- ShareIdx:0x3 socket:0x0 Bus:0x7E Dev:0x0 Func:0x0 -- BitIndex :0x1D DevCount on this bit :0x4,
ShareIdx:0x0 socket:0x0 Bus:0x7E Dev:0x0 Func:0x0 -- ShareIdx:0x1 socket:0x0 Bus:0x7E Dev:0x0 Func:0x0 -- ShareIdx:0x2 socket:0x0 Bus:0x7E Dev:0x0 Func:0x0 -- ShareIdx:0x3 socket:0x0 Bus:0x7E Dev:0x0 Func:0x0 -- socket:0x1 Bus:0xFE Dev:0x0 Func:0x3 -- Max Bit Index:0x1D BitIndex :0x0 DevCount on this bit :0x1,
ShareIdx:0x0 socket:0x1 Bus:0xFE Dev:0x0 Func:0x3 -- BitIndex :0x1 DevCount on this bit :0x1,
Skip Invalid Node
BitIndex :0x2 DevCount on this bit :0x1,
ShareIdx:0x0 socket:0x1 Bus:0xE7 Dev:0x0 Func:0x4 -- BitIndex :0x0 DevCount on this bit :0xA,
ShareIdx:0x0 socket:0x1 Bus:0xE7 Dev:0x0 Func:0x4 -- ShareIdx:0x1 socket:0x1 Bus:0xE7 Dev:0x0 Func:0x4 -- PSF Dino ShareIdx:0x2 socket:0x1 Bus:0xE7 Dev:0x0 Func:0x4 -- PSF HCx ShareIdx:0x3 socket:0x1 Bus:0xE7 Dev:0x1 Func:0x0 -- ShareIdx:0x4 socket:0x1 Bus:0xE7 Dev:0x2 Func:0x0 -- ShareIdx:0x5 socket:0x1 Bus:0xE7 Dev:0x3 Func:0x0 -- ShareIdx:0x6 socket:0x1 Bus:0xE7 Dev:0x3 Func:0x1 -- ShareIdx:0x7 socket:0x1 Bus:0xE7 Dev:0x3 Func:0x2 -- ShareIdx:0x8 socket:0x1 Bus:0xE8 Dev:0x0 Func:0x0 -- ShareIdx:0x9 socket:0x1 Bus:0xEA Dev:0x0 Func:0x0 -- BitIndex :0x1 DevCount on this bit :0x3,
ShareIdx:0x0 socket:0x1 Bus:0xE7 Dev:0x0 Func:0x0 -- ShareIdx:0x1 socket:0x1 Bus:0xE7 Dev:0x0 Func:0x1 -- ShareIdx:0x2 socket:0x1 Bus:0xE7 Dev:0x0 Func:0x2 -- BitIndex :0x3 DevCount on this bit :0x1,
ShareIdx:0x0 socket:0x1 Bus:0x80 Dev:0x0 Func:0x4 -- BitIndex :0x0 DevCount on this bit :0x7,
ShareIdx:0x0 socket:0x1 Bus:0x80 Dev:0x0 Func:0x4 -- ShareIdx:0x1 socket:0x1 Bus:0x80 Dev:0x0 Func:0x4 -- PSF PCIE Pi5 ShareIdx:0x2 socket:0x1 Bus:0x80 Dev:0x0 Func:0x4 -- PCIE GEN4 DMI Pi5 ShareIdx:0x3 socket:0x1 Bus:0x80 Dev:0x0 Func:0x4 -- PCIE GEN5 IAL Pi5 (CXL) ShareIdx:0x4 socket:0x1 Bus:0x80 Dev:0x0 Func:0x4 -- SPD I3C Bus ShareIdx:0x5 socket:0x1 Bus:0x80 Dev:0x0 Func:0x4 -- SPD I3C Bus ShareIdx:0x6 socket:0x1 Bus:0x80 Dev:0x0 Func:0x4 -- CXP SMBUS BitIndex :0x1 DevCount on this bit :0x3,
ShareIdx:0x0 socket:0x1 Bus:0x80 Dev:0x0 Func:0x0 -- ShareIdx:0x1 socket:0x1 Bus:0x80 Dev:0x0 Func:0x1 -- ShareIdx:0x2 socket:0x1 Bus:0x80 Dev:0x0 Func:0x2 -- BitIndex :0x2 DevCount on this bit :0x1,
ShareIdx:0x0 socket:0x1 Bus:0x80 Dev:0x8 Func:0x0 -- BitIndex :0x3 DevCount on this bit :0x1,
ShareIdx:0x0 socket:0x1 Bus:0x80 Dev:0x6 Func:0x0 -- BitIndex :0x4 DevCount on this bit :0x1,
ShareIdx:0x0 socket:0x1 Bus:0x80 Dev:0x4 Func:0x0 -- BitIndex :0x5 DevCount on this bit :0x1,
ShareIdx:0x0 socket:0x1 Bus:0x80 Dev:0x2 Func:0x0 -- BitIndex :0x6 DevCount on this bit :0x1,
ShareIdx:0x0 socket:0x1 Bus:0x80 Dev:0x1 Func:0x0 -- BitIndex :0x7 DevCount on this bit :0x1,
ShareIdx:0x0 socket:0x1 Bus:0x80 Dev:0x3 Func:0x0 -- BitIndex :0x8 DevCount on this bit :0x1,
ShareIdx:0x0 socket:0x1 Bus:0x80 Dev:0x5 Func:0x0 -- BitIndex :0x9 DevCount on this bit :0x1,
ShareIdx:0x0 socket:0x1 Bus:0x80 Dev:0x7 Func:0x0 -- BitIndex :0xA DevCount on this bit :0x1,
Skip Invalid Node
BitIndex :0x4 DevCount on this bit :0x1,
ShareIdx:0x0 socket:0x1 Bus:0x97 Dev:0x0 Func:0x4 -- BitIndex :0x0 DevCount on this bit :0x4,
ShareIdx:0x0 socket:0x1 Bus:0x97 Dev:0x0 Func:0x4 -- ShareIdx:0x1 socket:0x1 Bus:0x97 Dev:0x0 Func:0x4 -- PSF PCIE Pi5 ShareIdx:0x2 socket:0x1 Bus:0x97 Dev:0x0 Func:0x4 -- PCIE GEN4 DMI Pi5 ShareIdx:0x3 socket:0x1 Bus:0x97 Dev:0x0 Func:0x4 -- PCIE GEN5 IAL Pi5 (CXL) BitIndex :0x1 DevCount on this bit :0x3,
ShareIdx:0x0 socket:0x1 Bus:0x97 Dev:0x0 Func:0x0 -- ShareIdx:0x1 socket:0x1 Bus:0x97 Dev:0x0 Func:0x1 -- ShareIdx:0x2 socket:0x1 Bus:0x97 Dev:0x0 Func:0x2 -- BitIndex :0x2 DevCount on this bit :0x1,
ShareIdx:0x0 socket:0x1 Bus:0x97 Dev:0x8 Func:0x0 -- BitIndex :0x3 DevCount on this bit :0x1,
ShareIdx:0x0 socket:0x1 Bus:0x97 Dev:0x6 Func:0x0 -- BitIndex :0x4 DevCount on this bit :0x1,
ShareIdx:0x0 socket:0x1 Bus:0x97 Dev:0x4 Func:0x0 -- BitIndex :0x5 DevCount on this bit :0x1,
ShareIdx:0x0 socket:0x1 Bus:0x97 Dev:0x2 Func:0x0 -- BitIndex :0x6 DevCount on this bit :0x1,
ShareIdx:0x0 socket:0x1 Bus:0x97 Dev:0x1 Func:0x0 -- BitIndex :0x7 DevCount on this bit :0x1,
ShareIdx:0x0 socket:0x1 Bus:0x97 Dev:0x3 Func:0x0 -- BitIndex :0x8 DevCount on this bit :0x1,
ShareIdx:0x0 socket:0x1 Bus:0x97 Dev:0x5 Func:0x0 -- BitIndex :0x9 DevCount on this bit :0x1,
ShareIdx:0x0 socket:0x1 Bus:0x97 Dev:0x7 Func:0x0 -- BitIndex :0x5 DevCount on this bit :0x1,
ShareIdx:0x0 socket:0x1 Bus:0xEC Dev:0x0 Func:0x4 -- BitIndex :0x0 DevCount on this bit :0xA,
ShareIdx:0x0 socket:0x1 Bus:0xEC Dev:0x0 Func:0x4 -- ShareIdx:0x1 socket:0x1 Bus:0xEC Dev:0x0 Func:0x4 -- PSF Dino ShareIdx:0x2 socket:0x1 Bus:0xEC Dev:0x0 Func:0x4 -- PSF HCx ShareIdx:0x3 socket:0x1 Bus:0xEC Dev:0x1 Func:0x0 -- ShareIdx:0x4 socket:0x1 Bus:0xEC Dev:0x2 Func:0x0 -- ShareIdx:0x5 socket:0x1 Bus:0xEC Dev:0x3 Func:0x0 -- ShareIdx:0x6 socket:0x1 Bus:0xEC Dev:0x3 Func:0x1 -- ShareIdx:0x7 socket:0x1 Bus:0xEC Dev:0x3 Func:0x2 -- ShareIdx:0x8 socket:0x1 Bus:0xED Dev:0x0 Func:0x0 -- ShareIdx:0x9 socket:0x1 Bus:0xEF Dev:0x0 Func:0x0 -- BitIndex :0x1 DevCount on this bit :0x3,
ShareIdx:0x0 socket:0x1 Bus:0xEC Dev:0x0 Func:0x0 -- ShareIdx:0x1 socket:0x1 Bus:0xEC Dev:0x0 Func:0x1 -- ShareIdx:0x2 socket:0x1 Bus:0xEC Dev:0x0 Func:0x2 -- BitIndex :0x6 DevCount on this bit :0x1,
Skip Invalid Node
BitIndex :0x7 DevCount on this bit :0x1,
ShareIdx:0x0 socket:0x1 Bus:0xD7 Dev:0x0 Func:0x4 -- BitIndex :0x0 DevCount on this bit :0x4,
ShareIdx:0x0 socket:0x1 Bus:0xD7 Dev:0x0 Func:0x4 -- ShareIdx:0x1 socket:0x1 Bus:0xD7 Dev:0x0 Func:0x4 -- PSF PCIE Pi5 ShareIdx:0x2 socket:0x1 Bus:0xD7 Dev:0x0 Func:0x4 -- PCIE GEN4 DMI Pi5 ShareIdx:0x3 socket:0x1 Bus:0xD7 Dev:0x0 Func:0x4 -- PCIE GEN5 IAL Pi5 (CXL) BitIndex :0x1 DevCount on this bit :0x3,
ShareIdx:0x0 socket:0x1 Bus:0xD7 Dev:0x0 Func:0x0 -- ShareIdx:0x1 socket:0x1 Bus:0xD7 Dev:0x0 Func:0x1 -- ShareIdx:0x2 socket:0x1 Bus:0xD7 Dev:0x0 Func:0x2 -- BitIndex :0x2 DevCount on this bit :0x1,
ShareIdx:0x0 socket:0x1 Bus:0xD7 Dev:0x8 Func:0x0 -- BitIndex :0x3 DevCount on this bit :0x1,
ShareIdx:0x0 socket:0x1 Bus:0xD7 Dev:0x6 Func:0x0 -- BitIndex :0x4 DevCount on this bit :0x1,
ShareIdx:0x0 socket:0x1 Bus:0xD7 Dev:0x4 Func:0x0 -- BitIndex :0x5 DevCount on this bit :0x1,
ShareIdx:0x0 socket:0x1 Bus:0xD7 Dev:0x2 Func:0x0 -- BitIndex :0x6 DevCount on this bit :0x1,
ShareIdx:0x0 socket:0x1 Bus:0xD7 Dev:0x1 Func:0x0 -- BitIndex :0x7 DevCount on this bit :0x1,
ShareIdx:0x0 socket:0x1 Bus:0xD7 Dev:0x3 Func:0x0 -- BitIndex :0x8 DevCount on this bit :0x1,
ShareIdx:0x0 socket:0x1 Bus:0xD7 Dev:0x5 Func:0x0 -- BitIndex :0x9 DevCount on this bit :0x1,
ShareIdx:0x0 socket:0x1 Bus:0xD7 Dev:0x7 Func:0x0 -- BitIndex :0x8 DevCount on this bit :0x1,
ShareIdx:0x0 socket:0x1 Bus:0xF1 Dev:0x0 Func:0x4 -- BitIndex :0x0 DevCount on this bit :0xA,
ShareIdx:0x0 socket:0x1 Bus:0xF1 Dev:0x0 Func:0x4 -- ShareIdx:0x1 socket:0x1 Bus:0xF1 Dev:0x0 Func:0x4 -- PSF Dino ShareIdx:0x2 socket:0x1 Bus:0xF1 Dev:0x0 Func:0x4 -- PSF HCx ShareIdx:0x3 socket:0x1 Bus:0xF1 Dev:0x1 Func:0x0 -- ShareIdx:0x4 socket:0x1 Bus:0xF1 Dev:0x2 Func:0x0 -- ShareIdx:0x5 socket:0x1 Bus:0xF1 Dev:0x3 Func:0x0 -- ShareIdx:0x6 socket:0x1 Bus:0xF1 Dev:0x3 Func:0x1 -- ShareIdx:0x7 socket:0x1 Bus:0xF1 Dev:0x3 Func:0x2 -- ShareIdx:0x8 socket:0x1 Bus:0xF2 Dev:0x0 Func:0x0 -- ShareIdx:0x9 socket:0x1 Bus:0xF4 Dev:0x0 Func:0x0 -- BitIndex :0x1 DevCount on this bit :0x3,
ShareIdx:0x0 socket:0x1 Bus:0xF1 Dev:0x0 Func:0x0 -- ShareIdx:0x1 socket:0x1 Bus:0xF1 Dev:0x0 Func:0x1 -- ShareIdx:0x2 socket:0x1 Bus:0xF1 Dev:0x0 Func:0x2 -- BitIndex :0x9 DevCount on this bit :0x1,
ShareIdx:0x0 socket:0x1 Bus:0xB7 Dev:0x0 Func:0x4 -- BitIndex :0x0 DevCount on this bit :0x4,
ShareIdx:0x0 socket:0x1 Bus:0xB7 Dev:0x0 Func:0x4 -- ShareIdx:0x1 socket:0x1 Bus:0xB7 Dev:0x0 Func:0x4 -- PSF PCIE Pi5 ShareIdx:0x2 socket:0x1 Bus:0xB7 Dev:0x0 Func:0x4 -- PCIE GEN4 DMI Pi5 ShareIdx:0x3 socket:0x1 Bus:0xB7 Dev:0x0 Func:0x4 -- PCIE GEN5 IAL Pi5 (CXL) BitIndex :0x1 DevCount on this bit :0x3,
ShareIdx:0x0 socket:0x1 Bus:0xB7 Dev:0x0 Func:0x0 -- ShareIdx:0x1 socket:0x1 Bus:0xB7 Dev:0x0 Func:0x1 -- ShareIdx:0x2 socket:0x1 Bus:0xB7 Dev:0x0 Func:0x2 -- BitIndex :0x2 DevCount on this bit :0x1,
ShareIdx:0x0 socket:0x1 Bus:0xB7 Dev:0x8 Func:0x0 -- BitIndex :0x3 DevCount on this bit :0x1,
ShareIdx:0x0 socket:0x1 Bus:0xB7 Dev:0x6 Func:0x0 -- BitIndex :0x4 DevCount on this bit :0x1,
ShareIdx:0x0 socket:0x1 Bus:0xB7 Dev:0x4 Func:0x0 -- BitIndex :0x5 DevCount on this bit :0x1,
ShareIdx:0x0 socket:0x1 Bus:0xB7 Dev:0x2 Func:0x0 -- BitIndex :0x6 DevCount on this bit :0x1,
ShareIdx:0x0 socket:0x1 Bus:0xB7 Dev:0x1 Func:0x0 -- BitIndex :0x7 DevCount on this bit :0x1,
ShareIdx:0x0 socket:0x1 Bus:0xB7 Dev:0x3 Func:0x0 -- BitIndex :0x8 DevCount on this bit :0x1,
ShareIdx:0x0 socket:0x1 Bus:0xB7 Dev:0x5 Func:0x0 -- BitIndex :0x9 DevCount on this bit :0x1,
ShareIdx:0x0 socket:0x1 Bus:0xB7 Dev:0x7 Func:0x0 -- BitIndex :0xA DevCount on this bit :0x1,
ShareIdx:0x0 socket:0x1 Bus:0xA7 Dev:0x0 Func:0x4 -- BitIndex :0x0 DevCount on this bit :0x4,
ShareIdx:0x0 socket:0x1 Bus:0xA7 Dev:0x0 Func:0x4 -- ShareIdx:0x1 socket:0x1 Bus:0xA7 Dev:0x0 Func:0x4 -- PSF PCIE Pi5 ShareIdx:0x2 socket:0x1 Bus:0xA7 Dev:0x0 Func:0x4 -- PCIE GEN4 DMI Pi5 ShareIdx:0x3 socket:0x1 Bus:0xA7 Dev:0x0 Func:0x4 -- PCIE GEN5 IAL Pi5 (CXL) BitIndex :0x1 DevCount on this bit :0x3,
ShareIdx:0x0 socket:0x1 Bus:0xA7 Dev:0x0 Func:0x0 -- ShareIdx:0x1 socket:0x1 Bus:0xA7 Dev:0x0 Func:0x1 -- ShareIdx:0x2 socket:0x1 Bus:0xA7 Dev:0x0 Func:0x2 -- BitIndex :0x2 DevCount on this bit :0x1,
ShareIdx:0x0 socket:0x1 Bus:0xA7 Dev:0x8 Func:0x0 -- BitIndex :0x3 DevCount on this bit :0x1,
ShareIdx:0x0 socket:0x1 Bus:0xA7 Dev:0x6 Func:0x0 -- BitIndex :0x4 DevCount on this bit :0x1,
ShareIdx:0x0 socket:0x1 Bus:0xA7 Dev:0x4 Func:0x0 -- BitIndex :0x5 DevCount on this bit :0x1,
ShareIdx:0x0 socket:0x1 Bus:0xA7 Dev:0x2 Func:0x0 -- BitIndex :0x6 DevCount on this bit :0x1,
ShareIdx:0x0 socket:0x1 Bus:0xA7 Dev:0x1 Func:0x0 -- BitIndex :0x7 DevCount on this bit :0x1,
ShareIdx:0x0 socket:0x1 Bus:0xA7 Dev:0x3 Func:0x0 -- BitIndex :0x8 DevCount on this bit :0x1,
ShareIdx:0x0 socket:0x1 Bus:0xA7 Dev:0x5 Func:0x0 -- BitIndex :0x9 DevCount on this bit :0x1,
ShareIdx:0x0 socket:0x1 Bus:0xA7 Dev:0x7 Func:0x0 -- BitIndex :0xB DevCount on this bit :0x1,
ShareIdx:0x0 socket:0x1 Bus:0xF6 Dev:0x0 Func:0x4 -- BitIndex :0x0 DevCount on this bit :0xA,
ShareIdx:0x0 socket:0x1 Bus:0xF6 Dev:0x0 Func:0x4 -- ShareIdx:0x1 socket:0x1 Bus:0xF6 Dev:0x0 Func:0x4 -- PSF Dino ShareIdx:0x2 socket:0x1 Bus:0xF6 Dev:0x0 Func:0x4 -- PSF HCx ShareIdx:0x3 socket:0x1 Bus:0xF6 Dev:0x1 Func:0x0 -- ShareIdx:0x4 socket:0x1 Bus:0xF6 Dev:0x2 Func:0x0 -- ShareIdx:0x5 socket:0x1 Bus:0xF6 Dev:0x3 Func:0x0 -- ShareIdx:0x6 socket:0x1 Bus:0xF6 Dev:0x3 Func:0x1 -- ShareIdx:0x7 socket:0x1 Bus:0xF6 Dev:0x3 Func:0x2 -- ShareIdx:0x8 socket:0x1 Bus:0xF7 Dev:0x0 Func:0x0 -- ShareIdx:0x9 socket:0x1 Bus:0xF9 Dev:0x0 Func:0x0 -- BitIndex :0x1 DevCount on this bit :0x3,
ShareIdx:0x0 socket:0x1 Bus:0xF6 Dev:0x0 Func:0x0 -- ShareIdx:0x1 socket:0x1 Bus:0xF6 Dev:0x0 Func:0x1 -- ShareIdx:0x2 socket:0x1 Bus:0xF6 Dev:0x0 Func:0x2 -- BitIndex :0xC DevCount on this bit :0x1,
Skip Invalid Node
BitIndex :0xD DevCount on this bit :0x1,
ShareIdx:0x0 socket:0x1 Bus:0xC7 Dev:0x0 Func:0x4 -- BitIndex :0x0 DevCount on this bit :0x4,
ShareIdx:0x0 socket:0x1 Bus:0xC7 Dev:0x0 Func:0x4 -- ShareIdx:0x1 socket:0x1 Bus:0xC7 Dev:0x0 Func:0x4 -- PSF PCIE Pi5 ShareIdx:0x2 socket:0x1 Bus:0xC7 Dev:0x0 Func:0x4 -- PCIE GEN4 DMI Pi5 ShareIdx:0x3 socket:0x1 Bus:0xC7 Dev:0x0 Func:0x4 -- PCIE GEN5 IAL Pi5 (CXL) BitIndex :0x1 DevCount on this bit :0x3,
ShareIdx:0x0 socket:0x1 Bus:0xC7 Dev:0x0 Func:0x0 -- ShareIdx:0x1 socket:0x1 Bus:0xC7 Dev:0x0 Func:0x1 -- ShareIdx:0x2 socket:0x1 Bus:0xC7 Dev:0x0 Func:0x2 -- BitIndex :0x2 DevCount on this bit :0x1,
ShareIdx:0x0 socket:0x1 Bus:0xC7 Dev:0x8 Func:0x0 -- BitIndex :0x3 DevCount on this bit :0x1,
ShareIdx:0x0 socket:0x1 Bus:0xC7 Dev:0x6 Func:0x0 -- BitIndex :0x4 DevCount on this bit :0x1,
ShareIdx:0x0 socket:0x1 Bus:0xC7 Dev:0x4 Func:0x0 -- BitIndex :0x5 DevCount on this bit :0x1,
ShareIdx:0x0 socket:0x1 Bus:0xC7 Dev:0x2 Func:0x0 -- BitIndex :0x6 DevCount on this bit :0x1,
ShareIdx:0x0 socket:0x1 Bus:0xC7 Dev:0x1 Func:0x0 -- BitIndex :0x7 DevCount on this bit :0x1,
ShareIdx:0x0 socket:0x1 Bus:0xC7 Dev:0x3 Func:0x0 -- BitIndex :0x8 DevCount on this bit :0x1,
ShareIdx:0x0 socket:0x1 Bus:0xC7 Dev:0x5 Func:0x0 -- BitIndex :0x9 DevCount on this bit :0x1,
ShareIdx:0x0 socket:0x1 Bus:0xC7 Dev:0x7 Func:0x0 -- BitIndex :0xE DevCount on this bit :0x0,
BitIndex :0xF DevCount on this bit :0x0,
BitIndex :0x10 DevCount on this bit :0x0,
BitIndex :0x11 DevCount on this bit :0x0,
BitIndex :0x12 DevCount on this bit :0x0,
BitIndex :0x13 DevCount on this bit :0x0,
BitIndex :0x14 DevCount on this bit :0x0,
BitIndex :0x15 DevCount on this bit :0x0,
BitIndex :0x16 DevCount on this bit :0x4,
ShareIdx:0x0 socket:0x1 Bus:0xFE Dev:0x0 Func:0x0 -- ShareIdx:0x1 socket:0x1 Bus:0xFE Dev:0x0 Func:0x0 -- ShareIdx:0x2 socket:0x1 Bus:0xFE Dev:0x0 Func:0x0 -- ShareIdx:0x3 socket:0x1 Bus:0xFE Dev:0x0 Func:0x0 -- BitIndex :0x17 DevCount on this bit :0x4,
ShareIdx:0x0 socket:0x1 Bus:0xFE Dev:0x0 Func:0x0 -- ShareIdx:0x1 socket:0x1 Bus:0xFE Dev:0x0 Func:0x0 -- ShareIdx:0x2 socket:0x1 Bus:0xFE Dev:0x0 Func:0x0 -- ShareIdx:0x3 socket:0x1 Bus:0xFE Dev:0x0 Func:0x0 -- BitIndex :0x18 DevCount on this bit :0x4,
ShareIdx:0x0 socket:0x1 Bus:0xFE Dev:0x0 Func:0x0 -- ShareIdx:0x1 socket:0x1 Bus:0xFE Dev:0x0 Func:0x0 -- ShareIdx:0x2 socket:0x1 Bus:0xFE Dev:0x0 Func:0x0 -- ShareIdx:0x3 socket:0x1 Bus:0xFE Dev:0x0 Func:0x0 -- BitIndex :0x19 DevCount on this bit :0x4,
ShareIdx:0x0 socket:0x1 Bus:0xFE Dev:0x0 Func:0x0 -- ShareIdx:0x1 socket:0x1 Bus:0xFE Dev:0x0 Func:0x0 -- ShareIdx:0x2 socket:0x1 Bus:0xFE Dev:0x0 Func:0x0 -- ShareIdx:0x3 socket:0x1 Bus:0xFE Dev:0x0 Func:0x0 -- BitIndex :0x1A DevCount on this bit :0x4,
ShareIdx:0x0 socket:0x1 Bus:0xFE Dev:0x0 Func:0x0 -- ShareIdx:0x1 socket:0x1 Bus:0xFE Dev:0x0 Func:0x0 -- ShareIdx:0x2 socket:0x1 Bus:0xFE Dev:0x0 Func:0x0 -- ShareIdx:0x3 socket:0x1 Bus:0xFE Dev:0x0 Func:0x0 -- BitIndex :0x1B DevCount on this bit :0x4,
ShareIdx:0x0 socket:0x1 Bus:0xFE Dev:0x0 Func:0x0 -- ShareIdx:0x1 socket:0x1 Bus:0xFE Dev:0x0 Func:0x0 -- ShareIdx:0x2 socket:0x1 Bus:0xFE Dev:0x0 Func:0x0 -- ShareIdx:0x3 socket:0x1 Bus:0xFE Dev:0x0 Func:0x0 -- BitIndex :0x1C DevCount on this bit :0x4,
ShareIdx:0x0 socket:0x1 Bus:0xFE Dev:0x0 Func:0x0 -- ShareIdx:0x1 socket:0x1 Bus:0xFE Dev:0x0 Func:0x0 -- ShareIdx:0x2 socket:0x1 Bus:0xFE Dev:0x0 Func:0x0 -- ShareIdx:0x3 socket:0x1 Bus:0xFE Dev:0x0 Func:0x0 -- BitIndex :0x1D DevCount on this bit :0x4,
ShareIdx:0x0 socket:0x1 Bus:0xFE Dev:0x0 Func:0x0 -- ShareIdx:0x1 socket:0x1 Bus:0xFE Dev:0x0 Func:0x0 -- ShareIdx:0x2 socket:0x1 Bus:0xFE Dev:0x0 Func:0x0 -- ShareIdx:0x3 socket:0x1 Bus:0xFE Dev:0x0 Func:0x0 -- [ProcessorErrorHandler][CrystalRidgeLib] Failed to locate protocol: Not Found
[Mca]Entering InitializeProcessorErrHandler (0x7E82AEB8)
[Mca]Allocate Cpu Error Data structure at 7E7FA018
[Mca][Cap] EmcaGen1Cap=0x1
[Mca][Cap] EmcaGen2Cap=0x1
[Mca][Cap] LmceCap=0x1
[Mca][Setup] SystemErrorEn=0x1
[Mca][Setup] PoisonEn=0x1
[Mca][Setup] ViralEn=0x0
[Mca][Setup] CloakingEn=0x0
[Mca][Setup] FatalErrSpinLoopEn=0x0
[Mca][Setup] EmcaEn=0x1
[Mca][Setup] CsmiEn=0x2
[Mca][Setup] MsmiEn=0x2
[Mca][Setup] LmceEn=0x1
[Mca][Setup] MsmiBankBitFieldEn=0xFFFFFFFF
[Mca][Setup] CsmiBankBitFieldEn=0xFFFFFFFF
[Mca][Setup] EmcaSetFwUpdate=0x0
[Mca][Setup] OscEn=0x0
[Mca][Setup] mMode=0x2
[Mca][Setup] mProcessorRasSetup.UboxErrorMask=0
[Mca][Setup] mProcessorRasSetup.ShutdownSuppression=1
[Mca]Register MCA error handler Success
[Mca]Installing MCE Handler...
[Mca]SmiMcaHandler Address = 7E8322B4
[Mca]Enable MCA reporting
[Mca]EnableEmca2UncorrectableError
[Mca]Enable CSMI Gen2
[Mca]Enable LMCE
[Mca]System Cloaking is disabled.
[RasMisc] ConfigureShutdownSuppression!
PROGRESS CODE: V03070003 I0
PDB = c:\efi\servergen2\intel\Build\EagleStreamRpPkg\DEBUG_VS2015x86\X64\ServerRasPkg\Driver\Smm\Gen2\RasMisc\RasMisc\DEBUG\RASMiscDriver.pdb
PROGRESS CODE: V03070002 I0
[RASMiscDriver][CrystalRidgeLib] Failed to locate protocol: Not Found
[RasMisc] EnableSystemViralAndPoison!
[IIO VIRAL & POISON] Config Socket:0x0
[Config IIO Viral & Poison] Satallite IEH on BitIdx:0x2
[Config IIO Viral & Poison] Satallite IEH on BitIdx:0x3
[Config IIO Viral & Poison Stack] Device on BitIdx:0x2 doesn't exist
[Config IIO Viral & Poison Stack] Device on BitIdx:0x3 doesn't exist
[Config IIO Viral & Poison Stack] Device on BitIdx:0x4 doesn't exist
[Config IIO Viral & Poison Stack] Device on BitIdx:0x5 doesn't exist
[Config IIO Viral & Poison Stack] Device on BitIdx:0x6 doesn't exist
[Config IIO Viral & Poison Stack] Device on BitIdx:0x7 doesn't exist
[Config IIO Viral & Poison Stack] Device on BitIdx:0x8 doesn't exist
[Config IIO Viral & Poison Stack] Device on BitIdx:0x9 doesn't exist
[Config IIO Viral & Poison] Satallite IEH on BitIdx:0x4
[Config IIO Viral & Poison Stack] Device on BitIdx:0x2 doesn't exist
[Config IIO Viral & Poison Stack] Device on BitIdx:0x3 doesn't exist
[Config IIO Viral & Poison Stack] Device on BitIdx:0x4 doesn't exist
[Config IIO Viral & Poison Stack] Device on BitIdx:0x5 doesn't exist
[Config IIO Viral & Poison Stack] Device on BitIdx:0x6 doesn't exist
[Config IIO Viral & Poison Stack] Device on BitIdx:0x7 doesn't exist
[Config IIO Viral & Poison Stack] Device on BitIdx:0x8 doesn't exist
[Config IIO Viral & Poison Stack] Device on BitIdx:0x9 doesn't exist
[Config IIO Viral & Poison] Satallite IEH on BitIdx:0x5
[Config IIO Viral & Poison] Satallite IEH on BitIdx:0x7
[Config IIO Viral & Poison Stack] Device on BitIdx:0x2 doesn't exist
[Config IIO Viral & Poison Stack] Device on BitIdx:0x3 doesn't exist
[Config IIO Viral & Poison Stack] Device on BitIdx:0x4 doesn't exist
[Config IIO Viral & Poison Stack] Device on BitIdx:0x5 doesn't exist
[Config IIO Viral & Poison Stack] Device on BitIdx:0x6 doesn't exist
[Config IIO Viral & Poison Stack] Device on BitIdx:0x7 doesn't exist
[Config IIO Viral & Poison Stack] Device on BitIdx:0x8 doesn't exist
[Config IIO Viral & Poison Stack] Device on BitIdx:0x9 doesn't exist
[Config IIO Viral & Poison] Satallite IEH on BitIdx:0x8
[Config IIO Viral & Poison] Satallite IEH on BitIdx:0x9
[Config IIO Viral & Poison Stack] Device on BitIdx:0x2 doesn't exist
[Config IIO Viral & Poison Stack] Device on BitIdx:0x3 doesn't exist
[Config IIO Viral & Poison Stack] Device on BitIdx:0x4 doesn't exist
[Config IIO Viral & Poison Stack] Device on BitIdx:0x5 doesn't exist
[Config IIO Viral & Poison Stack] Device on BitIdx:0x6 doesn't exist
[Config IIO Viral & Poison Stack] Device on BitIdx:0x7 doesn't exist
[Config IIO Viral & Poison Stack] Device on BitIdx:0x8 doesn't exist
[Config IIO Viral & Poison Stack] Device on BitIdx:0x9 doesn't exist
[Config IIO Viral & Poison] Satallite IEH on BitIdx:0xA
[Config IIO Viral & Poison Stack] Device on BitIdx:0x2 doesn't exist
[Config IIO Viral & Poison Stack] Device on BitIdx:0x3 doesn't exist
[Config IIO Viral & Poison Stack] Device on BitIdx:0x4 doesn't exist
[Config IIO Viral & Poison Stack] Device on BitIdx:0x5 doesn't exist
[Config IIO Viral & Poison Stack] Device on BitIdx:0x6 doesn't exist
[Config IIO Viral & Poison Stack] Device on BitIdx:0x7 doesn't exist
[Config IIO Viral & Poison Stack] Device on BitIdx:0x8 doesn't exist
[Config IIO Viral & Poison Stack] Device on BitIdx:0x9 doesn't exist
[Config IIO Viral & Poison] Satallite IEH on BitIdx:0xB
[Config IIO Viral & Poison] Satallite IEH on BitIdx:0xD
[Config IIO Viral & Poison Stack] Device on BitIdx:0x2 doesn't exist
[Config IIO Viral & Poison Stack] Device on BitIdx:0x3 doesn't exist
[Config IIO Viral & Poison Stack] Device on BitIdx:0x4 doesn't exist
[Config IIO Viral & Poison Stack] Device on BitIdx:0x5 doesn't exist
[Config IIO Viral & Poison Stack] Device on BitIdx:0x6 doesn't exist
[Config IIO Viral & Poison Stack] Device on BitIdx:0x7 doesn't exist
[Config IIO Viral & Poison Stack] Device on BitIdx:0x8 doesn't exist
[Config IIO Viral & Poison Stack] Device on BitIdx:0x9 doesn't exist
[IIO VIRAL & POISON] Config Socket:0x0 End
[IIO VIRAL & POISON] Config Socket:0x1
[Config IIO Viral & Poison] Satallite IEH on BitIdx:0x2
[Config IIO Viral & Poison] Satallite IEH on BitIdx:0x3
[Config IIO Viral & Poison Stack] Device on BitIdx:0x2 doesn't exist
[Config IIO Viral & Poison Stack] Device on BitIdx:0x3 doesn't exist
[Config IIO Viral & Poison Stack] Device on BitIdx:0x4 doesn't exist
[Config IIO Viral & Poison Stack] Device on BitIdx:0x5 doesn't exist
[Config IIO Viral & Poison Stack] Device on BitIdx:0x6 doesn't exist
[Config IIO Viral & Poison Stack] Device on BitIdx:0x7 doesn't exist
[Config IIO Viral & Poison Stack] Device on BitIdx:0x8 doesn't exist
[Config IIO Viral & Poison Stack] Device on BitIdx:0x9 doesn't exist
[Config IIO Viral & Poison Stack] Device on BitIdx:0xA doesn't exist
[Config IIO Viral & Poison] Satallite IEH on BitIdx:0x4
[Config IIO Viral & Poison Stack] Device on BitIdx:0x2 doesn't exist
[Config IIO Viral & Poison Stack] Device on BitIdx:0x3 doesn't exist
[Config IIO Viral & Poison Stack] Device on BitIdx:0x4 doesn't exist
[Config IIO Viral & Poison Stack] Device on BitIdx:0x5 doesn't exist
[Config IIO Viral & Poison Stack] Device on BitIdx:0x6 doesn't exist
[Config IIO Viral & Poison Stack] Device on BitIdx:0x7 doesn't exist
[Config IIO Viral & Poison Stack] Device on BitIdx:0x8 doesn't exist
[Config IIO Viral & Poison Stack] Device on BitIdx:0x9 doesn't exist
[Config IIO Viral & Poison] Satallite IEH on BitIdx:0x5
[Config IIO Viral & Poison] Satallite IEH on BitIdx:0x7
[Config IIO Viral & Poison Stack] Device on BitIdx:0x2 doesn't exist
[Config IIO Viral & Poison Stack] Device on BitIdx:0x3 doesn't exist
[Config IIO Viral & Poison Stack] Device on BitIdx:0x4 doesn't exist
[Config IIO Viral & Poison Stack] Device on BitIdx:0x5 doesn't exist
[Config IIO Viral & Poison Stack] Device on BitIdx:0x6 doesn't exist
[Config IIO Viral & Poison Stack] Device on BitIdx:0x7 doesn't exist
[Config IIO Viral & Poison Stack] Device on BitIdx:0x8 doesn't exist
[Config IIO Viral & Poison Stack] Device on BitIdx:0x9 doesn't exist
[Config IIO Viral & Poison] Satallite IEH on BitIdx:0x8
[Config IIO Viral & Poison] Satallite IEH on BitIdx:0x9
[Config IIO Viral & Poison Stack] Device on BitIdx:0x2 doesn't exist
[Config IIO Viral & Poison Stack] Device on BitIdx:0x3 doesn't exist
[Config IIO Viral & Poison Stack] Device on BitIdx:0x4 doesn't exist
[Config IIO Viral & Poison Stack] Device on BitIdx:0x5 doesn't exist
[Config IIO Viral & Poison Stack] Device on BitIdx:0x6 doesn't exist
[Config IIO Viral & Poison Stack] Device on BitIdx:0x7 doesn't exist
[Config IIO Viral & Poison Stack] Device on BitIdx:0x8 doesn't exist
[Config IIO Viral & Poison Stack] Device on BitIdx:0x9 doesn't exist
[Config IIO Viral & Poison] Satallite IEH on BitIdx:0xA
[Config IIO Viral & Poison Stack] Device on BitIdx:0x2 doesn't exist
[Config IIO Viral & Poison Stack] Device on BitIdx:0x3 doesn't exist
[Config IIO Viral & Poison Stack] Device on BitIdx:0x4 doesn't exist
[Config IIO Viral & Poison Stack] Device on BitIdx:0x5 doesn't exist
[Config IIO Viral & Poison Stack] Device on BitIdx:0x6 doesn't exist
[Config IIO Viral & Poison Stack] Device on BitIdx:0x7 doesn't exist
[Config IIO Viral & Poison Stack] Device on BitIdx:0x8 doesn't exist
[Config IIO Viral & Poison Stack] Device on BitIdx:0x9 doesn't exist
[Config IIO Viral & Poison] Satallite IEH on BitIdx:0xB
[Config IIO Viral & Poison] Satallite IEH on BitIdx:0xD
[Config IIO Viral & Poison Stack] Device on BitIdx:0x2 doesn't exist
[Config IIO Viral & Poison Stack] Device on BitIdx:0x3 doesn't exist
[Config IIO Viral & Poison Stack] Device on BitIdx:0x4 doesn't exist
[Config IIO Viral & Poison Stack] Device on BitIdx:0x5 doesn't exist
[Config IIO Viral & Poison Stack] Device on BitIdx:0x6 doesn't exist
[Config IIO Viral & Poison Stack] Device on BitIdx:0x7 doesn't exist
[Config IIO Viral & Poison Stack] Device on BitIdx:0x8 doesn't exist
[Config IIO Viral & Poison Stack] Device on BitIdx:0x9 doesn't exist
[IIO VIRAL & POISON] Config Socket:0x1 End
PROGRESS CODE: V03070003 I0
PDB = c:\efi\servergen2\intel\Build\EagleStreamRpPkg\DEBUG_VS2015x86\X64\ServerRasPkg\Driver\Smm\CrashLogSmm\CrashLogSmm\DEBUG\CrashLogSmm.pdb
PROGRESS CODE: V03070002 I0
CrashLog Entry Point
Failed to locate CpuCrashLogRecordRegionProtocol !
Failed to locate PchCrashLogRecordRegionProtocol !
CrashLog is not present. Skip BERT creation
Error: SMM image at 0007E7BE000 start failed: Not Ready
PROGRESS CODE: V03070003 I0
PDB = c:\efi\servergen2\intel\Build\EagleStreamRpPkg\DEBUG_VS2015x86\X64\ServerRasPkg\Driver\Smm\WheaErrorInj\WheaErrorInj\DEBUG\WheaErrorInj2.pdb
PROGRESS CODE: V03070002 I0
[WheaErrorInj2][CrystalRidgeLib] Failed to locate protocol: Not Found
WHEA Error Injection is not enabled in Setup
PROGRESS CODE: V03070003 I0
PDB = c:\efi\servergen2\intel\Build\EagleStreamRpPkg\DEBUG_VS2015x86\X64\ServerRasPkg\Driver\Smm\WheaLastBootError\WheaLastBootError\DEBUG\WheaLastBootError.pdb
PROGRESS CODE: V03070002 I0
[WheaLastBootError][CrystalRidgeLib] Failed to locate protocol: Not Found
dump ACPI table
42 45 52 54 30 0 0 0 1 0 49 4E 54 45 4C 20 49
4E 54 45 4C 20 49 44 1 0 0 0 49 4E 54 4C 1
0 0 0 0 80 4 0 18 80 C4 76 0 0 0 0
[WHEAINIT] start to install WHEA ACPI tables
[WHEAINIT] install WHEA ACPI tables status:Success
PROGRESS CODE: V03070003 I0
PDB = c:\efi\servergen2\intel\Build\EagleStreamRpPkg\DEBUG_VS2015x86\X64\ServerRasPkg\Driver\Smm\WheaERST\WheaERST\DEBUG\WheaERST.pdb
PROGRESS CODE: V03070002 I0
dump ACPI table
45 52 53 54 30 2 0 0 1 0 49 4E 54 45 4C 20 49
4E 54 45 4C 20 49 44 1 0 0 0 49 4E 54 4C 1
0 0 0 30 0 0 0 0 0 0 0 10 0 0 0 0
3 0 0 0 40 0 4 18 50 C4 76 0 0 0 0 2
0 0 0 0 0 0 0 FF FF 0 0 0 0 0 0 1
3 0 0 0 40 0 4 18 50 C4 76 0 0 0 0 1
0 0 0 0 0 0 0 FF FF 0 0 0 0 0 0 2
3 0 0 0 40 0 4 18 50 C4 76 0 0 0 0 3
0 0 0 0 0 0 0 FF FF 0 0 0 0 0 0 3
4 1 0 0 40 0 4 18 50 C4 76 0 0 0 0 0
0 0 0 0 0 0 0 FF FF 0 0 0 0 0 0 4
2 0 0 0 40 0 4 30 50 C4 76 0 0 0 0 0
0 0 0 0 0 0 0 FF FF FF FF 0 0 0 0 5
3 0 0 1 8 0 1 B2 0 0 0 0 0 0 0 9C
0 0 0 0 0 0 0 FF FF 0 0 0 0 0 0 6
1 0 0 0 40 0 4 40 50 C4 76 0 0 0 0 1
0 0 0 0 0 0 0 1 0 0 0 0 0 0 0 7
0 0 0 0 40 0 4 38 50 C4 76 0 0 0 0 0
0 0 0 0 0 0 0 FF FF FF FF 0 0 0 0 8
0 0 0 0 40 0 4 70 50 C4 76 0 0 0 0 0
0 0 0 0 0 0 0 FF FF FF FF FF FF FF FF 9
2 0 0 0 40 0 4 20 50 C4 76 0 0 0 0 0
0 0 0 0 0 0 0 FF FF FF FF FF FF FF FF A
0 0 0 0 40 0 4 48 50 C4 76 0 0 0 0 0
0 0 0 0 0 0 0 FF FF FF FF 0 0 0 0 B
3 0 0 0 40 0 4 18 50 C4 76 0 0 0 0 F
0 0 0 0 0 0 0 FF FF 0 0 0 0 0 0 C
0 0 0 0 40 0 4 28 50 C4 76 0 0 0 0 0
0 0 0 0 0 0 0 FF FF FF FF 0 0 0 0 D
0 0 0 0 40 0 4 50 50 C4 76 0 0 0 0 0
0 0 0 0 0 0 0 FF FF FF FF FF FF FF FF E
0 0 0 0 40 0 4 58 50 C4 76 0 0 0 0 0
0 0 0 0 0 0 0 FF FF FF FF FF FF FF FF F
0 0 0 0 40 0 4 60 50 C4 76 0 0 0 0 0
0 0 0 0 0 0 0 FF FF FF FF FF FF FF FF
[WHEAINIT] start to install WHEA ACPI tables
[WHEAINIT] install WHEA ACPI tables status:Success
PROGRESS CODE: V03070003 I0
PDB = c:\efi\servergen2\intel\Build\EagleStreamRpPkg\DEBUG_VS2015x86\X64\ServerRasPkg\Driver\Smm\EnhancedMcaErrorLog\EnhancedMcaErrorLog\DEBUG\EnhancedMcaErrorLog.pdb
PROGRESS CODE: V03070002 I0
InitializEnhancedMcaErrorLogger++
EmcaEn: 1, ElogEn: 1, ElogIgnOptin: 0, ElogCorrErrEn: 1, ElogMemErrEn: 1, ElogProcErrEn: 1
EmcaL1DirAddr = 0x76C24000
InitializEnhancedMcaErrorLogger--, Success
PROGRESS CODE: V03070003 I0
PDB = c:\efi\servergen2\intel\Build\EagleStreamRpPkg\DEBUG_VS2015x86\X64\ServerRasPkg\Driver\Smm\PprVlsErrorLogListener\PprVlsErrorLogListener\DEBUG\PprVlsErrorLogListener.pdb
PROGRESS CODE: V03070002 I0
[PprVlsErrorLogListener][CrystalRidgeLib] Failed to locate protocol: Not Found
PROGRESS CODE: V03070003 I0
PDB = c:\efi\servergen2\intel\Build\EagleStreamRpPkg\DEBUG_VS2015x86\X64\ServerRasPkg\Driver\Smm\McBankErrorInjection\McBankErrorInjection\DEBUG\McBankErrorInjection.pdb
PROGRESS CODE: V03070002 I0
PROGRESS CODE: V03070003 I0
PDB = c:\efi\servergen2\intel\Build\EagleStreamRpPkg\DEBUG_VS2015x86\X64\ServerRasPkg\Driver\Smm\ErrorControl\ErrorControl\DEBUG\ErrorControl.pdb
PROGRESS CODE: V03070002 I0
PROGRESS CODE: V03070003 I0
PDB = c:\efi\servergen2\intel\Build\EagleStreamRpPkg\DEBUG_VS2015x86\X64\ServerSiliconPkg\Cpu\PowerManagement\PpmInitializeDxe\PpmInitializeDxe\DEBUG\PpmInitializeDxe.pdb
PROGRESS CODE: V03040002 I0
DXE PPM Initialization Entry
PROGRESS CODE: V03040003 I0
PDB = c:\efi\servergen2\intel\Build\EagleStreamRpPkg\DEBUG_VS2015x86\X64\ServerSiliconPkg\Universal\Dxe\CrystalRidge\CrystalRidge\DEBUG\CrystalRidge.pdb
PROGRESS CODE: V03040002 I0
No PMems, Crystal Ridge Driver is not going to be loaded.
PROGRESS CODE: V03040003 I0
PDB = c:\efi\servergen2\intel\Build\EagleStreamRpPkg\DEBUG_VS2015x86\X64\ClientOneSiliconPkg\IpBlock\Amt\Sol\Dxe\SerialOverLan\DEBUG\SerialOverLan.pdb
PROGRESS CODE: V03040002 I0
Error: Image at 00068F27000 start failed: Unsupported
PDB = c:\efi\servergen2\intel\Build\EagleStreamRpPkg\DEBUG_VS2015x86\X64\ClientOneSiliconPkg\IpBlock\Amt\Sol\Dxe\SerialOverLan\DEBUG\SerialOverLan.pdb
PROGRESS CODE: V03040003 I0
PDB = c:\efi\servergen2\intel\Build\EagleStreamRpPkg\DEBUG_VS2015x86\X64\ServerPlatformPkg\Features\Me\Client\MePolicyHelper\MePolicyHelper\DEBUG\MePolicyHelper.pdb
PROGRESS CODE: V03040002 I0
PROGRESS CODE: V03040003 I0
PDB = c:\efi\servergen2\intel\Build\EagleStreamRpPkg\DEBUG_VS2015x86\X64\XmlCliFeaturePkg\XmlCliRestricted\Dxe\XmlCliDxe\DEBUG\XmlCliDxe.pdb
PROGRESS CODE: V03040002 I0
PROGRESS CODE: V03040003 I0
PDB = d:\dde\63d22spr\intel\Build\EagleStreamRpPkg\DEBUG_VS2015x86\X64\ServerSecurityPkg\Pfr\Restricted\DebugTool\IShellCommand\IShellCommands\DEBUG\IShellCommands.pdb
PROGRESS CODE: V03040002 I0
PROGRESS CODE: V03040003 I0
PDB = c:\efi\servergen2\intel\Build\EagleStreamRpPkg\DEBUG_VS2015x86\X64\ServerPlatformPkg\Universal\PiPilotIII\PiPilotIIIDxe\DEBUG\PiPilotIIIDxe.pdb
PROGRESS CODE: V03040002 I0
PROGRESS CODE: V03040003 I0
PDB = c:\efi\servergen2\intel\Build\EagleStreamRpPkg\DEBUG_VS2015x86\X64\ServerPlatformPkg\Universal\PiAst2500\PiAst2500Dxe\DEBUG\PiAst2500Dxe.pdb
PROGRESS CODE: V03040002 I0
PROGRESS CODE: V03040003 I0
PDB = c:\efi\servergen2\intel\Build\EagleStreamRpPkg\DEBUG_VS2015x86\X64\FatPkg\EnhancedFatDxe\Fat\DEBUG\Fat.pdb
PROGRESS CODE: V03040002 I0
PROGRESS CODE: V03040003 I0
PDB = c:\efi\servergen2\intel\Build\EagleStreamRpPkg\DEBUG_VS2015x86\X64\ServerPlatformPkg\Platform\IsaHostController\IsaHostControllerDxe\DEBUG\IsaHostControllerDxe.pdb
PROGRESS CODE: V03040002 I0
PROGRESS CODE: V03040003 I0
PDB = c:\efi\servergen2\intel\Build\EagleStreamRpPkg\DEBUG_VS2015x86\X64\ServerPlatformPkg\Features\Sata\SataController\SataController\DEBUG\SataController.pdb
PROGRESS CODE: V03040002 I0
PROGRESS CODE: V03040003 I0
PDB = c:\efi\servergen2\intel\Build\EagleStreamRpPkg\DEBUG_VS2015x86\X64\MdeModulePkg\Bus\Pci\PciBusDxe\PciBusDxe\DEBUG\PciBusDxe.pdb
PROGRESS CODE: V03040002 I0
PROGRESS CODE: V03040003 I0
PDB = c:\efi\servergen2\intel\Build\EagleStreamRpPkg\DEBUG_VS2015x86\X64\ServerPlatformPkg\Features\Acpi\Dxe\AcpiPlatform\AcpiPlatformSpr\DEBUG\AcpiPlatform.pdb
PROGRESS CODE: V03040002 I0
PROGRESS CODE: V03048503 I0
Locate mFruRedirProtocol failed Not Found
ACPI MCFG table @ address 0x68F27918
Multi-Seg Support = 0
Number of Segments (sockets): 1
Table Length = 0x3C
Segment[ 0].BaseAddress = 80000000
Segment[ 0].PciSegmentGroupNumber = 0
Segment[ 0].StartBusNumber = 0
Segment[ 0].EndBusNumber = FF
Xhci TableHeader->OemTableId = 6E5F6878
[ACPI](KEYP) Not found any PCIe/CXL/NTB port
ExternSbExpected: 1787419672, ExternSbFound: 1787068440
ExternSbExpected: 0, ExternSbFound: 1993134098
PROGRESS CODE: V03040003 I0
PDB = c:\efi\servergen2\intel\Build\EagleStreamRpPkg\DEBUG_VS2015x86\X64\ServerPlatformPkg\Features\Acpi\Dxe\AcpiVtd\AcpiVTD\DEBUG\AcpiVTD.pdb
PROGRESS CODE: V03040002 I0
PROGRESS CODE: V03040003 I0
PDB = c:\efi\servergen2\intel\Build\EagleStreamRpPkg\DEBUG_VS2015x86\X64\OvmfPkg\QemuVideoDxe\QemuVideoDxe\DEBUG\QemuVideoDxe.pdb
PROGRESS CODE: V03040002 I0
PROGRESS CODE: V03040003 I0
PDB = c:\efi\servergen2\intel\Build\EagleStreamRpPkg\DEBUG_VS2015x86\X64\MdeModulePkg\Bus\Pci\XhciDxe\XhciDxe\DEBUG\XhciDxe.pdb
PROGRESS CODE: V03040002 I0
PROGRESS CODE: V03040003 I0
PDB = c:\efi\servergen2\intel\Build\EagleStreamRpPkg\DEBUG_VS2015x86\X64\MdeModulePkg\Bus\Pci\EhciDxe\EhciDxe\DEBUG\EhciDxe.pdb
PROGRESS CODE: V03040002 I0
PROGRESS CODE: V03040003 I0
PDB = c:\efi\servergen2\intel\Build\EagleStreamRpPkg\DEBUG_VS2015x86\X64\MdeModulePkg\Bus\Usb\UsbKbDxe\UsbKbDxe\DEBUG\UsbKbDxe.pdb
PROGRESS CODE: V03040002 I0
PROGRESS CODE: V03040003 I0
PDB = c:\efi\servergen2\intel\Build\EagleStreamRpPkg\DEBUG_VS2015x86\X64\MdeModulePkg\Bus\Usb\UsbMassStorageDxe\UsbMassStorageDxe\DEBUG\UsbMassStorageDxe.pdb
PROGRESS CODE: V03040002 I0
PROGRESS CODE: V03040003 I0
PDB = c:\efi\servergen2\intel\Build\EagleStreamRpPkg\DEBUG_VS2015x86\X64\MdeModulePkg\Bus\Usb\UsbMouseDxe\UsbMouseDxe\DEBUG\UsbMouseDxe.pdb
PROGRESS CODE: V03040002 I0
PROGRESS CODE: V03040003 I0
PDB = c:\efi\servergen2\intel\Build\EagleStreamRpPkg\DEBUG_VS2015x86\X64\MdeModulePkg\Bus\Pci\UhciDxe\UhciDxe\DEBUG\UhciDxe.pdb
PROGRESS CODE: V03040002 I0
PROGRESS CODE: V03040003 I0
PDB = c:\efi\servergen2\intel\Build\EagleStreamRpPkg\DEBUG_VS2015x86\X64\MdeModulePkg\Bus\Usb\UsbBusDxe\UsbBusDxe\DEBUG\UsbBusDxe.pdb
PROGRESS CODE: V03040002 I0
PROGRESS CODE: V03040003 I0
PDB = c:\efi\servergen2\intel\Build\EagleStreamRpPkg\DEBUG_VS2015x86\X64\MdeModulePkg\Bus\Pci\EhciDxe\EhciDxe\DEBUG\EhciDxe.pdb
PROGRESS CODE: V03040002 I0
PROGRESS CODE: V03040003 I0
PDB = c:\efi\servergen2\intel\Build\EagleStreamRpPkg\DEBUG_VS2015x86\X64\MdeModulePkg\Bus\Usb\UsbKbDxe\UsbKbDxe\DEBUG\UsbKbDxe.pdb
PROGRESS CODE: V03040002 I0
PROGRESS CODE: V03040003 I0
PDB = c:\efi\servergen2\intel\Build\EagleStreamRpPkg\DEBUG_VS2015x86\X64\MdeModulePkg\Bus\Usb\UsbMassStorageDxe\UsbMassStorageDxe\DEBUG\UsbMassStorageDxe.pdb
PROGRESS CODE: V03040002 I0
PROGRESS CODE: V03040003 I0
PDB = c:\efi\servergen2\intel\Build\EagleStreamRpPkg\DEBUG_VS2015x86\X64\MdeModulePkg\Bus\Usb\UsbMouseDxe\UsbMouseDxe\DEBUG\UsbMouseDxe.pdb
PROGRESS CODE: V03040002 I0
PROGRESS CODE: V03040003 I0
PDB = c:\efi\servergen2\intel\Build\EagleStreamRpPkg\DEBUG_VS2015x86\X64\MdeModulePkg\Bus\Pci\UhciDxe\UhciDxe\DEBUG\UhciDxe.pdb
PROGRESS CODE: V03040002 I0
PROGRESS CODE: V03040003 I0
PDB = c:\efi\servergen2\intel\Build\EagleStreamRpPkg\DEBUG_VS2015x86\X64\MdeModulePkg\Bus\Usb\UsbBusDxe\UsbBusDxe\DEBUG\UsbBusDxe.pdb
PROGRESS CODE: V03040002 I0
PROGRESS CODE: V03040003 I0
PDB = c:\efi\servergen2\intel\Build\EagleStreamRpPkg\DEBUG_VS2015x86\X64\MdeModulePkg\Bus\Scsi\ScsiBusDxe\ScsiBusDxe\DEBUG\ScsiBus.pdb
PROGRESS CODE: V03040002 I0
PROGRESS CODE: V03040003 I0
PDB = c:\efi\servergen2\intel\Build\EagleStreamRpPkg\DEBUG_VS2015x86\X64\MdeModulePkg\Bus\Scsi\ScsiDiskDxe\ScsiDiskDxe\DEBUG\ScsiDisk.pdb
PROGRESS CODE: V03040002 I0
PROGRESS CODE: V03040003 I0
PDB = c:\efi\servergen2\intel\Build\EagleStreamRpPkg\DEBUG_VS2015x86\X64\MdeModulePkg\Bus\Pci\NvmExpressDxe\NvmExpressDxe\DEBUG\NvmExpressDxe.pdb
PROGRESS CODE: V03040002 I0
PROGRESS CODE: V03040003 I0
PDB = c:\efi\servergen2\intel\Build\EagleStreamRpPkg\DEBUG_VS2015x86\X64\MdeModulePkg\Universal\Disk\UnicodeCollation\EnglishDxe\EnglishDxe\DEBUG\EnglishDxe.pdb
PROGRESS CODE: V03040002 I0
PROGRESS CODE: V03040003 I0
PDB = c:\efi\servergen2\intel\Build\EagleStreamRpPkg\DEBUG_VS2015x86\X64\MdeModulePkg\Universal\Console\ConPlatformDxe\ConPlatformDxe\DEBUG\ConPlatformDxe.pdb
PROGRESS CODE: V03040002 I0
PROGRESS CODE: V03040003 I0
PDB = c:\efi\servergen2\intel\Build\EagleStreamRpPkg\DEBUG_VS2015x86\X64\MdeModulePkg\Universal\Console\ConSplitterDxe\ConSplitterDxe\DEBUG\ConSplitterDxe.pdb
PROGRESS CODE: V03040002 I0
PROGRESS CODE: V03040003 I0
PDB = c:\efi\servergen2\intel\Build\EagleStreamRpPkg\DEBUG_VS2015x86\X64\MdeModulePkg\Universal\Console\GraphicsConsoleDxe\GraphicsConsoleDxe\DEBUG\GraphicsConsoleDxe.pdb
PROGRESS CODE: V03040002 I0
PROGRESS CODE: V03040003 I0
PDB = c:\efi\servergen2\intel\Build\EagleStreamRpPkg\DEBUG_VS2015x86\X64\MdeModulePkg\Universal\Console\TerminalDxe\TerminalDxe\DEBUG\TerminalDxe.pdb
PROGRESS CODE: V03040002 I0
PROGRESS CODE: V03040003 I0
PDB = c:\efi\servergen2\intel\Build\EagleStreamRpPkg\DEBUG_VS2015x86\X64\MdeModulePkg\Universal\Disk\DiskIoDxe\DiskIoDxe\DEBUG\DiskIoDxe.pdb
PROGRESS CODE: V03040002 I0
PROGRESS CODE: V03040003 I0
PDB = c:\efi\servergen2\intel\Build\EagleStreamRpPkg\DEBUG_VS2015x86\X64\MdeModulePkg\Universal\Disk\PartitionDxe\PartitionDxe\DEBUG\PartitionDxe.pdb
PROGRESS CODE: V03040002 I0
PROGRESS CODE: V03040003 I0
PDB = c:\efi\servergen2\intel\Build\EagleStreamRpPkg\DEBUG_VS2015x86\X64\MdeModulePkg\Bus\Isa\IsaBusDxe\IsaBusDxe\DEBUG\IsaBusDxe.pdb
PROGRESS CODE: V03040002 I0
PROGRESS CODE: V03040003 I0
PDB = c:\efi\servergen2\intel\Build\EagleStreamRpPkg\DEBUG_VS2015x86\X64\MdeModulePkg\Bus\Pci\PciSioSerialDxe\PciSioSerialDxe\DEBUG\PciSioSerialDxe.pdb
PROGRESS CODE: V03040002 I0
PROGRESS CODE: V03040003 I0
PDB = c:\efi\servergen2\intel\Build\EagleStreamRpPkg\DEBUG_VS2015x86\X64\MdeModulePkg\Bus\Isa\Ps2KeyboardDxe\Ps2KeyboardDxe\DEBUG\Ps2KeyboardDxe.pdb
PROGRESS CODE: V03040002 I0
PROGRESS CODE: V03040003 I0
PDB = c:\efi\servergen2\intel\Build\EagleStreamRpPkg\DEBUG_VS2015x86\X64\MdeModulePkg\Bus\Isa\Ps2MouseDxe\Ps2MouseDxe\DEBUG\Ps2MouseDxe.pdb
PROGRESS CODE: V03040002 I0
PROGRESS CODE: V03040003 I0
PDB = c:\efi\servergen2\intel\Build\EagleStreamRpPkg\DEBUG_VS2015x86\X64\MdeModulePkg\Bus\Ata\AtaBusDxe\AtaBusDxe\DEBUG\AtaBusDxe.pdb
PROGRESS CODE: V03040002 I0
PROGRESS CODE: V03040003 I0
PDB = c:\efi\servergen2\intel\Build\EagleStreamRpPkg\DEBUG_VS2015x86\X64\MdeModulePkg\Bus\Ata\AtaAtapiPassThru\AtaAtapiPassThru\DEBUG\AtaAtapiPassThruDxe.pdb
PROGRESS CODE: V03040002 I0
PROGRESS CODE: V03040003 I0
PDB = c:\efi\servergen2\intel\Build\EagleStreamRpPkg\DEBUG_VS2015x86\X64\NetworkPkg\SnpDxe\SnpDxe\DEBUG\SnpDxe.pdb
PROGRESS CODE: V03040002 I0
PROGRESS CODE: V03040003 I0
PDB = c:\efi\servergen2\intel\Build\EagleStreamRpPkg\DEBUG_VS2015x86\X64\NetworkPkg\VlanConfigDxe\VlanConfigDxe\DEBUG\VlanConfigDxe.pdb
PROGRESS CODE: V03040002 I0
PROGRESS CODE: V03040003 I0
PDB = c:\efi\servergen2\intel\Build\EagleStreamRpPkg\DEBUG_VS2015x86\X64\NetworkPkg\MnpDxe\MnpDxe\DEBUG\MnpDxe.pdb
PROGRESS CODE: V03040002 I0
PROGRESS CODE: V03040003 I0
PDB = c:\efi\servergen2\intel\Build\EagleStreamRpPkg\DEBUG_VS2015x86\X64\NetworkPkg\ArpDxe\ArpDxe\DEBUG\ArpDxe.pdb
PROGRESS CODE: V03040002 I0
PROGRESS CODE: V03040003 I0
PDB = c:\efi\servergen2\intel\Build\EagleStreamRpPkg\DEBUG_VS2015x86\X64\NetworkPkg\Dhcp4Dxe\Dhcp4Dxe\DEBUG\Dhcp4Dxe.pdb
PROGRESS CODE: V03040002 I0
PROGRESS CODE: V03040003 I0
PDB = c:\efi\servergen2\intel\Build\EagleStreamRpPkg\DEBUG_VS2015x86\X64\NetworkPkg\Ip4Dxe\Ip4Dxe\DEBUG\Ip4Dxe.pdb
PROGRESS CODE: V03040002 I0
PROGRESS CODE: V03040003 I0
PDB = c:\efi\servergen2\intel\Build\EagleStreamRpPkg\DEBUG_VS2015x86\X64\NetworkPkg\Udp4Dxe\Udp4Dxe\DEBUG\Udp4Dxe.pdb
PROGRESS CODE: V03040002 I0
PROGRESS CODE: V03040003 I0
PDB = c:\efi\servergen2\intel\Build\EagleStreamRpPkg\DEBUG_VS2015x86\X64\NetworkPkg\Mtftp4Dxe\Mtftp4Dxe\DEBUG\Mtftp4Dxe.pdb
PROGRESS CODE: V03040002 I0
PROGRESS CODE: V03040003 I0
PDB = c:\efi\servergen2\intel\Build\EagleStreamRpPkg\DEBUG_VS2015x86\X64\NetworkPkg\Dhcp6Dxe\Dhcp6Dxe\DEBUG\Dhcp6Dxe.pdb
PROGRESS CODE: V03040002 I0
PROGRESS CODE: V03040003 I0
PDB = c:\efi\servergen2\intel\Build\EagleStreamRpPkg\DEBUG_VS2015x86\X64\NetworkPkg\Ip6Dxe\Ip6Dxe\DEBUG\Ip6Dxe.pdb
PROGRESS CODE: V03040002 I0
PROGRESS CODE: V03040003 I0
PDB = c:\efi\servergen2\intel\Build\EagleStreamRpPkg\DEBUG_VS2015x86\X64\NetworkPkg\Udp6Dxe\Udp6Dxe\DEBUG\Udp6Dxe.pdb
PROGRESS CODE: V03040002 I0
PROGRESS CODE: V03040003 I0
PDB = c:\efi\servergen2\intel\Build\EagleStreamRpPkg\DEBUG_VS2015x86\X64\NetworkPkg\Mtftp6Dxe\Mtftp6Dxe\DEBUG\Mtftp6Dxe.pdb
PROGRESS CODE: V03040002 I0
PROGRESS CODE: V03040003 I0
PDB = c:\efi\servergen2\intel\Build\EagleStreamRpPkg\DEBUG_VS2015x86\X64\NetworkPkg\TcpDxe\TcpDxe\DEBUG\TcpDxe.pdb
PROGRESS CODE: V03040002 I0
PROGRESS CODE: V03040003 I0
PDB = c:\efi\servergen2\intel\Build\EagleStreamRpPkg\DEBUG_VS2015x86\X64\NetworkPkg\UefiPxeBcDxe\UefiPxeBcDxe\DEBUG\UefiPxeBcDxe.pdb
PROGRESS CODE: V03040002 I0
PROGRESS CODE: V03040003 I0
PDB = c:\efi\servergen2\intel\Build\EagleStreamRpPkg\DEBUG_VS2015x86\X64\NetworkPkg\TlsDxe\TlsDxe\DEBUG\TlsDxe.pdb
PROGRESS CODE: V03040002 I0
PROGRESS CODE: V03040003 I0
PDB = c:\efi\servergen2\intel\Build\EagleStreamRpPkg\DEBUG_VS2015x86\X64\NetworkPkg\DnsDxe\DnsDxe\DEBUG\DnsDxe.pdb
PROGRESS CODE: V03040002 I0
PROGRESS CODE: V03040003 I0
PDB = c:\efi\servergen2\intel\Build\EagleStreamRpPkg\DEBUG_VS2015x86\X64\NetworkPkg\HttpDxe\HttpDxe\DEBUG\HttpDxe.pdb
PROGRESS CODE: V03040002 I0
PROGRESS CODE: V03040003 I0
PDB = c:\efi\servergen2\intel\Build\EagleStreamRpPkg\DEBUG_VS2015x86\X64\NetworkPkg\HttpBootDxe\HttpBootDxe\DEBUG\HttpBootDxe.pdb
PROGRESS CODE: V03040002 I0
PROGRESS CODE: V03040003 I0
PROGRESS CODE: V03040002 I0
PROGRESS CODE: V03040003 I0
PROGRESS CODE: V03040002 I0
PROGRESS CODE: V03040003 I0
PROGRESS CODE: V03040002 I0
PROGRESS CODE: V03040003 I0
PROGRESS CODE: V03040002 I0
PROGRESS CODE: V03040003 I0
PDB = d:\qba1\workspace\39189\vmd_uefi\Build\MdeModule\DEBUG_VS2012x86\X64\MdeModulePkg\Bus\Pci\VmdDxe\VmdDxe\DEBUG\VmdDxe.pdb
PROGRESS CODE: V03040002 I0
PROGRESS CODE: V03040003 I0
PROGRESS CODE: V03040002 I0
PROGRESS CODE: V03040003 I0
PDB = c:\efi\servergen2\intel\Build\EagleStreamRpPkg\DEBUG_VS2015x86\X64\XmlCliFeaturePkg\XmlCliRestricted\Smm\XmlCliSmm\DEBUG\XmlCliSmm.pdb
PROGRESS CODE: V03070002 I0
PROGRESS CODE: V03070003 I0
PDB = c:\efi\servergen2\intel\Build\EagleStreamRpPkg\DEBUG_VS2015x86\X64\ServerPlatformPkg\Features\Acpi\DxeSmm\AcpiSmm\AcpiSmmPlatform\DEBUG\AcpiSmmPlatform.pdb
PROGRESS CODE: V03070002 I0
PROGRESS CODE: V03070003 I0
PDB = c:\efi\servergen2\intel\Build\EagleStreamRpPkg\DEBUG_VS2015x86\X64\ServerPlatformPkg\Restricted\SMIFlashSigned\SMIFlashSigned\DEBUG\SmiFlashSigned.pdb
PROGRESS CODE: V03070002 I0
PROGRESS CODE: V03070003 I0
PDB = c:\efi\servergen2\intel\Build\EagleStreamRpPkg\DEBUG_VS2015x86\X64\ServerRasPkg\Driver\Smm\Gen2\IioErrorHandler\IioErrorHandler\DEBUG\IioErrorHandler.pdb
PROGRESS CODE: V03070002 I0
MailBox->IioInitPar.CxlMefnEn = 0x0
PROGRESS CODE: V03070003 I0
PDB = c:\efi\servergen2\intel\Build\EagleStreamRpPkg\DEBUG_VS2015x86\X64\ServerRasPkg\Driver\Smm\WheaErrorLogListener\WheaErrorLogListener\DEBUG\WheaErrorLogListener.pdb
PROGRESS CODE: V03070002 I0
[HEST] Current source counter:1 table length:68 buffer address:76BEF018
[HEST] Current source counter:2 table length:A8 buffer address:76BEA018
[HEST] Current source counter:3 table length:D8 buffer address:0
[HEST] Current source counter:4 table length:104 buffer address:0
[HEST] Current source counter:5 table length:13C buffer address:0
dump ACPI table
48 45 53 54 3C 1 0 0 1 0 49 4E 54 45 4C 20 49
4E 54 45 4C 20 49 44 1 0 0 0 49 4E 54 4C 1
0 0 0 5 0 0 0 9 0 0 0 FF FF 0 1 1
0 0 0 F 0 0 0 F8 1F 0 0 0 40 0 4 18
F0 BE 76 0 0 0 0 3 1C 0 0 0 0 0 0 0
0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0
0 0 0 0 20 0 0 9 0 1 0 FF FF 0 1 1
0 0 0 1 0 0 0 F8 1F 0 0 0 40 0 4 18
A0 BE 76 0 0 0 0 4 1C 0 0 0 0 0 0 0
0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0
0 0 0 0 20 0 0 6 0 2 0 0 0 3 0 1
0 0 0 1 0 0 0 0 0 0 0 0 0 0 0 0
0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0
0 0 0 0 0 0 0 7 0 3 0 0 0 3 0 1
0 0 0 1 0 0 0 0 0 0 0 0 0 0 0 0
0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0
0 0 0 8 0 4 0 0 0 3 0 1 0 0 0 1
0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0
0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0
0 0 0 0 0 0 0 0 0 0 0
[WHEAINIT] start to install WHEA ACPI tables
[WHEAINIT] install WHEA ACPI tables status:Success
PROGRESS CODE: V03070003 I0
PDB = c:\efi\servergen2\intel\Build\EagleStreamRpPkg\DEBUG_VS2015x86\X64\ServerSecurityPkg\Mktme\MktmeLateInit\MktmeLateInit\DEBUG\MktmeLateInit.pdb
PROGRESS CODE: V03040002 I0
PROGRESS CODE: V03040003 I0
PDB = c:\efi\servergen2\intel\Build\EagleStreamRpPkg\DEBUG_VS2015x86\X64\ServerSecurityPkg\Sgx\SgxLateInit\Spr\SgxLateInit\DEBUG\SgxLateInitSPR.pdb
PROGRESS CODE: V03040002 I0
[SGX] SgxLateInitEntryPoint entry
SgxMpServicesData()
Thread 0 is BSP of Socket 0
Thread 80 is BSP of Socket 1
System BSP Thread = 000
System BSP Package = 000
[SGX] GetActmManifestHobArray BEGIN
Found ActmDimmManifestHob[0] = 0x70C93788!
Found ActmDimmManifestHob[1] = 0x70C93908!
[SGX] GetActmManifestHobArray END (Success)
[SGX] UpdateSocketSetupOptions Start
[SGX] UpdateSocketSetupOptions exit: Success
TDX: GuidHob pointer is NULL
GetVariableHelper - SgxRegistrationConfiguration not found in NVRAM, continue
GetVariableHelper - SgxUefiRegistrationConfiguration not found in NVRAM, continue
[SGX] Create RegistrationConfiguration from defaults.
SetRegistrationServerAddress: SgxRegistrationConfig->SgxRegServerInfo.Url = https://sbx.api.trustedservices.intel.com:443
[SGX] Update UpdateRegistrationConfigFlags
GetVariableHelper - SgxPlatformManifest not found in NVRAM, continue
GetVariableHelper - SgxUefiRegistrationServerRequest not found in NVRAM, continue
[SGX-DEBUG]: Get SgxRegistrationStatus
GetVariableHelper - SgxRegistrationStatus not found in NVRAM, continue
[SGX-DEBUG]: Get SgxUefiRegistrationStatus
GetVariableHelper - SgxUefiRegistrationStatus not found in NVRAM, continue
Warning: SGX is disabled on this system
[SGX] SgxDisabled_SgxLateInit: Success
[SGX] SgxErrorCode = 0x0
[SGX] PreviousStateVariablesSaving BEGIN
GetVariableHelper - SgxRegistrationServerResponse not found in NVRAM, continue
[SGX] SgxLateInit exit: Success
PROGRESS CODE: V03040003 I0
PDB = c:\efi\servergen2\intel\Build\EagleStreamRpPkg\DEBUG_VS2015x86\X64\ServerPlatformPkg\Platform\Dxe\S3NvramSave\S3NvramSave\DEBUG\S3NvramSave.pdb
PROGRESS CODE: V03040002 I0
Save data to NVRAM for socket_0_nvram_data / socket_0_nvram_data - = Saved
Save data to NVRAM for socket_1_nvram_data / socket_1_nvram_data - = Saved
Save data to NVRAM for socket_2_nvram_data / socket_2_nvram_data - = HOB not found or not populated
Save data to NVRAM for socket_3_nvram_data / socket_3_nvram_data - = HOB not found or not populatedPROGRESS CODE: V03040003 I0
PDB = c:\efi\servergen2\intel\Build\EagleStreamRpPkg\DEBUG_VS2015x86\X64\ServerPlatformPkg\Platform\Dxe\UncoreMiscDxe\UncoreMiscDxe\DEBUG\UncoreMiscDxe.pdb
PROGRESS CODE: V03040002 I0
PROGRESS CODE: V03040003 I0
PDB = c:\efi\servergen2\intel\Build\EagleStreamRpPkg\DEBUG_VS2015x86\X64\ServerPlatformPkg\Platform\Dxe\ReserveMemory\ReserveMem\DEBUG\ReserveMem.pdb
PROGRESS CODE: V03040002 I0
PROGRESS CODE: V03040003 I0
PDB = c:\efi\servergen2\intel\Build\EagleStreamRpPkg\DEBUG_VS2015x86\X64\ServerSecurityPkg\Universal\GetSec\Dxe\TxtDxe\DEBUG\TxtDxe.pdb
PROGRESS CODE: V03040002 I0
TXT is disabled
[TXT] DriverEntry: Exit
PROGRESS CODE: V03040003 I0
PDB = c:\efi\servergen2\intel\Build\EagleStreamRpPkg\DEBUG_VS2015x86\X64\UserAuthFeaturePkg\UserAuthenticationDxeSmm\UserAuthenticationDxe\DEBUG\UserAuthenticationDxe.pdb
PROGRESS CODE: V03040002 I0
PROGRESS CODE: V03040003 I0
PDB = c:\efi\servergen2\intel\Build\EagleStreamRpPkg\DEBUG_VS2015x86\X64\EagleStreamRpPkg\Platform\Dxe\Setup\DxePlatform\DEBUG\Platform.pdb
PROGRESS CODE: V03040002 I0
Is CMOS Bad = 1
[HECI Transport-1 DXE] Send pkt: 80040007
00: FF 02 00 00
[HECI Transport-1 DXE] Got pkt: 80140007
00: FF 82 00 00 00 00 06 18 - 00 01 03 00 00 00 06 18
10: 00 01 03 00
[HECI Transport-1 DXE] Send pkt: 80140008
00: 00 00 05 00 1F 00 00 00 - 00 00 00 00 00 00 00 00
10: 00 00 00 00
[HECI Transport-1 DXE] Got pkt: 805E0008
00: 00 00 05 00 1F 00 00 00 - 00 00 00 00 4A 00 00 00
10: 00 00 00 00 18 18 06 00 - 00 06 00 01 06 00 02 06
20: 00 03 56 00 04 56 00 05 - 56 00 06 56 00 07 5C 00
30: 08 7C 00 09 55 00 0A 55 - 00 0B 5B 00 0C 55 00 0D
40: 51 00 0E 51 00 0F 47 00 - 10 07 00 11 47 00 12 07
50: 00 13 47 00 14 07 00 15 - 47 00 16 07 00 17
PROGRESS CODE: V03040003 I0
PDB = c:\efi\servergen2\intel\Build\EagleStreamRpPkg\DEBUG_VS2015x86\X64\ServerPlatformPkg\Platform\Dxe\SocketSetup\SocketSetup\DEBUG\SocketSetup.pdb
PROGRESS CODE: V03040002 I0
PROGRESS CODE: V03040003 I0
PROGRESS CODE: V03041001 I0
PROGRESS CODE: V03051005 I0
PROGRESS CODE: V02010000 I0
PROGRESS CODE: V02011000 I0
PROGRESS CODE: V02011000 I0
PROGRESS CODE: V02011000 I0
PROGRESS CODE: V02011000 I0
PROGRESS CODE: V02011000 I0
PROGRESS CODE: V02011000 I0
PROGRESS CODE: V02011000 I0
PROGRESS CODE: V02011000 I0
PROGRESS CODE: V02011000 I0
PROGRESS CODE: V02011000 I0
PROGRESS CODE: V02011000 I0
PROGRESS CODE: V02011000 I0
PROGRESS CODE: V02011000 I0
PROGRESS CODE: V02011000 I0
PROGRESS CODE: V02011000 I0
PROGRESS CODE: V02011000 I0
PROGRESS CODE: V02011000 I0
PROGRESS CODE: V02011000 I0
PROGRESS CODE: V02011000 I0
PROGRESS CODE: V02011000 I0
PROGRESS CODE: V02011000 I0
PROGRESS CODE: V02011000 I0
PROGRESS CODE: V02011000 I0
PROGRESS CODE: V02011000 I0
PROGRESS CODE: V02011000 I0
PROGRESS CODE: V02011000 I0
PROGRESS CODE: V02011000 I0
PROGRESS CODE: V02011000 I0
PROGRESS CODE: V02011000 I0
PROGRESS CODE: V02011000 I0
PROGRESS CODE: V02011000 I0
PROGRESS CODE: V02011000 I0
PROGRESS CODE: V02011000 I0
PROGRESS CODE: V02011000 I0
PROGRESS CODE: V02011000 I0
PROGRESS CODE: V02011000 I0
PROGRESS CODE: V02011000 I0
PROGRESS CODE: V02011000 I0
PROGRESS CODE: V02011000 I0
PROGRESS CODE: V02011000 I0
PROGRESS CODE: V02011001 I0
Calling IoatInitBootEvent IioIndex: 0
IOAT_INIT_BOOT_EVENT_START
DSA init IioIndex : 0 InstId : 0
IAX init IioIndex : 0 InstId : 0
DSA init IioIndex : 0 InstId : 1
IAX init IioIndex : 0 InstId : 1
DSA init IioIndex : 0 InstId : 2
IAX init IioIndex : 0 InstId : 2
DSA init IioIndex : 0 InstId : 3
IAX init IioIndex : 0 InstId : 3
IOAT_INIT_BOOT_EVENT_END
Calling IioDisableLinkPorts IioIndex: 0
[0] Hide devices; Phase = B
Calling IoatInitBootEvent IioIndex: 1
IOAT_INIT_BOOT_EVENT_START
DSA init IioIndex : 1 InstId : 0
IAX init IioIndex : 1 InstId : 0
DSA init IioIndex : 1 InstId : 1
IAX init IioIndex : 1 InstId : 1
DSA init IioIndex : 1 InstId : 2
IAX init IioIndex : 1 InstId : 2
DSA init IioIndex : 1 InstId : 3
IAX init IioIndex : 1 InstId : 3
IOAT_INIT_BOOT_EVENT_END
Calling IioDisableLinkPorts IioIndex: 1
[1] Hide devices; Phase = B
PROGRESS CODE: V02010004 I0
PROGRESS CODE: V02010004 I0
PROGRESS CODE: V02010004 I0
[OOBMSM] BMC: Expected VID_DID = 0x11501A03
[OOBMSM] BMC: Bus[0x2]:Dev[0x0]:Fun[0x0]
[OOBMSM] PCH-PMT: Bus[0x0]:Dev[0x14]:Fun[0x6]
[GPIO Conflict Check] Identified conflict on pad GPIO_GPP_B12 (actual: 0x3, expected: 0x9)
[GPIO Conflict Check] Identified conflict on pad GPIO_GPP_B13 (actual: 0x3, expected: 0x9)
[GPIO Conflict Check] Identified conflict on pad GPIO_GPP_B14 (actual: 0x3, expected: 0x9)
[GPIO Conflict Check] Identified conflict on pad GPIO_GPP_B15 (actual: 0x3, expected: 0x9)
[OtaDxe.c] OtaEventHandler() {
[OOB] ExecuteOobOneTouchRequest() {
[LT EXISTS register at 0xFED30010]: 0x0000000000000000
TXT Supported Bitmap 0x0000
TXT Enabled Bitmap 0x0000
[LT EMIF register at 0xFED30200]: 0x1D003000, Bit28:27 = 0x03, Bit24:22 = 0x04
[LT FTIF register at 0xFED30800]: 0x0000000000052000, Bit18:16 = 0x05
TPM Supported Bitmap 0x0002
TPM2.0 PS NV Index 0x01C10103: Not Defined, Not Written, Not Write-Protected
TPM2.0 AUX NV Index 0x01C10102: Not Defined, Not Written, Not Write-Protected
TPM2.0 PO NV Index 0x01C10106: Not Defined, Not Written, Not Write-Protected
TPM2.0 Provisioned? No
TPM2.0 Ownership Claimed? No
TPM Enabled Bitmap 0x0002, TPM Usage Bitmap 0x0004
[IA32_TME_CAPABILITY MSR 981h] = 0x000007F7 80000003
[IA32_TME_ACTIVATE MSR 982h] = 0x00000000 00000001
[IA32_TME_MTRRCAP MSR FEh] = 0x00000000 00007D0A
TME/MK-TME/TDX: Supported Bitmap 0xC000, Enabled Bitmap 0x0000
[IA32_FEATURE_CONTROL MSR 3Ah] = 0x00000000 00100004
SGX Supported Bitmap 0x1000
SGX Enabled Bitmap 0x0000
-> PFR Support Bitmap: 0x0000, PFR Enabled Bitmap: 0x0000
PFR State: 0x0000, Recovery Count: 0x00, Last Recovery Reason 0x00
Panic Event Count: 0x00, Last Panic Reason 0x00
[OOB] ExecuteOobOneTouchRequest() -> Non-Volatile Storage Supported? Yes
ME Non-Volatile Storage: Supported
EFI Non-Volatile Storage: Supported
Maximum size of OOB Non-Volatile Storage: 0x00008400 bytes
[OOB] ExecuteOobOneTouchRequest() -> Allocate Memory for NV Storage Data (Total 0x00021000 bytes): Success
[HECI Transport-1 DXE] Send pkt: 800B0023
00: 00 00 00 00 00 00 00 00 - 00 00 00
[HECI Transport-1 DXE] Got pkt: 80040023
00: 00 80 02 00
[SPS] ERROR: ME Storage Service operation status: 2
[OOB] ExecuteOobOneTouchRequest() -> Use Default Use-Case 0x01 (OOB NV Storage Data Not used)
[OOB] ExecuteOobOneTouchRequest() -> Input OOB Data to process: Size = 0x00000044 bytes
----------------------------------------------------------------------
Offset 00 01 02 03 04 05 06 07 08 09 0A 0B 0C 0D 0E 0F
----------------------------------------------------------------------
0000 24 4F 58 50 44 00 20 00 01 DB 01 FF 00 00 00 00
0010 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00
0020 02 24 00 00 80 7E F8 83 06 00 00 00 00 00 00 00
0030 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00
0040 00 00 00 00
----------------------------------------------------------------------
[OOB] ExecuteOobOneTouchRequest() -> Updated State 0x30100000, Fatal Error 0x00000000
[OOB] ExecuteOobOneTouchRequest() -> OOB Data after processing
OOB Data after processing (before updating Checksum, State): Size = 0x00000044 bytes
----------------------------------------------------------------------
Offset 00 01 02 03 04 05 06 07 08 09 0A 0B 0C 0D 0E 0F
----------------------------------------------------------------------
0000 24 4F 58 50 44 00 20 00 02 DB 81 00 03 00 02 D0
0010 02 00 00 00 00 00 03 00 04 00 00 00 00 00 00 00
0020 02 24 00 00 E8 7E F8 83 06 00 00 00 00 00 00 00
0030 00 00 00 00 00 7F 00 07 00 00 00 00 00 00 00 00
0040 00 00 00 00
----------------------------------------------------------------------
[OOB] ExecuteOobOneTouchRequest() -> Write OOB Data, if necessary
State Non-Zero OR OOB Data modified
OOB input data size <> 0 AND valid input signature: Generate OOB Output Data
[OOB] ExecuteOobOneTouchRequest() -> OOB Output Data Size = 0x00000044 bytes, State = 0x30107900
----------------------------------------------------------------------
Offset 00 01 02 03 04 05 06 07 08 09 0A 0B 0C 0D 0E 0F
----------------------------------------------------------------------
0000 50 58 4F 24 44 00 20 00 02 D4 81 00 03 00 02 D0
0010 02 00 00 79 10 30 03 00 04 00 00 00 00 00 00 00
0020 02 24 00 00 E8 7E F8 83 06 00 00 00 00 00 00 00
0030 00 00 00 00 00 7F 00 07 00 00 00 00 00 00 00 00
0040 00 00 00 00
----------------------------------------------------------------------
Write OOB Output Data ->
[HECI Transport-1 DXE] Send pkt: 804F0023
00: 01 00 00 00 00 00 00 00 - 00 00 00 50 58 4F 24 44
10: 00 20 00 02 D4 81 00 03 - 00 02 D0 02 00 00 79 10
20: 30 03 00 04 00 00 00 00 - 00 00 00 02 24 00 00 E8
30: 7E F8 83 06 00 00 00 00 - 00 00 00 00 00 00 00 00
40: 7F 00 07 00 00 00 00 00 - 00 00 00 00 00 00 00
[HECI Transport-1 DXE] Got pkt: 80040023
00: 01 80 00 00
[OOB] ExecuteOobOneTouchRequest() -> Updated State: 0x30107900, Fatal Error: 0x00000000
[OOB-SMBIOS] GenerateSmbiosStructuresOTA() { Generate OTA SMBIOS Structures
[OOB-SMBIOS] AddOemStructureOTA() { Add OEM Structure Type-168 (0xA8)
Allocate memory for OEM Structure: Success
Form OEM Structure
[OOB-SMBIOS] AddStringAndAdd2Smbios() { Add String and Add Structure to SMBIOS
[OOB-SMBIOS] Unicode2AsciizString() { Convert Unicode string to ASCIIZ String
[OOB-SMBIOS] Unicode2AsciizString() } Success, ASCIIZ String length (including NULL) = 0x0020
Add Formed Structure to other SMBIOS structures, Handle before adding 0xFFFE
Structure addition to SMBIOS: EFI Status 0x00000000, Handle after adding 0x0048 -> Success
******** Formed SMBIOS Structure Data, Length 0x50
----------------------------------------------------------------------
Offset 00 01 02 03 04 05 06 07 08 09 0A 0B 0C 0D 0E 0F
----------------------------------------------------------------------
0000 A8 2F 48 00 01 00 01 02 03 00 02 D0 02 00 04 00
0010 7E F8 83 06 00 00 00 00 00 00 00 00 00 00 00 00
0020 7F 00 07 00 00 00 00 00 00 00 00 00 00 00 00 4D
0030 65 6D 62 65 72 3A 20 4F 54 41 20 47 65 6E 65 72
0040 61 6C 20 49 6E 66 6F 72 6D 61 74 69 6F 6E 00 00
----------------------------------------------------------------------
[OOB-SMBIOS] AddStringAndAdd2Smbios() } Success, Handle of added Structure = 0x0048
[OOB-SMBIOS] AddOemStructureOTA() } Success
[OOB-SMBIOS] AddGroupAssociationStructureOTA() { Add Group Association Structure Type-14 (0x0E)
Allocate memory for Group Association Structure: Success
Form Group Association Structure
[OOB-SMBIOS] AddStringAndAdd2Smbios() { Add String and Add Structure to SMBIOS
[OOB-SMBIOS] Unicode2AsciizString() { Convert Unicode string to ASCIIZ String
[OOB-SMBIOS] Unicode2AsciizString() } Success, ASCIIZ String length (including NULL) = 0x0022
Add Formed Structure to other SMBIOS structures, Handle before adding 0xFFFE
Structure addition to SMBIOS: EFI Status 0x00000000, Handle after adding 0x0049 -> Success
******** Formed SMBIOS Structure Data, Length 0x2B
----------------------------------------------------------------------
Offset 00 01 02 03 04 05 06 07 08 09 0A 0B 0C 0D 0E 0F
----------------------------------------------------------------------
0000 0E 08 49 00 01 A8 48 00 47 72 6F 75 70 3A 20 4F
0010 6E 65 20 54 6F 75 63 68 20 41 63 74 69 76 61 74
0020 69 6F 6E 20 28 4F 54 41 29 00 00
----------------------------------------------------------------------
[OOB-SMBIOS] AddStringAndAdd2Smbios() } Success, Handle of added Structure = 0x0049
[OOB-SMBIOS] AddGroupAssociationStructureOTA() } Success
[OOB-SMBIOS] GenerateSmbiosStructuresOTA() } Success
[OOB] ExecuteOobOneTouchRequest() -> Clear, Deallocate Memory used for OOB Data
Clear Memory used for OOB Data
Deallocate Memory used for OOB Data
Clear, Deallocate Memory used for Platform Information
[OOB] ExecuteOobOneTouchRequest() -> No task to perform OR Reset not required for the performed task
[OOB] ExecuteOobOneTouchRequest() }
[OtaDxe.c] OtaEventHandler() }
Console redirection ENABLED
Console redirection ENABLED
PROGRESS CODE: V03050000 I0
NfitTableUpdateProtocol is not installed.
No Table for current platform
No Table for current platform
:INIT - BIOS_RESET_CPL: Set CPL3 on #S1 into BIOS_RESET_CPL_PCU_FUN1_REG
:PM - Successfully got ACK CPL3 on #S1
:INIT - BIOS_RESET_CPL: Set CPL4 on #S1 into BIOS_RESET_CPL_PCU_FUN1_REG
:PM - Successfully got ACK CPL4 on #S1
:INIT - BIOS_RESET_CPL: Set CPL3 on #S0 into BIOS_RESET_CPL_PCU_FUN1_REG
:PM - Successfully got ACK CPL3 on #S0
:INIT - BIOS_RESET_CPL: Set CPL4 on #S0 into BIOS_RESET_CPL_PCU_FUN1_REG
:PM - Successfully got ACK CPL4 on #S0
DXE PPM Config Complete
[HECI Transport-1 DXE] Send pkt: 80040007
00: 0A 05 00 00
[HECI Transport-1 DXE] Got pkt: 80040007
00: 0A 85 00 00
IioSecureOnEndOfDxe...
Lock the CXL.Arb-Mux secured register if there is any CXL port
Lock the CXL.Arb-Mux secured register if there is any CXL port
[IEH INIT] Init Socket:0x0
[Init Global IEH] on Skt:0x0
[Init Satallite IEH] on BitIdx:0x1
[Init Satallite IEH] S:0 B:0x0 D:0x14 F:0x4
[Init Satallite IEH] Device on BitIdx:0x3 doesn't exist
[Init Satallite IEH] Device on BitIdx:0x4 doesn't exist
[Init Satallite IEH] Device on BitIdx:0x5 doesn't exist
[Init Satallite IEH] Device on BitIdx:0x6 doesn't exist
[Init Satallite IEH] Device on BitIdx:0x7 doesn't exist
[Init Satallite IEH] Device on BitIdx:0x9 doesn't exist
[Init Satallite IEH] Device on BitIdx:0xB doesn't exist
[Init Satallite IEH] Device on BitIdx:0xC doesn't exist
[Init Satallite IEH] Device on BitIdx:0xD doesn't exist
[Init Satallite IEH] Device on BitIdx:0xE doesn't exist
[Init Satallite IEH] Device on BitIdx:0xF doesn't exist
[Init Satallite IEH] Device on BitIdx:0x10 doesn't exist
[Init Satallite IEH] Device on BitIdx:0x11 doesn't exist
[Init Satallite IEH] Device on BitIdx:0x12 doesn't exist
[Init Satallite IEH] Device on BitIdx:0x13 doesn't exist
[Init Satallite IEH] Device on BitIdx:0x17 doesn't exist
[Init Satallite IEH] Device on BitIdx:0x18 doesn't exist
[Init Satallite IEH] Device on BitIdx:0x19 doesn't exist
[Init Satallite IEH] Device on BitIdx:0x1D doesn't exist
Clear IEH Global Error Status before enabling IEH error...
[Init Satallite IEH] S:0 B:0x0 D:0x14 F:0x4 End
[Init Satallite IEH] on BitIdx:0x2
[Init Satallite IEH] S:0 B:0x6A D:0x0 F:0x4
PSF Dino PSF HCx Clear IEH Global Error Status before enabling IEH error...
[Init Satallite IEH] S:0 B:0x6A D:0x0 F:0x4 End
[Init Satallite IEH] on BitIdx:0x3
[Init Satallite IEH] S:0 B:0x0 D:0x0 F:0x4
PSF PCIE Pi5 PCIE GEN4 DMI Pi5 PCIE GEN5 IAL Pi5 (CXL) SPD I3C Bus SPD I3C Bus CXP SMBUS [Init Satallite IEH] Device on BitIdx:0x2 doesn't exist
[Init Satallite IEH] Device on BitIdx:0x3 doesn't exist
[Init Satallite IEH] Device on BitIdx:0x4 doesn't exist
[Init Satallite IEH] Device on BitIdx:0x5 doesn't exist
[Init Satallite IEH] Device on BitIdx:0x6 doesn't exist
[Init Satallite IEH] Device on BitIdx:0x7 doesn't exist
[Init Satallite IEH] Device on BitIdx:0x8 doesn't exist
[Init Satallite IEH] Device on BitIdx:0x9 doesn't exist
Clear IEH Global Error Status before enabling IEH error...
[Init Satallite IEH] S:0 B:0x0 D:0x0 F:0x4 End
[Init Satallite IEH] on BitIdx:0x4
[Init Satallite IEH] S:0 B:0x15 D:0x0 F:0x4
PSF PCIE Pi5 PCIE GEN4 DMI Pi5 PCIE GEN5 IAL Pi5 (CXL) [Init Satallite IEH] Device on BitIdx:0x2 doesn't exist
[Init Satallite IEH] Device on BitIdx:0x3 doesn't exist
[Init Satallite IEH] Device on BitIdx:0x4 doesn't exist
[Init Satallite IEH] Device on BitIdx:0x5 doesn't exist
[Init Satallite IEH] Device on BitIdx:0x6 doesn't exist
[Init Satallite IEH] Device on BitIdx:0x7 doesn't exist
[Init Satallite IEH] Device on BitIdx:0x8 doesn't exist
[Init Satallite IEH] Device on BitIdx:0x9 doesn't exist
Clear IEH Global Error Status before enabling IEH error...
[Init Satallite IEH] S:0 B:0x15 D:0x0 F:0x4 End
[Init Satallite IEH] on BitIdx:0x5
[Init Satallite IEH] S:0 B:0x6F D:0x0 F:0x4
PSF Dino PSF HCx Clear IEH Global Error Status before enabling IEH error...
[Init Satallite IEH] S:0 B:0x6F D:0x0 F:0x4 End
[Init Satallite IEH] on BitIdx:0x7
[Init Satallite IEH] S:0 B:0x59 D:0x0 F:0x4
PSF PCIE Pi5 PCIE GEN4 DMI Pi5 PCIE GEN5 IAL Pi5 (CXL) [Init Satallite IEH] Device on BitIdx:0x2 doesn't exist
[Init Satallite IEH] Device on BitIdx:0x3 doesn't exist
[Init Satallite IEH] Device on BitIdx:0x4 doesn't exist
[Init Satallite IEH] Device on BitIdx:0x5 doesn't exist
[Init Satallite IEH] Device on BitIdx:0x6 doesn't exist
[Init Satallite IEH] Device on BitIdx:0x7 doesn't exist
[Init Satallite IEH] Device on BitIdx:0x8 doesn't exist
[Init Satallite IEH] Device on BitIdx:0x9 doesn't exist
Clear IEH Global Error Status before enabling IEH error...
[Init Satallite IEH] S:0 B:0x59 D:0x0 F:0x4 End
[Init Satallite IEH] on BitIdx:0x8
[Init Satallite IEH] S:0 B:0x74 D:0x0 F:0x4
PSF Dino PSF HCx Clear IEH Global Error Status before enabling IEH error...
[Init Satallite IEH] S:0 B:0x74 D:0x0 F:0x4 End
[Init Satallite IEH] on BitIdx:0x9
[Init Satallite IEH] S:0 B:0x37 D:0x0 F:0x4
PSF PCIE Pi5 PCIE GEN4 DMI Pi5 PCIE GEN5 IAL Pi5 (CXL) [Init Satallite IEH] Device on BitIdx:0x2 doesn't exist
[Init Satallite IEH] Device on BitIdx:0x3 doesn't exist
[Init Satallite IEH] Device on BitIdx:0x4 doesn't exist
[Init Satallite IEH] Device on BitIdx:0x5 doesn't exist
[Init Satallite IEH] Device on BitIdx:0x6 doesn't exist
[Init Satallite IEH] Device on BitIdx:0x7 doesn't exist
[Init Satallite IEH] Device on BitIdx:0x8 doesn't exist
[Init Satallite IEH] Device on BitIdx:0x9 doesn't exist
Clear IEH Global Error Status before enabling IEH error...
[Init Satallite IEH] S:0 B:0x37 D:0x0 F:0x4 End
[Init Satallite IEH] on BitIdx:0xA
[Init Satallite IEH] S:0 B:0x26 D:0x0 F:0x4
PSF PCIE Pi5 PCIE GEN4 DMI Pi5 PCIE GEN5 IAL Pi5 (CXL) [Init Satallite IEH] Device on BitIdx:0x2 doesn't exist
[Init Satallite IEH] Device on BitIdx:0x3 doesn't exist
[Init Satallite IEH] Device on BitIdx:0x4 doesn't exist
[Init Satallite IEH] Device on BitIdx:0x5 doesn't exist
[Init Satallite IEH] Device on BitIdx:0x6 doesn't exist
[Init Satallite IEH] Device on BitIdx:0x7 doesn't exist
[Init Satallite IEH] Device on BitIdx:0x8 doesn't exist
[Init Satallite IEH] Device on BitIdx:0x9 doesn't exist
Clear IEH Global Error Status before enabling IEH error...
[Init Satallite IEH] S:0 B:0x26 D:0x0 F:0x4 End
[Init Satallite IEH] on BitIdx:0xB
[Init Satallite IEH] S:0 B:0x79 D:0x0 F:0x4
PSF Dino PSF HCx Clear IEH Global Error Status before enabling IEH error...
[Init Satallite IEH] S:0 B:0x79 D:0x0 F:0x4 End
[Init Satallite IEH] on BitIdx:0xD
[Init Satallite IEH] S:0 B:0x48 D:0x0 F:0x4
PSF PCIE Pi5 PCIE GEN4 DMI Pi5 PCIE GEN5 IAL Pi5 (CXL) [Init Satallite IEH] Device on BitIdx:0x2 doesn't exist
[Init Satallite IEH] Device on BitIdx:0x3 doesn't exist
[Init Satallite IEH] Device on BitIdx:0x4 doesn't exist
[Init Satallite IEH] Device on BitIdx:0x5 doesn't exist
[Init Satallite IEH] Device on BitIdx:0x6 doesn't exist
[Init Satallite IEH] Device on BitIdx:0x7 doesn't exist
[Init Satallite IEH] Device on BitIdx:0x8 doesn't exist
[Init Satallite IEH] Device on BitIdx:0x9 doesn't exist
Clear IEH Global Error Status before enabling IEH error...
[Init Satallite IEH] S:0 B:0x48 D:0x0 F:0x4 End
Clear IEH Global Error Status before enabling IEH errors
[IEH INIT] Init Socket:0x0 End
[IEH INIT] Init Socket:0x1
[Init Global IEH] on Skt:0x1
[Init Satallite IEH] on BitIdx:0x2
[Init Satallite IEH] S:1 B:0xE7 D:0x0 F:0x4
PSF Dino PSF HCx Clear IEH Global Error Status before enabling IEH error...
[Init Satallite IEH] S:1 B:0xE7 D:0x0 F:0x4 End
[Init Satallite IEH] on BitIdx:0x3
[Init Satallite IEH] S:1 B:0x80 D:0x0 F:0x4
PSF PCIE Pi5 PCIE GEN4 DMI Pi5 PCIE GEN5 IAL Pi5 (CXL) SPD I3C Bus SPD I3C Bus CXP SMBUS [Init Satallite IEH] Device on BitIdx:0x2 doesn't exist
[Init Satallite IEH] Device on BitIdx:0x3 doesn't exist
[Init Satallite IEH] Device on BitIdx:0x4 doesn't exist
[Init Satallite IEH] Device on BitIdx:0x5 doesn't exist
[Init Satallite IEH] Device on BitIdx:0x6 doesn't exist
[Init Satallite IEH] Device on BitIdx:0x7 doesn't exist
[Init Satallite IEH] Device on BitIdx:0x8 doesn't exist
[Init Satallite IEH] Device on BitIdx:0x9 doesn't exist
[Init Satallite IEH] Device on BitIdx:0xA doesn't exist
Clear IEH Global Error Status before enabling IEH error...
[Init Satallite IEH] S:1 B:0x80 D:0x0 F:0x4 End
[Init Satallite IEH] on BitIdx:0x4
[Init Satallite IEH] S:1 B:0x97 D:0x0 F:0x4
PSF PCIE Pi5 PCIE GEN4 DMI Pi5 PCIE GEN5 IAL Pi5 (CXL) [Init Satallite IEH] Device on BitIdx:0x2 doesn't exist
[Init Satallite IEH] Device on BitIdx:0x3 doesn't exist
[Init Satallite IEH] Device on BitIdx:0x4 doesn't exist
[Init Satallite IEH] Device on BitIdx:0x5 doesn't exist
[Init Satallite IEH] Device on BitIdx:0x6 doesn't exist
[Init Satallite IEH] Device on BitIdx:0x7 doesn't exist
[Init Satallite IEH] Device on BitIdx:0x8 doesn't exist
[Init Satallite IEH] Device on BitIdx:0x9 doesn't exist
Clear IEH Global Error Status before enabling IEH error...
[Init Satallite IEH] S:1 B:0x97 D:0x0 F:0x4 End
[Init Satallite IEH] on BitIdx:0x5
[Init Satallite IEH] S:1 B:0xEC D:0x0 F:0x4
PSF Dino PSF HCx Clear IEH Global Error Status before enabling IEH error...
[Init Satallite IEH] S:1 B:0xEC D:0x0 F:0x4 End
[Init Satallite IEH] on BitIdx:0x7
[Init Satallite IEH] S:1 B:0xD7 D:0x0 F:0x4
PSF PCIE Pi5 PCIE GEN4 DMI Pi5 PCIE GEN5 IAL Pi5 (CXL) [Init Satallite IEH] Device on BitIdx:0x2 doesn't exist
[Init Satallite IEH] Device on BitIdx:0x3 doesn't exist
[Init Satallite IEH] Device on BitIdx:0x4 doesn't exist
[Init Satallite IEH] Device on BitIdx:0x5 doesn't exist
[Init Satallite IEH] Device on BitIdx:0x6 doesn't exist
[Init Satallite IEH] Device on BitIdx:0x7 doesn't exist
[Init Satallite IEH] Device on BitIdx:0x8 doesn't exist
[Init Satallite IEH] Device on BitIdx:0x9 doesn't exist
Clear IEH Global Error Status before enabling IEH error...
[Init Satallite IEH] S:1 B:0xD7 D:0x0 F:0x4 End
[Init Satallite IEH] on BitIdx:0x8
[Init Satallite IEH] S:1 B:0xF1 D:0x0 F:0x4
PSF Dino PSF HCx Clear IEH Global Error Status before enabling IEH error...
[Init Satallite IEH] S:1 B:0xF1 D:0x0 F:0x4 End
[Init Satallite IEH] on BitIdx:0x9
[Init Satallite IEH] S:1 B:0xB7 D:0x0 F:0x4
PSF PCIE Pi5 PCIE GEN4 DMI Pi5 PCIE GEN5 IAL Pi5 (CXL) [Init Satallite IEH] Device on BitIdx:0x2 doesn't exist
[Init Satallite IEH] Device on BitIdx:0x3 doesn't exist
[Init Satallite IEH] Device on BitIdx:0x4 doesn't exist
[Init Satallite IEH] Device on BitIdx:0x5 doesn't exist
[Init Satallite IEH] Device on BitIdx:0x6 doesn't exist
[Init Satallite IEH] Device on BitIdx:0x7 doesn't exist
[Init Satallite IEH] Device on BitIdx:0x8 doesn't exist
[Init Satallite IEH] Device on BitIdx:0x9 doesn't exist
Clear IEH Global Error Status before enabling IEH error...
[Init Satallite IEH] S:1 B:0xB7 D:0x0 F:0x4 End
[Init Satallite IEH] on BitIdx:0xA
[Init Satallite IEH] S:1 B:0xA7 D:0x0 F:0x4
PSF PCIE Pi5 PCIE GEN4 DMI Pi5 PCIE GEN5 IAL Pi5 (CXL) [Init Satallite IEH] Device on BitIdx:0x2 doesn't exist
[Init Satallite IEH] Device on BitIdx:0x3 doesn't exist
[Init Satallite IEH] Device on BitIdx:0x4 doesn't exist
[Init Satallite IEH] Device on BitIdx:0x5 doesn't exist
[Init Satallite IEH] Device on BitIdx:0x6 doesn't exist
[Init Satallite IEH] Device on BitIdx:0x7 doesn't exist
[Init Satallite IEH] Device on BitIdx:0x8 doesn't exist
[Init Satallite IEH] Device on BitIdx:0x9 doesn't exist
Clear IEH Global Error Status before enabling IEH error...
[Init Satallite IEH] S:1 B:0xA7 D:0x0 F:0x4 End
[Init Satallite IEH] on BitIdx:0xB
[Init Satallite IEH] S:1 B:0xF6 D:0x0 F:0x4
PSF Dino PSF HCx Clear IEH Global Error Status before enabling IEH error...
[Init Satallite IEH] S:1 B:0xF6 D:0x0 F:0x4 End
[Init Satallite IEH] on BitIdx:0xD
[Init Satallite IEH] S:1 B:0xC7 D:0x0 F:0x4
PSF PCIE Pi5 PCIE GEN4 DMI Pi5 PCIE GEN5 IAL Pi5 (CXL) [Init Satallite IEH] Device on BitIdx:0x2 doesn't exist
[Init Satallite IEH] Device on BitIdx:0x3 doesn't exist
[Init Satallite IEH] Device on BitIdx:0x4 doesn't exist
[Init Satallite IEH] Device on BitIdx:0x5 doesn't exist
[Init Satallite IEH] Device on BitIdx:0x6 doesn't exist
[Init Satallite IEH] Device on BitIdx:0x7 doesn't exist
[Init Satallite IEH] Device on BitIdx:0x8 doesn't exist
[Init Satallite IEH] Device on BitIdx:0x9 doesn't exist
Clear IEH Global Error Status before enabling IEH error...
[Init Satallite IEH] S:1 B:0xC7 D:0x0 F:0x4 End
Clear IEH Global Error Status before enabling IEH errors
[IEH INIT] Init Socket:0x1 End
AddMicrocodeSmbiosTable: No valid Utility installed.
AddMicrocodeSmbiosTable: MicrocodeStagingRegion is 1.
AddMicrocodeSmbiosTable: UtilityStagingRegion is FFFF.
All AfterEndOfDxeEvent callbacks have returned successfully
PDB = c:\efi\servergen2\intel\Build\EagleStreamRpPkg\DEBUG_VS2015x86\X64\MdeModulePkg\Universal\Acpi\BootScriptExecutorDxe\BootScriptExecutorDxe\DEBUG\BootScriptExecutorDxe.pdb
[SIO] Current system SIO exist bit:10
IioSecureOnReadyToLock...
MSR_BIOS_DONE[0x151] 0x00000000 -> 0x00000003
PROGRESS CODE: V02010000 I0
PROGRESS CODE: V02010004 I0
PROGRESS CODE: V02010004 I0
PROGRESS CODE: V02010004 I0
[SGX] SgxAfterPlatformLocksCallback entry
[SGX] PrepareMcheckBiosParamInfo BEGIN
PopulateBiosParamInfoCreationPolicy: BiosParamInfoCreationPolicy = 0x0
Error: BiosParamInfoCreationPolicy is not initialized
[SGX] PrepareMcheckBiosParamInfo END
[SGX] UpdateRegistrationPackageInfo BEGIN
[SGX] UpdateRegistrationPackageInfo END
[SGX] StatusVariable: update ErrorCode from BIOS: 19
ExposeAllScenariosSgxRegistrationUefiVariables Enter
Expose variable [SgxRegistrationConfiguration]:
SetVariable: Success
ExposeToOsRuntime: 1
ReadOnlyOsRuntime: 0
ExposeAllScenariosSgxRegistrationUefiVariables: SgxRegistrationConfig->SgxRegServerInfo.Url = https://sbx.api.trustedservices.intel.com:443
RegistrationRequestType 0
Expose variable [SgxRegistrationServerRequest]:
SetVariable: Success
ExposeToOsRuntime: 1
ReadOnlyOsRuntime: 1
SgxRegistrationPackageInfo SHA256 sum:
[BB] [EC] [C9] [F0] [69] [34] [92] [3B] [63] [74] [71] [F4] [F7] [75] [C4] [BA] [B1] [BD] [29] [53] [56] [F9] [A1] [DE] [B7] [06] [65] [3B] [6D] [FF] [F7] [E7]
Expose variable [SgxRegistrationPackageInfo]:
SetVariable: Success
ExposeToOsRuntime: 0
ReadOnlyOsRuntime: 0
[SGX-DEBUG] Late PrintByteArrays SgxRegistrationStatus:
[01] [00] [03] [00] [02] [00] [19]
Expose variable [SgxRegistrationStatus]:
SetVariable: Success
ExposeToOsRuntime: 1
ReadOnlyOsRuntime: 0
Success to expose Registration Variables, exiting...
[SGX] SgxAfterPlatformLocksCallback exit: success
[SGX] DeallocateMcheckBiosParamInfo BEGIN
Verbose: BiosParamInfo already deallocated
[SGX] DeallocateMcheckBiosParamInfo END
PROGRESS CODE: V0300850B I0
PROGRESS CODE: V01050004 I0
PROGRESS CODE: V01050003 I0
PROGRESS CODE: V01050001 I0
PROGRESS CODE: V01040001 I0
PROGRESS CODE: V01050001 I0
PROGRESS CODE: V02020000 I0
PROGRESS CODE: V02020004 I0
PROGRESS CODE: V02020003 I0
TranslateBmpToGopBlt: BmpHeader->Char fields incorrect
PROGRESS CODE: V02020000 I0
PROGRESS CODE: V02020006 I0
PROGRESS CODE: V02010000 I0
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PDB = c:\efi\servergen2\intel\Build\EagleStreamRpPkg\DEBUG_VS2015x86\X64\ServerPlatformPkg\Features\Me\MeSps\Sps\PtuLoader\PtuLoader\DEBUG\PtuLoader.pdb
PROGRESS CODE: V03040002 I0
PROGRESS CODE: V03040003 I0
PDB = c:\efi\servergen2\intel\Build\EagleStreamRpPkg\DEBUG_VS2015x86\X64\ServerPlatformPkg\Features\Me\MeSps\Sps\Acpi\SpsAcpiHooks\DEBUG\SpsAcpiHooks.pdb
PROGRESS CODE: V03040002 I0
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PROGRESS CODE: V02010000 I0
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PROGRESS CODE: V01050004 I0
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PROGRESS CODE: V02020000 I0
Press [Enter] to directly boot.
Press [F2] to enter setup and select boot options.
Press [F7] to show boot menu options.
Copyright (c) 2006-2022, Intel Corporation.
S0 S3M_S3MFW_CFR_SVN_N0_S3M_TREG_REG : 00000000
S0 S3M_S3MFW_REVID_N0_S3M_TREG_REG : 00000000
S0 S3M_S3MFW_CFR_SVN_N1_S3M_TREG_REG : 00010001
S0 S3M_S3MFW_REVID_N1_S3M_TREG_REG : 0000001E
S0 S3M_PUCODE_CFR_SVN_N0_S3M_TREG_REG: 00000000
S0 S3M_PUCODE_REVID_N0_S3M_TREG_REG : 00000000
S0 S3M_PUCODE_CFR_SVN_N1_S3M_TREG_REG: 00010001
S0 S3M_PUCODE_REVID_N1_S3M_TREG_REG : 130000C0
S1 S3M_S3MFW_CFR_SVN_N0_S3M_TREG_REG : 00000000
S1 S3M_S3MFW_REVID_N0_S3M_TREG_REG : 00000000
S1 S3M_S3MFW_CFR_SVN_N1_S3M_TREG_REG : 00010001
S1 S3M_S3MFW_REVID_N1_S3M_TREG_REG : 0000001E
S1 S3M_PUCODE_CFR_SVN_N0_S3M_TREG_REG: 00000000
S1 S3M_PUCODE_REVID_N0_S3M_TREG_REG : 00000000
S1 S3M_PUCODE_CFR_SVN_N1_S3M_TREG_REG: 00010001
S1 S3M_PUCODE_REVID_N1_S3M_TREG_REG : 130000C0
SocketIioConfigPtr->IioHcxType 0.0= 0
SocketIioConfigPtr->IioHcxType 0.1= 0
SocketIioConfigPtr->IioHcxType 0.2= 0
SocketIioConfigPtr->IioHcxType 0.3= 0
SocketIioConfigPtr->IioHcxType 0.4= 0
SocketIioConfigPtr->IioHcxType 0.5= 0
SocketIioConfigPtr->IioHcxType 0.6= 0
SocketIioConfigPtr->IioHcxType 0.7= 0
SocketIioConfigPtr->IioHcxType 0.8= 0
SocketIioConfigPtr->IioHcxType 0.9= 0
SocketIioConfigPtr->IioHcxType 0.A= 0
SocketIioConfigPtr->IioHcxType 0.B= 0
SocketIioConfigPtr->IioHcxType 1.0= 0
SocketIioConfigPtr->IioHcxType 1.1= 0
SocketIioConfigPtr->IioHcxType 1.2= 0
SocketIioConfigPtr->IioHcxType 1.3= 0
SocketIioConfigPtr->IioHcxType 1.4= 0
SocketIioConfigPtr->IioHcxType 1.5= 0
SocketIioConfigPtr->IioHcxType 1.6= 0
SocketIioConfigPtr->IioHcxType 1.7= 0
SocketIioConfigPtr->IioHcxType 1.8= 0
SocketIioConfigPtr->IioHcxType 1.9= 0
SocketIioConfigPtr->IioHcxType 1.A= 0
SocketIioConfigPtr->IioHcxType 1.B= 0
SocketIioConfigPtr->IioHcxType 2.0= 0
SocketIioConfigPtr->IioHcxType 2.1= 0
SocketIioConfigPtr->IioHcxType 2.2= 0
SocketIioConfigPtr->IioHcxType 2.3= 0
SocketIioConfigPtr->IioHcxType 2.4= 0
SocketIioConfigPtr->IioHcxType 2.5= 0
SocketIioConfigPtr->IioHcxType 2.6= 0
SocketIioConfigPtr->IioHcxType 2.7= 0
SocketIioConfigPtr->IioHcxType 2.8= 0
SocketIioConfigPtr->IioHcxType 2.9= 0
SocketIioConfigPtr->IioHcxType 2.A= 0
SocketIioConfigPtr->IioHcxType 2.B= 0
SocketIioConfigPtr->IioHcxType 3.0= 0
SocketIioConfigPtr->IioHcxType 3.1= 0
SocketIioConfigPtr->IioHcxType 3.2= 0
SocketIioConfigPtr->IioHcxType 3.3= 0
SocketIioConfigPtr->IioHcxType 3.4= 0
SocketIioConfigPtr->IioHcxType 3.5= 0
SocketIioConfigPtr->IioHcxType 3.6= 0
SocketIioConfigPtr->IioHcxType 3.7= 0
SocketIioConfigPtr->IioHcxType 3.8= 0
SocketIioConfigPtr->IioHcxType 3.9= 0
SocketIioConfigPtr->IioHcxType 3.A= 0
SocketIioConfigPtr->IioHcxType 3.B= 0
PROGRESS CODE: V03051007 I0
DebugModeIndicator = 1
InitData -> Protocol not found
CheckpointSend 0x09? No
-> Ready To Boot: Pause Resume Complete = 0x00 0x00 0x00
[HECI Transport-1 DXE] Send pkt: 80040007
00: FF 0C 00 00
[HECI Transport-1 DXE] Got pkt: 80080007
00: FF 8C 00 00 00 00 00 00
IioSecureOnOnReadyToBoot...
IOAT_INIT_READY_TO_BOOT_START
IOAT_INIT_READY_TO_BOOT_END
IOAT_INIT_READY_TO_BOOT_START
IOAT_INIT_READY_TO_BOOT_END
SmmInstallProtocolInterface: 6E057ECF-FA99-4F39-95BC-59F9921D17E4 0
[HECI Transport-1 DXE] Send pkt: 80040007
00: FF 02 00 00
[HECI Transport-1 DXE] Got pkt: 80140007
00: FF 82 00 00 00 00 06 18 - 00 01 03 00 00 00 06 18
10: 00 01 03 00
TPM Location configured (expected values: dTPM = 0x5 = 0x5
Value at TPM Base Address (0xFED40000) = 0xA1
HierarchyChangeAuth: Response Code error! 0x000009A2
PROGRESS CODE: V03051001 I0
PROGRESS CODE: V03058000 I0
PDB = bootmgfw.pdb
PROGRESS CODE: V03058001 I0
Windows Boot Manager Choose an operating system to start, or press TAB to select a tool: (Use the arrow keys to highlight your choice, then press ENTER.) Windows Server To specify an advanced option for this choice, press F8. Seconds until the highlighted choice will be started automatically: Tools: Windows Memory Diagnostic ENTER=Choose TAB=Menu ESC=Cancel Windows Server> To specify an advanced option for this choice, press F8. 5 PROGRESS CODE: V01040001 I0
PROGRESS CODE: V01050001 I0
PROGRESS CODE: V01010001 I0
PROGRESS CODE: V01011000 I0
PDB = bootmgfw.pdb
PROGRESS CODE: V03058000 I0
PDB = c:\efi\servergen2\intel\Build\EagleStreamRpPkg\DEBUG_VS2015x86\X64\ServerPlatformPkg\Applications\UiApp\UiApp\DEBUG\UiApp.pdb
PROGRESS CODE: V03058001 I0
PROGRESS CODE: V03050007 I0
[ME] MeOnEnterSetup() called
[HECI] Set MeType in MeOnEnterSetup (MeType is ME_TYPE_SPS)
[HECI Transport-1 DXE] Send pkt: 804D0007
00: 0A 02 00 00 2F 68 6F 6D - 65 2F 68 6F 74 68 61 6D
10: 2F 64 62 67 5F 64 61 6D - 5F 72 65 71 00 00 00 00
20: 00 00 00 00 00 00 00 00 - 00 00 00 00 00 00 00 00
30: 00 00 00 00 00 00 00 00 - 00 00 00 00 00 00 00 00
40: 00 00 00 00 00 00 00 00 - 01 00 00 00 00
[HECI Transport-1 DXE] Got pkt: 80090007
00: 0A 82 00 00 01 00 00 00 - 01
PROGRESS CODE: V03050006 I0
EAGLESTREAMGenuine Intel(R) CPU 0000%@1.70 GHzEGSDCRB1.ZHI.0091.D15.2211010801262144 MB RAMCopyright (c) 2006-2022, Intel Corporation >EDKII Menu >Boot Manager Menu >Boot Maintenance Manager Continue Reset ^v=Move Highlight <Enter>=Select Entry This selection will take you to the EDKII_MENU >EDKII Menu >Boot Manager Menu >Boot Maintenance Manager Continue Reset ^v=Move Highlight <Enter>=Select Entry This selection will take you to the EDKII_MENU This selection will take you to the EDKII_MENU This selection will take you to the EDKII_MENU This selection will take you to the EDKII_MENU This selection will take you to the EDKII_MENU >EDKII Menu >Boot Manager Menu >Boot Maintenance Manager Continue Reset ^v=Move Highlight <Enter>=Select Entry This selection will take you to the EDKII_MENU This selection will take you to the EDKII_MENU This selection will take you to the EDKII_MENU This selection will take you to the EDKII_MENU This selection will take you to the EDKII_MENU >EDKII Menu >Boot Manager Menu >Boot Maintenance Manager Continue Reset ^v=Move Highlight <Enter>=Select Entry This selection will take you to the EDKII_MENU This selection will take you to the EDKII_MENU This selection will take you to the EDKII_MENU This selection will take you to the EDKII_MENU This selection will take you to the EDKII_MENU >EDKII Menu >Boot Manager Menu >Boot Maintenance Manager Continue Reset ^v=Move Highlight <Enter>=Select Entry This selection will take you to the EDKII_MENU This selection will take you to the EDKII_MENU This selection will take you to the EDKII_MENU This selection will take you to the EDKII_MENU This selection will take you to the EDKII_MENU >EDKII Menu >Boot Manager Menu >Boot Maintenance Manager Continue Reset ^v=Move Highlight <Enter>=Select Entry This selection will take you to the EDKII_MENU This selection will take you to the EDKII_MENU This selection will take you to the EDKII_MENU This selection will take you to the EDKII_MENU This selection will take you to the EDKII_MENU >EDKII Menu >Boot Manager Menu >Boot Maintenance Manager Continue Reset ^v=Move Highlight <Enter>=Select Entry This selection will take you to the EDKII_MENU This selection will take you to the EDKII_MENU This selection will take you to the EDKII_MENU This selection will take you to the EDKII_MENU This selection will take you to the EDKII_MENU >EDKII Menu >Boot Manager Menu >Boot Maintenance Manager Continue Reset ^v=Move Highlight <Enter>=Select Entry This selection will take you to the EDKII_MENU This selection will take you to the EDKII_MENU This selection will take you to the EDKII_MENU This selection will take you to the EDKII_MENU This selection will take you to the EDKII_MENU >EDKII Menu >Boot Manager Menu >Boot Maintenance Manager Continue Reset ^v=Move Highlight <Enter>=Select Entry This selection will take you to the EDKII_MENU This selection will take you to the EDKII_MENU This selection will take you to the EDKII_MENU This selection will take you to the EDKII_MENU This selection will take you to the EDKII_MENU >EDKII Menu >Boot Manager Menu >Boot Maintenance Manager Continue Reset ^v=Move Highlight <Enter>=Select Entry This selection will take you to the EDKII_MENU This selection will take you to the EDKII_MENU This selection will take you to the EDKII_MENU This selection will take you to the EDKII_MENU This selection will take you to the EDKII_MENU >EDKII Menu >Boot Manager Menu >Boot Maintenance Manager Continue Reset ^v=Move Highlight <Enter>=Select Entry This selection will take you to the EDKII_MENU This selection will take you to the EDKII_MENU This selection will take you to the EDKII_MENU This selection will take you to the EDKII_MENU This selection will take you to the EDKII_MENU >EDKII Menu ^v=Move Highlight <Enter>=Select Entry >Boot Manager Menu This selection will take you to the Boot Manager PROGRESS CODE: V02020000 I0
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PROGRESS CODE: V02010004 I0
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PROGRESS CODE: V02020000 I0
PROGRESS CODE: V02080000 I0
PROGRESS CODE: V02080003 I0
PROGRESS CODE: V02070000 I0
PROGRESS CODE: V02070003 I0
PROGRESS CODE: V01050004 I0
PROGRESS CODE: V01050004 I0
PROGRESS CODE: V01050004 I0
PROGRESS CODE: V01050004 I0
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PROGRESS CODE: V02020000 I0
/------------------------------------------------------------------------------\|| Boot Manager Menu \------------------------------------------------------------------------------//------------------------------------------------------------------------------\||||\------------------------------------------------------------------------------/Copyright (c) 2006-2022, Intel Corporation Boot Manager Menu UEFI WDC WD1005VBYZ-02RRWB2 WD-WMC6N0K69VYL UEFI Kingston DataTraveler 3.0 E0D55E62C78DF4C0D8A414B9 UEFI Internal Shell Use the <^> and <v> keys to choose a boot option, the <Enter> key to select a boot option, and the <Esc> key to exit the Boot Manager Menu. Esc=Exit ^v=Move Highlight <Enter>=Select Entry Device Path : PciRoot(0x0)/Pci(0x17, 0x0)/Sata(0x0,0xFFFF,0 x0) UEFI WDC WD1005VBYZ-02RRWB2 WD-WMC6N0K69VYL Esc=Exit ^v=Move Highlight <Enter>=Select Entry UEFI Kingston DataTraveler 3.0 E0D55E62C78DF4C0D8A414B9 Device Path : PciRoot(0x0)/Pci(0x14, 0x0)/USB(0x5,0x0) UEFI Kingston DataTraveler 3.0 E0D55E62C78DF4C0D8A414B9 Esc=Exit ^v=Move Highlight <Enter>=Select Entry UEFI Internal Shell Device Path : Fv(CDBB7B35-6833-4ED6- 9AB2-57D2ACDDF6F0)/FvF ile(7C04A583-9E3E-4F1C -AD65-E05268D0B4D1) IioSecureOnOnReadyToBoot...
PROGRESS CODE: V03051001 I0
PROGRESS CODE: V03058000 I0
PDB = c:\efi\servergen2\intel\Build\EagleStreamRpPkg\DEBUG_VS2015x86\X64\ShellPkg\Application\Shell\Shell\DEBUG\Shell.pdb
PROGRESS CODE: V03058001 I0
UEFI Interactive Shell v2.2
EDK II
UEFI v2.70 (EDK II, 0x00010000)
Mapping table
FS0: Alias(s):HD0f0b:;BLK1:
PciRoot(0x0)/Pci(0x14,0x0)/USB(0x5,0x0)/HD(1,MBR,0x2EBE6405,0x3F,0x39A2C81)
FS1: Alias(s):HD1a65535a2:;BLK4:
PciRoot(0x0)/Pci(0x17,0x0)/Sata(0x0,0xFFFF,0x0)/HD(2,GPT,901ED09D-0CC1-4B78-A258-58391A5D6567,0xDC800,0x82000)
BLK0: Alias(s):
PciRoot(0x0)/Pci(0x14,0x0)/USB(0x5,0x0)
BLK2: Alias(s):
PciRoot(0x0)/Pci(0x17,0x0)/Sata(0x0,0xFFFF,0x0)
BLK3: Alias(s):
PciRoot(0x0)/Pci(0x17,0x0)/Sata(0x0,0xFFFF,0x0)/HD(1,GPT,07AE39FD-788D-490A-B7F2-D61CC80B130F,0x800,0xDC000)
BLK5: Alias(s):
PciRoot(0x0)/Pci(0x17,0x0)/Sata(0x0,0xFFFF,0x0)/HD(3,GPT,83E10836-37FC-4554-9CC3-71A59B1794AB,0x15E800,0x40000)
BLK6: Alias(s):
PciRoot(0x0)/Pci(0x17,0x0)/Sata(0x0,0xFFFF,0x0)/HD(4,GPT,9A20A927-C8F3-4053-9E5E-2807F07E38FD,0x19E800,0x1BD85800)
Press ESC in 5 seconds to skip startup.nsh or any other key to continue.Press ESC in 4 seconds to skip startup.nsh or any other key to continue.
Shell> fs0:
FS0:\> ls
Directory of: FS0:\
01/01/1998 00:30 <DIR> 16,384 efi
06/10/2022 12:05 287,776 XmlCliKnobs.efi
11/01/2022 13:34 <DIR> 16,384 zhihao
1 File(s) 287,776 bytes
2 Dir(s)
FS0:\> cd zzhihao
FS0:\zhihao\> teTestAppLib.efi.efi .efi .efi EEGSDCRB1.ZHI.0091.D15.2211010626_Pa0320_SPR_EBG_SPS.bin
PDB = c:\efi\servergen2\intel\Build\EagleStreamRpPkg\DEBUG_VS2015x86\X64\EagleStreamRpPkg\Applications\TestApp\TestApp\DEBUG\TestApp.pdb
In CryptParallelhash
Dump data from 651EB298, size: 0x100
651EB298: 01 01 01 01 01 01 01 01 01 01 01 01 01 01 01 01 | ................
651EB2A8: 01 01 01 01 01 01 01 01 01 01 01 01 01 01 01 01 | ................
651EB2B8: 01 01 01 01 01 01 01 01 01 01 01 01 01 01 01 01 | ................
651EB2C8: 01 01 01 01 01 01 01 01 01 01 01 01 01 01 01 01 | ................
651EB2D8: 01 01 01 01 01 01 01 01 01 01 01 01 01 01 01 01 | ................
651EB2E8: 01 01 01 01 01 01 01 01 01 01 01 01 01 01 01 01 | ................
651EB2F8: 01 01 01 01 01 01 01 01 01 01 01 01 01 01 01 01 | ................
651EB308: 01 01 01 01 01 01 01 01 01 01 01 01 01 01 01 01 | ................
651EB318: 01 01 01 01 01 01 01 01 01 01 01 01 01 01 01 01 | ................
651EB328: 01 01 01 01 01 01 01 01 01 01 01 01 01 01 01 01 | ................
651EB338: 01 01 01 01 01 01 01 01 01 01 01 01 01 01 01 01 | ................
651EB348: 01 01 01 01 01 01 01 01 01 01 01 01 01 01 01 01 | ................
651EB358: 01 01 01 01 01 01 01 01 01 01 01 01 01 01 01 01 | ................
651EB368: 01 01 01 01 01 01 01 01 01 01 01 01 01 01 01 01 | ................
651EB378: 01 01 01 01 01 01 01 01 01 01 01 01 01 01 01 01 | ................
651EB388: 01 01 01 01 01 01 01 01 01 01 01 01 01 01 01 01 | ................
Dump data from 651EB298, size: 0x100
651EB298: 01 01 01 01 01 01 01 01 01 01 01 01 01 01 01 01 | ................
651EB2A8: 01 01 01 01 01 01 01 01 01 01 01 01 01 01 01 01 | ................
651EB2B8: 01 01 01 01 01 01 01 01 01 01 01 01 01 01 01 01 | ................
651EB2C8: 01 01 01 01 01 01 01 01 01 01 01 01 01 01 01 01 | ................
651EB2D8: 01 01 01 01 01 01 01 01 01 01 01 01 01 01 01 01 | ................
651EB2E8: 01 01 01 01 01 01 01 01 01 01 01 01 01 01 01 01 | ................
651EB2F8: 01 01 01 01 01 01 01 01 01 01 01 01 01 01 01 01 | ................
651EB308: 01 01 01 01 01 01 01 01 01 01 01 01 01 01 01 01 | ................
651EB318: 01 01 01 01 01 01 01 01 01 01 01 01 01 01 01 01 | ................
651EB328: 01 01 01 01 01 01 01 01 01 01 01 01 01 01 01 01 | ................
651EB338: 01 01 01 01 01 01 01 01 01 01 01 01 01 01 01 01 | ................
651EB348: 01 01 01 01 01 01 01 01 01 01 01 01 01 01 01 01 | ................
651EB358: 01 01 01 01 01 01 01 01 01 01 01 01 01 01 01 01 | ................
651EB368: 01 01 01 01 01 01 01 01 01 01 01 01 01 01 01 01 | ................
651EB378: 01 01 01 01 01 01 01 01 01 01 01 01 01 01 01 01 | ................
651EB388: 01 01 01 01 01 01 01 01 01 01 01 01 01 01 01 01 | ................
Return in function 6,retrunvalue=1
Performance test = 267639191
In CryptParallelhash
Dump data from 651EC018, size: 0x3
651EC018: 01 01 01 | ...
Dump data from 651EC018, size: 0x3
651EC018: 01 01 01 | ...
Return in function 6,retrunvalue=1
Accuracy test = 0
PDB = c:\efi\servergen2\intel\Build\EagleStreamRpPkg\DEBUG_VS2015x86\X64\EagleStreamRpPkg\Applications\TestApp\TestApp\DEBUG\TestApp.pdb
FS0:\zhihao\> ÿPROGRESS CODE: V03020003 I0
PROGRESS CODE: V03020002 I0
PROGRESS CODE: V03020003 I0
PROGRESS CODE: V03020002 I0
PROGRESS CODE: V03020003 I0
PROGRESS CODE: V03020002 I0
PROGRESS CODE: V03020003 I0
PROGRESS CODE: V03020002 I0
[IPMI PEI] BMC Device ID: 0x23, firmware version: 2.03 UpdateMode:1
[IPMI] BMC in Forced Update mode, skip waiting for BMC_READY.
PROGRESS CODE: V03020003 I0
PROGRESS CODE: V03020002 I0
PROGRESS CODE: V03020003 I0
PROGRESS CODE: V03020002 I0
InstallHeciTransportPpis, start
InstallHeciTransportPpis, end
[HECI CONTROL PEI] HECI Transport found: 2
[HECI Control-1 PEI]: ERROR: HeciControlSendAndReceiveSinglePch() : Heci 1 is not initialized
HECI: ME type not recognized (MEFS1: 0x00000355, MEFS2: 0x80504006)
Initialization is allowed
[HECI Transport-1 PEI] Send pkt: 80040007
00: F0 11 00 00
[HECI Transport-1 PEI] Got pkt: 80080007
00: F0 91 00 00 09 00 00 00
HECI: Create MeType HOB for ME: 1
HECI: Set MeType HOB info to: 1
[HECI] [ME] (MeType is ME_TYPE_SPS)
Initialization is allowed
PROGRESS CODE: V03020003 I0
PROGRESS CODE: V03020002 I0
PROGRESS CODE: V03020003 I0
PROGRESS CODE: V03020002 I0
IioVmdDisableForPchRpInit: DonePCH Series : EBG PCH
PCH Stepping : B0
PROGRESS CODE: V03020003 I0
PROGRESS CODE: V03020002 I0
PROGRESS CODE: V03020003 I0
PROGRESS CODE: V03020002 I0
PROGRESS CODE: V03020003 I0
PROGRESS CODE: V03020002 I0
UbaInitPeim: PlatformType=0x16
UbaInitPeim: PlatformType=0x16
UbaInitPeim: PlatformType=0x16
UbaInitPeim: PlatformType=0x16
PROGRESS CODE: V03020003 I0
PROGRESS CODE: V03020002 I0
PROGRESS CODE: V03020003 I0
PROGRESS CODE: V03020002 I0
UBA:GpioTable size 0x9CC, blocks: 0xD1.
UBA: Start ConfigureGpio().
UBA: ConfigureGpio() end.
Unable to read FlashSecOvrdVal
FiaMuxRecordsCount = 0
[HECI] PeiMeServerPolicy (MeType is ME_TYPE_SPS)
Can't finde more CFR image in CFR FV - Not Found!
PPR Variable not found or CRC mismatch - Status: 0x8000000E, Crc: 0x0, calc. Crc: 0x0!
UpdatePeiSecurityPolicy: Create Status=Success
FIT not found, skip LT-SX
Platform Type = 22
Bios ID: EGSDCRB1.ZHI.0091.D15.2211010825
PROGRESS CODE: V03020003 I0
[HECI Transport-1 PEI] Send pkt: 80010020
00: 01
[HECI Transport-1 PEI] Got pkt: 800B0020
00: 81 01 01 14 00 88 00 01 - 00 00 00
[HECI Transport-1 PEI] Send pkt: 80300008
00: 00 00 05 00 1A 00 00 00 - 00 00 00 00 1C 00 00 00
10: 00 00 00 00 00 00 00 00 - 00 00 00 00 00 00 00 00
20: 00 00 00 00 00 00 00 00 - 00 00 00 00 00 00 00 00
[HECI Transport-1 PEI] Got pkt: 80300008
00: 00 00 05 00 1A 00 00 00 - 00 00 00 00 1C 00 00 00
10: 00 00 00 00 00 00 00 02 - 00 00 00 00 00 00 00 00
20: 00 00 00 00 00 00 00 00 - 00 00 00 00 00 00 00 00
Fail to Configure PSYS_CRIT
PROGRESS CODE: V03020002 I0
PROGRESS CODE: V03020003 I0
PROGRESS CODE: V03020002 I0
PROGRESS CODE: V03020003 I0
PROGRESS CODE: V03020002 I0
PROGRESS CODE: V03020003 I0
PROGRESS CODE: V03020002 I0
PROGRESS CODE: V03020003 I0
PROGRESS CODE: V03020002 I0
LtStatusRegister[0xFED30000] = 0x0000000000000003
LtExtendedStatusError[0xFED30008] = 0x0000000000000000
BootGuardBootStatus[0xFED300A0] = 0x0000000000000000
BootGuardAcmError[0xFED30328] = 0x0000000000000000
BootGuardLtExists[0xFED30010] = 0x0000000000000000
BootGuardLtCrash[0xFED30030] = 0x0000000000000000
MSR_DEBUG_INTERFACE[0x00000C80] = 0x0000000080000001
MSR_BOOT_GUARD_SACM_INFO[0x0000013A] = 0x0000000C00000000
AcmPolicyStatus = 0x0, IsTxtFailedWithScrtm 0
None of BtG/TXT is enabled or TXT failed with scrtm.
PROGRESS CODE: V03020003 I0
PROGRESS CODE: V03020002 I0
PROGRESS CODE: V03020003 I0
PROGRESS CODE: V03020002 I0
InitializeDefaultData()
[Enter] Initialize Reference Code Policy!
>>> Print the default settings of Reference Code Policy! Begin >>>
ReferenceCodePolicyPtr->NumaEn = 1
ReferenceCodePolicyPtr->UmaBasedClustering = 0
<<< Print the default settings of Reference Code Policy! End <<<
[Exit] Initialize Reference Code Policy!
SBSP socket = 0
InitializePlatformData()
InstallPpi MrcHooksServicesPpiDesc Status = 00000000
CacheMrcHooksServicesPpi in HOST: Host->MrcHooksServicesPpi = FFEA57C0
InstallPpi MrcHooksChipServicesPpiDesc Status = 00000000
CacheMrcChipHooksServicesPpi in HOST: Host->MrcHooksChipServicesPpi = FFEA5820
PROGRESS CODE: V030F100B I0
LoadNvramData: LoadSysInfoNvram failed, Status = Not Found
[HECI Transport-1 PEI] Send pkt: 80100007
00: F0 0C 00 00 DF FF FF FF - FF FF FF FF 00 00 00 00
[HECI Transport-1 PEI] Got pkt: 80100007
00: F0 8C 00 00 00 00 00 00 - 00 00 00 00 00 00 00 00
MeUmaConfigureRequestedSegmentSize: Exiting (Status = Success)
GetEmulationMemFlows: Simics $mrc value = 0
memFlows = 0xFFFFFFFF, memFlowsExt = 0xFFBF7FFF, memFlowsExt2 = 0xBF9E1F7F, memFlowsExt3 = 0xFFFFFFFF
Emulation Value is: 0!
Running on hardware
SPR processor detected
Warning: Newer CPU Stepping 4 detected
RC Version: 1.1.1.01BC
sizeof sysHost = 363776
SsaLoader - Entry
SsaLoader - Exit
KTI Init starting...
******* KTI Setup Structure *******
Bus Ratio (per socket): S0: 1 S1: 1 S2: 1 S3: 1
D2KCreditConfig: 0 [1:Low,2:Med,3:High]
SnoopThrottleConfig: 0 [0:Dis,1:Low,2:Med,3:High,4:Auto]
LegacyVgaSoc: 0
LegacyVgaStack: 0
P2pRelaxedOrdering: 0
DebugPrintLevel: 15
DegradePrecedence: 0
Degrade4SPreference: 0 (4SFullyConnect)
KtiLinkSpeedMode: 1 (FAST)
DfxWarmResetEliminationEn: 0
KtiLinkSpeed: 127 (MAX_SUPPORTED)
KtiAdaptationEn: 2 (UNKNOWN)
KtiAdaptationSpeed: 127 (MAX_SUPPORTED)
KtiLinkL0pEn: 2 (AUTO)
KtiLinkL1En: 2 (AUTO)
KtiFailoverEn: 2 (AUTO)
KtiLbEn: 0
SncEn: 15 (AUTO)
IoDcMode: 1 (AUTO)
DirectoryModeEn: 2
XptPrefetchEn: 2
KtiPrefetchEn: 2
XptRemotePrefetchEn: 2
RdCurForXptPrefetchEn: 2
StaleAtoSOptEn: 2
LLCDeadLineAlloc: 1
OppoLLC2SfMigrationEn: 0 (MANUAL)
MbeBWCalChoice: 3 [0:Linear,1:Biased,2:Legacy,3:Auto]
PmmMbaBWDownscale: 0 [0:1x,1:1/2x,2:1/4x,3:1/8x]
CxlMbaBWDownscale: 0 [0:1x,1:1/2x,2:1/4x,3:1/8x]
RemoteTargetMbaBWDownscale 0 [0:1x,1:1/2x,2:1/4x,3:1/8x]
SplitLock: 0
DdrtQosMode: 0
ClockModulationEn: 2 (AUTO)
KtiFpgaEnable (per socket): S0: 2 S1: 2 S2: 2 S3: 2
StackDisableBitMap (per socket): S0: 0x0 S1: 0x0 S2: 0x0 S3: 0x0
KtiCrcMode: 0 (16BIT)
KtiCpuSktHotPlugEn: 0
KtiCpuSktHotPlugTopology: 0 (4S)
KtiSkuMismatchCheck: 1
MctpBusOwner: 0 (PCH SPS as Bus Owner (Proxy))
KtiPortDisable (per port):
S0:0 0 0 0
S1:0 0 0 0
S2:0 0 0 0
S3:0 0 0 0
KtiLinkVnaOverride (per port):
S0:254 254 254 254
S1:254 254 254 254
S2:254 254 254 254
S3:254 254 254 254
KtiLinkSpeed (per port):
S0:7 7 7 7
S1:7 7 7 7
S2:7 7 7 7
S3:7 7 7 7
Rsvd (per port):
S0:0 0 0 0
S1:0 0 0 0
S2:0 0 0 0
S3:0 0 0 0
**KTI Setup Structure DfxParms **
DfxHaltLinkFailReset: 2 (AUTO)
DfxKtiMaxInitAbort: 2 (AUTO)
DfxLlcShareDrdCrd 2 (AUTO)
DfxBiasFwdMode: 5 (AUTO)
DfxSnoopFanoutEn: 2 (AUTO)
DfxHitMeEn: 2 (AUTO)
DfxFrcfwdinv 2 (AUTO)
DfxDbpEnable 2 (AUTO)
DfxCleanEvictAlwaysLive: 2 (AUTO)
DfxModifiedEvictAlwaysLive: 2 (AUTO)
DfxOsbEn 2 (AUTO)
DfxHitMeRfoDirsEn 2 (AUTO)
DfxGateOsbIodcAllocEn 2 (AUTO)
DfxDualLinksInterleavingMode 2 (AUTO)
DfxSystemDegradeMode: 1
DfxVn1En: 2 (AUTO)
DfxD2cEn: 2 (AUTO)
DfxD2kEn: 2 (AUTO)
DfxLockPrimary: 4 (AUTO)
DfxOsbLocRd: 2 (AUTO)
DfxOsbLocRdCur: 2 (AUTO)
DfxOsbRmtRd: 2 (AUTO)
DfxM3KtiCountMismatchEn: 2 (AUTO)
DfxSnoopFanoutChaInterleaveEn: 2 (AUTO)
DfxXptFifoEnabledCredit: 0x5
DfxMdfisTrainingEn: 2 (AUTO)
DfxClippedFreq: 23
DfxLlpEndcntClipped: 650
DfxLlpEndcntNonClipped: 576
DfxCxlSecLvl: 3 (AUTO)
DfxCxlStcge: 2 (AUTO)
DfxCxlSdcge: 2 (AUTO)
DfxCxlDlcge: 2 (AUTO)
DfxCxlLtcge: 2 (AUTO)
DfxCxlVid: 2 (AUTO)
DfxIioDfxEnabled: 0 (MANUAL)
DfxHqmEn: 2 (AUTO)
DfxRsfEnabledForDram: 2 (AUTO)
DfxS3mSoftStrap: 2 (AUTO)
DfxPmonConfig: 3 (AUTO)
DfxM2IosfPmonAccessControl: 2 (AUTO)
DfxMaxCache: 256 (AUTO)
DfxMaxCacheAtomic: 256 (AUTO)
DfxCtagEntryAvailMask: 256 (AUTO)
DfxXptPrefetchEn: 2 (AUTO)
DfxPrqBlockEn: 2 (AUTO)
DfxAeg0CounterLowVal: 65535 (AUTO)
DfxAeg0CounterHighVal: 65535 (AUTO)
DfxCrcMode (per port):
S0:2 (AUTO) 2 (AUTO) 2 (AUTO) 2 (AUTO)
S1:2 (AUTO) 2 (AUTO) 2 (AUTO) 2 (AUTO)
S2:2 (AUTO) 2 (AUTO) 2 (AUTO) 2 (AUTO)
S3:2 (AUTO) 2 (AUTO) 2 (AUTO) 2 (AUTO)
DfxL0pEnable (per port):
S0:2 (AUTO) 2 (AUTO) 2 (AUTO) 2 (AUTO)
S1:2 (AUTO) 2 (AUTO) 2 (AUTO) 2 (AUTO)
S2:2 (AUTO) 2 (AUTO) 2 (AUTO) 2 (AUTO)
S3:2 (AUTO) 2 (AUTO) 2 (AUTO) 2 (AUTO)
DfxL1Enable (per port):
S0:2 (AUTO) 2 (AUTO) 2 (AUTO) 2 (AUTO)
S1:2 (AUTO) 2 (AUTO) 2 (AUTO) 2 (AUTO)
S2:2 (AUTO) 2 (AUTO) 2 (AUTO) 2 (AUTO)
S3:2 (AUTO) 2 (AUTO) 2 (AUTO) 2 (AUTO)
DfxKtiFailoverEn (per port):
S0:2 (AUTO) 2 (AUTO) 2 (AUTO) 2 (AUTO)
S1:2 (AUTO) 2 (AUTO) 2 (AUTO) 2 (AUTO)
S2:2 (AUTO) 2 (AUTO) 2 (AUTO) 2 (AUTO)
S3:2 (AUTO) 2 (AUTO) 2 (AUTO) 2 (AUTO)
**Common Setup Structure**
mmCfgBase: 6 (AUTO)
mmCfgSize: 6 (AUTO)
mmiohBase: 0x00002000
CpuPaLimit: 0
mmiohSize: 3 (64GB per stack)
numaEn: 1
UmaClustering: 4
isocEn: 0
dcaEn: 0
**Common Var Structure **
resetRequired: 0
state: 0
numCpus: 0
socketPresentBitMap: 0x01
mmCfgBase: 0x80000000
meRequestedSize: 0
******* Collecting Early System Information - START *******
SBSP Socket: 0 Ways: 0x01 Ras: 0x06 Stepping: 0x04 DieCount: 4 Chop: XCC
Total Chas: 52 Cha List Map:
Cha List[0]: 0xBFCFF9FF
Cha List[1]: 0x0FEBFBFF
Total M3Kti: 04 Total KtiAgent: 04 Total M2M: 20 M2M list map: 0x000FFFFF
Current bus numbers:
Socket | Ins00 | Ins01 | Ins02 | Ins03 | Ins04 | Ins05 | Ins06 | Ins07 | Ins08 | Ins09 | Ins0A | Ins0B | Rsvd | Ubox0 | Ubox1 | LastBus | Seg
-----------------------------------------------------------------------------------------------------------------------------------------------
0 | 0x00 | 0x11 | 0x12 | 0x13 | 0x14 | 0x15 | 0x16 | 0x17 | 0x18 | 0x19 | 0x1A | 0x1B | --- | 0x1E | 0x1F | 0x1F | 0
1 | 0x20 | 0x21 | 0x22 | 0x23 | 0x24 | 0x25 | 0x26 | 0x27 | 0x28 | 0x29 | 0x2A | 0x2B | --- | 0x3E | 0x3F | 0x3F | 0
2 | 0x40 | 0x41 | 0x42 | 0x43 | 0x44 | 0x45 | 0x46 | 0x47 | 0x48 | 0x49 | 0x4A | 0x4B | --- | 0x5E | 0x5F | 0x5F | 0
3 | 0x60 | 0x61 | 0x62 | 0x63 | 0x64 | 0x65 | 0x66 | 0x67 | 0x68 | 0x69 | 0x6A | 0x6B | --- | 0x7E | 0x7F | 0x7F | 0
-----------------------------------------------------------------------------------------------------------------------------------------------
Assuming maximal config: TotCpus: 4 CpuList: 0x0F
Default UpiInterleaveMode: 0
Reset Type: Cold Reset
******* Collecting Early System Information - END *******
(Spr) UpiIpWrInit
MaxSocket 4, MaxKtiPort 4
UpiIpWrSingleInit
IpUpiIpInit(UpiAgent[0][0]):
UpiIpWrSingleInit
IpUpiIpInit(UpiAgent[0][1]):
UpiIpWrSingleInit
IpUpiIpInit(UpiAgent[0][2]):
UpiIpWrSingleInit
IpUpiIpInit(UpiAgent[0][3]):
UpiIpWrSingleInit
IpUpiIpInit(UpiAgent[1][0]):
UpiIpWrSingleInit
IpUpiIpInit(UpiAgent[1][1]):
UpiIpWrSingleInit
IpUpiIpInit(UpiAgent[1][2]):
UpiIpWrSingleInit
IpUpiIpInit(UpiAgent[1][3]):
UpiIpWrSingleInit
IpUpiIpInit(UpiAgent[2][0]):
UpiIpWrSingleInit
IpUpiIpInit(UpiAgent[2][1]):
UpiIpWrSingleInit
IpUpiIpInit(UpiAgent[2][2]):
UpiIpWrSingleInit
IpUpiIpInit(UpiAgent[2][3]):
UpiIpWrSingleInit
IpUpiIpInit(UpiAgent[3][0]):
UpiIpWrSingleInit
IpUpiIpInit(UpiAgent[3][1]):
UpiIpWrSingleInit
IpUpiIpInit(UpiAgent[3][2]):
UpiIpWrSingleInit
IpUpiIpInit(UpiAgent[3][3]):
******* Setting up Minimum Path - START *******
Constructing SBSP minimum path Topology Tree
--------------------------------------------
Adding SBSP (CPU0) to the tree
CPU0 Link Exchange
: LEP0(0,CPU1) Socket 0 Port 0:Primary - Peer Socket 1 Port 0 Secondary
: LEP1(1,CPU1) Socket 0 Port 1:Primary - Peer Socket 1 Port 1 Secondary
: LEP2(2,CPU1) Socket 0 Port 2:Primary - Peer Socket 1 Port 2 Secondary
: LEP3(3,CPU1) Socket 0 Port 3:Primary - Peer Socket 1 Port 3 Secondary
Adding CPU1 to the tree
Setting path between SBSP and CPU1.
In SBSP setting route to CPU1 using port 0.
In CPU1 using port 0 to set the M2UPCIe0 route.
CPU1 Link Exchange
: LEP0(0,CPU0) : LEP1(1,CPU0) : LEP2(2,CPU0) : LEP3(3,CPU0)
Setting boot path for CPU1
In CPU1 setting Cbo route to port 0
Socket[2] is removed
Socket[3] is removed
SBSP Minimum Path Tree
----------------------
Index Socket ParentPort Hop ParentIndex
00 CPU0 -- 0 --
01 CPU1 00 1 00
******* Setting up Minimum Path - END *******
******* Check for KTI Topology Degradation - START *******
Link Exchange Parameter
-----------------------
CPU0 : LEP0(0:CPU1) : LEP1(1:CPU1) : LEP2(2:CPU1) : LEP3(3:CPU1)
CPU1 : LEP0(0:CPU0) : LEP1(1:CPU0) : LEP2(2:CPU0) : LEP3(3:CPU0)
Already Reduced to Supported Topology
System will be treated 2S4L Configuration
******* Check for KTI Topology Degradation - END *******
******* Enable UBOX MMIO Addr Range - START *******
Current Bars:
Socket | SCF | PCU | MEM0 | MEM1 | MEM2 | MEM3 | MEM4 | MEM5 | MEM6 | MEM7 | SBREG |
-------------------------------------------------------------------------------------------------------------------------------------------------------
0 | 0xF8000000 | 0xF8200000 | 0xF8280000 | 0xF8300000 | 0xF8380000 | 0xF8400000 | 0xF8480000 | 0xF8500000 | 0xF8580000 | 0xF8600000 | 0xF8680000 |
1 | 0xF8800000 | 0xF8A00000 | 0xF8A80000 | 0xF8B00000 | 0xF8B80000 | 0xF8C00000 | 0xF8C80000 | 0xF8D00000 | 0xF8D80000 | 0xF8E00000 | 0xF8E80000 |
2 | 0xF9000000 | 0xF9200000 | 0xF9280000 | 0xF9300000 | 0xF9380000 | 0xF9400000 | 0xF9480000 | 0xF9500000 | 0xF9580000 | 0xF9600000 | 0xF9680000 |
3 | 0xF9800000 | 0xF9A00000 | 0xF9A80000 | 0xF9B00000 | 0xF9B80000 | 0xF9C00000 | 0xF9C80000 | 0xF9D00000 | 0xF9D80000 | 0xF9E00000 | 0xF9E80000 |
-------------------------------------------------------------------------------------------------------------------------------------------------------
******* Enable UBOX MMIO Addr Range - END *******
******* Process Straps Config - START *******
S3M Read SoftStrap Disabled, Exit.
******* Process Straps Config - END *******
******* Detecting IIO count - START *******
Socket 0 Stack Bitmap:F3F.
Stack Instance Bitmap:F3F.
IioCount: 10.
B2HotCount(LS): 00.
Socket 1 Stack Bitmap:F3F.
Stack Instance Bitmap:F3F.
IioCount: 10.
B2HotCount(LS): 00.
******* Detecting IIO count - END *******
******* Disable UBOX MMIO Addr Range - START *******
Current Bars:
Socket | SCF | PCU | MEM0 | MEM1 | MEM2 | MEM3 | MEM4 | MEM5 | MEM6 | MEM7 | SBREG |
-------------------------------------------------------------------------------------------------------------------------------------------------------
0 | 0x00000000 | 0x00000000 | 0x00000000 | 0x00000000 | 0x00000000 | 0x00000000 | 0x00000000 | 0x00000000 | 0x00000000 | 0x00000000 | 0x00000000 |
1 | 0x00000000 | 0x00000000 | 0x00000000 | 0x00000000 | 0x00000000 | 0x00000000 | 0x00000000 | 0x00000000 | 0x00000000 | 0x00000000 | 0x00000000 |
2 | 0x00000000 | 0x00000000 | 0x00000000 | 0x00000000 | 0x00000000 | 0x00000000 | 0x00000000 | 0x00000000 | 0x00000000 | 0x00000000 | 0x00000000 |
3 | 0x00000000 | 0x00000000 | 0x00000000 | 0x00000000 | 0x00000000 | 0x00000000 | 0x00000000 | 0x00000000 | 0x00000000 | 0x00000000 | 0x00000000 |
-------------------------------------------------------------------------------------------------------------------------------------------------------
******* Disable UBOX MMIO Addr Range - END *******
******* Checking KTIRC Input Structure - START *******
Desired MMCFG Config: Base = 0x80000000, Size = 0x10000000
OutSncPrefetchEn=4, OutSncEn=4
IpUpiGetCapability(UpiAgent[0][0], id=12):
IpUpiVersionSpecificConfigurationEnabled: unknown ID=2
IpWrError 0 49
IpUpiGetCapability(UpiAgent[0][0], id=7):
IpUpiGetCapability(UpiAgent[0][0], id=9):
IpUpiGetCapability(UpiAgent[0][0], id=10):
IpUpiGetCapability(UpiAgent[0][0], id=8):
IpUpiGetCapability(UpiAgent[0][1], id=12):
IpUpiVersionSpecificConfigurationEnabled: unknown ID=2
IpWrError 0 49
IpUpiGetCapability(UpiAgent[0][1], id=7):
IpUpiGetCapability(UpiAgent[0][1], id=9):
IpUpiGetCapability(UpiAgent[0][1], id=10):
IpUpiGetCapability(UpiAgent[0][1], id=8):
IpUpiGetCapability(UpiAgent[0][2], id=12):
IpUpiVersionSpecificConfigurationEnabled: unknown ID=2
IpWrError 0 49
IpUpiGetCapability(UpiAgent[0][2], id=7):
IpUpiGetCapability(UpiAgent[0][2], id=9):
IpUpiGetCapability(UpiAgent[0][2], id=10):
IpUpiGetCapability(UpiAgent[0][2], id=8):
IpUpiGetCapability(UpiAgent[0][3], id=12):
IpUpiVersionSpecificConfigurationEnabled: unknown ID=2
IpWrError 0 49
IpUpiGetCapability(UpiAgent[0][3], id=7):
IpUpiGetCapability(UpiAgent[0][3], id=9):
IpUpiGetCapability(UpiAgent[0][3], id=10):
IpUpiGetCapability(UpiAgent[0][3], id=8):
IpUpiGetCapability(UpiAgent[1][0], id=12):
IpUpiVersionSpecificConfigurationEnabled: unknown ID=2
IpWrError 0 49
IpUpiGetCapability(UpiAgent[1][0], id=7):
IpUpiGetCapability(UpiAgent[1][0], id=9):
IpUpiGetCapability(UpiAgent[1][0], id=10):
IpUpiGetCapability(UpiAgent[1][0], id=8):
IpUpiGetCapability(UpiAgent[1][1], id=12):
IpUpiVersionSpecificConfigurationEnabled: unknown ID=2
IpWrError 0 49
IpUpiGetCapability(UpiAgent[1][1], id=7):
IpUpiGetCapability(UpiAgent[1][1], id=9):
IpUpiGetCapability(UpiAgent[1][1], id=10):
IpUpiGetCapability(UpiAgent[1][1], id=8):
IpUpiGetCapability(UpiAgent[1][2], id=12):
IpUpiVersionSpecificConfigurationEnabled: unknown ID=2
IpWrError 0 49
IpUpiGetCapability(UpiAgent[1][2], id=7):
IpUpiGetCapability(UpiAgent[1][2], id=9):
IpUpiGetCapability(UpiAgent[1][2], id=10):
IpUpiGetCapability(UpiAgent[1][2], id=8):
IpUpiGetCapability(UpiAgent[1][3], id=12):
IpUpiVersionSpecificConfigurationEnabled: unknown ID=2
IpWrError 0 49
IpUpiGetCapability(UpiAgent[1][3], id=7):
IpUpiGetCapability(UpiAgent[1][3], id=9):
IpUpiGetCapability(UpiAgent[1][3], id=10):
IpUpiGetCapability(UpiAgent[1][3], id=8):
****** Selecting KTI freq. - START ******
Max supported KTI Speed requested: 16.0 GT/s
Selected KTI Freq is 16.0 GT/s
****** Selecting KTI freq. - END ******
MaxAddress=52
******* Checking KTIRC Input Structure - END *******
******* KTI NVRAM Verification - START *******
----------Update Kti Nvram in COLD BOOT ----------
******* KTI NVRAM Verification - END *******
******* Calculate Resource Allocation - START *******
S0 - AddressMap.hi=209F
S1 - AddressMap.hi=21BF
BitPos=2E
CPU Resource Allocation
--------------------------------------------------------------------------------------------------------------------------------------------------------------
| StkId | Seg | Bus | Io | IoApic | Mmiol | Mmioh | StkBmp |
--------------------------------------------------------------------------------------------------------------------------------------------------------------
CPU0 | | 0 | 0x00 - 0x7F | 0x0000 - 0x9FFF | 0xFEC00000 - 0xFECFFFFF | 0x90000000 - 0xC8FFFFFF | 0x00002000 00000000 - 0x0000209F FFFFFFFF | 0xF3F |
Ins00 | 0x00 | 0 | 0x00 - 0x14 | 0x0000 - 0x3FFF | 0xFEC00000 - 0xFECFFFFF | 0x90000000 - 0x957FFFFF | 0x00002000 00000000 - 0x0000200F FFFFFFFF | |
Ins01 | 0x01 | 0 | 0x15 - 0x25 | 0x4000 - 0x5FFF | 0xFFFFFFFF - 0x00000000 | 0x95800000 - 0x9F7FFFFF | 0x00002010 00000000 - 0x0000201F FFFFFFFF | |
Ins02 | 0x04 | 0 | 0x26 - 0x36 | 0x6000 - 0x6FFF | 0xFFFFFFFF - 0x00000000 | 0x9F800000 - 0xA93FFFFF | 0x00002020 00000000 - 0x0000202F FFFFFFFF | |
Ins03 | 0x03 | 0 | 0x37 - 0x47 | 0x7000 - 0x7FFF | 0xFFFFFFFF - 0x00000000 | 0xA9400000 - 0xB2FFFFFF | 0x00002030 00000000 - 0x0000203F FFFFFFFF | |
Ins04 | 0x05 | 0 | 0x48 - 0x58 | 0x8000 - 0x8FFF | 0xFFFFFFFF - 0x00000000 | 0xB3000000 - 0xBCBFFFFF | 0x00002040 00000000 - 0x0000204F FFFFFFFF | |
Ins05 | 0x02 | 0 | 0x59 - 0x69 | 0x9000 - 0x9FFF | 0xFFFFFFFF - 0x00000000 | 0xBCC00000 - 0xC67FFFFF | 0x00002050 00000000 - 0x0000205F FFFFFFFF | |
Ins06 | 0x06 | 0 | 0xFF - 0x00 | 0xFFFF - 0x0000 | 0xFFFFFFFF - 0x00000000 | 0xFFFFFFFF - 0x00000000 | 0xFFFFFFFF FFFFFFFF - 0x00000000 00000000 | |
Ins07 | 0x07 | 0 | 0xFF - 0x00 | 0xFFFF - 0x0000 | 0xFFFFFFFF - 0x00000000 | 0xFFFFFFFF - 0x00000000 | 0xFFFFFFFF FFFFFFFF - 0x00000000 00000000 | |
Ins08 | 0x08 | 0 | 0x6A - 0x6E | 0xFFFF - 0x0000 | 0xFFFFFFFF - 0x00000000 | 0xC6800000 - 0xC6FFFFFF | 0x00002060 00000000 - 0x0000206F FFFFFFFF | |
Ins09 | 0x09 | 0 | 0x6F - 0x73 | 0xFFFF - 0x0000 | 0xFFFFFFFF - 0x00000000 | 0xC7000000 - 0xC77FFFFF | 0x00002070 00000000 - 0x0000207F FFFFFFFF | |
Ins10 | 0x0A | 0 | 0x74 - 0x78 | 0xFFFF - 0x0000 | 0xFFFFFFFF - 0x00000000 | 0xC7800000 - 0xC7FFFFFF | 0x00002080 00000000 - 0x0000208F FFFFFFFF | |
Ins11 | 0x0B | 0 | 0x79 - 0x7D | 0xFFFF - 0x0000 | 0xFFFFFFFF - 0x00000000 | 0xC8000000 - 0xC87FFFFF | 0x00002090 00000000 - 0x0000209F FFFFFFFF | |
Rsvd | 0x0C | 0 | 0xFB - 0xFD | 0xFFFF - 0x0000 | 0xFFFFFFFF - 0x00000000 | 0xFFFFFFFF - 0x00000000 | 0xFFFFFFFF FFFFFFFF - 0x00000000 00000000 | |
Ubox | 0x0D | 0 | 0x7E - 0x7F | 0xFFFF - 0x0000 | 0xFFFFFFFF - 0x00000000 | 0xC8800000 - 0xC8FFFFFF | 0xFFFFFFFF FFFFFFFF - 0x00000000 00000000 | |
CPU1 | | 0 | 0x80 - 0xFF | 0xA000 - 0xFFFF | 0xFFFFFFFF - 0x00000000 | 0xC9000000 - 0xFBFFFFFF | 0x000020A0 00000000 - 0x0000213F FFFFFFFF | 0xF3F |
Ins00 | 0x00 | 0 | 0x80 - 0x96 | 0xA000 - 0xAFFF | 0xFFFFFFFF - 0x00000000 | 0xC9000000 - 0xD13FFFFF | 0x000020A0 00000000 - 0x000020AF FFFFFFFF | |
Ins01 | 0x01 | 0 | 0x97 - 0xA6 | 0xB000 - 0xBFFF | 0xFFFFFFFF - 0x00000000 | 0xD1400000 - 0xD97FFFFF | 0x000020B0 00000000 - 0x000020BF FFFFFFFF | |
Ins02 | 0x04 | 0 | 0xA7 - 0xB6 | 0xC000 - 0xCFFF | 0xFFFFFFFF - 0x00000000 | 0xD9800000 - 0xE17FFFFF | 0x000020C0 00000000 - 0x000020CF FFFFFFFF | |
Ins03 | 0x03 | 0 | 0xB7 - 0xC6 | 0xD000 - 0xDFFF | 0xFFFFFFFF - 0x00000000 | 0xE1800000 - 0xE97FFFFF | 0x000020D0 00000000 - 0x000020DF FFFFFFFF | |
Ins04 | 0x05 | 0 | 0xC7 - 0xD6 | 0xE000 - 0xEFFF | 0xFFFFFFFF - 0x00000000 | 0xE9800000 - 0xF17FFFFF | 0x000020E0 00000000 - 0x000020EF FFFFFFFF | |
Ins05 | 0x02 | 0 | 0xD7 - 0xE6 | 0xF000 - 0xFFFF | 0xFFFFFFFF - 0x00000000 | 0xF1800000 - 0xF97FFFFF | 0x000020F0 00000000 - 0x000020FF FFFFFFFF | |
Ins06 | 0x06 | 0 | 0xFF - 0x00 | 0xFFFF - 0x0000 | 0xFFFFFFFF - 0x00000000 | 0xFFFFFFFF - 0x00000000 | 0xFFFFFFFF FFFFFFFF - 0x00000000 00000000 | |
Ins07 | 0x07 | 0 | 0xFF - 0x00 | 0xFFFF - 0x0000 | 0xFFFFFFFF - 0x00000000 | 0xFFFFFFFF - 0x00000000 | 0xFFFFFFFF FFFFFFFF - 0x00000000 00000000 | |
Ins08 | 0x08 | 0 | 0xE7 - 0xEB | 0xFFFF - 0x0000 | 0xFFFFFFFF - 0x00000000 | 0xF9800000 - 0xF9FFFFFF | 0x00002100 00000000 - 0x0000210F FFFFFFFF | |
Ins09 | 0x09 | 0 | 0xEC - 0xF0 | 0xFFFF - 0x0000 | 0xFFFFFFFF - 0x00000000 | 0xFA000000 - 0xFA7FFFFF | 0x00002110 00000000 - 0x0000211F FFFFFFFF | |
Ins10 | 0x0A | 0 | 0xF1 - 0xF5 | 0xFFFF - 0x0000 | 0xFFFFFFFF - 0x00000000 | 0xFA800000 - 0xFAFFFFFF | 0x00002120 00000000 - 0x0000212F FFFFFFFF | |
Ins11 | 0x0B | 0 | 0xF6 - 0xFA | 0xFFFF - 0x0000 | 0xFFFFFFFF - 0x00000000 | 0xFB000000 - 0xFB7FFFFF | 0x00002130 00000000 - 0x0000213F FFFFFFFF | |
Rsvd | 0x0C | 0 | 0xFB - 0xFD | 0xFFFF - 0x0000 | 0xFFFFFFFF - 0x00000000 | 0xFFFFFFFF - 0x00000000 | 0xFFFFFFFF FFFFFFFF - 0x00000000 00000000 | |
Ubox | 0x0D | 0 | 0xFE - 0xFF | 0xFFFF - 0x0000 | 0xFFFFFFFF - 0x00000000 | 0xFB800000 - 0xFBFFFFFF | 0xFFFFFFFF FFFFFFFF - 0x00000000 00000000 | |
******* Calculate Resource Allocation - END *******
******* Sync Up PBSPs - START *******
Setting Ubox Sticky to save KTI topology to 0x000000000000FF03
Verifying if the remote socket(s) checked-in.
Inter-socket CSR access En request POST_RESET_WARM reset
packageBspStepping[0]=4
packageBspStepping[1]=4
******* Sync Up PBSPs - END *******
******* Program Mmcfg and bus numbers - START *******
Initiate S1 update
KtiVar->MmCfgBase = 0x80000000
KtiVar->segmentSocket[0] = 0x00
KtiVar->SocketFirstBus[0] = 0x00
KtiVar->SocketLastBus[0] = 0x7F
KtiVar->SocketMmCfgBase[0]= 0x80000000
KtiVar->segmentSocket[1] = 0x00
KtiVar->SocketFirstBus[1] = 0x80
KtiVar->SocketLastBus[1] = 0xFF
KtiVar->SocketMmCfgBase[1]= 0x80000000
Current bus numbers:
Socket | Ins00 | Ins01 | Ins02 | Ins03 | Ins04 | Ins05 | Ins06 | Ins07 | Ins08 | Ins09 | Ins0A | Ins0B | Rsvd | Ubox0 | Ubox1 | LastBus | Seg
-----------------------------------------------------------------------------------------------------------------------------------------------
0 | 0x00 | 0x15 | 0x26 | 0x37 | 0x48 | 0x59 | --- | --- | 0x6A | 0x6F | 0x74 | 0x79 | --- | 0x7E | 0x7F | 0x7F | 0
1 | 0x80 | 0x97 | 0xA7 | 0xB7 | 0xC7 | 0xD7 | --- | --- | 0xE7 | 0xEC | 0xF1 | 0xF6 | --- | 0xFE | 0xFF | 0xFF | 0
-----------------------------------------------------------------------------------------------------------------------------------------------
Wait for S1 to update
Change in Cache size request POST_RESET_WARM reset
Change in Cache size request POST_RESET_WARM reset
Change in Cache size request POST_RESET_WARM reset
Change in Cache size request POST_RESET_WARM reset
Change in Cache size request POST_RESET_WARM reset
Change in Cache size request POST_RESET_WARM reset
Change in Cache size request POST_RESET_WARM reset
Change in Cache size request POST_RESET_WARM reset
Change in Cache size request POST_RESET_WARM reset
Change in Cache size request POST_RESET_WARM reset
Change in Cache size request POST_RESET_WARM reset
Change in Cache size request POST_RESET_WARM reset
Change in Cache size request POST_RESET_WARM reset
Change in Cache size request POST_RESET_WARM reset
Change in Cache size request POST_RESET_WARM reset
Change in Cache size request POST_RESET_WARM reset
Change in Cache size request POST_RESET_WARM reset
Change in Cache size request POST_RESET_WARM reset
Change in Cache size request POST_RESET_WARM reset
Change in Cache size request POST_RESET_WARM reset
******* Program Mmcfg and bus numbers - END *******
Current Bars:
Socket | SCF | PCU | MEM0 | MEM1 | MEM2 | MEM3 | MEM4 | MEM5 | MEM6 | MEM7 | SBREG |
-------------------------------------------------------------------------------------------------------------------------------------------------------
0 | 0xC8800000 | 0xC8A00000 | 0xC8A80000 | 0xC8B00000 | 0xC8B80000 | 0xC8C00000 | 0xC8C80000 | 0xC8D00000 | 0xC8D80000 | 0xC8E00000 | 0xC8E80000 |
1 | 0xFB800000 | 0xFBA00000 | 0xFBA80000 | 0xFBB00000 | 0xFBB80000 | 0xFBC00000 | 0xFBC80000 | 0xFBD00000 | 0xFBD80000 | 0xFBE00000 | 0xFBE80000 |
-------------------------------------------------------------------------------------------------------------------------------------------------------
******* Programming Misc CSRs before WR - START *******
******* Programming Misc CSRs before WR - END *******
******* Pre-work before MDFIS Training *******
S0 S3M_S3MFW_CFR_SVN_N0_S3M_TREG_REG : 00000000
S0 S3M_S3MFW_REVID_N0_S3M_TREG_REG : 00000000
S0 S3M_S3MFW_CFR_SVN_N1_S3M_TREG_REG : 00010001
S0 S3M_S3MFW_REVID_N1_S3M_TREG_REG : 0000001E
******* Mdfs Sweep Training START *******
Get Uncore P0 Ratio = 24, Uncore Pm Ratio = 8
Dispatching command to notify Pbsp S1 to go to halt state
Send the Pipe data to S1 Successfully!
Mdfs training send command to pcode
All PBSPs resume from halt START
All PBSPs resume from halt END
Dispatching command to notify Pbsp S1 to go to halt state
Send the Pipe data to S1 Successfully!
Mdfs training send command to pcode
All PBSPs resume from halt START
All PBSPs resume from halt END
Dispatching command to notify Pbsp S1 to go to halt state
Send the Pipe data to S1 Successfully!
Mdfs training send command to pcode
All PBSPs resume from halt START
All PBSPs resume from halt END
******* Mdfs Sweep Training END *******
******* Post-work after MDFIS Training *******
******* Full Speed Transition - START *******
IpUpiVersionSpecificConfigurationEnabled: unknown ID=5
IpWrError 0 49
IpUpiVersionSpecificConfigurationEnabled: unknown ID=5
IpWrError 0 49
IpUpiVersionSpecificConfigurationEnabled: unknown ID=5
IpWrError 0 49
IpUpiVersionSpecificConfigurationEnabled: unknown ID=5
IpWrError 0 49
IpUpiVersionSpecificConfigurationEnabled: unknown ID=5
IpWrError 0 49
IpUpiVersionSpecificConfigurationEnabled: unknown ID=5
IpWrError 0 49
IpUpiVersionSpecificConfigurationEnabled: unknown ID=5
IpWrError 0 49
IpUpiVersionSpecificConfigurationEnabled: unknown ID=5
IpWrError 0 49
Skip UPI speed transition as there is a comming reset!
******* Full Speed Transition - END *******
******* Programming Credits - START *******
SPR M2IOSF -> M2UPI credit value: 34 is bigger than 31, force it to 31.
SPR M2IOSF -> M2UPI credit value: 34 is bigger than 31, force it to 31.
SPR M2IOSF -> M2UPI credit value: 34 is bigger than 31, force it to 31.
SPR M2IOSF -> M2UPI credit value: 34 is bigger than 31, force it to 31.
SPR M2IOSF -> M2UPI credit value: 50 is bigger than 31, force it to 31.
SPR M2IOSF -> M2UPI credit value: 50 is bigger than 31, force it to 31.
SPR M2IOSF -> M2UPI credit value: 33 is bigger than 31, force it to 31.
SPR M2IOSF -> M2UPI credit value: 49 is bigger than 31, force it to 31.
SPR M2IOSF -> M2UPI credit value: 33 is bigger than 31, force it to 31.
SPR M2IOSF -> M2UPI credit value: 49 is bigger than 31, force it to 31.
SPR M2IOSF -> M2UPI credit value: 34 is bigger than 31, force it to 31.
SPR M2IOSF -> M2UPI credit value: 34 is bigger than 31, force it to 31.
SPR M2IOSF -> M2UPI credit value: 34 is bigger than 31, force it to 31.
SPR M2IOSF -> M2UPI credit value: 34 is bigger than 31, force it to 31.
SPR M2IOSF -> M2UPI credit value: 50 is bigger than 31, force it to 31.
SPR M2IOSF -> M2UPI credit value: 50 is bigger than 31, force it to 31.
SPR M2IOSF -> M2UPI credit value: 33 is bigger than 31, force it to 31.
SPR M2IOSF -> M2UPI credit value: 49 is bigger than 31, force it to 31.
SPR M2IOSF -> M2UPI credit value: 33 is bigger than 31, force it to 31.
SPR M2IOSF -> M2UPI credit value: 49 is bigger than 31, force it to 31.
Mesh Credit Program request POST_RESET_WARM reset
******* Programming Credits - END *******
******* Pcu Misc Config - START *******
******* Pcu Misc Config - END *******
Setup Uncore Misc:
Write Socket 0 GLOBAL_PKG_C_S_CONTROL_REGISTER = 4
Write Socket 1 GLOBAL_PKG_C_S_CONTROL_REGISTER = 100
:INIT - BIOS_RESET_CPL: Set CPL1 on #S1
:INIT - BIOS_RESET_CPL: Set CPL1 on #S0
Initalize DMI RCRB region.
SetRcrbBar (): RcrbBase = 0x90000000
Warning: Created a Memory Hole: 0x90002000 ~ 0x9001FFFF
MEMBAR0: Base = 0x90020000, Size = 0x20000
Socket: 0;DMI MemBar locates on 0x90020000, Size: 0x20000
ProgramNumOfChaPerCluster
ProgramNumOfChaPerCluster
*******SOCKET1 STACKID SWAPPING - START *******
*******SOCKET1 STACKID SWAPPING - END *******
Current bus numbers:
Socket | Ins00 | Ins01 | Ins02 | Ins03 | Ins04 | Ins05 | Ins06 | Ins07 | Ins08 | Ins09 | Ins0A | Ins0B | Rsvd | Ubox0 | Ubox1 | LastBus | Seg
-----------------------------------------------------------------------------------------------------------------------------------------------
0 | 0x00 | 0x15 | 0x26 | 0x37 | 0x48 | 0x59 | --- | --- | 0x6A | 0x6F | 0x74 | 0x79 | --- | 0x7E | 0x7F | 0x7F | 0
1 | --- | 0x97 | 0xA7 | 0xB7 | 0xC7 | 0xD7 | 0x80 | --- | 0xE7 | 0xEC | 0xF1 | 0xF6 | --- | 0xFE | 0xFF | 0xFF | 0
-----------------------------------------------------------------------------------------------------------------------------------------------
Get FM_PCIE_FV_BIF_EN Status = Success, GpioVal = 0
**KTI Output Structure **
OutD2KCreditConfig: 0 [1:Low,2:Med,3:High]
SnoopThrottleConfig: 0 [0:Dis,1:Low,2:Med,3:High,4:Auto]
OutUpiAffinityEn for CHA and M2M: 0
OutTwoSktTopology : 5
OutM2iosfToUpiAffinity: 1
OutPmonConfig: 2 [1:Reduced,2:Full,3:Auto,0:Disabled]
OutM2IosfPmonAccessControl: 0 [0:Restricted,1:Full,2:Auto]
OutD2kEn: 0
OutLegacyVgaSoc: 0
OutLegacyVgaStack: 0
OutIsocEn: 0
OutHitMeEn: 1
OutSncEn: 4 (SNC4)
OutUmaClustering: 0
OutSysDirectoryModeEn: 1
OutKtiPrefetch: 0
OutXptPrefetch: 0
OutXptRemotePrefetch: 0
OutSncPrefetchEn: 4
OutSncGbAlignRequired: 0
OutIsRouteThrough: 0
OutStaleAtoSOptEn: 2
OutSystemRasType: 6 (ADVANCED)
OutIoDcMode: 5 (IODC_EN_REM_INVITOM_AND_WCILF)
KtiCurrentLinkSpeedMode: 0 (SLOW)
OutKtiLinkSpeed: 2 (16.0)
OutKtiLinkL0pEn: 0 (DISABLED)
OutKtiLinkL1En: 1 (ENABLED)
OutKtiFailoverEn: 1 (ENABLED)
OutKtiCrcMode: 0 (16BIT)
OutBoardVsCpuConflict: 0x0
OutKtiAdaptationEnable: 0x0
OutKtiPerLinkL1En (per port):
S0:0 0 0 0
S1:0 0 0 0
S2:0 0 0 0
S3:0 0 0 0
PchPresentBitMap: 0x01
OutKtiFpgaPresent (per socket): S0: 0 S1: 0 S2: 0 S3: 0
OutKtiFpgaEnable (per socket): S0: 0 S1: 0 S2: 0 S3: 0
OutFpgaHomeAgent (per socket): S0: 0 S1: 0 S2: 0 S3: 0
OutFpgaCacheAgent (per socket): S0: 0 S1: 0 S2: 0 S3: 0
OutStackDisableBitMap (per socket): S0: 0x0 S1: 0x0 S2: 0x0 S3: 0x0
mmCfgBase: 0x80000000
mmCfgSize: 0x10000000
mmiolBase: 0x90000000
mmiolSize: 0x6C000000
mmiohBase: 0x00002000
lowGap : 0x20
SecondaryNodeBitMap: 0x00
CpuPaLimit: 0
KtiInternalGlobal:
->SnoopFanoutEn: 0
->SysOsbEn: 1
->D2cEn: 1
->D2kEn: 0
->SnoopFilter: 0
->DualLinksInterleavingMode: 2
->UpiInterleaveMode: 2
->EightSocketTopology: 0
->SnoopFanoutChaInterleaveEn: 0
KtiLinkVnaOverride (per port - final values):
S0:254 254 254 254
S1:254 254 254 254
S2:254 254 254 254
S3:254 254 254 254
IIO STACK rootbus ID mapping table
Stack ID | Root Bus ID
0 ------- 0
1 ------- 1
2 ------- 2
3 ------- 3
4 ------- 4
5 ------- 5
6 ------- 6
7 ------- 7
8 ------- 8
9 ------- 9
10 ------- 10
11 ------- 11
OutDfxPrqBlockEn: 0
OutDfxAeg0CounterLowVal: 40
OutDfxAeg0CounterHighVal: 60
**KTI Output Structure End**
******* KTIRC Exit *******
KTI Init completed! Reset Requested: 2
IIO EarlyLink Init Start.
HcxType[0] = NONE
[IIO](VMD) [0] VMD disabled for RPs init.
MS2IOSF Traffic Controller Credits: Recipe Revision v1.11
Program HW_INIT using SB access
Program HW_INIT using SB access
Program HW_INIT using SB access
Program HW_INIT using SB access
Program HW_INIT using SB access
Program HW_INIT using SB access
Program HW_INIT using SB access
Program HW_INIT using SB access
Program HW_INIT using SB access
[0] Cpxsmb enabled
WARNING: Platform does not support uplink port!
HcxType[1] = NONE
[IIO](VMD) [1] VMD disabled for RPs init.
MS2IOSF Traffic Controller Credits: Recipe Revision v1.11
Program HW_INIT using SB access
Program HW_INIT using SB access
Program HW_INIT using SB access
Program HW_INIT using SB access
Program HW_INIT using SB access
Program HW_INIT using SB access
Program HW_INIT using SB access
Program HW_INIT using SB access
Program HW_INIT using SB access
Program HW_INIT using SB access
[1] Cpxsmb enabled
IIO EarlyLink Init completed! Reset Requested: 2
RC debug buffering, compression, and sync ready
Pipe Init starting...
Pass PIPE_DISPATCH_SYNCH_PSYSHOST to socket 1
Pass PeiPipeFollowerInit
CAR MEM Range 0xFE800000 - 0xFE97A14F
Pass pointer to Host: 0xFE800014
Sending address of Memory Policy: 0xFE96FF80
Pass boot mode 0
Send data buffer
Send data dwordcount 5E854
Send data...complete
CAR MEM Range2 0xFE9DC000 - 0xFE9DFFFF
Send data buffer
Send data dwordcount 1000
Send data...complete
Send data buffer
Send data dwordcount 18F
Send data...complete
N1 Checked into Pipe
Pipe Init completed! Reset Requested: 2
CPU Feature Early Config starting...
CpuInit Start
CpuUncoreInit()
: Get UncoreRatioLimit MaxClrRatio: 24, MinClrRatio: 8, UncoreRatioLimit.Uint32 = 0x818
: Get UncoreRatioLimit MaxClrRatio: 24, MinClrRatio: 8, UncoreRatioLimit.Uint32 = 0x818
:UFS: Update BIOS_SPARE2_PCU Bit[20] = 0 on S0
Write Socket 0 MSR_UNCORE_RATIO_LIMIT.MinClrRatio [14:8] = 8, MSR_UNCORE_RATIO_LIMIT.MaxClrRatio [6:0] = 24
:UFS: Update BIOS_SPARE2_PCU Bit[20] = 0 on S1
Write Socket 1 MSR_UNCORE_RATIO_LIMIT.MinClrRatio [14:8] = 8, MSR_UNCORE_RATIO_LIMIT.MaxClrRatio [6:0] = 24
Get socket PPIN
: PPIN = 22E546CB1AD8E915
Get socket PPIN
: PPIN = 22E548CB80015B4D
:: ProgramProcessorFlexRatio()
:: System Capable : AVX SST-CP SST-BF
1 1 0
:: SstPpCapableSystem : LevelEnableMask MaxLevel
0 00 00
S0_0 FusedCoresMask = 0x0DABBB6EAF4EE9DB FusedCoreCount = 40
GetAllConfigTdpLevels() Enter
S0_0 ConfigTdpLevel(0) IssCoreMask = 0x0DABBB6EAF4EE9DB IssCoreCount = 40
GetAllConfigTdpLevels() Exit
:: S0 MaxRatio : MinRatio : MinOpRatio : ConfigTdpMaxLevel
17 08 05 02
:: S0 Current SST-PP Level : Current SST-PP Lock
00 0
Level : PkgTDP : SSE P1 : AVX2 P1 : AVX3 P1 : Core Count
0 : 000350 : 000017 : 000014 : 000011 : 040, [0] 40
3 : 000000 : 000000 : 000000 : 000000 : 000, [0] 00
4 : 000000 : 000000 : 000000 : 000000 : 000, [0] 00
Level : Turbo Ratio Limit - SSE P1 : AVX2 P1 : AVX3 P1
0 : - : 181818191A1E2023 : 17171718191E2023 : 16161617171D1F22
3 : - : 0000000000000000 : 0000000000000000 : 0000000000000000
4 : - : 0000000000000000 : 0000000000000000 : 0000000000000000
Level : TJMax : CoreMask
0 : 100 : [0] 0DABBB6EAF4EE9DB
3 : 000 : [0] 0000000000000000
4 : 000 : [0] 0000000000000000
Level : SstBf - P1_Hi : P1_Lo : CoreMask
0 : 0000 : 0000 : [0] 0000000000000000
3 : 0000 : 0000 : [0] 0000000000000000
4 : 0000 : 0000 : [0] 0000000000000000
Core Ratio Info
Level : P0 : P1 : Pn : Pm
0 : 000035 : 000017 : 000008 : 000005
3 : 000000 : 000000 : 000000 : 000000
4 : 000000 : 000000 : 000000 : 000000
Uncore Ratio Info
Level : P0 : P1 : Pn : Pm
0 : 000024 : 000014 : 000008 : 000008
3 : 000000 : 000000 : 000000 : 000000
4 : 000000 : 000000 : 000000 : 000000
S1_0 FusedCoresMask = 0x0DB9772F6F4EE9DB FusedCoreCount = 40
GetAllConfigTdpLevels() Enter
S1_0 ConfigTdpLevel(0) IssCoreMask = 0x0DB9772F6F4EE9DB IssCoreCount = 40
GetAllConfigTdpLevels() Exit
:: S1 MaxRatio : MinRatio : MinOpRatio : ConfigTdpMaxLevel
17 08 05 02
:: S1 Current SST-PP Level : Current SST-PP Lock
00 0
Level : PkgTDP : SSE P1 : AVX2 P1 : AVX3 P1 : Core Count
0 : 000350 : 000017 : 000014 : 000011 : 040, [0] 40
3 : 000000 : 000000 : 000000 : 000000 : 000, [0] 00
4 : 000000 : 000000 : 000000 : 000000 : 000, [0] 00
Level : Turbo Ratio Limit - SSE P1 : AVX2 P1 : AVX3 P1
0 : - : 181818191A1E2023 : 17171718191E2023 : 16161617171D1F22
3 : - : 0000000000000000 : 0000000000000000 : 0000000000000000
4 : - : 0000000000000000 : 0000000000000000 : 0000000000000000
Level : TJMax : CoreMask
0 : 100 : [0] 0DB9772F6F4EE9DB
3 : 000 : [0] 0000000000000000
4 : 000 : [0] 0000000000000000
Level : SstBf - P1_Hi : P1_Lo : CoreMask
0 : 0000 : 0000 : [0] 0000000000000000
3 : 0000 : 0000 : [0] 0000000000000000
4 : 0000 : 0000 : [0] 0000000000000000
Core Ratio Info
Level : P0 : P1 : Pn : Pm
0 : 000035 : 000017 : 000008 : 000005
3 : 000000 : 000000 : 000000 : 000000
4 : 000000 : 000000 : 000000 : 000000
Uncore Ratio Info
Level : P0 : P1 : Pn : Pm
0 : 000024 : 000014 : 000008 : 000008
3 : 000000 : 000000 : 000000 : 000000
4 : 000000 : 000000 : 000000 : 000000
:: CommonMaxRatio : CommonMinRatio : Target Ratio
17 08 17
:: IssTdpLevel : AvxP1Level
00 00
:: TargetRatio: 17 is ready (RatioChangeFlag: 0), SstPpCurrentLevel: 0
:: SetActiveCoresAndLpEnableDisable()
:: S0_0 BIST_FAILURE_LOCAL_MASK = 0000000000000000
:: S0 setup input disable = 0000000000000000
:: S0_0 AvailCoresMask = 0DABBB6EAF4EE9DB
:: S0_0 ResolvedCoresMask = 0DABBB6EAF4EE9DB
:: S0_0 DesiredCoresCurrent = 0000000000000000
:: S0_0 BistResultMask = 0000000000000000
:: S0_0 CoreDisableReqMask = 0000000000000000
:: S0_0 NumberOfCoresDisabledMask = 0000000000000000
:: CheckCpuBist = 1
:: CoreFailover = 1
[s0_0] MaxLpEnable = 0, LpCapable = 1, MaxLpEnable knob = 0, Lock Status = 0
S0_0 MaxEnabledCores = 0
S0_0 FusedCoreCount = 40
S0_0 NonSparingCoresMask= FFFFFFFFFFFFFFFF
:: S0_0 DesiredCoresNew = 0000000000000000
:: S1_0 BIST_FAILURE_LOCAL_MASK = 0000000000000000
:: S1 setup input disable = 0000000000000000
:: S1_0 AvailCoresMask = 0DB9772F6F4EE9DB
:: S1_0 ResolvedCoresMask = 0DB9772F6F4EE9DB
:: S1_0 DesiredCoresCurrent = 0000000000000000
:: S1_0 BistResultMask = 0000000000000000
:: S1_0 CoreDisableReqMask = 0000000000000000
:: S1_0 NumberOfCoresDisabledMask = 0000000000000000
:: CheckCpuBist = 1
:: CoreFailover = 1
[s1_0] MaxLpEnable = 0, LpCapable = 1, MaxLpEnable knob = 0, Lock Status = 0
S1_0 MaxEnabledCores = 0
S1_0 FusedCoreCount = 40
S1_0 NonSparingCoresMask= FFFFFFFFFFFFFFFF
:: S1_0 DesiredCoresNew = 0000000000000000
CPUMISC Current S 0:
ITBM is not supported
CPUMISC Current S 1:
ITBM is not supported
CPU Feature Early Config completed! Reset Requested: 2
[CSR PCI BAR Access] Address:0xFFFFFFFF000000D4; PCI Cmd: 0xFFFF
START_MRC_RUN
Detect ColdBootSlowRequiredFlag and will force slow cold boot.
N0: Bus Instance = 0; I2C speed = 3; I3C speed = 2; Bus mode = 0
N0: Bus Instance = 1; I2C speed = 3; I3C speed = 2; Bus mode = 0
N0: Bus Instance = 0; I2C speed = 3; I3C speed = 2; Bus mode = 1
N0: Bus Instance = 0; I2C speed = 3; I3C speed = 2; Bus mode = 1
N0: Bus Instance = 0; I2C speed = 3; I3C speed = 2; Bus mode = 1
N0: Bus Instance = 0; I2C speed = 3; I3C speed = 2; Bus mode = 1
N0: Bus Instance = 0; I2C speed = 3; I3C speed = 2; Bus mode = 1
N0: Bus Instance = 0; I2C speed = 3; I3C speed = 2; Bus mode = 1
N0: Bus Instance = 1; I2C speed = 3; I3C speed = 2; Bus mode = 1
N0: Bus Instance = 1; I2C speed = 3; I3C speed = 2; Bus mode = 1
N0: Bus Instance = 1; I2C speed = 3; I3C speed = 2; Bus mode = 1
N0: Bus Instance = 1; I2C speed = 3; I3C speed = 2; Bus mode = 1
N0: Bus Instance = 1; I2C speed = 3; I3C speed = 2; Bus mode = 1
N0: Bus Instance = 1; I2C speed = 3; I3C speed = 2; Bus mode = 1
N0: Bus Instance = 0; I2C speed = 3; I3C speed = 2; Bus mode = 0
N0: Bus Instance = 0; I2C speed = 3; I3C speed = 2; Bus mode = 0
N0: Bus Instance = 0; I2C speed = 3; I3C speed = 2; Bus mode = 0
N0: Bus Instance = 0; I2C speed = 3; I3C speed = 2; Bus mode = 0
N0: Bus Instance = 0; I2C speed = 3; I3C speed = 2; Bus mode = 0
N0: Bus Instance = 0; I2C speed = 3; I3C speed = 2; Bus mode = 0
N0: Bus Instance = 1; I2C speed = 3; I3C speed = 2; Bus mode = 0
N0: Bus Instance = 1; I2C speed = 3; I3C speed = 2; Bus mode = 0
N0: Bus Instance = 1; I2C speed = 3; I3C speed = 2; Bus mode = 0
N0: Bus Instance = 1; I2C speed = 3; I3C speed = 2; Bus mode = 0
N0: Bus Instance = 1; I2C speed = 3; I3C speed = 2; Bus mode = 0
N0: Bus Instance = 1; I2C speed = 3; I3C speed = 2; Bus mode = 0
N0: Dimm changed.
Processors changed.
Get socket PPIN
: PPIN = 22E546CB1AD8E915
setupChanged: 1
Clearing the MRC NVRAM structure.
bootMode = NormalBoot
subBootMode = ColdBoot
[ScktId: 0] Parallel Mode Dispatch -- Started
Dispatch N1 for MemInit
N1 Entering MRC
Detect ColdBootSlowRequiredFlag and will force slow cold boot.
N1: Bus Instance = 0; I2C speed = 3; I3C speed = 2; Bus mode = 0
N1: Bus Instance = 1; I2C speed = 3; I3C speed = 2; Bus mode = 0
N1: Bus Instance = 0; I2C speed = 3; I3C speed = 2; Bus mode = 1
N1: Bus Instance = 0; I2C speed = 3; I3C speed = 2; Bus mode = 1
N1: Bus Instance = 0; I2C speed = 3; I3C speed = 2; Bus mode = 1
N1: Bus Instance = 0; I2C speed = 3; I3C speed = 2; Bus mode = 1
N1: Bus Instance = 0; I2C speed = 3; I3C speed = 2; Bus mode = 1
N1: Bus Instance = 0; I2C speed = 3; I3C speed = 2; Bus mode = 1
N1: Bus Instance = 1; I2C speed = 3; I3C speed = 2; Bus mode = 1
N1: Bus Instance = 1; I2C speed = 3; I3C speed = 2; Bus mode = 1
N1: Bus Instance = 1; I2C speed = 3; I3C speed = 2; Bus mode = 1
N1: Bus Instance = 1; I2C speed = 3; I3C speed = 2; Bus mode = 1
N1: Bus Instance = 1; I2C speed = 3; I3C speed = 2; Bus mode = 1
N1: Bus Instance = 1; I2C speed = 3; I3C speed = 2; Bus mode = 1
N1: Bus Instance = 0; I2C speed = 3; I3C speed = 2; Bus mode = 0
N1: Bus Instance = 0; I2C speed = 3; I3C speed = 2; Bus mode = 0
N1: Bus Instance = 0; I2C speed = 3; I3C speed = 2; Bus mode = 0
N1: Bus Instance = 0; I2C speed = 3; I3C speed = 2; Bus mode = 0
N1: Bus Instance = 0; I2C speed = 3; I3C speed = 2; Bus mode = 0
N1: Bus Instance = 0; I2C speed = 3; I3C speed = 2; Bus mode = 0
N1: Bus Instance = 1; I2C speed = 3; I3C speed = 2; Bus mode = 0
N1: Bus Instance = 1; I2C speed = 3; I3C speed = 2; Bus mode = 0
N1: Bus Instance = 1; I2C speed = 3; I3C speed = 2; Bus mode = 0
N1: Bus Instance = 1; I2C speed = 3; I3C speed = 2; Bus mode = 0
N1: Bus Instance = 1; I2C speed = 3; I3C speed = 2; Bus mode = 0
N1: Bus Instance = 1; I2C speed = 3; I3C speed = 2; Bus mode = 0
N1: Dimm changed.
Get socket PPIN
: PPIN = 22E548CB80015B4D
setupChanged: 1
Clearing the MRC NVRAM structure.
bootMode = NormalBoot
subBootMode = ColdBoot
[ScktId: 1] Parallel Mode Dispatch -- Started
[ScktId: 1] Parallel Mode Dispatch - 4ms
[ScktId: 0] Parallel Mode Dispatch - 203ms
[ScktId: 1] Pipe Sync AP Boot Mode -- Started
[ScktId: 0] Pipe Sync AP Boot Mode -- Started
[ScktId: 0] Pipe Sync AP Boot Mode - 9ms
[ScktId: 1] Pipe Sync AP Boot Mode - 13ms
N1 Checked into Pipe
[ScktId: 0] Select Boot Mode -- Started
DetermineBootMode: ColdBoot
[ScktId: 0] Select Boot Mode - 8ms
[ScktId: 1] Pipe Sync SBSP Boot Mode -- Started
[ScktId: 0] Pipe Sync SBSP Boot Mode -- Started
[ScktId: 1] Pipe Sync SBSP Boot Mode - 9ms
[ScktId: 0] Pipe Sync SBSP Boot Mode - 9ms
[ScktId: 1] Init Structures Late -- Started
[ScktId: 0] Init Structures Late -- Started
[ScktId: 1] Init Structures Late - 8ms
[ScktId: 0] Init Structures Late - 8ms
[ScktId: 1] Detect DIMM Configuration -- Started
[ScktId: 0] Detect DIMM Configuration -- Started
N1: Bus Instance = 0; I2C speed = 3; I3C speed = 2; Bus mode = 0
N0: Bus Instance = 0; I2C speed = 3; I3C speed = 2; Bus mode = 0
N1: Bus Instance = 0; I2C speed = 3; I3C speed = 2; Bus mode = 0
N0: Bus Instance = 0; I2C speed = 3; I3C speed = 2; Bus mode = 0
N1: Bus Instance = 0; I2C speed = 3; I3C speed = 2; Bus mode = 0
N0: Bus Instance = 0; I2C speed = 3; I3C speed = 2; Bus mode = 0
N1: Bus Instance = 0; I2C speed = 3; I3C speed = 2; Bus mode = 0
N1: Bus Instance = 0; I2C speed = 3; I3C speed = 2; Bus mode = 0
N0: Bus Instance = 0; I2C speed = 3; I3C speed = 2; Bus mode = 0
N1: Bus Instance = 0; I2C speed = 3; I3C speed = 2; Bus mode = 0
N0: Bus Instance = 0; I2C speed = 3; I3C speed = 2; Bus mode = 0
N0: Bus Instance = 0; I2C speed = 3; I3C speed = 2; Bus mode = 0
N1: Bus Instance = 1; I2C speed = 3; I3C speed = 2; Bus mode = 0
N1: Bus Instance = 1; I2C speed = 3; I3C speed = 2; Bus mode = 0
N0: Bus Instance = 1; I2C speed = 3; I3C speed = 2; Bus mode = 0
N1: Bus Instance = 1; I2C speed = 3; I3C speed = 2; Bus mode = 0
N0: Bus Instance = 1; I2C speed = 3; I3C speed = 2; Bus mode = 0
N0: Bus Instance = 1; I2C speed = 3; I3C speed = 2; Bus mode = 0
N1: Bus Instance = 1; I2C speed = 3; I3C speed = 2; Bus mode = 0
N1: Bus Instance = 1; I2C speed = 3; I3C speed = 2; Bus mode = 0
N0: Bus Instance = 1; I2C speed = 3; I3C speed = 2; Bus mode = 0
N1: Bus Instance = 1; I2C speed = 3; I3C speed = 2; Bus mode = 0
N0: Bus Instance = 1; I2C speed = 3; I3C speed = 2; Bus mode = 0
[ScktId: 1] Detect DIMM Configuration - 299ms
N0: Bus Instance = 1; I2C speed = 3; I3C speed = 2; Bus mode = 0
[ScktId: 1] Pipe Sync AP Data -- Started
[ScktId: 0] Detect DIMM Configuration - 312ms
[ScktId: 0] Pipe Sync AP Data -- Started
[ScktId: 0] Pipe Sync AP Data - 19ms
[ScktId: 1] Pipe Sync AP Data - 34ms
N1 Checked into Pipe
[ScktId: 0] Check POR Compatibility -- Started
[ScktId: 0] Check POR Compatibility - 6ms
N1 Checked into Pipe
[ScktId: 0] HBM Init Clock -- Started
PCU: API - Command->0xA6, sending data -> 0x0000F260
PCU: API - Command->0xA6, sending data -> 0x0000F260
[ScktId: 0] HBM Init Clock - 16ms
N1 Checked into Pipe
[ScktId: 0] Initialize clocks for all MemSs -- Started
N0: Platform segment mapping found. UseServerPor: 1; SegmentType: 7; ChopType: 3; PlatformSegment: 0
N0: Platform segment mapping found. UseServerPor: 1; SegmentType: 7; ChopType: 3; PlatformSegment: 0
N0: Platform segment mapping found. UseServerPor: 1; SegmentType: 7; ChopType: 3; PlatformSegment: 0
N0: Platform segment mapping found. UseServerPor: 1; SegmentType: 7; ChopType: 3; PlatformSegment: 0
N0: Platform segment mapping found. UseServerPor: 1; SegmentType: 7; ChopType: 3; PlatformSegment: 0
N0: Platform segment mapping found. UseServerPor: 1; SegmentType: 7; ChopType: 3; PlatformSegment: 0
N0: Platform segment mapping found. UseServerPor: 1; SegmentType: 7; ChopType: 3; PlatformSegment: 0
N0: Platform segment mapping found. UseServerPor: 1; SegmentType: 7; ChopType: 3; PlatformSegment: 0
Reset requested: non-MRC
PCU: API - Command->0xA6, sending data -> 0x8000F170
Reset requested: non-MRC
PCU: API - Command->0xA6, sending data -> 0x8000F170
[ScktId: 0] Initialize clocks for all MemSs - 103ms
[ScktId: 1] Pipe Sync SBSP Data -- Started
[ScktId: 0] Pipe Sync SBSP Data -- Started
[ScktId: 1] Pipe Sync SBSP Data - 22ms
[ScktId: 0] Pipe Sync SBSP Data - 22ms
[ScktId: 1] Unlock Memory -- Started
[ScktId: 0] Unlock Memory -- Started
[ScktId: 1] Unlock Memory - 7ms
[ScktId: 0] Unlock Memory - 7ms
[ScktId: 1] Pipe Sync AP Data -- Started
[ScktId: 0] Pipe Sync AP Data -- Started
[ScktId: 0] Pipe Sync AP Data - 23ms
[ScktId: 1] Pipe Sync AP Data - 26ms
[ScktId: 0] HBM Pre-Training -- Started
[ScktId: 1] HBM Pre-Training -- Started
HBMIO flows: set to 0xFFFFFF7F!
HBMIO flows: set to 0xFFFFFF7F!
Get socket PPIN
Get socket PPIN
: PPIN = 22E546CB1AD8E915
: PPIN = 22E548CB80015B4D
HBM frequency = 3200MHz
HBM frequency = 3200MHz
Socket0 HbmIo0, HW Rev: 0x110, FW Rev: 0x2180, Patch ID: 0x0, Unique ID: 0x18, Product ID: 0x2
Socket1 HbmIo0, HW Rev: 0x110, FW Rev: 0x2180, Patch ID: 0x0, Unique ID: 0x18, Product ID: 0x2
Socket0 HbmIo1, HW Rev: 0x110, FW Rev: 0x2180, Patch ID: 0x0, Unique ID: 0x18, Product ID: 0x2
Socket1 HbmIo1, HW Rev: 0x110, FW Rev: 0x2180, Patch ID: 0x0, Unique ID: 0x18, Product ID: 0x2
Socket0 HbmIo2, HW Rev: 0x110, FW Rev: 0x2180, Patch ID: 0x0, Unique ID: 0x18, Product ID: 0x2
Socket1 HbmIo2, HW Rev: 0x110, FW Rev: 0x2180, Patch ID: 0x0, Unique ID: 0x18, Product ID: 0x2
Socket0 HbmIo3, HW Rev: 0x110, FW Rev: 0x2180, Patch ID: 0x0, Unique ID: 0x18, Product ID: 0x2
Socket1 HbmIo3, HW Rev: 0x110, FW Rev: 0x2180, Patch ID: 0x0, Unique ID: 0x18, Product ID: 0x2
[ScktId: 0] HBM Pre-Training - 117ms
[ScktId: 1] HBM Pre-Training - 125ms
[ScktId: 0] AP HBM Information -- Started
[ScktId: 1] AP HBM Information -- Started
[ScktId: 0] AP HBM Information - 13ms
[ScktId: 1] AP HBM Information - 9ms
[ScktId: 0] Pipe Sync SBSP Status -- Started
[ScktId: 1] Pipe Sync SBSP Status -- Started
[ScktId: 1] Pipe Sync SBSP Status - 8ms
[ScktId: 0] Pipe Sync SBSP Status - 12ms
-- EXIT, status = MRC_STATUS_RESET_REQUIRED
-- EXIT, status = MRC_STATUS_RESET_REQUIRED
Total MRC time = 809ms
Total MRC time = 1013ms
STOP_MRC_RUN
Final Rc Heap usage:
******* Configure Mesh Mode - START *******
Configure Socket 0 2LM Hash -Enabled
Configure Socket 0 2LM Hash on KTI and IIO-Enabled
Configure Socket 1 2LM Hash -Enabled
Configure Socket 1 2LM Hash on KTI and IIO-Enabled
Socket 0 Mc 0 channel 0 enabled 1
Socket 0 Mc 0 Ch 0 maxDimm 1 Dimm = 0 numRanks= 1 TechIndex = 3 DimmSize 0x80
Memory Size = 0x80
Socket 0 has 1st 4G memory on Channel 0
Socket 0 Mc 0 channel 1 enabled 0
Socket 0 Mc 1 channel 2 enabled 1
Socket 0 Mc 1 Ch 0 maxDimm 1 Dimm = 0 numRanks= 1 TechIndex = 3 DimmSize 0x80
Memory Size = 0x80
Socket 0 Mc 1 channel 3 enabled 0
Socket 0 Mc 2 channel 4 enabled 1
Socket 0 Mc 2 Ch 0 maxDimm 1 Dimm = 0 numRanks= 1 TechIndex = 3 DimmSize 0x80
Memory Size = 0x80
Socket 0 Mc 2 channel 5 enabled 0
Socket 0 Mc 3 channel 6 enabled 1
Socket 0 Mc 3 Ch 0 maxDimm 1 Dimm = 0 numRanks= 1 TechIndex = 3 DimmSize 0x80
Memory Size = 0x80
Socket 0 Mc 3 channel 7 enabled 0
MaxHbmIo: 4 MemInfo->SncInfo[0].NumOfHbmioEnabled: 4
Socket 1 Mc 0 channel 0 enabled 1
Socket 1 Mc 0 Ch 0 maxDimm 1 Dimm = 0 numRanks= 1 TechIndex = 3 DimmSize 0x80
Memory Size = 0x80
Socket 1 Mc 0 channel 1 enabled 0
Socket 1 Mc 1 channel 2 enabled 1
Socket 1 Mc 1 Ch 0 maxDimm 1 Dimm = 0 numRanks= 1 TechIndex = 3 DimmSize 0x80
Memory Size = 0x80
Socket 1 Mc 1 channel 3 enabled 0
Socket 1 Mc 2 channel 4 enabled 1
Socket 1 Mc 2 Ch 0 maxDimm 1 Dimm = 0 numRanks= 1 TechIndex = 3 DimmSize 0x80
Memory Size = 0x80
Socket 1 Mc 2 channel 5 enabled 0
Socket 1 Mc 3 channel 6 enabled 1
Socket 1 Mc 3 Ch 0 maxDimm 1 Dimm = 0 numRanks= 1 TechIndex = 3 DimmSize 0x80
Memory Size = 0x80
Socket 1 Mc 3 channel 7 enabled 0
MaxHbmIo: 4 MemInfo->SncInfo[1].NumOfHbmioEnabled: 4
Socket 0
S0: SNC_Base_1 = 0000 GB
S0: SNC_Base_2 = 0004 GB
S0: SNC_Base_3 = 0004 GB
S0: SNC_Base_4 = 0004 GB
S0: SNC_Base_5 = 0004 GB
Socket 1
S1: SNC_Base_1 = 0004 GB
S1: SNC_Base_2 = 0004 GB
S1: SNC_Base_3 = 0004 GB
S1: SNC_Base_4 = 0004 GB
S1: SNC_Base_5 = 0004 GB
ProgramSncShadowReg
Socket:0 Base1 0x0FFF0000
Socket:0 Base2 0x1FE00004
Socket:0 Base3 0x00000004
Socket:0 Base4 0x00000004
Socket:0 Base5 0x00000004
Socket:0 UpperBase1 0x00000000
Socket:0 SncConfig 0x0000000A
Socket:1 Base1 0x0FFF0004
Socket:1 Base2 0x1FE00004
Socket:1 Base3 0x00000004
Socket:1 Base4 0x00000004
Socket:1 Base5 0x00000004
Socket:1 UpperBase1 0x00000000
Socket:1 SncConfig 0x0000000A
******* Configure Mesh Mode - END *******
S3M Provisioning SoftStrap Disabled, Exit.
PUcode Patch provisioning/commit flow
S3mPucodeCfrPatchProvisionCommit didn't find suitable CFR image, Exit.
S3M Patch provisioning/commit flow
Get Image :FF800090 11FF4
CFR Patch Provision start...
IFWI integrated S3M CFR patch revision SVN: 00000001, RevID: 0000001E.
S0 S3M_S3MFW_CFR_SVN_N0_S3M_TREG_REG : 00000000
S0 S3M_S3MFW_REVID_N0_S3M_TREG_REG : 00000000
S0 S3M_S3MFW_CFR_SVN_N1_S3M_TREG_REG : 00010001
S0 S3M_S3MFW_REVID_N1_S3M_TREG_REG : 0000001E
Committed region with the latest patch, skip provision.
Socket 0 Can't Provision, Skip.
IFWI integrated S3M CFR patch revision SVN: 00000001, RevID: 0000001E.
S1 S3M_S3MFW_CFR_SVN_N0_S3M_TREG_REG : 00000000
S1 S3M_S3MFW_REVID_N0_S3M_TREG_REG : 00000000
S1 S3M_S3MFW_CFR_SVN_N1_S3M_TREG_REG : 00010001
S1 S3M_S3MFW_REVID_N1_S3M_TREG_REG : 0000001E
Committed region with the latest patch, skip provision.
Socket 1 Can't Provision, Skip.
CFR Patch Commit start...
S0 S3M_S3MFW_CFR_SVN_N0_S3M_TREG_REG : 00000000
S0 S3M_S3MFW_REVID_N0_S3M_TREG_REG : 00000000
Socket 0 can't commit, skip
S1 S3M_S3MFW_CFR_SVN_N0_S3M_TREG_REG : 00000000
S1 S3M_S3MFW_REVID_N0_S3M_TREG_REG : 00000000
Socket 1 can't commit, skip
CFR Patch Provision/Commit Completed.
Reset Requested: 2
Pipe Exit starting...
Pipe Exit completed! Reset Requested: 2
Enhanced Warning Log:
Checking for Reset Requests...
ResetRequired: 02
[HECI Transport-1 PEI] Send pkt: 80040007
00: F3 01 00 00
[HECI Transport-1 PEI] Got pkt: 80050007
00: F3 81 00 00 00
Issue WARM RESET!
PROGRESS CODE: V03020003 I0
PROGRESS CODE: V03020002 I0
PROGRESS CODE: V03020003 I0
PROGRESS CODE: V03020002 I0
PROGRESS CODE: V03020003 I0
PROGRESS CODE: V03020002 I0
PROGRESS CODE: V03020003 I0
PROGRESS CODE: V03020002 I0
[IPMI PEI] BMC Device ID: 0x23, firmware version: 2.03 UpdateMode:1
[IPMI] BMC in Forced Update mode, skip waiting for BMC_READY.
PROGRESS CODE: V03020003 I0
PROGRESS CODE: V03020002 I0
PROGRESS CODE: V03020003 I0
PROGRESS CODE: V03020002 I0
InstallHeciTransportPpis, start
InstallHeciTransportPpis, end
[HECI CONTROL PEI] HECI Transport found: 2
[HECI Control-1 PEI]: ERROR: HeciControlSendAndReceiveSinglePch() : Heci 1 is not initialized
HECI: ME type not recognized (MEFS1: 0x00000355, MEFS2: 0x80508006)
Initialization is allowed
[HECI Transport-1 PEI] Send pkt: 80040007
00: F0 11 00 00
[HECI Transport-1 PEI] Got pkt: 80080007
00: F0 91 00 00 09 00 00 00
HECI: Create MeType HOB for ME: 1
HECI: Set MeType HOB info to: 1
[HECI] [ME] (MeType is ME_TYPE_SPS)
Initialization is allowed
PROGRESS CODE: V03020003 I0
PROGRESS CODE: V03020002 I0
PROGRESS CODE: V03020003 I0
PROGRESS CODE: V03020002 I0
IioVmdDisableForPchRpInit: DonePCH Series : EBG PCH
PCH Stepping : B0
PROGRESS CODE: V03020003 I0
PROGRESS CODE: V03020002 I0
PROGRESS CODE: V03020003 I0
PROGRESS CODE: V03020002 I0
PROGRESS CODE: V03020003 I0
PROGRESS CODE: V03020002 I0
UbaInitPeim: PlatformType=0x16
UbaInitPeim: PlatformType=0x16
UbaInitPeim: PlatformType=0x16
UbaInitPeim: PlatformType=0x16
PROGRESS CODE: V03020003 I0
PROGRESS CODE: V03020002 I0
PROGRESS CODE: V03020003 I0
PROGRESS CODE: V03020002 I0
UBA:GpioTable size 0x9CC, blocks: 0xD1.
UBA: Start ConfigureGpio().
UBA: ConfigureGpio() end.
Unable to read FlashSecOvrdVal
FiaMuxRecordsCount = 0
[HECI] PeiMeServerPolicy (MeType is ME_TYPE_SPS)
Can't finde more CFR image in CFR FV - Not Found!
PPR Variable not found or CRC mismatch - Status: 0x8000000E, Crc: 0x0, calc. Crc: 0x0!
UpdatePeiSecurityPolicy: Create Status=Success
FIT not found, skip LT-SX
Platform Type = 22
Bios ID: EGSDCRB1.ZHI.0091.D15.2211010825
PROGRESS CODE: V03020003 I0
[HECI Transport-1 PEI] Send pkt: 80010020
00: 01
[HECI Transport-1 PEI] Got pkt: 800B0020
00: 81 01 01 14 00 88 00 01 - 00 00 00
[HECI Transport-1 PEI] Send pkt: 80300008
00: 00 00 05 00 1A 00 00 00 - 00 00 00 00 1C 00 00 00
10: 00 00 00 00 00 00 00 00 - 00 00 00 00 00 00 00 00
20: 00 00 00 00 00 00 00 00 - 00 00 00 00 00 00 00 00
[HECI Transport-1 PEI] Got pkt: 80300008
00: 00 00 05 00 1A 00 00 00 - 00 00 00 00 1C 00 00 00
10: 00 00 00 00 00 00 00 02 - 00 00 00 00 00 00 00 00
20: 00 00 00 00 00 00 00 00 - 00 00 00 00 00 00 00 00
Fail to Configure PSYS_CRIT
PROGRESS CODE: V03020002 I0
PROGRESS CODE: V03020003 I0
PROGRESS CODE: V03020002 I0
PROGRESS CODE: V03020003 I0
PROGRESS CODE: V03020002 I0
PROGRESS CODE: V03020003 I0
PROGRESS CODE: V03020002 I0
PROGRESS CODE: V03020003 I0
PROGRESS CODE: V03020002 I0
LtStatusRegister[0xFED30000] = 0x0000000000000003
LtExtendedStatusError[0xFED30008] = 0x0000000000000000
BootGuardBootStatus[0xFED300A0] = 0x0000000000000000
BootGuardAcmError[0xFED30328] = 0x0000000000000000
BootGuardLtExists[0xFED30010] = 0x0000000000000000
BootGuardLtCrash[0xFED30030] = 0x0000000000000000
MSR_DEBUG_INTERFACE[0x00000C80] = 0x0000000080000001
MSR_BOOT_GUARD_SACM_INFO[0x0000013A] = 0x0000000C00000000
AcmPolicyStatus = 0x0, IsTxtFailedWithScrtm 0
None of BtG/TXT is enabled or TXT failed with scrtm.
PROGRESS CODE: V03020003 I0
PROGRESS CODE: V03020002 I0
PROGRESS CODE: V03020003 I0
PROGRESS CODE: V03020002 I0
InitializeDefaultData()
[Enter] Initialize Reference Code Policy!
>>> Print the default settings of Reference Code Policy! Begin >>>
ReferenceCodePolicyPtr->NumaEn = 1
ReferenceCodePolicyPtr->UmaBasedClustering = 0
<<< Print the default settings of Reference Code Policy! End <<<
[Exit] Initialize Reference Code Policy!
SBSP socket = 0
InitializePlatformData()
InstallPpi MrcHooksServicesPpiDesc Status = 00000000
CacheMrcHooksServicesPpi in HOST: Host->MrcHooksServicesPpi = FFEA57C0
InstallPpi MrcHooksChipServicesPpiDesc Status = 00000000
CacheMrcChipHooksServicesPpi in HOST: Host->MrcHooksChipServicesPpi = FFEA5820
PROGRESS CODE: V030F100B I0
LoadNvramData: LoadSysInfoNvram failed, Status = Not Found
[HECI Transport-1 PEI] Send pkt: 80100007
00: F0 0C 00 00 DF FF FF FF - FF FF FF FF 00 00 00 00
[HECI Transport-1 PEI] Got pkt: 80100007
00: F0 8C 00 00 00 00 00 00 - 00 00 00 00 00 00 00 00
MeUmaConfigureRequestedSegmentSize: Exiting (Status = Success)
GetEmulationMemFlows: Simics $mrc value = 0
memFlows = 0xFFFFFFFF, memFlowsExt = 0xFFBF7FFF, memFlowsExt2 = 0xBF9E1F7F, memFlowsExt3 = 0xFFFFFFFF
Emulation Value is: 0!
Running on hardware
SPR processor detected
Warning: Newer CPU Stepping 4 detected
RC Version: 1.1.1.01BC
sizeof sysHost = 363776
SsaLoader - Entry
SsaLoader - Exit
KTI Init starting...
******* KTI Setup Structure *******
Bus Ratio (per socket): S0: 1 S1: 1 S2: 1 S3: 1
D2KCreditConfig: 0 [1:Low,2:Med,3:High]
SnoopThrottleConfig: 0 [0:Dis,1:Low,2:Med,3:High,4:Auto]
LegacyVgaSoc: 0
LegacyVgaStack: 0
P2pRelaxedOrdering: 0
DebugPrintLevel: 15
DegradePrecedence: 0
Degrade4SPreference: 0 (4SFullyConnect)
KtiLinkSpeedMode: 1 (FAST)
DfxWarmResetEliminationEn: 0
KtiLinkSpeed: 127 (MAX_SUPPORTED)
KtiAdaptationEn: 2 (UNKNOWN)
KtiAdaptationSpeed: 127 (MAX_SUPPORTED)
KtiLinkL0pEn: 2 (AUTO)
KtiLinkL1En: 2 (AUTO)
KtiFailoverEn: 2 (AUTO)
KtiLbEn: 0
SncEn: 15 (AUTO)
IoDcMode: 1 (AUTO)
DirectoryModeEn: 2
XptPrefetchEn: 2
KtiPrefetchEn: 2
XptRemotePrefetchEn: 2
RdCurForXptPrefetchEn: 2
StaleAtoSOptEn: 2
LLCDeadLineAlloc: 1
OppoLLC2SfMigrationEn: 0 (MANUAL)
MbeBWCalChoice: 3 [0:Linear,1:Biased,2:Legacy,3:Auto]
PmmMbaBWDownscale: 0 [0:1x,1:1/2x,2:1/4x,3:1/8x]
CxlMbaBWDownscale: 0 [0:1x,1:1/2x,2:1/4x,3:1/8x]
RemoteTargetMbaBWDownscale 0 [0:1x,1:1/2x,2:1/4x,3:1/8x]
SplitLock: 0
DdrtQosMode: 0
ClockModulationEn: 2 (AUTO)
KtiFpgaEnable (per socket): S0: 2 S1: 2 S2: 2 S3: 2
StackDisableBitMap (per socket): S0: 0x0 S1: 0x0 S2: 0x0 S3: 0x0
KtiCrcMode: 0 (16BIT)
KtiCpuSktHotPlugEn: 0
KtiCpuSktHotPlugTopology: 0 (4S)
KtiSkuMismatchCheck: 1
MctpBusOwner: 0 (PCH SPS as Bus Owner (Proxy))
KtiPortDisable (per port):
S0:0 0 0 0
S1:0 0 0 0
S2:0 0 0 0
S3:0 0 0 0
KtiLinkVnaOverride (per port):
S0:254 254 254 254
S1:254 254 254 254
S2:254 254 254 254
S3:254 254 254 254
KtiLinkSpeed (per port):
S0:7 7 7 7
S1:7 7 7 7
S2:7 7 7 7
S3:7 7 7 7
Rsvd (per port):
S0:0 0 0 0
S1:0 0 0 0
S2:0 0 0 0
S3:0 0 0 0
**KTI Setup Structure DfxParms **
DfxHaltLinkFailReset: 2 (AUTO)
DfxKtiMaxInitAbort: 2 (AUTO)
DfxLlcShareDrdCrd 2 (AUTO)
DfxBiasFwdMode: 5 (AUTO)
DfxSnoopFanoutEn: 2 (AUTO)
DfxHitMeEn: 2 (AUTO)
DfxFrcfwdinv 2 (AUTO)
DfxDbpEnable 2 (AUTO)
DfxCleanEvictAlwaysLive: 2 (AUTO)
DfxModifiedEvictAlwaysLive: 2 (AUTO)
DfxOsbEn 2 (AUTO)
DfxHitMeRfoDirsEn 2 (AUTO)
DfxGateOsbIodcAllocEn 2 (AUTO)
DfxDualLinksInterleavingMode 2 (AUTO)
DfxSystemDegradeMode: 1
DfxVn1En: 2 (AUTO)
DfxD2cEn: 2 (AUTO)
DfxD2kEn: 2 (AUTO)
DfxLockPrimary: 4 (AUTO)
DfxOsbLocRd: 2 (AUTO)
DfxOsbLocRdCur: 2 (AUTO)
DfxOsbRmtRd: 2 (AUTO)
DfxM3KtiCountMismatchEn: 2 (AUTO)
DfxSnoopFanoutChaInterleaveEn: 2 (AUTO)
DfxXptFifoEnabledCredit: 0x5
DfxMdfisTrainingEn: 2 (AUTO)
DfxClippedFreq: 23
DfxLlpEndcntClipped: 650
DfxLlpEndcntNonClipped: 576
DfxCxlSecLvl: 3 (AUTO)
DfxCxlStcge: 2 (AUTO)
DfxCxlSdcge: 2 (AUTO)
DfxCxlDlcge: 2 (AUTO)
DfxCxlLtcge: 2 (AUTO)
DfxCxlVid: 2 (AUTO)
DfxIioDfxEnabled: 0 (MANUAL)
DfxHqmEn: 2 (AUTO)
DfxRsfEnabledForDram: 2 (AUTO)
DfxS3mSoftStrap: 2 (AUTO)
DfxPmonConfig: 3 (AUTO)
DfxM2IosfPmonAccessControl: 2 (AUTO)
DfxMaxCache: 256 (AUTO)
DfxMaxCacheAtomic: 256 (AUTO)
DfxCtagEntryAvailMask: 256 (AUTO)
DfxXptPrefetchEn: 2 (AUTO)
DfxPrqBlockEn: 2 (AUTO)
DfxAeg0CounterLowVal: 65535 (AUTO)
DfxAeg0CounterHighVal: 65535 (AUTO)
DfxCrcMode (per port):
S0:2 (AUTO) 2 (AUTO) 2 (AUTO) 2 (AUTO)
S1:2 (AUTO) 2 (AUTO) 2 (AUTO) 2 (AUTO)
S2:2 (AUTO) 2 (AUTO) 2 (AUTO) 2 (AUTO)
S3:2 (AUTO) 2 (AUTO) 2 (AUTO) 2 (AUTO)
DfxL0pEnable (per port):
S0:2 (AUTO) 2 (AUTO) 2 (AUTO) 2 (AUTO)
S1:2 (AUTO) 2 (AUTO) 2 (AUTO) 2 (AUTO)
S2:2 (AUTO) 2 (AUTO) 2 (AUTO) 2 (AUTO)
S3:2 (AUTO) 2 (AUTO) 2 (AUTO) 2 (AUTO)
DfxL1Enable (per port):
S0:2 (AUTO) 2 (AUTO) 2 (AUTO) 2 (AUTO)
S1:2 (AUTO) 2 (AUTO) 2 (AUTO) 2 (AUTO)
S2:2 (AUTO) 2 (AUTO) 2 (AUTO) 2 (AUTO)
S3:2 (AUTO) 2 (AUTO) 2 (AUTO) 2 (AUTO)
DfxKtiFailoverEn (per port):
S0:2 (AUTO) 2 (AUTO) 2 (AUTO) 2 (AUTO)
S1:2 (AUTO) 2 (AUTO) 2 (AUTO) 2 (AUTO)
S2:2 (AUTO) 2 (AUTO) 2 (AUTO) 2 (AUTO)
S3:2 (AUTO) 2 (AUTO) 2 (AUTO) 2 (AUTO)
**Common Setup Structure**
mmCfgBase: 6 (AUTO)
mmCfgSize: 6 (AUTO)
mmiohBase: 0x00002000
CpuPaLimit: 0
mmiohSize: 3 (64GB per stack)
numaEn: 1
UmaClustering: 4
isocEn: 0
dcaEn: 0
**Common Var Structure **
resetRequired: 0
state: 0
numCpus: 0
socketPresentBitMap: 0x01
mmCfgBase: 0x80000000
meRequestedSize: 0
******* Collecting Early System Information - START *******
SBSP Socket: 0 Ways: 0x01 Ras: 0x06 Stepping: 0x04 DieCount: 4 Chop: XCC
Total Chas: 52 Cha List Map:
Cha List[0]: 0xBFCFF9FF
Cha List[1]: 0x0FEBFBFF
Total M3Kti: 04 Total KtiAgent: 04 Total M2M: 20 M2M list map: 0x000FFFFF
Current bus numbers:
Socket | Ins00 | Ins01 | Ins02 | Ins03 | Ins04 | Ins05 | Ins06 | Ins07 | Ins08 | Ins09 | Ins0A | Ins0B | Rsvd | Ubox0 | Ubox1 | LastBus | Seg
-----------------------------------------------------------------------------------------------------------------------------------------------
0 | 0x00 | 0x11 | 0x12 | 0x13 | 0x14 | 0x15 | 0x16 | 0x17 | 0x18 | 0x19 | 0x1A | 0x1B | --- | 0x1E | 0x1F | 0x1F | 0
1 | 0x20 | 0x21 | 0x22 | 0x23 | 0x24 | 0x25 | 0x26 | 0x27 | 0x28 | 0x29 | 0x2A | 0x2B | --- | 0x3E | 0x3F | 0x3F | 0
2 | 0x40 | 0x41 | 0x42 | 0x43 | 0x44 | 0x45 | 0x46 | 0x47 | 0x48 | 0x49 | 0x4A | 0x4B | --- | 0x5E | 0x5F | 0x5F | 0
3 | 0x60 | 0x61 | 0x62 | 0x63 | 0x64 | 0x65 | 0x66 | 0x67 | 0x68 | 0x69 | 0x6A | 0x6B | --- | 0x7E | 0x7F | 0x7F | 0
-----------------------------------------------------------------------------------------------------------------------------------------------
Assuming maximal config: TotCpus: 4 CpuList: 0x0F
Default UpiInterleaveMode: 0
Reset Type: Warm Reset
******* Collecting Early System Information - END *******
(Spr) UpiIpWrInit
MaxSocket 4, MaxKtiPort 4
UpiIpWrSingleInit
IpUpiIpInit(UpiAgent[0][0]):
UpiIpWrSingleInit
IpUpiIpInit(UpiAgent[0][1]):
UpiIpWrSingleInit
IpUpiIpInit(UpiAgent[0][2]):
UpiIpWrSingleInit
IpUpiIpInit(UpiAgent[0][3]):
UpiIpWrSingleInit
IpUpiIpInit(UpiAgent[1][0]):
UpiIpWrSingleInit
IpUpiIpInit(UpiAgent[1][1]):
UpiIpWrSingleInit
IpUpiIpInit(UpiAgent[1][2]):
UpiIpWrSingleInit
IpUpiIpInit(UpiAgent[1][3]):
UpiIpWrSingleInit
IpUpiIpInit(UpiAgent[2][0]):
UpiIpWrSingleInit
IpUpiIpInit(UpiAgent[2][1]):
UpiIpWrSingleInit
IpUpiIpInit(UpiAgent[2][2]):
UpiIpWrSingleInit
IpUpiIpInit(UpiAgent[2][3]):
UpiIpWrSingleInit
IpUpiIpInit(UpiAgent[3][0]):
UpiIpWrSingleInit
IpUpiIpInit(UpiAgent[3][1]):
UpiIpWrSingleInit
IpUpiIpInit(UpiAgent[3][2]):
UpiIpWrSingleInit
IpUpiIpInit(UpiAgent[3][3]):
******* Setting up Minimum Path - START *******
Constructing SBSP minimum path Topology Tree
--------------------------------------------
Adding SBSP (CPU0) to the tree
CPU0 Link Exchange
: LEP0(0,CPU1) Socket 0 Port 0:Primary - Peer Socket 1 Port 0 Secondary
: LEP1(1,CPU1) Socket 0 Port 1:Primary - Peer Socket 1 Port 1 Secondary
: LEP2(2,CPU1) Socket 0 Port 2:Primary - Peer Socket 1 Port 2 Secondary
: LEP3(3,CPU1) Socket 0 Port 3:Primary - Peer Socket 1 Port 3 Secondary
Adding CPU1 to the tree
Setting path between SBSP and CPU1.
In SBSP setting route to CPU1 using port 0.
In CPU1 using port 0 to set the M2UPCIe0 route.
CPU1 Link Exchange
: LEP0(0,CPU0) : LEP1(1,CPU0) : LEP2(2,CPU0) : LEP3(3,CPU0)
Setting boot path for CPU1
In CPU1 setting Cbo route to port 0
Socket[2] is removed
Socket[3] is removed
SBSP Minimum Path Tree
----------------------
Index Socket ParentPort Hop ParentIndex
00 CPU0 -- 0 --
01 CPU1 00 1 00
******* Setting up Minimum Path - END *******
******* Check for KTI Topology Degradation - START *******
Link Exchange Parameter
-----------------------
CPU0 : LEP0(0:CPU1) : LEP1(1:CPU1) : LEP2(2:CPU1) : LEP3(3:CPU1)
CPU1 : LEP0(0:CPU0) : LEP1(1:CPU0) : LEP2(2:CPU0) : LEP3(3:CPU0)
Already Reduced to Supported Topology
System will be treated 2S4L Configuration
******* Check for KTI Topology Degradation - END *******
******* Enable UBOX MMIO Addr Range - START *******
Current Bars:
Socket | SCF | PCU | MEM0 | MEM1 | MEM2 | MEM3 | MEM4 | MEM5 | MEM6 | MEM7 | SBREG |
-------------------------------------------------------------------------------------------------------------------------------------------------------
0 | 0xF8000000 | 0xF8200000 | 0xF8280000 | 0xF8300000 | 0xF8380000 | 0xF8400000 | 0xF8480000 | 0xF8500000 | 0xF8580000 | 0xF8600000 | 0xF8680000 |
1 | 0xF8800000 | 0xF8A00000 | 0xF8A80000 | 0xF8B00000 | 0xF8B80000 | 0xF8C00000 | 0xF8C80000 | 0xF8D00000 | 0xF8D80000 | 0xF8E00000 | 0xF8E80000 |
2 | 0xF9000000 | 0xF9200000 | 0xF9280000 | 0xF9300000 | 0xF9380000 | 0xF9400000 | 0xF9480000 | 0xF9500000 | 0xF9580000 | 0xF9600000 | 0xF9680000 |
3 | 0xF9800000 | 0xF9A00000 | 0xF9A80000 | 0xF9B00000 | 0xF9B80000 | 0xF9C00000 | 0xF9C80000 | 0xF9D00000 | 0xF9D80000 | 0xF9E00000 | 0xF9E80000 |
-------------------------------------------------------------------------------------------------------------------------------------------------------
******* Enable UBOX MMIO Addr Range - END *******
******* Process Straps Config - START *******
S3M Read SoftStrap Disabled, Exit.
******* Process Straps Config - END *******
******* Detecting IIO count - START *******
Socket 0 Stack Bitmap:F3F.
Stack Instance Bitmap:F3F.
IioCount: 10.
B2HotCount(LS): 00.
Socket 1 Stack Bitmap:F3F.
Stack Instance Bitmap:F3F.
IioCount: 10.
B2HotCount(LS): 00.
******* Detecting IIO count - END *******
******* Disable UBOX MMIO Addr Range - START *******
Current Bars:
Socket | SCF | PCU | MEM0 | MEM1 | MEM2 | MEM3 | MEM4 | MEM5 | MEM6 | MEM7 | SBREG |
-------------------------------------------------------------------------------------------------------------------------------------------------------
0 | 0x00000000 | 0x00000000 | 0x00000000 | 0x00000000 | 0x00000000 | 0x00000000 | 0x00000000 | 0x00000000 | 0x00000000 | 0x00000000 | 0x00000000 |
1 | 0x00000000 | 0x00000000 | 0x00000000 | 0x00000000 | 0x00000000 | 0x00000000 | 0x00000000 | 0x00000000 | 0x00000000 | 0x00000000 | 0x00000000 |
2 | 0x00000000 | 0x00000000 | 0x00000000 | 0x00000000 | 0x00000000 | 0x00000000 | 0x00000000 | 0x00000000 | 0x00000000 | 0x00000000 | 0x00000000 |
3 | 0x00000000 | 0x00000000 | 0x00000000 | 0x00000000 | 0x00000000 | 0x00000000 | 0x00000000 | 0x00000000 | 0x00000000 | 0x00000000 | 0x00000000 |
-------------------------------------------------------------------------------------------------------------------------------------------------------
******* Disable UBOX MMIO Addr Range - END *******
******* Checking KTIRC Input Structure - START *******
Desired MMCFG Config: Base = 0x80000000, Size = 0x10000000
OutSncPrefetchEn=4, OutSncEn=4
IpUpiGetCapability(UpiAgent[0][0], id=12):
IpUpiVersionSpecificConfigurationEnabled: unknown ID=2
IpWrError 0 49
IpUpiGetCapability(UpiAgent[0][0], id=7):
IpUpiGetCapability(UpiAgent[0][0], id=9):
IpUpiGetCapability(UpiAgent[0][0], id=10):
IpUpiGetCapability(UpiAgent[0][0], id=8):
IpUpiGetCapability(UpiAgent[0][1], id=12):
IpUpiVersionSpecificConfigurationEnabled: unknown ID=2
IpWrError 0 49
IpUpiGetCapability(UpiAgent[0][1], id=7):
IpUpiGetCapability(UpiAgent[0][1], id=9):
IpUpiGetCapability(UpiAgent[0][1], id=10):
IpUpiGetCapability(UpiAgent[0][1], id=8):
IpUpiGetCapability(UpiAgent[0][2], id=12):
IpUpiVersionSpecificConfigurationEnabled: unknown ID=2
IpWrError 0 49
IpUpiGetCapability(UpiAgent[0][2], id=7):
IpUpiGetCapability(UpiAgent[0][2], id=9):
IpUpiGetCapability(UpiAgent[0][2], id=10):
IpUpiGetCapability(UpiAgent[0][2], id=8):
IpUpiGetCapability(UpiAgent[0][3], id=12):
IpUpiVersionSpecificConfigurationEnabled: unknown ID=2
IpWrError 0 49
IpUpiGetCapability(UpiAgent[0][3], id=7):
IpUpiGetCapability(UpiAgent[0][3], id=9):
IpUpiGetCapability(UpiAgent[0][3], id=10):
IpUpiGetCapability(UpiAgent[0][3], id=8):
IpUpiGetCapability(UpiAgent[1][0], id=12):
IpUpiVersionSpecificConfigurationEnabled: unknown ID=2
IpWrError 0 49
IpUpiGetCapability(UpiAgent[1][0], id=7):
IpUpiGetCapability(UpiAgent[1][0], id=9):
IpUpiGetCapability(UpiAgent[1][0], id=10):
IpUpiGetCapability(UpiAgent[1][0], id=8):
IpUpiGetCapability(UpiAgent[1][1], id=12):
IpUpiVersionSpecificConfigurationEnabled: unknown ID=2
IpWrError 0 49
IpUpiGetCapability(UpiAgent[1][1], id=7):
IpUpiGetCapability(UpiAgent[1][1], id=9):
IpUpiGetCapability(UpiAgent[1][1], id=10):
IpUpiGetCapability(UpiAgent[1][1], id=8):
IpUpiGetCapability(UpiAgent[1][2], id=12):
IpUpiVersionSpecificConfigurationEnabled: unknown ID=2
IpWrError 0 49
IpUpiGetCapability(UpiAgent[1][2], id=7):
IpUpiGetCapability(UpiAgent[1][2], id=9):
IpUpiGetCapability(UpiAgent[1][2], id=10):
IpUpiGetCapability(UpiAgent[1][2], id=8):
IpUpiGetCapability(UpiAgent[1][3], id=12):
IpUpiVersionSpecificConfigurationEnabled: unknown ID=2
IpWrError 0 49
IpUpiGetCapability(UpiAgent[1][3], id=7):
IpUpiGetCapability(UpiAgent[1][3], id=9):
IpUpiGetCapability(UpiAgent[1][3], id=10):
IpUpiGetCapability(UpiAgent[1][3], id=8):
****** Selecting KTI freq. - START ******
Max supported KTI Speed requested: 16.0 GT/s
Selected KTI Freq is 16.0 GT/s
****** Selecting KTI freq. - END ******
MaxAddress=52
******* Checking KTIRC Input Structure - END *******
******* KTI NVRAM Verification - START *******
******* KTI NVRAM Verification - END *******
******* Calculate Resource Allocation - START *******
S0 - AddressMap.hi=209F
S1 - AddressMap.hi=21BF
BitPos=2E
CPU Resource Allocation
--------------------------------------------------------------------------------------------------------------------------------------------------------------
| StkId | Seg | Bus | Io | IoApic | Mmiol | Mmioh | StkBmp |
--------------------------------------------------------------------------------------------------------------------------------------------------------------
CPU0 | | 0 | 0x00 - 0x7F | 0x0000 - 0x9FFF | 0xFEC00000 - 0xFECFFFFF | 0x90000000 - 0xC8FFFFFF | 0x00002000 00000000 - 0x0000209F FFFFFFFF | 0xF3F |
Ins00 | 0x00 | 0 | 0x00 - 0x14 | 0x0000 - 0x3FFF | 0xFEC00000 - 0xFECFFFFF | 0x90000000 - 0x957FFFFF | 0x00002000 00000000 - 0x0000200F FFFFFFFF | |
Ins01 | 0x01 | 0 | 0x15 - 0x25 | 0x4000 - 0x5FFF | 0xFFFFFFFF - 0x00000000 | 0x95800000 - 0x9F7FFFFF | 0x00002010 00000000 - 0x0000201F FFFFFFFF | |
Ins02 | 0x04 | 0 | 0x26 - 0x36 | 0x6000 - 0x6FFF | 0xFFFFFFFF - 0x00000000 | 0x9F800000 - 0xA93FFFFF | 0x00002020 00000000 - 0x0000202F FFFFFFFF | |
Ins03 | 0x03 | 0 | 0x37 - 0x47 | 0x7000 - 0x7FFF | 0xFFFFFFFF - 0x00000000 | 0xA9400000 - 0xB2FFFFFF | 0x00002030 00000000 - 0x0000203F FFFFFFFF | |
Ins04 | 0x05 | 0 | 0x48 - 0x58 | 0x8000 - 0x8FFF | 0xFFFFFFFF - 0x00000000 | 0xB3000000 - 0xBCBFFFFF | 0x00002040 00000000 - 0x0000204F FFFFFFFF | |
Ins05 | 0x02 | 0 | 0x59 - 0x69 | 0x9000 - 0x9FFF | 0xFFFFFFFF - 0x00000000 | 0xBCC00000 - 0xC67FFFFF | 0x00002050 00000000 - 0x0000205F FFFFFFFF | |
Ins06 | 0x06 | 0 | 0xFF - 0x00 | 0xFFFF - 0x0000 | 0xFFFFFFFF - 0x00000000 | 0xFFFFFFFF - 0x00000000 | 0xFFFFFFFF FFFFFFFF - 0x00000000 00000000 | |
Ins07 | 0x07 | 0 | 0xFF - 0x00 | 0xFFFF - 0x0000 | 0xFFFFFFFF - 0x00000000 | 0xFFFFFFFF - 0x00000000 | 0xFFFFFFFF FFFFFFFF - 0x00000000 00000000 | |
Ins08 | 0x08 | 0 | 0x6A - 0x6E | 0xFFFF - 0x0000 | 0xFFFFFFFF - 0x00000000 | 0xC6800000 - 0xC6FFFFFF | 0x00002060 00000000 - 0x0000206F FFFFFFFF | |
Ins09 | 0x09 | 0 | 0x6F - 0x73 | 0xFFFF - 0x0000 | 0xFFFFFFFF - 0x00000000 | 0xC7000000 - 0xC77FFFFF | 0x00002070 00000000 - 0x0000207F FFFFFFFF | |
Ins10 | 0x0A | 0 | 0x74 - 0x78 | 0xFFFF - 0x0000 | 0xFFFFFFFF - 0x00000000 | 0xC7800000 - 0xC7FFFFFF | 0x00002080 00000000 - 0x0000208F FFFFFFFF | |
Ins11 | 0x0B | 0 | 0x79 - 0x7D | 0xFFFF - 0x0000 | 0xFFFFFFFF - 0x00000000 | 0xC8000000 - 0xC87FFFFF | 0x00002090 00000000 - 0x0000209F FFFFFFFF | |
Rsvd | 0x0C | 0 | 0xFB - 0xFD | 0xFFFF - 0x0000 | 0xFFFFFFFF - 0x00000000 | 0xFFFFFFFF - 0x00000000 | 0xFFFFFFFF FFFFFFFF - 0x00000000 00000000 | |
Ubox | 0x0D | 0 | 0x7E - 0x7F | 0xFFFF - 0x0000 | 0xFFFFFFFF - 0x00000000 | 0xC8800000 - 0xC8FFFFFF | 0xFFFFFFFF FFFFFFFF - 0x00000000 00000000 | |
CPU1 | | 0 | 0x80 - 0xFF | 0xA000 - 0xFFFF | 0xFFFFFFFF - 0x00000000 | 0xC9000000 - 0xFBFFFFFF | 0x000020A0 00000000 - 0x0000213F FFFFFFFF | 0xF3F |
Ins00 | 0x00 | 0 | 0x80 - 0x96 | 0xA000 - 0xAFFF | 0xFFFFFFFF - 0x00000000 | 0xC9000000 - 0xD13FFFFF | 0x000020A0 00000000 - 0x000020AF FFFFFFFF | |
Ins01 | 0x01 | 0 | 0x97 - 0xA6 | 0xB000 - 0xBFFF | 0xFFFFFFFF - 0x00000000 | 0xD1400000 - 0xD97FFFFF | 0x000020B0 00000000 - 0x000020BF FFFFFFFF | |
Ins02 | 0x04 | 0 | 0xA7 - 0xB6 | 0xC000 - 0xCFFF | 0xFFFFFFFF - 0x00000000 | 0xD9800000 - 0xE17FFFFF | 0x000020C0 00000000 - 0x000020CF FFFFFFFF | |
Ins03 | 0x03 | 0 | 0xB7 - 0xC6 | 0xD000 - 0xDFFF | 0xFFFFFFFF - 0x00000000 | 0xE1800000 - 0xE97FFFFF | 0x000020D0 00000000 - 0x000020DF FFFFFFFF | |
Ins04 | 0x05 | 0 | 0xC7 - 0xD6 | 0xE000 - 0xEFFF | 0xFFFFFFFF - 0x00000000 | 0xE9800000 - 0xF17FFFFF | 0x000020E0 00000000 - 0x000020EF FFFFFFFF | |
Ins05 | 0x02 | 0 | 0xD7 - 0xE6 | 0xF000 - 0xFFFF | 0xFFFFFFFF - 0x00000000 | 0xF1800000 - 0xF97FFFFF | 0x000020F0 00000000 - 0x000020FF FFFFFFFF | |
Ins06 | 0x06 | 0 | 0xFF - 0x00 | 0xFFFF - 0x0000 | 0xFFFFFFFF - 0x00000000 | 0xFFFFFFFF - 0x00000000 | 0xFFFFFFFF FFFFFFFF - 0x00000000 00000000 | |
Ins07 | 0x07 | 0 | 0xFF - 0x00 | 0xFFFF - 0x0000 | 0xFFFFFFFF - 0x00000000 | 0xFFFFFFFF - 0x00000000 | 0xFFFFFFFF FFFFFFFF - 0x00000000 00000000 | |
Ins08 | 0x08 | 0 | 0xE7 - 0xEB | 0xFFFF - 0x0000 | 0xFFFFFFFF - 0x00000000 | 0xF9800000 - 0xF9FFFFFF | 0x00002100 00000000 - 0x0000210F FFFFFFFF | |
Ins09 | 0x09 | 0 | 0xEC - 0xF0 | 0xFFFF - 0x0000 | 0xFFFFFFFF - 0x00000000 | 0xFA000000 - 0xFA7FFFFF | 0x00002110 00000000 - 0x0000211F FFFFFFFF | |
Ins10 | 0x0A | 0 | 0xF1 - 0xF5 | 0xFFFF - 0x0000 | 0xFFFFFFFF - 0x00000000 | 0xFA800000 - 0xFAFFFFFF | 0x00002120 00000000 - 0x0000212F FFFFFFFF | |
Ins11 | 0x0B | 0 | 0xF6 - 0xFA | 0xFFFF - 0x0000 | 0xFFFFFFFF - 0x00000000 | 0xFB000000 - 0xFB7FFFFF | 0x00002130 00000000 - 0x0000213F FFFFFFFF | |
Rsvd | 0x0C | 0 | 0xFB - 0xFD | 0xFFFF - 0x0000 | 0xFFFFFFFF - 0x00000000 | 0xFFFFFFFF - 0x00000000 | 0xFFFFFFFF FFFFFFFF - 0x00000000 00000000 | |
Ubox | 0x0D | 0 | 0xFE - 0xFF | 0xFFFF - 0x0000 | 0xFFFFFFFF - 0x00000000 | 0xFB800000 - 0xFBFFFFFF | 0xFFFFFFFF FFFFFFFF - 0x00000000 00000000 | |
******* Calculate Resource Allocation - END *******
******* Check for KTI Topology change across reset - START *******
******* Check for KTI Topology change across reset - END *******
******* Sync Up PBSPs - START *******
Setting Ubox Sticky to save KTI topology to 0x000000000000FF03
Verifying if the remote socket(s) checked-in.
packageBspStepping[0]=4
packageBspStepping[1]=4
******* Sync Up PBSPs - END *******
******* Program Mmcfg and bus numbers - START *******
Initiate S1 update
KtiVar->MmCfgBase = 0x80000000
KtiVar->segmentSocket[0] = 0x00
KtiVar->SocketFirstBus[0] = 0x00
KtiVar->SocketLastBus[0] = 0x7F
KtiVar->SocketMmCfgBase[0]= 0x80000000
KtiVar->segmentSocket[1] = 0x00
KtiVar->SocketFirstBus[1] = 0x80
KtiVar->SocketLastBus[1] = 0xFF
KtiVar->SocketMmCfgBase[1]= 0x80000000
Current bus numbers:
Socket | Ins00 | Ins01 | Ins02 | Ins03 | Ins04 | Ins05 | Ins06 | Ins07 | Ins08 | Ins09 | Ins0A | Ins0B | Rsvd | Ubox0 | Ubox1 | LastBus | Seg
-----------------------------------------------------------------------------------------------------------------------------------------------
0 | 0x00 | 0x15 | 0x26 | 0x37 | 0x48 | 0x59 | --- | --- | 0x6A | 0x6F | 0x74 | 0x79 | --- | 0x7E | 0x7F | 0x7F | 0
1 | 0x80 | 0x97 | 0xA7 | 0xB7 | 0xC7 | 0xD7 | --- | --- | 0xE7 | 0xEC | 0xF1 | 0xF6 | --- | 0xFE | 0xFF | 0xFF | 0
-----------------------------------------------------------------------------------------------------------------------------------------------
Wait for S1 to update
******* Program Mmcfg and bus numbers - END *******
Current Bars:
Socket | SCF | PCU | MEM0 | MEM1 | MEM2 | MEM3 | MEM4 | MEM5 | MEM6 | MEM7 | SBREG |
-------------------------------------------------------------------------------------------------------------------------------------------------------
0 | 0xC8800000 | 0xC8A00000 | 0xC8A80000 | 0xC8B00000 | 0xC8B80000 | 0xC8C00000 | 0xC8C80000 | 0xC8D00000 | 0xC8D80000 | 0xC8E00000 | 0xC8E80000 |
1 | 0xFB800000 | 0xFBA00000 | 0xFBA80000 | 0xFBB00000 | 0xFBB80000 | 0xFBC00000 | 0xFBC80000 | 0xFBD00000 | 0xFBD80000 | 0xFBE00000 | 0xFBE80000 |
-------------------------------------------------------------------------------------------------------------------------------------------------------
******* Full Speed Transition - START *******
Clearing KTI DFX Locks
****** S0p0 Program Eparams - START ******
S0 P0's Preset Coeff table, all lane table size: 0x0; per lane table size: 0x10
Per Lane Preset coeffcients Index table located for Socket 0 Link 0, RedriverStatus: 0
Socket 0 Port 0 : EPARAM entry programmed
IpUpiSetTxCoefficient(UpiAgent[0][0]): 4B01
****** S0p0 Program Eparams - END ******
****** S0p0 Program UniPhy Recipe - START ******
Socket 0 Port 0 : UPI EV Recipe v2.009 programmed
****** S0p0 Program UniPhy Recipe - END ******
IpUpiGetCapability(UpiAgent[0][0], id=12):
IpUpiVersionSpecificConfigurationEnabled: unknown ID=2
IpWrError 0 49
IpUpiSpeedChangePart1(UpiAgent[0][0]):
IpUpiVersionSpecificConfigurationEnabled: unknown ID=1
IpWrError 0 49
IpUpiVersionSpecificConfigurationEnabled: unknown ID=3
IpWrError 0 49
IpUpiVersionSpecificConfigurationEnabled: unknown ID=4
IpWrError 0 49
IpUpiVersionSpecificConfigurationEnabled: unknown ID=6
IpWrError 0 49
IpUpiDfxSetValue(0, 4, 0x8A)
****** S0p1 Program Eparams - START ******
S0 P1's Preset Coeff table, all lane table size: 0x0; per lane table size: 0x10
Per Lane Preset coeffcients Index table located for Socket 0 Link 1, RedriverStatus: 0
Socket 0 Port 1 : EPARAM entry programmed
IpUpiSetTxCoefficient(UpiAgent[0][1]): 4B01
****** S0p1 Program Eparams - END ******
****** S0p1 Program UniPhy Recipe - START ******
Socket 0 Port 1 : UPI EV Recipe v2.009 programmed
****** S0p1 Program UniPhy Recipe - END ******
IpUpiGetCapability(UpiAgent[0][1], id=12):
IpUpiVersionSpecificConfigurationEnabled: unknown ID=2
IpWrError 0 49
IpUpiSpeedChangePart1(UpiAgent[0][1]):
IpUpiVersionSpecificConfigurationEnabled: unknown ID=1
IpWrError 0 49
IpUpiVersionSpecificConfigurationEnabled: unknown ID=3
IpWrError 0 49
IpUpiVersionSpecificConfigurationEnabled: unknown ID=4
IpWrError 0 49
IpUpiVersionSpecificConfigurationEnabled: unknown ID=6
IpWrError 0 49
IpUpiDfxSetValue(0, 4, 0x8A)
****** S0p2 Program Eparams - START ******
S0 P2's Preset Coeff table, all lane table size: 0x0; per lane table size: 0x10
Per Lane Preset coeffcients Index table located for Socket 0 Link 2, RedriverStatus: 0
Socket 0 Port 2 : EPARAM entry programmed
IpUpiSetTxCoefficient(UpiAgent[0][2]): 4B01
****** S0p2 Program Eparams - END ******
****** S0p2 Program UniPhy Recipe - START ******
Socket 0 Port 2 : UPI EV Recipe v2.009 programmed
****** S0p2 Program UniPhy Recipe - END ******
IpUpiGetCapability(UpiAgent[0][2], id=12):
IpUpiVersionSpecificConfigurationEnabled: unknown ID=2
IpWrError 0 49
IpUpiSpeedChangePart1(UpiAgent[0][2]):
IpUpiVersionSpecificConfigurationEnabled: unknown ID=1
IpWrError 0 49
IpUpiVersionSpecificConfigurationEnabled: unknown ID=3
IpWrError 0 49
IpUpiVersionSpecificConfigurationEnabled: unknown ID=4
IpWrError 0 49
IpUpiVersionSpecificConfigurationEnabled: unknown ID=6
IpWrError 0 49
IpUpiDfxSetValue(0, 4, 0x8A)
****** S0p3 Program Eparams - START ******
S0 P3's Preset Coeff table, all lane table size: 0x0; per lane table size: 0x10
Per Lane Preset coeffcients Index table located for Socket 0 Link 3, RedriverStatus: 0
Socket 0 Port 3 : EPARAM entry programmed
IpUpiSetTxCoefficient(UpiAgent[0][3]): 4B01
****** S0p3 Program Eparams - END ******
****** S0p3 Program UniPhy Recipe - START ******
Socket 0 Port 3 : UPI EV Recipe v2.009 programmed
****** S0p3 Program UniPhy Recipe - END ******
IpUpiGetCapability(UpiAgent[0][3], id=12):
IpUpiVersionSpecificConfigurationEnabled: unknown ID=2
IpWrError 0 49
IpUpiSpeedChangePart1(UpiAgent[0][3]):
IpUpiVersionSpecificConfigurationEnabled: unknown ID=1
IpWrError 0 49
IpUpiVersionSpecificConfigurationEnabled: unknown ID=3
IpWrError 0 49
IpUpiVersionSpecificConfigurationEnabled: unknown ID=4
IpWrError 0 49
IpUpiVersionSpecificConfigurationEnabled: unknown ID=6
IpWrError 0 49
IpUpiDfxSetValue(0, 4, 0x8A)
****** S1p0 Program Eparams - START ******
S1 P0's Preset Coeff table, all lane table size: 0x0; per lane table size: 0x10
Per Lane Preset coeffcients Index table located for Socket 1 Link 0, RedriverStatus: 0
Socket 1 Port 0 : EPARAM entry programmed
IpUpiSetTxCoefficient(UpiAgent[1][0]): 4B01
****** S1p0 Program Eparams - END ******
****** S1p0 Program UniPhy Recipe - START ******
Socket 1 Port 0 : UPI EV Recipe v2.009 programmed
****** S1p0 Program UniPhy Recipe - END ******
IpUpiGetCapability(UpiAgent[1][0], id=12):
IpUpiVersionSpecificConfigurationEnabled: unknown ID=2
IpWrError 0 49
IpUpiSpeedChangePart1(UpiAgent[1][0]):
IpUpiVersionSpecificConfigurationEnabled: unknown ID=1
IpWrError 0 49
IpUpiVersionSpecificConfigurationEnabled: unknown ID=3
IpWrError 0 49
IpUpiVersionSpecificConfigurationEnabled: unknown ID=4
IpWrError 0 49
IpUpiVersionSpecificConfigurationEnabled: unknown ID=6
IpWrError 0 49
IpUpiDfxSetValue(0, 4, 0x8A)
****** S1p1 Program Eparams - START ******
S1 P1's Preset Coeff table, all lane table size: 0x0; per lane table size: 0x10
Per Lane Preset coeffcients Index table located for Socket 1 Link 1, RedriverStatus: 0
Socket 1 Port 1 : EPARAM entry programmed
IpUpiSetTxCoefficient(UpiAgent[1][1]): 4B01
****** S1p1 Program Eparams - END ******
****** S1p1 Program UniPhy Recipe - START ******
Socket 1 Port 1 : UPI EV Recipe v2.009 programmed
****** S1p1 Program UniPhy Recipe - END ******
IpUpiGetCapability(UpiAgent[1][1], id=12):
IpUpiVersionSpecificConfigurationEnabled: unknown ID=2
IpWrError 0 49
IpUpiSpeedChangePart1(UpiAgent[1][1]):
IpUpiVersionSpecificConfigurationEnabled: unknown ID=1
IpWrError 0 49
IpUpiVersionSpecificConfigurationEnabled: unknown ID=3
IpWrError 0 49
IpUpiVersionSpecificConfigurationEnabled: unknown ID=4
IpWrError 0 49
IpUpiVersionSpecificConfigurationEnabled: unknown ID=6
IpWrError 0 49
IpUpiDfxSetValue(0, 4, 0x8A)
****** S1p2 Program Eparams - START ******
S1 P2's Preset Coeff table, all lane table size: 0x0; per lane table size: 0x10
Per Lane Preset coeffcients Index table located for Socket 1 Link 2, RedriverStatus: 0
Socket 1 Port 2 : EPARAM entry programmed
IpUpiSetTxCoefficient(UpiAgent[1][2]): 4B01
****** S1p2 Program Eparams - END ******
****** S1p2 Program UniPhy Recipe - START ******
Socket 1 Port 2 : UPI EV Recipe v2.009 programmed
****** S1p2 Program UniPhy Recipe - END ******
IpUpiGetCapability(UpiAgent[1][2], id=12):
IpUpiVersionSpecificConfigurationEnabled: unknown ID=2
IpWrError 0 49
IpUpiSpeedChangePart1(UpiAgent[1][2]):
IpUpiVersionSpecificConfigurationEnabled: unknown ID=1
IpWrError 0 49
IpUpiVersionSpecificConfigurationEnabled: unknown ID=3
IpWrError 0 49
IpUpiVersionSpecificConfigurationEnabled: unknown ID=4
IpWrError 0 49
IpUpiVersionSpecificConfigurationEnabled: unknown ID=6
IpWrError 0 49
IpUpiDfxSetValue(0, 4, 0x8A)
****** S1p3 Program Eparams - START ******
S1 P3's Preset Coeff table, all lane table size: 0x0; per lane table size: 0x10
Per Lane Preset coeffcients Index table located for Socket 1 Link 3, RedriverStatus: 0
Socket 1 Port 3 : EPARAM entry programmed
IpUpiSetTxCoefficient(UpiAgent[1][3]): 4B01
****** S1p3 Program Eparams - END ******
****** S1p3 Program UniPhy Recipe - START ******
Socket 1 Port 3 : UPI EV Recipe v2.009 programmed
****** S1p3 Program UniPhy Recipe - END ******
IpUpiGetCapability(UpiAgent[1][3], id=12):
IpUpiVersionSpecificConfigurationEnabled: unknown ID=2
IpWrError 0 49
IpUpiSpeedChangePart1(UpiAgent[1][3]):
IpUpiVersionSpecificConfigurationEnabled: unknown ID=1
IpWrError 0 49
IpUpiVersionSpecificConfigurationEnabled: unknown ID=3
IpWrError 0 49
IpUpiVersionSpecificConfigurationEnabled: unknown ID=4
IpWrError 0 49
IpUpiVersionSpecificConfigurationEnabled: unknown ID=6
IpWrError 0 49
IpUpiDfxSetValue(0, 4, 0x8A)
Dispatching the APs to do Kti Speed Transition.
Dispatching the AP 1's for switching to the AllLinksRatio: 14141414IpUpiSpeedChangePart2(UpiAgent[0][0]):
IpUpiSpeedChangePart2a(UpiAgent[0][0]):
IpUpiSpeedChangePart2b(UpiAgent[0][0]):
IpUpiSpeedChangePart2(UpiAgent[0][1]):
IpUpiSpeedChangePart2a(UpiAgent[0][1]):
IpUpiSpeedChangePart2b(UpiAgent[0][1]):
IpUpiSpeedChangePart2(UpiAgent[0][2]):
IpUpiSpeedChangePart2a(UpiAgent[0][2]):
IpUpiSpeedChangePart2b(UpiAgent[0][2]):
IpUpiSpeedChangePart2(UpiAgent[0][3]):
IpUpiSpeedChangePart2a(UpiAgent[0][3]):
IpUpiSpeedChangePart2b(UpiAgent[0][3]):
IpUpiSpeedChangePart3(UpiAgent[0][0]):
IpUpiSpeedChangePart3(UpiAgent[0][1]):
IpUpiSpeedChangePart3(UpiAgent[0][2]):
IpUpiSpeedChangePart3(UpiAgent[0][3]):
Socket 0 KTI Link 0 Freq is currently 16.0GT.
Socket 0 KTI Link 1 Freq is currently 16.0GT.
Socket 0 KTI Link 2 Freq is currently 16.0GT.
Socket 0 KTI Link 3 Freq is currently 16.0GT.
Socket 1 KTI Link 0 Freq is currently 16.0GT.
Socket 1 KTI Link 1 Freq is currently 16.0GT.
Socket 1 KTI Link 2 Freq is currently 16.0GT.
Socket 1 KTI Link 3 Freq is currently 16.0GT.
******* Full Speed Transition - END *******
******* Phy/Link Updates On Warm Reset - START *******
******* Phy/Link Updates On Warm Reset - END *******
******* Topology Discovery and Optimum Route Calculation - START *******
Locating the Rings Present in the Topology
No Rings Found
Constructing Topology Tree
Adjacency Table
----------------
S0 P0 VN0 TX (00) : S1 P0 VN0 RX (17)
S0 P0 VN0 RX (01) :
S1 P0 VN0 TX (16) : S0 P0 VN0 RX (01)
S1 P0 VN0 RX (17) :
Checking for Deadlock...
CPU0 Topology Tree
-------------------
Index Socket ParentSocket ParentPort ParentIndex Hop XOR
00 CPU0 -- -- -- 0 --
01 CPU1 CPU0 00 00 1 0
CPU1 Topology Tree
-------------------
Index Socket ParentSocket ParentPort ParentIndex Hop XOR
00 CPU1 -- -- -- 0 --
01 CPU0 CPU1 00 00 1 0
"S0 P0 VN0 TX" -> "S1 P0 VN0 RX";
"S1 P0 VN0 TX" -> "S0 P0 VN0 RX";
Calculating Route for CPU0
Calculating Route for CPU1
CPU0 Routing Table (UPI_ROUTING_TABLE*_CHA)
----------------------------------------------------
DestSocket Port
CPU1 0
1
2
3
CPU1 Routing Table (UPI_ROUTING_TABLE*_CHA)
----------------------------------------------------
DestSocket Port
CPU0 0
1
2
3
CPU0 M3KTI Route Table (M3KKRT*_M3KTI_MAIN_REG)
----------------------------------------------------------------
InPort M3KtiNum CPU0 CPU1 CPU2 CPU3 CPU4 CPU5 CPU6 CPU7
0 0 3 0 - -
1 1 3 0 - -
2 2 3 0 - -
3 3 3 0 - -
CPU1 M3KTI Route Table (M3KKRT*_M3KTI_MAIN_REG)
----------------------------------------------------------------
InPort M3KtiNum CPU0 CPU1 CPU2 CPU3 CPU4 CPU5 CPU6 CPU7
0 0 0 3 - -
1 1 0 3 - -
2 2 0 3 - -
3 3 0 3 - -
******* Topology Discovery and Optimum Route Calculation - END *******
******* Program Final IO SAD Setting - START *******
Current Bars:
Socket | SCF | PCU | MEM0 | MEM1 | MEM2 | MEM3 | MEM4 | MEM5 | MEM6 | MEM7 | SBREG |
-------------------------------------------------------------------------------------------------------------------------------------------------------
0 | 0xC8800000 | 0xC8A00000 | 0xC8A80000 | 0xC8B00000 | 0xC8B80000 | 0xC8C00000 | 0xC8C80000 | 0xC8D00000 | 0xC8D80000 | 0xC8E00000 | 0xC8E80000 |
1 | 0xFB800000 | 0xFBA00000 | 0xFBA80000 | 0xFBB00000 | 0xFBB80000 | 0xFBC00000 | 0xFBC80000 | 0xFBD00000 | 0xFBD80000 | 0xFBE00000 | 0xFBE80000 |
-------------------------------------------------------------------------------------------------------------------------------------------------------
******* Program Final IO SAD Setting - END *******
******* Program Optimum Route Table Settings - START *******
[WARNING]: S0 StackIdx:0 Read of side band register R2PGNCTRL returned 0
[WARNING]: S0 StackIdx:1 Read of side band register R2PGNCTRL returned 0
[WARNING]: S0 StackIdx:2 Read of side band register R2PGNCTRL returned 0
[WARNING]: S0 StackIdx:3 Read of side band register R2PGNCTRL returned 0
[WARNING]: S0 StackIdx:4 Read of side band register R2PGNCTRL returned 0
[WARNING]: S0 StackIdx:5 Read of side band register R2PGNCTRL returned 0
[WARNING]: S0 StackIdx:8 Read of side band register R2PGNCTRL returned 0
[WARNING]: S0 StackIdx:9 Read of side band register R2PGNCTRL returned 0
[WARNING]: S0 StackIdx:10 Read of side band register R2PGNCTRL returned 0
[WARNING]: S0 StackIdx:11 Read of side band register R2PGNCTRL returned 0
[WARNING]: S1 StackIdx:0 Read of side band register R2PGNCTRL returned 0
[WARNING]: S1 StackIdx:1 Read of side band register R2PGNCTRL returned 0
[WARNING]: S1 StackIdx:2 Read of side band register R2PGNCTRL returned 0
[WARNING]: S1 StackIdx:3 Read of side band register R2PGNCTRL returned 0
[WARNING]: S1 StackIdx:4 Read of side band register R2PGNCTRL returned 0
[WARNING]: S1 StackIdx:5 Read of side band register R2PGNCTRL returned 0
[WARNING]: S1 StackIdx:8 Read of side band register R2PGNCTRL returned 0
[WARNING]: S1 StackIdx:9 Read of side band register R2PGNCTRL returned 0
[WARNING]: S1 StackIdx:10 Read of side band register R2PGNCTRL returned 0
[WARNING]: S1 StackIdx:11 Read of side band register R2PGNCTRL returned 0
******* Program Optimum Route Table Settings - END *******
******* Program Misc. KTI Parameters - START *******
Dispatching the AP 1's for m2upi meshcreditupdate: FBE8000F
******* Program Misc. KTI Parameters - END *******
******* Program System Coherency Registers - START *******
******* Program System Coherency Registers - END *******
******* Check for S3 Resume - START *******
******* Check for S3 Resume - END *******
******* SNC Misc and Recovery - START *******
OutNumOfCluster = 4, FullSncEnable=1, SncIndEnable=1, NumClusters=3
OutNumOfCluster = 4, FullSncEnable=1, SncIndEnable=1, NumClusters=3
******* SNC Misc and Recovery - END *******
******* Collect Previous Boot Error - START *******
******* Collect Previous Boot Error - END *******
Setup Uncore Misc:
Write Socket 0 GLOBAL_PKG_C_S_CONTROL_REGISTER = 4
Write Socket 1 GLOBAL_PKG_C_S_CONTROL_REGISTER = 100
:INIT - BIOS_RESET_CPL: Set CPL1 on #S1
:INIT - BIOS_RESET_CPL: Set CPL1 on #S0
Initalize DMI RCRB region.
SetRcrbBar (): RcrbBase = 0x90000000
Warning: Created a Memory Hole: 0x90002000 ~ 0x9001FFFF
MEMBAR0: Base = 0x90020000, Size = 0x20000
Socket: 0;DMI MemBar locates on 0x90020000, Size: 0x20000
ProgramSncConfigureInChaBeforeMemoryReady
Socket0: NumOfCluster=4, UmaEn=0, BaseChaOfCluster1=13, BaseChaOfCluster2=26, BaseChaOfCluster3=39
Socket1: NumOfCluster=4, UmaEn=0, BaseChaOfCluster1=13, BaseChaOfCluster2=26, BaseChaOfCluster3=39
******* Configure M2IOSF P2P Credits - START *******
Soc 0, Shared P2P BL VNA credits: 59595959, 5959, 59595959, 61616161.
Soc 1, Shared P2P BL VNA credits: 59595959, 5959, 59595959, 61616161.
******* Configure M2IOSF P2P Credits - END *******
*******SOCKET1 STACKID SWAPPING - START *******
*******SOCKET1 STACKID SWAPPING - END *******
Current bus numbers:
Socket | Ins00 | Ins01 | Ins02 | Ins03 | Ins04 | Ins05 | Ins06 | Ins07 | Ins08 | Ins09 | Ins0A | Ins0B | Rsvd | Ubox0 | Ubox1 | LastBus | Seg
-----------------------------------------------------------------------------------------------------------------------------------------------
0 | 0x00 | 0x15 | 0x26 | 0x37 | 0x48 | 0x59 | --- | --- | 0x6A | 0x6F | 0x74 | 0x79 | --- | 0x7E | 0x7F | 0x7F | 0
1 | --- | 0x97 | 0xA7 | 0xB7 | 0xC7 | 0xD7 | 0x80 | --- | 0xE7 | 0xEC | 0xF1 | 0xF6 | --- | 0xFE | 0xFF | 0xFF | 0
-----------------------------------------------------------------------------------------------------------------------------------------------
Get FM_PCIE_FV_BIF_EN Status = Success, GpioVal = 0
******* Initialize CXL - START *******
CXL: IIO EarlyLink Init Start.
HcxType[0] = NONE
[IIO](VMD) [0] VMD disabled for RPs init.
Program HW_INIT using SB access
Program HW_INIT using SB access
Program HW_INIT using SB access
Program HW_INIT using SB access
Program HW_INIT using SB access
Program HW_INIT using SB access
Program HW_INIT using SB access
Program HW_INIT using SB access
Program HW_INIT using SB access
[0] Cpxsmb enabled
MS2IOSF_BANK_DECODER_INIT_START
MS2IOSF BankDecoder: TableSize 119, Recipe Revision 1.16
Hiding DSA Psf1DsaConfig: 0
Hiding DSA Psf1DsaConfig: 0
Hiding DSA Psf1DsaConfig: 0
Hiding DSA Psf1DsaConfig: 0
Hiding DSA Psf1DsaConfig: 100
Hiding DSA Psf1DsaConfig: 100
Hiding DSA Psf1DsaConfig: 100
Hiding DSA Psf1DsaConfig: 100
Hiding DSA Psf1DsaConfig: 100
Hiding DSA Psf1DsaConfig: 100
Hiding DSA Psf1DsaConfig: 100
Hiding DSA Psf1DsaConfig: 100
Hiding DSA Psf1DsaConfig: 100
Hiding DSA Psf1DsaConfig: 100
Hiding DSA Psf1DsaConfig: 100
Hiding DSA Psf1DsaConfig: 100
Hiding DSA Psf1DsaConfig: 100
Hiding DSA Psf1DsaConfig: 100
Hiding DSA Psf1DsaConfig: 100
Hiding DSA Psf1DsaConfig: 100
Hiding DSA Psf1DsaConfig: 100
Hiding DSA Psf1DsaConfig: 100
Hiding DSA Psf1DsaConfig: 100
Hiding DSA Psf1DsaConfig: 100
Hiding DSA Psf1DsaConfig: 100
Hiding DSA Psf1DsaConfig: 100
Hiding DSA Psf1DsaConfig: 100
Hiding DSA Psf1DsaConfig: 100
Hiding DSA Psf1DsaConfig: 100
Hiding DSA Psf1DsaConfig: 100
Hiding DSA Psf1DsaConfig: 100
Hiding DSA Psf1DsaConfig: 100
Hiding DSA Psf1DsaConfig: 100
Hiding DSA Psf1DsaConfig: 100
Hiding DSA Psf1DsaConfig: 100
Hiding DSA Psf1DsaConfig: 100
Hiding DSA Psf1DsaConfig: 100
Hiding DSA Psf1DsaConfig: 100
Hiding DSA Psf1DsaConfig: 100
Hiding DSA Psf1DsaConfig: 100
Hiding DSA Psf1DsaConfig: 100
Hiding DSA Psf1DsaConfig: 100
Hiding DSA Psf1DsaConfig: 100
Hiding DSA Psf1DsaConfig: 100
Hiding DSA Psf1DsaConfig: 100
Hiding DSA Psf1DsaConfig: 100
Hiding DSA Psf1DsaConfig: 100
Hiding DSA Psf1DsaConfig: 100
Hiding DSA Psf1DsaConfig: 100
Hiding DSA Psf1DsaConfig: 100
Hiding DSA Psf1DsaConfig: 100
Hiding DSA Psf1DsaConfig: 100
Hiding DSA Psf1DsaConfig: 100
Hiding DSA Psf1DsaConfig: 100
Hiding DSA Psf1DsaConfig: 100
Hiding DSA Psf1DsaConfig: 100
Hiding IAX Psf1IaxConfig: 0
Hiding IAX Psf1IaxConfig: 0
Hiding IAX Psf1IaxConfig: 0
Hiding IAX Psf1IaxConfig: 0
Hiding IAX Psf1IaxConfig: 100
Hiding IAX Psf1IaxConfig: 100
Hiding IAX Psf1IaxConfig: 100
Hiding IAX Psf1IaxConfig: 100
Hiding IAX Psf1IaxConfig: 100
Hiding IAX Psf1IaxConfig: 100
Hiding IAX Psf1IaxConfig: 100
Hiding IAX Psf1IaxConfig: 100
Hiding IAX Psf1IaxConfig: 100
Hiding IAX Psf1IaxConfig: 100
Hiding IAX Psf1IaxConfig: 100
Hiding IAX Psf1IaxConfig: 100
Hiding IAX Psf1IaxConfig: 100
Hiding IAX Psf1IaxConfig: 100
Hiding IAX Psf1IaxConfig: 100
Hiding IAX Psf1IaxConfig: 100
Hiding IAX Psf1IaxConfig: 100
Hiding IAX Psf1IaxConfig: 100
Hiding IAX Psf1IaxConfig: 100
Hiding IAX Psf1IaxConfig: 100
Hiding IAX Psf1IaxConfig: 100
Hiding IAX Psf1IaxConfig: 100
Hiding IAX Psf1IaxConfig: 100
Hiding IAX Psf1IaxConfig: 100
Hiding IAX Psf1IaxConfig: 100
Hiding IAX Psf1IaxConfig: 100
Hiding IAX Psf1IaxConfig: 100
Hiding IAX Psf1IaxConfig: 100
Hiding IAX Psf1IaxConfig: 100
Hiding IAX Psf1IaxConfig: 100
Hiding IAX Psf1IaxConfig: 100
Hiding IAX Psf1IaxConfig: 100
Hiding IAX Psf1IaxConfig: 100
Hiding IAX Psf1IaxConfig: 100
Hiding IAX Psf1IaxConfig: 100
Hiding IAX Psf1IaxConfig: 100
Hiding IAX Psf1IaxConfig: 100
Hiding IAX Psf1IaxConfig: 100
Hiding IAX Psf1IaxConfig: 100
Hiding IAX Psf1IaxConfig: 100
Hiding IAX Psf1IaxConfig: 100
Hiding IAX Psf1IaxConfig: 100
Hiding IAX Psf1IaxConfig: 100
Hiding IAX Psf1IaxConfig: 100
Hiding IAX Psf1IaxConfig: 100
Hiding IAX Psf1IaxConfig: 100
Hiding IAX Psf1IaxConfig: 100
Hiding IAX Psf1IaxConfig: 100
Hiding IAX Psf1IaxConfig: 100
Hiding IAX Psf1IaxConfig: 100
Hiding IAX Psf1IaxConfig: 100
Hiding IAX Psf1IaxConfig: 100
MS2IOSF_BANK_DECODER_INIT_END
[0 p0] DMI device is enabled
[0.1 p1] 00:15:01.0: PCI device 8086:352A is enabled
[0.1 p2] 00:15:02.0: PCI device FFFF:FFFF is disabled (not present)
[0.1 p3] 00:15:03.0: PCI device FFFF:FFFF is disabled (not present)
[0.1 p4] 00:15:04.0: PCI device FFFF:FFFF is disabled (not present)
[0.1 p5] 00:15:05.0: PCI device FFFF:FFFF is disabled (not present)
[0.1 p6] 00:15:06.0: PCI device FFFF:FFFF is disabled (not present)
[0.1 p7] 00:15:07.0: PCI device FFFF:FFFF is disabled (not present)
[0.1 p8] 00:15:08.0: PCI device FFFF:FFFF is disabled (not present)
[0.2 p9] 00:26:01.0: PCI device 8086:352A is enabled
[0.2 p10] 00:26:02.0: PCI device FFFF:FFFF is disabled (not present)
[0.2 p11] 00:26:03.0: PCI device FFFF:FFFF is disabled (not present)
[0.2 p12] 00:26:04.0: PCI device FFFF:FFFF is disabled (not present)
[0.2 p13] 00:26:05.0: PCI device FFFF:FFFF is disabled (not present)
[0.2 p14] 00:26:06.0: PCI device FFFF:FFFF is disabled (not present)
[0.2 p15] 00:26:07.0: PCI device FFFF:FFFF is disabled (not present)
[0.2 p16] 00:26:08.0: PCI device FFFF:FFFF is disabled (not present)
[0.3 p17] 00:37:01.0: PCI device 8086:352A is enabled
[0.3 p18] 00:37:02.0: PCI device FFFF:FFFF is disabled (not present)
[0.3 p19] 00:37:03.0: PCI device FFFF:FFFF is disabled (not present)
[0.3 p20] 00:37:04.0: PCI device FFFF:FFFF is disabled (not present)
[0.3 p21] 00:37:05.0: PCI device FFFF:FFFF is disabled (not present)
[0.3 p22] 00:37:06.0: PCI device FFFF:FFFF is disabled (not present)
[0.3 p23] 00:37:07.0: PCI device FFFF:FFFF is disabled (not present)
[0.3 p24] 00:37:08.0: PCI device FFFF:FFFF is disabled (not present)
[0.4 p25] 00:48:01.0: PCI device 8086:352A is enabled
[0.4 p26] 00:48:02.0: PCI device FFFF:FFFF is disabled (not present)
[0.4 p27] 00:48:03.0: PCI device 8086:352B is enabled
[0.4 p28] 00:48:04.0: PCI device FFFF:FFFF is disabled (not present)
[0.4 p29] 00:48:05.0: PCI device 8086:352C is enabled
[0.4 p30] 00:48:06.0: PCI device FFFF:FFFF is disabled (not present)
[0.4 p31] 00:48:07.0: PCI device 8086:352D is enabled
[0.4 p32] 00:48:08.0: PCI device FFFF:FFFF is disabled (not present)
[0.5 p33] 00:59:01.0: PCI device 8086:352A is enabled
[0.5 p34] 00:59:02.0: PCI device FFFF:FFFF is disabled (not present)
[0.5 p35] 00:59:03.0: PCI device 8086:352B is enabled
[0.5 p36] 00:59:04.0: PCI device FFFF:FFFF is disabled (not present)
[0.5 p37] 00:59:05.0: PCI device 8086:352C is enabled
[0.5 p38] 00:59:06.0: PCI device FFFF:FFFF is disabled (not present)
[0.5 p39] 00:59:07.0: PCI device 8086:352D is enabled
[0.5 p40] 00:59:08.0: PCI device FFFF:FFFF is disabled (not present)
WARNING: Platform does not support uplink port!
HcxType[1] = NONE
[IIO](VMD) [1] VMD disabled for RPs init.
Program HW_INIT using SB access
Program HW_INIT using SB access
Program HW_INIT using SB access
Program HW_INIT using SB access
Program HW_INIT using SB access
Program HW_INIT using SB access
Program HW_INIT using SB access
Program HW_INIT using SB access
Program HW_INIT using SB access
Program HW_INIT using SB access
[1] Cpxsmb enabled
MS2IOSF_BANK_DECODER_INIT_START
MS2IOSF BankDecoder: TableSize 119, Recipe Revision 1.16
Hiding DSA Psf1DsaConfig: 0
Hiding DSA Psf1DsaConfig: 0
Hiding DSA Psf1DsaConfig: 0
Hiding DSA Psf1DsaConfig: 0
Hiding DSA Psf1DsaConfig: 100
Hiding DSA Psf1DsaConfig: 100
Hiding DSA Psf1DsaConfig: 100
Hiding DSA Psf1DsaConfig: 100
Hiding DSA Psf1DsaConfig: 100
Hiding DSA Psf1DsaConfig: 100
Hiding DSA Psf1DsaConfig: 100
Hiding DSA Psf1DsaConfig: 100
Hiding DSA Psf1DsaConfig: 100
Hiding DSA Psf1DsaConfig: 100
Hiding DSA Psf1DsaConfig: 100
Hiding DSA Psf1DsaConfig: 100
Hiding DSA Psf1DsaConfig: 100
Hiding DSA Psf1DsaConfig: 100
Hiding DSA Psf1DsaConfig: 100
Hiding DSA Psf1DsaConfig: 100
Hiding DSA Psf1DsaConfig: 100
Hiding DSA Psf1DsaConfig: 100
Hiding DSA Psf1DsaConfig: 100
Hiding DSA Psf1DsaConfig: 100
Hiding DSA Psf1DsaConfig: 100
Hiding DSA Psf1DsaConfig: 100
Hiding DSA Psf1DsaConfig: 100
Hiding DSA Psf1DsaConfig: 100
Hiding DSA Psf1DsaConfig: 100
Hiding DSA Psf1DsaConfig: 100
Hiding DSA Psf1DsaConfig: 100
Hiding DSA Psf1DsaConfig: 100
Hiding DSA Psf1DsaConfig: 100
Hiding DSA Psf1DsaConfig: 100
Hiding DSA Psf1DsaConfig: 100
Hiding DSA Psf1DsaConfig: 100
Hiding DSA Psf1DsaConfig: 100
Hiding DSA Psf1DsaConfig: 100
Hiding DSA Psf1DsaConfig: 100
Hiding DSA Psf1DsaConfig: 100
Hiding DSA Psf1DsaConfig: 100
Hiding DSA Psf1DsaConfig: 100
Hiding DSA Psf1DsaConfig: 100
Hiding DSA Psf1DsaConfig: 100
Hiding DSA Psf1DsaConfig: 100
Hiding DSA Psf1DsaConfig: 100
Hiding DSA Psf1DsaConfig: 100
Hiding DSA Psf1DsaConfig: 100
Hiding DSA Psf1DsaConfig: 100
Hiding DSA Psf1DsaConfig: 100
Hiding DSA Psf1DsaConfig: 100
Hiding DSA Psf1DsaConfig: 100
Hiding DSA Psf1DsaConfig: 100
Hiding DSA Psf1DsaConfig: 100
Hiding DSA Psf1DsaConfig: 100
Hiding DSA Psf1DsaConfig: 100
Hiding IAX Psf1IaxConfig: 0
Hiding IAX Psf1IaxConfig: 0
Hiding IAX Psf1IaxConfig: 0
Hiding IAX Psf1IaxConfig: 0
Hiding IAX Psf1IaxConfig: 100
Hiding IAX Psf1IaxConfig: 100
Hiding IAX Psf1IaxConfig: 100
Hiding IAX Psf1IaxConfig: 100
Hiding IAX Psf1IaxConfig: 100
Hiding IAX Psf1IaxConfig: 100
Hiding IAX Psf1IaxConfig: 100
Hiding IAX Psf1IaxConfig: 100
Hiding IAX Psf1IaxConfig: 100
Hiding IAX Psf1IaxConfig: 100
Hiding IAX Psf1IaxConfig: 100
Hiding IAX Psf1IaxConfig: 100
Hiding IAX Psf1IaxConfig: 100
Hiding IAX Psf1IaxConfig: 100
Hiding IAX Psf1IaxConfig: 100
Hiding IAX Psf1IaxConfig: 100
Hiding IAX Psf1IaxConfig: 100
Hiding IAX Psf1IaxConfig: 100
Hiding IAX Psf1IaxConfig: 100
Hiding IAX Psf1IaxConfig: 100
Hiding IAX Psf1IaxConfig: 100
Hiding IAX Psf1IaxConfig: 100
Hiding IAX Psf1IaxConfig: 100
Hiding IAX Psf1IaxConfig: 100
Hiding IAX Psf1IaxConfig: 100
Hiding IAX Psf1IaxConfig: 100
Hiding IAX Psf1IaxConfig: 100
Hiding IAX Psf1IaxConfig: 100
Hiding IAX Psf1IaxConfig: 100
Hiding IAX Psf1IaxConfig: 100
Hiding IAX Psf1IaxConfig: 100
Hiding IAX Psf1IaxConfig: 100
Hiding IAX Psf1IaxConfig: 100
Hiding IAX Psf1IaxConfig: 100
Hiding IAX Psf1IaxConfig: 100
Hiding IAX Psf1IaxConfig: 100
Hiding IAX Psf1IaxConfig: 100
Hiding IAX Psf1IaxConfig: 100
Hiding IAX Psf1IaxConfig: 100
Hiding IAX Psf1IaxConfig: 100
Hiding IAX Psf1IaxConfig: 100
Hiding IAX Psf1IaxConfig: 100
Hiding IAX Psf1IaxConfig: 100
Hiding IAX Psf1IaxConfig: 100
Hiding IAX Psf1IaxConfig: 100
Hiding IAX Psf1IaxConfig: 100
Hiding IAX Psf1IaxConfig: 100
Hiding IAX Psf1IaxConfig: 100
Hiding IAX Psf1IaxConfig: 100
Hiding IAX Psf1IaxConfig: 100
Hiding IAX Psf1IaxConfig: 100
Hiding IAX Psf1IaxConfig: 100
MS2IOSF_BANK_DECODER_INIT_END
[1.1 p1] 00:97:01.0: PCI device 8086:352A is enabled
[1.1 p2] 00:97:02.0: PCI device FFFF:FFFF is disabled (not present)
[1.1 p3] 00:97:03.0: PCI device FFFF:FFFF is disabled (not present)
[1.1 p4] 00:97:04.0: PCI device FFFF:FFFF is disabled (not present)
[1.1 p5] 00:97:05.0: PCI device FFFF:FFFF is disabled (not present)
[1.1 p6] 00:97:06.0: PCI device FFFF:FFFF is disabled (not present)
[1.1 p7] 00:97:07.0: PCI device FFFF:FFFF is disabled (not present)
[1.1 p8] 00:97:08.0: PCI device FFFF:FFFF is disabled (not present)
[1.2 p9] 00:A7:01.0: PCI device 8086:352A is enabled
[1.2 p10] 00:A7:02.0: PCI device FFFF:FFFF is disabled (not present)
[1.2 p11] 00:A7:03.0: PCI device FFFF:FFFF is disabled (not present)
[1.2 p12] 00:A7:04.0: PCI device FFFF:FFFF is disabled (not present)
[1.2 p13] 00:A7:05.0: PCI device FFFF:FFFF is disabled (not present)
[1.2 p14] 00:A7:06.0: PCI device FFFF:FFFF is disabled (not present)
[1.2 p15] 00:A7:07.0: PCI device FFFF:FFFF is disabled (not present)
[1.2 p16] 00:A7:08.0: PCI device FFFF:FFFF is disabled (not present)
[1.3 p17] 00:B7:01.0: PCI device 8086:352A is enabled
[1.3 p18] 00:B7:02.0: PCI device FFFF:FFFF is disabled (not present)
[1.3 p19] 00:B7:03.0: PCI device FFFF:FFFF is disabled (not present)
[1.3 p20] 00:B7:04.0: PCI device FFFF:FFFF is disabled (not present)
[1.3 p21] 00:B7:05.0: PCI device FFFF:FFFF is disabled (not present)
[1.3 p22] 00:B7:06.0: PCI device FFFF:FFFF is disabled (not present)
[1.3 p23] 00:B7:07.0: PCI device FFFF:FFFF is disabled (not present)
[1.3 p24] 00:B7:08.0: PCI device FFFF:FFFF is disabled (not present)
[1.4 p25] 00:C7:01.0: PCI device 8086:352A is enabled
[1.4 p26] 00:C7:02.0: PCI device FFFF:FFFF is disabled (not present)
[1.4 p27] 00:C7:03.0: PCI device 8086:352B is enabled
[1.4 p28] 00:C7:04.0: PCI device FFFF:FFFF is disabled (not present)
[1.4 p29] 00:C7:05.0: PCI device 8086:352C is enabled
[1.4 p30] 00:C7:06.0: PCI device FFFF:FFFF is disabled (not present)
[1.4 p31] 00:C7:07.0: PCI device 8086:352D is enabled
[1.4 p32] 00:C7:08.0: PCI device FFFF:FFFF is disabled (not present)
[1.5 p33] 00:D7:01.0: PCI device 8086:352A is enabled
[1.5 p34] 00:D7:02.0: PCI device FFFF:FFFF is disabled (not present)
[1.5 p35] 00:D7:03.0: PCI device 8086:352B is enabled
[1.5 p36] 00:D7:04.0: PCI device FFFF:FFFF is disabled (not present)
[1.5 p37] 00:D7:05.0: PCI device 8086:352C is enabled
[1.5 p38] 00:D7:06.0: PCI device FFFF:FFFF is disabled (not present)
[1.5 p39] 00:D7:07.0: PCI device 8086:352D is enabled
[1.5 p40] 00:D7:08.0: PCI device FFFF:FFFF is disabled (not present)
[1.6 p41] 00:80:01.0: PCI device 8086:352A is enabled
[1.6 p42] 00:80:02.0: PCI device FFFF:FFFF is disabled (not present)
[1.6 p43] 00:80:03.0: PCI device FFFF:FFFF is disabled (not present)
[1.6 p44] 00:80:04.0: PCI device FFFF:FFFF is disabled (not present)
[1.6 p45] 00:80:05.0: PCI device 8086:352C is enabled
[1.6 p46] 00:80:06.0: PCI device FFFF:FFFF is disabled (not present)
[1.6 p47] 00:80:07.0: PCI device FFFF:FFFF is disabled (not present)
[1.6 p48] 00:80:08.0: PCI device FFFF:FFFF is disabled (not present)
Calling IioEarlyIntiazeEntry Start
[0] IioAllocateMmioResource: Seg=0, MaxStackPerSocket=12
[0.0] Temp BUS: 0x00 -> 0x00 | MMIOL: 0x90122000 -> 0x957FFFFF
[0.1] Temp BUS: 0x15 -> 0x15 | MMIOL: 0x95900000 -> 0x9F7FFFFF
[0.2] Temp BUS: 0x26 -> 0x26 | MMIOL: 0x9F900000 -> 0xA93FFFFF
[0.3] Temp BUS: 0x37 -> 0x37 | MMIOL: 0xA9500000 -> 0xB2FFFFFF
[0.4] Temp BUS: 0x48 -> 0x48 | MMIOL: 0xB3100000 -> 0xBCBFFFFF
[0.5] Temp BUS: 0x59 -> 0x59 | MMIOL: 0xBCD00000 -> 0xC67FFFFF
[0.8] Temp BUS: 0x6A -> 0x6A | MMIOL: 0xC6900000 -> 0xC6FFFFFF
[0.9] Temp BUS: 0x6F -> 0x6F | MMIOL: 0xC7100000 -> 0xC77FFFFF
[0.10] Temp BUS: 0x74 -> 0x74 | MMIOL: 0xC7900000 -> 0xC7FFFFFF
[0.11] Temp BUS: 0x79 -> 0x79 | MMIOL: 0xC8100000 -> 0xC87FFFFF
[0] IIO Early Link Training Starting...
Recipy decompressing...
Socket[0] Stack[0] Program RX recipe values START...
Program recipe revision 2.009 (Info : 1.5:, len 2556)
[0] Program RX recipe values END
Recipy decompressing...
Socket[0] Stack[1] Program RX recipe values START...
Program recipe revision 2.009 (Info : 1.5:, len 2966)
[0] Program RX recipe values END
Socket[0] Stack[2] Program RX recipe values START...
Program recipe revision 2.009 (Info : 1.5:, len 2966)
[0] Program RX recipe values END
Socket[0] Stack[3] Program RX recipe values START...
Program recipe revision 2.009 (Info : 1.5:, len 2966)
[0] Program RX recipe values END
Socket[0] Stack[4] Program RX recipe values START...
Program recipe revision 2.009 (Info : 1.5:, len 2966)
[0] Program RX recipe values END
Socket[0] Stack[5] Program RX recipe values START...
Program recipe revision 2.009 (Info : 1.5:, len 2966)
[0] Program RX recipe values END
CXL_IO_PRE_TRAIN_INIT_START
CXL_IO_PRE_TRAIN_INIT_END
FBLP_PRE_TRAIN_INIT_START
FBLP_PRE_TRAIN_INIT_END
[0 p0] IioDmiLinkInit
[0 p0] DMI link speed vector IIO 0xF, PCH 0x7 -> target speed 3
[0] IIO Early Link Training Completed!
[1] IioAllocateMmioResource: Seg=0, MaxStackPerSocket=12
[1.1] Temp BUS: 0x97 -> 0x97 | MMIOL: 0xD1500000 -> 0xD97FFFFF
[1.2] Temp BUS: 0xA7 -> 0xA7 | MMIOL: 0xD9900000 -> 0xE17FFFFF
[1.3] Temp BUS: 0xB7 -> 0xB7 | MMIOL: 0xE1900000 -> 0xE97FFFFF
[1.4] Temp BUS: 0xC7 -> 0xC7 | MMIOL: 0xE9900000 -> 0xF17FFFFF
[1.5] Temp BUS: 0xD7 -> 0xD7 | MMIOL: 0xF1900000 -> 0xF97FFFFF
[1.6] Temp BUS: 0x80 -> 0x80 | MMIOL: 0xC9100000 -> 0xD13FFFFF
[1.8] Temp BUS: 0xE7 -> 0xE7 | MMIOL: 0xF9900000 -> 0xF9FFFFFF
[1.9] Temp BUS: 0xEC -> 0xEC | MMIOL: 0xFA100000 -> 0xFA7FFFFF
[1.10] Temp BUS: 0xF1 -> 0xF1 | MMIOL: 0xFA900000 -> 0xFAFFFFFF
[1.11] Temp BUS: 0xF6 -> 0xF6 | MMIOL: 0xFB100000 -> 0xFB7FFFFF
[1] IIO Early Link Training Starting...
Recipy decompressing...
Recipy decompressing...
Socket[1] Stack[1] Program RX recipe values START...
Program recipe revision 2.009 (Info : 1.5:, len 2966)
[1] Program RX recipe values END
Socket[1] Stack[2] Program RX recipe values START...
Program recipe revision 2.009 (Info : 1.5:, len 2966)
[1] Program RX recipe values END
Socket[1] Stack[3] Program RX recipe values START...
Program recipe revision 2.009 (Info : 1.5:, len 2966)
[1] Program RX recipe values END
Socket[1] Stack[4] Program RX recipe values START...
Program recipe revision 2.009 (Info : 1.5:, len 2966)
[1] Program RX recipe values END
Socket[1] Stack[5] Program RX recipe values START...
Program recipe revision 2.009 (Info : 1.5:, len 2966)
[1] Program RX recipe values END
Socket[1] Stack[6] Program RX recipe values START...
Program recipe revision 2.009 (Info : 1.5:, len 2966)
[1] Program RX recipe values END
CXL_IO_PRE_TRAIN_INIT_START
CXL_IO_PRE_TRAIN_INIT_END
FBLP_PRE_TRAIN_INIT_START
FBLP_PRE_TRAIN_INIT_END
[1] IIO Early Link Training Completed!
IIO CXL Status Socket 0:
[0.1] NotTrained
[0.2] NotTrained
[0.3] NotTrained
[0.4] NotSupportCxlMode
[0.5] NotSupportCxlMode
[0.6] NotSupportCxlMode
[0.7] NotSupportCxlMode
IIO CXL Status Socket 1:
[1.1] NotTrained
[1.2] NotTrained
[1.3] NotTrained
[1.4] NotSupportCxlMode
[1.5] NotSupportCxlMode
[1.6] NotSupportCxlMode
[1.7] NotSupportCxlMode
CXL_NOTIFY_PCODE_START
CXL_NOTIFY_PCODE_END
IIO Early Link Tc/Vc Configuration Start
Final Tc/VC mapping:
[0] Program TC/VC mapping on IIO side
[0] Program/Poll TC/VC mapping on PCH side
Poll TC/VC mapping on IIO side
IIO Early Link Tc/Vc Configuration End
Calling IioEarlyIntiazeEntry Stop
******* Initialize CXL - END *******
******* OOBMSM PreMem Configure - START *******
******* UncoreEnablePeciAccess - START *******
******* UncoreEnablePeciAccess - END *******
******* OOBMSM PreMem Configure - END *******
**KTI Output Structure **
OutD2KCreditConfig: 0 [1:Low,2:Med,3:High]
SnoopThrottleConfig: 0 [0:Dis,1:Low,2:Med,3:High,4:Auto]
OutUpiAffinityEn for CHA and M2M: 0
OutTwoSktTopology : 5
OutM2iosfToUpiAffinity: 1
OutPmonConfig: 2 [1:Reduced,2:Full,3:Auto,0:Disabled]
OutM2IosfPmonAccessControl: 0 [0:Restricted,1:Full,2:Auto]
OutD2kEn: 0
OutLegacyVgaSoc: 0
OutLegacyVgaStack: 0
OutIsocEn: 0
OutHitMeEn: 1
OutSncEn: 4 (SNC4)
OutUmaClustering: 0
OutSysDirectoryModeEn: 1
OutKtiPrefetch: 0
OutXptPrefetch: 0
OutXptRemotePrefetch: 0
OutSncPrefetchEn: 4
OutSncGbAlignRequired: 1
OutIsRouteThrough: 0
OutStaleAtoSOptEn: 2
OutSystemRasType: 6 (ADVANCED)
OutIoDcMode: 5 (IODC_EN_REM_INVITOM_AND_WCILF)
KtiCurrentLinkSpeedMode: 1 (FAST)
OutKtiLinkSpeed: 2 (16.0)
OutKtiLinkL0pEn: 0 (DISABLED)
OutKtiLinkL1En: 1 (ENABLED)
OutKtiFailoverEn: 1 (ENABLED)
OutKtiCrcMode: 0 (16BIT)
OutBoardVsCpuConflict: 0x0
OutKtiAdaptationEnable: 0x0
OutKtiPerLinkL1En (per port):
S0:1 1 1 1
S1:1 1 1 1
S2:0 0 0 0
S3:0 0 0 0
PchPresentBitMap: 0x01
OutKtiFpgaPresent (per socket): S0: 0 S1: 0 S2: 0 S3: 0
OutKtiFpgaEnable (per socket): S0: 0 S1: 0 S2: 0 S3: 0
OutFpgaHomeAgent (per socket): S0: 0 S1: 0 S2: 0 S3: 0
OutFpgaCacheAgent (per socket): S0: 0 S1: 0 S2: 0 S3: 0
OutStackDisableBitMap (per socket): S0: 0x0 S1: 0x0 S2: 0x0 S3: 0x0
mmCfgBase: 0x80000000
mmCfgSize: 0x10000000
mmiolBase: 0x90000000
mmiolSize: 0x6C000000
mmiohBase: 0x00002000
lowGap : 0x20
SecondaryNodeBitMap: 0x00
CpuPaLimit: 0
KtiInternalGlobal:
->SnoopFanoutEn: 0
->SysOsbEn: 1
->D2cEn: 1
->D2kEn: 0
->SnoopFilter: 0
->DualLinksInterleavingMode: 2
->UpiInterleaveMode: 2
->EightSocketTopology: 0
->SnoopFanoutChaInterleaveEn: 0
KtiLinkVnaOverride (per port - final values):
S0:138 138 138 138
S1:138 138 138 138
S2:254 254 254 254
S3:254 254 254 254
IIO STACK rootbus ID mapping table
Stack ID | Root Bus ID
0 ------- 0
1 ------- 1
2 ------- 2
3 ------- 3
4 ------- 4
5 ------- 5
6 ------- 6
7 ------- 7
8 ------- 8
9 ------- 9
10 ------- 10
11 ------- 11
OutDfxPrqBlockEn: 0
OutDfxAeg0CounterLowVal: 40
OutDfxAeg0CounterHighVal: 60
**KTI Output Structure End**
******* KTIRC Exit *******
KTI Init completed! Reset Requested: 0
RC debug buffering, compression, and sync ready
Pipe Init starting...
Pass PIPE_DISPATCH_SYNCH_PSYSHOST to socket 1
Pass PeiPipeFollowerInit
CAR MEM Range 0xFE800000 - 0xFE983B67
Pass pointer to Host: 0xFE800014
Sending address of Memory Policy: 0xFE96FF80
Pass boot mode 0
Send data buffer
Send data dwordcount 60EDA
Send data...complete
CAR MEM Range2 0xFE9DC000 - 0xFE9DFFFF
Send data buffer
Send data dwordcount 1000
Send data...complete
Send data buffer
Send data dwordcount 18F
Send data...complete
N1 Checked into Pipe
Pipe Init completed! Reset Requested: 0
CPU Feature Early Config starting...
CpuInit Start
CpuUncoreInit()
: Get UncoreRatioLimit MaxClrRatio: 24, MinClrRatio: 8, UncoreRatioLimit.Uint32 = 0x818
: Get UncoreRatioLimit MaxClrRatio: 24, MinClrRatio: 8, UncoreRatioLimit.Uint32 = 0x818
:UFS: Update BIOS_SPARE2_PCU Bit[20] = 0 on S0
Write Socket 0 MSR_UNCORE_RATIO_LIMIT.MinClrRatio [14:8] = 8, MSR_UNCORE_RATIO_LIMIT.MaxClrRatio [6:0] = 24
:UFS: Update BIOS_SPARE2_PCU Bit[20] = 0 on S1
Write Socket 1 MSR_UNCORE_RATIO_LIMIT.MinClrRatio [14:8] = 8, MSR_UNCORE_RATIO_LIMIT.MaxClrRatio [6:0] = 24
Get socket PPIN
: PPIN = 22E546CB1AD8E915
Get socket PPIN
: PPIN = 22E548CB80015B4D
:: ProgramProcessorFlexRatio()
:: System Capable : AVX SST-CP SST-BF
1 1 0
:: SstPpCapableSystem : LevelEnableMask MaxLevel
0 00 00
S0_0 FusedCoresMask = 0x0DABBB6EAF4EE9DB FusedCoreCount = 40
GetAllConfigTdpLevels() Enter
S0_0 ConfigTdpLevel(0) IssCoreMask = 0x0DABBB6EAF4EE9DB IssCoreCount = 40
GetAllConfigTdpLevels() Exit
:: S0 MaxRatio : MinRatio : MinOpRatio : ConfigTdpMaxLevel
17 08 05 02
:: S0 Current SST-PP Level : Current SST-PP Lock
00 0
Level : PkgTDP : SSE P1 : AVX2 P1 : AVX3 P1 : Core Count
0 : 000350 : 000017 : 000014 : 000011 : 040, [0] 40
3 : 000000 : 000000 : 000000 : 000000 : 000, [0] 00
4 : 000000 : 000000 : 000000 : 000000 : 000, [0] 00
Level : Turbo Ratio Limit - SSE P1 : AVX2 P1 : AVX3 P1
0 : - : 181818191A1E2023 : 17171718191E2023 : 16161617171D1F22
3 : - : 0000000000000000 : 0000000000000000 : 0000000000000000
4 : - : 0000000000000000 : 0000000000000000 : 0000000000000000
Level : TJMax : CoreMask
0 : 100 : [0] 0DABBB6EAF4EE9DB
3 : 000 : [0] 0000000000000000
4 : 000 : [0] 0000000000000000
Level : SstBf - P1_Hi : P1_Lo : CoreMask
0 : 0000 : 0000 : [0] 0000000000000000
3 : 0000 : 0000 : [0] 0000000000000000
4 : 0000 : 0000 : [0] 0000000000000000
Core Ratio Info
Level : P0 : P1 : Pn : Pm
0 : 000035 : 000017 : 000008 : 000005
3 : 000000 : 000000 : 000000 : 000000
4 : 000000 : 000000 : 000000 : 000000
Uncore Ratio Info
Level : P0 : P1 : Pn : Pm
0 : 000024 : 000014 : 000008 : 000008
3 : 000000 : 000000 : 000000 : 000000
4 : 000000 : 000000 : 000000 : 000000
S1_0 FusedCoresMask = 0x0DB9772F6F4EE9DB FusedCoreCount = 40
GetAllConfigTdpLevels() Enter
S1_0 ConfigTdpLevel(0) IssCoreMask = 0x0DB9772F6F4EE9DB IssCoreCount = 40
GetAllConfigTdpLevels() Exit
:: S1 MaxRatio : MinRatio : MinOpRatio : ConfigTdpMaxLevel
17 08 05 02
:: S1 Current SST-PP Level : Current SST-PP Lock
00 0
Level : PkgTDP : SSE P1 : AVX2 P1 : AVX3 P1 : Core Count
0 : 000350 : 000017 : 000014 : 000011 : 040, [0] 40
3 : 000000 : 000000 : 000000 : 000000 : 000, [0] 00
4 : 000000 : 000000 : 000000 : 000000 : 000, [0] 00
Level : Turbo Ratio Limit - SSE P1 : AVX2 P1 : AVX3 P1
0 : - : 181818191A1E2023 : 17171718191E2023 : 16161617171D1F22
3 : - : 0000000000000000 : 0000000000000000 : 0000000000000000
4 : - : 0000000000000000 : 0000000000000000 : 0000000000000000
Level : TJMax : CoreMask
0 : 100 : [0] 0DB9772F6F4EE9DB
3 : 000 : [0] 0000000000000000
4 : 000 : [0] 0000000000000000
Level : SstBf - P1_Hi : P1_Lo : CoreMask
0 : 0000 : 0000 : [0] 0000000000000000
3 : 0000 : 0000 : [0] 0000000000000000
4 : 0000 : 0000 : [0] 0000000000000000
Core Ratio Info
Level : P0 : P1 : Pn : Pm
0 : 000035 : 000017 : 000008 : 000005
3 : 000000 : 000000 : 000000 : 000000
4 : 000000 : 000000 : 000000 : 000000
Uncore Ratio Info
Level : P0 : P1 : Pn : Pm
0 : 000024 : 000014 : 000008 : 000008
3 : 000000 : 000000 : 000000 : 000000
4 : 000000 : 000000 : 000000 : 000000
:: CommonMaxRatio : CommonMinRatio : Target Ratio
17 08 17
:: IssTdpLevel : AvxP1Level
00 00
:: TargetRatio: 17 is ready (RatioChangeFlag: 0), SstPpCurrentLevel: 0
:: SetActiveCoresAndLpEnableDisable()
:: S0_0 BIST_FAILURE_LOCAL_MASK = 0000000000000000
:: S0 setup input disable = 0000000000000000
:: S0_0 AvailCoresMask = 0DABBB6EAF4EE9DB
:: S0_0 ResolvedCoresMask = 0DABBB6EAF4EE9DB
:: S0_0 DesiredCoresCurrent = 0000000000000000
:: S0_0 BistResultMask = 0000000000000000
:: S0_0 CoreDisableReqMask = 0000000000000000
:: S0_0 NumberOfCoresDisabledMask = 0000000000000000
:: CheckCpuBist = 1
:: CoreFailover = 1
[s0_0] MaxLpEnable = 0, LpCapable = 1, MaxLpEnable knob = 0, Lock Status = 0
S0_0 MaxEnabledCores = 0
S0_0 FusedCoreCount = 40
S0_0 NonSparingCoresMask= FFFFFFFFFFFFFFFF
:: S0_0 DesiredCoresNew = 0000000000000000
:: S1_0 BIST_FAILURE_LOCAL_MASK = 0000000000000000
:: S1 setup input disable = 0000000000000000
:: S1_0 AvailCoresMask = 0DB9772F6F4EE9DB
:: S1_0 ResolvedCoresMask = 0DB9772F6F4EE9DB
:: S1_0 DesiredCoresCurrent = 0000000000000000
:: S1_0 BistResultMask = 0000000000000000
:: S1_0 CoreDisableReqMask = 0000000000000000
:: S1_0 NumberOfCoresDisabledMask = 0000000000000000
:: CheckCpuBist = 1
:: CoreFailover = 1
[s1_0] MaxLpEnable = 0, LpCapable = 1, MaxLpEnable knob = 0, Lock Status = 0
S1_0 MaxEnabledCores = 0
S1_0 FusedCoreCount = 40
S1_0 NonSparingCoresMask= FFFFFFFFFFFFFFFF
:: S1_0 DesiredCoresNew = 0000000000000000
CPUMISC Current S 0:
ITBM is not supported
CPUMISC Current S 1:
ITBM is not supported
CPU Feature Early Config completed! Reset Requested: 0
PrevBootErrors: No Memory MCA Error Found
PrevBootErrors - Valid MCA UC entries: 0
[CSR PCI BAR Access] Address:0xFFFFFFFF000000D4; PCI Cmd: 0xFFFF
[CSR PCI BAR Access] Address:0xFFFFFFFF000000D4; PCI Cmd: 0xFFFF
START_MRC_RUN
Detect ColdBootSlowRequiredFlag and will force slow cold boot.
N0: Bus Instance = 0; I2C speed = 3; I3C speed = 2; Bus mode = 0
N0: Bus Instance = 1; I2C speed = 3; I3C speed = 2; Bus mode = 0
N0: Bus Instance = 0; I2C speed = 3; I3C speed = 2; Bus mode = 1
N0: Bus Instance = 0; I2C speed = 3; I3C speed = 2; Bus mode = 1
N0: Bus Instance = 0; I2C speed = 3; I3C speed = 2; Bus mode = 1
N0: Bus Instance = 0; I2C speed = 3; I3C speed = 2; Bus mode = 1
N0: Bus Instance = 0; I2C speed = 3; I3C speed = 2; Bus mode = 1
N0: Bus Instance = 0; I2C speed = 3; I3C speed = 2; Bus mode = 1
N0: Bus Instance = 1; I2C speed = 3; I3C speed = 2; Bus mode = 1
N0: Bus Instance = 1; I2C speed = 3; I3C speed = 2; Bus mode = 1
N0: Bus Instance = 1; I2C speed = 3; I3C speed = 2; Bus mode = 1
N0: Bus Instance = 1; I2C speed = 3; I3C speed = 2; Bus mode = 1
N0: Bus Instance = 1; I2C speed = 3; I3C speed = 2; Bus mode = 1
N0: Bus Instance = 1; I2C speed = 3; I3C speed = 2; Bus mode = 1
N0: Bus Instance = 0; I2C speed = 3; I3C speed = 2; Bus mode = 0
N0: Bus Instance = 0; I2C speed = 3; I3C speed = 2; Bus mode = 0
N0: Bus Instance = 0; I2C speed = 3; I3C speed = 2; Bus mode = 0
N0: Bus Instance = 0; I2C speed = 3; I3C speed = 2; Bus mode = 0
N0: Bus Instance = 0; I2C speed = 3; I3C speed = 2; Bus mode = 0
N0: Bus Instance = 0; I2C speed = 3; I3C speed = 2; Bus mode = 0
N0: Bus Instance = 1; I2C speed = 3; I3C speed = 2; Bus mode = 0
N0: Bus Instance = 1; I2C speed = 3; I3C speed = 2; Bus mode = 0
N0: Bus Instance = 1; I2C speed = 3; I3C speed = 2; Bus mode = 0
N0: Bus Instance = 1; I2C speed = 3; I3C speed = 2; Bus mode = 0
N0: Bus Instance = 1; I2C speed = 3; I3C speed = 2; Bus mode = 0
N0: Bus Instance = 1; I2C speed = 3; I3C speed = 2; Bus mode = 0
N0: Dimm changed.
Processors changed.
Get socket PPIN
: PPIN = 22E546CB1AD8E915
setupChanged: 1
Clearing the MRC NVRAM structure.
bootMode = NormalBoot
subBootMode = ColdBoot
[ScktId: 0] Parallel Mode Dispatch -- Started
Dispatch N1 for MemInit
N1 Entering MRC
Detect ColdBootSlowRequiredFlag and will force slow cold boot.
N1: Bus Instance = 0; I2C speed = 3; I3C speed = 2; Bus mode = 0
N1: Bus Instance = 1; I2C speed = 3; I3C speed = 2; Bus mode = 0
N1: Bus Instance = 0; I2C speed = 3; I3C speed = 2; Bus mode = 1
N1: Bus Instance = 0; I2C speed = 3; I3C speed = 2; Bus mode = 1
N1: Bus Instance = 0; I2C speed = 3; I3C speed = 2; Bus mode = 1
N1: Bus Instance = 0; I2C speed = 3; I3C speed = 2; Bus mode = 1
N1: Bus Instance = 0; I2C speed = 3; I3C speed = 2; Bus mode = 1
N1: Bus Instance = 0; I2C speed = 3; I3C speed = 2; Bus mode = 1
N1: Bus Instance = 1; I2C speed = 3; I3C speed = 2; Bus mode = 1
N1: Bus Instance = 1; I2C speed = 3; I3C speed = 2; Bus mode = 1
N1: Bus Instance = 1; I2C speed = 3; I3C speed = 2; Bus mode = 1
N1: Bus Instance = 1; I2C speed = 3; I3C speed = 2; Bus mode = 1
N1: Bus Instance = 1; I2C speed = 3; I3C speed = 2; Bus mode = 1
N1: Bus Instance = 1; I2C speed = 3; I3C speed = 2; Bus mode = 1
N1: Bus Instance = 0; I2C speed = 3; I3C speed = 2; Bus mode = 0
N1: Bus Instance = 0; I2C speed = 3; I3C speed = 2; Bus mode = 0
N1: Bus Instance = 0; I2C speed = 3; I3C speed = 2; Bus mode = 0
N1: Bus Instance = 0; I2C speed = 3; I3C speed = 2; Bus mode = 0
N1: Bus Instance = 0; I2C speed = 3; I3C speed = 2; Bus mode = 0
N1: Bus Instance = 0; I2C speed = 3; I3C speed = 2; Bus mode = 0
N1: Bus Instance = 1; I2C speed = 3; I3C speed = 2; Bus mode = 0
N1: Bus Instance = 1; I2C speed = 3; I3C speed = 2; Bus mode = 0
N1: Bus Instance = 1; I2C speed = 3; I3C speed = 2; Bus mode = 0
N1: Bus Instance = 1; I2C speed = 3; I3C speed = 2; Bus mode = 0
N1: Bus Instance = 1; I2C speed = 3; I3C speed = 2; Bus mode = 0
N1: Bus Instance = 1; I2C speed = 3; I3C speed = 2; Bus mode = 0
N1: Dimm changed.
Get socket PPIN
: PPIN = 22E548CB80015B4D
setupChanged: 1
Clearing the MRC NVRAM structure.
bootMode = NormalBoot
subBootMode = ColdBoot
[ScktId: 1] Parallel Mode Dispatch -- Started
[ScktId: 0] Parallel Mode Dispatch - 203ms
[ScktId: 1] Parallel Mode Dispatch - 4ms
[ScktId: 0] Pipe Sync AP Boot Mode -- Started
[ScktId: 1] Pipe Sync AP Boot Mode -- Started
[ScktId: 0] Pipe Sync AP Boot Mode - 13ms
[ScktId: 1] Pipe Sync AP Boot Mode - 9ms
N1 Checked into Pipe
[ScktId: 0] Select Boot Mode -- Started
DetermineBootMode: ColdBoot
[ScktId: 0] Select Boot Mode - 8ms
[ScktId: 1] Pipe Sync SBSP Boot Mode -- Started
[ScktId: 0] Pipe Sync SBSP Boot Mode -- Started
[ScktId: 1] Pipe Sync SBSP Boot Mode - 9ms
[ScktId: 0] Pipe Sync SBSP Boot Mode - 9ms
[ScktId: 1] Init Structures Late -- Started
[ScktId: 0] Init Structures Late -- Started
[ScktId: 1] Init Structures Late - 8ms
[ScktId: 0] Init Structures Late - 8ms
[ScktId: 1] Detect DIMM Configuration -- Started
[ScktId: 0] Detect DIMM Configuration -- Started
N1: Bus Instance = 0; I2C speed = 3; I3C speed = 2; Bus mode = 0
N0: Bus Instance = 0; I2C speed = 3; I3C speed = 2; Bus mode = 0
N1: Bus Instance = 0; I2C speed = 3; I3C speed = 2; Bus mode = 0
N0: Bus Instance = 0; I2C speed = 3; I3C speed = 2; Bus mode = 0
N1: Bus Instance = 0; I2C speed = 3; I3C speed = 2; Bus mode = 0
N0: Bus Instance = 0; I2C speed = 3; I3C speed = 2; Bus mode = 0
N1: Bus Instance = 0; I2C speed = 3; I3C speed = 2; Bus mode = 0
N0: Bus Instance = 0; I2C speed = 3; I3C speed = 2; Bus mode = 0
N1: Bus Instance = 0; I2C speed = 3; I3C speed = 2; Bus mode = 0
N0: Bus Instance = 0; I2C speed = 3; I3C speed = 2; Bus mode = 0
N1: Bus Instance = 0; I2C speed = 3; I3C speed = 2; Bus mode = 0
N0: Bus Instance = 0; I2C speed = 3; I3C speed = 2; Bus mode = 0
N1: Bus Instance = 1; I2C speed = 3; I3C speed = 2; Bus mode = 0
N0: Bus Instance = 1; I2C speed = 3; I3C speed = 2; Bus mode = 0
N1: Bus Instance = 1; I2C speed = 3; I3C speed = 2; Bus mode = 0
N0: Bus Instance = 1; I2C speed = 3; I3C speed = 2; Bus mode = 0
N1: Bus Instance = 1; I2C speed = 3; I3C speed = 2; Bus mode = 0
N0: Bus Instance = 1; I2C speed = 3; I3C speed = 2; Bus mode = 0
N1: Bus Instance = 1; I2C speed = 3; I3C speed = 2; Bus mode = 0
N0: Bus Instance = 1; I2C speed = 3; I3C speed = 2; Bus mode = 0
N1: Bus Instance = 1; I2C speed = 3; I3C speed = 2; Bus mode = 0
N0: Bus Instance = 1; I2C speed = 3; I3C speed = 2; Bus mode = 0
N1: Bus Instance = 1; I2C speed = 3; I3C speed = 2; Bus mode = 0
N0: Bus Instance = 1; I2C speed = 3; I3C speed = 2; Bus mode = 0
[ScktId: 1] Detect DIMM Configuration - 319ms
[ScktId: 0] Detect DIMM Configuration - 321ms
[ScktId: 1] Pipe Sync AP Data -- Started
[ScktId: 0] Pipe Sync AP Data -- Started
[ScktId: 0] Pipe Sync AP Data - 21ms
[ScktId: 1] Pipe Sync AP Data - 26ms
N1 Checked into Pipe
[ScktId: 0] Check POR Compatibility -- Started
[ScktId: 0] Check POR Compatibility - 6ms
N1 Checked into Pipe
[ScktId: 0] HBM Init Clock -- Started
[ScktId: 0] HBM Init Clock - 5ms
N1 Checked into Pipe
[ScktId: 0] Initialize clocks for all MemSs -- Started
N0: Platform segment mapping found. UseServerPor: 1; SegmentType: 7; ChopType: 3; PlatformSegment: 0
N0: Platform segment mapping found. UseServerPor: 1; SegmentType: 7; ChopType: 3; PlatformSegment: 0
N0: Platform segment mapping found. UseServerPor: 1; SegmentType: 7; ChopType: 3; PlatformSegment: 0
N0: Platform segment mapping found. UseServerPor: 1; SegmentType: 7; ChopType: 3; PlatformSegment: 0
N0: Platform segment mapping found. UseServerPor: 1; SegmentType: 7; ChopType: 3; PlatformSegment: 0
N0: Platform segment mapping found. UseServerPor: 1; SegmentType: 7; ChopType: 3; PlatformSegment: 0
N0: Platform segment mapping found. UseServerPor: 1; SegmentType: 7; ChopType: 3; PlatformSegment: 0
N0: Platform segment mapping found. UseServerPor: 1; SegmentType: 7; ChopType: 3; PlatformSegment: 0
Memory behind processor 0 running at DDR-4800
Memory behind processor 1 running at DDR-4800
[ScktId: 0] Initialize clocks for all MemSs - 96ms
[ScktId: 1] Pipe Sync SBSP Data -- Started
[ScktId: 0] Pipe Sync SBSP Data -- Started
[ScktId: 1] Pipe Sync SBSP Data - 21ms
[ScktId: 0] Pipe Sync SBSP Data - 21ms
[ScktId: 1] Unlock Memory -- Started
[ScktId: 0] Unlock Memory -- Started
[ScktId: 1] Unlock Memory - 7ms
[ScktId: 0] Unlock Memory - 7ms
[ScktId: 1] Pipe Sync AP Data -- Started
[ScktId: 0] Pipe Sync AP Data -- Started
[ScktId: 0] Pipe Sync AP Data - 21ms
[ScktId: 1] Pipe Sync AP Data - 24ms
[ScktId: 0] HBM Pre-Training -- Started
[ScktId: 1] HBM Pre-Training -- Started
HBMIO flows: set to 0xFFFFFF7F!
HBMIO flows: set to 0xFFFFFF7F!
Get socket PPIN
Get socket PPIN
: PPIN = 22E546CB1AD8E915
: PPIN = 22E548CB80015B4D
HBM frequency = 3200MHz
HBM frequency = 3200MHz
Hbm Policy Option: DisableRefreshPostpone = 0
Socket1 HbmIo0, HW Rev: 0x110, FW Rev: 0x2180, Patch ID: 0x0, Unique ID: 0x18, Product ID: 0x2
Hbm Policy Option: RefreshMode = 1
Socket1 HbmIo1, HW Rev: 0x110, FW Rev: 0x2180, Patch ID: 0x0, Unique ID: 0x18, Product ID: 0x2
Socket0 HbmIo0, HW Rev: 0x110, FW Rev: 0x2180, Patch ID: 0x0, Unique ID: 0x18, Product ID: 0x2
Socket1 HbmIo2, HW Rev: 0x110, FW Rev: 0x2180, Patch ID: 0x0, Unique ID: 0x18, Product ID: 0x2
Socket0 HbmIo1, HW Rev: 0x110, FW Rev: 0x2180, Patch ID: 0x0, Unique ID: 0x18, Product ID: 0x2
Socket1 HbmIo3, HW Rev: 0x110, FW Rev: 0x2180, Patch ID: 0x0, Unique ID: 0x18, Product ID: 0x2
Socket0 HbmIo2, HW Rev: 0x110, FW Rev: 0x2180, Patch ID: 0x0, Unique ID: 0x18, Product ID: 0x2
[ScktId: 1] HBM Pre-Training - 109ms
Socket0 HbmIo3, HW Rev: 0x110, FW Rev: 0x2180, Patch ID: 0x0, Unique ID: 0x18, Product ID: 0x2
[ScktId: 1] AP HBM Information -- Started
[ScktId: 0] HBM Pre-Training - 141ms
[ScktId: 0] AP HBM Information -- Started
[ScktId: 0] AP HBM Information - 5ms
[ScktId: 1] AP HBM Information - 25ms
[ScktId: 0] Pipe Sync SBSP Status -- Started
[ScktId: 1] Pipe Sync SBSP Status -- Started
[ScktId: 1] Pipe Sync SBSP Status - 8ms
[ScktId: 0] Pipe Sync SBSP Status - 12ms
[ScktId: 1] Check XMP -- Started
[ScktId: 0] Check XMP -- Started
[ScktId: 1] Check XMP - 7ms
[ScktId: 0] Check XMP - 6ms
N1 Checked into Pipe
[ScktId: 0] Set Vdd -- Started
[ScktId: 0] Set Vdd - 5ms
[ScktId: 1] Power on Memory -- Started
[ScktId: 0] Power on Memory -- Started
N1.C00.D0: PMIC in Secure Mode, PMIC voltage programming aborted!
N0.C00.D0: PMIC in Secure Mode, PMIC voltage programming aborted!
N1.C02.D0: PMIC in Secure Mode, PMIC voltage programming aborted!
N0.C02.D0: PMIC in Secure Mode, PMIC voltage programming aborted!
N1.C04.D0: PMIC in Secure Mode, PMIC voltage programming aborted!
N0.C04.D0: PMIC in Secure Mode, PMIC voltage programming aborted!
N1.C06.D0: PMIC in Secure Mode, PMIC voltage programming aborted!
N0.C06.D0: PMIC in Secure Mode, PMIC voltage programming aborted!
[ScktId: 1] Power on Memory - 216ms
[ScktId: 0] Power on Memory - 223ms
[ScktId: 1] Ddrio Power Status Check -- Started
[ScktId: 0] Ddrio Power Status Check -- Started
[ScktId: 1] Ddrio Power Status Check - 8ms
[ScktId: 0] Ddrio Power Status Check - 9ms
[ScktId: 1] Pipe Sync AP Data -- Started
[ScktId: 0] Pipe Sync AP Data -- Started
[ScktId: 0] Pipe Sync AP Data - 21ms
[ScktId: 1] Pipe Sync AP Data - 25ms
N1 Checked into Pipe
[ScktId: 0] Configure DIMM Ranks -- Started
[ScktId: 0] Configure DIMM Ranks - 6ms
[ScktId: 1] Pipe Sync SBSP Data -- Started
[ScktId: 0] Pipe Sync SBSP Data -- Started
[ScktId: 0] Pipe Sync SBSP Data - 21ms
[ScktId: 1] Pipe Sync SBSP Data - 21ms
[ScktId: 0] Initialize Throttling Early -- Started
[ScktId: 1] Initialize Throttling Early -- Started
[ScktId: 0] Initialize Throttling Early - 9ms
[ScktId: 1] Initialize Throttling Early - 10ms
[ScktId: 0] Initialize Memory -- Started
[ScktId: 1] Initialize Memory -- Started
[ScktId: 0] Initialize Memory - 8ms
[ScktId: 1] Initialize Memory - 8ms
[ScktId: 0] Gather SPD Data -- Started
[ScktId: 1] Gather SPD Data -- Started
N0: Bus Instance = 0; I2C speed = 3; I3C speed = 2; Bus mode = 0
N1: Bus Instance = 0; I2C speed = 3; I3C speed = 2; Bus mode = 0
N0: Bus Instance = 0; I2C speed = 3; I3C speed = 2; Bus mode = 1
N1: Bus Instance = 0; I2C speed = 3; I3C speed = 2; Bus mode = 1
N0: I3C Instance 0: Switch to I3C mode - Status = Success
N1: I3C Instance 0: Switch to I3C mode - Status = Success
N0: Bus Instance = 1; I2C speed = 3; I3C speed = 2; Bus mode = 0
N1: Bus Instance = 1; I2C speed = 3; I3C speed = 2; Bus mode = 0
N0: Bus Instance = 1; I2C speed = 3; I3C speed = 2; Bus mode = 1
N1: Bus Instance = 1; I2C speed = 3; I3C speed = 2; Bus mode = 1
N0: I3C Instance 1: Switch to I3C mode - Status = Success
N1: I3C Instance 1: Switch to I3C mode - Status = Success
[ScktId: 0] Gather SPD Data - 86ms
[ScktId: 0] Socket DIMM Information -- Started
[ScktId: 1] Gather SPD Data - 88ms
==========================================================================================================================================================================
START_SOCKET_0_DIMMINFO_TABLE
SPR Ex - Socket 2S
==========================================================================================================================================================================
S| Channel 0 | Channel 1 | Channel 2 | Channel 3 | Channel 4 | Channel 5 | Channel 6 | Channel 7 |
==========================================================================================================================================================================
0| DIMM: Micron | Not installed | DIMM: Micron | Not installed | DIMM: Micron | Not installed | DIMM: Micron | Not installed |
| DRAM: Micron | | DRAM: Micron | | DRAM: Micron | | DRAM: Micron | |
| RCD: IDT | | RCD: IDT | | RCD: IDT | | RCD: IDT | |
|RCD Rev: 0x33 | |RCD Rev: 0x33 | |RCD Rev: 0x33 | |RCD Rev: 0x33 | |
| DB Ven: N/A | | DB Ven: N/A | | DB Ven: N/A | | DB Ven: N/A | |
| DB Rev: N/A | | DB Rev: N/A | | DB Rev: N/A | | DB Rev: N/A | |
| PMIC: MPS | | PMIC: MPS | | PMIC: MPS | | PMIC: MPS | |
|PMICRev: 0x12 | |PMICRev: 0x12 | |PMICRev: 0x12 | |PMICRev: 0x12 | |
|SPD Dev: IDT | |SPD Dev: IDT | |SPD Dev: IDT | |SPD Dev: IDT | |
|Dev Rev: 0x21 | |Dev Rev: 0x21 | |Dev Rev: 0x21 | |Dev Rev: 0x21 | |
| SPD BL: 0.9 | | SPD BL: 0.9 | | SPD BL: 0.9 | | SPD BL: 0.9 | |
| TSOD: IDT | | TSOD: IDT | | TSOD: IDT | | TSOD: IDT | |
|TSODRev: 0x12 | |TSODRev: 0x12 | |TSODRev: 0x12 | |TSODRev: 0x12 | |
| | | | | | | | |
| 32GB( 16Gbx4 SR)| | 32GB( 16Gbx4 SR)| | 32GB( 16Gbx4 SR)| | 32GB( 16Gbx4 SR)| |
| DDR5 RDIMM R/C-F | | DDR5 RDIMM R/C-F | | DDR5 RDIMM R/C-F | | DDR5 RDIMM R/C-F | |
| 4800 39-39-39 | | 4800 39-39-39 | | 4800 39-39-39 | | 4800 39-39-39 | |
| ww51 2021 | | ww51 2021 | | ww51 2021 | | ww51 2021 | |
|MTC18F1045S1PC48BA2 | |MTC18F1045S1PC48BA2 | |MTC18F1045S1PC48BA2 | |MTC18F1045S1PC48BA2 | |
| | | | | | | | |
|0x002C0F2151336C7E2C| |0x002C0F2151336C7E24| |0x002C0F2151336C7E3A| |0x002C0F2151336C7E3F| |
| | | | | | | | |
--------------------------------------------------------------------------------------------------------------------------------------------------------------------------
1| Not installed | Not installed | Not installed | Not installed | Not installed | Not installed | Not installed | Not installed |
--------------------------------------------------------------------------------------------------------------------------------------------------------------------------
STOP_SOCKET_0_DIMMINFO_TABLE
==========================================================================================================================================================================
[ScktId: 1] Socket DIMM Information -- Started
[ScktId: 0] Socket DIMM Information - 580ms
==========================================================================================================================================================================
START_SOCKET_1_DIMMINFO_TABLE
SPR Ex - Socket 2S
==========================================================================================================================================================================
S| Channel 0 | Channel 1 | Channel 2 | Channel 3 | Channel 4 | Channel 5 | Channel 6 | Channel 7 |
==========================================================================================================================================================================
0| DIMM: Micron | Not installed | DIMM: Micron | Not installed | DIMM: Micron | Not installed | DIMM: Micron | Not installed |
| DRAM: Micron | | DRAM: Micron | | DRAM: Micron | | DRAM: Micron | |
| RCD: IDT | | RCD: IDT | | RCD: IDT | | RCD: IDT | |
|RCD Rev: 0x33 | |RCD Rev: 0x33 | |RCD Rev: 0x33 | |RCD Rev: 0x33 | |
| DB Ven: N/A | | DB Ven: N/A | | DB Ven: N/A | | DB Ven: N/A | |
| DB Rev: N/A | | DB Rev: N/A | | DB Rev: N/A | | DB Rev: N/A | |
| PMIC: MPS | | PMIC: MPS | | PMIC: MPS | | PMIC: MPS | |
|PMICRev: 0x12 | |PMICRev: 0x12 | |PMICRev: 0x12 | |PMICRev: 0x12 | |
|SPD Dev: IDT | |SPD Dev: IDT | |SPD Dev: IDT | |SPD Dev: IDT | |
|Dev Rev: 0x21 | |Dev Rev: 0x21 | |Dev Rev: 0x21 | |Dev Rev: 0x21 | |
| SPD BL: 0.9 | | SPD BL: 0.9 | | SPD BL: 0.9 | | SPD BL: 0.9 | |
| TSOD: IDT | | TSOD: IDT | | TSOD: IDT | | TSOD: IDT | |
|TSODRev: 0x12 | |TSODRev: 0x12 | |TSODRev: 0x12 | |TSODRev: 0x12 | |
| | | | | | | | |
| 32GB( 16Gbx4 SR)| | 32GB( 16Gbx4 SR)| | 32GB( 16Gbx4 SR)| | 32GB( 16Gbx4 SR)| |
| DDR5 RDIMM R/C-F | | DDR5 RDIMM R/C-F | | DDR5 RDIMM R/C-F | | DDR5 RDIMM R/C-F | |
| 4800 39-39-39 | | 4800 39-39-39 | | 4800 39-39-39 | | 4800 39-39-39 | |
| ww51 2021 | | ww51 2021 | | ww51 2021 | | ww51 2021 | |
|MTC18F1045S1PC48BA2 | |MTC18F1045S1PC48BA2 | |MTC18F1045S1PC48BA2 | |MTC18F1045S1PC48BA2 | |
| | | | | | | | |
|0x002C0F2151336C7DD8| |0x002C0F2151336C7E17| |0x002C0F2151336C7DDA| |0x002C0F2151336C7E33| |
| | | | | | | | |
--------------------------------------------------------------------------------------------------------------------------------------------------------------------------
1| Not installed | Not installed | Not installed | Not installed | Not installed | Not installed | Not installed | Not installed |
--------------------------------------------------------------------------------------------------------------------------------------------------------------------------
STOP_SOCKET_1_DIMMINFO_TABLE
==========================================================================================================================================================================
[ScktId: 0] Early Configuration -- Started
[ScktId: 1] Socket DIMM Information - 1153ms
N0.C00: MCSCRAMBLE_SEED_SEL_MCDDC_DP_REG access function - average write latency = 332 ns
[ScktId: 1] Early Configuration -- Started
N0.C01: MCSCRAMBLE_SEED_SEL_MCDDC_DP_REG access function - average write latency = 347 ns
N1.C00: MCSCRAMBLE_SEED_SEL_MCDDC_DP_REG access function - average write latency = 418 ns
N0.C02: MCSCRAMBLE_SEED_SEL_MCDDC_DP_REG access function - average write latency = 439 ns
N1.C01: MCSCRAMBLE_SEED_SEL_MCDDC_DP_REG access function - average write latency = 398 ns
N0.C03: MCSCRAMBLE_SEED_SEL_MCDDC_DP_REG access function - average write latency = 439 ns
N1.C02: MCSCRAMBLE_SEED_SEL_MCDDC_DP_REG access function - average write latency = 510 ns
N0.C04: MCSCRAMBLE_SEED_SEL_MCDDC_DP_REG access function - average write latency = 529 ns
N1.C03: MCSCRAMBLE_SEED_SEL_MCDDC_DP_REG access function - average write latency = 523 ns
N0.C05: MCSCRAMBLE_SEED_SEL_MCDDC_DP_REG access function - average write latency = 507 ns
N1.C04: MCSCRAMBLE_SEED_SEL_MCDDC_DP_REG access function - average write latency = 563 ns
N0.C06: MCSCRAMBLE_SEED_SEL_MCDDC_DP_REG access function - average write latency = 626 ns
N1.C05: MCSCRAMBLE_SEED_SEL_MCDDC_DP_REG access function - average write latency = 583 ns
N0.C07: MCSCRAMBLE_SEED_SEL_MCDDC_DP_REG access function - average write latency = 606 ns
N1.C06: MCSCRAMBLE_SEED_SEL_MCDDC_DP_REG access function - average write latency = 685 ns
N0.C00: MCSCRAMBLE_SEED_SEL_MCDDC_DP_REG access function - average read latency = 317 ns
N1.C07: MCSCRAMBLE_SEED_SEL_MCDDC_DP_REG access function - average write latency = 674 ns
N0.C01: MCSCRAMBLE_SEED_SEL_MCDDC_DP_REG access function - average read latency = 329 ns
N1.C00: MCSCRAMBLE_SEED_SEL_MCDDC_DP_REG access function - average read latency = 371 ns
N0.C02: MCSCRAMBLE_SEED_SEL_MCDDC_DP_REG access function - average read latency = 416 ns
N1.C01: MCSCRAMBLE_SEED_SEL_MCDDC_DP_REG access function - average read latency = 359 ns
N0.C03: MCSCRAMBLE_SEED_SEL_MCDDC_DP_REG access function - average read latency = 418 ns
N1.C02: MCSCRAMBLE_SEED_SEL_MCDDC_DP_REG access function - average read latency = 462 ns
N0.C04: MCSCRAMBLE_SEED_SEL_MCDDC_DP_REG access function - average read latency = 503 ns
N1.C03: MCSCRAMBLE_SEED_SEL_MCDDC_DP_REG access function - average read latency = 473 ns
N0.C05: MCSCRAMBLE_SEED_SEL_MCDDC_DP_REG access function - average read latency = 489 ns
N1.C04: MCSCRAMBLE_SEED_SEL_MCDDC_DP_REG access function - average read latency = 524 ns
N0.C06: MCSCRAMBLE_SEED_SEL_MCDDC_DP_REG access function - average read latency = 599 ns
N1.C05: MCSCRAMBLE_SEED_SEL_MCDDC_DP_REG access function - average read latency = 537 ns
N0.C07: MCSCRAMBLE_SEED_SEL_MCDDC_DP_REG access function - average read latency = 584 ns
N1.C06: MCSCRAMBLE_SEED_SEL_MCDDC_DP_REG access function - average read latency = 636 ns
S0 TME CPUID = 1
S0 TmeActivated = 0
S0 TME CPUID = 1
S0 TmeActivated = 0
N1.C07: MCSCRAMBLE_SEED_SEL_MCDDC_DP_REG access function - average read latency = 625 ns
S0 TME CPUID = 1
S1 TME CPUID = 1
S0 TmeActivated = 0
S1 TmeActivated = 0
S0 TME CPUID = 1
S1 TME CPUID = 1
S0 TmeActivated = 0
S1 TmeActivated = 0
tRRDD -- MinVal = 0x2, value = 0x0, adjusted to MinVal.
S1 TME CPUID = 1
tWWDD -- MinVal = 0x2, value = 0x0, adjusted to MinVal.
S1 TmeActivated = 0
tRWDD -- MinVal = 0x2, value = 0x0, adjusted to MinVal.
S1 TME CPUID = 1
tWRDD -- MinVal = 0x2, value = 0x0, adjusted to MinVal.
S1 TmeActivated = 0
tRRDS -- MinVal = 0x2, value = 0x0, adjusted to MinVal.
tRRDD -- MinVal = 0x2, value = 0x0, adjusted to MinVal.
tWWDS -- MinVal = 0x2, value = 0x0, adjusted to MinVal.
tWWDD -- MinVal = 0x2, value = 0x0, adjusted to MinVal.
tRWDS -- MinVal = 0x2, value = 0x0, adjusted to MinVal.
tRWDD -- MinVal = 0x2, value = 0x0, adjusted to MinVal.
tRRDS -- MinVal = 0x2, value = 0x0, adjusted to MinVal.
tWRDD -- MinVal = 0x2, value = 0x0, adjusted to MinVal.
tRRDD -- MinVal = 0x2, value = 0x0, adjusted to MinVal.
tRRDS -- MinVal = 0x2, value = 0x0, adjusted to MinVal.
tWWDD -- MinVal = 0x2, value = 0x0, adjusted to MinVal.
tWWDS -- MinVal = 0x2, value = 0x0, adjusted to MinVal.
tRWDD -- MinVal = 0x2, value = 0x0, adjusted to MinVal.
tRWDS -- MinVal = 0x2, value = 0x0, adjusted to MinVal.
tWRDD -- MinVal = 0x2, value = 0x0, adjusted to MinVal.
tRRDS -- MinVal = 0x2, value = 0x0, adjusted to MinVal.
tRRDS -- MinVal = 0x2, value = 0x0, adjusted to MinVal.
tRRDD -- MinVal = 0x2, value = 0x0, adjusted to MinVal.
tWWDS -- MinVal = 0x2, value = 0x0, adjusted to MinVal.
tWWDD -- MinVal = 0x2, value = 0x0, adjusted to MinVal.
tRWDS -- MinVal = 0x2, value = 0x0, adjusted to MinVal.
tRWDD -- MinVal = 0x2, value = 0x0, adjusted to MinVal.
tRRDS -- MinVal = 0x2, value = 0x0, adjusted to MinVal.
tWRDD -- MinVal = 0x2, value = 0x0, adjusted to MinVal.
tRRDD -- MinVal = 0x2, value = 0x0, adjusted to MinVal.
tRRDS -- MinVal = 0x2, value = 0x0, adjusted to MinVal.
tWWDD -- MinVal = 0x2, value = 0x0, adjusted to MinVal.
tWWDS -- MinVal = 0x2, value = 0x0, adjusted to MinVal.
tRWDD -- MinVal = 0x2, value = 0x0, adjusted to MinVal.
tRWDS -- MinVal = 0x2, value = 0x0, adjusted to MinVal.
tWRDD -- MinVal = 0x2, value = 0x0, adjusted to MinVal.
tRRDS -- MinVal = 0x2, value = 0x0, adjusted to MinVal.
tRRDS -- MinVal = 0x2, value = 0x0, adjusted to MinVal.
tRRDD -- MinVal = 0x2, value = 0x0, adjusted to MinVal.
tWWDS -- MinVal = 0x2, value = 0x0, adjusted to MinVal.
tWWDD -- MinVal = 0x2, value = 0x0, adjusted to MinVal.
tRWDS -- MinVal = 0x2, value = 0x0, adjusted to MinVal.
tRWDD -- MinVal = 0x2, value = 0x0, adjusted to MinVal.
tRRDS -- MinVal = 0x2, value = 0x0, adjusted to MinVal.
tWRDD -- MinVal = 0x2, value = 0x0, adjusted to MinVal.
tRRDD -- MinVal = 0x2, value = 0x0, adjusted to MinVal.
tRRDS -- MinVal = 0x2, value = 0x0, adjusted to MinVal.
tWWDD -- MinVal = 0x2, value = 0x0, adjusted to MinVal.
tWWDS -- MinVal = 0x2, value = 0x0, adjusted to MinVal.
tRWDD -- MinVal = 0x2, value = 0x0, adjusted to MinVal.
tRWDS -- MinVal = 0x2, value = 0x0, adjusted to MinVal.
tWRDD -- MinVal = 0x2, value = 0x0, adjusted to MinVal.
tRRDS -- MinVal = 0x2, value = 0x0, adjusted to MinVal.
tRRDS -- MinVal = 0x2, value = 0x0, adjusted to MinVal.
tRRDD -- MinVal = 0x2, value = 0x0, adjusted to MinVal.
tWWDS -- MinVal = 0x2, value = 0x0, adjusted to MinVal.
tWWDD -- MinVal = 0x2, value = 0x0, adjusted to MinVal.
tRWDS -- MinVal = 0x2, value = 0x0, adjusted to MinVal.
tRWDD -- MinVal = 0x2, value = 0x0, adjusted to MinVal.
tRRDS -- MinVal = 0x2, value = 0x0, adjusted to MinVal.
tWRDD -- MinVal = 0x2, value = 0x0, adjusted to MinVal.
[ScktId: 0] Early Configuration - 1272ms
tRRDS -- MinVal = 0x2, value = 0x0, adjusted to MinVal.
[ScktId: 0] DDRIO Initialization -- Started
tWWDS -- MinVal = 0x2, value = 0x0, adjusted to MinVal.
tRWDS -- MinVal = 0x2, value = 0x0, adjusted to MinVal.
tRRDS -- MinVal = 0x2, value = 0x0, adjusted to MinVal.
[ScktId: 1] Early Configuration - 728ms
[ScktId: 1] DDRIO Initialization -- Started
[ScktId: 0] DDRIO Initialization - 38ms
[ScktId: 0] DDRIO Initialization Late -- Started
DfxTimingOverride10nm Starts
[ScktId: 0] DDRIO Initialization Late - 16ms
[ScktId: 0] Pipe Sync AP Data -- Started
[ScktId: 1] DDRIO Initialization - 33ms
[ScktId: 1] DDRIO Initialization Late -- Started
DfxTimingOverride10nm Starts
[ScktId: 1] DDRIO Initialization Late - 17ms
[ScktId: 1] Pipe Sync AP Data -- Started
[ScktId: 0] Pipe Sync AP Data - 47ms
[ScktId: 1] Pipe Sync AP Data - 17ms
[ScktId: 0] Pipe Sync AP Smbus Mode -- Started
[ScktId: 1] Pipe Sync AP Smbus Mode -- Started
[ScktId: 0] Pipe Sync AP Smbus Mode - 13ms
[ScktId: 1] Pipe Sync AP Smbus Mode - 9ms
[ScktId: 0] Pipe Sync AP Reset Status -- Started
[ScktId: 1] Pipe Sync AP Reset Status -- Started
[ScktId: 0] Pipe Sync AP Reset Status - 13ms
[ScktId: 1] Pipe Sync AP Reset Status - 9ms
[ScktId: 0] Pipe Sync SBSP Status -- Started
[ScktId: 1] Pipe Sync SBSP Status -- Started
[ScktId: 1] Pipe Sync SBSP Status - 8ms
[ScktId: 0] Pipe Sync SBSP Status - 13ms
[ScktId: 1] DDR Training -- Started
[ScktId: 0] DDR Training -- Started
[ScktId: 1] Pre-Training Initialization -- Started
[ScktId: 0] Pre-Training Initialization -- Started
N1: Bus Instance = 0; I2C speed = 3; I3C speed = 2; Bus mode = 0
N0: Bus Instance = 0; I2C speed = 3; I3C speed = 2; Bus mode = 0
N1: Bus Instance = 0; I2C speed = 3; I3C speed = 2; Bus mode = 1
N0: Bus Instance = 0; I2C speed = 3; I3C speed = 2; Bus mode = 1
N1: I3C Instance 0: Switch to I3C mode - Status = Success
N0: I3C Instance 0: Switch to I3C mode - Status = Success
N1: Bus Instance = 1; I2C speed = 3; I3C speed = 2; Bus mode = 0
N0: Bus Instance = 1; I2C speed = 3; I3C speed = 2; Bus mode = 0
N1: Bus Instance = 1; I2C speed = 3; I3C speed = 2; Bus mode = 1
N0: Bus Instance = 1; I2C speed = 3; I3C speed = 2; Bus mode = 1
N1: I3C Instance 1: Switch to I3C mode - Status = Success
N0: I3C Instance 1: Switch to I3C mode - Status = Success
Socket 1 - Sending 3 NOPS sequence to exit clockstop.
[ScktId: 1] Pre-Training Initialization - 104ms
Socket 0 - Sending 3 NOPS sequence to exit clockstop.
[ScktId: 1] Host CS Training -- Started
[ScktId: 0] Pre-Training Initialization - 111ms
[ScktId: 0] Host CS Training -- Started
N0: Bus Instance = 0; I2C speed = 3; I3C speed = 2; Bus mode = 0
N0: Bus Instance = 0; I2C speed = 3; I3C speed = 2; Bus mode = 1
N1: Bus Instance = 0; I2C speed = 3; I3C speed = 2; Bus mode = 0
N0: I3C Instance 0: Switch to I3C mode - Status = Success
N1: Bus Instance = 0; I2C speed = 3; I3C speed = 2; Bus mode = 1
N0: Bus Instance = 1; I2C speed = 3; I3C speed = 2; Bus mode = 0
N1: I3C Instance 0: Switch to I3C mode - Status = Success
N0: Bus Instance = 1; I2C speed = 3; I3C speed = 2; Bus mode = 1
N1: Bus Instance = 1; I2C speed = 3; I3C speed = 2; Bus mode = 0
N0: I3C Instance 1: Switch to I3C mode - Status = Success
N1: Bus Instance = 1; I2C speed = 3; I3C speed = 2; Bus mode = 1
N1: I3C Instance 1: Switch to I3C mode - Status = Success
[ScktId: 0] Host CS Training - 218ms
[ScktId: 0] Host CA Training Simple -- Started
[ScktId: 1] Host CS Training - 244ms
[ScktId: 1] Host CA Training Simple -- Started
[ScktId: 0] Host CA Training Simple - 341ms
[ScktId: 0] RCD DCA DFE Training -- Started
[ScktId: 1] Host CA Training Simple - 373ms
[ScktId: 1] RCD DCA DFE Training -- Started
[ScktId: 0] RCD DCA DFE Training - 3663ms
[ScktId: 0] Host CA Training Complex -- Started
[ScktId: 0] Host CA Training Complex - 161ms
[ScktId: 0] RCD DCA Slew Rate Training -- Started
[ScktId: 0] RCD DCA Slew Rate Training - 4ms
[ScktId: 0] RCD DCA TCO Training -- Started
[ScktId: 1] RCD DCA DFE Training - 4090ms
[ScktId: 1] Host CA Training Complex -- Started
[ScktId: 0] RCD DCA TCO Training - 550ms
[ScktId: 0] RCD DCA/DCK Duty Cycle Training -- Started
[ScktId: 1] Host CA Training Complex - 170ms
[ScktId: 0] RCD DCA/DCK Duty Cycle Training - 409ms
[ScktId: 1] RCD DCA Slew Rate Training -- Started
[ScktId: 0] Re-center Host CA Training -- Started
[ScktId: 1] RCD DCA Slew Rate Training - 10ms
[ScktId: 1] RCD DCA TCO Training -- Started
[ScktId: 0] Re-center Host CA Training - 171ms
[ScktId: 0] CA temperature compensation -- Started
[ScktId: 0] CA temperature compensation - 5ms
[ScktId: 0] BCOM Training -- Started
[ScktId: 0] BCOM Training - 3ms
[ScktId: 0] RCD QCS Training -- Started
[ScktId: 0] RCD QCS Training - 104ms
[ScktId: 0] RCD QCA Training -- Started
[ScktId: 0] RCD QCA Training - 323ms
[ScktId: 0] PBA Enumeration -- Started
[ScktId: 0] PBA Enumeration - 3ms
[ScktId: 0] REQ Training -- Started
[ScktId: 0] REQ Training - 3ms
[ScktId: 1] RCD DCA TCO Training - 626ms
[ScktId: 0] MDQS Receive Enable Training -- Started
[ScktId: 1] RCD DCA/DCK Duty Cycle Training -- Started
[ScktId: 0] MDQS Receive Enable Training - 9ms
[ScktId: 0] MDQS Read Delay Training -- Started
[ScktId: 1] RCD DCA/DCK Duty Cycle Training - 467ms
[ScktId: 0] MDQS Read Delay Training - 456ms
[ScktId: 1] Re-center Host CA Training -- Started
[ScktId: 0] Receive Enable Training -- Started
[ScktId: 0] Receive Enable Training - 24ms
[ScktId: 0] Read Dq Dqs: Coarse Read DQ/DQS -- Started
[ScktId: 1] Re-center Host CA Training - 181ms
[ScktId: 1] CA temperature compensation -- Started
[ScktId: 1] CA temperature compensation - 5ms
[ScktId: 1] BCOM Training -- Started
[ScktId: 1] BCOM Training - 3ms
[ScktId: 1] RCD QCS Training -- Started
[ScktId: 1] RCD QCS Training - 112ms
[ScktId: 1] RCD QCA Training -- Started
[ScktId: 0] Read Dq Dqs: Coarse Read DQ/DQS - 341ms
[ScktId: 1] RCD QCA Training - 349ms
[ScktId: 0] Read Dq Dqs: Swizzle Discovery -- Started
[ScktId: 1] PBA Enumeration -- Started
[ScktId: 0] Read Dq Dqs: Swizzle Discovery - 10ms
[ScktId: 1] PBA Enumeration - 9ms
[ScktId: 0] Read Dq Dqs: Pre-DFE Read 2D Centering -- Started
[ScktId: 1] REQ Training -- Started
[ScktId: 1] REQ Training - 9ms
[ScktId: 1] MDQS Receive Enable Training -- Started
[ScktId: 1] MDQS Receive Enable Training - 5ms
[ScktId: 1] MDQS Read Delay Training -- Started
[ScktId: 1] MDQS Read Delay Training - 4ms
[ScktId: 1] Receive Enable Training -- Started
[ScktId: 1] Receive Enable Training - 22ms
[ScktId: 1] Read Dq Dqs: Coarse Read DQ/DQS -- Started
[ScktId: 0] Read Dq Dqs: Pre-DFE Read 2D Centering - 93ms
[ScktId: 0] Read Dq Dqs: Duty Cycle Adjuster -- Started
[ScktId: 0] Read Dq Dqs: Duty Cycle Adjuster - 5ms
[ScktId: 0] Read Dq Dqs: Read DFE Training -- Started
[ScktId: 1] Read Dq Dqs: Coarse Read DQ/DQS - 372ms
[ScktId: 1] Read Dq Dqs: Swizzle Discovery -- Started
[ScktId: 1] Read Dq Dqs: Swizzle Discovery - 6ms
[ScktId: 1] Read Dq Dqs: Pre-DFE Read 2D Centering -- Started
[ScktId: 1] Read Dq Dqs: Pre-DFE Read 2D Centering - 96ms
[ScktId: 1] Read Dq Dqs: Duty Cycle Adjuster -- Started
[ScktId: 1] Read Dq Dqs: Duty Cycle Adjuster - 5ms
[ScktId: 1] Read Dq Dqs: Read DFE Training -- Started
[ScktId: 0] Read Dq Dqs: Read DFE Training - 3375ms
[ScktId: 0] Read Dq Dqs: Post-DFE Read 2D Centering -- Started
[ScktId: 0] Read Dq Dqs: Post-DFE Read 2D Centering - 643ms
[ScktId: 0] Switch to DDRT2 Mode -- Started
[ScktId: 0] Switch to DDRT2 Mode - 4ms
[ScktId: 0] Buffer DRAM Write Leveling Training -- Started
[ScktId: 0] Buffer DRAM Write Leveling Training - 5ms
[ScktId: 0] Buffer Write Delay Training -- Started
[ScktId: 0] Buffer Write Delay Training - 5ms
[ScktId: 0] Write Leveling Training -- Started
[ScktId: 0] Write Leveling Training - 95ms
[ScktId: 0] Write Dq Dqs: Coarse Write DQ/DQS -- Started
[ScktId: 1] Read Dq Dqs: Read DFE Training - 3705ms
[ScktId: 1] Read Dq Dqs: Post-DFE Read 2D Centering -- Started
[ScktId: 0] Write Dq Dqs: Coarse Write DQ/DQS - 541ms
[ScktId: 0] Write Dq Dqs: Pre-DFE Write 2D Centering -- Started
N0.C00.D0.R0: High = 20 - Low = -23
N0.C00: Composite High = 20 - Composite Low = -23
N0.C02.D0.R0: High = 18 - Low = -22
N0.C02: Composite High = 18 - Composite Low = -22
[ScktId: 1] Read Dq Dqs: Post-DFE Read 2D Centering - 687ms
N0.C04.D0.R0: High = 22 - Low = -22
[ScktId: 1] Switch to DDRT2 Mode -- Started
N0.C04: Composite High = 22 - Composite Low = -22
[ScktId: 1] Switch to DDRT2 Mode - 7ms
N0.C06.D0.R0: High = 19 - Low = -18
[ScktId: 1] Buffer DRAM Write Leveling Training -- Started
N0.C06: Composite High = 19 - Composite Low = -18
[ScktId: 1] Buffer DRAM Write Leveling Training - 9ms
N0: Get eye height
[ScktId: 1] Buffer Write Delay Training -- Started
N0: Low: -18 High: 18
[ScktId: 1] Buffer Write Delay Training - 6ms
N0: Eye height = 36
[ScktId: 1] Write Leveling Training -- Started
N0: Timing Limited
[ScktId: 0] Write Dq Dqs: Pre-DFE Write 2D Centering - 314ms
[ScktId: 1] Write Leveling Training - 105ms
[ScktId: 0] Write Dq Dqs: Slew Rate DQ -- Started
[ScktId: 1] Write Dq Dqs: Coarse Write DQ/DQS -- Started
[ScktId: 0] Write Dq Dqs: Slew Rate DQ - 9ms
[ScktId: 0] Write Dq Dqs: TCO DQ -- Started
[ScktId: 0] Write Dq Dqs: TCO DQ - 4ms
[ScktId: 0] Write Dq Dqs: Write DFE Training -- Started
[ScktId: 1] Write Dq Dqs: Coarse Write DQ/DQS - 613ms
[ScktId: 1] Write Dq Dqs: Pre-DFE Write 2D Centering -- Started
N1.C00.D0.R0: High = 20 - Low = -24
N1.C00: Composite High = 20 - Composite Low = -24
N1.C02.D0.R0: High = 18 - Low = -23
N1.C02: Composite High = 18 - Composite Low = -23
N1.C04.D0.R0: High = 18 - Low = -24
N1.C04: Composite High = 18 - Composite Low = -24
N1.C06.D0.R0: High = 20 - Low = -20
N1.C06: Composite High = 20 - Composite Low = -20
N1: Get eye height
N1: Low: -20 High: 18
N1: Eye height = 38
N1: Timing Limited
[ScktId: 1] Write Dq Dqs: Pre-DFE Write 2D Centering - 306ms
[ScktId: 1] Write Dq Dqs: Slew Rate DQ -- Started
[ScktId: 1] Write Dq Dqs: Slew Rate DQ - 4ms
[ScktId: 1] Write Dq Dqs: TCO DQ -- Started
[ScktId: 1] Write Dq Dqs: TCO DQ - 4ms
[ScktId: 1] Write Dq Dqs: Write DFE Training -- Started
[ScktId: 0] Write Dq Dqs: Write DFE Training - 4142ms
[ScktId: 0] Buffer Write DFE Training -- Started
[ScktId: 0] Buffer Write DFE Training - 4ms
[ScktId: 0] Write Dq Dqs: Write ODT Latency Training -- Started
[ScktId: 0] Write Dq Dqs: Write ODT Latency Training - 8ms
[ScktId: 0] Command Normalization -- Started
[ScktId: 0] Command Normalization - 20ms
[ScktId: 0] Write Dq Dqs: Post-DFE Write 2D Centering -- Started
N0.C00.D0.R0: High = 21 - Low = -21
N0.C00: Composite High = 21 - Composite Low = -21
N0.C02.D0.R0: High = 21 - Low = -22
N0.C02: Composite High = 21 - Composite Low = -22
N0.C04.D0.R0: High = 22 - Low = -21
N0.C04: Composite High = 22 - Composite Low = -21
N0.C06.D0.R0: High = 21 - Low = -20
N0.C06: Composite High = 21 - Composite Low = -20
N0: Get eye height
N0: Low: -20 High: 21
N0: Eye height = 41
N0: Timing Limited
[ScktId: 1] Write Dq Dqs: Write DFE Training - 4766ms
[ScktId: 1] Buffer Write DFE Training -- Started
[ScktId: 1] Buffer Write DFE Training - 4ms
[ScktId: 1] Write Dq Dqs: Write ODT Latency Training -- Started
[ScktId: 1] Write Dq Dqs: Write ODT Latency Training - 8ms
[ScktId: 1] Command Normalization -- Started
[ScktId: 1] Command Normalization - 22ms
[ScktId: 1] Write Dq Dqs: Post-DFE Write 2D Centering -- Started
[ScktId: 0] Write Dq Dqs: Post-DFE Write 2D Centering - 1688ms
[ScktId: 0] Initialize Tx DQ Periodic Retraining -- Started
[ScktId: 0] Initialize Tx DQ Periodic Retraining - 7ms
[ScktId: 0] Read Dq Dqs: Post-DFE Read 2D Centering Late -- Started
N1.C00.D0.R0: High = 21 - Low = -22
N1.C00: Composite High = 21 - Composite Low = -22
N1.C02.D0.R0: High = 20 - Low = -20
N1.C02: Composite High = 20 - Composite Low = -20
N1.C04.D0.R0: High = 21 - Low = -22
N1.C04: Composite High = 21 - Composite Low = -22
N1.C06.D0.R0: High = 20 - Low = -21
N1.C06: Composite High = 20 - Composite Low = -21
N1: Get eye height
N1: Low: -20 High: 20
N1: Eye height = 40
N1: Timing Limited
[ScktId: 1] Write Dq Dqs: Post-DFE Write 2D Centering - 1747ms
[ScktId: 1] Initialize Tx DQ Periodic Retraining -- Started
[ScktId: 1] Initialize Tx DQ Periodic Retraining - 7ms
[ScktId: 1] Read Dq Dqs: Post-DFE Read 2D Centering Late -- Started
[ScktId: 0] Read Dq Dqs: Post-DFE Read 2D Centering Late - 12697ms
[ScktId: 0] Initialize Rx DQS Periodic Retraining -- Started
[ScktId: 0] Initialize Rx DQS Periodic Retraining - 6ms
[ScktId: 0] MemSweepTester -- Started
[ScktId: 0] MemSweepTester - 3ms
[ScktId: 0] PPR Flow -- Started
Calling PostPackageRepair
[ScktId: 0] PPR Flow - 6ms
[ScktId: 0] Roundtrip Latency Optimization -- Started
[ScktId: 0] Roundtrip Latency Optimization - 853ms
[ScktId: 0] Turnarounds Training -- Started
[ScktId: 1] Read Dq Dqs: Post-DFE Read 2D Centering Late - 12347ms
[ScktId: 1] Initialize Rx DQS Periodic Retraining -- Started
[ScktId: 1] Initialize Rx DQS Periodic Retraining - 6ms
[ScktId: 1] MemSweepTester -- Started
[ScktId: 1] MemSweepTester - 3ms
[ScktId: 1] PPR Flow -- Started
Calling PostPackageRepair
[ScktId: 1] PPR Flow - 6ms
[ScktId: 1] Roundtrip Latency Optimization -- Started
[ScktId: 0] Turnarounds Training - 531ms
Total MRC time = 32606ms
[ScktId: 0] DDR Training - 32615ms
[ScktId: 0] Pipe Sync AP Smbus Mode -- Started
[ScktId: 1] Roundtrip Latency Optimization - 866ms
[ScktId: 1] Turnarounds Training -- Started
[ScktId: 1] Turnarounds Training - 529ms
Total MRC time = 33881ms
[ScktId: 1] DDR Training - 33891ms
[ScktId: 1] Pipe Sync AP Smbus Mode -- Started
[ScktId: 0] Pipe Sync AP Smbus Mode - 1276ms
[ScktId: 1] Pipe Sync AP Smbus Mode - 4ms
[ScktId: 0] Display Training Results -- Started
[ScktId: 1] Display Training Results -- Started
[ScktId: 0] Display Training Results - 105ms
[ScktId: 1] Display Training Results - 205ms
[ScktId: 0] Check Training Results -- Started
[ScktId: 1] Check Training Results -- Started
[ScktId: 0] Check Training Results - 9ms
[ScktId: 1] Check Training Results - 9ms
[ScktId: 0] HBM Training -- Started
[ScktId: 1] HBM Training -- Started
HbmioMailbox -In Mailbox Full Prod Training (Cold Reset)
HbmioMailbox -In Mailbox Full Prod Training (Cold Reset)
Executing full_prod_training on Socket 0, HBMIO 0
Executing full_prod_training on Socket 1, HBMIO 0
Training result: return_data0 = 0x0, return_data1 = 0xB00
Training result: return_data0 = 0x0, return_data1 = 0xB00
Executing full_prod_training on Socket 0, HBMIO 1
Executing full_prod_training on Socket 1, HBMIO 1
Training result: return_data0 = 0x0, return_data1 = 0xB00
Training result: return_data0 = 0x0, return_data1 = 0xB00
Executing full_prod_training on Socket 0, HBMIO 2
Executing full_prod_training on Socket 1, HBMIO 2
Training result: return_data0 = 0x0, return_data1 = 0xB00
Training result: return_data0 = 0x0, return_data1 = 0xB00
Executing full_prod_training on Socket 0, HBMIO 3
Executing full_prod_training on Socket 1, HBMIO 3
Training result: return_data0 = 0x0, return_data1 = 0xB00
Training result: return_data0 = 0x0, return_data1 = 0xB00
Socket0 HbmCh0, PI Code:
Socket1 HbmCh0, PI Code:
DWord DQ: txdq_pi0_code = 0x1, txdq_pi1_code = 0x41
DWord DQ: txdq_pi0_code = 0x0, txdq_pi1_code = 0x40
DWord DQS: dqs_pi0_code = 0x20, dqs_pi1_code = 0x60
DWord DQS: dqs_pi0_code = 0x20, dqs_pi1_code = 0x60
AWord DQ: txdq_pi0_code = 0x7F, txdq_pi1_code = 0x3F
AWord DQ: txdq_pi0_code = 0x0, txdq_pi1_code = 0x40
AWord DQS: dqs_pi0_code = 0x20, dqs_pi1_code = 0x60
AWord DQS: dqs_pi0_code = 0x20, dqs_pi1_code = 0x60
Socket0 HbmCh1, PI Code:
Socket1 HbmCh1, PI Code:
DWord DQ: txdq_pi0_code = 0x0, txdq_pi1_code = 0x40
DWord DQ: txdq_pi0_code = 0x1, txdq_pi1_code = 0x41
DWord DQS: dqs_pi0_code = 0x20, dqs_pi1_code = 0x60
DWord DQS: dqs_pi0_code = 0x20, dqs_pi1_code = 0x60
AWord DQ: txdq_pi0_code = 0x7F, txdq_pi1_code = 0x3F
AWord DQ: txdq_pi0_code = 0x7E, txdq_pi1_code = 0x3E
AWord DQS: dqs_pi0_code = 0x20, dqs_pi1_code = 0x60
AWord DQS: dqs_pi0_code = 0x20, dqs_pi1_code = 0x60
Socket0 HbmCh2, PI Code:
Socket1 HbmCh2, PI Code:
DWord DQ: txdq_pi0_code = 0x1, txdq_pi1_code = 0x41
DWord DQ: txdq_pi0_code = 0x0, txdq_pi1_code = 0x40
DWord DQS: dqs_pi0_code = 0x20, dqs_pi1_code = 0x60
DWord DQS: dqs_pi0_code = 0x20, dqs_pi1_code = 0x60
AWord DQ: txdq_pi0_code = 0x7F, txdq_pi1_code = 0x3F
AWord DQ: txdq_pi0_code = 0x7F, txdq_pi1_code = 0x3F
AWord DQS: dqs_pi0_code = 0x20, dqs_pi1_code = 0x60
AWord DQS: dqs_pi0_code = 0x20, dqs_pi1_code = 0x60
Socket0 HbmCh3, PI Code:
Socket1 HbmCh3, PI Code:
DWord DQ: txdq_pi0_code = 0x1, txdq_pi1_code = 0x41
DWord DQ: txdq_pi0_code = 0x7F, txdq_pi1_code = 0x3F
DWord DQS: dqs_pi0_code = 0x20, dqs_pi1_code = 0x60
DWord DQS: dqs_pi0_code = 0x20, dqs_pi1_code = 0x60
AWord DQ: txdq_pi0_code = 0x7F, txdq_pi1_code = 0x3F
AWord DQ: txdq_pi0_code = 0x7F, txdq_pi1_code = 0x3F
AWord DQS: dqs_pi0_code = 0x20, dqs_pi1_code = 0x60
AWord DQS: dqs_pi0_code = 0x20, dqs_pi1_code = 0x60
Socket0 HbmCh4, PI Code:
Socket1 HbmCh4, PI Code:
DWord DQ: txdq_pi0_code = 0x2, txdq_pi1_code = 0x42
DWord DQ: txdq_pi0_code = 0x2, txdq_pi1_code = 0x42
DWord DQS: dqs_pi0_code = 0x20, dqs_pi1_code = 0x60
DWord DQS: dqs_pi0_code = 0x20, dqs_pi1_code = 0x60
AWord DQ: txdq_pi0_code = 0x7F, txdq_pi1_code = 0x3F
AWord DQ: txdq_pi0_code = 0x7F, txdq_pi1_code = 0x3F
AWord DQS: dqs_pi0_code = 0x20, dqs_pi1_code = 0x60
AWord DQS: dqs_pi0_code = 0x20, dqs_pi1_code = 0x60
Socket0 HbmCh5, PI Code:
Socket1 HbmCh5, PI Code:
DWord DQ: txdq_pi0_code = 0x1, txdq_pi1_code = 0x41
DWord DQ: txdq_pi0_code = 0x1, txdq_pi1_code = 0x41
DWord DQS: dqs_pi0_code = 0x20, dqs_pi1_code = 0x60
DWord DQS: dqs_pi0_code = 0x20, dqs_pi1_code = 0x60
AWord DQ: txdq_pi0_code = 0x7F, txdq_pi1_code = 0x3F
AWord DQ: txdq_pi0_code = 0x7E, txdq_pi1_code = 0x3E
AWord DQS: dqs_pi0_code = 0x20, dqs_pi1_code = 0x60
AWord DQS: dqs_pi0_code = 0x20, dqs_pi1_code = 0x60
Socket0 HbmCh6, PI Code:
Socket1 HbmCh6, PI Code:
DWord DQ: txdq_pi0_code = 0x2, txdq_pi1_code = 0x42
DWord DQ: txdq_pi0_code = 0x1, txdq_pi1_code = 0x41
DWord DQS: dqs_pi0_code = 0x20, dqs_pi1_code = 0x60
DWord DQS: dqs_pi0_code = 0x20, dqs_pi1_code = 0x60
AWord DQ: txdq_pi0_code = 0x7E, txdq_pi1_code = 0x3E
AWord DQ: txdq_pi0_code = 0x7F, txdq_pi1_code = 0x3F
AWord DQS: dqs_pi0_code = 0x20, dqs_pi1_code = 0x60
AWord DQS: dqs_pi0_code = 0x20, dqs_pi1_code = 0x60
Socket0 HbmCh7, PI Code:
Socket1 HbmCh7, PI Code:
DWord DQ: txdq_pi0_code = 0x1, txdq_pi1_code = 0x41
DWord DQ: txdq_pi0_code = 0x0, txdq_pi1_code = 0x40
DWord DQS: dqs_pi0_code = 0x20, dqs_pi1_code = 0x60
DWord DQS: dqs_pi0_code = 0x20, dqs_pi1_code = 0x60
AWord DQ: txdq_pi0_code = 0x7E, txdq_pi1_code = 0x3E
AWord DQ: txdq_pi0_code = 0x7E, txdq_pi1_code = 0x3E
AWord DQS: dqs_pi0_code = 0x20, dqs_pi1_code = 0x60
AWord DQS: dqs_pi0_code = 0x20, dqs_pi1_code = 0x60
Socket0 HbmCh8, PI Code:
Socket1 HbmCh8, PI Code:
DWord DQ: txdq_pi0_code = 0x0, txdq_pi1_code = 0x40
DWord DQ: txdq_pi0_code = 0x0, txdq_pi1_code = 0x40
DWord DQS: dqs_pi0_code = 0x20, dqs_pi1_code = 0x60
DWord DQS: dqs_pi0_code = 0x20, dqs_pi1_code = 0x60
AWord DQ: txdq_pi0_code = 0x0, txdq_pi1_code = 0x40
AWord DQ: txdq_pi0_code = 0x7F, txdq_pi1_code = 0x3F
AWord DQS: dqs_pi0_code = 0x20, dqs_pi1_code = 0x60
AWord DQS: dqs_pi0_code = 0x20, dqs_pi1_code = 0x60
Socket0 HbmCh9, PI Code:
Socket1 HbmCh9, PI Code:
DWord DQ: txdq_pi0_code = 0x0, txdq_pi1_code = 0x40
DWord DQ: txdq_pi0_code = 0x1, txdq_pi1_code = 0x41
DWord DQS: dqs_pi0_code = 0x20, dqs_pi1_code = 0x60
DWord DQS: dqs_pi0_code = 0x20, dqs_pi1_code = 0x60
AWord DQ: txdq_pi0_code = 0x1, txdq_pi1_code = 0x41
AWord DQ: txdq_pi0_code = 0x1, txdq_pi1_code = 0x41
AWord DQS: dqs_pi0_code = 0x20, dqs_pi1_code = 0x60
AWord DQS: dqs_pi0_code = 0x20, dqs_pi1_code = 0x60
Socket0 HbmCh10, PI Code:
Socket1 HbmCh10, PI Code:
DWord DQ: txdq_pi0_code = 0x1, txdq_pi1_code = 0x41
DWord DQ: txdq_pi0_code = 0x0, txdq_pi1_code = 0x40
DWord DQS: dqs_pi0_code = 0x20, dqs_pi1_code = 0x60
DWord DQS: dqs_pi0_code = 0x20, dqs_pi1_code = 0x60
AWord DQ: txdq_pi0_code = 0x0, txdq_pi1_code = 0x40
AWord DQ: txdq_pi0_code = 0x0, txdq_pi1_code = 0x40
AWord DQS: dqs_pi0_code = 0x20, dqs_pi1_code = 0x60
AWord DQS: dqs_pi0_code = 0x20, dqs_pi1_code = 0x60
Socket0 HbmCh11, PI Code:
Socket1 HbmCh11, PI Code:
DWord DQ: txdq_pi0_code = 0x1, txdq_pi1_code = 0x41
DWord DQ: txdq_pi0_code = 0x1, txdq_pi1_code = 0x41
DWord DQS: dqs_pi0_code = 0x20, dqs_pi1_code = 0x60
DWord DQS: dqs_pi0_code = 0x20, dqs_pi1_code = 0x60
AWord DQ: txdq_pi0_code = 0x0, txdq_pi1_code = 0x40
AWord DQ: txdq_pi0_code = 0x0, txdq_pi1_code = 0x40
AWord DQS: dqs_pi0_code = 0x20, dqs_pi1_code = 0x60
AWord DQS: dqs_pi0_code = 0x20, dqs_pi1_code = 0x60
Socket0 HbmCh12, PI Code:
Socket1 HbmCh12, PI Code:
DWord DQ: txdq_pi0_code = 0x1, txdq_pi1_code = 0x41
DWord DQ: txdq_pi0_code = 0x0, txdq_pi1_code = 0x40
DWord DQS: dqs_pi0_code = 0x20, dqs_pi1_code = 0x60
DWord DQS: dqs_pi0_code = 0x20, dqs_pi1_code = 0x60
AWord DQ: txdq_pi0_code = 0x0, txdq_pi1_code = 0x40
AWord DQ: txdq_pi0_code = 0x7F, txdq_pi1_code = 0x3F
AWord DQS: dqs_pi0_code = 0x20, dqs_pi1_code = 0x60
AWord DQS: dqs_pi0_code = 0x20, dqs_pi1_code = 0x60
Socket0 HbmCh13, PI Code:
Socket1 HbmCh13, PI Code:
DWord DQ: txdq_pi0_code = 0x2, txdq_pi1_code = 0x42
DWord DQ: txdq_pi0_code = 0x1, txdq_pi1_code = 0x41
DWord DQS: dqs_pi0_code = 0x20, dqs_pi1_code = 0x60
DWord DQS: dqs_pi0_code = 0x20, dqs_pi1_code = 0x60
AWord DQ: txdq_pi0_code = 0x7E, txdq_pi1_code = 0x3E
AWord DQ: txdq_pi0_code = 0x0, txdq_pi1_code = 0x40
AWord DQS: dqs_pi0_code = 0x20, dqs_pi1_code = 0x60
AWord DQS: dqs_pi0_code = 0x20, dqs_pi1_code = 0x60
Socket0 HbmCh14, PI Code:
Socket1 HbmCh14, PI Code:
DWord DQ: txdq_pi0_code = 0x1, txdq_pi1_code = 0x41
DWord DQ: txdq_pi0_code = 0x1, txdq_pi1_code = 0x41
DWord DQS: dqs_pi0_code = 0x20, dqs_pi1_code = 0x60
DWord DQS: dqs_pi0_code = 0x20, dqs_pi1_code = 0x60
AWord DQ: txdq_pi0_code = 0x7F, txdq_pi1_code = 0x3F
AWord DQ: txdq_pi0_code = 0x7E, txdq_pi1_code = 0x3E
AWord DQS: dqs_pi0_code = 0x20, dqs_pi1_code = 0x60
AWord DQS: dqs_pi0_code = 0x20, dqs_pi1_code = 0x60
Socket0 HbmCh15, PI Code:
Socket1 HbmCh15, PI Code:
DWord DQ: txdq_pi0_code = 0x3, txdq_pi1_code = 0x43
DWord DQ: txdq_pi0_code = 0x1, txdq_pi1_code = 0x41
DWord DQS: dqs_pi0_code = 0x20, dqs_pi1_code = 0x60
DWord DQS: dqs_pi0_code = 0x20, dqs_pi1_code = 0x60
AWord DQ: txdq_pi0_code = 0x7F, txdq_pi1_code = 0x3F
AWord DQ: txdq_pi0_code = 0x7F, txdq_pi1_code = 0x3F
AWord DQS: dqs_pi0_code = 0x20, dqs_pi1_code = 0x60
AWord DQS: dqs_pi0_code = 0x20, dqs_pi1_code = 0x60
Socket0 HbmCh16, PI Code:
Socket1 HbmCh16, PI Code:
DWord DQ: txdq_pi0_code = 0x1, txdq_pi1_code = 0x41
DWord DQ: txdq_pi0_code = 0x1, txdq_pi1_code = 0x41
DWord DQS: dqs_pi0_code = 0x20, dqs_pi1_code = 0x60
DWord DQS: dqs_pi0_code = 0x20, dqs_pi1_code = 0x60
AWord DQ: txdq_pi0_code = 0x0, txdq_pi1_code = 0x40
AWord DQ: txdq_pi0_code = 0x0, txdq_pi1_code = 0x40
AWord DQS: dqs_pi0_code = 0x20, dqs_pi1_code = 0x60
AWord DQS: dqs_pi0_code = 0x20, dqs_pi1_code = 0x60
Socket0 HbmCh17, PI Code:
Socket1 HbmCh17, PI Code:
DWord DQ: txdq_pi0_code = 0x0, txdq_pi1_code = 0x40
DWord DQ: txdq_pi0_code = 0x1, txdq_pi1_code = 0x41
DWord DQS: dqs_pi0_code = 0x20, dqs_pi1_code = 0x60
DWord DQS: dqs_pi0_code = 0x20, dqs_pi1_code = 0x60
AWord DQ: txdq_pi0_code = 0x7F, txdq_pi1_code = 0x3F
AWord DQ: txdq_pi0_code = 0x0, txdq_pi1_code = 0x40
AWord DQS: dqs_pi0_code = 0x20, dqs_pi1_code = 0x60
AWord DQS: dqs_pi0_code = 0x20, dqs_pi1_code = 0x60
Socket0 HbmCh18, PI Code:
Socket1 HbmCh18, PI Code:
DWord DQ: txdq_pi0_code = 0x1, txdq_pi1_code = 0x41
DWord DQ: txdq_pi0_code = 0x2, txdq_pi1_code = 0x42
DWord DQS: dqs_pi0_code = 0x20, dqs_pi1_code = 0x60
DWord DQS: dqs_pi0_code = 0x20, dqs_pi1_code = 0x60
AWord DQ: txdq_pi0_code = 0x7F, txdq_pi1_code = 0x3F
AWord DQ: txdq_pi0_code = 0x0, txdq_pi1_code = 0x40
AWord DQS: dqs_pi0_code = 0x20, dqs_pi1_code = 0x60
AWord DQS: dqs_pi0_code = 0x20, dqs_pi1_code = 0x60
Socket0 HbmCh19, PI Code:
Socket1 HbmCh19, PI Code:
DWord DQ: txdq_pi0_code = 0x0, txdq_pi1_code = 0x40
DWord DQ: txdq_pi0_code = 0x0, txdq_pi1_code = 0x40
DWord DQS: dqs_pi0_code = 0x20, dqs_pi1_code = 0x60
DWord DQS: dqs_pi0_code = 0x20, dqs_pi1_code = 0x60
AWord DQ: txdq_pi0_code = 0x7F, txdq_pi1_code = 0x3F
AWord DQ: txdq_pi0_code = 0x7E, txdq_pi1_code = 0x3E
AWord DQS: dqs_pi0_code = 0x20, dqs_pi1_code = 0x60
AWord DQS: dqs_pi0_code = 0x20, dqs_pi1_code = 0x60
Socket0 HbmCh20, PI Code:
Socket1 HbmCh20, PI Code:
DWord DQ: txdq_pi0_code = 0x2, txdq_pi1_code = 0x42
DWord DQ: txdq_pi0_code = 0x3, txdq_pi1_code = 0x43
DWord DQS: dqs_pi0_code = 0x20, dqs_pi1_code = 0x60
DWord DQS: dqs_pi0_code = 0x20, dqs_pi1_code = 0x60
AWord DQ: txdq_pi0_code = 0x7F, txdq_pi1_code = 0x3F
AWord DQ: txdq_pi0_code = 0x7F, txdq_pi1_code = 0x3F
AWord DQS: dqs_pi0_code = 0x20, dqs_pi1_code = 0x60
AWord DQS: dqs_pi0_code = 0x20, dqs_pi1_code = 0x60
Socket0 HbmCh21, PI Code:
Socket1 HbmCh21, PI Code:
DWord DQ: txdq_pi0_code = 0x1, txdq_pi1_code = 0x41
DWord DQ: txdq_pi0_code = 0x3, txdq_pi1_code = 0x43
DWord DQS: dqs_pi0_code = 0x20, dqs_pi1_code = 0x60
DWord DQS: dqs_pi0_code = 0x20, dqs_pi1_code = 0x60
AWord DQ: txdq_pi0_code = 0x7E, txdq_pi1_code = 0x3E
AWord DQ: txdq_pi0_code = 0x7F, txdq_pi1_code = 0x3F
AWord DQS: dqs_pi0_code = 0x20, dqs_pi1_code = 0x60
AWord DQS: dqs_pi0_code = 0x20, dqs_pi1_code = 0x60
Socket0 HbmCh22, PI Code:
Socket1 HbmCh22, PI Code:
DWord DQ: txdq_pi0_code = 0x2, txdq_pi1_code = 0x42
DWord DQ: txdq_pi0_code = 0x3, txdq_pi1_code = 0x43
DWord DQS: dqs_pi0_code = 0x20, dqs_pi1_code = 0x60
DWord DQS: dqs_pi0_code = 0x20, dqs_pi1_code = 0x60
AWord DQ: txdq_pi0_code = 0x7F, txdq_pi1_code = 0x3F
AWord DQ: txdq_pi0_code = 0x7F, txdq_pi1_code = 0x3F
AWord DQS: dqs_pi0_code = 0x20, dqs_pi1_code = 0x60
AWord DQS: dqs_pi0_code = 0x20, dqs_pi1_code = 0x60
Socket0 HbmCh23, PI Code:
Socket1 HbmCh23, PI Code:
DWord DQ: txdq_pi0_code = 0x2, txdq_pi1_code = 0x42
DWord DQ: txdq_pi0_code = 0x0, txdq_pi1_code = 0x40
DWord DQS: dqs_pi0_code = 0x20, dqs_pi1_code = 0x60
DWord DQS: dqs_pi0_code = 0x20, dqs_pi1_code = 0x60
AWord DQ: txdq_pi0_code = 0x7E, txdq_pi1_code = 0x3E
AWord DQ: txdq_pi0_code = 0x7E, txdq_pi1_code = 0x3E
AWord DQS: dqs_pi0_code = 0x20, dqs_pi1_code = 0x60
AWord DQS: dqs_pi0_code = 0x20, dqs_pi1_code = 0x60
Socket0 HbmCh24, PI Code:
Socket1 HbmCh24, PI Code:
DWord DQ: txdq_pi0_code = 0x0, txdq_pi1_code = 0x40
DWord DQ: txdq_pi0_code = 0x7F, txdq_pi1_code = 0x3F
DWord DQS: dqs_pi0_code = 0x20, dqs_pi1_code = 0x60
DWord DQS: dqs_pi0_code = 0x20, dqs_pi1_code = 0x60
AWord DQ: txdq_pi0_code = 0x7D, txdq_pi1_code = 0x3D
AWord DQ: txdq_pi0_code = 0x7F, txdq_pi1_code = 0x3F
AWord DQS: dqs_pi0_code = 0x20, dqs_pi1_code = 0x60
AWord DQS: dqs_pi0_code = 0x20, dqs_pi1_code = 0x60
Socket0 HbmCh25, PI Code:
Socket1 HbmCh25, PI Code:
DWord DQ: txdq_pi0_code = 0x0, txdq_pi1_code = 0x40
DWord DQ: txdq_pi0_code = 0x0, txdq_pi1_code = 0x40
DWord DQS: dqs_pi0_code = 0x20, dqs_pi1_code = 0x60
DWord DQS: dqs_pi0_code = 0x20, dqs_pi1_code = 0x60
AWord DQ: txdq_pi0_code = 0x0, txdq_pi1_code = 0x40
AWord DQ: txdq_pi0_code = 0x1, txdq_pi1_code = 0x41
AWord DQS: dqs_pi0_code = 0x20, dqs_pi1_code = 0x60
AWord DQS: dqs_pi0_code = 0x20, dqs_pi1_code = 0x60
Socket0 HbmCh26, PI Code:
Socket1 HbmCh26, PI Code:
DWord DQ: txdq_pi0_code = 0x7F, txdq_pi1_code = 0x3F
DWord DQ: txdq_pi0_code = 0x0, txdq_pi1_code = 0x40
DWord DQS: dqs_pi0_code = 0x20, dqs_pi1_code = 0x60
DWord DQS: dqs_pi0_code = 0x20, dqs_pi1_code = 0x60
AWord DQ: txdq_pi0_code = 0x7F, txdq_pi1_code = 0x3F
AWord DQ: txdq_pi0_code = 0x0, txdq_pi1_code = 0x40
AWord DQS: dqs_pi0_code = 0x20, dqs_pi1_code = 0x60
AWord DQS: dqs_pi0_code = 0x20, dqs_pi1_code = 0x60
Socket0 HbmCh27, PI Code:
Socket1 HbmCh27, PI Code:
DWord DQ: txdq_pi0_code = 0x7F, txdq_pi1_code = 0x3F
DWord DQ: txdq_pi0_code = 0x7F, txdq_pi1_code = 0x3F
DWord DQS: dqs_pi0_code = 0x20, dqs_pi1_code = 0x60
DWord DQS: dqs_pi0_code = 0x20, dqs_pi1_code = 0x60
AWord DQ: txdq_pi0_code = 0x0, txdq_pi1_code = 0x40
AWord DQ: txdq_pi0_code = 0x7F, txdq_pi1_code = 0x3F
AWord DQS: dqs_pi0_code = 0x20, dqs_pi1_code = 0x60
AWord DQS: dqs_pi0_code = 0x20, dqs_pi1_code = 0x60
Socket0 HbmCh28, PI Code:
Socket1 HbmCh28, PI Code:
DWord DQ: txdq_pi0_code = 0x1, txdq_pi1_code = 0x41
DWord DQ: txdq_pi0_code = 0x0, txdq_pi1_code = 0x40
DWord DQS: dqs_pi0_code = 0x20, dqs_pi1_code = 0x60
DWord DQS: dqs_pi0_code = 0x20, dqs_pi1_code = 0x60
AWord DQ: txdq_pi0_code = 0x7E, txdq_pi1_code = 0x3E
AWord DQ: txdq_pi0_code = 0x7E, txdq_pi1_code = 0x3E
AWord DQS: dqs_pi0_code = 0x20, dqs_pi1_code = 0x60
AWord DQS: dqs_pi0_code = 0x20, dqs_pi1_code = 0x60
Socket0 HbmCh29, PI Code:
Socket1 HbmCh29, PI Code:
DWord DQ: txdq_pi0_code = 0x1, txdq_pi1_code = 0x41
DWord DQ: txdq_pi0_code = 0x1, txdq_pi1_code = 0x41
DWord DQS: dqs_pi0_code = 0x20, dqs_pi1_code = 0x60
DWord DQS: dqs_pi0_code = 0x20, dqs_pi1_code = 0x60
AWord DQ: txdq_pi0_code = 0x7D, txdq_pi1_code = 0x3D
AWord DQ: txdq_pi0_code = 0x7D, txdq_pi1_code = 0x3D
AWord DQS: dqs_pi0_code = 0x20, dqs_pi1_code = 0x60
AWord DQS: dqs_pi0_code = 0x20, dqs_pi1_code = 0x60
Socket0 HbmCh30, PI Code:
Socket1 HbmCh30, PI Code:
DWord DQ: txdq_pi0_code = 0x0, txdq_pi1_code = 0x40
DWord DQ: txdq_pi0_code = 0x1, txdq_pi1_code = 0x41
DWord DQS: dqs_pi0_code = 0x20, dqs_pi1_code = 0x60
DWord DQS: dqs_pi0_code = 0x20, dqs_pi1_code = 0x60
AWord DQ: txdq_pi0_code = 0x7F, txdq_pi1_code = 0x3F
AWord DQ: txdq_pi0_code = 0x7D, txdq_pi1_code = 0x3D
AWord DQS: dqs_pi0_code = 0x20, dqs_pi1_code = 0x60
AWord DQS: dqs_pi0_code = 0x20, dqs_pi1_code = 0x60
Socket0 HbmCh31, PI Code:
Socket1 HbmCh31, PI Code:
DWord DQ: txdq_pi0_code = 0x2, txdq_pi1_code = 0x42
DWord DQ: txdq_pi0_code = 0x7F, txdq_pi1_code = 0x3F
DWord DQS: dqs_pi0_code = 0x20, dqs_pi1_code = 0x60
DWord DQS: dqs_pi0_code = 0x20, dqs_pi1_code = 0x60
AWord DQ: txdq_pi0_code = 0x7E, txdq_pi1_code = 0x3E
AWord DQ: txdq_pi0_code = 0x7F, txdq_pi1_code = 0x3F
AWord DQS: dqs_pi0_code = 0x20, dqs_pi1_code = 0x60
AWord DQS: dqs_pi0_code = 0x20, dqs_pi1_code = 0x60
Socket0 HbmIo0, HbmPhyCfg0Fuse = 0xF2099D47, HbmPhyCfg1Fuse = 0x26C8A033
Socket1 HbmIo0, HbmPhyCfg0Fuse = 0xF2099D47, HbmPhyCfg1Fuse = 0x26C8A033
Socket0 HbmIo1, HbmPhyCfg0Fuse = 0xF2099D47, HbmPhyCfg1Fuse = 0x26C8A833
Socket1 HbmIo1, HbmPhyCfg0Fuse = 0xF2099D47, HbmPhyCfg1Fuse = 0x26C8A833
Socket0 HbmIo2, HbmPhyCfg0Fuse = 0xF2099D47, HbmPhyCfg1Fuse = 0x26C8A833
Socket1 HbmIo2, HbmPhyCfg0Fuse = 0xF2099D47, HbmPhyCfg1Fuse = 0x26C8A833
Socket0 HbmIo3, HbmPhyCfg0Fuse = 0xF2099D47, HbmPhyCfg1Fuse = 0x26C8A033
Socket1 HbmIo3, HbmPhyCfg0Fuse = 0xF2099D47, HbmPhyCfg1Fuse = 0x26C8A033
Socket0 HbmCh0, AWordReadTiming = 0x83E59423, AWordWriteTiming = 0x1D3400A5
Socket1 HbmCh0, AWordReadTiming = 0x83E59423, AWordWriteTiming = 0x1D3400A5
Socket0 HbmCh1, AWordReadTiming = 0x83E59423, AWordWriteTiming = 0x1D3400A5
Socket1 HbmCh1, AWordReadTiming = 0x83E59423, AWordWriteTiming = 0x1D3400A5
Socket0 HbmCh2, AWordReadTiming = 0x83E59423, AWordWriteTiming = 0x1D3400A5
Socket1 HbmCh2, AWordReadTiming = 0x83E59423, AWordWriteTiming = 0x1D3400A5
Socket0 HbmCh3, AWordReadTiming = 0x83E59423, AWordWriteTiming = 0x1D3400A5
Socket1 HbmCh3, AWordReadTiming = 0x83E59423, AWordWriteTiming = 0x1D3400A5
Socket0 HbmCh4, AWordReadTiming = 0x83E59423, AWordWriteTiming = 0x1D3400A5
Socket1 HbmCh4, AWordReadTiming = 0x83E59423, AWordWriteTiming = 0x1D3400A5
Socket0 HbmCh5, AWordReadTiming = 0x83E59423, AWordWriteTiming = 0x1D3400A5
Socket1 HbmCh5, AWordReadTiming = 0x83E59423, AWordWriteTiming = 0x1D3400A5
Socket0 HbmCh6, AWordReadTiming = 0x83E59423, AWordWriteTiming = 0x1D3400A5
Socket1 HbmCh6, AWordReadTiming = 0x83E59423, AWordWriteTiming = 0x1D3400A5
Socket0 HbmCh7, AWordReadTiming = 0x83E59423, AWordWriteTiming = 0x1D3400A5
Socket1 HbmCh7, AWordReadTiming = 0x83E59423, AWordWriteTiming = 0x1D3400A5
Socket0 HbmCh8, AWordReadTiming = 0x83E59423, AWordWriteTiming = 0x1D3400A5
Socket1 HbmCh8, AWordReadTiming = 0x83E59423, AWordWriteTiming = 0x1D3400A5
Socket0 HbmCh9, AWordReadTiming = 0x83E59423, AWordWriteTiming = 0x1D3400A5
Socket1 HbmCh9, AWordReadTiming = 0x83E59423, AWordWriteTiming = 0x1D3400A5
Socket0 HbmCh10, AWordReadTiming = 0x83E59423, AWordWriteTiming = 0x1D3400A5
Socket1 HbmCh10, AWordReadTiming = 0x83E59423, AWordWriteTiming = 0x1D3400A5
Socket0 HbmCh11, AWordReadTiming = 0x83E59423, AWordWriteTiming = 0x1D3400A5
Socket1 HbmCh11, AWordReadTiming = 0x83E59423, AWordWriteTiming = 0x1D3400A5
Socket0 HbmCh12, AWordReadTiming = 0x83E59423, AWordWriteTiming = 0x1D3400A5
Socket1 HbmCh12, AWordReadTiming = 0x83E59423, AWordWriteTiming = 0x1D3400A5
Socket0 HbmCh13, AWordReadTiming = 0x83E59423, AWordWriteTiming = 0x1D3400A5
Socket1 HbmCh13, AWordReadTiming = 0x83E59423, AWordWriteTiming = 0x1D3400A5
Socket0 HbmCh14, AWordReadTiming = 0x83E59423, AWordWriteTiming = 0x1D3400A5
Socket1 HbmCh14, AWordReadTiming = 0x83E59423, AWordWriteTiming = 0x1D3400A5
Socket0 HbmCh15, AWordReadTiming = 0x83E59423, AWordWriteTiming = 0x1D3400A5
Socket1 HbmCh15, AWordReadTiming = 0x83E59423, AWordWriteTiming = 0x1D3400A5
Socket0 HbmCh16, AWordReadTiming = 0x83E59423, AWordWriteTiming = 0x1D3400A5
Socket1 HbmCh16, AWordReadTiming = 0x83E59423, AWordWriteTiming = 0x1D3400A5
Socket0 HbmCh17, AWordReadTiming = 0x83E59423, AWordWriteTiming = 0x1D3400A5
Socket1 HbmCh17, AWordReadTiming = 0x83E59423, AWordWriteTiming = 0x1D3400A5
Socket0 HbmCh18, AWordReadTiming = 0x83E59423, AWordWriteTiming = 0x1D3400A5
Socket1 HbmCh18, AWordReadTiming = 0x83E59423, AWordWriteTiming = 0x1D3400A5
Socket0 HbmCh19, AWordReadTiming = 0x83E59423, AWordWriteTiming = 0x1D3400A5
Socket1 HbmCh19, AWordReadTiming = 0x83E59423, AWordWriteTiming = 0x1D3400A5
Socket0 HbmCh20, AWordReadTiming = 0x83E59423, AWordWriteTiming = 0x1D3400A5
Socket1 HbmCh20, AWordReadTiming = 0x83E59423, AWordWriteTiming = 0x1D3400A5
Socket0 HbmCh21, AWordReadTiming = 0x83E59423, AWordWriteTiming = 0x1D3400A5
Socket1 HbmCh21, AWordReadTiming = 0x83E59423, AWordWriteTiming = 0x1D3400A5
Socket0 HbmCh22, AWordReadTiming = 0x83E59423, AWordWriteTiming = 0x1D3400A5
Socket1 HbmCh22, AWordReadTiming = 0x83E59423, AWordWriteTiming = 0x1D3400A5
Socket0 HbmCh23, AWordReadTiming = 0x83E59423, AWordWriteTiming = 0x1D3400A5
Socket1 HbmCh23, AWordReadTiming = 0x83E59423, AWordWriteTiming = 0x1D3400A5
Socket0 HbmCh24, AWordReadTiming = 0x83E59423, AWordWriteTiming = 0x1D3400A5
Socket1 HbmCh24, AWordReadTiming = 0x83E59423, AWordWriteTiming = 0x1D3400A5
Socket0 HbmCh25, AWordReadTiming = 0x83E59423, AWordWriteTiming = 0x1D3400A5
Socket1 HbmCh25, AWordReadTiming = 0x83E59423, AWordWriteTiming = 0x1D3400A5
Socket0 HbmCh26, AWordReadTiming = 0x83E59423, AWordWriteTiming = 0x1D3400A5
Socket1 HbmCh26, AWordReadTiming = 0x83E59423, AWordWriteTiming = 0x1D3400A5
Socket0 HbmCh27, AWordReadTiming = 0x83E59423, AWordWriteTiming = 0x1D3400A5
Socket1 HbmCh27, AWordReadTiming = 0x83E59423, AWordWriteTiming = 0x1D3400A5
Socket0 HbmCh28, AWordReadTiming = 0x83E59423, AWordWriteTiming = 0x1D3400A5
Socket1 HbmCh28, AWordReadTiming = 0x83E59423, AWordWriteTiming = 0x1D3400A5
Socket0 HbmCh29, AWordReadTiming = 0x83E59423, AWordWriteTiming = 0x1D3400A5
Socket1 HbmCh29, AWordReadTiming = 0x83E59423, AWordWriteTiming = 0x1D3400A5
Socket0 HbmCh30, AWordReadTiming = 0x83E59423, AWordWriteTiming = 0x1D3400A5
Socket1 HbmCh30, AWordReadTiming = 0x83E59423, AWordWriteTiming = 0x1D3400A5
Socket0 HbmCh31, AWordReadTiming = 0x83E59423, AWordWriteTiming = 0x1D3400A5
Socket1 HbmCh31, AWordReadTiming = 0x83E59423, AWordWriteTiming = 0x1D3400A5
Socket0 HbmIo0, UcRamEccLog0 = 0x0, UcRamEccLog1 = 0x0
Socket1 HbmIo0, UcRamEccLog0 = 0x0, UcRamEccLog1 = 0x0
Socket0 HbmIo1, UcRamEccLog0 = 0x0, UcRamEccLog1 = 0x0
Socket1 HbmIo1, UcRamEccLog0 = 0x0, UcRamEccLog1 = 0x0
Socket0 HbmIo2, UcRamEccLog0 = 0x0, UcRamEccLog1 = 0x0
Socket1 HbmIo2, UcRamEccLog0 = 0x0, UcRamEccLog1 = 0x0
Socket0 HbmIo3, UcRamEccLog0 = 0x0, UcRamEccLog1 = 0x0
Socket1 HbmIo3, UcRamEccLog0 = 0x0, UcRamEccLog1 = 0x0
Socket0 HbmIo0, UcScratchPad0 = 0x60000000, UcScratchPad1 = 0x40000006, UcScratchPad2 = 0x0
Socket1 HbmIo0, UcScratchPad0 = 0x60000000, UcScratchPad1 = 0x40000006, UcScratchPad2 = 0x0
Socket0 HbmIo1, UcScratchPad0 = 0x60000000, UcScratchPad1 = 0x40000006, UcScratchPad2 = 0x0
Socket1 HbmIo1, UcScratchPad0 = 0x60000000, UcScratchPad1 = 0x40000006, UcScratchPad2 = 0x0
Socket0 HbmIo2, UcScratchPad0 = 0x60000000, UcScratchPad1 = 0x40000006, UcScratchPad2 = 0x0
Socket1 HbmIo2, UcScratchPad0 = 0x60000000, UcScratchPad1 = 0x40000006, UcScratchPad2 = 0x0
Socket0 HbmIo3, UcScratchPad0 = 0x60000000, UcScratchPad1 = 0x40000006, UcScratchPad2 = 0x0
Socket1 HbmIo3, UcScratchPad0 = 0x60000000, UcScratchPad1 = 0x40000006, UcScratchPad2 = 0x0
HbmioMailbox -IEEE 1500 Read Device ID for Socket 0 HbmIoId 0
HbmioMailbox -IEEE 1500 Read Device ID for Socket 1 HbmIoId 0
HBM: DeviceIdData = {0x3389FFC3, 0xA0A80431, 0x0003A1D0}
HBM: DeviceIdData = {0xAAE9FFC3, 0xA0A80400, 0x0003A1D0}
HbmioMailbox -IEEE 1500 Read Device ID for Socket 0 HbmIoId 1
HbmioMailbox -IEEE 1500 Read Device ID for Socket 1 HbmIoId 1
HBM: DeviceIdData = {0x2309FFC3, 0xA0A80431, 0x0003A1D0}
HBM: DeviceIdData = {0xAE09FFC3, 0xA0A80400, 0x0003A1D0}
HbmioMailbox -IEEE 1500 Read Device ID for Socket 0 HbmIoId 2
HbmioMailbox -IEEE 1500 Read Device ID for Socket 1 HbmIoId 2
HBM: DeviceIdData = {0x3DC9FFC3, 0xA0A80431, 0x0003A1D0}
HBM: DeviceIdData = {0xA271FFC3, 0xA0A80400, 0x0003A1D0}
HbmioMailbox -IEEE 1500 Read Device ID for Socket 0 HbmIoId 3
HbmioMailbox -IEEE 1500 Read Device ID for Socket 1 HbmIoId 3
HBM: DeviceIdData = {0x2669FFC3, 0xA0A00020, 0x0003A1D0}
HBM: DeviceIdData = {0xB299FFC3, 0xA0A80400, 0x0003A1D0}
| HBM Socket:0 Display Device Info |
| Field | HBMIO MODULE 0 | HBMIO MODULE 1 | HBMIO MODULE 2 | HBMIO MODULE 3 |
|Module Enable | ENABLED | ENABLED | ENABLED | ENABLED |
|Model num | 43 | 43 | 43 | 43 |
|Stack High | 8 | 8 | 8 | 8 |
|Channel enable| 11111111 | 11111111 | 11111111 | 11111111 |
|Address Mode | Pseudo Ch | Pseudo Ch | Pseudo Ch | Pseudo Ch |
|Serial number | 02010C4CE2 | 02010C48C2 | 02010C4F72 | 000008099A |
|Manuf. Week | WW10 | WW10 | WW10 | WW10 |
|Manuf. Year | 2021 | 2021 | 2021 | 2021 |
|Manuf. loc | 000D | 000D | 000D | 000D |
|Manuf. ID | SAMSUNG | SAMSUNG | SAMSUNG | SAMSUNG |
|Density | 16 Gbit | 16 Gbit | 16 Gbit | 16 Gbit |
|ECC | ECC | ECC | ECC | ECC |
|Gen2 Test | Supported | Supported | Supported | Supported |
| HBM Socket:1 Display Device Info |
| Field | HBMIO MODULE 0 | HBMIO MODULE 1 | HBMIO MODULE 2 | HBMIO MODULE 3 |
|Module Enable | ENABLED | ENABLED | ENABLED | ENABLED |
|Model num | 43 | 43 | 43 | 43 |
|Stack High | 8 | 8 | 8 | 8 |
|Channel enable| 11111111 | 11111111 | 11111111 | 11111111 |
|Address Mode | Pseudo Ch | Pseudo Ch | Pseudo Ch | Pseudo Ch |
|Serial number | 0201002ABA | 0201002B82 | 020100289C | 0201002CA6 |
|Manuf. Week | WW10 | WW10 | WW10 | WW10 |
|Manuf. Year | 2021 | 2021 | 2021 | 2021 |
|Manuf. loc | 000D | 000D | 000D | 000D |
|Manuf. ID | SAMSUNG | SAMSUNG | SAMSUNG | SAMSUNG |
|Density | 16 Gbit | 16 Gbit | 16 Gbit | 16 Gbit |
|ECC | ECC | ECC | ECC | ECC |
|Gen2 Test | Supported | Supported | Supported | Supported |
N0: DDR and HBM memory populated!
N1: DDR and HBM memory populated!
[ScktId: 0] HBM Training - 2916ms
[ScktId: 1] HBM Training - 2916ms
[ScktId: 0] HBM PPR Flow -- Started
[ScktId: 1] HBM PPR Flow -- Started
[ScktId: 0] HBM PPR Flow - 6ms
[ScktId: 1] HBM PPR Flow - 7ms
[ScktId: 0] HBM mBIST Flow -- Started
[ScktId: 1] HBM mBIST Flow -- Started
[ScktId: 0] HBM mBIST Flow - 6ms
[ScktId: 1] HBM mBIST Flow - 7ms
[ScktId: 0] HBM ReTraining -- Started
[ScktId: 1] HBM ReTraining -- Started
[ScktId: 0] HBM ReTraining - 7ms
[ScktId: 1] HBM ReTraining - 7ms
[ScktId: 0] AP HBM Information -- Started
[ScktId: 1] AP HBM Information -- Started
[ScktId: 0] AP HBM Information - 12ms
[ScktId: 1] AP HBM Information - 9ms
[ScktId: 0] Post-Training Initialization -- Started
[ScktId: 1] Post-Training Initialization -- Started
[ScktId: 0] Post-Training Initialization - 9ms
[ScktId: 1] Post-Training Initialization - 10ms
[ScktId: 0] Pipe Sync AP Pre SSA Data -- Started
[ScktId: 1] Pipe Sync AP Pre SSA Data -- Started
[ScktId: 0] Pipe Sync AP Pre SSA Data - 27ms
[ScktId: 1] Pipe Sync AP Pre SSA Data - 22ms
[ScktId: 0] Enable RX Retraining -- Started
[ScktId: 1] Enable RX Retraining -- Started
[ScktId: 0] Enable RX Retraining - 8ms
[ScktId: 1] Enable RX Retraining - 8ms
[ScktId: 0] Enable TX Retraining -- Started
[ScktId: 1] Enable TX Retraining -- Started
[ScktId: 0] Enable TX Retraining - 521ms
[ScktId: 0] Rank Margin Test -- Started
[ScktId: 1] Enable TX Retraining - 521ms
[ScktId: 0] Rank Margin Test - 3ms
[ScktId: 1] Rank Margin Test -- Started
[ScktId: 0] Pipe Sync SBSP Post SSA Data -- Started
[ScktId: 1] Rank Margin Test - 7ms
[ScktId: 1] Pipe Sync SBSP Post SSA Data -- Started
[ScktId: 1] Pipe Sync SBSP Post SSA Data - 5ms
[ScktId: 0] Pipe Sync SBSP Post SSA Data - 17ms
[ScktId: 1] Pipe Sync AP Pre I/O Health Check Data -- Started
[ScktId: 0] Pipe Sync AP Pre I/O Health Check Data -- Started
[ScktId: 0] Pipe Sync AP Pre I/O Health Check Data - 25ms
[ScktId: 1] Pipe Sync AP Pre I/O Health Check Data - 30ms
[ScktId: 0] Perform I/O Health Check -- Started
[ScktId: 1] Perform I/O Health Check -- Started
I/O Health Check Passed
[ScktId: 0] Perform I/O Health Check - 1604ms
[ScktId: 0] Pipe Sync SBSP Post I/O Heath Check -- Started
I/O Health Check Passed
[ScktId: 1] Perform I/O Health Check - 1611ms
[ScktId: 1] Pipe Sync SBSP Post I/O Heath Check -- Started
[ScktId: 0] Pipe Sync SBSP Post I/O Heath Check - 18ms
[ScktId: 1] Pipe Sync SBSP Post I/O Heath Check - 5ms
N1 Checked into Pipe
[ScktId: 0] Check I/O Health Check Status -- Started
[ScktId: 0] Check I/O Health Check Status - 7ms
[ScktId: 1] Offset training results -- Started
[ScktId: 0] Offset training results -- Started
[ScktId: 1] Offset training results - 4ms
[ScktId: 0] Offset training results - 9ms
[ScktId: 1] HBM Post-Training -- Started
[ScktId: 0] HBM Post-Training -- Started
N1.C00: HBM Density: 10 N0.C00: HBM Density: 10 N1.C00: Column Address width: 0; N0.C00: Column Address width: 0; N1.C00: Row Address width: 3; N0.C00: Row Address width: 3; N1.C00: Number of banks: 2
N0.C00: Number of banks: 2
N1.C08: HBM Density: 10 N0.C08: HBM Density: 10 N1.C08: Column Address width: 0; N0.C08: Column Address width: 0; N1.C08: Row Address width: 3; N0.C08: Row Address width: 3; N1.C08: Number of banks: 2
N0.C08: Number of banks: 2
N1.C16: HBM Density: 10 N0.C16: HBM Density: 10 N1.C16: Column Address width: 0; N0.C16: Column Address width: 0; N1.C16: Row Address width: 3; N0.C16: Row Address width: 3; N1.C16: Number of banks: 2
N0.C16: Number of banks: 2
N1.C24: HBM Density: 10 N0.C24: HBM Density: 10 N1.C24: Column Address width: 0; N0.C24: Column Address width: 0; N1.C24: Row Address width: 3; N0.C24: Row Address width: 3; N1.C24: Number of banks: 2
N0.C24: Number of banks: 2
MemHotOutputOnlyOpt set to :0
MemHotOutputOnlyOpt set to :0
Socket 1 Ch 0 - CkeLl0.Data = 0x10000080
Socket 1 Ch 0 - CkeLl1.Data = 0x10000260
Socket 1 Ch 0 - CkeLl2.Data = 0x10000230
Socket 1 Ch 0 - CkeLl3.Data = 0x10000230
Socket 1 Ch 0 - PkgcCke.Data = 0x10000230
Socket 0 Ch 0 - CkeLl0.Data = 0x10000080
Socket 0 Ch 0 - CkeLl1.Data = 0x10000260
Socket 0 Ch 0 - CkeLl2.Data = 0x10000230
Socket 0 Ch 0 - CkeLl3.Data = 0x10000230
Socket 0 Ch 0 - PkgcCke.Data = 0x10000230
LpModePmControlN0.Data Original = 0x8806C
LpModePmControlN0.Data Original = 0x8806C
LpModePmControlN1.Data Original = 0x0
LpModePmControlN1.Data Original = 0x0
LpModePmControlN0.Data New = 0xC3F4206B
LpModePmControlN0.Data New = 0xC3F4206B
LpModePmControlN1.Data New = 0x87
LpModePmControlN1.Data New = 0x87
N1.C00: HBM Tcrftp.t_rfc = 0xA for density 0x00000001
N0.C00: HBM Tcrftp.t_rfc = 0xA for density 0x00000000
Socket 1 Ch 1 - CkeLl0.Data = 0x10000080
Socket 1 Ch 1 - CkeLl1.Data = 0x10000260
Socket 1 Ch 1 - CkeLl2.Data = 0x10000230
Socket 1 Ch 1 - CkeLl3.Data = 0x10000230
Socket 1 Ch 1 - PkgcCke.Data = 0x10000230
Socket 0 Ch 1 - CkeLl0.Data = 0x10000080
Socket 0 Ch 1 - CkeLl1.Data = 0x10000260
Socket 0 Ch 1 - CkeLl2.Data = 0x10000230
Socket 0 Ch 1 - CkeLl3.Data = 0x10000230
Socket 0 Ch 1 - PkgcCke.Data = 0x10000230
LpModePmControlN0.Data Original = 0x8806C
LpModePmControlN0.Data Original = 0x8806C
LpModePmControlN1.Data Original = 0x0
LpModePmControlN1.Data Original = 0x0
LpModePmControlN0.Data New = 0xC3F4206B
LpModePmControlN0.Data New = 0xC3F4206B
LpModePmControlN1.Data New = 0x87
LpModePmControlN1.Data New = 0x87
N1.C01: HBM Tcrftp.t_rfc = 0xA for density 0x00000001
N0.C01: HBM Tcrftp.t_rfc = 0xA for density 0x00000000
Socket 1 Ch 2 - CkeLl0.Data = 0x10000080
Socket 1 Ch 2 - CkeLl1.Data = 0x10000260
Socket 1 Ch 2 - CkeLl2.Data = 0x10000230
Socket 1 Ch 2 - CkeLl3.Data = 0x10000230
Socket 1 Ch 2 - PkgcCke.Data = 0x10000230
Socket 0 Ch 2 - CkeLl0.Data = 0x10000080
Socket 0 Ch 2 - CkeLl1.Data = 0x10000260
Socket 0 Ch 2 - CkeLl2.Data = 0x10000230
Socket 0 Ch 2 - CkeLl3.Data = 0x10000230
Socket 0 Ch 2 - PkgcCke.Data = 0x10000230
LpModePmControlN0.Data Original = 0x8806C
LpModePmControlN0.Data Original = 0x8806C
LpModePmControlN1.Data Original = 0x0
LpModePmControlN1.Data Original = 0x0
LpModePmControlN0.Data New = 0xC3F4206B
LpModePmControlN0.Data New = 0xC3F4206B
LpModePmControlN1.Data New = 0x87
LpModePmControlN1.Data New = 0x87
N1.C02: HBM Tcrftp.t_rfc = 0xA for density 0x00000001
N0.C02: HBM Tcrftp.t_rfc = 0xA for density 0x00000000
Socket 1 Ch 3 - CkeLl0.Data = 0x10000080
Socket 1 Ch 3 - CkeLl1.Data = 0x10000260
Socket 1 Ch 3 - CkeLl2.Data = 0x10000230
Socket 1 Ch 3 - CkeLl3.Data = 0x10000230
Socket 1 Ch 3 - PkgcCke.Data = 0x10000230
Socket 0 Ch 3 - CkeLl0.Data = 0x10000080
Socket 0 Ch 3 - CkeLl1.Data = 0x10000260
Socket 0 Ch 3 - CkeLl2.Data = 0x10000230
Socket 0 Ch 3 - CkeLl3.Data = 0x10000230
Socket 0 Ch 3 - PkgcCke.Data = 0x10000230
LpModePmControlN0.Data Original = 0x8806C
LpModePmControlN0.Data Original = 0x8806C
LpModePmControlN1.Data Original = 0x0
LpModePmControlN1.Data Original = 0x0
LpModePmControlN0.Data New = 0xC3F4206B
LpModePmControlN0.Data New = 0xC3F4206B
LpModePmControlN1.Data New = 0x87
LpModePmControlN1.Data New = 0x87
N1.C03: HBM Tcrftp.t_rfc = 0xA for density 0x00000001
N0.C03: HBM Tcrftp.t_rfc = 0xA for density 0x00000000
Socket 1 Ch 4 - CkeLl0.Data = 0x10000080
Socket 1 Ch 4 - CkeLl1.Data = 0x10000260
Socket 1 Ch 4 - CkeLl2.Data = 0x10000230
Socket 1 Ch 4 - CkeLl3.Data = 0x10000230
Socket 1 Ch 4 - PkgcCke.Data = 0x10000230
Socket 0 Ch 4 - CkeLl0.Data = 0x10000080
Socket 0 Ch 4 - CkeLl1.Data = 0x10000260
Socket 0 Ch 4 - CkeLl2.Data = 0x10000230
Socket 0 Ch 4 - CkeLl3.Data = 0x10000230
Socket 0 Ch 4 - PkgcCke.Data = 0x10000230
LpModePmControlN0.Data Original = 0x8806C
LpModePmControlN0.Data Original = 0x8806C
LpModePmControlN1.Data Original = 0x0
LpModePmControlN1.Data Original = 0x0
LpModePmControlN0.Data New = 0xC3F4206B
LpModePmControlN0.Data New = 0xC3F4206B
LpModePmControlN1.Data New = 0x87
LpModePmControlN1.Data New = 0x87
N1.C04: HBM Tcrftp.t_rfc = 0xA for density 0x00000001
N0.C04: HBM Tcrftp.t_rfc = 0xA for density 0x00000000
Socket 1 Ch 5 - CkeLl0.Data = 0x10000080
Socket 1 Ch 5 - CkeLl1.Data = 0x10000260
Socket 1 Ch 5 - CkeLl2.Data = 0x10000230
Socket 1 Ch 5 - CkeLl3.Data = 0x10000230
Socket 1 Ch 5 - PkgcCke.Data = 0x10000230
Socket 0 Ch 5 - CkeLl0.Data = 0x10000080
Socket 0 Ch 5 - CkeLl1.Data = 0x10000260
Socket 0 Ch 5 - CkeLl2.Data = 0x10000230
Socket 0 Ch 5 - CkeLl3.Data = 0x10000230
Socket 0 Ch 5 - PkgcCke.Data = 0x10000230
LpModePmControlN0.Data Original = 0x8806C
LpModePmControlN0.Data Original = 0x8806C
LpModePmControlN1.Data Original = 0x0
LpModePmControlN1.Data Original = 0x0
LpModePmControlN0.Data New = 0xC3F4206B
LpModePmControlN0.Data New = 0xC3F4206B
LpModePmControlN1.Data New = 0x87
LpModePmControlN1.Data New = 0x87
N1.C05: HBM Tcrftp.t_rfc = 0xA for density 0x00000001
N0.C05: HBM Tcrftp.t_rfc = 0xA for density 0x00000000
Socket 1 Ch 6 - CkeLl0.Data = 0x10000080
Socket 1 Ch 6 - CkeLl1.Data = 0x10000260
Socket 1 Ch 6 - CkeLl2.Data = 0x10000230
Socket 1 Ch 6 - CkeLl3.Data = 0x10000230
Socket 1 Ch 6 - PkgcCke.Data = 0x10000230
Socket 0 Ch 6 - CkeLl0.Data = 0x10000080
Socket 0 Ch 6 - CkeLl1.Data = 0x10000260
Socket 0 Ch 6 - CkeLl2.Data = 0x10000230
Socket 0 Ch 6 - CkeLl3.Data = 0x10000230
Socket 0 Ch 6 - PkgcCke.Data = 0x10000230
LpModePmControlN0.Data Original = 0x8806C
LpModePmControlN0.Data Original = 0x8806C
LpModePmControlN1.Data Original = 0x0
LpModePmControlN1.Data Original = 0x0
LpModePmControlN0.Data New = 0xC3F4206B
LpModePmControlN0.Data New = 0xC3F4206B
LpModePmControlN1.Data New = 0x87
LpModePmControlN1.Data New = 0x87
N1.C06: HBM Tcrftp.t_rfc = 0xA for density 0x00000001
N0.C06: HBM Tcrftp.t_rfc = 0xA for density 0x00000000
Socket 1 Ch 7 - CkeLl0.Data = 0x10000080
Socket 1 Ch 7 - CkeLl1.Data = 0x10000260
Socket 1 Ch 7 - CkeLl2.Data = 0x10000230
Socket 1 Ch 7 - CkeLl3.Data = 0x10000230
Socket 1 Ch 7 - PkgcCke.Data = 0x10000230
Socket 0 Ch 7 - CkeLl0.Data = 0x10000080
Socket 0 Ch 7 - CkeLl1.Data = 0x10000260
Socket 0 Ch 7 - CkeLl2.Data = 0x10000230
Socket 0 Ch 7 - CkeLl3.Data = 0x10000230
Socket 0 Ch 7 - PkgcCke.Data = 0x10000230
LpModePmControlN0.Data Original = 0x8806C
LpModePmControlN0.Data Original = 0x8806C
LpModePmControlN1.Data Original = 0x0
LpModePmControlN1.Data Original = 0x0
LpModePmControlN0.Data New = 0xC3F4206B
LpModePmControlN0.Data New = 0xC3F4206B
LpModePmControlN1.Data New = 0x87
LpModePmControlN1.Data New = 0x87
N1.C07: HBM Tcrftp.t_rfc = 0xA for density 0x00000001
N0.C07: HBM Tcrftp.t_rfc = 0xA for density 0x00000000
Socket 1 Ch 8 - CkeLl0.Data = 0x10000080
Socket 1 Ch 8 - CkeLl1.Data = 0x10000260
Socket 1 Ch 8 - CkeLl2.Data = 0x10000230
Socket 1 Ch 8 - CkeLl3.Data = 0x10000230
Socket 1 Ch 8 - PkgcCke.Data = 0x10000230
Socket 0 Ch 8 - CkeLl0.Data = 0x10000080
Socket 0 Ch 8 - CkeLl1.Data = 0x10000260
Socket 0 Ch 8 - CkeLl2.Data = 0x10000230
Socket 0 Ch 8 - CkeLl3.Data = 0x10000230
Socket 0 Ch 8 - PkgcCke.Data = 0x10000230
LpModePmControlN0.Data Original = 0x8806C
LpModePmControlN0.Data Original = 0x8806C
LpModePmControlN1.Data Original = 0x0
LpModePmControlN1.Data Original = 0x0
LpModePmControlN0.Data New = 0xC3F4206B
LpModePmControlN0.Data New = 0xC3F4206B
LpModePmControlN1.Data New = 0x87
LpModePmControlN1.Data New = 0x87
N1.C08: HBM Tcrftp.t_rfc = 0xA for density 0x00000001
N0.C08: HBM Tcrftp.t_rfc = 0xA for density 0x00000000
Socket 1 Ch 9 - CkeLl0.Data = 0x10000080
Socket 1 Ch 9 - CkeLl1.Data = 0x10000260
Socket 1 Ch 9 - CkeLl2.Data = 0x10000230
Socket 1 Ch 9 - CkeLl3.Data = 0x10000230
Socket 1 Ch 9 - PkgcCke.Data = 0x10000230
Socket 0 Ch 9 - CkeLl0.Data = 0x10000080
Socket 0 Ch 9 - CkeLl1.Data = 0x10000260
Socket 0 Ch 9 - CkeLl2.Data = 0x10000230
Socket 0 Ch 9 - CkeLl3.Data = 0x10000230
Socket 0 Ch 9 - PkgcCke.Data = 0x10000230
LpModePmControlN0.Data Original = 0x8806C
LpModePmControlN0.Data Original = 0x8806C
LpModePmControlN1.Data Original = 0x0
LpModePmControlN1.Data Original = 0x0
LpModePmControlN0.Data New = 0xC3F4206B
LpModePmControlN0.Data New = 0xC3F4206B
LpModePmControlN1.Data New = 0x87
LpModePmControlN1.Data New = 0x87
N1.C09: HBM Tcrftp.t_rfc = 0xA for density 0x00000001
N0.C09: HBM Tcrftp.t_rfc = 0xA for density 0x00000000
Socket 1 Ch 10 - CkeLl0.Data = 0x10000080
Socket 1 Ch 10 - CkeLl1.Data = 0x10000260
Socket 1 Ch 10 - CkeLl2.Data = 0x10000230
Socket 1 Ch 10 - CkeLl3.Data = 0x10000230
Socket 1 Ch 10 - PkgcCke.Data = 0x10000230
Socket 0 Ch 10 - CkeLl0.Data = 0x10000080
Socket 0 Ch 10 - CkeLl1.Data = 0x10000260
Socket 0 Ch 10 - CkeLl2.Data = 0x10000230
Socket 0 Ch 10 - CkeLl3.Data = 0x10000230
Socket 0 Ch 10 - PkgcCke.Data = 0x10000230
LpModePmControlN0.Data Original = 0x8806C
LpModePmControlN0.Data Original = 0x8806C
LpModePmControlN1.Data Original = 0x0
LpModePmControlN1.Data Original = 0x0
LpModePmControlN0.Data New = 0xC3F4206B
LpModePmControlN0.Data New = 0xC3F4206B
LpModePmControlN1.Data New = 0x87
LpModePmControlN1.Data New = 0x87
N1.C10: HBM Tcrftp.t_rfc = 0xA for density 0x00000001
N0.C10: HBM Tcrftp.t_rfc = 0xA for density 0x00000000
Socket 1 Ch 11 - CkeLl0.Data = 0x10000080
Socket 1 Ch 11 - CkeLl1.Data = 0x10000260
Socket 1 Ch 11 - CkeLl2.Data = 0x10000230
Socket 1 Ch 11 - CkeLl3.Data = 0x10000230
Socket 1 Ch 11 - PkgcCke.Data = 0x10000230
Socket 0 Ch 11 - CkeLl0.Data = 0x10000080
Socket 0 Ch 11 - CkeLl1.Data = 0x10000260
Socket 0 Ch 11 - CkeLl2.Data = 0x10000230
Socket 0 Ch 11 - CkeLl3.Data = 0x10000230
Socket 0 Ch 11 - PkgcCke.Data = 0x10000230
LpModePmControlN0.Data Original = 0x8806C
LpModePmControlN0.Data Original = 0x8806C
LpModePmControlN1.Data Original = 0x0
LpModePmControlN1.Data Original = 0x0
LpModePmControlN0.Data New = 0xC3F4206B
LpModePmControlN0.Data New = 0xC3F4206B
LpModePmControlN1.Data New = 0x87
LpModePmControlN1.Data New = 0x87
N1.C11: HBM Tcrftp.t_rfc = 0xA for density 0x00000001
N0.C11: HBM Tcrftp.t_rfc = 0xA for density 0x00000000
Socket 1 Ch 12 - CkeLl0.Data = 0x10000080
Socket 1 Ch 12 - CkeLl1.Data = 0x10000260
Socket 1 Ch 12 - CkeLl2.Data = 0x10000230
Socket 1 Ch 12 - CkeLl3.Data = 0x10000230
Socket 1 Ch 12 - PkgcCke.Data = 0x10000230
Socket 0 Ch 12 - CkeLl0.Data = 0x10000080
Socket 0 Ch 12 - CkeLl1.Data = 0x10000260
Socket 0 Ch 12 - CkeLl2.Data = 0x10000230
Socket 0 Ch 12 - CkeLl3.Data = 0x10000230
Socket 0 Ch 12 - PkgcCke.Data = 0x10000230
LpModePmControlN0.Data Original = 0x8806C
LpModePmControlN0.Data Original = 0x8806C
LpModePmControlN1.Data Original = 0x0
LpModePmControlN1.Data Original = 0x0
LpModePmControlN0.Data New = 0xC3F4206B
LpModePmControlN0.Data New = 0xC3F4206B
LpModePmControlN1.Data New = 0x87
LpModePmControlN1.Data New = 0x87
N1.C12: HBM Tcrftp.t_rfc = 0xA for density 0x00000001
N0.C12: HBM Tcrftp.t_rfc = 0xA for density 0x00000000
Socket 1 Ch 13 - CkeLl0.Data = 0x10000080
Socket 1 Ch 13 - CkeLl1.Data = 0x10000260
Socket 1 Ch 13 - CkeLl2.Data = 0x10000230
Socket 1 Ch 13 - CkeLl3.Data = 0x10000230
Socket 1 Ch 13 - PkgcCke.Data = 0x10000230
Socket 0 Ch 13 - CkeLl0.Data = 0x10000080
Socket 0 Ch 13 - CkeLl1.Data = 0x10000260
Socket 0 Ch 13 - CkeLl2.Data = 0x10000230
Socket 0 Ch 13 - CkeLl3.Data = 0x10000230
Socket 0 Ch 13 - PkgcCke.Data = 0x10000230
LpModePmControlN0.Data Original = 0x8806C
LpModePmControlN0.Data Original = 0x8806C
LpModePmControlN1.Data Original = 0x0
LpModePmControlN1.Data Original = 0x0
LpModePmControlN0.Data New = 0xC3F4206B
LpModePmControlN0.Data New = 0xC3F4206B
LpModePmControlN1.Data New = 0x87
LpModePmControlN1.Data New = 0x87
N1.C13: HBM Tcrftp.t_rfc = 0xA for density 0x00000001
N0.C13: HBM Tcrftp.t_rfc = 0xA for density 0x00000000
Socket 1 Ch 14 - CkeLl0.Data = 0x10000080
Socket 1 Ch 14 - CkeLl1.Data = 0x10000260
Socket 1 Ch 14 - CkeLl2.Data = 0x10000230
Socket 1 Ch 14 - CkeLl3.Data = 0x10000230
Socket 1 Ch 14 - PkgcCke.Data = 0x10000230
Socket 0 Ch 14 - CkeLl0.Data = 0x10000080
Socket 0 Ch 14 - CkeLl1.Data = 0x10000260
Socket 0 Ch 14 - CkeLl2.Data = 0x10000230
Socket 0 Ch 14 - CkeLl3.Data = 0x10000230
Socket 0 Ch 14 - PkgcCke.Data = 0x10000230
LpModePmControlN0.Data Original = 0x8806C
LpModePmControlN0.Data Original = 0x8806C
LpModePmControlN1.Data Original = 0x0
LpModePmControlN1.Data Original = 0x0
LpModePmControlN0.Data New = 0xC3F4206B
LpModePmControlN0.Data New = 0xC3F4206B
LpModePmControlN1.Data New = 0x87
LpModePmControlN1.Data New = 0x87
N1.C14: HBM Tcrftp.t_rfc = 0xA for density 0x00000001
N0.C14: HBM Tcrftp.t_rfc = 0xA for density 0x00000000
Socket 1 Ch 15 - CkeLl0.Data = 0x10000080
Socket 1 Ch 15 - CkeLl1.Data = 0x10000260
Socket 1 Ch 15 - CkeLl2.Data = 0x10000230
Socket 1 Ch 15 - CkeLl3.Data = 0x10000230
Socket 1 Ch 15 - PkgcCke.Data = 0x10000230
Socket 0 Ch 15 - CkeLl0.Data = 0x10000080
Socket 0 Ch 15 - CkeLl1.Data = 0x10000260
Socket 0 Ch 15 - CkeLl2.Data = 0x10000230
Socket 0 Ch 15 - CkeLl3.Data = 0x10000230
Socket 0 Ch 15 - PkgcCke.Data = 0x10000230
LpModePmControlN0.Data Original = 0x8806C
LpModePmControlN0.Data Original = 0x8806C
LpModePmControlN1.Data Original = 0x0
LpModePmControlN1.Data Original = 0x0
LpModePmControlN0.Data New = 0xC3F4206B
LpModePmControlN0.Data New = 0xC3F4206B
LpModePmControlN1.Data New = 0x87
LpModePmControlN1.Data New = 0x87
N1.C15: HBM Tcrftp.t_rfc = 0xA for density 0x00000001
N0.C15: HBM Tcrftp.t_rfc = 0xA for density 0x00000000
Socket 1 Ch 16 - CkeLl0.Data = 0x10000080
Socket 1 Ch 16 - CkeLl1.Data = 0x10000260
Socket 1 Ch 16 - CkeLl2.Data = 0x10000230
Socket 1 Ch 16 - CkeLl3.Data = 0x10000230
Socket 1 Ch 16 - PkgcCke.Data = 0x10000230
Socket 0 Ch 16 - CkeLl0.Data = 0x10000080
Socket 0 Ch 16 - CkeLl1.Data = 0x10000260
Socket 0 Ch 16 - CkeLl2.Data = 0x10000230
Socket 0 Ch 16 - CkeLl3.Data = 0x10000230
Socket 0 Ch 16 - PkgcCke.Data = 0x10000230
LpModePmControlN0.Data Original = 0x8806C
LpModePmControlN0.Data Original = 0x8806C
LpModePmControlN1.Data Original = 0x0
LpModePmControlN1.Data Original = 0x0
LpModePmControlN0.Data New = 0xC3F4206B
LpModePmControlN0.Data New = 0xC3F4206B
LpModePmControlN1.Data New = 0x87
LpModePmControlN1.Data New = 0x87
N1.C16: HBM Tcrftp.t_rfc = 0xA for density 0x00000001
N0.C16: HBM Tcrftp.t_rfc = 0xA for density 0x00000000
Socket 1 Ch 17 - CkeLl0.Data = 0x10000080
Socket 1 Ch 17 - CkeLl1.Data = 0x10000260
Socket 1 Ch 17 - CkeLl2.Data = 0x10000230
Socket 1 Ch 17 - CkeLl3.Data = 0x10000230
Socket 1 Ch 17 - PkgcCke.Data = 0x10000230
Socket 0 Ch 17 - CkeLl0.Data = 0x10000080
Socket 0 Ch 17 - CkeLl1.Data = 0x10000260
Socket 0 Ch 17 - CkeLl2.Data = 0x10000230
Socket 0 Ch 17 - CkeLl3.Data = 0x10000230
Socket 0 Ch 17 - PkgcCke.Data = 0x10000230
LpModePmControlN0.Data Original = 0x8806C
LpModePmControlN0.Data Original = 0x8806C
LpModePmControlN1.Data Original = 0x0
LpModePmControlN1.Data Original = 0x0
LpModePmControlN0.Data New = 0xC3F4206B
LpModePmControlN0.Data New = 0xC3F4206B
LpModePmControlN1.Data New = 0x87
LpModePmControlN1.Data New = 0x87
N1.C17: HBM Tcrftp.t_rfc = 0xA for density 0x00000001
N0.C17: HBM Tcrftp.t_rfc = 0xA for density 0x00000000
Socket 1 Ch 18 - CkeLl0.Data = 0x10000080
Socket 1 Ch 18 - CkeLl1.Data = 0x10000260
Socket 1 Ch 18 - CkeLl2.Data = 0x10000230
Socket 1 Ch 18 - CkeLl3.Data = 0x10000230
Socket 1 Ch 18 - PkgcCke.Data = 0x10000230
Socket 0 Ch 18 - CkeLl0.Data = 0x10000080
Socket 0 Ch 18 - CkeLl1.Data = 0x10000260
Socket 0 Ch 18 - CkeLl2.Data = 0x10000230
Socket 0 Ch 18 - CkeLl3.Data = 0x10000230
Socket 0 Ch 18 - PkgcCke.Data = 0x10000230
LpModePmControlN0.Data Original = 0x8806C
LpModePmControlN0.Data Original = 0x8806C
LpModePmControlN1.Data Original = 0x0
LpModePmControlN1.Data Original = 0x0
LpModePmControlN0.Data New = 0xC3F4206B
LpModePmControlN0.Data New = 0xC3F4206B
LpModePmControlN1.Data New = 0x87
LpModePmControlN1.Data New = 0x87
N1.C18: HBM Tcrftp.t_rfc = 0xA for density 0x00000001
N0.C18: HBM Tcrftp.t_rfc = 0xA for density 0x00000000
Socket 1 Ch 19 - CkeLl0.Data = 0x10000080
Socket 1 Ch 19 - CkeLl1.Data = 0x10000260
Socket 1 Ch 19 - CkeLl2.Data = 0x10000230
Socket 1 Ch 19 - CkeLl3.Data = 0x10000230
Socket 1 Ch 19 - PkgcCke.Data = 0x10000230
Socket 0 Ch 19 - CkeLl0.Data = 0x10000080
Socket 0 Ch 19 - CkeLl1.Data = 0x10000260
Socket 0 Ch 19 - CkeLl2.Data = 0x10000230
Socket 0 Ch 19 - CkeLl3.Data = 0x10000230
Socket 0 Ch 19 - PkgcCke.Data = 0x10000230
LpModePmControlN0.Data Original = 0x8806C
LpModePmControlN0.Data Original = 0x8806C
LpModePmControlN1.Data Original = 0x0
LpModePmControlN1.Data Original = 0x0
LpModePmControlN0.Data New = 0xC3F4206B
LpModePmControlN0.Data New = 0xC3F4206B
LpModePmControlN1.Data New = 0x87
LpModePmControlN1.Data New = 0x87
N1.C19: HBM Tcrftp.t_rfc = 0xA for density 0x00000001
N0.C19: HBM Tcrftp.t_rfc = 0xA for density 0x00000000
Socket 1 Ch 20 - CkeLl0.Data = 0x10000080
Socket 1 Ch 20 - CkeLl1.Data = 0x10000260
Socket 1 Ch 20 - CkeLl2.Data = 0x10000230
Socket 1 Ch 20 - CkeLl3.Data = 0x10000230
Socket 1 Ch 20 - PkgcCke.Data = 0x10000230
Socket 0 Ch 20 - CkeLl0.Data = 0x10000080
Socket 0 Ch 20 - CkeLl1.Data = 0x10000260
Socket 0 Ch 20 - CkeLl2.Data = 0x10000230
Socket 0 Ch 20 - CkeLl3.Data = 0x10000230
Socket 0 Ch 20 - PkgcCke.Data = 0x10000230
LpModePmControlN0.Data Original = 0x8806C
LpModePmControlN0.Data Original = 0x8806C
LpModePmControlN1.Data Original = 0x0
LpModePmControlN1.Data Original = 0x0
LpModePmControlN0.Data New = 0xC3F4206B
LpModePmControlN0.Data New = 0xC3F4206B
LpModePmControlN1.Data New = 0x87
LpModePmControlN1.Data New = 0x87
N1.C20: HBM Tcrftp.t_rfc = 0xA for density 0x00000001
N0.C20: HBM Tcrftp.t_rfc = 0xA for density 0x00000000
Socket 1 Ch 21 - CkeLl0.Data = 0x10000080
Socket 1 Ch 21 - CkeLl1.Data = 0x10000260
Socket 1 Ch 21 - CkeLl2.Data = 0x10000230
Socket 1 Ch 21 - CkeLl3.Data = 0x10000230
Socket 1 Ch 21 - PkgcCke.Data = 0x10000230
Socket 0 Ch 21 - CkeLl0.Data = 0x10000080
Socket 0 Ch 21 - CkeLl1.Data = 0x10000260
Socket 0 Ch 21 - CkeLl2.Data = 0x10000230
Socket 0 Ch 21 - CkeLl3.Data = 0x10000230
Socket 0 Ch 21 - PkgcCke.Data = 0x10000230
LpModePmControlN0.Data Original = 0x8806C
LpModePmControlN0.Data Original = 0x8806C
LpModePmControlN1.Data Original = 0x0
LpModePmControlN1.Data Original = 0x0
LpModePmControlN0.Data New = 0xC3F4206B
LpModePmControlN0.Data New = 0xC3F4206B
LpModePmControlN1.Data New = 0x87
LpModePmControlN1.Data New = 0x87
N1.C21: HBM Tcrftp.t_rfc = 0xA for density 0x00000001
N0.C21: HBM Tcrftp.t_rfc = 0xA for density 0x00000000
Socket 1 Ch 22 - CkeLl0.Data = 0x10000080
Socket 1 Ch 22 - CkeLl1.Data = 0x10000260
Socket 1 Ch 22 - CkeLl2.Data = 0x10000230
Socket 1 Ch 22 - CkeLl3.Data = 0x10000230
Socket 1 Ch 22 - PkgcCke.Data = 0x10000230
Socket 0 Ch 22 - CkeLl0.Data = 0x10000080
Socket 0 Ch 22 - CkeLl1.Data = 0x10000260
Socket 0 Ch 22 - CkeLl2.Data = 0x10000230
Socket 0 Ch 22 - CkeLl3.Data = 0x10000230
Socket 0 Ch 22 - PkgcCke.Data = 0x10000230
LpModePmControlN0.Data Original = 0x8806C
LpModePmControlN0.Data Original = 0x8806C
LpModePmControlN1.Data Original = 0x0
LpModePmControlN1.Data Original = 0x0
LpModePmControlN0.Data New = 0xC3F4206B
LpModePmControlN0.Data New = 0xC3F4206B
LpModePmControlN1.Data New = 0x87
LpModePmControlN1.Data New = 0x87
N1.C22: HBM Tcrftp.t_rfc = 0xA for density 0x00000001
N0.C22: HBM Tcrftp.t_rfc = 0xA for density 0x00000000
Socket 1 Ch 23 - CkeLl0.Data = 0x10000080
Socket 1 Ch 23 - CkeLl1.Data = 0x10000260
Socket 1 Ch 23 - CkeLl2.Data = 0x10000230
Socket 1 Ch 23 - CkeLl3.Data = 0x10000230
Socket 1 Ch 23 - PkgcCke.Data = 0x10000230
Socket 0 Ch 23 - CkeLl0.Data = 0x10000080
Socket 0 Ch 23 - CkeLl1.Data = 0x10000260
Socket 0 Ch 23 - CkeLl2.Data = 0x10000230
Socket 0 Ch 23 - CkeLl3.Data = 0x10000230
Socket 0 Ch 23 - PkgcCke.Data = 0x10000230
LpModePmControlN0.Data Original = 0x8806C
LpModePmControlN0.Data Original = 0x8806C
LpModePmControlN1.Data Original = 0x0
LpModePmControlN1.Data Original = 0x0
LpModePmControlN0.Data New = 0xC3F4206B
LpModePmControlN0.Data New = 0xC3F4206B
LpModePmControlN1.Data New = 0x87
LpModePmControlN1.Data New = 0x87
N1.C23: HBM Tcrftp.t_rfc = 0xA for density 0x00000001
N0.C23: HBM Tcrftp.t_rfc = 0xA for density 0x00000000
Socket 1 Ch 24 - CkeLl0.Data = 0x10000080
Socket 1 Ch 24 - CkeLl1.Data = 0x10000260
Socket 1 Ch 24 - CkeLl2.Data = 0x10000230
Socket 1 Ch 24 - CkeLl3.Data = 0x10000230
Socket 1 Ch 24 - PkgcCke.Data = 0x10000230
Socket 0 Ch 24 - CkeLl0.Data = 0x10000080
Socket 0 Ch 24 - CkeLl1.Data = 0x10000260
Socket 0 Ch 24 - CkeLl2.Data = 0x10000230
Socket 0 Ch 24 - CkeLl3.Data = 0x10000230
Socket 0 Ch 24 - PkgcCke.Data = 0x10000230
LpModePmControlN0.Data Original = 0x8806C
LpModePmControlN0.Data Original = 0x8806C
LpModePmControlN1.Data Original = 0x0
LpModePmControlN1.Data Original = 0x0
LpModePmControlN0.Data New = 0xC3F4206B
LpModePmControlN0.Data New = 0xC3F4206B
LpModePmControlN1.Data New = 0x87
LpModePmControlN1.Data New = 0x87
N1.C24: HBM Tcrftp.t_rfc = 0xA for density 0x00000001
N0.C24: HBM Tcrftp.t_rfc = 0xA for density 0x00000000
Socket 1 Ch 25 - CkeLl0.Data = 0x10000080
Socket 1 Ch 25 - CkeLl1.Data = 0x10000260
Socket 1 Ch 25 - CkeLl2.Data = 0x10000230
Socket 1 Ch 25 - CkeLl3.Data = 0x10000230
Socket 1 Ch 25 - PkgcCke.Data = 0x10000230
Socket 0 Ch 25 - CkeLl0.Data = 0x10000080
Socket 0 Ch 25 - CkeLl1.Data = 0x10000260
Socket 0 Ch 25 - CkeLl2.Data = 0x10000230
Socket 0 Ch 25 - CkeLl3.Data = 0x10000230
Socket 0 Ch 25 - PkgcCke.Data = 0x10000230
LpModePmControlN0.Data Original = 0x8806C
LpModePmControlN0.Data Original = 0x8806C
LpModePmControlN1.Data Original = 0x0
LpModePmControlN1.Data Original = 0x0
LpModePmControlN0.Data New = 0xC3F4206B
LpModePmControlN0.Data New = 0xC3F4206B
LpModePmControlN1.Data New = 0x87
LpModePmControlN1.Data New = 0x87
N1.C25: HBM Tcrftp.t_rfc = 0xA for density 0x00000001
N0.C25: HBM Tcrftp.t_rfc = 0xA for density 0x00000000
Socket 1 Ch 26 - CkeLl0.Data = 0x10000080
Socket 1 Ch 26 - CkeLl1.Data = 0x10000260
Socket 1 Ch 26 - CkeLl2.Data = 0x10000230
Socket 1 Ch 26 - CkeLl3.Data = 0x10000230
Socket 1 Ch 26 - PkgcCke.Data = 0x10000230
Socket 0 Ch 26 - CkeLl0.Data = 0x10000080
Socket 0 Ch 26 - CkeLl1.Data = 0x10000260
Socket 0 Ch 26 - CkeLl2.Data = 0x10000230
Socket 0 Ch 26 - CkeLl3.Data = 0x10000230
Socket 0 Ch 26 - PkgcCke.Data = 0x10000230
LpModePmControlN0.Data Original = 0x8806C
LpModePmControlN0.Data Original = 0x8806C
LpModePmControlN1.Data Original = 0x0
LpModePmControlN1.Data Original = 0x0
LpModePmControlN0.Data New = 0xC3F4206B
LpModePmControlN0.Data New = 0xC3F4206B
LpModePmControlN1.Data New = 0x87
LpModePmControlN1.Data New = 0x87
N1.C26: HBM Tcrftp.t_rfc = 0xA for density 0x00000001
N0.C26: HBM Tcrftp.t_rfc = 0xA for density 0x00000000
Socket 1 Ch 27 - CkeLl0.Data = 0x10000080
Socket 1 Ch 27 - CkeLl1.Data = 0x10000260
Socket 1 Ch 27 - CkeLl2.Data = 0x10000230
Socket 1 Ch 27 - CkeLl3.Data = 0x10000230
Socket 1 Ch 27 - PkgcCke.Data = 0x10000230
Socket 0 Ch 27 - CkeLl0.Data = 0x10000080
Socket 0 Ch 27 - CkeLl1.Data = 0x10000260
Socket 0 Ch 27 - CkeLl2.Data = 0x10000230
Socket 0 Ch 27 - CkeLl3.Data = 0x10000230
Socket 0 Ch 27 - PkgcCke.Data = 0x10000230
LpModePmControlN0.Data Original = 0x8806C
LpModePmControlN0.Data Original = 0x8806C
LpModePmControlN1.Data Original = 0x0
LpModePmControlN1.Data Original = 0x0
LpModePmControlN0.Data New = 0xC3F4206B
LpModePmControlN0.Data New = 0xC3F4206B
LpModePmControlN1.Data New = 0x87
LpModePmControlN1.Data New = 0x87
N1.C27: HBM Tcrftp.t_rfc = 0xA for density 0x00000001
N0.C27: HBM Tcrftp.t_rfc = 0xA for density 0x00000000
Socket 1 Ch 28 - CkeLl0.Data = 0x10000080
Socket 1 Ch 28 - CkeLl1.Data = 0x10000260
Socket 1 Ch 28 - CkeLl2.Data = 0x10000230
Socket 1 Ch 28 - CkeLl3.Data = 0x10000230
Socket 1 Ch 28 - PkgcCke.Data = 0x10000230
Socket 0 Ch 28 - CkeLl0.Data = 0x10000080
Socket 0 Ch 28 - CkeLl1.Data = 0x10000260
Socket 0 Ch 28 - CkeLl2.Data = 0x10000230
Socket 0 Ch 28 - CkeLl3.Data = 0x10000230
Socket 0 Ch 28 - PkgcCke.Data = 0x10000230
LpModePmControlN0.Data Original = 0x8806C
LpModePmControlN0.Data Original = 0x8806C
LpModePmControlN1.Data Original = 0x0
LpModePmControlN1.Data Original = 0x0
LpModePmControlN0.Data New = 0xC3F4206B
LpModePmControlN0.Data New = 0xC3F4206B
LpModePmControlN1.Data New = 0x87
LpModePmControlN1.Data New = 0x87
N1.C28: HBM Tcrftp.t_rfc = 0xA for density 0x00000001
N0.C28: HBM Tcrftp.t_rfc = 0xA for density 0x00000000
Socket 1 Ch 29 - CkeLl0.Data = 0x10000080
Socket 1 Ch 29 - CkeLl1.Data = 0x10000260
Socket 1 Ch 29 - CkeLl2.Data = 0x10000230
Socket 1 Ch 29 - CkeLl3.Data = 0x10000230
Socket 1 Ch 29 - PkgcCke.Data = 0x10000230
Socket 0 Ch 29 - CkeLl0.Data = 0x10000080
Socket 0 Ch 29 - CkeLl1.Data = 0x10000260
Socket 0 Ch 29 - CkeLl2.Data = 0x10000230
Socket 0 Ch 29 - CkeLl3.Data = 0x10000230
Socket 0 Ch 29 - PkgcCke.Data = 0x10000230
LpModePmControlN0.Data Original = 0x8806C
LpModePmControlN0.Data Original = 0x8806C
LpModePmControlN1.Data Original = 0x0
LpModePmControlN1.Data Original = 0x0
LpModePmControlN0.Data New = 0xC3F4206B
LpModePmControlN0.Data New = 0xC3F4206B
LpModePmControlN1.Data New = 0x87
LpModePmControlN1.Data New = 0x87
N1.C29: HBM Tcrftp.t_rfc = 0xA for density 0x00000001
N0.C29: HBM Tcrftp.t_rfc = 0xA for density 0x00000000
Socket 1 Ch 30 - CkeLl0.Data = 0x10000080
Socket 1 Ch 30 - CkeLl1.Data = 0x10000260
Socket 1 Ch 30 - CkeLl2.Data = 0x10000230
Socket 1 Ch 30 - CkeLl3.Data = 0x10000230
Socket 1 Ch 30 - PkgcCke.Data = 0x10000230
Socket 0 Ch 30 - CkeLl0.Data = 0x10000080
Socket 0 Ch 30 - CkeLl1.Data = 0x10000260
Socket 0 Ch 30 - CkeLl2.Data = 0x10000230
Socket 0 Ch 30 - CkeLl3.Data = 0x10000230
Socket 0 Ch 30 - PkgcCke.Data = 0x10000230
LpModePmControlN0.Data Original = 0x8806C
LpModePmControlN0.Data Original = 0x8806C
LpModePmControlN1.Data Original = 0x0
LpModePmControlN1.Data Original = 0x0
LpModePmControlN0.Data New = 0xC3F4206B
LpModePmControlN0.Data New = 0xC3F4206B
LpModePmControlN1.Data New = 0x87
LpModePmControlN1.Data New = 0x87
N1.C30: HBM Tcrftp.t_rfc = 0xA for density 0x00000001
N0.C30: HBM Tcrftp.t_rfc = 0xA for density 0x00000000
Socket 1 Ch 31 - CkeLl0.Data = 0x10000080
Socket 1 Ch 31 - CkeLl1.Data = 0x10000260
Socket 1 Ch 31 - CkeLl2.Data = 0x10000230
Socket 1 Ch 31 - CkeLl3.Data = 0x10000230
Socket 1 Ch 31 - PkgcCke.Data = 0x10000230
Socket 0 Ch 31 - CkeLl0.Data = 0x10000080
Socket 0 Ch 31 - CkeLl1.Data = 0x10000260
Socket 0 Ch 31 - CkeLl2.Data = 0x10000230
Socket 0 Ch 31 - CkeLl3.Data = 0x10000230
Socket 0 Ch 31 - PkgcCke.Data = 0x10000230
LpModePmControlN0.Data Original = 0x8806C
LpModePmControlN0.Data Original = 0x8806C
LpModePmControlN1.Data Original = 0x0
LpModePmControlN1.Data Original = 0x0
LpModePmControlN0.Data New = 0xC3F4206B
LpModePmControlN0.Data New = 0xC3F4206B
LpModePmControlN1.Data New = 0x87
LpModePmControlN1.Data New = 0x87
N1.C31: HBM Tcrftp.t_rfc = 0xA for density 0x00000001
N0.C31: HBM Tcrftp.t_rfc = 0xA for density 0x00000000
[ScktId: 1] HBM Post-Training - 2817ms
[ScktId: 0] HBM Post-Training - 2819ms
[ScktId: 1] MemTest -- Started
[ScktId: 0] MemTest -- Started
N1: MemTestScram Starts
N0: MemTestScram Starts
...N1:
MemTestScram TestType 10 Ends
.TestType 10 Latency = 2 sec
N0:
MemTestScram TestType 10 Ends
[ScktId: 1] MemTest - 2031ms
TestType 10 Latency = 2 sec
[ScktId: 1] Pipe Sync AP Final Error Sync -- Started
[ScktId: 0] MemTest - 2036ms
[ScktId: 0] Pipe Sync AP Final Error Sync -- Started
[ScktId: 1] Pipe Sync AP Final Error Sync - 16ms
[ScktId: 0] Pipe Sync AP Final Error Sync - 5ms
[ScktId: 1] Late Configuration -- Started
[ScktId: 0] Late Configuration -- Started
S1 TME CPUID = 1
S0 TME CPUID = 1
S1 TmeActivated = 0
S0 TmeActivated = 0
S1 TME CPUID = 1
S0 TME CPUID = 1
S1 TmeActivated = 0
S0 TmeActivated = 0
S1 TME CPUID = 1
S0 TME CPUID = 1
S1 TmeActivated = 0
S0 TmeActivated = 0
S1 TME CPUID = 1
S0 TME CPUID = 1
S1 TmeActivated = 0
S0 TmeActivated = 0
[ScktId: 1] Late Configuration - 41ms
[ScktId: 0] Late Configuration - 38ms
[ScktId: 1] Initialize Memory RAS before refresh enable -- Started
[ScktId: 0] Initialize Memory RAS before refresh enable -- Started
[ScktId: 1] Initialize Memory RAS before refresh enable - 12ms
[ScktId: 0] Initialize Memory RAS before refresh enable - 15ms
[ScktId: 1] Initialize Throttling -- Started
[ScktId: 0] Initialize Throttling -- Started
Data received from mailbox: 0x20000002
N1: McId = 0, VR SVID = 10
N1: McId = 1, VR SVID = 10
N1: McId = 2, VR SVID = 10
N1: McId = 3, VR SVID = 10
Data received from mailbox: 0x20000002
N0: McId = 0, VR SVID = 10
N0: McId = 1, VR SVID = 10
N0: McId = 2, VR SVID = 10
N0: McId = 3, VR SVID = 10
[ScktId: 1] Initialize Throttling - 31ms
[ScktId: 0] Initialize Throttling - 40ms
[ScktId: 1] Publish ACTM DIMM Manifest -- Started
[ScktId: 0] Publish ACTM DIMM Manifest -- Started
[ScktId: 1] Publish ACTM DIMM Manifest - 14ms
[ScktId: 0] Publish ACTM DIMM Manifest - 10ms
[ScktId: 1] Setup SVL and Scrambling -- Started
[ScktId: 0] Setup SVL and Scrambling -- Started
[ScktId: 1] Setup SVL and Scrambling - 9ms
[ScktId: 0] Setup SVL and Scrambling - 9ms
N1 Checked into Pipe
[ScktId: 0] Mem ALIAS Check -- Started
[ScktId: 0] Mem ALIAS Check - 6ms
[ScktId: 1] Switch to Cpgc Out Of Order Mode -- Started
[ScktId: 0] Switch to Cpgc Out Of Order Mode -- Started
[ScktId: 1] Switch to Cpgc Out Of Order Mode - 5ms
[ScktId: 0] Switch to Cpgc Out Of Order Mode - 11ms
[ScktId: 1] Enable Host Refresh -- Started
[ScktId: 0] Enable Host Refresh -- Started
C00: REFRESH_SYNC_TIME_PerCh= 7800
C00: REFRESH_SYNC_TIME_PerCh= 7800
C02: REFRESH_SYNC_TIME_PerCh= 7800
C02: REFRESH_SYNC_TIME_PerCh= 7800
C04: REFRESH_SYNC_TIME_PerCh= 7800
C04: REFRESH_SYNC_TIME_PerCh= 7800
C06: REFRESH_SYNC_TIME_PerCh= 7800
C06: REFRESH_SYNC_TIME_PerCh= 7800
C00: HostRefreshStartTime= 7800
C00: HostRefreshStartTime= 7800
C02: HostRefreshStartTime= 7754
C02: HostRefreshStartTime= 7747
C04: HostRefreshStartTime= 7774
C04: HostRefreshStartTime= 7755
C06: HostRefreshStartTime= 7739
C06: HostRefreshStartTime= 7752
EnableHostRefresh Start Write Time diff[2]=447 ns
EnableHostRefresh Start Write Time diff[2]=269 ns
EnableHostRefresh Start Write Time diff[4]=521 ns
EnableHostRefresh Start Write Time diff[4]=347 ns
EnableHostRefresh Start Write Time diff[6]=584 ns
EnableHostRefresh Start Write Time diff[6]=409 ns
[ScktId: 1] Enable Host Refresh - 92ms
[ScktId: 0] Enable Host Refresh - 91ms
[ScktId: 1] MemInit -- Started
[ScktId: 0] MemInit -- Started
.[ScktId: 1] MemInit - 1221ms
[ScktId: 1] HBM Mem Test -- Started
.SetCpgcCurrentTechType: MemTechType = 1
[ScktId: 0] MemInit - 1224ms
[ScktId: 0] HBM Mem Test -- Started
SetCpgcCurrentTechType: MemTechType = 1
...TestType 10 Latency = 0 sec
.TestType 10 Latency = 0 sec
...TestType 10 Latency = 0 sec
.TestType 10 Latency = 0 sec
...TestType 10 Latency = 0 sec
.TestType 10 Latency = 0 sec
...TestType 10 Latency = 0 sec
SetCpgcCurrentTechType: MemTechType = 0
[ScktId: 1] HBM Mem Test - 1184ms
.[ScktId: 1] HBM Setup Scrambling -- Started
TestType 10 Latency = 0 sec
[ScktId: 1] HBM Setup Scrambling - 4ms
SetCpgcCurrentTechType: MemTechType = 0
[ScktId: 1] AP HBM Information -- Started
[ScktId: 0] HBM Mem Test - 1192ms
[ScktId: 0] HBM Setup Scrambling -- Started
[ScktId: 0] HBM Setup Scrambling - 4ms
[ScktId: 0] AP HBM Information -- Started
[ScktId: 0] AP HBM Information - 5ms
[ScktId: 1] AP HBM Information - 25ms
N1 Checked into Pipe
[ScktId: 0] HBM Fault Resilient Boot -- Started
[ScktId: 0] HBM Fault Resilient Boot - 6ms
N1 Checked into Pipe
[ScktId: 0] HBM Reset System -- Started
[ScktId: 0] HBM Reset System - 6ms
[ScktId: 1] SBSP HBM Information -- Started
[ScktId: 0] SBSP HBM Information -- Started
[ScktId: 1] SBSP HBM Information - 9ms
[ScktId: 0] SBSP HBM Information - 9ms
[ScktId: 1] HBM Mem Init -- Started
[ScktId: 0] HBM Mem Init -- Started
SetCpgcCurrentTechType: MemTechType = 1
SetCpgcCurrentTechType: MemTechType = 1
.TestType 9 Latency = 0 sec
SetCpgcCurrentTechType: MemTechType = 0
.[ScktId: 1] HBM Mem Init - 706ms
TestType 9 Latency = 0 sec
[ScktId: 1] Pipe Sync AP NVRAM Data -- Started
SetCpgcCurrentTechType: MemTechType = 0
[ScktId: 0] HBM Mem Init - 716ms
[ScktId: 0] Pipe Sync AP NVRAM Data -- Started
[ScktId: 0] Pipe Sync AP NVRAM Data - 17ms
[ScktId: 1] Pipe Sync AP NVRAM Data - 32ms
N1 Checked into Pipe
[ScktId: 0] Check Memory Topology -- Started
GetPorTablePtr - Using SPR HBM Matrix
[ScktId: 0] Check Memory Topology - 10ms
[ScktId: 1] Pipe Sync AP Final Error Sync -- Started
[ScktId: 0] Pipe Sync AP Final Error Sync -- Started
[ScktId: 1] Pipe Sync AP Final Error Sync - 10ms
[ScktId: 0] Pipe Sync AP Final Error Sync - 10ms
N1 Checked into Pipe
[ScktId: 0] Check Ras Support After MemInit -- Started
[ScktId: 0] Check Ras Support After MemInit - 7ms
N1 Checked into Pipe
[ScktId: 0] Initialize Memory Map -- Started
N0.C00.D0: Memory Found!
N0.C02.D0: Memory Found!
N0.C04.D0: Memory Found!
N0.C06.D0: Memory Found!
N1.C00.D0: Memory Found!
N1.C02.D0: Memory Found!
N1.C04.D0: Memory Found!
N1.C06.D0: Memory Found!
sizeof (MEMORY_MAP_HOST) = 66360
***BEGIN MEMORY MAPPING***
mmiohbasefrom setup: 2000 MMIOH base = 80000 (64mb)
Silicon capability does not support persistent modes, forcing to non-persistent mode.
Silicon capability does not support persistent modes, forcing to non-persistent mode.
PMem mgmt Driver is available..
CXL: Socket 0 Stack 0, CXL device not found
CXL: Socket 0 Stack 1, CXL device not found
CXL: Socket 0 Stack 2, CXL device not found
CXL: Socket 0 Stack 3, CXL device not found
CXL: Socket 0 Stack 4, CXL device not found
CXL: Socket 0 Stack 5, CXL device not found
CXL: Socket 0 Stack 6, CXL device not found
CXL: Socket 0 Stack 7, CXL device not found
CXL: Socket 1 Stack 0, CXL device not found
CXL: Socket 1 Stack 1, CXL device not found
CXL: Socket 1 Stack 2, CXL device not found
CXL: Socket 1 Stack 3, CXL device not found
CXL: Socket 1 Stack 4, CXL device not found
CXL: Socket 1 Stack 5, CXL device not found
CXL: Socket 1 Stack 6, CXL device not found
CXL: Socket 1 Stack 7, CXL device not found
N0: HBM: MemSizePerStack: 0x100 (64MB), StackValidBitMask: 0xF
N0: Hbm size = 1024
N1: HBM: MemSizePerStack: 0x100 (64MB), StackValidBitMask: 0xF
N1: Hbm size = 1024
Total Hbm size = 2048
N0.C00.D0.R0: ranksize = 200, NVranksize = 0 (rank enabled)
N0.C02.D0.R0: ranksize = 200, NVranksize = 0 (rank enabled)
N0.C04.D0.R0: ranksize = 200, NVranksize = 0 (rank enabled)
N0.C06.D0.R0: ranksize = 200, NVranksize = 0 (rank enabled)
N1.C00.D0.R0: ranksize = 200, NVranksize = 0 (rank enabled)
N1.C02.D0.R0: ranksize = 200, NVranksize = 0 (rank enabled)
N1.C04.D0.R0: ranksize = 200, NVranksize = 0 (rank enabled)
N1.C06.D0.R0: ranksize = 200, NVranksize = 0 (rank enabled)
N0: Total mem size = 2048; mem size = 2048; per size = 0
N1: Total mem size = 4096; mem size = 2048; per size = 0
^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^
Platform DIMM Configuration(num_chunks(chunk_size))
^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^
Socket : 0
Channel : 0 DDR Size : 512(64MB) PMem volatile Size : 0(64MB) PMem non volatile Size : 0(64MB) NVDIMM-N Memory Size : 0(64MB)
Channel : 1 DDR Size : 0(64MB) PMem volatile Size : 0(64MB) PMem non volatile Size : 0(64MB) NVDIMM-N Memory Size : 0(64MB)
Channel : 2 DDR Size : 512(64MB) PMem volatile Size : 0(64MB) PMem non volatile Size : 0(64MB) NVDIMM-N Memory Size : 0(64MB)
Channel : 3 DDR Size : 0(64MB) PMem volatile Size : 0(64MB) PMem non volatile Size : 0(64MB) NVDIMM-N Memory Size : 0(64MB)
Channel : 4 DDR Size : 512(64MB) PMem volatile Size : 0(64MB) PMem non volatile Size : 0(64MB) NVDIMM-N Memory Size : 0(64MB)
Channel : 5 DDR Size : 0(64MB) PMem volatile Size : 0(64MB) PMem non volatile Size : 0(64MB) NVDIMM-N Memory Size : 0(64MB)
Channel : 6 DDR Size : 512(64MB) PMem volatile Size : 0(64MB) PMem non volatile Size : 0(64MB) NVDIMM-N Memory Size : 0(64MB)
Channel : 7 DDR Size : 0(64MB) PMem volatile Size : 0(64MB) PMem non volatile Size : 0(64MB) NVDIMM-N Memory Size : 0(64MB)
Socket : 1
Channel : 0 DDR Size : 512(64MB) PMem volatile Size : 0(64MB) PMem non volatile Size : 0(64MB) NVDIMM-N Memory Size : 0(64MB)
Channel : 1 DDR Size : 0(64MB) PMem volatile Size : 0(64MB) PMem non volatile Size : 0(64MB) NVDIMM-N Memory Size : 0(64MB)
Channel : 2 DDR Size : 512(64MB) PMem volatile Size : 0(64MB) PMem non volatile Size : 0(64MB) NVDIMM-N Memory Size : 0(64MB)
Channel : 3 DDR Size : 0(64MB) PMem volatile Size : 0(64MB) PMem non volatile Size : 0(64MB) NVDIMM-N Memory Size : 0(64MB)
Channel : 4 DDR Size : 512(64MB) PMem volatile Size : 0(64MB) PMem non volatile Size : 0(64MB) NVDIMM-N Memory Size : 0(64MB)
Channel : 5 DDR Size : 0(64MB) PMem volatile Size : 0(64MB) PMem non volatile Size : 0(64MB) NVDIMM-N Memory Size : 0(64MB)
Channel : 6 DDR Size : 512(64MB) PMem volatile Size : 0(64MB) PMem non volatile Size : 0(64MB) NVDIMM-N Memory Size : 0(64MB)
Channel : 7 DDR Size : 0(64MB) PMem volatile Size : 0(64MB) PMem non volatile Size : 0(64MB) NVDIMM-N Memory Size : 0(64MB)
N0: Memory population doesn't support SGX
System Memory Population doesn't support SGX
CollectCpuPrmSizeBitmap BEGIN
CollectCpuPrmSizeBitmap ProtectedMemValidBitMask = 0x000000FFF0000000
tCollectCpuPrmSizeBitmap END
SGX Status 0 PrmrrSize 0
PrmrrCountRequested 8 PrmrrCountPerPackage 4
Value set for Channel Interleave to 3
Value set for Imc Interleave to 4
Checkpoint Code: Socket 0, 0xBB, 0x03, 0x0000
N0: Map 2LM (HBM/DDR)
N0: Map 2LM (HBM/DDR)
N0: Map 2LM (HBM/DDR)
N0: Map 2LM (HBM/DDR)
N0: ClusterId 0 SadCount = 2
N0: ClusterId 1 SadCount = 1
N0: ClusterId 2 SadCount = 1
N0: ClusterId 3 SadCount = 1
N0: Adding NXM at ClusterId 1 SadIndex 17
N0: Adding NXM at ClusterId 2 SadIndex 33
N0: Adding NXM at ClusterId 3 SadIndex 49
N1: Map 2LM (HBM/DDR)
N1: Map 2LM (HBM/DDR)
N1: Map 2LM (HBM/DDR)
N1: Map 2LM (HBM/DDR)
N1: ClusterId 0 SadCount = 1
N1: ClusterId 1 SadCount = 1
N1: ClusterId 2 SadCount = 1
N1: ClusterId 3 SadCount = 1
N0: Not an FPGA Socket
N1: Not an FPGA Socket
N2: Not an FPGA Socket
N3: Not an FPGA Socket
AdjustMemAddrMapForMirror: In the function
N0:
Mirroring population not met
Checkpoint Code: Socket 0, 0xBB, 0x04, 0x0000
HBM: CreateHbmTadRules
Checkpoint Code: Socket 0, 0xBB, 0x05, 0x0000
PMem mgmt Driver is available..
CXL: Socket 0 Stack 0, CXL device not found
CXL: Socket 0 Stack 1, CXL device not found
CXL: Socket 0 Stack 2, CXL device not found
CXL: Socket 0 Stack 3, CXL device not found
CXL: Socket 0 Stack 4, CXL device not found
CXL: Socket 0 Stack 5, CXL device not found
CXL: Socket 0 Stack 6, CXL device not found
CXL: Socket 0 Stack 7, CXL device not found
CXL: Socket 1 Stack 0, CXL device not found
CXL: Socket 1 Stack 1, CXL device not found
CXL: Socket 1 Stack 2, CXL device not found
CXL: Socket 1 Stack 3, CXL device not found
CXL: Socket 1 Stack 4, CXL device not found
CXL: Socket 1 Stack 5, CXL device not found
CXL: Socket 1 Stack 6, CXL device not found
CXL: Socket 1 Stack 7, CXL device not found
N0: HBM: MemSizePerStack: 0x100 (64MB), StackValidBitMask: 0xF
N0: Hbm size = 1024
N1: HBM: MemSizePerStack: 0x100 (64MB), StackValidBitMask: 0xF
N1: Hbm size = 1024
Total Hbm size = 2048
N0.C00.D0.R0: ranksize = 200, NVranksize = 0 (rank enabled)
N0.C02.D0.R0: ranksize = 200, NVranksize = 0 (rank enabled)
N0.C04.D0.R0: ranksize = 200, NVranksize = 0 (rank enabled)
N0.C06.D0.R0: ranksize = 200, NVranksize = 0 (rank enabled)
N1.C00.D0.R0: ranksize = 200, NVranksize = 0 (rank enabled)
N1.C02.D0.R0: ranksize = 200, NVranksize = 0 (rank enabled)
N1.C04.D0.R0: ranksize = 200, NVranksize = 0 (rank enabled)
N1.C06.D0.R0: ranksize = 200, NVranksize = 0 (rank enabled)
N0: Total mem size = 2048; mem size = 2048; per size = 0
N1: Total mem size = 4096; mem size = 2048; per size = 0
N0: Memory population doesn't support SGX
System Memory Population doesn't support SGX
CollectCpuPrmSizeBitmap BEGIN
CollectCpuPrmSizeBitmap ProtectedMemValidBitMask = 0x000000FFF0000000
tCollectCpuPrmSizeBitmap END
SGX Status 0 PrmrrSize 0
PrmrrCountRequested 8 PrmrrCountPerPackage 4
Value set for Channel Interleave to 3
Value set for Imc Interleave to 4
Checkpoint Code: Socket 0, 0xBB, 0x03, 0x0000
N0: Map 2LM (HBM/DDR)
N0: Map 2LM (HBM/DDR)
N0: Map 2LM (HBM/DDR)
N0: Map 2LM (HBM/DDR)
N0: ClusterId 0 SadCount = 2
N0: ClusterId 1 SadCount = 1
N0: ClusterId 2 SadCount = 1
N0: ClusterId 3 SadCount = 1
N0: Adding NXM at ClusterId 1 SadIndex 17
N0: Adding NXM at ClusterId 2 SadIndex 33
N0: Adding NXM at ClusterId 3 SadIndex 49
N1: Map 2LM (HBM/DDR)
N1: Map 2LM (HBM/DDR)
N1: Map 2LM (HBM/DDR)
N1: Map 2LM (HBM/DDR)
N1: ClusterId 0 SadCount = 1
N1: ClusterId 1 SadCount = 1
N1: ClusterId 2 SadCount = 1
N1: ClusterId 3 SadCount = 1
N0: Not an FPGA Socket
N1: Not an FPGA Socket
N2: Not an FPGA Socket
N3: Not an FPGA Socket
AdjustMemAddrMapForMirror: In the function
N0:
Mirroring population not met
Checkpoint Code: Socket 0, 0xBB, 0x04, 0x0000
HBM: CreateHbmTadRules
Checkpoint Code: Socket 0, 0xBB, 0x05, 0x0000
********SAD table for socket 0*******
Type Base Limit Ways McIntBitmap ChIntBitmap[MC00] FmChIntBitmap[MC00] ChIntBitmap[MC01] FmChIntBitmap[MC01] ChIntBitmap[MC02] FmChIntBitmap[MC02] ChIntBitmap[MC03] FmChIntBitmap[MC03] Granularity Tgtgranularity Attr Cluster
HBM 2LM DDR 0x00000 0x00040 1 1 3 1 3 0 3 0 3 0 1 1 3 0
HBM 2LM DDR 0x00040 0x00220 1 1 3 1 3 0 3 0 3 0 1 1 3 0
HBM 2LM DDR 0x00220 0x00420 1 2 3 0 3 1 3 0 3 0 1 1 3 1
NXM 0x00420 0x00420 0 0 0 0 0 0 0 0 0 0 0 0 0 1
HBM 2LM DDR 0x00420 0x00620 1 4 3 0 3 0 3 1 3 0 1 1 3 2
NXM 0x00620 0x00620 0 0 0 0 0 0 0 0 0 0 0 0 0 2
HBM 2LM DDR 0x00620 0x00820 1 8 3 0 3 0 3 0 3 1 1 1 3 3
NXM 0x00820 0x00820 0 0 0 0 0 0 0 0 0 0 0 0 0 3
<<SAD Interleave List>>
1 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0
1 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0
0 1 0 0 0 0 0 0 0 0 0 0 0 0 0 0
0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0
0 0 1 0 0 0 0 0 0 0 0 0 0 0 0 0
0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0
0 0 0 1 0 0 0 0 0 0 0 0 0 0 0 0
0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0
********SAD table for socket 1*******
Type Base Limit Ways McIntBitmap ChIntBitmap[MC00] FmChIntBitmap[MC00] ChIntBitmap[MC01] FmChIntBitmap[MC01] ChIntBitmap[MC02] FmChIntBitmap[MC02] ChIntBitmap[MC03] FmChIntBitmap[MC03] Granularity Tgtgranularity Attr Cluster
HBM 2LM DDR 0x00820 0x00A20 1 1 3 1 3 0 3 0 3 0 1 1 3 0
HBM 2LM DDR 0x00A20 0x00C20 1 2 3 0 3 1 3 0 3 0 1 1 3 1
HBM 2LM DDR 0x00C20 0x00E20 1 4 3 0 3 0 3 1 3 0 1 1 3 2
HBM 2LM DDR 0x00E20 0x01020 1 8 3 0 3 0 3 0 3 1 1 1 3 3
<<SAD Interleave List>>
0 0 0 0 1 0 0 0 0 0 0 0 0 0 0 0
0 0 0 0 0 1 0 0 0 0 0 0 0 0 0 0
0 0 0 0 0 0 1 0 0 0 0 0 0 0 0 0
0 0 0 0 0 0 0 1 0 0 0 0 0 0 0 0
</SADTable>
*******TAD Table for socket 0 Mc 0*******
Enable SadID Limit SktWays TargetGran ChGran NmTadIndex FmTadIndex
1 0 0x00020 1 1 1 0 0
1 1 0x00220 1 1 1 0 0
</TADTable>
*******TAD Table for socket 0 Mc 1*******
Enable SadID Limit SktWays TargetGran ChGran NmTadIndex FmTadIndex
1 16 0x00420 1 1 1 0 0
</TADTable>
*******TAD Table for socket 0 Mc 2*******
Enable SadID Limit SktWays TargetGran ChGran NmTadIndex FmTadIndex
1 32 0x00620 1 1 1 0 0
</TADTable>
*******TAD Table for socket 0 Mc 3*******
Enable SadID Limit SktWays TargetGran ChGran NmTadIndex FmTadIndex
1 48 0x00820 1 1 1 0 0
</TADTable>
*******TAD Table for Socket 0 Stack 0*******
Enable SadID Limit SktWays TargetGran ChGran
1 0 0x00000 1 1 1
</TADTable>
*******TAD Table for Socket 0 Stack 1*******
Enable SadID Limit SktWays TargetGran ChGran
1 16 0x00000 1 1 1
</TADTable>
*******TAD Table for Socket 0 Stack 2*******
Enable SadID Limit SktWays TargetGran ChGran
1 32 0x00000 1 1 1
</TADTable>
*******TAD Table for Socket 0 Stack 3*******
Enable SadID Limit SktWays TargetGran ChGran
1 48 0x00000 1 1 1
</TADTable>
*******TAD Table for socket 1 Mc 0*******
Enable SadID Limit SktWays TargetGran ChGran NmTadIndex FmTadIndex
1 0 0x00A20 1 1 1 0 0
</TADTable>
*******TAD Table for socket 1 Mc 1*******
Enable SadID Limit SktWays TargetGran ChGran NmTadIndex FmTadIndex
1 16 0x00C20 1 1 1 0 0
</TADTable>
*******TAD Table for socket 1 Mc 2*******
Enable SadID Limit SktWays TargetGran ChGran NmTadIndex FmTadIndex
1 32 0x00E20 1 1 1 0 0
</TADTable>
*******TAD Table for socket 1 Mc 3*******
Enable SadID Limit SktWays TargetGran ChGran NmTadIndex FmTadIndex
1 48 0x01020 1 1 1 0 0
</TADTable>
*******TAD Table for Socket 1 Stack 0*******
Enable SadID Limit SktWays TargetGran ChGran
1 0 0x00000 1 1 1
</TADTable>
*******TAD Table for Socket 1 Stack 1*******
Enable SadID Limit SktWays TargetGran ChGran
1 16 0x00000 1 1 1
</TADTable>
*******TAD Table for Socket 1 Stack 2*******
Enable SadID Limit SktWays TargetGran ChGran
1 32 0x00000 1 1 1
</TADTable>
*******TAD Table for Socket 1 Stack 3*******
Enable SadID Limit SktWays TargetGran ChGran
1 48 0x00000 1 1 1
</TADTable>
Checkpoint Code: Socket 0, 0xBB, 0x06, 0x0000
^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^
Write CHA Remote SAD CSRs for Socket: 0
^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^
En Base Limit NodeId Attr
1 0x00820 0x0101F 0x1 0x3
^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^
Write CHA SAD CSRs for Socket: 0
^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^
CHA unlock DRAM cluster 0 snc_lock bits: 0xE
Program Channel Interleaves
rt0_interleave_mode: 7
rt1_interleave_shift: 7
rt2_interleave_shift: 2
Program CSRs for SAD Rule 0 (HBM 2LM DDR)
En Limit Mode Attr NMCacheable
1 0x0003F 0x1 0x3 1
Interleave List: 0x0000000088888888
Single Target: H0 Index 0
DRAM_RULE_CFG2: cxl_accelerator_mem Durable_mem_en cxl_mem_expander NXM
0 0 0 0
TgtRt: 00 ChnRt: 00
Program CSRs for SAD Rule 1 (HBM 2LM DDR)
En Limit Mode Attr NMCacheable
1 0x0021F 0x1 0x3 1
Interleave List: 0x0000000088888888
Single Target: H0 Index 0
DRAM_RULE_CFG2: cxl_accelerator_mem Durable_mem_en cxl_mem_expander NXM
0 0 0 0
TgtRt: 00 ChnRt: 00
Program target config: 00000000
Program channel config: 00000000
Program Mode config.
H0 DramRt0Mode0Cfg: 00000036
H0 DramRt0Mode1Cfg: 00000000
H1 DramRt0Mode0Cfg: 00000000
H1 DramRt0Mode1Cfg: 00000000
H0 DramRt1Mode0Cfg: 00000000
H0 DramRt1Mode1Cfg: 00000000
H1 DramRt1Mode0Cfg: 00000000
H1 DramRt1Mode1Cfg: 00000000
H0 DramRt2Mode0Cfg: 00000000
H0 DramRt2Mode1Cfg: 00000000
H1 DramRt2Mode0Cfg: 00000000
H1 DramRt2Mode1Cfg: 00000000
CHA unlock DRAM cluster 1 snc_lock bits: 0xD
Program Channel Interleaves
rt0_interleave_mode: 7
rt1_interleave_shift: 7
rt2_interleave_shift: 2
Program CSRs for SAD Rule 0 (HBM 2LM DDR)
En Limit Mode Attr NMCacheable
1 0x0041F 0x1 0x3 1
Interleave List: 0x0000000088888888
Single Target: H0 Index 0
DRAM_RULE_CFG2: cxl_accelerator_mem Durable_mem_en cxl_mem_expander NXM
0 0 0 0
TgtRt: 00 ChnRt: 00
Program CSRs for SAD Rule 1 (NXM)
En Limit Mode Attr NMCacheable
1 0x0041F 0x0 0x0 0
Interleave List: 0xFFFFFFFFFFFFFFFF
DRAM_RULE_CFG2: cxl_accelerator_mem Durable_mem_en cxl_mem_expander NXM
0 0 0 1
Program target config: 00000000
Program channel config: 00000000
Program Mode config.
H0 DramRt0Mode0Cfg: 00000006
H0 DramRt0Mode1Cfg: 00000000
H1 DramRt0Mode0Cfg: 00000000
H1 DramRt0Mode1Cfg: 00000000
H0 DramRt1Mode0Cfg: 00000000
H0 DramRt1Mode1Cfg: 00000000
H1 DramRt1Mode0Cfg: 00000000
H1 DramRt1Mode1Cfg: 00000000
H0 DramRt2Mode0Cfg: 00000000
H0 DramRt2Mode1Cfg: 00000000
H1 DramRt2Mode0Cfg: 00000000
H1 DramRt2Mode1Cfg: 00000000
CHA unlock DRAM cluster 2 snc_lock bits: 0xB
Program Channel Interleaves
rt0_interleave_mode: 7
rt1_interleave_shift: 7
rt2_interleave_shift: 2
Program CSRs for SAD Rule 0 (HBM 2LM DDR)
En Limit Mode Attr NMCacheable
1 0x0061F 0x1 0x3 1
Interleave List: 0x0000000088888888
Single Target: H0 Index 0
DRAM_RULE_CFG2: cxl_accelerator_mem Durable_mem_en cxl_mem_expander NXM
0 0 0 0
TgtRt: 00 ChnRt: 00
Program CSRs for SAD Rule 1 (NXM)
En Limit Mode Attr NMCacheable
1 0x0061F 0x0 0x0 0
Interleave List: 0xFFFFFFFFFFFFFFFF
DRAM_RULE_CFG2: cxl_accelerator_mem Durable_mem_en cxl_mem_expander NXM
0 0 0 1
Program target config: 00000000
Program channel config: 00000000
Program Mode config.
H0 DramRt0Mode0Cfg: 00000006
H0 DramRt0Mode1Cfg: 00000000
H1 DramRt0Mode0Cfg: 00000000
H1 DramRt0Mode1Cfg: 00000000
H0 DramRt1Mode0Cfg: 00000000
H0 DramRt1Mode1Cfg: 00000000
H1 DramRt1Mode0Cfg: 00000000
H1 DramRt1Mode1Cfg: 00000000
H0 DramRt2Mode0Cfg: 00000000
H0 DramRt2Mode1Cfg: 00000000
H1 DramRt2Mode0Cfg: 00000000
H1 DramRt2Mode1Cfg: 00000000
CHA unlock DRAM cluster 3 snc_lock bits: 0x7
Program Channel Interleaves
rt0_interleave_mode: 7
rt1_interleave_shift: 7
rt2_interleave_shift: 2
Program CSRs for SAD Rule 0 (HBM 2LM DDR)
En Limit Mode Attr NMCacheable
1 0x0081F 0x1 0x3 1
Interleave List: 0x0000000088888888
Single Target: H0 Index 0
DRAM_RULE_CFG2: cxl_accelerator_mem Durable_mem_en cxl_mem_expander NXM
0 0 0 0
TgtRt: 00 ChnRt: 00
Program CSRs for SAD Rule 1 (NXM)
En Limit Mode Attr NMCacheable
1 0x0081F 0x0 0x0 0
Interleave List: 0xFFFFFFFFFFFFFFFF
DRAM_RULE_CFG2: cxl_accelerator_mem Durable_mem_en cxl_mem_expander NXM
0 0 0 1
Program target config: 00000000
Program channel config: 00000000
Program Mode config.
H0 DramRt0Mode0Cfg: 00000006
H0 DramRt0Mode1Cfg: 00000000
H1 DramRt0Mode0Cfg: 00000000
H1 DramRt0Mode1Cfg: 00000000
H0 DramRt1Mode0Cfg: 00000000
H0 DramRt1Mode1Cfg: 00000000
H1 DramRt1Mode0Cfg: 00000000
H1 DramRt1Mode1Cfg: 00000000
H0 DramRt2Mode0Cfg: 00000000
H0 DramRt2Mode1Cfg: 00000000
H1 DramRt2Mode0Cfg: 00000000
H1 DramRt2Mode1Cfg: 00000000
CHA lock all DRAM clusters snc_lock bits: 0xF
^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^
Write Route Table CSRs for Socket: 0
^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^
CSR: Cluster 0 H0_CH_ROUTE_TABLE_0 - 0x0 0x1 0x0 0x1 0x0 0x1 0x0 0x1
CSR: Cluster 0 H0_TGT_ROUTE_TABLE_0 - 0x4 0x4 0x5 0x5 0x6 0x6 0x7 0x7
CSR: Cluster 0 H1_CH_ROUTE_TABLE_0 - 0x0 0x0 0x0 0x0 0x0 0x0 0x0 0x0
CSR: Cluster 0 H1_TGT_ROUTE_TABLE_0 - 0x0 0x0 0x0 0x0 0x0 0x0 0x0 0x0
CSR: Cluster 1 H0_CH_ROUTE_TABLE_0 - 0x0 0x1 0x0 0x1 0x0 0x1 0x0 0x1
CSR: Cluster 1 H0_TGT_ROUTE_TABLE_0 - 0x4 0x4 0x5 0x5 0x6 0x6 0x7 0x7
CSR: Cluster 1 H1_CH_ROUTE_TABLE_0 - 0x0 0x0 0x0 0x0 0x0 0x0 0x0 0x0
CSR: Cluster 1 H1_TGT_ROUTE_TABLE_0 - 0x0 0x0 0x0 0x0 0x0 0x0 0x0 0x0
CSR: Cluster 2 H0_CH_ROUTE_TABLE_0 - 0x0 0x1 0x0 0x1 0x0 0x1 0x0 0x1
CSR: Cluster 2 H0_TGT_ROUTE_TABLE_0 - 0x7 0x7 0x6 0x6 0x5 0x5 0x4 0x4
CSR: Cluster 2 H1_CH_ROUTE_TABLE_0 - 0x0 0x0 0x0 0x0 0x0 0x0 0x0 0x0
CSR: Cluster 2 H1_TGT_ROUTE_TABLE_0 - 0x0 0x0 0x0 0x0 0x0 0x0 0x0 0x0
CSR: Cluster 3 H0_CH_ROUTE_TABLE_0 - 0x0 0x1 0x0 0x1 0x0 0x1 0x0 0x1
CSR: Cluster 3 H0_TGT_ROUTE_TABLE_0 - 0x7 0x7 0x6 0x6 0x5 0x5 0x4 0x4
CSR: Cluster 3 H1_CH_ROUTE_TABLE_0 - 0x0 0x0 0x0 0x0 0x0 0x0 0x0 0x0
CSR: Cluster 3 H1_TGT_ROUTE_TABLE_0 - 0x0 0x0 0x0 0x0 0x0 0x0 0x0 0x0
^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^
Write MESH2MEM CSRs for Socket: 0
^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^
Memory Controller : 0
------------------------
DEFEATURES0_M2MEM_MAIN_REG
wrcmpfromnm: 1
MODE_M2MEM_MAIN_REG
nmcaching:0x1 pmem:0x0 blockregion:0x0 in-tile caching: 0x1
Memory Controller : 1
------------------------
DEFEATURES0_M2MEM_MAIN_REG
wrcmpfromnm: 1
MODE_M2MEM_MAIN_REG
nmcaching:0x1 pmem:0x0 blockregion:0x0 in-tile caching: 0x1
Memory Controller : 2
------------------------
DEFEATURES0_M2MEM_MAIN_REG
wrcmpfromnm: 1
MODE_M2MEM_MAIN_REG
nmcaching:0x1 pmem:0x0 blockregion:0x0 in-tile caching: 0x1
Memory Controller : 3
------------------------
DEFEATURES0_M2MEM_MAIN_REG
wrcmpfromnm: 1
MODE_M2MEM_MAIN_REG
nmcaching:0x1 pmem:0x0 blockregion:0x0 in-tile caching: 0x1
MC: 0
tadid:0x0 tadvld:0x1 pmemvld:0x0 blkvld:0x0 ddr4tadid:0x0 ddrttadid:0x0 ddr4:0x1 nmcacheablevld:0x0 mirror:0x0 secondary1st:0x0 frcnpwr:0x0 spare:0x0 addresslimit[51:26]:0x1F nonpersistentfm:0x1
MC: 0
tadid:0x1 tadvld:0x1 pmemvld:0x0 blkvld:0x0 ddr4tadid:0x1 ddrttadid:0x0 ddr4:0x1 nmcacheablevld:0x0 mirror:0x0 secondary1st:0x0 frcnpwr:0x0 spare:0x0 addresslimit[51:26]:0x21F nonpersistentfm:0x1
MC: 1
tadid:0x0 tadvld:0x1 pmemvld:0x0 blkvld:0x0 ddr4tadid:0x0 ddrttadid:0x0 ddr4:0x1 nmcacheablevld:0x0 mirror:0x0 secondary1st:0x0 frcnpwr:0x0 spare:0x0 addresslimit[51:26]:0x41F nonpersistentfm:0x1
MC: 2
tadid:0x0 tadvld:0x1 pmemvld:0x0 blkvld:0x0 ddr4tadid:0x0 ddrttadid:0x0 ddr4:0x1 nmcacheablevld:0x0 mirror:0x0 secondary1st:0x0 frcnpwr:0x0 spare:0x0 addresslimit[51:26]:0x61F nonpersistentfm:0x1
MC: 3
tadid:0x0 tadvld:0x1 pmemvld:0x0 blkvld:0x0 ddr4tadid:0x0 ddrttadid:0x0 ddr4:0x1 nmcacheablevld:0x0 mirror:0x0 secondary1st:0x0 frcnpwr:0x0 spare:0x0 addresslimit[51:26]:0x81F nonpersistentfm:0x1
Programs feature registers for MC 0
Programs feature registers for MC 1
Programs feature registers for MC 2
Programs feature registers for MC 3
^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^
Write HBM MESH2MEM CSRs for Socket: 0
^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^
HBM Stack: 0
Mesh2Mem misc: nmcaching: 1 wrcmpfromnm: 1
Mesh2Mem TAD: tadid:0x0 ddrtadid:0x0 nmcacheablevld:0x1 addresslimit[51:26]:0x21F
HBM Stack: 1
Mesh2Mem misc: nmcaching: 1 wrcmpfromnm: 1
Mesh2Mem TAD: tadid:0x0 ddrtadid:0x0 nmcacheablevld:0x1 addresslimit[51:26]:0x41F
HBM Stack: 2
Mesh2Mem misc: nmcaching: 1 wrcmpfromnm: 1
Mesh2Mem TAD: tadid:0x0 ddrtadid:0x0 nmcacheablevld:0x1 addresslimit[51:26]:0x61F
HBM Stack: 3
Mesh2Mem misc: nmcaching: 1 wrcmpfromnm: 1
Mesh2Mem TAD: tadid:0x0 ddrtadid:0x0 nmcacheablevld:0x1 addresslimit[51:26]:0x81F
Programs feature registers for MC 0
N0.C00: CSR : SYSFEATURES0_MC_2LM_REG: 0x10
N0.C01: CSR : SYSFEATURES0_MC_2LM_REG: 0x10
Programs feature registers for MC 1
N0.C00: CSR : SYSFEATURES0_MC_2LM_REG: 0x10
N0.C01: CSR : SYSFEATURES0_MC_2LM_REG: 0x10
Programs feature registers for MC 2
N0.C00: CSR : SYSFEATURES0_MC_2LM_REG: 0x10
N0.C01: CSR : SYSFEATURES0_MC_2LM_REG: 0x10
Programs feature registers for MC 3
N0.C00: CSR : SYSFEATURES0_MC_2LM_REG: 0x10
N0.C01: CSR : SYSFEATURES0_MC_2LM_REG: 0x10
Programs feature registers for MC 4
N0.C00: CSR : SYSFEATURES0_MC_2LM_REG: 0x10
N0.C01: CSR : SYSFEATURES0_MC_2LM_REG: 0x10
Programs feature registers for MC 5
N0.C00: CSR : SYSFEATURES0_MC_2LM_REG: 0x10
N0.C01: CSR : SYSFEATURES0_MC_2LM_REG: 0x10
Programs feature registers for MC 6
N0.C00: CSR : SYSFEATURES0_MC_2LM_REG: 0x10
N0.C01: CSR : SYSFEATURES0_MC_2LM_REG: 0x10
Programs feature registers for MC 7
N0.C00: CSR : SYSFEATURES0_MC_2LM_REG: 0x10
N0.C01: CSR : SYSFEATURES0_MC_2LM_REG: 0x10
Programs feature registers for MC 8
N0.C00: CSR : SYSFEATURES0_MC_2LM_REG: 0x10
N0.C01: CSR : SYSFEATURES0_MC_2LM_REG: 0x10
Programs feature registers for MC 9
N0.C00: CSR : SYSFEATURES0_MC_2LM_REG: 0x10
N0.C01: CSR : SYSFEATURES0_MC_2LM_REG: 0x10
Programs feature registers for MC 10
N0.C00: CSR : SYSFEATURES0_MC_2LM_REG: 0x10
N0.C01: CSR : SYSFEATURES0_MC_2LM_REG: 0x10
Programs feature registers for MC 11
N0.C00: CSR : SYSFEATURES0_MC_2LM_REG: 0x10
N0.C01: CSR : SYSFEATURES0_MC_2LM_REG: 0x10
Programs feature registers for MC 12
N0.C00: CSR : SYSFEATURES0_MC_2LM_REG: 0x10
N0.C01: CSR : SYSFEATURES0_MC_2LM_REG: 0x10
Programs feature registers for MC 13
N0.C00: CSR : SYSFEATURES0_MC_2LM_REG: 0x10
N0.C01: CSR : SYSFEATURES0_MC_2LM_REG: 0x10
Programs feature registers for MC 14
N0.C00: CSR : SYSFEATURES0_MC_2LM_REG: 0x10
N0.C01: CSR : SYSFEATURES0_MC_2LM_REG: 0x10
Programs feature registers for MC 15
N0.C00: CSR : SYSFEATURES0_MC_2LM_REG: 0x10
N0.C01: CSR : SYSFEATURES0_MC_2LM_REG: 0x10
Checkpoint Code: Socket 0, 0xBB, 0x07, 0x0000
^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^
Write TAD CSRs for Socket: 0
^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^
Write Patrol and Sparing CSR's for MC 0
C00: TADWAYNESS[0]:
target_lid: 0 chn_lid: 0 tad_limit: 0x1F
C00: TADBASE[0]:
mirror_en: 0 en_failover: 0 ign_ptrl_uc: 0 base: 0x0
C00: TADWAYNESS[1]:
target_lid: 0 chn_lid: 0 tad_limit: 0x21F
C00: TADBASE[1]:
mirror_en: 0 en_failover: 0 ign_ptrl_uc: 0 base: 0x40
NM_DRAM_RULE[0]:
rule_enable: 1 limit: 0x3F nm_chn_ways: 0 nm_chn_gran: 1 nm_target_ways: 0 nm_gran_eq: 0 nm_chn_l2pid: 0x00FFFFF8
Logical Ch Id: 0 1 2 3 4 5 6 7
Physical Ch Id: 0 7 7 7 7 7 7 7
C00: NM_DRAM_RULE[0]:
NM_DRAM_RULE[1]:
rule_enable: 1 limit: 0x21F nm_chn_ways: 0 nm_chn_gran: 1 nm_target_ways: 0 nm_gran_eq: 0 nm_chn_l2pid: 0x00FFFFF8
Logical Ch Id: 0 1 2 3 4 5 6 7
Physical Ch Id: 0 7 7 7 7 7 7 7
C00: NM_DRAM_RULE[1]:
Write 1LM Decoder CSR's for MC 0
C00: TADCHNILVOFFSET[0]:
target_ways: 0 chn_ways: 0 target_gran: 1 chn_gran: 1 tad_offset: 0x0 tad_offset_sign: 0
C00: TADCHNILVOFFSET[1]:
target_ways: 0 chn_ways: 0 target_gran: 1 chn_gran: 1 tad_offset: 0x20 tad_offset_sign: 0
C00: MCNMCACHINGCFG:
mcnmcachingenb: 0 mcpmemenb: 0 mcnmcachingpmemwt: 0
C01: MCNMCACHINGCFG:
mcnmcachingenb: 0 mcpmemenb: 0 mcnmcachingpmemwt: 0
Write Patrol and Sparing CSR's for MC 1
C00: TADWAYNESS[0]:
target_lid: 0 chn_lid: 0 tad_limit: 0x41F
C00: TADBASE[0]:
mirror_en: 0 en_failover: 0 ign_ptrl_uc: 0 base: 0x220
NM_DRAM_RULE[0]:
rule_enable: 1 limit: 0x41F nm_chn_ways: 0 nm_chn_gran: 1 nm_target_ways: 0 nm_gran_eq: 0 nm_chn_l2pid: 0x00FFFFF8
Logical Ch Id: 0 1 2 3 4 5 6 7
Physical Ch Id: 0 7 7 7 7 7 7 7
C00: NM_DRAM_RULE[0]:
Write 1LM Decoder CSR's for MC 1
C00: TADCHNILVOFFSET[0]:
target_ways: 0 chn_ways: 0 target_gran: 1 chn_gran: 1 tad_offset: 0x220 tad_offset_sign: 0
C00: MCNMCACHINGCFG:
mcnmcachingenb: 0 mcpmemenb: 0 mcnmcachingpmemwt: 0
C01: MCNMCACHINGCFG:
mcnmcachingenb: 0 mcpmemenb: 0 mcnmcachingpmemwt: 0
Write Patrol and Sparing CSR's for MC 2
C00: TADWAYNESS[0]:
target_lid: 0 chn_lid: 0 tad_limit: 0x61F
C00: TADBASE[0]:
mirror_en: 0 en_failover: 0 ign_ptrl_uc: 0 base: 0x420
NM_DRAM_RULE[0]:
rule_enable: 1 limit: 0x61F nm_chn_ways: 0 nm_chn_gran: 1 nm_target_ways: 0 nm_gran_eq: 0 nm_chn_l2pid: 0x00FFFFF8
Logical Ch Id: 0 1 2 3 4 5 6 7
Physical Ch Id: 0 7 7 7 7 7 7 7
C00: NM_DRAM_RULE[0]:
Write 1LM Decoder CSR's for MC 2
C00: TADCHNILVOFFSET[0]:
target_ways: 0 chn_ways: 0 target_gran: 1 chn_gran: 1 tad_offset: 0x420 tad_offset_sign: 0
C00: MCNMCACHINGCFG:
mcnmcachingenb: 0 mcpmemenb: 0 mcnmcachingpmemwt: 0
C01: MCNMCACHINGCFG:
mcnmcachingenb: 0 mcpmemenb: 0 mcnmcachingpmemwt: 0
Write Patrol and Sparing CSR's for MC 3
C00: TADWAYNESS[0]:
target_lid: 0 chn_lid: 0 tad_limit: 0x81F
C00: TADBASE[0]:
mirror_en: 0 en_failover: 0 ign_ptrl_uc: 0 base: 0x620
NM_DRAM_RULE[0]:
rule_enable: 1 limit: 0x81F nm_chn_ways: 0 nm_chn_gran: 1 nm_target_ways: 0 nm_gran_eq: 0 nm_chn_l2pid: 0x00FFFFF8
Logical Ch Id: 0 1 2 3 4 5 6 7
Physical Ch Id: 0 7 7 7 7 7 7 7
C00: NM_DRAM_RULE[0]:
Write 1LM Decoder CSR's for MC 3
C00: TADCHNILVOFFSET[0]:
target_ways: 0 chn_ways: 0 target_gran: 1 chn_gran: 1 tad_offset: 0x620 tad_offset_sign: 0
C00: MCNMCACHINGCFG:
mcnmcachingenb: 0 mcpmemenb: 0 mcnmcachingpmemwt: 0
C01: MCNMCACHINGCFG:
mcnmcachingenb: 0 mcpmemenb: 0 mcnmcachingpmemwt: 0
Write Patrol and Sparing TAD range CSR's for HBM Stack 0 MC 0
C00: TADWAYNESS[0]:
target_lid: 0 chn_lid: 0 tad_limit: 0x1F
C00: TADBASE[0]:
mirror_en: 0 en_failover: 0 ign_ptrl_uc: 0 base: 0x0
C01: TADWAYNESS[0]:
target_lid: 0 chn_lid: 1 tad_limit: 0x1F
C01: TADBASE[0]:
mirror_en: 0 en_failover: 0 ign_ptrl_uc: 0 base: 0x0
Write Patrol and Sparing TAD range CSR's for HBM Stack 0 MC 1
C00: TADWAYNESS[0]:
target_lid: 0 chn_lid: 2 tad_limit: 0x1F
C00: TADBASE[0]:
mirror_en: 0 en_failover: 0 ign_ptrl_uc: 0 base: 0x0
C01: TADWAYNESS[0]:
target_lid: 0 chn_lid: 3 tad_limit: 0x1F
C01: TADBASE[0]:
mirror_en: 0 en_failover: 0 ign_ptrl_uc: 0 base: 0x0
Write Patrol and Sparing TAD range CSR's for HBM Stack 0 MC 2
C00: TADWAYNESS[0]:
target_lid: 0 chn_lid: 4 tad_limit: 0x1F
C00: TADBASE[0]:
mirror_en: 0 en_failover: 0 ign_ptrl_uc: 0 base: 0x0
C01: TADWAYNESS[0]:
target_lid: 0 chn_lid: 5 tad_limit: 0x1F
C01: TADBASE[0]:
mirror_en: 0 en_failover: 0 ign_ptrl_uc: 0 base: 0x0
Write Patrol and Sparing TAD range CSR's for HBM Stack 0 MC 3
C00: TADWAYNESS[0]:
target_lid: 0 chn_lid: 6 tad_limit: 0x1F
C00: TADBASE[0]:
mirror_en: 0 en_failover: 0 ign_ptrl_uc: 0 base: 0x0
C01: TADWAYNESS[0]:
target_lid: 0 chn_lid: 7 tad_limit: 0x1F
C01: TADBASE[0]:
mirror_en: 0 en_failover: 0 ign_ptrl_uc: 0 base: 0x0
Write Hbm Nm Caching Tad CSR's for HBM Stack 0 MC 0
C00: MCNMCACHINGCFG 2LM TAD:
nmcachingtaden: 1 nmcachingtad: 0
C01: MCNMCACHINGCFG 2LM TAD:
nmcachingtaden: 1 nmcachingtad: 0
Write Hbm Nm Caching Tad CSR's for HBM Stack 0 MC 1
C00: MCNMCACHINGCFG 2LM TAD:
nmcachingtaden: 1 nmcachingtad: 0
C01: MCNMCACHINGCFG 2LM TAD:
nmcachingtaden: 1 nmcachingtad: 0
Write Hbm Nm Caching Tad CSR's for HBM Stack 0 MC 2
C00: MCNMCACHINGCFG 2LM TAD:
nmcachingtaden: 1 nmcachingtad: 0
C01: MCNMCACHINGCFG 2LM TAD:
nmcachingtaden: 1 nmcachingtad: 0
Write Hbm Nm Caching Tad CSR's for HBM Stack 0 MC 3
C00: MCNMCACHINGCFG 2LM TAD:
nmcachingtaden: 1 nmcachingtad: 0
C01: MCNMCACHINGCFG 2LM TAD:
nmcachingtaden: 1 nmcachingtad: 0
Write 1LM Decoder CSR's for HBM Stack 0 MC 0
C00: TADCHNILVOFFSET[0]:
target_ways: 0 chn_ways: 0 target_gran: 1 chn_gran: 1 tad_offset: 0x0 tad_offset_sign: 0
C01: TADCHNILVOFFSET[0]:
target_ways: 0 chn_ways: 0 target_gran: 1 chn_gran: 1 tad_offset: 0x0 tad_offset_sign: 0
Write 1LM Decoder CSR's for HBM Stack 0 MC 1
C00: TADCHNILVOFFSET[0]:
target_ways: 0 chn_ways: 0 target_gran: 1 chn_gran: 1 tad_offset: 0x0 tad_offset_sign: 0
C01: TADCHNILVOFFSET[0]:
target_ways: 0 chn_ways: 0 target_gran: 1 chn_gran: 1 tad_offset: 0x0 tad_offset_sign: 0
Write 1LM Decoder CSR's for HBM Stack 0 MC 2
C00: TADCHNILVOFFSET[0]:
target_ways: 0 chn_ways: 0 target_gran: 1 chn_gran: 1 tad_offset: 0x0 tad_offset_sign: 0
C01: TADCHNILVOFFSET[0]:
target_ways: 0 chn_ways: 0 target_gran: 1 chn_gran: 1 tad_offset: 0x0 tad_offset_sign: 0
Write 1LM Decoder CSR's for HBM Stack 0 MC 3
C00: TADCHNILVOFFSET[0]:
target_ways: 0 chn_ways: 0 target_gran: 1 chn_gran: 1 tad_offset: 0x0 tad_offset_sign: 0
C01: TADCHNILVOFFSET[0]:
target_ways: 0 chn_ways: 0 target_gran: 1 chn_gran: 1 tad_offset: 0x0 tad_offset_sign: 0
Write MCNMCACHINGCFG for HBM Stack 0 MC 0
C00: MCNMCACHINGCFG:
mcnmcachingenb: 1 mcpmemenb: 0 mcnmcachingpmemwt: 0
C01: MCNMCACHINGCFG:
mcnmcachingenb: 1 mcpmemenb: 0 mcnmcachingpmemwt: 0
Write MCNMCACHINGCFG for HBM Stack 0 MC 1
C00: MCNMCACHINGCFG:
mcnmcachingenb: 1 mcpmemenb: 0 mcnmcachingpmemwt: 0
C01: MCNMCACHINGCFG:
mcnmcachingenb: 1 mcpmemenb: 0 mcnmcachingpmemwt: 0
Write MCNMCACHINGCFG for HBM Stack 0 MC 2
C00: MCNMCACHINGCFG:
mcnmcachingenb: 1 mcpmemenb: 0 mcnmcachingpmemwt: 0
C01: MCNMCACHINGCFG:
mcnmcachingenb: 1 mcpmemenb: 0 mcnmcachingpmemwt: 0
Write MCNMCACHINGCFG for HBM Stack 0 MC 3
C00: MCNMCACHINGCFG:
mcnmcachingenb: 1 mcpmemenb: 0 mcnmcachingpmemwt: 0
C01: MCNMCACHINGCFG:
mcnmcachingenb: 1 mcpmemenb: 0 mcnmcachingpmemwt: 0
Write 2LM NM Decoder CSR's for HBM Stack 0 MC 0
C00: MCNMCACHINGINTLV:
nm_target_ways: 0 nm_chn_ways: 3 nm_target_lid: 0 nm_target_gran: 1 nm_chn_gran: 1 nm_chn_lid: 0
C00: MCNMCACHINGCFG_MC_2LM_REG:
en_2way: 0 prefer_way_sel: 0 chn_cap: 0xB nm_ratio_chn_cap: 0
C00: MCNMCACHINGOFFSET:
mcnmcachingoffsetlower: 0x0 mcnmcachingoffset: 0x0 mcnmcachingoffseten: 0
C01: MCNMCACHINGINTLV:
nm_target_ways: 0 nm_chn_ways: 3 nm_target_lid: 0 nm_target_gran: 1 nm_chn_gran: 1 nm_chn_lid: 1
C01: MCNMCACHINGCFG_MC_2LM_REG:
en_2way: 0 prefer_way_sel: 0 chn_cap: 0xB nm_ratio_chn_cap: 0
C01: MCNMCACHINGOFFSET:
mcnmcachingoffsetlower: 0x0 mcnmcachingoffset: 0x0 mcnmcachingoffseten: 0
Write 2LM NM Decoder CSR's for HBM Stack 0 MC 1
C00: MCNMCACHINGINTLV:
nm_target_ways: 0 nm_chn_ways: 3 nm_target_lid: 0 nm_target_gran: 1 nm_chn_gran: 1 nm_chn_lid: 2
C00: MCNMCACHINGCFG_MC_2LM_REG:
en_2way: 0 prefer_way_sel: 0 chn_cap: 0xB nm_ratio_chn_cap: 0
C00: MCNMCACHINGOFFSET:
mcnmcachingoffsetlower: 0x0 mcnmcachingoffset: 0x0 mcnmcachingoffseten: 0
C01: MCNMCACHINGINTLV:
nm_target_ways: 0 nm_chn_ways: 3 nm_target_lid: 0 nm_target_gran: 1 nm_chn_gran: 1 nm_chn_lid: 3
C01: MCNMCACHINGCFG_MC_2LM_REG:
en_2way: 0 prefer_way_sel: 0 chn_cap: 0xB nm_ratio_chn_cap: 0
C01: MCNMCACHINGOFFSET:
mcnmcachingoffsetlower: 0x0 mcnmcachingoffset: 0x0 mcnmcachingoffseten: 0
Write 2LM NM Decoder CSR's for HBM Stack 0 MC 2
C00: MCNMCACHINGINTLV:
nm_target_ways: 0 nm_chn_ways: 3 nm_target_lid: 0 nm_target_gran: 1 nm_chn_gran: 1 nm_chn_lid: 4
C00: MCNMCACHINGCFG_MC_2LM_REG:
en_2way: 0 prefer_way_sel: 0 chn_cap: 0xB nm_ratio_chn_cap: 0
C00: MCNMCACHINGOFFSET:
mcnmcachingoffsetlower: 0x0 mcnmcachingoffset: 0x0 mcnmcachingoffseten: 0
C01: MCNMCACHINGINTLV:
nm_target_ways: 0 nm_chn_ways: 3 nm_target_lid: 0 nm_target_gran: 1 nm_chn_gran: 1 nm_chn_lid: 5
C01: MCNMCACHINGCFG_MC_2LM_REG:
en_2way: 0 prefer_way_sel: 0 chn_cap: 0xB nm_ratio_chn_cap: 0
C01: MCNMCACHINGOFFSET:
mcnmcachingoffsetlower: 0x0 mcnmcachingoffset: 0x0 mcnmcachingoffseten: 0
Write 2LM NM Decoder CSR's for HBM Stack 0 MC 3
C00: MCNMCACHINGINTLV:
nm_target_ways: 0 nm_chn_ways: 3 nm_target_lid: 0 nm_target_gran: 1 nm_chn_gran: 1 nm_chn_lid: 6
C00: MCNMCACHINGCFG_MC_2LM_REG:
en_2way: 0 prefer_way_sel: 0 chn_cap: 0xB nm_ratio_chn_cap: 0
C00: MCNMCACHINGOFFSET:
mcnmcachingoffsetlower: 0x0 mcnmcachingoffset: 0x0 mcnmcachingoffseten: 0
C01: MCNMCACHINGINTLV:
nm_target_ways: 0 nm_chn_ways: 3 nm_target_lid: 0 nm_target_gran: 1 nm_chn_gran: 1 nm_chn_lid: 7
C01: MCNMCACHINGCFG_MC_2LM_REG:
en_2way: 0 prefer_way_sel: 0 chn_cap: 0xB nm_ratio_chn_cap: 0
C01: MCNMCACHINGOFFSET:
mcnmcachingoffsetlower: 0x0 mcnmcachingoffset: 0x0 mcnmcachingoffseten: 0
Write 2LM FM Decoder CSR's for HBM Stack 0 MC 0 TAD 0
C00: DRAM_RULE[0]:
rule_enable: 1 limit: 0x3F fm_target: 0 fm_chn_ways: 0 fm_chn_gran: 1 fm_target_ways: 0 fm_gran_eq: 0 fm_chn_l2pid: 0x00000000
C01: DRAM_RULE[0]:
rule_enable: 1 limit: 0x3F fm_target: 0 fm_chn_ways: 0 fm_chn_gran: 1 fm_target_ways: 0 fm_gran_eq: 0 fm_chn_l2pid: 0x00000000
Write 2LM FM Decoder CSR's for HBM Stack 0 MC 1 TAD 0
C00: DRAM_RULE[0]:
rule_enable: 1 limit: 0x3F fm_target: 0 fm_chn_ways: 0 fm_chn_gran: 1 fm_target_ways: 0 fm_gran_eq: 0 fm_chn_l2pid: 0x00000000
C01: DRAM_RULE[0]:
rule_enable: 1 limit: 0x3F fm_target: 0 fm_chn_ways: 0 fm_chn_gran: 1 fm_target_ways: 0 fm_gran_eq: 0 fm_chn_l2pid: 0x00000000
Write 2LM FM Decoder CSR's for HBM Stack 0 MC 2 TAD 0
C00: DRAM_RULE[0]:
rule_enable: 1 limit: 0x3F fm_target: 0 fm_chn_ways: 0 fm_chn_gran: 1 fm_target_ways: 0 fm_gran_eq: 0 fm_chn_l2pid: 0x00000000
C01: DRAM_RULE[0]:
rule_enable: 1 limit: 0x3F fm_target: 0 fm_chn_ways: 0 fm_chn_gran: 1 fm_target_ways: 0 fm_gran_eq: 0 fm_chn_l2pid: 0x00000000
Write 2LM FM Decoder CSR's for HBM Stack 0 MC 3 TAD 0
C00: DRAM_RULE[0]:
rule_enable: 1 limit: 0x3F fm_target: 0 fm_chn_ways: 0 fm_chn_gran: 1 fm_target_ways: 0 fm_gran_eq: 0 fm_chn_l2pid: 0x00000000
C01: DRAM_RULE[0]:
rule_enable: 1 limit: 0x3F fm_target: 0 fm_chn_ways: 0 fm_chn_gran: 1 fm_target_ways: 0 fm_gran_eq: 0 fm_chn_l2pid: 0x00000000
Write 2LM FM Decoder CSR's for HBM Stack 0 MC 0 TAD 1
C00: DRAM_RULE[1]:
rule_enable: 1 limit: 0x21F fm_target: 0 fm_chn_ways: 0 fm_chn_gran: 1 fm_target_ways: 0 fm_gran_eq: 0 fm_chn_l2pid: 0x00000000
C01: DRAM_RULE[1]:
rule_enable: 1 limit: 0x21F fm_target: 0 fm_chn_ways: 0 fm_chn_gran: 1 fm_target_ways: 0 fm_gran_eq: 0 fm_chn_l2pid: 0x00000000
Write 2LM FM Decoder CSR's for HBM Stack 0 MC 1 TAD 1
C00: DRAM_RULE[1]:
rule_enable: 1 limit: 0x21F fm_target: 0 fm_chn_ways: 0 fm_chn_gran: 1 fm_target_ways: 0 fm_gran_eq: 0 fm_chn_l2pid: 0x00000000
C01: DRAM_RULE[1]:
rule_enable: 1 limit: 0x21F fm_target: 0 fm_chn_ways: 0 fm_chn_gran: 1 fm_target_ways: 0 fm_gran_eq: 0 fm_chn_l2pid: 0x00000000
Write 2LM FM Decoder CSR's for HBM Stack 0 MC 2 TAD 1
C00: DRAM_RULE[1]:
rule_enable: 1 limit: 0x21F fm_target: 0 fm_chn_ways: 0 fm_chn_gran: 1 fm_target_ways: 0 fm_gran_eq: 0 fm_chn_l2pid: 0x00000000
C01: DRAM_RULE[1]:
rule_enable: 1 limit: 0x21F fm_target: 0 fm_chn_ways: 0 fm_chn_gran: 1 fm_target_ways: 0 fm_gran_eq: 0 fm_chn_l2pid: 0x00000000
Write 2LM FM Decoder CSR's for HBM Stack 0 MC 3 TAD 1
C00: DRAM_RULE[1]:
rule_enable: 1 limit: 0x21F fm_target: 0 fm_chn_ways: 0 fm_chn_gran: 1 fm_target_ways: 0 fm_gran_eq: 0 fm_chn_l2pid: 0x00000000
C01: DRAM_RULE[1]:
rule_enable: 1 limit: 0x21F fm_target: 0 fm_chn_ways: 0 fm_chn_gran: 1 fm_target_ways: 0 fm_gran_eq: 0 fm_chn_l2pid: 0x00000000
Write Patrol and Sparing TAD range CSR's for HBM Stack 1 MC 0
C00: TADWAYNESS[0]:
target_lid: 0 chn_lid: 0 tad_limit: 0x1F
C00: TADBASE[0]:
mirror_en: 0 en_failover: 0 ign_ptrl_uc: 0 base: 0x0
C01: TADWAYNESS[0]:
target_lid: 0 chn_lid: 1 tad_limit: 0x1F
C01: TADBASE[0]:
mirror_en: 0 en_failover: 0 ign_ptrl_uc: 0 base: 0x0
Write Patrol and Sparing TAD range CSR's for HBM Stack 1 MC 1
C00: TADWAYNESS[0]:
target_lid: 0 chn_lid: 2 tad_limit: 0x1F
C00: TADBASE[0]:
mirror_en: 0 en_failover: 0 ign_ptrl_uc: 0 base: 0x0
C01: TADWAYNESS[0]:
target_lid: 0 chn_lid: 3 tad_limit: 0x1F
C01: TADBASE[0]:
mirror_en: 0 en_failover: 0 ign_ptrl_uc: 0 base: 0x0
Write Patrol and Sparing TAD range CSR's for HBM Stack 1 MC 2
C00: TADWAYNESS[0]:
target_lid: 0 chn_lid: 4 tad_limit: 0x1F
C00: TADBASE[0]:
mirror_en: 0 en_failover: 0 ign_ptrl_uc: 0 base: 0x0
C01: TADWAYNESS[0]:
target_lid: 0 chn_lid: 5 tad_limit: 0x1F
C01: TADBASE[0]:
mirror_en: 0 en_failover: 0 ign_ptrl_uc: 0 base: 0x0
Write Patrol and Sparing TAD range CSR's for HBM Stack 1 MC 3
C00: TADWAYNESS[0]:
target_lid: 0 chn_lid: 6 tad_limit: 0x1F
C00: TADBASE[0]:
mirror_en: 0 en_failover: 0 ign_ptrl_uc: 0 base: 0x0
C01: TADWAYNESS[0]:
target_lid: 0 chn_lid: 7 tad_limit: 0x1F
C01: TADBASE[0]:
mirror_en: 0 en_failover: 0 ign_ptrl_uc: 0 base: 0x0
Write Hbm Nm Caching Tad CSR's for HBM Stack 1 MC 0
C00: MCNMCACHINGCFG 2LM TAD:
nmcachingtaden: 1 nmcachingtad: 0
C01: MCNMCACHINGCFG 2LM TAD:
nmcachingtaden: 1 nmcachingtad: 0
Write Hbm Nm Caching Tad CSR's for HBM Stack 1 MC 1
C00: MCNMCACHINGCFG 2LM TAD:
nmcachingtaden: 1 nmcachingtad: 0
C01: MCNMCACHINGCFG 2LM TAD:
nmcachingtaden: 1 nmcachingtad: 0
Write Hbm Nm Caching Tad CSR's for HBM Stack 1 MC 2
C00: MCNMCACHINGCFG 2LM TAD:
nmcachingtaden: 1 nmcachingtad: 0
C01: MCNMCACHINGCFG 2LM TAD:
nmcachingtaden: 1 nmcachingtad: 0
Write Hbm Nm Caching Tad CSR's for HBM Stack 1 MC 3
C00: MCNMCACHINGCFG 2LM TAD:
nmcachingtaden: 1 nmcachingtad: 0
C01: MCNMCACHINGCFG 2LM TAD:
nmcachingtaden: 1 nmcachingtad: 0
Write 1LM Decoder CSR's for HBM Stack 1 MC 0
C00: TADCHNILVOFFSET[0]:
target_ways: 0 chn_ways: 0 target_gran: 1 chn_gran: 1 tad_offset: 0x0 tad_offset_sign: 0
C01: TADCHNILVOFFSET[0]:
target_ways: 0 chn_ways: 0 target_gran: 1 chn_gran: 1 tad_offset: 0x0 tad_offset_sign: 0
Write 1LM Decoder CSR's for HBM Stack 1 MC 1
C00: TADCHNILVOFFSET[0]:
target_ways: 0 chn_ways: 0 target_gran: 1 chn_gran: 1 tad_offset: 0x0 tad_offset_sign: 0
C01: TADCHNILVOFFSET[0]:
target_ways: 0 chn_ways: 0 target_gran: 1 chn_gran: 1 tad_offset: 0x0 tad_offset_sign: 0
Write 1LM Decoder CSR's for HBM Stack 1 MC 2
C00: TADCHNILVOFFSET[0]:
target_ways: 0 chn_ways: 0 target_gran: 1 chn_gran: 1 tad_offset: 0x0 tad_offset_sign: 0
C01: TADCHNILVOFFSET[0]:
target_ways: 0 chn_ways: 0 target_gran: 1 chn_gran: 1 tad_offset: 0x0 tad_offset_sign: 0
Write 1LM Decoder CSR's for HBM Stack 1 MC 3
C00: TADCHNILVOFFSET[0]:
target_ways: 0 chn_ways: 0 target_gran: 1 chn_gran: 1 tad_offset: 0x0 tad_offset_sign: 0
C01: TADCHNILVOFFSET[0]:
target_ways: 0 chn_ways: 0 target_gran: 1 chn_gran: 1 tad_offset: 0x0 tad_offset_sign: 0
Write MCNMCACHINGCFG for HBM Stack 1 MC 0
C00: MCNMCACHINGCFG:
mcnmcachingenb: 1 mcpmemenb: 0 mcnmcachingpmemwt: 0
C01: MCNMCACHINGCFG:
mcnmcachingenb: 1 mcpmemenb: 0 mcnmcachingpmemwt: 0
Write MCNMCACHINGCFG for HBM Stack 1 MC 1
C00: MCNMCACHINGCFG:
mcnmcachingenb: 1 mcpmemenb: 0 mcnmcachingpmemwt: 0
C01: MCNMCACHINGCFG:
mcnmcachingenb: 1 mcpmemenb: 0 mcnmcachingpmemwt: 0
Write MCNMCACHINGCFG for HBM Stack 1 MC 2
C00: MCNMCACHINGCFG:
mcnmcachingenb: 1 mcpmemenb: 0 mcnmcachingpmemwt: 0
C01: MCNMCACHINGCFG:
mcnmcachingenb: 1 mcpmemenb: 0 mcnmcachingpmemwt: 0
Write MCNMCACHINGCFG for HBM Stack 1 MC 3
C00: MCNMCACHINGCFG:
mcnmcachingenb: 1 mcpmemenb: 0 mcnmcachingpmemwt: 0
C01: MCNMCACHINGCFG:
mcnmcachingenb: 1 mcpmemenb: 0 mcnmcachingpmemwt: 0
Write 2LM NM Decoder CSR's for HBM Stack 1 MC 0
C00: CSR for force_lat bit : AMAP_MC_MAIN_REG: 0x52
C00: MCNMCACHINGINTLV:
nm_target_ways: 0 nm_chn_ways: 3 nm_target_lid: 0 nm_target_gran: 1 nm_chn_gran: 1 nm_chn_lid: 0
C00: MCNMCACHINGCFG_MC_2LM_REG:
en_2way: 0 prefer_way_sel: 0 chn_cap: 0xB nm_ratio_chn_cap: 0
C00: MCNMCACHINGOFFSET:
mcnmcachingoffsetlower: 0x2 mcnmcachingoffset: 0x1 mcnmcachingoffseten: 1
C01: CSR for force_lat bit : AMAP_MC_MAIN_REG: 0x52
C01: MCNMCACHINGINTLV:
nm_target_ways: 0 nm_chn_ways: 3 nm_target_lid: 0 nm_target_gran: 1 nm_chn_gran: 1 nm_chn_lid: 1
C01: MCNMCACHINGCFG_MC_2LM_REG:
en_2way: 0 prefer_way_sel: 0 chn_cap: 0xB nm_ratio_chn_cap: 0
C01: MCNMCACHINGOFFSET:
mcnmcachingoffsetlower: 0x2 mcnmcachingoffset: 0x1 mcnmcachingoffseten: 1
Write 2LM NM Decoder CSR's for HBM Stack 1 MC 1
C00: CSR for force_lat bit : AMAP_MC_MAIN_REG: 0x52
C00: MCNMCACHINGINTLV:
nm_target_ways: 0 nm_chn_ways: 3 nm_target_lid: 0 nm_target_gran: 1 nm_chn_gran: 1 nm_chn_lid: 2
C00: MCNMCACHINGCFG_MC_2LM_REG:
en_2way: 0 prefer_way_sel: 0 chn_cap: 0xB nm_ratio_chn_cap: 0
C00: MCNMCACHINGOFFSET:
mcnmcachingoffsetlower: 0x2 mcnmcachingoffset: 0x1 mcnmcachingoffseten: 1
C01: CSR for force_lat bit : AMAP_MC_MAIN_REG: 0x52
C01: MCNMCACHINGINTLV:
nm_target_ways: 0 nm_chn_ways: 3 nm_target_lid: 0 nm_target_gran: 1 nm_chn_gran: 1 nm_chn_lid: 3
C01: MCNMCACHINGCFG_MC_2LM_REG:
en_2way: 0 prefer_way_sel: 0 chn_cap: 0xB nm_ratio_chn_cap: 0
C01: MCNMCACHINGOFFSET:
mcnmcachingoffsetlower: 0x2 mcnmcachingoffset: 0x1 mcnmcachingoffseten: 1
Write 2LM NM Decoder CSR's for HBM Stack 1 MC 2
C00: CSR for force_lat bit : AMAP_MC_MAIN_REG: 0x52
C00: MCNMCACHINGINTLV:
nm_target_ways: 0 nm_chn_ways: 3 nm_target_lid: 0 nm_target_gran: 1 nm_chn_gran: 1 nm_chn_lid: 4
C00: MCNMCACHINGCFG_MC_2LM_REG:
en_2way: 0 prefer_way_sel: 0 chn_cap: 0xB nm_ratio_chn_cap: 0
C00: MCNMCACHINGOFFSET:
mcnmcachingoffsetlower: 0x2 mcnmcachingoffset: 0x1 mcnmcachingoffseten: 1
C01: CSR for force_lat bit : AMAP_MC_MAIN_REG: 0x52
C01: MCNMCACHINGINTLV:
nm_target_ways: 0 nm_chn_ways: 3 nm_target_lid: 0 nm_target_gran: 1 nm_chn_gran: 1 nm_chn_lid: 5
C01: MCNMCACHINGCFG_MC_2LM_REG:
en_2way: 0 prefer_way_sel: 0 chn_cap: 0xB nm_ratio_chn_cap: 0
C01: MCNMCACHINGOFFSET:
mcnmcachingoffsetlower: 0x2 mcnmcachingoffset: 0x1 mcnmcachingoffseten: 1
Write 2LM NM Decoder CSR's for HBM Stack 1 MC 3
C00: CSR for force_lat bit : AMAP_MC_MAIN_REG: 0x52
C00: MCNMCACHINGINTLV:
nm_target_ways: 0 nm_chn_ways: 3 nm_target_lid: 0 nm_target_gran: 1 nm_chn_gran: 1 nm_chn_lid: 6
C00: MCNMCACHINGCFG_MC_2LM_REG:
en_2way: 0 prefer_way_sel: 0 chn_cap: 0xB nm_ratio_chn_cap: 0
C00: MCNMCACHINGOFFSET:
mcnmcachingoffsetlower: 0x2 mcnmcachingoffset: 0x1 mcnmcachingoffseten: 1
C01: CSR for force_lat bit : AMAP_MC_MAIN_REG: 0x52
C01: MCNMCACHINGINTLV:
nm_target_ways: 0 nm_chn_ways: 3 nm_target_lid: 0 nm_target_gran: 1 nm_chn_gran: 1 nm_chn_lid: 7
C01: MCNMCACHINGCFG_MC_2LM_REG:
en_2way: 0 prefer_way_sel: 0 chn_cap: 0xB nm_ratio_chn_cap: 0
C01: MCNMCACHINGOFFSET:
mcnmcachingoffsetlower: 0x2 mcnmcachingoffset: 0x1 mcnmcachingoffseten: 1
Write 2LM FM Decoder CSR's for HBM Stack 1 MC 0 TAD 0
C00: DRAM_RULE[0]:
rule_enable: 1 limit: 0x41F fm_target: 0 fm_chn_ways: 0 fm_chn_gran: 1 fm_target_ways: 0 fm_gran_eq: 0 fm_chn_l2pid: 0x00000000
C01: DRAM_RULE[0]:
rule_enable: 1 limit: 0x41F fm_target: 0 fm_chn_ways: 0 fm_chn_gran: 1 fm_target_ways: 0 fm_gran_eq: 0 fm_chn_l2pid: 0x00000000
Write 2LM FM Decoder CSR's for HBM Stack 1 MC 1 TAD 0
C00: DRAM_RULE[0]:
rule_enable: 1 limit: 0x41F fm_target: 0 fm_chn_ways: 0 fm_chn_gran: 1 fm_target_ways: 0 fm_gran_eq: 0 fm_chn_l2pid: 0x00000000
C01: DRAM_RULE[0]:
rule_enable: 1 limit: 0x41F fm_target: 0 fm_chn_ways: 0 fm_chn_gran: 1 fm_target_ways: 0 fm_gran_eq: 0 fm_chn_l2pid: 0x00000000
Write 2LM FM Decoder CSR's for HBM Stack 1 MC 2 TAD 0
C00: DRAM_RULE[0]:
rule_enable: 1 limit: 0x41F fm_target: 0 fm_chn_ways: 0 fm_chn_gran: 1 fm_target_ways: 0 fm_gran_eq: 0 fm_chn_l2pid: 0x00000000
C01: DRAM_RULE[0]:
rule_enable: 1 limit: 0x41F fm_target: 0 fm_chn_ways: 0 fm_chn_gran: 1 fm_target_ways: 0 fm_gran_eq: 0 fm_chn_l2pid: 0x00000000
Write 2LM FM Decoder CSR's for HBM Stack 1 MC 3 TAD 0
C00: DRAM_RULE[0]:
rule_enable: 1 limit: 0x41F fm_target: 0 fm_chn_ways: 0 fm_chn_gran: 1 fm_target_ways: 0 fm_gran_eq: 0 fm_chn_l2pid: 0x00000000
C01: DRAM_RULE[0]:
rule_enable: 1 limit: 0x41F fm_target: 0 fm_chn_ways: 0 fm_chn_gran: 1 fm_target_ways: 0 fm_gran_eq: 0 fm_chn_l2pid: 0x00000000
Write Patrol and Sparing TAD range CSR's for HBM Stack 2 MC 0
C00: TADWAYNESS[0]:
target_lid: 0 chn_lid: 0 tad_limit: 0x1F
C00: TADBASE[0]:
mirror_en: 0 en_failover: 0 ign_ptrl_uc: 0 base: 0x0
C01: TADWAYNESS[0]:
target_lid: 0 chn_lid: 1 tad_limit: 0x1F
C01: TADBASE[0]:
mirror_en: 0 en_failover: 0 ign_ptrl_uc: 0 base: 0x0
Write Patrol and Sparing TAD range CSR's for HBM Stack 2 MC 1
C00: TADWAYNESS[0]:
target_lid: 0 chn_lid: 2 tad_limit: 0x1F
C00: TADBASE[0]:
mirror_en: 0 en_failover: 0 ign_ptrl_uc: 0 base: 0x0
C01: TADWAYNESS[0]:
target_lid: 0 chn_lid: 3 tad_limit: 0x1F
C01: TADBASE[0]:
mirror_en: 0 en_failover: 0 ign_ptrl_uc: 0 base: 0x0
Write Patrol and Sparing TAD range CSR's for HBM Stack 2 MC 2
C00: TADWAYNESS[0]:
target_lid: 0 chn_lid: 4 tad_limit: 0x1F
C00: TADBASE[0]:
mirror_en: 0 en_failover: 0 ign_ptrl_uc: 0 base: 0x0
C01: TADWAYNESS[0]:
target_lid: 0 chn_lid: 5 tad_limit: 0x1F
C01: TADBASE[0]:
mirror_en: 0 en_failover: 0 ign_ptrl_uc: 0 base: 0x0
Write Patrol and Sparing TAD range CSR's for HBM Stack 2 MC 3
C00: TADWAYNESS[0]:
target_lid: 0 chn_lid: 6 tad_limit: 0x1F
C00: TADBASE[0]:
mirror_en: 0 en_failover: 0 ign_ptrl_uc: 0 base: 0x0
C01: TADWAYNESS[0]:
target_lid: 0 chn_lid: 7 tad_limit: 0x1F
C01: TADBASE[0]:
mirror_en: 0 en_failover: 0 ign_ptrl_uc: 0 base: 0x0
Write Hbm Nm Caching Tad CSR's for HBM Stack 2 MC 0
C00: MCNMCACHINGCFG 2LM TAD:
nmcachingtaden: 1 nmcachingtad: 0
C01: MCNMCACHINGCFG 2LM TAD:
nmcachingtaden: 1 nmcachingtad: 0
Write Hbm Nm Caching Tad CSR's for HBM Stack 2 MC 1
C00: MCNMCACHINGCFG 2LM TAD:
nmcachingtaden: 1 nmcachingtad: 0
C01: MCNMCACHINGCFG 2LM TAD:
nmcachingtaden: 1 nmcachingtad: 0
Write Hbm Nm Caching Tad CSR's for HBM Stack 2 MC 2
C00: MCNMCACHINGCFG 2LM TAD:
nmcachingtaden: 1 nmcachingtad: 0
C01: MCNMCACHINGCFG 2LM TAD:
nmcachingtaden: 1 nmcachingtad: 0
Write Hbm Nm Caching Tad CSR's for HBM Stack 2 MC 3
C00: MCNMCACHINGCFG 2LM TAD:
nmcachingtaden: 1 nmcachingtad: 0
C01: MCNMCACHINGCFG 2LM TAD:
nmcachingtaden: 1 nmcachingtad: 0
Write 1LM Decoder CSR's for HBM Stack 2 MC 0
C00: TADCHNILVOFFSET[0]:
target_ways: 0 chn_ways: 0 target_gran: 1 chn_gran: 1 tad_offset: 0x0 tad_offset_sign: 0
C01: TADCHNILVOFFSET[0]:
target_ways: 0 chn_ways: 0 target_gran: 1 chn_gran: 1 tad_offset: 0x0 tad_offset_sign: 0
Write 1LM Decoder CSR's for HBM Stack 2 MC 1
C00: TADCHNILVOFFSET[0]:
target_ways: 0 chn_ways: 0 target_gran: 1 chn_gran: 1 tad_offset: 0x0 tad_offset_sign: 0
C01: TADCHNILVOFFSET[0]:
target_ways: 0 chn_ways: 0 target_gran: 1 chn_gran: 1 tad_offset: 0x0 tad_offset_sign: 0
Write 1LM Decoder CSR's for HBM Stack 2 MC 2
C00: TADCHNILVOFFSET[0]:
target_ways: 0 chn_ways: 0 target_gran: 1 chn_gran: 1 tad_offset: 0x0 tad_offset_sign: 0
C01: TADCHNILVOFFSET[0]:
target_ways: 0 chn_ways: 0 target_gran: 1 chn_gran: 1 tad_offset: 0x0 tad_offset_sign: 0
Write 1LM Decoder CSR's for HBM Stack 2 MC 3
C00: TADCHNILVOFFSET[0]:
target_ways: 0 chn_ways: 0 target_gran: 1 chn_gran: 1 tad_offset: 0x0 tad_offset_sign: 0
C01: TADCHNILVOFFSET[0]:
target_ways: 0 chn_ways: 0 target_gran: 1 chn_gran: 1 tad_offset: 0x0 tad_offset_sign: 0
Write MCNMCACHINGCFG for HBM Stack 2 MC 0
C00: MCNMCACHINGCFG:
mcnmcachingenb: 1 mcpmemenb: 0 mcnmcachingpmemwt: 0
C01: MCNMCACHINGCFG:
mcnmcachingenb: 1 mcpmemenb: 0 mcnmcachingpmemwt: 0
Write MCNMCACHINGCFG for HBM Stack 2 MC 1
C00: MCNMCACHINGCFG:
mcnmcachingenb: 1 mcpmemenb: 0 mcnmcachingpmemwt: 0
C01: MCNMCACHINGCFG:
mcnmcachingenb: 1 mcpmemenb: 0 mcnmcachingpmemwt: 0
Write MCNMCACHINGCFG for HBM Stack 2 MC 2
C00: MCNMCACHINGCFG:
mcnmcachingenb: 1 mcpmemenb: 0 mcnmcachingpmemwt: 0
C01: MCNMCACHINGCFG:
mcnmcachingenb: 1 mcpmemenb: 0 mcnmcachingpmemwt: 0
Write MCNMCACHINGCFG for HBM Stack 2 MC 3
C00: MCNMCACHINGCFG:
mcnmcachingenb: 1 mcpmemenb: 0 mcnmcachingpmemwt: 0
C01: MCNMCACHINGCFG:
mcnmcachingenb: 1 mcpmemenb: 0 mcnmcachingpmemwt: 0
Write 2LM NM Decoder CSR's for HBM Stack 2 MC 0
C00: CSR for force_lat bit : AMAP_MC_MAIN_REG: 0x52
C00: MCNMCACHINGINTLV:
nm_target_ways: 0 nm_chn_ways: 3 nm_target_lid: 0 nm_target_gran: 1 nm_chn_gran: 1 nm_chn_lid: 0
C00: MCNMCACHINGCFG_MC_2LM_REG:
en_2way: 0 prefer_way_sel: 0 chn_cap: 0xB nm_ratio_chn_cap: 0
C00: MCNMCACHINGOFFSET:
mcnmcachingoffsetlower: 0x2 mcnmcachingoffset: 0x2 mcnmcachingoffseten: 1
C01: CSR for force_lat bit : AMAP_MC_MAIN_REG: 0x52
C01: MCNMCACHINGINTLV:
nm_target_ways: 0 nm_chn_ways: 3 nm_target_lid: 0 nm_target_gran: 1 nm_chn_gran: 1 nm_chn_lid: 1
C01: MCNMCACHINGCFG_MC_2LM_REG:
en_2way: 0 prefer_way_sel: 0 chn_cap: 0xB nm_ratio_chn_cap: 0
C01: MCNMCACHINGOFFSET:
mcnmcachingoffsetlower: 0x2 mcnmcachingoffset: 0x2 mcnmcachingoffseten: 1
Write 2LM NM Decoder CSR's for HBM Stack 2 MC 1
C00: CSR for force_lat bit : AMAP_MC_MAIN_REG: 0x52
C00: MCNMCACHINGINTLV:
nm_target_ways: 0 nm_chn_ways: 3 nm_target_lid: 0 nm_target_gran: 1 nm_chn_gran: 1 nm_chn_lid: 2
C00: MCNMCACHINGCFG_MC_2LM_REG:
en_2way: 0 prefer_way_sel: 0 chn_cap: 0xB nm_ratio_chn_cap: 0
C00: MCNMCACHINGOFFSET:
mcnmcachingoffsetlower: 0x2 mcnmcachingoffset: 0x2 mcnmcachingoffseten: 1
C01: CSR for force_lat bit : AMAP_MC_MAIN_REG: 0x52
C01: MCNMCACHINGINTLV:
nm_target_ways: 0 nm_chn_ways: 3 nm_target_lid: 0 nm_target_gran: 1 nm_chn_gran: 1 nm_chn_lid: 3
C01: MCNMCACHINGCFG_MC_2LM_REG:
en_2way: 0 prefer_way_sel: 0 chn_cap: 0xB nm_ratio_chn_cap: 0
C01: MCNMCACHINGOFFSET:
mcnmcachingoffsetlower: 0x2 mcnmcachingoffset: 0x2 mcnmcachingoffseten: 1
Write 2LM NM Decoder CSR's for HBM Stack 2 MC 2
C00: CSR for force_lat bit : AMAP_MC_MAIN_REG: 0x52
C00: MCNMCACHINGINTLV:
nm_target_ways: 0 nm_chn_ways: 3 nm_target_lid: 0 nm_target_gran: 1 nm_chn_gran: 1 nm_chn_lid: 4
C00: MCNMCACHINGCFG_MC_2LM_REG:
en_2way: 0 prefer_way_sel: 0 chn_cap: 0xB nm_ratio_chn_cap: 0
C00: MCNMCACHINGOFFSET:
mcnmcachingoffsetlower: 0x2 mcnmcachingoffset: 0x2 mcnmcachingoffseten: 1
C01: CSR for force_lat bit : AMAP_MC_MAIN_REG: 0x52
C01: MCNMCACHINGINTLV:
nm_target_ways: 0 nm_chn_ways: 3 nm_target_lid: 0 nm_target_gran: 1 nm_chn_gran: 1 nm_chn_lid: 5
C01: MCNMCACHINGCFG_MC_2LM_REG:
en_2way: 0 prefer_way_sel: 0 chn_cap: 0xB nm_ratio_chn_cap: 0
C01: MCNMCACHINGOFFSET:
mcnmcachingoffsetlower: 0x2 mcnmcachingoffset: 0x2 mcnmcachingoffseten: 1
Write 2LM NM Decoder CSR's for HBM Stack 2 MC 3
C00: CSR for force_lat bit : AMAP_MC_MAIN_REG: 0x52
C00: MCNMCACHINGINTLV:
nm_target_ways: 0 nm_chn_ways: 3 nm_target_lid: 0 nm_target_gran: 1 nm_chn_gran: 1 nm_chn_lid: 6
C00: MCNMCACHINGCFG_MC_2LM_REG:
en_2way: 0 prefer_way_sel: 0 chn_cap: 0xB nm_ratio_chn_cap: 0
C00: MCNMCACHINGOFFSET:
mcnmcachingoffsetlower: 0x2 mcnmcachingoffset: 0x2 mcnmcachingoffseten: 1
C01: CSR for force_lat bit : AMAP_MC_MAIN_REG: 0x52
C01: MCNMCACHINGINTLV:
nm_target_ways: 0 nm_chn_ways: 3 nm_target_lid: 0 nm_target_gran: 1 nm_chn_gran: 1 nm_chn_lid: 7
C01: MCNMCACHINGCFG_MC_2LM_REG:
en_2way: 0 prefer_way_sel: 0 chn_cap: 0xB nm_ratio_chn_cap: 0
C01: MCNMCACHINGOFFSET:
mcnmcachingoffsetlower: 0x2 mcnmcachingoffset: 0x2 mcnmcachingoffseten: 1
Write 2LM FM Decoder CSR's for HBM Stack 2 MC 0 TAD 0
C00: DRAM_RULE[0]:
rule_enable: 1 limit: 0x61F fm_target: 0 fm_chn_ways: 0 fm_chn_gran: 1 fm_target_ways: 0 fm_gran_eq: 0 fm_chn_l2pid: 0x00000000
C01: DRAM_RULE[0]:
rule_enable: 1 limit: 0x61F fm_target: 0 fm_chn_ways: 0 fm_chn_gran: 1 fm_target_ways: 0 fm_gran_eq: 0 fm_chn_l2pid: 0x00000000
Write 2LM FM Decoder CSR's for HBM Stack 2 MC 1 TAD 0
C00: DRAM_RULE[0]:
rule_enable: 1 limit: 0x61F fm_target: 0 fm_chn_ways: 0 fm_chn_gran: 1 fm_target_ways: 0 fm_gran_eq: 0 fm_chn_l2pid: 0x00000000
C01: DRAM_RULE[0]:
rule_enable: 1 limit: 0x61F fm_target: 0 fm_chn_ways: 0 fm_chn_gran: 1 fm_target_ways: 0 fm_gran_eq: 0 fm_chn_l2pid: 0x00000000
Write 2LM FM Decoder CSR's for HBM Stack 2 MC 2 TAD 0
C00: DRAM_RULE[0]:
rule_enable: 1 limit: 0x61F fm_target: 0 fm_chn_ways: 0 fm_chn_gran: 1 fm_target_ways: 0 fm_gran_eq: 0 fm_chn_l2pid: 0x00000000
C01: DRAM_RULE[0]:
rule_enable: 1 limit: 0x61F fm_target: 0 fm_chn_ways: 0 fm_chn_gran: 1 fm_target_ways: 0 fm_gran_eq: 0 fm_chn_l2pid: 0x00000000
Write 2LM FM Decoder CSR's for HBM Stack 2 MC 3 TAD 0
C00: DRAM_RULE[0]:
rule_enable: 1 limit: 0x61F fm_target: 0 fm_chn_ways: 0 fm_chn_gran: 1 fm_target_ways: 0 fm_gran_eq: 0 fm_chn_l2pid: 0x00000000
C01: DRAM_RULE[0]:
rule_enable: 1 limit: 0x61F fm_target: 0 fm_chn_ways: 0 fm_chn_gran: 1 fm_target_ways: 0 fm_gran_eq: 0 fm_chn_l2pid: 0x00000000
Write Patrol and Sparing TAD range CSR's for HBM Stack 3 MC 0
C00: TADWAYNESS[0]:
target_lid: 0 chn_lid: 0 tad_limit: 0x1F
C00: TADBASE[0]:
mirror_en: 0 en_failover: 0 ign_ptrl_uc: 0 base: 0x0
C01: TADWAYNESS[0]:
target_lid: 0 chn_lid: 1 tad_limit: 0x1F
C01: TADBASE[0]:
mirror_en: 0 en_failover: 0 ign_ptrl_uc: 0 base: 0x0
Write Patrol and Sparing TAD range CSR's for HBM Stack 3 MC 1
C00: TADWAYNESS[0]:
target_lid: 0 chn_lid: 2 tad_limit: 0x1F
C00: TADBASE[0]:
mirror_en: 0 en_failover: 0 ign_ptrl_uc: 0 base: 0x0
C01: TADWAYNESS[0]:
target_lid: 0 chn_lid: 3 tad_limit: 0x1F
C01: TADBASE[0]:
mirror_en: 0 en_failover: 0 ign_ptrl_uc: 0 base: 0x0
Write Patrol and Sparing TAD range CSR's for HBM Stack 3 MC 2
C00: TADWAYNESS[0]:
target_lid: 0 chn_lid: 4 tad_limit: 0x1F
C00: TADBASE[0]:
mirror_en: 0 en_failover: 0 ign_ptrl_uc: 0 base: 0x0
C01: TADWAYNESS[0]:
target_lid: 0 chn_lid: 5 tad_limit: 0x1F
C01: TADBASE[0]:
mirror_en: 0 en_failover: 0 ign_ptrl_uc: 0 base: 0x0
Write Patrol and Sparing TAD range CSR's for HBM Stack 3 MC 3
C00: TADWAYNESS[0]:
target_lid: 0 chn_lid: 6 tad_limit: 0x1F
C00: TADBASE[0]:
mirror_en: 0 en_failover: 0 ign_ptrl_uc: 0 base: 0x0
C01: TADWAYNESS[0]:
target_lid: 0 chn_lid: 7 tad_limit: 0x1F
C01: TADBASE[0]:
mirror_en: 0 en_failover: 0 ign_ptrl_uc: 0 base: 0x0
Write Hbm Nm Caching Tad CSR's for HBM Stack 3 MC 0
C00: MCNMCACHINGCFG 2LM TAD:
nmcachingtaden: 1 nmcachingtad: 0
C01: MCNMCACHINGCFG 2LM TAD:
nmcachingtaden: 1 nmcachingtad: 0
Write Hbm Nm Caching Tad CSR's for HBM Stack 3 MC 1
C00: MCNMCACHINGCFG 2LM TAD:
nmcachingtaden: 1 nmcachingtad: 0
C01: MCNMCACHINGCFG 2LM TAD:
nmcachingtaden: 1 nmcachingtad: 0
Write Hbm Nm Caching Tad CSR's for HBM Stack 3 MC 2
C00: MCNMCACHINGCFG 2LM TAD:
nmcachingtaden: 1 nmcachingtad: 0
C01: MCNMCACHINGCFG 2LM TAD:
nmcachingtaden: 1 nmcachingtad: 0
Write Hbm Nm Caching Tad CSR's for HBM Stack 3 MC 3
C00: MCNMCACHINGCFG 2LM TAD:
nmcachingtaden: 1 nmcachingtad: 0
C01: MCNMCACHINGCFG 2LM TAD:
nmcachingtaden: 1 nmcachingtad: 0
Write 1LM Decoder CSR's for HBM Stack 3 MC 0
C00: TADCHNILVOFFSET[0]:
target_ways: 0 chn_ways: 0 target_gran: 1 chn_gran: 1 tad_offset: 0x0 tad_offset_sign: 0
C01: TADCHNILVOFFSET[0]:
target_ways: 0 chn_ways: 0 target_gran: 1 chn_gran: 1 tad_offset: 0x0 tad_offset_sign: 0
Write 1LM Decoder CSR's for HBM Stack 3 MC 1
C00: TADCHNILVOFFSET[0]:
target_ways: 0 chn_ways: 0 target_gran: 1 chn_gran: 1 tad_offset: 0x0 tad_offset_sign: 0
C01: TADCHNILVOFFSET[0]:
target_ways: 0 chn_ways: 0 target_gran: 1 chn_gran: 1 tad_offset: 0x0 tad_offset_sign: 0
Write 1LM Decoder CSR's for HBM Stack 3 MC 2
C00: TADCHNILVOFFSET[0]:
target_ways: 0 chn_ways: 0 target_gran: 1 chn_gran: 1 tad_offset: 0x0 tad_offset_sign: 0
C01: TADCHNILVOFFSET[0]:
target_ways: 0 chn_ways: 0 target_gran: 1 chn_gran: 1 tad_offset: 0x0 tad_offset_sign: 0
Write 1LM Decoder CSR's for HBM Stack 3 MC 3
C00: TADCHNILVOFFSET[0]:
target_ways: 0 chn_ways: 0 target_gran: 1 chn_gran: 1 tad_offset: 0x0 tad_offset_sign: 0
C01: TADCHNILVOFFSET[0]:
target_ways: 0 chn_ways: 0 target_gran: 1 chn_gran: 1 tad_offset: 0x0 tad_offset_sign: 0
Write MCNMCACHINGCFG for HBM Stack 3 MC 0
C00: MCNMCACHINGCFG:
mcnmcachingenb: 1 mcpmemenb: 0 mcnmcachingpmemwt: 0
C01: MCNMCACHINGCFG:
mcnmcachingenb: 1 mcpmemenb: 0 mcnmcachingpmemwt: 0
Write MCNMCACHINGCFG for HBM Stack 3 MC 1
C00: MCNMCACHINGCFG:
mcnmcachingenb: 1 mcpmemenb: 0 mcnmcachingpmemwt: 0
C01: MCNMCACHINGCFG:
mcnmcachingenb: 1 mcpmemenb: 0 mcnmcachingpmemwt: 0
Write MCNMCACHINGCFG for HBM Stack 3 MC 2
C00: MCNMCACHINGCFG:
mcnmcachingenb: 1 mcpmemenb: 0 mcnmcachingpmemwt: 0
C01: MCNMCACHINGCFG:
mcnmcachingenb: 1 mcpmemenb: 0 mcnmcachingpmemwt: 0
Write MCNMCACHINGCFG for HBM Stack 3 MC 3
C00: MCNMCACHINGCFG:
mcnmcachingenb: 1 mcpmemenb: 0 mcnmcachingpmemwt: 0
C01: MCNMCACHINGCFG:
mcnmcachingenb: 1 mcpmemenb: 0 mcnmcachingpmemwt: 0
Write 2LM NM Decoder CSR's for HBM Stack 3 MC 0
C00: CSR for force_lat bit : AMAP_MC_MAIN_REG: 0x52
C00: MCNMCACHINGINTLV:
nm_target_ways: 0 nm_chn_ways: 3 nm_target_lid: 0 nm_target_gran: 1 nm_chn_gran: 1 nm_chn_lid: 0
C00: MCNMCACHINGCFG_MC_2LM_REG:
en_2way: 0 prefer_way_sel: 0 chn_cap: 0xB nm_ratio_chn_cap: 0
C00: MCNMCACHINGOFFSET:
mcnmcachingoffsetlower: 0x2 mcnmcachingoffset: 0x3 mcnmcachingoffseten: 1
C01: CSR for force_lat bit : AMAP_MC_MAIN_REG: 0x52
C01: MCNMCACHINGINTLV:
nm_target_ways: 0 nm_chn_ways: 3 nm_target_lid: 0 nm_target_gran: 1 nm_chn_gran: 1 nm_chn_lid: 1
C01: MCNMCACHINGCFG_MC_2LM_REG:
en_2way: 0 prefer_way_sel: 0 chn_cap: 0xB nm_ratio_chn_cap: 0
C01: MCNMCACHINGOFFSET:
mcnmcachingoffsetlower: 0x2 mcnmcachingoffset: 0x3 mcnmcachingoffseten: 1
Write 2LM NM Decoder CSR's for HBM Stack 3 MC 1
C00: CSR for force_lat bit : AMAP_MC_MAIN_REG: 0x52
C00: MCNMCACHINGINTLV:
nm_target_ways: 0 nm_chn_ways: 3 nm_target_lid: 0 nm_target_gran: 1 nm_chn_gran: 1 nm_chn_lid: 2
C00: MCNMCACHINGCFG_MC_2LM_REG:
en_2way: 0 prefer_way_sel: 0 chn_cap: 0xB nm_ratio_chn_cap: 0
C00: MCNMCACHINGOFFSET:
mcnmcachingoffsetlower: 0x2 mcnmcachingoffset: 0x3 mcnmcachingoffseten: 1
C01: CSR for force_lat bit : AMAP_MC_MAIN_REG: 0x52
C01: MCNMCACHINGINTLV:
nm_target_ways: 0 nm_chn_ways: 3 nm_target_lid: 0 nm_target_gran: 1 nm_chn_gran: 1 nm_chn_lid: 3
C01: MCNMCACHINGCFG_MC_2LM_REG:
en_2way: 0 prefer_way_sel: 0 chn_cap: 0xB nm_ratio_chn_cap: 0
C01: MCNMCACHINGOFFSET:
mcnmcachingoffsetlower: 0x2 mcnmcachingoffset: 0x3 mcnmcachingoffseten: 1
Write 2LM NM Decoder CSR's for HBM Stack 3 MC 2
C00: CSR for force_lat bit : AMAP_MC_MAIN_REG: 0x52
C00: MCNMCACHINGINTLV:
nm_target_ways: 0 nm_chn_ways: 3 nm_target_lid: 0 nm_target_gran: 1 nm_chn_gran: 1 nm_chn_lid: 4
C00: MCNMCACHINGCFG_MC_2LM_REG:
en_2way: 0 prefer_way_sel: 0 chn_cap: 0xB nm_ratio_chn_cap: 0
C00: MCNMCACHINGOFFSET:
mcnmcachingoffsetlower: 0x2 mcnmcachingoffset: 0x3 mcnmcachingoffseten: 1
C01: CSR for force_lat bit : AMAP_MC_MAIN_REG: 0x52
C01: MCNMCACHINGINTLV:
nm_target_ways: 0 nm_chn_ways: 3 nm_target_lid: 0 nm_target_gran: 1 nm_chn_gran: 1 nm_chn_lid: 5
C01: MCNMCACHINGCFG_MC_2LM_REG:
en_2way: 0 prefer_way_sel: 0 chn_cap: 0xB nm_ratio_chn_cap: 0
C01: MCNMCACHINGOFFSET:
mcnmcachingoffsetlower: 0x2 mcnmcachingoffset: 0x3 mcnmcachingoffseten: 1
Write 2LM NM Decoder CSR's for HBM Stack 3 MC 3
C00: CSR for force_lat bit : AMAP_MC_MAIN_REG: 0x52
C00: MCNMCACHINGINTLV:
nm_target_ways: 0 nm_chn_ways: 3 nm_target_lid: 0 nm_target_gran: 1 nm_chn_gran: 1 nm_chn_lid: 6
C00: MCNMCACHINGCFG_MC_2LM_REG:
en_2way: 0 prefer_way_sel: 0 chn_cap: 0xB nm_ratio_chn_cap: 0
C00: MCNMCACHINGOFFSET:
mcnmcachingoffsetlower: 0x2 mcnmcachingoffset: 0x3 mcnmcachingoffseten: 1
C01: CSR for force_lat bit : AMAP_MC_MAIN_REG: 0x52
C01: MCNMCACHINGINTLV:
nm_target_ways: 0 nm_chn_ways: 3 nm_target_lid: 0 nm_target_gran: 1 nm_chn_gran: 1 nm_chn_lid: 7
C01: MCNMCACHINGCFG_MC_2LM_REG:
en_2way: 0 prefer_way_sel: 0 chn_cap: 0xB nm_ratio_chn_cap: 0
C01: MCNMCACHINGOFFSET:
mcnmcachingoffsetlower: 0x2 mcnmcachingoffset: 0x3 mcnmcachingoffseten: 1
Write 2LM FM Decoder CSR's for HBM Stack 3 MC 0 TAD 0
C00: DRAM_RULE[0]:
rule_enable: 1 limit: 0x81F fm_target: 0 fm_chn_ways: 0 fm_chn_gran: 1 fm_target_ways: 0 fm_gran_eq: 0 fm_chn_l2pid: 0x00000000
C01: DRAM_RULE[0]:
rule_enable: 1 limit: 0x81F fm_target: 0 fm_chn_ways: 0 fm_chn_gran: 1 fm_target_ways: 0 fm_gran_eq: 0 fm_chn_l2pid: 0x00000000
Write 2LM FM Decoder CSR's for HBM Stack 3 MC 1 TAD 0
C00: DRAM_RULE[0]:
rule_enable: 1 limit: 0x81F fm_target: 0 fm_chn_ways: 0 fm_chn_gran: 1 fm_target_ways: 0 fm_gran_eq: 0 fm_chn_l2pid: 0x00000000
C01: DRAM_RULE[0]:
rule_enable: 1 limit: 0x81F fm_target: 0 fm_chn_ways: 0 fm_chn_gran: 1 fm_target_ways: 0 fm_gran_eq: 0 fm_chn_l2pid: 0x00000000
Write 2LM FM Decoder CSR's for HBM Stack 3 MC 2 TAD 0
C00: DRAM_RULE[0]:
rule_enable: 1 limit: 0x81F fm_target: 0 fm_chn_ways: 0 fm_chn_gran: 1 fm_target_ways: 0 fm_gran_eq: 0 fm_chn_l2pid: 0x00000000
C01: DRAM_RULE[0]:
rule_enable: 1 limit: 0x81F fm_target: 0 fm_chn_ways: 0 fm_chn_gran: 1 fm_target_ways: 0 fm_gran_eq: 0 fm_chn_l2pid: 0x00000000
Write 2LM FM Decoder CSR's for HBM Stack 3 MC 3 TAD 0
C00: DRAM_RULE[0]:
rule_enable: 1 limit: 0x81F fm_target: 0 fm_chn_ways: 0 fm_chn_gran: 1 fm_target_ways: 0 fm_gran_eq: 0 fm_chn_l2pid: 0x00000000
C01: DRAM_RULE[0]:
rule_enable: 1 limit: 0x81F fm_target: 0 fm_chn_ways: 0 fm_chn_gran: 1 fm_target_ways: 0 fm_gran_eq: 0 fm_chn_l2pid: 0x00000000
Checkpoint Code: Socket 0, 0xBB, 0x08, 0x0000
^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^
Write RIR CSRs for Socket: 0
^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^
Channel - 0
RIRWAYNESSLIMIT_0_MC_MAIN_REG
rir_val: 1 rir_limit: 0x1F rir_way: 0x0
RIRILV0OFFSET_0_MC_MAIN_REG
rir_rnk_tgt0: 0x0 rir_offset0: 0x0
RIRILV1OFFSET_0_MC_MAIN_REG
rir_rnk_tgt0: 0x0 rir_offset0: 0x0
RIRILV2OFFSET_0_MC_MAIN_REG
rir_rnk_tgt0: 0x0 rir_offset0: 0x0
RIRILV3OFFSET_0_MC_MAIN_REG
rir_rnk_tgt0: 0x0 rir_offset0: 0x0
RIRILV4OFFSET_0_MC_MAIN_REG
rir_rnk_tgt0: 0x0 rir_offset0: 0x0
RIRILV5OFFSET_0_MC_MAIN_REG
rir_rnk_tgt0: 0x0 rir_offset0: 0x0
RIRILV6OFFSET_0_MC_MAIN_REG
rir_rnk_tgt0: 0x0 rir_offset0: 0x0
RIRILV7OFFSET_0_MC_MAIN_REG
rir_rnk_tgt0: 0x0 rir_offset0: 0x0
RIRWAYNESSLIMIT_1_MC_MAIN_REG
rir_val: 0 rir_limit: 0x1F rir_way: 0x0
RIRILV0OFFSET_1_MC_MAIN_REG
rir_rnk_tgt0: 0x0 rir_offset0: 0x0
RIRILV1OFFSET_1_MC_MAIN_REG
rir_rnk_tgt0: 0x0 rir_offset0: 0x0
RIRILV2OFFSET_1_MC_MAIN_REG
rir_rnk_tgt0: 0x0 rir_offset0: 0x0
RIRILV3OFFSET_1_MC_MAIN_REG
rir_rnk_tgt0: 0x0 rir_offset0: 0x0
RIRILV4OFFSET_1_MC_MAIN_REG
rir_rnk_tgt0: 0x0 rir_offset0: 0x0
RIRILV5OFFSET_1_MC_MAIN_REG
rir_rnk_tgt0: 0x0 rir_offset0: 0x0
RIRILV6OFFSET_1_MC_MAIN_REG
rir_rnk_tgt0: 0x0 rir_offset0: 0x0
RIRILV7OFFSET_1_MC_MAIN_REG
rir_rnk_tgt0: 0x0 rir_offset0: 0x0
RIRWAYNESSLIMIT_2_MC_MAIN_REG
rir_val: 0 rir_limit: 0x1F rir_way: 0x0
RIRILV0OFFSET_2_MC_MAIN_REG
rir_rnk_tgt0: 0x0 rir_offset0: 0x0
RIRILV1OFFSET_2_MC_MAIN_REG
rir_rnk_tgt0: 0x0 rir_offset0: 0x0
RIRILV2OFFSET_2_MC_MAIN_REG
rir_rnk_tgt0: 0x0 rir_offset0: 0x0
RIRILV3OFFSET_2_MC_MAIN_REG
rir_rnk_tgt0: 0x0 rir_offset0: 0x0
RIRILV4OFFSET_2_MC_MAIN_REG
rir_rnk_tgt0: 0x0 rir_offset0: 0x0
RIRILV5OFFSET_2_MC_MAIN_REG
rir_rnk_tgt0: 0x0 rir_offset0: 0x0
RIRILV6OFFSET_2_MC_MAIN_REG
rir_rnk_tgt0: 0x0 rir_offset0: 0x0
RIRILV7OFFSET_2_MC_MAIN_REG
rir_rnk_tgt0: 0x0 rir_offset0: 0x0
RIRWAYNESSLIMIT_3_MC_MAIN_REG
rir_val: 0 rir_limit: 0x1F rir_way: 0x0
RIRILV0OFFSET_3_MC_MAIN_REG
rir_rnk_tgt0: 0x0 rir_offset0: 0x0
RIRILV1OFFSET_3_MC_MAIN_REG
rir_rnk_tgt0: 0x0 rir_offset0: 0x0
RIRILV2OFFSET_3_MC_MAIN_REG
rir_rnk_tgt0: 0x0 rir_offset0: 0x0
RIRILV3OFFSET_3_MC_MAIN_REG
rir_rnk_tgt0: 0x0 rir_offset0: 0x0
RIRILV4OFFSET_3_MC_MAIN_REG
rir_rnk_tgt0: 0x0 rir_offset0: 0x0
RIRILV5OFFSET_3_MC_MAIN_REG
rir_rnk_tgt0: 0x0 rir_offset0: 0x0
RIRILV6OFFSET_3_MC_MAIN_REG
rir_rnk_tgt0: 0x0 rir_offset0: 0x0
RIRILV7OFFSET_3_MC_MAIN_REG
rir_rnk_tgt0: 0x0 rir_offset0: 0x0
Channel - 2
RIRWAYNESSLIMIT_0_MC_MAIN_REG
rir_val: 1 rir_limit: 0x1F rir_way: 0x0
RIRILV0OFFSET_0_MC_MAIN_REG
rir_rnk_tgt0: 0x0 rir_offset0: 0x0
RIRILV1OFFSET_0_MC_MAIN_REG
rir_rnk_tgt0: 0x0 rir_offset0: 0x0
RIRILV2OFFSET_0_MC_MAIN_REG
rir_rnk_tgt0: 0x0 rir_offset0: 0x0
RIRILV3OFFSET_0_MC_MAIN_REG
rir_rnk_tgt0: 0x0 rir_offset0: 0x0
RIRILV4OFFSET_0_MC_MAIN_REG
rir_rnk_tgt0: 0x0 rir_offset0: 0x0
RIRILV5OFFSET_0_MC_MAIN_REG
rir_rnk_tgt0: 0x0 rir_offset0: 0x0
RIRILV6OFFSET_0_MC_MAIN_REG
rir_rnk_tgt0: 0x0 rir_offset0: 0x0
RIRILV7OFFSET_0_MC_MAIN_REG
rir_rnk_tgt0: 0x0 rir_offset0: 0x0
RIRWAYNESSLIMIT_1_MC_MAIN_REG
rir_val: 0 rir_limit: 0x1F rir_way: 0x0
RIRILV0OFFSET_1_MC_MAIN_REG
rir_rnk_tgt0: 0x0 rir_offset0: 0x0
RIRILV1OFFSET_1_MC_MAIN_REG
rir_rnk_tgt0: 0x0 rir_offset0: 0x0
RIRILV2OFFSET_1_MC_MAIN_REG
rir_rnk_tgt0: 0x0 rir_offset0: 0x0
RIRILV3OFFSET_1_MC_MAIN_REG
rir_rnk_tgt0: 0x0 rir_offset0: 0x0
RIRILV4OFFSET_1_MC_MAIN_REG
rir_rnk_tgt0: 0x0 rir_offset0: 0x0
RIRILV5OFFSET_1_MC_MAIN_REG
rir_rnk_tgt0: 0x0 rir_offset0: 0x0
RIRILV6OFFSET_1_MC_MAIN_REG
rir_rnk_tgt0: 0x0 rir_offset0: 0x0
RIRILV7OFFSET_1_MC_MAIN_REG
rir_rnk_tgt0: 0x0 rir_offset0: 0x0
RIRWAYNESSLIMIT_2_MC_MAIN_REG
rir_val: 0 rir_limit: 0x1F rir_way: 0x0
RIRILV0OFFSET_2_MC_MAIN_REG
rir_rnk_tgt0: 0x0 rir_offset0: 0x0
RIRILV1OFFSET_2_MC_MAIN_REG
rir_rnk_tgt0: 0x0 rir_offset0: 0x0
RIRILV2OFFSET_2_MC_MAIN_REG
rir_rnk_tgt0: 0x0 rir_offset0: 0x0
RIRILV3OFFSET_2_MC_MAIN_REG
rir_rnk_tgt0: 0x0 rir_offset0: 0x0
RIRILV4OFFSET_2_MC_MAIN_REG
rir_rnk_tgt0: 0x0 rir_offset0: 0x0
RIRILV5OFFSET_2_MC_MAIN_REG
rir_rnk_tgt0: 0x0 rir_offset0: 0x0
RIRILV6OFFSET_2_MC_MAIN_REG
rir_rnk_tgt0: 0x0 rir_offset0: 0x0
RIRILV7OFFSET_2_MC_MAIN_REG
rir_rnk_tgt0: 0x0 rir_offset0: 0x0
RIRWAYNESSLIMIT_3_MC_MAIN_REG
rir_val: 0 rir_limit: 0x1F rir_way: 0x0
RIRILV0OFFSET_3_MC_MAIN_REG
rir_rnk_tgt0: 0x0 rir_offset0: 0x0
RIRILV1OFFSET_3_MC_MAIN_REG
rir_rnk_tgt0: 0x0 rir_offset0: 0x0
RIRILV2OFFSET_3_MC_MAIN_REG
rir_rnk_tgt0: 0x0 rir_offset0: 0x0
RIRILV3OFFSET_3_MC_MAIN_REG
rir_rnk_tgt0: 0x0 rir_offset0: 0x0
RIRILV4OFFSET_3_MC_MAIN_REG
rir_rnk_tgt0: 0x0 rir_offset0: 0x0
RIRILV5OFFSET_3_MC_MAIN_REG
rir_rnk_tgt0: 0x0 rir_offset0: 0x0
RIRILV6OFFSET_3_MC_MAIN_REG
rir_rnk_tgt0: 0x0 rir_offset0: 0x0
RIRILV7OFFSET_3_MC_MAIN_REG
rir_rnk_tgt0: 0x0 rir_offset0: 0x0
Channel - 4
RIRWAYNESSLIMIT_0_MC_MAIN_REG
rir_val: 1 rir_limit: 0x1F rir_way: 0x0
RIRILV0OFFSET_0_MC_MAIN_REG
rir_rnk_tgt0: 0x0 rir_offset0: 0x0
RIRILV1OFFSET_0_MC_MAIN_REG
rir_rnk_tgt0: 0x0 rir_offset0: 0x0
RIRILV2OFFSET_0_MC_MAIN_REG
rir_rnk_tgt0: 0x0 rir_offset0: 0x0
RIRILV3OFFSET_0_MC_MAIN_REG
rir_rnk_tgt0: 0x0 rir_offset0: 0x0
RIRILV4OFFSET_0_MC_MAIN_REG
rir_rnk_tgt0: 0x0 rir_offset0: 0x0
RIRILV5OFFSET_0_MC_MAIN_REG
rir_rnk_tgt0: 0x0 rir_offset0: 0x0
RIRILV6OFFSET_0_MC_MAIN_REG
rir_rnk_tgt0: 0x0 rir_offset0: 0x0
RIRILV7OFFSET_0_MC_MAIN_REG
rir_rnk_tgt0: 0x0 rir_offset0: 0x0
RIRWAYNESSLIMIT_1_MC_MAIN_REG
rir_val: 0 rir_limit: 0x1F rir_way: 0x0
RIRILV0OFFSET_1_MC_MAIN_REG
rir_rnk_tgt0: 0x0 rir_offset0: 0x0
RIRILV1OFFSET_1_MC_MAIN_REG
rir_rnk_tgt0: 0x0 rir_offset0: 0x0
RIRILV2OFFSET_1_MC_MAIN_REG
rir_rnk_tgt0: 0x0 rir_offset0: 0x0
RIRILV3OFFSET_1_MC_MAIN_REG
rir_rnk_tgt0: 0x0 rir_offset0: 0x0
RIRILV4OFFSET_1_MC_MAIN_REG
rir_rnk_tgt0: 0x0 rir_offset0: 0x0
RIRILV5OFFSET_1_MC_MAIN_REG
rir_rnk_tgt0: 0x0 rir_offset0: 0x0
RIRILV6OFFSET_1_MC_MAIN_REG
rir_rnk_tgt0: 0x0 rir_offset0: 0x0
RIRILV7OFFSET_1_MC_MAIN_REG
rir_rnk_tgt0: 0x0 rir_offset0: 0x0
RIRWAYNESSLIMIT_2_MC_MAIN_REG
rir_val: 0 rir_limit: 0x1F rir_way: 0x0
RIRILV0OFFSET_2_MC_MAIN_REG
rir_rnk_tgt0: 0x0 rir_offset0: 0x0
RIRILV1OFFSET_2_MC_MAIN_REG
rir_rnk_tgt0: 0x0 rir_offset0: 0x0
RIRILV2OFFSET_2_MC_MAIN_REG
rir_rnk_tgt0: 0x0 rir_offset0: 0x0
RIRILV3OFFSET_2_MC_MAIN_REG
rir_rnk_tgt0: 0x0 rir_offset0: 0x0
RIRILV4OFFSET_2_MC_MAIN_REG
rir_rnk_tgt0: 0x0 rir_offset0: 0x0
RIRILV5OFFSET_2_MC_MAIN_REG
rir_rnk_tgt0: 0x0 rir_offset0: 0x0
RIRILV6OFFSET_2_MC_MAIN_REG
rir_rnk_tgt0: 0x0 rir_offset0: 0x0
RIRILV7OFFSET_2_MC_MAIN_REG
rir_rnk_tgt0: 0x0 rir_offset0: 0x0
RIRWAYNESSLIMIT_3_MC_MAIN_REG
rir_val: 0 rir_limit: 0x1F rir_way: 0x0
RIRILV0OFFSET_3_MC_MAIN_REG
rir_rnk_tgt0: 0x0 rir_offset0: 0x0
RIRILV1OFFSET_3_MC_MAIN_REG
rir_rnk_tgt0: 0x0 rir_offset0: 0x0
RIRILV2OFFSET_3_MC_MAIN_REG
rir_rnk_tgt0: 0x0 rir_offset0: 0x0
RIRILV3OFFSET_3_MC_MAIN_REG
rir_rnk_tgt0: 0x0 rir_offset0: 0x0
RIRILV4OFFSET_3_MC_MAIN_REG
rir_rnk_tgt0: 0x0 rir_offset0: 0x0
RIRILV5OFFSET_3_MC_MAIN_REG
rir_rnk_tgt0: 0x0 rir_offset0: 0x0
RIRILV6OFFSET_3_MC_MAIN_REG
rir_rnk_tgt0: 0x0 rir_offset0: 0x0
RIRILV7OFFSET_3_MC_MAIN_REG
rir_rnk_tgt0: 0x0 rir_offset0: 0x0
Channel - 6
RIRWAYNESSLIMIT_0_MC_MAIN_REG
rir_val: 1 rir_limit: 0x1F rir_way: 0x0
RIRILV0OFFSET_0_MC_MAIN_REG
rir_rnk_tgt0: 0x0 rir_offset0: 0x0
RIRILV1OFFSET_0_MC_MAIN_REG
rir_rnk_tgt0: 0x0 rir_offset0: 0x0
RIRILV2OFFSET_0_MC_MAIN_REG
rir_rnk_tgt0: 0x0 rir_offset0: 0x0
RIRILV3OFFSET_0_MC_MAIN_REG
rir_rnk_tgt0: 0x0 rir_offset0: 0x0
RIRILV4OFFSET_0_MC_MAIN_REG
rir_rnk_tgt0: 0x0 rir_offset0: 0x0
RIRILV5OFFSET_0_MC_MAIN_REG
rir_rnk_tgt0: 0x0 rir_offset0: 0x0
RIRILV6OFFSET_0_MC_MAIN_REG
rir_rnk_tgt0: 0x0 rir_offset0: 0x0
RIRILV7OFFSET_0_MC_MAIN_REG
rir_rnk_tgt0: 0x0 rir_offset0: 0x0
RIRWAYNESSLIMIT_1_MC_MAIN_REG
rir_val: 0 rir_limit: 0x1F rir_way: 0x0
RIRILV0OFFSET_1_MC_MAIN_REG
rir_rnk_tgt0: 0x0 rir_offset0: 0x0
RIRILV1OFFSET_1_MC_MAIN_REG
rir_rnk_tgt0: 0x0 rir_offset0: 0x0
RIRILV2OFFSET_1_MC_MAIN_REG
rir_rnk_tgt0: 0x0 rir_offset0: 0x0
RIRILV3OFFSET_1_MC_MAIN_REG
rir_rnk_tgt0: 0x0 rir_offset0: 0x0
RIRILV4OFFSET_1_MC_MAIN_REG
rir_rnk_tgt0: 0x0 rir_offset0: 0x0
RIRILV5OFFSET_1_MC_MAIN_REG
rir_rnk_tgt0: 0x0 rir_offset0: 0x0
RIRILV6OFFSET_1_MC_MAIN_REG
rir_rnk_tgt0: 0x0 rir_offset0: 0x0
RIRILV7OFFSET_1_MC_MAIN_REG
rir_rnk_tgt0: 0x0 rir_offset0: 0x0
RIRWAYNESSLIMIT_2_MC_MAIN_REG
rir_val: 0 rir_limit: 0x1F rir_way: 0x0
RIRILV0OFFSET_2_MC_MAIN_REG
rir_rnk_tgt0: 0x0 rir_offset0: 0x0
RIRILV1OFFSET_2_MC_MAIN_REG
rir_rnk_tgt0: 0x0 rir_offset0: 0x0
RIRILV2OFFSET_2_MC_MAIN_REG
rir_rnk_tgt0: 0x0 rir_offset0: 0x0
RIRILV3OFFSET_2_MC_MAIN_REG
rir_rnk_tgt0: 0x0 rir_offset0: 0x0
RIRILV4OFFSET_2_MC_MAIN_REG
rir_rnk_tgt0: 0x0 rir_offset0: 0x0
RIRILV5OFFSET_2_MC_MAIN_REG
rir_rnk_tgt0: 0x0 rir_offset0: 0x0
RIRILV6OFFSET_2_MC_MAIN_REG
rir_rnk_tgt0: 0x0 rir_offset0: 0x0
RIRILV7OFFSET_2_MC_MAIN_REG
rir_rnk_tgt0: 0x0 rir_offset0: 0x0
RIRWAYNESSLIMIT_3_MC_MAIN_REG
rir_val: 0 rir_limit: 0x1F rir_way: 0x0
RIRILV0OFFSET_3_MC_MAIN_REG
rir_rnk_tgt0: 0x0 rir_offset0: 0x0
RIRILV1OFFSET_3_MC_MAIN_REG
rir_rnk_tgt0: 0x0 rir_offset0: 0x0
RIRILV2OFFSET_3_MC_MAIN_REG
rir_rnk_tgt0: 0x0 rir_offset0: 0x0
RIRILV3OFFSET_3_MC_MAIN_REG
rir_rnk_tgt0: 0x0 rir_offset0: 0x0
RIRILV4OFFSET_3_MC_MAIN_REG
rir_rnk_tgt0: 0x0 rir_offset0: 0x0
RIRILV5OFFSET_3_MC_MAIN_REG
rir_rnk_tgt0: 0x0 rir_offset0: 0x0
RIRILV6OFFSET_3_MC_MAIN_REG
rir_rnk_tgt0: 0x0 rir_offset0: 0x0
RIRILV7OFFSET_3_MC_MAIN_REG
rir_rnk_tgt0: 0x0 rir_offset0: 0x0
^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^
Write CHA CSRs for Socket: 0
^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^
TWO_LM_CONFIG_CHA_PMA_REG
enable: 0x1 mask: 0x3F mask_hi: 0x0
HA_COH_CHABC_SAD1_REG
dis_spec_rd: 0x0
lowMemBase: 0x0
lowMemSize: 0x20
highMemBase: 0x40
highMemSize: 0xFE0
TOLM: 0x1F
TOHM: 0x101F
C00: CSR for wait4bothhalves bit: AMAP_MC_MAIN_REG: 0x49
C00: CSR for wait4bothhalves bit: AMAP_MC_MAIN_REG: 0x49
C00: CSR for wait4bothhalves bit: AMAP_MC_MAIN_REG: 0x49
C00: CSR for wait4bothhalves bit: AMAP_MC_MAIN_REG: 0x49
Checkpoint Code: Socket 0, 0xBB, 0x06, 0x0001
^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^
Write CHA Remote SAD CSRs for Socket: 1
^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^
En Base Limit NodeId Attr
1 0x00000 0x0081F 0x0 0x3
^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^
Write CHA SAD CSRs for Socket: 1
^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^
CHA unlock DRAM cluster 0 snc_lock bits: 0xE
Program Channel Interleaves
rt0_interleave_mode: 7
rt1_interleave_shift: 7
rt2_interleave_shift: 2
Program CSRs for SAD Rule 0 (HBM 2LM DDR)
En Limit Mode Attr NMCacheable
1 0x00A1F 0x1 0x3 1
Interleave List: 0x0000000088888888
Single Target: H0 Index 0
DRAM_RULE_CFG2: cxl_accelerator_mem Durable_mem_en cxl_mem_expander NXM
0 0 0 0
TgtRt: 00 ChnRt: 00
Program target config: 00000000
Program channel config: 00000000
Program Mode config.
H0 DramRt0Mode0Cfg: 00000006
H0 DramRt0Mode1Cfg: 00000000
H1 DramRt0Mode0Cfg: 00000000
H1 DramRt0Mode1Cfg: 00000000
H0 DramRt1Mode0Cfg: 00000000
H0 DramRt1Mode1Cfg: 00000000
H1 DramRt1Mode0Cfg: 00000000
H1 DramRt1Mode1Cfg: 00000000
H0 DramRt2Mode0Cfg: 00000000
H0 DramRt2Mode1Cfg: 00000000
H1 DramRt2Mode0Cfg: 00000000
H1 DramRt2Mode1Cfg: 00000000
CHA unlock DRAM cluster 1 snc_lock bits: 0xD
Program Channel Interleaves
rt0_interleave_mode: 7
rt1_interleave_shift: 7
rt2_interleave_shift: 2
Program CSRs for SAD Rule 0 (HBM 2LM DDR)
En Limit Mode Attr NMCacheable
1 0x00C1F 0x1 0x3 1
Interleave List: 0x0000000088888888
Single Target: H0 Index 0
DRAM_RULE_CFG2: cxl_accelerator_mem Durable_mem_en cxl_mem_expander NXM
0 0 0 0
TgtRt: 00 ChnRt: 00
Program target config: 00000000
Program channel config: 00000000
Program Mode config.
H0 DramRt0Mode0Cfg: 00000006
H0 DramRt0Mode1Cfg: 00000000
H1 DramRt0Mode0Cfg: 00000000
H1 DramRt0Mode1Cfg: 00000000
H0 DramRt1Mode0Cfg: 00000000
H0 DramRt1Mode1Cfg: 00000000
H1 DramRt1Mode0Cfg: 00000000
H1 DramRt1Mode1Cfg: 00000000
H0 DramRt2Mode0Cfg: 00000000
H0 DramRt2Mode1Cfg: 00000000
H1 DramRt2Mode0Cfg: 00000000
H1 DramRt2Mode1Cfg: 00000000
CHA unlock DRAM cluster 2 snc_lock bits: 0xB
Program Channel Interleaves
rt0_interleave_mode: 7
rt1_interleave_shift: 7
rt2_interleave_shift: 2
Program CSRs for SAD Rule 0 (HBM 2LM DDR)
En Limit Mode Attr NMCacheable
1 0x00E1F 0x1 0x3 1
Interleave List: 0x0000000088888888
Single Target: H0 Index 0
DRAM_RULE_CFG2: cxl_accelerator_mem Durable_mem_en cxl_mem_expander NXM
0 0 0 0
TgtRt: 00 ChnRt: 00
Program target config: 00000000
Program channel config: 00000000
Program Mode config.
H0 DramRt0Mode0Cfg: 00000006
H0 DramRt0Mode1Cfg: 00000000
H1 DramRt0Mode0Cfg: 00000000
H1 DramRt0Mode1Cfg: 00000000
H0 DramRt1Mode0Cfg: 00000000
H0 DramRt1Mode1Cfg: 00000000
H1 DramRt1Mode0Cfg: 00000000
H1 DramRt1Mode1Cfg: 00000000
H0 DramRt2Mode0Cfg: 00000000
H0 DramRt2Mode1Cfg: 00000000
H1 DramRt2Mode0Cfg: 00000000
H1 DramRt2Mode1Cfg: 00000000
CHA unlock DRAM cluster 3 snc_lock bits: 0x7
Program Channel Interleaves
rt0_interleave_mode: 7
rt1_interleave_shift: 7
rt2_interleave_shift: 2
Program CSRs for SAD Rule 0 (HBM 2LM DDR)
En Limit Mode Attr NMCacheable
1 0x0101F 0x1 0x3 1
Interleave List: 0x0000000088888888
Single Target: H0 Index 0
DRAM_RULE_CFG2: cxl_accelerator_mem Durable_mem_en cxl_mem_expander NXM
0 0 0 0
TgtRt: 00 ChnRt: 00
Program target config: 00000000
Program channel config: 00000000
Program Mode config.
H0 DramRt0Mode0Cfg: 00000006
H0 DramRt0Mode1Cfg: 00000000
H1 DramRt0Mode0Cfg: 00000000
H1 DramRt0Mode1Cfg: 00000000
H0 DramRt1Mode0Cfg: 00000000
H0 DramRt1Mode1Cfg: 00000000
H1 DramRt1Mode0Cfg: 00000000
H1 DramRt1Mode1Cfg: 00000000
H0 DramRt2Mode0Cfg: 00000000
H0 DramRt2Mode1Cfg: 00000000
H1 DramRt2Mode0Cfg: 00000000
H1 DramRt2Mode1Cfg: 00000000
CHA lock all DRAM clusters snc_lock bits: 0xF
^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^
Write Route Table CSRs for Socket: 1
^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^
CSR: Cluster 0 H0_CH_ROUTE_TABLE_0 - 0x0 0x1 0x0 0x1 0x0 0x1 0x0 0x1
CSR: Cluster 0 H0_TGT_ROUTE_TABLE_0 - 0x4 0x4 0x5 0x5 0x6 0x6 0x7 0x7
CSR: Cluster 0 H1_CH_ROUTE_TABLE_0 - 0x0 0x0 0x0 0x0 0x0 0x0 0x0 0x0
CSR: Cluster 0 H1_TGT_ROUTE_TABLE_0 - 0x0 0x0 0x0 0x0 0x0 0x0 0x0 0x0
CSR: Cluster 1 H0_CH_ROUTE_TABLE_0 - 0x0 0x1 0x0 0x1 0x0 0x1 0x0 0x1
CSR: Cluster 1 H0_TGT_ROUTE_TABLE_0 - 0x4 0x4 0x5 0x5 0x6 0x6 0x7 0x7
CSR: Cluster 1 H1_CH_ROUTE_TABLE_0 - 0x0 0x0 0x0 0x0 0x0 0x0 0x0 0x0
CSR: Cluster 1 H1_TGT_ROUTE_TABLE_0 - 0x0 0x0 0x0 0x0 0x0 0x0 0x0 0x0
CSR: Cluster 2 H0_CH_ROUTE_TABLE_0 - 0x0 0x1 0x0 0x1 0x0 0x1 0x0 0x1
CSR: Cluster 2 H0_TGT_ROUTE_TABLE_0 - 0x7 0x7 0x6 0x6 0x5 0x5 0x4 0x4
CSR: Cluster 2 H1_CH_ROUTE_TABLE_0 - 0x0 0x0 0x0 0x0 0x0 0x0 0x0 0x0
CSR: Cluster 2 H1_TGT_ROUTE_TABLE_0 - 0x0 0x0 0x0 0x0 0x0 0x0 0x0 0x0
CSR: Cluster 3 H0_CH_ROUTE_TABLE_0 - 0x0 0x1 0x0 0x1 0x0 0x1 0x0 0x1
CSR: Cluster 3 H0_TGT_ROUTE_TABLE_0 - 0x7 0x7 0x6 0x6 0x5 0x5 0x4 0x4
CSR: Cluster 3 H1_CH_ROUTE_TABLE_0 - 0x0 0x0 0x0 0x0 0x0 0x0 0x0 0x0
CSR: Cluster 3 H1_TGT_ROUTE_TABLE_0 - 0x0 0x0 0x0 0x0 0x0 0x0 0x0 0x0
^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^
Write MESH2MEM CSRs for Socket: 1
^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^
Memory Controller : 0
------------------------
DEFEATURES0_M2MEM_MAIN_REG
wrcmpfromnm: 1
MODE_M2MEM_MAIN_REG
nmcaching:0x1 pmem:0x0 blockregion:0x0 in-tile caching: 0x1
Memory Controller : 1
------------------------
DEFEATURES0_M2MEM_MAIN_REG
wrcmpfromnm: 1
MODE_M2MEM_MAIN_REG
nmcaching:0x1 pmem:0x0 blockregion:0x0 in-tile caching: 0x1
Memory Controller : 2
------------------------
DEFEATURES0_M2MEM_MAIN_REG
wrcmpfromnm: 1
MODE_M2MEM_MAIN_REG
nmcaching:0x1 pmem:0x0 blockregion:0x0 in-tile caching: 0x1
Memory Controller : 3
------------------------
DEFEATURES0_M2MEM_MAIN_REG
wrcmpfromnm: 1
MODE_M2MEM_MAIN_REG
nmcaching:0x1 pmem:0x0 blockregion:0x0 in-tile caching: 0x1
MC: 0
tadid:0x0 tadvld:0x1 pmemvld:0x0 blkvld:0x0 ddr4tadid:0x0 ddrttadid:0x0 ddr4:0x1 nmcacheablevld:0x0 mirror:0x0 secondary1st:0x0 frcnpwr:0x0 spare:0x0 addresslimit[51:26]:0xA1F nonpersistentfm:0x1
MC: 1
tadid:0x0 tadvld:0x1 pmemvld:0x0 blkvld:0x0 ddr4tadid:0x0 ddrttadid:0x0 ddr4:0x1 nmcacheablevld:0x0 mirror:0x0 secondary1st:0x0 frcnpwr:0x0 spare:0x0 addresslimit[51:26]:0xC1F nonpersistentfm:0x1
MC: 2
tadid:0x0 tadvld:0x1 pmemvld:0x0 blkvld:0x0 ddr4tadid:0x0 ddrttadid:0x0 ddr4:0x1 nmcacheablevld:0x0 mirror:0x0 secondary1st:0x0 frcnpwr:0x0 spare:0x0 addresslimit[51:26]:0xE1F nonpersistentfm:0x1
MC: 3
tadid:0x0 tadvld:0x1 pmemvld:0x0 blkvld:0x0 ddr4tadid:0x0 ddrttadid:0x0 ddr4:0x1 nmcacheablevld:0x0 mirror:0x0 secondary1st:0x0 frcnpwr:0x0 spare:0x0 addresslimit[51:26]:0x101F nonpersistentfm:0x1
Programs feature registers for MC 0
Programs feature registers for MC 1
Programs feature registers for MC 2
Programs feature registers for MC 3
^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^
Write HBM MESH2MEM CSRs for Socket: 1
^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^
HBM Stack: 0
Mesh2Mem misc: nmcaching: 1 wrcmpfromnm: 1
Mesh2Mem TAD: tadid:0x0 ddrtadid:0x0 nmcacheablevld:0x1 addresslimit[51:26]:0xA1F
HBM Stack: 1
Mesh2Mem misc: nmcaching: 1 wrcmpfromnm: 1
Mesh2Mem TAD: tadid:0x0 ddrtadid:0x0 nmcacheablevld:0x1 addresslimit[51:26]:0xC1F
HBM Stack: 2
Mesh2Mem misc: nmcaching: 1 wrcmpfromnm: 1
Mesh2Mem TAD: tadid:0x0 ddrtadid:0x0 nmcacheablevld:0x1 addresslimit[51:26]:0xE1F
HBM Stack: 3
Mesh2Mem misc: nmcaching: 1 wrcmpfromnm: 1
Mesh2Mem TAD: tadid:0x0 ddrtadid:0x0 nmcacheablevld:0x1 addresslimit[51:26]:0x101F
Programs feature registers for MC 0
N1.C00: CSR : SYSFEATURES0_MC_2LM_REG: 0x10
N1.C01: CSR : SYSFEATURES0_MC_2LM_REG: 0x10
Programs feature registers for MC 1
N1.C00: CSR : SYSFEATURES0_MC_2LM_REG: 0x10
N1.C01: CSR : SYSFEATURES0_MC_2LM_REG: 0x10
Programs feature registers for MC 2
N1.C00: CSR : SYSFEATURES0_MC_2LM_REG: 0x10
N1.C01: CSR : SYSFEATURES0_MC_2LM_REG: 0x10
Programs feature registers for MC 3
N1.C00: CSR : SYSFEATURES0_MC_2LM_REG: 0x10
N1.C01: CSR : SYSFEATURES0_MC_2LM_REG: 0x10
Programs feature registers for MC 4
N1.C00: CSR : SYSFEATURES0_MC_2LM_REG: 0x10
N1.C01: CSR : SYSFEATURES0_MC_2LM_REG: 0x10
Programs feature registers for MC 5
N1.C00: CSR : SYSFEATURES0_MC_2LM_REG: 0x10
N1.C01: CSR : SYSFEATURES0_MC_2LM_REG: 0x10
Programs feature registers for MC 6
N1.C00: CSR : SYSFEATURES0_MC_2LM_REG: 0x10
N1.C01: CSR : SYSFEATURES0_MC_2LM_REG: 0x10
Programs feature registers for MC 7
N1.C00: CSR : SYSFEATURES0_MC_2LM_REG: 0x10
N1.C01: CSR : SYSFEATURES0_MC_2LM_REG: 0x10
Programs feature registers for MC 8
N1.C00: CSR : SYSFEATURES0_MC_2LM_REG: 0x10
N1.C01: CSR : SYSFEATURES0_MC_2LM_REG: 0x10
Programs feature registers for MC 9
N1.C00: CSR : SYSFEATURES0_MC_2LM_REG: 0x10
N1.C01: CSR : SYSFEATURES0_MC_2LM_REG: 0x10
Programs feature registers for MC 10
N1.C00: CSR : SYSFEATURES0_MC_2LM_REG: 0x10
N1.C01: CSR : SYSFEATURES0_MC_2LM_REG: 0x10
Programs feature registers for MC 11
N1.C00: CSR : SYSFEATURES0_MC_2LM_REG: 0x10
N1.C01: CSR : SYSFEATURES0_MC_2LM_REG: 0x10
Programs feature registers for MC 12
N1.C00: CSR : SYSFEATURES0_MC_2LM_REG: 0x10
N1.C01: CSR : SYSFEATURES0_MC_2LM_REG: 0x10
Programs feature registers for MC 13
N1.C00: CSR : SYSFEATURES0_MC_2LM_REG: 0x10
N1.C01: CSR : SYSFEATURES0_MC_2LM_REG: 0x10
Programs feature registers for MC 14
N1.C00: CSR : SYSFEATURES0_MC_2LM_REG: 0x10
N1.C01: CSR : SYSFEATURES0_MC_2LM_REG: 0x10
Programs feature registers for MC 15
N1.C00: CSR : SYSFEATURES0_MC_2LM_REG: 0x10
N1.C01: CSR : SYSFEATURES0_MC_2LM_REG: 0x10
Checkpoint Code: Socket 0, 0xBB, 0x07, 0x0001
^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^
Write TAD CSRs for Socket: 1
^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^
Write Patrol and Sparing CSR's for MC 0
C00: TADWAYNESS[0]:
target_lid: 0 chn_lid: 0 tad_limit: 0xA1F
C00: TADBASE[0]:
mirror_en: 0 en_failover: 0 ign_ptrl_uc: 0 base: 0x820
NM_DRAM_RULE[0]:
rule_enable: 1 limit: 0xA1F nm_chn_ways: 0 nm_chn_gran: 1 nm_target_ways: 0 nm_gran_eq: 0 nm_chn_l2pid: 0x00FFFFF8
Logical Ch Id: 0 1 2 3 4 5 6 7
Physical Ch Id: 0 7 7 7 7 7 7 7
C00: NM_DRAM_RULE[0]:
Write 1LM Decoder CSR's for MC 0
C00: TADCHNILVOFFSET[0]:
target_ways: 0 chn_ways: 0 target_gran: 1 chn_gran: 1 tad_offset: 0x820 tad_offset_sign: 0
C00: MCNMCACHINGCFG:
mcnmcachingenb: 0 mcpmemenb: 0 mcnmcachingpmemwt: 0
C01: MCNMCACHINGCFG:
mcnmcachingenb: 0 mcpmemenb: 0 mcnmcachingpmemwt: 0
Write Patrol and Sparing CSR's for MC 1
C00: TADWAYNESS[0]:
target_lid: 0 chn_lid: 0 tad_limit: 0xC1F
C00: TADBASE[0]:
mirror_en: 0 en_failover: 0 ign_ptrl_uc: 0 base: 0xA20
NM_DRAM_RULE[0]:
rule_enable: 1 limit: 0xC1F nm_chn_ways: 0 nm_chn_gran: 1 nm_target_ways: 0 nm_gran_eq: 0 nm_chn_l2pid: 0x00FFFFF8
Logical Ch Id: 0 1 2 3 4 5 6 7
Physical Ch Id: 0 7 7 7 7 7 7 7
C00: NM_DRAM_RULE[0]:
Write 1LM Decoder CSR's for MC 1
C00: TADCHNILVOFFSET[0]:
target_ways: 0 chn_ways: 0 target_gran: 1 chn_gran: 1 tad_offset: 0xA20 tad_offset_sign: 0
C00: MCNMCACHINGCFG:
mcnmcachingenb: 0 mcpmemenb: 0 mcnmcachingpmemwt: 0
C01: MCNMCACHINGCFG:
mcnmcachingenb: 0 mcpmemenb: 0 mcnmcachingpmemwt: 0
Write Patrol and Sparing CSR's for MC 2
C00: TADWAYNESS[0]:
target_lid: 0 chn_lid: 0 tad_limit: 0xE1F
C00: TADBASE[0]:
mirror_en: 0 en_failover: 0 ign_ptrl_uc: 0 base: 0xC20
NM_DRAM_RULE[0]:
rule_enable: 1 limit: 0xE1F nm_chn_ways: 0 nm_chn_gran: 1 nm_target_ways: 0 nm_gran_eq: 0 nm_chn_l2pid: 0x00FFFFF8
Logical Ch Id: 0 1 2 3 4 5 6 7
Physical Ch Id: 0 7 7 7 7 7 7 7
C00: NM_DRAM_RULE[0]:
Write 1LM Decoder CSR's for MC 2
C00: TADCHNILVOFFSET[0]:
target_ways: 0 chn_ways: 0 target_gran: 1 chn_gran: 1 tad_offset: 0xC20 tad_offset_sign: 0
C00: MCNMCACHINGCFG:
mcnmcachingenb: 0 mcpmemenb: 0 mcnmcachingpmemwt: 0
C01: MCNMCACHINGCFG:
mcnmcachingenb: 0 mcpmemenb: 0 mcnmcachingpmemwt: 0
Write Patrol and Sparing CSR's for MC 3
C00: TADWAYNESS[0]:
target_lid: 0 chn_lid: 0 tad_limit: 0x101F
C00: TADBASE[0]:
mirror_en: 0 en_failover: 0 ign_ptrl_uc: 0 base: 0xE20
NM_DRAM_RULE[0]:
rule_enable: 1 limit: 0x101F nm_chn_ways: 0 nm_chn_gran: 1 nm_target_ways: 0 nm_gran_eq: 0 nm_chn_l2pid: 0x00FFFFF8
Logical Ch Id: 0 1 2 3 4 5 6 7
Physical Ch Id: 0 7 7 7 7 7 7 7
C00: NM_DRAM_RULE[0]:
Write 1LM Decoder CSR's for MC 3
C00: TADCHNILVOFFSET[0]:
target_ways: 0 chn_ways: 0 target_gran: 1 chn_gran: 1 tad_offset: 0xE20 tad_offset_sign: 0
C00: MCNMCACHINGCFG:
mcnmcachingenb: 0 mcpmemenb: 0 mcnmcachingpmemwt: 0
C01: MCNMCACHINGCFG:
mcnmcachingenb: 0 mcpmemenb: 0 mcnmcachingpmemwt: 0
Write Patrol and Sparing TAD range CSR's for HBM Stack 0 MC 0
C00: TADWAYNESS[0]:
target_lid: 0 chn_lid: 0 tad_limit: 0x1F
C00: TADBASE[0]:
mirror_en: 0 en_failover: 0 ign_ptrl_uc: 0 base: 0x0
C01: TADWAYNESS[0]:
target_lid: 0 chn_lid: 1 tad_limit: 0x1F
C01: TADBASE[0]:
mirror_en: 0 en_failover: 0 ign_ptrl_uc: 0 base: 0x0
Write Patrol and Sparing TAD range CSR's for HBM Stack 0 MC 1
C00: TADWAYNESS[0]:
target_lid: 0 chn_lid: 2 tad_limit: 0x1F
C00: TADBASE[0]:
mirror_en: 0 en_failover: 0 ign_ptrl_uc: 0 base: 0x0
C01: TADWAYNESS[0]:
target_lid: 0 chn_lid: 3 tad_limit: 0x1F
C01: TADBASE[0]:
mirror_en: 0 en_failover: 0 ign_ptrl_uc: 0 base: 0x0
Write Patrol and Sparing TAD range CSR's for HBM Stack 0 MC 2
C00: TADWAYNESS[0]:
target_lid: 0 chn_lid: 4 tad_limit: 0x1F
C00: TADBASE[0]:
mirror_en: 0 en_failover: 0 ign_ptrl_uc: 0 base: 0x0
C01: TADWAYNESS[0]:
target_lid: 0 chn_lid: 5 tad_limit: 0x1F
C01: TADBASE[0]:
mirror_en: 0 en_failover: 0 ign_ptrl_uc: 0 base: 0x0
Write Patrol and Sparing TAD range CSR's for HBM Stack 0 MC 3
C00: TADWAYNESS[0]:
target_lid: 0 chn_lid: 6 tad_limit: 0x1F
C00: TADBASE[0]:
mirror_en: 0 en_failover: 0 ign_ptrl_uc: 0 base: 0x0
C01: TADWAYNESS[0]:
target_lid: 0 chn_lid: 7 tad_limit: 0x1F
C01: TADBASE[0]:
mirror_en: 0 en_failover: 0 ign_ptrl_uc: 0 base: 0x0
Write Hbm Nm Caching Tad CSR's for HBM Stack 0 MC 0
C00: MCNMCACHINGCFG 2LM TAD:
nmcachingtaden: 1 nmcachingtad: 0
C01: MCNMCACHINGCFG 2LM TAD:
nmcachingtaden: 1 nmcachingtad: 0
Write Hbm Nm Caching Tad CSR's for HBM Stack 0 MC 1
C00: MCNMCACHINGCFG 2LM TAD:
nmcachingtaden: 1 nmcachingtad: 0
C01: MCNMCACHINGCFG 2LM TAD:
nmcachingtaden: 1 nmcachingtad: 0
Write Hbm Nm Caching Tad CSR's for HBM Stack 0 MC 2
C00: MCNMCACHINGCFG 2LM TAD:
nmcachingtaden: 1 nmcachingtad: 0
C01: MCNMCACHINGCFG 2LM TAD:
nmcachingtaden: 1 nmcachingtad: 0
Write Hbm Nm Caching Tad CSR's for HBM Stack 0 MC 3
C00: MCNMCACHINGCFG 2LM TAD:
nmcachingtaden: 1 nmcachingtad: 0
C01: MCNMCACHINGCFG 2LM TAD:
nmcachingtaden: 1 nmcachingtad: 0
Write 1LM Decoder CSR's for HBM Stack 0 MC 0
C00: TADCHNILVOFFSET[0]:
target_ways: 0 chn_ways: 0 target_gran: 1 chn_gran: 1 tad_offset: 0x0 tad_offset_sign: 0
C01: TADCHNILVOFFSET[0]:
target_ways: 0 chn_ways: 0 target_gran: 1 chn_gran: 1 tad_offset: 0x0 tad_offset_sign: 0
Write 1LM Decoder CSR's for HBM Stack 0 MC 1
C00: TADCHNILVOFFSET[0]:
target_ways: 0 chn_ways: 0 target_gran: 1 chn_gran: 1 tad_offset: 0x0 tad_offset_sign: 0
C01: TADCHNILVOFFSET[0]:
target_ways: 0 chn_ways: 0 target_gran: 1 chn_gran: 1 tad_offset: 0x0 tad_offset_sign: 0
Write 1LM Decoder CSR's for HBM Stack 0 MC 2
C00: TADCHNILVOFFSET[0]:
target_ways: 0 chn_ways: 0 target_gran: 1 chn_gran: 1 tad_offset: 0x0 tad_offset_sign: 0
C01: TADCHNILVOFFSET[0]:
target_ways: 0 chn_ways: 0 target_gran: 1 chn_gran: 1 tad_offset: 0x0 tad_offset_sign: 0
Write 1LM Decoder CSR's for HBM Stack 0 MC 3
C00: TADCHNILVOFFSET[0]:
target_ways: 0 chn_ways: 0 target_gran: 1 chn_gran: 1 tad_offset: 0x0 tad_offset_sign: 0
C01: TADCHNILVOFFSET[0]:
target_ways: 0 chn_ways: 0 target_gran: 1 chn_gran: 1 tad_offset: 0x0 tad_offset_sign: 0
Write MCNMCACHINGCFG for HBM Stack 0 MC 0
C00: MCNMCACHINGCFG:
mcnmcachingenb: 1 mcpmemenb: 0 mcnmcachingpmemwt: 0
C01: MCNMCACHINGCFG:
mcnmcachingenb: 1 mcpmemenb: 0 mcnmcachingpmemwt: 0
Write MCNMCACHINGCFG for HBM Stack 0 MC 1
C00: MCNMCACHINGCFG:
mcnmcachingenb: 1 mcpmemenb: 0 mcnmcachingpmemwt: 0
C01: MCNMCACHINGCFG:
mcnmcachingenb: 1 mcpmemenb: 0 mcnmcachingpmemwt: 0
Write MCNMCACHINGCFG for HBM Stack 0 MC 2
C00: MCNMCACHINGCFG:
mcnmcachingenb: 1 mcpmemenb: 0 mcnmcachingpmemwt: 0
C01: MCNMCACHINGCFG:
mcnmcachingenb: 1 mcpmemenb: 0 mcnmcachingpmemwt: 0
Write MCNMCACHINGCFG for HBM Stack 0 MC 3
C00: MCNMCACHINGCFG:
mcnmcachingenb: 1 mcpmemenb: 0 mcnmcachingpmemwt: 0
C01: MCNMCACHINGCFG:
mcnmcachingenb: 1 mcpmemenb: 0 mcnmcachingpmemwt: 0
Write 2LM NM Decoder CSR's for HBM Stack 0 MC 0
C00: CSR for force_lat bit : AMAP_MC_MAIN_REG: 0x52
C00: MCNMCACHINGINTLV:
nm_target_ways: 0 nm_chn_ways: 3 nm_target_lid: 0 nm_target_gran: 1 nm_chn_gran: 1 nm_chn_lid: 0
C00: MCNMCACHINGCFG_MC_2LM_REG:
en_2way: 0 prefer_way_sel: 0 chn_cap: 0xB nm_ratio_chn_cap: 0
C00: MCNMCACHINGOFFSET:
mcnmcachingoffsetlower: 0x2 mcnmcachingoffset: 0x4 mcnmcachingoffseten: 1
C01: CSR for force_lat bit : AMAP_MC_MAIN_REG: 0x52
C01: MCNMCACHINGINTLV:
nm_target_ways: 0 nm_chn_ways: 3 nm_target_lid: 0 nm_target_gran: 1 nm_chn_gran: 1 nm_chn_lid: 1
C01: MCNMCACHINGCFG_MC_2LM_REG:
en_2way: 0 prefer_way_sel: 0 chn_cap: 0xB nm_ratio_chn_cap: 0
C01: MCNMCACHINGOFFSET:
mcnmcachingoffsetlower: 0x2 mcnmcachingoffset: 0x4 mcnmcachingoffseten: 1
Write 2LM NM Decoder CSR's for HBM Stack 0 MC 1
C00: CSR for force_lat bit : AMAP_MC_MAIN_REG: 0x52
C00: MCNMCACHINGINTLV:
nm_target_ways: 0 nm_chn_ways: 3 nm_target_lid: 0 nm_target_gran: 1 nm_chn_gran: 1 nm_chn_lid: 2
C00: MCNMCACHINGCFG_MC_2LM_REG:
en_2way: 0 prefer_way_sel: 0 chn_cap: 0xB nm_ratio_chn_cap: 0
C00: MCNMCACHINGOFFSET:
mcnmcachingoffsetlower: 0x2 mcnmcachingoffset: 0x4 mcnmcachingoffseten: 1
C01: CSR for force_lat bit : AMAP_MC_MAIN_REG: 0x52
C01: MCNMCACHINGINTLV:
nm_target_ways: 0 nm_chn_ways: 3 nm_target_lid: 0 nm_target_gran: 1 nm_chn_gran: 1 nm_chn_lid: 3
C01: MCNMCACHINGCFG_MC_2LM_REG:
en_2way: 0 prefer_way_sel: 0 chn_cap: 0xB nm_ratio_chn_cap: 0
C01: MCNMCACHINGOFFSET:
mcnmcachingoffsetlower: 0x2 mcnmcachingoffset: 0x4 mcnmcachingoffseten: 1
Write 2LM NM Decoder CSR's for HBM Stack 0 MC 2
C00: CSR for force_lat bit : AMAP_MC_MAIN_REG: 0x52
C00: MCNMCACHINGINTLV:
nm_target_ways: 0 nm_chn_ways: 3 nm_target_lid: 0 nm_target_gran: 1 nm_chn_gran: 1 nm_chn_lid: 4
C00: MCNMCACHINGCFG_MC_2LM_REG:
en_2way: 0 prefer_way_sel: 0 chn_cap: 0xB nm_ratio_chn_cap: 0
C00: MCNMCACHINGOFFSET:
mcnmcachingoffsetlower: 0x2 mcnmcachingoffset: 0x4 mcnmcachingoffseten: 1
C01: CSR for force_lat bit : AMAP_MC_MAIN_REG: 0x52
C01: MCNMCACHINGINTLV:
nm_target_ways: 0 nm_chn_ways: 3 nm_target_lid: 0 nm_target_gran: 1 nm_chn_gran: 1 nm_chn_lid: 5
C01: MCNMCACHINGCFG_MC_2LM_REG:
en_2way: 0 prefer_way_sel: 0 chn_cap: 0xB nm_ratio_chn_cap: 0
C01: MCNMCACHINGOFFSET:
mcnmcachingoffsetlower: 0x2 mcnmcachingoffset: 0x4 mcnmcachingoffseten: 1
Write 2LM NM Decoder CSR's for HBM Stack 0 MC 3
C00: CSR for force_lat bit : AMAP_MC_MAIN_REG: 0x52
C00: MCNMCACHINGINTLV:
nm_target_ways: 0 nm_chn_ways: 3 nm_target_lid: 0 nm_target_gran: 1 nm_chn_gran: 1 nm_chn_lid: 6
C00: MCNMCACHINGCFG_MC_2LM_REG:
en_2way: 0 prefer_way_sel: 0 chn_cap: 0xB nm_ratio_chn_cap: 0
C00: MCNMCACHINGOFFSET:
mcnmcachingoffsetlower: 0x2 mcnmcachingoffset: 0x4 mcnmcachingoffseten: 1
C01: CSR for force_lat bit : AMAP_MC_MAIN_REG: 0x52
C01: MCNMCACHINGINTLV:
nm_target_ways: 0 nm_chn_ways: 3 nm_target_lid: 0 nm_target_gran: 1 nm_chn_gran: 1 nm_chn_lid: 7
C01: MCNMCACHINGCFG_MC_2LM_REG:
en_2way: 0 prefer_way_sel: 0 chn_cap: 0xB nm_ratio_chn_cap: 0
C01: MCNMCACHINGOFFSET:
mcnmcachingoffsetlower: 0x2 mcnmcachingoffset: 0x4 mcnmcachingoffseten: 1
Write 2LM FM Decoder CSR's for HBM Stack 0 MC 0 TAD 0
C00: DRAM_RULE[0]:
rule_enable: 1 limit: 0xA1F fm_target: 0 fm_chn_ways: 0 fm_chn_gran: 1 fm_target_ways: 0 fm_gran_eq: 0 fm_chn_l2pid: 0x00000000
C01: DRAM_RULE[0]:
rule_enable: 1 limit: 0xA1F fm_target: 0 fm_chn_ways: 0 fm_chn_gran: 1 fm_target_ways: 0 fm_gran_eq: 0 fm_chn_l2pid: 0x00000000
Write 2LM FM Decoder CSR's for HBM Stack 0 MC 1 TAD 0
C00: DRAM_RULE[0]:
rule_enable: 1 limit: 0xA1F fm_target: 0 fm_chn_ways: 0 fm_chn_gran: 1 fm_target_ways: 0 fm_gran_eq: 0 fm_chn_l2pid: 0x00000000
C01: DRAM_RULE[0]:
rule_enable: 1 limit: 0xA1F fm_target: 0 fm_chn_ways: 0 fm_chn_gran: 1 fm_target_ways: 0 fm_gran_eq: 0 fm_chn_l2pid: 0x00000000
Write 2LM FM Decoder CSR's for HBM Stack 0 MC 2 TAD 0
C00: DRAM_RULE[0]:
rule_enable: 1 limit: 0xA1F fm_target: 0 fm_chn_ways: 0 fm_chn_gran: 1 fm_target_ways: 0 fm_gran_eq: 0 fm_chn_l2pid: 0x00000000
C01: DRAM_RULE[0]:
rule_enable: 1 limit: 0xA1F fm_target: 0 fm_chn_ways: 0 fm_chn_gran: 1 fm_target_ways: 0 fm_gran_eq: 0 fm_chn_l2pid: 0x00000000
Write 2LM FM Decoder CSR's for HBM Stack 0 MC 3 TAD 0
C00: DRAM_RULE[0]:
rule_enable: 1 limit: 0xA1F fm_target: 0 fm_chn_ways: 0 fm_chn_gran: 1 fm_target_ways: 0 fm_gran_eq: 0 fm_chn_l2pid: 0x00000000
C01: DRAM_RULE[0]:
rule_enable: 1 limit: 0xA1F fm_target: 0 fm_chn_ways: 0 fm_chn_gran: 1 fm_target_ways: 0 fm_gran_eq: 0 fm_chn_l2pid: 0x00000000
Write Patrol and Sparing TAD range CSR's for HBM Stack 1 MC 0
C00: TADWAYNESS[0]:
target_lid: 0 chn_lid: 0 tad_limit: 0x1F
C00: TADBASE[0]:
mirror_en: 0 en_failover: 0 ign_ptrl_uc: 0 base: 0x0
C01: TADWAYNESS[0]:
target_lid: 0 chn_lid: 1 tad_limit: 0x1F
C01: TADBASE[0]:
mirror_en: 0 en_failover: 0 ign_ptrl_uc: 0 base: 0x0
Write Patrol and Sparing TAD range CSR's for HBM Stack 1 MC 1
C00: TADWAYNESS[0]:
target_lid: 0 chn_lid: 2 tad_limit: 0x1F
C00: TADBASE[0]:
mirror_en: 0 en_failover: 0 ign_ptrl_uc: 0 base: 0x0
C01: TADWAYNESS[0]:
target_lid: 0 chn_lid: 3 tad_limit: 0x1F
C01: TADBASE[0]:
mirror_en: 0 en_failover: 0 ign_ptrl_uc: 0 base: 0x0
Write Patrol and Sparing TAD range CSR's for HBM Stack 1 MC 2
C00: TADWAYNESS[0]:
target_lid: 0 chn_lid: 4 tad_limit: 0x1F
C00: TADBASE[0]:
mirror_en: 0 en_failover: 0 ign_ptrl_uc: 0 base: 0x0
C01: TADWAYNESS[0]:
target_lid: 0 chn_lid: 5 tad_limit: 0x1F
C01: TADBASE[0]:
mirror_en: 0 en_failover: 0 ign_ptrl_uc: 0 base: 0x0
Write Patrol and Sparing TAD range CSR's for HBM Stack 1 MC 3
C00: TADWAYNESS[0]:
target_lid: 0 chn_lid: 6 tad_limit: 0x1F
C00: TADBASE[0]:
mirror_en: 0 en_failover: 0 ign_ptrl_uc: 0 base: 0x0
C01: TADWAYNESS[0]:
target_lid: 0 chn_lid: 7 tad_limit: 0x1F
C01: TADBASE[0]:
mirror_en: 0 en_failover: 0 ign_ptrl_uc: 0 base: 0x0
Write Hbm Nm Caching Tad CSR's for HBM Stack 1 MC 0
C00: MCNMCACHINGCFG 2LM TAD:
nmcachingtaden: 1 nmcachingtad: 0
C01: MCNMCACHINGCFG 2LM TAD:
nmcachingtaden: 1 nmcachingtad: 0
Write Hbm Nm Caching Tad CSR's for HBM Stack 1 MC 1
C00: MCNMCACHINGCFG 2LM TAD:
nmcachingtaden: 1 nmcachingtad: 0
C01: MCNMCACHINGCFG 2LM TAD:
nmcachingtaden: 1 nmcachingtad: 0
Write Hbm Nm Caching Tad CSR's for HBM Stack 1 MC 2
C00: MCNMCACHINGCFG 2LM TAD:
nmcachingtaden: 1 nmcachingtad: 0
C01: MCNMCACHINGCFG 2LM TAD:
nmcachingtaden: 1 nmcachingtad: 0
Write Hbm Nm Caching Tad CSR's for HBM Stack 1 MC 3
C00: MCNMCACHINGCFG 2LM TAD:
nmcachingtaden: 1 nmcachingtad: 0
C01: MCNMCACHINGCFG 2LM TAD:
nmcachingtaden: 1 nmcachingtad: 0
Write 1LM Decoder CSR's for HBM Stack 1 MC 0
C00: TADCHNILVOFFSET[0]:
target_ways: 0 chn_ways: 0 target_gran: 1 chn_gran: 1 tad_offset: 0x0 tad_offset_sign: 0
C01: TADCHNILVOFFSET[0]:
target_ways: 0 chn_ways: 0 target_gran: 1 chn_gran: 1 tad_offset: 0x0 tad_offset_sign: 0
Write 1LM Decoder CSR's for HBM Stack 1 MC 1
C00: TADCHNILVOFFSET[0]:
target_ways: 0 chn_ways: 0 target_gran: 1 chn_gran: 1 tad_offset: 0x0 tad_offset_sign: 0
C01: TADCHNILVOFFSET[0]:
target_ways: 0 chn_ways: 0 target_gran: 1 chn_gran: 1 tad_offset: 0x0 tad_offset_sign: 0
Write 1LM Decoder CSR's for HBM Stack 1 MC 2
C00: TADCHNILVOFFSET[0]:
target_ways: 0 chn_ways: 0 target_gran: 1 chn_gran: 1 tad_offset: 0x0 tad_offset_sign: 0
C01: TADCHNILVOFFSET[0]:
target_ways: 0 chn_ways: 0 target_gran: 1 chn_gran: 1 tad_offset: 0x0 tad_offset_sign: 0
Write 1LM Decoder CSR's for HBM Stack 1 MC 3
C00: TADCHNILVOFFSET[0]:
target_ways: 0 chn_ways: 0 target_gran: 1 chn_gran: 1 tad_offset: 0x0 tad_offset_sign: 0
C01: TADCHNILVOFFSET[0]:
target_ways: 0 chn_ways: 0 target_gran: 1 chn_gran: 1 tad_offset: 0x0 tad_offset_sign: 0
Write MCNMCACHINGCFG for HBM Stack 1 MC 0
C00: MCNMCACHINGCFG:
mcnmcachingenb: 1 mcpmemenb: 0 mcnmcachingpmemwt: 0
C01: MCNMCACHINGCFG:
mcnmcachingenb: 1 mcpmemenb: 0 mcnmcachingpmemwt: 0
Write MCNMCACHINGCFG for HBM Stack 1 MC 1
C00: MCNMCACHINGCFG:
mcnmcachingenb: 1 mcpmemenb: 0 mcnmcachingpmemwt: 0
C01: MCNMCACHINGCFG:
mcnmcachingenb: 1 mcpmemenb: 0 mcnmcachingpmemwt: 0
Write MCNMCACHINGCFG for HBM Stack 1 MC 2
C00: MCNMCACHINGCFG:
mcnmcachingenb: 1 mcpmemenb: 0 mcnmcachingpmemwt: 0
C01: MCNMCACHINGCFG:
mcnmcachingenb: 1 mcpmemenb: 0 mcnmcachingpmemwt: 0
Write MCNMCACHINGCFG for HBM Stack 1 MC 3
C00: MCNMCACHINGCFG:
mcnmcachingenb: 1 mcpmemenb: 0 mcnmcachingpmemwt: 0
C01: MCNMCACHINGCFG:
mcnmcachingenb: 1 mcpmemenb: 0 mcnmcachingpmemwt: 0
Write 2LM NM Decoder CSR's for HBM Stack 1 MC 0
C00: CSR for force_lat bit : AMAP_MC_MAIN_REG: 0x52
C00: MCNMCACHINGINTLV:
nm_target_ways: 0 nm_chn_ways: 3 nm_target_lid: 0 nm_target_gran: 1 nm_chn_gran: 1 nm_chn_lid: 0
C00: MCNMCACHINGCFG_MC_2LM_REG:
en_2way: 0 prefer_way_sel: 0 chn_cap: 0xB nm_ratio_chn_cap: 0
C00: MCNMCACHINGOFFSET:
mcnmcachingoffsetlower: 0x2 mcnmcachingoffset: 0x5 mcnmcachingoffseten: 1
C01: CSR for force_lat bit : AMAP_MC_MAIN_REG: 0x52
C01: MCNMCACHINGINTLV:
nm_target_ways: 0 nm_chn_ways: 3 nm_target_lid: 0 nm_target_gran: 1 nm_chn_gran: 1 nm_chn_lid: 1
C01: MCNMCACHINGCFG_MC_2LM_REG:
en_2way: 0 prefer_way_sel: 0 chn_cap: 0xB nm_ratio_chn_cap: 0
C01: MCNMCACHINGOFFSET:
mcnmcachingoffsetlower: 0x2 mcnmcachingoffset: 0x5 mcnmcachingoffseten: 1
Write 2LM NM Decoder CSR's for HBM Stack 1 MC 1
C00: CSR for force_lat bit : AMAP_MC_MAIN_REG: 0x52
C00: MCNMCACHINGINTLV:
nm_target_ways: 0 nm_chn_ways: 3 nm_target_lid: 0 nm_target_gran: 1 nm_chn_gran: 1 nm_chn_lid: 2
C00: MCNMCACHINGCFG_MC_2LM_REG:
en_2way: 0 prefer_way_sel: 0 chn_cap: 0xB nm_ratio_chn_cap: 0
C00: MCNMCACHINGOFFSET:
mcnmcachingoffsetlower: 0x2 mcnmcachingoffset: 0x5 mcnmcachingoffseten: 1
C01: CSR for force_lat bit : AMAP_MC_MAIN_REG: 0x52
C01: MCNMCACHINGINTLV:
nm_target_ways: 0 nm_chn_ways: 3 nm_target_lid: 0 nm_target_gran: 1 nm_chn_gran: 1 nm_chn_lid: 3
C01: MCNMCACHINGCFG_MC_2LM_REG:
en_2way: 0 prefer_way_sel: 0 chn_cap: 0xB nm_ratio_chn_cap: 0
C01: MCNMCACHINGOFFSET:
mcnmcachingoffsetlower: 0x2 mcnmcachingoffset: 0x5 mcnmcachingoffseten: 1
Write 2LM NM Decoder CSR's for HBM Stack 1 MC 2
C00: CSR for force_lat bit : AMAP_MC_MAIN_REG: 0x52
C00: MCNMCACHINGINTLV:
nm_target_ways: 0 nm_chn_ways: 3 nm_target_lid: 0 nm_target_gran: 1 nm_chn_gran: 1 nm_chn_lid: 4
C00: MCNMCACHINGCFG_MC_2LM_REG:
en_2way: 0 prefer_way_sel: 0 chn_cap: 0xB nm_ratio_chn_cap: 0
C00: MCNMCACHINGOFFSET:
mcnmcachingoffsetlower: 0x2 mcnmcachingoffset: 0x5 mcnmcachingoffseten: 1
C01: CSR for force_lat bit : AMAP_MC_MAIN_REG: 0x52
C01: MCNMCACHINGINTLV:
nm_target_ways: 0 nm_chn_ways: 3 nm_target_lid: 0 nm_target_gran: 1 nm_chn_gran: 1 nm_chn_lid: 5
C01: MCNMCACHINGCFG_MC_2LM_REG:
en_2way: 0 prefer_way_sel: 0 chn_cap: 0xB nm_ratio_chn_cap: 0
C01: MCNMCACHINGOFFSET:
mcnmcachingoffsetlower: 0x2 mcnmcachingoffset: 0x5 mcnmcachingoffseten: 1
Write 2LM NM Decoder CSR's for HBM Stack 1 MC 3
C00: CSR for force_lat bit : AMAP_MC_MAIN_REG: 0x52
C00: MCNMCACHINGINTLV:
nm_target_ways: 0 nm_chn_ways: 3 nm_target_lid: 0 nm_target_gran: 1 nm_chn_gran: 1 nm_chn_lid: 6
C00: MCNMCACHINGCFG_MC_2LM_REG:
en_2way: 0 prefer_way_sel: 0 chn_cap: 0xB nm_ratio_chn_cap: 0
C00: MCNMCACHINGOFFSET:
mcnmcachingoffsetlower: 0x2 mcnmcachingoffset: 0x5 mcnmcachingoffseten: 1
C01: CSR for force_lat bit : AMAP_MC_MAIN_REG: 0x52
C01: MCNMCACHINGINTLV:
nm_target_ways: 0 nm_chn_ways: 3 nm_target_lid: 0 nm_target_gran: 1 nm_chn_gran: 1 nm_chn_lid: 7
C01: MCNMCACHINGCFG_MC_2LM_REG:
en_2way: 0 prefer_way_sel: 0 chn_cap: 0xB nm_ratio_chn_cap: 0
C01: MCNMCACHINGOFFSET:
mcnmcachingoffsetlower: 0x2 mcnmcachingoffset: 0x5 mcnmcachingoffseten: 1
Write 2LM FM Decoder CSR's for HBM Stack 1 MC 0 TAD 0
C00: DRAM_RULE[0]:
rule_enable: 1 limit: 0xC1F fm_target: 0 fm_chn_ways: 0 fm_chn_gran: 1 fm_target_ways: 0 fm_gran_eq: 0 fm_chn_l2pid: 0x00000000
C01: DRAM_RULE[0]:
rule_enable: 1 limit: 0xC1F fm_target: 0 fm_chn_ways: 0 fm_chn_gran: 1 fm_target_ways: 0 fm_gran_eq: 0 fm_chn_l2pid: 0x00000000
Write 2LM FM Decoder CSR's for HBM Stack 1 MC 1 TAD 0
C00: DRAM_RULE[0]:
rule_enable: 1 limit: 0xC1F fm_target: 0 fm_chn_ways: 0 fm_chn_gran: 1 fm_target_ways: 0 fm_gran_eq: 0 fm_chn_l2pid: 0x00000000
C01: DRAM_RULE[0]:
rule_enable: 1 limit: 0xC1F fm_target: 0 fm_chn_ways: 0 fm_chn_gran: 1 fm_target_ways: 0 fm_gran_eq: 0 fm_chn_l2pid: 0x00000000
Write 2LM FM Decoder CSR's for HBM Stack 1 MC 2 TAD 0
C00: DRAM_RULE[0]:
rule_enable: 1 limit: 0xC1F fm_target: 0 fm_chn_ways: 0 fm_chn_gran: 1 fm_target_ways: 0 fm_gran_eq: 0 fm_chn_l2pid: 0x00000000
C01: DRAM_RULE[0]:
rule_enable: 1 limit: 0xC1F fm_target: 0 fm_chn_ways: 0 fm_chn_gran: 1 fm_target_ways: 0 fm_gran_eq: 0 fm_chn_l2pid: 0x00000000
Write 2LM FM Decoder CSR's for HBM Stack 1 MC 3 TAD 0
C00: DRAM_RULE[0]:
rule_enable: 1 limit: 0xC1F fm_target: 0 fm_chn_ways: 0 fm_chn_gran: 1 fm_target_ways: 0 fm_gran_eq: 0 fm_chn_l2pid: 0x00000000
C01: DRAM_RULE[0]:
rule_enable: 1 limit: 0xC1F fm_target: 0 fm_chn_ways: 0 fm_chn_gran: 1 fm_target_ways: 0 fm_gran_eq: 0 fm_chn_l2pid: 0x00000000
Write Patrol and Sparing TAD range CSR's for HBM Stack 2 MC 0
C00: TADWAYNESS[0]:
target_lid: 0 chn_lid: 0 tad_limit: 0x1F
C00: TADBASE[0]:
mirror_en: 0 en_failover: 0 ign_ptrl_uc: 0 base: 0x0
C01: TADWAYNESS[0]:
target_lid: 0 chn_lid: 1 tad_limit: 0x1F
C01: TADBASE[0]:
mirror_en: 0 en_failover: 0 ign_ptrl_uc: 0 base: 0x0
Write Patrol and Sparing TAD range CSR's for HBM Stack 2 MC 1
C00: TADWAYNESS[0]:
target_lid: 0 chn_lid: 2 tad_limit: 0x1F
C00: TADBASE[0]:
mirror_en: 0 en_failover: 0 ign_ptrl_uc: 0 base: 0x0
C01: TADWAYNESS[0]:
target_lid: 0 chn_lid: 3 tad_limit: 0x1F
C01: TADBASE[0]:
mirror_en: 0 en_failover: 0 ign_ptrl_uc: 0 base: 0x0
Write Patrol and Sparing TAD range CSR's for HBM Stack 2 MC 2
C00: TADWAYNESS[0]:
target_lid: 0 chn_lid: 4 tad_limit: 0x1F
C00: TADBASE[0]:
mirror_en: 0 en_failover: 0 ign_ptrl_uc: 0 base: 0x0
C01: TADWAYNESS[0]:
target_lid: 0 chn_lid: 5 tad_limit: 0x1F
C01: TADBASE[0]:
mirror_en: 0 en_failover: 0 ign_ptrl_uc: 0 base: 0x0
Write Patrol and Sparing TAD range CSR's for HBM Stack 2 MC 3
C00: TADWAYNESS[0]:
target_lid: 0 chn_lid: 6 tad_limit: 0x1F
C00: TADBASE[0]:
mirror_en: 0 en_failover: 0 ign_ptrl_uc: 0 base: 0x0
C01: TADWAYNESS[0]:
target_lid: 0 chn_lid: 7 tad_limit: 0x1F
C01: TADBASE[0]:
mirror_en: 0 en_failover: 0 ign_ptrl_uc: 0 base: 0x0
Write Hbm Nm Caching Tad CSR's for HBM Stack 2 MC 0
C00: MCNMCACHINGCFG 2LM TAD:
nmcachingtaden: 1 nmcachingtad: 0
C01: MCNMCACHINGCFG 2LM TAD:
nmcachingtaden: 1 nmcachingtad: 0
Write Hbm Nm Caching Tad CSR's for HBM Stack 2 MC 1
C00: MCNMCACHINGCFG 2LM TAD:
nmcachingtaden: 1 nmcachingtad: 0
C01: MCNMCACHINGCFG 2LM TAD:
nmcachingtaden: 1 nmcachingtad: 0
Write Hbm Nm Caching Tad CSR's for HBM Stack 2 MC 2
C00: MCNMCACHINGCFG 2LM TAD:
nmcachingtaden: 1 nmcachingtad: 0
C01: MCNMCACHINGCFG 2LM TAD:
nmcachingtaden: 1 nmcachingtad: 0
Write Hbm Nm Caching Tad CSR's for HBM Stack 2 MC 3
C00: MCNMCACHINGCFG 2LM TAD:
nmcachingtaden: 1 nmcachingtad: 0
C01: MCNMCACHINGCFG 2LM TAD:
nmcachingtaden: 1 nmcachingtad: 0
Write 1LM Decoder CSR's for HBM Stack 2 MC 0
C00: TADCHNILVOFFSET[0]:
target_ways: 0 chn_ways: 0 target_gran: 1 chn_gran: 1 tad_offset: 0x0 tad_offset_sign: 0
C01: TADCHNILVOFFSET[0]:
target_ways: 0 chn_ways: 0 target_gran: 1 chn_gran: 1 tad_offset: 0x0 tad_offset_sign: 0
Write 1LM Decoder CSR's for HBM Stack 2 MC 1
C00: TADCHNILVOFFSET[0]:
target_ways: 0 chn_ways: 0 target_gran: 1 chn_gran: 1 tad_offset: 0x0 tad_offset_sign: 0
C01: TADCHNILVOFFSET[0]:
target_ways: 0 chn_ways: 0 target_gran: 1 chn_gran: 1 tad_offset: 0x0 tad_offset_sign: 0
Write 1LM Decoder CSR's for HBM Stack 2 MC 2
C00: TADCHNILVOFFSET[0]:
target_ways: 0 chn_ways: 0 target_gran: 1 chn_gran: 1 tad_offset: 0x0 tad_offset_sign: 0
C01: TADCHNILVOFFSET[0]:
target_ways: 0 chn_ways: 0 target_gran: 1 chn_gran: 1 tad_offset: 0x0 tad_offset_sign: 0
Write 1LM Decoder CSR's for HBM Stack 2 MC 3
C00: TADCHNILVOFFSET[0]:
target_ways: 0 chn_ways: 0 target_gran: 1 chn_gran: 1 tad_offset: 0x0 tad_offset_sign: 0
C01: TADCHNILVOFFSET[0]:
target_ways: 0 chn_ways: 0 target_gran: 1 chn_gran: 1 tad_offset: 0x0 tad_offset_sign: 0
Write MCNMCACHINGCFG for HBM Stack 2 MC 0
C00: MCNMCACHINGCFG:
mcnmcachingenb: 1 mcpmemenb: 0 mcnmcachingpmemwt: 0
C01: MCNMCACHINGCFG:
mcnmcachingenb: 1 mcpmemenb: 0 mcnmcachingpmemwt: 0
Write MCNMCACHINGCFG for HBM Stack 2 MC 1
C00: MCNMCACHINGCFG:
mcnmcachingenb: 1 mcpmemenb: 0 mcnmcachingpmemwt: 0
C01: MCNMCACHINGCFG:
mcnmcachingenb: 1 mcpmemenb: 0 mcnmcachingpmemwt: 0
Write MCNMCACHINGCFG for HBM Stack 2 MC 2
C00: MCNMCACHINGCFG:
mcnmcachingenb: 1 mcpmemenb: 0 mcnmcachingpmemwt: 0
C01: MCNMCACHINGCFG:
mcnmcachingenb: 1 mcpmemenb: 0 mcnmcachingpmemwt: 0
Write MCNMCACHINGCFG for HBM Stack 2 MC 3
C00: MCNMCACHINGCFG:
mcnmcachingenb: 1 mcpmemenb: 0 mcnmcachingpmemwt: 0
C01: MCNMCACHINGCFG:
mcnmcachingenb: 1 mcpmemenb: 0 mcnmcachingpmemwt: 0
Write 2LM NM Decoder CSR's for HBM Stack 2 MC 0
C00: CSR for force_lat bit : AMAP_MC_MAIN_REG: 0x52
C00: MCNMCACHINGINTLV:
nm_target_ways: 0 nm_chn_ways: 3 nm_target_lid: 0 nm_target_gran: 1 nm_chn_gran: 1 nm_chn_lid: 0
C00: MCNMCACHINGCFG_MC_2LM_REG:
en_2way: 0 prefer_way_sel: 0 chn_cap: 0xB nm_ratio_chn_cap: 0
C00: MCNMCACHINGOFFSET:
mcnmcachingoffsetlower: 0x2 mcnmcachingoffset: 0x6 mcnmcachingoffseten: 1
C01: CSR for force_lat bit : AMAP_MC_MAIN_REG: 0x52
C01: MCNMCACHINGINTLV:
nm_target_ways: 0 nm_chn_ways: 3 nm_target_lid: 0 nm_target_gran: 1 nm_chn_gran: 1 nm_chn_lid: 1
C01: MCNMCACHINGCFG_MC_2LM_REG:
en_2way: 0 prefer_way_sel: 0 chn_cap: 0xB nm_ratio_chn_cap: 0
C01: MCNMCACHINGOFFSET:
mcnmcachingoffsetlower: 0x2 mcnmcachingoffset: 0x6 mcnmcachingoffseten: 1
Write 2LM NM Decoder CSR's for HBM Stack 2 MC 1
C00: CSR for force_lat bit : AMAP_MC_MAIN_REG: 0x52
C00: MCNMCACHINGINTLV:
nm_target_ways: 0 nm_chn_ways: 3 nm_target_lid: 0 nm_target_gran: 1 nm_chn_gran: 1 nm_chn_lid: 2
C00: MCNMCACHINGCFG_MC_2LM_REG:
en_2way: 0 prefer_way_sel: 0 chn_cap: 0xB nm_ratio_chn_cap: 0
C00: MCNMCACHINGOFFSET:
mcnmcachingoffsetlower: 0x2 mcnmcachingoffset: 0x6 mcnmcachingoffseten: 1
C01: CSR for force_lat bit : AMAP_MC_MAIN_REG: 0x52
C01: MCNMCACHINGINTLV:
nm_target_ways: 0 nm_chn_ways: 3 nm_target_lid: 0 nm_target_gran: 1 nm_chn_gran: 1 nm_chn_lid: 3
C01: MCNMCACHINGCFG_MC_2LM_REG:
en_2way: 0 prefer_way_sel: 0 chn_cap: 0xB nm_ratio_chn_cap: 0
C01: MCNMCACHINGOFFSET:
mcnmcachingoffsetlower: 0x2 mcnmcachingoffset: 0x6 mcnmcachingoffseten: 1
Write 2LM NM Decoder CSR's for HBM Stack 2 MC 2
C00: CSR for force_lat bit : AMAP_MC_MAIN_REG: 0x52
C00: MCNMCACHINGINTLV:
nm_target_ways: 0 nm_chn_ways: 3 nm_target_lid: 0 nm_target_gran: 1 nm_chn_gran: 1 nm_chn_lid: 4
C00: MCNMCACHINGCFG_MC_2LM_REG:
en_2way: 0 prefer_way_sel: 0 chn_cap: 0xB nm_ratio_chn_cap: 0
C00: MCNMCACHINGOFFSET:
mcnmcachingoffsetlower: 0x2 mcnmcachingoffset: 0x6 mcnmcachingoffseten: 1
C01: CSR for force_lat bit : AMAP_MC_MAIN_REG: 0x52
C01: MCNMCACHINGINTLV:
nm_target_ways: 0 nm_chn_ways: 3 nm_target_lid: 0 nm_target_gran: 1 nm_chn_gran: 1 nm_chn_lid: 5
C01: MCNMCACHINGCFG_MC_2LM_REG:
en_2way: 0 prefer_way_sel: 0 chn_cap: 0xB nm_ratio_chn_cap: 0
C01: MCNMCACHINGOFFSET:
mcnmcachingoffsetlower: 0x2 mcnmcachingoffset: 0x6 mcnmcachingoffseten: 1
Write 2LM NM Decoder CSR's for HBM Stack 2 MC 3
C00: CSR for force_lat bit : AMAP_MC_MAIN_REG: 0x52
C00: MCNMCACHINGINTLV:
nm_target_ways: 0 nm_chn_ways: 3 nm_target_lid: 0 nm_target_gran: 1 nm_chn_gran: 1 nm_chn_lid: 6
C00: MCNMCACHINGCFG_MC_2LM_REG:
en_2way: 0 prefer_way_sel: 0 chn_cap: 0xB nm_ratio_chn_cap: 0
C00: MCNMCACHINGOFFSET:
mcnmcachingoffsetlower: 0x2 mcnmcachingoffset: 0x6 mcnmcachingoffseten: 1
C01: CSR for force_lat bit : AMAP_MC_MAIN_REG: 0x52
C01: MCNMCACHINGINTLV:
nm_target_ways: 0 nm_chn_ways: 3 nm_target_lid: 0 nm_target_gran: 1 nm_chn_gran: 1 nm_chn_lid: 7
C01: MCNMCACHINGCFG_MC_2LM_REG:
en_2way: 0 prefer_way_sel: 0 chn_cap: 0xB nm_ratio_chn_cap: 0
C01: MCNMCACHINGOFFSET:
mcnmcachingoffsetlower: 0x2 mcnmcachingoffset: 0x6 mcnmcachingoffseten: 1
Write 2LM FM Decoder CSR's for HBM Stack 2 MC 0 TAD 0
C00: DRAM_RULE[0]:
rule_enable: 1 limit: 0xE1F fm_target: 0 fm_chn_ways: 0 fm_chn_gran: 1 fm_target_ways: 0 fm_gran_eq: 0 fm_chn_l2pid: 0x00000000
C01: DRAM_RULE[0]:
rule_enable: 1 limit: 0xE1F fm_target: 0 fm_chn_ways: 0 fm_chn_gran: 1 fm_target_ways: 0 fm_gran_eq: 0 fm_chn_l2pid: 0x00000000
Write 2LM FM Decoder CSR's for HBM Stack 2 MC 1 TAD 0
C00: DRAM_RULE[0]:
rule_enable: 1 limit: 0xE1F fm_target: 0 fm_chn_ways: 0 fm_chn_gran: 1 fm_target_ways: 0 fm_gran_eq: 0 fm_chn_l2pid: 0x00000000
C01: DRAM_RULE[0]:
rule_enable: 1 limit: 0xE1F fm_target: 0 fm_chn_ways: 0 fm_chn_gran: 1 fm_target_ways: 0 fm_gran_eq: 0 fm_chn_l2pid: 0x00000000
Write 2LM FM Decoder CSR's for HBM Stack 2 MC 2 TAD 0
C00: DRAM_RULE[0]:
rule_enable: 1 limit: 0xE1F fm_target: 0 fm_chn_ways: 0 fm_chn_gran: 1 fm_target_ways: 0 fm_gran_eq: 0 fm_chn_l2pid: 0x00000000
C01: DRAM_RULE[0]:
rule_enable: 1 limit: 0xE1F fm_target: 0 fm_chn_ways: 0 fm_chn_gran: 1 fm_target_ways: 0 fm_gran_eq: 0 fm_chn_l2pid: 0x00000000
Write 2LM FM Decoder CSR's for HBM Stack 2 MC 3 TAD 0
C00: DRAM_RULE[0]:
rule_enable: 1 limit: 0xE1F fm_target: 0 fm_chn_ways: 0 fm_chn_gran: 1 fm_target_ways: 0 fm_gran_eq: 0 fm_chn_l2pid: 0x00000000
C01: DRAM_RULE[0]:
rule_enable: 1 limit: 0xE1F fm_target: 0 fm_chn_ways: 0 fm_chn_gran: 1 fm_target_ways: 0 fm_gran_eq: 0 fm_chn_l2pid: 0x00000000
Write Patrol and Sparing TAD range CSR's for HBM Stack 3 MC 0
C00: TADWAYNESS[0]:
target_lid: 0 chn_lid: 0 tad_limit: 0x1F
C00: TADBASE[0]:
mirror_en: 0 en_failover: 0 ign_ptrl_uc: 0 base: 0x0
C01: TADWAYNESS[0]:
target_lid: 0 chn_lid: 1 tad_limit: 0x1F
C01: TADBASE[0]:
mirror_en: 0 en_failover: 0 ign_ptrl_uc: 0 base: 0x0
Write Patrol and Sparing TAD range CSR's for HBM Stack 3 MC 1
C00: TADWAYNESS[0]:
target_lid: 0 chn_lid: 2 tad_limit: 0x1F
C00: TADBASE[0]:
mirror_en: 0 en_failover: 0 ign_ptrl_uc: 0 base: 0x0
C01: TADWAYNESS[0]:
target_lid: 0 chn_lid: 3 tad_limit: 0x1F
C01: TADBASE[0]:
mirror_en: 0 en_failover: 0 ign_ptrl_uc: 0 base: 0x0
Write Patrol and Sparing TAD range CSR's for HBM Stack 3 MC 2
C00: TADWAYNESS[0]:
target_lid: 0 chn_lid: 4 tad_limit: 0x1F
C00: TADBASE[0]:
mirror_en: 0 en_failover: 0 ign_ptrl_uc: 0 base: 0x0
C01: TADWAYNESS[0]:
target_lid: 0 chn_lid: 5 tad_limit: 0x1F
C01: TADBASE[0]:
mirror_en: 0 en_failover: 0 ign_ptrl_uc: 0 base: 0x0
Write Patrol and Sparing TAD range CSR's for HBM Stack 3 MC 3
C00: TADWAYNESS[0]:
target_lid: 0 chn_lid: 6 tad_limit: 0x1F
C00: TADBASE[0]:
mirror_en: 0 en_failover: 0 ign_ptrl_uc: 0 base: 0x0
C01: TADWAYNESS[0]:
target_lid: 0 chn_lid: 7 tad_limit: 0x1F
C01: TADBASE[0]:
mirror_en: 0 en_failover: 0 ign_ptrl_uc: 0 base: 0x0
Write Hbm Nm Caching Tad CSR's for HBM Stack 3 MC 0
C00: MCNMCACHINGCFG 2LM TAD:
nmcachingtaden: 1 nmcachingtad: 0
C01: MCNMCACHINGCFG 2LM TAD:
nmcachingtaden: 1 nmcachingtad: 0
Write Hbm Nm Caching Tad CSR's for HBM Stack 3 MC 1
C00: MCNMCACHINGCFG 2LM TAD:
nmcachingtaden: 1 nmcachingtad: 0
C01: MCNMCACHINGCFG 2LM TAD:
nmcachingtaden: 1 nmcachingtad: 0
Write Hbm Nm Caching Tad CSR's for HBM Stack 3 MC 2
C00: MCNMCACHINGCFG 2LM TAD:
nmcachingtaden: 1 nmcachingtad: 0
C01: MCNMCACHINGCFG 2LM TAD:
nmcachingtaden: 1 nmcachingtad: 0
Write Hbm Nm Caching Tad CSR's for HBM Stack 3 MC 3
C00: MCNMCACHINGCFG 2LM TAD:
nmcachingtaden: 1 nmcachingtad: 0
C01: MCNMCACHINGCFG 2LM TAD:
nmcachingtaden: 1 nmcachingtad: 0
Write 1LM Decoder CSR's for HBM Stack 3 MC 0
C00: TADCHNILVOFFSET[0]:
target_ways: 0 chn_ways: 0 target_gran: 1 chn_gran: 1 tad_offset: 0x0 tad_offset_sign: 0
C01: TADCHNILVOFFSET[0]:
target_ways: 0 chn_ways: 0 target_gran: 1 chn_gran: 1 tad_offset: 0x0 tad_offset_sign: 0
Write 1LM Decoder CSR's for HBM Stack 3 MC 1
C00: TADCHNILVOFFSET[0]:
target_ways: 0 chn_ways: 0 target_gran: 1 chn_gran: 1 tad_offset: 0x0 tad_offset_sign: 0
C01: TADCHNILVOFFSET[0]:
target_ways: 0 chn_ways: 0 target_gran: 1 chn_gran: 1 tad_offset: 0x0 tad_offset_sign: 0
Write 1LM Decoder CSR's for HBM Stack 3 MC 2
C00: TADCHNILVOFFSET[0]:
target_ways: 0 chn_ways: 0 target_gran: 1 chn_gran: 1 tad_offset: 0x0 tad_offset_sign: 0
C01: TADCHNILVOFFSET[0]:
target_ways: 0 chn_ways: 0 target_gran: 1 chn_gran: 1 tad_offset: 0x0 tad_offset_sign: 0
Write 1LM Decoder CSR's for HBM Stack 3 MC 3
C00: TADCHNILVOFFSET[0]:
target_ways: 0 chn_ways: 0 target_gran: 1 chn_gran: 1 tad_offset: 0x0 tad_offset_sign: 0
C01: TADCHNILVOFFSET[0]:
target_ways: 0 chn_ways: 0 target_gran: 1 chn_gran: 1 tad_offset: 0x0 tad_offset_sign: 0
Write MCNMCACHINGCFG for HBM Stack 3 MC 0
C00: MCNMCACHINGCFG:
mcnmcachingenb: 1 mcpmemenb: 0 mcnmcachingpmemwt: 0
C01: MCNMCACHINGCFG:
mcnmcachingenb: 1 mcpmemenb: 0 mcnmcachingpmemwt: 0
Write MCNMCACHINGCFG for HBM Stack 3 MC 1
C00: MCNMCACHINGCFG:
mcnmcachingenb: 1 mcpmemenb: 0 mcnmcachingpmemwt: 0
C01: MCNMCACHINGCFG:
mcnmcachingenb: 1 mcpmemenb: 0 mcnmcachingpmemwt: 0
Write MCNMCACHINGCFG for HBM Stack 3 MC 2
C00: MCNMCACHINGCFG:
mcnmcachingenb: 1 mcpmemenb: 0 mcnmcachingpmemwt: 0
C01: MCNMCACHINGCFG:
mcnmcachingenb: 1 mcpmemenb: 0 mcnmcachingpmemwt: 0
Write MCNMCACHINGCFG for HBM Stack 3 MC 3
C00: MCNMCACHINGCFG:
mcnmcachingenb: 1 mcpmemenb: 0 mcnmcachingpmemwt: 0
C01: MCNMCACHINGCFG:
mcnmcachingenb: 1 mcpmemenb: 0 mcnmcachingpmemwt: 0
Write 2LM NM Decoder CSR's for HBM Stack 3 MC 0
C00: CSR for force_lat bit : AMAP_MC_MAIN_REG: 0x52
C00: MCNMCACHINGINTLV:
nm_target_ways: 0 nm_chn_ways: 3 nm_target_lid: 0 nm_target_gran: 1 nm_chn_gran: 1 nm_chn_lid: 0
C00: MCNMCACHINGCFG_MC_2LM_REG:
en_2way: 0 prefer_way_sel: 0 chn_cap: 0xB nm_ratio_chn_cap: 0
C00: MCNMCACHINGOFFSET:
mcnmcachingoffsetlower: 0x2 mcnmcachingoffset: 0x7 mcnmcachingoffseten: 1
C01: CSR for force_lat bit : AMAP_MC_MAIN_REG: 0x52
C01: MCNMCACHINGINTLV:
nm_target_ways: 0 nm_chn_ways: 3 nm_target_lid: 0 nm_target_gran: 1 nm_chn_gran: 1 nm_chn_lid: 1
C01: MCNMCACHINGCFG_MC_2LM_REG:
en_2way: 0 prefer_way_sel: 0 chn_cap: 0xB nm_ratio_chn_cap: 0
C01: MCNMCACHINGOFFSET:
mcnmcachingoffsetlower: 0x2 mcnmcachingoffset: 0x7 mcnmcachingoffseten: 1
Write 2LM NM Decoder CSR's for HBM Stack 3 MC 1
C00: CSR for force_lat bit : AMAP_MC_MAIN_REG: 0x52
C00: MCNMCACHINGINTLV:
nm_target_ways: 0 nm_chn_ways: 3 nm_target_lid: 0 nm_target_gran: 1 nm_chn_gran: 1 nm_chn_lid: 2
C00: MCNMCACHINGCFG_MC_2LM_REG:
en_2way: 0 prefer_way_sel: 0 chn_cap: 0xB nm_ratio_chn_cap: 0
C00: MCNMCACHINGOFFSET:
mcnmcachingoffsetlower: 0x2 mcnmcachingoffset: 0x7 mcnmcachingoffseten: 1
C01: CSR for force_lat bit : AMAP_MC_MAIN_REG: 0x52
C01: MCNMCACHINGINTLV:
nm_target_ways: 0 nm_chn_ways: 3 nm_target_lid: 0 nm_target_gran: 1 nm_chn_gran: 1 nm_chn_lid: 3
C01: MCNMCACHINGCFG_MC_2LM_REG:
en_2way: 0 prefer_way_sel: 0 chn_cap: 0xB nm_ratio_chn_cap: 0
C01: MCNMCACHINGOFFSET:
mcnmcachingoffsetlower: 0x2 mcnmcachingoffset: 0x7 mcnmcachingoffseten: 1
Write 2LM NM Decoder CSR's for HBM Stack 3 MC 2
C00: CSR for force_lat bit : AMAP_MC_MAIN_REG: 0x52
C00: MCNMCACHINGINTLV:
nm_target_ways: 0 nm_chn_ways: 3 nm_target_lid: 0 nm_target_gran: 1 nm_chn_gran: 1 nm_chn_lid: 4
C00: MCNMCACHINGCFG_MC_2LM_REG:
en_2way: 0 prefer_way_sel: 0 chn_cap: 0xB nm_ratio_chn_cap: 0
C00: MCNMCACHINGOFFSET:
mcnmcachingoffsetlower: 0x2 mcnmcachingoffset: 0x7 mcnmcachingoffseten: 1
C01: CSR for force_lat bit : AMAP_MC_MAIN_REG: 0x52
C01: MCNMCACHINGINTLV:
nm_target_ways: 0 nm_chn_ways: 3 nm_target_lid: 0 nm_target_gran: 1 nm_chn_gran: 1 nm_chn_lid: 5
C01: MCNMCACHINGCFG_MC_2LM_REG:
en_2way: 0 prefer_way_sel: 0 chn_cap: 0xB nm_ratio_chn_cap: 0
C01: MCNMCACHINGOFFSET:
mcnmcachingoffsetlower: 0x2 mcnmcachingoffset: 0x7 mcnmcachingoffseten: 1
Write 2LM NM Decoder CSR's for HBM Stack 3 MC 3
C00: CSR for force_lat bit : AMAP_MC_MAIN_REG: 0x52
C00: MCNMCACHINGINTLV:
nm_target_ways: 0 nm_chn_ways: 3 nm_target_lid: 0 nm_target_gran: 1 nm_chn_gran: 1 nm_chn_lid: 6
C00: MCNMCACHINGCFG_MC_2LM_REG:
en_2way: 0 prefer_way_sel: 0 chn_cap: 0xB nm_ratio_chn_cap: 0
C00: MCNMCACHINGOFFSET:
mcnmcachingoffsetlower: 0x2 mcnmcachingoffset: 0x7 mcnmcachingoffseten: 1
C01: CSR for force_lat bit : AMAP_MC_MAIN_REG: 0x52
C01: MCNMCACHINGINTLV:
nm_target_ways: 0 nm_chn_ways: 3 nm_target_lid: 0 nm_target_gran: 1 nm_chn_gran: 1 nm_chn_lid: 7
C01: MCNMCACHINGCFG_MC_2LM_REG:
en_2way: 0 prefer_way_sel: 0 chn_cap: 0xB nm_ratio_chn_cap: 0
C01: MCNMCACHINGOFFSET:
mcnmcachingoffsetlower: 0x2 mcnmcachingoffset: 0x7 mcnmcachingoffseten: 1
Write 2LM FM Decoder CSR's for HBM Stack 3 MC 0 TAD 0
C00: DRAM_RULE[0]:
rule_enable: 1 limit: 0x101F fm_target: 0 fm_chn_ways: 0 fm_chn_gran: 1 fm_target_ways: 0 fm_gran_eq: 0 fm_chn_l2pid: 0x00000000
C01: DRAM_RULE[0]:
rule_enable: 1 limit: 0x101F fm_target: 0 fm_chn_ways: 0 fm_chn_gran: 1 fm_target_ways: 0 fm_gran_eq: 0 fm_chn_l2pid: 0x00000000
Write 2LM FM Decoder CSR's for HBM Stack 3 MC 1 TAD 0
C00: DRAM_RULE[0]:
rule_enable: 1 limit: 0x101F fm_target: 0 fm_chn_ways: 0 fm_chn_gran: 1 fm_target_ways: 0 fm_gran_eq: 0 fm_chn_l2pid: 0x00000000
C01: DRAM_RULE[0]:
rule_enable: 1 limit: 0x101F fm_target: 0 fm_chn_ways: 0 fm_chn_gran: 1 fm_target_ways: 0 fm_gran_eq: 0 fm_chn_l2pid: 0x00000000
Write 2LM FM Decoder CSR's for HBM Stack 3 MC 2 TAD 0
C00: DRAM_RULE[0]:
rule_enable: 1 limit: 0x101F fm_target: 0 fm_chn_ways: 0 fm_chn_gran: 1 fm_target_ways: 0 fm_gran_eq: 0 fm_chn_l2pid: 0x00000000
C01: DRAM_RULE[0]:
rule_enable: 1 limit: 0x101F fm_target: 0 fm_chn_ways: 0 fm_chn_gran: 1 fm_target_ways: 0 fm_gran_eq: 0 fm_chn_l2pid: 0x00000000
Write 2LM FM Decoder CSR's for HBM Stack 3 MC 3 TAD 0
C00: DRAM_RULE[0]:
rule_enable: 1 limit: 0x101F fm_target: 0 fm_chn_ways: 0 fm_chn_gran: 1 fm_target_ways: 0 fm_gran_eq: 0 fm_chn_l2pid: 0x00000000
C01: DRAM_RULE[0]:
rule_enable: 1 limit: 0x101F fm_target: 0 fm_chn_ways: 0 fm_chn_gran: 1 fm_target_ways: 0 fm_gran_eq: 0 fm_chn_l2pid: 0x00000000
Checkpoint Code: Socket 0, 0xBB, 0x08, 0x0001
^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^
Write RIR CSRs for Socket: 1
^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^
Channel - 0
RIRWAYNESSLIMIT_0_MC_MAIN_REG
rir_val: 1 rir_limit: 0x1F rir_way: 0x0
RIRILV0OFFSET_0_MC_MAIN_REG
rir_rnk_tgt0: 0x0 rir_offset0: 0x0
RIRILV1OFFSET_0_MC_MAIN_REG
rir_rnk_tgt0: 0x0 rir_offset0: 0x0
RIRILV2OFFSET_0_MC_MAIN_REG
rir_rnk_tgt0: 0x0 rir_offset0: 0x0
RIRILV3OFFSET_0_MC_MAIN_REG
rir_rnk_tgt0: 0x0 rir_offset0: 0x0
RIRILV4OFFSET_0_MC_MAIN_REG
rir_rnk_tgt0: 0x0 rir_offset0: 0x0
RIRILV5OFFSET_0_MC_MAIN_REG
rir_rnk_tgt0: 0x0 rir_offset0: 0x0
RIRILV6OFFSET_0_MC_MAIN_REG
rir_rnk_tgt0: 0x0 rir_offset0: 0x0
RIRILV7OFFSET_0_MC_MAIN_REG
rir_rnk_tgt0: 0x0 rir_offset0: 0x0
RIRWAYNESSLIMIT_1_MC_MAIN_REG
rir_val: 0 rir_limit: 0x1F rir_way: 0x0
RIRILV0OFFSET_1_MC_MAIN_REG
rir_rnk_tgt0: 0x0 rir_offset0: 0x0
RIRILV1OFFSET_1_MC_MAIN_REG
rir_rnk_tgt0: 0x0 rir_offset0: 0x0
RIRILV2OFFSET_1_MC_MAIN_REG
rir_rnk_tgt0: 0x0 rir_offset0: 0x0
RIRILV3OFFSET_1_MC_MAIN_REG
rir_rnk_tgt0: 0x0 rir_offset0: 0x0
RIRILV4OFFSET_1_MC_MAIN_REG
rir_rnk_tgt0: 0x0 rir_offset0: 0x0
RIRILV5OFFSET_1_MC_MAIN_REG
rir_rnk_tgt0: 0x0 rir_offset0: 0x0
RIRILV6OFFSET_1_MC_MAIN_REG
rir_rnk_tgt0: 0x0 rir_offset0: 0x0
RIRILV7OFFSET_1_MC_MAIN_REG
rir_rnk_tgt0: 0x0 rir_offset0: 0x0
RIRWAYNESSLIMIT_2_MC_MAIN_REG
rir_val: 0 rir_limit: 0x1F rir_way: 0x0
RIRILV0OFFSET_2_MC_MAIN_REG
rir_rnk_tgt0: 0x0 rir_offset0: 0x0
RIRILV1OFFSET_2_MC_MAIN_REG
rir_rnk_tgt0: 0x0 rir_offset0: 0x0
RIRILV2OFFSET_2_MC_MAIN_REG
rir_rnk_tgt0: 0x0 rir_offset0: 0x0
RIRILV3OFFSET_2_MC_MAIN_REG
rir_rnk_tgt0: 0x0 rir_offset0: 0x0
RIRILV4OFFSET_2_MC_MAIN_REG
rir_rnk_tgt0: 0x0 rir_offset0: 0x0
RIRILV5OFFSET_2_MC_MAIN_REG
rir_rnk_tgt0: 0x0 rir_offset0: 0x0
RIRILV6OFFSET_2_MC_MAIN_REG
rir_rnk_tgt0: 0x0 rir_offset0: 0x0
RIRILV7OFFSET_2_MC_MAIN_REG
rir_rnk_tgt0: 0x0 rir_offset0: 0x0
RIRWAYNESSLIMIT_3_MC_MAIN_REG
rir_val: 0 rir_limit: 0x1F rir_way: 0x0
RIRILV0OFFSET_3_MC_MAIN_REG
rir_rnk_tgt0: 0x0 rir_offset0: 0x0
RIRILV1OFFSET_3_MC_MAIN_REG
rir_rnk_tgt0: 0x0 rir_offset0: 0x0
RIRILV2OFFSET_3_MC_MAIN_REG
rir_rnk_tgt0: 0x0 rir_offset0: 0x0
RIRILV3OFFSET_3_MC_MAIN_REG
rir_rnk_tgt0: 0x0 rir_offset0: 0x0
RIRILV4OFFSET_3_MC_MAIN_REG
rir_rnk_tgt0: 0x0 rir_offset0: 0x0
RIRILV5OFFSET_3_MC_MAIN_REG
rir_rnk_tgt0: 0x0 rir_offset0: 0x0
RIRILV6OFFSET_3_MC_MAIN_REG
rir_rnk_tgt0: 0x0 rir_offset0: 0x0
RIRILV7OFFSET_3_MC_MAIN_REG
rir_rnk_tgt0: 0x0 rir_offset0: 0x0
Channel - 2
RIRWAYNESSLIMIT_0_MC_MAIN_REG
rir_val: 1 rir_limit: 0x1F rir_way: 0x0
RIRILV0OFFSET_0_MC_MAIN_REG
rir_rnk_tgt0: 0x0 rir_offset0: 0x0
RIRILV1OFFSET_0_MC_MAIN_REG
rir_rnk_tgt0: 0x0 rir_offset0: 0x0
RIRILV2OFFSET_0_MC_MAIN_REG
rir_rnk_tgt0: 0x0 rir_offset0: 0x0
RIRILV3OFFSET_0_MC_MAIN_REG
rir_rnk_tgt0: 0x0 rir_offset0: 0x0
RIRILV4OFFSET_0_MC_MAIN_REG
rir_rnk_tgt0: 0x0 rir_offset0: 0x0
RIRILV5OFFSET_0_MC_MAIN_REG
rir_rnk_tgt0: 0x0 rir_offset0: 0x0
RIRILV6OFFSET_0_MC_MAIN_REG
rir_rnk_tgt0: 0x0 rir_offset0: 0x0
RIRILV7OFFSET_0_MC_MAIN_REG
rir_rnk_tgt0: 0x0 rir_offset0: 0x0
RIRWAYNESSLIMIT_1_MC_MAIN_REG
rir_val: 0 rir_limit: 0x1F rir_way: 0x0
RIRILV0OFFSET_1_MC_MAIN_REG
rir_rnk_tgt0: 0x0 rir_offset0: 0x0
RIRILV1OFFSET_1_MC_MAIN_REG
rir_rnk_tgt0: 0x0 rir_offset0: 0x0
RIRILV2OFFSET_1_MC_MAIN_REG
rir_rnk_tgt0: 0x0 rir_offset0: 0x0
RIRILV3OFFSET_1_MC_MAIN_REG
rir_rnk_tgt0: 0x0 rir_offset0: 0x0
RIRILV4OFFSET_1_MC_MAIN_REG
rir_rnk_tgt0: 0x0 rir_offset0: 0x0
RIRILV5OFFSET_1_MC_MAIN_REG
rir_rnk_tgt0: 0x0 rir_offset0: 0x0
RIRILV6OFFSET_1_MC_MAIN_REG
rir_rnk_tgt0: 0x0 rir_offset0: 0x0
RIRILV7OFFSET_1_MC_MAIN_REG
rir_rnk_tgt0: 0x0 rir_offset0: 0x0
RIRWAYNESSLIMIT_2_MC_MAIN_REG
rir_val: 0 rir_limit: 0x1F rir_way: 0x0
RIRILV0OFFSET_2_MC_MAIN_REG
rir_rnk_tgt0: 0x0 rir_offset0: 0x0
RIRILV1OFFSET_2_MC_MAIN_REG
rir_rnk_tgt0: 0x0 rir_offset0: 0x0
RIRILV2OFFSET_2_MC_MAIN_REG
rir_rnk_tgt0: 0x0 rir_offset0: 0x0
RIRILV3OFFSET_2_MC_MAIN_REG
rir_rnk_tgt0: 0x0 rir_offset0: 0x0
RIRILV4OFFSET_2_MC_MAIN_REG
rir_rnk_tgt0: 0x0 rir_offset0: 0x0
RIRILV5OFFSET_2_MC_MAIN_REG
rir_rnk_tgt0: 0x0 rir_offset0: 0x0
RIRILV6OFFSET_2_MC_MAIN_REG
rir_rnk_tgt0: 0x0 rir_offset0: 0x0
RIRILV7OFFSET_2_MC_MAIN_REG
rir_rnk_tgt0: 0x0 rir_offset0: 0x0
RIRWAYNESSLIMIT_3_MC_MAIN_REG
rir_val: 0 rir_limit: 0x1F rir_way: 0x0
RIRILV0OFFSET_3_MC_MAIN_REG
rir_rnk_tgt0: 0x0 rir_offset0: 0x0
RIRILV1OFFSET_3_MC_MAIN_REG
rir_rnk_tgt0: 0x0 rir_offset0: 0x0
RIRILV2OFFSET_3_MC_MAIN_REG
rir_rnk_tgt0: 0x0 rir_offset0: 0x0
RIRILV3OFFSET_3_MC_MAIN_REG
rir_rnk_tgt0: 0x0 rir_offset0: 0x0
RIRILV4OFFSET_3_MC_MAIN_REG
rir_rnk_tgt0: 0x0 rir_offset0: 0x0
RIRILV5OFFSET_3_MC_MAIN_REG
rir_rnk_tgt0: 0x0 rir_offset0: 0x0
RIRILV6OFFSET_3_MC_MAIN_REG
rir_rnk_tgt0: 0x0 rir_offset0: 0x0
RIRILV7OFFSET_3_MC_MAIN_REG
rir_rnk_tgt0: 0x0 rir_offset0: 0x0
Channel - 4
RIRWAYNESSLIMIT_0_MC_MAIN_REG
rir_val: 1 rir_limit: 0x1F rir_way: 0x0
RIRILV0OFFSET_0_MC_MAIN_REG
rir_rnk_tgt0: 0x0 rir_offset0: 0x0
RIRILV1OFFSET_0_MC_MAIN_REG
rir_rnk_tgt0: 0x0 rir_offset0: 0x0
RIRILV2OFFSET_0_MC_MAIN_REG
rir_rnk_tgt0: 0x0 rir_offset0: 0x0
RIRILV3OFFSET_0_MC_MAIN_REG
rir_rnk_tgt0: 0x0 rir_offset0: 0x0
RIRILV4OFFSET_0_MC_MAIN_REG
rir_rnk_tgt0: 0x0 rir_offset0: 0x0
RIRILV5OFFSET_0_MC_MAIN_REG
rir_rnk_tgt0: 0x0 rir_offset0: 0x0
RIRILV6OFFSET_0_MC_MAIN_REG
rir_rnk_tgt0: 0x0 rir_offset0: 0x0
RIRILV7OFFSET_0_MC_MAIN_REG
rir_rnk_tgt0: 0x0 rir_offset0: 0x0
RIRWAYNESSLIMIT_1_MC_MAIN_REG
rir_val: 0 rir_limit: 0x1F rir_way: 0x0
RIRILV0OFFSET_1_MC_MAIN_REG
rir_rnk_tgt0: 0x0 rir_offset0: 0x0
RIRILV1OFFSET_1_MC_MAIN_REG
rir_rnk_tgt0: 0x0 rir_offset0: 0x0
RIRILV2OFFSET_1_MC_MAIN_REG
rir_rnk_tgt0: 0x0 rir_offset0: 0x0
RIRILV3OFFSET_1_MC_MAIN_REG
rir_rnk_tgt0: 0x0 rir_offset0: 0x0
RIRILV4OFFSET_1_MC_MAIN_REG
rir_rnk_tgt0: 0x0 rir_offset0: 0x0
RIRILV5OFFSET_1_MC_MAIN_REG
rir_rnk_tgt0: 0x0 rir_offset0: 0x0
RIRILV6OFFSET_1_MC_MAIN_REG
rir_rnk_tgt0: 0x0 rir_offset0: 0x0
RIRILV7OFFSET_1_MC_MAIN_REG
rir_rnk_tgt0: 0x0 rir_offset0: 0x0
RIRWAYNESSLIMIT_2_MC_MAIN_REG
rir_val: 0 rir_limit: 0x1F rir_way: 0x0
RIRILV0OFFSET_2_MC_MAIN_REG
rir_rnk_tgt0: 0x0 rir_offset0: 0x0
RIRILV1OFFSET_2_MC_MAIN_REG
rir_rnk_tgt0: 0x0 rir_offset0: 0x0
RIRILV2OFFSET_2_MC_MAIN_REG
rir_rnk_tgt0: 0x0 rir_offset0: 0x0
RIRILV3OFFSET_2_MC_MAIN_REG
rir_rnk_tgt0: 0x0 rir_offset0: 0x0
RIRILV4OFFSET_2_MC_MAIN_REG
rir_rnk_tgt0: 0x0 rir_offset0: 0x0
RIRILV5OFFSET_2_MC_MAIN_REG
rir_rnk_tgt0: 0x0 rir_offset0: 0x0
RIRILV6OFFSET_2_MC_MAIN_REG
rir_rnk_tgt0: 0x0 rir_offset0: 0x0
RIRILV7OFFSET_2_MC_MAIN_REG
rir_rnk_tgt0: 0x0 rir_offset0: 0x0
RIRWAYNESSLIMIT_3_MC_MAIN_REG
rir_val: 0 rir_limit: 0x1F rir_way: 0x0
RIRILV0OFFSET_3_MC_MAIN_REG
rir_rnk_tgt0: 0x0 rir_offset0: 0x0
RIRILV1OFFSET_3_MC_MAIN_REG
rir_rnk_tgt0: 0x0 rir_offset0: 0x0
RIRILV2OFFSET_3_MC_MAIN_REG
rir_rnk_tgt0: 0x0 rir_offset0: 0x0
RIRILV3OFFSET_3_MC_MAIN_REG
rir_rnk_tgt0: 0x0 rir_offset0: 0x0
RIRILV4OFFSET_3_MC_MAIN_REG
rir_rnk_tgt0: 0x0 rir_offset0: 0x0
RIRILV5OFFSET_3_MC_MAIN_REG
rir_rnk_tgt0: 0x0 rir_offset0: 0x0
RIRILV6OFFSET_3_MC_MAIN_REG
rir_rnk_tgt0: 0x0 rir_offset0: 0x0
RIRILV7OFFSET_3_MC_MAIN_REG
rir_rnk_tgt0: 0x0 rir_offset0: 0x0
Channel - 6
RIRWAYNESSLIMIT_0_MC_MAIN_REG
rir_val: 1 rir_limit: 0x1F rir_way: 0x0
RIRILV0OFFSET_0_MC_MAIN_REG
rir_rnk_tgt0: 0x0 rir_offset0: 0x0
RIRILV1OFFSET_0_MC_MAIN_REG
rir_rnk_tgt0: 0x0 rir_offset0: 0x0
RIRILV2OFFSET_0_MC_MAIN_REG
rir_rnk_tgt0: 0x0 rir_offset0: 0x0
RIRILV3OFFSET_0_MC_MAIN_REG
rir_rnk_tgt0: 0x0 rir_offset0: 0x0
RIRILV4OFFSET_0_MC_MAIN_REG
rir_rnk_tgt0: 0x0 rir_offset0: 0x0
RIRILV5OFFSET_0_MC_MAIN_REG
rir_rnk_tgt0: 0x0 rir_offset0: 0x0
RIRILV6OFFSET_0_MC_MAIN_REG
rir_rnk_tgt0: 0x0 rir_offset0: 0x0
RIRILV7OFFSET_0_MC_MAIN_REG
rir_rnk_tgt0: 0x0 rir_offset0: 0x0
RIRWAYNESSLIMIT_1_MC_MAIN_REG
rir_val: 0 rir_limit: 0x1F rir_way: 0x0
RIRILV0OFFSET_1_MC_MAIN_REG
rir_rnk_tgt0: 0x0 rir_offset0: 0x0
RIRILV1OFFSET_1_MC_MAIN_REG
rir_rnk_tgt0: 0x0 rir_offset0: 0x0
RIRILV2OFFSET_1_MC_MAIN_REG
rir_rnk_tgt0: 0x0 rir_offset0: 0x0
RIRILV3OFFSET_1_MC_MAIN_REG
rir_rnk_tgt0: 0x0 rir_offset0: 0x0
RIRILV4OFFSET_1_MC_MAIN_REG
rir_rnk_tgt0: 0x0 rir_offset0: 0x0
RIRILV5OFFSET_1_MC_MAIN_REG
rir_rnk_tgt0: 0x0 rir_offset0: 0x0
RIRILV6OFFSET_1_MC_MAIN_REG
rir_rnk_tgt0: 0x0 rir_offset0: 0x0
RIRILV7OFFSET_1_MC_MAIN_REG
rir_rnk_tgt0: 0x0 rir_offset0: 0x0
RIRWAYNESSLIMIT_2_MC_MAIN_REG
rir_val: 0 rir_limit: 0x1F rir_way: 0x0
RIRILV0OFFSET_2_MC_MAIN_REG
rir_rnk_tgt0: 0x0 rir_offset0: 0x0
RIRILV1OFFSET_2_MC_MAIN_REG
rir_rnk_tgt0: 0x0 rir_offset0: 0x0
RIRILV2OFFSET_2_MC_MAIN_REG
rir_rnk_tgt0: 0x0 rir_offset0: 0x0
RIRILV3OFFSET_2_MC_MAIN_REG
rir_rnk_tgt0: 0x0 rir_offset0: 0x0
RIRILV4OFFSET_2_MC_MAIN_REG
rir_rnk_tgt0: 0x0 rir_offset0: 0x0
RIRILV5OFFSET_2_MC_MAIN_REG
rir_rnk_tgt0: 0x0 rir_offset0: 0x0
RIRILV6OFFSET_2_MC_MAIN_REG
rir_rnk_tgt0: 0x0 rir_offset0: 0x0
RIRILV7OFFSET_2_MC_MAIN_REG
rir_rnk_tgt0: 0x0 rir_offset0: 0x0
RIRWAYNESSLIMIT_3_MC_MAIN_REG
rir_val: 0 rir_limit: 0x1F rir_way: 0x0
RIRILV0OFFSET_3_MC_MAIN_REG
rir_rnk_tgt0: 0x0 rir_offset0: 0x0
RIRILV1OFFSET_3_MC_MAIN_REG
rir_rnk_tgt0: 0x0 rir_offset0: 0x0
RIRILV2OFFSET_3_MC_MAIN_REG
rir_rnk_tgt0: 0x0 rir_offset0: 0x0
RIRILV3OFFSET_3_MC_MAIN_REG
rir_rnk_tgt0: 0x0 rir_offset0: 0x0
RIRILV4OFFSET_3_MC_MAIN_REG
rir_rnk_tgt0: 0x0 rir_offset0: 0x0
RIRILV5OFFSET_3_MC_MAIN_REG
rir_rnk_tgt0: 0x0 rir_offset0: 0x0
RIRILV6OFFSET_3_MC_MAIN_REG
rir_rnk_tgt0: 0x0 rir_offset0: 0x0
RIRILV7OFFSET_3_MC_MAIN_REG
rir_rnk_tgt0: 0x0 rir_offset0: 0x0
^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^
Write CHA CSRs for Socket: 1
^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^
TWO_LM_CONFIG_CHA_PMA_REG
enable: 0x1 mask: 0x3F mask_hi: 0x0
HA_COH_CHABC_SAD1_REG
dis_spec_rd: 0x0
lowMemBase: 0x0
lowMemSize: 0x20
highMemBase: 0x40
highMemSize: 0xFE0
TOLM: 0x1F
TOHM: 0x101F
C00: CSR for wait4bothhalves bit: AMAP_MC_MAIN_REG: 0x49
C00: CSR for wait4bothhalves bit: AMAP_MC_MAIN_REG: 0x49
C00: CSR for wait4bothhalves bit: AMAP_MC_MAIN_REG: 0x49
C00: CSR for wait4bothhalves bit: AMAP_MC_MAIN_REG: 0x49
M2mTwoWayCache: Enable 0 NonPreferredWayMask 0x001 PreferredReadFirst 1
M2mTwoWayCache: Enable 0 NonPreferredWayMask 0x001 PreferredReadFirst 1
SGX memory map status: 1
ValidPrmrrBitMap: 0x0
PrmrrCountPerPackage: 4
CPU encryptable range count: 0
Enter MemReservePsmiBuffers
Volatile memory mode not in 1LM, cannot allocate PSMI buffers.
Memory could not be reserved for PSMI buffers
N0:
<AdjustMemorySizeFieldsforMirror>
N1:
<AdjustMemorySizeFieldsforMirror>
N2:
<AdjustMemorySizeFieldsforMirror>
N3:
<AdjustMemorySizeFieldsforMirror>
N0: Total NM size:0x20
N0: SktTotMemMapSPA:0x0
N0: PMem performance knobs override disabled
N1: Total NM size:0x20
N1: SktTotMemMapSPA:0x0
N1: PMem performance knobs override disabled
DDR clustering mode is SNC4
[ScktId: 0] Initialize Memory Map - 16855ms
[ScktId: 1] Pipe Sync SBSP Variable Data -- Started
[ScktId: 0] Pipe Sync SBSP Variable Data -- Started
[ScktId: 1] Pipe Sync SBSP Variable Data - 15ms
[ScktId: 0] Pipe Sync SBSP Variable Data - 15ms
[ScktId: 1] Pipe Sync SBSP Memory Mode -- Started
[ScktId: 0] Pipe Sync SBSP Memory Mode -- Started
[ScktId: 1] Pipe Sync SBSP Memory Mode - 41ms
[ScktId: 0] Pipe Sync SBSP Memory Mode - 36ms
N1 Checked into Pipe
[ScktId: 0] TME Init Flow -- Started
[TME] Error: There is no TME encryptable memory ranges present in the system. Disabling TME...
[TME] 2lm detected! Disabling TME.
[ScktId: 0] TME Init Flow - 21ms
[ScktId: 1] Pipe Sync AP Final Error Sync -- Started
[ScktId: 0] Pipe Sync AP Final Error Sync -- Started
[ScktId: 0] Pipe Sync AP Final Error Sync - 10ms
[ScktId: 1] Pipe Sync AP Final Error Sync - 10ms
[ScktId: 0] MK-TME Flow -- Started
[ScktId: 1] MK-TME Flow -- Started
[ScktId: 1] MK-TME Flow - 7ms
[ScktId: 0] MK-TME Flow - 12ms
[ScktId: 1] Pipe Sync AP Final Error Sync -- Started
[ScktId: 0] Pipe Sync AP Final Error Sync -- Started
[ScktId: 1] Pipe Sync AP Final Error Sync - 13ms
[ScktId: 0] Pipe Sync AP Final Error Sync - 10ms
[ScktId: 1] TME Flow - PROGRAM_MSRS -- Started
[ScktId: 0] TME Flow - PROGRAM_MSRS -- Started
[ScktId: 0] TME Flow - PROGRAM_MSRS - 9ms
[ScktId: 1] TME Flow - PROGRAM_MSRS - 14ms
[ScktId: 0] Pipe Sync AP Final Error Sync -- Started
[ScktId: 1] Pipe Sync AP Final Error Sync -- Started
[ScktId: 1] Pipe Sync AP Final Error Sync - 10ms
[ScktId: 0] Pipe Sync AP Final Error Sync - 14ms
[ScktId: 1] SGX PreMem Check Capability MT -- Started
[ScktId: 0] SGX PreMem Check Capability MT -- Started
IsSafCapSupportedMt: MSR_FUSA_CAPABILITIES SafCap.Uint32 0xFE970AB800000011
[ScktId: 1] SGX PreMem Check Capability MT - 24ms
[ScktId: 0] SGX PreMem Check Capability MT - 19ms
[ScktId: 1] Pipe Sync AP Final Error Sync -- Started
[ScktId: 0] Pipe Sync AP Final Error Sync -- Started
[ScktId: 1] Pipe Sync AP Final Error Sync - 15ms
[ScktId: 0] Pipe Sync AP Final Error Sync - 10ms
[ScktId: 1] SGX PreMem Init -- Started
[ScktId: 0] SGX PreMem Init -- Started
[SGX] SgxPreMemInitSbsp BEGIN
[SGX] VerifyFeatureControl BEGIN
[SGX] MSR_IA32_FEATURE_CONTROL 0x0000000000000000
[SGX] SecurityPolicy.EnableSgx 0 SecurityPolicy.SgxLaunchControlEnable 1
[SGX] VerifyFeatureControl END
[SGX] VerifyHardwarePreconditions BEGIN
[SGX] VerifyHardwarePreconditions END
[ScktId: 1] SGX PreMem Init - 42ms
Error: GetSgxPrmrrData (Unsupported), continue...
[ScktId: 1] Pipe Sync AP Final Error Sync -- Started
Memory configuration is NOT valid for SGX!
SgxErrorCode = 0x19
[SGX] SgxPreMemInitSbsp END
[ScktId: 0] SGX PreMem Init - 61ms
[ScktId: 0] Pipe Sync AP Final Error Sync -- Started
[ScktId: 1] Pipe Sync AP Final Error Sync - 28ms
[ScktId: 0] Pipe Sync AP Final Error Sync - 5ms
[ScktId: 1] HBM Normal Mode -- Started
[ScktId: 0] HBM Normal Mode -- Started
HbmioMailbox - Disabling HBMIO uController
HbmioMailbox - Disabling HBMIO uController
Executing uc_halt on Socket 1, HBMIO 0
Executing uc_halt on Socket 0, HBMIO 0
Executing uc_halt on Socket 1, HBMIO 1
Executing uc_halt on Socket 0, HBMIO 1
Executing uc_halt on Socket 1, HBMIO 2
Executing uc_halt on Socket 0, HBMIO 2
Executing uc_halt on Socket 1, HBMIO 3
Executing uc_halt on Socket 0, HBMIO 3
Cmi Option Auto Selected
Cmi Option Auto Selected
[ScktId: 1] HBM Normal Mode - 55ms
[ScktId: 0] HBM Normal Mode - 53ms
[ScktId: 1] AP HBM Information -- Started
[ScktId: 0] AP HBM Information -- Started
[ScktId: 0] AP HBM Information - 9ms
[ScktId: 1] AP HBM Information - 13ms
[ScktId: 0] Switch to Normal Mode -- Started
[ScktId: 1] Switch to Normal Mode -- Started
S0 TME CPUID = 1
S1 TME CPUID = 1
S0 TmeActivated = 0
S1 TmeActivated = 0
S0 TME CPUID = 1
S1 TME CPUID = 1
S0 TmeActivated = 0
S1 TmeActivated = 0
S0 TME CPUID = 1
S1 TME CPUID = 1
S0 TmeActivated = 0
S1 TmeActivated = 0
S0 TME CPUID = 1
S1 TME CPUID = 1
S0 TmeActivated = 0
S1 TmeActivated = 0
S0 TME CPUID = 1
S1 TME CPUID = 1
S0 TmeActivated = 0
S1 TmeActivated = 0
S0 TME CPUID = 1
S1 TME CPUID = 1
S0 TmeActivated = 0
S1 TmeActivated = 0
S0 TME CPUID = 1
S1 TME CPUID = 1
S0 TmeActivated = 0
S1 TmeActivated = 0
S0 TME CPUID = 1
S1 TME CPUID = 1
S0 TmeActivated = 0
S1 TmeActivated = 0
S0 TME CPUID = 1
S1 TME CPUID = 1
S0 IntegrityActivated = 0
S1 IntegrityActivated = 0
DDRT-Link-Failure-WA-Applied: err_ack_timer_limit = 0xF0
DDRT-Link-Failure-WA-Applied: err_ack_timer_limit = 0xF0
DDRT-Link-Failure-WA-Applied: err_ack_cnt_limit = 0x0
DDRT-Link-Failure-WA-Applied: err_ack_cnt_limit = 0x0
DDRT-Link-Failure-WA-Applied: err_ack_timer_limit = 0xF0
DDRT-Link-Failure-WA-Applied: err_ack_timer_limit = 0xF0
DDRT-Link-Failure-WA-Applied: err_ack_cnt_limit = 0x0
DDRT-Link-Failure-WA-Applied: err_ack_cnt_limit = 0x0
DDRT-Link-Failure-WA-Applied: err_ack_timer_limit = 0xF0
DDRT-Link-Failure-WA-Applied: err_ack_timer_limit = 0xF0
DDRT-Link-Failure-WA-Applied: err_ack_cnt_limit = 0x0
DDRT-Link-Failure-WA-Applied: err_ack_cnt_limit = 0x0
DDRT-Link-Failure-WA-Applied: err_ack_timer_limit = 0xF0
DDRT-Link-Failure-WA-Applied: err_ack_timer_limit = 0xF0
DDRT-Link-Failure-WA-Applied: err_ack_cnt_limit = 0x0
DDRT-Link-Failure-WA-Applied: err_ack_cnt_limit = 0x0
LpModePmControlN0.Data Original = 0x88063
LpModePmControlN0.Data Original = 0x88063
LpModePmControlN1.Data Original = 0x71D00
LpModePmControlN1.Data Original = 0x71D00
LpModePmControlN0.Bits.datadllwakeuptime = 0x3
LpModePmControlN0.Bits.datadllwakeuptime = 0x3
LpModePmControlN1.Bits.datadllwakeuptime = 0x6
LpModePmControlN1.Bits.datadllwakeuptime = 0x6
MininalTclByHCLK = 0x13
MininalTclByHCLK = 0x13
LpModePmControlN0.Bits.lpmode_block_rd = 0x8
LpModePmControlN0.Bits.lpmode_block_rd = 0x8
LpModePmControlN0.Data New = 0xC1088063
LpModePmControlN0.Data New = 0xC1088063
LpModePmControlN1.Data New = 0x71D86
LpModePmControlN1.Data New = 0x71D86
LpModePmControlN0.Data Original = 0x88063
LpModePmControlN0.Data Original = 0x88063
LpModePmControlN1.Data Original = 0x71D00
LpModePmControlN1.Data Original = 0x71D00
LpModePmControlN0.Bits.datadllwakeuptime = 0x3
LpModePmControlN0.Bits.datadllwakeuptime = 0x3
LpModePmControlN1.Bits.datadllwakeuptime = 0x6
LpModePmControlN1.Bits.datadllwakeuptime = 0x6
MininalTclByHCLK = 0x13
MininalTclByHCLK = 0x13
LpModePmControlN0.Bits.lpmode_block_rd = 0x8
LpModePmControlN0.Bits.lpmode_block_rd = 0x8
LpModePmControlN0.Data New = 0xC1088063
LpModePmControlN0.Data New = 0xC1088063
LpModePmControlN1.Data New = 0x71D86
LpModePmControlN1.Data New = 0x71D86
LpModePmControlN0.Data Original = 0x88063
LpModePmControlN0.Data Original = 0x88063
LpModePmControlN1.Data Original = 0x71D00
LpModePmControlN1.Data Original = 0x71D00
LpModePmControlN0.Bits.datadllwakeuptime = 0x3
LpModePmControlN0.Bits.datadllwakeuptime = 0x3
LpModePmControlN1.Bits.datadllwakeuptime = 0x6
LpModePmControlN1.Bits.datadllwakeuptime = 0x6
MininalTclByHCLK = 0x13
MininalTclByHCLK = 0x13
LpModePmControlN0.Bits.lpmode_block_rd = 0x8
LpModePmControlN0.Bits.lpmode_block_rd = 0x8
LpModePmControlN0.Data New = 0xC1088063
LpModePmControlN0.Data New = 0xC1088063
LpModePmControlN1.Data New = 0x71D86
LpModePmControlN1.Data New = 0x71D86
LpModePmControlN0.Data Original = 0x88063
LpModePmControlN0.Data Original = 0x88063
LpModePmControlN1.Data Original = 0x71D00
LpModePmControlN1.Data Original = 0x71D00
LpModePmControlN0.Bits.datadllwakeuptime = 0x3
LpModePmControlN0.Bits.datadllwakeuptime = 0x3
LpModePmControlN1.Bits.datadllwakeuptime = 0x6
LpModePmControlN1.Bits.datadllwakeuptime = 0x6
MininalTclByHCLK = 0x13
MininalTclByHCLK = 0x13
LpModePmControlN0.Bits.lpmode_block_rd = 0x8
LpModePmControlN0.Bits.lpmode_block_rd = 0x8
LpModePmControlN0.Data New = 0xC1088063
LpModePmControlN0.Data New = 0xC1088063
LpModePmControlN1.Data New = 0x71D86
LpModePmControlN1.Data New = 0x71D86
[ScktId: 0] Switch to Normal Mode - 435ms
[ScktId: 1] Switch to Normal Mode - 435ms
[ScktId: 0] Init CMI Credit Programming -- Started
[ScktId: 1] Init CMI Credit Programming -- Started
Cmi Option Auto Selected
Cmi Option Auto Selected
MemMc Cmi Data Version: 1
MemMc Cmi Data Version: 1
S0 TME CPUID = 1
S1 TME CPUID = 1
S0 TmeActivated = 0
S1 TmeActivated = 0
TmeEnabled: 0
TmeEnabled: 0
TwoLmEnabled: 0
TwoLmEnabled: 0
2LM_XTILE: 0
2LM_XTILE: 0
CMI Credit Data for CPU Stepping: Ex and Later
CMI Credit Data for CPU Stepping: Ex and Later
S0 TME CPUID = 1
S1 TME CPUID = 1
S0 TmeActivated = 0
S1 TmeActivated = 0
TmeEnabled: 0
TmeEnabled: 0
TwoLmEnabled: 0
TwoLmEnabled: 0
2LM_XTILE: 0
2LM_XTILE: 0
CMI Credit Data for CPU Stepping: Ex and Later
CMI Credit Data for CPU Stepping: Ex and Later
S0 TME CPUID = 1
S1 TME CPUID = 1
S0 TmeActivated = 0
S1 TmeActivated = 0
TmeEnabled: 0
TmeEnabled: 0
TwoLmEnabled: 0
TwoLmEnabled: 0
2LM_XTILE: 0
2LM_XTILE: 0
CMI Credit Data for CPU Stepping: Ex and Later
CMI Credit Data for CPU Stepping: Ex and Later
S0 TME CPUID = 1
S1 TME CPUID = 1
S0 TmeActivated = 0
S1 TmeActivated = 0
TmeEnabled: 0
TmeEnabled: 0
TwoLmEnabled: 0
TwoLmEnabled: 0
2LM_XTILE: 0
2LM_XTILE: 0
CMI Credit Data for CPU Stepping: Ex and Later
CMI Credit Data for CPU Stepping: Ex and Later
S0 TME CPUID = 1
S1 TME CPUID = 1
S0 TmeActivated = 0
S1 TmeActivated = 0
TmeEnabled: 0
TmeEnabled: 0
TwoLmEnabled: 0
TwoLmEnabled: 0
2LM_XTILE: 0
2LM_XTILE: 0
CMI Credit Data for CPU Stepping: Ex and Later
CMI Credit Data for CPU Stepping: Ex and Later
S0 TME CPUID = 1
S1 TME CPUID = 1
S0 TmeActivated = 0
S1 TmeActivated = 0
TmeEnabled: 0
TmeEnabled: 0
TwoLmEnabled: 0
TwoLmEnabled: 0
2LM_XTILE: 0
2LM_XTILE: 0
CMI Credit Data for CPU Stepping: Ex and Later
CMI Credit Data for CPU Stepping: Ex and Later
S0 TME CPUID = 1
S1 TME CPUID = 1
S0 TmeActivated = 0
S1 TmeActivated = 0
TmeEnabled: 0
TmeEnabled: 0
TwoLmEnabled: 0
TwoLmEnabled: 0
2LM_XTILE: 0
2LM_XTILE: 0
CMI Credit Data for CPU Stepping: Ex and Later
CMI Credit Data for CPU Stepping: Ex and Later
S0 TME CPUID = 1
S1 TME CPUID = 1
S0 TmeActivated = 0
S1 TmeActivated = 0
TmeEnabled: 0
TmeEnabled: 0
TwoLmEnabled: 0
TwoLmEnabled: 0
2LM_XTILE: 0
2LM_XTILE: 0
CMI Credit Data for CPU Stepping: Ex and Later
CMI Credit Data for CPU Stepping: Ex and Later
S0 TME CPUID = 1
S1 TME CPUID = 1
S0 TmeActivated = 0
S1 TmeActivated = 0
TmeEnabled: 0
TmeEnabled: 0
TwoLmEnabled: 0
TwoLmEnabled: 0
2LM_XTILE: 0
2LM_XTILE: 0
CMI Credit Data for CPU Stepping: Ex and Later
CMI Credit Data for CPU Stepping: Ex and Later
S0 TME CPUID = 1
S1 TME CPUID = 1
S0 TmeActivated = 0
S1 TmeActivated = 0
TmeEnabled: 0
TmeEnabled: 0
TwoLmEnabled: 0
TwoLmEnabled: 0
2LM_XTILE: 0
2LM_XTILE: 0
CMI Credit Data for CPU Stepping: Ex and Later
CMI Credit Data for CPU Stepping: Ex and Later
S0 TME CPUID = 1
S1 TME CPUID = 1
S0 TmeActivated = 0
S1 TmeActivated = 0
TmeEnabled: 0
TmeEnabled: 0
TwoLmEnabled: 0
TwoLmEnabled: 0
2LM_XTILE: 0
2LM_XTILE: 0
CMI Credit Data for CPU Stepping: Ex and Later
CMI Credit Data for CPU Stepping: Ex and Later
S0 TME CPUID = 1
S1 TME CPUID = 1
S0 TmeActivated = 0
S1 TmeActivated = 0
TmeEnabled: 0
TmeEnabled: 0
TwoLmEnabled: 0
TwoLmEnabled: 0
2LM_XTILE: 0
2LM_XTILE: 0
CMI Credit Data for CPU Stepping: Ex and Later
CMI Credit Data for CPU Stepping: Ex and Later
S0 TME CPUID = 1
S1 TME CPUID = 1
S0 TmeActivated = 0
S1 TmeActivated = 0
TmeEnabled: 0
TmeEnabled: 0
TwoLmEnabled: 0
TwoLmEnabled: 0
2LM_XTILE: 0
2LM_XTILE: 0
CMI Credit Data for CPU Stepping: Ex and Later
CMI Credit Data for CPU Stepping: Ex and Later
S0 TME CPUID = 1
S1 TME CPUID = 1
S0 TmeActivated = 0
S1 TmeActivated = 0
TmeEnabled: 0
TmeEnabled: 0
TwoLmEnabled: 0
TwoLmEnabled: 0
2LM_XTILE: 0
2LM_XTILE: 0
CMI Credit Data for CPU Stepping: Ex and Later
CMI Credit Data for CPU Stepping: Ex and Later
S0 TME CPUID = 1
S1 TME CPUID = 1
S0 TmeActivated = 0
S1 TmeActivated = 0
TmeEnabled: 0
TmeEnabled: 0
TwoLmEnabled: 0
TwoLmEnabled: 0
2LM_XTILE: 0
2LM_XTILE: 0
CMI Credit Data for CPU Stepping: Ex and Later
CMI Credit Data for CPU Stepping: Ex and Later
S0 TME CPUID = 1
S1 TME CPUID = 1
S0 TmeActivated = 0
S1 TmeActivated = 0
TmeEnabled: 0
TmeEnabled: 0
TwoLmEnabled: 0
TwoLmEnabled: 0
2LM_XTILE: 0
2LM_XTILE: 0
CMI Credit Data for CPU Stepping: Ex and Later
CMI Credit Data for CPU Stepping: Ex and Later
S0 TME CPUID = 1
S1 TME CPUID = 1
S0 TmeActivated = 0
S1 TmeActivated = 0
TmeEnabled: 0
TmeEnabled: 0
TwoLmEnabled: 0
TwoLmEnabled: 0
2LM_XTILE: 0
2LM_XTILE: 0
CMI Credit Data for CPU Stepping: Ex and Later
CMI Credit Data for CPU Stepping: Ex and Later
S0 TME CPUID = 1
S1 TME CPUID = 1
S0 TmeActivated = 0
S1 TmeActivated = 0
TmeEnabled: 0
TmeEnabled: 0
TwoLmEnabled: 0
TwoLmEnabled: 0
2LM_XTILE: 0
2LM_XTILE: 0
CMI Credit Data for CPU Stepping: Ex and Later
CMI Credit Data for CPU Stepping: Ex and Later
S0 TME CPUID = 1
S1 TME CPUID = 1
S0 TmeActivated = 0
S1 TmeActivated = 0
TmeEnabled: 0
TmeEnabled: 0
TwoLmEnabled: 0
TwoLmEnabled: 0
2LM_XTILE: 0
2LM_XTILE: 0
CMI Credit Data for CPU Stepping: Ex and Later
CMI Credit Data for CPU Stepping: Ex and Later
S0 TME CPUID = 1
S1 TME CPUID = 1
S0 TmeActivated = 0
S1 TmeActivated = 0
TmeEnabled: 0
TmeEnabled: 0
TwoLmEnabled: 0
TwoLmEnabled: 0
2LM_XTILE: 0
2LM_XTILE: 0
CMI Credit Data for CPU Stepping: Ex and Later
CMI Credit Data for CPU Stepping: Ex and Later
S0 TME CPUID = 1
S1 TME CPUID = 1
S0 TmeActivated = 0
S1 TmeActivated = 0
TmeEnabled: 0
TmeEnabled: 0
TwoLmEnabled: 0
TwoLmEnabled: 0
2LM_XTILE: 0
2LM_XTILE: 0
CMI Credit Data for CPU Stepping: Ex and Later
CMI Credit Data for CPU Stepping: Ex and Later
S0 TME CPUID = 1
S1 TME CPUID = 1
S0 TmeActivated = 0
S1 TmeActivated = 0
TmeEnabled: 0
TmeEnabled: 0
TwoLmEnabled: 0
TwoLmEnabled: 0
2LM_XTILE: 0
2LM_XTILE: 0
CMI Credit Data for CPU Stepping: Ex and Later
CMI Credit Data for CPU Stepping: Ex and Later
S0 TME CPUID = 1
S1 TME CPUID = 1
S0 TmeActivated = 0
S1 TmeActivated = 0
TmeEnabled: 0
TmeEnabled: 0
TwoLmEnabled: 0
TwoLmEnabled: 0
2LM_XTILE: 0
2LM_XTILE: 0
CMI Credit Data for CPU Stepping: Ex and Later
CMI Credit Data for CPU Stepping: Ex and Later
S0 TME CPUID = 1
S1 TME CPUID = 1
S0 TmeActivated = 0
S1 TmeActivated = 0
TmeEnabled: 0
TmeEnabled: 0
TwoLmEnabled: 0
TwoLmEnabled: 0
2LM_XTILE: 0
2LM_XTILE: 0
CMI Credit Data for CPU Stepping: Ex and Later
CMI Credit Data for CPU Stepping: Ex and Later
S0 TME CPUID = 1
S1 TME CPUID = 1
S0 TmeActivated = 0
S1 TmeActivated = 0
TmeEnabled: 0
TmeEnabled: 0
TwoLmEnabled: 0
TwoLmEnabled: 0
2LM_XTILE: 0
2LM_XTILE: 0
CMI Credit Data for CPU Stepping: Ex and Later
CMI Credit Data for CPU Stepping: Ex and Later
S0 TME CPUID = 1
S1 TME CPUID = 1
S0 TmeActivated = 0
S1 TmeActivated = 0
TmeEnabled: 0
TmeEnabled: 0
TwoLmEnabled: 0
TwoLmEnabled: 0
2LM_XTILE: 0
2LM_XTILE: 0
CMI Credit Data for CPU Stepping: Ex and Later
CMI Credit Data for CPU Stepping: Ex and Later
S0 TME CPUID = 1
S1 TME CPUID = 1
S0 TmeActivated = 0
S1 TmeActivated = 0
TmeEnabled: 0
TmeEnabled: 0
TwoLmEnabled: 0
TwoLmEnabled: 0
2LM_XTILE: 0
2LM_XTILE: 0
CMI Credit Data for CPU Stepping: Ex and Later
CMI Credit Data for CPU Stepping: Ex and Later
S0 TME CPUID = 1
S1 TME CPUID = 1
S0 TmeActivated = 0
S1 TmeActivated = 0
TmeEnabled: 0
TmeEnabled: 0
TwoLmEnabled: 0
TwoLmEnabled: 0
2LM_XTILE: 0
2LM_XTILE: 0
CMI Credit Data for CPU Stepping: Ex and Later
CMI Credit Data for CPU Stepping: Ex and Later
S0 TME CPUID = 1
S1 TME CPUID = 1
S0 TmeActivated = 0
S1 TmeActivated = 0
TmeEnabled: 0
TmeEnabled: 0
TwoLmEnabled: 0
TwoLmEnabled: 0
2LM_XTILE: 0
2LM_XTILE: 0
CMI Credit Data for CPU Stepping: Ex and Later
CMI Credit Data for CPU Stepping: Ex and Later
S0 TME CPUID = 1
S1 TME CPUID = 1
S0 TmeActivated = 0
S1 TmeActivated = 0
TmeEnabled: 0
TmeEnabled: 0
TwoLmEnabled: 0
TwoLmEnabled: 0
2LM_XTILE: 0
2LM_XTILE: 0
CMI Credit Data for CPU Stepping: Ex and Later
CMI Credit Data for CPU Stepping: Ex and Later
S0 TME CPUID = 1
S1 TME CPUID = 1
S0 TmeActivated = 0
S1 TmeActivated = 0
TmeEnabled: 0
TmeEnabled: 0
TwoLmEnabled: 0
TwoLmEnabled: 0
2LM_XTILE: 0
2LM_XTILE: 0
CMI Credit Data for CPU Stepping: Ex and Later
CMI Credit Data for CPU Stepping: Ex and Later
S0 TME CPUID = 1
S1 TME CPUID = 1
S0 TmeActivated = 0
S1 TmeActivated = 0
TmeEnabled: 0
TmeEnabled: 0
TwoLmEnabled: 0
TwoLmEnabled: 0
2LM_XTILE: 0
2LM_XTILE: 0
CMI Credit Data for CPU Stepping: Ex and Later
CMI Credit Data for CPU Stepping: Ex and Later
S0 TME CPUID = 1
S1 TME CPUID = 1
S0 TmeActivated = 0
S1 TmeActivated = 0
TmeEnabled: 0
TmeEnabled: 0
TwoLmEnabled: 0
TwoLmEnabled: 0
2LM_XTILE: 0
2LM_XTILE: 0
CMI Credit Data for CPU Stepping: Ex and Later
CMI Credit Data for CPU Stepping: Ex and Later
S0 TME CPUID = 1
S1 TME CPUID = 1
S0 TmeActivated = 0
S1 TmeActivated = 0
TmeEnabled: 0
TmeEnabled: 0
TwoLmEnabled: 0
TwoLmEnabled: 0
2LM_XTILE: 0
2LM_XTILE: 0
CMI Credit Data for CPU Stepping: Ex and Later
CMI Credit Data for CPU Stepping: Ex and Later
S0 TME CPUID = 1
S1 TME CPUID = 1
S0 TmeActivated = 0
S1 TmeActivated = 0
TmeEnabled: 0
TmeEnabled: 0
TwoLmEnabled: 0
TwoLmEnabled: 0
2LM_XTILE: 0
2LM_XTILE: 0
CMI Credit Data for CPU Stepping: Ex and Later
CMI Credit Data for CPU Stepping: Ex and Later
S0 TME CPUID = 1
S1 TME CPUID = 1
S0 TmeActivated = 0
S1 TmeActivated = 0
TmeEnabled: 0
TmeEnabled: 0
TwoLmEnabled: 0
TwoLmEnabled: 0
2LM_XTILE: 0
2LM_XTILE: 0
CMI Credit Data for CPU Stepping: Ex and Later
CMI Credit Data for CPU Stepping: Ex and Later
Mesh2Mem CMI Data Version: 1
Mesh2Mem CMI Data Version: 1
S0 TME CPUID = 1
S1 TME CPUID = 1
S0 TmeActivated = 0
S1 TmeActivated = 0
TmeEnabled: 0
TmeEnabled: 0
TwoLmEnabled: 0
TwoLmEnabled: 0
2LM_XTILE: 0
2LM_XTILE: 0
CMI Credit Data for CPU Stepping: Ex and Later
CMI Credit Data for CPU Stepping: Ex and Later
S0 TME CPUID = 1
S1 TME CPUID = 1
S0 TmeActivated = 0
S1 TmeActivated = 0
TmeEnabled: 0
TmeEnabled: 0
TwoLmEnabled: 0
TwoLmEnabled: 0
2LM_XTILE: 0
2LM_XTILE: 0
CMI Credit Data for CPU Stepping: Ex and Later
CMI Credit Data for CPU Stepping: Ex and Later
S0 TME CPUID = 1
S1 TME CPUID = 1
S0 TmeActivated = 0
S1 TmeActivated = 0
TmeEnabled: 0
TmeEnabled: 0
TwoLmEnabled: 0
TwoLmEnabled: 0
2LM_XTILE: 0
2LM_XTILE: 0
CMI Credit Data for CPU Stepping: Ex and Later
CMI Credit Data for CPU Stepping: Ex and Later
S0 TME CPUID = 1
S1 TME CPUID = 1
S0 TmeActivated = 0
S1 TmeActivated = 0
McTme CMI Data Version: 1
McTme CMI Data Version: 1
S0 TME CPUID = 1
S1 TME CPUID = 1
S0 TmeActivated = 0
S1 TmeActivated = 0
TmeEnabled: 0
TmeEnabled: 0
TwoLmEnabled: 0
TwoLmEnabled: 0
2LM_XTILE: 0
2LM_XTILE: 0
CMI Credit Data for CPU Stepping: Ex and Later
CMI Credit Data for CPU Stepping: Ex and Later
S0 TME CPUID = 1
S1 TME CPUID = 1
S0 TmeActivated = 0
S1 TmeActivated = 0
TmeEnabled: 0
TmeEnabled: 0
TwoLmEnabled: 0
TwoLmEnabled: 0
2LM_XTILE: 0
2LM_XTILE: 0
CMI Credit Data for CPU Stepping: Ex and Later
CMI Credit Data for CPU Stepping: Ex and Later
S0 TME CPUID = 1
S1 TME CPUID = 1
S0 TmeActivated = 0
S1 TmeActivated = 0
TmeEnabled: 0
TmeEnabled: 0
TwoLmEnabled: 0
TwoLmEnabled: 0
2LM_XTILE: 0
2LM_XTILE: 0
CMI Credit Data for CPU Stepping: Ex and Later
CMI Credit Data for CPU Stepping: Ex and Later
S0 TME CPUID = 1
S1 TME CPUID = 1
S0 TmeActivated = 0
S1 TmeActivated = 0
TmeEnabled: 0
TmeEnabled: 0
TwoLmEnabled: 0
TwoLmEnabled: 0
2LM_XTILE: 0
2LM_XTILE: 0
CMI Credit Data for CPU Stepping: Ex and Later
CMI Credit Data for CPU Stepping: Ex and Later
S0 TME CPUID = 1
S1 TME CPUID = 1
S0 TmeActivated = 0
S1 TmeActivated = 0
TmeEnabled: 0
TmeEnabled: 0
TwoLmEnabled: 0
TwoLmEnabled: 0
2LM_XTILE: 0
2LM_XTILE: 0
CMI Credit Data for CPU Stepping: Ex and Later
CMI Credit Data for CPU Stepping: Ex and Later
Mesh2Mem CMI Data Version: 1
Mesh2Mem CMI Data Version: 1
S0 TME CPUID = 1
S1 TME CPUID = 1
S0 TmeActivated = 0
S1 TmeActivated = 0
TmeEnabled: 0
TmeEnabled: 0
TwoLmEnabled: 0
TwoLmEnabled: 0
2LM_XTILE: 0
2LM_XTILE: 0
CMI Credit Data for CPU Stepping: Ex and Later
CMI Credit Data for CPU Stepping: Ex and Later
S0 TME CPUID = 1
S1 TME CPUID = 1
S0 TmeActivated = 0
S1 TmeActivated = 0
TmeEnabled: 0
TmeEnabled: 0
TwoLmEnabled: 0
TwoLmEnabled: 0
2LM_XTILE: 0
2LM_XTILE: 0
CMI Credit Data for CPU Stepping: Ex and Later
CMI Credit Data for CPU Stepping: Ex and Later
S0 TME CPUID = 1
S1 TME CPUID = 1
S0 TmeActivated = 0
S1 TmeActivated = 0
TmeEnabled: 0
TmeEnabled: 0
TwoLmEnabled: 0
TwoLmEnabled: 0
2LM_XTILE: 0
2LM_XTILE: 0
CMI Credit Data for CPU Stepping: Ex and Later
CMI Credit Data for CPU Stepping: Ex and Later
S0 TME CPUID = 1
S1 TME CPUID = 1
S0 TmeActivated = 0
S1 TmeActivated = 0
S0 TME CPUID = 1
S1 TME CPUID = 1
S0 TmeActivated = 0
S1 TmeActivated = 0
TmeEnabled: 0
TmeEnabled: 0
TwoLmEnabled: 0
TwoLmEnabled: 0
2LM_XTILE: 0
2LM_XTILE: 0
CMI Credit Data for CPU Stepping: Ex and Later
CMI Credit Data for CPU Stepping: Ex and Later
S0 TME CPUID = 1
S1 TME CPUID = 1
S0 TmeActivated = 0
S1 TmeActivated = 0
TmeEnabled: 0
TmeEnabled: 0
TwoLmEnabled: 0
TwoLmEnabled: 0
2LM_XTILE: 0
2LM_XTILE: 0
CMI Credit Data for CPU Stepping: Ex and Later
CMI Credit Data for CPU Stepping: Ex and Later
S0 TME CPUID = 1
S1 TME CPUID = 1
S0 TmeActivated = 0
S1 TmeActivated = 0
TmeEnabled: 0
TmeEnabled: 0
TwoLmEnabled: 0
TwoLmEnabled: 0
2LM_XTILE: 0
2LM_XTILE: 0
CMI Credit Data for CPU Stepping: Ex and Later
CMI Credit Data for CPU Stepping: Ex and Later
S0 TME CPUID = 1
S1 TME CPUID = 1
S0 TmeActivated = 0
S1 TmeActivated = 0
TmeEnabled: 0
TmeEnabled: 0
TwoLmEnabled: 0
TwoLmEnabled: 0
2LM_XTILE: 0
2LM_XTILE: 0
CMI Credit Data for CPU Stepping: Ex and Later
CMI Credit Data for CPU Stepping: Ex and Later
S0 TME CPUID = 1
S1 TME CPUID = 1
S0 TmeActivated = 0
S1 TmeActivated = 0
TmeEnabled: 0
TmeEnabled: 0
TwoLmEnabled: 0
TwoLmEnabled: 0
2LM_XTILE: 0
2LM_XTILE: 0
CMI Credit Data for CPU Stepping: Ex and Later
CMI Credit Data for CPU Stepping: Ex and Later
Mesh2Mem CMI Data Version: 1
Mesh2Mem CMI Data Version: 1
S0 TME CPUID = 1
S1 TME CPUID = 1
S0 TmeActivated = 0
S1 TmeActivated = 0
TmeEnabled: 0
TmeEnabled: 0
TwoLmEnabled: 0
TwoLmEnabled: 0
2LM_XTILE: 0
2LM_XTILE: 0
CMI Credit Data for CPU Stepping: Ex and Later
CMI Credit Data for CPU Stepping: Ex and Later
S0 TME CPUID = 1
S1 TME CPUID = 1
S0 TmeActivated = 0
S1 TmeActivated = 0
TmeEnabled: 0
TmeEnabled: 0
TwoLmEnabled: 0
TwoLmEnabled: 0
2LM_XTILE: 0
2LM_XTILE: 0
CMI Credit Data for CPU Stepping: Ex and Later
CMI Credit Data for CPU Stepping: Ex and Later
S0 TME CPUID = 1
S1 TME CPUID = 1
S0 TmeActivated = 0
S1 TmeActivated = 0
TmeEnabled: 0
TmeEnabled: 0
TwoLmEnabled: 0
TwoLmEnabled: 0
2LM_XTILE: 0
2LM_XTILE: 0
CMI Credit Data for CPU Stepping: Ex and Later
CMI Credit Data for CPU Stepping: Ex and Later
S0 TME CPUID = 1
S1 TME CPUID = 1
S0 TmeActivated = 0
S1 TmeActivated = 0
S0 TME CPUID = 1
S1 TME CPUID = 1
S0 TmeActivated = 0
S1 TmeActivated = 0
TmeEnabled: 0
TmeEnabled: 0
TwoLmEnabled: 0
TwoLmEnabled: 0
2LM_XTILE: 0
2LM_XTILE: 0
CMI Credit Data for CPU Stepping: Ex and Later
CMI Credit Data for CPU Stepping: Ex and Later
S0 TME CPUID = 1
S1 TME CPUID = 1
S0 TmeActivated = 0
S1 TmeActivated = 0
TmeEnabled: 0
TmeEnabled: 0
TwoLmEnabled: 0
TwoLmEnabled: 0
2LM_XTILE: 0
2LM_XTILE: 0
CMI Credit Data for CPU Stepping: Ex and Later
CMI Credit Data for CPU Stepping: Ex and Later
S0 TME CPUID = 1
S1 TME CPUID = 1
S0 TmeActivated = 0
S1 TmeActivated = 0
TmeEnabled: 0
TmeEnabled: 0
TwoLmEnabled: 0
TwoLmEnabled: 0
2LM_XTILE: 0
2LM_XTILE: 0
CMI Credit Data for CPU Stepping: Ex and Later
CMI Credit Data for CPU Stepping: Ex and Later
S0 TME CPUID = 1
S1 TME CPUID = 1
S0 TmeActivated = 0
S1 TmeActivated = 0
TmeEnabled: 0
TmeEnabled: 0
TwoLmEnabled: 0
TwoLmEnabled: 0
2LM_XTILE: 0
2LM_XTILE: 0
CMI Credit Data for CPU Stepping: Ex and Later
CMI Credit Data for CPU Stepping: Ex and Later
S0 TME CPUID = 1
S1 TME CPUID = 1
S0 TmeActivated = 0
S1 TmeActivated = 0
TmeEnabled: 0
TmeEnabled: 0
TwoLmEnabled: 0
TwoLmEnabled: 0
2LM_XTILE: 0
2LM_XTILE: 0
CMI Credit Data for CPU Stepping: Ex and Later
CMI Credit Data for CPU Stepping: Ex and Later
Mesh2Mem CMI Data Version: 1
Mesh2Mem CMI Data Version: 1
S0 TME CPUID = 1
S1 TME CPUID = 1
S0 TmeActivated = 0
S1 TmeActivated = 0
TmeEnabled: 0
TmeEnabled: 0
TwoLmEnabled: 0
TwoLmEnabled: 0
2LM_XTILE: 0
2LM_XTILE: 0
CMI Credit Data for CPU Stepping: Ex and Later
CMI Credit Data for CPU Stepping: Ex and Later
S0 TME CPUID = 1
S1 TME CPUID = 1
S0 TmeActivated = 0
S1 TmeActivated = 0
TmeEnabled: 0
TmeEnabled: 0
TwoLmEnabled: 0
TwoLmEnabled: 0
2LM_XTILE: 0
2LM_XTILE: 0
CMI Credit Data for CPU Stepping: Ex and Later
CMI Credit Data for CPU Stepping: Ex and Later
S0 TME CPUID = 1
S1 TME CPUID = 1
S0 TmeActivated = 0
S1 TmeActivated = 0
TmeEnabled: 0
TmeEnabled: 0
TwoLmEnabled: 0
TwoLmEnabled: 0
2LM_XTILE: 0
2LM_XTILE: 0
CMI Credit Data for CPU Stepping: Ex and Later
CMI Credit Data for CPU Stepping: Ex and Later
S0 TME CPUID = 1
S1 TME CPUID = 1
S0 TmeActivated = 0
S1 TmeActivated = 0
S0 TME CPUID = 1
S1 TME CPUID = 1
S0 TmeActivated = 0
S1 TmeActivated = 0
TmeEnabled: 0
TmeEnabled: 0
TwoLmEnabled: 0
TwoLmEnabled: 0
2LM_XTILE: 0
2LM_XTILE: 0
CMI Credit Data for CPU Stepping: Ex and Later
CMI Credit Data for CPU Stepping: Ex and Later
S0 TME CPUID = 1
S1 TME CPUID = 1
S0 TmeActivated = 0
S1 TmeActivated = 0
TmeEnabled: 0
TmeEnabled: 0
TwoLmEnabled: 0
TwoLmEnabled: 0
2LM_XTILE: 0
2LM_XTILE: 0
CMI Credit Data for CPU Stepping: Ex and Later
CMI Credit Data for CPU Stepping: Ex and Later
S0 TME CPUID = 1
S1 TME CPUID = 1
S0 TmeActivated = 0
S1 TmeActivated = 0
TmeEnabled: 0
TmeEnabled: 0
TwoLmEnabled: 0
TwoLmEnabled: 0
2LM_XTILE: 0
2LM_XTILE: 0
CMI Credit Data for CPU Stepping: Ex and Later
CMI Credit Data for CPU Stepping: Ex and Later
S0 TME CPUID = 1
S1 TME CPUID = 1
S0 TmeActivated = 0
S1 TmeActivated = 0
TmeEnabled: 0
TmeEnabled: 0
TwoLmEnabled: 0
TwoLmEnabled: 0
2LM_XTILE: 0
2LM_XTILE: 0
CMI Credit Data for CPU Stepping: Ex and Later
CMI Credit Data for CPU Stepping: Ex and Later
S0 TME CPUID = 1
S1 TME CPUID = 1
S0 TmeActivated = 0
S1 TmeActivated = 0
TmeEnabled: 0
TmeEnabled: 0
TwoLmEnabled: 0
TwoLmEnabled: 0
2LM_XTILE: 0
2LM_XTILE: 0
CMI Credit Data for CPU Stepping: Ex and Later
CMI Credit Data for CPU Stepping: Ex and Later
S0 TME CPUID = 1
S1 TME CPUID = 1
S0 TmeActivated = 0
S1 TmeActivated = 0
S0 TME CPUID = 1
S1 TME CPUID = 1
S0 TmeActivated = 0
S1 TmeActivated = 0
S0 TME CPUID = 1
S1 TME CPUID = 1
S0 TmeActivated = 0
S1 TmeActivated = 0
S0 TME CPUID = 1
S1 TME CPUID = 1
S0 TmeActivated = 0
S1 TmeActivated = 0
S0 TME CPUID = 1
S1 TME CPUID = 1
S0 TmeActivated = 0
S1 TmeActivated = 0
S0 TME CPUID = 1
S1 TME CPUID = 1
S0 TmeActivated = 0
S1 TmeActivated = 0
S0 TME CPUID = 1
S1 TME CPUID = 1
S0 TmeActivated = 0
S1 TmeActivated = 0
S0 TME CPUID = 1
S1 TME CPUID = 1
S0 TmeActivated = 0
S1 TmeActivated = 0
[ScktId: 0] Init CMI Credit Programming - 1904ms
[ScktId: 1] Init CMI Credit Programming - 1902ms
[ScktId: 0] Program TME Cfg register for SGX/TDX -- Started
[ScktId: 1] Program TME Cfg register for SGX/TDX -- Started
DisableTdxTdMismatchBit return fail: Aborted
DisableTdxTdMismatchBit return fail: Aborted
[ScktId: 1] Program TME Cfg register for SGX/TDX - 17ms
[ScktId: 0] Program TME Cfg register for SGX/TDX - 26ms
[ScktId: 1] Pipe Sync AP Final Error Sync -- Started
[ScktId: 0] Pipe Sync AP Final Error Sync -- Started
[ScktId: 1] Pipe Sync AP Final Error Sync - 16ms
[ScktId: 0] Pipe Sync AP Final Error Sync - 10ms
N1 Checked into Pipe
[ScktId: 0] Initialize ADR -- Started
[ScktId: 0] Initialize ADR - 5ms
N1 Checked into Pipe
[ScktId: 0] Set RAS Configuration -- Started
N0: ProbabilisticTargetedRowRefreshInit Enable
SetPatrolScrub execution on Skt 0
N0: ScrubFactor: 86400, MemSize: 20, Scrub Interval:29E8
N0: ScrubFactor: 86400, MemSize: 20, Scrub Interval:29E8
N0: ScrubFactor: 86400, MemSize: 20, Scrub Interval:29E8
N0: ScrubFactor: 86400, MemSize: 20, Scrub Interval:29E8
N0: ScrubFactor: 86400, MemSize: 20, Scrub Interval:29E8
N0: ScrubFactor: 86400, MemSize: 20, Scrub Interval:29E8
N0: ScrubFactor: 86400, MemSize: 20, Scrub Interval:29E8
N0: ScrubFactor: 86400, MemSize: 20, Scrub Interval:29E8
N0: ScrubFactor: 86400, MemSize: 20, Scrub Interval:29E8
N0: ScrubFactor: 86400, MemSize: 20, Scrub Interval:29E8
N0: ScrubFactor: 86400, MemSize: 20, Scrub Interval:29E8
N0: ScrubFactor: 86400, MemSize: 20, Scrub Interval:29E8
N0: ScrubFactor: 86400, MemSize: 20, Scrub Interval:29E8
N0: ScrubFactor: 86400, MemSize: 20, Scrub Interval:29E8
N0: ScrubFactor: 86400, MemSize: 20, Scrub Interval:29E8
N0: ScrubFactor: 86400, MemSize: 20, Scrub Interval:29E8
[imc] ConfigSystemRetryRegister start
N1: ProbabilisticTargetedRowRefreshInit Enable
SetPatrolScrub execution on Skt 1
N1: ScrubFactor: 86400, MemSize: 20, Scrub Interval:29E8
N1: ScrubFactor: 86400, MemSize: 20, Scrub Interval:29E8
N1: ScrubFactor: 86400, MemSize: 20, Scrub Interval:29E8
N1: ScrubFactor: 86400, MemSize: 20, Scrub Interval:29E8
N1: ScrubFactor: 86400, MemSize: 20, Scrub Interval:29E8
N1: ScrubFactor: 86400, MemSize: 20, Scrub Interval:29E8
N1: ScrubFactor: 86400, MemSize: 20, Scrub Interval:29E8
N1: ScrubFactor: 86400, MemSize: 20, Scrub Interval:29E8
N1: ScrubFactor: 86400, MemSize: 20, Scrub Interval:29E8
N1: ScrubFactor: 86400, MemSize: 20, Scrub Interval:29E8
N1: ScrubFactor: 86400, MemSize: 20, Scrub Interval:29E8
N1: ScrubFactor: 86400, MemSize: 20, Scrub Interval:29E8
N1: ScrubFactor: 86400, MemSize: 20, Scrub Interval:29E8
N1: ScrubFactor: 86400, MemSize: 20, Scrub Interval:29E8
N1: ScrubFactor: 86400, MemSize: 20, Scrub Interval:29E8
N1: ScrubFactor: 86400, MemSize: 20, Scrub Interval:29E8
[imc] ConfigSystemRetryRegister start
SetRASConfig End
[ScktId: 0] Set RAS Configuration - 213ms
N1 Checked into Pipe
[ScktId: 0] Memory Late -- Started
[ScktId: 0] Memory Late - 5ms
[ScktId: 1] Print All Stats -- Started
[ScktId: 0] Print All Stats -- Started
Performance statistics for socket 1
FmcMaxCached = 0
FmcCachedReads = 0
MRC Phase | PCI | PCI | Polling |JEDEC | FixedDelay | Vref | CPGC | SMBUS | SMBUS | MRS | Duration | GetSysHostPointer
| Read | Write | Count | | Time | Count | Count | Read | Write | Write | Time | Calls
--------------------------------------------------------------------------------------------------------------------------------------------
Total Stats | 94387001| 16988584| 63205067 | 1| 2393 | 768780 | 558563 | 3264 | 33396 | 132657 | 52248 | 0 |
PreMrc | 67608| 174374| 1219 | 0| 1 | 0 | 32 | 56 | 24 | 16 | 12 | 0 |
PipeSync | 320053| 152491| 0 | 0| 0 | 0 | 0 | 0 | 0 | 0 | 512 | 0 |
InitStructLate | 12990| 3| 0 | 0| 0 | 0 | 0 | 0 | 0 | 0 | 8 | 0 |
DetectDimmConfig | 268210| 13527| 79028 | 0| 0 | 0 | 0 | 2236 | 2204 | 0 | 319 | 0 |
UnlockMemRegs | 11825| 5| 0 | 0| 0 | 0 | 0 | 0 | 0 | 0 | 7 | 0 |
HBM Pre-Training | 135332| 1707| 0 | 0| 0 | 0 | 0 | 0 | 0 | 0 | 109 | 0 |
ConfigXmp | 12402| 1| 0 | 0| 0 | 0 | 0 | 0 | 0 | 0 | 7 | 0 |
SetPmicVdd | 60017| 85| 456 | 0| 166 | 0 | 0 | 16 | 8 | 0 | 216 | 0 |
EarlyDdrTherm | 15478| 107| 0 | 0| 0 | 0 | 0 | 0 | 0 | 0 | 10 | 0 |
EarlyInitMem | 12401| 1| 0 | 0| 0 | 0 | 0 | 0 | 0 | 0 | 8 | 0 |
HBM Training | 4329853| 236| 0 | 0| 57 | 0 | 0 | 0 | 0 | 0 | 2916 | 0 |
HBM PostPkgRepair | 10922| 1| 0 | 0| 0 | 0 | 0 | 0 | 0 | 0 | 7 | 0 |
HBM Mem BIST | 11520| 1| 0 | 0| 0 | 0 | 0 | 0 | 0 | 0 | 7 | 0 |
HBM ReTraining | 11528| 1| 0 | 0| 0 | 0 | 0 | 0 | 0 | 0 | 7 | 0 |
GatherSPDData | 129016| 817| 2863 | 0| 0 | 0 | 0 | 256 | 4 | 0 | 88 | 0 |
DisplayDimmInfo | 1757856| 2| 0 | 0| 0 | 0 | 0 | 0 | 0 | 0 | 1153 | 0 |
ChannelEarlyConfig | 938543| 80597| 176 | 0| 0 | 0 | 0 | 16 | 0 | 0 | 728 | 0 |
DdrioPowerStatusCheck| 10943| 1| 0 | 0| 0 | 0 | 0 | 0 | 0 | 0 | 8 | 0 |
InitDdrioInterface | 12498| 3704| 0 | 0| 24 | 0 | 0 | 0 | 0 | 0 | 50 | 0 |
X-Over Calib | 732| 398| 0 | 0| 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 |
RcompStaticLeg | 166| 352| 0 | 0| 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 |
DdrPreTrainingInit | 121153| 744| 299 | 1| 16 | 0 | 0 | 0 | 32 | 16 | 104 | 0 |
CsClockEarly | 261025| 189277| 3592 | 0| 26 | 0 | 20 | 16 | 376 | 120 | 244 | 0 |
CaClockEarlySimple | 317220| 350850| 31872 | 0| 20 | 0 | 32 | 192 | 3268 | 3200 | 373 | 0 |
CaClockEarlyComplex| 99796| 77551| 31994 | 0| 5 | 0 | 32 | 192 | 3272 | 3208 | 170 | 0 |
CaClkEarCompRecent | 123113| 79536| 32565 | 0| 5 | 0 | 32 | 192 | 3340 | 3276 | 181 | 0 |
DcaSlewRate | 15664| 1| 0 | 0| 0 | 0 | 0 | 0 | 0 | 0 | 10 | 0 |
RcdDcaDckDutyCycle | 495431| 602311| 2324 | 0| 33 | 0 | 32 | 0 | 260 | 260 | 467 | 0 |
Lrdimm Bcom Train | 2| 1| 0 | 0| 0 | 0 | 0 | 0 | 0 | 0 | 3 | 0 |
DcaDfeTraining | 4335721| 4339202| 76281 | 0| 398 | 0 | 98800 | 0 | 8604 | 3276 | 4090 | 0 |
BsCsClockEarly | 68394| 42085| 21324 | 0| 4 | 0 | 472 | 16 | 2340 | 2320 | 112 | 0 |
BsCaClockEarly | 253513| 138195| 60483 | 0| 8 | 0 | 77 | 0 | 6776 | 6816 | 349 | 0 |
Lrdimm Pba Enu Id | 16242| 1| 0 | 0| 0 | 0 | 0 | 0 | 0 | 0 | 9 | 0 |
Early Req Clk Train| 18619| 2| 0 | 0| 0 | 0 | 0 | 0 | 0 | 0 | 9 | 0 |
LRDIMM RX | 4| 2| 0 | 0| 0 | 0 | 0 | 0 | 0 | 0 | 9 | 0 |
Receive Enable | 20230| 17337| 1686 | 0| 0 | 0 | 570 | 0 | 0 | 8 | 22 | 0 |
Rd Dq/Dqs | 449704| 304584| 56374 | 0| 11 | 44 | 7776 | 0 | 0 | 32 | 372 | 0 |
Swizzle Discovery | 1408| 2422| 48 | 0| 0 | 0 | 48 | 0 | 0 | 32 | 6 | 0 |
Dram Duty Cycle Adj| 2| 1| 0 | 0| 0 | 0 | 0 | 0 | 0 | 0 | 5 | 0 |
RdDqDqsDfeCentering| 71332| 69347| 31684 | 0| 3 | 9656 | 2644 | 0 | 0 | 364 | 96 | 0 |
READ DFE | 3456407| 2708146| 1918585 | 0| 203 | 575440 | 127376 | 0 | 0 | 25320 | 3705 | 0 |
Rx Dq/Dqs Post Dfe | 611937| 526390| 328793 | 0| 39 | 44264 | 24276 | 0 | 0 | 5220 | 687 | 0 |
Periodic Rx Retrain| 89| 21| 0 | 0| 0 | 0 | 0 | 0 | 0 | 0 | 6 | 0 |
Switch DDRT2 Mode | 10939| 33| 0 | 0| 0 | 0 | 0 | 0 | 0 | 0 | 7 | 0 |
LRDIMM TX | 5911| 1| 0 | 0| 0 | 0 | 0 | 0 | 0 | 0 | 6 | 0 |
Write Leveling | 64259| 82456| 4656 | 0| 19 | 0 | 1856 | 0 | 0 | 160 | 105 | 0 |
Wr Dq/Dqs | 474126| 732423| 50688 | 0| 8 | 48 | 17140 | 0 | 0 | 244 | 613 | 0 |
Tx DQ Slew Rate | 2| 1| 0 | 0| 0 | 0 | 0 | 0 | 0 | 0 | 4 | 0 |
WrDqDqsDfeCentering| 134336| 301558| 6216 | 0| 36 | 2452 | 15206 | 0 | 0 | 4378 | 306 | 0 |
PostPkgRepair | 8| 4| 0 | 0| 0 | 0 | 0 | 0 | 0 | 0 | 6 | 0 |
LRDIMM Bs Write | 10932| 1| 0 | 0| 0 | 0 | 0 | 0 | 0 | 0 | 9 | 0 |
DCA TCO | 540398| 609097| 25766 | 0| 31 | 0 | 240 | 0 | 2880 | 2880 | 626 | 0 |
TCO_DQDQS | 2| 1| 0 | 0| 0 | 0 | 0 | 0 | 0 | 0 | 4 | 0 |
TX ODT | 1302| 3393| 0 | 0| 0 | 0 | 216 | 0 | 0 | 72 | 8 | 0 |
WRITE DFE | 5731641| 4027238| 3989043 | 0| 659 | 110168 | 214518 | 0 | 0 | 64886 | 4766 | 0 |
WRITE DB DFE | 2| 1| 0 | 0| 0 | 0 | 0 | 0 | 0 | 0 | 4 | 0 |
Tx Dq/Dqs Post Dfe | 4306116| 327512| 4165348 | 0| 48 | 8156 | 16040 | 0 | 0 | 4548 | 1747 | 0 |
Read Post Dfe Late | 34255937| 652393| 33888187 | 0| 20 | 14600 | 18117 | 0 | 0 | 0 | 12347 | 0 |
MemSweepTester | 2| 1| 0 | 0| 0 | 0 | 0 | 0 | 0 | 0 | 3 | 0 |
Periodic Tx Retrain| 1338| 1629| 24 | 0| 0 | 0 | 16 | 0 | 0 | 4 | 7 | 0 |
Round Trip Opt | 2422565| 29095| 2395147 | 0| 1 | 0 | 1392 | 0 | 0 | 0 | 866 | 0 |
TurnaroundTrain | 1295706| 115355| 1243886 | 0| 19 | 3232 | 5935 | 0 | 0 | 1733 | 529 | 0 |
DisplayResults | 393720| 157746| 5832 | 0| 3 | 360 | 3384 | 0 | 0 | 0 | 205 | 0 |
PostTrainingInit | 15828| 373| 0 | 0| 0 | 0 | 4 | 0 | 0 | 4 | 10 | 0 |
One Time TxRt | 14239| 913| 24 | 0| 512 | 0 | 8 | 0 | 0 | 0 | 521 | 0 |
ExecuteSsaRmt | 10632| 2| 0 | 0| 0 | 0 | 0 | 0 | 0 | 0 | 7 | 0 |
Offset training | 2| 1| 0 | 0| 0 | 0 | 0 | 0 | 0 | 0 | 4 | 0 |
HBM Post-Training | 4269518| 2834| 0 | 0| 0 | 0 | 0 | 0 | 0 | 0 | 2817 | 0 |
LateConfig | 66907| 331| 40 | 0| 0 | 0 | 12 | 4 | 0 | 12 | 41 | 0 |
InitThrottling | 33227| 211| 352 | 0| 0 | 0 | 0 | 32 | 0 | 0 | 31 | 0 |
MEMTEST | 6009877| 4405| 5989651 | 0| 0 | 0 | 60 | 8 | 0 | 12 | 2031 | 0 |
HBM Mem Test | 2430380| 18443| 2420942 | 0| 0 | 0 | 256 | 0 | 0 | 0 | 1184 | 0 |
HBM Scrambling | 340| 65| 0 | 0| 0 | 0 | 0 | 0 | 0 | 0 | 4 | 0 |
HBM Mem Init | 1465231| 2985| 1441014 | 0| 0 | 0 | 32 | 0 | 0 | 0 | 706 | 0 |
Pub DIMM Manifest | 12801| 252| 263 | 0| 0 | 0 | 0 | 24 | 0 | 0 | 14 | 0 |
SvlAndScrambling | 13892| 5| 0 | 0| 0 | 0 | 0 | 0 | 0 | 0 | 9 | 0 |
CpgcOutOfOrderMode | 50| 45| 0 | 0| 0 | 0 | 0 | 0 | 0 | 0 | 5 | 0 |
EnableHostRefresh | 140321| 104| 0 | 0| 0 | 0 | 0 | 0 | 0 | 0 | 92 | 0 |
MEMINIT | 3034380| 1311| 3022128 | 0| 0 | 0 | 16 | 0 | 0 | 0 | 1221 | 0 |
CmiCreditProg | 2906738| 581| 0 | 0| 0 | 0 | 0 | 0 | 0 | 0 | 1902 | 0 |
HBM Normal Mode | 85671| 1275| 0 | 0| 0 | 0 | 0 | 0 | 0 | 0 | 55 | 0 |
Normal Mode | 659042| 1037| 136 | 0| 0 | 0 | 0 | 8 | 8 | 0 | 435 | 0 |
CallTableOverhead | 2698073| 591| 0 | 0| 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 |
Normalize CMD | 20458| 18715| 1680 | 0| 0 | 0 | 592 | 0 | 0 | 24 | 22 | 0 |
No Zone 0 | 2| 2| 0 | 0| 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 |
No Zone 1 | 0| 1| 0 | 0| 0 | 0 | 0 | 0 | 0 | 0 | 4 | 0 |
No Zone 2 | 8215| 1| 0 | 0| 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 |
No Zone 3 | 0| 3| 0 | 0| 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 |
No Zone 4 | 0| 3| 0 | 0| 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 |
No Zone 5 | 0| 3| 0 | 0| 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 |
No Zone 6 | 0| 1| 0 | 0| 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 |
No Zone 7 | 1| 0| 0 | 0| 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 |
No Zone 8 | 0| 1| 0 | 0| 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 |
No Zone 9 | 1975035| 16557| 1872398 | 0| 2 | 360 | 1304 | 0 | 0 | 216 | 1764 | 0 |
Performance statistics for socket 0
FmcMaxCached = 0
FmcCachedReads = 0
MRC Phase | PCI | PCI | Polling |JEDEC | FixedDelay | Vref | CPGC | SMBUS | SMBUS | MRS | Duration | GetSysHostPointer
| Read | Write | Count | | Time | Count | Count | Read | Write | Write | Time | Calls
--------------------------------------------------------------------------------------------------------------------------------------------
Total Stats | 109515797| 16958437| 62293117 | 1| 2395 | 755424 | 556273 | 3264 | 33460 | 133020 | 69858 | 0 |
PreMrc | 149542| 189846| 1274 | 0| 1 | 0 | 32 | 56 | 24 | 16 | 25 | 0 |
PipeSync | 610358| 130845| 0 | 0| 0 | 0 | 0 | 0 | 0 | 0 | 450 | 0 |
SelectBootMode | 11227| 5| 0 | 0| 0 | 0 | 0 | 0 | 0 | 0 | 8 | 0 |
InitStructLate | 22997| 3| 0 | 0| 0 | 0 | 0 | 0 | 0 | 0 | 8 | 0 |
DetectDimmConfig | 414808| 13527| 82120 | 0| 0 | 0 | 0 | 2236 | 2204 | 0 | 321 | 0 |
CheckPor | 11238| 4| 0 | 0| 0 | 0 | 0 | 0 | 0 | 0 | 6 | 0 |
HBM Init Clock | 11203| 4| 0 | 0| 0 | 0 | 0 | 0 | 0 | 0 | 5 | 0 |
Clock Init | 11253| 28| 0 | 0| 0 | 0 | 0 | 0 | 0 | 0 | 96 | 0 |
UnlockMemRegs | 19406| 5| 0 | 0| 0 | 0 | 0 | 0 | 0 | 0 | 7 | 0 |
HBM Pre-Training | 360927| 1709| 0 | 0| 0 | 0 | 0 | 0 | 0 | 0 | 141 | 0 |
ConfigXmp | 17369| 1| 0 | 0| 0 | 0 | 0 | 0 | 0 | 0 | 6 | 0 |
SetClkVdd | 11257| 44| 0 | 0| 0 | 0 | 0 | 0 | 0 | 0 | 5 | 0 |
SetPmicVdd | 136965| 85| 472 | 0| 166 | 0 | 0 | 16 | 8 | 0 | 223 | 0 |
CheckDimmRanks | 11281| 36| 0 | 0| 0 | 0 | 0 | 0 | 0 | 0 | 6 | 0 |
EarlyDdrTherm | 20524| 107| 0 | 0| 0 | 0 | 0 | 0 | 0 | 0 | 9 | 0 |
EarlyInitMem | 24532| 1| 0 | 0| 0 | 0 | 0 | 0 | 0 | 0 | 8 | 0 |
HBM Training | 7485001| 236| 0 | 0| 58 | 0 | 0 | 0 | 0 | 0 | 2916 | 0 |
HBM PostPkgRepair | 17879| 1| 0 | 0| 0 | 0 | 0 | 0 | 0 | 0 | 6 | 0 |
HBM Mem BIST | 16318| 1| 0 | 0| 0 | 0 | 0 | 0 | 0 | 0 | 6 | 0 |
HBM ReTraining | 17333| 1| 0 | 0| 0 | 0 | 0 | 0 | 0 | 0 | 7 | 0 |
GatherSPDData | 208785| 817| 2865 | 0| 0 | 0 | 0 | 256 | 4 | 0 | 86 | 0 |
DisplayDimmInfo | 18428| 2| 0 | 0| 0 | 0 | 0 | 0 | 0 | 0 | 580 | 0 |
ChannelEarlyConfig | 4488485| 80597| 176 | 0| 0 | 0 | 0 | 16 | 0 | 0 | 1272 | 0 |
DdrioPowerStatusCheck| 25014| 1| 0 | 0| 0 | 0 | 0 | 0 | 0 | 0 | 9 | 0 |
InitDdrioInterface | 41912| 3709| 0 | 0| 24 | 0 | 0 | 0 | 0 | 0 | 54 | 0 |
X-Over Calib | 732| 398| 0 | 0| 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 |
RcompStaticLeg | 178| 352| 0 | 0| 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 |
DdrPreTrainingInit | 244468| 744| 302 | 1| 16 | 0 | 0 | 0 | 32 | 16 | 111 | 0 |
CsClockEarly | 283019| 189277| 3621 | 0| 26 | 0 | 20 | 16 | 376 | 120 | 218 | 0 |
CaClockEarlySimple | 317684| 351018| 32172 | 0| 20 | 0 | 32 | 192 | 3276 | 3208 | 341 | 0 |
CaClockEarlyComplex| 101166| 78412| 32532 | 0| 5 | 0 | 32 | 192 | 3316 | 3252 | 161 | 0 |
CaClkEarCompRecent | 141823| 79921| 32856 | 0| 5 | 0 | 32 | 192 | 3352 | 3288 | 171 | 0 |
DcaSlewRate | 2| 1| 0 | 0| 0 | 0 | 0 | 0 | 0 | 0 | 4 | 0 |
RcdDcaDckDutyCycle | 465726| 602307| 2340 | 0| 33 | 0 | 32 | 0 | 260 | 260 | 409 | 0 |
Lrdimm Bcom Train | 2| 1| 0 | 0| 0 | 0 | 0 | 0 | 0 | 0 | 3 | 0 |
DcaDfeTraining | 4336876| 4339202| 77436 | 0| 398 | 0 | 98800 | 0 | 8604 | 3276 | 3663 | 0 |
BsCsClockEarly | 68462| 42085| 21392 | 0| 4 | 0 | 472 | 16 | 2340 | 2320 | 104 | 0 |
BsCaClockEarly | 254014| 138195| 60984 | 0| 8 | 0 | 77 | 0 | 6776 | 6816 | 323 | 0 |
Lrdimm Pba Enu Id | 2| 1| 0 | 0| 0 | 0 | 0 | 0 | 0 | 0 | 3 | 0 |
Early Req Clk Train| 4| 2| 0 | 0| 0 | 0 | 0 | 0 | 0 | 0 | 3 | 0 |
LRDIMM RX | 2405138| 2| 0 | 0| 0 | 0 | 0 | 0 | 0 | 0 | 465 | 0 |
Receive Enable | 46297| 17336| 1686 | 0| 0 | 0 | 570 | 0 | 0 | 8 | 24 | 0 |
Rd Dq/Dqs | 450958| 304582| 57628 | 0| 11 | 44 | 7776 | 0 | 0 | 32 | 341 | 0 |
Swizzle Discovery | 20798| 2422| 48 | 0| 0 | 0 | 48 | 0 | 0 | 32 | 10 | 0 |
Dram Duty Cycle Adj| 2| 1| 0 | 0| 0 | 0 | 0 | 0 | 0 | 0 | 5 | 0 |
RdDqDqsDfeCentering| 87326| 68688| 30129 | 0| 3 | 10008 | 2628 | 0 | 0 | 364 | 93 | 0 |
READ DFE | 3298071| 2676889| 1788521 | 0| 201 | 562536 | 125888 | 0 | 0 | 25320 | 3375 | 0 |
Rx Dq/Dqs Post Dfe | 611905| 527851| 326025 | 0| 39 | 44284 | 24420 | 0 | 0 | 5220 | 643 | 0 |
Periodic Rx Retrain| 95| 21| 0 | 0| 0 | 0 | 0 | 0 | 0 | 0 | 6 | 0 |
Switch DDRT2 Mode | 10| 33| 0 | 0| 0 | 0 | 0 | 0 | 0 | 0 | 4 | 0 |
LRDIMM TX | 2| 1| 0 | 0| 0 | 0 | 0 | 0 | 0 | 0 | 5 | 0 |
Write Leveling | 58073| 82463| 4656 | 0| 19 | 0 | 1856 | 0 | 0 | 160 | 95 | 0 |
Wr Dq/Dqs | 459058| 732419| 50688 | 0| 8 | 48 | 17140 | 0 | 0 | 244 | 541 | 0 |
Tx DQ Slew Rate | 22903| 1| 0 | 0| 0 | 0 | 0 | 0 | 0 | 0 | 9 | 0 |
WrDqDqsDfeCentering| 342078| 302245| 6168 | 0| 37 | 2516 | 15289 | 0 | 0 | 4411 | 314 | 0 |
PostPkgRepair | 8| 4| 0 | 0| 0 | 0 | 0 | 0 | 0 | 0 | 6 | 0 |
LRDIMM Bs Write | 2| 1| 0 | 0| 0 | 0 | 0 | 0 | 0 | 0 | 5 | 0 |
DCA TCO | 471410| 610850| 25920 | 0| 31 | 0 | 240 | 0 | 2880 | 2880 | 550 | 0 |
TCO_DQDQS | 2| 1| 0 | 0| 0 | 0 | 0 | 0 | 0 | 0 | 4 | 0 |
TX ODT | 1302| 3393| 0 | 0| 0 | 0 | 216 | 0 | 0 | 72 | 8 | 0 |
WRITE DFE | 5148121| 4015432| 3436997 | 0| 662 | 111368 | 213461 | 0 | 0 | 65247 | 4142 | 0 |
WRITE DB DFE | 2| 1| 0 | 0| 0 | 0 | 0 | 0 | 0 | 0 | 4 | 0 |
Tx Dq/Dqs Post Dfe | 4068221| 322698| 3929715 | 0| 47 | 8004 | 15797 | 0 | 0 | 4479 | 1688 | 0 |
Read Post Dfe Late | 34020379| 667904| 33645067 | 0| 20 | 12808 | 18473 | 0 | 0 | 0 | 12697 | 0 |
MemSweepTester | 2| 1| 0 | 0| 0 | 0 | 0 | 0 | 0 | 0 | 3 | 0 |
Periodic Tx Retrain| 1338| 1629| 24 | 0| 0 | 0 | 16 | 0 | 0 | 4 | 7 | 0 |
Round Trip Opt | 2293304| 27965| 2266190 | 0| 1 | 0 | 1376 | 0 | 0 | 0 | 853 | 0 |
TurnaroundTrain | 1280899| 113802| 1229259 | 0| 18 | 3088 | 5881 | 0 | 0 | 1707 | 531 | 0 |
DisplayResults | 147464| 157746| 5832 | 0| 3 | 360 | 3384 | 0 | 0 | 0 | 105 | 0 |
PostTrainingInit | 19583| 373| 0 | 0| 0 | 0 | 4 | 0 | 0 | 4 | 9 | 0 |
One Time TxRt | 21369| 913| 24 | 0| 512 | 0 | 8 | 0 | 0 | 0 | 521 | 0 |
ExecuteSsaRmt | 4| 2| 0 | 0| 0 | 0 | 0 | 0 | 0 | 0 | 3 | 0 |
Offset training | 24477| 1| 0 | 0| 0 | 0 | 0 | 0 | 0 | 0 | 9 | 0 |
HBM Post-Training | 7453087| 2834| 0 | 0| 0 | 0 | 0 | 0 | 0 | 0 | 2819 | 0 |
LateConfig | 101349| 331| 40 | 0| 0 | 0 | 12 | 4 | 0 | 12 | 38 | 0 |
InitThrottling | 108598| 211| 352 | 0| 0 | 0 | 0 | 32 | 0 | 0 | 40 | 0 |
MEMTEST | 5839969| 4405| 5777727 | 0| 0 | 0 | 60 | 8 | 0 | 12 | 2036 | 0 |
HBM Mem Test | 2597841| 18443| 2539036 | 0| 0 | 0 | 256 | 0 | 0 | 0 | 1192 | 0 |
HBM Scrambling | 66| 65| 0 | 0| 0 | 0 | 0 | 0 | 0 | 0 | 4 | 0 |
HBMFaultResilientBoot| 11219| 4| 0 | 0| 0 | 0 | 0 | 0 | 0 | 0 | 6 | 0 |
HBM Reset System | 11186| 4| 0 | 0| 0 | 0 | 0 | 0 | 0 | 0 | 6 | 0 |
HBM Mem Init | 1607010| 2985| 1508934 | 0| 0 | 0 | 32 | 0 | 0 | 0 | 716 | 0 |
Pub DIMM Manifest | 26484| 163| 264 | 0| 0 | 0 | 0 | 24 | 0 | 0 | 10 | 0 |
SvlAndScrambling | 24968| 5| 0 | 0| 0 | 0 | 0 | 0 | 0 | 0 | 9 | 0 |
Mem ALIAS Check | 11169| 4| 0 | 0| 0 | 0 | 0 | 0 | 0 | 0 | 6 | 0 |
CpgcOutOfOrderMode | 29090| 45| 0 | 0| 0 | 0 | 0 | 0 | 0 | 0 | 11 | 0 |
EnableHostRefresh | 241443| 104| 0 | 0| 0 | 0 | 0 | 0 | 0 | 0 | 91 | 0 |
MEMINIT | 3496627| 1311| 3468829 | 0| 0 | 0 | 16 | 0 | 0 | 0 | 1224 | 0 |
CmiCreditProg | 5012963| 581| 0 | 0| 0 | 0 | 0 | 0 | 0 | 0 | 1904 | 0 |
CheckRasPostMrc | 11513| 148| 0 | 0| 0 | 0 | 0 | 0 | 0 | 0 | 7 | 0 |
MemLate | 11241| 47| 0 | 0| 0 | 0 | 0 | 0 | 0 | 0 | 5 | 0 |
Memory Mapping | 17861| 5369| 0 | 0| 0 | 0 | 0 | 0 | 0 | 0 | 16855 | 0 |
HBM Normal Mode | 135817| 1275| 0 | 0| 0 | 0 | 0 | 0 | 0 | 0 | 53 | 0 |
Normal Mode | 1139591| 1037| 136 | 0| 0 | 0 | 0 | 8 | 8 | 0 | 435 | 0 |
InitAdr | 11198| 4| 0 | 0| 0 | 0 | 0 | 0 | 0 | 0 | 5 | 0 |
RAS Config | 14188| 2031| 0 | 0| 0 | 0 | 0 | 0 | 0 | 0 | 213 | 0 |
CallTableOverhead | 3899803| 301| 0 | 0| 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 |
Normalize CMD | 20494| 18737| 1683 | 0| 0 | 0 | 593 | 0 | 0 | 24 | 20 | 0 |
No Zone 0 | 6| 5| 0 | 0| 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 |
No Zone 1 | 0| 1| 0 | 0| 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 |
No Zone 2 | 0| 0| 0 | 0| 0 | 0 | 0 | 0 | 0 | 0 | 203 | 0 |
No Zone 3 | 8565| 2| 0 | 0| 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 |
No Zone 4 | 1| 0| 0 | 0| 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 |
No Zone 5 | 0| 2| 0 | 0| 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 |
No Zone 6 | 1| 0| 0 | 0| 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 |
No Zone 7 | 0| 2| 0 | 0| 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 |
No Zone 8 | 1| 0| 0 | 0| 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 |
No Zone 9 | 1993647| 16780| 1840997 | 0| 2 | 360 | 1304 | 0 | 0 | 216 | 3101 | 0 |
[ScktId: 1] Print All Stats - 3220ms
[ScktId: 0] Print All Stats - 3220ms
[ScktId: 1] Print Performance Settings -- Started
[ScktId: 0] Print Performance Settings -- Started
[ScktId: 1] Print Performance Settings - 9ms
[ScktId: 0] Print Performance Settings - 11ms
N1 Checked into Pipe
[ScktId: 0] DIMM Information After MRC -- Started
======================================================================================
START_DIMMINFO_SYSTEM_TABLE
======================================================================================
| Socket 0 | Socket 1 | Socket 2 | Socket 3 | System |
======================================================================================
Active Memory | 128GB | 128GB | N/A | N/A | 256GB |
DDR Freq | | | | | DDR5-4800 |
Ch0 CL-RCD-RP-CMD |40-39-39-1n |40-39-39-1n | | | |
Ch2 CL-RCD-RP-CMD |40-39-39-1n |40-39-39-1n | | | |
Ch4 CL-RCD-RP-CMD |40-39-39-1n |40-39-39-1n | | | |
Ch6 CL-RCD-RP-CMD |40-39-39-1n |40-39-39-1n | | | |
DDR Vdd | 1.145V | 1.145V | N/A | N/A | |
ECC Checking | | | | | On |
Patrol/Demand Scrub | | | | | Off |
RAS Mode | | | | | Indep |
Paging Policy | | | | | Closed |
Data Scrambling | | | | | On |
CCMRC Revision | | | | | 00.50.00 |
RC Version | | | | | 1.1.1.01BC |
======================================================================================
STOP_DIMMINFO_SYSTEM_TABLE
======================================================================================
[ScktId: 0] DIMM Information After MRC - 195ms
N1 Checked into Pipe
[ScktId: 0] DDR Reset Loop -- Started
[ScktId: 0] DDR Reset Loop - 5ms
[ScktId: 1] Pipe Sync AP Final Error Sync -- Started
[ScktId: 0] Pipe Sync AP Final Error Sync -- Started
[ScktId: 1] Pipe Sync AP Final Error Sync - 10ms
[ScktId: 0] Pipe Sync AP Final Error Sync - 10ms
Total MRC time = 74583ms
Total MRC time = 74786ms
STOP_MRC_RUN
Final Rc Heap usage:
******* Configure Mesh Mode - START *******
Configure Socket 0 2LM Hash on KTI and IIO-Enabled
Configure Socket 1 2LM Hash on KTI and IIO-Enabled
Socket 0 Tolm 20
SADEntry Local Base Limit Cluster Ways NmChWays ImcIntBitmap NmImcIntBitmap Mc0ChIntMap Mc1ChIntMap Mc2ChIntMap Mc3ChIntMap Type
0 1 0x0000000 0x0000040 0 1 8 0x1 0x1 0x3 0x3 0x3 0x3 2LM HBM cache DDR Granularity=256B IntGranularity=2
MemInfo->imcBitmap[0][MC_TECH_DDR]=0x1 McBitmapPerCluster[0]=0x1 XorDefeature[socket=0]=0
Ways[socket=0][cluster=0]=8
1 1 0x0000040 0x0000220 0 1 8 0x1 0x1 0x3 0x3 0x3 0x3 2LM HBM cache DDR Granularity=256B IntGranularity=2
MemInfo->imcBitmap[0][MC_TECH_DDR]=0x1 XorDefeature[socket=0]=0
Ways[socket=0][cluster=0]=8
16 1 0x0000220 0x0000420 1 1 8 0x2 0x2 0x3 0x3 0x3 0x3 2LM HBM cache DDR Granularity=256B IntGranularity=2
MemInfo->imcBitmap[0][MC_TECH_DDR]=0x3 McBitmapPerCluster[1]=0x2 XorDefeature[socket=0]=0
Ways[socket=0][cluster=1]=8
17 0 0x0000420 0x0000420 1 0 0 0x0 0x0 0x0 0x0 0x0 0x0 NXM Granularity=Unknown
32 1 0x0000420 0x0000620 2 1 8 0x4 0x4 0x3 0x3 0x3 0x3 2LM HBM cache DDR Granularity=256B IntGranularity=2
MemInfo->imcBitmap[0][MC_TECH_DDR]=0x7 McBitmapPerCluster[2]=0x4 XorDefeature[socket=0]=0
Ways[socket=0][cluster=2]=8
33 0 0x0000620 0x0000620 2 0 0 0x0 0x0 0x0 0x0 0x0 0x0 NXM Granularity=Unknown
48 1 0x0000620 0x0000820 3 1 8 0x8 0x8 0x3 0x3 0x3 0x3 2LM HBM cache DDR Granularity=256B IntGranularity=2
MemInfo->imcBitmap[0][MC_TECH_DDR]=0xF McBitmapPerCluster[3]=0x8 XorDefeature[socket=0]=0
Ways[socket=0][cluster=3]=8
49 0 0x0000820 0x0000820 3 0 0 0x0 0x0 0x0 0x0 0x0 0x0 NXM Granularity=Unknown
MC-Cluster InterleaveEn PrefetchEn Membase MemLimit
0 0 0 0x0000000 0x0000220
NumOfMcEnabled=1, NumOfMcPerCluster=1
1 0 0 0x0000220 0x0000420
NumOfMcEnabled=2, NumOfMcPerCluster=1
2 0 0 0x0000420 0x0000620
NumOfMcEnabled=3, NumOfMcPerCluster=1
3 0 0 0x0000620 0x0000820
NumOfMcEnabled=4, NumOfMcPerCluster=1
Number of clusters = 4
Socket 1 Tolm 20
SADEntry Local Base Limit Cluster Ways NmChWays ImcIntBitmap NmImcIntBitmap Mc0ChIntMap Mc1ChIntMap Mc2ChIntMap Mc3ChIntMap Type
0 1 0x0000820 0x0000A20 0 1 8 0x1 0x1 0x3 0x3 0x3 0x3 2LM HBM cache DDR Granularity=256B IntGranularity=2
MemInfo->imcBitmap[1][MC_TECH_DDR]=0x1 McBitmapPerCluster[0]=0x1 XorDefeature[socket=1]=0
Ways[socket=1][cluster=0]=8
16 1 0x0000A20 0x0000C20 1 1 8 0x2 0x2 0x3 0x3 0x3 0x3 2LM HBM cache DDR Granularity=256B IntGranularity=2
MemInfo->imcBitmap[1][MC_TECH_DDR]=0x3 McBitmapPerCluster[1]=0x2 XorDefeature[socket=1]=0
Ways[socket=1][cluster=1]=8
32 1 0x0000C20 0x0000E20 2 1 8 0x4 0x4 0x3 0x3 0x3 0x3 2LM HBM cache DDR Granularity=256B IntGranularity=2
MemInfo->imcBitmap[1][MC_TECH_DDR]=0x7 McBitmapPerCluster[2]=0x4 XorDefeature[socket=1]=0
Ways[socket=1][cluster=2]=8
48 1 0x0000E20 0x0001020 3 1 8 0x8 0x8 0x3 0x3 0x3 0x3 2LM HBM cache DDR Granularity=256B IntGranularity=2
MemInfo->imcBitmap[1][MC_TECH_DDR]=0xF McBitmapPerCluster[3]=0x8 XorDefeature[socket=1]=0
Ways[socket=1][cluster=3]=8
MC-Cluster InterleaveEn PrefetchEn Membase MemLimit
0 0 0 0x0000820 0x0000A20
NumOfMcEnabled=1, NumOfMcPerCluster=1
1 0 0 0x0000A20 0x0000C20
NumOfMcEnabled=2, NumOfMcPerCluster=1
2 0 0 0x0000C20 0x0000E20
NumOfMcEnabled=3, NumOfMcPerCluster=1
3 0 0 0x0000E20 0x0001020
NumOfMcEnabled=4, NumOfMcPerCluster=1
Number of clusters = 4
Socket 0
SNC_Base_1 = 0000 GB
SNC_Base_2 = 0034 GB
SNC_Base_3 = 0066 GB
SNC_Base_4 = 0098 GB
SNC_Base_5 = 0130 GB
Socket 1
SNC_Base_1 = 0130 GB
SNC_Base_2 = 0162 GB
SNC_Base_3 = 0194 GB
SNC_Base_4 = 0226 GB
SNC_Base_5 = 0258 GB
Socket 0 XPT and KTI prefetch Disabled
Programming credits for clustering mode
Socket 1 XPT and KTI prefetch Disabled
Programming credits for clustering mode
[SDSi] Init for Socket[0] - Begin
[VSEC] VSEC discovery - S:B:D:F = 0x0:0x6A:0x3:0x1, VidDid = 0x09A78086
VsecId: 0x00000041 SDSI VSEC capability offset: 0x00000160
[OOBMSM] InitOobMsmBar() Enter
Socket[0], OobMsm.Func[1], BAR[1]
Disable MSE and BME
Original StsCmdReg Value = 0x00100006
BarSize: 0x00040000
BarBase: 0xC6B40000(Already assigned)
Enable MSE and BME
[OOBMSM] InitOobMsmBar() Exit
SDSi MMIO Layout Address = 0xC6B42000
SdsiMmio.Ppin Address = 0xC6B42408, Value = 0x22E546CB1AD8E915
[OOBMSM] InitOobMsmBar() Enter
Socket[0], OobMsm.Func[1], BAR[0]
Disable MSE and BME
Original StsCmdReg Value = 0x00100006
BarSize: 0x00002000
BarBase: 0xC6B00000(Already assigned)
Enable MSE and BME
[OOBMSM] InitOobMsmBar() Exit
PMon Bar0 address: 0xC6B00000
Global Discovery State at address: 0xC6B00000
Access Type|Max Blocks|Block Stride|Type ||GlobalControlAddr||NumBlockStatusBits|GblCtrStatAddr
[63:62] |[25:16] |[15:8] |[7:0]||[63:0] ||[23:8] |[7:0]
0 |221 |4 |5 ||0x2FF0 ||209 |0xE
Unit Discovery State at address: 0xC6B00020
Access Type|UnitStatus Offset|Counter0 Offset|Ctrl Width|Ctrl0 Offset|Num Ctrl Regs||UnitCounterControlAddr||Gbl Stat Pos|Unit ID|UnitType|Offset
[63:62] |[39:32] |[31:24] |[23:16] |[15:8] |[7:0] ||[63:0] ||[47:32] |[31:16]|[15:0]|
UNIT_TYPE_CHA
0 |0x01 |0x08 |48 |0x02 |4 ||0x00002000 || 0 | 0 |0|0x0040
UNIT_TYPE_CHA
0 |0x01 |0x08 |48 |0x02 |4 ||0x00002010 || 1 | 1 |0|0x0060
UNIT_TYPE_CHA
0 |0x01 |0x08 |48 |0x02 |4 ||0x00002020 || 2 | 2 |0|0x0080
UNIT_TYPE_CHA
0 |0x01 |0x08 |48 |0x02 |4 ||0x00002030 || 3 | 3 |0|0x00A0
UNIT_TYPE_CHA
0 |0x01 |0x08 |48 |0x02 |4 ||0x00002040 || 4 | 4 |0|0x00C0
UNIT_TYPE_CHA
0 |0x01 |0x08 |48 |0x02 |4 ||0x00002050 || 5 | 5 |0|0x00E0
UNIT_TYPE_CHA
0 |0x01 |0x08 |48 |0x02 |4 ||0x00002060 || 6 | 6 |0|0x0100
UNIT_TYPE_CHA
0 |0x01 |0x08 |48 |0x02 |4 ||0x00002070 || 7 | 7 |0|0x0120
UNIT_TYPE_CHA
0 |0x01 |0x08 |48 |0x02 |4 ||0x00002080 || 8 | 8 |0|0x0140
UNIT_TYPE_CHA
0 |0x01 |0x08 |48 |0x02 |4 ||0x00002090 || 9 | 9 |0|0x0160
UNIT_TYPE_CHA
0 |0x01 |0x08 |48 |0x02 |4 ||0x000020A0 ||10 |10 |0|0x0180
UNIT_TYPE_CHA
0 |0x01 |0x08 |48 |0x02 |4 ||0x000020B0 ||11 |11 |0|0x01A0
UNIT_TYPE_CHA
0 |0x01 |0x08 |48 |0x02 |4 ||0x000020C0 ||12 |12 |0|0x01C0
UNIT_TYPE_CHA
0 |0x01 |0x08 |48 |0x02 |4 ||0x000020D0 ||13 |13 |0|0x01E0
UNIT_TYPE_CHA
0 |0x01 |0x08 |48 |0x02 |4 ||0x000020E0 ||14 |14 |0|0x0200
UNIT_TYPE_CHA
0 |0x01 |0x08 |48 |0x02 |4 ||0x000020F0 ||15 |15 |0|0x0220
UNIT_TYPE_CHA
0 |0x01 |0x08 |48 |0x02 |4 ||0x00002100 ||16 |16 |0|0x0240
UNIT_TYPE_CHA
0 |0x01 |0x08 |48 |0x02 |4 ||0x00002110 ||17 |17 |0|0x0260
UNIT_TYPE_CHA
0 |0x01 |0x08 |48 |0x02 |4 ||0x00002120 ||18 |18 |0|0x0280
UNIT_TYPE_CHA
0 |0x01 |0x08 |48 |0x02 |4 ||0x00002130 ||19 |19 |0|0x02A0
UNIT_TYPE_CHA
0 |0x01 |0x08 |48 |0x02 |4 ||0x00002140 ||20 |20 |0|0x02C0
UNIT_TYPE_CHA
0 |0x01 |0x08 |48 |0x02 |4 ||0x00002150 ||21 |21 |0|0x02E0
UNIT_TYPE_CHA
0 |0x01 |0x08 |48 |0x02 |4 ||0x00002160 ||22 |22 |0|0x0300
UNIT_TYPE_CHA
0 |0x01 |0x08 |48 |0x02 |4 ||0x00002170 ||23 |23 |0|0x0320
UNIT_TYPE_CHA
0 |0x01 |0x08 |48 |0x02 |4 ||0x00002180 ||24 |24 |0|0x0340
UNIT_TYPE_CHA
0 |0x01 |0x08 |48 |0x02 |4 ||0x00002190 ||25 |25 |0|0x0360
UNIT_TYPE_CHA
0 |0x01 |0x08 |48 |0x02 |4 ||0x000021A0 ||26 |26 |0|0x0380
UNIT_TYPE_CHA
0 |0x01 |0x08 |48 |0x02 |4 ||0x000021B0 ||27 |27 |0|0x03A0
UNIT_TYPE_CHA
0 |0x01 |0x08 |48 |0x02 |4 ||0x000021C0 ||28 |28 |0|0x03C0
UNIT_TYPE_CHA
0 |0x01 |0x08 |48 |0x02 |4 ||0x000021D0 ||29 |29 |0|0x03E0
UNIT_TYPE_CHA
0 |0x01 |0x08 |48 |0x02 |4 ||0x000021E0 ||30 |30 |0|0x0400
UNIT_TYPE_CHA
0 |0x01 |0x08 |48 |0x02 |4 ||0x000021F0 ||31 |31 |0|0x0420
UNIT_TYPE_CHA
0 |0x01 |0x08 |48 |0x02 |4 ||0x00002200 ||32 |32 |0|0x0440
UNIT_TYPE_CHA
0 |0x01 |0x08 |48 |0x02 |4 ||0x00002210 ||33 |33 |0|0x0460
UNIT_TYPE_CHA
0 |0x01 |0x08 |48 |0x02 |4 ||0x00002220 ||34 |34 |0|0x0480
UNIT_TYPE_CHA
0 |0x01 |0x08 |48 |0x02 |4 ||0x00002230 ||35 |35 |0|0x04A0
UNIT_TYPE_CHA
0 |0x01 |0x08 |48 |0x02 |4 ||0x00002240 ||36 |36 |0|0x04C0
UNIT_TYPE_CHA
0 |0x01 |0x08 |48 |0x02 |4 ||0x00002250 ||37 |37 |0|0x04E0
UNIT_TYPE_CHA
0 |0x01 |0x08 |48 |0x02 |4 ||0x00002260 ||38 |38 |0|0x0500
UNIT_TYPE_CHA
0 |0x01 |0x08 |48 |0x02 |4 ||0x00002270 ||39 |39 |0|0x0520
UNIT_TYPE_CHA
0 |0x01 |0x08 |48 |0x02 |4 ||0x00002280 ||40 |40 |0|0x0540
UNIT_TYPE_CHA
0 |0x01 |0x08 |48 |0x02 |4 ||0x00002290 ||41 |41 |0|0x0560
UNIT_TYPE_CHA
0 |0x01 |0x08 |48 |0x02 |4 ||0x000022A0 ||42 |42 |0|0x0580
UNIT_TYPE_CHA
0 |0x01 |0x08 |48 |0x02 |4 ||0x000022B0 ||43 |43 |0|0x05A0
UNIT_TYPE_CHA
0 |0x01 |0x08 |48 |0x02 |4 ||0x000022C0 ||44 |44 |0|0x05C0
UNIT_TYPE_CHA
0 |0x01 |0x08 |48 |0x02 |4 ||0x000022D0 ||45 |45 |0|0x05E0
UNIT_TYPE_CHA
0 |0x01 |0x08 |48 |0x02 |4 ||0x000022E0 ||46 |46 |0|0x0600
UNIT_TYPE_CHA
0 |0x01 |0x08 |48 |0x02 |4 ||0x000022F0 ||47 |47 |0|0x0620
UNIT_TYPE_CHA
0 |0x01 |0x08 |48 |0x02 |4 ||0x00002300 ||48 |48 |0|0x0640
UNIT_TYPE_CHA
0 |0x01 |0x08 |48 |0x02 |4 ||0x00002310 ||49 |49 |0|0x0660
UNIT_TYPE_CHA
0 |0x01 |0x08 |48 |0x02 |4 ||0x00002320 ||50 |50 |0|0x0680
UNIT_TYPE_CHA
0 |0x01 |0x08 |48 |0x02 |4 ||0x00002330 ||51 |51 |0|0x06A0
UNIT_TYPE_CHA
0 |0x01 |0x08 |48 |0x02 |4 ||0x00002340 ||52 |52 |0|0x06C0
UNIT_TYPE_CHA
0 |0x01 |0x08 |48 |0x02 |4 ||0x00002350 ||53 |53 |0|0x06E0
UNIT_TYPE_CHA
0 |0x01 |0x08 |48 |0x02 |4 ||0x00002360 ||54 |54 |0|0x0700
UNIT_TYPE_CHA
0 |0x01 |0x08 |48 |0x02 |4 ||0x00002370 ||55 |55 |0|0x0720
UNIT_TYPE_CHA
0 |0x01 |0x08 |48 |0x02 |4 ||0x00002380 ||56 |56 |0|0x0740
UNIT_TYPE_CHA
0 |0x01 |0x08 |48 |0x02 |4 ||0x00002390 ||57 |57 |0|0x0760
UNIT_TYPE_CHA
0 |0x01 |0x08 |48 |0x02 |4 ||0x000023A0 ||58 |58 |0|0x0780
UNIT_TYPE_CHA
0 |0x01 |0x08 |48 |0x02 |4 ||0x000023B0 ||59 |59 |0|0x07A0
UNIT_TYPE_TC
0 |0x01 |0x08 |48 |0x02 |4 ||0x00003000 ||100 | 0 |1|0x0C60
UNIT_TYPE_TC
0 |0x01 |0x08 |48 |0x02 |4 ||0x00003010 ||101 | 1 |1|0x0CC0
UNIT_TYPE_TC
0 |0x01 |0x08 |48 |0x02 |4 ||0x00003020 ||102 | 2 |1|0x0D20
UNIT_TYPE_TC
0 |0x01 |0x08 |48 |0x02 |4 ||0x00003030 ||103 | 3 |1|0x0D80
UNIT_TYPE_TC
0 |0x00 |0x00 | 0 |0x00 |0 ||0x00000000 || 0 | 0 |0|0x0DE0
UNIT_TYPE_TC
0 |0x01 |0x08 |48 |0x02 |4 ||0x00003040 ||105 | 5 |1|0x0E40
UNIT_TYPE_TC
0 |0x01 |0x08 |48 |0x02 |4 ||0x00003050 ||106 | 6 |1|0x0EA0
UNIT_TYPE_TC
0 |0x01 |0x08 |48 |0x02 |4 ||0x00003060 ||107 | 7 |1|0x0F00
UNIT_TYPE_TC
0 |0x01 |0x08 |48 |0x02 |4 ||0x00003070 ||108 | 8 |1|0x0F60
UNIT_TYPE_TC
0 |0x01 |0x08 |48 |0x02 |4 ||0x00003080 ||109 | 9 |1|0x0FC0
UNIT_TYPE_TC
0 |0x00 |0x00 | 0 |0x00 |0 ||0x00000000 || 0 | 0 |0|0x1020
UNIT_TYPE_TC
0 |0x01 |0x08 |48 |0x02 |4 ||0x00003090 ||111 |11 |1|0x1080
UNIT_TYPE_IRP
0 |0x01 |0x08 |48 |0x02 |2 ||0x00003400 ||112 | 0 |2|0x0C80
UNIT_TYPE_IRP
0 |0x01 |0x08 |48 |0x02 |2 ||0x00003410 ||113 | 1 |2|0x0CE0
UNIT_TYPE_IRP
0 |0x01 |0x08 |48 |0x02 |2 ||0x00003420 ||114 | 2 |2|0x0D40
UNIT_TYPE_IRP
0 |0x01 |0x08 |48 |0x02 |2 ||0x00003430 ||115 | 3 |2|0x0DA0
UNIT_TYPE_IRP
0 |0x00 |0x00 | 0 |0x00 |0 ||0x00000000 || 0 | 0 |0|0x0E00
UNIT_TYPE_IRP
0 |0x01 |0x08 |48 |0x02 |2 ||0x00003440 ||117 | 5 |2|0x0E60
UNIT_TYPE_IRP
0 |0x01 |0x08 |48 |0x02 |2 ||0x00003450 ||118 | 6 |2|0x0EC0
UNIT_TYPE_IRP
0 |0x01 |0x08 |48 |0x02 |2 ||0x00003460 ||119 | 7 |2|0x0F20
UNIT_TYPE_IRP
0 |0x01 |0x08 |48 |0x02 |2 ||0x00003470 ||120 | 8 |2|0x0F80
UNIT_TYPE_IRP
0 |0x01 |0x08 |48 |0x02 |2 ||0x00003480 ||121 | 9 |2|0x0FE0
UNIT_TYPE_IRP
0 |0x00 |0x00 | 0 |0x00 |0 ||0x00000000 || 0 | 0 |0|0x1040
UNIT_TYPE_IRP
0 |0x01 |0x08 |48 |0x02 |2 ||0x00003490 ||123 |11 |2|0x10A0
UNIT_TYPE_M2PCIE
0 |0x01 |0x08 |48 |0x02 |4 ||0x00003200 ||124 | 0 |3|0x0C40
UNIT_TYPE_M2PCIE
0 |0x01 |0x08 |48 |0x02 |4 ||0x00003210 ||125 | 1 |3|0x0CA0
UNIT_TYPE_M2PCIE
0 |0x01 |0x08 |48 |0x02 |4 ||0x00003220 ||126 | 2 |3|0x0D00
UNIT_TYPE_M2PCIE
0 |0x01 |0x08 |48 |0x02 |4 ||0x00003230 ||127 | 3 |3|0x0D60
UNIT_TYPE_M2PCIE
0 |0x00 |0x00 | 0 |0x00 |0 ||0x00000000 || 0 | 0 |0|0x0DC0
UNIT_TYPE_M2PCIE
0 |0x01 |0x08 |48 |0x02 |4 ||0x00003240 ||129 | 5 |3|0x0E20
UNIT_TYPE_M2PCIE
0 |0x01 |0x08 |48 |0x02 |4 ||0x00003250 ||130 | 6 |3|0x0E80
UNIT_TYPE_M2PCIE
0 |0x01 |0x08 |48 |0x02 |4 ||0x00003260 ||131 | 7 |3|0x0EE0
UNIT_TYPE_M2PCIE
0 |0x01 |0x08 |48 |0x02 |4 ||0x00003270 ||132 | 8 |3|0x0F40
UNIT_TYPE_M2PCIE
0 |0x01 |0x08 |48 |0x02 |4 ||0x00003280 ||133 | 9 |3|0x0FA0
UNIT_TYPE_M2PCIE
0 |0x00 |0x00 | 0 |0x00 |0 ||0x00000000 || 0 | 0 |0|0x1000
UNIT_TYPE_M2PCIE
0 |0x01 |0x08 |48 |0x02 |4 ||0x00003290 ||135 |11 |3|0x1060
UNIT_TYPE_PCU
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UNIT_TYPE_MC
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UNIT_TYPE_MC
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UNIT_TYPE_MC
1 |0x5C |0x08 |48 |0x40 |4 ||0xC8B22800 ||140 | 2 |6|0x0900
UNIT_TYPE_MC
1 |0x5C |0x08 |48 |0x40 |4 ||0xC8B2A800 ||141 | 3 |6|0x0920
UNIT_TYPE_MC
1 |0x5C |0x08 |48 |0x40 |4 ||0xC8BA2800 ||142 | 4 |6|0x0940
UNIT_TYPE_MC
1 |0x5C |0x08 |48 |0x40 |4 ||0xC8BAA800 ||143 | 5 |6|0x0960
UNIT_TYPE_MC
1 |0x5C |0x08 |48 |0x40 |4 ||0xC8C22800 ||144 | 6 |6|0x0980
UNIT_TYPE_MC
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UNIT_TYPE_M2M
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UNIT_TYPE_M2M
2 |0x70 |0x08 |48 |0x30 |4 ||0x87E68438 ||147 | 1 |7|0x09E0
UNIT_TYPE_M2M
2 |0x70 |0x08 |48 |0x30 |4 ||0x87E70438 ||148 | 2 |7|0x0A00
UNIT_TYPE_M2M
2 |0x70 |0x08 |48 |0x30 |4 ||0x87E78438 ||149 | 3 |7|0x0A20
UNIT_TYPE_M2M
2 |0x70 |0x08 |48 |0x30 |4 ||0x87E80438 ||150 | 4 |7|0x0A40
UNIT_TYPE_M2M
2 |0x70 |0x08 |48 |0x30 |4 ||0x87E88438 ||151 | 5 |7|0x0A60
UNIT_TYPE_M2M
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UNIT_TYPE_M2M
2 |0x70 |0x08 |48 |0x30 |4 ||0x87E98438 ||153 | 7 |7|0x0AA0
UNIT_TYPE_M2M
2 |0x70 |0x08 |48 |0x30 |4 ||0x87EA0438 ||154 | 8 |7|0x0AC0
UNIT_TYPE_M2M
2 |0x70 |0x08 |48 |0x30 |4 ||0x87EA8438 ||155 | 9 |7|0x0AE0
UNIT_TYPE_M2M
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UNIT_TYPE_M2M
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UNIT_TYPE_M2M
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UNIT_TYPE_M2M
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UNIT_TYPE_M2M
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UNIT_TYPE_M2M
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UNIT_TYPE_M2M
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UNIT_TYPE_M2M
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UNIT_TYPE_M2M
2 |0x70 |0x08 |48 |0x30 |4 ||0x87EF0438 ||164 |18 |7|0x0C00
UNIT_TYPE_M2M
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UNIT_TYPE_UPI_LL
2 |0x64 |0x08 |48 |0x38 |4 ||0x87E09318 ||166 | 0 |8|0x07E0
UNIT_TYPE_UPI_LL
2 |0x64 |0x08 |48 |0x38 |4 ||0x87E11318 ||167 | 1 |8|0x0820
UNIT_TYPE_UPI_LL
2 |0x64 |0x08 |48 |0x38 |4 ||0x87E19318 ||168 | 2 |8|0x0860
UNIT_TYPE_UPI_LL
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UNIT_TYPE_M3UPI
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UNIT_TYPE_M3UPI
2 |0x58 |0x08 |48 |0x38 |4 ||0x87E310A0 ||171 | 1 |9|0x0800
UNIT_TYPE_M3UPI
2 |0x58 |0x08 |48 |0x38 |4 ||0x87E390A0 ||172 | 2 |9|0x0840
UNIT_TYPE_M3UPI
2 |0x58 |0x08 |48 |0x38 |4 ||0x87E410A0 ||173 | 3 |9|0x0880
UNIT_TYPE_MDF
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UNIT_TYPE_MDF
0 |0x01 |0x08 |48 |0x02 |4 ||0x00002850 ||61 | 1 |11|0x12E0
UNIT_TYPE_MDF
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UNIT_TYPE_MDF
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UNIT_TYPE_MDF
0 |0x01 |0x08 |48 |0x02 |4 ||0x00002880 ||64 | 4 |11|0x1340
UNIT_TYPE_MDF
0 |0x01 |0x08 |48 |0x02 |4 ||0x00002890 ||65 | 5 |11|0x1360
UNIT_TYPE_MDF
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UNIT_TYPE_MDF
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UNIT_TYPE_MDF
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UNIT_TYPE_MDF
0 |0x01 |0x08 |48 |0x02 |4 ||0x00002910 ||69 | 9 |11|0x13E0
UNIT_TYPE_MDF
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UNIT_TYPE_MDF
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UNIT_TYPE_MDF
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UNIT_TYPE_MDF
0 |0x01 |0x08 |48 |0x02 |4 ||0x00002990 ||73 |13 |11|0x1460
UNIT_TYPE_MDF
0 |0x01 |0x08 |48 |0x02 |4 ||0x000029A0 ||74 |14 |11|0x1480
UNIT_TYPE_MDF
0 |0x01 |0x08 |48 |0x02 |4 ||0x000029B0 ||75 |15 |11|0x14A0
UNIT_TYPE_MDF
0 |0x01 |0x08 |48 |0x02 |4 ||0x000029C0 ||76 |16 |11|0x14C0
UNIT_TYPE_MDF
0 |0x01 |0x08 |48 |0x02 |4 ||0x000029D0 ||77 |17 |11|0x14E0
UNIT_TYPE_MDF
0 |0x01 |0x08 |48 |0x02 |4 ||0x00002A20 ||78 |18 |11|0x1500
UNIT_TYPE_MDF
0 |0x01 |0x08 |48 |0x02 |4 ||0x00002A30 ||79 |19 |11|0x1520
UNIT_TYPE_MDF
0 |0x01 |0x08 |48 |0x02 |4 ||0x00002A40 ||80 |20 |11|0x1540
UNIT_TYPE_MDF
0 |0x01 |0x08 |48 |0x02 |4 ||0x00002A50 ||81 |21 |11|0x1560
UNIT_TYPE_MDF
0 |0x01 |0x08 |48 |0x02 |4 ||0x00002A60 ||82 |22 |11|0x1580
UNIT_TYPE_MDF
0 |0x01 |0x08 |48 |0x02 |4 ||0x00002A70 ||83 |23 |11|0x15A0
UNIT_TYPE_MDF
0 |0x01 |0x08 |48 |0x02 |4 ||0x00002800 ||84 |24 |11|0x15C0
UNIT_TYPE_MDF
0 |0x01 |0x08 |48 |0x02 |4 ||0x00002810 ||85 |25 |11|0x15E0
UNIT_TYPE_MDF
0 |0x01 |0x08 |48 |0x02 |4 ||0x00002820 ||86 |26 |11|0x1600
UNIT_TYPE_MDF
0 |0x01 |0x08 |48 |0x02 |4 ||0x00002830 ||87 |27 |11|0x1620
UNIT_TYPE_MDF
0 |0x01 |0x08 |48 |0x02 |4 ||0x000028A0 ||88 |28 |11|0x1640
UNIT_TYPE_MDF
0 |0x01 |0x08 |48 |0x02 |4 ||0x000028B0 ||89 |29 |11|0x1660
UNIT_TYPE_MDF
0 |0x01 |0x08 |48 |0x02 |4 ||0x000028C0 ||90 |30 |11|0x1680
UNIT_TYPE_MDF
0 |0x01 |0x08 |48 |0x02 |4 ||0x000028D0 ||91 |31 |11|0x16A0
UNIT_TYPE_MDF
0 |0x01 |0x08 |48 |0x02 |4 ||0x00002970 ||92 |32 |11|0x16C0
UNIT_TYPE_MDF
0 |0x01 |0x08 |48 |0x02 |4 ||0x00002960 ||93 |33 |11|0x16E0
UNIT_TYPE_MDF
0 |0x01 |0x08 |48 |0x02 |4 ||0x00002950 ||94 |34 |11|0x1700
UNIT_TYPE_MDF
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UNIT_TYPE_MDF
0 |0x01 |0x08 |48 |0x02 |4 ||0x00002A10 ||96 |36 |11|0x1740
UNIT_TYPE_MDF
0 |0x01 |0x08 |48 |0x02 |4 ||0x00002A00 ||97 |37 |11|0x1760
UNIT_TYPE_MDF
0 |0x01 |0x08 |48 |0x02 |4 ||0x000029F0 ||98 |38 |11|0x1780
UNIT_TYPE_MDF
0 |0x01 |0x08 |48 |0x02 |4 ||0x000029E0 ||99 |39 |11|0x17A0
UNIT_TYPE_IAL_0
0 |0x00 |0x00 | 0 |0x00 |0 ||0x00000000 || 0 | 0 |0|0x10C0
UNIT_TYPE_IAL_0
0 |0x00 |0x00 | 0 |0x00 |0 ||0x00000000 || 0 | 0 |0|0x1100
UNIT_TYPE_IAL_0
0 |0x00 |0x00 | 0 |0x00 |0 ||0x00000000 || 0 | 0 |0|0x1140
UNIT_TYPE_IAL_0
0 |0x00 |0x00 | 0 |0x00 |0 ||0x00000000 || 0 | 0 |0|0x1180
UNIT_TYPE_IAL_0
0 |0x00 |0x00 | 0 |0x00 |0 ||0x00000000 || 0 | 0 |0|0x11C0
UNIT_TYPE_IAL_0
0 |0x00 |0x00 | 0 |0x00 |0 ||0x00000000 || 0 | 0 |0|0x1200
UNIT_TYPE_IAL_0
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UNIT_TYPE_IAL_0
0 |0x00 |0x00 | 0 |0x00 |0 ||0x00000000 || 0 | 0 |0|0x1280
UNIT_TYPE_IAL_1
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UNIT_TYPE_IAL_1
0 |0x00 |0x00 | 0 |0x00 |0 ||0x00000000 || 0 | 0 |0|0x1120
UNIT_TYPE_IAL_1
0 |0x00 |0x00 | 0 |0x00 |0 ||0x00000000 || 0 | 0 |0|0x1160
UNIT_TYPE_IAL_1
0 |0x00 |0x00 | 0 |0x00 |0 ||0x00000000 || 0 | 0 |0|0x11A0
UNIT_TYPE_IAL_1
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UNIT_TYPE_IAL_1
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UNIT_TYPE_IAL_1
0 |0x00 |0x00 | 0 |0x00 |0 ||0x00000000 || 0 | 0 |0|0x1260
UNIT_TYPE_IAL_1
0 |0x00 |0x00 | 0 |0x00 |0 ||0x00000000 || 0 | 0 |0|0x12A0
UNIT_TYPE_HBM
1 |0x5C |0x08 |48 |0x40 |4 ||0xC8941C00 ||190 | 0 |14|0x17C0
UNIT_TYPE_HBM
1 |0x5C |0x08 |48 |0x40 |4 ||0xC8945C00 ||191 | 1 |14|0x17E0
UNIT_TYPE_HBM
1 |0x5C |0x08 |48 |0x40 |4 ||0xC894AC00 ||192 | 2 |14|0x1800
UNIT_TYPE_HBM
1 |0x5C |0x08 |48 |0x40 |4 ||0xC894EC00 ||193 | 3 |14|0x1820
UNIT_TYPE_HBM
1 |0x5C |0x08 |48 |0x40 |4 ||0xC8953C00 ||194 | 4 |14|0x1840
UNIT_TYPE_HBM
1 |0x5C |0x08 |48 |0x40 |4 ||0xC8957C00 ||195 | 5 |14|0x1860
UNIT_TYPE_HBM
1 |0x5C |0x08 |48 |0x40 |4 ||0xC895CC00 ||196 | 6 |14|0x1880
UNIT_TYPE_HBM
1 |0x5C |0x08 |48 |0x40 |4 ||0xC8960C00 ||197 | 7 |14|0x18A0
UNIT_TYPE_HBM
1 |0x5C |0x08 |48 |0x40 |4 ||0xC8965C00 ||198 | 8 |14|0x18C0
UNIT_TYPE_HBM
1 |0x5C |0x08 |48 |0x40 |4 ||0xC8969C00 ||199 | 9 |14|0x18E0
UNIT_TYPE_HBM
1 |0x5C |0x08 |48 |0x40 |4 ||0xC896EC00 ||200 |10 |14|0x1900
UNIT_TYPE_HBM
1 |0x5C |0x08 |48 |0x40 |4 ||0xC8972C00 ||201 |11 |14|0x1920
UNIT_TYPE_HBM
1 |0x5C |0x08 |48 |0x40 |4 ||0xC8977C00 ||202 |12 |14|0x1940
UNIT_TYPE_HBM
1 |0x5C |0x08 |48 |0x40 |4 ||0xC897BC00 ||203 |13 |14|0x1960
UNIT_TYPE_HBM
1 |0x5C |0x08 |48 |0x40 |4 ||0xC8980C00 ||204 |14 |14|0x1980
UNIT_TYPE_HBM
1 |0x5C |0x08 |48 |0x40 |4 ||0xC8984C00 ||205 |15 |14|0x19A0
UNIT_TYPE_HBM
1 |0x5C |0x08 |48 |0x40 |4 ||0xC8989C00 ||206 |16 |14|0x19C0
UNIT_TYPE_HBM
1 |0x5C |0x08 |48 |0x40 |4 ||0xC898DC00 ||207 |17 |14|0x19E0
UNIT_TYPE_HBM
1 |0x5C |0x08 |48 |0x40 |4 ||0xC8992C00 ||208 |18 |14|0x1A00
UNIT_TYPE_HBM
1 |0x5C |0x08 |48 |0x40 |4 ||0xC8996C00 ||209 |19 |14|0x1A20
UNIT_TYPE_HBM
1 |0x5C |0x08 |48 |0x40 |4 ||0xC899BC00 ||210 |20 |14|0x1A40
UNIT_TYPE_HBM
1 |0x5C |0x08 |48 |0x40 |4 ||0xC899FC00 ||211 |21 |14|0x1A60
UNIT_TYPE_HBM
1 |0x5C |0x08 |48 |0x40 |4 ||0xC89A4C00 ||212 |22 |14|0x1A80
UNIT_TYPE_HBM
1 |0x5C |0x08 |48 |0x40 |4 ||0xC89A8C00 ||213 |23 |14|0x1AA0
UNIT_TYPE_HBM
1 |0x5C |0x08 |48 |0x40 |4 ||0xC89ADC00 ||214 |24 |14|0x1AC0
UNIT_TYPE_HBM
1 |0x5C |0x08 |48 |0x40 |4 ||0xC89B1C00 ||215 |25 |14|0x1AE0
UNIT_TYPE_HBM
1 |0x5C |0x08 |48 |0x40 |4 ||0xC89B6C00 ||216 |26 |14|0x1B00
UNIT_TYPE_HBM
1 |0x5C |0x08 |48 |0x40 |4 ||0xC89BAC00 ||217 |27 |14|0x1B20
UNIT_TYPE_HBM
1 |0x5C |0x08 |48 |0x40 |4 ||0xC89BFC00 ||218 |28 |14|0x1B40
UNIT_TYPE_HBM
1 |0x5C |0x08 |48 |0x40 |4 ||0xC89C3C00 ||219 |29 |14|0x1B60
UNIT_TYPE_HBM
1 |0x5C |0x08 |48 |0x40 |4 ||0xC89C8C00 ||220 |30 |14|0x1B80
UNIT_TYPE_HBM
1 |0x5C |0x08 |48 |0x40 |4 ||0xC89CCC00 ||221 |31 |14|0x1BA0
[OOBMSM] InitOobMsmBar() Enter
Socket[0], OobMsm.Func[2], BAR[0]
Disable MSE and BME
Original StsCmdReg Value = 0x00100004
BarSize: 0x00200000
BarBase: 0xC6C00000(Already assigned)
Enable MSE and BME
[OOBMSM] InitOobMsmBar() Exit
SPK Bar0 address: 0xC6C00000
SPK instance 0: BAR offset: 0x00058000
SPK SNC Base Address 1: 0x0FFF0000
SPK SNC Base Address 2: 0x1FE00022
SPK SNC Base Address 3: 0x00000042
SPK SNC Base Address 4: 0x00000062
SPK SNC Base Address 5: 0x00000082
SPK SNC Upper Base Address: 0x00000000
SPK_SNC_CONFIG: 0x0000000F
SPK_UNCORE_SNC_CONFIG: NumChaPerCluster:13, BaseChaCluster1:13, BaseChaCluster2:26, BaseChaCluster3:39
SPK_UMA_CLUSTER_CFG: UmaClusterEn: 0, XorDefeatur: 0
SPK instance 1: BAR offset: 0x00059000
SPK SNC Base Address 1: 0x0FFF0000
SPK SNC Base Address 2: 0x1FE00022
SPK SNC Base Address 3: 0x00000042
SPK SNC Base Address 4: 0x00000062
SPK SNC Base Address 5: 0x00000082
SPK SNC Upper Base Address: 0x00000000
SPK_SNC_CONFIG: 0x0000000F
SPK_UNCORE_SNC_CONFIG: NumChaPerCluster:13, BaseChaCluster1:13, BaseChaCluster2:26, BaseChaCluster3:39
SPK_UMA_CLUSTER_CFG: UmaClusterEn: 0, XorDefeatur: 0
SPK instance 2: BAR offset: 0x0005A000
SPK SNC Base Address 1: 0x0FFF0000
SPK SNC Base Address 2: 0x1FE00022
SPK SNC Base Address 3: 0x00000042
SPK SNC Base Address 4: 0x00000062
SPK SNC Base Address 5: 0x00000082
SPK SNC Upper Base Address: 0x00000000
SPK_SNC_CONFIG: 0x0000000F
SPK_UNCORE_SNC_CONFIG: NumChaPerCluster:13, BaseChaCluster1:13, BaseChaCluster2:26, BaseChaCluster3:39
SPK_UMA_CLUSTER_CFG: UmaClusterEn: 0, XorDefeatur: 0
SPK instance 3: BAR offset: 0x0005B000
SPK SNC Base Address 1: 0x0FFF0000
SPK SNC Base Address 2: 0x1FE00022
SPK SNC Base Address 3: 0x00000042
SPK SNC Base Address 4: 0x00000062
SPK SNC Base Address 5: 0x00000082
SPK SNC Upper Base Address: 0x00000000
SPK_SNC_CONFIG: 0x0000000F
SPK_UNCORE_SNC_CONFIG: NumChaPerCluster:13, BaseChaCluster1:13, BaseChaCluster2:26, BaseChaCluster3:39
SPK_UMA_CLUSTER_CFG: UmaClusterEn: 0, XorDefeatur: 0
SPK instance 4: BAR offset: 0x0005C000
SPK SNC Base Address 1: 0x0FFF0000
SPK SNC Base Address 2: 0x1FE00022
SPK SNC Base Address 3: 0x00000042
SPK SNC Base Address 4: 0x00000062
SPK SNC Base Address 5: 0x00000082
SPK SNC Upper Base Address: 0x00000000
SPK_SNC_CONFIG: 0x0000000F
SPK_UNCORE_SNC_CONFIG: NumChaPerCluster:13, BaseChaCluster1:13, BaseChaCluster2:26, BaseChaCluster3:39
SPK_UMA_CLUSTER_CFG: UmaClusterEn: 0, XorDefeatur: 0
SPK instance 5: BAR offset: 0x0005D000
SPK SNC Base Address 1: 0x0FFF0000
SPK SNC Base Address 2: 0x1FE00022
SPK SNC Base Address 3: 0x00000042
SPK SNC Base Address 4: 0x00000062
SPK SNC Base Address 5: 0x00000082
SPK SNC Upper Base Address: 0x00000000
SPK_SNC_CONFIG: 0x0000000F
SPK_UNCORE_SNC_CONFIG: NumChaPerCluster:13, BaseChaCluster1:13, BaseChaCluster2:26, BaseChaCluster3:39
SPK_UMA_CLUSTER_CFG: UmaClusterEn: 0, XorDefeatur: 0
SPK instance 6: BAR offset: 0x0005E000
SPK SNC Base Address 1: 0x0FFF0000
SPK SNC Base Address 2: 0x1FE00022
SPK SNC Base Address 3: 0x00000042
SPK SNC Base Address 4: 0x00000062
SPK SNC Base Address 5: 0x00000082
SPK SNC Upper Base Address: 0x00000000
SPK_SNC_CONFIG: 0x0000000F
SPK_UNCORE_SNC_CONFIG: NumChaPerCluster:13, BaseChaCluster1:13, BaseChaCluster2:26, BaseChaCluster3:39
SPK_UMA_CLUSTER_CFG: UmaClusterEn: 0, XorDefeatur: 0
SPK instance 7: BAR offset: 0x0005F000
SPK SNC Base Address 1: 0x0FFF0000
SPK SNC Base Address 2: 0x1FE00022
SPK SNC Base Address 3: 0x00000042
SPK SNC Base Address 4: 0x00000062
SPK SNC Base Address 5: 0x00000082
SPK SNC Upper Base Address: 0x00000000
SPK_SNC_CONFIG: 0x0000000F
SPK_UNCORE_SNC_CONFIG: NumChaPerCluster:13, BaseChaCluster1:13, BaseChaCluster2:26, BaseChaCluster3:39
SPK_UMA_CLUSTER_CFG: UmaClusterEn: 0, XorDefeatur: 0
SPK instance 8: BAR offset: 0x00060000
SPK SNC Base Address 1: 0x0FFF0000
SPK SNC Base Address 2: 0x1FE00022
SPK SNC Base Address 3: 0x00000042
SPK SNC Base Address 4: 0x00000062
SPK SNC Base Address 5: 0x00000082
SPK SNC Upper Base Address: 0x00000000
SPK_SNC_CONFIG: 0x0000000F
SPK_UNCORE_SNC_CONFIG: NumChaPerCluster:13, BaseChaCluster1:13, BaseChaCluster2:26, BaseChaCluster3:39
SPK_UMA_CLUSTER_CFG: UmaClusterEn: 0, XorDefeatur: 0
SPK instance 9: BAR offset: 0x00061000
SPK SNC Base Address 1: 0x0FFF0000
SPK SNC Base Address 2: 0x1FE00022
SPK SNC Base Address 3: 0x00000042
SPK SNC Base Address 4: 0x00000062
SPK SNC Base Address 5: 0x00000082
SPK SNC Upper Base Address: 0x00000000
SPK_SNC_CONFIG: 0x0000000F
SPK_UNCORE_SNC_CONFIG: NumChaPerCluster:13, BaseChaCluster1:13, BaseChaCluster2:26, BaseChaCluster3:39
SPK_UMA_CLUSTER_CFG: UmaClusterEn: 0, XorDefeatur: 0
SPK instance 10: BAR offset: 0x00062000
SPK SNC Base Address 1: 0x0FFF0000
SPK SNC Base Address 2: 0x1FE00022
SPK SNC Base Address 3: 0x00000042
SPK SNC Base Address 4: 0x00000062
SPK SNC Base Address 5: 0x00000082
SPK SNC Upper Base Address: 0x00000000
SPK_SNC_CONFIG: 0x0000000F
SPK_UNCORE_SNC_CONFIG: NumChaPerCluster:13, BaseChaCluster1:13, BaseChaCluster2:26, BaseChaCluster3:39
SPK_UMA_CLUSTER_CFG: UmaClusterEn: 0, XorDefeatur: 0
SPK instance 11: BAR offset: 0x00063000
SPK SNC Base Address 1: 0x0FFF0000
SPK SNC Base Address 2: 0x1FE00022
SPK SNC Base Address 3: 0x00000042
SPK SNC Base Address 4: 0x00000062
SPK SNC Base Address 5: 0x00000082
SPK SNC Upper Base Address: 0x00000000
SPK_SNC_CONFIG: 0x0000000F
SPK_UNCORE_SNC_CONFIG: NumChaPerCluster:13, BaseChaCluster1:13, BaseChaCluster2:26, BaseChaCluster3:39
SPK_UMA_CLUSTER_CFG: UmaClusterEn: 0, XorDefeatur: 0
SPK instance 12: BAR offset: 0x00070000
SPK SNC Base Address 1: 0x0FFF0000
SPK SNC Base Address 2: 0x1FE00022
SPK SNC Base Address 3: 0x00000042
SPK SNC Base Address 4: 0x00000062
SPK SNC Base Address 5: 0x00000082
SPK SNC Upper Base Address: 0x00000000
SPK_SNC_CONFIG: 0x0000000F
SPK_UNCORE_SNC_CONFIG: NumChaPerCluster:13, BaseChaCluster1:13, BaseChaCluster2:26, BaseChaCluster3:39
SPK_UMA_CLUSTER_CFG: UmaClusterEn: 0, XorDefeatur: 0
SPK instance 13: BAR offset: 0x00071000
SPK SNC Base Address 1: 0x0FFF0000
SPK SNC Base Address 2: 0x1FE00022
SPK SNC Base Address 3: 0x00000042
SPK SNC Base Address 4: 0x00000062
SPK SNC Base Address 5: 0x00000082
SPK SNC Upper Base Address: 0x00000000
SPK_SNC_CONFIG: 0x0000000F
SPK_UNCORE_SNC_CONFIG: NumChaPerCluster:13, BaseChaCluster1:13, BaseChaCluster2:26, BaseChaCluster3:39
SPK_UMA_CLUSTER_CFG: UmaClusterEn: 0, XorDefeatur: 0
SPK instance 14: BAR offset: 0x00072000
SPK SNC Base Address 1: 0x0FFF0000
SPK SNC Base Address 2: 0x1FE00022
SPK SNC Base Address 3: 0x00000042
SPK SNC Base Address 4: 0x00000062
SPK SNC Base Address 5: 0x00000082
SPK SNC Upper Base Address: 0x00000000
SPK_SNC_CONFIG: 0x0000000F
SPK_UNCORE_SNC_CONFIG: NumChaPerCluster:13, BaseChaCluster1:13, BaseChaCluster2:26, BaseChaCluster3:39
SPK_UMA_CLUSTER_CFG: UmaClusterEn: 0, XorDefeatur: 0
SPK instance 15: BAR offset: 0x00073000
SPK SNC Base Address 1: 0x0FFF0000
SPK SNC Base Address 2: 0x1FE00022
SPK SNC Base Address 3: 0x00000042
SPK SNC Base Address 4: 0x00000062
SPK SNC Base Address 5: 0x00000082
SPK SNC Upper Base Address: 0x00000000
SPK_SNC_CONFIG: 0x0000000F
SPK_UNCORE_SNC_CONFIG: NumChaPerCluster:13, BaseChaCluster1:13, BaseChaCluster2:26, BaseChaCluster3:39
SPK_UMA_CLUSTER_CFG: UmaClusterEn: 0, XorDefeatur: 0
[SDSi] Init for Socket[1] - Begin
[VSEC] VSEC discovery - S:B:D:F = 0x0:0xE7:0x3:0x1, VidDid = 0x09A78086
VsecId: 0x00000041 SDSI VSEC capability offset: 0x00000160
[OOBMSM] InitOobMsmBar() Enter
Socket[1], OobMsm.Func[1], BAR[1]
Disable MSE and BME
Original StsCmdReg Value = 0x00100006
BarSize: 0x00040000
BarBase: 0xF9B40000(Already assigned)
Enable MSE and BME
[OOBMSM] InitOobMsmBar() Exit
SDSi MMIO Layout Address = 0xF9B42000
SdsiMmio.Ppin Address = 0xF9B42408, Value = 0x22E548CB80015B4D
[OOBMSM] InitOobMsmBar() Enter
Socket[1], OobMsm.Func[1], BAR[0]
Disable MSE and BME
Original StsCmdReg Value = 0x00100006
BarSize: 0x00002000
BarBase: 0xF9B00000(Already assigned)
Enable MSE and BME
[OOBMSM] InitOobMsmBar() Exit
PMon Bar0 address: 0xF9B00000
Global Discovery State at address: 0xF9B00000
Access Type|Max Blocks|Block Stride|Type ||GlobalControlAddr||NumBlockStatusBits|GblCtrStatAddr
[63:62] |[25:16] |[15:8] |[7:0]||[63:0] ||[23:8] |[7:0]
0 |221 |4 |5 ||0x2FF0 ||209 |0xE
Unit Discovery State at address: 0xF9B00020
Access Type|UnitStatus Offset|Counter0 Offset|Ctrl Width|Ctrl0 Offset|Num Ctrl Regs||UnitCounterControlAddr||Gbl Stat Pos|Unit ID|UnitType|Offset
[63:62] |[39:32] |[31:24] |[23:16] |[15:8] |[7:0] ||[63:0] ||[47:32] |[31:16]|[15:0]|
UNIT_TYPE_CHA
0 |0x01 |0x08 |48 |0x02 |4 ||0x00002000 || 0 | 0 |0|0x0040
UNIT_TYPE_CHA
0 |0x01 |0x08 |48 |0x02 |4 ||0x00002010 || 1 | 1 |0|0x0060
UNIT_TYPE_CHA
0 |0x01 |0x08 |48 |0x02 |4 ||0x00002020 || 2 | 2 |0|0x0080
UNIT_TYPE_CHA
0 |0x01 |0x08 |48 |0x02 |4 ||0x00002030 || 3 | 3 |0|0x00A0
UNIT_TYPE_CHA
0 |0x01 |0x08 |48 |0x02 |4 ||0x00002040 || 4 | 4 |0|0x00C0
UNIT_TYPE_CHA
0 |0x01 |0x08 |48 |0x02 |4 ||0x00002050 || 5 | 5 |0|0x00E0
UNIT_TYPE_CHA
0 |0x01 |0x08 |48 |0x02 |4 ||0x00002060 || 6 | 6 |0|0x0100
UNIT_TYPE_CHA
0 |0x01 |0x08 |48 |0x02 |4 ||0x00002070 || 7 | 7 |0|0x0120
UNIT_TYPE_CHA
0 |0x01 |0x08 |48 |0x02 |4 ||0x00002080 || 8 | 8 |0|0x0140
UNIT_TYPE_CHA
0 |0x01 |0x08 |48 |0x02 |4 ||0x00002090 || 9 | 9 |0|0x0160
UNIT_TYPE_CHA
0 |0x01 |0x08 |48 |0x02 |4 ||0x000020A0 ||10 |10 |0|0x0180
UNIT_TYPE_CHA
0 |0x01 |0x08 |48 |0x02 |4 ||0x000020B0 ||11 |11 |0|0x01A0
UNIT_TYPE_CHA
0 |0x01 |0x08 |48 |0x02 |4 ||0x000020C0 ||12 |12 |0|0x01C0
UNIT_TYPE_CHA
0 |0x01 |0x08 |48 |0x02 |4 ||0x000020D0 ||13 |13 |0|0x01E0
UNIT_TYPE_CHA
0 |0x01 |0x08 |48 |0x02 |4 ||0x000020E0 ||14 |14 |0|0x0200
UNIT_TYPE_CHA
0 |0x01 |0x08 |48 |0x02 |4 ||0x000020F0 ||15 |15 |0|0x0220
UNIT_TYPE_CHA
0 |0x01 |0x08 |48 |0x02 |4 ||0x00002100 ||16 |16 |0|0x0240
UNIT_TYPE_CHA
0 |0x01 |0x08 |48 |0x02 |4 ||0x00002110 ||17 |17 |0|0x0260
UNIT_TYPE_CHA
0 |0x01 |0x08 |48 |0x02 |4 ||0x00002120 ||18 |18 |0|0x0280
UNIT_TYPE_CHA
0 |0x01 |0x08 |48 |0x02 |4 ||0x00002130 ||19 |19 |0|0x02A0
UNIT_TYPE_CHA
0 |0x01 |0x08 |48 |0x02 |4 ||0x00002140 ||20 |20 |0|0x02C0
UNIT_TYPE_CHA
0 |0x01 |0x08 |48 |0x02 |4 ||0x00002150 ||21 |21 |0|0x02E0
UNIT_TYPE_CHA
0 |0x01 |0x08 |48 |0x02 |4 ||0x00002160 ||22 |22 |0|0x0300
UNIT_TYPE_CHA
0 |0x01 |0x08 |48 |0x02 |4 ||0x00002170 ||23 |23 |0|0x0320
UNIT_TYPE_CHA
0 |0x01 |0x08 |48 |0x02 |4 ||0x00002180 ||24 |24 |0|0x0340
UNIT_TYPE_CHA
0 |0x01 |0x08 |48 |0x02 |4 ||0x00002190 ||25 |25 |0|0x0360
UNIT_TYPE_CHA
0 |0x01 |0x08 |48 |0x02 |4 ||0x000021A0 ||26 |26 |0|0x0380
UNIT_TYPE_CHA
0 |0x01 |0x08 |48 |0x02 |4 ||0x000021B0 ||27 |27 |0|0x03A0
UNIT_TYPE_CHA
0 |0x01 |0x08 |48 |0x02 |4 ||0x000021C0 ||28 |28 |0|0x03C0
UNIT_TYPE_CHA
0 |0x01 |0x08 |48 |0x02 |4 ||0x000021D0 ||29 |29 |0|0x03E0
UNIT_TYPE_CHA
0 |0x01 |0x08 |48 |0x02 |4 ||0x000021E0 ||30 |30 |0|0x0400
UNIT_TYPE_CHA
0 |0x01 |0x08 |48 |0x02 |4 ||0x000021F0 ||31 |31 |0|0x0420
UNIT_TYPE_CHA
0 |0x01 |0x08 |48 |0x02 |4 ||0x00002200 ||32 |32 |0|0x0440
UNIT_TYPE_CHA
0 |0x01 |0x08 |48 |0x02 |4 ||0x00002210 ||33 |33 |0|0x0460
UNIT_TYPE_CHA
0 |0x01 |0x08 |48 |0x02 |4 ||0x00002220 ||34 |34 |0|0x0480
UNIT_TYPE_CHA
0 |0x01 |0x08 |48 |0x02 |4 ||0x00002230 ||35 |35 |0|0x04A0
UNIT_TYPE_CHA
0 |0x01 |0x08 |48 |0x02 |4 ||0x00002240 ||36 |36 |0|0x04C0
UNIT_TYPE_CHA
0 |0x01 |0x08 |48 |0x02 |4 ||0x00002250 ||37 |37 |0|0x04E0
UNIT_TYPE_CHA
0 |0x01 |0x08 |48 |0x02 |4 ||0x00002260 ||38 |38 |0|0x0500
UNIT_TYPE_CHA
0 |0x01 |0x08 |48 |0x02 |4 ||0x00002270 ||39 |39 |0|0x0520
UNIT_TYPE_CHA
0 |0x01 |0x08 |48 |0x02 |4 ||0x00002280 ||40 |40 |0|0x0540
UNIT_TYPE_CHA
0 |0x01 |0x08 |48 |0x02 |4 ||0x00002290 ||41 |41 |0|0x0560
UNIT_TYPE_CHA
0 |0x01 |0x08 |48 |0x02 |4 ||0x000022A0 ||42 |42 |0|0x0580
UNIT_TYPE_CHA
0 |0x01 |0x08 |48 |0x02 |4 ||0x000022B0 ||43 |43 |0|0x05A0
UNIT_TYPE_CHA
0 |0x01 |0x08 |48 |0x02 |4 ||0x000022C0 ||44 |44 |0|0x05C0
UNIT_TYPE_CHA
0 |0x01 |0x08 |48 |0x02 |4 ||0x000022D0 ||45 |45 |0|0x05E0
UNIT_TYPE_CHA
0 |0x01 |0x08 |48 |0x02 |4 ||0x000022E0 ||46 |46 |0|0x0600
UNIT_TYPE_CHA
0 |0x01 |0x08 |48 |0x02 |4 ||0x000022F0 ||47 |47 |0|0x0620
UNIT_TYPE_CHA
0 |0x01 |0x08 |48 |0x02 |4 ||0x00002300 ||48 |48 |0|0x0640
UNIT_TYPE_CHA
0 |0x01 |0x08 |48 |0x02 |4 ||0x00002310 ||49 |49 |0|0x0660
UNIT_TYPE_CHA
0 |0x01 |0x08 |48 |0x02 |4 ||0x00002320 ||50 |50 |0|0x0680
UNIT_TYPE_CHA
0 |0x01 |0x08 |48 |0x02 |4 ||0x00002330 ||51 |51 |0|0x06A0
UNIT_TYPE_CHA
0 |0x01 |0x08 |48 |0x02 |4 ||0x00002340 ||52 |52 |0|0x06C0
UNIT_TYPE_CHA
0 |0x01 |0x08 |48 |0x02 |4 ||0x00002350 ||53 |53 |0|0x06E0
UNIT_TYPE_CHA
0 |0x01 |0x08 |48 |0x02 |4 ||0x00002360 ||54 |54 |0|0x0700
UNIT_TYPE_CHA
0 |0x01 |0x08 |48 |0x02 |4 ||0x00002370 ||55 |55 |0|0x0720
UNIT_TYPE_CHA
0 |0x01 |0x08 |48 |0x02 |4 ||0x00002380 ||56 |56 |0|0x0740
UNIT_TYPE_CHA
0 |0x01 |0x08 |48 |0x02 |4 ||0x00002390 ||57 |57 |0|0x0760
UNIT_TYPE_CHA
0 |0x01 |0x08 |48 |0x02 |4 ||0x000023A0 ||58 |58 |0|0x0780
UNIT_TYPE_CHA
0 |0x01 |0x08 |48 |0x02 |4 ||0x000023B0 ||59 |59 |0|0x07A0
UNIT_TYPE_TC
0 |0x01 |0x08 |48 |0x02 |4 ||0x00003000 ||100 | 0 |1|0x0C60
UNIT_TYPE_TC
0 |0x01 |0x08 |48 |0x02 |4 ||0x00003010 ||101 | 1 |1|0x0CC0
UNIT_TYPE_TC
0 |0x01 |0x08 |48 |0x02 |4 ||0x00003020 ||102 | 2 |1|0x0D20
UNIT_TYPE_TC
0 |0x01 |0x08 |48 |0x02 |4 ||0x00003030 ||103 | 3 |1|0x0D80
UNIT_TYPE_TC
0 |0x00 |0x00 | 0 |0x00 |0 ||0x00000000 || 0 | 0 |0|0x0DE0
UNIT_TYPE_TC
0 |0x01 |0x08 |48 |0x02 |4 ||0x00003040 ||105 | 5 |1|0x0E40
UNIT_TYPE_TC
0 |0x01 |0x08 |48 |0x02 |4 ||0x00003050 ||106 | 6 |1|0x0EA0
UNIT_TYPE_TC
0 |0x01 |0x08 |48 |0x02 |4 ||0x00003060 ||107 | 7 |1|0x0F00
UNIT_TYPE_TC
0 |0x01 |0x08 |48 |0x02 |4 ||0x00003070 ||108 | 8 |1|0x0F60
UNIT_TYPE_TC
0 |0x01 |0x08 |48 |0x02 |4 ||0x00003080 ||109 | 9 |1|0x0FC0
UNIT_TYPE_TC
0 |0x00 |0x00 | 0 |0x00 |0 ||0x00000000 || 0 | 0 |0|0x1020
UNIT_TYPE_TC
0 |0x01 |0x08 |48 |0x02 |4 ||0x00003090 ||111 |11 |1|0x1080
UNIT_TYPE_IRP
0 |0x01 |0x08 |48 |0x02 |2 ||0x00003400 ||112 | 0 |2|0x0C80
UNIT_TYPE_IRP
0 |0x01 |0x08 |48 |0x02 |2 ||0x00003410 ||113 | 1 |2|0x0CE0
UNIT_TYPE_IRP
0 |0x01 |0x08 |48 |0x02 |2 ||0x00003420 ||114 | 2 |2|0x0D40
UNIT_TYPE_IRP
0 |0x01 |0x08 |48 |0x02 |2 ||0x00003430 ||115 | 3 |2|0x0DA0
UNIT_TYPE_IRP
0 |0x00 |0x00 | 0 |0x00 |0 ||0x00000000 || 0 | 0 |0|0x0E00
UNIT_TYPE_IRP
0 |0x01 |0x08 |48 |0x02 |2 ||0x00003440 ||117 | 5 |2|0x0E60
UNIT_TYPE_IRP
0 |0x01 |0x08 |48 |0x02 |2 ||0x00003450 ||118 | 6 |2|0x0EC0
UNIT_TYPE_IRP
0 |0x01 |0x08 |48 |0x02 |2 ||0x00003460 ||119 | 7 |2|0x0F20
UNIT_TYPE_IRP
0 |0x01 |0x08 |48 |0x02 |2 ||0x00003470 ||120 | 8 |2|0x0F80
UNIT_TYPE_IRP
0 |0x01 |0x08 |48 |0x02 |2 ||0x00003480 ||121 | 9 |2|0x0FE0
UNIT_TYPE_IRP
0 |0x00 |0x00 | 0 |0x00 |0 ||0x00000000 || 0 | 0 |0|0x1040
UNIT_TYPE_IRP
0 |0x01 |0x08 |48 |0x02 |2 ||0x00003490 ||123 |11 |2|0x10A0
UNIT_TYPE_M2PCIE
0 |0x01 |0x08 |48 |0x02 |4 ||0x00003200 ||124 | 0 |3|0x0C40
UNIT_TYPE_M2PCIE
0 |0x01 |0x08 |48 |0x02 |4 ||0x00003210 ||125 | 1 |3|0x0CA0
UNIT_TYPE_M2PCIE
0 |0x01 |0x08 |48 |0x02 |4 ||0x00003220 ||126 | 2 |3|0x0D00
UNIT_TYPE_M2PCIE
0 |0x01 |0x08 |48 |0x02 |4 ||0x00003230 ||127 | 3 |3|0x0D60
UNIT_TYPE_M2PCIE
0 |0x00 |0x00 | 0 |0x00 |0 ||0x00000000 || 0 | 0 |0|0x0DC0
UNIT_TYPE_M2PCIE
0 |0x01 |0x08 |48 |0x02 |4 ||0x00003240 ||129 | 5 |3|0x0E20
UNIT_TYPE_M2PCIE
0 |0x01 |0x08 |48 |0x02 |4 ||0x00003250 ||130 | 6 |3|0x0E80
UNIT_TYPE_M2PCIE
0 |0x01 |0x08 |48 |0x02 |4 ||0x00003260 ||131 | 7 |3|0x0EE0
UNIT_TYPE_M2PCIE
0 |0x01 |0x08 |48 |0x02 |4 ||0x00003270 ||132 | 8 |3|0x0F40
UNIT_TYPE_M2PCIE
0 |0x01 |0x08 |48 |0x02 |4 ||0x00003280 ||133 | 9 |3|0x0FA0
UNIT_TYPE_M2PCIE
0 |0x00 |0x00 | 0 |0x00 |0 ||0x00000000 || 0 | 0 |0|0x1000
UNIT_TYPE_M2PCIE
0 |0x01 |0x08 |48 |0x02 |4 ||0x00003290 ||135 |11 |3|0x1060
UNIT_TYPE_PCU
0 |0x01 |0x08 |48 |0x02 |4 ||0x00002FC0 ||136 | 0 |4|0x0020
UNIT_TYPE_MC
1 |0x5C |0x08 |48 |0x40 |4 ||0xFBAA2800 ||138 | 0 |6|0x08C0
UNIT_TYPE_MC
1 |0x5C |0x08 |48 |0x40 |4 ||0xFBAAA800 ||139 | 1 |6|0x08E0
UNIT_TYPE_MC
1 |0x5C |0x08 |48 |0x40 |4 ||0xFBB22800 ||140 | 2 |6|0x0900
UNIT_TYPE_MC
1 |0x5C |0x08 |48 |0x40 |4 ||0xFBB2A800 ||141 | 3 |6|0x0920
UNIT_TYPE_MC
1 |0x5C |0x08 |48 |0x40 |4 ||0xFBBA2800 ||142 | 4 |6|0x0940
UNIT_TYPE_MC
1 |0x5C |0x08 |48 |0x40 |4 ||0xFBBAA800 ||143 | 5 |6|0x0960
UNIT_TYPE_MC
1 |0x5C |0x08 |48 |0x40 |4 ||0xFBC22800 ||144 | 6 |6|0x0980
UNIT_TYPE_MC
1 |0x5C |0x08 |48 |0x40 |4 ||0xFBC2A800 ||145 | 7 |6|0x09A0
UNIT_TYPE_M2M
2 |0x70 |0x08 |48 |0x30 |4 ||0x8FE60438 ||146 | 0 |7|0x09C0
UNIT_TYPE_M2M
2 |0x70 |0x08 |48 |0x30 |4 ||0x8FE68438 ||147 | 1 |7|0x09E0
UNIT_TYPE_M2M
2 |0x70 |0x08 |48 |0x30 |4 ||0x8FE70438 ||148 | 2 |7|0x0A00
UNIT_TYPE_M2M
2 |0x70 |0x08 |48 |0x30 |4 ||0x8FE78438 ||149 | 3 |7|0x0A20
UNIT_TYPE_M2M
2 |0x70 |0x08 |48 |0x30 |4 ||0x8FE80438 ||150 | 4 |7|0x0A40
UNIT_TYPE_M2M
2 |0x70 |0x08 |48 |0x30 |4 ||0x8FE88438 ||151 | 5 |7|0x0A60
UNIT_TYPE_M2M
2 |0x70 |0x08 |48 |0x30 |4 ||0x8FE90438 ||152 | 6 |7|0x0A80
UNIT_TYPE_M2M
2 |0x70 |0x08 |48 |0x30 |4 ||0x8FE98438 ||153 | 7 |7|0x0AA0
UNIT_TYPE_M2M
2 |0x70 |0x08 |48 |0x30 |4 ||0x8FEA0438 ||154 | 8 |7|0x0AC0
UNIT_TYPE_M2M
2 |0x70 |0x08 |48 |0x30 |4 ||0x8FEA8438 ||155 | 9 |7|0x0AE0
UNIT_TYPE_M2M
2 |0x70 |0x08 |48 |0x30 |4 ||0x8FEB0438 ||156 |10 |7|0x0B00
UNIT_TYPE_M2M
2 |0x70 |0x08 |48 |0x30 |4 ||0x8FEB8438 ||157 |11 |7|0x0B20
UNIT_TYPE_M2M
2 |0x70 |0x08 |48 |0x30 |4 ||0x8FEC0438 ||158 |12 |7|0x0B40
UNIT_TYPE_M2M
2 |0x70 |0x08 |48 |0x30 |4 ||0x8FEC8438 ||159 |13 |7|0x0B60
UNIT_TYPE_M2M
2 |0x70 |0x08 |48 |0x30 |4 ||0x8FED0438 ||160 |14 |7|0x0B80
UNIT_TYPE_M2M
2 |0x70 |0x08 |48 |0x30 |4 ||0x8FED8438 ||161 |15 |7|0x0BA0
UNIT_TYPE_M2M
2 |0x70 |0x08 |48 |0x30 |4 ||0x8FEE0438 ||162 |16 |7|0x0BC0
UNIT_TYPE_M2M
2 |0x70 |0x08 |48 |0x30 |4 ||0x8FEE8438 ||163 |17 |7|0x0BE0
UNIT_TYPE_M2M
2 |0x70 |0x08 |48 |0x30 |4 ||0x8FEF0438 ||164 |18 |7|0x0C00
UNIT_TYPE_M2M
2 |0x70 |0x08 |48 |0x30 |4 ||0x8FEF8438 ||165 |19 |7|0x0C20
UNIT_TYPE_UPI_LL
2 |0x64 |0x08 |48 |0x38 |4 ||0x8FE09318 ||166 | 0 |8|0x07E0
UNIT_TYPE_UPI_LL
2 |0x64 |0x08 |48 |0x38 |4 ||0x8FE11318 ||167 | 1 |8|0x0820
UNIT_TYPE_UPI_LL
2 |0x64 |0x08 |48 |0x38 |4 ||0x8FE19318 ||168 | 2 |8|0x0860
UNIT_TYPE_UPI_LL
2 |0x64 |0x08 |48 |0x38 |4 ||0x8FE21318 ||169 | 3 |8|0x08A0
UNIT_TYPE_M3UPI
2 |0x58 |0x08 |48 |0x38 |4 ||0x8FE290A0 ||170 | 0 |9|0x07C0
UNIT_TYPE_M3UPI
2 |0x58 |0x08 |48 |0x38 |4 ||0x8FE310A0 ||171 | 1 |9|0x0800
UNIT_TYPE_M3UPI
2 |0x58 |0x08 |48 |0x38 |4 ||0x8FE390A0 ||172 | 2 |9|0x0840
UNIT_TYPE_M3UPI
2 |0x58 |0x08 |48 |0x38 |4 ||0x8FE410A0 ||173 | 3 |9|0x0880
UNIT_TYPE_MDF
0 |0x01 |0x08 |48 |0x02 |4 ||0x00002840 ||60 | 0 |11|0x12C0
UNIT_TYPE_MDF
0 |0x01 |0x08 |48 |0x02 |4 ||0x00002850 ||61 | 1 |11|0x12E0
UNIT_TYPE_MDF
0 |0x01 |0x08 |48 |0x02 |4 ||0x00002860 ||62 | 2 |11|0x1300
UNIT_TYPE_MDF
0 |0x01 |0x08 |48 |0x02 |4 ||0x00002870 ||63 | 3 |11|0x1320
UNIT_TYPE_MDF
0 |0x01 |0x08 |48 |0x02 |4 ||0x00002880 ||64 | 4 |11|0x1340
UNIT_TYPE_MDF
0 |0x01 |0x08 |48 |0x02 |4 ||0x00002890 ||65 | 5 |11|0x1360
UNIT_TYPE_MDF
0 |0x01 |0x08 |48 |0x02 |4 ||0x000028E0 ||66 | 6 |11|0x1380
UNIT_TYPE_MDF
0 |0x01 |0x08 |48 |0x02 |4 ||0x000028F0 ||67 | 7 |11|0x13A0
UNIT_TYPE_MDF
0 |0x01 |0x08 |48 |0x02 |4 ||0x00002900 ||68 | 8 |11|0x13C0
UNIT_TYPE_MDF
0 |0x01 |0x08 |48 |0x02 |4 ||0x00002910 ||69 | 9 |11|0x13E0
UNIT_TYPE_MDF
0 |0x01 |0x08 |48 |0x02 |4 ||0x00002920 ||70 |10 |11|0x1400
UNIT_TYPE_MDF
0 |0x01 |0x08 |48 |0x02 |4 ||0x00002930 ||71 |11 |11|0x1420
UNIT_TYPE_MDF
0 |0x01 |0x08 |48 |0x02 |4 ||0x00002980 ||72 |12 |11|0x1440
UNIT_TYPE_MDF
0 |0x01 |0x08 |48 |0x02 |4 ||0x00002990 ||73 |13 |11|0x1460
UNIT_TYPE_MDF
0 |0x01 |0x08 |48 |0x02 |4 ||0x000029A0 ||74 |14 |11|0x1480
UNIT_TYPE_MDF
0 |0x01 |0x08 |48 |0x02 |4 ||0x000029B0 ||75 |15 |11|0x14A0
UNIT_TYPE_MDF
0 |0x01 |0x08 |48 |0x02 |4 ||0x000029C0 ||76 |16 |11|0x14C0
UNIT_TYPE_MDF
0 |0x01 |0x08 |48 |0x02 |4 ||0x000029D0 ||77 |17 |11|0x14E0
UNIT_TYPE_MDF
0 |0x01 |0x08 |48 |0x02 |4 ||0x00002A20 ||78 |18 |11|0x1500
UNIT_TYPE_MDF
0 |0x01 |0x08 |48 |0x02 |4 ||0x00002A30 ||79 |19 |11|0x1520
UNIT_TYPE_MDF
0 |0x01 |0x08 |48 |0x02 |4 ||0x00002A40 ||80 |20 |11|0x1540
UNIT_TYPE_MDF
0 |0x01 |0x08 |48 |0x02 |4 ||0x00002A50 ||81 |21 |11|0x1560
UNIT_TYPE_MDF
0 |0x01 |0x08 |48 |0x02 |4 ||0x00002A60 ||82 |22 |11|0x1580
UNIT_TYPE_MDF
0 |0x01 |0x08 |48 |0x02 |4 ||0x00002A70 ||83 |23 |11|0x15A0
UNIT_TYPE_MDF
0 |0x01 |0x08 |48 |0x02 |4 ||0x00002800 ||84 |24 |11|0x15C0
UNIT_TYPE_MDF
0 |0x01 |0x08 |48 |0x02 |4 ||0x00002810 ||85 |25 |11|0x15E0
UNIT_TYPE_MDF
0 |0x01 |0x08 |48 |0x02 |4 ||0x00002820 ||86 |26 |11|0x1600
UNIT_TYPE_MDF
0 |0x01 |0x08 |48 |0x02 |4 ||0x00002830 ||87 |27 |11|0x1620
UNIT_TYPE_MDF
0 |0x01 |0x08 |48 |0x02 |4 ||0x000028A0 ||88 |28 |11|0x1640
UNIT_TYPE_MDF
0 |0x01 |0x08 |48 |0x02 |4 ||0x000028B0 ||89 |29 |11|0x1660
UNIT_TYPE_MDF
0 |0x01 |0x08 |48 |0x02 |4 ||0x000028C0 ||90 |30 |11|0x1680
UNIT_TYPE_MDF
0 |0x01 |0x08 |48 |0x02 |4 ||0x000028D0 ||91 |31 |11|0x16A0
UNIT_TYPE_MDF
0 |0x01 |0x08 |48 |0x02 |4 ||0x00002970 ||92 |32 |11|0x16C0
UNIT_TYPE_MDF
0 |0x01 |0x08 |48 |0x02 |4 ||0x00002960 ||93 |33 |11|0x16E0
UNIT_TYPE_MDF
0 |0x01 |0x08 |48 |0x02 |4 ||0x00002950 ||94 |34 |11|0x1700
UNIT_TYPE_MDF
0 |0x01 |0x08 |48 |0x02 |4 ||0x00002940 ||95 |35 |11|0x1720
UNIT_TYPE_MDF
0 |0x01 |0x08 |48 |0x02 |4 ||0x00002A10 ||96 |36 |11|0x1740
UNIT_TYPE_MDF
0 |0x01 |0x08 |48 |0x02 |4 ||0x00002A00 ||97 |37 |11|0x1760
UNIT_TYPE_MDF
0 |0x01 |0x08 |48 |0x02 |4 ||0x000029F0 ||98 |38 |11|0x1780
UNIT_TYPE_MDF
0 |0x01 |0x08 |48 |0x02 |4 ||0x000029E0 ||99 |39 |11|0x17A0
UNIT_TYPE_IAL_0
0 |0x00 |0x00 | 0 |0x00 |0 ||0x00000000 || 0 | 0 |0|0x10C0
UNIT_TYPE_IAL_0
0 |0x00 |0x00 | 0 |0x00 |0 ||0x00000000 || 0 | 0 |0|0x1100
UNIT_TYPE_IAL_0
0 |0x00 |0x00 | 0 |0x00 |0 ||0x00000000 || 0 | 0 |0|0x1140
UNIT_TYPE_IAL_0
0 |0x00 |0x00 | 0 |0x00 |0 ||0x00000000 || 0 | 0 |0|0x1180
UNIT_TYPE_IAL_0
0 |0x00 |0x00 | 0 |0x00 |0 ||0x00000000 || 0 | 0 |0|0x11C0
UNIT_TYPE_IAL_0
0 |0x00 |0x00 | 0 |0x00 |0 ||0x00000000 || 0 | 0 |0|0x1200
UNIT_TYPE_IAL_0
0 |0x00 |0x00 | 0 |0x00 |0 ||0x00000000 || 0 | 0 |0|0x1240
UNIT_TYPE_IAL_0
0 |0x00 |0x00 | 0 |0x00 |0 ||0x00000000 || 0 | 0 |0|0x1280
UNIT_TYPE_IAL_1
0 |0x00 |0x00 | 0 |0x00 |0 ||0x00000000 || 0 | 0 |0|0x10E0
UNIT_TYPE_IAL_1
0 |0x00 |0x00 | 0 |0x00 |0 ||0x00000000 || 0 | 0 |0|0x1120
UNIT_TYPE_IAL_1
0 |0x00 |0x00 | 0 |0x00 |0 ||0x00000000 || 0 | 0 |0|0x1160
UNIT_TYPE_IAL_1
0 |0x00 |0x00 | 0 |0x00 |0 ||0x00000000 || 0 | 0 |0|0x11A0
UNIT_TYPE_IAL_1
0 |0x00 |0x00 | 0 |0x00 |0 ||0x00000000 || 0 | 0 |0|0x11E0
UNIT_TYPE_IAL_1
0 |0x00 |0x00 | 0 |0x00 |0 ||0x00000000 || 0 | 0 |0|0x1220
UNIT_TYPE_IAL_1
0 |0x00 |0x00 | 0 |0x00 |0 ||0x00000000 || 0 | 0 |0|0x1260
UNIT_TYPE_IAL_1
0 |0x00 |0x00 | 0 |0x00 |0 ||0x00000000 || 0 | 0 |0|0x12A0
UNIT_TYPE_HBM
1 |0x5C |0x08 |48 |0x40 |4 ||0xFB941C00 ||190 | 0 |14|0x17C0
UNIT_TYPE_HBM
1 |0x5C |0x08 |48 |0x40 |4 ||0xFB945C00 ||191 | 1 |14|0x17E0
UNIT_TYPE_HBM
1 |0x5C |0x08 |48 |0x40 |4 ||0xFB94AC00 ||192 | 2 |14|0x1800
UNIT_TYPE_HBM
1 |0x5C |0x08 |48 |0x40 |4 ||0xFB94EC00 ||193 | 3 |14|0x1820
UNIT_TYPE_HBM
1 |0x5C |0x08 |48 |0x40 |4 ||0xFB953C00 ||194 | 4 |14|0x1840
UNIT_TYPE_HBM
1 |0x5C |0x08 |48 |0x40 |4 ||0xFB957C00 ||195 | 5 |14|0x1860
UNIT_TYPE_HBM
1 |0x5C |0x08 |48 |0x40 |4 ||0xFB95CC00 ||196 | 6 |14|0x1880
UNIT_TYPE_HBM
1 |0x5C |0x08 |48 |0x40 |4 ||0xFB960C00 ||197 | 7 |14|0x18A0
UNIT_TYPE_HBM
1 |0x5C |0x08 |48 |0x40 |4 ||0xFB965C00 ||198 | 8 |14|0x18C0
UNIT_TYPE_HBM
1 |0x5C |0x08 |48 |0x40 |4 ||0xFB969C00 ||199 | 9 |14|0x18E0
UNIT_TYPE_HBM
1 |0x5C |0x08 |48 |0x40 |4 ||0xFB96EC00 ||200 |10 |14|0x1900
UNIT_TYPE_HBM
1 |0x5C |0x08 |48 |0x40 |4 ||0xFB972C00 ||201 |11 |14|0x1920
UNIT_TYPE_HBM
1 |0x5C |0x08 |48 |0x40 |4 ||0xFB977C00 ||202 |12 |14|0x1940
UNIT_TYPE_HBM
1 |0x5C |0x08 |48 |0x40 |4 ||0xFB97BC00 ||203 |13 |14|0x1960
UNIT_TYPE_HBM
1 |0x5C |0x08 |48 |0x40 |4 ||0xFB980C00 ||204 |14 |14|0x1980
UNIT_TYPE_HBM
1 |0x5C |0x08 |48 |0x40 |4 ||0xFB984C00 ||205 |15 |14|0x19A0
UNIT_TYPE_HBM
1 |0x5C |0x08 |48 |0x40 |4 ||0xFB989C00 ||206 |16 |14|0x19C0
UNIT_TYPE_HBM
1 |0x5C |0x08 |48 |0x40 |4 ||0xFB98DC00 ||207 |17 |14|0x19E0
UNIT_TYPE_HBM
1 |0x5C |0x08 |48 |0x40 |4 ||0xFB992C00 ||208 |18 |14|0x1A00
UNIT_TYPE_HBM
1 |0x5C |0x08 |48 |0x40 |4 ||0xFB996C00 ||209 |19 |14|0x1A20
UNIT_TYPE_HBM
1 |0x5C |0x08 |48 |0x40 |4 ||0xFB99BC00 ||210 |20 |14|0x1A40
UNIT_TYPE_HBM
1 |0x5C |0x08 |48 |0x40 |4 ||0xFB99FC00 ||211 |21 |14|0x1A60
UNIT_TYPE_HBM
1 |0x5C |0x08 |48 |0x40 |4 ||0xFB9A4C00 ||212 |22 |14|0x1A80
UNIT_TYPE_HBM
1 |0x5C |0x08 |48 |0x40 |4 ||0xFB9A8C00 ||213 |23 |14|0x1AA0
UNIT_TYPE_HBM
1 |0x5C |0x08 |48 |0x40 |4 ||0xFB9ADC00 ||214 |24 |14|0x1AC0
UNIT_TYPE_HBM
1 |0x5C |0x08 |48 |0x40 |4 ||0xFB9B1C00 ||215 |25 |14|0x1AE0
UNIT_TYPE_HBM
1 |0x5C |0x08 |48 |0x40 |4 ||0xFB9B6C00 ||216 |26 |14|0x1B00
UNIT_TYPE_HBM
1 |0x5C |0x08 |48 |0x40 |4 ||0xFB9BAC00 ||217 |27 |14|0x1B20
UNIT_TYPE_HBM
1 |0x5C |0x08 |48 |0x40 |4 ||0xFB9BFC00 ||218 |28 |14|0x1B40
UNIT_TYPE_HBM
1 |0x5C |0x08 |48 |0x40 |4 ||0xFB9C3C00 ||219 |29 |14|0x1B60
UNIT_TYPE_HBM
1 |0x5C |0x08 |48 |0x40 |4 ||0xFB9C8C00 ||220 |30 |14|0x1B80
UNIT_TYPE_HBM
1 |0x5C |0x08 |48 |0x40 |4 ||0xFB9CCC00 ||221 |31 |14|0x1BA0
[OOBMSM] InitOobMsmBar() Enter
Socket[1], OobMsm.Func[2], BAR[0]
Disable MSE and BME
Original StsCmdReg Value = 0x00100004
BarSize: 0x00200000
BarBase: 0xF9C00000(Already assigned)
Enable MSE and BME
[OOBMSM] InitOobMsmBar() Exit
SPK Bar0 address: 0xF9C00000
SPK instance 0: BAR offset: 0x00058000
SPK SNC Base Address 1: 0x0FFF0082
SPK SNC Base Address 2: 0x1FE000A2
SPK SNC Base Address 3: 0x000000C2
SPK SNC Base Address 4: 0x000000E2
SPK SNC Base Address 5: 0x00000102
SPK SNC Upper Base Address: 0x00000000
SPK_SNC_CONFIG: 0x0000000F
SPK_UNCORE_SNC_CONFIG: NumChaPerCluster:13, BaseChaCluster1:13, BaseChaCluster2:26, BaseChaCluster3:39
SPK_UMA_CLUSTER_CFG: UmaClusterEn: 0, XorDefeatur: 0
SPK instance 1: BAR offset: 0x00059000
SPK SNC Base Address 1: 0x0FFF0082
SPK SNC Base Address 2: 0x1FE000A2
SPK SNC Base Address 3: 0x000000C2
SPK SNC Base Address 4: 0x000000E2
SPK SNC Base Address 5: 0x00000102
SPK SNC Upper Base Address: 0x00000000
SPK_SNC_CONFIG: 0x0000000F
SPK_UNCORE_SNC_CONFIG: NumChaPerCluster:13, BaseChaCluster1:13, BaseChaCluster2:26, BaseChaCluster3:39
SPK_UMA_CLUSTER_CFG: UmaClusterEn: 0, XorDefeatur: 0
SPK instance 2: BAR offset: 0x0005A000
SPK SNC Base Address 1: 0x0FFF0082
SPK SNC Base Address 2: 0x1FE000A2
SPK SNC Base Address 3: 0x000000C2
SPK SNC Base Address 4: 0x000000E2
SPK SNC Base Address 5: 0x00000102
SPK SNC Upper Base Address: 0x00000000
SPK_SNC_CONFIG: 0x0000000F
SPK_UNCORE_SNC_CONFIG: NumChaPerCluster:13, BaseChaCluster1:13, BaseChaCluster2:26, BaseChaCluster3:39
SPK_UMA_CLUSTER_CFG: UmaClusterEn: 0, XorDefeatur: 0
SPK instance 3: BAR offset: 0x0005B000
SPK SNC Base Address 1: 0x0FFF0082
SPK SNC Base Address 2: 0x1FE000A2
SPK SNC Base Address 3: 0x000000C2
SPK SNC Base Address 4: 0x000000E2
SPK SNC Base Address 5: 0x00000102
SPK SNC Upper Base Address: 0x00000000
SPK_SNC_CONFIG: 0x0000000F
SPK_UNCORE_SNC_CONFIG: NumChaPerCluster:13, BaseChaCluster1:13, BaseChaCluster2:26, BaseChaCluster3:39
SPK_UMA_CLUSTER_CFG: UmaClusterEn: 0, XorDefeatur: 0
SPK instance 4: BAR offset: 0x0005C000
SPK SNC Base Address 1: 0x0FFF0082
SPK SNC Base Address 2: 0x1FE000A2
SPK SNC Base Address 3: 0x000000C2
SPK SNC Base Address 4: 0x000000E2
SPK SNC Base Address 5: 0x00000102
SPK SNC Upper Base Address: 0x00000000
SPK_SNC_CONFIG: 0x0000000F
SPK_UNCORE_SNC_CONFIG: NumChaPerCluster:13, BaseChaCluster1:13, BaseChaCluster2:26, BaseChaCluster3:39
SPK_UMA_CLUSTER_CFG: UmaClusterEn: 0, XorDefeatur: 0
SPK instance 5: BAR offset: 0x0005D000
SPK SNC Base Address 1: 0x0FFF0082
SPK SNC Base Address 2: 0x1FE000A2
SPK SNC Base Address 3: 0x000000C2
SPK SNC Base Address 4: 0x000000E2
SPK SNC Base Address 5: 0x00000102
SPK SNC Upper Base Address: 0x00000000
SPK_SNC_CONFIG: 0x0000000F
SPK_UNCORE_SNC_CONFIG: NumChaPerCluster:13, BaseChaCluster1:13, BaseChaCluster2:26, BaseChaCluster3:39
SPK_UMA_CLUSTER_CFG: UmaClusterEn: 0, XorDefeatur: 0
SPK instance 6: BAR offset: 0x0005E000
SPK SNC Base Address 1: 0x0FFF0082
SPK SNC Base Address 2: 0x1FE000A2
SPK SNC Base Address 3: 0x000000C2
SPK SNC Base Address 4: 0x000000E2
SPK SNC Base Address 5: 0x00000102
SPK SNC Upper Base Address: 0x00000000
SPK_SNC_CONFIG: 0x0000000F
SPK_UNCORE_SNC_CONFIG: NumChaPerCluster:13, BaseChaCluster1:13, BaseChaCluster2:26, BaseChaCluster3:39
SPK_UMA_CLUSTER_CFG: UmaClusterEn: 0, XorDefeatur: 0
SPK instance 7: BAR offset: 0x0005F000
SPK SNC Base Address 1: 0x0FFF0082
SPK SNC Base Address 2: 0x1FE000A2
SPK SNC Base Address 3: 0x000000C2
SPK SNC Base Address 4: 0x000000E2
SPK SNC Base Address 5: 0x00000102
SPK SNC Upper Base Address: 0x00000000
SPK_SNC_CONFIG: 0x0000000F
SPK_UNCORE_SNC_CONFIG: NumChaPerCluster:13, BaseChaCluster1:13, BaseChaCluster2:26, BaseChaCluster3:39
SPK_UMA_CLUSTER_CFG: UmaClusterEn: 0, XorDefeatur: 0
SPK instance 8: BAR offset: 0x00060000
SPK SNC Base Address 1: 0x0FFF0082
SPK SNC Base Address 2: 0x1FE000A2
SPK SNC Base Address 3: 0x000000C2
SPK SNC Base Address 4: 0x000000E2
SPK SNC Base Address 5: 0x00000102
SPK SNC Upper Base Address: 0x00000000
SPK_SNC_CONFIG: 0x0000000F
SPK_UNCORE_SNC_CONFIG: NumChaPerCluster:13, BaseChaCluster1:13, BaseChaCluster2:26, BaseChaCluster3:39
SPK_UMA_CLUSTER_CFG: UmaClusterEn: 0, XorDefeatur: 0
SPK instance 9: BAR offset: 0x00061000
SPK SNC Base Address 1: 0x0FFF0082
SPK SNC Base Address 2: 0x1FE000A2
SPK SNC Base Address 3: 0x000000C2
SPK SNC Base Address 4: 0x000000E2
SPK SNC Base Address 5: 0x00000102
SPK SNC Upper Base Address: 0x00000000
SPK_SNC_CONFIG: 0x0000000F
SPK_UNCORE_SNC_CONFIG: NumChaPerCluster:13, BaseChaCluster1:13, BaseChaCluster2:26, BaseChaCluster3:39
SPK_UMA_CLUSTER_CFG: UmaClusterEn: 0, XorDefeatur: 0
SPK instance 10: BAR offset: 0x00062000
SPK SNC Base Address 1: 0x0FFF0082
SPK SNC Base Address 2: 0x1FE000A2
SPK SNC Base Address 3: 0x000000C2
SPK SNC Base Address 4: 0x000000E2
SPK SNC Base Address 5: 0x00000102
SPK SNC Upper Base Address: 0x00000000
SPK_SNC_CONFIG: 0x0000000F
SPK_UNCORE_SNC_CONFIG: NumChaPerCluster:13, BaseChaCluster1:13, BaseChaCluster2:26, BaseChaCluster3:39
SPK_UMA_CLUSTER_CFG: UmaClusterEn: 0, XorDefeatur: 0
SPK instance 11: BAR offset: 0x00063000
SPK SNC Base Address 1: 0x0FFF0082
SPK SNC Base Address 2: 0x1FE000A2
SPK SNC Base Address 3: 0x000000C2
SPK SNC Base Address 4: 0x000000E2
SPK SNC Base Address 5: 0x00000102
SPK SNC Upper Base Address: 0x00000000
SPK_SNC_CONFIG: 0x0000000F
SPK_UNCORE_SNC_CONFIG: NumChaPerCluster:13, BaseChaCluster1:13, BaseChaCluster2:26, BaseChaCluster3:39
SPK_UMA_CLUSTER_CFG: UmaClusterEn: 0, XorDefeatur: 0
SPK instance 12: BAR offset: 0x00070000
SPK SNC Base Address 1: 0x0FFF0082
SPK SNC Base Address 2: 0x1FE000A2
SPK SNC Base Address 3: 0x000000C2
SPK SNC Base Address 4: 0x000000E2
SPK SNC Base Address 5: 0x00000102
SPK SNC Upper Base Address: 0x00000000
SPK_SNC_CONFIG: 0x0000000F
SPK_UNCORE_SNC_CONFIG: NumChaPerCluster:13, BaseChaCluster1:13, BaseChaCluster2:26, BaseChaCluster3:39
SPK_UMA_CLUSTER_CFG: UmaClusterEn: 0, XorDefeatur: 0
SPK instance 13: BAR offset: 0x00071000
SPK SNC Base Address 1: 0x0FFF0082
SPK SNC Base Address 2: 0x1FE000A2
SPK SNC Base Address 3: 0x000000C2
SPK SNC Base Address 4: 0x000000E2
SPK SNC Base Address 5: 0x00000102
SPK SNC Upper Base Address: 0x00000000
SPK_SNC_CONFIG: 0x0000000F
SPK_UNCORE_SNC_CONFIG: NumChaPerCluster:13, BaseChaCluster1:13, BaseChaCluster2:26, BaseChaCluster3:39
SPK_UMA_CLUSTER_CFG: UmaClusterEn: 0, XorDefeatur: 0
SPK instance 14: BAR offset: 0x00072000
SPK SNC Base Address 1: 0x0FFF0082
SPK SNC Base Address 2: 0x1FE000A2
SPK SNC Base Address 3: 0x000000C2
SPK SNC Base Address 4: 0x000000E2
SPK SNC Base Address 5: 0x00000102
SPK SNC Upper Base Address: 0x00000000
SPK_SNC_CONFIG: 0x0000000F
SPK_UNCORE_SNC_CONFIG: NumChaPerCluster:13, BaseChaCluster1:13, BaseChaCluster2:26, BaseChaCluster3:39
SPK_UMA_CLUSTER_CFG: UmaClusterEn: 0, XorDefeatur: 0
SPK instance 15: BAR offset: 0x00073000
SPK SNC Base Address 1: 0x0FFF0082
SPK SNC Base Address 2: 0x1FE000A2
SPK SNC Base Address 3: 0x000000C2
SPK SNC Base Address 4: 0x000000E2
SPK SNC Base Address 5: 0x00000102
SPK SNC Upper Base Address: 0x00000000
SPK_SNC_CONFIG: 0x0000000F
SPK_UNCORE_SNC_CONFIG: NumChaPerCluster:13, BaseChaCluster1:13, BaseChaCluster2:26, BaseChaCluster3:39
SPK_UMA_CLUSTER_CFG: UmaClusterEn: 0, XorDefeatur: 0
**** SNC XPT DUMP START ****
**** CPU 0: ****
SNC_CONFIG_MS2IDI : 0x0000000F
UNCORE_SNC_CONFIG_MS2IDI : 0x271A0D0D
UMA_CLUSTER_MS2IDI : 0x00000000
XPT_2_ENTRY_MINISAD_TABLE : 0x00000000
XPT_LOCAL_PREFETCH_CONFIG1 : 0x000400BD
XPT_LOCAL_PREFETCH_CONFIG2 : 0x008186A0
XPT_32_ENTRY_MINISAD_TABLE_0 : 0x00000000
XPT_32_ENTRY_MINISAD_TABLE_1 : 0x00000000
XPT_32_ENTRY_MINISAD_TABLE_2 : 0x00000000
XPT_32_ENTRY_MINISAD_TABLE_3 : 0x00000000
XPT_32_ENTRY_MINISAD_TABLE_4 : 0x00000000
XPT_32_ENTRY_MINISAD_TABLE_5 : 0x00000000
XPT_32_ENTRY_PREFETCH_BASE_0 : 0x00000000
XPT_32_ENTRY_PREFETCH_BASE_1 : 0x00000000
XPT_32_ENTRY_PREFETCH_BASE_2 : 0x00000000
XPT_32_ENTRY_PREFETCH_BASE_3 : 0x00000000
XPT_REMOTE_PREFETCH_CONFIG1 : 0x000400BD
XPT_REMOTE_PREFETCH_CONFIG2 : 0x008186A0
XPT_UPI_DECODE_TABLE_0_N0: 0x00000000
XPT_UPI_DECODE_TABLE_0_N1: 0x00000000
XPT_UPI_DECODE_TABLE_1_N0: 0x00000000
XPT_UPI_DECODE_TABLE_1_N1: 0x00000000
XPT_UPI_DECODE_TABLE_2_N0: 0x00000000
XPT_UPI_DECODE_TABLE_2_N1: 0x00000000
XPT_UPI_DECODE_TABLE_3_N0: 0x00000000
XPT_UPI_DECODE_TABLE_3_N1: 0x00000000
KTI_0_SNC_CONFIG_KTI : 0x0000000F
KTI_0_KTIAGCTRL : 0x00101012
KTI_0_KTI_SNC_BASE_1 : 0x0FFF0000
KTI_0_KTI_SNC_BASE_2 : 0x1FE00022
KTI_0_KTI_SNC_BASE_3 : 0x00000042
KTI_0_KTI_SNC_BASE_4 : 0x00000062
KTI_0_KTI_SNC_BASE_5 : 0x00000082
M3KTI 0:
M3KPRECTRL_0 : 0x00000040
M3KPRETL_0 : 0x00000000
KTI_1_SNC_CONFIG_KTI : 0x0000000F
KTI_1_KTIAGCTRL : 0x00101012
KTI_1_KTI_SNC_BASE_1 : 0x0FFF0000
KTI_1_KTI_SNC_BASE_2 : 0x1FE00022
KTI_1_KTI_SNC_BASE_3 : 0x00000042
KTI_1_KTI_SNC_BASE_4 : 0x00000062
KTI_1_KTI_SNC_BASE_5 : 0x00000082
M3KTI 1:
M3KPRECTRL_1 : 0x00000040
M3KPRETL_1 : 0x00000000
KTI_2_SNC_CONFIG_KTI : 0x0000000F
KTI_2_KTIAGCTRL : 0x00101012
KTI_2_KTI_SNC_BASE_1 : 0x0FFF0000
KTI_2_KTI_SNC_BASE_2 : 0x1FE00022
KTI_2_KTI_SNC_BASE_3 : 0x00000042
KTI_2_KTI_SNC_BASE_4 : 0x00000062
KTI_2_KTI_SNC_BASE_5 : 0x00000082
M3KTI 2:
M3KPRECTRL_2 : 0x00000040
M3KPRETL_2 : 0x00000000
KTI_3_SNC_CONFIG_KTI : 0x0000000F
KTI_3_KTIAGCTRL : 0x00101012
KTI_3_KTI_SNC_BASE_1 : 0x0FFF0000
KTI_3_KTI_SNC_BASE_2 : 0x1FE00022
KTI_3_KTI_SNC_BASE_3 : 0x00000042
KTI_3_KTI_SNC_BASE_4 : 0x00000062
KTI_3_KTI_SNC_BASE_5 : 0x00000082
M3KTI 3:
M3KPRECTRL_3 : 0x00000040
M3KPRETL_3 : 0x00000000
CHA_SNC_CONFIG_CHA_PMA : 0x271A0D0F
SNC_CONFIG_IIO_VTD : 0x0000000F
UNCORE_SNC_IIO_VTD : 0x04E6868D
SNC_BASE_1_IIO_VTD : 0x0FFF0000
SNC_BASE_2_IIO_VTD : 0x1FE00022
SNC_BASE_3_IIO_VTD : 0x00000042
SNC_BASE_4_IIO_VTD : 0x00000062
SNC_BASE_5_IIO_VTD : 0x00000082
IIO 0:
IIO_0_SNC_CONFIG_IIO : 0x0000000F
IIO_0_SNC_BASE_1 : 0x0FFF0000
IIO_0_SNC_BASE_2 : 0x1FE00022
IIO_0_SNC_BASE_3 : 0x00000042
IIO_0_SNC_BASE_4 : 0x00000062
IIO_0_SNC_BASE_5 : 0x00000082
IIO 1:
IIO_1_SNC_CONFIG_IIO : 0x0000000F
IIO_1_SNC_BASE_1 : 0x0FFF0000
IIO_1_SNC_BASE_2 : 0x1FE00022
IIO_1_SNC_BASE_3 : 0x00000042
IIO_1_SNC_BASE_4 : 0x00000062
IIO_1_SNC_BASE_5 : 0x00000082
IIO 2:
IIO_2_SNC_CONFIG_IIO : 0x0000000F
IIO_2_SNC_BASE_1 : 0x0FFF0000
IIO_2_SNC_BASE_2 : 0x1FE00022
IIO_2_SNC_BASE_3 : 0x00000042
IIO_2_SNC_BASE_4 : 0x00000062
IIO_2_SNC_BASE_5 : 0x00000082
IIO 3:
IIO_3_SNC_CONFIG_IIO : 0x0000000F
IIO_3_SNC_BASE_1 : 0x0FFF0000
IIO_3_SNC_BASE_2 : 0x1FE00022
IIO_3_SNC_BASE_3 : 0x00000042
IIO_3_SNC_BASE_4 : 0x00000062
IIO_3_SNC_BASE_5 : 0x00000082
IIO 4:
IIO_4_SNC_CONFIG_IIO : 0x0000000F
IIO_4_SNC_BASE_1 : 0x0FFF0000
IIO_4_SNC_BASE_2 : 0x1FE00022
IIO_4_SNC_BASE_3 : 0x00000042
IIO_4_SNC_BASE_4 : 0x00000062
IIO_4_SNC_BASE_5 : 0x00000082
IIO 5:
IIO_5_SNC_CONFIG_IIO : 0x0000000F
IIO_5_SNC_BASE_1 : 0x0FFF0000
IIO_5_SNC_BASE_2 : 0x1FE00022
IIO_5_SNC_BASE_3 : 0x00000042
IIO_5_SNC_BASE_4 : 0x00000062
IIO_5_SNC_BASE_5 : 0x00000082
IIO 8:
IIO_8_SNC_CONFIG_IIO : 0x0000000F
IIO_8_SNC_BASE_1 : 0x0FFF0000
IIO_8_SNC_BASE_2 : 0x1FE00022
IIO_8_SNC_BASE_3 : 0x00000042
IIO_8_SNC_BASE_4 : 0x00000062
IIO_8_SNC_BASE_5 : 0x00000082
IIO 9:
IIO_9_SNC_CONFIG_IIO : 0x0000000F
IIO_9_SNC_BASE_1 : 0x0FFF0000
IIO_9_SNC_BASE_2 : 0x1FE00022
IIO_9_SNC_BASE_3 : 0x00000042
IIO_9_SNC_BASE_4 : 0x00000062
IIO_9_SNC_BASE_5 : 0x00000082
IIO 10:
IIO_10_SNC_CONFIG_IIO : 0x0000000F
IIO_10_SNC_BASE_1 : 0x0FFF0000
IIO_10_SNC_BASE_2 : 0x1FE00022
IIO_10_SNC_BASE_3 : 0x00000042
IIO_10_SNC_BASE_4 : 0x00000062
IIO_10_SNC_BASE_5 : 0x00000082
IIO 11:
IIO_11_SNC_CONFIG_IIO : 0x0000000F
IIO_11_SNC_BASE_1 : 0x0FFF0000
IIO_11_SNC_BASE_2 : 0x1FE00022
IIO_11_SNC_BASE_3 : 0x00000042
IIO_11_SNC_BASE_4 : 0x00000062
IIO_11_SNC_BASE_5 : 0x00000082
M2MEM_0_TOPOLOGY : 0x00018000
M2MEM_0_PREFSADCONFIG0 : 0x00000000
M2MEM_0_PREFSADCONFIG1 : 0x00000000
M2MEM_0_PREFETCHSADSTARTADDR0 : 0x00000000
M2MEM_0_PREFETCHSADLIMITADDR0 : 0x00000000
M2MEM_0_PREFETCHSADSTARTADDR1 : 0x00000000
M2MEM_0_PREFETCHSADLIMITADDR1 : 0x00000000
M2MEM_0_PREFETCHSADSTARTADDR2 : 0x00000000
M2MEM_0_PREFETCHSADLIMITADDR2 : 0x00000000
M2MEM_0_SYSFEATURES0 : 0x1340008D
M2MEM_1_TOPOLOGY : 0x00032340
M2MEM_1_PREFSADCONFIG0 : 0x00000000
M2MEM_1_PREFSADCONFIG1 : 0x00000000
M2MEM_1_PREFETCHSADSTARTADDR0 : 0x00000000
M2MEM_1_PREFETCHSADLIMITADDR0 : 0x00000000
M2MEM_1_PREFETCHSADSTARTADDR1 : 0x00000000
M2MEM_1_PREFETCHSADLIMITADDR1 : 0x00000000
M2MEM_1_PREFETCHSADSTARTADDR2 : 0x00000000
M2MEM_1_PREFETCHSADLIMITADDR2 : 0x00000000
M2MEM_1_SYSFEATURES0 : 0x1340008D
M2MEM_2_TOPOLOGY : 0x0004C680
M2MEM_2_PREFSADCONFIG0 : 0x00000000
M2MEM_2_PREFSADCONFIG1 : 0x00000000
M2MEM_2_PREFETCHSADSTARTADDR0 : 0x00000000
M2MEM_2_PREFETCHSADLIMITADDR0 : 0x00000000
M2MEM_2_PREFETCHSADSTARTADDR1 : 0x00000000
M2MEM_2_PREFETCHSADLIMITADDR1 : 0x00000000
M2MEM_2_PREFETCHSADSTARTADDR2 : 0x00000000
M2MEM_2_PREFETCHSADLIMITADDR2 : 0x00000000
M2MEM_2_SYSFEATURES0 : 0x1340008D
M2MEM_3_TOPOLOGY : 0x000669C0
M2MEM_3_PREFSADCONFIG0 : 0x00000000
M2MEM_3_PREFSADCONFIG1 : 0x00000000
M2MEM_3_PREFETCHSADSTARTADDR0 : 0x00000000
M2MEM_3_PREFETCHSADLIMITADDR0 : 0x00000000
M2MEM_3_PREFETCHSADSTARTADDR1 : 0x00000000
M2MEM_3_PREFETCHSADLIMITADDR1 : 0x00000000
M2MEM_3_PREFETCHSADSTARTADDR2 : 0x00000000
M2MEM_3_PREFETCHSADLIMITADDR2 : 0x00000000
M2MEM_3_SYSFEATURES0 : 0x1340008D
M2MEM_4_TOPOLOGY : 0x00018000
M2MEM_4_PREFSADCONFIG0 : 0x00000000
M2MEM_4_PREFSADCONFIG1 : 0x00000000
M2MEM_4_PREFETCHSADSTARTADDR0 : 0x00000000
M2MEM_4_PREFETCHSADLIMITADDR0 : 0x00000000
M2MEM_4_PREFETCHSADSTARTADDR1 : 0x00000000
M2MEM_4_PREFETCHSADLIMITADDR1 : 0x00000000
M2MEM_4_PREFETCHSADSTARTADDR2 : 0x00000000
M2MEM_4_PREFETCHSADLIMITADDR2 : 0x00000000
M2MEM_4_SYSFEATURES0 : 0x1368009C
M2MEM_5_TOPOLOGY : 0x00018000
M2MEM_5_PREFSADCONFIG0 : 0x00000000
M2MEM_5_PREFSADCONFIG1 : 0x00000000
M2MEM_5_PREFETCHSADSTARTADDR0 : 0x00000000
M2MEM_5_PREFETCHSADLIMITADDR0 : 0x00000000
M2MEM_5_PREFETCHSADSTARTADDR1 : 0x00000000
M2MEM_5_PREFETCHSADLIMITADDR1 : 0x00000000
M2MEM_5_PREFETCHSADSTARTADDR2 : 0x00000000
M2MEM_5_PREFETCHSADLIMITADDR2 : 0x00000000
M2MEM_5_SYSFEATURES0 : 0x1368009C
M2MEM_6_TOPOLOGY : 0x00018000
M2MEM_6_PREFSADCONFIG0 : 0x00000000
M2MEM_6_PREFSADCONFIG1 : 0x00000000
M2MEM_6_PREFETCHSADSTARTADDR0 : 0x00000000
M2MEM_6_PREFETCHSADLIMITADDR0 : 0x00000000
M2MEM_6_PREFETCHSADSTARTADDR1 : 0x00000000
M2MEM_6_PREFETCHSADLIMITADDR1 : 0x00000000
M2MEM_6_PREFETCHSADSTARTADDR2 : 0x00000000
M2MEM_6_PREFETCHSADLIMITADDR2 : 0x00000000
M2MEM_6_SYSFEATURES0 : 0x1368009C
M2MEM_7_TOPOLOGY : 0x00018000
M2MEM_7_PREFSADCONFIG0 : 0x00000000
M2MEM_7_PREFSADCONFIG1 : 0x00000000
M2MEM_7_PREFETCHSADSTARTADDR0 : 0x00000000
M2MEM_7_PREFETCHSADLIMITADDR0 : 0x00000000
M2MEM_7_PREFETCHSADSTARTADDR1 : 0x00000000
M2MEM_7_PREFETCHSADLIMITADDR1 : 0x00000000
M2MEM_7_PREFETCHSADSTARTADDR2 : 0x00000000
M2MEM_7_PREFETCHSADLIMITADDR2 : 0x00000000
M2MEM_7_SYSFEATURES0 : 0x1368009C
M2MEM_8_TOPOLOGY : 0x00032340
M2MEM_8_PREFSADCONFIG0 : 0x00000000
M2MEM_8_PREFSADCONFIG1 : 0x00000000
M2MEM_8_PREFETCHSADSTARTADDR0 : 0x00000000
M2MEM_8_PREFETCHSADLIMITADDR0 : 0x00000000
M2MEM_8_PREFETCHSADSTARTADDR1 : 0x00000000
M2MEM_8_PREFETCHSADLIMITADDR1 : 0x00000000
M2MEM_8_PREFETCHSADSTARTADDR2 : 0x00000000
M2MEM_8_PREFETCHSADLIMITADDR2 : 0x00000000
M2MEM_8_SYSFEATURES0 : 0x1368009C
M2MEM_9_TOPOLOGY : 0x00032340
M2MEM_9_PREFSADCONFIG0 : 0x00000000
M2MEM_9_PREFSADCONFIG1 : 0x00000000
M2MEM_9_PREFETCHSADSTARTADDR0 : 0x00000000
M2MEM_9_PREFETCHSADLIMITADDR0 : 0x00000000
M2MEM_9_PREFETCHSADSTARTADDR1 : 0x00000000
M2MEM_9_PREFETCHSADLIMITADDR1 : 0x00000000
M2MEM_9_PREFETCHSADSTARTADDR2 : 0x00000000
M2MEM_9_PREFETCHSADLIMITADDR2 : 0x00000000
M2MEM_9_SYSFEATURES0 : 0x1368009C
M2MEM_10_TOPOLOGY : 0x00032340
M2MEM_10_PREFSADCONFIG0 : 0x00000000
M2MEM_10_PREFSADCONFIG1 : 0x00000000
M2MEM_10_PREFETCHSADSTARTADDR0 : 0x00000000
M2MEM_10_PREFETCHSADLIMITADDR0 : 0x00000000
M2MEM_10_PREFETCHSADSTARTADDR1 : 0x00000000
M2MEM_10_PREFETCHSADLIMITADDR1 : 0x00000000
M2MEM_10_PREFETCHSADSTARTADDR2 : 0x00000000
M2MEM_10_PREFETCHSADLIMITADDR2 : 0x00000000
M2MEM_10_SYSFEATURES0 : 0x1368009C
M2MEM_11_TOPOLOGY : 0x00032340
M2MEM_11_PREFSADCONFIG0 : 0x00000000
M2MEM_11_PREFSADCONFIG1 : 0x00000000
M2MEM_11_PREFETCHSADSTARTADDR0 : 0x00000000
M2MEM_11_PREFETCHSADLIMITADDR0 : 0x00000000
M2MEM_11_PREFETCHSADSTARTADDR1 : 0x00000000
M2MEM_11_PREFETCHSADLIMITADDR1 : 0x00000000
M2MEM_11_PREFETCHSADSTARTADDR2 : 0x00000000
M2MEM_11_PREFETCHSADLIMITADDR2 : 0x00000000
M2MEM_11_SYSFEATURES0 : 0x1368009C
M2MEM_12_TOPOLOGY : 0x0004C680
M2MEM_12_PREFSADCONFIG0 : 0x00000000
M2MEM_12_PREFSADCONFIG1 : 0x00000000
M2MEM_12_PREFETCHSADSTARTADDR0 : 0x00000000
M2MEM_12_PREFETCHSADLIMITADDR0 : 0x00000000
M2MEM_12_PREFETCHSADSTARTADDR1 : 0x00000000
M2MEM_12_PREFETCHSADLIMITADDR1 : 0x00000000
M2MEM_12_PREFETCHSADSTARTADDR2 : 0x00000000
M2MEM_12_PREFETCHSADLIMITADDR2 : 0x00000000
M2MEM_12_SYSFEATURES0 : 0x1368009C
M2MEM_13_TOPOLOGY : 0x0004C680
M2MEM_13_PREFSADCONFIG0 : 0x00000000
M2MEM_13_PREFSADCONFIG1 : 0x00000000
M2MEM_13_PREFETCHSADSTARTADDR0 : 0x00000000
M2MEM_13_PREFETCHSADLIMITADDR0 : 0x00000000
M2MEM_13_PREFETCHSADSTARTADDR1 : 0x00000000
M2MEM_13_PREFETCHSADLIMITADDR1 : 0x00000000
M2MEM_13_PREFETCHSADSTARTADDR2 : 0x00000000
M2MEM_13_PREFETCHSADLIMITADDR2 : 0x00000000
M2MEM_13_SYSFEATURES0 : 0x1368009C
M2MEM_14_TOPOLOGY : 0x0004C680
M2MEM_14_PREFSADCONFIG0 : 0x00000000
M2MEM_14_PREFSADCONFIG1 : 0x00000000
M2MEM_14_PREFETCHSADSTARTADDR0 : 0x00000000
M2MEM_14_PREFETCHSADLIMITADDR0 : 0x00000000
M2MEM_14_PREFETCHSADSTARTADDR1 : 0x00000000
M2MEM_14_PREFETCHSADLIMITADDR1 : 0x00000000
M2MEM_14_PREFETCHSADSTARTADDR2 : 0x00000000
M2MEM_14_PREFETCHSADLIMITADDR2 : 0x00000000
M2MEM_14_SYSFEATURES0 : 0x1368009C
M2MEM_15_TOPOLOGY : 0x0004C680
M2MEM_15_PREFSADCONFIG0 : 0x00000000
M2MEM_15_PREFSADCONFIG1 : 0x00000000
M2MEM_15_PREFETCHSADSTARTADDR0 : 0x00000000
M2MEM_15_PREFETCHSADLIMITADDR0 : 0x00000000
M2MEM_15_PREFETCHSADSTARTADDR1 : 0x00000000
M2MEM_15_PREFETCHSADLIMITADDR1 : 0x00000000
M2MEM_15_PREFETCHSADSTARTADDR2 : 0x00000000
M2MEM_15_PREFETCHSADLIMITADDR2 : 0x00000000
M2MEM_15_SYSFEATURES0 : 0x1368009C
M2MEM_16_TOPOLOGY : 0x000669C0
M2MEM_16_PREFSADCONFIG0 : 0x00000000
M2MEM_16_PREFSADCONFIG1 : 0x00000000
M2MEM_16_PREFETCHSADSTARTADDR0 : 0x00000000
M2MEM_16_PREFETCHSADLIMITADDR0 : 0x00000000
M2MEM_16_PREFETCHSADSTARTADDR1 : 0x00000000
M2MEM_16_PREFETCHSADLIMITADDR1 : 0x00000000
M2MEM_16_PREFETCHSADSTARTADDR2 : 0x00000000
M2MEM_16_PREFETCHSADLIMITADDR2 : 0x00000000
M2MEM_16_SYSFEATURES0 : 0x1368009C
M2MEM_17_TOPOLOGY : 0x000669C0
M2MEM_17_PREFSADCONFIG0 : 0x00000000
M2MEM_17_PREFSADCONFIG1 : 0x00000000
M2MEM_17_PREFETCHSADSTARTADDR0 : 0x00000000
M2MEM_17_PREFETCHSADLIMITADDR0 : 0x00000000
M2MEM_17_PREFETCHSADSTARTADDR1 : 0x00000000
M2MEM_17_PREFETCHSADLIMITADDR1 : 0x00000000
M2MEM_17_PREFETCHSADSTARTADDR2 : 0x00000000
M2MEM_17_PREFETCHSADLIMITADDR2 : 0x00000000
M2MEM_17_SYSFEATURES0 : 0x1368009C
M2MEM_18_TOPOLOGY : 0x000669C0
M2MEM_18_PREFSADCONFIG0 : 0x00000000
M2MEM_18_PREFSADCONFIG1 : 0x00000000
M2MEM_18_PREFETCHSADSTARTADDR0 : 0x00000000
M2MEM_18_PREFETCHSADLIMITADDR0 : 0x00000000
M2MEM_18_PREFETCHSADSTARTADDR1 : 0x00000000
M2MEM_18_PREFETCHSADLIMITADDR1 : 0x00000000
M2MEM_18_PREFETCHSADSTARTADDR2 : 0x00000000
M2MEM_18_PREFETCHSADLIMITADDR2 : 0x00000000
M2MEM_18_SYSFEATURES0 : 0x1368009C
M2MEM_19_TOPOLOGY : 0x000669C0
M2MEM_19_PREFSADCONFIG0 : 0x00000000
M2MEM_19_PREFSADCONFIG1 : 0x00000000
M2MEM_19_PREFETCHSADSTARTADDR0 : 0x00000000
M2MEM_19_PREFETCHSADLIMITADDR0 : 0x00000000
M2MEM_19_PREFETCHSADSTARTADDR1 : 0x00000000
M2MEM_19_PREFETCHSADLIMITADDR1 : 0x00000000
M2MEM_19_PREFETCHSADSTARTADDR2 : 0x00000000
M2MEM_19_PREFETCHSADLIMITADDR2 : 0x00000000
M2MEM_19_SYSFEATURES0 : 0x1368009C
**** CPU 1: ****
SNC_CONFIG_MS2IDI : 0x0000000F
UNCORE_SNC_CONFIG_MS2IDI : 0x271A0D0D
UMA_CLUSTER_MS2IDI : 0x00000000
XPT_2_ENTRY_MINISAD_TABLE : 0x00000000
XPT_LOCAL_PREFETCH_CONFIG1 : 0x000400BD
XPT_LOCAL_PREFETCH_CONFIG2 : 0x008186A0
XPT_32_ENTRY_MINISAD_TABLE_0 : 0x00000000
XPT_32_ENTRY_MINISAD_TABLE_1 : 0x00000000
XPT_32_ENTRY_MINISAD_TABLE_2 : 0x00000000
XPT_32_ENTRY_MINISAD_TABLE_3 : 0x00000000
XPT_32_ENTRY_MINISAD_TABLE_4 : 0x00000000
XPT_32_ENTRY_MINISAD_TABLE_5 : 0x00000000
XPT_32_ENTRY_PREFETCH_BASE_0 : 0x00000000
XPT_32_ENTRY_PREFETCH_BASE_1 : 0x00000000
XPT_32_ENTRY_PREFETCH_BASE_2 : 0x00000000
XPT_32_ENTRY_PREFETCH_BASE_3 : 0x00000000
XPT_REMOTE_PREFETCH_CONFIG1 : 0x000400BD
XPT_REMOTE_PREFETCH_CONFIG2 : 0x008186A0
XPT_UPI_DECODE_TABLE_0_N0: 0x00000000
XPT_UPI_DECODE_TABLE_0_N1: 0x00000000
XPT_UPI_DECODE_TABLE_1_N0: 0x00000000
XPT_UPI_DECODE_TABLE_1_N1: 0x00000000
XPT_UPI_DECODE_TABLE_2_N0: 0x00000000
XPT_UPI_DECODE_TABLE_2_N1: 0x00000000
XPT_UPI_DECODE_TABLE_3_N0: 0x00000000
XPT_UPI_DECODE_TABLE_3_N1: 0x00000000
KTI_0_SNC_CONFIG_KTI : 0x0000000F
KTI_0_KTIAGCTRL : 0x00101012
KTI_0_KTI_SNC_BASE_1 : 0x0FFF0082
KTI_0_KTI_SNC_BASE_2 : 0x1FE000A2
KTI_0_KTI_SNC_BASE_3 : 0x000000C2
KTI_0_KTI_SNC_BASE_4 : 0x000000E2
KTI_0_KTI_SNC_BASE_5 : 0x00000102
M3KTI 0:
M3KPRECTRL_0 : 0x00000040
M3KPRETL_0 : 0x00000000
KTI_1_SNC_CONFIG_KTI : 0x0000000F
KTI_1_KTIAGCTRL : 0x00101012
KTI_1_KTI_SNC_BASE_1 : 0x0FFF0082
KTI_1_KTI_SNC_BASE_2 : 0x1FE000A2
KTI_1_KTI_SNC_BASE_3 : 0x000000C2
KTI_1_KTI_SNC_BASE_4 : 0x000000E2
KTI_1_KTI_SNC_BASE_5 : 0x00000102
M3KTI 1:
M3KPRECTRL_1 : 0x00000040
M3KPRETL_1 : 0x00000000
KTI_2_SNC_CONFIG_KTI : 0x0000000F
KTI_2_KTIAGCTRL : 0x00101012
KTI_2_KTI_SNC_BASE_1 : 0x0FFF0082
KTI_2_KTI_SNC_BASE_2 : 0x1FE000A2
KTI_2_KTI_SNC_BASE_3 : 0x000000C2
KTI_2_KTI_SNC_BASE_4 : 0x000000E2
KTI_2_KTI_SNC_BASE_5 : 0x00000102
M3KTI 2:
M3KPRECTRL_2 : 0x00000040
M3KPRETL_2 : 0x00000000
KTI_3_SNC_CONFIG_KTI : 0x0000000F
KTI_3_KTIAGCTRL : 0x00101012
KTI_3_KTI_SNC_BASE_1 : 0x0FFF0082
KTI_3_KTI_SNC_BASE_2 : 0x1FE000A2
KTI_3_KTI_SNC_BASE_3 : 0x000000C2
KTI_3_KTI_SNC_BASE_4 : 0x000000E2
KTI_3_KTI_SNC_BASE_5 : 0x00000102
M3KTI 3:
M3KPRECTRL_3 : 0x00000040
M3KPRETL_3 : 0x00000000
CHA_SNC_CONFIG_CHA_PMA : 0x271A0D0F
SNC_CONFIG_IIO_VTD : 0x0000000F
UNCORE_SNC_IIO_VTD : 0x04E6868D
SNC_BASE_1_IIO_VTD : 0x0FFF0082
SNC_BASE_2_IIO_VTD : 0x1FE000A2
SNC_BASE_3_IIO_VTD : 0x000000C2
SNC_BASE_4_IIO_VTD : 0x000000E2
SNC_BASE_5_IIO_VTD : 0x00000102
IIO 1:
IIO_1_SNC_CONFIG_IIO : 0x0000000F
IIO_1_SNC_BASE_1 : 0x0FFF0082
IIO_1_SNC_BASE_2 : 0x1FE000A2
IIO_1_SNC_BASE_3 : 0x000000C2
IIO_1_SNC_BASE_4 : 0x000000E2
IIO_1_SNC_BASE_5 : 0x00000102
IIO 2:
IIO_2_SNC_CONFIG_IIO : 0x0000000F
IIO_2_SNC_BASE_1 : 0x0FFF0082
IIO_2_SNC_BASE_2 : 0x1FE000A2
IIO_2_SNC_BASE_3 : 0x000000C2
IIO_2_SNC_BASE_4 : 0x000000E2
IIO_2_SNC_BASE_5 : 0x00000102
IIO 3:
IIO_3_SNC_CONFIG_IIO : 0x0000000F
IIO_3_SNC_BASE_1 : 0x0FFF0082
IIO_3_SNC_BASE_2 : 0x1FE000A2
IIO_3_SNC_BASE_3 : 0x000000C2
IIO_3_SNC_BASE_4 : 0x000000E2
IIO_3_SNC_BASE_5 : 0x00000102
IIO 4:
IIO_4_SNC_CONFIG_IIO : 0x0000000F
IIO_4_SNC_BASE_1 : 0x0FFF0082
IIO_4_SNC_BASE_2 : 0x1FE000A2
IIO_4_SNC_BASE_3 : 0x000000C2
IIO_4_SNC_BASE_4 : 0x000000E2
IIO_4_SNC_BASE_5 : 0x00000102
IIO 5:
IIO_5_SNC_CONFIG_IIO : 0x0000000F
IIO_5_SNC_BASE_1 : 0x0FFF0082
IIO_5_SNC_BASE_2 : 0x1FE000A2
IIO_5_SNC_BASE_3 : 0x000000C2
IIO_5_SNC_BASE_4 : 0x000000E2
IIO_5_SNC_BASE_5 : 0x00000102
IIO 6:
IIO_6_SNC_CONFIG_IIO : 0x0000000F
IIO_6_SNC_BASE_1 : 0x0FFF0082
IIO_6_SNC_BASE_2 : 0x1FE000A2
IIO_6_SNC_BASE_3 : 0x000000C2
IIO_6_SNC_BASE_4 : 0x000000E2
IIO_6_SNC_BASE_5 : 0x00000102
IIO 8:
IIO_8_SNC_CONFIG_IIO : 0x0000000F
IIO_8_SNC_BASE_1 : 0x0FFF0082
IIO_8_SNC_BASE_2 : 0x1FE000A2
IIO_8_SNC_BASE_3 : 0x000000C2
IIO_8_SNC_BASE_4 : 0x000000E2
IIO_8_SNC_BASE_5 : 0x00000102
IIO 9:
IIO_9_SNC_CONFIG_IIO : 0x0000000F
IIO_9_SNC_BASE_1 : 0x0FFF0082
IIO_9_SNC_BASE_2 : 0x1FE000A2
IIO_9_SNC_BASE_3 : 0x000000C2
IIO_9_SNC_BASE_4 : 0x000000E2
IIO_9_SNC_BASE_5 : 0x00000102
IIO 10:
IIO_10_SNC_CONFIG_IIO : 0x0000000F
IIO_10_SNC_BASE_1 : 0x0FFF0082
IIO_10_SNC_BASE_2 : 0x1FE000A2
IIO_10_SNC_BASE_3 : 0x000000C2
IIO_10_SNC_BASE_4 : 0x000000E2
IIO_10_SNC_BASE_5 : 0x00000102
IIO 11:
IIO_11_SNC_CONFIG_IIO : 0x0000000F
IIO_11_SNC_BASE_1 : 0x0FFF0082
IIO_11_SNC_BASE_2 : 0x1FE000A2
IIO_11_SNC_BASE_3 : 0x000000C2
IIO_11_SNC_BASE_4 : 0x000000E2
IIO_11_SNC_BASE_5 : 0x00000102
M2MEM_0_TOPOLOGY : 0x00018001
M2MEM_0_PREFSADCONFIG0 : 0x00000000
M2MEM_0_PREFSADCONFIG1 : 0x00000000
M2MEM_0_PREFETCHSADSTARTADDR0 : 0x00000000
M2MEM_0_PREFETCHSADLIMITADDR0 : 0x00000000
M2MEM_0_PREFETCHSADSTARTADDR1 : 0x00000000
M2MEM_0_PREFETCHSADLIMITADDR1 : 0x00000000
M2MEM_0_PREFETCHSADSTARTADDR2 : 0x00000000
M2MEM_0_PREFETCHSADLIMITADDR2 : 0x00000000
M2MEM_0_SYSFEATURES0 : 0x1340008D
M2MEM_1_TOPOLOGY : 0x00032341
M2MEM_1_PREFSADCONFIG0 : 0x00000000
M2MEM_1_PREFSADCONFIG1 : 0x00000000
M2MEM_1_PREFETCHSADSTARTADDR0 : 0x00000000
M2MEM_1_PREFETCHSADLIMITADDR0 : 0x00000000
M2MEM_1_PREFETCHSADSTARTADDR1 : 0x00000000
M2MEM_1_PREFETCHSADLIMITADDR1 : 0x00000000
M2MEM_1_PREFETCHSADSTARTADDR2 : 0x00000000
M2MEM_1_PREFETCHSADLIMITADDR2 : 0x00000000
M2MEM_1_SYSFEATURES0 : 0x1340008D
M2MEM_2_TOPOLOGY : 0x0004C681
M2MEM_2_PREFSADCONFIG0 : 0x00000000
M2MEM_2_PREFSADCONFIG1 : 0x00000000
M2MEM_2_PREFETCHSADSTARTADDR0 : 0x00000000
M2MEM_2_PREFETCHSADLIMITADDR0 : 0x00000000
M2MEM_2_PREFETCHSADSTARTADDR1 : 0x00000000
M2MEM_2_PREFETCHSADLIMITADDR1 : 0x00000000
M2MEM_2_PREFETCHSADSTARTADDR2 : 0x00000000
M2MEM_2_PREFETCHSADLIMITADDR2 : 0x00000000
M2MEM_2_SYSFEATURES0 : 0x1340008D
M2MEM_3_TOPOLOGY : 0x000669C1
M2MEM_3_PREFSADCONFIG0 : 0x00000000
M2MEM_3_PREFSADCONFIG1 : 0x00000000
M2MEM_3_PREFETCHSADSTARTADDR0 : 0x00000000
M2MEM_3_PREFETCHSADLIMITADDR0 : 0x00000000
M2MEM_3_PREFETCHSADSTARTADDR1 : 0x00000000
M2MEM_3_PREFETCHSADLIMITADDR1 : 0x00000000
M2MEM_3_PREFETCHSADSTARTADDR2 : 0x00000000
M2MEM_3_PREFETCHSADLIMITADDR2 : 0x00000000
M2MEM_3_SYSFEATURES0 : 0x1340008D
M2MEM_4_TOPOLOGY : 0x00018001
M2MEM_4_PREFSADCONFIG0 : 0x00000000
M2MEM_4_PREFSADCONFIG1 : 0x00000000
M2MEM_4_PREFETCHSADSTARTADDR0 : 0x00000000
M2MEM_4_PREFETCHSADLIMITADDR0 : 0x00000000
M2MEM_4_PREFETCHSADSTARTADDR1 : 0x00000000
M2MEM_4_PREFETCHSADLIMITADDR1 : 0x00000000
M2MEM_4_PREFETCHSADSTARTADDR2 : 0x00000000
M2MEM_4_PREFETCHSADLIMITADDR2 : 0x00000000
M2MEM_4_SYSFEATURES0 : 0x1368009C
M2MEM_5_TOPOLOGY : 0x00018001
M2MEM_5_PREFSADCONFIG0 : 0x00000000
M2MEM_5_PREFSADCONFIG1 : 0x00000000
M2MEM_5_PREFETCHSADSTARTADDR0 : 0x00000000
M2MEM_5_PREFETCHSADLIMITADDR0 : 0x00000000
M2MEM_5_PREFETCHSADSTARTADDR1 : 0x00000000
M2MEM_5_PREFETCHSADLIMITADDR1 : 0x00000000
M2MEM_5_PREFETCHSADSTARTADDR2 : 0x00000000
M2MEM_5_PREFETCHSADLIMITADDR2 : 0x00000000
M2MEM_5_SYSFEATURES0 : 0x1368009C
M2MEM_6_TOPOLOGY : 0x00018001
M2MEM_6_PREFSADCONFIG0 : 0x00000000
M2MEM_6_PREFSADCONFIG1 : 0x00000000
M2MEM_6_PREFETCHSADSTARTADDR0 : 0x00000000
M2MEM_6_PREFETCHSADLIMITADDR0 : 0x00000000
M2MEM_6_PREFETCHSADSTARTADDR1 : 0x00000000
M2MEM_6_PREFETCHSADLIMITADDR1 : 0x00000000
M2MEM_6_PREFETCHSADSTARTADDR2 : 0x00000000
M2MEM_6_PREFETCHSADLIMITADDR2 : 0x00000000
M2MEM_6_SYSFEATURES0 : 0x1368009C
M2MEM_7_TOPOLOGY : 0x00018001
M2MEM_7_PREFSADCONFIG0 : 0x00000000
M2MEM_7_PREFSADCONFIG1 : 0x00000000
M2MEM_7_PREFETCHSADSTARTADDR0 : 0x00000000
M2MEM_7_PREFETCHSADLIMITADDR0 : 0x00000000
M2MEM_7_PREFETCHSADSTARTADDR1 : 0x00000000
M2MEM_7_PREFETCHSADLIMITADDR1 : 0x00000000
M2MEM_7_PREFETCHSADSTARTADDR2 : 0x00000000
M2MEM_7_PREFETCHSADLIMITADDR2 : 0x00000000
M2MEM_7_SYSFEATURES0 : 0x1368009C
M2MEM_8_TOPOLOGY : 0x00032341
M2MEM_8_PREFSADCONFIG0 : 0x00000000
M2MEM_8_PREFSADCONFIG1 : 0x00000000
M2MEM_8_PREFETCHSADSTARTADDR0 : 0x00000000
M2MEM_8_PREFETCHSADLIMITADDR0 : 0x00000000
M2MEM_8_PREFETCHSADSTARTADDR1 : 0x00000000
M2MEM_8_PREFETCHSADLIMITADDR1 : 0x00000000
M2MEM_8_PREFETCHSADSTARTADDR2 : 0x00000000
M2MEM_8_PREFETCHSADLIMITADDR2 : 0x00000000
M2MEM_8_SYSFEATURES0 : 0x1368009C
M2MEM_9_TOPOLOGY : 0x00032341
M2MEM_9_PREFSADCONFIG0 : 0x00000000
M2MEM_9_PREFSADCONFIG1 : 0x00000000
M2MEM_9_PREFETCHSADSTARTADDR0 : 0x00000000
M2MEM_9_PREFETCHSADLIMITADDR0 : 0x00000000
M2MEM_9_PREFETCHSADSTARTADDR1 : 0x00000000
M2MEM_9_PREFETCHSADLIMITADDR1 : 0x00000000
M2MEM_9_PREFETCHSADSTARTADDR2 : 0x00000000
M2MEM_9_PREFETCHSADLIMITADDR2 : 0x00000000
M2MEM_9_SYSFEATURES0 : 0x1368009C
M2MEM_10_TOPOLOGY : 0x00032341
M2MEM_10_PREFSADCONFIG0 : 0x00000000
M2MEM_10_PREFSADCONFIG1 : 0x00000000
M2MEM_10_PREFETCHSADSTARTADDR0 : 0x00000000
M2MEM_10_PREFETCHSADLIMITADDR0 : 0x00000000
M2MEM_10_PREFETCHSADSTARTADDR1 : 0x00000000
M2MEM_10_PREFETCHSADLIMITADDR1 : 0x00000000
M2MEM_10_PREFETCHSADSTARTADDR2 : 0x00000000
M2MEM_10_PREFETCHSADLIMITADDR2 : 0x00000000
M2MEM_10_SYSFEATURES0 : 0x1368009C
M2MEM_11_TOPOLOGY : 0x00032341
M2MEM_11_PREFSADCONFIG0 : 0x00000000
M2MEM_11_PREFSADCONFIG1 : 0x00000000
M2MEM_11_PREFETCHSADSTARTADDR0 : 0x00000000
M2MEM_11_PREFETCHSADLIMITADDR0 : 0x00000000
M2MEM_11_PREFETCHSADSTARTADDR1 : 0x00000000
M2MEM_11_PREFETCHSADLIMITADDR1 : 0x00000000
M2MEM_11_PREFETCHSADSTARTADDR2 : 0x00000000
M2MEM_11_PREFETCHSADLIMITADDR2 : 0x00000000
M2MEM_11_SYSFEATURES0 : 0x1368009C
M2MEM_12_TOPOLOGY : 0x0004C681
M2MEM_12_PREFSADCONFIG0 : 0x00000000
M2MEM_12_PREFSADCONFIG1 : 0x00000000
M2MEM_12_PREFETCHSADSTARTADDR0 : 0x00000000
M2MEM_12_PREFETCHSADLIMITADDR0 : 0x00000000
M2MEM_12_PREFETCHSADSTARTADDR1 : 0x00000000
M2MEM_12_PREFETCHSADLIMITADDR1 : 0x00000000
M2MEM_12_PREFETCHSADSTARTADDR2 : 0x00000000
M2MEM_12_PREFETCHSADLIMITADDR2 : 0x00000000
M2MEM_12_SYSFEATURES0 : 0x1368009C
M2MEM_13_TOPOLOGY : 0x0004C681
M2MEM_13_PREFSADCONFIG0 : 0x00000000
M2MEM_13_PREFSADCONFIG1 : 0x00000000
M2MEM_13_PREFETCHSADSTARTADDR0 : 0x00000000
M2MEM_13_PREFETCHSADLIMITADDR0 : 0x00000000
M2MEM_13_PREFETCHSADSTARTADDR1 : 0x00000000
M2MEM_13_PREFETCHSADLIMITADDR1 : 0x00000000
M2MEM_13_PREFETCHSADSTARTADDR2 : 0x00000000
M2MEM_13_PREFETCHSADLIMITADDR2 : 0x00000000
M2MEM_13_SYSFEATURES0 : 0x1368009C
M2MEM_14_TOPOLOGY : 0x0004C681
M2MEM_14_PREFSADCONFIG0 : 0x00000000
M2MEM_14_PREFSADCONFIG1 : 0x00000000
M2MEM_14_PREFETCHSADSTARTADDR0 : 0x00000000
M2MEM_14_PREFETCHSADLIMITADDR0 : 0x00000000
M2MEM_14_PREFETCHSADSTARTADDR1 : 0x00000000
M2MEM_14_PREFETCHSADLIMITADDR1 : 0x00000000
M2MEM_14_PREFETCHSADSTARTADDR2 : 0x00000000
M2MEM_14_PREFETCHSADLIMITADDR2 : 0x00000000
M2MEM_14_SYSFEATURES0 : 0x1368009C
M2MEM_15_TOPOLOGY : 0x0004C681
M2MEM_15_PREFSADCONFIG0 : 0x00000000
M2MEM_15_PREFSADCONFIG1 : 0x00000000
M2MEM_15_PREFETCHSADSTARTADDR0 : 0x00000000
M2MEM_15_PREFETCHSADLIMITADDR0 : 0x00000000
M2MEM_15_PREFETCHSADSTARTADDR1 : 0x00000000
M2MEM_15_PREFETCHSADLIMITADDR1 : 0x00000000
M2MEM_15_PREFETCHSADSTARTADDR2 : 0x00000000
M2MEM_15_PREFETCHSADLIMITADDR2 : 0x00000000
M2MEM_15_SYSFEATURES0 : 0x1368009C
M2MEM_16_TOPOLOGY : 0x000669C1
M2MEM_16_PREFSADCONFIG0 : 0x00000000
M2MEM_16_PREFSADCONFIG1 : 0x00000000
M2MEM_16_PREFETCHSADSTARTADDR0 : 0x00000000
M2MEM_16_PREFETCHSADLIMITADDR0 : 0x00000000
M2MEM_16_PREFETCHSADSTARTADDR1 : 0x00000000
M2MEM_16_PREFETCHSADLIMITADDR1 : 0x00000000
M2MEM_16_PREFETCHSADSTARTADDR2 : 0x00000000
M2MEM_16_PREFETCHSADLIMITADDR2 : 0x00000000
M2MEM_16_SYSFEATURES0 : 0x1368009C
M2MEM_17_TOPOLOGY : 0x000669C1
M2MEM_17_PREFSADCONFIG0 : 0x00000000
M2MEM_17_PREFSADCONFIG1 : 0x00000000
M2MEM_17_PREFETCHSADSTARTADDR0 : 0x00000000
M2MEM_17_PREFETCHSADLIMITADDR0 : 0x00000000
M2MEM_17_PREFETCHSADSTARTADDR1 : 0x00000000
M2MEM_17_PREFETCHSADLIMITADDR1 : 0x00000000
M2MEM_17_PREFETCHSADSTARTADDR2 : 0x00000000
M2MEM_17_PREFETCHSADLIMITADDR2 : 0x00000000
M2MEM_17_SYSFEATURES0 : 0x1368009C
M2MEM_18_TOPOLOGY : 0x000669C1
M2MEM_18_PREFSADCONFIG0 : 0x00000000
M2MEM_18_PREFSADCONFIG1 : 0x00000000
M2MEM_18_PREFETCHSADSTARTADDR0 : 0x00000000
M2MEM_18_PREFETCHSADLIMITADDR0 : 0x00000000
M2MEM_18_PREFETCHSADSTARTADDR1 : 0x00000000
M2MEM_18_PREFETCHSADLIMITADDR1 : 0x00000000
M2MEM_18_PREFETCHSADSTARTADDR2 : 0x00000000
M2MEM_18_PREFETCHSADLIMITADDR2 : 0x00000000
M2MEM_18_SYSFEATURES0 : 0x1368009C
M2MEM_19_TOPOLOGY : 0x000669C1
M2MEM_19_PREFSADCONFIG0 : 0x00000000
M2MEM_19_PREFSADCONFIG1 : 0x00000000
M2MEM_19_PREFETCHSADSTARTADDR0 : 0x00000000
M2MEM_19_PREFETCHSADLIMITADDR0 : 0x00000000
M2MEM_19_PREFETCHSADSTARTADDR1 : 0x00000000
M2MEM_19_PREFETCHSADLIMITADDR1 : 0x00000000
M2MEM_19_PREFETCHSADSTARTADDR2 : 0x00000000
M2MEM_19_PREFETCHSADLIMITADDR2 : 0x00000000
M2MEM_19_SYSFEATURES0 : 0x1368009C
**** SNC XPT DUMP END ****
Socket 0 AdTransgressCredits: 0x0, BlTransgressCredits: 0x0
Socket 1 AdTransgressCredits: 0x0, BlTransgressCredits: 0x0
MBA2.0 calibration tables
Mbe BW Calibration: 0 (0 - Linear, 1 - Biased, 2 - Legacy)
ProgramSncShadowReg
Socket:0 Base1 0x0FFF0000
Socket:0 Base2 0x1FE00022
Socket:0 Base3 0x00000042
Socket:0 Base4 0x00000062
Socket:0 Base5 0x00000082
Socket:0 UpperBase1 0x00000000
Socket:0 SncConfig 0x0000000A
Socket:1 Base1 0x0FFF0082
Socket:1 Base2 0x1FE000A2
Socket:1 Base3 0x000000C2
Socket:1 Base4 0x000000E2
Socket:1 Base5 0x00000102
Socket:1 UpperBase1 0x00000000
Socket:1 SncConfig 0x0000000A
******* Configure Mesh Mode - END *******
S3M Provisioning SoftStrap Disabled, Exit.
PUcode Patch provisioning/commit flow
S3mPucodeCfrPatchProvisionCommit didn't find suitable CFR image, Exit.
S3M Patch provisioning/commit flow
Get Image :FF800090 11FF4
CFR Patch Provision start...
IFWI integrated S3M CFR patch revision SVN: 00000001, RevID: 0000001E.
S0 S3M_S3MFW_CFR_SVN_N0_S3M_TREG_REG : 00000000
S0 S3M_S3MFW_REVID_N0_S3M_TREG_REG : 00000000
S0 S3M_S3MFW_CFR_SVN_N1_S3M_TREG_REG : 00010001
S0 S3M_S3MFW_REVID_N1_S3M_TREG_REG : 0000001E
Committed region with the latest patch, skip provision.
Socket 0 Can't Provision, Skip.
IFWI integrated S3M CFR patch revision SVN: 00000001, RevID: 0000001E.
S1 S3M_S3MFW_CFR_SVN_N0_S3M_TREG_REG : 00000000
S1 S3M_S3MFW_REVID_N0_S3M_TREG_REG : 00000000
S1 S3M_S3MFW_CFR_SVN_N1_S3M_TREG_REG : 00010001
S1 S3M_S3MFW_REVID_N1_S3M_TREG_REG : 0000001E
Committed region with the latest patch, skip provision.
Socket 1 Can't Provision, Skip.
CFR Patch Commit start...
S0 S3M_S3MFW_CFR_SVN_N0_S3M_TREG_REG : 00000000
S0 S3M_S3MFW_REVID_N0_S3M_TREG_REG : 00000000
Socket 0 can't commit, skip
S1 S3M_S3MFW_CFR_SVN_N0_S3M_TREG_REG : 00000000
S1 S3M_S3MFW_REVID_N0_S3M_TREG_REG : 00000000
Socket 1 can't commit, skip
CFR Patch Provision/Commit Completed.
IIO Early Post Link Training Starting...
[0.1 p1] 00:15:01.0: Link Down!
[0.2 p9] 00:26:01.0: Link Down!
[0.3 p17] 00:37:01.0: Link Down!
[0.4 p25] 00:48:01.0: Link Down!
[0.4 p27] 00:48:03.0: Link Down!
[0.4 p29] 00:48:05.0: Link Down!
[0.4 p31] 00:48:07.0: Link Down!
[0.5 p33] 00:59:01.0: Link Down!
[0.5 p35] 00:59:03.0: Link Down!
[0.5 p37] 00:59:05.0: Link Down!
[0.5 p39] 00:59:07.0: Link Down!
[1.1 p1] 00:97:01.0: Link Down!
[1.2 p9] 00:A7:01.0: Link Down!
[1.3 p17] 00:B7:01.0: Link Down!
[1.4 p25] 00:C7:01.0: Link Down!
[1.4 p27] 00:C7:03.0: Link Down!
[1.4 p29] 00:C7:05.0: Link Down!
[1.4 p31] 00:C7:07.0: Link Down!
[1.5 p33] 00:D7:01.0: Link Down!
[1.5 p35] 00:D7:03.0: Link Down!
[1.5 p37] 00:D7:05.0: Link Down!
[1.5 p39] 00:D7:07.0: Link Down!
[1.6 p41] 00:80:01.0: Link Down!
[1.6 p45] 00:80:05.0: Link Down!
IioLateInitialization for Socket = 0 Start..
[0] IioEarlyPostLinkTrainingPhase Start
[0 p0] DEVCAP2 7117D6 DEVCTL2 0010 -> 0009 -> 0009
CXL_IO_INIT_START
CXL_IO_INIT_END
FBLP_POST_TRAIN_INIT_START
FBLP_POST_TRAIN_INIT_END
[0.0] VT-d initialization, BAR=957FC000
[0.1] VT-d initialization, BAR=9F7FC000
[0.2] VT-d initialization, BAR=A93FC000
[0.3] VT-d initialization, BAR=B2FFC000
[0.4] VT-d initialization, BAR=BCBFC000
[0.5] VT-d initialization, BAR=C67FC000
[0.8] VT-d initialization, BAR=C6FFC000
[0.9] VT-d initialization, BAR=C77FC000
[0.10] VT-d initialization, BAR=C7FFC000
[0.11] VT-d initialization, BAR=C87FC000
IIO_PSF_INIT_START
IIO_PSF_INIT_END
[0] Hide devices; Phase = A
IioLateInitialization for Socket = 1 Start..
[1] IioEarlyPostLinkTrainingPhase Start
CXL_IO_INIT_START
CXL_IO_INIT_END
FBLP_POST_TRAIN_INIT_START
FBLP_POST_TRAIN_INIT_END
[1.1] VT-d initialization, BAR=D97FC000
[1.2] VT-d initialization, BAR=E17FC000
[1.3] VT-d initialization, BAR=E97FC000
[1.4] VT-d initialization, BAR=F17FC000
[1.5] VT-d initialization, BAR=F97FC000
[1.6] VT-d initialization, BAR=D13FC000
[1.8] VT-d initialization, BAR=F9FFC000
[1.9] VT-d initialization, BAR=FA7FC000
[1.10] VT-d initialization, BAR=FAFFC000
[1.11] VT-d initialization, BAR=FB7FC000
IIO_PSF_INIT_START
IIO_PSF_INIT_END
[1] Hide devices; Phase = A
[0.1 p1] 00:15:01.0: Device is not present!
[0.2 p9] 00:26:01.0: Device is not present!
[0.3 p17] 00:37:01.0: Device is not present!
[0.4 p25] 00:48:01.0: Device is not present!
[0.4 p27] 00:48:03.0: Device is not present!
[0.4 p29] 00:48:05.0: Device is not present!
[0.4 p31] 00:48:07.0: Device is not present!
[0.5 p33] 00:59:01.0: Device is not present!
[0.5 p35] 00:59:03.0: Device is not present!
[0.5 p37] 00:59:05.0: Device is not present!
[0.5 p39] 00:59:07.0: Device is not present!
[1.1 p1] 00:97:01.0: Device is not present!
[1.2 p9] 00:A7:01.0: Device is not present!
[1.3 p17] 00:B7:01.0: Device is not present!
[1.4 p25] 00:C7:01.0: Device is not present!
[1.4 p27] 00:C7:03.0: Device is not present!
[1.4 p29] 00:C7:05.0: Device is not present!
[1.4 p31] 00:C7:07.0: Device is not present!
[1.5 p33] 00:D7:01.0: Device is not present!
[1.5 p35] 00:D7:03.0: Device is not present!
[1.5 p37] 00:D7:05.0: Device is not present!
[1.5 p39] 00:D7:07.0: Device is not present!
[1.6 p41] 00:80:01.0: Device is not present!
[1.6 p45] 00:80:05.0: Device is not present!
[IIO](VMD) VMD init registered on endOfPei.
IIO Early Post Link Training Completed!
InstallEfiMemory()
GetMemoryMap: TsegBase: 78000000
GetMemoryMap: TsegRange: 08000000
RequiredMemSize for ACPI = 0xE44000 bytes
Found 0x00000000000A0000 bytes at 0x0000000000000000
Found 0x0000000000060000 bytes at 0x00000000000A0000
Found 0x0000000077700000 bytes at 0x0000000000100000
Found 0x0000000008000000 bytes at 0x0000000078000000
Found 0x0000000000800000 bytes at 0x0000000077800000
Save MemoryMap data into Hob
Building RESOURCE_SYSTEM_MEMORY Hob:
PeiMemoryBaseAddress = 0x629D0000, PeiMemoryLength = 0x14E30000
TOHM:0x0000004080000000
Reset Requested: 0
Pipe Exit starting...
S[01] Waiting on...
S[00] SBSP...
S[01] Waiting on...
Skt1 NEM Tear Down @ 769BB000
Pipe Exit completed! Reset Requested: 0
Enhanced Warning Log:
Checking for Reset Requests...
ResetRequired: 00
ConfigurePsmi () - Trace region size is 0 for all cache types; Socket: 0
ConfigurePsmi () - Trace region size is 0 for all cache types; Socket: 1
None
Continue with system BIOS POST ...
PROGRESS CODE: V03020003 I0
[HECI Transport-1 PEI] Send pkt: 80010020
00: 01
[HECI Transport-1 PEI] Got pkt: 800B0020
00: 81 01 01 14 00 88 00 01 - 00 00 00
[HECI Transport-1 PEI] Send pkt: 80300008
00: 00 00 05 00 1A 00 00 00 - 00 00 00 00 1C 00 00 00
10: 00 00 00 00 00 00 00 00 - 00 00 00 00 00 00 00 00
20: 00 00 00 00 00 00 00 00 - 00 00 00 00 00 00 00 00
[HECI Transport-1 PEI] Got pkt: 80300008
00: 00 00 05 00 1A 00 00 00 - 00 00 00 00 1C 00 00 00
10: 00 00 00 00 00 00 00 02 - 00 00 00 00 00 00 00 00
20: 00 00 00 00 00 00 00 00 - 00 00 00 00 00 00 00 00
Fail to Configure PSYS_CRIT
[HECI Transport-1 PEI] Send pkt: 80140007
00: F2 02 00 00 00 00 00 00 - 00 00 00 00 00 00 00 00
10: 0C 00 00 00
[HECI Transport-1 PEI] Got pkt: 80240007
00: F2 82 00 00 00 00 00 00 - 50 16 00 00 00 00 00 00
10: 0C 00 00 00 00 00 00 02 - 6D 32 FF FF FF FF 6E 11
20: 00 00 08 00
DDR PPR data hub created! Number of entries = 0
HBM PPR data hub created! Number of entries = 0
-> LIB data: Initialize
-> IBB Block Start, Status 0x80000007
IioVmdDisableForPchRpInit: DonePCH Series : EBG PCH
PCH Stepping : B0
[HECI Transport-1 PEI] Send pkt: 80010020
00: 01
[HECI Transport-1 PEI] Got pkt: 800B0020
00: 81 01 01 14 00 88 00 01 - 00 00 00
[HECI Transport-1 PEI] Send pkt: 80300008
00: 00 00 05 00 1A 00 00 00 - 00 00 00 00 1C 00 00 00
10: 00 00 00 00 00 00 00 00 - 00 00 00 00 00 00 00 00
20: 00 00 00 00 00 00 00 00 - 00 00 00 00 00 00 00 00
[HECI Transport-1 PEI] Got pkt: 80300008
00: 00 00 05 00 1A 00 00 00 - 00 00 00 00 1C 00 00 00
10: 00 00 00 00 00 00 00 02 - 00 00 00 00 00 00 00 00
20: 00 00 00 00 00 00 00 00 - 00 00 00 00 00 00 00 00
Fail to Configure PSYS_CRIT
[HECI Transport-1 PEI] Send pkt: 80010020
00: 01
[HECI Transport-1 PEI] Got pkt: 800B0020
00: 81 01 01 14 00 88 00 01 - 00 00 00
[HECI Transport-1 PEI] Send pkt: 80300008
00: 00 00 05 00 1A 00 00 00 - 00 00 00 00 1C 00 00 00
10: 00 00 00 00 00 00 00 00 - 00 00 00 00 00 00 00 00
20: 00 00 00 00 00 00 00 00 - 00 00 00 00 00 00 00 00
[HECI Transport-1 PEI] Got pkt: 80300008
00: 00 00 05 00 1A 00 00 00 - 00 00 00 00 1C 00 00 00
10: 00 00 00 00 00 00 00 02 - 00 00 00 00 00 00 00 00
20: 00 00 00 00 00 00 00 00 - 00 00 00 00 00 00 00 00
Fail to Configure PSYS_CRIT
[HECI Transport-1 PEI] Send pkt: 80140007
00: F2 02 00 00 00 00 00 00 - 00 00 00 00 00 00 00 00
10: 0C 00 00 00
[HECI Transport-1 PEI] Got pkt: 80240007
00: F2 82 00 00 00 00 00 00 - 50 16 00 00 00 00 00 00
10: 0C 00 00 00 00 00 00 02 - 6D 32 FF FF FF FF 6E 11
20: 00 00 08 00
PROGRESS CODE: V03020002 I0
PROGRESS CODE: V03020003 I0
PROGRESS CODE: V03020002 I0
PROGRESS CODE: V03020003 I0
PROGRESS CODE: V03020002 I0
PROGRESS CODE: V03020003 I0
PROGRESS CODE: V03020002 I0
PROGRESS CODE: V03020003 I0
-> LIB data: Already initialized
-> IBB Block End, Status 0x80000007
-> LIB data: Already initialized
-> OBB Block Start, Status 0x80000007
PROGRESS CODE: V03020002 I0
Common PPM policy update, PackageCState:3
PROGRESS CODE: V03020003 I0
PROGRESS CODE: V03020002 I0
PROGRESS CODE: V03020003 I0
PROGRESS CODE: V03020002 I0
PROGRESS CODE: V03020003 I0
PROGRESS CODE: V03020002 I0
PROGRESS CODE: V03020003 I0
PROGRESS CODE: V03020002 I0
PROGRESS CODE: V03020003 I0
PROGRESS CODE: V03020002 I0
[HECI Transport-1 PEI] Send pkt: 80280007
00: FF 03 00 00 02 00 00 00 - 00 00 18 6A 01 00 18 E7
10: 00 00 00 00 00 00 00 00 - 00 00 00 00 00 00 00 00
20: 00 00 00 00 00 00 00 00
[HECI Transport-1 PEI] Got pkt: 80040007
00: FF 83 00 00
PROGRESS CODE: V03020003 I0
PROGRESS CODE: V03020002 I0
PROGRESS CODE: V03020003 I0
PROGRESS CODE: V03020002 I0
PROGRESS CODE: V03020003 I0
PROGRESS CODE: V03020002 I0
PROGRESS CODE: V03020003 I0
PROGRESS CODE: V03020002 I0
!!! Invalid IIO LLC WAYS Bit Mask: 0x00000000
In CryptParallelhash
Return in function 2
ParallelHash256HashAll1(): Calculate code parallel hash failed!
Performance test = 10610427
In CryptParallelhash
Return in function 5
Return in function 6,retrunvalue=1
Dump data from 62ACF888, size: 0x40
62ACF888: CD F1 52 89 B5 4F 62 12 B4 BC 27 05 28 B4 95 26 | ..R..Ob...'.(..&
62ACF898: 00 6D D9 B5 4E 2B 6A DD 1E F6 90 0D DA 39 63 BB | .m..N+j......9c.
62ACF8A8: 33 A7 24 91 F2 36 96 9C A8 AF AE A2 9C 68 2D 47 | 3.$..6.......h-G
62ACF8B8: A3 93 C0 65 B3 8E 29 FA E6 51 A2 09 1C 83 31 10 | ...e..)..Q....1.
Accuracy test = 0
PROGRESS CODE: V03020003 I0
PROGRESS CODE: V03020002 I0
PROGRESS CODE: V03020003 I0
PROGRESS CODE: V03020002 I0
PROGRESS CODE: V03020003 I0
PROGRESS CODE: V03020002 I0
PROGRESS CODE: V03020003 I0
PROGRESS CODE: V03020002 I0
[MP_DISPATCH] MpDispatch4v0_CommonConstructor BEGIN
[MP_DISPATCH] MpDispatch4v0_CommonConstructor END (Success)
[FRU_MKTME] FruCpuFeatureMkTme3v0EntryPoint BEGIN
[FRU_MKTME] FruCpuFeatureMkTme3v0EntryPoint END (Success)
[FRU_SGX] FruCpuFeatureSgx3v0EntryPoint BEGIN
[FRU_SGX] FruCpuFeatureSgx3v0EntryPoint END (Success)
PROGRESS CODE: V03020003 I0
PROGRESS CODE: V03020002 I0
[APP_ADAPTER] AppAdapterMkTme3v0EntryPoint BEGIN
[APP_ADAPTER] AppAdapterMkTme3v0EntryPoint END (Success)
PROGRESS CODE: V03020003 I0
PROGRESS CODE: V03020002 I0
PROGRESS CODE: V03020003 I0
PROGRESS CODE: V03020002 I0
PROGRESS CODE: V03020003 I0
PROGRESS CODE: V03020002 I0
[SGX] SgxEarlyInit entry
IsSgxCapable = 1 Status = Success
IsSgxRequested = 0 Status = Success
IsTdxCapable = 0 Status = Success
IsTdxRequested = 0 Status = Success
IsTdxActivated = 0 Status = Success
SgxMpServicesData()
Thread 0 is BSP of Socket 0
Thread 80 is BSP of Socket 1
System BSP Thread = 000
System BSP Package = 000
[SGX_VAR_MANIFEST] HobSize: 8512, Hash:
[12] [56] [ED] [9C] [D5] [9D] [C8] [1A] [E0] [44] [25] [30] [1B] [26] [71] [76] [DB] [8B] [BF] [5C] [29] [96] [F3] [A2] [58] [29] [7F] [97] [42] [AF] [E0] [C0]
[SGX-DEBUG] GetVariableHelper: VariableName: (SgxRegistrationState), VendorGuid: (2C65F1A3), DataSize: (64), Data: (F)
GetVariable - SgxRegistrationState not found, continue
UefiFwRegistrationState not found in NVRAM!
GetRegistrationVariablesFromNvram Enter
[SGX-DEBUG] GetVariableHelper: VariableName: (SgxRegistrationConfiguration), VendorGuid: (18B3BC81), DataSize: (1520), Data: (F)
GetVariable - SgxRegistrationConfiguration not found, continue
[SGX-DEBUG] GetVariableHelper: VariableName: (SgxUefiRegistrationConfiguration), VendorGuid: (8D4CA9E8), DataSize: (1520), Data: (F)
GetVariable - SgxUefiRegistrationConfiguration not found, continue
[SGX-DEBUG]: Get SgxRegistrationStatus
[SGX-DEBUG] GetVariableHelper: VariableName: (SgxRegistrationStatus), VendorGuid: (F236C5DC), DataSize: (7), Data: (F)
GetVariable - SgxRegistrationStatus not found, continue
[SGX-DEBUG]: Get SgxUefiRegistrationStatus
[SGX-DEBUG] GetVariableHelper: VariableName: (SgxUefiRegistrationStatus), VendorGuid: (CF24D5E9), DataSize: (7), Data: (F)
GetVariable - SgxUefiRegistrationStatus not found, continue
[SGX-DEBUG] Early PrintByteArrays SgxRegistrationStatus:
[00] [00] [00] [00] [00] [00] [00]
[SGX-DEBUG] GetVariableHelper: VariableName: (SgxRegistrationServerResponse), VendorGuid: (89589C7B), DataSize: (10060), Data: (F)
GetVariable - SgxRegistrationServerResponse not found, continue
[SGX-DEBUG] GetVariableHelper: VariableName: (SgxUefiRegistrationServerResponse), VendorGuid: (35D93155), DataSize: (10060), Data: (F)
GetVariable - SgxUefiRegistrationServerResponse not found, continue
RegistrationVariables presence:
RegistrationConfig = 0
RegistrationStatus = 0
RegistrationResponse = 0
[SGX] RestoreKeyBlobsInternalSgxInitDataHobFieldsFromNvram BEGIN
[SGX] RestoreUefiFwKeyBlobsVariable BEGIN
[SGX-DEBUG] GetVariableHelper: VariableName: (SgxKeyBlobs), VendorGuid: (60F76511), DataSize: (14720), Data: (F)
GetVariable - SgxKeyBlobs not found, continue
Error: Unable to get SgxUefiFwKeyBlobs
[SGX] RestoreUefiFwKeyBlobsVariable END
KeyBlobs were NOT restored from SgxUefiFwKeyBlobs!
KeyBlobs were NOT restored from SgxRegistrationPackageInfo contents due to PackageInfoInBandAccess = FALSE!
KeyBlobsExistInNvram = (FALSE)
[SGX] RestoreKeyBlobsInternalSgxInitDataHobFieldsFromNvram END
KeyBlobs were not found in NVRAM. Continue boot...
[SGX-KEYBLOB-PEI-REST] KeyBlob for socket no 0
Present: FALSE
TimeStamp: 0-0-0, 0:0:0:0, Pad1: 0, Pad2: 0, TimeZone: 0, Daylight: 0
KeyBlob:
Header:
SGX UUID:
[00] [00] [00] [00] [00] [00] [00] [00] [00] [00] [00] [00] [00] [00] [00] [00]
CpuSvn:
[00]
Security Properties:
[00] [00] [00] [00]
Prid:
[00] [00] [00] [00] [00] [00] [00] [00] [00] [00] [00] [00] [00] [00] [00] [00]
PlatformEpoch:
[00] [00] [00] [00] [00] [00] [00] [00] [00] [00] [00] [00] [00] [00] [00] [00] [00] [00] [00] [00] [00] [00] [00] [00] [00] [00] [00] [00] [00] [00] [00] [00]
RsakHash:
[00] [00] [00] [00] [00] [00] [00] [00] [00] [00] [00] [00] [00] [00] [00] [00] [00] [00] [00] [00] [00] [00] [00] [00] [00] [00] [00] [00] [00] [00] [00] [00]
RsakHash:
[00] [00] [00] [00] [00] [00] [00] [00] [00] [00] [00] [00] [00] [00] [00] [00] [00] [00] [00] [00] [00] [00] [00] [00] [00] [00] [00] [00] [00] [00] [00] [00]
Pfk1:
[00] [00] [00] [00] [00] [00] [00] [00] [00] [00] [00] [00] [00] [00] [00] [00]
PprResetKey:
[00] [00] [00] [00]
[00] [00] [00] [00]
[00] [00] [00] [00]
[00] [00] [00] [00]
[00] [00] [00] [00]
[00] [00] [00] [00]
[00] [00] [00] [00]
[00] [00] [00] [00]
[00] [00] [00] [00]
[00] [00] [00] [00]
[00] [00] [00] [00]
[00] [00] [00] [00]
[00] [00] [00] [00]
[00] [00] [00] [00]
[00] [00] [00] [00]
[00] [00] [00] [00]
[00] [00] [00] [00]
[00] [00] [00] [00]
[00] [00] [00] [00]
[00] [00] [00] [00]
[00] [00] [00] [00]
[00] [00] [00] [00]
[00] [00] [00] [00]
[00] [00] [00] [00]
[00] [00] [00] [00]
[00] [00] [00] [00]
[00] [00] [00] [00]
[00] [00] [00] [00]
[00] [00] [00] [00]
[00] [00] [00] [00]
[00] [00] [00] [00]
[00] [00] [00] [00]
LastUsedSvn:
[00]
Reserved2:
[00] [00] [00] [00] [00] [00] [00] [00] [00] [00] [00] [00] [00] [00] [00]
TargetPrid:
[00] [00] [00] [00] [00] [00] [00] [00] [00] [00] [00] [00] [00] [00] [00] [00]
PrimaryComms:
[00] [00] [00] [00] [00] [00] [00] [00] [00] [00] [00] [00] [00] [00] [00] [00]
Iv:
[00] [00] [00] [00] [00] [00] [00] [00] [00] [00] [00] [00]
[00] [00] [00] [00] [00] [00] [00] [00] [00] [00] [00] [00]
[00] [00] [00] [00] [00] [00] [00] [00] [00] [00] [00] [00]
[00] [00] [00] [00] [00] [00] [00] [00] [00] [00] [00] [00]
[00] [00] [00] [00] [00] [00] [00] [00] [00] [00] [00] [00]
[00] [00] [00] [00] [00] [00] [00] [00] [00] [00] [00] [00]
[00] [00] [00] [00] [00] [00] [00] [00] [00] [00] [00] [00]
[00] [00] [00] [00] [00] [00] [00] [00] [00] [00] [00] [00]
[00] [00] [00] [00] [00] [00] [00] [00] [00] [00] [00] [00]
[00] [00] [00] [00] [00] [00] [00] [00] [00] [00] [00] [00]
[00] [00] [00] [00] [00] [00] [00] [00] [00] [00] [00] [00]
[00] [00] [00] [00] [00] [00] [00] [00] [00] [00] [00] [00]
[00] [00] [00] [00] [00] [00] [00] [00] [00] [00] [00] [00]
[00] [00] [00] [00] [00] [00] [00] [00] [00] [00] [00] [00]
[00] [00] [00] [00] [00] [00] [00] [00] [00] [00] [00] [00]
[00] [00] [00] [00] [00] [00] [00] [00] [00] [00] [00] [00]
[00] [00] [00] [00] [00] [00] [00] [00] [00] [00] [00] [00]
[00] [00] [00] [00] [00] [00] [00] [00] [00] [00] [00] [00]
[00] [00] [00] [00] [00] [00] [00] [00] [00] [00] [00] [00]
[00] [00] [00] [00] [00] [00] [00] [00] [00] [00] [00] [00]
[00] [00] [00] [00] [00] [00] [00] [00] [00] [00] [00] [00]
[00] [00] [00] [00] [00] [00] [00] [00] [00] [00] [00] [00]
[00] [00] [00] [00] [00] [00] [00] [00] [00] [00] [00] [00]
[00] [00] [00] [00] [00] [00] [00] [00] [00] [00] [00] [00]
[00] [00] [00] [00] [00] [00] [00] [00] [00] [00] [00] [00]
[00] [00] [00] [00] [00] [00] [00] [00] [00] [00] [00] [00]
[00] [00] [00] [00] [00] [00] [00] [00] [00] [00] [00] [00]
[00] [00] [00] [00] [00] [00] [00] [00] [00] [00] [00] [00]
[00] [00] [00] [00] [00] [00] [00] [00] [00] [00] [00] [00]
[00] [00] [00] [00] [00] [00] [00] [00] [00] [00] [00] [00]
[00] [00] [00] [00] [00] [00] [00] [00] [00] [00] [00] [00]
[00] [00] [00] [00] [00] [00] [00] [00] [00] [00] [00] [00]
Mac:
[00] [00] [00] [00] [00] [00] [00] [00] [00] [00] [00] [00] [00] [00] [00] [00]
[00] [00] [00] [00] [00] [00] [00] [00] [00] [00] [00] [00] [00] [00] [00] [00]
[00] [00] [00] [00] [00] [00] [00] [00] [00] [00] [00] [00] [00] [00] [00] [00]
[00] [00] [00] [00] [00] [00] [00] [00] [00] [00] [00] [00] [00] [00] [00] [00]
[00] [00] [00] [00] [00] [00] [00] [00] [00] [00] [00] [00] [00] [00] [00] [00]
[00] [00] [00] [00] [00] [00] [00] [00] [00] [00] [00] [00] [00] [00] [00] [00]
[00] [00] [00] [00] [00] [00] [00] [00] [00] [00] [00] [00] [00] [00] [00] [00]
[00] [00] [00] [00] [00] [00] [00] [00] [00] [00] [00] [00] [00] [00] [00] [00]
[00] [00] [00] [00] [00] [00] [00] [00] [00] [00] [00] [00] [00] [00] [00] [00]
[00] [00] [00] [00] [00] [00] [00] [00] [00] [00] [00] [00] [00] [00] [00] [00]
[00] [00] [00] [00] [00] [00] [00] [00] [00] [00] [00] [00] [00] [00] [00] [00]
[00] [00] [00] [00] [00] [00] [00] [00] [00] [00] [00] [00] [00] [00] [00] [00]
[00] [00] [00] [00] [00] [00] [00] [00] [00] [00] [00] [00] [00] [00] [00] [00]
[00] [00] [00] [00] [00] [00] [00] [00] [00] [00] [00] [00] [00] [00] [00] [00]
[00] [00] [00] [00] [00] [00] [00] [00] [00] [00] [00] [00] [00] [00] [00] [00]
[00] [00] [00] [00] [00] [00] [00] [00] [00] [00] [00] [00] [00] [00] [00] [00]
[00] [00] [00] [00] [00] [00] [00] [00] [00] [00] [00] [00] [00] [00] [00] [00]
[00] [00] [00] [00] [00] [00] [00] [00] [00] [00] [00] [00] [00] [00] [00] [00]
[00] [00] [00] [00] [00] [00] [00] [00] [00] [00] [00] [00] [00] [00] [00] [00]
[00] [00] [00] [00] [00] [00] [00] [00] [00] [00] [00] [00] [00] [00] [00] [00]
[00] [00] [00] [00] [00] [00] [00] [00] [00] [00] [00] [00] [00] [00] [00] [00]
[00] [00] [00] [00] [00] [00] [00] [00] [00] [00] [00] [00] [00] [00] [00] [00]
[00] [00] [00] [00] [00] [00] [00] [00] [00] [00] [00] [00] [00] [00] [00] [00]
[00] [00] [00] [00] [00] [00] [00] [00] [00] [00] [00] [00] [00] [00] [00] [00]
[00] [00] [00] [00] [00] [00] [00] [00] [00] [00] [00] [00] [00] [00] [00] [00]
[00] [00] [00] [00] [00] [00] [00] [00] [00] [00] [00] [00] [00] [00] [00] [00]
[00] [00] [00] [00] [00] [00] [00] [00] [00] [00] [00] [00] [00] [00] [00] [00]
[00] [00] [00] [00] [00] [00] [00] [00] [00] [00] [00] [00] [00] [00] [00] [00]
[00] [00] [00] [00] [00] [00] [00] [00] [00] [00] [00] [00] [00] [00] [00] [00]
[00] [00] [00] [00] [00] [00] [00] [00] [00] [00] [00] [00] [00] [00] [00] [00]
[00] [00] [00] [00] [00] [00] [00] [00] [00] [00] [00] [00] [00] [00] [00] [00]
[00] [00] [00] [00] [00] [00] [00] [00] [00] [00] [00] [00] [00] [00] [00] [00]
IvComm:
[00] [00] [00] [00] [00] [00] [00] [00] [00] [00] [00] [00]
MacComm:
[00] [00] [00] [00] [00] [00] [00] [00] [00] [00] [00] [00] [00] [00] [00] [00]
[SGX-KEYBLOB-PEI-REST] KeyBlob for socket no 1
Present: FALSE
TimeStamp: 0-0-0, 0:0:0:0, Pad1: 0, Pad2: 0, TimeZone: 0, Daylight: 0
KeyBlob:
Header:
SGX UUID:
[00] [00] [00] [00] [00] [00] [00] [00] [00] [00] [00] [00] [00] [00] [00] [00]
CpuSvn:
[00]
Security Properties:
[00] [00] [00] [00]
Prid:
[00] [00] [00] [00] [00] [00] [00] [00] [00] [00] [00] [00] [00] [00] [00] [00]
PlatformEpoch:
[00] [00] [00] [00] [00] [00] [00] [00] [00] [00] [00] [00] [00] [00] [00] [00] [00] [00] [00] [00] [00] [00] [00] [00] [00] [00] [00] [00] [00] [00] [00] [00]
RsakHash:
[00] [00] [00] [00] [00] [00] [00] [00] [00] [00] [00] [00] [00] [00] [00] [00] [00] [00] [00] [00] [00] [00] [00] [00] [00] [00] [00] [00] [00] [00] [00] [00]
RsakHash:
[00] [00] [00] [00] [00] [00] [00] [00] [00] [00] [00] [00] [00] [00] [00] [00] [00] [00] [00] [00] [00] [00] [00] [00] [00] [00] [00] [00] [00] [00] [00] [00]
Pfk1:
[00] [00] [00] [00] [00] [00] [00] [00] [00] [00] [00] [00] [00] [00] [00] [00]
PprResetKey:
[00] [00] [00] [00]
[00] [00] [00] [00]
[00] [00] [00] [00]
[00] [00] [00] [00]
[00] [00] [00] [00]
[00] [00] [00] [00]
[00] [00] [00] [00]
[00] [00] [00] [00]
[00] [00] [00] [00]
[00] [00] [00] [00]
[00] [00] [00] [00]
[00] [00] [00] [00]
[00] [00] [00] [00]
[00] [00] [00] [00]
[00] [00] [00] [00]
[00] [00] [00] [00]
[00] [00] [00] [00]
[00] [00] [00] [00]
[00] [00] [00] [00]
[00] [00] [00] [00]
[00] [00] [00] [00]
[00] [00] [00] [00]
[00] [00] [00] [00]
[00] [00] [00] [00]
[00] [00] [00] [00]
[00] [00] [00] [00]
[00] [00] [00] [00]
[00] [00] [00] [00]
[00] [00] [00] [00]
[00] [00] [00] [00]
[00] [00] [00] [00]
[00] [00] [00] [00]
LastUsedSvn:
[00]
Reserved2:
[00] [00] [00] [00] [00] [00] [00] [00] [00] [00] [00] [00] [00] [00] [00]
TargetPrid:
[00] [00] [00] [00] [00] [00] [00] [00] [00] [00] [00] [00] [00] [00] [00] [00]
PrimaryComms:
[00] [00] [00] [00] [00] [00] [00] [00] [00] [00] [00] [00] [00] [00] [00] [00]
Iv:
[00] [00] [00] [00] [00] [00] [00] [00] [00] [00] [00] [00]
[00] [00] [00] [00] [00] [00] [00] [00] [00] [00] [00] [00]
[00] [00] [00] [00] [00] [00] [00] [00] [00] [00] [00] [00]
[00] [00] [00] [00] [00] [00] [00] [00] [00] [00] [00] [00]
[00] [00] [00] [00] [00] [00] [00] [00] [00] [00] [00] [00]
[00] [00] [00] [00] [00] [00] [00] [00] [00] [00] [00] [00]
[00] [00] [00] [00] [00] [00] [00] [00] [00] [00] [00] [00]
[00] [00] [00] [00] [00] [00] [00] [00] [00] [00] [00] [00]
[00] [00] [00] [00] [00] [00] [00] [00] [00] [00] [00] [00]
[00] [00] [00] [00] [00] [00] [00] [00] [00] [00] [00] [00]
[00] [00] [00] [00] [00] [00] [00] [00] [00] [00] [00] [00]
[00] [00] [00] [00] [00] [00] [00] [00] [00] [00] [00] [00]
[00] [00] [00] [00] [00] [00] [00] [00] [00] [00] [00] [00]
[00] [00] [00] [00] [00] [00] [00] [00] [00] [00] [00] [00]
[00] [00] [00] [00] [00] [00] [00] [00] [00] [00] [00] [00]
[00] [00] [00] [00] [00] [00] [00] [00] [00] [00] [00] [00]
[00] [00] [00] [00] [00] [00] [00] [00] [00] [00] [00] [00]
[00] [00] [00] [00] [00] [00] [00] [00] [00] [00] [00] [00]
[00] [00] [00] [00] [00] [00] [00] [00] [00] [00] [00] [00]
[00] [00] [00] [00] [00] [00] [00] [00] [00] [00] [00] [00]
[00] [00] [00] [00] [00] [00] [00] [00] [00] [00] [00] [00]
[00] [00] [00] [00] [00] [00] [00] [00] [00] [00] [00] [00]
[00] [00] [00] [00] [00] [00] [00] [00] [00] [00] [00] [00]
[00] [00] [00] [00] [00] [00] [00] [00] [00] [00] [00] [00]
[00] [00] [00] [00] [00] [00] [00] [00] [00] [00] [00] [00]
[00] [00] [00] [00] [00] [00] [00] [00] [00] [00] [00] [00]
[00] [00] [00] [00] [00] [00] [00] [00] [00] [00] [00] [00]
[00] [00] [00] [00] [00] [00] [00] [00] [00] [00] [00] [00]
[00] [00] [00] [00] [00] [00] [00] [00] [00] [00] [00] [00]
[00] [00] [00] [00] [00] [00] [00] [00] [00] [00] [00] [00]
[00] [00] [00] [00] [00] [00] [00] [00] [00] [00] [00] [00]
[00] [00] [00] [00] [00] [00] [00] [00] [00] [00] [00] [00]
Mac:
[00] [00] [00] [00] [00] [00] [00] [00] [00] [00] [00] [00] [00] [00] [00] [00]
[00] [00] [00] [00] [00] [00] [00] [00] [00] [00] [00] [00] [00] [00] [00] [00]
[00] [00] [00] [00] [00] [00] [00] [00] [00] [00] [00] [00] [00] [00] [00] [00]
[00] [00] [00] [00] [00] [00] [00] [00] [00] [00] [00] [00] [00] [00] [00] [00]
[00] [00] [00] [00] [00] [00] [00] [00] [00] [00] [00] [00] [00] [00] [00] [00]
[00] [00] [00] [00] [00] [00] [00] [00] [00] [00] [00] [00] [00] [00] [00] [00]
[00] [00] [00] [00] [00] [00] [00] [00] [00] [00] [00] [00] [00] [00] [00] [00]
[00] [00] [00] [00] [00] [00] [00] [00] [00] [00] [00] [00] [00] [00] [00] [00]
[00] [00] [00] [00] [00] [00] [00] [00] [00] [00] [00] [00] [00] [00] [00] [00]
[00] [00] [00] [00] [00] [00] [00] [00] [00] [00] [00] [00] [00] [00] [00] [00]
[00] [00] [00] [00] [00] [00] [00] [00] [00] [00] [00] [00] [00] [00] [00] [00]
[00] [00] [00] [00] [00] [00] [00] [00] [00] [00] [00] [00] [00] [00] [00] [00]
[00] [00] [00] [00] [00] [00] [00] [00] [00] [00] [00] [00] [00] [00] [00] [00]
[00] [00] [00] [00] [00] [00] [00] [00] [00] [00] [00] [00] [00] [00] [00] [00]
[00] [00] [00] [00] [00] [00] [00] [00] [00] [00] [00] [00] [00] [00] [00] [00]
[00] [00] [00] [00] [00] [00] [00] [00] [00] [00] [00] [00] [00] [00] [00] [00]
[00] [00] [00] [00] [00] [00] [00] [00] [00] [00] [00] [00] [00] [00] [00] [00]
[00] [00] [00] [00] [00] [00] [00] [00] [00] [00] [00] [00] [00] [00] [00] [00]
[00] [00] [00] [00] [00] [00] [00] [00] [00] [00] [00] [00] [00] [00] [00] [00]
[00] [00] [00] [00] [00] [00] [00] [00] [00] [00] [00] [00] [00] [00] [00] [00]
[00] [00] [00] [00] [00] [00] [00] [00] [00] [00] [00] [00] [00] [00] [00] [00]
[00] [00] [00] [00] [00] [00] [00] [00] [00] [00] [00] [00] [00] [00] [00] [00]
[00] [00] [00] [00] [00] [00] [00] [00] [00] [00] [00] [00] [00] [00] [00] [00]
[00] [00] [00] [00] [00] [00] [00] [00] [00] [00] [00] [00] [00] [00] [00] [00]
[00] [00] [00] [00] [00] [00] [00] [00] [00] [00] [00] [00] [00] [00] [00] [00]
[00] [00] [00] [00] [00] [00] [00] [00] [00] [00] [00] [00] [00] [00] [00] [00]
[00] [00] [00] [00] [00] [00] [00] [00] [00] [00] [00] [00] [00] [00] [00] [00]
[00] [00] [00] [00] [00] [00] [00] [00] [00] [00] [00] [00] [00] [00] [00] [00]
[00] [00] [00] [00] [00] [00] [00] [00] [00] [00] [00] [00] [00] [00] [00] [00]
[00] [00] [00] [00] [00] [00] [00] [00] [00] [00] [00] [00] [00] [00] [00] [00]
[00] [00] [00] [00] [00] [00] [00] [00] [00] [00] [00] [00] [00] [00] [00] [00]
[00] [00] [00] [00] [00] [00] [00] [00] [00] [00] [00] [00] [00] [00] [00] [00]
IvComm:
[00] [00] [00] [00] [00] [00] [00] [00] [00] [00] [00] [00]
MacComm:
[00] [00] [00] [00] [00] [00] [00] [00] [00] [00] [00] [00] [00] [00] [00] [00]
[SGX-KEYBLOB-PEI-REST] KeyBlob for socket no 2
Present: FALSE
TimeStamp: 0-0-0, 0:0:0:0, Pad1: 0, Pad2: 0, TimeZone: 0, Daylight: 0
KeyBlob:
Header:
SGX UUID:
[00] [00] [00] [00] [00] [00] [00] [00] [00] [00] [00] [00] [00] [00] [00] [00]
CpuSvn:
[00]
Security Properties:
[00] [00] [00] [00]
Prid:
[00] [00] [00] [00] [00] [00] [00] [00] [00] [00] [00] [00] [00] [00] [00] [00]
PlatformEpoch:
[00] [00] [00] [00] [00] [00] [00] [00] [00] [00] [00] [00] [00] [00] [00] [00] [00] [00] [00] [00] [00] [00] [00] [00] [00] [00] [00] [00] [00] [00] [00] [00]
RsakHash:
[00] [00] [00] [00] [00] [00] [00] [00] [00] [00] [00] [00] [00] [00] [00] [00] [00] [00] [00] [00] [00] [00] [00] [00] [00] [00] [00] [00] [00] [00] [00] [00]
RsakHash:
[00] [00] [00] [00] [00] [00] [00] [00] [00] [00] [00] [00] [00] [00] [00] [00] [00] [00] [00] [00] [00] [00] [00] [00] [00] [00] [00] [00] [00] [00] [00] [00]
Pfk1:
[00] [00] [00] [00] [00] [00] [00] [00] [00] [00] [00] [00] [00] [00] [00] [00]
PprResetKey:
[00] [00] [00] [00]
[00] [00] [00] [00]
[00] [00] [00] [00]
[00] [00] [00] [00]
[00] [00] [00] [00]
[00] [00] [00] [00]
[00] [00] [00] [00]
[00] [00] [00] [00]
[00] [00] [00] [00]
[00] [00] [00] [00]
[00] [00] [00] [00]
[00] [00] [00] [00]
[00] [00] [00] [00]
[00] [00] [00] [00]
[00] [00] [00] [00]
[00] [00] [00] [00]
[00] [00] [00] [00]
[00] [00] [00] [00]
[00] [00] [00] [00]
[00] [00] [00] [00]
[00] [00] [00] [00]
[00] [00] [00] [00]
[00] [00] [00] [00]
[00] [00] [00] [00]
[00] [00] [00] [00]
[00] [00] [00] [00]
[00] [00] [00] [00]
[00] [00] [00] [00]
[00] [00] [00] [00]
[00] [00] [00] [00]
[00] [00] [00] [00]
[00] [00] [00] [00]
LastUsedSvn:
[00]
Reserved2:
[00] [00] [00] [00] [00] [00] [00] [00] [00] [00] [00] [00] [00] [00] [00]
TargetPrid:
[00] [00] [00] [00] [00] [00] [00] [00] [00] [00] [00] [00] [00] [00] [00] [00]
PrimaryComms:
[00] [00] [00] [00] [00] [00] [00] [00] [00] [00] [00] [00] [00] [00] [00] [00]
Iv:
[00] [00] [00] [00] [00] [00] [00] [00] [00] [00] [00] [00]
[00] [00] [00] [00] [00] [00] [00] [00] [00] [00] [00] [00]
[00] [00] [00] [00] [00] [00] [00] [00] [00] [00] [00] [00]
[00] [00] [00] [00] [00] [00] [00] [00] [00] [00] [00] [00]
[00] [00] [00] [00] [00] [00] [00] [00] [00] [00] [00] [00]
[00] [00] [00] [00] [00] [00] [00] [00] [00] [00] [00] [00]
[00] [00] [00] [00] [00] [00] [00] [00] [00] [00] [00] [00]
[00] [00] [00] [00] [00] [00] [00] [00] [00] [00] [00] [00]
[00] [00] [00] [00] [00] [00] [00] [00] [00] [00] [00] [00]
[00] [00] [00] [00] [00] [00] [00] [00] [00] [00] [00] [00]
[00] [00] [00] [00] [00] [00] [00] [00] [00] [00] [00] [00]
[00] [00] [00] [00] [00] [00] [00] [00] [00] [00] [00] [00]
[00] [00] [00] [00] [00] [00] [00] [00] [00] [00] [00] [00]
[00] [00] [00] [00] [00] [00] [00] [00] [00] [00] [00] [00]
[00] [00] [00] [00] [00] [00] [00] [00] [00] [00] [00] [00]
[00] [00] [00] [00] [00] [00] [00] [00] [00] [00] [00] [00]
[00] [00] [00] [00] [00] [00] [00] [00] [00] [00] [00] [00]
[00] [00] [00] [00] [00] [00] [00] [00] [00] [00] [00] [00]
[00] [00] [00] [00] [00] [00] [00] [00] [00] [00] [00] [00]
[00] [00] [00] [00] [00] [00] [00] [00] [00] [00] [00] [00]
[00] [00] [00] [00] [00] [00] [00] [00] [00] [00] [00] [00]
[00] [00] [00] [00] [00] [00] [00] [00] [00] [00] [00] [00]
[00] [00] [00] [00] [00] [00] [00] [00] [00] [00] [00] [00]
[00] [00] [00] [00] [00] [00] [00] [00] [00] [00] [00] [00]
[00] [00] [00] [00] [00] [00] [00] [00] [00] [00] [00] [00]
[00] [00] [00] [00] [00] [00] [00] [00] [00] [00] [00] [00]
[00] [00] [00] [00] [00] [00] [00] [00] [00] [00] [00] [00]
[00] [00] [00] [00] [00] [00] [00] [00] [00] [00] [00] [00]
[00] [00] [00] [00] [00] [00] [00] [00] [00] [00] [00] [00]
[00] [00] [00] [00] [00] [00] [00] [00] [00] [00] [00] [00]
[00] [00] [00] [00] [00] [00] [00] [00] [00] [00] [00] [00]
[00] [00] [00] [00] [00] [00] [00] [00] [00] [00] [00] [00]
Mac:
[00] [00] [00] [00] [00] [00] [00] [00] [00] [00] [00] [00] [00] [00] [00] [00]
[00] [00] [00] [00] [00] [00] [00] [00] [00] [00] [00] [00] [00] [00] [00] [00]
[00] [00] [00] [00] [00] [00] [00] [00] [00] [00] [00] [00] [00] [00] [00] [00]
[00] [00] [00] [00] [00] [00] [00] [00] [00] [00] [00] [00] [00] [00] [00] [00]
[00] [00] [00] [00] [00] [00] [00] [00] [00] [00] [00] [00] [00] [00] [00] [00]
[00] [00] [00] [00] [00] [00] [00] [00] [00] [00] [00] [00] [00] [00] [00] [00]
[00] [00] [00] [00] [00] [00] [00] [00] [00] [00] [00] [00] [00] [00] [00] [00]
[00] [00] [00] [00] [00] [00] [00] [00] [00] [00] [00] [00] [00] [00] [00] [00]
[00] [00] [00] [00] [00] [00] [00] [00] [00] [00] [00] [00] [00] [00] [00] [00]
[00] [00] [00] [00] [00] [00] [00] [00] [00] [00] [00] [00] [00] [00] [00] [00]
[00] [00] [00] [00] [00] [00] [00] [00] [00] [00] [00] [00] [00] [00] [00] [00]
[00] [00] [00] [00] [00] [00] [00] [00] [00] [00] [00] [00] [00] [00] [00] [00]
[00] [00] [00] [00] [00] [00] [00] [00] [00] [00] [00] [00] [00] [00] [00] [00]
[00] [00] [00] [00] [00] [00] [00] [00] [00] [00] [00] [00] [00] [00] [00] [00]
[00] [00] [00] [00] [00] [00] [00] [00] [00] [00] [00] [00] [00] [00] [00] [00]
[00] [00] [00] [00] [00] [00] [00] [00] [00] [00] [00] [00] [00] [00] [00] [00]
[00] [00] [00] [00] [00] [00] [00] [00] [00] [00] [00] [00] [00] [00] [00] [00]
[00] [00] [00] [00] [00] [00] [00] [00] [00] [00] [00] [00] [00] [00] [00] [00]
[00] [00] [00] [00] [00] [00] [00] [00] [00] [00] [00] [00] [00] [00] [00] [00]
[00] [00] [00] [00] [00] [00] [00] [00] [00] [00] [00] [00] [00] [00] [00] [00]
[00] [00] [00] [00] [00] [00] [00] [00] [00] [00] [00] [00] [00] [00] [00] [00]
[00] [00] [00] [00] [00] [00] [00] [00] [00] [00] [00] [00] [00] [00] [00] [00]
[00] [00] [00] [00] [00] [00] [00] [00] [00] [00] [00] [00] [00] [00] [00] [00]
[00] [00] [00] [00] [00] [00] [00] [00] [00] [00] [00] [00] [00] [00] [00] [00]
[00] [00] [00] [00] [00] [00] [00] [00] [00] [00] [00] [00] [00] [00] [00] [00]
[00] [00] [00] [00] [00] [00] [00] [00] [00] [00] [00] [00] [00] [00] [00] [00]
[00] [00] [00] [00] [00] [00] [00] [00] [00] [00] [00] [00] [00] [00] [00] [00]
[00] [00] [00] [00] [00] [00] [00] [00] [00] [00] [00] [00] [00] [00] [00] [00]
[00] [00] [00] [00] [00] [00] [00] [00] [00] [00] [00] [00] [00] [00] [00] [00]
[00] [00] [00] [00] [00] [00] [00] [00] [00] [00] [00] [00] [00] [00] [00] [00]
[00] [00] [00] [00] [00] [00] [00] [00] [00] [00] [00] [00] [00] [00] [00] [00]
[00] [00] [00] [00] [00] [00] [00] [00] [00] [00] [00] [00] [00] [00] [00] [00]
IvComm:
[00] [00] [00] [00] [00] [00] [00] [00] [00] [00] [00] [00]
MacComm:
[00] [00] [00] [00] [00] [00] [00] [00] [00] [00] [00] [00] [00] [00] [00] [00]
[SGX-KEYBLOB-PEI-REST] KeyBlob for socket no 3
Present: FALSE
TimeStamp: 0-0-0, 0:0:0:0, Pad1: 0, Pad2: 0, TimeZone: 0, Daylight: 0
KeyBlob:
Header:
SGX UUID:
[00] [00] [00] [00] [00] [00] [00] [00] [00] [00] [00] [00] [00] [00] [00] [00]
CpuSvn:
[00]
Security Properties:
[00] [00] [00] [00]
Prid:
[00] [00] [00] [00] [00] [00] [00] [00] [00] [00] [00] [00] [00] [00] [00] [00]
PlatformEpoch:
[00] [00] [00] [00] [00] [00] [00] [00] [00] [00] [00] [00] [00] [00] [00] [00] [00] [00] [00] [00] [00] [00] [00] [00] [00] [00] [00] [00] [00] [00] [00] [00]
RsakHash:
[00] [00] [00] [00] [00] [00] [00] [00] [00] [00] [00] [00] [00] [00] [00] [00] [00] [00] [00] [00] [00] [00] [00] [00] [00] [00] [00] [00] [00] [00] [00] [00]
RsakHash:
[00] [00] [00] [00] [00] [00] [00] [00] [00] [00] [00] [00] [00] [00] [00] [00] [00] [00] [00] [00] [00] [00] [00] [00] [00] [00] [00] [00] [00] [00] [00] [00]
Pfk1:
[00] [00] [00] [00] [00] [00] [00] [00] [00] [00] [00] [00] [00] [00] [00] [00]
PprResetKey:
[00] [00] [00] [00]
[00] [00] [00] [00]
[00] [00] [00] [00]
[00] [00] [00] [00]
[00] [00] [00] [00]
[00] [00] [00] [00]
[00] [00] [00] [00]
[00] [00] [00] [00]
[00] [00] [00] [00]
[00] [00] [00] [00]
[00] [00] [00] [00]
[00] [00] [00] [00]
[00] [00] [00] [00]
[00] [00] [00] [00]
[00] [00] [00] [00]
[00] [00] [00] [00]
[00] [00] [00] [00]
[00] [00] [00] [00]
[00] [00] [00] [00]
[00] [00] [00] [00]
[00] [00] [00] [00]
[00] [00] [00] [00]
[00] [00] [00] [00]
[00] [00] [00] [00]
[00] [00] [00] [00]
[00] [00] [00] [00]
[00] [00] [00] [00]
[00] [00] [00] [00]
[00] [00] [00] [00]
[00] [00] [00] [00]
[00] [00] [00] [00]
[00] [00] [00] [00]
LastUsedSvn:
[00]
Reserved2:
[00] [00] [00] [00] [00] [00] [00] [00] [00] [00] [00] [00] [00] [00] [00]
TargetPrid:
[00] [00] [00] [00] [00] [00] [00] [00] [00] [00] [00] [00] [00] [00] [00] [00]
PrimaryComms:
[00] [00] [00] [00] [00] [00] [00] [00] [00] [00] [00] [00] [00] [00] [00] [00]
Iv:
[00] [00] [00] [00] [00] [00] [00] [00] [00] [00] [00] [00]
[00] [00] [00] [00] [00] [00] [00] [00] [00] [00] [00] [00]
[00] [00] [00] [00] [00] [00] [00] [00] [00] [00] [00] [00]
[00] [00] [00] [00] [00] [00] [00] [00] [00] [00] [00] [00]
[00] [00] [00] [00] [00] [00] [00] [00] [00] [00] [00] [00]
[00] [00] [00] [00] [00] [00] [00] [00] [00] [00] [00] [00]
[00] [00] [00] [00] [00] [00] [00] [00] [00] [00] [00] [00]
[00] [00] [00] [00] [00] [00] [00] [00] [00] [00] [00] [00]
[00] [00] [00] [00] [00] [00] [00] [00] [00] [00] [00] [00]
[00] [00] [00] [00] [00] [00] [00] [00] [00] [00] [00] [00]
[00] [00] [00] [00] [00] [00] [00] [00] [00] [00] [00] [00]
[00] [00] [00] [00] [00] [00] [00] [00] [00] [00] [00] [00]
[00] [00] [00] [00] [00] [00] [00] [00] [00] [00] [00] [00]
[00] [00] [00] [00] [00] [00] [00] [00] [00] [00] [00] [00]
[00] [00] [00] [00] [00] [00] [00] [00] [00] [00] [00] [00]
[00] [00] [00] [00] [00] [00] [00] [00] [00] [00] [00] [00]
[00] [00] [00] [00] [00] [00] [00] [00] [00] [00] [00] [00]
[00] [00] [00] [00] [00] [00] [00] [00] [00] [00] [00] [00]
[00] [00] [00] [00] [00] [00] [00] [00] [00] [00] [00] [00]
[00] [00] [00] [00] [00] [00] [00] [00] [00] [00] [00] [00]
[00] [00] [00] [00] [00] [00] [00] [00] [00] [00] [00] [00]
[00] [00] [00] [00] [00] [00] [00] [00] [00] [00] [00] [00]
[00] [00] [00] [00] [00] [00] [00] [00] [00] [00] [00] [00]
[00] [00] [00] [00] [00] [00] [00] [00] [00] [00] [00] [00]
[00] [00] [00] [00] [00] [00] [00] [00] [00] [00] [00] [00]
[00] [00] [00] [00] [00] [00] [00] [00] [00] [00] [00] [00]
[00] [00] [00] [00] [00] [00] [00] [00] [00] [00] [00] [00]
[00] [00] [00] [00] [00] [00] [00] [00] [00] [00] [00] [00]
[00] [00] [00] [00] [00] [00] [00] [00] [00] [00] [00] [00]
[00] [00] [00] [00] [00] [00] [00] [00] [00] [00] [00] [00]
[00] [00] [00] [00] [00] [00] [00] [00] [00] [00] [00] [00]
[00] [00] [00] [00] [00] [00] [00] [00] [00] [00] [00] [00]
Mac:
[00] [00] [00] [00] [00] [00] [00] [00] [00] [00] [00] [00] [00] [00] [00] [00]
[00] [00] [00] [00] [00] [00] [00] [00] [00] [00] [00] [00] [00] [00] [00] [00]
[00] [00] [00] [00] [00] [00] [00] [00] [00] [00] [00] [00] [00] [00] [00] [00]
[00] [00] [00] [00] [00] [00] [00] [00] [00] [00] [00] [00] [00] [00] [00] [00]
[00] [00] [00] [00] [00] [00] [00] [00] [00] [00] [00] [00] [00] [00] [00] [00]
[00] [00] [00] [00] [00] [00] [00] [00] [00] [00] [00] [00] [00] [00] [00] [00]
[00] [00] [00] [00] [00] [00] [00] [00] [00] [00] [00] [00] [00] [00] [00] [00]
[00] [00] [00] [00] [00] [00] [00] [00] [00] [00] [00] [00] [00] [00] [00] [00]
[00] [00] [00] [00] [00] [00] [00] [00] [00] [00] [00] [00] [00] [00] [00] [00]
[00] [00] [00] [00] [00] [00] [00] [00] [00] [00] [00] [00] [00] [00] [00] [00]
[00] [00] [00] [00] [00] [00] [00] [00] [00] [00] [00] [00] [00] [00] [00] [00]
[00] [00] [00] [00] [00] [00] [00] [00] [00] [00] [00] [00] [00] [00] [00] [00]
[00] [00] [00] [00] [00] [00] [00] [00] [00] [00] [00] [00] [00] [00] [00] [00]
[00] [00] [00] [00] [00] [00] [00] [00] [00] [00] [00] [00] [00] [00] [00] [00]
[00] [00] [00] [00] [00] [00] [00] [00] [00] [00] [00] [00] [00] [00] [00] [00]
[00] [00] [00] [00] [00] [00] [00] [00] [00] [00] [00] [00] [00] [00] [00] [00]
[00] [00] [00] [00] [00] [00] [00] [00] [00] [00] [00] [00] [00] [00] [00] [00]
[00] [00] [00] [00] [00] [00] [00] [00] [00] [00] [00] [00] [00] [00] [00] [00]
[00] [00] [00] [00] [00] [00] [00] [00] [00] [00] [00] [00] [00] [00] [00] [00]
[00] [00] [00] [00] [00] [00] [00] [00] [00] [00] [00] [00] [00] [00] [00] [00]
[00] [00] [00] [00] [00] [00] [00] [00] [00] [00] [00] [00] [00] [00] [00] [00]
[00] [00] [00] [00] [00] [00] [00] [00] [00] [00] [00] [00] [00] [00] [00] [00]
[00] [00] [00] [00] [00] [00] [00] [00] [00] [00] [00] [00] [00] [00] [00] [00]
[00] [00] [00] [00] [00] [00] [00] [00] [00] [00] [00] [00] [00] [00] [00] [00]
[00] [00] [00] [00] [00] [00] [00] [00] [00] [00] [00] [00] [00] [00] [00] [00]
[00] [00] [00] [00] [00] [00] [00] [00] [00] [00] [00] [00] [00] [00] [00] [00]
[00] [00] [00] [00] [00] [00] [00] [00] [00] [00] [00] [00] [00] [00] [00] [00]
[00] [00] [00] [00] [00] [00] [00] [00] [00] [00] [00] [00] [00] [00] [00] [00]
[00] [00] [00] [00] [00] [00] [00] [00] [00] [00] [00] [00] [00] [00] [00] [00]
[00] [00] [00] [00] [00] [00] [00] [00] [00] [00] [00] [00] [00] [00] [00] [00]
[00] [00] [00] [00] [00] [00] [00] [00] [00] [00] [00] [00] [00] [00] [00] [00]
[00] [00] [00] [00] [00] [00] [00] [00] [00] [00] [00] [00] [00] [00] [00] [00]
IvComm:
[00] [00] [00] [00] [00] [00] [00] [00] [00] [00] [00] [00]
MacComm:
[00] [00] [00] [00] [00] [00] [00] [00] [00] [00] [00] [00] [00] [00] [00] [00]
[SGX-KEYBLOB-PEI-REST] KeyBlob for socket no 4
Present: FALSE
TimeStamp: 0-0-0, 0:0:0:0, Pad1: 0, Pad2: 0, TimeZone: 0, Daylight: 0
KeyBlob:
Header:
SGX UUID:
[00] [00] [00] [00] [00] [00] [00] [00] [00] [00] [00] [00] [00] [00] [00] [00]
CpuSvn:
[00]
Security Properties:
[00] [00] [00] [00]
Prid:
[00] [00] [00] [00] [00] [00] [00] [00] [00] [00] [00] [00] [00] [00] [00] [00]
PlatformEpoch:
[00] [00] [00] [00] [00] [00] [00] [00] [00] [00] [00] [00] [00] [00] [00] [00] [00] [00] [00] [00] [00] [00] [00] [00] [00] [00] [00] [00] [00] [00] [00] [00]
RsakHash:
[00] [00] [00] [00] [00] [00] [00] [00] [00] [00] [00] [00] [00] [00] [00] [00] [00] [00] [00] [00] [00] [00] [00] [00] [00] [00] [00] [00] [00] [00] [00] [00]
RsakHash:
[00] [00] [00] [00] [00] [00] [00] [00] [00] [00] [00] [00] [00] [00] [00] [00] [00] [00] [00] [00] [00] [00] [00] [00] [00] [00] [00] [00] [00] [00] [00] [00]
Pfk1:
[00] [00] [00] [00] [00] [00] [00] [00] [00] [00] [00] [00] [00] [00] [00] [00]
PprResetKey:
[00] [00] [00] [00]
[00] [00] [00] [00]
[00] [00] [00] [00]
[00] [00] [00] [00]
[00] [00] [00] [00]
[00] [00] [00] [00]
[00] [00] [00] [00]
[00] [00] [00] [00]
[00] [00] [00] [00]
[00] [00] [00] [00]
[00] [00] [00] [00]
[00] [00] [00] [00]
[00] [00] [00] [00]
[00] [00] [00] [00]
[00] [00] [00] [00]
[00] [00] [00] [00]
[00] [00] [00] [00]
[00] [00] [00] [00]
[00] [00] [00] [00]
[00] [00] [00] [00]
[00] [00] [00] [00]
[00] [00] [00] [00]
[00] [00] [00] [00]
[00] [00] [00] [00]
[00] [00] [00] [00]
[00] [00] [00] [00]
[00] [00] [00] [00]
[00] [00] [00] [00]
[00] [00] [00] [00]
[00] [00] [00] [00]
[00] [00] [00] [00]
[00] [00] [00] [00]
LastUsedSvn:
[00]
Reserved2:
[00] [00] [00] [00] [00] [00] [00] [00] [00] [00] [00] [00] [00] [00] [00]
TargetPrid:
[00] [00] [00] [00] [00] [00] [00] [00] [00] [00] [00] [00] [00] [00] [00] [00]
PrimaryComms:
[00] [00] [00] [00] [00] [00] [00] [00] [00] [00] [00] [00] [00] [00] [00] [00]
Iv:
[00] [00] [00] [00] [00] [00] [00] [00] [00] [00] [00] [00]
[00] [00] [00] [00] [00] [00] [00] [00] [00] [00] [00] [00]
[00] [00] [00] [00] [00] [00] [00] [00] [00] [00] [00] [00]
[00] [00] [00] [00] [00] [00] [00] [00] [00] [00] [00] [00]
[00] [00] [00] [00] [00] [00] [00] [00] [00] [00] [00] [00]
[00] [00] [00] [00] [00] [00] [00] [00] [00] [00] [00] [00]
[00] [00] [00] [00] [00] [00] [00] [00] [00] [00] [00] [00]
[00] [00] [00] [00] [00] [00] [00] [00] [00] [00] [00] [00]
[00] [00] [00] [00] [00] [00] [00] [00] [00] [00] [00] [00]
[00] [00] [00] [00] [00] [00] [00] [00] [00] [00] [00] [00]
[00] [00] [00] [00] [00] [00] [00] [00] [00] [00] [00] [00]
[00] [00] [00] [00] [00] [00] [00] [00] [00] [00] [00] [00]
[00] [00] [00] [00] [00] [00] [00] [00] [00] [00] [00] [00]
[00] [00] [00] [00] [00] [00] [00] [00] [00] [00] [00] [00]
[00] [00] [00] [00] [00] [00] [00] [00] [00] [00] [00] [00]
[00] [00] [00] [00] [00] [00] [00] [00] [00] [00] [00] [00]
[00] [00] [00] [00] [00] [00] [00] [00] [00] [00] [00] [00]
[00] [00] [00] [00] [00] [00] [00] [00] [00] [00] [00] [00]
[00] [00] [00] [00] [00] [00] [00] [00] [00] [00] [00] [00]
[00] [00] [00] [00] [00] [00] [00] [00] [00] [00] [00] [00]
[00] [00] [00] [00] [00] [00] [00] [00] [00] [00] [00] [00]
[00] [00] [00] [00] [00] [00] [00] [00] [00] [00] [00] [00]
[00] [00] [00] [00] [00] [00] [00] [00] [00] [00] [00] [00]
[00] [00] [00] [00] [00] [00] [00] [00] [00] [00] [00] [00]
[00] [00] [00] [00] [00] [00] [00] [00] [00] [00] [00] [00]
[00] [00] [00] [00] [00] [00] [00] [00] [00] [00] [00] [00]
[00] [00] [00] [00] [00] [00] [00] [00] [00] [00] [00] [00]
[00] [00] [00] [00] [00] [00] [00] [00] [00] [00] [00] [00]
[00] [00] [00] [00] [00] [00] [00] [00] [00] [00] [00] [00]
[00] [00] [00] [00] [00] [00] [00] [00] [00] [00] [00] [00]
[00] [00] [00] [00] [00] [00] [00] [00] [00] [00] [00] [00]
[00] [00] [00] [00] [00] [00] [00] [00] [00] [00] [00] [00]
Mac:
[00] [00] [00] [00] [00] [00] [00] [00] [00] [00] [00] [00] [00] [00] [00] [00]
[00] [00] [00] [00] [00] [00] [00] [00] [00] [00] [00] [00] [00] [00] [00] [00]
[00] [00] [00] [00] [00] [00] [00] [00] [00] [00] [00] [00] [00] [00] [00] [00]
[00] [00] [00] [00] [00] [00] [00] [00] [00] [00] [00] [00] [00] [00] [00] [00]
[00] [00] [00] [00] [00] [00] [00] [00] [00] [00] [00] [00] [00] [00] [00] [00]
[00] [00] [00] [00] [00] [00] [00] [00] [00] [00] [00] [00] [00] [00] [00] [00]
[00] [00] [00] [00] [00] [00] [00] [00] [00] [00] [00] [00] [00] [00] [00] [00]
[00] [00] [00] [00] [00] [00] [00] [00] [00] [00] [00] [00] [00] [00] [00] [00]
[00] [00] [00] [00] [00] [00] [00] [00] [00] [00] [00] [00] [00] [00] [00] [00]
[00] [00] [00] [00] [00] [00] [00] [00] [00] [00] [00] [00] [00] [00] [00] [00]
[00] [00] [00] [00] [00] [00] [00] [00] [00] [00] [00] [00] [00] [00] [00] [00]
[00] [00] [00] [00] [00] [00] [00] [00] [00] [00] [00] [00] [00] [00] [00] [00]
[00] [00] [00] [00] [00] [00] [00] [00] [00] [00] [00] [00] [00] [00] [00] [00]
[00] [00] [00] [00] [00] [00] [00] [00] [00] [00] [00] [00] [00] [00] [00] [00]
[00] [00] [00] [00] [00] [00] [00] [00] [00] [00] [00] [00] [00] [00] [00] [00]
[00] [00] [00] [00] [00] [00] [00] [00] [00] [00] [00] [00] [00] [00] [00] [00]
[00] [00] [00] [00] [00] [00] [00] [00] [00] [00] [00] [00] [00] [00] [00] [00]
[00] [00] [00] [00] [00] [00] [00] [00] [00] [00] [00] [00] [00] [00] [00] [00]
[00] [00] [00] [00] [00] [00] [00] [00] [00] [00] [00] [00] [00] [00] [00] [00]
[00] [00] [00] [00] [00] [00] [00] [00] [00] [00] [00] [00] [00] [00] [00] [00]
[00] [00] [00] [00] [00] [00] [00] [00] [00] [00] [00] [00] [00] [00] [00] [00]
[00] [00] [00] [00] [00] [00] [00] [00] [00] [00] [00] [00] [00] [00] [00] [00]
[00] [00] [00] [00] [00] [00] [00] [00] [00] [00] [00] [00] [00] [00] [00] [00]
[00] [00] [00] [00] [00] [00] [00] [00] [00] [00] [00] [00] [00] [00] [00] [00]
[00] [00] [00] [00] [00] [00] [00] [00] [00] [00] [00] [00] [00] [00] [00] [00]
[00] [00] [00] [00] [00] [00] [00] [00] [00] [00] [00] [00] [00] [00] [00] [00]
[00] [00] [00] [00] [00] [00] [00] [00] [00] [00] [00] [00] [00] [00] [00] [00]
[00] [00] [00] [00] [00] [00] [00] [00] [00] [00] [00] [00] [00] [00] [00] [00]
[00] [00] [00] [00] [00] [00] [00] [00] [00] [00] [00] [00] [00] [00] [00] [00]
[00] [00] [00] [00] [00] [00] [00] [00] [00] [00] [00] [00] [00] [00] [00] [00]
[00] [00] [00] [00] [00] [00] [00] [00] [00] [00] [00] [00] [00] [00] [00] [00]
[00] [00] [00] [00] [00] [00] [00] [00] [00] [00] [00] [00] [00] [00] [00] [00]
IvComm:
[00] [00] [00] [00] [00] [00] [00] [00] [00] [00] [00] [00]
MacComm:
[00] [00] [00] [00] [00] [00] [00] [00] [00] [00] [00] [00] [00] [00] [00] [00]
[SGX-KEYBLOB-PEI-REST] KeyBlob for socket no 5
Present: FALSE
TimeStamp: 0-0-0, 0:0:0:0, Pad1: 0, Pad2: 0, TimeZone: 0, Daylight: 0
KeyBlob:
Header:
SGX UUID:
[00] [00] [00] [00] [00] [00] [00] [00] [00] [00] [00] [00] [00] [00] [00] [00]
CpuSvn:
[00]
Security Properties:
[00] [00] [00] [00]
Prid:
[00] [00] [00] [00] [00] [00] [00] [00] [00] [00] [00] [00] [00] [00] [00] [00]
PlatformEpoch:
[00] [00] [00] [00] [00] [00] [00] [00] [00] [00] [00] [00] [00] [00] [00] [00] [00] [00] [00] [00] [00] [00] [00] [00] [00] [00] [00] [00] [00] [00] [00] [00]
RsakHash:
[00] [00] [00] [00] [00] [00] [00] [00] [00] [00] [00] [00] [00] [00] [00] [00] [00] [00] [00] [00] [00] [00] [00] [00] [00] [00] [00] [00] [00] [00] [00] [00]
RsakHash:
[00] [00] [00] [00] [00] [00] [00] [00] [00] [00] [00] [00] [00] [00] [00] [00] [00] [00] [00] [00] [00] [00] [00] [00] [00] [00] [00] [00] [00] [00] [00] [00]
Pfk1:
[00] [00] [00] [00] [00] [00] [00] [00] [00] [00] [00] [00] [00] [00] [00] [00]
PprResetKey:
[00] [00] [00] [00]
[00] [00] [00] [00]
[00] [00] [00] [00]
[00] [00] [00] [00]
[00] [00] [00] [00]
[00] [00] [00] [00]
[00] [00] [00] [00]
[00] [00] [00] [00]
[00] [00] [00] [00]
[00] [00] [00] [00]
[00] [00] [00] [00]
[00] [00] [00] [00]
[00] [00] [00] [00]
[00] [00] [00] [00]
[00] [00] [00] [00]
[00] [00] [00] [00]
[00] [00] [00] [00]
[00] [00] [00] [00]
[00] [00] [00] [00]
[00] [00] [00] [00]
[00] [00] [00] [00]
[00] [00] [00] [00]
[00] [00] [00] [00]
[00] [00] [00] [00]
[00] [00] [00] [00]
[00] [00] [00] [00]
[00] [00] [00] [00]
[00] [00] [00] [00]
[00] [00] [00] [00]
[00] [00] [00] [00]
[00] [00] [00] [00]
[00] [00] [00] [00]
LastUsedSvn:
[00]
Reserved2:
[00] [00] [00] [00] [00] [00] [00] [00] [00] [00] [00] [00] [00] [00] [00]
TargetPrid:
[00] [00] [00] [00] [00] [00] [00] [00] [00] [00] [00] [00] [00] [00] [00] [00]
PrimaryComms:
[00] [00] [00] [00] [00] [00] [00] [00] [00] [00] [00] [00] [00] [00] [00] [00]
Iv:
[00] [00] [00] [00] [00] [00] [00] [00] [00] [00] [00] [00]
[00] [00] [00] [00] [00] [00] [00] [00] [00] [00] [00] [00]
[00] [00] [00] [00] [00] [00] [00] [00] [00] [00] [00] [00]
[00] [00] [00] [00] [00] [00] [00] [00] [00] [00] [00] [00]
[00] [00] [00] [00] [00] [00] [00] [00] [00] [00] [00] [00]
[00] [00] [00] [00] [00] [00] [00] [00] [00] [00] [00] [00]
[00] [00] [00] [00] [00] [00] [00] [00] [00] [00] [00] [00]
[00] [00] [00] [00] [00] [00] [00] [00] [00] [00] [00] [00]
[00] [00] [00] [00] [00] [00] [00] [00] [00] [00] [00] [00]
[00] [00] [00] [00] [00] [00] [00] [00] [00] [00] [00] [00]
[00] [00] [00] [00] [00] [00] [00] [00] [00] [00] [00] [00]
[00] [00] [00] [00] [00] [00] [00] [00] [00] [00] [00] [00]
[00] [00] [00] [00] [00] [00] [00] [00] [00] [00] [00] [00]
[00] [00] [00] [00] [00] [00] [00] [00] [00] [00] [00] [00]
[00] [00] [00] [00] [00] [00] [00] [00] [00] [00] [00] [00]
[00] [00] [00] [00] [00] [00] [00] [00] [00] [00] [00] [00]
[00] [00] [00] [00] [00] [00] [00] [00] [00] [00] [00] [00]
[00] [00] [00] [00] [00] [00] [00] [00] [00] [00] [00] [00]
[00] [00] [00] [00] [00] [00] [00] [00] [00] [00] [00] [00]
[00] [00] [00] [00] [00] [00] [00] [00] [00] [00] [00] [00]
[00] [00] [00] [00] [00] [00] [00] [00] [00] [00] [00] [00]
[00] [00] [00] [00] [00] [00] [00] [00] [00] [00] [00] [00]
[00] [00] [00] [00] [00] [00] [00] [00] [00] [00] [00] [00]
[00] [00] [00] [00] [00] [00] [00] [00] [00] [00] [00] [00]
[00] [00] [00] [00] [00] [00] [00] [00] [00] [00] [00] [00]
[00] [00] [00] [00] [00] [00] [00] [00] [00] [00] [00] [00]
[00] [00] [00] [00] [00] [00] [00] [00] [00] [00] [00] [00]
[00] [00] [00] [00] [00] [00] [00] [00] [00] [00] [00] [00]
[00] [00] [00] [00] [00] [00] [00] [00] [00] [00] [00] [00]
[00] [00] [00] [00] [00] [00] [00] [00] [00] [00] [00] [00]
[00] [00] [00] [00] [00] [00] [00] [00] [00] [00] [00] [00]
[00] [00] [00] [00] [00] [00] [00] [00] [00] [00] [00] [00]
Mac:
[00] [00] [00] [00] [00] [00] [00] [00] [00] [00] [00] [00] [00] [00] [00] [00]
[00] [00] [00] [00] [00] [00] [00] [00] [00] [00] [00] [00] [00] [00] [00] [00]
[00] [00] [00] [00] [00] [00] [00] [00] [00] [00] [00] [00] [00] [00] [00] [00]
[00] [00] [00] [00] [00] [00] [00] [00] [00] [00] [00] [00] [00] [00] [00] [00]
[00] [00] [00] [00] [00] [00] [00] [00] [00] [00] [00] [00] [00] [00] [00] [00]
[00] [00] [00] [00] [00] [00] [00] [00] [00] [00] [00] [00] [00] [00] [00] [00]
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[00] [00] [00] [00] [00] [00] [00] [00] [00] [00] [00] [00] [00] [00] [00] [00]
[00] [00] [00] [00] [00] [00] [00] [00] [00] [00] [00] [00] [00] [00] [00] [00]
[00] [00] [00] [00] [00] [00] [00] [00] [00] [00] [00] [00] [00] [00] [00] [00]
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[00] [00] [00] [00] [00] [00] [00] [00] [00] [00] [00] [00] [00] [00] [00] [00]
[00] [00] [00] [00] [00] [00] [00] [00] [00] [00] [00] [00] [00] [00] [00] [00]
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[00] [00] [00] [00] [00] [00] [00] [00] [00] [00] [00] [00] [00] [00] [00] [00]
[00] [00] [00] [00] [00] [00] [00] [00] [00] [00] [00] [00] [00] [00] [00] [00]
[00] [00] [00] [00] [00] [00] [00] [00] [00] [00] [00] [00] [00] [00] [00] [00]
[00] [00] [00] [00] [00] [00] [00] [00] [00] [00] [00] [00] [00] [00] [00] [00]
[00] [00] [00] [00] [00] [00] [00] [00] [00] [00] [00] [00] [00] [00] [00] [00]
[00] [00] [00] [00] [00] [00] [00] [00] [00] [00] [00] [00] [00] [00] [00] [00]
[00] [00] [00] [00] [00] [00] [00] [00] [00] [00] [00] [00] [00] [00] [00] [00]
[00] [00] [00] [00] [00] [00] [00] [00] [00] [00] [00] [00] [00] [00] [00] [00]
[00] [00] [00] [00] [00] [00] [00] [00] [00] [00] [00] [00] [00] [00] [00] [00]
[00] [00] [00] [00] [00] [00] [00] [00] [00] [00] [00] [00] [00] [00] [00] [00]
[00] [00] [00] [00] [00] [00] [00] [00] [00] [00] [00] [00] [00] [00] [00] [00]
[00] [00] [00] [00] [00] [00] [00] [00] [00] [00] [00] [00] [00] [00] [00] [00]
[00] [00] [00] [00] [00] [00] [00] [00] [00] [00] [00] [00] [00] [00] [00] [00]
[00] [00] [00] [00] [00] [00] [00] [00] [00] [00] [00] [00] [00] [00] [00] [00]
[00] [00] [00] [00] [00] [00] [00] [00] [00] [00] [00] [00] [00] [00] [00] [00]
[00] [00] [00] [00] [00] [00] [00] [00] [00] [00] [00] [00] [00] [00] [00] [00]
[00] [00] [00] [00] [00] [00] [00] [00] [00] [00] [00] [00] [00] [00] [00] [00]
IvComm:
[00] [00] [00] [00] [00] [00] [00] [00] [00] [00] [00] [00]
MacComm:
[00] [00] [00] [00] [00] [00] [00] [00] [00] [00] [00] [00] [00] [00] [00] [00]
[SGX-KEYBLOB-PEI-REST] KeyBlob for socket no 6
Present: FALSE
TimeStamp: 0-0-0, 0:0:0:0, Pad1: 0, Pad2: 0, TimeZone: 0, Daylight: 0
KeyBlob:
Header:
SGX UUID:
[00] [00] [00] [00] [00] [00] [00] [00] [00] [00] [00] [00] [00] [00] [00] [00]
CpuSvn:
[00]
Security Properties:
[00] [00] [00] [00]
Prid:
[00] [00] [00] [00] [00] [00] [00] [00] [00] [00] [00] [00] [00] [00] [00] [00]
PlatformEpoch:
[00] [00] [00] [00] [00] [00] [00] [00] [00] [00] [00] [00] [00] [00] [00] [00] [00] [00] [00] [00] [00] [00] [00] [00] [00] [00] [00] [00] [00] [00] [00] [00]
RsakHash:
[00] [00] [00] [00] [00] [00] [00] [00] [00] [00] [00] [00] [00] [00] [00] [00] [00] [00] [00] [00] [00] [00] [00] [00] [00] [00] [00] [00] [00] [00] [00] [00]
RsakHash:
[00] [00] [00] [00] [00] [00] [00] [00] [00] [00] [00] [00] [00] [00] [00] [00] [00] [00] [00] [00] [00] [00] [00] [00] [00] [00] [00] [00] [00] [00] [00] [00]
Pfk1:
[00] [00] [00] [00] [00] [00] [00] [00] [00] [00] [00] [00] [00] [00] [00] [00]
PprResetKey:
[00] [00] [00] [00]
[00] [00] [00] [00]
[00] [00] [00] [00]
[00] [00] [00] [00]
[00] [00] [00] [00]
[00] [00] [00] [00]
[00] [00] [00] [00]
[00] [00] [00] [00]
[00] [00] [00] [00]
[00] [00] [00] [00]
[00] [00] [00] [00]
[00] [00] [00] [00]
[00] [00] [00] [00]
[00] [00] [00] [00]
[00] [00] [00] [00]
[00] [00] [00] [00]
[00] [00] [00] [00]
[00] [00] [00] [00]
[00] [00] [00] [00]
[00] [00] [00] [00]
[00] [00] [00] [00]
[00] [00] [00] [00]
[00] [00] [00] [00]
[00] [00] [00] [00]
[00] [00] [00] [00]
[00] [00] [00] [00]
[00] [00] [00] [00]
[00] [00] [00] [00]
[00] [00] [00] [00]
[00] [00] [00] [00]
[00] [00] [00] [00]
[00] [00] [00] [00]
LastUsedSvn:
[00]
Reserved2:
[00] [00] [00] [00] [00] [00] [00] [00] [00] [00] [00] [00] [00] [00] [00]
TargetPrid:
[00] [00] [00] [00] [00] [00] [00] [00] [00] [00] [00] [00] [00] [00] [00] [00]
PrimaryComms:
[00] [00] [00] [00] [00] [00] [00] [00] [00] [00] [00] [00] [00] [00] [00] [00]
Iv:
[00] [00] [00] [00] [00] [00] [00] [00] [00] [00] [00] [00]
[00] [00] [00] [00] [00] [00] [00] [00] [00] [00] [00] [00]
[00] [00] [00] [00] [00] [00] [00] [00] [00] [00] [00] [00]
[00] [00] [00] [00] [00] [00] [00] [00] [00] [00] [00] [00]
[00] [00] [00] [00] [00] [00] [00] [00] [00] [00] [00] [00]
[00] [00] [00] [00] [00] [00] [00] [00] [00] [00] [00] [00]
[00] [00] [00] [00] [00] [00] [00] [00] [00] [00] [00] [00]
[00] [00] [00] [00] [00] [00] [00] [00] [00] [00] [00] [00]
[00] [00] [00] [00] [00] [00] [00] [00] [00] [00] [00] [00]
[00] [00] [00] [00] [00] [00] [00] [00] [00] [00] [00] [00]
[00] [00] [00] [00] [00] [00] [00] [00] [00] [00] [00] [00]
[00] [00] [00] [00] [00] [00] [00] [00] [00] [00] [00] [00]
[00] [00] [00] [00] [00] [00] [00] [00] [00] [00] [00] [00]
[00] [00] [00] [00] [00] [00] [00] [00] [00] [00] [00] [00]
[00] [00] [00] [00] [00] [00] [00] [00] [00] [00] [00] [00]
[00] [00] [00] [00] [00] [00] [00] [00] [00] [00] [00] [00]
[00] [00] [00] [00] [00] [00] [00] [00] [00] [00] [00] [00]
[00] [00] [00] [00] [00] [00] [00] [00] [00] [00] [00] [00]
[00] [00] [00] [00] [00] [00] [00] [00] [00] [00] [00] [00]
[00] [00] [00] [00] [00] [00] [00] [00] [00] [00] [00] [00]
[00] [00] [00] [00] [00] [00] [00] [00] [00] [00] [00] [00]
[00] [00] [00] [00] [00] [00] [00] [00] [00] [00] [00] [00]
[00] [00] [00] [00] [00] [00] [00] [00] [00] [00] [00] [00]
[00] [00] [00] [00] [00] [00] [00] [00] [00] [00] [00] [00]
[00] [00] [00] [00] [00] [00] [00] [00] [00] [00] [00] [00]
[00] [00] [00] [00] [00] [00] [00] [00] [00] [00] [00] [00]
[00] [00] [00] [00] [00] [00] [00] [00] [00] [00] [00] [00]
[00] [00] [00] [00] [00] [00] [00] [00] [00] [00] [00] [00]
[00] [00] [00] [00] [00] [00] [00] [00] [00] [00] [00] [00]
[00] [00] [00] [00] [00] [00] [00] [00] [00] [00] [00] [00]
[00] [00] [00] [00] [00] [00] [00] [00] [00] [00] [00] [00]
[00] [00] [00] [00] [00] [00] [00] [00] [00] [00] [00] [00]
Mac:
[00] [00] [00] [00] [00] [00] [00] [00] [00] [00] [00] [00] [00] [00] [00] [00]
[00] [00] [00] [00] [00] [00] [00] [00] [00] [00] [00] [00] [00] [00] [00] [00]
[00] [00] [00] [00] [00] [00] [00] [00] [00] [00] [00] [00] [00] [00] [00] [00]
[00] [00] [00] [00] [00] [00] [00] [00] [00] [00] [00] [00] [00] [00] [00] [00]
[00] [00] [00] [00] [00] [00] [00] [00] [00] [00] [00] [00] [00] [00] [00] [00]
[00] [00] [00] [00] [00] [00] [00] [00] [00] [00] [00] [00] [00] [00] [00] [00]
[00] [00] [00] [00] [00] [00] [00] [00] [00] [00] [00] [00] [00] [00] [00] [00]
[00] [00] [00] [00] [00] [00] [00] [00] [00] [00] [00] [00] [00] [00] [00] [00]
[00] [00] [00] [00] [00] [00] [00] [00] [00] [00] [00] [00] [00] [00] [00] [00]
[00] [00] [00] [00] [00] [00] [00] [00] [00] [00] [00] [00] [00] [00] [00] [00]
[00] [00] [00] [00] [00] [00] [00] [00] [00] [00] [00] [00] [00] [00] [00] [00]
[00] [00] [00] [00] [00] [00] [00] [00] [00] [00] [00] [00] [00] [00] [00] [00]
[00] [00] [00] [00] [00] [00] [00] [00] [00] [00] [00] [00] [00] [00] [00] [00]
[00] [00] [00] [00] [00] [00] [00] [00] [00] [00] [00] [00] [00] [00] [00] [00]
[00] [00] [00] [00] [00] [00] [00] [00] [00] [00] [00] [00] [00] [00] [00] [00]
[00] [00] [00] [00] [00] [00] [00] [00] [00] [00] [00] [00] [00] [00] [00] [00]
[00] [00] [00] [00] [00] [00] [00] [00] [00] [00] [00] [00] [00] [00] [00] [00]
[00] [00] [00] [00] [00] [00] [00] [00] [00] [00] [00] [00] [00] [00] [00] [00]
[00] [00] [00] [00] [00] [00] [00] [00] [00] [00] [00] [00] [00] [00] [00] [00]
[00] [00] [00] [00] [00] [00] [00] [00] [00] [00] [00] [00] [00] [00] [00] [00]
[00] [00] [00] [00] [00] [00] [00] [00] [00] [00] [00] [00] [00] [00] [00] [00]
[00] [00] [00] [00] [00] [00] [00] [00] [00] [00] [00] [00] [00] [00] [00] [00]
[00] [00] [00] [00] [00] [00] [00] [00] [00] [00] [00] [00] [00] [00] [00] [00]
[00] [00] [00] [00] [00] [00] [00] [00] [00] [00] [00] [00] [00] [00] [00] [00]
[00] [00] [00] [00] [00] [00] [00] [00] [00] [00] [00] [00] [00] [00] [00] [00]
[00] [00] [00] [00] [00] [00] [00] [00] [00] [00] [00] [00] [00] [00] [00] [00]
[00] [00] [00] [00] [00] [00] [00] [00] [00] [00] [00] [00] [00] [00] [00] [00]
[00] [00] [00] [00] [00] [00] [00] [00] [00] [00] [00] [00] [00] [00] [00] [00]
[00] [00] [00] [00] [00] [00] [00] [00] [00] [00] [00] [00] [00] [00] [00] [00]
[00] [00] [00] [00] [00] [00] [00] [00] [00] [00] [00] [00] [00] [00] [00] [00]
[00] [00] [00] [00] [00] [00] [00] [00] [00] [00] [00] [00] [00] [00] [00] [00]
[00] [00] [00] [00] [00] [00] [00] [00] [00] [00] [00] [00] [00] [00] [00] [00]
IvComm:
[00] [00] [00] [00] [00] [00] [00] [00] [00] [00] [00] [00]
MacComm:
[00] [00] [00] [00] [00] [00] [00] [00] [00] [00] [00] [00] [00] [00] [00] [00]
[SGX-KEYBLOB-PEI-REST] KeyBlob for socket no 7
Present: FALSE
TimeStamp: 0-0-0, 0:0:0:0, Pad1: 0, Pad2: 0, TimeZone: 0, Daylight: 0
KeyBlob:
Header:
SGX UUID:
[00] [00] [00] [00] [00] [00] [00] [00] [00] [00] [00] [00] [00] [00] [00] [00]
CpuSvn:
[00]
Security Properties:
[00] [00] [00] [00]
Prid:
[00] [00] [00] [00] [00] [00] [00] [00] [00] [00] [00] [00] [00] [00] [00] [00]
PlatformEpoch:
[00] [00] [00] [00] [00] [00] [00] [00] [00] [00] [00] [00] [00] [00] [00] [00] [00] [00] [00] [00] [00] [00] [00] [00] [00] [00] [00] [00] [00] [00] [00] [00]
RsakHash:
[00] [00] [00] [00] [00] [00] [00] [00] [00] [00] [00] [00] [00] [00] [00] [00] [00] [00] [00] [00] [00] [00] [00] [00] [00] [00] [00] [00] [00] [00] [00] [00]
RsakHash:
[00] [00] [00] [00] [00] [00] [00] [00] [00] [00] [00] [00] [00] [00] [00] [00] [00] [00] [00] [00] [00] [00] [00] [00] [00] [00] [00] [00] [00] [00] [00] [00]
Pfk1:
[00] [00] [00] [00] [00] [00] [00] [00] [00] [00] [00] [00] [00] [00] [00] [00]
PprResetKey:
[00] [00] [00] [00]
[00] [00] [00] [00]
[00] [00] [00] [00]
[00] [00] [00] [00]
[00] [00] [00] [00]
[00] [00] [00] [00]
[00] [00] [00] [00]
[00] [00] [00] [00]
[00] [00] [00] [00]
[00] [00] [00] [00]
[00] [00] [00] [00]
[00] [00] [00] [00]
[00] [00] [00] [00]
[00] [00] [00] [00]
[00] [00] [00] [00]
[00] [00] [00] [00]
[00] [00] [00] [00]
[00] [00] [00] [00]
[00] [00] [00] [00]
[00] [00] [00] [00]
[00] [00] [00] [00]
[00] [00] [00] [00]
[00] [00] [00] [00]
[00] [00] [00] [00]
[00] [00] [00] [00]
[00] [00] [00] [00]
[00] [00] [00] [00]
[00] [00] [00] [00]
[00] [00] [00] [00]
[00] [00] [00] [00]
[00] [00] [00] [00]
[00] [00] [00] [00]
LastUsedSvn:
[00]
Reserved2:
[00] [00] [00] [00] [00] [00] [00] [00] [00] [00] [00] [00] [00] [00] [00]
TargetPrid:
[00] [00] [00] [00] [00] [00] [00] [00] [00] [00] [00] [00] [00] [00] [00] [00]
PrimaryComms:
[00] [00] [00] [00] [00] [00] [00] [00] [00] [00] [00] [00] [00] [00] [00] [00]
Iv:
[00] [00] [00] [00] [00] [00] [00] [00] [00] [00] [00] [00]
[00] [00] [00] [00] [00] [00] [00] [00] [00] [00] [00] [00]
[00] [00] [00] [00] [00] [00] [00] [00] [00] [00] [00] [00]
[00] [00] [00] [00] [00] [00] [00] [00] [00] [00] [00] [00]
[00] [00] [00] [00] [00] [00] [00] [00] [00] [00] [00] [00]
[00] [00] [00] [00] [00] [00] [00] [00] [00] [00] [00] [00]
[00] [00] [00] [00] [00] [00] [00] [00] [00] [00] [00] [00]
[00] [00] [00] [00] [00] [00] [00] [00] [00] [00] [00] [00]
[00] [00] [00] [00] [00] [00] [00] [00] [00] [00] [00] [00]
[00] [00] [00] [00] [00] [00] [00] [00] [00] [00] [00] [00]
[00] [00] [00] [00] [00] [00] [00] [00] [00] [00] [00] [00]
[00] [00] [00] [00] [00] [00] [00] [00] [00] [00] [00] [00]
[00] [00] [00] [00] [00] [00] [00] [00] [00] [00] [00] [00]
[00] [00] [00] [00] [00] [00] [00] [00] [00] [00] [00] [00]
[00] [00] [00] [00] [00] [00] [00] [00] [00] [00] [00] [00]
[00] [00] [00] [00] [00] [00] [00] [00] [00] [00] [00] [00]
[00] [00] [00] [00] [00] [00] [00] [00] [00] [00] [00] [00]
[00] [00] [00] [00] [00] [00] [00] [00] [00] [00] [00] [00]
[00] [00] [00] [00] [00] [00] [00] [00] [00] [00] [00] [00]
[00] [00] [00] [00] [00] [00] [00] [00] [00] [00] [00] [00]
[00] [00] [00] [00] [00] [00] [00] [00] [00] [00] [00] [00]
[00] [00] [00] [00] [00] [00] [00] [00] [00] [00] [00] [00]
[00] [00] [00] [00] [00] [00] [00] [00] [00] [00] [00] [00]
[00] [00] [00] [00] [00] [00] [00] [00] [00] [00] [00] [00]
[00] [00] [00] [00] [00] [00] [00] [00] [00] [00] [00] [00]
[00] [00] [00] [00] [00] [00] [00] [00] [00] [00] [00] [00]
[00] [00] [00] [00] [00] [00] [00] [00] [00] [00] [00] [00]
[00] [00] [00] [00] [00] [00] [00] [00] [00] [00] [00] [00]
[00] [00] [00] [00] [00] [00] [00] [00] [00] [00] [00] [00]
[00] [00] [00] [00] [00] [00] [00] [00] [00] [00] [00] [00]
[00] [00] [00] [00] [00] [00] [00] [00] [00] [00] [00] [00]
[00] [00] [00] [00] [00] [00] [00] [00] [00] [00] [00] [00]
Mac:
[00] [00] [00] [00] [00] [00] [00] [00] [00] [00] [00] [00] [00] [00] [00] [00]
[00] [00] [00] [00] [00] [00] [00] [00] [00] [00] [00] [00] [00] [00] [00] [00]
[00] [00] [00] [00] [00] [00] [00] [00] [00] [00] [00] [00] [00] [00] [00] [00]
[00] [00] [00] [00] [00] [00] [00] [00] [00] [00] [00] [00] [00] [00] [00] [00]
[00] [00] [00] [00] [00] [00] [00] [00] [00] [00] [00] [00] [00] [00] [00] [00]
[00] [00] [00] [00] [00] [00] [00] [00] [00] [00] [00] [00] [00] [00] [00] [00]
[00] [00] [00] [00] [00] [00] [00] [00] [00] [00] [00] [00] [00] [00] [00] [00]
[00] [00] [00] [00] [00] [00] [00] [00] [00] [00] [00] [00] [00] [00] [00] [00]
[00] [00] [00] [00] [00] [00] [00] [00] [00] [00] [00] [00] [00] [00] [00] [00]
[00] [00] [00] [00] [00] [00] [00] [00] [00] [00] [00] [00] [00] [00] [00] [00]
[00] [00] [00] [00] [00] [00] [00] [00] [00] [00] [00] [00] [00] [00] [00] [00]
[00] [00] [00] [00] [00] [00] [00] [00] [00] [00] [00] [00] [00] [00] [00] [00]
[00] [00] [00] [00] [00] [00] [00] [00] [00] [00] [00] [00] [00] [00] [00] [00]
[00] [00] [00] [00] [00] [00] [00] [00] [00] [00] [00] [00] [00] [00] [00] [00]
[00] [00] [00] [00] [00] [00] [00] [00] [00] [00] [00] [00] [00] [00] [00] [00]
[00] [00] [00] [00] [00] [00] [00] [00] [00] [00] [00] [00] [00] [00] [00] [00]
[00] [00] [00] [00] [00] [00] [00] [00] [00] [00] [00] [00] [00] [00] [00] [00]
[00] [00] [00] [00] [00] [00] [00] [00] [00] [00] [00] [00] [00] [00] [00] [00]
[00] [00] [00] [00] [00] [00] [00] [00] [00] [00] [00] [00] [00] [00] [00] [00]
[00] [00] [00] [00] [00] [00] [00] [00] [00] [00] [00] [00] [00] [00] [00] [00]
[00] [00] [00] [00] [00] [00] [00] [00] [00] [00] [00] [00] [00] [00] [00] [00]
[00] [00] [00] [00] [00] [00] [00] [00] [00] [00] [00] [00] [00] [00] [00] [00]
[00] [00] [00] [00] [00] [00] [00] [00] [00] [00] [00] [00] [00] [00] [00] [00]
[00] [00] [00] [00] [00] [00] [00] [00] [00] [00] [00] [00] [00] [00] [00] [00]
[00] [00] [00] [00] [00] [00] [00] [00] [00] [00] [00] [00] [00] [00] [00] [00]
[00] [00] [00] [00] [00] [00] [00] [00] [00] [00] [00] [00] [00] [00] [00] [00]
[00] [00] [00] [00] [00] [00] [00] [00] [00] [00] [00] [00] [00] [00] [00] [00]
[00] [00] [00] [00] [00] [00] [00] [00] [00] [00] [00] [00] [00] [00] [00] [00]
[00] [00] [00] [00] [00] [00] [00] [00] [00] [00] [00] [00] [00] [00] [00] [00]
[00] [00] [00] [00] [00] [00] [00] [00] [00] [00] [00] [00] [00] [00] [00] [00]
[00] [00] [00] [00] [00] [00] [00] [00] [00] [00] [00] [00] [00] [00] [00] [00]
[00] [00] [00] [00] [00] [00] [00] [00] [00] [00] [00] [00] [00] [00] [00] [00]
IvComm:
[00] [00] [00] [00] [00] [00] [00] [00] [00] [00] [00] [00]
MacComm:
[00] [00] [00] [00] [00] [00] [00] [00] [00] [00] [00] [00] [00] [00] [00] [00]
SGX disabled, exiting
[SGX] SgxEarlyInit exit: Success
SgxDisabledFlow entry
LockUncoreM2mPrmrrs START
SocketIndex = 0
[SGX] LockUncoreM2mPrmrrs: Sgx M2M_PRMRR_BASE Socket0 Imc0 = 0x0000000000000000
[SGX] LockUncoreM2mPrmrrs: Sgx M2M_PRMRR_MASK Socket0 Imc0 = 0x0000000000000400
[SGX] LockUncoreM2mPrmrrs: Sgx M2M_PRMRR_BASE Socket0 Imc1 = 0x0000000000000000
[SGX] LockUncoreM2mPrmrrs: Sgx M2M_PRMRR_MASK Socket0 Imc1 = 0x0000000000000400
[SGX] LockUncoreM2mPrmrrs: Sgx M2M_PRMRR_BASE Socket0 Imc2 = 0x0000000000000000
[SGX] LockUncoreM2mPrmrrs: Sgx M2M_PRMRR_MASK Socket0 Imc2 = 0x0000000000000400
[SGX] LockUncoreM2mPrmrrs: Sgx M2M_PRMRR_BASE Socket0 Imc3 = 0x0000000000000000
[SGX] LockUncoreM2mPrmrrs: Sgx M2M_PRMRR_MASK Socket0 Imc3 = 0x0000000000000400
SocketIndex = 1
[SGX] LockUncoreM2mPrmrrs: Sgx M2M_PRMRR_BASE Socket1 Imc0 = 0x0000000000000000
[SGX] LockUncoreM2mPrmrrs: Sgx M2M_PRMRR_MASK Socket1 Imc0 = 0x0000000000000400
[SGX] LockUncoreM2mPrmrrs: Sgx M2M_PRMRR_BASE Socket1 Imc1 = 0x0000000000000000
[SGX] LockUncoreM2mPrmrrs: Sgx M2M_PRMRR_MASK Socket1 Imc1 = 0x0000000000000400
[SGX] LockUncoreM2mPrmrrs: Sgx M2M_PRMRR_BASE Socket1 Imc2 = 0x0000000000000000
[SGX] LockUncoreM2mPrmrrs: Sgx M2M_PRMRR_MASK Socket1 Imc2 = 0x0000000000000400
[SGX] LockUncoreM2mPrmrrs: Sgx M2M_PRMRR_BASE Socket1 Imc3 = 0x0000000000000000
[SGX] LockUncoreM2mPrmrrs: Sgx M2M_PRMRR_MASK Socket1 Imc3 = 0x0000000000000400
LockUncoreM2mPrmrrs END
SgxDisabledFlow exit
PROGRESS CODE: V03020003 I0
PROGRESS CODE: V03020002 I0
PEI PPM Initialization Entry
::PEI Power Management CSR, B2P and TPMI Programming
Data received from mailbox: 0x20000802
Data received from mailbox: 0x20000902
InitializeUfsMeshBoostConfig() Not supported or not enabled, Exit
Data received from mailbox: 0x20000802
Data received from mailbox: 0x20000902
InitializeUfsMeshBoostConfig() Not supported or not enabled, Exit
PROGRESS CODE: V03020003 I0
PROGRESS CODE: V03020002 I0
[NEW] FeatureName: AESNI
[NEW] FeatureName: MWAIT
[NEW] FeatureName: ACPI
[NEW] FeatureName: EIST
[NEW] FeatureName: FastStrings
[NEW] FeatureName: Lock Feature Control Register
[NEW] FeatureName: SMX
[NEW] FeatureName: VMX
[NEW] FeatureName: Limit CpuId Maximum Value
[NEW] FeatureName: Machine Check Enable
[NEW] FeatureName: Machine Check Architect
[NEW] FeatureName: MCG_CTL
[NEW] FeatureName: Pending Break
[NEW] FeatureName: C1E
[NEW] FeatureName: X2Apic
[NEW] FeatureName: PPIN
[NEW] FeatureName: LMCE
[NEW] FeatureName: Proc Trace
[OVERRIDE] FeatureName: ACPI
[OVERRIDE] FeatureName: EIST
[OVERRIDE] FeatureName: FastStrings
[OVERRIDE] FeatureName: Lock Feature Control Register
[OVERRIDE] FeatureName: Limit CpuId Maximum Value
[OVERRIDE] FeatureName: Pending Break
[OVERRIDE] FeatureName: C1E
[OVERRIDE] FeatureName: PPIN
[OVERRIDE] FeatureName: LMCE
[OVERRIDE] FeatureName: Proc Trace
[NEW] FeatureName: L1 Next Page Prefetcher
[NEW] FeatureName: DCU Streamer Prefetcher
[NEW] FeatureName: DCU IP Prefetcher
[NEW] FeatureName: Mlc Streamer Prefetcher
[NEW] FeatureName: Mlc Spatial Prefetcher
[NEW] FeatureName: AMP Prefetcher
[NEW] FeatureName: Three Strike Counter
[NEW] FeatureName: DBP-F
[NEW] FeatureName: Energy Performance Bias
[NEW] FeatureName: C State
[NEW] FeatureName: Thermal management
[NEW] FeatureName: SncInit
[NEW] FeatureName: MbmInit
[NEW] FeatureName: IioLlcWays
[NEW] FeatureName: AcSplitLock
[NEW] FeatureName: CrashDataGprs
:IioLlcWays: Socket = 0
Capid5Csr = 0x6700000B iio_llcconfig_en (Bit[1]) = 1
:IioLlcWays: Socket = 1
Capid5Csr = 0x6700000B iio_llcconfig_en (Bit[1]) = 1
Processor Info: Package: 2, MaxCore : 40, MaxThread: 2
P00: Thread Count = 80
P00 C0000, Thread Count = 2
P00 C0001, Thread Count = 2
P00 C0002, Thread Count = 2
P00 C0003, Thread Count = 2
P00 C0004, Thread Count = 2
P00 C0005, Thread Count = 2
P00 C0006, Thread Count = 2
P00 C0007, Thread Count = 2
P00 C0008, Thread Count = 2
P00 C0009, Thread Count = 2
P00 C0010, Thread Count = 2
P00 C0011, Thread Count = 2
P00 C0012, Thread Count = 2
P00 C0013, Thread Count = 2
P00 C0014, Thread Count = 2
P00 C0015, Thread Count = 2
P00 C0016, Thread Count = 2
P00 C0017, Thread Count = 2
P00 C0018, Thread Count = 2
P00 C0019, Thread Count = 2
P00 C0020, Thread Count = 2
P00 C0021, Thread Count = 2
P00 C0022, Thread Count = 2
P00 C0023, Thread Count = 2
P00 C0024, Thread Count = 2
P00 C0025, Thread Count = 2
P00 C0026, Thread Count = 2
P00 C0027, Thread Count = 2
P00 C0028, Thread Count = 2
P00 C0029, Thread Count = 2
P00 C0030, Thread Count = 2
P00 C0031, Thread Count = 2
P00 C0032, Thread Count = 2
P00 C0033, Thread Count = 2
P00 C0034, Thread Count = 2
P00 C0035, Thread Count = 2
P00 C0036, Thread Count = 2
P00 C0037, Thread Count = 2
P00 C0038, Thread Count = 2
P00 C0039, Thread Count = 2
P01: Thread Count = 80
P01 C0000, Thread Count = 2
P01 C0001, Thread Count = 2
P01 C0002, Thread Count = 2
P01 C0003, Thread Count = 2
P01 C0004, Thread Count = 2
P01 C0005, Thread Count = 2
P01 C0006, Thread Count = 2
P01 C0007, Thread Count = 2
P01 C0008, Thread Count = 2
P01 C0009, Thread Count = 2
P01 C0010, Thread Count = 2
P01 C0011, Thread Count = 2
P01 C0012, Thread Count = 2
P01 C0013, Thread Count = 2
P01 C0014, Thread Count = 2
P01 C0015, Thread Count = 2
P01 C0016, Thread Count = 2
P01 C0017, Thread Count = 2
P01 C0018, Thread Count = 2
P01 C0019, Thread Count = 2
P01 C0020, Thread Count = 2
P01 C0021, Thread Count = 2
P01 C0022, Thread Count = 2
P01 C0023, Thread Count = 2
P01 C0024, Thread Count = 2
P01 C0025, Thread Count = 2
P01 C0026, Thread Count = 2
P01 C0027, Thread Count = 2
P01 C0028, Thread Count = 2
P01 C0029, Thread Count = 2
P01 C0030, Thread Count = 2
P01 C0031, Thread Count = 2
P01 C0032, Thread Count = 2
P01 C0033, Thread Count = 2
P01 C0034, Thread Count = 2
P01 C0035, Thread Count = 2
P01 C0036, Thread Count = 2
P01 C0037, Thread Count = 2
P01 C0038, Thread Count = 2
P01 C0039, Thread Count = 2
Last CPU features list...
[Enable ] FeatureName: AESNI
[Enable ] FeatureName: MWAIT
[Unsupport] FeatureName: ACPI
[Enable ] FeatureName: EIST
[Enable ] FeatureName: FastStrings
[Enable ] FeatureName: VMX
[Unsupport] FeatureName: LMCE
[Disable ] FeatureName: SMX
[Unsupport] FeatureName: Lock Feature Control Register
[Unsupport] FeatureName: Limit CpuId Maximum Value
[Enable ] FeatureName: Machine Check Enable
[Enable ] FeatureName: Machine Check Architect
[Unsupport] FeatureName: MCG_CTL
[Unsupport] FeatureName: Pending Break
[Unsupport] FeatureName: C1E
[Enable ] FeatureName: X2Apic
[Enable ] FeatureName: PPIN
[Unsupport] FeatureName: Proc Trace
[Unsupport] FeatureName: L1 Next Page Prefetcher
[Enable ] FeatureName: DCU Streamer Prefetcher
[Enable ] FeatureName: DCU IP Prefetcher
[Enable ] FeatureName: Mlc Streamer Prefetcher
[Enable ] FeatureName: Mlc Spatial Prefetcher
[Disable ] FeatureName: AMP Prefetcher
[Enable ] FeatureName: Three Strike Counter
[Disable ] FeatureName: DBP-F
[Enable ] FeatureName: Energy Performance Bias
[Enable ] FeatureName: C State
[Enable ] FeatureName: Thermal management
[Enable ] FeatureName: SncInit
[Enable ] FeatureName: MbmInit
[Disable ] FeatureName: IioLlcWays
[Unsupport] FeatureName: AcSplitLock
[Unsupport] FeatureName: CrashDataGprs
PcdCpuFeaturesCapability:
D5 31 60 E9 F1 0D 00 00
Origin PcdCpuFeaturesSetting:
D5 70 60 C5 F0 0D 00 00
Final PcdCpuFeaturesSetting:
D5 30 60 C1 F0 0D 00 00
:SNC: Socket = 0, Processor = 0
SncConfigMsr = 0xA
SncBaseCsr [0x0] = 0xFFF0000
SncBaseCsr [0x1] = 0x1FE00022
SncBaseCsr [0x2] = 0x42
SncBaseCsr [0x3] = 0x62
SncBaseCsr [0x4] = 0x82
SncConfigCsr = 0xF
:MBM: S0 Processor = 0, LlcQosMonEnable = 1
ChasPerCluster = 13, ChaThresholdWithinCluster = 12, CorrectionFactorHi = 123 CorrectionFactorLo = 98
Dump final value for PcdCpuFeaturesSetting:
D5 30 60 C1 F0 0D 00 00
RegisterTable->TableLength = 71
Processor: 0000: Index 0000, MSR : 0000013C, Bit Start: 00, Bit Length: 02, Value: 0000000000000001
Processor: 0000: Index 0001, MSR : 000001A0, Bit Start: 18, Bit Length: 01, Value: 0000000000000001
Processor: 0000: Index 0002, SEMAP: Package
Processor: 0000: Index 0003, MSR : 000001A0, Bit Start: 16, Bit Length: 01, Value: 0000000000000001
Processor: 0000: Index 0004, SEMAP: Package
Processor: 0000: Index 0005, SEMAP: Package
Processor: 0000: Index 0006, MSR : 000001A0, Bit Start: 38, Bit Length: 01, Value: 0000000000000000
Processor: 0000: Index 0007, SEMAP: Package
Processor: 0000: Index 0008, MSR : 00000199, Bit Start: 08, Bit Length: 07, Value: 0000000000000011
Processor: 0000: Index 0009, MSR : 000001A0, Bit Start: 00, Bit Length: 01, Value: 0000000000000001
Processor: 0000: Index 0010, MSR : 0000003A, Bit Start: 02, Bit Length: 01, Value: 0000000000000001
Processor: 0000: Index 0011, CR : 00000004, Bit Start: 14, Bit Length: 01, Value: 0000000000000000
Processor: 0000: Index 0012, MSR : 0000003A, Bit Start: 08, Bit Length: 07, Value: 0000000000000000
Processor: 0000: Index 0013, MSR : 0000003A, Bit Start: 15, Bit Length: 01, Value: 0000000000000000
Processor: 0000: Index 0014, MSR : 0000003A, Bit Start: 01, Bit Length: 01, Value: 0000000000000000
Processor: 0000: Index 0015, CR : 00000004, Bit Start: 06, Bit Length: 01, Value: 0000000000000001
Processor: 0000: Index 0016, MSR : 00000400, Bit Start: 00, Bit Length: 64, Value: FFFFFFFFFFFFFFFF
Processor: 0000: Index 0017, MSR : 00000404, Bit Start: 00, Bit Length: 64, Value: FFFFFFFFFFFFFFFF
Processor: 0000: Index 0018, MSR : 00000408, Bit Start: 00, Bit Length: 64, Value: FFFFFFFFFFFFFFFF
Processor: 0000: Index 0019, MSR : 0000040C, Bit Start: 00, Bit Length: 64, Value: FFFFFFFFFFFFFFFF
Processor: 0000: Index 0020, MSR : 00000410, Bit Start: 00, Bit Length: 64, Value: FFFFFFFFFFFFFFFF
Processor: 0000: Index 0021, MSR : 00000414, Bit Start: 00, Bit Length: 64, Value: FFFFFFFFFFFFFFFF
Processor: 0000: Index 0022, MSR : 00000418, Bit Start: 00, Bit Length: 64, Value: FFFFFFFFFFFFFFFF
Processor: 0000: Index 0023, MSR : 0000041C, Bit Start: 00, Bit Length: 64, Value: FFFFFFFFFFFFFFFF
Processor: 0000: Index 0024, MSR : 00000420, Bit Start: 00, Bit Length: 64, Value: FFFFFFFFFFFFFFFF
Processor: 0000: Index 0025, MSR : 00000424, Bit Start: 00, Bit Length: 64, Value: FFFFFFFFFFFFFFFF
Processor: 0000: Index 0026, MSR : 00000428, Bit Start: 00, Bit Length: 64, Value: FFFFFFFFFFFFFFFF
Processor: 0000: Index 0027, MSR : 0000042C, Bit Start: 00, Bit Length: 64, Value: FFFFFFFFFFFFFFFF
Processor: 0000: Index 0028, MSR : 00000430, Bit Start: 00, Bit Length: 64, Value: FFFFFFFFFFFFFFFF
Processor: 0000: Index 0029, MSR : 00000434, Bit Start: 00, Bit Length: 64, Value: FFFFFFFFFFFFFFFF
Processor: 0000: Index 0030, MSR : 00000438, Bit Start: 00, Bit Length: 64, Value: FFFFFFFFFFFFFFFF
Processor: 0000: Index 0031, MSR : 0000043C, Bit Start: 00, Bit Length: 64, Value: FFFFFFFFFFFFFFFF
Processor: 0000: Index 0032, MSR : 00000440, Bit Start: 00, Bit Length: 64, Value: FFFFFFFFFFFFFFFF
Processor: 0000: Index 0033, MSR : 00000444, Bit Start: 00, Bit Length: 64, Value: FFFFFFFFFFFFFFFF
Processor: 0000: Index 0034, MSR : 00000448, Bit Start: 00, Bit Length: 64, Value: FFFFFFFFFFFFFFFF
Processor: 0000: Index 0035, MSR : 0000044C, Bit Start: 00, Bit Length: 64, Value: FFFFFFFFFFFFFFFF
Processor: 0000: Index 0036, MSR : 00000450, Bit Start: 00, Bit Length: 64, Value: FFFFFFFFFFFFFFFF
Processor: 0000: Index 0037, MSR : 00000454, Bit Start: 00, Bit Length: 64, Value: FFFFFFFFFFFFFFFF
Processor: 0000: Index 0038, MSR : 00000458, Bit Start: 00, Bit Length: 64, Value: FFFFFFFFFFFFFFFF
Processor: 0000: Index 0039, MSR : 0000045C, Bit Start: 00, Bit Length: 64, Value: FFFFFFFFFFFFFFFF
Processor: 0000: Index 0040, MSR : 00000460, Bit Start: 00, Bit Length: 64, Value: FFFFFFFFFFFFFFFF
Processor: 0000: Index 0041, MSR : 00000464, Bit Start: 00, Bit Length: 64, Value: FFFFFFFFFFFFFFFF
Processor: 0000: Index 0042, MSR : 00000468, Bit Start: 00, Bit Length: 64, Value: FFFFFFFFFFFFFFFF
Processor: 0000: Index 0043, MSR : 0000046C, Bit Start: 00, Bit Length: 64, Value: FFFFFFFFFFFFFFFF
Processor: 0000: Index 0044, MSR : 00000470, Bit Start: 00, Bit Length: 64, Value: FFFFFFFFFFFFFFFF
Processor: 0000: Index 0045, MSR : 00000474, Bit Start: 00, Bit Length: 64, Value: FFFFFFFFFFFFFFFF
Processor: 0000: Index 0046, MSR : 00000478, Bit Start: 00, Bit Length: 64, Value: FFFFFFFFFFFFFFFF
Processor: 0000: Index 0047, MSR : 0000047C, Bit Start: 00, Bit Length: 64, Value: FFFFFFFFFFFFFFFF
Processor: 0000: Index 0048, MSR : 0000001B, Bit Start: 10, Bit Length: 01, Value: 0000000000000001
Processor: 0000: Index 0049, MSR : 0000004E, Bit Start: 00, Bit Length: 64, Value: 0000000000000002
Processor: 0000: Index 0050, CACHE: 00000000, Bit Start: 00, Bit Length: 01, Value: 0000000000000000
Processor: 0000: Index 0051, MSR : 000001A4, Bit Start: 05, Bit Length: 01, Value: 0000000000000001
Processor: 0000: Index 0052, CACHE: 00000000, Bit Start: 00, Bit Length: 01, Value: 0000000000000001
Processor: 0000: Index 0053, MSR : 000001A4, Bit Start: 11, Bit Length: 01, Value: 0000000000000000
Processor: 0000: Index 0054, MSR : 0000006D, Bit Start: 02, Bit Length: 02, Value: 0000000000000000
Processor: 0000: Index 0055, MSR : 000001FC, Bit Start: 18, Bit Length: 01, Value: 0000000000000001
Processor: 0000: Index 0056, SEMAP: Package
Processor: 0000: Index 0057, MSR : 000001B0, Bit Start: 00, Bit Length: 04, Value: 0000000000000000
Processor: 0000: Index 0058, MSR : 000000E2, Bit Start: 00, Bit Length: 64, Value: 0000000014000403
Processor: 0000: Index 0059, MSR : 000000E4, Bit Start: 00, Bit Length: 64, Value: 0000000000010514
Processor: 0000: Index 0060, MSR : 000001A0, Bit Start: 03, Bit Length: 01, Value: 0000000000000001
Processor: 0000: Index 0061, MSR : 000001AA, Bit Start: 22, Bit Length: 01, Value: 0000000000000001
Processor: 0000: Index 0062, MSR : 000001A2, Bit Start: 00, Bit Length: 64, Value: 0000000080640800
Processor: 0000: Index 0063, MSR : 00000153, Bit Start: 00, Bit Length: 16, Value: 0000000000000000
Processor: 0000: Index 0064, MSR : 00000154, Bit Start: 00, Bit Length: 16, Value: 0000000000000022
Processor: 0000: Index 0065, MSR : 00000155, Bit Start: 00, Bit Length: 16, Value: 0000000000000042
Processor: 0000: Index 0066, MSR : 00000156, Bit Start: 00, Bit Length: 16, Value: 0000000000000062
Processor: 0000: Index 0067, MSR : 00000157, Bit Start: 00, Bit Length: 16, Value: 0000000000000082
Processor: 0000: Index 0068, MSR : 00000159, Bit Start: 00, Bit Length: 30, Value: 0000000000000000
Processor: 0000: Index 0069, MSR : 00000152, Bit Start: 00, Bit Length: 64, Value: 000000000000000A
Processor: 0000: Index 0070, MSR : 00000CA1, Bit Start: 00, Bit Length: 32, Value: 00000000627B0C0D
Dump final value for PcdCpuFeaturesSetting:
D5 30 60 C1 F0 0D 00 00
:SNC: Socket = 0, Processor = 2
SncConfigMsr = 0xA
SncBaseCsr [0x0] = 0xFFF0000
SncBaseCsr [0x1] = 0x1FE00022
SncBaseCsr [0x2] = 0x42
SncBaseCsr [0x3] = 0x62
SncBaseCsr [0x4] = 0x82
SncConfigCsr = 0xF
Dump final value for PcdCpuFeaturesSetting:
D5 30 60 C1 F0 0D 00 00
Dump final value for PcdCpuFeaturesSetting:
D5 30 60 C1 F0 0D 00 00
:SNC: Socket = 0, Processor = 4
SncConfigMsr = 0xA
SncBaseCsr [0x0] = 0xFFF0000
SncBaseCsr [0x1] = 0x1FE00022
SncBaseCsr [0x2] = 0x42
SncBaseCsr [0x3] = 0x62
SncBaseCsr [0x4] = 0x82
SncConfigCsr = 0xF
Dump final value for PcdCpuFeaturesSetting:
D5 30 60 C1 F0 0D 00 00
Dump final value for PcdCpuFeaturesSetting:
D5 30 60 C1 F0 0D 00 00
:SNC: Socket = 0, Processor = 6
SncConfigMsr = 0xA
SncBaseCsr [0x0] = 0xFFF0000
SncBaseCsr [0x1] = 0x1FE00022
SncBaseCsr [0x2] = 0x42
SncBaseCsr [0x3] = 0x62
SncBaseCsr [0x4] = 0x82
SncConfigCsr = 0xF
Dump final value for PcdCpuFeaturesSetting:
D5 30 60 C1 F0 0D 00 00
Dump final value for PcdCpuFeaturesSetting:
D5 30 60 C1 F0 0D 00 00
:SNC: Socket = 0, Processor = 8
SncConfigMsr = 0xA
SncBaseCsr [0x0] = 0xFFF0000
SncBaseCsr [0x1] = 0x1FE00022
SncBaseCsr [0x2] = 0x42
SncBaseCsr [0x3] = 0x62
SncBaseCsr [0x4] = 0x82
SncConfigCsr = 0xF
Dump final value for PcdCpuFeaturesSetting:
D5 30 60 C1 F0 0D 00 00
Dump final value for PcdCpuFeaturesSetting:
D5 30 60 C1 F0 0D 00 00
:SNC: Socket = 0, Processor = 10
SncConfigMsr = 0xA
SncBaseCsr [0x0] = 0xFFF0000
SncBaseCsr [0x1] = 0x1FE00022
SncBaseCsr [0x2] = 0x42
SncBaseCsr [0x3] = 0x62
SncBaseCsr [0x4] = 0x82
SncConfigCsr = 0xF
Dump final value for PcdCpuFeaturesSetting:
D5 30 60 C1 F0 0D 00 00
Dump final value for PcdCpuFeaturesSetting:
D5 30 60 C1 F0 0D 00 00
:SNC: Socket = 0, Processor = 12
SncConfigMsr = 0xA
SncBaseCsr [0x0] = 0xFFF0000
SncBaseCsr [0x1] = 0x1FE00022
SncBaseCsr [0x2] = 0x42
SncBaseCsr [0x3] = 0x62
SncBaseCsr [0x4] = 0x82
SncConfigCsr = 0xF
Dump final value for PcdCpuFeaturesSetting:
D5 30 60 C1 F0 0D 00 00
Dump final value for PcdCpuFeaturesSetting:
D5 30 60 C1 F0 0D 00 00
:SNC: Socket = 0, Processor = 14
SncConfigMsr = 0xA
SncBaseCsr [0x0] = 0xFFF0000
SncBaseCsr [0x1] = 0x1FE00022
SncBaseCsr [0x2] = 0x42
SncBaseCsr [0x3] = 0x62
SncBaseCsr [0x4] = 0x82
SncConfigCsr = 0xF
Dump final value for PcdCpuFeaturesSetting:
D5 30 60 C1 F0 0D 00 00
Dump final value for PcdCpuFeaturesSetting:
D5 30 60 C1 F0 0D 00 00
:SNC: Socket = 0, Processor = 16
SncConfigMsr = 0xA
SncBaseCsr [0x0] = 0xFFF0000
SncBaseCsr [0x1] = 0x1FE00022
SncBaseCsr [0x2] = 0x42
SncBaseCsr [0x3] = 0x62
SncBaseCsr [0x4] = 0x82
SncConfigCsr = 0xF
Dump final value for PcdCpuFeaturesSetting:
D5 30 60 C1 F0 0D 00 00
Dump final value for PcdCpuFeaturesSetting:
D5 30 60 C1 F0 0D 00 00
:SNC: Socket = 0, Processor = 18
SncConfigMsr = 0xA
SncBaseCsr [0x0] = 0xFFF0000
SncBaseCsr [0x1] = 0x1FE00022
SncBaseCsr [0x2] = 0x42
SncBaseCsr [0x3] = 0x62
SncBaseCsr [0x4] = 0x82
SncConfigCsr = 0xF
Dump final value for PcdCpuFeaturesSetting:
D5 30 60 C1 F0 0D 00 00
Dump final value for PcdCpuFeaturesSetting:
D5 30 60 C1 F0 0D 00 00
:SNC: Socket = 0, Processor = 20
SncConfigMsr = 0xA
SncBaseCsr [0x0] = 0xFFF0000
SncBaseCsr [0x1] = 0x1FE00022
SncBaseCsr [0x2] = 0x42
SncBaseCsr [0x3] = 0x62
SncBaseCsr [0x4] = 0x82
SncConfigCsr = 0xF
Dump final value for PcdCpuFeaturesSetting:
D5 30 60 C1 F0 0D 00 00
Dump final value for PcdCpuFeaturesSetting:
D5 30 60 C1 F0 0D 00 00
:SNC: Socket = 0, Processor = 22
SncConfigMsr = 0xA
SncBaseCsr [0x0] = 0xFFF0000
SncBaseCsr [0x1] = 0x1FE00022
SncBaseCsr [0x2] = 0x42
SncBaseCsr [0x3] = 0x62
SncBaseCsr [0x4] = 0x82
SncConfigCsr = 0xF
Dump final value for PcdCpuFeaturesSetting:
D5 30 60 C1 F0 0D 00 00
Dump final value for PcdCpuFeaturesSetting:
D5 30 60 C1 F0 0D 00 00
:SNC: Socket = 0, Processor = 24
SncConfigMsr = 0xA
SncBaseCsr [0x0] = 0xFFF0000
SncBaseCsr [0x1] = 0x1FE00022
SncBaseCsr [0x2] = 0x42
SncBaseCsr [0x3] = 0x62
SncBaseCsr [0x4] = 0x82
SncConfigCsr = 0xF
Dump final value for PcdCpuFeaturesSetting:
D5 30 60 C1 F0 0D 00 00
Dump final value for PcdCpuFeaturesSetting:
D5 30 60 C1 F0 0D 00 00
:SNC: Socket = 0, Processor = 26
SncConfigMsr = 0xA
SncBaseCsr [0x0] = 0xFFF0000
SncBaseCsr [0x1] = 0x1FE00022
SncBaseCsr [0x2] = 0x42
SncBaseCsr [0x3] = 0x62
SncBaseCsr [0x4] = 0x82
SncConfigCsr = 0xF
Dump final value for PcdCpuFeaturesSetting:
D5 30 60 C1 F0 0D 00 00
Dump final value for PcdCpuFeaturesSetting:
D5 30 60 C1 F0 0D 00 00
:SNC: Socket = 0, Processor = 28
SncConfigMsr = 0xA
SncBaseCsr [0x0] = 0xFFF0000
SncBaseCsr [0x1] = 0x1FE00022
SncBaseCsr [0x2] = 0x42
SncBaseCsr [0x3] = 0x62
SncBaseCsr [0x4] = 0x82
SncConfigCsr = 0xF
Dump final value for PcdCpuFeaturesSetting:
D5 30 60 C1 F0 0D 00 00
Dump final value for PcdCpuFeaturesSetting:
D5 30 60 C1 F0 0D 00 00
:SNC: Socket = 0, Processor = 30
SncConfigMsr = 0xA
SncBaseCsr [0x0] = 0xFFF0000
SncBaseCsr [0x1] = 0x1FE00022
SncBaseCsr [0x2] = 0x42
SncBaseCsr [0x3] = 0x62
SncBaseCsr [0x4] = 0x82
SncConfigCsr = 0xF
Dump final value for PcdCpuFeaturesSetting:
D5 30 60 C1 F0 0D 00 00
Dump final value for PcdCpuFeaturesSetting:
D5 30 60 C1 F0 0D 00 00
:SNC: Socket = 0, Processor = 32
SncConfigMsr = 0xA
SncBaseCsr [0x0] = 0xFFF0000
SncBaseCsr [0x1] = 0x1FE00022
SncBaseCsr [0x2] = 0x42
SncBaseCsr [0x3] = 0x62
SncBaseCsr [0x4] = 0x82
SncConfigCsr = 0xF
Dump final value for PcdCpuFeaturesSetting:
D5 30 60 C1 F0 0D 00 00
Dump final value for PcdCpuFeaturesSetting:
D5 30 60 C1 F0 0D 00 00
:SNC: Socket = 0, Processor = 34
SncConfigMsr = 0xA
SncBaseCsr [0x0] = 0xFFF0000
SncBaseCsr [0x1] = 0x1FE00022
SncBaseCsr [0x2] = 0x42
SncBaseCsr [0x3] = 0x62
SncBaseCsr [0x4] = 0x82
SncConfigCsr = 0xF
Dump final value for PcdCpuFeaturesSetting:
D5 30 60 C1 F0 0D 00 00
Dump final value for PcdCpuFeaturesSetting:
D5 30 60 C1 F0 0D 00 00
:SNC: Socket = 0, Processor = 36
SncConfigMsr = 0xA
SncBaseCsr [0x0] = 0xFFF0000
SncBaseCsr [0x1] = 0x1FE00022
SncBaseCsr [0x2] = 0x42
SncBaseCsr [0x3] = 0x62
SncBaseCsr [0x4] = 0x82
SncConfigCsr = 0xF
Dump final value for PcdCpuFeaturesSetting:
D5 30 60 C1 F0 0D 00 00
Dump final value for PcdCpuFeaturesSetting:
D5 30 60 C1 F0 0D 00 00
:SNC: Socket = 0, Processor = 38
SncConfigMsr = 0xA
SncBaseCsr [0x0] = 0xFFF0000
SncBaseCsr [0x1] = 0x1FE00022
SncBaseCsr [0x2] = 0x42
SncBaseCsr [0x3] = 0x62
SncBaseCsr [0x4] = 0x82
SncConfigCsr = 0xF
Dump final value for PcdCpuFeaturesSetting:
D5 30 60 C1 F0 0D 00 00
Dump final value for PcdCpuFeaturesSetting:
D5 30 60 C1 F0 0D 00 00
:SNC: Socket = 0, Processor = 40
SncConfigMsr = 0xA
SncBaseCsr [0x0] = 0xFFF0000
SncBaseCsr [0x1] = 0x1FE00022
SncBaseCsr [0x2] = 0x42
SncBaseCsr [0x3] = 0x62
SncBaseCsr [0x4] = 0x82
SncConfigCsr = 0xF
Dump final value for PcdCpuFeaturesSetting:
D5 30 60 C1 F0 0D 00 00
Dump final value for PcdCpuFeaturesSetting:
D5 30 60 C1 F0 0D 00 00
:SNC: Socket = 0, Processor = 42
SncConfigMsr = 0xA
SncBaseCsr [0x0] = 0xFFF0000
SncBaseCsr [0x1] = 0x1FE00022
SncBaseCsr [0x2] = 0x42
SncBaseCsr [0x3] = 0x62
SncBaseCsr [0x4] = 0x82
SncConfigCsr = 0xF
Dump final value for PcdCpuFeaturesSetting:
D5 30 60 C1 F0 0D 00 00
Dump final value for PcdCpuFeaturesSetting:
D5 30 60 C1 F0 0D 00 00
:SNC: Socket = 0, Processor = 44
SncConfigMsr = 0xA
SncBaseCsr [0x0] = 0xFFF0000
SncBaseCsr [0x1] = 0x1FE00022
SncBaseCsr [0x2] = 0x42
SncBaseCsr [0x3] = 0x62
SncBaseCsr [0x4] = 0x82
SncConfigCsr = 0xF
Dump final value for PcdCpuFeaturesSetting:
D5 30 60 C1 F0 0D 00 00
Dump final value for PcdCpuFeaturesSetting:
D5 30 60 C1 F0 0D 00 00
:SNC: Socket = 0, Processor = 46
SncConfigMsr = 0xA
SncBaseCsr [0x0] = 0xFFF0000
SncBaseCsr [0x1] = 0x1FE00022
SncBaseCsr [0x2] = 0x42
SncBaseCsr [0x3] = 0x62
SncBaseCsr [0x4] = 0x82
SncConfigCsr = 0xF
Dump final value for PcdCpuFeaturesSetting:
D5 30 60 C1 F0 0D 00 00
Dump final value for PcdCpuFeaturesSetting:
D5 30 60 C1 F0 0D 00 00
:SNC: Socket = 0, Processor = 48
SncConfigMsr = 0xA
SncBaseCsr [0x0] = 0xFFF0000
SncBaseCsr [0x1] = 0x1FE00022
SncBaseCsr [0x2] = 0x42
SncBaseCsr [0x3] = 0x62
SncBaseCsr [0x4] = 0x82
SncConfigCsr = 0xF
Dump final value for PcdCpuFeaturesSetting:
D5 30 60 C1 F0 0D 00 00
Dump final value for PcdCpuFeaturesSetting:
D5 30 60 C1 F0 0D 00 00
:SNC: Socket = 0, Processor = 50
SncConfigMsr = 0xA
SncBaseCsr [0x0] = 0xFFF0000
SncBaseCsr [0x1] = 0x1FE00022
SncBaseCsr [0x2] = 0x42
SncBaseCsr [0x3] = 0x62
SncBaseCsr [0x4] = 0x82
SncConfigCsr = 0xF
Dump final value for PcdCpuFeaturesSetting:
D5 30 60 C1 F0 0D 00 00
Dump final value for PcdCpuFeaturesSetting:
D5 30 60 C1 F0 0D 00 00
:SNC: Socket = 0, Processor = 52
SncConfigMsr = 0xA
SncBaseCsr [0x0] = 0xFFF0000
SncBaseCsr [0x1] = 0x1FE00022
SncBaseCsr [0x2] = 0x42
SncBaseCsr [0x3] = 0x62
SncBaseCsr [0x4] = 0x82
SncConfigCsr = 0xF
Dump final value for PcdCpuFeaturesSetting:
D5 30 60 C1 F0 0D 00 00
Dump final value for PcdCpuFeaturesSetting:
D5 30 60 C1 F0 0D 00 00
:SNC: Socket = 0, Processor = 54
SncConfigMsr = 0xA
SncBaseCsr [0x0] = 0xFFF0000
SncBaseCsr [0x1] = 0x1FE00022
SncBaseCsr [0x2] = 0x42
SncBaseCsr [0x3] = 0x62
SncBaseCsr [0x4] = 0x82
SncConfigCsr = 0xF
Dump final value for PcdCpuFeaturesSetting:
D5 30 60 C1 F0 0D 00 00
Dump final value for PcdCpuFeaturesSetting:
D5 30 60 C1 F0 0D 00 00
:SNC: Socket = 0, Processor = 56
SncConfigMsr = 0xA
SncBaseCsr [0x0] = 0xFFF0000
SncBaseCsr [0x1] = 0x1FE00022
SncBaseCsr [0x2] = 0x42
SncBaseCsr [0x3] = 0x62
SncBaseCsr [0x4] = 0x82
SncConfigCsr = 0xF
Dump final value for PcdCpuFeaturesSetting:
D5 30 60 C1 F0 0D 00 00
Dump final value for PcdCpuFeaturesSetting:
D5 30 60 C1 F0 0D 00 00
:SNC: Socket = 0, Processor = 58
SncConfigMsr = 0xA
SncBaseCsr [0x0] = 0xFFF0000
SncBaseCsr [0x1] = 0x1FE00022
SncBaseCsr [0x2] = 0x42
SncBaseCsr [0x3] = 0x62
SncBaseCsr [0x4] = 0x82
SncConfigCsr = 0xF
Dump final value for PcdCpuFeaturesSetting:
D5 30 60 C1 F0 0D 00 00
Dump final value for PcdCpuFeaturesSetting:
D5 30 60 C1 F0 0D 00 00
:SNC: Socket = 0, Processor = 60
SncConfigMsr = 0xA
SncBaseCsr [0x0] = 0xFFF0000
SncBaseCsr [0x1] = 0x1FE00022
SncBaseCsr [0x2] = 0x42
SncBaseCsr [0x3] = 0x62
SncBaseCsr [0x4] = 0x82
SncConfigCsr = 0xF
Dump final value for PcdCpuFeaturesSetting:
D5 30 60 C1 F0 0D 00 00
Dump final value for PcdCpuFeaturesSetting:
D5 30 60 C1 F0 0D 00 00
:SNC: Socket = 0, Processor = 62
SncConfigMsr = 0xA
SncBaseCsr [0x0] = 0xFFF0000
SncBaseCsr [0x1] = 0x1FE00022
SncBaseCsr [0x2] = 0x42
SncBaseCsr [0x3] = 0x62
SncBaseCsr [0x4] = 0x82
SncConfigCsr = 0xF
Dump final value for PcdCpuFeaturesSetting:
D5 30 60 C1 F0 0D 00 00
Dump final value for PcdCpuFeaturesSetting:
D5 30 60 C1 F0 0D 00 00
:SNC: Socket = 0, Processor = 64
SncConfigMsr = 0xA
SncBaseCsr [0x0] = 0xFFF0000
SncBaseCsr [0x1] = 0x1FE00022
SncBaseCsr [0x2] = 0x42
SncBaseCsr [0x3] = 0x62
SncBaseCsr [0x4] = 0x82
SncConfigCsr = 0xF
Dump final value for PcdCpuFeaturesSetting:
D5 30 60 C1 F0 0D 00 00
Dump final value for PcdCpuFeaturesSetting:
D5 30 60 C1 F0 0D 00 00
:SNC: Socket = 0, Processor = 66
SncConfigMsr = 0xA
SncBaseCsr [0x0] = 0xFFF0000
SncBaseCsr [0x1] = 0x1FE00022
SncBaseCsr [0x2] = 0x42
SncBaseCsr [0x3] = 0x62
SncBaseCsr [0x4] = 0x82
SncConfigCsr = 0xF
Dump final value for PcdCpuFeaturesSetting:
D5 30 60 C1 F0 0D 00 00
Dump final value for PcdCpuFeaturesSetting:
D5 30 60 C1 F0 0D 00 00
:SNC: Socket = 0, Processor = 68
SncConfigMsr = 0xA
SncBaseCsr [0x0] = 0xFFF0000
SncBaseCsr [0x1] = 0x1FE00022
SncBaseCsr [0x2] = 0x42
SncBaseCsr [0x3] = 0x62
SncBaseCsr [0x4] = 0x82
SncConfigCsr = 0xF
Dump final value for PcdCpuFeaturesSetting:
D5 30 60 C1 F0 0D 00 00
Dump final value for PcdCpuFeaturesSetting:
D5 30 60 C1 F0 0D 00 00
:SNC: Socket = 0, Processor = 70
SncConfigMsr = 0xA
SncBaseCsr [0x0] = 0xFFF0000
SncBaseCsr [0x1] = 0x1FE00022
SncBaseCsr [0x2] = 0x42
SncBaseCsr [0x3] = 0x62
SncBaseCsr [0x4] = 0x82
SncConfigCsr = 0xF
Dump final value for PcdCpuFeaturesSetting:
D5 30 60 C1 F0 0D 00 00
Dump final value for PcdCpuFeaturesSetting:
D5 30 60 C1 F0 0D 00 00
:SNC: Socket = 0, Processor = 72
SncConfigMsr = 0xA
SncBaseCsr [0x0] = 0xFFF0000
SncBaseCsr [0x1] = 0x1FE00022
SncBaseCsr [0x2] = 0x42
SncBaseCsr [0x3] = 0x62
SncBaseCsr [0x4] = 0x82
SncConfigCsr = 0xF
Dump final value for PcdCpuFeaturesSetting:
D5 30 60 C1 F0 0D 00 00
Dump final value for PcdCpuFeaturesSetting:
D5 30 60 C1 F0 0D 00 00
:SNC: Socket = 0, Processor = 74
SncConfigMsr = 0xA
SncBaseCsr [0x0] = 0xFFF0000
SncBaseCsr [0x1] = 0x1FE00022
SncBaseCsr [0x2] = 0x42
SncBaseCsr [0x3] = 0x62
SncBaseCsr [0x4] = 0x82
SncConfigCsr = 0xF
Dump final value for PcdCpuFeaturesSetting:
D5 30 60 C1 F0 0D 00 00
Dump final value for PcdCpuFeaturesSetting:
D5 30 60 C1 F0 0D 00 00
:SNC: Socket = 0, Processor = 76
SncConfigMsr = 0xA
SncBaseCsr [0x0] = 0xFFF0000
SncBaseCsr [0x1] = 0x1FE00022
SncBaseCsr [0x2] = 0x42
SncBaseCsr [0x3] = 0x62
SncBaseCsr [0x4] = 0x82
SncConfigCsr = 0xF
Dump final value for PcdCpuFeaturesSetting:
D5 30 60 C1 F0 0D 00 00
Dump final value for PcdCpuFeaturesSetting:
D5 30 60 C1 F0 0D 00 00
:SNC: Socket = 0, Processor = 78
SncConfigMsr = 0xA
SncBaseCsr [0x0] = 0xFFF0000
SncBaseCsr [0x1] = 0x1FE00022
SncBaseCsr [0x2] = 0x42
SncBaseCsr [0x3] = 0x62
SncBaseCsr [0x4] = 0x82
SncConfigCsr = 0xF
Dump final value for PcdCpuFeaturesSetting:
D5 30 60 C1 F0 0D 00 00
Dump final value for PcdCpuFeaturesSetting:
D5 30 60 C1 F0 0D 00 00
:SNC: Socket = 1, Processor = 80
SncConfigMsr = 0xA
SncBaseCsr [0x0] = 0xFFF0082
SncBaseCsr [0x1] = 0x1FE000A2
SncBaseCsr [0x2] = 0xC2
SncBaseCsr [0x3] = 0xE2
SncBaseCsr [0x4] = 0x102
SncConfigCsr = 0xF
:MBM: S1 Processor = 80, LlcQosMonEnable = 1
ChasPerCluster = 13, ChaThresholdWithinCluster = 12, CorrectionFactorHi = 123 CorrectionFactorLo = 98
Dump final value for PcdCpuFeaturesSetting:
D5 30 60 C1 F0 0D 00 00
Dump final value for PcdCpuFeaturesSetting:
D5 30 60 C1 F0 0D 00 00
:SNC: Socket = 1, Processor = 82
SncConfigMsr = 0xA
SncBaseCsr [0x0] = 0xFFF0082
SncBaseCsr [0x1] = 0x1FE000A2
SncBaseCsr [0x2] = 0xC2
SncBaseCsr [0x3] = 0xE2
SncBaseCsr [0x4] = 0x102
SncConfigCsr = 0xF
Dump final value for PcdCpuFeaturesSetting:
D5 30 60 C1 F0 0D 00 00
Dump final value for PcdCpuFeaturesSetting:
D5 30 60 C1 F0 0D 00 00
:SNC: Socket = 1, Processor = 84
SncConfigMsr = 0xA
SncBaseCsr [0x0] = 0xFFF0082
SncBaseCsr [0x1] = 0x1FE000A2
SncBaseCsr [0x2] = 0xC2
SncBaseCsr [0x3] = 0xE2
SncBaseCsr [0x4] = 0x102
SncConfigCsr = 0xF
Dump final value for PcdCpuFeaturesSetting:
D5 30 60 C1 F0 0D 00 00
Dump final value for PcdCpuFeaturesSetting:
D5 30 60 C1 F0 0D 00 00
:SNC: Socket = 1, Processor = 86
SncConfigMsr = 0xA
SncBaseCsr [0x0] = 0xFFF0082
SncBaseCsr [0x1] = 0x1FE000A2
SncBaseCsr [0x2] = 0xC2
SncBaseCsr [0x3] = 0xE2
SncBaseCsr [0x4] = 0x102
SncConfigCsr = 0xF
Dump final value for PcdCpuFeaturesSetting:
D5 30 60 C1 F0 0D 00 00
Dump final value for PcdCpuFeaturesSetting:
D5 30 60 C1 F0 0D 00 00
:SNC: Socket = 1, Processor = 88
SncConfigMsr = 0xA
SncBaseCsr [0x0] = 0xFFF0082
SncBaseCsr [0x1] = 0x1FE000A2
SncBaseCsr [0x2] = 0xC2
SncBaseCsr [0x3] = 0xE2
SncBaseCsr [0x4] = 0x102
SncConfigCsr = 0xF
Dump final value for PcdCpuFeaturesSetting:
D5 30 60 C1 F0 0D 00 00
Dump final value for PcdCpuFeaturesSetting:
D5 30 60 C1 F0 0D 00 00
:SNC: Socket = 1, Processor = 90
SncConfigMsr = 0xA
SncBaseCsr [0x0] = 0xFFF0082
SncBaseCsr [0x1] = 0x1FE000A2
SncBaseCsr [0x2] = 0xC2
SncBaseCsr [0x3] = 0xE2
SncBaseCsr [0x4] = 0x102
SncConfigCsr = 0xF
Dump final value for PcdCpuFeaturesSetting:
D5 30 60 C1 F0 0D 00 00
Dump final value for PcdCpuFeaturesSetting:
D5 30 60 C1 F0 0D 00 00
:SNC: Socket = 1, Processor = 92
SncConfigMsr = 0xA
SncBaseCsr [0x0] = 0xFFF0082
SncBaseCsr [0x1] = 0x1FE000A2
SncBaseCsr [0x2] = 0xC2
SncBaseCsr [0x3] = 0xE2
SncBaseCsr [0x4] = 0x102
SncConfigCsr = 0xF
Dump final value for PcdCpuFeaturesSetting:
D5 30 60 C1 F0 0D 00 00
Dump final value for PcdCpuFeaturesSetting:
D5 30 60 C1 F0 0D 00 00
:SNC: Socket = 1, Processor = 94
SncConfigMsr = 0xA
SncBaseCsr [0x0] = 0xFFF0082
SncBaseCsr [0x1] = 0x1FE000A2
SncBaseCsr [0x2] = 0xC2
SncBaseCsr [0x3] = 0xE2
SncBaseCsr [0x4] = 0x102
SncConfigCsr = 0xF
Dump final value for PcdCpuFeaturesSetting:
D5 30 60 C1 F0 0D 00 00
Dump final value for PcdCpuFeaturesSetting:
D5 30 60 C1 F0 0D 00 00
:SNC: Socket = 1, Processor = 96
SncConfigMsr = 0xA
SncBaseCsr [0x0] = 0xFFF0082
SncBaseCsr [0x1] = 0x1FE000A2
SncBaseCsr [0x2] = 0xC2
SncBaseCsr [0x3] = 0xE2
SncBaseCsr [0x4] = 0x102
SncConfigCsr = 0xF
Dump final value for PcdCpuFeaturesSetting:
D5 30 60 C1 F0 0D 00 00
Dump final value for PcdCpuFeaturesSetting:
D5 30 60 C1 F0 0D 00 00
:SNC: Socket = 1, Processor = 98
SncConfigMsr = 0xA
SncBaseCsr [0x0] = 0xFFF0082
SncBaseCsr [0x1] = 0x1FE000A2
SncBaseCsr [0x2] = 0xC2
SncBaseCsr [0x3] = 0xE2
SncBaseCsr [0x4] = 0x102
SncConfigCsr = 0xF
Dump final value for PcdCpuFeaturesSetting:
D5 30 60 C1 F0 0D 00 00
Dump final value for PcdCpuFeaturesSetting:
D5 30 60 C1 F0 0D 00 00
:SNC: Socket = 1, Processor = 100
SncConfigMsr = 0xA
SncBaseCsr [0x0] = 0xFFF0082
SncBaseCsr [0x1] = 0x1FE000A2
SncBaseCsr [0x2] = 0xC2
SncBaseCsr [0x3] = 0xE2
SncBaseCsr [0x4] = 0x102
SncConfigCsr = 0xF
Dump final value for PcdCpuFeaturesSetting:
D5 30 60 C1 F0 0D 00 00
Dump final value for PcdCpuFeaturesSetting:
D5 30 60 C1 F0 0D 00 00
:SNC: Socket = 1, Processor = 102
SncConfigMsr = 0xA
SncBaseCsr [0x0] = 0xFFF0082
SncBaseCsr [0x1] = 0x1FE000A2
SncBaseCsr [0x2] = 0xC2
SncBaseCsr [0x3] = 0xE2
SncBaseCsr [0x4] = 0x102
SncConfigCsr = 0xF
Dump final value for PcdCpuFeaturesSetting:
D5 30 60 C1 F0 0D 00 00
Dump final value for PcdCpuFeaturesSetting:
D5 30 60 C1 F0 0D 00 00
:SNC: Socket = 1, Processor = 104
SncConfigMsr = 0xA
SncBaseCsr [0x0] = 0xFFF0082
SncBaseCsr [0x1] = 0x1FE000A2
SncBaseCsr [0x2] = 0xC2
SncBaseCsr [0x3] = 0xE2
SncBaseCsr [0x4] = 0x102
SncConfigCsr = 0xF
Dump final value for PcdCpuFeaturesSetting:
D5 30 60 C1 F0 0D 00 00
Dump final value for PcdCpuFeaturesSetting:
D5 30 60 C1 F0 0D 00 00
:SNC: Socket = 1, Processor = 106
SncConfigMsr = 0xA
SncBaseCsr [0x0] = 0xFFF0082
SncBaseCsr [0x1] = 0x1FE000A2
SncBaseCsr [0x2] = 0xC2
SncBaseCsr [0x3] = 0xE2
SncBaseCsr [0x4] = 0x102
SncConfigCsr = 0xF
Dump final value for PcdCpuFeaturesSetting:
D5 30 60 C1 F0 0D 00 00
Dump final value for PcdCpuFeaturesSetting:
D5 30 60 C1 F0 0D 00 00
:SNC: Socket = 1, Processor = 108
SncConfigMsr = 0xA
SncBaseCsr [0x0] = 0xFFF0082
SncBaseCsr [0x1] = 0x1FE000A2
SncBaseCsr [0x2] = 0xC2
SncBaseCsr [0x3] = 0xE2
SncBaseCsr [0x4] = 0x102
SncConfigCsr = 0xF
Dump final value for PcdCpuFeaturesSetting:
D5 30 60 C1 F0 0D 00 00
Dump final value for PcdCpuFeaturesSetting:
D5 30 60 C1 F0 0D 00 00
:SNC: Socket = 1, Processor = 110
SncConfigMsr = 0xA
SncBaseCsr [0x0] = 0xFFF0082
SncBaseCsr [0x1] = 0x1FE000A2
SncBaseCsr [0x2] = 0xC2
SncBaseCsr [0x3] = 0xE2
SncBaseCsr [0x4] = 0x102
SncConfigCsr = 0xF
Dump final value for PcdCpuFeaturesSetting:
D5 30 60 C1 F0 0D 00 00
Dump final value for PcdCpuFeaturesSetting:
D5 30 60 C1 F0 0D 00 00
:SNC: Socket = 1, Processor = 112
SncConfigMsr = 0xA
SncBaseCsr [0x0] = 0xFFF0082
SncBaseCsr [0x1] = 0x1FE000A2
SncBaseCsr [0x2] = 0xC2
SncBaseCsr [0x3] = 0xE2
SncBaseCsr [0x4] = 0x102
SncConfigCsr = 0xF
Dump final value for PcdCpuFeaturesSetting:
D5 30 60 C1 F0 0D 00 00
Dump final value for PcdCpuFeaturesSetting:
D5 30 60 C1 F0 0D 00 00
:SNC: Socket = 1, Processor = 114
SncConfigMsr = 0xA
SncBaseCsr [0x0] = 0xFFF0082
SncBaseCsr [0x1] = 0x1FE000A2
SncBaseCsr [0x2] = 0xC2
SncBaseCsr [0x3] = 0xE2
SncBaseCsr [0x4] = 0x102
SncConfigCsr = 0xF
Dump final value for PcdCpuFeaturesSetting:
D5 30 60 C1 F0 0D 00 00
Dump final value for PcdCpuFeaturesSetting:
D5 30 60 C1 F0 0D 00 00
:SNC: Socket = 1, Processor = 116
SncConfigMsr = 0xA
SncBaseCsr [0x0] = 0xFFF0082
SncBaseCsr [0x1] = 0x1FE000A2
SncBaseCsr [0x2] = 0xC2
SncBaseCsr [0x3] = 0xE2
SncBaseCsr [0x4] = 0x102
SncConfigCsr = 0xF
Dump final value for PcdCpuFeaturesSetting:
D5 30 60 C1 F0 0D 00 00
Dump final value for PcdCpuFeaturesSetting:
D5 30 60 C1 F0 0D 00 00
:SNC: Socket = 1, Processor = 118
SncConfigMsr = 0xA
SncBaseCsr [0x0] = 0xFFF0082
SncBaseCsr [0x1] = 0x1FE000A2
SncBaseCsr [0x2] = 0xC2
SncBaseCsr [0x3] = 0xE2
SncBaseCsr [0x4] = 0x102
SncConfigCsr = 0xF
Dump final value for PcdCpuFeaturesSetting:
D5 30 60 C1 F0 0D 00 00
Dump final value for PcdCpuFeaturesSetting:
D5 30 60 C1 F0 0D 00 00
:SNC: Socket = 1, Processor = 120
SncConfigMsr = 0xA
SncBaseCsr [0x0] = 0xFFF0082
SncBaseCsr [0x1] = 0x1FE000A2
SncBaseCsr [0x2] = 0xC2
SncBaseCsr [0x3] = 0xE2
SncBaseCsr [0x4] = 0x102
SncConfigCsr = 0xF
Dump final value for PcdCpuFeaturesSetting:
D5 30 60 C1 F0 0D 00 00
Dump final value for PcdCpuFeaturesSetting:
D5 30 60 C1 F0 0D 00 00
:SNC: Socket = 1, Processor = 122
SncConfigMsr = 0xA
SncBaseCsr [0x0] = 0xFFF0082
SncBaseCsr [0x1] = 0x1FE000A2
SncBaseCsr [0x2] = 0xC2
SncBaseCsr [0x3] = 0xE2
SncBaseCsr [0x4] = 0x102
SncConfigCsr = 0xF
Dump final value for PcdCpuFeaturesSetting:
D5 30 60 C1 F0 0D 00 00
Dump final value for PcdCpuFeaturesSetting:
D5 30 60 C1 F0 0D 00 00
:SNC: Socket = 1, Processor = 124
SncConfigMsr = 0xA
SncBaseCsr [0x0] = 0xFFF0082
SncBaseCsr [0x1] = 0x1FE000A2
SncBaseCsr [0x2] = 0xC2
SncBaseCsr [0x3] = 0xE2
SncBaseCsr [0x4] = 0x102
SncConfigCsr = 0xF
Dump final value for PcdCpuFeaturesSetting:
D5 30 60 C1 F0 0D 00 00
Dump final value for PcdCpuFeaturesSetting:
D5 30 60 C1 F0 0D 00 00
:SNC: Socket = 1, Processor = 126
SncConfigMsr = 0xA
SncBaseCsr [0x0] = 0xFFF0082
SncBaseCsr [0x1] = 0x1FE000A2
SncBaseCsr [0x2] = 0xC2
SncBaseCsr [0x3] = 0xE2
SncBaseCsr [0x4] = 0x102
SncConfigCsr = 0xF
Dump final value for PcdCpuFeaturesSetting:
D5 30 60 C1 F0 0D 00 00
Dump final value for PcdCpuFeaturesSetting:
D5 30 60 C1 F0 0D 00 00
:SNC: Socket = 1, Processor = 128
SncConfigMsr = 0xA
SncBaseCsr [0x0] = 0xFFF0082
SncBaseCsr [0x1] = 0x1FE000A2
SncBaseCsr [0x2] = 0xC2
SncBaseCsr [0x3] = 0xE2
SncBaseCsr [0x4] = 0x102
SncConfigCsr = 0xF
Dump final value for PcdCpuFeaturesSetting:
D5 30 60 C1 F0 0D 00 00
Dump final value for PcdCpuFeaturesSetting:
D5 30 60 C1 F0 0D 00 00
:SNC: Socket = 1, Processor = 130
SncConfigMsr = 0xA
SncBaseCsr [0x0] = 0xFFF0082
SncBaseCsr [0x1] = 0x1FE000A2
SncBaseCsr [0x2] = 0xC2
SncBaseCsr [0x3] = 0xE2
SncBaseCsr [0x4] = 0x102
SncConfigCsr = 0xF
Dump final value for PcdCpuFeaturesSetting:
D5 30 60 C1 F0 0D 00 00
Dump final value for PcdCpuFeaturesSetting:
D5 30 60 C1 F0 0D 00 00
:SNC: Socket = 1, Processor = 132
SncConfigMsr = 0xA
SncBaseCsr [0x0] = 0xFFF0082
SncBaseCsr [0x1] = 0x1FE000A2
SncBaseCsr [0x2] = 0xC2
SncBaseCsr [0x3] = 0xE2
SncBaseCsr [0x4] = 0x102
SncConfigCsr = 0xF
Dump final value for PcdCpuFeaturesSetting:
D5 30 60 C1 F0 0D 00 00
Dump final value for PcdCpuFeaturesSetting:
D5 30 60 C1 F0 0D 00 00
:SNC: Socket = 1, Processor = 134
SncConfigMsr = 0xA
SncBaseCsr [0x0] = 0xFFF0082
SncBaseCsr [0x1] = 0x1FE000A2
SncBaseCsr [0x2] = 0xC2
SncBaseCsr [0x3] = 0xE2
SncBaseCsr [0x4] = 0x102
SncConfigCsr = 0xF
Dump final value for PcdCpuFeaturesSetting:
D5 30 60 C1 F0 0D 00 00
Dump final value for PcdCpuFeaturesSetting:
D5 30 60 C1 F0 0D 00 00
:SNC: Socket = 1, Processor = 136
SncConfigMsr = 0xA
SncBaseCsr [0x0] = 0xFFF0082
SncBaseCsr [0x1] = 0x1FE000A2
SncBaseCsr [0x2] = 0xC2
SncBaseCsr [0x3] = 0xE2
SncBaseCsr [0x4] = 0x102
SncConfigCsr = 0xF
Dump final value for PcdCpuFeaturesSetting:
D5 30 60 C1 F0 0D 00 00
Dump final value for PcdCpuFeaturesSetting:
D5 30 60 C1 F0 0D 00 00
:SNC: Socket = 1, Processor = 138
SncConfigMsr = 0xA
SncBaseCsr [0x0] = 0xFFF0082
SncBaseCsr [0x1] = 0x1FE000A2
SncBaseCsr [0x2] = 0xC2
SncBaseCsr [0x3] = 0xE2
SncBaseCsr [0x4] = 0x102
SncConfigCsr = 0xF
Dump final value for PcdCpuFeaturesSetting:
D5 30 60 C1 F0 0D 00 00
Dump final value for PcdCpuFeaturesSetting:
D5 30 60 C1 F0 0D 00 00
:SNC: Socket = 1, Processor = 140
SncConfigMsr = 0xA
SncBaseCsr [0x0] = 0xFFF0082
SncBaseCsr [0x1] = 0x1FE000A2
SncBaseCsr [0x2] = 0xC2
SncBaseCsr [0x3] = 0xE2
SncBaseCsr [0x4] = 0x102
SncConfigCsr = 0xF
Dump final value for PcdCpuFeaturesSetting:
D5 30 60 C1 F0 0D 00 00
Dump final value for PcdCpuFeaturesSetting:
D5 30 60 C1 F0 0D 00 00
:SNC: Socket = 1, Processor = 142
SncConfigMsr = 0xA
SncBaseCsr [0x0] = 0xFFF0082
SncBaseCsr [0x1] = 0x1FE000A2
SncBaseCsr [0x2] = 0xC2
SncBaseCsr [0x3] = 0xE2
SncBaseCsr [0x4] = 0x102
SncConfigCsr = 0xF
Dump final value for PcdCpuFeaturesSetting:
D5 30 60 C1 F0 0D 00 00
Dump final value for PcdCpuFeaturesSetting:
D5 30 60 C1 F0 0D 00 00
:SNC: Socket = 1, Processor = 144
SncConfigMsr = 0xA
SncBaseCsr [0x0] = 0xFFF0082
SncBaseCsr [0x1] = 0x1FE000A2
SncBaseCsr [0x2] = 0xC2
SncBaseCsr [0x3] = 0xE2
SncBaseCsr [0x4] = 0x102
SncConfigCsr = 0xF
Dump final value for PcdCpuFeaturesSetting:
D5 30 60 C1 F0 0D 00 00
Dump final value for PcdCpuFeaturesSetting:
D5 30 60 C1 F0 0D 00 00
:SNC: Socket = 1, Processor = 146
SncConfigMsr = 0xA
SncBaseCsr [0x0] = 0xFFF0082
SncBaseCsr [0x1] = 0x1FE000A2
SncBaseCsr [0x2] = 0xC2
SncBaseCsr [0x3] = 0xE2
SncBaseCsr [0x4] = 0x102
SncConfigCsr = 0xF
Dump final value for PcdCpuFeaturesSetting:
D5 30 60 C1 F0 0D 00 00
Dump final value for PcdCpuFeaturesSetting:
D5 30 60 C1 F0 0D 00 00
:SNC: Socket = 1, Processor = 148
SncConfigMsr = 0xA
SncBaseCsr [0x0] = 0xFFF0082
SncBaseCsr [0x1] = 0x1FE000A2
SncBaseCsr [0x2] = 0xC2
SncBaseCsr [0x3] = 0xE2
SncBaseCsr [0x4] = 0x102
SncConfigCsr = 0xF
Dump final value for PcdCpuFeaturesSetting:
D5 30 60 C1 F0 0D 00 00
Dump final value for PcdCpuFeaturesSetting:
D5 30 60 C1 F0 0D 00 00
:SNC: Socket = 1, Processor = 150
SncConfigMsr = 0xA
SncBaseCsr [0x0] = 0xFFF0082
SncBaseCsr [0x1] = 0x1FE000A2
SncBaseCsr [0x2] = 0xC2
SncBaseCsr [0x3] = 0xE2
SncBaseCsr [0x4] = 0x102
SncConfigCsr = 0xF
Dump final value for PcdCpuFeaturesSetting:
D5 30 60 C1 F0 0D 00 00
Dump final value for PcdCpuFeaturesSetting:
D5 30 60 C1 F0 0D 00 00
:SNC: Socket = 1, Processor = 152
SncConfigMsr = 0xA
SncBaseCsr [0x0] = 0xFFF0082
SncBaseCsr [0x1] = 0x1FE000A2
SncBaseCsr [0x2] = 0xC2
SncBaseCsr [0x3] = 0xE2
SncBaseCsr [0x4] = 0x102
SncConfigCsr = 0xF
Dump final value for PcdCpuFeaturesSetting:
D5 30 60 C1 F0 0D 00 00
Dump final value for PcdCpuFeaturesSetting:
D5 30 60 C1 F0 0D 00 00
:SNC: Socket = 1, Processor = 154
SncConfigMsr = 0xA
SncBaseCsr [0x0] = 0xFFF0082
SncBaseCsr [0x1] = 0x1FE000A2
SncBaseCsr [0x2] = 0xC2
SncBaseCsr [0x3] = 0xE2
SncBaseCsr [0x4] = 0x102
SncConfigCsr = 0xF
Dump final value for PcdCpuFeaturesSetting:
D5 30 60 C1 F0 0D 00 00
Dump final value for PcdCpuFeaturesSetting:
D5 30 60 C1 F0 0D 00 00
:SNC: Socket = 1, Processor = 156
SncConfigMsr = 0xA
SncBaseCsr [0x0] = 0xFFF0082
SncBaseCsr [0x1] = 0x1FE000A2
SncBaseCsr [0x2] = 0xC2
SncBaseCsr [0x3] = 0xE2
SncBaseCsr [0x4] = 0x102
SncConfigCsr = 0xF
Dump final value for PcdCpuFeaturesSetting:
D5 30 60 C1 F0 0D 00 00
Dump final value for PcdCpuFeaturesSetting:
D5 30 60 C1 F0 0D 00 00
:SNC: Socket = 1, Processor = 158
SncConfigMsr = 0xA
SncBaseCsr [0x0] = 0xFFF0082
SncBaseCsr [0x1] = 0x1FE000A2
SncBaseCsr [0x2] = 0xC2
SncBaseCsr [0x3] = 0xE2
SncBaseCsr [0x4] = 0x102
SncConfigCsr = 0xF
Dump final value for PcdCpuFeaturesSetting:
D5 30 60 C1 F0 0D 00 00
Dump final value for PcdCpuFeaturesSetting:
D5 30 60 C1 F0 0D 00 00
PROGRESS CODE: V03020003 I0
PROGRESS CODE: V03020002 I0
This is VMB data Parse Pei
Locate PPI Status : 0
Get Variable Status : 0 CoreMegaBlock : 0
CoreMegaBlock [0x00000000]
SizeBelow1MB [0x00000000]
SizeAbove1MB [0x00000000]
SizeAbove4GB [0x00000000]
BaseBelow1MB [0x00050000]
BaseAbove1MB [0x00100000]
BaseAbove4GB [100000000]
VMBdataDiscovered Ppi installation status: 0
PROGRESS CODE: V03020003 I0
PROGRESS CODE: V03020002 I0
This is Validation Mega block Pei
Blocks Count : 3
MegaBlocks in PEIM ...
VMB[0] Attr[4]Addr[50000]Size[0]
VMB[1] Attr[4]Addr[100000]Size[0]
VMB[2] Attr[4]Addr[100000000]Size[0]
PROGRESS CODE: V03020003 I0
PROGRESS CODE: V03020002 I0
UbaInitPeim: PlatformType=0x16
UbaInitPeim: PlatformType=0x16
UbaInitPeim: PlatformType=0x16
PROGRESS CODE: V03020003 I0
PROGRESS CODE: V03020002 I0
PROGRESS CODE: V03020003 I0
PROGRESS CODE: V03020002 I0
PROGRESS CODE: V03020003 I0
PROGRESS CODE: V03020002 I0
Lt Disabled - Disabling BIOS lock
FiaMuxRecordsCount = 0
FiaMuxRecordsCount = 0
FiaMuxRecordsCount = 0
PROGRESS CODE: V03020003 I0
ME UMA PostMem: SendDramInitDone (): InitStat = 0
[HECI Transport-1 PEI] Send pkt: 80140007
00: F0 01 00 00 00 00 00 00 - 00 00 00 00 00 00 00 00
10: 00 00 00 00
[HECI Transport-1 PEI] Got pkt: 80240007
00: F0 81 00 00 00 00 00 00 - 00 00 00 00 00 00 00 00
10: 00 00 00 00 00 00 00 00 - 00 00 00 00 00 04 00 00
20: 00 00 00 00
ME UMA PostMem: BiosAction = 4
ME UMA PostMem: MeDramInitDone Complete. Checking for reset...
[HECI Transport-1 PEI] Send pkt: 80010020
00: 01
[HECI Transport-1 PEI] Got pkt: 800B0020
00: 81 01 01 1D 92 9F 33 01 - 00 00 00
[HECI Transport-1 PEI] Send pkt: 80140008
00: 00 00 05 00 1F 00 00 00 - 00 00 00 00 00 00 00 00
10: 00 00 00 00
[HECI Transport-1 PEI] Got pkt: 805E0008
00: 00 00 05 00 1F 00 00 00 - 00 00 00 00 4A 00 00 00
10: 00 00 00 00 18 18 06 00 - 00 06 00 01 06 00 02 06
20: 00 03 56 00 04 56 00 05 - 56 00 06 56 00 07 5C 00
30: 08 7C 00 09 55 00 0A 55 - 00 0B 5B 00 0C 55 00 0D
40: 51 00 0E 51 00 0F 47 00 - 10 07 00 11 47 00 12 07
50: 00 13 47 00 14 07 00 15 - 47 00 16 07 00 17
PeiFiaMuxConfigInit: IOExpanders number = 0
PeiFiaMuxConfigInit: Request ME FIA MUX configuration fail with status = Not Ready
[HECI Control-1 PEI][HECI Transport-1 PEI] Send pkt: 80010020
00: 01
[HECI Transport-1 PEI] Got pkt: 800B0020
00: 81 01 01 1D 92 9F 33 01 - 00 00 00
Detected I/O Expanders: 0
IoExpanderInit - End
SDI#0 has HD-Audio device.
SDI#1 has no HD-Audio device.
SDI#2 has no HD-Audio device.
PROGRESS CODE: V03020002 I0
PROGRESS CODE: V03020003 I0
PROGRESS CODE: V03020002 I0
PROGRESS CODE: V03020003 I0
PROGRESS CODE: V03020002 I0
PROGRESS CODE: V03020003 I0
PROGRESS CODE: V03020002 I0
NearTdpLockOcPeimEntryPoint
BootMode = 0
ProcessorLtsxEnable is disabled
PROGRESS CODE: V03020003 I0
PROGRESS CODE: V03020002 I0
PROGRESS CODE: V03020003 I0
PROGRESS CODE: V03020002 I0
PROGRESS CODE: V03020003 I0
PROGRESS CODE: V03020002 I0
[FRU_TDX] _ProgramSeamrr BEGIN
[IP_CORE_MSR] IpCoreMsr3v0_ProgramSeamrr BEGIN
_InternalProgramSeamrr (Unsupported) (0x000)
_InternalProgramSeamrr (Unsupported) (0x002)
_InternalProgramSeamrr (Unsupported) (0x004)
_InternalProgramSeamrr (Unsupported) (0x006)
_InternalProgramSeamrr (Unsupported) (0x008)
_InternalProgramSeamrr (Unsupported) (0x00A)
_InternalProgramSeamrr (Unsupported) (0x00C)
_InternalProgramSeamrr (Unsupported) (0x00E)
_InternalProgramSeamrr (Unsupported) (0x010)
_InternalProgramSeamrr (Unsupported) (0x012)
_InternalProgramSeamrr (Unsupported) (0x014)
_InternalProgramSeamrr (Unsupported) (0x016)
_InternalProgramSeamrr (Unsupported) (0x018)
_InternalProgramSeamrr (Unsupported) (0x01A)
_InternalProgramSeamrr (Unsupported) (0x01C)
_InternalProgramSeamrr (Unsupported) (0x01E)
_InternalProgramSeamrr (Unsupported) (0x020)
_InternalProgramSeamrr (Unsupported) (0x022)
_InternalProgramSeamrr (Unsupported) (0x024)
_InternalProgramSeamrr (Unsupported) (0x026)
_InternalProgramSeamrr (Unsupported) (0x028)
_InternalProgramSeamrr (Unsupported) (0x02A)
_InternalProgramSeamrr (Unsupported) (0x02C)
_InternalProgramSeamrr (Unsupported) (0x02E)
_InternalProgramSeamrr (Unsupported) (0x030)
_InternalProgramSeamrr (Unsupported) (0x032)
_InternalProgramSeamrr (Unsupported) (0x034)
_InternalProgramSeamrr (Unsupported) (0x036)
_InternalProgramSeamrr (Unsupported) (0x038)
_InternalProgramSeamrr (Unsupported) (0x03A)
_InternalProgramSeamrr (Unsupported) (0x03C)
_InternalProgramSeamrr (Unsupported) (0x03E)
_InternalProgramSeamrr (Unsupported) (0x040)
_InternalProgramSeamrr (Unsupported) (0x042)
_InternalProgramSeamrr (Unsupported) (0x044)
_InternalProgramSeamrr (Unsupported) (0x046)
_InternalProgramSeamrr (Unsupported) (0x048)
_InternalProgramSeamrr (Unsupported) (0x04A)
_InternalProgramSeamrr (Unsupported) (0x04C)
_InternalProgramSeamrr (Unsupported) (0x04E)
_InternalProgramSeamrr (Unsupported) (0x050)
_InternalProgramSeamrr (Unsupported) (0x052)
_InternalProgramSeamrr (Unsupported) (0x054)
_InternalProgramSeamrr (Unsupported) (0x056)
_InternalProgramSeamrr (Unsupported) (0x058)
_InternalProgramSeamrr (Unsupported) (0x05A)
_InternalProgramSeamrr (Unsupported) (0x05C)
_InternalProgramSeamrr (Unsupported) (0x05E)
_InternalProgramSeamrr (Unsupported) (0x060)
_InternalProgramSeamrr (Unsupported) (0x062)
_InternalProgramSeamrr (Unsupported) (0x064)
_InternalProgramSeamrr (Unsupported) (0x066)
_InternalProgramSeamrr (Unsupported) (0x068)
_InternalProgramSeamrr (Unsupported) (0x06A)
_InternalProgramSeamrr (Unsupported) (0x06C)
_InternalProgramSeamrr (Unsupported) (0x06E)
_InternalProgramSeamrr (Unsupported) (0x070)
_InternalProgramSeamrr (Unsupported) (0x072)
_InternalProgramSeamrr (Unsupported) (0x074)
_InternalProgramSeamrr (Unsupported) (0x076)
_InternalProgramSeamrr (Unsupported) (0x078)
_InternalProgramSeamrr (Unsupported) (0x07A)
_InternalProgramSeamrr (Unsupported) (0x07C)
_InternalProgramSeamrr (Unsupported) (0x07E)
_InternalProgramSeamrr (Unsupported) (0x080)
_InternalProgramSeamrr (Unsupported) (0x082)
_InternalProgramSeamrr (Unsupported) (0x084)
_InternalProgramSeamrr (Unsupported) (0x086)
_InternalProgramSeamrr (Unsupported) (0x088)
_InternalProgramSeamrr (Unsupported) (0x08A)
_InternalProgramSeamrr (Unsupported) (0x08C)
_InternalProgramSeamrr (Unsupported) (0x08E)
_InternalProgramSeamrr (Unsupported) (0x090)
_InternalProgramSeamrr (Unsupported) (0x092)
_InternalProgramSeamrr (Unsupported) (0x094)
_InternalProgramSeamrr (Unsupported) (0x096)
_InternalProgramSeamrr (Unsupported) (0x098)
_InternalProgramSeamrr (Unsupported) (0x09A)
_InternalProgramSeamrr (Unsupported) (0x09C)
_InternalProgramSeamrr (Unsupported) (0x09E)
[IP_CORE_MSR] IpCoreMsr3v0_ProgramSeamrr END, Unsupported
[FRU_TDX] _ProgramSeamrr END (Unsupported)PROGRESS CODE: V03020003 I0
PROGRESS CODE: V03020002 I0
PROGRESS CODE: V03020003 I0
PROGRESS CODE: V03021001 I0
[SIO] Current system SIO exist bit:10
PROGRESS CODE: V03040003 I0
PDB = c:\efi\servergen2\intel\Build\EagleStreamRpPkg\DEBUG_VS2015x86\X64\ServerPlatformPkg\Universal\TraceHubStatusCodeHandler\RuntimeDxe\TraceHubStatusCodeHandlerRuntimeDxe\DEBUG\TraceHubStatusCodeHandlerRuntimeDxe.pdb
PROGRESS CODE: V03040002 I0
PROGRESS CODE: V03040003 I0
PDB = c:\efi\servergen2\intel\Build\EagleStreamRpPkg\DEBUG_VS2015x86\X64\ServerPlatformPkg\Universal\StatusCodeHandlerUsb\RuntimeDxe\StatusCodeHandlerRuntimeDxeUsb\DEBUG\StatusCodeHandlerRuntimeDxeUsb.pdb
PROGRESS CODE: V03040002 I0
PROGRESS CODE: V03040003 I0
PDB = c:\efi\servergen2\intel\Build\EagleStreamRpPkg\DEBUG_VS2015x86\X64\MdeModulePkg\Universal\Acpi\FirmwarePerformanceDataTableDxe\FirmwarePerformanceDxe\DEBUG\FirmwarePerformanceDxe.pdb
PROGRESS CODE: V03040002 I0
PROGRESS CODE: V03040003 I0
PDB = c:\efi\servergen2\intel\Build\EagleStreamRpPkg\DEBUG_VS2015x86\X64\ShellPkg\DynamicCommand\DpDynamicCommand\DpDynamicCommand\DEBUG\dpDynamicCommand.pdb
PROGRESS CODE: V03040002 I0
PROGRESS CODE: V03040003 I0
PDB = c:\efi\servergen2\intel\Build\EagleStreamRpPkg\DEBUG_VS2015x86\X64\EagleStreamOpenBoardPkg\Uba\BoardInit\Dxe\BoardInitDxe\DEBUG\BoardInitDxe.pdb
PROGRESS CODE: V03040002 I0
PROGRESS CODE: V03040003 I0
PDB = c:\efi\servergen2\intel\Build\EagleStreamRpPkg\DEBUG_VS2015x86\X64\EagleStreamRpPkg\Platform\Dxe\IioCxl2CedtDevIou\IioCxl2SsdtInstallDxe\DEBUG\IioCxl2SsdtInstallDxe.pdb
PROGRESS CODE: V03040002 I0
PROGRESS CODE: V03040003 I0
PDB = c:\efi\servergen2\intel\Build\EagleStreamRpPkg\DEBUG_VS2015x86\X64\ServerRestrictedPkg\VariableSmi\VariableSmiExportHii\DEBUG\VariableSmiExportHii.pdb
PROGRESS CODE: V03040002 I0
PROGRESS CODE: V03040003 I0
PDB = c:\efi\servergen2\intel\Build\EagleStreamRpPkg\DEBUG_VS2015x86\X64\ServerPlatformPkg\Platform\Dxe\ConsoleBdsUpdateDxe\ConsoleBdsUpdateDxe\DEBUG\ConsoleBdsUpdateDxe.pdb
PROGRESS CODE: V03040002 I0
PROGRESS CODE: V03040003 I0
PDB = c:\efi\servergen2\intel\Build\EagleStreamRpPkg\DEBUG_VS2015x86\X64\PrmPkg\PrmSsdtInstallDxe\PrmSsdtInstallDxe\DEBUG\PrmSsdtInstallDxe.pdb
PROGRESS CODE: V03040002 I0
PROGRESS CODE: V03040003 I0
PDB = c:\efi\servergen2\intel\Build\EagleStreamRpPkg\DEBUG_VS2015x86\X64\ServerPlatformPkg\Features\PrmPlatformSample\PrmSampleSsdtDxe\PrmSampleSsdtDxe\DEBUG\PrmSampleSsdtDxe.pdb
PROGRESS CODE: V03040002 I0
PROGRESS CODE: V03040003 I0
PDB = c:\efi\servergen2\intel\Build\EagleStreamRpPkg\DEBUG_VS2015x86\X64\ServerPlatformPkg\Features\PrmPeLoader\PrmPeLoaderConfigDxe\PrmPeLoaderConfigDxe\DEBUG\PrmPeLoaderConfigDxe.pdb
PROGRESS CODE: V03040002 I0
[PRM CONFIG] Entry
Error: Image at 0006B82B000 start failed: Unsupported
PDB = c:\efi\servergen2\intel\Build\EagleStreamRpPkg\DEBUG_VS2015x86\X64\ServerPlatformPkg\Features\PrmPeLoader\PrmPeLoaderConfigDxe\PrmPeLoaderConfigDxe\DEBUG\PrmPeLoaderConfigDxe.pdb
PROGRESS CODE: V03040003 I0
PDB = c:\efi\servergen2\intel\Build\EagleStreamRpPkg\DEBUG_VS2015x86\X64\MdeModulePkg\Universal\SetupBrowserDxe\SetupBrowserDxe\DEBUG\SetupBrowser.pdb
PROGRESS CODE: V03040002 I0
PROGRESS CODE: V03040003 I0
PDB = c:\efi\servergen2\intel\Build\EagleStreamRpPkg\DEBUG_VS2015x86\X64\MdeModulePkg\Universal\SmbiosMeasurementDxe\SmbiosMeasurementDxe\DEBUG\SmbiosMeasurementDxe.pdb
PROGRESS CODE: V03040002 I0
PROGRESS CODE: V03040003 I0
PDB = c:\efi\servergen2\intel\Build\EagleStreamRpPkg\DEBUG_VS2015x86\X64\ServerSiliconPkg\Universal\Dxe\CxlInit\CxlCedt\CxlCedt\DEBUG\CxlCedt.pdb
PROGRESS CODE: V03040002 I0
PROGRESS CODE: V03040003 I0
PDB = c:\efi\servergen2\intel\Build\EagleStreamRpPkg\DEBUG_VS2015x86\X64\ServerSiliconPkg\Universal\Dxe\OobMsmDxe\OobMsmDxe\DEBUG\OobMsmDxeDriver.pdb
PROGRESS CODE: V03040002 I0
PROGRESS CODE: V03040003 I0
PDB = c:\efi\servergen2\intel\Build\EagleStreamRpPkg\DEBUG_VS2015x86\X64\ClientOneSiliconPkg\Product\EagleStream\SiInit\Dxe\SiInitDxe\DEBUG\SiInitDxe.pdb
PROGRESS CODE: V03040002 I0
PROGRESS CODE: V03040003 I0
PDB = c:\efi\servergen2\intel\Build\EagleStreamRpPkg\DEBUG_VS2015x86\X64\ClientOneSiliconPkg\IpBlock\Smbus\Dxe\SmbusDxe\DEBUG\SmbusDxe.pdb
PROGRESS CODE: V03040002 I0
PROGRESS CODE: V03040003 I0
PDB = c:\efi\servergen2\intel\Build\EagleStreamRpPkg\DEBUG_VS2015x86\X64\ClientOneSiliconPkg\IpBlock\Wdt\Dxe\WdtDxe\DEBUG\WdtDxe.pdb
PROGRESS CODE: V03040002 I0
PROGRESS CODE: V03040003 I0
PDB = c:\efi\servergen2\intel\Build\EagleStreamRpPkg\DEBUG_VS2015x86\X64\ClientOneSiliconPkg\IpBlock\Sps\Heci\HeciAccess\DxeSmm\HeciAccessDxe\DEBUG\HeciAccessDxe.pdb
PROGRESS CODE: V03040002 I0
PROGRESS CODE: V03040003 I0
PDB = c:\efi\servergen2\intel\Build\EagleStreamRpPkg\DEBUG_VS2015x86\X64\ClientOneSiliconPkg\Fru\EbgPch\PchInit\GpioV2ProtocolInit\Dxe\GpioV2ProtocolInitDxe\DEBUG\GpioV2ProtocolInitDxe.pdb
PROGRESS CODE: V03040002 I0
PROGRESS CODE: V03040003 I0
PDB = c:\efi\servergen2\intel\Build\EagleStreamRpPkg\DEBUG_VS2015x86\X64\EagleStreamOpenBoardPkg\Uba\UbaMain\Common\Dxe\SystemBoardInfoDxe\SystemBoardInfoDxe\DEBUG\SystemBoardInfo.pdb
PROGRESS CODE: V03040002 I0
PROGRESS CODE: V03040003 I0
PDB = c:\efi\servergen2\intel\Build\EagleStreamRpPkg\DEBUG_VS2015x86\X64\EagleStreamOpenBoardPkg\Uba\UbaMain\Common\Dxe\SystemConfigUpdateDxe\SystemConfigUpdateDxe\DEBUG\SystemConfigUpdate.pdb
PROGRESS CODE: V03040002 I0
PROGRESS CODE: V03040003 I0
PDB = c:\efi\servergen2\intel\Build\EagleStreamRpPkg\DEBUG_VS2015x86\X64\EagleStreamOpenBoardPkg\Uba\UbaMain\TypeArcherCityRP\Dxe\StaticSkuDataDxe\StaticSkuDataDxe\DEBUG\StaticSkuDataDxeArcherCityRP.pdb
PROGRESS CODE: V03040002 I0
PROGRESS CODE: V03040003 I0
PDB = c:\efi\servergen2\intel\Build\EagleStreamRpPkg\DEBUG_VS2015x86\X64\EagleStreamOpenBoardPkg\Uba\UbaMain\TypeArcherCityRP\Dxe\SetupCfgUpdateDxe\SetupCfgUpdateDxe\DEBUG\SetupConfigUpdateDxeArcherCityRP.pdb
PROGRESS CODE: V03040002 I0
PROGRESS CODE: V03040003 I0
PDB = c:\efi\servergen2\intel\Build\EagleStreamRpPkg\DEBUG_VS2015x86\X64\EagleStreamOpenBoardPkg\Uba\UbaMain\TypeArcherCityRP\Dxe\SmbiosDataUpdateDxe\SmbiosDataUpdateDxe\DEBUG\SmbiosDataUpdateDxeArcherCityRP.pdb
PROGRESS CODE: V03040002 I0
UBA:SmbiosDataUpdateEntry Image GUID=09813137-B2A5-4462-8A2A-48F77ECA31BF
PROGRESS CODE: V03040003 I0
PDB = c:\efi\servergen2\intel\Build\EagleStreamRpPkg\DEBUG_VS2015x86\X64\EagleStreamOpenBoardPkg\Uba\UbaMain\TypeArcherCityRP\Dxe\UsbOcUpdateDxe\UsbOcUpdateDxe\DEBUG\UsbOcUpdateDxeArcherCityRP.pdb
PROGRESS CODE: V03040002 I0
PROGRESS CODE: V03040003 I0
PDB = c:\efi\servergen2\intel\Build\EagleStreamRpPkg\DEBUG_VS2015x86\X64\ServerPlatformPkg\Platform\Dxe\PlatformType\PlatformType\DEBUG\PlatformType.pdb
PROGRESS CODE: V03040002 I0
PROGRESS CODE: V03040003 I0
PDB = c:\efi\servergen2\intel\Build\EagleStreamRpPkg\DEBUG_VS2015x86\X64\ServerPlatformPkg\Platform\Dxe\PlatformEarlyDxe\PlatformEarlyDxe\DEBUG\PlatformEarlyDxe.pdb
PROGRESS CODE: V03040002 I0
PROGRESS CODE: V03040003 I0
PDB = c:\efi\servergen2\intel\Build\EagleStreamRpPkg\DEBUG_VS2015x86\X64\ServerPlatformPkg\Platform\Dxe\OtaDxe\OtaDxe\DEBUG\OtaDxeDriver.pdb
PROGRESS CODE: V03040002 I0
[OtaDxe.c] OtaDxeDriverEntry() {
[OtaDxe.c] OtaDxeDriverEntry() -> Create OTA Event
[OtaDxe.c] OtaDxeDriverEntry() -> OTA Event creation: Success
[OtaDxe.c] OtaDxeDriverEntry() } Success
PROGRESS CODE: V03040003 I0
PDB = c:\efi\servergen2\intel\Build\EagleStreamRpPkg\DEBUG_VS2015x86\X64\ServerSecurityPkg\Pfr\Restricted\DebugTool\PxdDxe\DEBUG\PxdDxeDriver.pdb
PROGRESS CODE: V03040002 I0
[PxdDxe.c] PxdDxeDriverEntry() {
[PxdDxe.c] PxdDxeDriverEntry() } Success
PROGRESS CODE: V03040003 I0
PDB = c:\efi\servergen2\intel\Build\EagleStreamRpPkg\DEBUG_VS2015x86\X64\UefiCpuPkg\CpuDxe\CpuDxe\DEBUG\CpuDxe.pdb
PROGRESS CODE: V03040002 I0
ConvertPages: failed to find range A0000 - FFFFF
ConvertPages: failed to find range 77800000 - 7FFFFFFF
ConvertPages: failed to find range FC800000 - FE00FFFF
ConvertPages: failed to find range FE010000 - FE010FFF
ConvertPages: failed to find range FE011000 - FE7FFFFF
ConvertPages: failed to find range FEC00000 - FEC00FFF
ConvertPages: failed to find range FEC80000 - FED00FFF
PROGRESS CODE: V03040003 I0
PDB = c:\efi\servergen2\intel\Build\EagleStreamRpPkg\DEBUG_VS2015x86\X64\ServerPlatformPkg\Features\Bmc\PlatformHookSpiAccess\PlatformHookSpiAccessDxe\DEBUG\PlatformHookSpiAccessDxe.pdb
PROGRESS CODE: V03040002 I0
PROGRESS CODE: V03040003 I0
PDB = c:\efi\servergen2\intel\Build\EagleStreamRpPkg\DEBUG_VS2015x86\X64\MdeModulePkg\Universal\BdsDxe\BdsDxe\DEBUG\BdsDxe.pdb
PROGRESS CODE: V03040002 I0
PROGRESS CODE: V03040003 I0
PDB = c:\efi\servergen2\intel\Build\EagleStreamRpPkg\DEBUG_VS2015x86\X64\ServerPlatformPkg\Platform\Dxe\Hsti\HstiIhvProviderDxe\HstiIhvProviderDxeEGS\DEBUG\HstiIhvProviderDxeEGS.pdb
PROGRESS CODE: V03040002 I0
PROGRESS CODE: V03040003 I0
PDB = c:\efi\servergen2\intel\Build\EagleStreamRpPkg\DEBUG_VS2015x86\X64\MdeModulePkg\Universal\Acpi\S3SaveStateDxe\S3SaveStateDxe\DEBUG\S3SaveStateDxe.pdb
PROGRESS CODE: V03040002 I0
PROGRESS CODE: V03040003 I0
PDB = c:\efi\servergen2\intel\Build\EagleStreamRpPkg\DEBUG_VS2015x86\X64\ServerPlatformPkg\Platform\Dxe\PlatformFirmwareVersionInfoDxe\PlatformFirmwareVersionInfoDxe\DEBUG\PlatformFirmwareVersionInfo.pdb
PROGRESS CODE: V03040002 I0
PROGRESS CODE: V03040003 I0
PDB = c:\efi\servergen2\intel\Build\EagleStreamRpPkg\DEBUG_VS2015x86\X64\ServerPlatformPkg\Features\Acpi\BmcAcpiDxe\BmcAcpiDxe\DEBUG\BmcAcpiDxe.pdb
PROGRESS CODE: V03040002 I0
PROGRESS CODE: V03040003 I0
PDB = c:\efi\servergen2\intel\Build\EagleStreamRpPkg\DEBUG_VS2015x86\X64\ClientOneSiliconPkg\IpBlock\Me\ResetHandler\Dxe\ResetHandler\DEBUG\ResetHandler.pdb
PROGRESS CODE: V03040002 I0
PROGRESS CODE: V03040003 I0
PDB = c:\efi\servergen2\intel\Build\EagleStreamRpPkg\DEBUG_VS2015x86\X64\ServerRasPkg\Driver\Dxe\CrashLogDxe\CrashLogDxe\DEBUG\CrashLogDxe.pdb
PROGRESS CODE: V03040002 I0
Reading CPU 0 WatcherCfgBlk->Data64[0x0] = 0x10000700 address = 0xC6B57000!
Reading CPU 0 WatcherCfgBlk->Data64[0x1] = 0x0 address = 0xC6B57008!
Reading CPU 0 WatcherCfgBlk->Data64[0x0] = 0x10000700 address = 0xC6B57000!
Reading CPU 0 WatcherCfgBlk->Data64[0x1] = 0x0 address = 0xC6B57008!
Writing CPU 0 WatcherCfgBlk->Data64[0x0] = 0x10000700! address = 0xC6B57000
Writing CPU 0 WatcherCfgBlk->Data64[0x1] = 0x0! address = 0xC6B57008
Reading CPU 0 WatcherCfgBlk->Data64[0x0] = 0x10000700 address = 0xC6B57000!
Reading CPU 0 WatcherCfgBlk->Data64[0x1] = 0x0 address = 0xC6B57008!
Reading CPU 1 WatcherCfgBlk->Data64[0x0] = 0x10000700 address = 0xF9B57000!
Reading CPU 1 WatcherCfgBlk->Data64[0x1] = 0x0 address = 0xF9B57008!
Reading CPU 1 WatcherCfgBlk->Data64[0x0] = 0x10000700 address = 0xF9B57000!
Reading CPU 1 WatcherCfgBlk->Data64[0x1] = 0x0 address = 0xF9B57008!
Writing CPU 1 WatcherCfgBlk->Data64[0x0] = 0x10000700! address = 0xF9B57000
Writing CPU 1 WatcherCfgBlk->Data64[0x1] = 0x0! address = 0xF9B57008
Reading CPU 1 WatcherCfgBlk->Data64[0x0] = 0x10000700 address = 0xF9B57000!
Reading CPU 1 WatcherCfgBlk->Data64[0x1] = 0x0 address = 0xF9B57008!
Reading CPU 0 WatcherCfgBlk->Data64[0x0] = 0x10000700 address = 0xC6B57000!
Reading CPU 0 WatcherCfgBlk->Data64[0x1] = 0x0 address = 0xC6B57008!
Socket 0 entry 0 CrashDump_Complete is not set in CPU CrashLog Discovery Header!
Socket 0 entry 1 CrashDump_Complete is not set in CPU CrashLog Discovery Header!
Socket 0 entry 2 CrashDump_Complete is not set in CPU CrashLog Discovery Header!
Socket 0 entry 3 CrashDump_Complete is not set in CPU CrashLog Discovery Header!
Socket 0 entry 4 CrashDump_Complete is not set in CPU CrashLog Discovery Header!
Socket 0 entry 5 CrashDump_Complete is not set in CPU CrashLog Discovery Header!
Socket 0 entry 6 CrashDump_Complete is not set in CPU CrashLog Discovery Header!
Unknown AccessType = F !
can't get CPU CrashLog Region Address and size !
Reading CPU 1 WatcherCfgBlk->Data64[0x0] = 0x10000700 address = 0xF9B57000!
Reading CPU 1 WatcherCfgBlk->Data64[0x1] = 0x0 address = 0xF9B57008!
Socket 1 entry 0 CrashDump_Complete is not set in CPU CrashLog Discovery Header!
Socket 1 entry 1 CrashDump_Complete is not set in CPU CrashLog Discovery Header!
Socket 1 entry 2 CrashDump_Complete is not set in CPU CrashLog Discovery Header!
Socket 1 entry 3 CrashDump_Complete is not set in CPU CrashLog Discovery Header!
Unknown AccessType = F !
can't get CPU CrashLog Region Address and size !
Unknown AccessType = F !
can't get CPU CrashLog Region Address and size !
Unknown AccessType = F !
can't get CPU CrashLog Region Address and size !
Unknown AccessType = F !
can't get CPU CrashLog Region Address and size !
PchCrashLogDiscovery - first DWORD of Record 0 is Zero
PchCrashLogDiscovery - first DWORD of Record 1 is Zero
PchCrashLogDiscovery - first DWORD of Record 2 is Zero
PROGRESS CODE: V03040003 I0
PDB = c:\efi\servergen2\intel\Build\EagleStreamRpPkg\DEBUG_VS2015x86\X64\ServerRasPkg\Driver\Dxe\RasMiscDxe\RasMiscDxe\DEBUG\RasMiscDxe.pdb
PROGRESS CODE: V03040002 I0
PROGRESS CODE: V03040003 I0
PDB = c:\efi\servergen2\intel\Build\EagleStreamRpPkg\DEBUG_VS2015x86\X64\MdeModulePkg\Universal\PlatformDriOverrideDxe\PlatformDriOverrideDxe\DEBUG\PlatDriOverrideDxe.pdb
PROGRESS CODE: V03040002 I0
PROGRESS CODE: V03040003 I0
PDB = c:\efi\servergen2\intel\Build\EagleStreamRpPkg\DEBUG_VS2015x86\X64\MdeModulePkg\Universal\DisplayEngineDxe\DisplayEngineDxe\DEBUG\DisplayEngine.pdb
PROGRESS CODE: V03040002 I0
PROGRESS CODE: V03040003 I0
PDB = c:\efi\servergen2\intel\Build\EagleStreamRpPkg\DEBUG_VS2015x86\X64\NetworkPkg\TlsAuthConfigDxe\TlsAuthConfigDxe\DEBUG\TlsAuthConfigDxe.pdb
PROGRESS CODE: V03040002 I0
PROGRESS CODE: V03040003 I0
PDB = c:\efi\servergen2\intel\Build\EagleStreamRpPkg\DEBUG_VS2015x86\X64\ServerSiliconPkg\Universal\Dxe\CxlInit\MemMap\CxlDxe\DEBUG\CxlDxe.pdb
PROGRESS CODE: V03040002 I0
PROGRESS CODE: V03040003 I0
PDB = c:\efi\servergen2\intel\Build\EagleStreamRpPkg\DEBUG_VS2015x86\X64\ServerSiliconPkg\Universal\Dxe\HbmMemMap\HbmMemMap\DEBUG\HbmMemMap.pdb
PROGRESS CODE: V03040002 I0
PROGRESS CODE: V03040003 I0
PDB = c:\efi\servergen2\intel\Build\EagleStreamRpPkg\DEBUG_VS2015x86\X64\ClientOneSiliconPkg\IpBlock\Me\HeciTransport\DxeSmm\HeciTransportDxe\DEBUG\HeciTransportDxe.pdb
PROGRESS CODE: V03040002 I0
PROGRESS CODE: V03040003 I0
PDB = c:\efi\servergen2\intel\Build\EagleStreamRpPkg\DEBUG_VS2015x86\X64\ServerSiliconPkg\Me\Client\ClientCore\Dxe\ClientCore\DEBUG\ClientCore.pdb
PROGRESS CODE: V03040002 I0
PROGRESS CODE: V03040003 I0
PDB = c:\efi\servergen2\intel\Build\EagleStreamRpPkg\DEBUG_VS2015x86\X64\PcAtChipsetPkg\HpetTimerDxe\HpetTimerDxe\DEBUG\HpetTimerDxe.pdb
PROGRESS CODE: V03040002 I0
PROGRESS CODE: V03040003 I0
PDB = c:\efi\servergen2\intel\Build\EagleStreamRpPkg\DEBUG_VS2015x86\X64\UefiCpuPkg\CpuS3DataDxe\CpuS3DataDxe\DEBUG\CpuS3DataDxe.pdb
PROGRESS CODE: V03040002 I0
PROGRESS CODE: V03040003 I0
PDB = c:\efi\servergen2\intel\Build\EagleStreamRpPkg\DEBUG_VS2015x86\X64\ServerPlatformPkg\Features\Pci\Dxe\PciHostBridge\PciHostBridgeSpr\DEBUG\PciHostBridge.pdb
PROGRESS CODE: V03040002 I0
PROGRESS CODE: V03040003 I0
PDB = c:\efi\servergen2\intel\Build\EagleStreamRpPkg\DEBUG_VS2015x86\X64\ServerPlatformPkg\Platform\Dxe\Hsti\HstiIbvPlatformDxe\HstiIbvPlatformDxe\DEBUG\HstiPlatformDxe.pdb
PROGRESS CODE: V03040002 I0
PROGRESS CODE: V03040003 I0
PDB = c:\efi\servergen2\intel\Build\EagleStreamRpPkg\DEBUG_VS2015x86\X64\ServerPlatformPkg\Features\Cpu\Dxe\GetCpuInfo\GetCpuInfo\DEBUG\GetCpuInfo.pdb
PROGRESS CODE: V03040002 I0
PROGRESS CODE: V03040003 I0
PDB = c:\efi\servergen2\intel\Build\EagleStreamRpPkg\DEBUG_VS2015x86\X64\ServerPlatformPkg\Restricted\Overclocking\NearTDPClearOc\NearTDPClearOc\DEBUG\NearTDPClearOc.pdb
PROGRESS CODE: V03040002 I0
PROGRESS CODE: V03040003 I0
PDB = c:\efi\servergen2\intel\Build\EagleStreamRpPkg\DEBUG_VS2015x86\X64\MicrocodeUpdateFeaturePkg\MicrocodeUtility\MicrocodeUtilityDxe\DEBUG\MicrocodeUtilityDxe.pdb
PROGRESS CODE: V03040002 I0
Microcode utility not supported.
PROGRESS CODE: V03040003 I0
PDB = c:\efi\servergen2\intel\Build\EagleStreamRpPkg\DEBUG_VS2015x86\X64\MicrocodeUpdateFeaturePkg\MicrocodeUtility\MicrocodeUtilityDxe\DEBUG\MicrocodeUtilityDxe.pdb
PROGRESS CODE: V03040002 I0
Microcode utility not supported.
PROGRESS CODE: V03040003 I0
PDB = c:\efi\servergen2\intel\Build\EagleStreamRpPkg\DEBUG_VS2015x86\X64\ClientOneSiliconPkg\Fru\EbgPch\PchInit\Dxe\PchInitDxe\DEBUG\PchInitDxeEbg.pdb
PROGRESS CODE: V03040002 I0
PROGRESS CODE: V03040003 I0
PDB = c:\efi\servergen2\intel\Build\EagleStreamRpPkg\DEBUG_VS2015x86\X64\ServerSiliconPkg\Universal\Smm\Access\SmmAccess\DEBUG\SmmAccess.pdb
PROGRESS CODE: V03040002 I0
PROGRESS CODE: V03040003 I0
PDB = c:\efi\servergen2\intel\Build\EagleStreamRpPkg\DEBUG_VS2015x86\X64\ClientOneSiliconPkg\IpBlock\Sps\Heci\HeciControl\DxeSmm\HeciControlDxe\DEBUG\HeciControlDxe.pdb
PROGRESS CODE: V03040002 I0
Initialization is allowed
Initialization is allowed
PROGRESS CODE: V03040003 I0
PDB = c:\efi\servergen2\intel\Build\EagleStreamRpPkg\DEBUG_VS2015x86\X64\MdeModulePkg\Universal\WatchdogTimerDxe\WatchdogTimer\DEBUG\WatchdogTimer.pdb
PROGRESS CODE: V03040002 I0
PROGRESS CODE: V03040003 I0
PDB = c:\efi\servergen2\intel\Build\EagleStreamRpPkg\DEBUG_VS2015x86\X64\ServerPlatformPkg\Platform\SpiFvbServices\PlatformSpi\DEBUG\FwBlockService.pdb
PROGRESS CODE: V03040002 I0
FvImage on FvHandle 6AEA4C98 and 769B0518 has the same FvNameGuid 27A72E80-3118-4C0C-8673-AA5B4EFA9613.
FvImage on FvHandle 6AEA4718 and 769A6818 has the same FvNameGuid 5A515240-D1F1-4C58-9590-27B1F0E86827.
FvImage on FvHandle 6AEA3918 and 769A9A18 has the same FvNameGuid D2C29BA7-3809-480F-9C3D-DE389C61425A.
FvImage on FvHandle 6AE7CD18 and 769B0618 has the same FvNameGuid 6522280D-28F9-4131-ADC4-F40EBFA45864.
PROGRESS CODE: V03040003 I0
PDB = c:\efi\servergen2\intel\Build\EagleStreamRpPkg\DEBUG_VS2015x86\X64\ServerPlatformPkg\Features\Pci\Dxe\PciPlatform\PciPlatform\DEBUG\PciPlatform.pdb
PROGRESS CODE: V03040002 I0
PROGRESS CODE: V03040003 I0
PDB = c:\efi\servergen2\intel\Build\EagleStreamRpPkg\DEBUG_VS2015x86\X64\IntelSiliconPkg\Feature\VTd\IntelVTdDxe\IntelVTdDxe\DEBUG\IntelVTdDxe.pdb
PROGRESS CODE: V03040002 I0
Error: Image at 0006AE0B000 start failed: Unsupported
PDB = c:\efi\servergen2\intel\Build\EagleStreamRpPkg\DEBUG_VS2015x86\X64\IntelSiliconPkg\Feature\VTd\IntelVTdDxe\IntelVTdDxe\DEBUG\IntelVTdDxe.pdb
PROGRESS CODE: V03040003 I0
PDB = c:\efi\servergen2\intel\Build\EagleStreamRpPkg\DEBUG_VS2015x86\X64\ClientOneSiliconPkg\IpBlock\Sps\Heci\HeciLegacyDxe\HeciLegacyDxe\DEBUG\HeciLegacyDxe.pdb
PROGRESS CODE: V03040002 I0
PROGRESS CODE: V03040003 I0
PDB = c:\efi\servergen2\intel\Build\EagleStreamRpPkg\DEBUG_VS2015x86\X64\MdeModulePkg\Core\PiSmmCore\PiSmmIpl\DEBUG\PiSmmIpl.pdb
PROGRESS CODE: V03040002 I0
ConvertPages: failed to find range 78000000 - 7FFFFFFF
PDB = c:\efi\servergen2\intel\Build\EagleStreamRpPkg\DEBUG_VS2015x86\X64\MdeModulePkg\Core\PiSmmCore\PiSmmCore\DEBUG\PiSmmCore.pdb
[SIO] Current system SIO exist bit:10
PROGRESS CODE: V03040003 I0
PDB = c:\efi\servergen2\intel\Build\EagleStreamRpPkg\DEBUG_VS2015x86\X64\ServerSiliconPkg\Universal\Smm\CsrPseudoOffsetInit\CsrPseudoOffsetInitSmm\DEBUG\CsrPseudoOffsetInitSmm.pdb
PDB = c:\efi\servergen2\intel\Build\EagleStreamRpPkg\DEBUG_VS2015x86\X64\ServerSiliconPkg\Universal\Smm\SiliconDataInit\SiliconDataInitSmm\DEBUG\SiliconDataInitSmm.pdb
PDB = c:\efi\servergen2\intel\Build\EagleStreamRpPkg\DEBUG_VS2015x86\X64\ServerSiliconPkg\Universal\Smm\SpdPlatformInfoSmm\SpdPlatformInfoSmm\DEBUG\SpdPlatformInfoSmm.pdb
PDB = c:\efi\servergen2\intel\Build\EagleStreamRpPkg\DEBUG_VS2015x86\X64\MdeModulePkg\Universal\ReportStatusCodeRouter\Smm\ReportStatusCodeRouterSmm\DEBUG\ReportStatusCodeRouterSmm.pdb
PDB = c:\efi\servergen2\intel\Build\EagleStreamRpPkg\DEBUG_VS2015x86\X64\MdeModulePkg\Universal\Variable\RuntimeDxe\VariableSmm\DEBUG\VariableSmm.pdb
PDB = c:\efi\servergen2\intel\Build\EagleStreamRpPkg\DEBUG_VS2015x86\X64\UefiCpuPkg\CpuIo2Smm\CpuIo2Smm\DEBUG\CpuIo2Smm.pdb
PDB = c:\efi\servergen2\intel\Build\EagleStreamRpPkg\DEBUG_VS2015x86\X64\MdeModulePkg\Universal\LockBox\SmmLockBox\SmmLockBox\DEBUG\SmmLockBox.pdb
PDB = c:\efi\servergen2\intel\Build\EagleStreamRpPkg\DEBUG_VS2015x86\X64\CpRcPkg\Universal\RegAccess\Smm\RegAccessSMM\DEBUG\RegAccessSMM.pdb
PDB = c:\efi\servergen2\intel\Build\EagleStreamRpPkg\DEBUG_VS2015x86\X64\ServerPlatformPkg\Universal\TraceHubStatusCodeHandler\Smm\TraceHubStatusCodeHandlerSmm\DEBUG\TraceHubStatusCodeHandlerSmm.pdb
PDB = c:\efi\servergen2\intel\Build\EagleStreamRpPkg\DEBUG_VS2015x86\X64\MdeModulePkg\Universal\Acpi\FirmwarePerformanceDataTableSmm\FirmwarePerformanceSmm\DEBUG\FirmwarePerformanceSmm.pdb
PDB = c:\efi\servergen2\intel\Build\EagleStreamRpPkg\DEBUG_VS2015x86\X64\ServerPlatformPkg\Features\Variable\PlatformVariable\Smm\PlatformSecureVariableSmm\DEBUG\PlatformSecureVariableSmm.pdb
PDB = c:\efi\servergen2\intel\Build\EagleStreamRpPkg\DEBUG_VS2015x86\X64\ServerSiliconPkg\Universal\Dxe\CpuCsrAccess\CpuCsrAccessSMM\DEBUG\CpuCsrAccessSMM.pdb
PDB = c:\efi\servergen2\intel\Build\EagleStreamRpPkg\DEBUG_VS2015x86\X64\ClientOneSiliconPkg\IpBlock\Smbus\Smm\SmbusSmm\DEBUG\SmbusSmm.pdb
PDB = c:\efi\servergen2\intel\Build\EagleStreamRpPkg\DEBUG_VS2015x86\X64\ClientOneSiliconPkg\IpBlock\Sps\Heci\HeciAccess\DxeSmm\HeciAccessSmm\DEBUG\HeciAccessSmm.pdb
PDB = c:\efi\servergen2\intel\Build\EagleStreamRpPkg\DEBUG_VS2015x86\X64\MdeModulePkg\Universal\StatusCodeHandler\Smm\StatusCodeHandlerSmm\DEBUG\StatusCodeHandlerSmm.pdb
PROGRESS CODE: V03070003 I0
PDB = c:\efi\servergen2\intel\Build\EagleStreamRpPkg\DEBUG_VS2015x86\X64\ServerPlatformPkg\Features\Bmc\PlatformHookSpiAccess\PlatformHookSpiAccessSmm\DEBUG\PlatformHookSpiAccessSmm.pdb
PROGRESS CODE: V03070002 I0
PROGRESS CODE: V03070003 I0
PDB = c:\efi\servergen2\intel\Build\EagleStreamRpPkg\DEBUG_VS2015x86\X64\ClientOneSiliconPkg\IpBlock\Me\HeciTransport\DxeSmm\HeciTransportSmm\DEBUG\HeciTransportSmm.pdb
PROGRESS CODE: V03070002 I0
PROGRESS CODE: V03070003 I0
PDB = c:\efi\servergen2\intel\Build\EagleStreamRpPkg\DEBUG_VS2015x86\X64\ClientOneSiliconPkg\IpBlock\Sps\Heci\HeciControl\DxeSmm\HeciControlSmm\DEBUG\HeciControlSmm.pdb
PROGRESS CODE: V03070002 I0
Initialization is allowed
Initialization is allowed
PROGRESS CODE: V03070003 I0
PDB = c:\efi\servergen2\intel\Build\EagleStreamRpPkg\DEBUG_VS2015x86\X64\ServerSiliconPkg\Universal\Dxe\PmemResetNotify\PmemResetNotify\DEBUG\PmemResetNotify.pdb
PROGRESS CODE: V03040002 I0
[PMem](DXE) PMem Always-ON 12v support disabled
[PMem](DXE) PMem reset notification driver init failed (status Aborted)
Error: Image at 00076AD7000 start failed: Aborted
PDB = c:\efi\servergen2\intel\Build\EagleStreamRpPkg\DEBUG_VS2015x86\X64\ServerSiliconPkg\Universal\Dxe\PmemResetNotify\PmemResetNotify\DEBUG\PmemResetNotify.pdb
PROGRESS CODE: V03040003 I0
PDB = c:\efi\servergen2\intel\Build\EagleStreamRpPkg\DEBUG_VS2015x86\X64\ServerSiliconPkg\Universal\Dxe\CrystalRidge\CrystalRidgeMeasurement\DEBUG\CrystalRidgeMeasurement.pdb
PROGRESS CODE: V03040002 I0
PROGRESS CODE: V03040003 I0
PDB = c:\efi\servergen2\intel\Build\EagleStreamRpPkg\DEBUG_VS2015x86\X64\ClientOneSiliconPkg\IpBlock\Spi\Dxe\SpiSmmDxe\DEBUG\SpiDxe.pdb
PROGRESS CODE: V03040002 I0
PROGRESS CODE: V03040003 I0
PDB = c:\efi\servergen2\intel\Build\EagleStreamRpPkg\DEBUG_VS2015x86\X64\ClientOneSiliconPkg\IpBlock\Me\HwAsset\Dxe\HwAssetDxe\DEBUG\HwAssetDxe.pdb
PROGRESS CODE: V03040002 I0
Error: Image at 0006A8A0000 start failed: Unsupported
PDB = c:\efi\servergen2\intel\Build\EagleStreamRpPkg\DEBUG_VS2015x86\X64\ClientOneSiliconPkg\IpBlock\Me\HwAsset\Dxe\HwAssetDxe\DEBUG\HwAssetDxe.pdb
PROGRESS CODE: V03040003 I0
PDB = c:\efi\servergen2\intel\Build\EagleStreamRpPkg\DEBUG_VS2015x86\X64\ClientOneSiliconPkg\IpBlock\Me\Asf\Dxe\AsfDxe\DEBUG\AsfDxe.pdb
PROGRESS CODE: V03040002 I0
Error: Image at 0006A8A4000 start failed: Unsupported
PDB = c:\efi\servergen2\intel\Build\EagleStreamRpPkg\DEBUG_VS2015x86\X64\ClientOneSiliconPkg\IpBlock\Me\Asf\Dxe\AsfDxe\DEBUG\AsfDxe.pdb
PROGRESS CODE: V03040003 I0
PDB = c:\efi\servergen2\intel\Build\EagleStreamRpPkg\DEBUG_VS2015x86\X64\ServerSiliconPkg\Me\Client\BiosExtensionLoader\Dxe\BiosExtensionLoader\DEBUG\BiosExtensionLoader.pdb
PROGRESS CODE: V03040002 I0
Error: Image at 0006A8A0000 start failed: Unsupported
PDB = c:\efi\servergen2\intel\Build\EagleStreamRpPkg\DEBUG_VS2015x86\X64\ServerSiliconPkg\Me\Client\BiosExtensionLoader\Dxe\BiosExtensionLoader\DEBUG\BiosExtensionLoader.pdb
PROGRESS CODE: V03040003 I0
PDB = c:\efi\servergen2\intel\Build\EagleStreamRpPkg\DEBUG_VS2015x86\X64\MdeModulePkg\Universal\Variable\RuntimeDxe\VariableSmmRuntimeDxe\DEBUG\VariableSmmRuntimeDxe.pdb
PROGRESS CODE: V03040002 I0
PROGRESS CODE: V03040003 I0
PDB = c:\efi\servergen2\intel\Build\EagleStreamRpPkg\DEBUG_VS2015x86\X64\MdeModulePkg\Universal\Acpi\BootScriptExecutorDxe\BootScriptExecutorDxe\DEBUG\BootScriptExecutorDxe.pdb
PROGRESS CODE: V03040002 I0
[SIO] Current system SIO exist bit:10
PROGRESS CODE: V03040003 I0
PDB = c:\efi\servergen2\intel\Build\EagleStreamRpPkg\DEBUG_VS2015x86\X64\ServerPlatformPkg\Features\IPMI\GenericIpmi\Dxe\GenericIpmi\DEBUG\GenericIpmi.pdb
PROGRESS CODE: V03040002 I0
[IPMI] mIpmiInstance->KcsTimeoutPeriod: 0x186A0
[IPMI] BMC Device ID: 0x23, firmware version: 2.03 UpdateMode:1
[IPMI] BMC in Forced Update mode, skip waiting for BMC_READY.
PROGRESS CODE: V03040003 I0
PDB = c:\efi\servergen2\intel\Build\EagleStreamRpPkg\DEBUG_VS2015x86\X64\EagleStreamRpPkg\Platform\Dxe\SmbiosRpTable\SmbiosRpTable\DEBUG\SmbiosRpTable.pdb
PROGRESS CODE: V03040002 I0
Allocated Communication Buffer address = 775B9000
Smbios protocol addition (Type 133) returns Success
PROGRESS CODE: V03040003 I0
PDB = c:\efi\servergen2\intel\Build\EagleStreamRpPkg\DEBUG_VS2015x86\X64\ServerPlatformPkg\Features\Cpu\Dxe\PlatformCpuPolicyDxe\PlatformCpuPolicyDxe\DEBUG\PlatformCpuPolicyDxe.pdb
PROGRESS CODE: V03040002 I0
Common PPM policy update, PackageCState:3
PROGRESS CODE: V03040003 I0
PDB = c:\efi\servergen2\intel\Build\EagleStreamRpPkg\DEBUG_VS2015x86\X64\ServerPlatformPkg\Platform\Dxe\PolicyInitDxe\PolicyInitDxe\DEBUG\PolicyInitDxe.pdb
PROGRESS CODE: V03040002 I0
[HECI] DxeMeServerPolicy (MeType is ME_TYPE_SPS)
PROGRESS CODE: V03040003 I0
PDB = c:\efi\servergen2\intel\Build\EagleStreamRpPkg\DEBUG_VS2015x86\X64\SecurityPkg\Tcg\Tcg2Dxe\Tcg2Dxe\DEBUG\Tcg2Dxe.pdb
PROGRESS CODE: V03040002 I0
PROGRESS CODE: V03040003 I0
PDB = c:\efi\servergen2\intel\Build\EagleStreamRpPkg\DEBUG_VS2015x86\X64\ServerPlatformPkg\Platform\Dxe\SmbiosMiscDxe\SmbiosMiscDxe\DEBUG\SmbiosMiscDxe.pdb
PROGRESS CODE: V03040002 I0
PROGRESS CODE: V03040003 I0
PDB = c:\efi\servergen2\intel\Build\EagleStreamRpPkg\DEBUG_VS2015x86\X64\EagleStreamOpenBoardPkg\Platform\Dxe\PlatformVTdSampleDxe\PlatformVTdSampleDxe\DEBUG\PlatformVTdSampleDxe.pdb
PROGRESS CODE: V03040002 I0
PROGRESS CODE: V03040003 I0
PDB = c:\efi\servergen2\intel\Build\EagleStreamRpPkg\DEBUG_VS2015x86\X64\ServerPlatformPkg\Features\Bmc\OsTransparentUpdate\OsTransparentUpdate\DEBUG\OsTransparentUpdate.pdb
PROGRESS CODE: V03040002 I0
PROGRESS CODE: V03040003 I0
PDB = c:\efi\servergen2\intel\Build\EagleStreamRpPkg\DEBUG_VS2015x86\X64\ClientOneSiliconPkg\IpBlock\Sps\Sps\Smm\SpsSmm\DEBUG\SpsSmm.pdb
PROGRESS CODE: V03070002 I0
[HECI Transport-1 SMM] Send pkt: 80040007
00: FF 02 00 00
[HECI Transport-1 SMM] Got pkt: 80140007
00: FF 82 00 00 00 00 06 18 - 00 01 03 00 00 00 06 18
10: 00 01 03 00
HeciBufferClear (): HeciCsrHost 0x806C6C09 (Clear H_RDY)
HeciBufferClear (): HeciCsrHost 0x806C6C01 (CBLength = 128, H_RDY = 0)
[HECI Transport-1 SMM] Send pkt: 80080007
00: 05 02 00 00 00 00 00 00
[HECI Transport-1 SMM] Got pkt: 80180007
00: 05 82 00 00 53 17 4F 7C - 90 FB 48 D7 00 00 00 00
10: 00 40 1A 00 00 00 00 00
HeciBufferClear (): HeciCsrHost 0x80030309 (Clear H_RDY)
HeciBufferClear (): HeciCsrHost 0x80030301 (CBLength = 128, H_RDY = 0)
PROGRESS CODE: V03070003 I0
PDB = c:\efi\servergen2\intel\Build\EagleStreamRpPkg\DEBUG_VS2015x86\X64\UefiCpuPkg\PiSmmCpuDxeSmm\PiSmmCpuDxeSmm\DEBUG\PiSmmCpuDxeSmm.pdb
PROGRESS CODE: V03070002 I0
PROGRESS CODE: V00011008 I0
PROGRESS CODE: V03070003 I0
PDB = c:\efi\servergen2\intel\Build\EagleStreamRpPkg\DEBUG_VS2015x86\X64\ClientOneSiliconPkg\Pch\PchSmiDispatcher\Smm\PchSmiDispatcherServer\DEBUG\PchSmiDispatcher.pdb
PROGRESS CODE: V03070002 I0
PROGRESS CODE: V03070003 I0
PDB = c:\efi\servergen2\intel\Build\EagleStreamRpPkg\DEBUG_VS2015x86\X64\ClientOneSiliconPkg\IpBlock\Spi\Smm\SpiSmm\DEBUG\SpiSmm.pdb
PROGRESS CODE: V03070002 I0
PROGRESS CODE: V03070003 I0
PDB = c:\efi\servergen2\intel\Build\EagleStreamRpPkg\DEBUG_VS2015x86\X64\ServerPlatformPkg\Platform\DxeSmm\BiosGuard\BiosGuardServices\DEBUG\BiosGuardServices.pdb
PROGRESS CODE: V03070002 I0
PROGRESS CODE: V03070003 I0
PDB = c:\efi\servergen2\intel\Build\EagleStreamRpPkg\DEBUG_VS2015x86\X64\ServerRasPkg\Driver\Smm\RasAcpi\RasAcpi\DEBUG\RasAcpi.pdb
PROGRESS CODE: V03070002 I0
PROGRESS CODE: V03070003 I0
PDB = c:\efi\servergen2\intel\Build\EagleStreamRpPkg\DEBUG_VS2015x86\X64\ServerSiliconPkg\Universal\Smm\OobMsmSmm\OobMsmSmm\DEBUG\OobMsmSmm.pdb
PROGRESS CODE: V03070002 I0
OobMsmSmmDriverEntry(): Enter Entrypoint
PROGRESS CODE: V03070003 I0
PDB = c:\efi\servergen2\intel\Build\EagleStreamRpPkg\DEBUG_VS2015x86\X64\ServerSiliconPkg\Universal\Smm\PlatformResetNotify\PlatformResetNotifySmm\DEBUG\PlatformResetNotifySmm.pdb
PROGRESS CODE: V03070002 I0
PROGRESS CODE: V03070003 I0
PDB = c:\efi\servergen2\intel\Build\EagleStreamRpPkg\DEBUG_VS2015x86\X64\ClientOneSiliconPkg\Pch\PchInit\Smm\PchInitSmm\DEBUG\PchInitSmm.pdb
PROGRESS CODE: V03070002 I0
PROGRESS CODE: V03070003 I0
PDB = c:\efi\servergen2\intel\Build\EagleStreamRpPkg\DEBUG_VS2015x86\X64\ServerSecurityPkg\Pfr\Restricted\DebugTool\PxdSmm\DEBUG\PxdSmmDriver.pdb
PROGRESS CODE: V03070002 I0
[PxdSmm.c] PxdSmmDriverEntry() {
[PxdSmm.c] PxdSmmDriverEntry() } Success
PROGRESS CODE: V03070003 I0
PDB = c:\efi\servergen2\intel\Build\EagleStreamRpPkg\DEBUG_VS2015x86\X64\ServerPlatformPkg\Platform\SpiFvbServices\PlatformSmmSpi\DEBUG\FwBlockServiceSmm.pdb
PROGRESS CODE: V03070002 I0
PROGRESS CODE: V03070003 I0
PDB = c:\efi\servergen2\intel\Build\EagleStreamRpPkg\DEBUG_VS2015x86\X64\ServerRestrictedPkg\VariableSmi\VariableSmiSmm\DEBUG\VariableSmiSmm.pdb
PROGRESS CODE: V03070002 I0
PROGRESS CODE: V03070003 I0
PDB = c:\efi\servergen2\intel\Build\EagleStreamRpPkg\DEBUG_VS2015x86\X64\ServerPlatformPkg\Platform\Dxe\PlatformPowerButton\PlatformPowerButton\DEBUG\PowerButtonHandler.pdb
PROGRESS CODE: V03070002 I0
PROGRESS CODE: V03070003 I0
PDB = c:\efi\servergen2\intel\Build\EagleStreamRpPkg\DEBUG_VS2015x86\X64\SecurityPkg\Tcg\Tcg2Smm\Tcg2Smm\DEBUG\Tcg2Smm.pdb
PROGRESS CODE: V03070002 I0
PROGRESS CODE: V03070003 I0
PDB = c:\efi\servergen2\intel\Build\EagleStreamRpPkg\DEBUG_VS2015x86\X64\UefiCpuPkg\PiSmmCommunication\PiSmmCommunicationSmm\DEBUG\PiSmmCommunicationSmm.pdb
PROGRESS CODE: V03070002 I0
PROGRESS CODE: V03070003 I0
PDB = c:\efi\servergen2\intel\Build\EagleStreamRpPkg\DEBUG_VS2015x86\X64\ServerRasPkg\Driver\Smm\AddressTranslationDsm\AddressTranslationDsm\DEBUG\AddressTranslationDsm.pdb
PROGRESS CODE: V03070002 I0
[GetNmCaching] NM caching Cfg:B OffData:0 IntLv:458
[GetNmCaching] NM caching Cfg:B OffData:0 IntLv:40458
[GetNmCaching] NM caching Cfg:B OffData:0 IntLv:80458
[GetNmCaching] NM caching Cfg:B OffData:0 IntLv:C0458
[GetNmCaching] NM caching Cfg:B OffData:0 IntLv:100458
[GetNmCaching] NM caching Cfg:B OffData:0 IntLv:140458
[GetNmCaching] NM caching Cfg:B OffData:0 IntLv:180458
[GetNmCaching] NM caching Cfg:B OffData:0 IntLv:1C0458
[GetNmCaching] NM caching Cfg:B OffData:80000022 IntLv:458
[GetNmCaching] NM caching Cfg:B OffData:80000022 IntLv:40458
[GetNmCaching] NM caching Cfg:B OffData:80000022 IntLv:80458
[GetNmCaching] NM caching Cfg:B OffData:80000022 IntLv:C0458
[GetNmCaching] NM caching Cfg:B OffData:80000022 IntLv:100458
[GetNmCaching] NM caching Cfg:B OffData:80000022 IntLv:140458
[GetNmCaching] NM caching Cfg:B OffData:80000022 IntLv:180458
[GetNmCaching] NM caching Cfg:B OffData:80000022 IntLv:1C0458
[GetNmCaching] NM caching Cfg:B OffData:80000042 IntLv:458
[GetNmCaching] NM caching Cfg:B OffData:80000042 IntLv:40458
[GetNmCaching] NM caching Cfg:B OffData:80000042 IntLv:80458
[GetNmCaching] NM caching Cfg:B OffData:80000042 IntLv:C0458
[GetNmCaching] NM caching Cfg:B OffData:80000042 IntLv:100458
[GetNmCaching] NM caching Cfg:B OffData:80000042 IntLv:140458
[GetNmCaching] NM caching Cfg:B OffData:80000042 IntLv:180458
[GetNmCaching] NM caching Cfg:B OffData:80000042 IntLv:1C0458
[GetNmCaching] NM caching Cfg:B OffData:80000062 IntLv:458
[GetNmCaching] NM caching Cfg:B OffData:80000062 IntLv:40458
[GetNmCaching] NM caching Cfg:B OffData:80000062 IntLv:80458
[GetNmCaching] NM caching Cfg:B OffData:80000062 IntLv:C0458
[GetNmCaching] NM caching Cfg:B OffData:80000062 IntLv:100458
[GetNmCaching] NM caching Cfg:B OffData:80000062 IntLv:140458
[GetNmCaching] NM caching Cfg:B OffData:80000062 IntLv:180458
[GetNmCaching] NM caching Cfg:B OffData:80000062 IntLv:1C0458
[GetNmCaching] NM caching Cfg:B OffData:80000082 IntLv:458
[GetNmCaching] NM caching Cfg:B OffData:80000082 IntLv:40458
[GetNmCaching] NM caching Cfg:B OffData:80000082 IntLv:80458
[GetNmCaching] NM caching Cfg:B OffData:80000082 IntLv:C0458
[GetNmCaching] NM caching Cfg:B OffData:80000082 IntLv:100458
[GetNmCaching] NM caching Cfg:B OffData:80000082 IntLv:140458
[GetNmCaching] NM caching Cfg:B OffData:80000082 IntLv:180458
[GetNmCaching] NM caching Cfg:B OffData:80000082 IntLv:1C0458
[GetNmCaching] NM caching Cfg:B OffData:800000A2 IntLv:458
[GetNmCaching] NM caching Cfg:B OffData:800000A2 IntLv:40458
[GetNmCaching] NM caching Cfg:B OffData:800000A2 IntLv:80458
[GetNmCaching] NM caching Cfg:B OffData:800000A2 IntLv:C0458
[GetNmCaching] NM caching Cfg:B OffData:800000A2 IntLv:100458
[GetNmCaching] NM caching Cfg:B OffData:800000A2 IntLv:140458
[GetNmCaching] NM caching Cfg:B OffData:800000A2 IntLv:180458
[GetNmCaching] NM caching Cfg:B OffData:800000A2 IntLv:1C0458
[GetNmCaching] NM caching Cfg:B OffData:800000C2 IntLv:458
[GetNmCaching] NM caching Cfg:B OffData:800000C2 IntLv:40458
[GetNmCaching] NM caching Cfg:B OffData:800000C2 IntLv:80458
[GetNmCaching] NM caching Cfg:B OffData:800000C2 IntLv:C0458
[GetNmCaching] NM caching Cfg:B OffData:800000C2 IntLv:100458
[GetNmCaching] NM caching Cfg:B OffData:800000C2 IntLv:140458
[GetNmCaching] NM caching Cfg:B OffData:800000C2 IntLv:180458
[GetNmCaching] NM caching Cfg:B OffData:800000C2 IntLv:1C0458
[GetNmCaching] NM caching Cfg:B OffData:800000E2 IntLv:458
[GetNmCaching] NM caching Cfg:B OffData:800000E2 IntLv:40458
[GetNmCaching] NM caching Cfg:B OffData:800000E2 IntLv:80458
[GetNmCaching] NM caching Cfg:B OffData:800000E2 IntLv:C0458
[GetNmCaching] NM caching Cfg:B OffData:800000E2 IntLv:100458
[GetNmCaching] NM caching Cfg:B OffData:800000E2 IntLv:140458
[GetNmCaching] NM caching Cfg:B OffData:800000E2 IntLv:180458
[GetNmCaching] NM caching Cfg:B OffData:800000E2 IntLv:1C0458
PROGRESS CODE: V03070003 I0
PDB = c:\efi\servergen2\intel\Build\EagleStreamRpPkg\DEBUG_VS2015x86\X64\SmmRuntimeUpdateFeaturePkg\SmmRuntimeUpdate\SmmCodeInjection\DEBUG\SmmRuntimUpdate.pdb
PROGRESS CODE: V03070002 I0
PROGRESS CODE: V03070003 I0
PDB = c:\efi\servergen2\intel\Build\EagleStreamRpPkg\DEBUG_VS2015x86\X64\ServerSiliconPkg\Universal\Dxe\PmemResetNotify\PmemResetNotifySmm\DEBUG\PmemResetNotifySmm.pdb
PROGRESS CODE: V03070002 I0
[PMem](SMM) PMem Always-ON 12v support disabled
[PMem](SMM) PMem reset notification driver init failed (status Aborted)
Error: SMM image at 0007EC2D000 start failed: Aborted
PROGRESS CODE: V03070003 I0
PDB = c:\efi\servergen2\intel\Build\EagleStreamRpPkg\DEBUG_VS2015x86\X64\MdeModulePkg\Universal\FaultTolerantWriteDxe\FaultTolerantWriteSmm\DEBUG\SmmFaultTolerantWriteDxe.pdb
PROGRESS CODE: V03070002 I0
PROGRESS CODE: V03070003 I0
PDB = c:\efi\servergen2\intel\Build\EagleStreamRpPkg\DEBUG_VS2015x86\X64\ServerSiliconPkg\Cpu\SiCpuInit\Dxe\SiCpuInitDxe\DEBUG\SiCpuInitDxe.pdb
PROGRESS CODE: V03040002 I0
GetProcessorInfo - Index - 0
GetProcessorInfo - ProcessorId - 0000000000000000
GetProcessorInfo - StatusFlag - 00000007
GetProcessorInfo - Location.Package - 00000000
GetProcessorInfo - Location.Core - 00000000
GetProcessorInfo - Location.Thread - 00000000
GetProcessorInfo - Location2.Package - 00000000
GetProcessorInfo - Location2.Die - 00000000
GetProcessorInfo - Location2.Tile - 00000000
GetProcessorInfo - Location2.Module - 00000000
GetProcessorInfo - Location2.Core - 00000000
GetProcessorInfo - Location2.Thread - 00000000
GetProcessorInfo - Index - 1
GetProcessorInfo - ProcessorId - 0000000000000001
GetProcessorInfo - StatusFlag - 00000006
GetProcessorInfo - Location.Package - 00000000
GetProcessorInfo - Location.Core - 00000000
GetProcessorInfo - Location.Thread - 00000001
GetProcessorInfo - Location2.Package - 00000000
GetProcessorInfo - Location2.Die - 00000000
GetProcessorInfo - Location2.Tile - 00000000
GetProcessorInfo - Location2.Module - 00000000
GetProcessorInfo - Location2.Core - 00000000
GetProcessorInfo - Location2.Thread - 00000001
GetProcessorInfo - Index - 2
GetProcessorInfo - ProcessorId - 0000000000000002
GetProcessorInfo - StatusFlag - 00000006
GetProcessorInfo - Location.Package - 00000000
GetProcessorInfo - Location.Core - 00000001
GetProcessorInfo - Location.Thread - 00000000
GetProcessorInfo - Location2.Package - 00000000
GetProcessorInfo - Location2.Die - 00000000
GetProcessorInfo - Location2.Tile - 00000000
GetProcessorInfo - Location2.Module - 00000000
GetProcessorInfo - Location2.Core - 00000001
GetProcessorInfo - Location2.Thread - 00000000
GetProcessorInfo - Index - 3
GetProcessorInfo - ProcessorId - 0000000000000003
GetProcessorInfo - StatusFlag - 00000006
GetProcessorInfo - Location.Package - 00000000
GetProcessorInfo - Location.Core - 00000001
GetProcessorInfo - Location.Thread - 00000001
GetProcessorInfo - Location2.Package - 00000000
GetProcessorInfo - Location2.Die - 00000000
GetProcessorInfo - Location2.Tile - 00000000
GetProcessorInfo - Location2.Module - 00000000
GetProcessorInfo - Location2.Core - 00000001
GetProcessorInfo - Location2.Thread - 00000001
GetProcessorInfo - Index - 4
GetProcessorInfo - ProcessorId - 0000000000000004
GetProcessorInfo - StatusFlag - 00000006
GetProcessorInfo - Location.Package - 00000000
GetProcessorInfo - Location.Core - 00000002
GetProcessorInfo - Location.Thread - 00000000
GetProcessorInfo - Location2.Package - 00000000
GetProcessorInfo - Location2.Die - 00000000
GetProcessorInfo - Location2.Tile - 00000000
GetProcessorInfo - Location2.Module - 00000000
GetProcessorInfo - Location2.Core - 00000002
GetProcessorInfo - Location2.Thread - 00000000
GetProcessorInfo - Index - 5
GetProcessorInfo - ProcessorId - 0000000000000005
GetProcessorInfo - StatusFlag - 00000006
GetProcessorInfo - Location.Package - 00000000
GetProcessorInfo - Location.Core - 00000002
GetProcessorInfo - Location.Thread - 00000001
GetProcessorInfo - Location2.Package - 00000000
GetProcessorInfo - Location2.Die - 00000000
GetProcessorInfo - Location2.Tile - 00000000
GetProcessorInfo - Location2.Module - 00000000
GetProcessorInfo - Location2.Core - 00000002
GetProcessorInfo - Location2.Thread - 00000001
GetProcessorInfo - Index - 6
GetProcessorInfo - ProcessorId - 0000000000000006
GetProcessorInfo - StatusFlag - 00000006
GetProcessorInfo - Location.Package - 00000000
GetProcessorInfo - Location.Core - 00000003
GetProcessorInfo - Location.Thread - 00000000
GetProcessorInfo - Location2.Package - 00000000
GetProcessorInfo - Location2.Die - 00000000
GetProcessorInfo - Location2.Tile - 00000000
GetProcessorInfo - Location2.Module - 00000000
GetProcessorInfo - Location2.Core - 00000003
GetProcessorInfo - Location2.Thread - 00000000
GetProcessorInfo - Index - 7
GetProcessorInfo - ProcessorId - 0000000000000007
GetProcessorInfo - StatusFlag - 00000006
GetProcessorInfo - Location.Package - 00000000
GetProcessorInfo - Location.Core - 00000003
GetProcessorInfo - Location.Thread - 00000001
GetProcessorInfo - Location2.Package - 00000000
GetProcessorInfo - Location2.Die - 00000000
GetProcessorInfo - Location2.Tile - 00000000
GetProcessorInfo - Location2.Module - 00000000
GetProcessorInfo - Location2.Core - 00000003
GetProcessorInfo - Location2.Thread - 00000001
GetProcessorInfo - Index - 8
GetProcessorInfo - ProcessorId - 0000000000000008
GetProcessorInfo - StatusFlag - 00000006
GetProcessorInfo - Location.Package - 00000000
GetProcessorInfo - Location.Core - 00000004
GetProcessorInfo - Location.Thread - 00000000
GetProcessorInfo - Location2.Package - 00000000
GetProcessorInfo - Location2.Die - 00000000
GetProcessorInfo - Location2.Tile - 00000000
GetProcessorInfo - Location2.Module - 00000000
GetProcessorInfo - Location2.Core - 00000004
GetProcessorInfo - Location2.Thread - 00000000
GetProcessorInfo - Index - 9
GetProcessorInfo - ProcessorId - 0000000000000009
GetProcessorInfo - StatusFlag - 00000006
GetProcessorInfo - Location.Package - 00000000
GetProcessorInfo - Location.Core - 00000004
GetProcessorInfo - Location.Thread - 00000001
GetProcessorInfo - Location2.Package - 00000000
GetProcessorInfo - Location2.Die - 00000000
GetProcessorInfo - Location2.Tile - 00000000
GetProcessorInfo - Location2.Module - 00000000
GetProcessorInfo - Location2.Core - 00000004
GetProcessorInfo - Location2.Thread - 00000001
GetProcessorInfo - Index - A
GetProcessorInfo - ProcessorId - 000000000000000A
GetProcessorInfo - StatusFlag - 00000006
GetProcessorInfo - Location.Package - 00000000
GetProcessorInfo - Location.Core - 00000005
GetProcessorInfo - Location.Thread - 00000000
GetProcessorInfo - Location2.Package - 00000000
GetProcessorInfo - Location2.Die - 00000000
GetProcessorInfo - Location2.Tile - 00000000
GetProcessorInfo - Location2.Module - 00000000
GetProcessorInfo - Location2.Core - 00000005
GetProcessorInfo - Location2.Thread - 00000000
GetProcessorInfo - Index - B
GetProcessorInfo - ProcessorId - 000000000000000B
GetProcessorInfo - StatusFlag - 00000006
GetProcessorInfo - Location.Package - 00000000
GetProcessorInfo - Location.Core - 00000005
GetProcessorInfo - Location.Thread - 00000001
GetProcessorInfo - Location2.Package - 00000000
GetProcessorInfo - Location2.Die - 00000000
GetProcessorInfo - Location2.Tile - 00000000
GetProcessorInfo - Location2.Module - 00000000
GetProcessorInfo - Location2.Core - 00000005
GetProcessorInfo - Location2.Thread - 00000001
GetProcessorInfo - Index - C
GetProcessorInfo - ProcessorId - 000000000000000C
GetProcessorInfo - StatusFlag - 00000006
GetProcessorInfo - Location.Package - 00000000
GetProcessorInfo - Location.Core - 00000006
GetProcessorInfo - Location.Thread - 00000000
GetProcessorInfo - Location2.Package - 00000000
GetProcessorInfo - Location2.Die - 00000000
GetProcessorInfo - Location2.Tile - 00000000
GetProcessorInfo - Location2.Module - 00000000
GetProcessorInfo - Location2.Core - 00000006
GetProcessorInfo - Location2.Thread - 00000000
GetProcessorInfo - Index - D
GetProcessorInfo - ProcessorId - 000000000000000D
GetProcessorInfo - StatusFlag - 00000006
GetProcessorInfo - Location.Package - 00000000
GetProcessorInfo - Location.Core - 00000006
GetProcessorInfo - Location.Thread - 00000001
GetProcessorInfo - Location2.Package - 00000000
GetProcessorInfo - Location2.Die - 00000000
GetProcessorInfo - Location2.Tile - 00000000
GetProcessorInfo - Location2.Module - 00000000
GetProcessorInfo - Location2.Core - 00000006
GetProcessorInfo - Location2.Thread - 00000001
GetProcessorInfo - Index - E
GetProcessorInfo - ProcessorId - 000000000000000E
GetProcessorInfo - StatusFlag - 00000006
GetProcessorInfo - Location.Package - 00000000
GetProcessorInfo - Location.Core - 00000007
GetProcessorInfo - Location.Thread - 00000000
GetProcessorInfo - Location2.Package - 00000000
GetProcessorInfo - Location2.Die - 00000000
GetProcessorInfo - Location2.Tile - 00000000
GetProcessorInfo - Location2.Module - 00000000
GetProcessorInfo - Location2.Core - 00000007
GetProcessorInfo - Location2.Thread - 00000000
GetProcessorInfo - Index - F
GetProcessorInfo - ProcessorId - 000000000000000F
GetProcessorInfo - StatusFlag - 00000006
GetProcessorInfo - Location.Package - 00000000
GetProcessorInfo - Location.Core - 00000007
GetProcessorInfo - Location.Thread - 00000001
GetProcessorInfo - Location2.Package - 00000000
GetProcessorInfo - Location2.Die - 00000000
GetProcessorInfo - Location2.Tile - 00000000
GetProcessorInfo - Location2.Module - 00000000
GetProcessorInfo - Location2.Core - 00000007
GetProcessorInfo - Location2.Thread - 00000001
GetProcessorInfo - Index - 10
GetProcessorInfo - ProcessorId - 0000000000000010
GetProcessorInfo - StatusFlag - 00000006
GetProcessorInfo - Location.Package - 00000000
GetProcessorInfo - Location.Core - 00000008
GetProcessorInfo - Location.Thread - 00000000
GetProcessorInfo - Location2.Package - 00000000
GetProcessorInfo - Location2.Die - 00000000
GetProcessorInfo - Location2.Tile - 00000000
GetProcessorInfo - Location2.Module - 00000000
GetProcessorInfo - Location2.Core - 00000008
GetProcessorInfo - Location2.Thread - 00000000
GetProcessorInfo - Index - 11
GetProcessorInfo - ProcessorId - 0000000000000011
GetProcessorInfo - StatusFlag - 00000006
GetProcessorInfo - Location.Package - 00000000
GetProcessorInfo - Location.Core - 00000008
GetProcessorInfo - Location.Thread - 00000001
GetProcessorInfo - Location2.Package - 00000000
GetProcessorInfo - Location2.Die - 00000000
GetProcessorInfo - Location2.Tile - 00000000
GetProcessorInfo - Location2.Module - 00000000
GetProcessorInfo - Location2.Core - 00000008
GetProcessorInfo - Location2.Thread - 00000001
GetProcessorInfo - Index - 12
GetProcessorInfo - ProcessorId - 0000000000000012
GetProcessorInfo - StatusFlag - 00000006
GetProcessorInfo - Location.Package - 00000000
GetProcessorInfo - Location.Core - 00000009
GetProcessorInfo - Location.Thread - 00000000
GetProcessorInfo - Location2.Package - 00000000
GetProcessorInfo - Location2.Die - 00000000
GetProcessorInfo - Location2.Tile - 00000000
GetProcessorInfo - Location2.Module - 00000000
GetProcessorInfo - Location2.Core - 00000009
GetProcessorInfo - Location2.Thread - 00000000
GetProcessorInfo - Index - 13
GetProcessorInfo - ProcessorId - 0000000000000013
GetProcessorInfo - StatusFlag - 00000006
GetProcessorInfo - Location.Package - 00000000
GetProcessorInfo - Location.Core - 00000009
GetProcessorInfo - Location.Thread - 00000001
GetProcessorInfo - Location2.Package - 00000000
GetProcessorInfo - Location2.Die - 00000000
GetProcessorInfo - Location2.Tile - 00000000
GetProcessorInfo - Location2.Module - 00000000
GetProcessorInfo - Location2.Core - 00000009
GetProcessorInfo - Location2.Thread - 00000001
GetProcessorInfo - Index - 14
GetProcessorInfo - ProcessorId - 0000000000000014
GetProcessorInfo - StatusFlag - 00000006
GetProcessorInfo - Location.Package - 00000000
GetProcessorInfo - Location.Core - 0000000A
GetProcessorInfo - Location.Thread - 00000000
GetProcessorInfo - Location2.Package - 00000000
GetProcessorInfo - Location2.Die - 00000000
GetProcessorInfo - Location2.Tile - 00000000
GetProcessorInfo - Location2.Module - 00000000
GetProcessorInfo - Location2.Core - 0000000A
GetProcessorInfo - Location2.Thread - 00000000
GetProcessorInfo - Index - 15
GetProcessorInfo - ProcessorId - 0000000000000015
GetProcessorInfo - StatusFlag - 00000006
GetProcessorInfo - Location.Package - 00000000
GetProcessorInfo - Location.Core - 0000000A
GetProcessorInfo - Location.Thread - 00000001
GetProcessorInfo - Location2.Package - 00000000
GetProcessorInfo - Location2.Die - 00000000
GetProcessorInfo - Location2.Tile - 00000000
GetProcessorInfo - Location2.Module - 00000000
GetProcessorInfo - Location2.Core - 0000000A
GetProcessorInfo - Location2.Thread - 00000001
GetProcessorInfo - Index - 16
GetProcessorInfo - ProcessorId - 0000000000000016
GetProcessorInfo - StatusFlag - 00000006
GetProcessorInfo - Location.Package - 00000000
GetProcessorInfo - Location.Core - 0000000B
GetProcessorInfo - Location.Thread - 00000000
GetProcessorInfo - Location2.Package - 00000000
GetProcessorInfo - Location2.Die - 00000000
GetProcessorInfo - Location2.Tile - 00000000
GetProcessorInfo - Location2.Module - 00000000
GetProcessorInfo - Location2.Core - 0000000B
GetProcessorInfo - Location2.Thread - 00000000
GetProcessorInfo - Index - 17
GetProcessorInfo - ProcessorId - 0000000000000017
GetProcessorInfo - StatusFlag - 00000006
GetProcessorInfo - Location.Package - 00000000
GetProcessorInfo - Location.Core - 0000000B
GetProcessorInfo - Location.Thread - 00000001
GetProcessorInfo - Location2.Package - 00000000
GetProcessorInfo - Location2.Die - 00000000
GetProcessorInfo - Location2.Tile - 00000000
GetProcessorInfo - Location2.Module - 00000000
GetProcessorInfo - Location2.Core - 0000000B
GetProcessorInfo - Location2.Thread - 00000001
GetProcessorInfo - Index - 18
GetProcessorInfo - ProcessorId - 0000000000000018
GetProcessorInfo - StatusFlag - 00000006
GetProcessorInfo - Location.Package - 00000000
GetProcessorInfo - Location.Core - 0000000C
GetProcessorInfo - Location.Thread - 00000000
GetProcessorInfo - Location2.Package - 00000000
GetProcessorInfo - Location2.Die - 00000000
GetProcessorInfo - Location2.Tile - 00000000
GetProcessorInfo - Location2.Module - 00000000
GetProcessorInfo - Location2.Core - 0000000C
GetProcessorInfo - Location2.Thread - 00000000
GetProcessorInfo - Index - 19
GetProcessorInfo - ProcessorId - 0000000000000019
GetProcessorInfo - StatusFlag - 00000006
GetProcessorInfo - Location.Package - 00000000
GetProcessorInfo - Location.Core - 0000000C
GetProcessorInfo - Location.Thread - 00000001
GetProcessorInfo - Location2.Package - 00000000
GetProcessorInfo - Location2.Die - 00000000
GetProcessorInfo - Location2.Tile - 00000000
GetProcessorInfo - Location2.Module - 00000000
GetProcessorInfo - Location2.Core - 0000000C
GetProcessorInfo - Location2.Thread - 00000001
GetProcessorInfo - Index - 1A
GetProcessorInfo - ProcessorId - 000000000000001A
GetProcessorInfo - StatusFlag - 00000006
GetProcessorInfo - Location.Package - 00000000
GetProcessorInfo - Location.Core - 0000000D
GetProcessorInfo - Location.Thread - 00000000
GetProcessorInfo - Location2.Package - 00000000
GetProcessorInfo - Location2.Die - 00000000
GetProcessorInfo - Location2.Tile - 00000000
GetProcessorInfo - Location2.Module - 00000000
GetProcessorInfo - Location2.Core - 0000000D
GetProcessorInfo - Location2.Thread - 00000000
GetProcessorInfo - Index - 1B
GetProcessorInfo - ProcessorId - 000000000000001B
GetProcessorInfo - StatusFlag - 00000006
GetProcessorInfo - Location.Package - 00000000
GetProcessorInfo - Location.Core - 0000000D
GetProcessorInfo - Location.Thread - 00000001
GetProcessorInfo - Location2.Package - 00000000
GetProcessorInfo - Location2.Die - 00000000
GetProcessorInfo - Location2.Tile - 00000000
GetProcessorInfo - Location2.Module - 00000000
GetProcessorInfo - Location2.Core - 0000000D
GetProcessorInfo - Location2.Thread - 00000001
GetProcessorInfo - Index - 1C
GetProcessorInfo - ProcessorId - 000000000000001C
GetProcessorInfo - StatusFlag - 00000006
GetProcessorInfo - Location.Package - 00000000
GetProcessorInfo - Location.Core - 0000000E
GetProcessorInfo - Location.Thread - 00000000
GetProcessorInfo - Location2.Package - 00000000
GetProcessorInfo - Location2.Die - 00000000
GetProcessorInfo - Location2.Tile - 00000000
GetProcessorInfo - Location2.Module - 00000000
GetProcessorInfo - Location2.Core - 0000000E
GetProcessorInfo - Location2.Thread - 00000000
GetProcessorInfo - Index - 1D
GetProcessorInfo - ProcessorId - 000000000000001D
GetProcessorInfo - StatusFlag - 00000006
GetProcessorInfo - Location.Package - 00000000
GetProcessorInfo - Location.Core - 0000000E
GetProcessorInfo - Location.Thread - 00000001
GetProcessorInfo - Location2.Package - 00000000
GetProcessorInfo - Location2.Die - 00000000
GetProcessorInfo - Location2.Tile - 00000000
GetProcessorInfo - Location2.Module - 00000000
GetProcessorInfo - Location2.Core - 0000000E
GetProcessorInfo - Location2.Thread - 00000001
GetProcessorInfo - Index - 1E
GetProcessorInfo - ProcessorId - 000000000000001E
GetProcessorInfo - StatusFlag - 00000006
GetProcessorInfo - Location.Package - 00000000
GetProcessorInfo - Location.Core - 0000000F
GetProcessorInfo - Location.Thread - 00000000
GetProcessorInfo - Location2.Package - 00000000
GetProcessorInfo - Location2.Die - 00000000
GetProcessorInfo - Location2.Tile - 00000000
GetProcessorInfo - Location2.Module - 00000000
GetProcessorInfo - Location2.Core - 0000000F
GetProcessorInfo - Location2.Thread - 00000000
GetProcessorInfo - Index - 1F
GetProcessorInfo - ProcessorId - 000000000000001F
GetProcessorInfo - StatusFlag - 00000006
GetProcessorInfo - Location.Package - 00000000
GetProcessorInfo - Location.Core - 0000000F
GetProcessorInfo - Location.Thread - 00000001
GetProcessorInfo - Location2.Package - 00000000
GetProcessorInfo - Location2.Die - 00000000
GetProcessorInfo - Location2.Tile - 00000000
GetProcessorInfo - Location2.Module - 00000000
GetProcessorInfo - Location2.Core - 0000000F
GetProcessorInfo - Location2.Thread - 00000001
GetProcessorInfo - Index - 20
GetProcessorInfo - ProcessorId - 0000000000000020
GetProcessorInfo - StatusFlag - 00000006
GetProcessorInfo - Location.Package - 00000000
GetProcessorInfo - Location.Core - 00000010
GetProcessorInfo - Location.Thread - 00000000
GetProcessorInfo - Location2.Package - 00000000
GetProcessorInfo - Location2.Die - 00000000
GetProcessorInfo - Location2.Tile - 00000000
GetProcessorInfo - Location2.Module - 00000000
GetProcessorInfo - Location2.Core - 00000010
GetProcessorInfo - Location2.Thread - 00000000
GetProcessorInfo - Index - 21
GetProcessorInfo - ProcessorId - 0000000000000021
GetProcessorInfo - StatusFlag - 00000006
GetProcessorInfo - Location.Package - 00000000
GetProcessorInfo - Location.Core - 00000010
GetProcessorInfo - Location.Thread - 00000001
GetProcessorInfo - Location2.Package - 00000000
GetProcessorInfo - Location2.Die - 00000000
GetProcessorInfo - Location2.Tile - 00000000
GetProcessorInfo - Location2.Module - 00000000
GetProcessorInfo - Location2.Core - 00000010
GetProcessorInfo - Location2.Thread - 00000001
GetProcessorInfo - Index - 22
GetProcessorInfo - ProcessorId - 0000000000000022
GetProcessorInfo - StatusFlag - 00000006
GetProcessorInfo - Location.Package - 00000000
GetProcessorInfo - Location.Core - 00000011
GetProcessorInfo - Location.Thread - 00000000
GetProcessorInfo - Location2.Package - 00000000
GetProcessorInfo - Location2.Die - 00000000
GetProcessorInfo - Location2.Tile - 00000000
GetProcessorInfo - Location2.Module - 00000000
GetProcessorInfo - Location2.Core - 00000011
GetProcessorInfo - Location2.Thread - 00000000
GetProcessorInfo - Index - 23
GetProcessorInfo - ProcessorId - 0000000000000023
GetProcessorInfo - StatusFlag - 00000006
GetProcessorInfo - Location.Package - 00000000
GetProcessorInfo - Location.Core - 00000011
GetProcessorInfo - Location.Thread - 00000001
GetProcessorInfo - Location2.Package - 00000000
GetProcessorInfo - Location2.Die - 00000000
GetProcessorInfo - Location2.Tile - 00000000
GetProcessorInfo - Location2.Module - 00000000
GetProcessorInfo - Location2.Core - 00000011
GetProcessorInfo - Location2.Thread - 00000001
GetProcessorInfo - Index - 24
GetProcessorInfo - ProcessorId - 0000000000000024
GetProcessorInfo - StatusFlag - 00000006
GetProcessorInfo - Location.Package - 00000000
GetProcessorInfo - Location.Core - 00000012
GetProcessorInfo - Location.Thread - 00000000
GetProcessorInfo - Location2.Package - 00000000
GetProcessorInfo - Location2.Die - 00000000
GetProcessorInfo - Location2.Tile - 00000000
GetProcessorInfo - Location2.Module - 00000000
GetProcessorInfo - Location2.Core - 00000012
GetProcessorInfo - Location2.Thread - 00000000
GetProcessorInfo - Index - 25
GetProcessorInfo - ProcessorId - 0000000000000025
GetProcessorInfo - StatusFlag - 00000006
GetProcessorInfo - Location.Package - 00000000
GetProcessorInfo - Location.Core - 00000012
GetProcessorInfo - Location.Thread - 00000001
GetProcessorInfo - Location2.Package - 00000000
GetProcessorInfo - Location2.Die - 00000000
GetProcessorInfo - Location2.Tile - 00000000
GetProcessorInfo - Location2.Module - 00000000
GetProcessorInfo - Location2.Core - 00000012
GetProcessorInfo - Location2.Thread - 00000001
GetProcessorInfo - Index - 26
GetProcessorInfo - ProcessorId - 0000000000000026
GetProcessorInfo - StatusFlag - 00000006
GetProcessorInfo - Location.Package - 00000000
GetProcessorInfo - Location.Core - 00000013
GetProcessorInfo - Location.Thread - 00000000
GetProcessorInfo - Location2.Package - 00000000
GetProcessorInfo - Location2.Die - 00000000
GetProcessorInfo - Location2.Tile - 00000000
GetProcessorInfo - Location2.Module - 00000000
GetProcessorInfo - Location2.Core - 00000013
GetProcessorInfo - Location2.Thread - 00000000
GetProcessorInfo - Index - 27
GetProcessorInfo - ProcessorId - 0000000000000027
GetProcessorInfo - StatusFlag - 00000006
GetProcessorInfo - Location.Package - 00000000
GetProcessorInfo - Location.Core - 00000013
GetProcessorInfo - Location.Thread - 00000001
GetProcessorInfo - Location2.Package - 00000000
GetProcessorInfo - Location2.Die - 00000000
GetProcessorInfo - Location2.Tile - 00000000
GetProcessorInfo - Location2.Module - 00000000
GetProcessorInfo - Location2.Core - 00000013
GetProcessorInfo - Location2.Thread - 00000001
GetProcessorInfo - Index - 28
GetProcessorInfo - ProcessorId - 0000000000000028
GetProcessorInfo - StatusFlag - 00000006
GetProcessorInfo - Location.Package - 00000000
GetProcessorInfo - Location.Core - 00000014
GetProcessorInfo - Location.Thread - 00000000
GetProcessorInfo - Location2.Package - 00000000
GetProcessorInfo - Location2.Die - 00000000
GetProcessorInfo - Location2.Tile - 00000000
GetProcessorInfo - Location2.Module - 00000000
GetProcessorInfo - Location2.Core - 00000014
GetProcessorInfo - Location2.Thread - 00000000
GetProcessorInfo - Index - 29
GetProcessorInfo - ProcessorId - 0000000000000029
GetProcessorInfo - StatusFlag - 00000006
GetProcessorInfo - Location.Package - 00000000
GetProcessorInfo - Location.Core - 00000014
GetProcessorInfo - Location.Thread - 00000001
GetProcessorInfo - Location2.Package - 00000000
GetProcessorInfo - Location2.Die - 00000000
GetProcessorInfo - Location2.Tile - 00000000
GetProcessorInfo - Location2.Module - 00000000
GetProcessorInfo - Location2.Core - 00000014
GetProcessorInfo - Location2.Thread - 00000001
GetProcessorInfo - Index - 2A
GetProcessorInfo - ProcessorId - 000000000000002A
GetProcessorInfo - StatusFlag - 00000006
GetProcessorInfo - Location.Package - 00000000
GetProcessorInfo - Location.Core - 00000015
GetProcessorInfo - Location.Thread - 00000000
GetProcessorInfo - Location2.Package - 00000000
GetProcessorInfo - Location2.Die - 00000000
GetProcessorInfo - Location2.Tile - 00000000
GetProcessorInfo - Location2.Module - 00000000
GetProcessorInfo - Location2.Core - 00000015
GetProcessorInfo - Location2.Thread - 00000000
GetProcessorInfo - Index - 2B
GetProcessorInfo - ProcessorId - 000000000000002B
GetProcessorInfo - StatusFlag - 00000006
GetProcessorInfo - Location.Package - 00000000
GetProcessorInfo - Location.Core - 00000015
GetProcessorInfo - Location.Thread - 00000001
GetProcessorInfo - Location2.Package - 00000000
GetProcessorInfo - Location2.Die - 00000000
GetProcessorInfo - Location2.Tile - 00000000
GetProcessorInfo - Location2.Module - 00000000
GetProcessorInfo - Location2.Core - 00000015
GetProcessorInfo - Location2.Thread - 00000001
GetProcessorInfo - Index - 2C
GetProcessorInfo - ProcessorId - 000000000000002C
GetProcessorInfo - StatusFlag - 00000006
GetProcessorInfo - Location.Package - 00000000
GetProcessorInfo - Location.Core - 00000016
GetProcessorInfo - Location.Thread - 00000000
GetProcessorInfo - Location2.Package - 00000000
GetProcessorInfo - Location2.Die - 00000000
GetProcessorInfo - Location2.Tile - 00000000
GetProcessorInfo - Location2.Module - 00000000
GetProcessorInfo - Location2.Core - 00000016
GetProcessorInfo - Location2.Thread - 00000000
GetProcessorInfo - Index - 2D
GetProcessorInfo - ProcessorId - 000000000000002D
GetProcessorInfo - StatusFlag - 00000006
GetProcessorInfo - Location.Package - 00000000
GetProcessorInfo - Location.Core - 00000016
GetProcessorInfo - Location.Thread - 00000001
GetProcessorInfo - Location2.Package - 00000000
GetProcessorInfo - Location2.Die - 00000000
GetProcessorInfo - Location2.Tile - 00000000
GetProcessorInfo - Location2.Module - 00000000
GetProcessorInfo - Location2.Core - 00000016
GetProcessorInfo - Location2.Thread - 00000001
GetProcessorInfo - Index - 2E
GetProcessorInfo - ProcessorId - 000000000000002E
GetProcessorInfo - StatusFlag - 00000006
GetProcessorInfo - Location.Package - 00000000
GetProcessorInfo - Location.Core - 00000017
GetProcessorInfo - Location.Thread - 00000000
GetProcessorInfo - Location2.Package - 00000000
GetProcessorInfo - Location2.Die - 00000000
GetProcessorInfo - Location2.Tile - 00000000
GetProcessorInfo - Location2.Module - 00000000
GetProcessorInfo - Location2.Core - 00000017
GetProcessorInfo - Location2.Thread - 00000000
GetProcessorInfo - Index - 2F
GetProcessorInfo - ProcessorId - 000000000000002F
GetProcessorInfo - StatusFlag - 00000006
GetProcessorInfo - Location.Package - 00000000
GetProcessorInfo - Location.Core - 00000017
GetProcessorInfo - Location.Thread - 00000001
GetProcessorInfo - Location2.Package - 00000000
GetProcessorInfo - Location2.Die - 00000000
GetProcessorInfo - Location2.Tile - 00000000
GetProcessorInfo - Location2.Module - 00000000
GetProcessorInfo - Location2.Core - 00000017
GetProcessorInfo - Location2.Thread - 00000001
GetProcessorInfo - Index - 30
GetProcessorInfo - ProcessorId - 0000000000000030
GetProcessorInfo - StatusFlag - 00000006
GetProcessorInfo - Location.Package - 00000000
GetProcessorInfo - Location.Core - 00000018
GetProcessorInfo - Location.Thread - 00000000
GetProcessorInfo - Location2.Package - 00000000
GetProcessorInfo - Location2.Die - 00000000
GetProcessorInfo - Location2.Tile - 00000000
GetProcessorInfo - Location2.Module - 00000000
GetProcessorInfo - Location2.Core - 00000018
GetProcessorInfo - Location2.Thread - 00000000
GetProcessorInfo - Index - 31
GetProcessorInfo - ProcessorId - 0000000000000031
GetProcessorInfo - StatusFlag - 00000006
GetProcessorInfo - Location.Package - 00000000
GetProcessorInfo - Location.Core - 00000018
GetProcessorInfo - Location.Thread - 00000001
GetProcessorInfo - Location2.Package - 00000000
GetProcessorInfo - Location2.Die - 00000000
GetProcessorInfo - Location2.Tile - 00000000
GetProcessorInfo - Location2.Module - 00000000
GetProcessorInfo - Location2.Core - 00000018
GetProcessorInfo - Location2.Thread - 00000001
GetProcessorInfo - Index - 32
GetProcessorInfo - ProcessorId - 0000000000000032
GetProcessorInfo - StatusFlag - 00000006
GetProcessorInfo - Location.Package - 00000000
GetProcessorInfo - Location.Core - 00000019
GetProcessorInfo - Location.Thread - 00000000
GetProcessorInfo - Location2.Package - 00000000
GetProcessorInfo - Location2.Die - 00000000
GetProcessorInfo - Location2.Tile - 00000000
GetProcessorInfo - Location2.Module - 00000000
GetProcessorInfo - Location2.Core - 00000019
GetProcessorInfo - Location2.Thread - 00000000
GetProcessorInfo - Index - 33
GetProcessorInfo - ProcessorId - 0000000000000033
GetProcessorInfo - StatusFlag - 00000006
GetProcessorInfo - Location.Package - 00000000
GetProcessorInfo - Location.Core - 00000019
GetProcessorInfo - Location.Thread - 00000001
GetProcessorInfo - Location2.Package - 00000000
GetProcessorInfo - Location2.Die - 00000000
GetProcessorInfo - Location2.Tile - 00000000
GetProcessorInfo - Location2.Module - 00000000
GetProcessorInfo - Location2.Core - 00000019
GetProcessorInfo - Location2.Thread - 00000001
GetProcessorInfo - Index - 34
GetProcessorInfo - ProcessorId - 0000000000000034
GetProcessorInfo - StatusFlag - 00000006
GetProcessorInfo - Location.Package - 00000000
GetProcessorInfo - Location.Core - 0000001A
GetProcessorInfo - Location.Thread - 00000000
GetProcessorInfo - Location2.Package - 00000000
GetProcessorInfo - Location2.Die - 00000000
GetProcessorInfo - Location2.Tile - 00000000
GetProcessorInfo - Location2.Module - 00000000
GetProcessorInfo - Location2.Core - 0000001A
GetProcessorInfo - Location2.Thread - 00000000
GetProcessorInfo - Index - 35
GetProcessorInfo - ProcessorId - 0000000000000035
GetProcessorInfo - StatusFlag - 00000006
GetProcessorInfo - Location.Package - 00000000
GetProcessorInfo - Location.Core - 0000001A
GetProcessorInfo - Location.Thread - 00000001
GetProcessorInfo - Location2.Package - 00000000
GetProcessorInfo - Location2.Die - 00000000
GetProcessorInfo - Location2.Tile - 00000000
GetProcessorInfo - Location2.Module - 00000000
GetProcessorInfo - Location2.Core - 0000001A
GetProcessorInfo - Location2.Thread - 00000001
GetProcessorInfo - Index - 36
GetProcessorInfo - ProcessorId - 0000000000000036
GetProcessorInfo - StatusFlag - 00000006
GetProcessorInfo - Location.Package - 00000000
GetProcessorInfo - Location.Core - 0000001B
GetProcessorInfo - Location.Thread - 00000000
GetProcessorInfo - Location2.Package - 00000000
GetProcessorInfo - Location2.Die - 00000000
GetProcessorInfo - Location2.Tile - 00000000
GetProcessorInfo - Location2.Module - 00000000
GetProcessorInfo - Location2.Core - 0000001B
GetProcessorInfo - Location2.Thread - 00000000
GetProcessorInfo - Index - 37
GetProcessorInfo - ProcessorId - 0000000000000037
GetProcessorInfo - StatusFlag - 00000006
GetProcessorInfo - Location.Package - 00000000
GetProcessorInfo - Location.Core - 0000001B
GetProcessorInfo - Location.Thread - 00000001
GetProcessorInfo - Location2.Package - 00000000
GetProcessorInfo - Location2.Die - 00000000
GetProcessorInfo - Location2.Tile - 00000000
GetProcessorInfo - Location2.Module - 00000000
GetProcessorInfo - Location2.Core - 0000001B
GetProcessorInfo - Location2.Thread - 00000001
GetProcessorInfo - Index - 38
GetProcessorInfo - ProcessorId - 0000000000000038
GetProcessorInfo - StatusFlag - 00000006
GetProcessorInfo - Location.Package - 00000000
GetProcessorInfo - Location.Core - 0000001C
GetProcessorInfo - Location.Thread - 00000000
GetProcessorInfo - Location2.Package - 00000000
GetProcessorInfo - Location2.Die - 00000000
GetProcessorInfo - Location2.Tile - 00000000
GetProcessorInfo - Location2.Module - 00000000
GetProcessorInfo - Location2.Core - 0000001C
GetProcessorInfo - Location2.Thread - 00000000
GetProcessorInfo - Index - 39
GetProcessorInfo - ProcessorId - 0000000000000039
GetProcessorInfo - StatusFlag - 00000006
GetProcessorInfo - Location.Package - 00000000
GetProcessorInfo - Location.Core - 0000001C
GetProcessorInfo - Location.Thread - 00000001
GetProcessorInfo - Location2.Package - 00000000
GetProcessorInfo - Location2.Die - 00000000
GetProcessorInfo - Location2.Tile - 00000000
GetProcessorInfo - Location2.Module - 00000000
GetProcessorInfo - Location2.Core - 0000001C
GetProcessorInfo - Location2.Thread - 00000001
GetProcessorInfo - Index - 3A
GetProcessorInfo - ProcessorId - 000000000000003A
GetProcessorInfo - StatusFlag - 00000006
GetProcessorInfo - Location.Package - 00000000
GetProcessorInfo - Location.Core - 0000001D
GetProcessorInfo - Location.Thread - 00000000
GetProcessorInfo - Location2.Package - 00000000
GetProcessorInfo - Location2.Die - 00000000
GetProcessorInfo - Location2.Tile - 00000000
GetProcessorInfo - Location2.Module - 00000000
GetProcessorInfo - Location2.Core - 0000001D
GetProcessorInfo - Location2.Thread - 00000000
GetProcessorInfo - Index - 3B
GetProcessorInfo - ProcessorId - 000000000000003B
GetProcessorInfo - StatusFlag - 00000006
GetProcessorInfo - Location.Package - 00000000
GetProcessorInfo - Location.Core - 0000001D
GetProcessorInfo - Location.Thread - 00000001
GetProcessorInfo - Location2.Package - 00000000
GetProcessorInfo - Location2.Die - 00000000
GetProcessorInfo - Location2.Tile - 00000000
GetProcessorInfo - Location2.Module - 00000000
GetProcessorInfo - Location2.Core - 0000001D
GetProcessorInfo - Location2.Thread - 00000001
GetProcessorInfo - Index - 3C
GetProcessorInfo - ProcessorId - 000000000000003C
GetProcessorInfo - StatusFlag - 00000006
GetProcessorInfo - Location.Package - 00000000
GetProcessorInfo - Location.Core - 0000001E
GetProcessorInfo - Location.Thread - 00000000
GetProcessorInfo - Location2.Package - 00000000
GetProcessorInfo - Location2.Die - 00000000
GetProcessorInfo - Location2.Tile - 00000000
GetProcessorInfo - Location2.Module - 00000000
GetProcessorInfo - Location2.Core - 0000001E
GetProcessorInfo - Location2.Thread - 00000000
GetProcessorInfo - Index - 3D
GetProcessorInfo - ProcessorId - 000000000000003D
GetProcessorInfo - StatusFlag - 00000006
GetProcessorInfo - Location.Package - 00000000
GetProcessorInfo - Location.Core - 0000001E
GetProcessorInfo - Location.Thread - 00000001
GetProcessorInfo - Location2.Package - 00000000
GetProcessorInfo - Location2.Die - 00000000
GetProcessorInfo - Location2.Tile - 00000000
GetProcessorInfo - Location2.Module - 00000000
GetProcessorInfo - Location2.Core - 0000001E
GetProcessorInfo - Location2.Thread - 00000001
GetProcessorInfo - Index - 3E
GetProcessorInfo - ProcessorId - 000000000000003E
GetProcessorInfo - StatusFlag - 00000006
GetProcessorInfo - Location.Package - 00000000
GetProcessorInfo - Location.Core - 0000001F
GetProcessorInfo - Location.Thread - 00000000
GetProcessorInfo - Location2.Package - 00000000
GetProcessorInfo - Location2.Die - 00000000
GetProcessorInfo - Location2.Tile - 00000000
GetProcessorInfo - Location2.Module - 00000000
GetProcessorInfo - Location2.Core - 0000001F
GetProcessorInfo - Location2.Thread - 00000000
GetProcessorInfo - Index - 3F
GetProcessorInfo - ProcessorId - 000000000000003F
GetProcessorInfo - StatusFlag - 00000006
GetProcessorInfo - Location.Package - 00000000
GetProcessorInfo - Location.Core - 0000001F
GetProcessorInfo - Location.Thread - 00000001
GetProcessorInfo - Location2.Package - 00000000
GetProcessorInfo - Location2.Die - 00000000
GetProcessorInfo - Location2.Tile - 00000000
GetProcessorInfo - Location2.Module - 00000000
GetProcessorInfo - Location2.Core - 0000001F
GetProcessorInfo - Location2.Thread - 00000001
GetProcessorInfo - Index - 40
GetProcessorInfo - ProcessorId - 0000000000000040
GetProcessorInfo - StatusFlag - 00000006
GetProcessorInfo - Location.Package - 00000000
GetProcessorInfo - Location.Core - 00000020
GetProcessorInfo - Location.Thread - 00000000
GetProcessorInfo - Location2.Package - 00000000
GetProcessorInfo - Location2.Die - 00000000
GetProcessorInfo - Location2.Tile - 00000000
GetProcessorInfo - Location2.Module - 00000000
GetProcessorInfo - Location2.Core - 00000020
GetProcessorInfo - Location2.Thread - 00000000
GetProcessorInfo - Index - 41
GetProcessorInfo - ProcessorId - 0000000000000041
GetProcessorInfo - StatusFlag - 00000006
GetProcessorInfo - Location.Package - 00000000
GetProcessorInfo - Location.Core - 00000020
GetProcessorInfo - Location.Thread - 00000001
GetProcessorInfo - Location2.Package - 00000000
GetProcessorInfo - Location2.Die - 00000000
GetProcessorInfo - Location2.Tile - 00000000
GetProcessorInfo - Location2.Module - 00000000
GetProcessorInfo - Location2.Core - 00000020
GetProcessorInfo - Location2.Thread - 00000001
GetProcessorInfo - Index - 42
GetProcessorInfo - ProcessorId - 0000000000000042
GetProcessorInfo - StatusFlag - 00000006
GetProcessorInfo - Location.Package - 00000000
GetProcessorInfo - Location.Core - 00000021
GetProcessorInfo - Location.Thread - 00000000
GetProcessorInfo - Location2.Package - 00000000
GetProcessorInfo - Location2.Die - 00000000
GetProcessorInfo - Location2.Tile - 00000000
GetProcessorInfo - Location2.Module - 00000000
GetProcessorInfo - Location2.Core - 00000021
GetProcessorInfo - Location2.Thread - 00000000
GetProcessorInfo - Index - 43
GetProcessorInfo - ProcessorId - 0000000000000043
GetProcessorInfo - StatusFlag - 00000006
GetProcessorInfo - Location.Package - 00000000
GetProcessorInfo - Location.Core - 00000021
GetProcessorInfo - Location.Thread - 00000001
GetProcessorInfo - Location2.Package - 00000000
GetProcessorInfo - Location2.Die - 00000000
GetProcessorInfo - Location2.Tile - 00000000
GetProcessorInfo - Location2.Module - 00000000
GetProcessorInfo - Location2.Core - 00000021
GetProcessorInfo - Location2.Thread - 00000001
GetProcessorInfo - Index - 44
GetProcessorInfo - ProcessorId - 0000000000000044
GetProcessorInfo - StatusFlag - 00000006
GetProcessorInfo - Location.Package - 00000000
GetProcessorInfo - Location.Core - 00000022
GetProcessorInfo - Location.Thread - 00000000
GetProcessorInfo - Location2.Package - 00000000
GetProcessorInfo - Location2.Die - 00000000
GetProcessorInfo - Location2.Tile - 00000000
GetProcessorInfo - Location2.Module - 00000000
GetProcessorInfo - Location2.Core - 00000022
GetProcessorInfo - Location2.Thread - 00000000
GetProcessorInfo - Index - 45
GetProcessorInfo - ProcessorId - 0000000000000045
GetProcessorInfo - StatusFlag - 00000006
GetProcessorInfo - Location.Package - 00000000
GetProcessorInfo - Location.Core - 00000022
GetProcessorInfo - Location.Thread - 00000001
GetProcessorInfo - Location2.Package - 00000000
GetProcessorInfo - Location2.Die - 00000000
GetProcessorInfo - Location2.Tile - 00000000
GetProcessorInfo - Location2.Module - 00000000
GetProcessorInfo - Location2.Core - 00000022
GetProcessorInfo - Location2.Thread - 00000001
GetProcessorInfo - Index - 46
GetProcessorInfo - ProcessorId - 0000000000000046
GetProcessorInfo - StatusFlag - 00000006
GetProcessorInfo - Location.Package - 00000000
GetProcessorInfo - Location.Core - 00000023
GetProcessorInfo - Location.Thread - 00000000
GetProcessorInfo - Location2.Package - 00000000
GetProcessorInfo - Location2.Die - 00000000
GetProcessorInfo - Location2.Tile - 00000000
GetProcessorInfo - Location2.Module - 00000000
GetProcessorInfo - Location2.Core - 00000023
GetProcessorInfo - Location2.Thread - 00000000
GetProcessorInfo - Index - 47
GetProcessorInfo - ProcessorId - 0000000000000047
GetProcessorInfo - StatusFlag - 00000006
GetProcessorInfo - Location.Package - 00000000
GetProcessorInfo - Location.Core - 00000023
GetProcessorInfo - Location.Thread - 00000001
GetProcessorInfo - Location2.Package - 00000000
GetProcessorInfo - Location2.Die - 00000000
GetProcessorInfo - Location2.Tile - 00000000
GetProcessorInfo - Location2.Module - 00000000
GetProcessorInfo - Location2.Core - 00000023
GetProcessorInfo - Location2.Thread - 00000001
GetProcessorInfo - Index - 48
GetProcessorInfo - ProcessorId - 0000000000000048
GetProcessorInfo - StatusFlag - 00000006
GetProcessorInfo - Location.Package - 00000000
GetProcessorInfo - Location.Core - 00000024
GetProcessorInfo - Location.Thread - 00000000
GetProcessorInfo - Location2.Package - 00000000
GetProcessorInfo - Location2.Die - 00000000
GetProcessorInfo - Location2.Tile - 00000000
GetProcessorInfo - Location2.Module - 00000000
GetProcessorInfo - Location2.Core - 00000024
GetProcessorInfo - Location2.Thread - 00000000
GetProcessorInfo - Index - 49
GetProcessorInfo - ProcessorId - 0000000000000049
GetProcessorInfo - StatusFlag - 00000006
GetProcessorInfo - Location.Package - 00000000
GetProcessorInfo - Location.Core - 00000024
GetProcessorInfo - Location.Thread - 00000001
GetProcessorInfo - Location2.Package - 00000000
GetProcessorInfo - Location2.Die - 00000000
GetProcessorInfo - Location2.Tile - 00000000
GetProcessorInfo - Location2.Module - 00000000
GetProcessorInfo - Location2.Core - 00000024
GetProcessorInfo - Location2.Thread - 00000001
GetProcessorInfo - Index - 4A
GetProcessorInfo - ProcessorId - 000000000000004A
GetProcessorInfo - StatusFlag - 00000006
GetProcessorInfo - Location.Package - 00000000
GetProcessorInfo - Location.Core - 00000025
GetProcessorInfo - Location.Thread - 00000000
GetProcessorInfo - Location2.Package - 00000000
GetProcessorInfo - Location2.Die - 00000000
GetProcessorInfo - Location2.Tile - 00000000
GetProcessorInfo - Location2.Module - 00000000
GetProcessorInfo - Location2.Core - 00000025
GetProcessorInfo - Location2.Thread - 00000000
GetProcessorInfo - Index - 4B
GetProcessorInfo - ProcessorId - 000000000000004B
GetProcessorInfo - StatusFlag - 00000006
GetProcessorInfo - Location.Package - 00000000
GetProcessorInfo - Location.Core - 00000025
GetProcessorInfo - Location.Thread - 00000001
GetProcessorInfo - Location2.Package - 00000000
GetProcessorInfo - Location2.Die - 00000000
GetProcessorInfo - Location2.Tile - 00000000
GetProcessorInfo - Location2.Module - 00000000
GetProcessorInfo - Location2.Core - 00000025
GetProcessorInfo - Location2.Thread - 00000001
GetProcessorInfo - Index - 4C
GetProcessorInfo - ProcessorId - 000000000000004C
GetProcessorInfo - StatusFlag - 00000006
GetProcessorInfo - Location.Package - 00000000
GetProcessorInfo - Location.Core - 00000026
GetProcessorInfo - Location.Thread - 00000000
GetProcessorInfo - Location2.Package - 00000000
GetProcessorInfo - Location2.Die - 00000000
GetProcessorInfo - Location2.Tile - 00000000
GetProcessorInfo - Location2.Module - 00000000
GetProcessorInfo - Location2.Core - 00000026
GetProcessorInfo - Location2.Thread - 00000000
GetProcessorInfo - Index - 4D
GetProcessorInfo - ProcessorId - 000000000000004D
GetProcessorInfo - StatusFlag - 00000006
GetProcessorInfo - Location.Package - 00000000
GetProcessorInfo - Location.Core - 00000026
GetProcessorInfo - Location.Thread - 00000001
GetProcessorInfo - Location2.Package - 00000000
GetProcessorInfo - Location2.Die - 00000000
GetProcessorInfo - Location2.Tile - 00000000
GetProcessorInfo - Location2.Module - 00000000
GetProcessorInfo - Location2.Core - 00000026
GetProcessorInfo - Location2.Thread - 00000001
GetProcessorInfo - Index - 4E
GetProcessorInfo - ProcessorId - 000000000000004E
GetProcessorInfo - StatusFlag - 00000006
GetProcessorInfo - Location.Package - 00000000
GetProcessorInfo - Location.Core - 00000027
GetProcessorInfo - Location.Thread - 00000000
GetProcessorInfo - Location2.Package - 00000000
GetProcessorInfo - Location2.Die - 00000000
GetProcessorInfo - Location2.Tile - 00000000
GetProcessorInfo - Location2.Module - 00000000
GetProcessorInfo - Location2.Core - 00000027
GetProcessorInfo - Location2.Thread - 00000000
GetProcessorInfo - Index - 4F
GetProcessorInfo - ProcessorId - 000000000000004F
GetProcessorInfo - StatusFlag - 00000006
GetProcessorInfo - Location.Package - 00000000
GetProcessorInfo - Location.Core - 00000027
GetProcessorInfo - Location.Thread - 00000001
GetProcessorInfo - Location2.Package - 00000000
GetProcessorInfo - Location2.Die - 00000000
GetProcessorInfo - Location2.Tile - 00000000
GetProcessorInfo - Location2.Module - 00000000
GetProcessorInfo - Location2.Core - 00000027
GetProcessorInfo - Location2.Thread - 00000001
GetProcessorInfo - Index - 50
GetProcessorInfo - ProcessorId - 0000000000000080
GetProcessorInfo - StatusFlag - 00000006
GetProcessorInfo - Location.Package - 00000001
GetProcessorInfo - Location.Core - 00000000
GetProcessorInfo - Location.Thread - 00000000
GetProcessorInfo - Location2.Package - 00000001
GetProcessorInfo - Location2.Die - 00000000
GetProcessorInfo - Location2.Tile - 00000000
GetProcessorInfo - Location2.Module - 00000000
GetProcessorInfo - Location2.Core - 00000000
GetProcessorInfo - Location2.Thread - 00000000
GetProcessorInfo - Index - 51
GetProcessorInfo - ProcessorId - 0000000000000081
GetProcessorInfo - StatusFlag - 00000006
GetProcessorInfo - Location.Package - 00000001
GetProcessorInfo - Location.Core - 00000000
GetProcessorInfo - Location.Thread - 00000001
GetProcessorInfo - Location2.Package - 00000001
GetProcessorInfo - Location2.Die - 00000000
GetProcessorInfo - Location2.Tile - 00000000
GetProcessorInfo - Location2.Module - 00000000
GetProcessorInfo - Location2.Core - 00000000
GetProcessorInfo - Location2.Thread - 00000001
GetProcessorInfo - Index - 52
GetProcessorInfo - ProcessorId - 0000000000000082
GetProcessorInfo - StatusFlag - 00000006
GetProcessorInfo - Location.Package - 00000001
GetProcessorInfo - Location.Core - 00000001
GetProcessorInfo - Location.Thread - 00000000
GetProcessorInfo - Location2.Package - 00000001
GetProcessorInfo - Location2.Die - 00000000
GetProcessorInfo - Location2.Tile - 00000000
GetProcessorInfo - Location2.Module - 00000000
GetProcessorInfo - Location2.Core - 00000001
GetProcessorInfo - Location2.Thread - 00000000
GetProcessorInfo - Index - 53
GetProcessorInfo - ProcessorId - 0000000000000083
GetProcessorInfo - StatusFlag - 00000006
GetProcessorInfo - Location.Package - 00000001
GetProcessorInfo - Location.Core - 00000001
GetProcessorInfo - Location.Thread - 00000001
GetProcessorInfo - Location2.Package - 00000001
GetProcessorInfo - Location2.Die - 00000000
GetProcessorInfo - Location2.Tile - 00000000
GetProcessorInfo - Location2.Module - 00000000
GetProcessorInfo - Location2.Core - 00000001
GetProcessorInfo - Location2.Thread - 00000001
GetProcessorInfo - Index - 54
GetProcessorInfo - ProcessorId - 0000000000000084
GetProcessorInfo - StatusFlag - 00000006
GetProcessorInfo - Location.Package - 00000001
GetProcessorInfo - Location.Core - 00000002
GetProcessorInfo - Location.Thread - 00000000
GetProcessorInfo - Location2.Package - 00000001
GetProcessorInfo - Location2.Die - 00000000
GetProcessorInfo - Location2.Tile - 00000000
GetProcessorInfo - Location2.Module - 00000000
GetProcessorInfo - Location2.Core - 00000002
GetProcessorInfo - Location2.Thread - 00000000
GetProcessorInfo - Index - 55
GetProcessorInfo - ProcessorId - 0000000000000085
GetProcessorInfo - StatusFlag - 00000006
GetProcessorInfo - Location.Package - 00000001
GetProcessorInfo - Location.Core - 00000002
GetProcessorInfo - Location.Thread - 00000001
GetProcessorInfo - Location2.Package - 00000001
GetProcessorInfo - Location2.Die - 00000000
GetProcessorInfo - Location2.Tile - 00000000
GetProcessorInfo - Location2.Module - 00000000
GetProcessorInfo - Location2.Core - 00000002
GetProcessorInfo - Location2.Thread - 00000001
GetProcessorInfo - Index - 56
GetProcessorInfo - ProcessorId - 0000000000000086
GetProcessorInfo - StatusFlag - 00000006
GetProcessorInfo - Location.Package - 00000001
GetProcessorInfo - Location.Core - 00000003
GetProcessorInfo - Location.Thread - 00000000
GetProcessorInfo - Location2.Package - 00000001
GetProcessorInfo - Location2.Die - 00000000
GetProcessorInfo - Location2.Tile - 00000000
GetProcessorInfo - Location2.Module - 00000000
GetProcessorInfo - Location2.Core - 00000003
GetProcessorInfo - Location2.Thread - 00000000
GetProcessorInfo - Index - 57
GetProcessorInfo - ProcessorId - 0000000000000087
GetProcessorInfo - StatusFlag - 00000006
GetProcessorInfo - Location.Package - 00000001
GetProcessorInfo - Location.Core - 00000003
GetProcessorInfo - Location.Thread - 00000001
GetProcessorInfo - Location2.Package - 00000001
GetProcessorInfo - Location2.Die - 00000000
GetProcessorInfo - Location2.Tile - 00000000
GetProcessorInfo - Location2.Module - 00000000
GetProcessorInfo - Location2.Core - 00000003
GetProcessorInfo - Location2.Thread - 00000001
GetProcessorInfo - Index - 58
GetProcessorInfo - ProcessorId - 0000000000000088
GetProcessorInfo - StatusFlag - 00000006
GetProcessorInfo - Location.Package - 00000001
GetProcessorInfo - Location.Core - 00000004
GetProcessorInfo - Location.Thread - 00000000
GetProcessorInfo - Location2.Package - 00000001
GetProcessorInfo - Location2.Die - 00000000
GetProcessorInfo - Location2.Tile - 00000000
GetProcessorInfo - Location2.Module - 00000000
GetProcessorInfo - Location2.Core - 00000004
GetProcessorInfo - Location2.Thread - 00000000
GetProcessorInfo - Index - 59
GetProcessorInfo - ProcessorId - 0000000000000089
GetProcessorInfo - StatusFlag - 00000006
GetProcessorInfo - Location.Package - 00000001
GetProcessorInfo - Location.Core - 00000004
GetProcessorInfo - Location.Thread - 00000001
GetProcessorInfo - Location2.Package - 00000001
GetProcessorInfo - Location2.Die - 00000000
GetProcessorInfo - Location2.Tile - 00000000
GetProcessorInfo - Location2.Module - 00000000
GetProcessorInfo - Location2.Core - 00000004
GetProcessorInfo - Location2.Thread - 00000001
GetProcessorInfo - Index - 5A
GetProcessorInfo - ProcessorId - 000000000000008A
GetProcessorInfo - StatusFlag - 00000006
GetProcessorInfo - Location.Package - 00000001
GetProcessorInfo - Location.Core - 00000005
GetProcessorInfo - Location.Thread - 00000000
GetProcessorInfo - Location2.Package - 00000001
GetProcessorInfo - Location2.Die - 00000000
GetProcessorInfo - Location2.Tile - 00000000
GetProcessorInfo - Location2.Module - 00000000
GetProcessorInfo - Location2.Core - 00000005
GetProcessorInfo - Location2.Thread - 00000000
GetProcessorInfo - Index - 5B
GetProcessorInfo - ProcessorId - 000000000000008B
GetProcessorInfo - StatusFlag - 00000006
GetProcessorInfo - Location.Package - 00000001
GetProcessorInfo - Location.Core - 00000005
GetProcessorInfo - Location.Thread - 00000001
GetProcessorInfo - Location2.Package - 00000001
GetProcessorInfo - Location2.Die - 00000000
GetProcessorInfo - Location2.Tile - 00000000
GetProcessorInfo - Location2.Module - 00000000
GetProcessorInfo - Location2.Core - 00000005
GetProcessorInfo - Location2.Thread - 00000001
GetProcessorInfo - Index - 5C
GetProcessorInfo - ProcessorId - 000000000000008C
GetProcessorInfo - StatusFlag - 00000006
GetProcessorInfo - Location.Package - 00000001
GetProcessorInfo - Location.Core - 00000006
GetProcessorInfo - Location.Thread - 00000000
GetProcessorInfo - Location2.Package - 00000001
GetProcessorInfo - Location2.Die - 00000000
GetProcessorInfo - Location2.Tile - 00000000
GetProcessorInfo - Location2.Module - 00000000
GetProcessorInfo - Location2.Core - 00000006
GetProcessorInfo - Location2.Thread - 00000000
GetProcessorInfo - Index - 5D
GetProcessorInfo - ProcessorId - 000000000000008D
GetProcessorInfo - StatusFlag - 00000006
GetProcessorInfo - Location.Package - 00000001
GetProcessorInfo - Location.Core - 00000006
GetProcessorInfo - Location.Thread - 00000001
GetProcessorInfo - Location2.Package - 00000001
GetProcessorInfo - Location2.Die - 00000000
GetProcessorInfo - Location2.Tile - 00000000
GetProcessorInfo - Location2.Module - 00000000
GetProcessorInfo - Location2.Core - 00000006
GetProcessorInfo - Location2.Thread - 00000001
GetProcessorInfo - Index - 5E
GetProcessorInfo - ProcessorId - 000000000000008E
GetProcessorInfo - StatusFlag - 00000006
GetProcessorInfo - Location.Package - 00000001
GetProcessorInfo - Location.Core - 00000007
GetProcessorInfo - Location.Thread - 00000000
GetProcessorInfo - Location2.Package - 00000001
GetProcessorInfo - Location2.Die - 00000000
GetProcessorInfo - Location2.Tile - 00000000
GetProcessorInfo - Location2.Module - 00000000
GetProcessorInfo - Location2.Core - 00000007
GetProcessorInfo - Location2.Thread - 00000000
GetProcessorInfo - Index - 5F
GetProcessorInfo - ProcessorId - 000000000000008F
GetProcessorInfo - StatusFlag - 00000006
GetProcessorInfo - Location.Package - 00000001
GetProcessorInfo - Location.Core - 00000007
GetProcessorInfo - Location.Thread - 00000001
GetProcessorInfo - Location2.Package - 00000001
GetProcessorInfo - Location2.Die - 00000000
GetProcessorInfo - Location2.Tile - 00000000
GetProcessorInfo - Location2.Module - 00000000
GetProcessorInfo - Location2.Core - 00000007
GetProcessorInfo - Location2.Thread - 00000001
GetProcessorInfo - Index - 60
GetProcessorInfo - ProcessorId - 0000000000000090
GetProcessorInfo - StatusFlag - 00000006
GetProcessorInfo - Location.Package - 00000001
GetProcessorInfo - Location.Core - 00000008
GetProcessorInfo - Location.Thread - 00000000
GetProcessorInfo - Location2.Package - 00000001
GetProcessorInfo - Location2.Die - 00000000
GetProcessorInfo - Location2.Tile - 00000000
GetProcessorInfo - Location2.Module - 00000000
GetProcessorInfo - Location2.Core - 00000008
GetProcessorInfo - Location2.Thread - 00000000
GetProcessorInfo - Index - 61
GetProcessorInfo - ProcessorId - 0000000000000091
GetProcessorInfo - StatusFlag - 00000006
GetProcessorInfo - Location.Package - 00000001
GetProcessorInfo - Location.Core - 00000008
GetProcessorInfo - Location.Thread - 00000001
GetProcessorInfo - Location2.Package - 00000001
GetProcessorInfo - Location2.Die - 00000000
GetProcessorInfo - Location2.Tile - 00000000
GetProcessorInfo - Location2.Module - 00000000
GetProcessorInfo - Location2.Core - 00000008
GetProcessorInfo - Location2.Thread - 00000001
GetProcessorInfo - Index - 62
GetProcessorInfo - ProcessorId - 0000000000000092
GetProcessorInfo - StatusFlag - 00000006
GetProcessorInfo - Location.Package - 00000001
GetProcessorInfo - Location.Core - 00000009
GetProcessorInfo - Location.Thread - 00000000
GetProcessorInfo - Location2.Package - 00000001
GetProcessorInfo - Location2.Die - 00000000
GetProcessorInfo - Location2.Tile - 00000000
GetProcessorInfo - Location2.Module - 00000000
GetProcessorInfo - Location2.Core - 00000009
GetProcessorInfo - Location2.Thread - 00000000
GetProcessorInfo - Index - 63
GetProcessorInfo - ProcessorId - 0000000000000093
GetProcessorInfo - StatusFlag - 00000006
GetProcessorInfo - Location.Package - 00000001
GetProcessorInfo - Location.Core - 00000009
GetProcessorInfo - Location.Thread - 00000001
GetProcessorInfo - Location2.Package - 00000001
GetProcessorInfo - Location2.Die - 00000000
GetProcessorInfo - Location2.Tile - 00000000
GetProcessorInfo - Location2.Module - 00000000
GetProcessorInfo - Location2.Core - 00000009
GetProcessorInfo - Location2.Thread - 00000001
GetProcessorInfo - Index - 64
GetProcessorInfo - ProcessorId - 0000000000000094
GetProcessorInfo - StatusFlag - 00000006
GetProcessorInfo - Location.Package - 00000001
GetProcessorInfo - Location.Core - 0000000A
GetProcessorInfo - Location.Thread - 00000000
GetProcessorInfo - Location2.Package - 00000001
GetProcessorInfo - Location2.Die - 00000000
GetProcessorInfo - Location2.Tile - 00000000
GetProcessorInfo - Location2.Module - 00000000
GetProcessorInfo - Location2.Core - 0000000A
GetProcessorInfo - Location2.Thread - 00000000
GetProcessorInfo - Index - 65
GetProcessorInfo - ProcessorId - 0000000000000095
GetProcessorInfo - StatusFlag - 00000006
GetProcessorInfo - Location.Package - 00000001
GetProcessorInfo - Location.Core - 0000000A
GetProcessorInfo - Location.Thread - 00000001
GetProcessorInfo - Location2.Package - 00000001
GetProcessorInfo - Location2.Die - 00000000
GetProcessorInfo - Location2.Tile - 00000000
GetProcessorInfo - Location2.Module - 00000000
GetProcessorInfo - Location2.Core - 0000000A
GetProcessorInfo - Location2.Thread - 00000001
GetProcessorInfo - Index - 66
GetProcessorInfo - ProcessorId - 0000000000000096
GetProcessorInfo - StatusFlag - 00000006
GetProcessorInfo - Location.Package - 00000001
GetProcessorInfo - Location.Core - 0000000B
GetProcessorInfo - Location.Thread - 00000000
GetProcessorInfo - Location2.Package - 00000001
GetProcessorInfo - Location2.Die - 00000000
GetProcessorInfo - Location2.Tile - 00000000
GetProcessorInfo - Location2.Module - 00000000
GetProcessorInfo - Location2.Core - 0000000B
GetProcessorInfo - Location2.Thread - 00000000
GetProcessorInfo - Index - 67
GetProcessorInfo - ProcessorId - 0000000000000097
GetProcessorInfo - StatusFlag - 00000006
GetProcessorInfo - Location.Package - 00000001
GetProcessorInfo - Location.Core - 0000000B
GetProcessorInfo - Location.Thread - 00000001
GetProcessorInfo - Location2.Package - 00000001
GetProcessorInfo - Location2.Die - 00000000
GetProcessorInfo - Location2.Tile - 00000000
GetProcessorInfo - Location2.Module - 00000000
GetProcessorInfo - Location2.Core - 0000000B
GetProcessorInfo - Location2.Thread - 00000001
GetProcessorInfo - Index - 68
GetProcessorInfo - ProcessorId - 0000000000000098
GetProcessorInfo - StatusFlag - 00000006
GetProcessorInfo - Location.Package - 00000001
GetProcessorInfo - Location.Core - 0000000C
GetProcessorInfo - Location.Thread - 00000000
GetProcessorInfo - Location2.Package - 00000001
GetProcessorInfo - Location2.Die - 00000000
GetProcessorInfo - Location2.Tile - 00000000
GetProcessorInfo - Location2.Module - 00000000
GetProcessorInfo - Location2.Core - 0000000C
GetProcessorInfo - Location2.Thread - 00000000
GetProcessorInfo - Index - 69
GetProcessorInfo - ProcessorId - 0000000000000099
GetProcessorInfo - StatusFlag - 00000006
GetProcessorInfo - Location.Package - 00000001
GetProcessorInfo - Location.Core - 0000000C
GetProcessorInfo - Location.Thread - 00000001
GetProcessorInfo - Location2.Package - 00000001
GetProcessorInfo - Location2.Die - 00000000
GetProcessorInfo - Location2.Tile - 00000000
GetProcessorInfo - Location2.Module - 00000000
GetProcessorInfo - Location2.Core - 0000000C
GetProcessorInfo - Location2.Thread - 00000001
GetProcessorInfo - Index - 6A
GetProcessorInfo - ProcessorId - 000000000000009A
GetProcessorInfo - StatusFlag - 00000006
GetProcessorInfo - Location.Package - 00000001
GetProcessorInfo - Location.Core - 0000000D
GetProcessorInfo - Location.Thread - 00000000
GetProcessorInfo - Location2.Package - 00000001
GetProcessorInfo - Location2.Die - 00000000
GetProcessorInfo - Location2.Tile - 00000000
GetProcessorInfo - Location2.Module - 00000000
GetProcessorInfo - Location2.Core - 0000000D
GetProcessorInfo - Location2.Thread - 00000000
GetProcessorInfo - Index - 6B
GetProcessorInfo - ProcessorId - 000000000000009B
GetProcessorInfo - StatusFlag - 00000006
GetProcessorInfo - Location.Package - 00000001
GetProcessorInfo - Location.Core - 0000000D
GetProcessorInfo - Location.Thread - 00000001
GetProcessorInfo - Location2.Package - 00000001
GetProcessorInfo - Location2.Die - 00000000
GetProcessorInfo - Location2.Tile - 00000000
GetProcessorInfo - Location2.Module - 00000000
GetProcessorInfo - Location2.Core - 0000000D
GetProcessorInfo - Location2.Thread - 00000001
GetProcessorInfo - Index - 6C
GetProcessorInfo - ProcessorId - 000000000000009C
GetProcessorInfo - StatusFlag - 00000006
GetProcessorInfo - Location.Package - 00000001
GetProcessorInfo - Location.Core - 0000000E
GetProcessorInfo - Location.Thread - 00000000
GetProcessorInfo - Location2.Package - 00000001
GetProcessorInfo - Location2.Die - 00000000
GetProcessorInfo - Location2.Tile - 00000000
GetProcessorInfo - Location2.Module - 00000000
GetProcessorInfo - Location2.Core - 0000000E
GetProcessorInfo - Location2.Thread - 00000000
GetProcessorInfo - Index - 6D
GetProcessorInfo - ProcessorId - 000000000000009D
GetProcessorInfo - StatusFlag - 00000006
GetProcessorInfo - Location.Package - 00000001
GetProcessorInfo - Location.Core - 0000000E
GetProcessorInfo - Location.Thread - 00000001
GetProcessorInfo - Location2.Package - 00000001
GetProcessorInfo - Location2.Die - 00000000
GetProcessorInfo - Location2.Tile - 00000000
GetProcessorInfo - Location2.Module - 00000000
GetProcessorInfo - Location2.Core - 0000000E
GetProcessorInfo - Location2.Thread - 00000001
GetProcessorInfo - Index - 6E
GetProcessorInfo - ProcessorId - 000000000000009E
GetProcessorInfo - StatusFlag - 00000006
GetProcessorInfo - Location.Package - 00000001
GetProcessorInfo - Location.Core - 0000000F
GetProcessorInfo - Location.Thread - 00000000
GetProcessorInfo - Location2.Package - 00000001
GetProcessorInfo - Location2.Die - 00000000
GetProcessorInfo - Location2.Tile - 00000000
GetProcessorInfo - Location2.Module - 00000000
GetProcessorInfo - Location2.Core - 0000000F
GetProcessorInfo - Location2.Thread - 00000000
GetProcessorInfo - Index - 6F
GetProcessorInfo - ProcessorId - 000000000000009F
GetProcessorInfo - StatusFlag - 00000006
GetProcessorInfo - Location.Package - 00000001
GetProcessorInfo - Location.Core - 0000000F
GetProcessorInfo - Location.Thread - 00000001
GetProcessorInfo - Location2.Package - 00000001
GetProcessorInfo - Location2.Die - 00000000
GetProcessorInfo - Location2.Tile - 00000000
GetProcessorInfo - Location2.Module - 00000000
GetProcessorInfo - Location2.Core - 0000000F
GetProcessorInfo - Location2.Thread - 00000001
GetProcessorInfo - Index - 70
GetProcessorInfo - ProcessorId - 00000000000000A0
GetProcessorInfo - StatusFlag - 00000006
GetProcessorInfo - Location.Package - 00000001
GetProcessorInfo - Location.Core - 00000010
GetProcessorInfo - Location.Thread - 00000000
GetProcessorInfo - Location2.Package - 00000001
GetProcessorInfo - Location2.Die - 00000000
GetProcessorInfo - Location2.Tile - 00000000
GetProcessorInfo - Location2.Module - 00000000
GetProcessorInfo - Location2.Core - 00000010
GetProcessorInfo - Location2.Thread - 00000000
GetProcessorInfo - Index - 71
GetProcessorInfo - ProcessorId - 00000000000000A1
GetProcessorInfo - StatusFlag - 00000006
GetProcessorInfo - Location.Package - 00000001
GetProcessorInfo - Location.Core - 00000010
GetProcessorInfo - Location.Thread - 00000001
GetProcessorInfo - Location2.Package - 00000001
GetProcessorInfo - Location2.Die - 00000000
GetProcessorInfo - Location2.Tile - 00000000
GetProcessorInfo - Location2.Module - 00000000
GetProcessorInfo - Location2.Core - 00000010
GetProcessorInfo - Location2.Thread - 00000001
GetProcessorInfo - Index - 72
GetProcessorInfo - ProcessorId - 00000000000000A2
GetProcessorInfo - StatusFlag - 00000006
GetProcessorInfo - Location.Package - 00000001
GetProcessorInfo - Location.Core - 00000011
GetProcessorInfo - Location.Thread - 00000000
GetProcessorInfo - Location2.Package - 00000001
GetProcessorInfo - Location2.Die - 00000000
GetProcessorInfo - Location2.Tile - 00000000
GetProcessorInfo - Location2.Module - 00000000
GetProcessorInfo - Location2.Core - 00000011
GetProcessorInfo - Location2.Thread - 00000000
GetProcessorInfo - Index - 73
GetProcessorInfo - ProcessorId - 00000000000000A3
GetProcessorInfo - StatusFlag - 00000006
GetProcessorInfo - Location.Package - 00000001
GetProcessorInfo - Location.Core - 00000011
GetProcessorInfo - Location.Thread - 00000001
GetProcessorInfo - Location2.Package - 00000001
GetProcessorInfo - Location2.Die - 00000000
GetProcessorInfo - Location2.Tile - 00000000
GetProcessorInfo - Location2.Module - 00000000
GetProcessorInfo - Location2.Core - 00000011
GetProcessorInfo - Location2.Thread - 00000001
GetProcessorInfo - Index - 74
GetProcessorInfo - ProcessorId - 00000000000000A4
GetProcessorInfo - StatusFlag - 00000006
GetProcessorInfo - Location.Package - 00000001
GetProcessorInfo - Location.Core - 00000012
GetProcessorInfo - Location.Thread - 00000000
GetProcessorInfo - Location2.Package - 00000001
GetProcessorInfo - Location2.Die - 00000000
GetProcessorInfo - Location2.Tile - 00000000
GetProcessorInfo - Location2.Module - 00000000
GetProcessorInfo - Location2.Core - 00000012
GetProcessorInfo - Location2.Thread - 00000000
GetProcessorInfo - Index - 75
GetProcessorInfo - ProcessorId - 00000000000000A5
GetProcessorInfo - StatusFlag - 00000006
GetProcessorInfo - Location.Package - 00000001
GetProcessorInfo - Location.Core - 00000012
GetProcessorInfo - Location.Thread - 00000001
GetProcessorInfo - Location2.Package - 00000001
GetProcessorInfo - Location2.Die - 00000000
GetProcessorInfo - Location2.Tile - 00000000
GetProcessorInfo - Location2.Module - 00000000
GetProcessorInfo - Location2.Core - 00000012
GetProcessorInfo - Location2.Thread - 00000001
GetProcessorInfo - Index - 76
GetProcessorInfo - ProcessorId - 00000000000000A6
GetProcessorInfo - StatusFlag - 00000006
GetProcessorInfo - Location.Package - 00000001
GetProcessorInfo - Location.Core - 00000013
GetProcessorInfo - Location.Thread - 00000000
GetProcessorInfo - Location2.Package - 00000001
GetProcessorInfo - Location2.Die - 00000000
GetProcessorInfo - Location2.Tile - 00000000
GetProcessorInfo - Location2.Module - 00000000
GetProcessorInfo - Location2.Core - 00000013
GetProcessorInfo - Location2.Thread - 00000000
GetProcessorInfo - Index - 77
GetProcessorInfo - ProcessorId - 00000000000000A7
GetProcessorInfo - StatusFlag - 00000006
GetProcessorInfo - Location.Package - 00000001
GetProcessorInfo - Location.Core - 00000013
GetProcessorInfo - Location.Thread - 00000001
GetProcessorInfo - Location2.Package - 00000001
GetProcessorInfo - Location2.Die - 00000000
GetProcessorInfo - Location2.Tile - 00000000
GetProcessorInfo - Location2.Module - 00000000
GetProcessorInfo - Location2.Core - 00000013
GetProcessorInfo - Location2.Thread - 00000001
GetProcessorInfo - Index - 78
GetProcessorInfo - ProcessorId - 00000000000000A8
GetProcessorInfo - StatusFlag - 00000006
GetProcessorInfo - Location.Package - 00000001
GetProcessorInfo - Location.Core - 00000014
GetProcessorInfo - Location.Thread - 00000000
GetProcessorInfo - Location2.Package - 00000001
GetProcessorInfo - Location2.Die - 00000000
GetProcessorInfo - Location2.Tile - 00000000
GetProcessorInfo - Location2.Module - 00000000
GetProcessorInfo - Location2.Core - 00000014
GetProcessorInfo - Location2.Thread - 00000000
GetProcessorInfo - Index - 79
GetProcessorInfo - ProcessorId - 00000000000000A9
GetProcessorInfo - StatusFlag - 00000006
GetProcessorInfo - Location.Package - 00000001
GetProcessorInfo - Location.Core - 00000014
GetProcessorInfo - Location.Thread - 00000001
GetProcessorInfo - Location2.Package - 00000001
GetProcessorInfo - Location2.Die - 00000000
GetProcessorInfo - Location2.Tile - 00000000
GetProcessorInfo - Location2.Module - 00000000
GetProcessorInfo - Location2.Core - 00000014
GetProcessorInfo - Location2.Thread - 00000001
GetProcessorInfo - Index - 7A
GetProcessorInfo - ProcessorId - 00000000000000AA
GetProcessorInfo - StatusFlag - 00000006
GetProcessorInfo - Location.Package - 00000001
GetProcessorInfo - Location.Core - 00000015
GetProcessorInfo - Location.Thread - 00000000
GetProcessorInfo - Location2.Package - 00000001
GetProcessorInfo - Location2.Die - 00000000
GetProcessorInfo - Location2.Tile - 00000000
GetProcessorInfo - Location2.Module - 00000000
GetProcessorInfo - Location2.Core - 00000015
GetProcessorInfo - Location2.Thread - 00000000
GetProcessorInfo - Index - 7B
GetProcessorInfo - ProcessorId - 00000000000000AB
GetProcessorInfo - StatusFlag - 00000006
GetProcessorInfo - Location.Package - 00000001
GetProcessorInfo - Location.Core - 00000015
GetProcessorInfo - Location.Thread - 00000001
GetProcessorInfo - Location2.Package - 00000001
GetProcessorInfo - Location2.Die - 00000000
GetProcessorInfo - Location2.Tile - 00000000
GetProcessorInfo - Location2.Module - 00000000
GetProcessorInfo - Location2.Core - 00000015
GetProcessorInfo - Location2.Thread - 00000001
GetProcessorInfo - Index - 7C
GetProcessorInfo - ProcessorId - 00000000000000AC
GetProcessorInfo - StatusFlag - 00000006
GetProcessorInfo - Location.Package - 00000001
GetProcessorInfo - Location.Core - 00000016
GetProcessorInfo - Location.Thread - 00000000
GetProcessorInfo - Location2.Package - 00000001
GetProcessorInfo - Location2.Die - 00000000
GetProcessorInfo - Location2.Tile - 00000000
GetProcessorInfo - Location2.Module - 00000000
GetProcessorInfo - Location2.Core - 00000016
GetProcessorInfo - Location2.Thread - 00000000
GetProcessorInfo - Index - 7D
GetProcessorInfo - ProcessorId - 00000000000000AD
GetProcessorInfo - StatusFlag - 00000006
GetProcessorInfo - Location.Package - 00000001
GetProcessorInfo - Location.Core - 00000016
GetProcessorInfo - Location.Thread - 00000001
GetProcessorInfo - Location2.Package - 00000001
GetProcessorInfo - Location2.Die - 00000000
GetProcessorInfo - Location2.Tile - 00000000
GetProcessorInfo - Location2.Module - 00000000
GetProcessorInfo - Location2.Core - 00000016
GetProcessorInfo - Location2.Thread - 00000001
GetProcessorInfo - Index - 7E
GetProcessorInfo - ProcessorId - 00000000000000AE
GetProcessorInfo - StatusFlag - 00000006
GetProcessorInfo - Location.Package - 00000001
GetProcessorInfo - Location.Core - 00000017
GetProcessorInfo - Location.Thread - 00000000
GetProcessorInfo - Location2.Package - 00000001
GetProcessorInfo - Location2.Die - 00000000
GetProcessorInfo - Location2.Tile - 00000000
GetProcessorInfo - Location2.Module - 00000000
GetProcessorInfo - Location2.Core - 00000017
GetProcessorInfo - Location2.Thread - 00000000
GetProcessorInfo - Index - 7F
GetProcessorInfo - ProcessorId - 00000000000000AF
GetProcessorInfo - StatusFlag - 00000006
GetProcessorInfo - Location.Package - 00000001
GetProcessorInfo - Location.Core - 00000017
GetProcessorInfo - Location.Thread - 00000001
GetProcessorInfo - Location2.Package - 00000001
GetProcessorInfo - Location2.Die - 00000000
GetProcessorInfo - Location2.Tile - 00000000
GetProcessorInfo - Location2.Module - 00000000
GetProcessorInfo - Location2.Core - 00000017
GetProcessorInfo - Location2.Thread - 00000001
GetProcessorInfo - Index - 80
GetProcessorInfo - ProcessorId - 00000000000000B0
GetProcessorInfo - StatusFlag - 00000006
GetProcessorInfo - Location.Package - 00000001
GetProcessorInfo - Location.Core - 00000018
GetProcessorInfo - Location.Thread - 00000000
GetProcessorInfo - Location2.Package - 00000001
GetProcessorInfo - Location2.Die - 00000000
GetProcessorInfo - Location2.Tile - 00000000
GetProcessorInfo - Location2.Module - 00000000
GetProcessorInfo - Location2.Core - 00000018
GetProcessorInfo - Location2.Thread - 00000000
GetProcessorInfo - Index - 81
GetProcessorInfo - ProcessorId - 00000000000000B1
GetProcessorInfo - StatusFlag - 00000006
GetProcessorInfo - Location.Package - 00000001
GetProcessorInfo - Location.Core - 00000018
GetProcessorInfo - Location.Thread - 00000001
GetProcessorInfo - Location2.Package - 00000001
GetProcessorInfo - Location2.Die - 00000000
GetProcessorInfo - Location2.Tile - 00000000
GetProcessorInfo - Location2.Module - 00000000
GetProcessorInfo - Location2.Core - 00000018
GetProcessorInfo - Location2.Thread - 00000001
GetProcessorInfo - Index - 82
GetProcessorInfo - ProcessorId - 00000000000000B2
GetProcessorInfo - StatusFlag - 00000006
GetProcessorInfo - Location.Package - 00000001
GetProcessorInfo - Location.Core - 00000019
GetProcessorInfo - Location.Thread - 00000000
GetProcessorInfo - Location2.Package - 00000001
GetProcessorInfo - Location2.Die - 00000000
GetProcessorInfo - Location2.Tile - 00000000
GetProcessorInfo - Location2.Module - 00000000
GetProcessorInfo - Location2.Core - 00000019
GetProcessorInfo - Location2.Thread - 00000000
GetProcessorInfo - Index - 83
GetProcessorInfo - ProcessorId - 00000000000000B3
GetProcessorInfo - StatusFlag - 00000006
GetProcessorInfo - Location.Package - 00000001
GetProcessorInfo - Location.Core - 00000019
GetProcessorInfo - Location.Thread - 00000001
GetProcessorInfo - Location2.Package - 00000001
GetProcessorInfo - Location2.Die - 00000000
GetProcessorInfo - Location2.Tile - 00000000
GetProcessorInfo - Location2.Module - 00000000
GetProcessorInfo - Location2.Core - 00000019
GetProcessorInfo - Location2.Thread - 00000001
GetProcessorInfo - Index - 84
GetProcessorInfo - ProcessorId - 00000000000000B4
GetProcessorInfo - StatusFlag - 00000006
GetProcessorInfo - Location.Package - 00000001
GetProcessorInfo - Location.Core - 0000001A
GetProcessorInfo - Location.Thread - 00000000
GetProcessorInfo - Location2.Package - 00000001
GetProcessorInfo - Location2.Die - 00000000
GetProcessorInfo - Location2.Tile - 00000000
GetProcessorInfo - Location2.Module - 00000000
GetProcessorInfo - Location2.Core - 0000001A
GetProcessorInfo - Location2.Thread - 00000000
GetProcessorInfo - Index - 85
GetProcessorInfo - ProcessorId - 00000000000000B5
GetProcessorInfo - StatusFlag - 00000006
GetProcessorInfo - Location.Package - 00000001
GetProcessorInfo - Location.Core - 0000001A
GetProcessorInfo - Location.Thread - 00000001
GetProcessorInfo - Location2.Package - 00000001
GetProcessorInfo - Location2.Die - 00000000
GetProcessorInfo - Location2.Tile - 00000000
GetProcessorInfo - Location2.Module - 00000000
GetProcessorInfo - Location2.Core - 0000001A
GetProcessorInfo - Location2.Thread - 00000001
GetProcessorInfo - Index - 86
GetProcessorInfo - ProcessorId - 00000000000000B6
GetProcessorInfo - StatusFlag - 00000006
GetProcessorInfo - Location.Package - 00000001
GetProcessorInfo - Location.Core - 0000001B
GetProcessorInfo - Location.Thread - 00000000
GetProcessorInfo - Location2.Package - 00000001
GetProcessorInfo - Location2.Die - 00000000
GetProcessorInfo - Location2.Tile - 00000000
GetProcessorInfo - Location2.Module - 00000000
GetProcessorInfo - Location2.Core - 0000001B
GetProcessorInfo - Location2.Thread - 00000000
GetProcessorInfo - Index - 87
GetProcessorInfo - ProcessorId - 00000000000000B7
GetProcessorInfo - StatusFlag - 00000006
GetProcessorInfo - Location.Package - 00000001
GetProcessorInfo - Location.Core - 0000001B
GetProcessorInfo - Location.Thread - 00000001
GetProcessorInfo - Location2.Package - 00000001
GetProcessorInfo - Location2.Die - 00000000
GetProcessorInfo - Location2.Tile - 00000000
GetProcessorInfo - Location2.Module - 00000000
GetProcessorInfo - Location2.Core - 0000001B
GetProcessorInfo - Location2.Thread - 00000001
GetProcessorInfo - Index - 88
GetProcessorInfo - ProcessorId - 00000000000000B8
GetProcessorInfo - StatusFlag - 00000006
GetProcessorInfo - Location.Package - 00000001
GetProcessorInfo - Location.Core - 0000001C
GetProcessorInfo - Location.Thread - 00000000
GetProcessorInfo - Location2.Package - 00000001
GetProcessorInfo - Location2.Die - 00000000
GetProcessorInfo - Location2.Tile - 00000000
GetProcessorInfo - Location2.Module - 00000000
GetProcessorInfo - Location2.Core - 0000001C
GetProcessorInfo - Location2.Thread - 00000000
GetProcessorInfo - Index - 89
GetProcessorInfo - ProcessorId - 00000000000000B9
GetProcessorInfo - StatusFlag - 00000006
GetProcessorInfo - Location.Package - 00000001
GetProcessorInfo - Location.Core - 0000001C
GetProcessorInfo - Location.Thread - 00000001
GetProcessorInfo - Location2.Package - 00000001
GetProcessorInfo - Location2.Die - 00000000
GetProcessorInfo - Location2.Tile - 00000000
GetProcessorInfo - Location2.Module - 00000000
GetProcessorInfo - Location2.Core - 0000001C
GetProcessorInfo - Location2.Thread - 00000001
GetProcessorInfo - Index - 8A
GetProcessorInfo - ProcessorId - 00000000000000BA
GetProcessorInfo - StatusFlag - 00000006
GetProcessorInfo - Location.Package - 00000001
GetProcessorInfo - Location.Core - 0000001D
GetProcessorInfo - Location.Thread - 00000000
GetProcessorInfo - Location2.Package - 00000001
GetProcessorInfo - Location2.Die - 00000000
GetProcessorInfo - Location2.Tile - 00000000
GetProcessorInfo - Location2.Module - 00000000
GetProcessorInfo - Location2.Core - 0000001D
GetProcessorInfo - Location2.Thread - 00000000
GetProcessorInfo - Index - 8B
GetProcessorInfo - ProcessorId - 00000000000000BB
GetProcessorInfo - StatusFlag - 00000006
GetProcessorInfo - Location.Package - 00000001
GetProcessorInfo - Location.Core - 0000001D
GetProcessorInfo - Location.Thread - 00000001
GetProcessorInfo - Location2.Package - 00000001
GetProcessorInfo - Location2.Die - 00000000
GetProcessorInfo - Location2.Tile - 00000000
GetProcessorInfo - Location2.Module - 00000000
GetProcessorInfo - Location2.Core - 0000001D
GetProcessorInfo - Location2.Thread - 00000001
GetProcessorInfo - Index - 8C
GetProcessorInfo - ProcessorId - 00000000000000BC
GetProcessorInfo - StatusFlag - 00000006
GetProcessorInfo - Location.Package - 00000001
GetProcessorInfo - Location.Core - 0000001E
GetProcessorInfo - Location.Thread - 00000000
GetProcessorInfo - Location2.Package - 00000001
GetProcessorInfo - Location2.Die - 00000000
GetProcessorInfo - Location2.Tile - 00000000
GetProcessorInfo - Location2.Module - 00000000
GetProcessorInfo - Location2.Core - 0000001E
GetProcessorInfo - Location2.Thread - 00000000
GetProcessorInfo - Index - 8D
GetProcessorInfo - ProcessorId - 00000000000000BD
GetProcessorInfo - StatusFlag - 00000006
GetProcessorInfo - Location.Package - 00000001
GetProcessorInfo - Location.Core - 0000001E
GetProcessorInfo - Location.Thread - 00000001
GetProcessorInfo - Location2.Package - 00000001
GetProcessorInfo - Location2.Die - 00000000
GetProcessorInfo - Location2.Tile - 00000000
GetProcessorInfo - Location2.Module - 00000000
GetProcessorInfo - Location2.Core - 0000001E
GetProcessorInfo - Location2.Thread - 00000001
GetProcessorInfo - Index - 8E
GetProcessorInfo - ProcessorId - 00000000000000BE
GetProcessorInfo - StatusFlag - 00000006
GetProcessorInfo - Location.Package - 00000001
GetProcessorInfo - Location.Core - 0000001F
GetProcessorInfo - Location.Thread - 00000000
GetProcessorInfo - Location2.Package - 00000001
GetProcessorInfo - Location2.Die - 00000000
GetProcessorInfo - Location2.Tile - 00000000
GetProcessorInfo - Location2.Module - 00000000
GetProcessorInfo - Location2.Core - 0000001F
GetProcessorInfo - Location2.Thread - 00000000
GetProcessorInfo - Index - 8F
GetProcessorInfo - ProcessorId - 00000000000000BF
GetProcessorInfo - StatusFlag - 00000006
GetProcessorInfo - Location.Package - 00000001
GetProcessorInfo - Location.Core - 0000001F
GetProcessorInfo - Location.Thread - 00000001
GetProcessorInfo - Location2.Package - 00000001
GetProcessorInfo - Location2.Die - 00000000
GetProcessorInfo - Location2.Tile - 00000000
GetProcessorInfo - Location2.Module - 00000000
GetProcessorInfo - Location2.Core - 0000001F
GetProcessorInfo - Location2.Thread - 00000001
GetProcessorInfo - Index - 90
GetProcessorInfo - ProcessorId - 00000000000000C0
GetProcessorInfo - StatusFlag - 00000006
GetProcessorInfo - Location.Package - 00000001
GetProcessorInfo - Location.Core - 00000020
GetProcessorInfo - Location.Thread - 00000000
GetProcessorInfo - Location2.Package - 00000001
GetProcessorInfo - Location2.Die - 00000000
GetProcessorInfo - Location2.Tile - 00000000
GetProcessorInfo - Location2.Module - 00000000
GetProcessorInfo - Location2.Core - 00000020
GetProcessorInfo - Location2.Thread - 00000000
GetProcessorInfo - Index - 91
GetProcessorInfo - ProcessorId - 00000000000000C1
GetProcessorInfo - StatusFlag - 00000006
GetProcessorInfo - Location.Package - 00000001
GetProcessorInfo - Location.Core - 00000020
GetProcessorInfo - Location.Thread - 00000001
GetProcessorInfo - Location2.Package - 00000001
GetProcessorInfo - Location2.Die - 00000000
GetProcessorInfo - Location2.Tile - 00000000
GetProcessorInfo - Location2.Module - 00000000
GetProcessorInfo - Location2.Core - 00000020
GetProcessorInfo - Location2.Thread - 00000001
GetProcessorInfo - Index - 92
GetProcessorInfo - ProcessorId - 00000000000000C2
GetProcessorInfo - StatusFlag - 00000006
GetProcessorInfo - Location.Package - 00000001
GetProcessorInfo - Location.Core - 00000021
GetProcessorInfo - Location.Thread - 00000000
GetProcessorInfo - Location2.Package - 00000001
GetProcessorInfo - Location2.Die - 00000000
GetProcessorInfo - Location2.Tile - 00000000
GetProcessorInfo - Location2.Module - 00000000
GetProcessorInfo - Location2.Core - 00000021
GetProcessorInfo - Location2.Thread - 00000000
GetProcessorInfo - Index - 93
GetProcessorInfo - ProcessorId - 00000000000000C3
GetProcessorInfo - StatusFlag - 00000006
GetProcessorInfo - Location.Package - 00000001
GetProcessorInfo - Location.Core - 00000021
GetProcessorInfo - Location.Thread - 00000001
GetProcessorInfo - Location2.Package - 00000001
GetProcessorInfo - Location2.Die - 00000000
GetProcessorInfo - Location2.Tile - 00000000
GetProcessorInfo - Location2.Module - 00000000
GetProcessorInfo - Location2.Core - 00000021
GetProcessorInfo - Location2.Thread - 00000001
GetProcessorInfo - Index - 94
GetProcessorInfo - ProcessorId - 00000000000000C4
GetProcessorInfo - StatusFlag - 00000006
GetProcessorInfo - Location.Package - 00000001
GetProcessorInfo - Location.Core - 00000022
GetProcessorInfo - Location.Thread - 00000000
GetProcessorInfo - Location2.Package - 00000001
GetProcessorInfo - Location2.Die - 00000000
GetProcessorInfo - Location2.Tile - 00000000
GetProcessorInfo - Location2.Module - 00000000
GetProcessorInfo - Location2.Core - 00000022
GetProcessorInfo - Location2.Thread - 00000000
GetProcessorInfo - Index - 95
GetProcessorInfo - ProcessorId - 00000000000000C5
GetProcessorInfo - StatusFlag - 00000006
GetProcessorInfo - Location.Package - 00000001
GetProcessorInfo - Location.Core - 00000022
GetProcessorInfo - Location.Thread - 00000001
GetProcessorInfo - Location2.Package - 00000001
GetProcessorInfo - Location2.Die - 00000000
GetProcessorInfo - Location2.Tile - 00000000
GetProcessorInfo - Location2.Module - 00000000
GetProcessorInfo - Location2.Core - 00000022
GetProcessorInfo - Location2.Thread - 00000001
GetProcessorInfo - Index - 96
GetProcessorInfo - ProcessorId - 00000000000000C6
GetProcessorInfo - StatusFlag - 00000006
GetProcessorInfo - Location.Package - 00000001
GetProcessorInfo - Location.Core - 00000023
GetProcessorInfo - Location.Thread - 00000000
GetProcessorInfo - Location2.Package - 00000001
GetProcessorInfo - Location2.Die - 00000000
GetProcessorInfo - Location2.Tile - 00000000
GetProcessorInfo - Location2.Module - 00000000
GetProcessorInfo - Location2.Core - 00000023
GetProcessorInfo - Location2.Thread - 00000000
GetProcessorInfo - Index - 97
GetProcessorInfo - ProcessorId - 00000000000000C7
GetProcessorInfo - StatusFlag - 00000006
GetProcessorInfo - Location.Package - 00000001
GetProcessorInfo - Location.Core - 00000023
GetProcessorInfo - Location.Thread - 00000001
GetProcessorInfo - Location2.Package - 00000001
GetProcessorInfo - Location2.Die - 00000000
GetProcessorInfo - Location2.Tile - 00000000
GetProcessorInfo - Location2.Module - 00000000
GetProcessorInfo - Location2.Core - 00000023
GetProcessorInfo - Location2.Thread - 00000001
GetProcessorInfo - Index - 98
GetProcessorInfo - ProcessorId - 00000000000000C8
GetProcessorInfo - StatusFlag - 00000006
GetProcessorInfo - Location.Package - 00000001
GetProcessorInfo - Location.Core - 00000024
GetProcessorInfo - Location.Thread - 00000000
GetProcessorInfo - Location2.Package - 00000001
GetProcessorInfo - Location2.Die - 00000000
GetProcessorInfo - Location2.Tile - 00000000
GetProcessorInfo - Location2.Module - 00000000
GetProcessorInfo - Location2.Core - 00000024
GetProcessorInfo - Location2.Thread - 00000000
GetProcessorInfo - Index - 99
GetProcessorInfo - ProcessorId - 00000000000000C9
GetProcessorInfo - StatusFlag - 00000006
GetProcessorInfo - Location.Package - 00000001
GetProcessorInfo - Location.Core - 00000024
GetProcessorInfo - Location.Thread - 00000001
GetProcessorInfo - Location2.Package - 00000001
GetProcessorInfo - Location2.Die - 00000000
GetProcessorInfo - Location2.Tile - 00000000
GetProcessorInfo - Location2.Module - 00000000
GetProcessorInfo - Location2.Core - 00000024
GetProcessorInfo - Location2.Thread - 00000001
GetProcessorInfo - Index - 9A
GetProcessorInfo - ProcessorId - 00000000000000CA
GetProcessorInfo - StatusFlag - 00000006
GetProcessorInfo - Location.Package - 00000001
GetProcessorInfo - Location.Core - 00000025
GetProcessorInfo - Location.Thread - 00000000
GetProcessorInfo - Location2.Package - 00000001
GetProcessorInfo - Location2.Die - 00000000
GetProcessorInfo - Location2.Tile - 00000000
GetProcessorInfo - Location2.Module - 00000000
GetProcessorInfo - Location2.Core - 00000025
GetProcessorInfo - Location2.Thread - 00000000
GetProcessorInfo - Index - 9B
GetProcessorInfo - ProcessorId - 00000000000000CB
GetProcessorInfo - StatusFlag - 00000006
GetProcessorInfo - Location.Package - 00000001
GetProcessorInfo - Location.Core - 00000025
GetProcessorInfo - Location.Thread - 00000001
GetProcessorInfo - Location2.Package - 00000001
GetProcessorInfo - Location2.Die - 00000000
GetProcessorInfo - Location2.Tile - 00000000
GetProcessorInfo - Location2.Module - 00000000
GetProcessorInfo - Location2.Core - 00000025
GetProcessorInfo - Location2.Thread - 00000001
GetProcessorInfo - Index - 9C
GetProcessorInfo - ProcessorId - 00000000000000CC
GetProcessorInfo - StatusFlag - 00000006
GetProcessorInfo - Location.Package - 00000001
GetProcessorInfo - Location.Core - 00000026
GetProcessorInfo - Location.Thread - 00000000
GetProcessorInfo - Location2.Package - 00000001
GetProcessorInfo - Location2.Die - 00000000
GetProcessorInfo - Location2.Tile - 00000000
GetProcessorInfo - Location2.Module - 00000000
GetProcessorInfo - Location2.Core - 00000026
GetProcessorInfo - Location2.Thread - 00000000
GetProcessorInfo - Index - 9D
GetProcessorInfo - ProcessorId - 00000000000000CD
GetProcessorInfo - StatusFlag - 00000006
GetProcessorInfo - Location.Package - 00000001
GetProcessorInfo - Location.Core - 00000026
GetProcessorInfo - Location.Thread - 00000001
GetProcessorInfo - Location2.Package - 00000001
GetProcessorInfo - Location2.Die - 00000000
GetProcessorInfo - Location2.Tile - 00000000
GetProcessorInfo - Location2.Module - 00000000
GetProcessorInfo - Location2.Core - 00000026
GetProcessorInfo - Location2.Thread - 00000001
GetProcessorInfo - Index - 9E
GetProcessorInfo - ProcessorId - 00000000000000CE
GetProcessorInfo - StatusFlag - 00000006
GetProcessorInfo - Location.Package - 00000001
GetProcessorInfo - Location.Core - 00000027
GetProcessorInfo - Location.Thread - 00000000
GetProcessorInfo - Location2.Package - 00000001
GetProcessorInfo - Location2.Die - 00000000
GetProcessorInfo - Location2.Tile - 00000000
GetProcessorInfo - Location2.Module - 00000000
GetProcessorInfo - Location2.Core - 00000027
GetProcessorInfo - Location2.Thread - 00000000
GetProcessorInfo - Index - 9F
GetProcessorInfo - ProcessorId - 00000000000000CF
GetProcessorInfo - StatusFlag - 00000006
GetProcessorInfo - Location.Package - 00000001
GetProcessorInfo - Location.Core - 00000027
GetProcessorInfo - Location.Thread - 00000001
GetProcessorInfo - Location2.Package - 00000001
GetProcessorInfo - Location2.Die - 00000000
GetProcessorInfo - Location2.Tile - 00000000
GetProcessorInfo - Location2.Module - 00000000
GetProcessorInfo - Location2.Core - 00000027
GetProcessorInfo - Location2.Thread - 00000001
mCpuConfigLibConfigContextBuffer->NumberOfProcessors = A0
mCpuConfigLibConfigContextBuffer->BspNumber = 0
SMBIOS Package[0] - Processor[0]
SMBIOS Package[1] - Processor[80]
CPU[000]: ThreadCountOfPackage=80 ThreadCountOfDie=80 ThreadCountOfCore=2
CPU[080]: ThreadCountOfPackage=80 ThreadCountOfDie=80 ThreadCountOfCore=2
PROGRESS CODE: V03040003 I0
PDB = c:\efi\servergen2\intel\Build\EagleStreamRpPkg\DEBUG_VS2015x86\X64\ServerSecurityPkg\Tdx\TdxDxe\TdxDxe\DEBUG\TdxDxe.pdb
PROGRESS CODE: V03040002 I0
[MP_DISPATCH] MpDispatch4v0_CommonConstructor BEGIN
[MP_DISPATCH] MpDispatch4v0_CommonConstructor END (Success)
[TDX_LATE] TdxDxeEntryPoint BEGIN
TDX not capable
[TDX_LATE] TdxDxeEntryPoint END (Unsupported)
[MP_DISPATCH] MpDispatch4v0_CommonDestructor BEGIN
[MP_DISPATCH] MpDispatch4v0_CommonDestructor END (Success)
Error: Image at 0006A238000 start failed: Unsupported
PDB = c:\efi\servergen2\intel\Build\EagleStreamRpPkg\DEBUG_VS2015x86\X64\ServerSecurityPkg\Tdx\TdxDxe\TdxDxe\DEBUG\TdxDxe.pdb
PROGRESS CODE: V03040003 I0
PDB = c:\efi\servergen2\intel\Build\EagleStreamRpPkg\DEBUG_VS2015x86\X64\ServerSiliconPkg\Iio\Dxe\IioInit\IioInitSpr\DEBUG\IioInit.pdb
PROGRESS CODE: V03040002 I0
[IIO](TH) Trace Hub requested memory Size is 0. Not allocating memory.
[IIO](TH) PCH Trace Hub not accessible. Disabled.
[IIO](TH) ERROR Failed to configure PCH Trace Hub. Status= Not Ready
ERROR: IioTraceHubInitialize failed. Status= Not Ready
[IIO](SPK) IioSpkSocketInitialize: SocketId: 0
[IIO](SPK) IioSpkSocketInitialize: SocketId: 1
[0.1 p1] 00:15:01.0: Device is not present!
[0.2 p9] 00:26:01.0: Device is not present!
[0.3 p17] 00:37:01.0: Device is not present!
[0.4 p25] 00:48:01.0: Device is not present!
[0.4 p27] 00:48:03.0: Device is not present!
[0.4 p29] 00:48:05.0: Device is not present!
[0.4 p31] 00:48:07.0: Device is not present!
[0.5 p33] 00:59:01.0: Device is not present!
[0.5 p35] 00:59:03.0: Device is not present!
[0.5 p37] 00:59:05.0: Device is not present!
[0.5 p39] 00:59:07.0: Device is not present!
[1.1 p1] 00:97:01.0: Device is not present!
[1.2 p9] 00:A7:01.0: Device is not present!
[1.3 p17] 00:B7:01.0: Device is not present!
[1.4 p25] 00:C7:01.0: Device is not present!
[1.4 p27] 00:C7:03.0: Device is not present!
[1.4 p29] 00:C7:05.0: Device is not present!
[1.4 p31] 00:C7:07.0: Device is not present!
[1.5 p33] 00:D7:01.0: Device is not present!
[1.5 p35] 00:D7:03.0: Device is not present!
[1.5 p37] 00:D7:05.0: Device is not present!
[1.5 p39] 00:D7:07.0: Device is not present!
[1.6 p41] 00:80:01.0: Device is not present!
[1.6 p45] 00:80:05.0: Device is not present!
PROGRESS CODE: V03040003 I0
PDB = c:\efi\servergen2\intel\Build\EagleStreamRpPkg\DEBUG_VS2015x86\X64\ClientOneSiliconPkg\IpBlock\Sps\Sps\Dxe\SpsDxe\DEBUG\SpsDxe.pdb
PROGRESS CODE: V03040002 I0
[HECI Transport-1 DXE] Send pkt: 812E0007
00: 11 00 00 00 01 80 0B 00 - 00 00 00 00 02 00 50 00
10: 50 00 A0 00 00 11 81 FD - 2C 08 05 00 00 80 23 11
20: 10 0F 0E 0D 0C 0B 0A 09 - 08 00 00 00 00 00 0B 23
30: 11 10 0F 0E 0D 0C 0B 0A - 09 08 00 00 00 00 00 00
40: 00 00 00 00 00 00 00 00 - 00 00 00 00 00 00 00 00
50: 00 00 00 00 00 00 00 00 - 00 00 00 00 00 00 00 00
60: 00 00 00 00 00 00 00 00 - 00 00 00 00 00 00 00 00
70: 00 00 00 00 00 00 00 00 - 00 00 00 00 00 00 00 00
80: 00 00 00 00 00 00 00 00 - 00 00 00 00 00 00 00 00
90: 00 00 00 00 00 00 00 00 - 00 00 00 00 00 00 00 00
A0: 00 00 00 00 00 00 00 00 - 00 00 00 00 00 00 00 00
B0: 00 00 00 00 00 00 00 00 - 00 00 00 00 00 00 00 00
C0: 00 00 00 00 00 00 00 00 - 00 00 00 00 00 00 00 00
D0: 00 00 00 00 00 00 00 00 - 00 00 00 00 00 00 00 00
E0: 00 00 00 00 00 00 00 00 - 00 00 00 00 00 00 00 00
F0: 00 00 00 00 00 00 00 00 - 00 00 00 00 00 00 00 00
00: 00 00 00 00 00 00 00 00 - 00 00 00 00 00 00 00 00
10: 00 00 00 00 00 00 00 00 - 00 00 00 00 00 00 00 00
20: 00 00 00 00 00 00 00 00 - 00 00 00 00 00 00
[HECI Transport-1 DXE] Got pkt: 80080007
00: 11 80 00 00 00 00 00 00
PROGRESS CODE: V03040003 I0
PDB = c:\efi\servergen2\intel\Build\EagleStreamRpPkg\DEBUG_VS2015x86\X64\ClientOneSiliconPkg\IpBlock\MeIgnition\Dxe\MeIgnitionDxe\DEBUG\MeIgnitionDxe.pdb
PROGRESS CODE: V03040002 I0
PROGRESS CODE: V03040003 I0
PDB = c:\efi\servergen2\intel\Build\EagleStreamRpPkg\DEBUG_VS2015x86\X64\ClientOneSiliconPkg\IpBlock\Me\MeFwDowngrade\Dxe\MeFwDowngrade\DEBUG\MeFwDowngrade.pdb
PROGRESS CODE: V03040002 I0
Error: Image at 0006A225000 start failed: Unsupported
PDB = c:\efi\servergen2\intel\Build\EagleStreamRpPkg\DEBUG_VS2015x86\X64\ClientOneSiliconPkg\IpBlock\Me\MeFwDowngrade\Dxe\MeFwDowngrade\DEBUG\MeFwDowngrade.pdb
PROGRESS CODE: V03040003 I0
PDB = c:\efi\servergen2\intel\Build\EagleStreamRpPkg\DEBUG_VS2015x86\X64\ClientOneSiliconPkg\IpBlock\Me\MeSmbiosDxe\MeSmbiosDxe\DEBUG\MeSmbiosDxe.pdb
PROGRESS CODE: V03040002 I0
Error: Image at 0006A23C000 start failed: Unsupported
PDB = c:\efi\servergen2\intel\Build\EagleStreamRpPkg\DEBUG_VS2015x86\X64\ClientOneSiliconPkg\IpBlock\Me\MeSmbiosDxe\MeSmbiosDxe\DEBUG\MeSmbiosDxe.pdb
PROGRESS CODE: V03040003 I0
PDB = c:\efi\servergen2\intel\Build\EagleStreamRpPkg\DEBUG_VS2015x86\X64\ServerPlatformPkg\Features\Me\Client\MeSmbiosUpdateConfigDxe\MeSmbiosUpdateConfigDxe\DEBUG\MeSmbiosUpdateConfig.pdb
PROGRESS CODE: V03040002 I0
Error: Image at 0006A22B000 start failed: Unsupported
PDB = c:\efi\servergen2\intel\Build\EagleStreamRpPkg\DEBUG_VS2015x86\X64\ServerPlatformPkg\Features\Me\Client\MeSmbiosUpdateConfigDxe\MeSmbiosUpdateConfigDxe\DEBUG\MeSmbiosUpdateConfig.pdb
PROGRESS CODE: V03040003 I0
PDB = c:\efi\servergen2\intel\Build\EagleStreamRpPkg\DEBUG_VS2015x86\X64\ServerPlatformPkg\Features\Me\MeExtMeasurement\Dxe\MeExtMeasurement\DEBUG\MeExtMeasurement.pdb
PROGRESS CODE: V03040002 I0
MeExtMeasurementEntryPoint: not Me Type
PROGRESS CODE: V03040003 I0
PDB = c:\efi\servergen2\intel\Build\EagleStreamRpPkg\DEBUG_VS2015x86\X64\ServerPlatformPkg\Features\Me\Client\Amt\AmtSaveMebxConfigDxe\AmtSaveMebxConfigDxe\DEBUG\AmtSaveMebxConfig.pdb
PROGRESS CODE: V03040002 I0
Error: Image at 0006A23C000 start failed: Unsupported
PDB = c:\efi\servergen2\intel\Build\EagleStreamRpPkg\DEBUG_VS2015x86\X64\ServerPlatformPkg\Features\Me\Client\Amt\AmtSaveMebxConfigDxe\AmtSaveMebxConfigDxe\DEBUG\AmtSaveMebxConfig.pdb
PROGRESS CODE: V03040003 I0
PDB = c:\efi\servergen2\intel\Build\EagleStreamRpPkg\DEBUG_VS2015x86\X64\XmlCliFeaturePkg\XmlCliCommon\Dxe\XmlCliCommonDxe\DEBUG\XmlCliCommonDxe.pdb
PROGRESS CODE: V03040002 I0
PROGRESS CODE: V03040003 I0
PDB = c:\efi\servergen2\intel\Build\EagleStreamRpPkg\DEBUG_VS2015x86\X64\ServerSecurityPkg\Pfr\DxeSmm\PfrDxe\DEBUG\PfrDxeDriver.pdb
PROGRESS CODE: V03040002 I0
PROGRESS CODE: V03040003 I0
PDB = c:\efi\servergen2\intel\Build\EagleStreamRpPkg\DEBUG_VS2015x86\X64\PcAtChipsetPkg\PcatRealTimeClockRuntimeDxe\PcatRealTimeClockRuntimeDxe\DEBUG\PcRtc.pdb
PROGRESS CODE: V03040002 I0
ERROR: C40000002:V0306000A I0 378D7B65-8DA9-4773-B6E4-A47826A833E1
PROGRESS CODE: V03040003 I0
PDB = c:\efi\servergen2\intel\Build\EagleStreamRpPkg\DEBUG_VS2015x86\X64\SecurityPkg\VariableAuthenticated\SecureBootConfigDxe\SecureBootConfigDxe\DEBUG\SecureBootConfigDxe.pdb
PROGRESS CODE: V03040002 I0
PROGRESS CODE: V03040003 I0
PDB = c:\efi\servergen2\intel\Build\EagleStreamRpPkg\DEBUG_VS2015x86\X64\MdeModulePkg\Universal\MonotonicCounterRuntimeDxe\MonotonicCounterRuntimeDxe\DEBUG\MonotonicCounterRuntimeDxe.pdb
PROGRESS CODE: V03040002 I0
PROGRESS CODE: V03040003 I0
PDB = c:\efi\servergen2\intel\Build\EagleStreamRpPkg\DEBUG_VS2015x86\X64\MdeModulePkg\Universal\CapsuleRuntimeDxe\CapsuleRuntimeDxe\DEBUG\CapsuleRuntimeDxe.pdb
PROGRESS CODE: V03040002 I0
PROGRESS CODE: V03040003 I0
PDB = c:\efi\servergen2\intel\Build\EagleStreamRpPkg\DEBUG_VS2015x86\X64\SecurityPkg\Tcg\MemoryOverwriteControl\TcgMor\DEBUG\TcgMor.pdb
PROGRESS CODE: V03040002 I0
PROGRESS CODE: V03040003 I0
PDB = c:\efi\servergen2\intel\Build\EagleStreamRpPkg\DEBUG_VS2015x86\X64\SecurityPkg\Tcg\Tcg2Config\Tcg2ConfigDxe\DEBUG\Tcg2ConfigDxe.pdb
PROGRESS CODE: V03040002 I0
PROGRESS CODE: V03040003 I0
PDB = c:\efi\servergen2\intel\Build\EagleStreamRpPkg\DEBUG_VS2015x86\X64\SecurityPkg\Tcg\Tcg2Acpi\Tcg2Acpi\DEBUG\Tcg2Acpi.pdb
PROGRESS CODE: V03040002 I0
PROGRESS CODE: V03040003 I0
PDB = c:\efi\servergen2\intel\Build\EagleStreamRpPkg\DEBUG_VS2015x86\X64\ServerPlatformPkg\Platform\Dxe\Tcg2PlatformDxe\Tcg2PlatformDxe\DEBUG\Tcg2PlatformDxe.pdb
PROGRESS CODE: V03040002 I0
Failed to locate gEfiDxeSmmReadyToLockProtocolGuid.
PROGRESS CODE: V03040003 I0
PDB = c:\efi\servergen2\intel\Build\EagleStreamRpPkg\DEBUG_VS2015x86\X64\IntelSiliconPkg\Feature\PcieSecurity\IntelPciDeviceSecurityDxe\IntelPciDeviceSecurityDxe\DEBUG\IntelPciDeviceSecurityDxe.pdb
PROGRESS CODE: V03040002 I0
PROGRESS CODE: V03040003 I0
PDB = c:\efi\servergen2\intel\Build\EagleStreamRpPkg\DEBUG_VS2015x86\X64\ServerPlatformPkg\Platform\Dxe\MemorySubClass\MemorySubClass\DEBUG\MemorySubClass.pdb
PROGRESS CODE: V03040002 I0
PROGRESS CODE: V03040003 I0
PDB = c:\efi\servergen2\intel\Build\EagleStreamRpPkg\DEBUG_VS2015x86\X64\ServerPlatformPkg\Platform\Dxe\EmulationDfxSetup\EmulationDfxSetup\DEBUG\EmulationDfxSetup.pdb
PROGRESS CODE: V03040002 I0
PROGRESS CODE: V03040003 I0
PDB = c:\efi\servergen2\intel\Build\EagleStreamRpPkg\DEBUG_VS2015x86\X64\ServerRasPkg\Driver\Dxe\IioRasInit\IioRasInit\DEBUG\IioRasInit.pdb
PROGRESS CODE: V03040002 I0
PROGRESS CODE: V03040003 I0
PDB = c:\efi\servergen2\intel\Build\EagleStreamRpPkg\DEBUG_VS2015x86\X64\ServerRasPkg\Driver\Dxe\AddressTranslationDxe\AddressTranslationDxe\DEBUG\AddressTranslationDxe.pdb
PROGRESS CODE: V03040002 I0
PROGRESS CODE: V03040003 I0
PDB = c:\efi\servergen2\intel\Build\EagleStreamRpPkg\DEBUG_VS2015x86\X64\ServerPlatformPkg\Features\PrmAddrTransDsmConfigDxe\PrmAddrTransDsmConfigDxe\DEBUG\PrmAddrTransDsmConfigDxe.pdb
PROGRESS CODE: V03040002 I0
PROGRESS CODE: V03040003 I0
PDB = c:\efi\servergen2\intel\Build\EagleStreamRpPkg\DEBUG_VS2015x86\X64\ServerPlatformPkg\Features\PrmAddrTransDsm\PrmAddrTransDsm\DEBUG\PrmAddrTransDsm.pdb
PROGRESS CODE: V03040002 I0
PROGRESS CODE: V03040003 I0
PDB = c:\efi\servergen2\intel\Build\EagleStreamRpPkg\DEBUG_VS2015x86\X64\XmlCliFeaturePkg\XmlCliCommon\Smm\XmlCliCommonSmm\DEBUG\XmlCliCommonSmm.pdb
PROGRESS CODE: V03070002 I0
PROGRESS CODE: V03070003 I0
PDB = c:\efi\servergen2\intel\Build\EagleStreamRpPkg\DEBUG_VS2015x86\X64\ServerSecurityPkg\Pfr\DxeSmm\PfrSmm\DEBUG\PfrSmmDriver.pdb
PROGRESS CODE: V03070002 I0
PROGRESS CODE: V03070003 I0
PDB = c:\efi\servergen2\intel\Build\EagleStreamRpPkg\DEBUG_VS2015x86\X64\UserAuthFeaturePkg\UserAuthenticationDxeSmm\UserAuthenticationSmm\DEBUG\UserAuthenticationSmm.pdb
PROGRESS CODE: V03070002 I0
PROGRESS CODE: V03070003 I0
PDB = c:\efi\servergen2\intel\Build\EagleStreamRpPkg\DEBUG_VS2015x86\X64\ServerRasPkg\Driver\Smm\MemTopology\MemTopology\DEBUG\MemTopology.pdb
PROGRESS CODE: V03070002 I0
PROGRESS CODE: V03070003 I0
PDB = c:\efi\servergen2\intel\Build\EagleStreamRpPkg\DEBUG_VS2015x86\X64\ServerRasPkg\PolicySample\PolicySample\DEBUG\PolicySampleDriver.pdb
PROGRESS CODE: V03070002 I0
InitializePolicyData
Enable Poison when 2LM is enabled
CxlMefnEn: 0x0
PROGRESS CODE: V03070003 I0
PDB = c:\efi\servergen2\intel\Build\EagleStreamRpPkg\DEBUG_VS2015x86\X64\ServerRasPkg\Driver\Smm\PartialMirrorHandler\PartialMirrorHandler\DEBUG\PartialMirrorHandler.pdb
PROGRESS CODE: V03070002 I0
PROGRESS CODE: V03070003 I0
PDB = c:\efi\servergen2\intel\Build\EagleStreamRpPkg\DEBUG_VS2015x86\X64\ServerRasPkg\Driver\Smm\Gen2\ImcErrorHandler\ImcErrorHandler\DEBUG\ImcErrorHandler.pdb
PROGRESS CODE: V03070002 I0
[ImcErrorHandler][CrystalRidgeLib] Failed to locate protocol: Not Found
InitializeImcErrorHandler start!
[imc] initialization start!
[PCLS]: InitPclsSparing()... Start
[PCLS]: Register CheckAndHandlePclsSparing()...
[imc] initialization start!
[imc] ConfigSystemRetryRegister start!
[imc] ImcCorrectableErrorEnable start!
PMemEccModeInit
[imc] initialization start!
[imc] ConfigSystemRetryRegister start!
[imc] ImcCorrectableErrorEnable start!
PMemEccModeInit
aend!
PROGRESS CODE: V03070003 I0
PDB = c:\efi\servergen2\intel\Build\EagleStreamRpPkg\DEBUG_VS2015x86\X64\ServerRasPkg\Driver\Smm\Gen2\ProcessorErrorHandler\ProcessorErrorHandler\DEBUG\ProcessorErrorHandler.pdb
PROGRESS CODE: V03070002 I0
[IEH] Start IEH initialization!
[IEH] Search all IEH device in the system
CXL Stack found, CxlValid 0x0, Cxl11CompatibilityMode 0x0
CXL Stack found, CxlValid 0x0, Cxl11CompatibilityMode 0x0
CXL Stack found, CxlValid 0x0, Cxl11CompatibilityMode 0x0
CXL Stack found, CxlValid 0x0, Cxl11CompatibilityMode 0x0
CXL Stack found, CxlValid 0x0, Cxl11CompatibilityMode 0x0
CXL Stack found, CxlValid 0x0, Cxl11CompatibilityMode 0x0
CXL Stack found, CxlValid 0x0, Cxl11CompatibilityMode 0x0
CXL Stack found, CxlValid 0x0, Cxl11CompatibilityMode 0x0
CXL Stack found, CxlValid 0x0, Cxl11CompatibilityMode 0x0
CXL Stack found, CxlValid 0x0, Cxl11CompatibilityMode 0x0
CXL Stack found, CxlValid 0x0, Cxl11CompatibilityMode 0x0
CXL Stack found, CxlValid 0x0, Cxl11CompatibilityMode 0x0
[IEH]-------------- Print created IEH tree -----------
socket:0x0 Bus:0x7E Dev:0x0 Func:0x3 -- Max Bit Index:0x1D BitIndex :0x0 DevCount on this bit :0x1,
ShareIdx:0x0 socket:0x0 Bus:0x7E Dev:0x0 Func:0x3 -- BitIndex :0x1 DevCount on this bit :0x1,
ShareIdx:0x0 socket:0x0 Bus:0x0 Dev:0x14 Func:0x4 -- BitIndex :0x0 DevCount on this bit :0x1,
ShareIdx:0x0 socket:0x0 Bus:0x0 Dev:0x14 Func:0x4 -- BitIndex :0x1 DevCount on this bit :0x1,
ShareIdx:0x0 socket:0x0 Bus:0x0 Dev:0x14 Func:0x0 -- BitIndex :0x2 DevCount on this bit :0x1,
ShareIdx:0x0 socket:0x0 Bus:0x0 Dev:0x1F Func:0x0 -- BitIndex :0x3 DevCount on this bit :0x1,
ShareIdx:0x0 socket:0x0 Bus:0x0 Dev:0x8 Func:0x0 -- BitIndex :0x4 DevCount on this bit :0x1,
ShareIdx:0x0 socket:0x0 Bus:0x0 Dev:0x9 Func:0x0 -- BitIndex :0x5 DevCount on this bit :0x1,
ShareIdx:0x0 socket:0x0 Bus:0x0 Dev:0xA Func:0x0 -- BitIndex :0x6 DevCount on this bit :0x1,
ShareIdx:0x0 socket:0x0 Bus:0x0 Dev:0xB Func:0x0 -- BitIndex :0x7 DevCount on this bit :0x1,
ShareIdx:0x0 socket:0x0 Bus:0x0 Dev:0xC Func:0x0 -- BitIndex :0x8 DevCount on this bit :0x1,
ShareIdx:0x0 socket:0x0 Bus:0x0 Dev:0xD Func:0x0 -- BitIndex :0x9 DevCount on this bit :0x1,
ShareIdx:0x0 socket:0x0 Bus:0x0 Dev:0xE Func:0x0 -- BitIndex :0xA DevCount on this bit :0x1,
ShareIdx:0x0 socket:0x0 Bus:0x0 Dev:0xF Func:0x0 -- BitIndex :0xB DevCount on this bit :0x1,
ShareIdx:0x0 socket:0x0 Bus:0x0 Dev:0x10 Func:0x0 -- BitIndex :0xC DevCount on this bit :0x1,
ShareIdx:0x0 socket:0x0 Bus:0x0 Dev:0x11 Func:0x0 -- BitIndex :0xD DevCount on this bit :0x1,
ShareIdx:0x0 socket:0x0 Bus:0x0 Dev:0x12 Func:0x0 -- BitIndex :0xE DevCount on this bit :0x1,
ShareIdx:0x0 socket:0x0 Bus:0x0 Dev:0x13 Func:0x0 -- BitIndex :0xF DevCount on this bit :0x1,
ShareIdx:0x0 socket:0x0 Bus:0x0 Dev:0x1A Func:0x0 -- BitIndex :0x10 DevCount on this bit :0x1,
ShareIdx:0x0 socket:0x0 Bus:0x0 Dev:0x1B Func:0x0 -- BitIndex :0x11 DevCount on this bit :0x1,
ShareIdx:0x0 socket:0x0 Bus:0x0 Dev:0x1C Func:0x0 -- BitIndex :0x12 DevCount on this bit :0x1,
ShareIdx:0x0 socket:0x0 Bus:0x0 Dev:0x1D Func:0x0 -- BitIndex :0x13 DevCount on this bit :0x1,
ShareIdx:0x0 socket:0x0 Bus:0x0 Dev:0x1F Func:0x7 -- BitIndex :0x14 DevCount on this bit :0x1,
ShareIdx:0x0 socket:0x0 Bus:0x0 Dev:0x1F Func:0x4 -- BitIndex :0x15 DevCount on this bit :0x1,
ShareIdx:0x0 socket:0x0 Bus:0x0 Dev:0x1F Func:0x0 -- BitIndex :0x16 DevCount on this bit :0x1,
ShareIdx:0x0 socket:0x0 Bus:0x0 Dev:0x17 Func:0x0 -- BitIndex :0x17 DevCount on this bit :0x1,
ShareIdx:0x0 socket:0x0 Bus:0x0 Dev:0x18 Func:0x0 -- BitIndex :0x18 DevCount on this bit :0x1,
ShareIdx:0x0 socket:0x0 Bus:0x0 Dev:0x19 Func:0x0 -- BitIndex :0x19 DevCount on this bit :0x1,
ShareIdx:0x0 socket:0x0 Bus:0x0 Dev:0x1F Func:0x6 -- BitIndex :0x1A DevCount on this bit :0x1,
ShareIdx:0x0 socket:0x0 Bus:0x0 Dev:0x1F Func:0x3 -- BitIndex :0x1B DevCount on this bit :0x1,
ShareIdx:0x0 socket:0x0 Bus:0x0 Dev:0x16 Func:0x0 -- BitIndex :0x1C DevCount on this bit :0x1,
ShareIdx:0x0 socket:0x0 Bus:0x0 Dev:0x0 Func:0x0 -- BitIndex :0x1D DevCount on this bit :0x1,
ShareIdx:0x0 socket:0x0 Bus:0x0 Dev:0x1 Func:0x0 -- BitIndex :0x1E DevCount on this bit :0x1,
ShareIdx:0x0 socket:0x0 Bus:0x0 Dev:0x0 Func:0x0 -- BitIndex :0x1F DevCount on this bit :0x1,
ShareIdx:0x0 socket:0x0 Bus:0x0 Dev:0x0 Func:0x0 -- BitIndex :0x2 DevCount on this bit :0x1,
ShareIdx:0x0 socket:0x0 Bus:0x6A Dev:0x0 Func:0x4 -- BitIndex :0x0 DevCount on this bit :0xA,
ShareIdx:0x0 socket:0x0 Bus:0x6A Dev:0x0 Func:0x4 -- ShareIdx:0x1 socket:0x0 Bus:0x6A Dev:0x0 Func:0x4 -- PSF Dino ShareIdx:0x2 socket:0x0 Bus:0x6A Dev:0x0 Func:0x4 -- PSF HCx ShareIdx:0x3 socket:0x0 Bus:0x6A Dev:0x1 Func:0x0 -- ShareIdx:0x4 socket:0x0 Bus:0x6A Dev:0x2 Func:0x0 -- ShareIdx:0x5 socket:0x0 Bus:0x6A Dev:0x3 Func:0x0 -- ShareIdx:0x6 socket:0x0 Bus:0x6A Dev:0x3 Func:0x1 -- ShareIdx:0x7 socket:0x0 Bus:0x6A Dev:0x3 Func:0x2 -- ShareIdx:0x8 socket:0x0 Bus:0x6B Dev:0x0 Func:0x0 -- ShareIdx:0x9 socket:0x0 Bus:0x6D Dev:0x0 Func:0x0 -- BitIndex :0x1 DevCount on this bit :0x3,
ShareIdx:0x0 socket:0x0 Bus:0x6A Dev:0x0 Func:0x0 -- ShareIdx:0x1 socket:0x0 Bus:0x6A Dev:0x0 Func:0x1 -- ShareIdx:0x2 socket:0x0 Bus:0x6A Dev:0x0 Func:0x2 -- BitIndex :0x3 DevCount on this bit :0x1,
ShareIdx:0x0 socket:0x0 Bus:0x0 Dev:0x0 Func:0x4 -- BitIndex :0x0 DevCount on this bit :0x7,
ShareIdx:0x0 socket:0x0 Bus:0x0 Dev:0x0 Func:0x4 -- ShareIdx:0x1 socket:0x0 Bus:0x0 Dev:0x0 Func:0x4 -- PSF PCIE Pi5 ShareIdx:0x2 socket:0x0 Bus:0x0 Dev:0x0 Func:0x4 -- PCIE GEN4 DMI Pi5 ShareIdx:0x3 socket:0x0 Bus:0x0 Dev:0x0 Func:0x4 -- PCIE GEN5 IAL Pi5 (CXL) ShareIdx:0x4 socket:0x0 Bus:0x0 Dev:0x0 Func:0x4 -- SPD I3C Bus ShareIdx:0x5 socket:0x0 Bus:0x0 Dev:0x0 Func:0x4 -- SPD I3C Bus ShareIdx:0x6 socket:0x0 Bus:0x0 Dev:0x0 Func:0x4 -- CXP SMBUS BitIndex :0x1 DevCount on this bit :0x3,
ShareIdx:0x0 socket:0x0 Bus:0x0 Dev:0x0 Func:0x0 -- ShareIdx:0x1 socket:0x0 Bus:0x0 Dev:0x0 Func:0x1 -- ShareIdx:0x2 socket:0x0 Bus:0x0 Dev:0x0 Func:0x2 -- BitIndex :0x2 DevCount on this bit :0x1,
ShareIdx:0x0 socket:0x0 Bus:0x0 Dev:0x8 Func:0x0 -- BitIndex :0x3 DevCount on this bit :0x1,
ShareIdx:0x0 socket:0x0 Bus:0x0 Dev:0x6 Func:0x0 -- BitIndex :0x4 DevCount on this bit :0x1,
ShareIdx:0x0 socket:0x0 Bus:0x0 Dev:0x4 Func:0x0 -- BitIndex :0x5 DevCount on this bit :0x1,
ShareIdx:0x0 socket:0x0 Bus:0x0 Dev:0x2 Func:0x0 -- BitIndex :0x6 DevCount on this bit :0x1,
ShareIdx:0x0 socket:0x0 Bus:0x0 Dev:0x1 Func:0x0 -- BitIndex :0x7 DevCount on this bit :0x1,
ShareIdx:0x0 socket:0x0 Bus:0x0 Dev:0x3 Func:0x0 -- BitIndex :0x8 DevCount on this bit :0x1,
ShareIdx:0x0 socket:0x0 Bus:0x0 Dev:0x5 Func:0x0 -- BitIndex :0x9 DevCount on this bit :0x1,
ShareIdx:0x0 socket:0x0 Bus:0x0 Dev:0x7 Func:0x0 -- BitIndex :0xA DevCount on this bit :0x1,
Skip Invalid Node
BitIndex :0x4 DevCount on this bit :0x1,
ShareIdx:0x0 socket:0x0 Bus:0x15 Dev:0x0 Func:0x4 -- BitIndex :0x0 DevCount on this bit :0x4,
ShareIdx:0x0 socket:0x0 Bus:0x15 Dev:0x0 Func:0x4 -- ShareIdx:0x1 socket:0x0 Bus:0x15 Dev:0x0 Func:0x4 -- PSF PCIE Pi5 ShareIdx:0x2 socket:0x0 Bus:0x15 Dev:0x0 Func:0x4 -- PCIE GEN4 DMI Pi5 ShareIdx:0x3 socket:0x0 Bus:0x15 Dev:0x0 Func:0x4 -- PCIE GEN5 IAL Pi5 (CXL) BitIndex :0x1 DevCount on this bit :0x3,
ShareIdx:0x0 socket:0x0 Bus:0x15 Dev:0x0 Func:0x0 -- ShareIdx:0x1 socket:0x0 Bus:0x15 Dev:0x0 Func:0x1 -- ShareIdx:0x2 socket:0x0 Bus:0x15 Dev:0x0 Func:0x2 -- BitIndex :0x2 DevCount on this bit :0x1,
ShareIdx:0x0 socket:0x0 Bus:0x15 Dev:0x8 Func:0x0 -- BitIndex :0x3 DevCount on this bit :0x1,
ShareIdx:0x0 socket:0x0 Bus:0x15 Dev:0x6 Func:0x0 -- BitIndex :0x4 DevCount on this bit :0x1,
ShareIdx:0x0 socket:0x0 Bus:0x15 Dev:0x4 Func:0x0 -- BitIndex :0x5 DevCount on this bit :0x1,
ShareIdx:0x0 socket:0x0 Bus:0x15 Dev:0x2 Func:0x0 -- BitIndex :0x6 DevCount on this bit :0x1,
ShareIdx:0x0 socket:0x0 Bus:0x15 Dev:0x1 Func:0x0 -- BitIndex :0x7 DevCount on this bit :0x1,
ShareIdx:0x0 socket:0x0 Bus:0x15 Dev:0x3 Func:0x0 -- BitIndex :0x8 DevCount on this bit :0x1,
ShareIdx:0x0 socket:0x0 Bus:0x15 Dev:0x5 Func:0x0 -- BitIndex :0x9 DevCount on this bit :0x1,
ShareIdx:0x0 socket:0x0 Bus:0x15 Dev:0x7 Func:0x0 -- BitIndex :0x5 DevCount on this bit :0x1,
ShareIdx:0x0 socket:0x0 Bus:0x6F Dev:0x0 Func:0x4 -- BitIndex :0x0 DevCount on this bit :0xA,
ShareIdx:0x0 socket:0x0 Bus:0x6F Dev:0x0 Func:0x4 -- ShareIdx:0x1 socket:0x0 Bus:0x6F Dev:0x0 Func:0x4 -- PSF Dino ShareIdx:0x2 socket:0x0 Bus:0x6F Dev:0x0 Func:0x4 -- PSF HCx ShareIdx:0x3 socket:0x0 Bus:0x6F Dev:0x1 Func:0x0 -- ShareIdx:0x4 socket:0x0 Bus:0x6F Dev:0x2 Func:0x0 -- ShareIdx:0x5 socket:0x0 Bus:0x6F Dev:0x3 Func:0x0 -- ShareIdx:0x6 socket:0x0 Bus:0x6F Dev:0x3 Func:0x1 -- ShareIdx:0x7 socket:0x0 Bus:0x6F Dev:0x3 Func:0x2 -- ShareIdx:0x8 socket:0x0 Bus:0x70 Dev:0x0 Func:0x0 -- ShareIdx:0x9 socket:0x0 Bus:0x72 Dev:0x0 Func:0x0 -- BitIndex :0x1 DevCount on this bit :0x3,
ShareIdx:0x0 socket:0x0 Bus:0x6F Dev:0x0 Func:0x0 -- ShareIdx:0x1 socket:0x0 Bus:0x6F Dev:0x0 Func:0x1 -- ShareIdx:0x2 socket:0x0 Bus:0x6F Dev:0x0 Func:0x2 -- BitIndex :0x6 DevCount on this bit :0x1,
Skip Invalid Node
BitIndex :0x7 DevCount on this bit :0x1,
ShareIdx:0x0 socket:0x0 Bus:0x59 Dev:0x0 Func:0x4 -- BitIndex :0x0 DevCount on this bit :0x4,
ShareIdx:0x0 socket:0x0 Bus:0x59 Dev:0x0 Func:0x4 -- ShareIdx:0x1 socket:0x0 Bus:0x59 Dev:0x0 Func:0x4 -- PSF PCIE Pi5 ShareIdx:0x2 socket:0x0 Bus:0x59 Dev:0x0 Func:0x4 -- PCIE GEN4 DMI Pi5 ShareIdx:0x3 socket:0x0 Bus:0x59 Dev:0x0 Func:0x4 -- PCIE GEN5 IAL Pi5 (CXL) BitIndex :0x1 DevCount on this bit :0x3,
ShareIdx:0x0 socket:0x0 Bus:0x59 Dev:0x0 Func:0x0 -- ShareIdx:0x1 socket:0x0 Bus:0x59 Dev:0x0 Func:0x1 -- ShareIdx:0x2 socket:0x0 Bus:0x59 Dev:0x0 Func:0x2 -- BitIndex :0x2 DevCount on this bit :0x1,
ShareIdx:0x0 socket:0x0 Bus:0x59 Dev:0x8 Func:0x0 -- BitIndex :0x3 DevCount on this bit :0x1,
ShareIdx:0x0 socket:0x0 Bus:0x59 Dev:0x6 Func:0x0 -- BitIndex :0x4 DevCount on this bit :0x1,
ShareIdx:0x0 socket:0x0 Bus:0x59 Dev:0x4 Func:0x0 -- BitIndex :0x5 DevCount on this bit :0x1,
ShareIdx:0x0 socket:0x0 Bus:0x59 Dev:0x2 Func:0x0 -- BitIndex :0x6 DevCount on this bit :0x1,
ShareIdx:0x0 socket:0x0 Bus:0x59 Dev:0x1 Func:0x0 -- BitIndex :0x7 DevCount on this bit :0x1,
ShareIdx:0x0 socket:0x0 Bus:0x59 Dev:0x3 Func:0x0 -- BitIndex :0x8 DevCount on this bit :0x1,
ShareIdx:0x0 socket:0x0 Bus:0x59 Dev:0x5 Func:0x0 -- BitIndex :0x9 DevCount on this bit :0x1,
ShareIdx:0x0 socket:0x0 Bus:0x59 Dev:0x7 Func:0x0 -- BitIndex :0x8 DevCount on this bit :0x1,
ShareIdx:0x0 socket:0x0 Bus:0x74 Dev:0x0 Func:0x4 -- BitIndex :0x0 DevCount on this bit :0xA,
ShareIdx:0x0 socket:0x0 Bus:0x74 Dev:0x0 Func:0x4 -- ShareIdx:0x1 socket:0x0 Bus:0x74 Dev:0x0 Func:0x4 -- PSF Dino ShareIdx:0x2 socket:0x0 Bus:0x74 Dev:0x0 Func:0x4 -- PSF HCx ShareIdx:0x3 socket:0x0 Bus:0x74 Dev:0x1 Func:0x0 -- ShareIdx:0x4 socket:0x0 Bus:0x74 Dev:0x2 Func:0x0 -- ShareIdx:0x5 socket:0x0 Bus:0x74 Dev:0x3 Func:0x0 -- ShareIdx:0x6 socket:0x0 Bus:0x74 Dev:0x3 Func:0x1 -- ShareIdx:0x7 socket:0x0 Bus:0x74 Dev:0x3 Func:0x2 -- ShareIdx:0x8 socket:0x0 Bus:0x75 Dev:0x0 Func:0x0 -- ShareIdx:0x9 socket:0x0 Bus:0x77 Dev:0x0 Func:0x0 -- BitIndex :0x1 DevCount on this bit :0x3,
ShareIdx:0x0 socket:0x0 Bus:0x74 Dev:0x0 Func:0x0 -- ShareIdx:0x1 socket:0x0 Bus:0x74 Dev:0x0 Func:0x1 -- ShareIdx:0x2 socket:0x0 Bus:0x74 Dev:0x0 Func:0x2 -- BitIndex :0x9 DevCount on this bit :0x1,
ShareIdx:0x0 socket:0x0 Bus:0x37 Dev:0x0 Func:0x4 -- BitIndex :0x0 DevCount on this bit :0x4,
ShareIdx:0x0 socket:0x0 Bus:0x37 Dev:0x0 Func:0x4 -- ShareIdx:0x1 socket:0x0 Bus:0x37 Dev:0x0 Func:0x4 -- PSF PCIE Pi5 ShareIdx:0x2 socket:0x0 Bus:0x37 Dev:0x0 Func:0x4 -- PCIE GEN4 DMI Pi5 ShareIdx:0x3 socket:0x0 Bus:0x37 Dev:0x0 Func:0x4 -- PCIE GEN5 IAL Pi5 (CXL) BitIndex :0x1 DevCount on this bit :0x3,
ShareIdx:0x0 socket:0x0 Bus:0x37 Dev:0x0 Func:0x0 -- ShareIdx:0x1 socket:0x0 Bus:0x37 Dev:0x0 Func:0x1 -- ShareIdx:0x2 socket:0x0 Bus:0x37 Dev:0x0 Func:0x2 -- BitIndex :0x2 DevCount on this bit :0x1,
ShareIdx:0x0 socket:0x0 Bus:0x37 Dev:0x8 Func:0x0 -- BitIndex :0x3 DevCount on this bit :0x1,
ShareIdx:0x0 socket:0x0 Bus:0x37 Dev:0x6 Func:0x0 -- BitIndex :0x4 DevCount on this bit :0x1,
ShareIdx:0x0 socket:0x0 Bus:0x37 Dev:0x4 Func:0x0 -- BitIndex :0x5 DevCount on this bit :0x1,
ShareIdx:0x0 socket:0x0 Bus:0x37 Dev:0x2 Func:0x0 -- BitIndex :0x6 DevCount on this bit :0x1,
ShareIdx:0x0 socket:0x0 Bus:0x37 Dev:0x1 Func:0x0 -- BitIndex :0x7 DevCount on this bit :0x1,
ShareIdx:0x0 socket:0x0 Bus:0x37 Dev:0x3 Func:0x0 -- BitIndex :0x8 DevCount on this bit :0x1,
ShareIdx:0x0 socket:0x0 Bus:0x37 Dev:0x5 Func:0x0 -- BitIndex :0x9 DevCount on this bit :0x1,
ShareIdx:0x0 socket:0x0 Bus:0x37 Dev:0x7 Func:0x0 -- BitIndex :0xA DevCount on this bit :0x1,
ShareIdx:0x0 socket:0x0 Bus:0x26 Dev:0x0 Func:0x4 -- BitIndex :0x0 DevCount on this bit :0x4,
ShareIdx:0x0 socket:0x0 Bus:0x26 Dev:0x0 Func:0x4 -- ShareIdx:0x1 socket:0x0 Bus:0x26 Dev:0x0 Func:0x4 -- PSF PCIE Pi5 ShareIdx:0x2 socket:0x0 Bus:0x26 Dev:0x0 Func:0x4 -- PCIE GEN4 DMI Pi5 ShareIdx:0x3 socket:0x0 Bus:0x26 Dev:0x0 Func:0x4 -- PCIE GEN5 IAL Pi5 (CXL) BitIndex :0x1 DevCount on this bit :0x3,
ShareIdx:0x0 socket:0x0 Bus:0x26 Dev:0x0 Func:0x0 -- ShareIdx:0x1 socket:0x0 Bus:0x26 Dev:0x0 Func:0x1 -- ShareIdx:0x2 socket:0x0 Bus:0x26 Dev:0x0 Func:0x2 -- BitIndex :0x2 DevCount on this bit :0x1,
ShareIdx:0x0 socket:0x0 Bus:0x26 Dev:0x8 Func:0x0 -- BitIndex :0x3 DevCount on this bit :0x1,
ShareIdx:0x0 socket:0x0 Bus:0x26 Dev:0x6 Func:0x0 -- BitIndex :0x4 DevCount on this bit :0x1,
ShareIdx:0x0 socket:0x0 Bus:0x26 Dev:0x4 Func:0x0 -- BitIndex :0x5 DevCount on this bit :0x1,
ShareIdx:0x0 socket:0x0 Bus:0x26 Dev:0x2 Func:0x0 -- BitIndex :0x6 DevCount on this bit :0x1,
ShareIdx:0x0 socket:0x0 Bus:0x26 Dev:0x1 Func:0x0 -- BitIndex :0x7 DevCount on this bit :0x1,
ShareIdx:0x0 socket:0x0 Bus:0x26 Dev:0x3 Func:0x0 -- BitIndex :0x8 DevCount on this bit :0x1,
ShareIdx:0x0 socket:0x0 Bus:0x26 Dev:0x5 Func:0x0 -- BitIndex :0x9 DevCount on this bit :0x1,
ShareIdx:0x0 socket:0x0 Bus:0x26 Dev:0x7 Func:0x0 -- BitIndex :0xB DevCount on this bit :0x1,
ShareIdx:0x0 socket:0x0 Bus:0x79 Dev:0x0 Func:0x4 -- BitIndex :0x0 DevCount on this bit :0xA,
ShareIdx:0x0 socket:0x0 Bus:0x79 Dev:0x0 Func:0x4 -- ShareIdx:0x1 socket:0x0 Bus:0x79 Dev:0x0 Func:0x4 -- PSF Dino ShareIdx:0x2 socket:0x0 Bus:0x79 Dev:0x0 Func:0x4 -- PSF HCx ShareIdx:0x3 socket:0x0 Bus:0x79 Dev:0x1 Func:0x0 -- ShareIdx:0x4 socket:0x0 Bus:0x79 Dev:0x2 Func:0x0 -- ShareIdx:0x5 socket:0x0 Bus:0x79 Dev:0x3 Func:0x0 -- ShareIdx:0x6 socket:0x0 Bus:0x79 Dev:0x3 Func:0x1 -- ShareIdx:0x7 socket:0x0 Bus:0x79 Dev:0x3 Func:0x2 -- ShareIdx:0x8 socket:0x0 Bus:0x7A Dev:0x0 Func:0x0 -- ShareIdx:0x9 socket:0x0 Bus:0x7C Dev:0x0 Func:0x0 -- BitIndex :0x1 DevCount on this bit :0x3,
ShareIdx:0x0 socket:0x0 Bus:0x79 Dev:0x0 Func:0x0 -- ShareIdx:0x1 socket:0x0 Bus:0x79 Dev:0x0 Func:0x1 -- ShareIdx:0x2 socket:0x0 Bus:0x79 Dev:0x0 Func:0x2 -- BitIndex :0xC DevCount on this bit :0x1,
Skip Invalid Node
BitIndex :0xD DevCount on this bit :0x1,
ShareIdx:0x0 socket:0x0 Bus:0x48 Dev:0x0 Func:0x4 -- BitIndex :0x0 DevCount on this bit :0x4,
ShareIdx:0x0 socket:0x0 Bus:0x48 Dev:0x0 Func:0x4 -- ShareIdx:0x1 socket:0x0 Bus:0x48 Dev:0x0 Func:0x4 -- PSF PCIE Pi5 ShareIdx:0x2 socket:0x0 Bus:0x48 Dev:0x0 Func:0x4 -- PCIE GEN4 DMI Pi5 ShareIdx:0x3 socket:0x0 Bus:0x48 Dev:0x0 Func:0x4 -- PCIE GEN5 IAL Pi5 (CXL) BitIndex :0x1 DevCount on this bit :0x3,
ShareIdx:0x0 socket:0x0 Bus:0x48 Dev:0x0 Func:0x0 -- ShareIdx:0x1 socket:0x0 Bus:0x48 Dev:0x0 Func:0x1 -- ShareIdx:0x2 socket:0x0 Bus:0x48 Dev:0x0 Func:0x2 -- BitIndex :0x2 DevCount on this bit :0x1,
ShareIdx:0x0 socket:0x0 Bus:0x48 Dev:0x8 Func:0x0 -- BitIndex :0x3 DevCount on this bit :0x1,
ShareIdx:0x0 socket:0x0 Bus:0x48 Dev:0x6 Func:0x0 -- BitIndex :0x4 DevCount on this bit :0x1,
ShareIdx:0x0 socket:0x0 Bus:0x48 Dev:0x4 Func:0x0 -- BitIndex :0x5 DevCount on this bit :0x1,
ShareIdx:0x0 socket:0x0 Bus:0x48 Dev:0x2 Func:0x0 -- BitIndex :0x6 DevCount on this bit :0x1,
ShareIdx:0x0 socket:0x0 Bus:0x48 Dev:0x1 Func:0x0 -- BitIndex :0x7 DevCount on this bit :0x1,
ShareIdx:0x0 socket:0x0 Bus:0x48 Dev:0x3 Func:0x0 -- BitIndex :0x8 DevCount on this bit :0x1,
ShareIdx:0x0 socket:0x0 Bus:0x48 Dev:0x5 Func:0x0 -- BitIndex :0x9 DevCount on this bit :0x1,
ShareIdx:0x0 socket:0x0 Bus:0x48 Dev:0x7 Func:0x0 -- BitIndex :0xE DevCount on this bit :0x0,
BitIndex :0xF DevCount on this bit :0x0,
BitIndex :0x10 DevCount on this bit :0x0,
BitIndex :0x11 DevCount on this bit :0x0,
BitIndex :0x12 DevCount on this bit :0x0,
BitIndex :0x13 DevCount on this bit :0x0,
BitIndex :0x14 DevCount on this bit :0x0,
BitIndex :0x15 DevCount on this bit :0x0,
BitIndex :0x16 DevCount on this bit :0x4,
ShareIdx:0x0 socket:0x0 Bus:0x7E Dev:0x0 Func:0x0 -- ShareIdx:0x1 socket:0x0 Bus:0x7E Dev:0x0 Func:0x0 -- ShareIdx:0x2 socket:0x0 Bus:0x7E Dev:0x0 Func:0x0 -- ShareIdx:0x3 socket:0x0 Bus:0x7E Dev:0x0 Func:0x0 -- BitIndex :0x17 DevCount on this bit :0x4,
ShareIdx:0x0 socket:0x0 Bus:0x7E Dev:0x0 Func:0x0 -- ShareIdx:0x1 socket:0x0 Bus:0x7E Dev:0x0 Func:0x0 -- ShareIdx:0x2 socket:0x0 Bus:0x7E Dev:0x0 Func:0x0 -- ShareIdx:0x3 socket:0x0 Bus:0x7E Dev:0x0 Func:0x0 -- BitIndex :0x18 DevCount on this bit :0x4,
ShareIdx:0x0 socket:0x0 Bus:0x7E Dev:0x0 Func:0x0 -- ShareIdx:0x1 socket:0x0 Bus:0x7E Dev:0x0 Func:0x0 -- ShareIdx:0x2 socket:0x0 Bus:0x7E Dev:0x0 Func:0x0 -- ShareIdx:0x3 socket:0x0 Bus:0x7E Dev:0x0 Func:0x0 -- BitIndex :0x19 DevCount on this bit :0x4,
ShareIdx:0x0 socket:0x0 Bus:0x7E Dev:0x0 Func:0x0 -- ShareIdx:0x1 socket:0x0 Bus:0x7E Dev:0x0 Func:0x0 -- ShareIdx:0x2 socket:0x0 Bus:0x7E Dev:0x0 Func:0x0 -- ShareIdx:0x3 socket:0x0 Bus:0x7E Dev:0x0 Func:0x0 -- BitIndex :0x1A DevCount on this bit :0x4,
ShareIdx:0x0 socket:0x0 Bus:0x7E Dev:0x0 Func:0x0 -- ShareIdx:0x1 socket:0x0 Bus:0x7E Dev:0x0 Func:0x0 -- ShareIdx:0x2 socket:0x0 Bus:0x7E Dev:0x0 Func:0x0 -- ShareIdx:0x3 socket:0x0 Bus:0x7E Dev:0x0 Func:0x0 -- BitIndex :0x1B DevCount on this bit :0x4,
ShareIdx:0x0 socket:0x0 Bus:0x7E Dev:0x0 Func:0x0 -- ShareIdx:0x1 socket:0x0 Bus:0x7E Dev:0x0 Func:0x0 -- ShareIdx:0x2 socket:0x0 Bus:0x7E Dev:0x0 Func:0x0 -- ShareIdx:0x3 socket:0x0 Bus:0x7E Dev:0x0 Func:0x0 -- BitIndex :0x1C DevCount on this bit :0x4,
ShareIdx:0x0 socket:0x0 Bus:0x7E Dev:0x0 Func:0x0 -- ShareIdx:0x1 socket:0x0 Bus:0x7E Dev:0x0 Func:0x0 -- ShareIdx:0x2 socket:0x0 Bus:0x7E Dev:0x0 Func:0x0 -- ShareIdx:0x3 socket:0x0 Bus:0x7E Dev:0x0 Func:0x0 -- BitIndex :0x1D DevCount on this bit :0x4,
ShareIdx:0x0 socket:0x0 Bus:0x7E Dev:0x0 Func:0x0 -- ShareIdx:0x1 socket:0x0 Bus:0x7E Dev:0x0 Func:0x0 -- ShareIdx:0x2 socket:0x0 Bus:0x7E Dev:0x0 Func:0x0 -- ShareIdx:0x3 socket:0x0 Bus:0x7E Dev:0x0 Func:0x0 -- socket:0x1 Bus:0xFE Dev:0x0 Func:0x3 -- Max Bit Index:0x1D BitIndex :0x0 DevCount on this bit :0x1,
ShareIdx:0x0 socket:0x1 Bus:0xFE Dev:0x0 Func:0x3 -- BitIndex :0x1 DevCount on this bit :0x1,
Skip Invalid Node
BitIndex :0x2 DevCount on this bit :0x1,
ShareIdx:0x0 socket:0x1 Bus:0xE7 Dev:0x0 Func:0x4 -- BitIndex :0x0 DevCount on this bit :0xA,
ShareIdx:0x0 socket:0x1 Bus:0xE7 Dev:0x0 Func:0x4 -- ShareIdx:0x1 socket:0x1 Bus:0xE7 Dev:0x0 Func:0x4 -- PSF Dino ShareIdx:0x2 socket:0x1 Bus:0xE7 Dev:0x0 Func:0x4 -- PSF HCx ShareIdx:0x3 socket:0x1 Bus:0xE7 Dev:0x1 Func:0x0 -- ShareIdx:0x4 socket:0x1 Bus:0xE7 Dev:0x2 Func:0x0 -- ShareIdx:0x5 socket:0x1 Bus:0xE7 Dev:0x3 Func:0x0 -- ShareIdx:0x6 socket:0x1 Bus:0xE7 Dev:0x3 Func:0x1 -- ShareIdx:0x7 socket:0x1 Bus:0xE7 Dev:0x3 Func:0x2 -- ShareIdx:0x8 socket:0x1 Bus:0xE8 Dev:0x0 Func:0x0 -- ShareIdx:0x9 socket:0x1 Bus:0xEA Dev:0x0 Func:0x0 -- BitIndex :0x1 DevCount on this bit :0x3,
ShareIdx:0x0 socket:0x1 Bus:0xE7 Dev:0x0 Func:0x0 -- ShareIdx:0x1 socket:0x1 Bus:0xE7 Dev:0x0 Func:0x1 -- ShareIdx:0x2 socket:0x1 Bus:0xE7 Dev:0x0 Func:0x2 -- BitIndex :0x3 DevCount on this bit :0x1,
ShareIdx:0x0 socket:0x1 Bus:0x80 Dev:0x0 Func:0x4 -- BitIndex :0x0 DevCount on this bit :0x7,
ShareIdx:0x0 socket:0x1 Bus:0x80 Dev:0x0 Func:0x4 -- ShareIdx:0x1 socket:0x1 Bus:0x80 Dev:0x0 Func:0x4 -- PSF PCIE Pi5 ShareIdx:0x2 socket:0x1 Bus:0x80 Dev:0x0 Func:0x4 -- PCIE GEN4 DMI Pi5 ShareIdx:0x3 socket:0x1 Bus:0x80 Dev:0x0 Func:0x4 -- PCIE GEN5 IAL Pi5 (CXL) ShareIdx:0x4 socket:0x1 Bus:0x80 Dev:0x0 Func:0x4 -- SPD I3C Bus ShareIdx:0x5 socket:0x1 Bus:0x80 Dev:0x0 Func:0x4 -- SPD I3C Bus ShareIdx:0x6 socket:0x1 Bus:0x80 Dev:0x0 Func:0x4 -- CXP SMBUS BitIndex :0x1 DevCount on this bit :0x3,
ShareIdx:0x0 socket:0x1 Bus:0x80 Dev:0x0 Func:0x0 -- ShareIdx:0x1 socket:0x1 Bus:0x80 Dev:0x0 Func:0x1 -- ShareIdx:0x2 socket:0x1 Bus:0x80 Dev:0x0 Func:0x2 -- BitIndex :0x2 DevCount on this bit :0x1,
ShareIdx:0x0 socket:0x1 Bus:0x80 Dev:0x8 Func:0x0 -- BitIndex :0x3 DevCount on this bit :0x1,
ShareIdx:0x0 socket:0x1 Bus:0x80 Dev:0x6 Func:0x0 -- BitIndex :0x4 DevCount on this bit :0x1,
ShareIdx:0x0 socket:0x1 Bus:0x80 Dev:0x4 Func:0x0 -- BitIndex :0x5 DevCount on this bit :0x1,
ShareIdx:0x0 socket:0x1 Bus:0x80 Dev:0x2 Func:0x0 -- BitIndex :0x6 DevCount on this bit :0x1,
ShareIdx:0x0 socket:0x1 Bus:0x80 Dev:0x1 Func:0x0 -- BitIndex :0x7 DevCount on this bit :0x1,
ShareIdx:0x0 socket:0x1 Bus:0x80 Dev:0x3 Func:0x0 -- BitIndex :0x8 DevCount on this bit :0x1,
ShareIdx:0x0 socket:0x1 Bus:0x80 Dev:0x5 Func:0x0 -- BitIndex :0x9 DevCount on this bit :0x1,
ShareIdx:0x0 socket:0x1 Bus:0x80 Dev:0x7 Func:0x0 -- BitIndex :0xA DevCount on this bit :0x1,
Skip Invalid Node
BitIndex :0x4 DevCount on this bit :0x1,
ShareIdx:0x0 socket:0x1 Bus:0x97 Dev:0x0 Func:0x4 -- BitIndex :0x0 DevCount on this bit :0x4,
ShareIdx:0x0 socket:0x1 Bus:0x97 Dev:0x0 Func:0x4 -- ShareIdx:0x1 socket:0x1 Bus:0x97 Dev:0x0 Func:0x4 -- PSF PCIE Pi5 ShareIdx:0x2 socket:0x1 Bus:0x97 Dev:0x0 Func:0x4 -- PCIE GEN4 DMI Pi5 ShareIdx:0x3 socket:0x1 Bus:0x97 Dev:0x0 Func:0x4 -- PCIE GEN5 IAL Pi5 (CXL) BitIndex :0x1 DevCount on this bit :0x3,
ShareIdx:0x0 socket:0x1 Bus:0x97 Dev:0x0 Func:0x0 -- ShareIdx:0x1 socket:0x1 Bus:0x97 Dev:0x0 Func:0x1 -- ShareIdx:0x2 socket:0x1 Bus:0x97 Dev:0x0 Func:0x2 -- BitIndex :0x2 DevCount on this bit :0x1,
ShareIdx:0x0 socket:0x1 Bus:0x97 Dev:0x8 Func:0x0 -- BitIndex :0x3 DevCount on this bit :0x1,
ShareIdx:0x0 socket:0x1 Bus:0x97 Dev:0x6 Func:0x0 -- BitIndex :0x4 DevCount on this bit :0x1,
ShareIdx:0x0 socket:0x1 Bus:0x97 Dev:0x4 Func:0x0 -- BitIndex :0x5 DevCount on this bit :0x1,
ShareIdx:0x0 socket:0x1 Bus:0x97 Dev:0x2 Func:0x0 -- BitIndex :0x6 DevCount on this bit :0x1,
ShareIdx:0x0 socket:0x1 Bus:0x97 Dev:0x1 Func:0x0 -- BitIndex :0x7 DevCount on this bit :0x1,
ShareIdx:0x0 socket:0x1 Bus:0x97 Dev:0x3 Func:0x0 -- BitIndex :0x8 DevCount on this bit :0x1,
ShareIdx:0x0 socket:0x1 Bus:0x97 Dev:0x5 Func:0x0 -- BitIndex :0x9 DevCount on this bit :0x1,
ShareIdx:0x0 socket:0x1 Bus:0x97 Dev:0x7 Func:0x0 -- BitIndex :0x5 DevCount on this bit :0x1,
ShareIdx:0x0 socket:0x1 Bus:0xEC Dev:0x0 Func:0x4 -- BitIndex :0x0 DevCount on this bit :0xA,
ShareIdx:0x0 socket:0x1 Bus:0xEC Dev:0x0 Func:0x4 -- ShareIdx:0x1 socket:0x1 Bus:0xEC Dev:0x0 Func:0x4 -- PSF Dino ShareIdx:0x2 socket:0x1 Bus:0xEC Dev:0x0 Func:0x4 -- PSF HCx ShareIdx:0x3 socket:0x1 Bus:0xEC Dev:0x1 Func:0x0 -- ShareIdx:0x4 socket:0x1 Bus:0xEC Dev:0x2 Func:0x0 -- ShareIdx:0x5 socket:0x1 Bus:0xEC Dev:0x3 Func:0x0 -- ShareIdx:0x6 socket:0x1 Bus:0xEC Dev:0x3 Func:0x1 -- ShareIdx:0x7 socket:0x1 Bus:0xEC Dev:0x3 Func:0x2 -- ShareIdx:0x8 socket:0x1 Bus:0xED Dev:0x0 Func:0x0 -- ShareIdx:0x9 socket:0x1 Bus:0xEF Dev:0x0 Func:0x0 -- BitIndex :0x1 DevCount on this bit :0x3,
ShareIdx:0x0 socket:0x1 Bus:0xEC Dev:0x0 Func:0x0 -- ShareIdx:0x1 socket:0x1 Bus:0xEC Dev:0x0 Func:0x1 -- ShareIdx:0x2 socket:0x1 Bus:0xEC Dev:0x0 Func:0x2 -- BitIndex :0x6 DevCount on this bit :0x1,
Skip Invalid Node
BitIndex :0x7 DevCount on this bit :0x1,
ShareIdx:0x0 socket:0x1 Bus:0xD7 Dev:0x0 Func:0x4 -- BitIndex :0x0 DevCount on this bit :0x4,
ShareIdx:0x0 socket:0x1 Bus:0xD7 Dev:0x0 Func:0x4 -- ShareIdx:0x1 socket:0x1 Bus:0xD7 Dev:0x0 Func:0x4 -- PSF PCIE Pi5 ShareIdx:0x2 socket:0x1 Bus:0xD7 Dev:0x0 Func:0x4 -- PCIE GEN4 DMI Pi5 ShareIdx:0x3 socket:0x1 Bus:0xD7 Dev:0x0 Func:0x4 -- PCIE GEN5 IAL Pi5 (CXL) BitIndex :0x1 DevCount on this bit :0x3,
ShareIdx:0x0 socket:0x1 Bus:0xD7 Dev:0x0 Func:0x0 -- ShareIdx:0x1 socket:0x1 Bus:0xD7 Dev:0x0 Func:0x1 -- ShareIdx:0x2 socket:0x1 Bus:0xD7 Dev:0x0 Func:0x2 -- BitIndex :0x2 DevCount on this bit :0x1,
ShareIdx:0x0 socket:0x1 Bus:0xD7 Dev:0x8 Func:0x0 -- BitIndex :0x3 DevCount on this bit :0x1,
ShareIdx:0x0 socket:0x1 Bus:0xD7 Dev:0x6 Func:0x0 -- BitIndex :0x4 DevCount on this bit :0x1,
ShareIdx:0x0 socket:0x1 Bus:0xD7 Dev:0x4 Func:0x0 -- BitIndex :0x5 DevCount on this bit :0x1,
ShareIdx:0x0 socket:0x1 Bus:0xD7 Dev:0x2 Func:0x0 -- BitIndex :0x6 DevCount on this bit :0x1,
ShareIdx:0x0 socket:0x1 Bus:0xD7 Dev:0x1 Func:0x0 -- BitIndex :0x7 DevCount on this bit :0x1,
ShareIdx:0x0 socket:0x1 Bus:0xD7 Dev:0x3 Func:0x0 -- BitIndex :0x8 DevCount on this bit :0x1,
ShareIdx:0x0 socket:0x1 Bus:0xD7 Dev:0x5 Func:0x0 -- BitIndex :0x9 DevCount on this bit :0x1,
ShareIdx:0x0 socket:0x1 Bus:0xD7 Dev:0x7 Func:0x0 -- BitIndex :0x8 DevCount on this bit :0x1,
ShareIdx:0x0 socket:0x1 Bus:0xF1 Dev:0x0 Func:0x4 -- BitIndex :0x0 DevCount on this bit :0xA,
ShareIdx:0x0 socket:0x1 Bus:0xF1 Dev:0x0 Func:0x4 -- ShareIdx:0x1 socket:0x1 Bus:0xF1 Dev:0x0 Func:0x4 -- PSF Dino ShareIdx:0x2 socket:0x1 Bus:0xF1 Dev:0x0 Func:0x4 -- PSF HCx ShareIdx:0x3 socket:0x1 Bus:0xF1 Dev:0x1 Func:0x0 -- ShareIdx:0x4 socket:0x1 Bus:0xF1 Dev:0x2 Func:0x0 -- ShareIdx:0x5 socket:0x1 Bus:0xF1 Dev:0x3 Func:0x0 -- ShareIdx:0x6 socket:0x1 Bus:0xF1 Dev:0x3 Func:0x1 -- ShareIdx:0x7 socket:0x1 Bus:0xF1 Dev:0x3 Func:0x2 -- ShareIdx:0x8 socket:0x1 Bus:0xF2 Dev:0x0 Func:0x0 -- ShareIdx:0x9 socket:0x1 Bus:0xF4 Dev:0x0 Func:0x0 -- BitIndex :0x1 DevCount on this bit :0x3,
ShareIdx:0x0 socket:0x1 Bus:0xF1 Dev:0x0 Func:0x0 -- ShareIdx:0x1 socket:0x1 Bus:0xF1 Dev:0x0 Func:0x1 -- ShareIdx:0x2 socket:0x1 Bus:0xF1 Dev:0x0 Func:0x2 -- BitIndex :0x9 DevCount on this bit :0x1,
ShareIdx:0x0 socket:0x1 Bus:0xB7 Dev:0x0 Func:0x4 -- BitIndex :0x0 DevCount on this bit :0x4,
ShareIdx:0x0 socket:0x1 Bus:0xB7 Dev:0x0 Func:0x4 -- ShareIdx:0x1 socket:0x1 Bus:0xB7 Dev:0x0 Func:0x4 -- PSF PCIE Pi5 ShareIdx:0x2 socket:0x1 Bus:0xB7 Dev:0x0 Func:0x4 -- PCIE GEN4 DMI Pi5 ShareIdx:0x3 socket:0x1 Bus:0xB7 Dev:0x0 Func:0x4 -- PCIE GEN5 IAL Pi5 (CXL) BitIndex :0x1 DevCount on this bit :0x3,
ShareIdx:0x0 socket:0x1 Bus:0xB7 Dev:0x0 Func:0x0 -- ShareIdx:0x1 socket:0x1 Bus:0xB7 Dev:0x0 Func:0x1 -- ShareIdx:0x2 socket:0x1 Bus:0xB7 Dev:0x0 Func:0x2 -- BitIndex :0x2 DevCount on this bit :0x1,
ShareIdx:0x0 socket:0x1 Bus:0xB7 Dev:0x8 Func:0x0 -- BitIndex :0x3 DevCount on this bit :0x1,
ShareIdx:0x0 socket:0x1 Bus:0xB7 Dev:0x6 Func:0x0 -- BitIndex :0x4 DevCount on this bit :0x1,
ShareIdx:0x0 socket:0x1 Bus:0xB7 Dev:0x4 Func:0x0 -- BitIndex :0x5 DevCount on this bit :0x1,
ShareIdx:0x0 socket:0x1 Bus:0xB7 Dev:0x2 Func:0x0 -- BitIndex :0x6 DevCount on this bit :0x1,
ShareIdx:0x0 socket:0x1 Bus:0xB7 Dev:0x1 Func:0x0 -- BitIndex :0x7 DevCount on this bit :0x1,
ShareIdx:0x0 socket:0x1 Bus:0xB7 Dev:0x3 Func:0x0 -- BitIndex :0x8 DevCount on this bit :0x1,
ShareIdx:0x0 socket:0x1 Bus:0xB7 Dev:0x5 Func:0x0 -- BitIndex :0x9 DevCount on this bit :0x1,
ShareIdx:0x0 socket:0x1 Bus:0xB7 Dev:0x7 Func:0x0 -- BitIndex :0xA DevCount on this bit :0x1,
ShareIdx:0x0 socket:0x1 Bus:0xA7 Dev:0x0 Func:0x4 -- BitIndex :0x0 DevCount on this bit :0x4,
ShareIdx:0x0 socket:0x1 Bus:0xA7 Dev:0x0 Func:0x4 -- ShareIdx:0x1 socket:0x1 Bus:0xA7 Dev:0x0 Func:0x4 -- PSF PCIE Pi5 ShareIdx:0x2 socket:0x1 Bus:0xA7 Dev:0x0 Func:0x4 -- PCIE GEN4 DMI Pi5 ShareIdx:0x3 socket:0x1 Bus:0xA7 Dev:0x0 Func:0x4 -- PCIE GEN5 IAL Pi5 (CXL) BitIndex :0x1 DevCount on this bit :0x3,
ShareIdx:0x0 socket:0x1 Bus:0xA7 Dev:0x0 Func:0x0 -- ShareIdx:0x1 socket:0x1 Bus:0xA7 Dev:0x0 Func:0x1 -- ShareIdx:0x2 socket:0x1 Bus:0xA7 Dev:0x0 Func:0x2 -- BitIndex :0x2 DevCount on this bit :0x1,
ShareIdx:0x0 socket:0x1 Bus:0xA7 Dev:0x8 Func:0x0 -- BitIndex :0x3 DevCount on this bit :0x1,
ShareIdx:0x0 socket:0x1 Bus:0xA7 Dev:0x6 Func:0x0 -- BitIndex :0x4 DevCount on this bit :0x1,
ShareIdx:0x0 socket:0x1 Bus:0xA7 Dev:0x4 Func:0x0 -- BitIndex :0x5 DevCount on this bit :0x1,
ShareIdx:0x0 socket:0x1 Bus:0xA7 Dev:0x2 Func:0x0 -- BitIndex :0x6 DevCount on this bit :0x1,
ShareIdx:0x0 socket:0x1 Bus:0xA7 Dev:0x1 Func:0x0 -- BitIndex :0x7 DevCount on this bit :0x1,
ShareIdx:0x0 socket:0x1 Bus:0xA7 Dev:0x3 Func:0x0 -- BitIndex :0x8 DevCount on this bit :0x1,
ShareIdx:0x0 socket:0x1 Bus:0xA7 Dev:0x5 Func:0x0 -- BitIndex :0x9 DevCount on this bit :0x1,
ShareIdx:0x0 socket:0x1 Bus:0xA7 Dev:0x7 Func:0x0 -- BitIndex :0xB DevCount on this bit :0x1,
ShareIdx:0x0 socket:0x1 Bus:0xF6 Dev:0x0 Func:0x4 -- BitIndex :0x0 DevCount on this bit :0xA,
ShareIdx:0x0 socket:0x1 Bus:0xF6 Dev:0x0 Func:0x4 -- ShareIdx:0x1 socket:0x1 Bus:0xF6 Dev:0x0 Func:0x4 -- PSF Dino ShareIdx:0x2 socket:0x1 Bus:0xF6 Dev:0x0 Func:0x4 -- PSF HCx ShareIdx:0x3 socket:0x1 Bus:0xF6 Dev:0x1 Func:0x0 -- ShareIdx:0x4 socket:0x1 Bus:0xF6 Dev:0x2 Func:0x0 -- ShareIdx:0x5 socket:0x1 Bus:0xF6 Dev:0x3 Func:0x0 -- ShareIdx:0x6 socket:0x1 Bus:0xF6 Dev:0x3 Func:0x1 -- ShareIdx:0x7 socket:0x1 Bus:0xF6 Dev:0x3 Func:0x2 -- ShareIdx:0x8 socket:0x1 Bus:0xF7 Dev:0x0 Func:0x0 -- ShareIdx:0x9 socket:0x1 Bus:0xF9 Dev:0x0 Func:0x0 -- BitIndex :0x1 DevCount on this bit :0x3,
ShareIdx:0x0 socket:0x1 Bus:0xF6 Dev:0x0 Func:0x0 -- ShareIdx:0x1 socket:0x1 Bus:0xF6 Dev:0x0 Func:0x1 -- ShareIdx:0x2 socket:0x1 Bus:0xF6 Dev:0x0 Func:0x2 -- BitIndex :0xC DevCount on this bit :0x1,
Skip Invalid Node
BitIndex :0xD DevCount on this bit :0x1,
ShareIdx:0x0 socket:0x1 Bus:0xC7 Dev:0x0 Func:0x4 -- BitIndex :0x0 DevCount on this bit :0x4,
ShareIdx:0x0 socket:0x1 Bus:0xC7 Dev:0x0 Func:0x4 -- ShareIdx:0x1 socket:0x1 Bus:0xC7 Dev:0x0 Func:0x4 -- PSF PCIE Pi5 ShareIdx:0x2 socket:0x1 Bus:0xC7 Dev:0x0 Func:0x4 -- PCIE GEN4 DMI Pi5 ShareIdx:0x3 socket:0x1 Bus:0xC7 Dev:0x0 Func:0x4 -- PCIE GEN5 IAL Pi5 (CXL) BitIndex :0x1 DevCount on this bit :0x3,
ShareIdx:0x0 socket:0x1 Bus:0xC7 Dev:0x0 Func:0x0 -- ShareIdx:0x1 socket:0x1 Bus:0xC7 Dev:0x0 Func:0x1 -- ShareIdx:0x2 socket:0x1 Bus:0xC7 Dev:0x0 Func:0x2 -- BitIndex :0x2 DevCount on this bit :0x1,
ShareIdx:0x0 socket:0x1 Bus:0xC7 Dev:0x8 Func:0x0 -- BitIndex :0x3 DevCount on this bit :0x1,
ShareIdx:0x0 socket:0x1 Bus:0xC7 Dev:0x6 Func:0x0 -- BitIndex :0x4 DevCount on this bit :0x1,
ShareIdx:0x0 socket:0x1 Bus:0xC7 Dev:0x4 Func:0x0 -- BitIndex :0x5 DevCount on this bit :0x1,
ShareIdx:0x0 socket:0x1 Bus:0xC7 Dev:0x2 Func:0x0 -- BitIndex :0x6 DevCount on this bit :0x1,
ShareIdx:0x0 socket:0x1 Bus:0xC7 Dev:0x1 Func:0x0 -- BitIndex :0x7 DevCount on this bit :0x1,
ShareIdx:0x0 socket:0x1 Bus:0xC7 Dev:0x3 Func:0x0 -- BitIndex :0x8 DevCount on this bit :0x1,
ShareIdx:0x0 socket:0x1 Bus:0xC7 Dev:0x5 Func:0x0 -- BitIndex :0x9 DevCount on this bit :0x1,
ShareIdx:0x0 socket:0x1 Bus:0xC7 Dev:0x7 Func:0x0 -- BitIndex :0xE DevCount on this bit :0x0,
BitIndex :0xF DevCount on this bit :0x0,
BitIndex :0x10 DevCount on this bit :0x0,
BitIndex :0x11 DevCount on this bit :0x0,
BitIndex :0x12 DevCount on this bit :0x0,
BitIndex :0x13 DevCount on this bit :0x0,
BitIndex :0x14 DevCount on this bit :0x0,
BitIndex :0x15 DevCount on this bit :0x0,
BitIndex :0x16 DevCount on this bit :0x4,
ShareIdx:0x0 socket:0x1 Bus:0xFE Dev:0x0 Func:0x0 -- ShareIdx:0x1 socket:0x1 Bus:0xFE Dev:0x0 Func:0x0 -- ShareIdx:0x2 socket:0x1 Bus:0xFE Dev:0x0 Func:0x0 -- ShareIdx:0x3 socket:0x1 Bus:0xFE Dev:0x0 Func:0x0 -- BitIndex :0x17 DevCount on this bit :0x4,
ShareIdx:0x0 socket:0x1 Bus:0xFE Dev:0x0 Func:0x0 -- ShareIdx:0x1 socket:0x1 Bus:0xFE Dev:0x0 Func:0x0 -- ShareIdx:0x2 socket:0x1 Bus:0xFE Dev:0x0 Func:0x0 -- ShareIdx:0x3 socket:0x1 Bus:0xFE Dev:0x0 Func:0x0 -- BitIndex :0x18 DevCount on this bit :0x4,
ShareIdx:0x0 socket:0x1 Bus:0xFE Dev:0x0 Func:0x0 -- ShareIdx:0x1 socket:0x1 Bus:0xFE Dev:0x0 Func:0x0 -- ShareIdx:0x2 socket:0x1 Bus:0xFE Dev:0x0 Func:0x0 -- ShareIdx:0x3 socket:0x1 Bus:0xFE Dev:0x0 Func:0x0 -- BitIndex :0x19 DevCount on this bit :0x4,
ShareIdx:0x0 socket:0x1 Bus:0xFE Dev:0x0 Func:0x0 -- ShareIdx:0x1 socket:0x1 Bus:0xFE Dev:0x0 Func:0x0 -- ShareIdx:0x2 socket:0x1 Bus:0xFE Dev:0x0 Func:0x0 -- ShareIdx:0x3 socket:0x1 Bus:0xFE Dev:0x0 Func:0x0 -- BitIndex :0x1A DevCount on this bit :0x4,
ShareIdx:0x0 socket:0x1 Bus:0xFE Dev:0x0 Func:0x0 -- ShareIdx:0x1 socket:0x1 Bus:0xFE Dev:0x0 Func:0x0 -- ShareIdx:0x2 socket:0x1 Bus:0xFE Dev:0x0 Func:0x0 -- ShareIdx:0x3 socket:0x1 Bus:0xFE Dev:0x0 Func:0x0 -- BitIndex :0x1B DevCount on this bit :0x4,
ShareIdx:0x0 socket:0x1 Bus:0xFE Dev:0x0 Func:0x0 -- ShareIdx:0x1 socket:0x1 Bus:0xFE Dev:0x0 Func:0x0 -- ShareIdx:0x2 socket:0x1 Bus:0xFE Dev:0x0 Func:0x0 -- ShareIdx:0x3 socket:0x1 Bus:0xFE Dev:0x0 Func:0x0 -- BitIndex :0x1C DevCount on this bit :0x4,
ShareIdx:0x0 socket:0x1 Bus:0xFE Dev:0x0 Func:0x0 -- ShareIdx:0x1 socket:0x1 Bus:0xFE Dev:0x0 Func:0x0 -- ShareIdx:0x2 socket:0x1 Bus:0xFE Dev:0x0 Func:0x0 -- ShareIdx:0x3 socket:0x1 Bus:0xFE Dev:0x0 Func:0x0 -- BitIndex :0x1D DevCount on this bit :0x4,
ShareIdx:0x0 socket:0x1 Bus:0xFE Dev:0x0 Func:0x0 -- ShareIdx:0x1 socket:0x1 Bus:0xFE Dev:0x0 Func:0x0 -- ShareIdx:0x2 socket:0x1 Bus:0xFE Dev:0x0 Func:0x0 -- ShareIdx:0x3 socket:0x1 Bus:0xFE Dev:0x0 Func:0x0 -- [ProcessorErrorHandler][CrystalRidgeLib] Failed to locate protocol: Not Found
[Mca]Entering InitializeProcessorErrHandler (0x7E82AEB8)
[Mca]Allocate Cpu Error Data structure at 7E7FA018
[Mca][Cap] EmcaGen1Cap=0x1
[Mca][Cap] EmcaGen2Cap=0x1
[Mca][Cap] LmceCap=0x1
[Mca][Setup] SystemErrorEn=0x1
[Mca][Setup] PoisonEn=0x1
[Mca][Setup] ViralEn=0x0
[Mca][Setup] CloakingEn=0x0
[Mca][Setup] FatalErrSpinLoopEn=0x0
[Mca][Setup] EmcaEn=0x1
[Mca][Setup] CsmiEn=0x2
[Mca][Setup] MsmiEn=0x2
[Mca][Setup] LmceEn=0x1
[Mca][Setup] MsmiBankBitFieldEn=0xFFFFFFFF
[Mca][Setup] CsmiBankBitFieldEn=0xFFFFFFFF
[Mca][Setup] EmcaSetFwUpdate=0x0
[Mca][Setup] OscEn=0x0
[Mca][Setup] mMode=0x2
[Mca][Setup] mProcessorRasSetup.UboxErrorMask=0
[Mca][Setup] mProcessorRasSetup.ShutdownSuppression=1
[Mca]Register MCA error handler Success
[Mca]Installing MCE Handler...
[Mca]SmiMcaHandler Address = 7E8322B4
[Mca]Enable MCA reporting
[Mca]EnableEmca2UncorrectableError
[Mca]Enable CSMI Gen2
[Mca]Enable LMCE
[Mca]System Cloaking is disabled.
[RasMisc] ConfigureShutdownSuppression!
PROGRESS CODE: V03070003 I0
PDB = c:\efi\servergen2\intel\Build\EagleStreamRpPkg\DEBUG_VS2015x86\X64\ServerRasPkg\Driver\Smm\Gen2\RasMisc\RasMisc\DEBUG\RASMiscDriver.pdb
PROGRESS CODE: V03070002 I0
[RASMiscDriver][CrystalRidgeLib] Failed to locate protocol: Not Found
[RasMisc] EnableSystemViralAndPoison!
[IIO VIRAL & POISON] Config Socket:0x0
[Config IIO Viral & Poison] Satallite IEH on BitIdx:0x2
[Config IIO Viral & Poison] Satallite IEH on BitIdx:0x3
[Config IIO Viral & Poison Stack] Device on BitIdx:0x2 doesn't exist
[Config IIO Viral & Poison Stack] Device on BitIdx:0x3 doesn't exist
[Config IIO Viral & Poison Stack] Device on BitIdx:0x4 doesn't exist
[Config IIO Viral & Poison Stack] Device on BitIdx:0x5 doesn't exist
[Config IIO Viral & Poison Stack] Device on BitIdx:0x6 doesn't exist
[Config IIO Viral & Poison Stack] Device on BitIdx:0x7 doesn't exist
[Config IIO Viral & Poison Stack] Device on BitIdx:0x8 doesn't exist
[Config IIO Viral & Poison Stack] Device on BitIdx:0x9 doesn't exist
[Config IIO Viral & Poison] Satallite IEH on BitIdx:0x4
[Config IIO Viral & Poison Stack] Device on BitIdx:0x2 doesn't exist
[Config IIO Viral & Poison Stack] Device on BitIdx:0x3 doesn't exist
[Config IIO Viral & Poison Stack] Device on BitIdx:0x4 doesn't exist
[Config IIO Viral & Poison Stack] Device on BitIdx:0x5 doesn't exist
[Config IIO Viral & Poison Stack] Device on BitIdx:0x6 doesn't exist
[Config IIO Viral & Poison Stack] Device on BitIdx:0x7 doesn't exist
[Config IIO Viral & Poison Stack] Device on BitIdx:0x8 doesn't exist
[Config IIO Viral & Poison Stack] Device on BitIdx:0x9 doesn't exist
[Config IIO Viral & Poison] Satallite IEH on BitIdx:0x5
[Config IIO Viral & Poison] Satallite IEH on BitIdx:0x7
[Config IIO Viral & Poison Stack] Device on BitIdx:0x2 doesn't exist
[Config IIO Viral & Poison Stack] Device on BitIdx:0x3 doesn't exist
[Config IIO Viral & Poison Stack] Device on BitIdx:0x4 doesn't exist
[Config IIO Viral & Poison Stack] Device on BitIdx:0x5 doesn't exist
[Config IIO Viral & Poison Stack] Device on BitIdx:0x6 doesn't exist
[Config IIO Viral & Poison Stack] Device on BitIdx:0x7 doesn't exist
[Config IIO Viral & Poison Stack] Device on BitIdx:0x8 doesn't exist
[Config IIO Viral & Poison Stack] Device on BitIdx:0x9 doesn't exist
[Config IIO Viral & Poison] Satallite IEH on BitIdx:0x8
[Config IIO Viral & Poison] Satallite IEH on BitIdx:0x9
[Config IIO Viral & Poison Stack] Device on BitIdx:0x2 doesn't exist
[Config IIO Viral & Poison Stack] Device on BitIdx:0x3 doesn't exist
[Config IIO Viral & Poison Stack] Device on BitIdx:0x4 doesn't exist
[Config IIO Viral & Poison Stack] Device on BitIdx:0x5 doesn't exist
[Config IIO Viral & Poison Stack] Device on BitIdx:0x6 doesn't exist
[Config IIO Viral & Poison Stack] Device on BitIdx:0x7 doesn't exist
[Config IIO Viral & Poison Stack] Device on BitIdx:0x8 doesn't exist
[Config IIO Viral & Poison Stack] Device on BitIdx:0x9 doesn't exist
[Config IIO Viral & Poison] Satallite IEH on BitIdx:0xA
[Config IIO Viral & Poison Stack] Device on BitIdx:0x2 doesn't exist
[Config IIO Viral & Poison Stack] Device on BitIdx:0x3 doesn't exist
[Config IIO Viral & Poison Stack] Device on BitIdx:0x4 doesn't exist
[Config IIO Viral & Poison Stack] Device on BitIdx:0x5 doesn't exist
[Config IIO Viral & Poison Stack] Device on BitIdx:0x6 doesn't exist
[Config IIO Viral & Poison Stack] Device on BitIdx:0x7 doesn't exist
[Config IIO Viral & Poison Stack] Device on BitIdx:0x8 doesn't exist
[Config IIO Viral & Poison Stack] Device on BitIdx:0x9 doesn't exist
[Config IIO Viral & Poison] Satallite IEH on BitIdx:0xB
[Config IIO Viral & Poison] Satallite IEH on BitIdx:0xD
[Config IIO Viral & Poison Stack] Device on BitIdx:0x2 doesn't exist
[Config IIO Viral & Poison Stack] Device on BitIdx:0x3 doesn't exist
[Config IIO Viral & Poison Stack] Device on BitIdx:0x4 doesn't exist
[Config IIO Viral & Poison Stack] Device on BitIdx:0x5 doesn't exist
[Config IIO Viral & Poison Stack] Device on BitIdx:0x6 doesn't exist
[Config IIO Viral & Poison Stack] Device on BitIdx:0x7 doesn't exist
[Config IIO Viral & Poison Stack] Device on BitIdx:0x8 doesn't exist
[Config IIO Viral & Poison Stack] Device on BitIdx:0x9 doesn't exist
[IIO VIRAL & POISON] Config Socket:0x0 End
[IIO VIRAL & POISON] Config Socket:0x1
[Config IIO Viral & Poison] Satallite IEH on BitIdx:0x2
[Config IIO Viral & Poison] Satallite IEH on BitIdx:0x3
[Config IIO Viral & Poison Stack] Device on BitIdx:0x2 doesn't exist
[Config IIO Viral & Poison Stack] Device on BitIdx:0x3 doesn't exist
[Config IIO Viral & Poison Stack] Device on BitIdx:0x4 doesn't exist
[Config IIO Viral & Poison Stack] Device on BitIdx:0x5 doesn't exist
[Config IIO Viral & Poison Stack] Device on BitIdx:0x6 doesn't exist
[Config IIO Viral & Poison Stack] Device on BitIdx:0x7 doesn't exist
[Config IIO Viral & Poison Stack] Device on BitIdx:0x8 doesn't exist
[Config IIO Viral & Poison Stack] Device on BitIdx:0x9 doesn't exist
[Config IIO Viral & Poison Stack] Device on BitIdx:0xA doesn't exist
[Config IIO Viral & Poison] Satallite IEH on BitIdx:0x4
[Config IIO Viral & Poison Stack] Device on BitIdx:0x2 doesn't exist
[Config IIO Viral & Poison Stack] Device on BitIdx:0x3 doesn't exist
[Config IIO Viral & Poison Stack] Device on BitIdx:0x4 doesn't exist
[Config IIO Viral & Poison Stack] Device on BitIdx:0x5 doesn't exist
[Config IIO Viral & Poison Stack] Device on BitIdx:0x6 doesn't exist
[Config IIO Viral & Poison Stack] Device on BitIdx:0x7 doesn't exist
[Config IIO Viral & Poison Stack] Device on BitIdx:0x8 doesn't exist
[Config IIO Viral & Poison Stack] Device on BitIdx:0x9 doesn't exist
[Config IIO Viral & Poison] Satallite IEH on BitIdx:0x5
[Config IIO Viral & Poison] Satallite IEH on BitIdx:0x7
[Config IIO Viral & Poison Stack] Device on BitIdx:0x2 doesn't exist
[Config IIO Viral & Poison Stack] Device on BitIdx:0x3 doesn't exist
[Config IIO Viral & Poison Stack] Device on BitIdx:0x4 doesn't exist
[Config IIO Viral & Poison Stack] Device on BitIdx:0x5 doesn't exist
[Config IIO Viral & Poison Stack] Device on BitIdx:0x6 doesn't exist
[Config IIO Viral & Poison Stack] Device on BitIdx:0x7 doesn't exist
[Config IIO Viral & Poison Stack] Device on BitIdx:0x8 doesn't exist
[Config IIO Viral & Poison Stack] Device on BitIdx:0x9 doesn't exist
[Config IIO Viral & Poison] Satallite IEH on BitIdx:0x8
[Config IIO Viral & Poison] Satallite IEH on BitIdx:0x9
[Config IIO Viral & Poison Stack] Device on BitIdx:0x2 doesn't exist
[Config IIO Viral & Poison Stack] Device on BitIdx:0x3 doesn't exist
[Config IIO Viral & Poison Stack] Device on BitIdx:0x4 doesn't exist
[Config IIO Viral & Poison Stack] Device on BitIdx:0x5 doesn't exist
[Config IIO Viral & Poison Stack] Device on BitIdx:0x6 doesn't exist
[Config IIO Viral & Poison Stack] Device on BitIdx:0x7 doesn't exist
[Config IIO Viral & Poison Stack] Device on BitIdx:0x8 doesn't exist
[Config IIO Viral & Poison Stack] Device on BitIdx:0x9 doesn't exist
[Config IIO Viral & Poison] Satallite IEH on BitIdx:0xA
[Config IIO Viral & Poison Stack] Device on BitIdx:0x2 doesn't exist
[Config IIO Viral & Poison Stack] Device on BitIdx:0x3 doesn't exist
[Config IIO Viral & Poison Stack] Device on BitIdx:0x4 doesn't exist
[Config IIO Viral & Poison Stack] Device on BitIdx:0x5 doesn't exist
[Config IIO Viral & Poison Stack] Device on BitIdx:0x6 doesn't exist
[Config IIO Viral & Poison Stack] Device on BitIdx:0x7 doesn't exist
[Config IIO Viral & Poison Stack] Device on BitIdx:0x8 doesn't exist
[Config IIO Viral & Poison Stack] Device on BitIdx:0x9 doesn't exist
[Config IIO Viral & Poison] Satallite IEH on BitIdx:0xB
[Config IIO Viral & Poison] Satallite IEH on BitIdx:0xD
[Config IIO Viral & Poison Stack] Device on BitIdx:0x2 doesn't exist
[Config IIO Viral & Poison Stack] Device on BitIdx:0x3 doesn't exist
[Config IIO Viral & Poison Stack] Device on BitIdx:0x4 doesn't exist
[Config IIO Viral & Poison Stack] Device on BitIdx:0x5 doesn't exist
[Config IIO Viral & Poison Stack] Device on BitIdx:0x6 doesn't exist
[Config IIO Viral & Poison Stack] Device on BitIdx:0x7 doesn't exist
[Config IIO Viral & Poison Stack] Device on BitIdx:0x8 doesn't exist
[Config IIO Viral & Poison Stack] Device on BitIdx:0x9 doesn't exist
[IIO VIRAL & POISON] Config Socket:0x1 End
PROGRESS CODE: V03070003 I0
PDB = c:\efi\servergen2\intel\Build\EagleStreamRpPkg\DEBUG_VS2015x86\X64\ServerRasPkg\Driver\Smm\CrashLogSmm\CrashLogSmm\DEBUG\CrashLogSmm.pdb
PROGRESS CODE: V03070002 I0
CrashLog Entry Point
Failed to locate CpuCrashLogRecordRegionProtocol !
Failed to locate PchCrashLogRecordRegionProtocol !
CrashLog is not present. Skip BERT creation
Error: SMM image at 0007E7BE000 start failed: Not Ready
PROGRESS CODE: V03070003 I0
PDB = c:\efi\servergen2\intel\Build\EagleStreamRpPkg\DEBUG_VS2015x86\X64\ServerRasPkg\Driver\Smm\WheaErrorInj\WheaErrorInj\DEBUG\WheaErrorInj2.pdb
PROGRESS CODE: V03070002 I0
[WheaErrorInj2][CrystalRidgeLib] Failed to locate protocol: Not Found
WHEA Error Injection is not enabled in Setup
PROGRESS CODE: V03070003 I0
PDB = c:\efi\servergen2\intel\Build\EagleStreamRpPkg\DEBUG_VS2015x86\X64\ServerRasPkg\Driver\Smm\WheaLastBootError\WheaLastBootError\DEBUG\WheaLastBootError.pdb
PROGRESS CODE: V03070002 I0
[WheaLastBootError][CrystalRidgeLib] Failed to locate protocol: Not Found
dump ACPI table
42 45 52 54 30 0 0 0 1 0 49 4E 54 45 4C 20 49
4E 54 45 4C 20 49 44 1 0 0 0 49 4E 54 4C 1
0 0 0 0 80 4 0 18 80 C4 76 0 0 0 0
[WHEAINIT] start to install WHEA ACPI tables
[WHEAINIT] install WHEA ACPI tables status:Success
PROGRESS CODE: V03070003 I0
PDB = c:\efi\servergen2\intel\Build\EagleStreamRpPkg\DEBUG_VS2015x86\X64\ServerRasPkg\Driver\Smm\WheaERST\WheaERST\DEBUG\WheaERST.pdb
PROGRESS CODE: V03070002 I0
dump ACPI table
45 52 53 54 30 2 0 0 1 0 49 4E 54 45 4C 20 49
4E 54 45 4C 20 49 44 1 0 0 0 49 4E 54 4C 1
0 0 0 30 0 0 0 0 0 0 0 10 0 0 0 0
3 0 0 0 40 0 4 18 50 C4 76 0 0 0 0 2
0 0 0 0 0 0 0 FF FF 0 0 0 0 0 0 1
3 0 0 0 40 0 4 18 50 C4 76 0 0 0 0 1
0 0 0 0 0 0 0 FF FF 0 0 0 0 0 0 2
3 0 0 0 40 0 4 18 50 C4 76 0 0 0 0 3
0 0 0 0 0 0 0 FF FF 0 0 0 0 0 0 3
4 1 0 0 40 0 4 18 50 C4 76 0 0 0 0 0
0 0 0 0 0 0 0 FF FF 0 0 0 0 0 0 4
2 0 0 0 40 0 4 30 50 C4 76 0 0 0 0 0
0 0 0 0 0 0 0 FF FF FF FF 0 0 0 0 5
3 0 0 1 8 0 1 B2 0 0 0 0 0 0 0 9C
0 0 0 0 0 0 0 FF FF 0 0 0 0 0 0 6
1 0 0 0 40 0 4 40 50 C4 76 0 0 0 0 1
0 0 0 0 0 0 0 1 0 0 0 0 0 0 0 7
0 0 0 0 40 0 4 38 50 C4 76 0 0 0 0 0
0 0 0 0 0 0 0 FF FF FF FF 0 0 0 0 8
0 0 0 0 40 0 4 70 50 C4 76 0 0 0 0 0
0 0 0 0 0 0 0 FF FF FF FF FF FF FF FF 9
2 0 0 0 40 0 4 20 50 C4 76 0 0 0 0 0
0 0 0 0 0 0 0 FF FF FF FF FF FF FF FF A
0 0 0 0 40 0 4 48 50 C4 76 0 0 0 0 0
0 0 0 0 0 0 0 FF FF FF FF 0 0 0 0 B
3 0 0 0 40 0 4 18 50 C4 76 0 0 0 0 F
0 0 0 0 0 0 0 FF FF 0 0 0 0 0 0 C
0 0 0 0 40 0 4 28 50 C4 76 0 0 0 0 0
0 0 0 0 0 0 0 FF FF FF FF 0 0 0 0 D
0 0 0 0 40 0 4 50 50 C4 76 0 0 0 0 0
0 0 0 0 0 0 0 FF FF FF FF FF FF FF FF E
0 0 0 0 40 0 4 58 50 C4 76 0 0 0 0 0
0 0 0 0 0 0 0 FF FF FF FF FF FF FF FF F
0 0 0 0 40 0 4 60 50 C4 76 0 0 0 0 0
0 0 0 0 0 0 0 FF FF FF FF FF FF FF FF
[WHEAINIT] start to install WHEA ACPI tables
[WHEAINIT] install WHEA ACPI tables status:Success
PROGRESS CODE: V03070003 I0
PDB = c:\efi\servergen2\intel\Build\EagleStreamRpPkg\DEBUG_VS2015x86\X64\ServerRasPkg\Driver\Smm\EnhancedMcaErrorLog\EnhancedMcaErrorLog\DEBUG\EnhancedMcaErrorLog.pdb
PROGRESS CODE: V03070002 I0
InitializEnhancedMcaErrorLogger++
EmcaEn: 1, ElogEn: 1, ElogIgnOptin: 0, ElogCorrErrEn: 1, ElogMemErrEn: 1, ElogProcErrEn: 1
EmcaL1DirAddr = 0x76C24000
InitializEnhancedMcaErrorLogger--, Success
PROGRESS CODE: V03070003 I0
PDB = c:\efi\servergen2\intel\Build\EagleStreamRpPkg\DEBUG_VS2015x86\X64\ServerRasPkg\Driver\Smm\PprVlsErrorLogListener\PprVlsErrorLogListener\DEBUG\PprVlsErrorLogListener.pdb
PROGRESS CODE: V03070002 I0
[PprVlsErrorLogListener][CrystalRidgeLib] Failed to locate protocol: Not Found
PROGRESS CODE: V03070003 I0
PDB = c:\efi\servergen2\intel\Build\EagleStreamRpPkg\DEBUG_VS2015x86\X64\ServerRasPkg\Driver\Smm\McBankErrorInjection\McBankErrorInjection\DEBUG\McBankErrorInjection.pdb
PROGRESS CODE: V03070002 I0
PROGRESS CODE: V03070003 I0
PDB = c:\efi\servergen2\intel\Build\EagleStreamRpPkg\DEBUG_VS2015x86\X64\ServerRasPkg\Driver\Smm\ErrorControl\ErrorControl\DEBUG\ErrorControl.pdb
PROGRESS CODE: V03070002 I0
PROGRESS CODE: V03070003 I0
PDB = c:\efi\servergen2\intel\Build\EagleStreamRpPkg\DEBUG_VS2015x86\X64\ServerSiliconPkg\Cpu\PowerManagement\PpmInitializeDxe\PpmInitializeDxe\DEBUG\PpmInitializeDxe.pdb
PROGRESS CODE: V03040002 I0
DXE PPM Initialization Entry
PROGRESS CODE: V03040003 I0
PDB = c:\efi\servergen2\intel\Build\EagleStreamRpPkg\DEBUG_VS2015x86\X64\ServerSiliconPkg\Universal\Dxe\CrystalRidge\CrystalRidge\DEBUG\CrystalRidge.pdb
PROGRESS CODE: V03040002 I0
No PMems, Crystal Ridge Driver is not going to be loaded.
PROGRESS CODE: V03040003 I0
PDB = c:\efi\servergen2\intel\Build\EagleStreamRpPkg\DEBUG_VS2015x86\X64\ClientOneSiliconPkg\IpBlock\Amt\Sol\Dxe\SerialOverLan\DEBUG\SerialOverLan.pdb
PROGRESS CODE: V03040002 I0
Error: Image at 00068F27000 start failed: Unsupported
PDB = c:\efi\servergen2\intel\Build\EagleStreamRpPkg\DEBUG_VS2015x86\X64\ClientOneSiliconPkg\IpBlock\Amt\Sol\Dxe\SerialOverLan\DEBUG\SerialOverLan.pdb
PROGRESS CODE: V03040003 I0
PDB = c:\efi\servergen2\intel\Build\EagleStreamRpPkg\DEBUG_VS2015x86\X64\ServerPlatformPkg\Features\Me\Client\MePolicyHelper\MePolicyHelper\DEBUG\MePolicyHelper.pdb
PROGRESS CODE: V03040002 I0
PROGRESS CODE: V03040003 I0
PDB = c:\efi\servergen2\intel\Build\EagleStreamRpPkg\DEBUG_VS2015x86\X64\XmlCliFeaturePkg\XmlCliRestricted\Dxe\XmlCliDxe\DEBUG\XmlCliDxe.pdb
PROGRESS CODE: V03040002 I0
PROGRESS CODE: V03040003 I0
PDB = d:\dde\63d22spr\intel\Build\EagleStreamRpPkg\DEBUG_VS2015x86\X64\ServerSecurityPkg\Pfr\Restricted\DebugTool\IShellCommand\IShellCommands\DEBUG\IShellCommands.pdb
PROGRESS CODE: V03040002 I0
PROGRESS CODE: V03040003 I0
PDB = c:\efi\servergen2\intel\Build\EagleStreamRpPkg\DEBUG_VS2015x86\X64\ServerPlatformPkg\Universal\PiPilotIII\PiPilotIIIDxe\DEBUG\PiPilotIIIDxe.pdb
PROGRESS CODE: V03040002 I0
PROGRESS CODE: V03040003 I0
PDB = c:\efi\servergen2\intel\Build\EagleStreamRpPkg\DEBUG_VS2015x86\X64\ServerPlatformPkg\Universal\PiAst2500\PiAst2500Dxe\DEBUG\PiAst2500Dxe.pdb
PROGRESS CODE: V03040002 I0
PROGRESS CODE: V03040003 I0
PDB = c:\efi\servergen2\intel\Build\EagleStreamRpPkg\DEBUG_VS2015x86\X64\FatPkg\EnhancedFatDxe\Fat\DEBUG\Fat.pdb
PROGRESS CODE: V03040002 I0
PROGRESS CODE: V03040003 I0
PDB = c:\efi\servergen2\intel\Build\EagleStreamRpPkg\DEBUG_VS2015x86\X64\ServerPlatformPkg\Platform\IsaHostController\IsaHostControllerDxe\DEBUG\IsaHostControllerDxe.pdb
PROGRESS CODE: V03040002 I0
PROGRESS CODE: V03040003 I0
PDB = c:\efi\servergen2\intel\Build\EagleStreamRpPkg\DEBUG_VS2015x86\X64\ServerPlatformPkg\Features\Sata\SataController\SataController\DEBUG\SataController.pdb
PROGRESS CODE: V03040002 I0
PROGRESS CODE: V03040003 I0
PDB = c:\efi\servergen2\intel\Build\EagleStreamRpPkg\DEBUG_VS2015x86\X64\MdeModulePkg\Bus\Pci\PciBusDxe\PciBusDxe\DEBUG\PciBusDxe.pdb
PROGRESS CODE: V03040002 I0
PROGRESS CODE: V03040003 I0
PDB = c:\efi\servergen2\intel\Build\EagleStreamRpPkg\DEBUG_VS2015x86\X64\ServerPlatformPkg\Features\Acpi\Dxe\AcpiPlatform\AcpiPlatformSpr\DEBUG\AcpiPlatform.pdb
PROGRESS CODE: V03040002 I0
PROGRESS CODE: V03048503 I0
Locate mFruRedirProtocol failed Not Found
ACPI MCFG table @ address 0x68F27918
Multi-Seg Support = 0
Number of Segments (sockets): 1
Table Length = 0x3C
Segment[ 0].BaseAddress = 80000000
Segment[ 0].PciSegmentGroupNumber = 0
Segment[ 0].StartBusNumber = 0
Segment[ 0].EndBusNumber = FF
Xhci TableHeader->OemTableId = 6E5F6878
[ACPI](KEYP) Not found any PCIe/CXL/NTB port
ExternSbExpected: 1787419672, ExternSbFound: 1787068440
ExternSbExpected: 0, ExternSbFound: 1993134098
PROGRESS CODE: V03040003 I0
PDB = c:\efi\servergen2\intel\Build\EagleStreamRpPkg\DEBUG_VS2015x86\X64\ServerPlatformPkg\Features\Acpi\Dxe\AcpiVtd\AcpiVTD\DEBUG\AcpiVTD.pdb
PROGRESS CODE: V03040002 I0
PROGRESS CODE: V03040003 I0
PDB = c:\efi\servergen2\intel\Build\EagleStreamRpPkg\DEBUG_VS2015x86\X64\OvmfPkg\QemuVideoDxe\QemuVideoDxe\DEBUG\QemuVideoDxe.pdb
PROGRESS CODE: V03040002 I0
PROGRESS CODE: V03040003 I0
PDB = c:\efi\servergen2\intel\Build\EagleStreamRpPkg\DEBUG_VS2015x86\X64\MdeModulePkg\Bus\Pci\XhciDxe\XhciDxe\DEBUG\XhciDxe.pdb
PROGRESS CODE: V03040002 I0
PROGRESS CODE: V03040003 I0
PDB = c:\efi\servergen2\intel\Build\EagleStreamRpPkg\DEBUG_VS2015x86\X64\MdeModulePkg\Bus\Pci\EhciDxe\EhciDxe\DEBUG\EhciDxe.pdb
PROGRESS CODE: V03040002 I0
PROGRESS CODE: V03040003 I0
PDB = c:\efi\servergen2\intel\Build\EagleStreamRpPkg\DEBUG_VS2015x86\X64\MdeModulePkg\Bus\Usb\UsbKbDxe\UsbKbDxe\DEBUG\UsbKbDxe.pdb
PROGRESS CODE: V03040002 I0
PROGRESS CODE: V03040003 I0
PDB = c:\efi\servergen2\intel\Build\EagleStreamRpPkg\DEBUG_VS2015x86\X64\MdeModulePkg\Bus\Usb\UsbMassStorageDxe\UsbMassStorageDxe\DEBUG\UsbMassStorageDxe.pdb
PROGRESS CODE: V03040002 I0
PROGRESS CODE: V03040003 I0
PDB = c:\efi\servergen2\intel\Build\EagleStreamRpPkg\DEBUG_VS2015x86\X64\MdeModulePkg\Bus\Usb\UsbMouseDxe\UsbMouseDxe\DEBUG\UsbMouseDxe.pdb
PROGRESS CODE: V03040002 I0
PROGRESS CODE: V03040003 I0
PDB = c:\efi\servergen2\intel\Build\EagleStreamRpPkg\DEBUG_VS2015x86\X64\MdeModulePkg\Bus\Pci\UhciDxe\UhciDxe\DEBUG\UhciDxe.pdb
PROGRESS CODE: V03040002 I0
PROGRESS CODE: V03040003 I0
PDB = c:\efi\servergen2\intel\Build\EagleStreamRpPkg\DEBUG_VS2015x86\X64\MdeModulePkg\Bus\Usb\UsbBusDxe\UsbBusDxe\DEBUG\UsbBusDxe.pdb
PROGRESS CODE: V03040002 I0
PROGRESS CODE: V03040003 I0
PDB = c:\efi\servergen2\intel\Build\EagleStreamRpPkg\DEBUG_VS2015x86\X64\MdeModulePkg\Bus\Pci\EhciDxe\EhciDxe\DEBUG\EhciDxe.pdb
PROGRESS CODE: V03040002 I0
PROGRESS CODE: V03040003 I0
PDB = c:\efi\servergen2\intel\Build\EagleStreamRpPkg\DEBUG_VS2015x86\X64\MdeModulePkg\Bus\Usb\UsbKbDxe\UsbKbDxe\DEBUG\UsbKbDxe.pdb
PROGRESS CODE: V03040002 I0
PROGRESS CODE: V03040003 I0
PDB = c:\efi\servergen2\intel\Build\EagleStreamRpPkg\DEBUG_VS2015x86\X64\MdeModulePkg\Bus\Usb\UsbMassStorageDxe\UsbMassStorageDxe\DEBUG\UsbMassStorageDxe.pdb
PROGRESS CODE: V03040002 I0
PROGRESS CODE: V03040003 I0
PDB = c:\efi\servergen2\intel\Build\EagleStreamRpPkg\DEBUG_VS2015x86\X64\MdeModulePkg\Bus\Usb\UsbMouseDxe\UsbMouseDxe\DEBUG\UsbMouseDxe.pdb
PROGRESS CODE: V03040002 I0
PROGRESS CODE: V03040003 I0
PDB = c:\efi\servergen2\intel\Build\EagleStreamRpPkg\DEBUG_VS2015x86\X64\MdeModulePkg\Bus\Pci\UhciDxe\UhciDxe\DEBUG\UhciDxe.pdb
PROGRESS CODE: V03040002 I0
PROGRESS CODE: V03040003 I0
PDB = c:\efi\servergen2\intel\Build\EagleStreamRpPkg\DEBUG_VS2015x86\X64\MdeModulePkg\Bus\Usb\UsbBusDxe\UsbBusDxe\DEBUG\UsbBusDxe.pdb
PROGRESS CODE: V03040002 I0
PROGRESS CODE: V03040003 I0
PDB = c:\efi\servergen2\intel\Build\EagleStreamRpPkg\DEBUG_VS2015x86\X64\MdeModulePkg\Bus\Scsi\ScsiBusDxe\ScsiBusDxe\DEBUG\ScsiBus.pdb
PROGRESS CODE: V03040002 I0
PROGRESS CODE: V03040003 I0
PDB = c:\efi\servergen2\intel\Build\EagleStreamRpPkg\DEBUG_VS2015x86\X64\MdeModulePkg\Bus\Scsi\ScsiDiskDxe\ScsiDiskDxe\DEBUG\ScsiDisk.pdb
PROGRESS CODE: V03040002 I0
PROGRESS CODE: V03040003 I0
PDB = c:\efi\servergen2\intel\Build\EagleStreamRpPkg\DEBUG_VS2015x86\X64\MdeModulePkg\Bus\Pci\NvmExpressDxe\NvmExpressDxe\DEBUG\NvmExpressDxe.pdb
PROGRESS CODE: V03040002 I0
PROGRESS CODE: V03040003 I0
PDB = c:\efi\servergen2\intel\Build\EagleStreamRpPkg\DEBUG_VS2015x86\X64\MdeModulePkg\Universal\Disk\UnicodeCollation\EnglishDxe\EnglishDxe\DEBUG\EnglishDxe.pdb
PROGRESS CODE: V03040002 I0
PROGRESS CODE: V03040003 I0
PDB = c:\efi\servergen2\intel\Build\EagleStreamRpPkg\DEBUG_VS2015x86\X64\MdeModulePkg\Universal\Console\ConPlatformDxe\ConPlatformDxe\DEBUG\ConPlatformDxe.pdb
PROGRESS CODE: V03040002 I0
PROGRESS CODE: V03040003 I0
PDB = c:\efi\servergen2\intel\Build\EagleStreamRpPkg\DEBUG_VS2015x86\X64\MdeModulePkg\Universal\Console\ConSplitterDxe\ConSplitterDxe\DEBUG\ConSplitterDxe.pdb
PROGRESS CODE: V03040002 I0
PROGRESS CODE: V03040003 I0
PDB = c:\efi\servergen2\intel\Build\EagleStreamRpPkg\DEBUG_VS2015x86\X64\MdeModulePkg\Universal\Console\GraphicsConsoleDxe\GraphicsConsoleDxe\DEBUG\GraphicsConsoleDxe.pdb
PROGRESS CODE: V03040002 I0
PROGRESS CODE: V03040003 I0
PDB = c:\efi\servergen2\intel\Build\EagleStreamRpPkg\DEBUG_VS2015x86\X64\MdeModulePkg\Universal\Console\TerminalDxe\TerminalDxe\DEBUG\TerminalDxe.pdb
PROGRESS CODE: V03040002 I0
PROGRESS CODE: V03040003 I0
PDB = c:\efi\servergen2\intel\Build\EagleStreamRpPkg\DEBUG_VS2015x86\X64\MdeModulePkg\Universal\Disk\DiskIoDxe\DiskIoDxe\DEBUG\DiskIoDxe.pdb
PROGRESS CODE: V03040002 I0
PROGRESS CODE: V03040003 I0
PDB = c:\efi\servergen2\intel\Build\EagleStreamRpPkg\DEBUG_VS2015x86\X64\MdeModulePkg\Universal\Disk\PartitionDxe\PartitionDxe\DEBUG\PartitionDxe.pdb
PROGRESS CODE: V03040002 I0
PROGRESS CODE: V03040003 I0
PDB = c:\efi\servergen2\intel\Build\EagleStreamRpPkg\DEBUG_VS2015x86\X64\MdeModulePkg\Bus\Isa\IsaBusDxe\IsaBusDxe\DEBUG\IsaBusDxe.pdb
PROGRESS CODE: V03040002 I0
PROGRESS CODE: V03040003 I0
PDB = c:\efi\servergen2\intel\Build\EagleStreamRpPkg\DEBUG_VS2015x86\X64\MdeModulePkg\Bus\Pci\PciSioSerialDxe\PciSioSerialDxe\DEBUG\PciSioSerialDxe.pdb
PROGRESS CODE: V03040002 I0
PROGRESS CODE: V03040003 I0
PDB = c:\efi\servergen2\intel\Build\EagleStreamRpPkg\DEBUG_VS2015x86\X64\MdeModulePkg\Bus\Isa\Ps2KeyboardDxe\Ps2KeyboardDxe\DEBUG\Ps2KeyboardDxe.pdb
PROGRESS CODE: V03040002 I0
PROGRESS CODE: V03040003 I0
PDB = c:\efi\servergen2\intel\Build\EagleStreamRpPkg\DEBUG_VS2015x86\X64\MdeModulePkg\Bus\Isa\Ps2MouseDxe\Ps2MouseDxe\DEBUG\Ps2MouseDxe.pdb
PROGRESS CODE: V03040002 I0
PROGRESS CODE: V03040003 I0
PDB = c:\efi\servergen2\intel\Build\EagleStreamRpPkg\DEBUG_VS2015x86\X64\MdeModulePkg\Bus\Ata\AtaBusDxe\AtaBusDxe\DEBUG\AtaBusDxe.pdb
PROGRESS CODE: V03040002 I0
PROGRESS CODE: V03040003 I0
PDB = c:\efi\servergen2\intel\Build\EagleStreamRpPkg\DEBUG_VS2015x86\X64\MdeModulePkg\Bus\Ata\AtaAtapiPassThru\AtaAtapiPassThru\DEBUG\AtaAtapiPassThruDxe.pdb
PROGRESS CODE: V03040002 I0
PROGRESS CODE: V03040003 I0
PDB = c:\efi\servergen2\intel\Build\EagleStreamRpPkg\DEBUG_VS2015x86\X64\NetworkPkg\SnpDxe\SnpDxe\DEBUG\SnpDxe.pdb
PROGRESS CODE: V03040002 I0
PROGRESS CODE: V03040003 I0
PDB = c:\efi\servergen2\intel\Build\EagleStreamRpPkg\DEBUG_VS2015x86\X64\NetworkPkg\VlanConfigDxe\VlanConfigDxe\DEBUG\VlanConfigDxe.pdb
PROGRESS CODE: V03040002 I0
PROGRESS CODE: V03040003 I0
PDB = c:\efi\servergen2\intel\Build\EagleStreamRpPkg\DEBUG_VS2015x86\X64\NetworkPkg\MnpDxe\MnpDxe\DEBUG\MnpDxe.pdb
PROGRESS CODE: V03040002 I0
PROGRESS CODE: V03040003 I0
PDB = c:\efi\servergen2\intel\Build\EagleStreamRpPkg\DEBUG_VS2015x86\X64\NetworkPkg\ArpDxe\ArpDxe\DEBUG\ArpDxe.pdb
PROGRESS CODE: V03040002 I0
PROGRESS CODE: V03040003 I0
PDB = c:\efi\servergen2\intel\Build\EagleStreamRpPkg\DEBUG_VS2015x86\X64\NetworkPkg\Dhcp4Dxe\Dhcp4Dxe\DEBUG\Dhcp4Dxe.pdb
PROGRESS CODE: V03040002 I0
PROGRESS CODE: V03040003 I0
PDB = c:\efi\servergen2\intel\Build\EagleStreamRpPkg\DEBUG_VS2015x86\X64\NetworkPkg\Ip4Dxe\Ip4Dxe\DEBUG\Ip4Dxe.pdb
PROGRESS CODE: V03040002 I0
PROGRESS CODE: V03040003 I0
PDB = c:\efi\servergen2\intel\Build\EagleStreamRpPkg\DEBUG_VS2015x86\X64\NetworkPkg\Udp4Dxe\Udp4Dxe\DEBUG\Udp4Dxe.pdb
PROGRESS CODE: V03040002 I0
PROGRESS CODE: V03040003 I0
PDB = c:\efi\servergen2\intel\Build\EagleStreamRpPkg\DEBUG_VS2015x86\X64\NetworkPkg\Mtftp4Dxe\Mtftp4Dxe\DEBUG\Mtftp4Dxe.pdb
PROGRESS CODE: V03040002 I0
PROGRESS CODE: V03040003 I0
PDB = c:\efi\servergen2\intel\Build\EagleStreamRpPkg\DEBUG_VS2015x86\X64\NetworkPkg\Dhcp6Dxe\Dhcp6Dxe\DEBUG\Dhcp6Dxe.pdb
PROGRESS CODE: V03040002 I0
PROGRESS CODE: V03040003 I0
PDB = c:\efi\servergen2\intel\Build\EagleStreamRpPkg\DEBUG_VS2015x86\X64\NetworkPkg\Ip6Dxe\Ip6Dxe\DEBUG\Ip6Dxe.pdb
PROGRESS CODE: V03040002 I0
PROGRESS CODE: V03040003 I0
PDB = c:\efi\servergen2\intel\Build\EagleStreamRpPkg\DEBUG_VS2015x86\X64\NetworkPkg\Udp6Dxe\Udp6Dxe\DEBUG\Udp6Dxe.pdb
PROGRESS CODE: V03040002 I0
PROGRESS CODE: V03040003 I0
PDB = c:\efi\servergen2\intel\Build\EagleStreamRpPkg\DEBUG_VS2015x86\X64\NetworkPkg\Mtftp6Dxe\Mtftp6Dxe\DEBUG\Mtftp6Dxe.pdb
PROGRESS CODE: V03040002 I0
PROGRESS CODE: V03040003 I0
PDB = c:\efi\servergen2\intel\Build\EagleStreamRpPkg\DEBUG_VS2015x86\X64\NetworkPkg\TcpDxe\TcpDxe\DEBUG\TcpDxe.pdb
PROGRESS CODE: V03040002 I0
PROGRESS CODE: V03040003 I0
PDB = c:\efi\servergen2\intel\Build\EagleStreamRpPkg\DEBUG_VS2015x86\X64\NetworkPkg\UefiPxeBcDxe\UefiPxeBcDxe\DEBUG\UefiPxeBcDxe.pdb
PROGRESS CODE: V03040002 I0
PROGRESS CODE: V03040003 I0
PDB = c:\efi\servergen2\intel\Build\EagleStreamRpPkg\DEBUG_VS2015x86\X64\NetworkPkg\TlsDxe\TlsDxe\DEBUG\TlsDxe.pdb
PROGRESS CODE: V03040002 I0
PROGRESS CODE: V03040003 I0
PDB = c:\efi\servergen2\intel\Build\EagleStreamRpPkg\DEBUG_VS2015x86\X64\NetworkPkg\DnsDxe\DnsDxe\DEBUG\DnsDxe.pdb
PROGRESS CODE: V03040002 I0
PROGRESS CODE: V03040003 I0
PDB = c:\efi\servergen2\intel\Build\EagleStreamRpPkg\DEBUG_VS2015x86\X64\NetworkPkg\HttpDxe\HttpDxe\DEBUG\HttpDxe.pdb
PROGRESS CODE: V03040002 I0
PROGRESS CODE: V03040003 I0
PDB = c:\efi\servergen2\intel\Build\EagleStreamRpPkg\DEBUG_VS2015x86\X64\NetworkPkg\HttpBootDxe\HttpBootDxe\DEBUG\HttpBootDxe.pdb
PROGRESS CODE: V03040002 I0
PROGRESS CODE: V03040003 I0
PROGRESS CODE: V03040002 I0
PROGRESS CODE: V03040003 I0
PROGRESS CODE: V03040002 I0
PROGRESS CODE: V03040003 I0
PROGRESS CODE: V03040002 I0
PROGRESS CODE: V03040003 I0
PROGRESS CODE: V03040002 I0
PROGRESS CODE: V03040003 I0
PDB = d:\qba1\workspace\39189\vmd_uefi\Build\MdeModule\DEBUG_VS2012x86\X64\MdeModulePkg\Bus\Pci\VmdDxe\VmdDxe\DEBUG\VmdDxe.pdb
PROGRESS CODE: V03040002 I0
PROGRESS CODE: V03040003 I0
PROGRESS CODE: V03040002 I0
PROGRESS CODE: V03040003 I0
PDB = c:\efi\servergen2\intel\Build\EagleStreamRpPkg\DEBUG_VS2015x86\X64\XmlCliFeaturePkg\XmlCliRestricted\Smm\XmlCliSmm\DEBUG\XmlCliSmm.pdb
PROGRESS CODE: V03070002 I0
PROGRESS CODE: V03070003 I0
PDB = c:\efi\servergen2\intel\Build\EagleStreamRpPkg\DEBUG_VS2015x86\X64\ServerPlatformPkg\Features\Acpi\DxeSmm\AcpiSmm\AcpiSmmPlatform\DEBUG\AcpiSmmPlatform.pdb
PROGRESS CODE: V03070002 I0
PROGRESS CODE: V03070003 I0
PDB = c:\efi\servergen2\intel\Build\EagleStreamRpPkg\DEBUG_VS2015x86\X64\ServerPlatformPkg\Restricted\SMIFlashSigned\SMIFlashSigned\DEBUG\SmiFlashSigned.pdb
PROGRESS CODE: V03070002 I0
PROGRESS CODE: V03070003 I0
PDB = c:\efi\servergen2\intel\Build\EagleStreamRpPkg\DEBUG_VS2015x86\X64\ServerRasPkg\Driver\Smm\Gen2\IioErrorHandler\IioErrorHandler\DEBUG\IioErrorHandler.pdb
PROGRESS CODE: V03070002 I0
MailBox->IioInitPar.CxlMefnEn = 0x0
PROGRESS CODE: V03070003 I0
PDB = c:\efi\servergen2\intel\Build\EagleStreamRpPkg\DEBUG_VS2015x86\X64\ServerRasPkg\Driver\Smm\WheaErrorLogListener\WheaErrorLogListener\DEBUG\WheaErrorLogListener.pdb
PROGRESS CODE: V03070002 I0
[HEST] Current source counter:1 table length:68 buffer address:76BEF018
[HEST] Current source counter:2 table length:A8 buffer address:76BEA018
[HEST] Current source counter:3 table length:D8 buffer address:0
[HEST] Current source counter:4 table length:104 buffer address:0
[HEST] Current source counter:5 table length:13C buffer address:0
dump ACPI table
48 45 53 54 3C 1 0 0 1 0 49 4E 54 45 4C 20 49
4E 54 45 4C 20 49 44 1 0 0 0 49 4E 54 4C 1
0 0 0 5 0 0 0 9 0 0 0 FF FF 0 1 1
0 0 0 F 0 0 0 F8 1F 0 0 0 40 0 4 18
F0 BE 76 0 0 0 0 3 1C 0 0 0 0 0 0 0
0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0
0 0 0 0 20 0 0 9 0 1 0 FF FF 0 1 1
0 0 0 1 0 0 0 F8 1F 0 0 0 40 0 4 18
A0 BE 76 0 0 0 0 4 1C 0 0 0 0 0 0 0
0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0
0 0 0 0 20 0 0 6 0 2 0 0 0 3 0 1
0 0 0 1 0 0 0 0 0 0 0 0 0 0 0 0
0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0
0 0 0 0 0 0 0 7 0 3 0 0 0 3 0 1
0 0 0 1 0 0 0 0 0 0 0 0 0 0 0 0
0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0
0 0 0 8 0 4 0 0 0 3 0 1 0 0 0 1
0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0
0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0
0 0 0 0 0 0 0 0 0 0 0
[WHEAINIT] start to install WHEA ACPI tables
[WHEAINIT] install WHEA ACPI tables status:Success
PROGRESS CODE: V03070003 I0
PDB = c:\efi\servergen2\intel\Build\EagleStreamRpPkg\DEBUG_VS2015x86\X64\ServerSecurityPkg\Mktme\MktmeLateInit\MktmeLateInit\DEBUG\MktmeLateInit.pdb
PROGRESS CODE: V03040002 I0
PROGRESS CODE: V03040003 I0
PDB = c:\efi\servergen2\intel\Build\EagleStreamRpPkg\DEBUG_VS2015x86\X64\ServerSecurityPkg\Sgx\SgxLateInit\Spr\SgxLateInit\DEBUG\SgxLateInitSPR.pdb
PROGRESS CODE: V03040002 I0
[SGX] SgxLateInitEntryPoint entry
SgxMpServicesData()
Thread 0 is BSP of Socket 0
Thread 80 is BSP of Socket 1
System BSP Thread = 000
System BSP Package = 000
[SGX] GetActmManifestHobArray BEGIN
Found ActmDimmManifestHob[0] = 0x70C93788!
Found ActmDimmManifestHob[1] = 0x70C93908!
[SGX] GetActmManifestHobArray END (Success)
[SGX] UpdateSocketSetupOptions Start
[SGX] UpdateSocketSetupOptions exit: Success
TDX: GuidHob pointer is NULL
GetVariableHelper - SgxRegistrationConfiguration not found in NVRAM, continue
GetVariableHelper - SgxUefiRegistrationConfiguration not found in NVRAM, continue
[SGX] Create RegistrationConfiguration from defaults.
SetRegistrationServerAddress: SgxRegistrationConfig->SgxRegServerInfo.Url = https://sbx.api.trustedservices.intel.com:443
[SGX] Update UpdateRegistrationConfigFlags
GetVariableHelper - SgxPlatformManifest not found in NVRAM, continue
GetVariableHelper - SgxUefiRegistrationServerRequest not found in NVRAM, continue
[SGX-DEBUG]: Get SgxRegistrationStatus
GetVariableHelper - SgxRegistrationStatus not found in NVRAM, continue
[SGX-DEBUG]: Get SgxUefiRegistrationStatus
GetVariableHelper - SgxUefiRegistrationStatus not found in NVRAM, continue
Warning: SGX is disabled on this system
[SGX] SgxDisabled_SgxLateInit: Success
[SGX] SgxErrorCode = 0x0
[SGX] PreviousStateVariablesSaving BEGIN
GetVariableHelper - SgxRegistrationServerResponse not found in NVRAM, continue
[SGX] SgxLateInit exit: Success
PROGRESS CODE: V03040003 I0
PDB = c:\efi\servergen2\intel\Build\EagleStreamRpPkg\DEBUG_VS2015x86\X64\ServerPlatformPkg\Platform\Dxe\S3NvramSave\S3NvramSave\DEBUG\S3NvramSave.pdb
PROGRESS CODE: V03040002 I0
Save data to NVRAM for socket_0_nvram_data / socket_0_nvram_data - = Saved
Save data to NVRAM for socket_1_nvram_data / socket_1_nvram_data - = Saved
Save data to NVRAM for socket_2_nvram_data / socket_2_nvram_data - = HOB not found or not populated
Save data to NVRAM for socket_3_nvram_data / socket_3_nvram_data - = HOB not found or not populatedPROGRESS CODE: V03040003 I0
PDB = c:\efi\servergen2\intel\Build\EagleStreamRpPkg\DEBUG_VS2015x86\X64\ServerPlatformPkg\Platform\Dxe\UncoreMiscDxe\UncoreMiscDxe\DEBUG\UncoreMiscDxe.pdb
PROGRESS CODE: V03040002 I0
PROGRESS CODE: V03040003 I0
PDB = c:\efi\servergen2\intel\Build\EagleStreamRpPkg\DEBUG_VS2015x86\X64\ServerPlatformPkg\Platform\Dxe\ReserveMemory\ReserveMem\DEBUG\ReserveMem.pdb
PROGRESS CODE: V03040002 I0
PROGRESS CODE: V03040003 I0
PDB = c:\efi\servergen2\intel\Build\EagleStreamRpPkg\DEBUG_VS2015x86\X64\ServerSecurityPkg\Universal\GetSec\Dxe\TxtDxe\DEBUG\TxtDxe.pdb
PROGRESS CODE: V03040002 I0
TXT is disabled
[TXT] DriverEntry: Exit
PROGRESS CODE: V03040003 I0
PDB = c:\efi\servergen2\intel\Build\EagleStreamRpPkg\DEBUG_VS2015x86\X64\UserAuthFeaturePkg\UserAuthenticationDxeSmm\UserAuthenticationDxe\DEBUG\UserAuthenticationDxe.pdb
PROGRESS CODE: V03040002 I0
PROGRESS CODE: V03040003 I0
PDB = c:\efi\servergen2\intel\Build\EagleStreamRpPkg\DEBUG_VS2015x86\X64\EagleStreamRpPkg\Platform\Dxe\Setup\DxePlatform\DEBUG\Platform.pdb
PROGRESS CODE: V03040002 I0
Is CMOS Bad = 1
[HECI Transport-1 DXE] Send pkt: 80040007
00: FF 02 00 00
[HECI Transport-1 DXE] Got pkt: 80140007
00: FF 82 00 00 00 00 06 18 - 00 01 03 00 00 00 06 18
10: 00 01 03 00
[HECI Transport-1 DXE] Send pkt: 80140008
00: 00 00 05 00 1F 00 00 00 - 00 00 00 00 00 00 00 00
10: 00 00 00 00
[HECI Transport-1 DXE] Got pkt: 805E0008
00: 00 00 05 00 1F 00 00 00 - 00 00 00 00 4A 00 00 00
10: 00 00 00 00 18 18 06 00 - 00 06 00 01 06 00 02 06
20: 00 03 56 00 04 56 00 05 - 56 00 06 56 00 07 5C 00
30: 08 7C 00 09 55 00 0A 55 - 00 0B 5B 00 0C 55 00 0D
40: 51 00 0E 51 00 0F 47 00 - 10 07 00 11 47 00 12 07
50: 00 13 47 00 14 07 00 15 - 47 00 16 07 00 17
PROGRESS CODE: V03040003 I0
PDB = c:\efi\servergen2\intel\Build\EagleStreamRpPkg\DEBUG_VS2015x86\X64\ServerPlatformPkg\Platform\Dxe\SocketSetup\SocketSetup\DEBUG\SocketSetup.pdb
PROGRESS CODE: V03040002 I0
PROGRESS CODE: V03040003 I0
PROGRESS CODE: V03041001 I0
PROGRESS CODE: V03051005 I0
PROGRESS CODE: V02010000 I0
PROGRESS CODE: V02011000 I0
PROGRESS CODE: V02011000 I0
PROGRESS CODE: V02011000 I0
PROGRESS CODE: V02011000 I0
PROGRESS CODE: V02011000 I0
PROGRESS CODE: V02011000 I0
PROGRESS CODE: V02011000 I0
PROGRESS CODE: V02011000 I0
PROGRESS CODE: V02011000 I0
PROGRESS CODE: V02011000 I0
PROGRESS CODE: V02011000 I0
PROGRESS CODE: V02011000 I0
PROGRESS CODE: V02011000 I0
PROGRESS CODE: V02011000 I0
PROGRESS CODE: V02011000 I0
PROGRESS CODE: V02011000 I0
PROGRESS CODE: V02011000 I0
PROGRESS CODE: V02011000 I0
PROGRESS CODE: V02011000 I0
PROGRESS CODE: V02011000 I0
PROGRESS CODE: V02011000 I0
PROGRESS CODE: V02011000 I0
PROGRESS CODE: V02011000 I0
PROGRESS CODE: V02011000 I0
PROGRESS CODE: V02011000 I0
PROGRESS CODE: V02011000 I0
PROGRESS CODE: V02011000 I0
PROGRESS CODE: V02011000 I0
PROGRESS CODE: V02011000 I0
PROGRESS CODE: V02011000 I0
PROGRESS CODE: V02011000 I0
PROGRESS CODE: V02011000 I0
PROGRESS CODE: V02011000 I0
PROGRESS CODE: V02011000 I0
PROGRESS CODE: V02011000 I0
PROGRESS CODE: V02011000 I0
PROGRESS CODE: V02011000 I0
PROGRESS CODE: V02011000 I0
PROGRESS CODE: V02011000 I0
PROGRESS CODE: V02011000 I0
PROGRESS CODE: V02011001 I0
Calling IoatInitBootEvent IioIndex: 0
IOAT_INIT_BOOT_EVENT_START
DSA init IioIndex : 0 InstId : 0
IAX init IioIndex : 0 InstId : 0
DSA init IioIndex : 0 InstId : 1
IAX init IioIndex : 0 InstId : 1
DSA init IioIndex : 0 InstId : 2
IAX init IioIndex : 0 InstId : 2
DSA init IioIndex : 0 InstId : 3
IAX init IioIndex : 0 InstId : 3
IOAT_INIT_BOOT_EVENT_END
Calling IioDisableLinkPorts IioIndex: 0
[0] Hide devices; Phase = B
Calling IoatInitBootEvent IioIndex: 1
IOAT_INIT_BOOT_EVENT_START
DSA init IioIndex : 1 InstId : 0
IAX init IioIndex : 1 InstId : 0
DSA init IioIndex : 1 InstId : 1
IAX init IioIndex : 1 InstId : 1
DSA init IioIndex : 1 InstId : 2
IAX init IioIndex : 1 InstId : 2
DSA init IioIndex : 1 InstId : 3
IAX init IioIndex : 1 InstId : 3
IOAT_INIT_BOOT_EVENT_END
Calling IioDisableLinkPorts IioIndex: 1
[1] Hide devices; Phase = B
PROGRESS CODE: V02010004 I0
PROGRESS CODE: V02010004 I0
PROGRESS CODE: V02010004 I0
[OOBMSM] BMC: Expected VID_DID = 0x11501A03
[OOBMSM] BMC: Bus[0x2]:Dev[0x0]:Fun[0x0]
[OOBMSM] PCH-PMT: Bus[0x0]:Dev[0x14]:Fun[0x6]
[GPIO Conflict Check] Identified conflict on pad GPIO_GPP_B12 (actual: 0x3, expected: 0x9)
[GPIO Conflict Check] Identified conflict on pad GPIO_GPP_B13 (actual: 0x3, expected: 0x9)
[GPIO Conflict Check] Identified conflict on pad GPIO_GPP_B14 (actual: 0x3, expected: 0x9)
[GPIO Conflict Check] Identified conflict on pad GPIO_GPP_B15 (actual: 0x3, expected: 0x9)
[OtaDxe.c] OtaEventHandler() {
[OOB] ExecuteOobOneTouchRequest() {
[LT EXISTS register at 0xFED30010]: 0x0000000000000000
TXT Supported Bitmap 0x0000
TXT Enabled Bitmap 0x0000
[LT EMIF register at 0xFED30200]: 0x1D003000, Bit28:27 = 0x03, Bit24:22 = 0x04
[LT FTIF register at 0xFED30800]: 0x0000000000052000, Bit18:16 = 0x05
TPM Supported Bitmap 0x0002
TPM2.0 PS NV Index 0x01C10103: Not Defined, Not Written, Not Write-Protected
TPM2.0 AUX NV Index 0x01C10102: Not Defined, Not Written, Not Write-Protected
TPM2.0 PO NV Index 0x01C10106: Not Defined, Not Written, Not Write-Protected
TPM2.0 Provisioned? No
TPM2.0 Ownership Claimed? No
TPM Enabled Bitmap 0x0002, TPM Usage Bitmap 0x0004
[IA32_TME_CAPABILITY MSR 981h] = 0x000007F7 80000003
[IA32_TME_ACTIVATE MSR 982h] = 0x00000000 00000001
[IA32_TME_MTRRCAP MSR FEh] = 0x00000000 00007D0A
TME/MK-TME/TDX: Supported Bitmap 0xC000, Enabled Bitmap 0x0000
[IA32_FEATURE_CONTROL MSR 3Ah] = 0x00000000 00100004
SGX Supported Bitmap 0x1000
SGX Enabled Bitmap 0x0000
-> PFR Support Bitmap: 0x0000, PFR Enabled Bitmap: 0x0000
PFR State: 0x0000, Recovery Count: 0x00, Last Recovery Reason 0x00
Panic Event Count: 0x00, Last Panic Reason 0x00
[OOB] ExecuteOobOneTouchRequest() -> Non-Volatile Storage Supported? Yes
ME Non-Volatile Storage: Supported
EFI Non-Volatile Storage: Supported
Maximum size of OOB Non-Volatile Storage: 0x00008400 bytes
[OOB] ExecuteOobOneTouchRequest() -> Allocate Memory for NV Storage Data (Total 0x00021000 bytes): Success
[HECI Transport-1 DXE] Send pkt: 800B0023
00: 00 00 00 00 00 00 00 00 - 00 00 00
[HECI Transport-1 DXE] Got pkt: 80040023
00: 00 80 02 00
[SPS] ERROR: ME Storage Service operation status: 2
[OOB] ExecuteOobOneTouchRequest() -> Use Default Use-Case 0x01 (OOB NV Storage Data Not used)
[OOB] ExecuteOobOneTouchRequest() -> Input OOB Data to process: Size = 0x00000044 bytes
----------------------------------------------------------------------
Offset 00 01 02 03 04 05 06 07 08 09 0A 0B 0C 0D 0E 0F
----------------------------------------------------------------------
0000 24 4F 58 50 44 00 20 00 01 DB 01 FF 00 00 00 00
0010 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00
0020 02 24 00 00 80 7E F8 83 06 00 00 00 00 00 00 00
0030 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00
0040 00 00 00 00
----------------------------------------------------------------------
[OOB] ExecuteOobOneTouchRequest() -> Updated State 0x30100000, Fatal Error 0x00000000
[OOB] ExecuteOobOneTouchRequest() -> OOB Data after processing
OOB Data after processing (before updating Checksum, State): Size = 0x00000044 bytes
----------------------------------------------------------------------
Offset 00 01 02 03 04 05 06 07 08 09 0A 0B 0C 0D 0E 0F
----------------------------------------------------------------------
0000 24 4F 58 50 44 00 20 00 02 DB 81 00 03 00 02 D0
0010 02 00 00 00 00 00 03 00 04 00 00 00 00 00 00 00
0020 02 24 00 00 E8 7E F8 83 06 00 00 00 00 00 00 00
0030 00 00 00 00 00 7F 00 07 00 00 00 00 00 00 00 00
0040 00 00 00 00
----------------------------------------------------------------------
[OOB] ExecuteOobOneTouchRequest() -> Write OOB Data, if necessary
State Non-Zero OR OOB Data modified
OOB input data size <> 0 AND valid input signature: Generate OOB Output Data
[OOB] ExecuteOobOneTouchRequest() -> OOB Output Data Size = 0x00000044 bytes, State = 0x30107900
----------------------------------------------------------------------
Offset 00 01 02 03 04 05 06 07 08 09 0A 0B 0C 0D 0E 0F
----------------------------------------------------------------------
0000 50 58 4F 24 44 00 20 00 02 D4 81 00 03 00 02 D0
0010 02 00 00 79 10 30 03 00 04 00 00 00 00 00 00 00
0020 02 24 00 00 E8 7E F8 83 06 00 00 00 00 00 00 00
0030 00 00 00 00 00 7F 00 07 00 00 00 00 00 00 00 00
0040 00 00 00 00
----------------------------------------------------------------------
Write OOB Output Data ->
[HECI Transport-1 DXE] Send pkt: 804F0023
00: 01 00 00 00 00 00 00 00 - 00 00 00 50 58 4F 24 44
10: 00 20 00 02 D4 81 00 03 - 00 02 D0 02 00 00 79 10
20: 30 03 00 04 00 00 00 00 - 00 00 00 02 24 00 00 E8
30: 7E F8 83 06 00 00 00 00 - 00 00 00 00 00 00 00 00
40: 7F 00 07 00 00 00 00 00 - 00 00 00 00 00 00 00
[HECI Transport-1 DXE] Got pkt: 80040023
00: 01 80 00 00
[OOB] ExecuteOobOneTouchRequest() -> Updated State: 0x30107900, Fatal Error: 0x00000000
[OOB-SMBIOS] GenerateSmbiosStructuresOTA() { Generate OTA SMBIOS Structures
[OOB-SMBIOS] AddOemStructureOTA() { Add OEM Structure Type-168 (0xA8)
Allocate memory for OEM Structure: Success
Form OEM Structure
[OOB-SMBIOS] AddStringAndAdd2Smbios() { Add String and Add Structure to SMBIOS
[OOB-SMBIOS] Unicode2AsciizString() { Convert Unicode string to ASCIIZ String
[OOB-SMBIOS] Unicode2AsciizString() } Success, ASCIIZ String length (including NULL) = 0x0020
Add Formed Structure to other SMBIOS structures, Handle before adding 0xFFFE
Structure addition to SMBIOS: EFI Status 0x00000000, Handle after adding 0x0048 -> Success
******** Formed SMBIOS Structure Data, Length 0x50
----------------------------------------------------------------------
Offset 00 01 02 03 04 05 06 07 08 09 0A 0B 0C 0D 0E 0F
----------------------------------------------------------------------
0000 A8 2F 48 00 01 00 01 02 03 00 02 D0 02 00 04 00
0010 7E F8 83 06 00 00 00 00 00 00 00 00 00 00 00 00
0020 7F 00 07 00 00 00 00 00 00 00 00 00 00 00 00 4D
0030 65 6D 62 65 72 3A 20 4F 54 41 20 47 65 6E 65 72
0040 61 6C 20 49 6E 66 6F 72 6D 61 74 69 6F 6E 00 00
----------------------------------------------------------------------
[OOB-SMBIOS] AddStringAndAdd2Smbios() } Success, Handle of added Structure = 0x0048
[OOB-SMBIOS] AddOemStructureOTA() } Success
[OOB-SMBIOS] AddGroupAssociationStructureOTA() { Add Group Association Structure Type-14 (0x0E)
Allocate memory for Group Association Structure: Success
Form Group Association Structure
[OOB-SMBIOS] AddStringAndAdd2Smbios() { Add String and Add Structure to SMBIOS
[OOB-SMBIOS] Unicode2AsciizString() { Convert Unicode string to ASCIIZ String
[OOB-SMBIOS] Unicode2AsciizString() } Success, ASCIIZ String length (including NULL) = 0x0022
Add Formed Structure to other SMBIOS structures, Handle before adding 0xFFFE
Structure addition to SMBIOS: EFI Status 0x00000000, Handle after adding 0x0049 -> Success
******** Formed SMBIOS Structure Data, Length 0x2B
----------------------------------------------------------------------
Offset 00 01 02 03 04 05 06 07 08 09 0A 0B 0C 0D 0E 0F
----------------------------------------------------------------------
0000 0E 08 49 00 01 A8 48 00 47 72 6F 75 70 3A 20 4F
0010 6E 65 20 54 6F 75 63 68 20 41 63 74 69 76 61 74
0020 69 6F 6E 20 28 4F 54 41 29 00 00
----------------------------------------------------------------------
[OOB-SMBIOS] AddStringAndAdd2Smbios() } Success, Handle of added Structure = 0x0049
[OOB-SMBIOS] AddGroupAssociationStructureOTA() } Success
[OOB-SMBIOS] GenerateSmbiosStructuresOTA() } Success
[OOB] ExecuteOobOneTouchRequest() -> Clear, Deallocate Memory used for OOB Data
Clear Memory used for OOB Data
Deallocate Memory used for OOB Data
Clear, Deallocate Memory used for Platform Information
[OOB] ExecuteOobOneTouchRequest() -> No task to perform OR Reset not required for the performed task
[OOB] ExecuteOobOneTouchRequest() }
[OtaDxe.c] OtaEventHandler() }
Console redirection ENABLED
Console redirection ENABLED
PROGRESS CODE: V03050000 I0
NfitTableUpdateProtocol is not installed.
No Table for current platform
No Table for current platform
:INIT - BIOS_RESET_CPL: Set CPL3 on #S1 into BIOS_RESET_CPL_PCU_FUN1_REG
:PM - Successfully got ACK CPL3 on #S1
:INIT - BIOS_RESET_CPL: Set CPL4 on #S1 into BIOS_RESET_CPL_PCU_FUN1_REG
:PM - Successfully got ACK CPL4 on #S1
:INIT - BIOS_RESET_CPL: Set CPL3 on #S0 into BIOS_RESET_CPL_PCU_FUN1_REG
:PM - Successfully got ACK CPL3 on #S0
:INIT - BIOS_RESET_CPL: Set CPL4 on #S0 into BIOS_RESET_CPL_PCU_FUN1_REG
:PM - Successfully got ACK CPL4 on #S0
DXE PPM Config Complete
[HECI Transport-1 DXE] Send pkt: 80040007
00: 0A 05 00 00
[HECI Transport-1 DXE] Got pkt: 80040007
00: 0A 85 00 00
IioSecureOnEndOfDxe...
Lock the CXL.Arb-Mux secured register if there is any CXL port
Lock the CXL.Arb-Mux secured register if there is any CXL port
[IEH INIT] Init Socket:0x0
[Init Global IEH] on Skt:0x0
[Init Satallite IEH] on BitIdx:0x1
[Init Satallite IEH] S:0 B:0x0 D:0x14 F:0x4
[Init Satallite IEH] Device on BitIdx:0x3 doesn't exist
[Init Satallite IEH] Device on BitIdx:0x4 doesn't exist
[Init Satallite IEH] Device on BitIdx:0x5 doesn't exist
[Init Satallite IEH] Device on BitIdx:0x6 doesn't exist
[Init Satallite IEH] Device on BitIdx:0x7 doesn't exist
[Init Satallite IEH] Device on BitIdx:0x9 doesn't exist
[Init Satallite IEH] Device on BitIdx:0xB doesn't exist
[Init Satallite IEH] Device on BitIdx:0xC doesn't exist
[Init Satallite IEH] Device on BitIdx:0xD doesn't exist
[Init Satallite IEH] Device on BitIdx:0xE doesn't exist
[Init Satallite IEH] Device on BitIdx:0xF doesn't exist
[Init Satallite IEH] Device on BitIdx:0x10 doesn't exist
[Init Satallite IEH] Device on BitIdx:0x11 doesn't exist
[Init Satallite IEH] Device on BitIdx:0x12 doesn't exist
[Init Satallite IEH] Device on BitIdx:0x13 doesn't exist
[Init Satallite IEH] Device on BitIdx:0x17 doesn't exist
[Init Satallite IEH] Device on BitIdx:0x18 doesn't exist
[Init Satallite IEH] Device on BitIdx:0x19 doesn't exist
[Init Satallite IEH] Device on BitIdx:0x1D doesn't exist
Clear IEH Global Error Status before enabling IEH error...
[Init Satallite IEH] S:0 B:0x0 D:0x14 F:0x4 End
[Init Satallite IEH] on BitIdx:0x2
[Init Satallite IEH] S:0 B:0x6A D:0x0 F:0x4
PSF Dino PSF HCx Clear IEH Global Error Status before enabling IEH error...
[Init Satallite IEH] S:0 B:0x6A D:0x0 F:0x4 End
[Init Satallite IEH] on BitIdx:0x3
[Init Satallite IEH] S:0 B:0x0 D:0x0 F:0x4
PSF PCIE Pi5 PCIE GEN4 DMI Pi5 PCIE GEN5 IAL Pi5 (CXL) SPD I3C Bus SPD I3C Bus CXP SMBUS [Init Satallite IEH] Device on BitIdx:0x2 doesn't exist
[Init Satallite IEH] Device on BitIdx:0x3 doesn't exist
[Init Satallite IEH] Device on BitIdx:0x4 doesn't exist
[Init Satallite IEH] Device on BitIdx:0x5 doesn't exist
[Init Satallite IEH] Device on BitIdx:0x6 doesn't exist
[Init Satallite IEH] Device on BitIdx:0x7 doesn't exist
[Init Satallite IEH] Device on BitIdx:0x8 doesn't exist
[Init Satallite IEH] Device on BitIdx:0x9 doesn't exist
Clear IEH Global Error Status before enabling IEH error...
[Init Satallite IEH] S:0 B:0x0 D:0x0 F:0x4 End
[Init Satallite IEH] on BitIdx:0x4
[Init Satallite IEH] S:0 B:0x15 D:0x0 F:0x4
PSF PCIE Pi5 PCIE GEN4 DMI Pi5 PCIE GEN5 IAL Pi5 (CXL) [Init Satallite IEH] Device on BitIdx:0x2 doesn't exist
[Init Satallite IEH] Device on BitIdx:0x3 doesn't exist
[Init Satallite IEH] Device on BitIdx:0x4 doesn't exist
[Init Satallite IEH] Device on BitIdx:0x5 doesn't exist
[Init Satallite IEH] Device on BitIdx:0x6 doesn't exist
[Init Satallite IEH] Device on BitIdx:0x7 doesn't exist
[Init Satallite IEH] Device on BitIdx:0x8 doesn't exist
[Init Satallite IEH] Device on BitIdx:0x9 doesn't exist
Clear IEH Global Error Status before enabling IEH error...
[Init Satallite IEH] S:0 B:0x15 D:0x0 F:0x4 End
[Init Satallite IEH] on BitIdx:0x5
[Init Satallite IEH] S:0 B:0x6F D:0x0 F:0x4
PSF Dino PSF HCx Clear IEH Global Error Status before enabling IEH error...
[Init Satallite IEH] S:0 B:0x6F D:0x0 F:0x4 End
[Init Satallite IEH] on BitIdx:0x7
[Init Satallite IEH] S:0 B:0x59 D:0x0 F:0x4
PSF PCIE Pi5 PCIE GEN4 DMI Pi5 PCIE GEN5 IAL Pi5 (CXL) [Init Satallite IEH] Device on BitIdx:0x2 doesn't exist
[Init Satallite IEH] Device on BitIdx:0x3 doesn't exist
[Init Satallite IEH] Device on BitIdx:0x4 doesn't exist
[Init Satallite IEH] Device on BitIdx:0x5 doesn't exist
[Init Satallite IEH] Device on BitIdx:0x6 doesn't exist
[Init Satallite IEH] Device on BitIdx:0x7 doesn't exist
[Init Satallite IEH] Device on BitIdx:0x8 doesn't exist
[Init Satallite IEH] Device on BitIdx:0x9 doesn't exist
Clear IEH Global Error Status before enabling IEH error...
[Init Satallite IEH] S:0 B:0x59 D:0x0 F:0x4 End
[Init Satallite IEH] on BitIdx:0x8
[Init Satallite IEH] S:0 B:0x74 D:0x0 F:0x4
PSF Dino PSF HCx Clear IEH Global Error Status before enabling IEH error...
[Init Satallite IEH] S:0 B:0x74 D:0x0 F:0x4 End
[Init Satallite IEH] on BitIdx:0x9
[Init Satallite IEH] S:0 B:0x37 D:0x0 F:0x4
PSF PCIE Pi5 PCIE GEN4 DMI Pi5 PCIE GEN5 IAL Pi5 (CXL) [Init Satallite IEH] Device on BitIdx:0x2 doesn't exist
[Init Satallite IEH] Device on BitIdx:0x3 doesn't exist
[Init Satallite IEH] Device on BitIdx:0x4 doesn't exist
[Init Satallite IEH] Device on BitIdx:0x5 doesn't exist
[Init Satallite IEH] Device on BitIdx:0x6 doesn't exist
[Init Satallite IEH] Device on BitIdx:0x7 doesn't exist
[Init Satallite IEH] Device on BitIdx:0x8 doesn't exist
[Init Satallite IEH] Device on BitIdx:0x9 doesn't exist
Clear IEH Global Error Status before enabling IEH error...
[Init Satallite IEH] S:0 B:0x37 D:0x0 F:0x4 End
[Init Satallite IEH] on BitIdx:0xA
[Init Satallite IEH] S:0 B:0x26 D:0x0 F:0x4
PSF PCIE Pi5 PCIE GEN4 DMI Pi5 PCIE GEN5 IAL Pi5 (CXL) [Init Satallite IEH] Device on BitIdx:0x2 doesn't exist
[Init Satallite IEH] Device on BitIdx:0x3 doesn't exist
[Init Satallite IEH] Device on BitIdx:0x4 doesn't exist
[Init Satallite IEH] Device on BitIdx:0x5 doesn't exist
[Init Satallite IEH] Device on BitIdx:0x6 doesn't exist
[Init Satallite IEH] Device on BitIdx:0x7 doesn't exist
[Init Satallite IEH] Device on BitIdx:0x8 doesn't exist
[Init Satallite IEH] Device on BitIdx:0x9 doesn't exist
Clear IEH Global Error Status before enabling IEH error...
[Init Satallite IEH] S:0 B:0x26 D:0x0 F:0x4 End
[Init Satallite IEH] on BitIdx:0xB
[Init Satallite IEH] S:0 B:0x79 D:0x0 F:0x4
PSF Dino PSF HCx Clear IEH Global Error Status before enabling IEH error...
[Init Satallite IEH] S:0 B:0x79 D:0x0 F:0x4 End
[Init Satallite IEH] on BitIdx:0xD
[Init Satallite IEH] S:0 B:0x48 D:0x0 F:0x4
PSF PCIE Pi5 PCIE GEN4 DMI Pi5 PCIE GEN5 IAL Pi5 (CXL) [Init Satallite IEH] Device on BitIdx:0x2 doesn't exist
[Init Satallite IEH] Device on BitIdx:0x3 doesn't exist
[Init Satallite IEH] Device on BitIdx:0x4 doesn't exist
[Init Satallite IEH] Device on BitIdx:0x5 doesn't exist
[Init Satallite IEH] Device on BitIdx:0x6 doesn't exist
[Init Satallite IEH] Device on BitIdx:0x7 doesn't exist
[Init Satallite IEH] Device on BitIdx:0x8 doesn't exist
[Init Satallite IEH] Device on BitIdx:0x9 doesn't exist
Clear IEH Global Error Status before enabling IEH error...
[Init Satallite IEH] S:0 B:0x48 D:0x0 F:0x4 End
Clear IEH Global Error Status before enabling IEH errors
[IEH INIT] Init Socket:0x0 End
[IEH INIT] Init Socket:0x1
[Init Global IEH] on Skt:0x1
[Init Satallite IEH] on BitIdx:0x2
[Init Satallite IEH] S:1 B:0xE7 D:0x0 F:0x4
PSF Dino PSF HCx Clear IEH Global Error Status before enabling IEH error...
[Init Satallite IEH] S:1 B:0xE7 D:0x0 F:0x4 End
[Init Satallite IEH] on BitIdx:0x3
[Init Satallite IEH] S:1 B:0x80 D:0x0 F:0x4
PSF PCIE Pi5 PCIE GEN4 DMI Pi5 PCIE GEN5 IAL Pi5 (CXL) SPD I3C Bus SPD I3C Bus CXP SMBUS [Init Satallite IEH] Device on BitIdx:0x2 doesn't exist
[Init Satallite IEH] Device on BitIdx:0x3 doesn't exist
[Init Satallite IEH] Device on BitIdx:0x4 doesn't exist
[Init Satallite IEH] Device on BitIdx:0x5 doesn't exist
[Init Satallite IEH] Device on BitIdx:0x6 doesn't exist
[Init Satallite IEH] Device on BitIdx:0x7 doesn't exist
[Init Satallite IEH] Device on BitIdx:0x8 doesn't exist
[Init Satallite IEH] Device on BitIdx:0x9 doesn't exist
[Init Satallite IEH] Device on BitIdx:0xA doesn't exist
Clear IEH Global Error Status before enabling IEH error...
[Init Satallite IEH] S:1 B:0x80 D:0x0 F:0x4 End
[Init Satallite IEH] on BitIdx:0x4
[Init Satallite IEH] S:1 B:0x97 D:0x0 F:0x4
PSF PCIE Pi5 PCIE GEN4 DMI Pi5 PCIE GEN5 IAL Pi5 (CXL) [Init Satallite IEH] Device on BitIdx:0x2 doesn't exist
[Init Satallite IEH] Device on BitIdx:0x3 doesn't exist
[Init Satallite IEH] Device on BitIdx:0x4 doesn't exist
[Init Satallite IEH] Device on BitIdx:0x5 doesn't exist
[Init Satallite IEH] Device on BitIdx:0x6 doesn't exist
[Init Satallite IEH] Device on BitIdx:0x7 doesn't exist
[Init Satallite IEH] Device on BitIdx:0x8 doesn't exist
[Init Satallite IEH] Device on BitIdx:0x9 doesn't exist
Clear IEH Global Error Status before enabling IEH error...
[Init Satallite IEH] S:1 B:0x97 D:0x0 F:0x4 End
[Init Satallite IEH] on BitIdx:0x5
[Init Satallite IEH] S:1 B:0xEC D:0x0 F:0x4
PSF Dino PSF HCx Clear IEH Global Error Status before enabling IEH error...
[Init Satallite IEH] S:1 B:0xEC D:0x0 F:0x4 End
[Init Satallite IEH] on BitIdx:0x7
[Init Satallite IEH] S:1 B:0xD7 D:0x0 F:0x4
PSF PCIE Pi5 PCIE GEN4 DMI Pi5 PCIE GEN5 IAL Pi5 (CXL) [Init Satallite IEH] Device on BitIdx:0x2 doesn't exist
[Init Satallite IEH] Device on BitIdx:0x3 doesn't exist
[Init Satallite IEH] Device on BitIdx:0x4 doesn't exist
[Init Satallite IEH] Device on BitIdx:0x5 doesn't exist
[Init Satallite IEH] Device on BitIdx:0x6 doesn't exist
[Init Satallite IEH] Device on BitIdx:0x7 doesn't exist
[Init Satallite IEH] Device on BitIdx:0x8 doesn't exist
[Init Satallite IEH] Device on BitIdx:0x9 doesn't exist
Clear IEH Global Error Status before enabling IEH error...
[Init Satallite IEH] S:1 B:0xD7 D:0x0 F:0x4 End
[Init Satallite IEH] on BitIdx:0x8
[Init Satallite IEH] S:1 B:0xF1 D:0x0 F:0x4
PSF Dino PSF HCx Clear IEH Global Error Status before enabling IEH error...
[Init Satallite IEH] S:1 B:0xF1 D:0x0 F:0x4 End
[Init Satallite IEH] on BitIdx:0x9
[Init Satallite IEH] S:1 B:0xB7 D:0x0 F:0x4
PSF PCIE Pi5 PCIE GEN4 DMI Pi5 PCIE GEN5 IAL Pi5 (CXL) [Init Satallite IEH] Device on BitIdx:0x2 doesn't exist
[Init Satallite IEH] Device on BitIdx:0x3 doesn't exist
[Init Satallite IEH] Device on BitIdx:0x4 doesn't exist
[Init Satallite IEH] Device on BitIdx:0x5 doesn't exist
[Init Satallite IEH] Device on BitIdx:0x6 doesn't exist
[Init Satallite IEH] Device on BitIdx:0x7 doesn't exist
[Init Satallite IEH] Device on BitIdx:0x8 doesn't exist
[Init Satallite IEH] Device on BitIdx:0x9 doesn't exist
Clear IEH Global Error Status before enabling IEH error...
[Init Satallite IEH] S:1 B:0xB7 D:0x0 F:0x4 End
[Init Satallite IEH] on BitIdx:0xA
[Init Satallite IEH] S:1 B:0xA7 D:0x0 F:0x4
PSF PCIE Pi5 PCIE GEN4 DMI Pi5 PCIE GEN5 IAL Pi5 (CXL) [Init Satallite IEH] Device on BitIdx:0x2 doesn't exist
[Init Satallite IEH] Device on BitIdx:0x3 doesn't exist
[Init Satallite IEH] Device on BitIdx:0x4 doesn't exist
[Init Satallite IEH] Device on BitIdx:0x5 doesn't exist
[Init Satallite IEH] Device on BitIdx:0x6 doesn't exist
[Init Satallite IEH] Device on BitIdx:0x7 doesn't exist
[Init Satallite IEH] Device on BitIdx:0x8 doesn't exist
[Init Satallite IEH] Device on BitIdx:0x9 doesn't exist
Clear IEH Global Error Status before enabling IEH error...
[Init Satallite IEH] S:1 B:0xA7 D:0x0 F:0x4 End
[Init Satallite IEH] on BitIdx:0xB
[Init Satallite IEH] S:1 B:0xF6 D:0x0 F:0x4
PSF Dino PSF HCx Clear IEH Global Error Status before enabling IEH error...
[Init Satallite IEH] S:1 B:0xF6 D:0x0 F:0x4 End
[Init Satallite IEH] on BitIdx:0xD
[Init Satallite IEH] S:1 B:0xC7 D:0x0 F:0x4
PSF PCIE Pi5 PCIE GEN4 DMI Pi5 PCIE GEN5 IAL Pi5 (CXL) [Init Satallite IEH] Device on BitIdx:0x2 doesn't exist
[Init Satallite IEH] Device on BitIdx:0x3 doesn't exist
[Init Satallite IEH] Device on BitIdx:0x4 doesn't exist
[Init Satallite IEH] Device on BitIdx:0x5 doesn't exist
[Init Satallite IEH] Device on BitIdx:0x6 doesn't exist
[Init Satallite IEH] Device on BitIdx:0x7 doesn't exist
[Init Satallite IEH] Device on BitIdx:0x8 doesn't exist
[Init Satallite IEH] Device on BitIdx:0x9 doesn't exist
Clear IEH Global Error Status before enabling IEH error...
[Init Satallite IEH] S:1 B:0xC7 D:0x0 F:0x4 End
Clear IEH Global Error Status before enabling IEH errors
[IEH INIT] Init Socket:0x1 End
AddMicrocodeSmbiosTable: No valid Utility installed.
AddMicrocodeSmbiosTable: MicrocodeStagingRegion is 1.
AddMicrocodeSmbiosTable: UtilityStagingRegion is FFFF.
All AfterEndOfDxeEvent callbacks have returned successfully
PDB = c:\efi\servergen2\intel\Build\EagleStreamRpPkg\DEBUG_VS2015x86\X64\MdeModulePkg\Universal\Acpi\BootScriptExecutorDxe\BootScriptExecutorDxe\DEBUG\BootScriptExecutorDxe.pdb
[SIO] Current system SIO exist bit:10
IioSecureOnReadyToLock...
MSR_BIOS_DONE[0x151] 0x00000000 -> 0x00000003
PROGRESS CODE: V02010000 I0
PROGRESS CODE: V02010004 I0
PROGRESS CODE: V02010004 I0
PROGRESS CODE: V02010004 I0
[SGX] SgxAfterPlatformLocksCallback entry
[SGX] PrepareMcheckBiosParamInfo BEGIN
PopulateBiosParamInfoCreationPolicy: BiosParamInfoCreationPolicy = 0x0
Error: BiosParamInfoCreationPolicy is not initialized
[SGX] PrepareMcheckBiosParamInfo END
[SGX] UpdateRegistrationPackageInfo BEGIN
[SGX] UpdateRegistrationPackageInfo END
[SGX] StatusVariable: update ErrorCode from BIOS: 19
ExposeAllScenariosSgxRegistrationUefiVariables Enter
Expose variable [SgxRegistrationConfiguration]:
SetVariable: Success
ExposeToOsRuntime: 1
ReadOnlyOsRuntime: 0
ExposeAllScenariosSgxRegistrationUefiVariables: SgxRegistrationConfig->SgxRegServerInfo.Url = https://sbx.api.trustedservices.intel.com:443
RegistrationRequestType 0
Expose variable [SgxRegistrationServerRequest]:
SetVariable: Success
ExposeToOsRuntime: 1
ReadOnlyOsRuntime: 1
SgxRegistrationPackageInfo SHA256 sum:
[BB] [EC] [C9] [F0] [69] [34] [92] [3B] [63] [74] [71] [F4] [F7] [75] [C4] [BA] [B1] [BD] [29] [53] [56] [F9] [A1] [DE] [B7] [06] [65] [3B] [6D] [FF] [F7] [E7]
Expose variable [SgxRegistrationPackageInfo]:
SetVariable: Success
ExposeToOsRuntime: 0
ReadOnlyOsRuntime: 0
[SGX-DEBUG] Late PrintByteArrays SgxRegistrationStatus:
[01] [00] [03] [00] [02] [00] [19]
Expose variable [SgxRegistrationStatus]:
SetVariable: Success
ExposeToOsRuntime: 1
ReadOnlyOsRuntime: 0
Success to expose Registration Variables, exiting...
[SGX] SgxAfterPlatformLocksCallback exit: success
[SGX] DeallocateMcheckBiosParamInfo BEGIN
Verbose: BiosParamInfo already deallocated
[SGX] DeallocateMcheckBiosParamInfo END
PROGRESS CODE: V0300850B I0
PROGRESS CODE: V01050004 I0
PROGRESS CODE: V01050003 I0
PROGRESS CODE: V01050001 I0
PROGRESS CODE: V01040001 I0
PROGRESS CODE: V01050001 I0
PROGRESS CODE: V02020000 I0
PROGRESS CODE: V02020004 I0
PROGRESS CODE: V02020003 I0
TranslateBmpToGopBlt: BmpHeader->Char fields incorrect
PROGRESS CODE: V02020000 I0
PROGRESS CODE: V02020006 I0
UsbEnumerateNewDev: No device present at port 5
PROGRESS CODE: V02020006 I0
PROGRESS CODE: V02010000 I0
PROGRESS CODE: V02010004 I0
PROGRESS CODE: V02010004 I0
PROGRESS CODE: V02010004 I0
PROGRESS CODE: V02020000 I0
PROGRESS CODE: V02010004 I0
PROGRESS CODE: V02010004 I0
PROGRESS CODE: V02081000 I0
PROGRESS CODE: V02081003 I0
PROGRESS CODE: V01070004 I0
PROGRESS CODE: V02080000 I0
PROGRESS CODE: V02080003 I0
PROGRESS CODE: V02080004 I0
PROGRESS CODE: V02070000 I0
PROGRESS CODE: V02070003 I0
PROGRESS CODE: V01050004 I0
PROGRESS CODE: V01050004 I0
PROGRESS CODE: V01050003 I0
PROGRESS CODE: V01050001 I0
PROGRESS CODE: V01040001 I0
PROGRESS CODE: V01050001 I0
PROGRESS CODE: V02010000 I0
PROGRESS CODE: V02010004 I0
PROGRESS CODE: V02010004 I0
PROGRESS CODE: V02010004 I0
PROGRESS CODE: V02010000 I0
PROGRESS CODE: V02010004 I0
PROGRESS CODE: V02010004 I0
PROGRESS CODE: V02010004 I0
PROGRESS CODE: V02010000 I0
PROGRESS CODE: V02010004 I0
PROGRESS CODE: V02010004 I0
PROGRESS CODE: V02010004 I0
PROGRESS CODE: V02010000 I0
PROGRESS CODE: V02010004 I0
PROGRESS CODE: V02010004 I0
PROGRESS CODE: V02010004 I0
PROGRESS CODE: V02010000 I0
PROGRESS CODE: V02010004 I0
PROGRESS CODE: V02010004 I0
PROGRESS CODE: V02010004 I0
PROGRESS CODE: V02010000 I0
PROGRESS CODE: V02010004 I0
PROGRESS CODE: V02010004 I0
PROGRESS CODE: V02010004 I0
PROGRESS CODE: V02010000 I0
PROGRESS CODE: V02010004 I0
PROGRESS CODE: V02010004 I0
PROGRESS CODE: V02010004 I0
PROGRESS CODE: V02010000 I0
PROGRESS CODE: V02010004 I0
PROGRESS CODE: V02010004 I0
PROGRESS CODE: V02010004 I0
PROGRESS CODE: V02010000 I0
PROGRESS CODE: V02010004 I0
PROGRESS CODE: V02010004 I0
PROGRESS CODE: V02010004 I0
PROGRESS CODE: V02010000 I0
PROGRESS CODE: V02010004 I0
PROGRESS CODE: V02010004 I0
PROGRESS CODE: V02010004 I0
PROGRESS CODE: V02010000 I0
PROGRESS CODE: V02010004 I0
PROGRESS CODE: V02010004 I0
PROGRESS CODE: V02010004 I0
PROGRESS CODE: V02010000 I0
PROGRESS CODE: V02010004 I0
PROGRESS CODE: V02010004 I0
PROGRESS CODE: V02010004 I0
PROGRESS CODE: V02010000 I0
PROGRESS CODE: V02010004 I0
PROGRESS CODE: V02010004 I0
PROGRESS CODE: V02010004 I0
PROGRESS CODE: V02010000 I0
PROGRESS CODE: V02010004 I0
PROGRESS CODE: V02010004 I0
PROGRESS CODE: V02010004 I0
PROGRESS CODE: V02010000 I0
PROGRESS CODE: V02010004 I0
PROGRESS CODE: V02010004 I0
PROGRESS CODE: V02010004 I0
PROGRESS CODE: V02010000 I0
PROGRESS CODE: V02010004 I0
PROGRESS CODE: V02010004 I0
PROGRESS CODE: V02010004 I0
PROGRESS CODE: V02010000 I0
PROGRESS CODE: V02010004 I0
PROGRESS CODE: V02010004 I0
PROGRESS CODE: V02010004 I0
PROGRESS CODE: V02010000 I0
PROGRESS CODE: V02010004 I0
PROGRESS CODE: V02010004 I0
PROGRESS CODE: V02010004 I0
PROGRESS CODE: V02010000 I0
PROGRESS CODE: V02010004 I0
PROGRESS CODE: V02010004 I0
PROGRESS CODE: V02010004 I0
PROGRESS CODE: V02020000 I0
PROGRESS CODE: V02080000 I0
PROGRESS CODE: V02080003 I0
PROGRESS CODE: V02070000 I0
PROGRESS CODE: V02070003 I0
PROGRESS CODE: V01050004 I0
PROGRESS CODE: V01050004 I0
PROGRESS CODE: V01050004 I0
PROGRESS CODE: V01050004 I0
PROGRESS CODE: V01050004 I0
PROGRESS CODE: V01050004 I0
PROGRESS CODE: V01050004 I0
PDB = c:\efi\servergen2\intel\Build\EagleStreamRpPkg\DEBUG_VS2015x86\X64\ServerPlatformPkg\Features\Me\MeSps\Sps\PtuLoader\PtuLoader\DEBUG\PtuLoader.pdb
PROGRESS CODE: V03040002 I0
PROGRESS CODE: V03040003 I0
PDB = c:\efi\servergen2\intel\Build\EagleStreamRpPkg\DEBUG_VS2015x86\X64\ServerPlatformPkg\Features\Me\MeSps\Sps\Acpi\SpsAcpiHooks\DEBUG\SpsAcpiHooks.pdb
PROGRESS CODE: V03040002 I0
PROGRESS CODE: V03040003 I0
PROGRESS CODE: V02010000 I0
PROGRESS CODE: V02010004 I0
PROGRESS CODE: V02010004 I0
PROGRESS CODE: V02010004 I0
PROGRESS CODE: V02020000 I0
PROGRESS CODE: V02080000 I0
PROGRESS CODE: V02080003 I0
PROGRESS CODE: V02070000 I0
PROGRESS CODE: V02070003 I0
PROGRESS CODE: V01050004 I0
PROGRESS CODE: V01050004 I0
PROGRESS CODE: V02010000 I0
PROGRESS CODE: V02010004 I0
PROGRESS CODE: V02010004 I0
PROGRESS CODE: V02010004 I0
PROGRESS CODE: V02010000 I0
PROGRESS CODE: V02010004 I0
PROGRESS CODE: V02010004 I0
PROGRESS CODE: V02010004 I0
PROGRESS CODE: V02010000 I0
PROGRESS CODE: V02010004 I0
PROGRESS CODE: V02010004 I0
PROGRESS CODE: V02010004 I0
PROGRESS CODE: V02010000 I0
PROGRESS CODE: V02010004 I0
PROGRESS CODE: V02010004 I0
PROGRESS CODE: V02010004 I0
PROGRESS CODE: V02010000 I0
PROGRESS CODE: V02010004 I0
PROGRESS CODE: V02010004 I0
PROGRESS CODE: V02010004 I0
PROGRESS CODE: V02010000 I0
PROGRESS CODE: V02010004 I0
PROGRESS CODE: V02010004 I0
PROGRESS CODE: V02010004 I0
PROGRESS CODE: V02010000 I0
PROGRESS CODE: V02010004 I0
PROGRESS CODE: V02010004 I0
PROGRESS CODE: V02010004 I0
PROGRESS CODE: V02010000 I0
PROGRESS CODE: V02010004 I0
PROGRESS CODE: V02010004 I0
PROGRESS CODE: V02010004 I0
PROGRESS CODE: V02010000 I0
PROGRESS CODE: V02010004 I0
PROGRESS CODE: V02010004 I0
PROGRESS CODE: V02010004 I0
PROGRESS CODE: V02010000 I0
PROGRESS CODE: V02010004 I0
PROGRESS CODE: V02010004 I0
PROGRESS CODE: V02010004 I0
PROGRESS CODE: V02010000 I0
PROGRESS CODE: V02010004 I0
PROGRESS CODE: V02010004 I0
PROGRESS CODE: V02010004 I0
PROGRESS CODE: V02010000 I0
PROGRESS CODE: V02010004 I0
PROGRESS CODE: V02010004 I0
PROGRESS CODE: V02010004 I0
PROGRESS CODE: V02010000 I0
PROGRESS CODE: V02010004 I0
PROGRESS CODE: V02010004 I0
PROGRESS CODE: V02010004 I0
PROGRESS CODE: V02010000 I0
PROGRESS CODE: V02010004 I0
PROGRESS CODE: V02010004 I0
PROGRESS CODE: V02010004 I0
PROGRESS CODE: V02010000 I0
PROGRESS CODE: V02010004 I0
PROGRESS CODE: V02010004 I0
PROGRESS CODE: V02010004 I0
PROGRESS CODE: V02010000 I0
PROGRESS CODE: V02010004 I0
PROGRESS CODE: V02010004 I0
PROGRESS CODE: V02010004 I0
PROGRESS CODE: V02010000 I0
PROGRESS CODE: V02010004 I0
PROGRESS CODE: V02010004 I0
PROGRESS CODE: V02010004 I0
PROGRESS CODE: V02010000 I0
PROGRESS CODE: V02010004 I0
PROGRESS CODE: V02010004 I0
PROGRESS CODE: V02010004 I0
PROGRESS CODE: V02010000 I0
PROGRESS CODE: V02010004 I0
PROGRESS CODE: V02010004 I0
PROGRESS CODE: V02010004 I0
PROGRESS CODE: V02020000 I0
PROGRESS CODE: V02080000 I0
PROGRESS CODE: V02080003 I0
PROGRESS CODE: V02070000 I0
PROGRESS CODE: V02070003 I0
PROGRESS CODE: V01050004 I0
PROGRESS CODE: V01050004 I0
PROGRESS CODE: V01050004 I0
PROGRESS CODE: V01050004 I0
PROGRESS CODE: V01050004 I0
PROGRESS CODE: V01050004 I0
PROGRESS CODE: V01050004 I0
PROGRESS CODE: V01050004 I0
PROGRESS CODE: V02020000 I0
Press [Enter] to directly boot.
Press [F2] to enter setup and select boot options.
Press [F7] to show boot menu options.
Copyright (c) 2006-2022, Intel Corporation.
S0 S3M_S3MFW_CFR_SVN_N0_S3M_TREG_REG : 00000000
S0 S3M_S3MFW_REVID_N0_S3M_TREG_REG : 00000000
S0 S3M_S3MFW_CFR_SVN_N1_S3M_TREG_REG : 00010001
S0 S3M_S3MFW_REVID_N1_S3M_TREG_REG : 0000001E
S0 S3M_PUCODE_CFR_SVN_N0_S3M_TREG_REG: 00000000
S0 S3M_PUCODE_REVID_N0_S3M_TREG_REG : 00000000
S0 S3M_PUCODE_CFR_SVN_N1_S3M_TREG_REG: 00010001
S0 S3M_PUCODE_REVID_N1_S3M_TREG_REG : 130000C0
S1 S3M_S3MFW_CFR_SVN_N0_S3M_TREG_REG : 00000000
S1 S3M_S3MFW_REVID_N0_S3M_TREG_REG : 00000000
S1 S3M_S3MFW_CFR_SVN_N1_S3M_TREG_REG : 00010001
S1 S3M_S3MFW_REVID_N1_S3M_TREG_REG : 0000001E
S1 S3M_PUCODE_CFR_SVN_N0_S3M_TREG_REG: 00000000
S1 S3M_PUCODE_REVID_N0_S3M_TREG_REG : 00000000
S1 S3M_PUCODE_CFR_SVN_N1_S3M_TREG_REG: 00010001
S1 S3M_PUCODE_REVID_N1_S3M_TREG_REG : 130000C0
SocketIioConfigPtr->IioHcxType 0.0= 0
SocketIioConfigPtr->IioHcxType 0.1= 0
SocketIioConfigPtr->IioHcxType 0.2= 0
SocketIioConfigPtr->IioHcxType 0.3= 0
SocketIioConfigPtr->IioHcxType 0.4= 0
SocketIioConfigPtr->IioHcxType 0.5= 0
SocketIioConfigPtr->IioHcxType 0.6= 0
SocketIioConfigPtr->IioHcxType 0.7= 0
SocketIioConfigPtr->IioHcxType 0.8= 0
SocketIioConfigPtr->IioHcxType 0.9= 0
SocketIioConfigPtr->IioHcxType 0.A= 0
SocketIioConfigPtr->IioHcxType 0.B= 0
SocketIioConfigPtr->IioHcxType 1.0= 0
SocketIioConfigPtr->IioHcxType 1.1= 0
SocketIioConfigPtr->IioHcxType 1.2= 0
SocketIioConfigPtr->IioHcxType 1.3= 0
SocketIioConfigPtr->IioHcxType 1.4= 0
SocketIioConfigPtr->IioHcxType 1.5= 0
SocketIioConfigPtr->IioHcxType 1.6= 0
SocketIioConfigPtr->IioHcxType 1.7= 0
SocketIioConfigPtr->IioHcxType 1.8= 0
SocketIioConfigPtr->IioHcxType 1.9= 0
SocketIioConfigPtr->IioHcxType 1.A= 0
SocketIioConfigPtr->IioHcxType 1.B= 0
SocketIioConfigPtr->IioHcxType 2.0= 0
SocketIioConfigPtr->IioHcxType 2.1= 0
SocketIioConfigPtr->IioHcxType 2.2= 0
SocketIioConfigPtr->IioHcxType 2.3= 0
SocketIioConfigPtr->IioHcxType 2.4= 0
SocketIioConfigPtr->IioHcxType 2.5= 0
SocketIioConfigPtr->IioHcxType 2.6= 0
SocketIioConfigPtr->IioHcxType 2.7= 0
SocketIioConfigPtr->IioHcxType 2.8= 0
SocketIioConfigPtr->IioHcxType 2.9= 0
SocketIioConfigPtr->IioHcxType 2.A= 0
SocketIioConfigPtr->IioHcxType 2.B= 0
SocketIioConfigPtr->IioHcxType 3.0= 0
SocketIioConfigPtr->IioHcxType 3.1= 0
SocketIioConfigPtr->IioHcxType 3.2= 0
SocketIioConfigPtr->IioHcxType 3.3= 0
SocketIioConfigPtr->IioHcxType 3.4= 0
SocketIioConfigPtr->IioHcxType 3.5= 0
SocketIioConfigPtr->IioHcxType 3.6= 0
SocketIioConfigPtr->IioHcxType 3.7= 0
SocketIioConfigPtr->IioHcxType 3.8= 0
SocketIioConfigPtr->IioHcxType 3.9= 0
SocketIioConfigPtr->IioHcxType 3.A= 0
SocketIioConfigPtr->IioHcxType 3.B= 0
PROGRESS CODE: V03051007 I0
DebugModeIndicator = 1
InitData -> Protocol not found
CheckpointSend 0x09? No
-> Ready To Boot: Pause Resume Complete = 0x00 0x00 0x00
[HECI Transport-1 DXE] Send pkt: 80040007
00: FF 0C 00 00
[HECI Transport-1 DXE] Got pkt: 80080007
00: FF 8C 00 00 00 00 00 00
IioSecureOnOnReadyToBoot...
IOAT_INIT_READY_TO_BOOT_START
IOAT_INIT_READY_TO_BOOT_END
IOAT_INIT_READY_TO_BOOT_START
IOAT_INIT_READY_TO_BOOT_END
SmmInstallProtocolInterface: 6E057ECF-FA99-4F39-95BC-59F9921D17E4 0
[HECI Transport-1 DXE] Send pkt: 80040007
00: FF 02 00 00
[HECI Transport-1 DXE] Got pkt: 80140007
00: FF 82 00 00 00 00 06 18 - 00 01 03 00 00 00 06 18
10: 00 01 03 00
TPM Location configured (expected values: dTPM = 0x5 = 0x5
Value at TPM Base Address (0xFED40000) = 0xA1
HierarchyChangeAuth: Response Code error! 0x000009A2
PROGRESS CODE: V03051001 I0
PROGRESS CODE: V03058000 I0
PDB = bootmgfw.pdb
PROGRESS CODE: V03058001 I0
Windows Boot Manager Choose an operating system to start, or press TAB to select a tool: (Use the arrow keys to highlight your choice, then press ENTER.) Windows Server To specify an advanced option for this choice, press F8. Seconds until the highlighted choice will be started automatically: Tools: Windows Memory Diagnostic ENTER=Choose TAB=Menu ESC=Cancel Windows Server> To specify an advanced option for this choice, press F8. 5 PROGRESS CODE: V01040001 I0
PROGRESS CODE: V01050001 I0
PROGRESS CODE: V01010001 I0
PROGRESS CODE: V01011000 I0
PDB = bootmgfw.pdb
PROGRESS CODE: V03058000 I0
PDB = c:\efi\servergen2\intel\Build\EagleStreamRpPkg\DEBUG_VS2015x86\X64\ServerPlatformPkg\Applications\UiApp\UiApp\DEBUG\UiApp.pdb
PROGRESS CODE: V03058001 I0
PROGRESS CODE: V03050007 I0
[ME] MeOnEnterSetup() called
[HECI] Set MeType in MeOnEnterSetup (MeType is ME_TYPE_SPS)
[HECI Transport-1 DXE] Send pkt: 804D0007
00: 0A 02 00 00 2F 68 6F 6D - 65 2F 68 6F 74 68 61 6D
10: 2F 64 62 67 5F 64 61 6D - 5F 72 65 71 00 00 00 00
20: 00 00 00 00 00 00 00 00 - 00 00 00 00 00 00 00 00
30: 00 00 00 00 00 00 00 00 - 00 00 00 00 00 00 00 00
40: 00 00 00 00 00 00 00 00 - 01 00 00 00 00
[HECI Transport-1 DXE] Got pkt: 80090007
00: 0A 82 00 00 01 00 00 00 - 01
PROGRESS CODE: V03050006 I0
EAGLESTREAMGenuine Intel(R) CPU 0000%@1.70 GHzEGSDCRB1.ZHI.0091.D15.2211010825262144 MB RAMCopyright (c) 2006-2022, Intel Corporation >EDKII Menu >Boot Manager Menu >Boot Maintenance Manager Continue Reset ^v=Move Highlight <Enter>=Select Entry This selection will take you to the EDKII_MENU >EDKII Menu >Boot Manager Menu >Boot Maintenance Manager Continue Reset ^v=Move Highlight <Enter>=Select Entry This selection will take you to the EDKII_MENU This selection will take you to the EDKII_MENU This selection will take you to the EDKII_MENU This selection will take you to the EDKII_MENU This selection will take you to the EDKII_MENU >EDKII Menu >Boot Manager Menu >Boot Maintenance Manager Continue Reset ^v=Move Highlight <Enter>=Select Entry This selection will take you to the EDKII_MENU This selection will take you to the EDKII_MENU This selection will take you to the EDKII_MENU This selection will take you to the EDKII_MENU This selection will take you to the EDKII_MENU >EDKII Menu >Boot Manager Menu >Boot Maintenance Manager Continue Reset ^v=Move Highlight <Enter>=Select Entry This selection will take you to the EDKII_MENU This selection will take you to the EDKII_MENU This selection will take you to the EDKII_MENU This selection will take you to the EDKII_MENU This selection will take you to the EDKII_MENU >EDKII Menu >Boot Manager Menu >Boot Maintenance Manager Continue Reset ^v=Move Highlight <Enter>=Select Entry This selection will take you to the EDKII_MENU This selection will take you to the EDKII_MENU This selection will take you to the EDKII_MENU This selection will take you to the EDKII_MENU This selection will take you to the EDKII_MENU >EDKII Menu >Boot Manager Menu >Boot Maintenance Manager Continue Reset ^v=Move Highlight <Enter>=Select Entry This selection will take you to the EDKII_MENU This selection will take you to the EDKII_MENU This selection will take you to the EDKII_MENU This selection will take you to the EDKII_MENU This selection will take you to the EDKII_MENU >EDKII Menu >Boot Manager Menu >Boot Maintenance Manager Continue Reset ^v=Move Highlight <Enter>=Select Entry This selection will take you to the EDKII_MENU This selection will take you to the EDKII_MENU This selection will take you to the EDKII_MENU This selection will take you to the EDKII_MENU This selection will take you to the EDKII_MENU >EDKII Menu >Boot Manager Menu >Boot Maintenance Manager Continue Reset ^v=Move Highlight <Enter>=Select Entry This selection will take you to the EDKII_MENU This selection will take you to the EDKII_MENU This selection will take you to the EDKII_MENU This selection will take you to the EDKII_MENU This selection will take you to the EDKII_MENU >EDKII Menu >Boot Manager Menu >Boot Maintenance Manager Continue Reset ^v=Move Highlight <Enter>=Select Entry This selection will take you to the EDKII_MENU This selection will take you to the EDKII_MENU This selection will take you to the EDKII_MENU This selection will take you to the EDKII_MENU This selection will take you to the EDKII_MENU >EDKII Menu >Boot Manager Menu >Boot Maintenance Manager Continue Reset ^v=Move Highlight <Enter>=Select Entry This selection will take you to the EDKII_MENU This selection will take you to the EDKII_MENU This selection will take you to the EDKII_MENU This selection will take you to the EDKII_MENU This selection will take you to the EDKII_MENU >EDKII Menu >Boot Manager Menu >Boot Maintenance Manager Continue Reset ^v=Move Highlight <Enter>=Select Entry This selection will take you to the EDKII_MENU This selection will take you to the EDKII_MENU This selection will take you to the EDKII_MENU This selection will take you to the EDKII_MENU This selection will take you to the EDKII_MENU >EDKII Menu >Boot Manager Menu >Boot Maintenance Manager Continue Reset ^v=Move Highlight <Enter>=Select Entry This selection will take you to the EDKII_MENU This selection will take you to the EDKII_MENU This selection will take you to the EDKII_MENU This selection will take you to the EDKII_MENU This selection will take you to the EDKII_MENU >EDKII Menu >Boot Manager Menu >Boot Maintenance Manager Continue Reset ^v=Move Highlight <Enter>=Select Entry This selection will take you to the EDKII_MENU This selection will take you to the EDKII_MENU This selection will take you to the EDKII_MENU This selection will take you to the EDKII_MENU This selection will take you to the EDKII_MENU >EDKII Menu >Boot Manager Menu >Boot Maintenance Manager Continue Reset ^v=Move Highlight <Enter>=Select Entry This selection will take you to the EDKII_MENU This selection will take you to the EDKII_MENU This selection will take you to the EDKII_MENU This selection will take you to the EDKII_MENU This selection will take you to the EDKII_MENU >EDKII Menu >Boot Manager Menu >Boot Maintenance Manager Continue Reset ^v=Move Highlight <Enter>=Select Entry This selection will take you to the EDKII_MENU This selection will take you to the EDKII_MENU This selection will take you to the EDKII_MENU This selection will take you to the EDKII_MENU This selection will take you to the EDKII_MENU >EDKII Menu >Boot Manager Menu >Boot Maintenance Manager Continue Reset ^v=Move Highlight <Enter>=Select Entry This selection will take you to the EDKII_MENU This selection will take you to the EDKII_MENU This selection will take you to the EDKII_MENU This selection will take you to the EDKII_MENU This selection will take you to the EDKII_MENU >EDKII Menu >Boot Manager Menu >Boot Maintenance Manager Continue Reset ^v=Move Highlight <Enter>=Select Entry This selection will take you to the EDKII_MENU This selection will take you to the EDKII_MENU This selection will take you to the EDKII_MENU This selection will take you to the EDKII_MENU This selection will take you to the EDKII_MENU >EDKII Menu >Boot Manager Menu >Boot Maintenance Manager Continue Reset ^v=Move Highlight <Enter>=Select Entry This selection will take you to the EDKII_MENU This selection will take you to the EDKII_MENU This selection will take you to the EDKII_MENU This selection will take you to the EDKII_MENU This selection will take you to the EDKII_MENU >EDKII Menu >Boot Manager Menu >Boot Maintenance Manager Continue Reset ^v=Move Highlight <Enter>=Select Entry This selection will take you to the EDKII_MENU This selection will take you to the EDKII_MENU This selection will take you to the EDKII_MENU This selection will take you to the EDKII_MENU This selection will take you to the EDKII_MENU >EDKII Menu >Boot Manager Menu >Boot Maintenance Manager Continue Reset ^v=Move Highlight <Enter>=Select Entry This selection will take you to the EDKII_MENU This selection will take you to the EDKII_MENU This selection will take you to the EDKII_MENU This selection will take you to the EDKII_MENU This selection will take you to the EDKII_MENU >EDKII Menu >Boot Manager Menu >Boot Maintenance Manager Continue Reset ^v=Move Highlight <Enter>=Select Entry This selection will take you to the EDKII_MENU This selection will take you to the EDKII_MENU This selection will take you to the EDKII_MENU This selection will take you to the EDKII_MENU This selection will take you to the EDKII_MENU >EDKII Menu >Boot Manager Menu >Boot Maintenance Manager Continue Reset ^v=Move Highlight <Enter>=Select Entry This selection will take you to the EDKII_MENU This selection will take you to the EDKII_MENU This selection will take you to the EDKII_MENU This selection will take you to the EDKII_MENU This selection will take you to the EDKII_MENU >EDKII Menu >Boot Manager Menu >Boot Maintenance Manager Continue Reset ^v=Move Highlight <Enter>=Select Entry This selection will take you to the EDKII_MENU This selection will take you to the EDKII_MENU This selection will take you to the EDKII_MENU This selection will take you to the EDKII_MENU This selection will take you to the EDKII_MENU >EDKII Menu >Boot Manager Menu >Boot Maintenance Manager Continue Reset ^v=Move Highlight <Enter>=Select Entry This selection will take you to the EDKII_MENU This selection will take you to the EDKII_MENU This selection will take you to the EDKII_MENU This selection will take you to the EDKII_MENU This selection will take you to the EDKII_MENU >EDKII Menu >Boot Manager Menu >Boot Maintenance Manager Continue Reset ^v=Move Highlight <Enter>=Select Entry This selection will take you to the EDKII_MENU This selection will take you to the EDKII_MENU This selection will take you to the EDKII_MENU This selection will take you to the EDKII_MENU This selection will take you to the EDKII_MENU >EDKII Menu >Boot Manager Menu >Boot Maintenance Manager Continue Reset ^v=Move Highlight <Enter>=Select Entry This selection will take you to the EDKII_MENU This selection will take you to the EDKII_MENU This selection will take you to the EDKII_MENU This selection will take you to the EDKII_MENU This selection will take you to the EDKII_MENU >EDKII Menu >Boot Manager Menu >Boot Maintenance Manager Continue Reset ^v=Move Highlight <Enter>=Select Entry This selection will take you to the EDKII_MENU This selection will take you to the EDKII_MENU This selection will take you to the EDKII_MENU This selection will take you to the EDKII_MENU This selection will take you to the EDKII_MENU >EDKII Menu >Boot Manager Menu >Boot Maintenance Manager Continue Reset ^v=Move Highlight <Enter>=Select Entry This selection will take you to the EDKII_MENU This selection will take you to the EDKII_MENU This selection will take you to the EDKII_MENU This selection will take you to the EDKII_MENU This selection will take you to the EDKII_MENU >EDKII Menu >Boot Manager Menu >Boot Maintenance Manager Continue Reset ^v=Move Highlight <Enter>=Select Entry This selection will take you to the EDKII_MENU This selection will take you to the EDKII_MENU This selection will take you to the EDKII_MENU This selection will take you to the EDKII_MENU This selection will take you to the EDKII_MENU >EDKII Menu >Boot Manager Menu >Boot Maintenance Manager Continue Reset ^v=Move Highlight <Enter>=Select Entry This selection will take you to the EDKII_MENU This selection will take you to the EDKII_MENU This selection will take you to the EDKII_MENU This selection will take you to the EDKII_MENU This selection will take you to the EDKII_MENU >EDKII Menu >Boot Manager Menu >Boot Maintenance Manager Continue Reset ^v=Move Highlight <Enter>=Select Entry This selection will take you to the EDKII_MENU This selection will take you to the EDKII_MENU This selection will take you to the EDKII_MENU This selection will take you to the EDKII_MENU This selection will take you to the EDKII_MENU >EDKII Menu >Boot Manager Menu >Boot Maintenance Manager Continue Reset ^v=Move Highlight <Enter>=Select Entry This selection will take you to the EDKII_MENU This selection will take you to the EDKII_MENU This selection will take you to the EDKII_MENU This selection will take you to the EDKII_MENU This selection will take you to the EDKII_MENU >EDKII Menu >Boot Manager Menu >Boot Maintenance Manager Continue Reset ^v=Move Highlight <Enter>=Select Entry This selection will take you to the EDKII_MENU This selection will take you to the EDKII_MENU This selection will take you to the EDKII_MENU This selection will take you to the EDKII_MENU This selection will take you to the EDKII_MENU >EDKII Menu >Boot Manager Menu >Boot Maintenance Manager Continue Reset ^v=Move Highlight <Enter>=Select Entry This selection will take you to the EDKII_MENU This selection will take you to the EDKII_MENU This selection will take you to the EDKII_MENU This selection will take you to the EDKII_MENU This selection will take you to the EDKII_MENU >EDKII Menu >Boot Manager Menu >Boot Maintenance Manager Continue Reset ^v=Move Highlight <Enter>=Select Entry This selection will take you to the EDKII_MENU This selection will take you to the EDKII_MENU This selection will take you to the EDKII_MENU This selection will take you to the EDKII_MENU This selection will take you to the EDKII_MENU >EDKII Menu >Boot Manager Menu >Boot Maintenance Manager Continue Reset ^v=Move Highlight <Enter>=Select Entry This selection will take you to the EDKII_MENU This selection will take you to the EDKII_MENU This selection will take you to the EDKII_MENU This selection will take you to the EDKII_MENU This selection will take you to the EDKII_MENU >EDKII Menu >Boot Manager Menu >Boot Maintenance Manager Continue Reset ^v=Move Highlight <Enter>=Select Entry This selection will take you to the EDKII_MENU This selection will take you to the EDKII_MENU This selection will take you to the EDKII_MENU This selection will take you to the EDKII_MENU This selection will take you to the EDKII_MENU >EDKII Menu >Boot Manager Menu >Boot Maintenance Manager Continue Reset ^v=Move Highlight <Enter>=Select Entry This selection will take you to the EDKII_MENU This selection will take you to the EDKII_MENU This selection will take you to the EDKII_MENU This selection will take you to the EDKII_MENU This selection will take you to the EDKII_MENU >EDKII Menu >Boot Manager Menu >Boot Maintenance Manager Continue Reset ^v=Move Highlight <Enter>=Select Entry This selection will take you to the EDKII_MENU This selection will take you to the EDKII_MENU This selection will take you to the EDKII_MENU This selection will take you to the EDKII_MENU This selection will take you to the EDKII_MENU >EDKII Menu >Boot Manager Menu >Boot Maintenance Manager Continue Reset ^v=Move Highlight <Enter>=Select Entry This selection will take you to the EDKII_MENU This selection will take you to the EDKII_MENU This selection will take you to the EDKII_MENU This selection will take you to the EDKII_MENU This selection will take you to the EDKII_MENU >EDKII Menu >Boot Manager Menu >Boot Maintenance Manager Continue Reset ^v=Move Highlight <Enter>=Select Entry This selection will take you to the EDKII_MENU This selection will take you to the EDKII_MENU This selection will take you to the EDKII_MENU This selection will take you to the EDKII_MENU This selection will take you to the EDKII_MENU >EDKII Menu >Boot Manager Menu >Boot Maintenance Manager Continue Reset ^v=Move Highlight <Enter>=Select Entry This selection will take you to the EDKII_MENU This selection will take you to the EDKII_MENU This selection will take you to the EDKII_MENU This selection will take you to the EDKII_MENU This selection will take you to the EDKII_MENU >EDKII Menu >Boot Manager Menu >Boot Maintenance Manager Continue Reset ^v=Move Highlight <Enter>=Select Entry This selection will take you to the EDKII_MENU This selection will take you to the EDKII_MENU This selection will take you to the EDKII_MENU This selection will take you to the EDKII_MENU This selection will take you to the EDKII_MENU >EDKII Menu >Boot Manager Menu >Boot Maintenance Manager Continue Reset ^v=Move Highlight <Enter>=Select Entry This selection will take you to the EDKII_MENU This selection will take you to the EDKII_MENU This selection will take you to the EDKII_MENU This selection will take you to the EDKII_MENU This selection will take you to the EDKII_MENU >EDKII Menu >Boot Manager Menu >Boot Maintenance Manager Continue Reset ^v=Move Highlight <Enter>=Select Entry This selection will take you to the EDKII_MENU This selection will take you to the EDKII_MENU This selection will take you to the EDKII_MENU This selection will take you to the EDKII_MENU This selection will take you to the EDKII_MENU >EDKII Menu >Boot Manager Menu >Boot Maintenance Manager Continue Reset ^v=Move Highlight <Enter>=Select Entry This selection will take you to the EDKII_MENU This selection will take you to the EDKII_MENU This selection will take you to the EDKII_MENU This selection will take you to the EDKII_MENU This selection will take you to the EDKII_MENU >EDKII Menu >Boot Manager Menu >Boot Maintenance Manager Continue Reset ^v=Move Highlight <Enter>=Select Entry This selection will take you to the EDKII_MENU This selection will take you to the EDKII_MENU This selection will take you to the EDKII_MENU This selection will take you to the EDKII_MENU This selection will take you to the EDKII_MENU >EDKII Menu >Boot Manager Menu >Boot Maintenance Manager Continue Reset ^v=Move Highlight <Enter>=Select Entry This selection will take you to the EDKII_MENU This selection will take you to the EDKII_MENU This selection will take you to the EDKII_MENU This selection will take you to the EDKII_MENU This selection will take you to the EDKII_MENU >EDKII Menu >Boot Manager Menu >Boot Maintenance Manager Continue Reset ^v=Move Highlight <Enter>=Select Entry This selection will take you to the EDKII_MENU This selection will take you to the EDKII_MENU This selection will take you to the EDKII_MENU This selection will take you to the EDKII_MENU This selection will take you to the EDKII_MENU >EDKII Menu >Boot Manager Menu >Boot Maintenance Manager Continue Reset ^v=Move Highlight <Enter>=Select Entry This selection will take you to the EDKII_MENU This selection will take you to the EDKII_MENU This selection will take you to the EDKII_MENU This selection will take you to the EDKII_MENU This selection will take you to the EDKII_MENU >EDKII Menu ^v=Move Highlight <Enter>=Select Entry >Boot Manager Menu This selection will take you to the Boot Manager PROGRESS CODE: V02020000 I0
PROGRESS CODE: V02010000 I0
PROGRESS CODE: V02010004 I0
PROGRESS CODE: V02010004 I0
PROGRESS CODE: V02010004 I0
PROGRESS CODE: V02020000 I0
PROGRESS CODE: V02080000 I0
PROGRESS CODE: V02080003 I0
PROGRESS CODE: V02070000 I0
PROGRESS CODE: V02070003 I0
PROGRESS CODE: V01050004 I0
PROGRESS CODE: V01050004 I0
PROGRESS CODE: V02010000 I0
PROGRESS CODE: V02010004 I0
PROGRESS CODE: V02010004 I0
PROGRESS CODE: V02010004 I0
PROGRESS CODE: V02010000 I0
PROGRESS CODE: V02010004 I0
PROGRESS CODE: V02010004 I0
PROGRESS CODE: V02010004 I0
PROGRESS CODE: V02010000 I0
PROGRESS CODE: V02010004 I0
PROGRESS CODE: V02010004 I0
PROGRESS CODE: V02010004 I0
PROGRESS CODE: V02010000 I0
PROGRESS CODE: V02010004 I0
PROGRESS CODE: V02010004 I0
PROGRESS CODE: V02010004 I0
PROGRESS CODE: V02010000 I0
PROGRESS CODE: V02010004 I0
PROGRESS CODE: V02010004 I0
PROGRESS CODE: V02010004 I0
PROGRESS CODE: V02010000 I0
PROGRESS CODE: V02010004 I0
PROGRESS CODE: V02010004 I0
PROGRESS CODE: V02010004 I0
PROGRESS CODE: V02010000 I0
PROGRESS CODE: V02010004 I0
PROGRESS CODE: V02010004 I0
PROGRESS CODE: V02010004 I0
PROGRESS CODE: V02010000 I0
PROGRESS CODE: V02010004 I0
PROGRESS CODE: V02010004 I0
PROGRESS CODE: V02010004 I0
PROGRESS CODE: V02010000 I0
PROGRESS CODE: V02010004 I0
PROGRESS CODE: V02010004 I0
PROGRESS CODE: V02010004 I0
PROGRESS CODE: V02010000 I0
PROGRESS CODE: V02010004 I0
PROGRESS CODE: V02010004 I0
PROGRESS CODE: V02010004 I0
PROGRESS CODE: V02010000 I0
PROGRESS CODE: V02010004 I0
PROGRESS CODE: V02010004 I0
PROGRESS CODE: V02010004 I0
PROGRESS CODE: V02010000 I0
PROGRESS CODE: V02010004 I0
PROGRESS CODE: V02010004 I0
PROGRESS CODE: V02010004 I0
PROGRESS CODE: V02010000 I0
PROGRESS CODE: V02010004 I0
PROGRESS CODE: V02010004 I0
PROGRESS CODE: V02010004 I0
PROGRESS CODE: V02010000 I0
PROGRESS CODE: V02010004 I0
PROGRESS CODE: V02010004 I0
PROGRESS CODE: V02010004 I0
PROGRESS CODE: V02010000 I0
PROGRESS CODE: V02010004 I0
PROGRESS CODE: V02010004 I0
PROGRESS CODE: V02010004 I0
PROGRESS CODE: V02010000 I0
PROGRESS CODE: V02010004 I0
PROGRESS CODE: V02010004 I0
PROGRESS CODE: V02010004 I0
PROGRESS CODE: V02010000 I0
PROGRESS CODE: V02010004 I0
PROGRESS CODE: V02010004 I0
PROGRESS CODE: V02010004 I0
PROGRESS CODE: V02010000 I0
PROGRESS CODE: V02010004 I0
PROGRESS CODE: V02010004 I0
PROGRESS CODE: V02010004 I0
PROGRESS CODE: V02010000 I0
PROGRESS CODE: V02010004 I0
PROGRESS CODE: V02010004 I0
PROGRESS CODE: V02010004 I0
PROGRESS CODE: V02020000 I0
PROGRESS CODE: V02080000 I0
PROGRESS CODE: V02080003 I0
PROGRESS CODE: V02070000 I0
PROGRESS CODE: V02070003 I0
PROGRESS CODE: V01050004 I0
PROGRESS CODE: V01050004 I0
PROGRESS CODE: V01050004 I0
PROGRESS CODE: V01050004 I0
PROGRESS CODE: V01050004 I0
PROGRESS CODE: V01050004 I0
PROGRESS CODE: V01050004 I0
PROGRESS CODE: V01050004 I0
PROGRESS CODE: V02020000 I0
/------------------------------------------------------------------------------\|| Boot Manager Menu \------------------------------------------------------------------------------//------------------------------------------------------------------------------\||||\------------------------------------------------------------------------------/Copyright (c) 2006-2022, Intel Corporation Boot Manager Menu UEFI WDC WD1005VBYZ-02RRWB2 WD-WMC6N0K69VYL UEFI Kingston DataTraveler 3.0 E0D55E62C78DF4C0D8A414B9 UEFI Internal Shell Use the <^> and <v> keys to choose a boot option, the <Enter> key to select a boot option, and the <Esc> key to exit the Boot Manager Menu. Esc=Exit ^v=Move Highlight <Enter>=Select Entry Device Path : PciRoot(0x0)/Pci(0x17, 0x0)/Sata(0x0,0xFFFF,0 x0) UEFI WDC WD1005VBYZ-02RRWB2 WD-WMC6N0K69VYL Esc=Exit ^v=Move Highlight <Enter>=Select Entry UEFI Kingston DataTraveler 3.0 E0D55E62C78DF4C0D8A414B9 Device Path : PciRoot(0x0)/Pci(0x14, 0x0)/USB(0x5,0x0) UEFI Kingston DataTraveler 3.0 E0D55E62C78DF4C0D8A414B9 Esc=Exit ^v=Move Highlight <Enter>=Select Entry UEFI Internal Shell Device Path : Fv(CDBB7B35-6833-4ED6- 9AB2-57D2ACDDF6F0)/FvF ile(7C04A583-9E3E-4F1C -AD65-E05268D0B4D1) IioSecureOnOnReadyToBoot...
PROGRESS CODE: V03051001 I0
PROGRESS CODE: V03058000 I0
PDB = c:\efi\servergen2\intel\Build\EagleStreamRpPkg\DEBUG_VS2015x86\X64\ShellPkg\Application\Shell\Shell\DEBUG\Shell.pdb
PROGRESS CODE: V03058001 I0
UEFI Interactive Shell v2.2
EDK II
UEFI v2.70 (EDK II, 0x00010000)
Mapping table
FS0: Alias(s):HD0f0b:;BLK1:
PciRoot(0x0)/Pci(0x14,0x0)/USB(0x5,0x0)/HD(1,MBR,0x2EBE6405,0x3F,0x39A2C81)
FS1: Alias(s):HD1a65535a2:;BLK4:
PciRoot(0x0)/Pci(0x17,0x0)/Sata(0x0,0xFFFF,0x0)/HD(2,GPT,901ED09D-0CC1-4B78-A258-58391A5D6567,0xDC800,0x82000)
BLK0: Alias(s):
PciRoot(0x0)/Pci(0x14,0x0)/USB(0x5,0x0)
BLK2: Alias(s):
PciRoot(0x0)/Pci(0x17,0x0)/Sata(0x0,0xFFFF,0x0)
BLK3: Alias(s):
PciRoot(0x0)/Pci(0x17,0x0)/Sata(0x0,0xFFFF,0x0)/HD(1,GPT,07AE39FD-788D-490A-B7F2-D61CC80B130F,0x800,0xDC000)
BLK5: Alias(s):
PciRoot(0x0)/Pci(0x17,0x0)/Sata(0x0,0xFFFF,0x0)/HD(3,GPT,83E10836-37FC-4554-9CC3-71A59B1794AB,0x15E800,0x40000)
BLK6: Alias(s):
PciRoot(0x0)/Pci(0x17,0x0)/Sata(0x0,0xFFFF,0x0)/HD(4,GPT,9A20A927-C8F3-4053-9E5E-2807F07E38FD,0x19E800,0x1BD85800)
Press ESC in 5 seconds to skip startup.nsh or any other key to continue.Press ESC in 4 seconds to skip startup.nsh or any other key to continue.Press ESC in 3 seconds to skip startup.nsh or any other key to continue.Press ESC in 2 seconds to skip startup.nsh or any other key to continue.
Shell> fs0:
FS0:\> v cd zzhihao
FS0:\zhihao\> testapp.eTestApp.efi eEGSDCRB1.ZHI.0091.D15.2211010626_Pa0320_SPR_EBG_SPS.bin
PDB = c:\efi\servergen2\intel\Build\EagleStreamRpPkg\DEBUG_VS2015x86\X64\EagleStreamRpPkg\Applications\TestApp\TestApp\DEBUG\TestApp.pdb
In CryptParallelhash
Return in function 6,retrunvalue=1
Performance test = 13938842
In CryptParallelhash
Return in function 6,retrunvalue=1
Accuracy test = 0
PDB = c:\efi\servergen2\intel\Build\EagleStreamRpPkg\DEBUG_VS2015x86\X64\EagleStreamRpPkg\Applications\TestApp\TestApp\DEBUG\TestApp.pdb
FS0:\zhihao\>
next prev parent reply other threads:[~2022-12-01 11:43 UTC|newest]
Thread overview: 4+ messages / expand[flat|nested] mbox.gz Atom feed top
2022-11-30 14:21 [PATCH v1 1/1] CryptPkg: Enable CryptoPkg BaseCryptLib ParallelHash for PEI and DXE Li, Zhihao
2022-12-01 8:36 ` [edk2-devel] " Yao, Jiewen
2022-12-01 11:43 ` Li, Zhihao [this message]
2022-12-03 8:19 ` Yao, Jiewen
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