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13 Sep 2023 15:06:44 +0000 From: "Jeshua Smith via groups.io" To: Sami Mujawar , "devel@edk2.groups.io" CC: "pierre.gondois@arm.com" , "Anshuman.Khandual@arm.com" , "Matteo.Carlini@arm.com" , "Akanksha.Jain2@arm.com" , "Sibel.Allinson@arm.com" , "nd@arm.com" Subject: Re: [edk2-devel] [PATCH v2 10/11] DynamicTablesPkg: Add ETE device to CPU node in AML Thread-Topic: [PATCH v2 10/11] DynamicTablesPkg: Add ETE device to CPU node in AML Thread-Index: AQHZ5kDT9A0n82aHYUyiUTLrJ0dpv7AY2uaw Date: Wed, 13 Sep 2023 15:06:44 +0000 Message-ID: References: <20230913124935.38768-1-sami.mujawar@arm.com> <20230913124935.38768-11-sami.mujawar@arm.com> In-Reply-To: <20230913124935.38768-11-sami.mujawar@arm.com> Accept-Language: en-US X-MS-Has-Attach: X-MS-TNEF-Correlator: x-ms-publictraffictype: Email x-ms-traffictypediagnostic: DM6PR12MB3371:EE_|DM4PR12MB8452:EE_ x-ms-office365-filtering-correlation-id: 59843a12-19a3-48a3-a0ae-08dbb46b0b12 x-ms-exchange-senderadcheck: 1 x-ms-exchange-antispam-relay: 0 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X-MS-Exchange-CrossTenant-Network-Message-Id: 59843a12-19a3-48a3-a0ae-08dbb46b0b12 X-MS-Exchange-CrossTenant-originalarrivaltime: 13 Sep 2023 15:06:44.2800 (UTC) X-MS-Exchange-CrossTenant-fromentityheader: Hosted X-MS-Exchange-CrossTenant-id: 43083d15-7273-40c1-b7db-39efd9ccc17a X-MS-Exchange-CrossTenant-mailboxtype: HOSTED X-MS-Exchange-CrossTenant-userprincipalname: RYhdqcEJSXgj2CbVxUgjgOcB9XEewcUIZ4U+RhlUuWfRfEoP7hvoCSmkfUhd5anjcaEr47spReOhRm3lrWHFig== X-MS-Exchange-Transport-CrossTenantHeadersStamped: DM4PR12MB8452 Precedence: Bulk List-Subscribe: List-Help: Sender: devel@edk2.groups.io List-Id: Mailing-List: list devel@edk2.groups.io; contact devel+owner@edk2.groups.io Reply-To: devel@edk2.groups.io,jeshuas@nvidia.com List-Unsubscribe-Post: List-Unsubscribe=One-Click List-Unsubscribe: X-Gm-Message-State: kyikSCg5RkZaZ1ipXgn75e7Ax7686176AA= Content-Language: en-US Content-Type: text/plain; charset="us-ascii" Content-Transfer-Encoding: quoted-printable X-GND-Status: LEGIT Authentication-Results: spool.mail.gandi.net; dkim=pass header.d=groups.io header.s=20140610 header.b=Qrx564UF; arc=reject ("signature check failed: fail, {[1] = sig:microsoft.com:reject}"); dmarc=none; spf=pass (spool.mail.gandi.net: domain of bounce@groups.io designates 66.175.222.108 as permitted sender) smtp.mailfrom=bounce@groups.io Not sure it's worth creating a new patchset for, but the "GetEArmObjEtInfo = (OPTIONAL)" comment should probably not have the "Get" prefix (ie. " EArmOb= jEtInfo (OPTIONAL)"). -----Original Message----- From: Sami Mujawar =20 Sent: Wednesday, September 13, 2023 6:50 AM To: devel@edk2.groups.io Cc: Sami Mujawar ; pierre.gondois@arm.com; Anshuman.K= handual@arm.com; Matteo.Carlini@arm.com; Akanksha.Jain2@arm.com; Sibel.Alli= nson@arm.com; Jeshua Smith ; nd@arm.com Subject: [PATCH v2 10/11] DynamicTablesPkg: Add ETE device to CPU node in A= ML External email: Use caution opening links or attachments The Coresight Embedded Trace Extension (ETE) feature can be detected by the= platform firmware by examining the debug feature register ID_AA64DFR0_EL1.= TraceVer field. The platform configuration manager can then describe the ETE by creating CM= _ARM_ET_INFO object(s) and referencing these in CM_ARM_GICC_INFO.EtToken. The 'Table 3: Compatible IDs for architected CoreSight components' in the '= ACPI for CoreSight 1.2 Platform Design Document' specifies the HID value for Coresight ETE and= CoreSight Embedded Trace Macrocell (ETM) v4.x as ARMH C500. Therefore, update the SsdtCpuTopologyGenerator to add an ETE device to the = CPU node in the AML CPU hierarchy so that an OS can utilise this informatio= n. Note: Although ETE and ETM share the same HID, ETE has a system register in= terfaces, unlike ETM which requires memory mapped registers. Since this patch aims to support ETE, the AML description does not describe= any memory mapped registers. However, support for ETM can be added in the = future. Signed-off-by: Sami Mujawar --- Notes: v2: - No code change from v1 patch series. [SAMI] DynamicTablesPkg/Library/Acpi/Arm/AcpiSsdtCpuTopologyLibArm/SsdtCpuTopolog= yGenerator.c | 186 +++++++++++++++++++- DynamicTablesPkg/Library/Acpi/Arm/= AcpiSsdtCpuTopologyLibArm/SsdtCpuTopologyGenerator.h | 11 +- 2 files changed, 195 insertions(+), 2 deletions(-) diff --git a/DynamicTablesPkg/Library/Acpi/Arm/AcpiSsdtCpuTopologyLibArm/Ss= dtCpuTopologyGenerator.c b/DynamicTablesPkg/Library/Acpi/Arm/AcpiSsdtCpuTop= ologyLibArm/SsdtCpuTopologyGenerator.c index 6fb131b664820adca63c9efa6d8b0e17fc64284e..6fbba12a010bf987797f0901a03= 2735e8e0be598 100644 --- a/DynamicTablesPkg/Library/Acpi/Arm/AcpiSsdtCpuTopologyLibArm/SsdtCpuTo= pologyGenerator.c +++ b/DynamicTablesPkg/Library/Acpi/Arm/AcpiSsdtCpuTopologyLibArm/SsdtCp +++ uTopologyGenerator.c @@ -1,11 +1,17 @@ /** @file SSDT Cpu Topology Table Generator. - Copyright (c) 2021, Arm Limited. All rights reserved.
+ Copyright (c) 2021 - 2023, Arm Limited. All rights reserved.
SPDX-License-Identifier: BSD-2-Clause-Patent @par Reference(s): - ACPI 6.3 Specification - January 2019 - s8.4 Declaring Processors + - ACPI for CoreSight version 1.2 Platform Design Document + =20 + (https://nam11.safelinks.protection.outlook.com/?url=3Dhttps%3A%2F%2Fdev + eloper.arm.com%2Fdocumentation%2Fden0067%2Fa%2F%3Flang%3Den&data=3D05%7C + 01%7Cjeshuas%40nvidia.com%7C26e54e899c78479dfa9708dbb457f3cd%7C43083d1 + 5727340c1b7db39efd9ccc17a%7C0%7C0%7C638302062091232606%7CUnknown%7CTWF + pbGZsb3d8eyJWIjoiMC4wLjAwMDAiLCJQIjoiV2luMzIiLCJBTiI6Ik1haWwiLCJXVCI6M + n0%3D%7C3000%7C%7C%7C&sdata=3DPV447Rl4K7EXTgSc9g%2BcjTzXYmMsKs0QMkpXRnwx + KkI%3D&reserved=3D0) + + @par Glossary: + - ETE - Embedded Trace Extension. + - ETM - Embedded Trace Macrocell. **/ #include @@ -35,6 +41,7 @@ Requirements: - EArmObjProcHierarchyInfo (OPTIONAL) along with - EArmObjCmRef (OPTIONAL) - EArmObjLpiInfo (OPTIONAL) + - GetEArmObjEtInfo (OPTIONAL) */ /** This macro expands to a function that retrieves the GIC @@ -86,6 +93,1= 6 @@ GET_OBJECT_LIST ( CM_ARM_CPC_INFO ); +/** + This macro expands to a function that retrieves the ET device + information from the Configuration Manager. +*/ +GET_OBJECT_LIST ( + EObjNameSpaceArm, + EArmObjEtInfo, + CM_ARM_ET_INFO + ); + /** Initialize the TokenTable. One entry should be allocated for each CM_ARM_PROC_HIERARCHY_INFO @@ -32= 6,6 +343,144 @@ CreateAmlCpcNode ( return Status; } +/** Create an embedded trace device and add it to the Cpu Node in the + AML namespace. + + This generates the following ASL code: + Device (E002) + { + Name (_UID, 2) + Name (_HID, "ARMHC500") + } + + Note: Currently we only support generating ETE nodes. Unlike ETM, =20 + ETE has a system register interface and therefore does not need the=20 + MMIO range to be described. + + @param [in] Generator The SSDT Cpu Topology generator. + @param [in] ParentNode Parent node to attach the Cpu node to. + @param [in] CpuName Value used to generate the node name. + @param [out] EtNodePtr If not NULL, return the created Cpu node. + + @retval EFI_SUCCESS Success. + @retval EFI_INVALID_PARAMETER Invalid parameter. + @retval EFI_OUT_OF_RESOURCES Failed to allocate memory. +**/ +STATIC +EFI_STATUS +EFIAPI +CreateAmlEtd ( + IN ACPI_CPU_TOPOLOGY_GENERATOR *Generator, + IN AML_NODE_HANDLE ParentNode, + IN UINT32 CpuName, + OUT AML_OBJECT_NODE_HANDLE *EtNodePtr OPTIONAL + ) +{ + EFI_STATUS Status; + AML_OBJECT_NODE_HANDLE EtNode; + CHAR8 AslName[AML_NAME_SEG_SIZE + 1]; + + ASSERT (Generator !=3D NULL); + ASSERT (ParentNode !=3D NULL); + + Status =3D WriteAslName ('E', CpuName, AslName); if (EFI_ERROR=20 + (Status)) { + ASSERT (0); + return Status; + } + + Status =3D AmlCodeGenDevice (AslName, ParentNode, &EtNode); if=20 + (EFI_ERROR (Status)) { + ASSERT (0); + return Status; + } + + Status =3D AmlCodeGenNameInteger ( + "_UID", + CpuName, + EtNode, + NULL + ); + if (EFI_ERROR (Status)) { + ASSERT (0); + return Status; + } + + Status =3D AmlCodeGenNameString ( + "_HID", + ACPI_HID_ET_DEVICE, + EtNode, + NULL + ); + if (EFI_ERROR (Status)) { + ASSERT (0); + return Status; + } + + // If requested, return the handle to the EtNode. + if (EtNodePtr !=3D NULL) { + *EtNodePtr =3D EtNode; + } + + return Status; +} + +/** Create and add an Embedded trace device to the Cpu Node. + + @param [in] Generator The SSDT Cpu Topology generator. + @param [in] CfgMgrProtocol Pointer to the Configuration Manager + Protocol Interface. + @param [in] GicCInfo Pointer to the CM_ARM_GICC_INFO obje= ct + describing the Cpu. + @param [in] CpuName Value used to generate the CPU node = name. + @param [in] Node CPU Node to which the ET device node= is + attached. + + @retval EFI_SUCCESS The function completed successfully. + @retval EFI_UNSUPPORTED Feature Unsupported. + @retval EFI_INVALID_PARAMETER Invalid parameter. + @retval EFI_OUT_OF_RESOURCES Failed to allocate memory. +**/ +STATIC +EFI_STATUS +EFIAPI +CreateAmlEtNode ( + IN ACPI_CPU_TOPOLOGY_GENERATOR *Generator, + IN CONST EDKII_CONFIGURATION_MANAGER_PROTOCOL *CONST CfgMgrProtocol, + IN CM_ARM_GICC_INFO *GicCInfo, + IN UINT32 CpuName, + IN AML_OBJECT_NODE_HANDLE *Node + ) +{ + EFI_STATUS Status; + CM_ARM_ET_INFO *EtInfo; + + Status =3D GetEArmObjEtInfo ( + CfgMgrProtocol, + GicCInfo->EtToken, + &EtInfo, + NULL + ); + if (EFI_ERROR (Status)) { + ASSERT (0); + return Status; + } + + // Currently we only support creation of a ETE Node. + if (EtInfo->EtType !=3D ArmEtTypeEte) { + return EFI_UNSUPPORTED; + } + + Status =3D CreateAmlEtd ( + Generator, + Node, + CpuName, + NULL + ); + ASSERT_EFI_ERROR (Status); + return Status; +} + /** Create and add an _LPI method to Cpu/Cluster Node. For instance, transform an AML node from: @@ -694,6 +849,21 @@ CreateAmlCpuFromProcHierarchy ( } } + // Add an Embedded Trace node if present. + if (GicCInfo->EtToken !=3D CM_NULL_TOKEN) { + Status =3D CreateAmlEtNode ( + Generator, + CfgMgrProtocol, + GicCInfo, + CpuName, + CpuNode + ); + if (EFI_ERROR (Status)) { + ASSERT_EFI_ERROR (Status); + return Status; + } + } + return Status; } @@ -1135,6 +1305,20 @@ CreateTopologyFromGicC ( break; } } + + if (GicCInfo[Index].EtToken !=3D CM_NULL_TOKEN) { + Status =3D CreateAmlEtNode ( + Generator, + CfgMgrProtocol, + &GicCInfo[Index], + Index, + CpuNode + ); + if (EFI_ERROR (Status)) { + ASSERT_EFI_ERROR (Status); + return Status; + } + } } // for return Status; diff --git a/DynamicTablesPkg/Library/Acpi/Arm/AcpiSsdtCpuTopologyLibArm/Ss= dtCpuTopologyGenerator.h b/DynamicTablesPkg/Library/Acpi/Arm/AcpiSsdtCpuTop= ologyLibArm/SsdtCpuTopologyGenerator.h index 48e4455490e9a211e8d4e0a18adcf079fd5d2d24..0c7a0b0601ab221bc416ecb4be4= 36c0dafca1824 100644 --- a/DynamicTablesPkg/Library/Acpi/Arm/AcpiSsdtCpuTopologyLibArm/SsdtCpuTo= pologyGenerator.h +++ b/DynamicTablesPkg/Library/Acpi/Arm/AcpiSsdtCpuTopologyLibArm/SsdtCp +++ uTopologyGenerator.h @@ -1,11 +1,17 @@ /** @file SSDT Cpu Topology Table Generator. - Copyright (c) 2021, Arm Limited. All rights reserved.
+ Copyright (c) 2021 - 2023, Arm Limited. All rights reserved.
SPDX-License-Identifier: BSD-2-Clause-Patent @par Reference(s): - ACPI 6.3 Specification - January 2019 - s8.4 Declaring Processors + - ACPI for CoreSight version 1.2 Platform Design Document + =20 + (https://nam11.safelinks.protection.outlook.com/?url=3Dhttps%3A%2F%2Fdev + eloper.arm.com%2Fdocumentation%2Fden0067%2Fa%2F%3Flang%3Den&data=3D05%7C + 01%7Cjeshuas%40nvidia.com%7C26e54e899c78479dfa9708dbb457f3cd%7C43083d1 + 5727340c1b7db39efd9ccc17a%7C0%7C0%7C638302062091232606%7CUnknown%7CTWF + pbGZsb3d8eyJWIjoiMC4wLjAwMDAiLCJQIjoiV2luMzIiLCJBTiI6Ik1haWwiLCJXVCI6M + n0%3D%7C3000%7C%7C%7C&sdata=3DPV447Rl4K7EXTgSc9g%2BcjTzXYmMsKs0QMkpXRnwx + KkI%3D&reserved=3D0) + + @par Glossary: + - ETE - Embedded Trace Extension. + - ETM - Embedded Trace Macrocell. **/ #ifndef SSDT_CPU_TOPOLOGY_GENERATOR_H_ @@ -49,6 +55,9 @@ /// HID for a processor device. #define ACPI_HID_PROCESSOR_DEVICE "ACPI0007" +/// HID for a ETM/ETE device. +#define ACPI_HID_ET_DEVICE "ARMHC500" + /// HID for a processor container device. #define ACPI_HID_PROCESSOR_CONTAINER_DEVICE "ACPI0010" -- 'Guid(CE165669-3EF3-493F-B85D-6190EE5B9759)' -=3D-=3D-=3D-=3D-=3D-=3D-=3D-=3D-=3D-=3D-=3D- Groups.io Links: You receive all messages sent to this group. View/Reply Online (#108599): https://edk2.groups.io/g/devel/message/108599 Mute This Topic: https://groups.io/mt/101335846/7686176 Group Owner: devel+owner@edk2.groups.io Unsubscribe: https://edk2.groups.io/g/devel/unsub [rebecca@openfw.io] -=3D-=3D-=3D-=3D-=3D-=3D-=3D-=3D-=3D-=3D-=3D-