public inbox for devel@edk2.groups.io
 help / color / mirror / Atom feed
From: "You, Benjamin" <benjamin.you@intel.com>
To: Ard Biesheuvel <ard.biesheuvel@linaro.org>,
	Heyi Guo <heyi.guo@linaro.org>, "Ni, Ruiyu" <ruiyu.ni@intel.com>,
	"Ma, Maurice" <maurice.ma@intel.com>,
	"Agyeman, Prince" <prince.agyeman@intel.com>
Cc: "edk2-devel@lists.01.org" <edk2-devel@lists.01.org>,
	"Zeng, Star" <star.zeng@intel.com>,
	"Dong, Eric" <eric.dong@intel.com>,
	Laszlo Ersek <lersek@redhat.com>,
	"Kinney, Michael D" <michael.d.kinney@intel.com>,
	"Justen, Jordan L" <jordan.l.justen@intel.com>,
	Anthony Perard <anthony.perard@citrix.com>,
	Julien Grall <julien.grall@linaro.org>
Subject: Re: [PATCH v7 0/6] Add translation support to generic PciHostBridge
Date: Thu, 15 Mar 2018 08:17:26 +0000	[thread overview]
Message-ID: <E748835C6D8DB54B8E8AF33091ECC57C621705F5@SHSMSX103.ccr.corp.intel.com> (raw)
In-Reply-To: <CAKv+Gu_cpzgOtfE-A9BLRBt41X32MtY0imPq7qWt9m8_pRQTBQ@mail.gmail.com>

Hi,

I consulted Ray. I have no objection to the patch for CorebootPayloadPkg.

Thanks,

-  ben

> -----Original Message-----
> From: Ard Biesheuvel [mailto:ard.biesheuvel@linaro.org]
> Sent: Thursday, March 15, 2018 4:05 PM
> To: Heyi Guo <heyi.guo@linaro.org>; Ni, Ruiyu <ruiyu.ni@intel.com>; Ma,
> Maurice <maurice.ma@intel.com>; You, Benjamin <benjamin.you@intel.com>;
> Agyeman, Prince <prince.agyeman@intel.com>
> Cc: edk2-devel@lists.01.org; Zeng, Star <star.zeng@intel.com>; Dong, Eric
> <eric.dong@intel.com>; Laszlo Ersek <lersek@redhat.com>; Kinney, Michael D
> <michael.d.kinney@intel.com>; Justen, Jordan L <jordan.l.justen@intel.com>;
> Anthony Perard <anthony.perard@citrix.com>; Julien Grall
> <julien.grall@linaro.org>
> Subject: Re: [PATCH v7 0/6] Add translation support to generic PciHostBridge
> 
> On 15 March 2018 at 06:03, Heyi Guo <heyi.guo@linaro.org> wrote:
> > Code can also be found here:
> > https://github.com/iwishguo/edk2/tree/patch-pci-host-bridge-v7
> >
> > v7:
> > - Patch 4: implement 1 comments from Ray.
> >
> 
> 
> Thanks Heyi.
> 
> I will merge this v7 by the end of today unless anyone objects.
> 
> Maurice, Prince, Benjamin: you have had ample time to respond to the
> Coreboot changes. I am going to assume that you have no objections
> unless you raise them today.
> 


> Thanks all,
> Ard.
> 
> 
> 
> > v6:
> > - Patch 1, 2: implement 3 comments from Laszlo.
> > - Patch 4: implement 3 comments from Ray.
> >
> > Patch v5 inherits the code from RFC v4; we don't restart the version number
> for
> > RFC to PATCH change.
> >
> > v5:
> > - Patch 4/6: Modify the code according to the comments from Ray.
> > - Patch 1/6 and 2/6 are totally new. They add initialization for all fields of
> >   PCI_ROOT_BRIDGE_APERTURE temporary variables in PciHostBridgeLib
> instances, so
> >   that they will not suffer from extension of PCI_ROOT_BRIDGE_APERTURE
> >   structure.
> > - Generate a separate patch (3/6) for PciHostBridgeLib.h change. Though it is a
> >   prerequisite for patch 4/6, it does not change the code in PciHostBridge
> >   driver and won't cause any build failure or functional issue.
> >
> >
> > v4:
> > - Modify the code according to the comments from Ray, Laszlo and Ard
> (Please see
> >   the notes of Patch 1/3)
> > - Ignore translation of bus in CreateRootBridge.
> >
> >
> > v3:
> > - Keep definition of Translation consistent in EDKII code: Translation = device
> >   address - host address.
> > - Patch 2/2 is split into 2 patches (2/3 and 3/3).
> > - Refine comments and commit messages to make the code easier to
> understand.
> >
> >
> > v2:
> > Changs are made according to the discussion on the mailing list, including:
> >
> > - PciRootBridgeIo->Configuration should return CPU view address, as well as
> >   PciIo->GetBarAttributes, and Translation Offset should be equal to PCI view
> >   address - CPU view address.
> > - Add translation offset to PCI_ROOT_BRIDGE_APERTURE structure definition.
> > - PciHostBridge driver internally used Base Address is still based on PCI view
> >   address, and translation offset = CPU view - PCI view, which follows the
> >   definition in ACPI, and not the same as that in UEFI spec.
> >
> > Cc: Ruiyu Ni <ruiyu.ni@intel.com>
> > Cc: Ard Biesheuvel <ard.biesheuvel@linaro.org>
> > Cc: Star Zeng <star.zeng@intel.com>
> > Cc: Eric Dong <eric.dong@intel.com>
> > Cc: Laszlo Ersek <lersek@redhat.com>
> > Cc: Michael D Kinney <michael.d.kinney@intel.com>
> > Cc: Maurice Ma <maurice.ma@intel.com>
> > Cc: Prince Agyeman <prince.agyeman@intel.com>
> > Cc: Benjamin You <benjamin.you@intel.com>
> > Cc: Jordan Justen <jordan.l.justen@intel.com>
> > Cc: Anthony Perard <anthony.perard@citrix.com>
> > Cc: Julien Grall <julien.grall@linaro.org>
> >
> >
> > Heyi Guo (6):
> >   CorebootPayloadPkg/PciHostBridgeLib: clear aperture vars for (re)init
> >   OvmfPkg/PciHostBridgeLib: clear PCI aperture vars for (re)init
> >   MdeModulePkg/PciHostBridgeLib.h: add address Translation
> >   MdeModulePkg/PciHostBridgeDxe: Add support for address translation
> >   MdeModulePkg/PciBus: convert host address to device address
> >   MdeModulePkg/PciBus: return CPU address for GetBarAttributes
> >
> >  MdeModulePkg/Bus/Pci/PciHostBridgeDxe/PciHostBridge.h              |  21 +++
> >  MdeModulePkg/Bus/Pci/PciHostBridgeDxe/PciHostResource.h            |   3 +
> >  MdeModulePkg/Include/Library/PciHostBridgeLib.h                    |  19 +++
> >  CorebootPayloadPkg/Library/PciHostBridgeLib/PciHostBridgeSupport.c |   7
> +-
> >  MdeModulePkg/Bus/Pci/PciBusDxe/PciIo.c                             |  12 +-
> >  MdeModulePkg/Bus/Pci/PciHostBridgeDxe/PciHostBridge.c              | 129
> ++++++++++++++++---
> >  MdeModulePkg/Bus/Pci/PciHostBridgeDxe/PciRootBridgeIo.c            | 135
> ++++++++++++++++++--
> >  OvmfPkg/Library/PciHostBridgeLib/PciHostBridgeLib.c                |   4 +
> >  OvmfPkg/Library/PciHostBridgeLib/XenSupport.c                      |   7 +-
> >  9 files changed, 306 insertions(+), 31 deletions(-)
> >
> > --
> > 2.7.4
> >

  reply	other threads:[~2018-03-15  8:11 UTC|newest]

Thread overview: 12+ messages / expand[flat|nested]  mbox.gz  Atom feed  top
2018-03-15  6:03 [PATCH v7 0/6] Add translation support to generic PciHostBridge Heyi Guo
2018-03-15  6:03 ` [PATCH v7 1/6] CorebootPayloadPkg/PciHostBridgeLib: clear aperture vars for (re)init Heyi Guo
2018-03-15  8:23   ` You, Benjamin
2018-03-15  6:03 ` [PATCH v7 2/6] OvmfPkg/PciHostBridgeLib: clear PCI " Heyi Guo
2018-03-15  6:04 ` [PATCH v7 3/6] MdeModulePkg/PciHostBridgeLib.h: add address Translation Heyi Guo
2018-03-15  6:04 ` [PATCH v7 4/6] MdeModulePkg/PciHostBridgeDxe: Add support for address translation Heyi Guo
2018-03-15  6:04 ` [PATCH v7 5/6] MdeModulePkg/PciBus: convert host address to device address Heyi Guo
2018-03-15  6:04 ` [PATCH v7 6/6] MdeModulePkg/PciBus: return CPU address for GetBarAttributes Heyi Guo
2018-03-15  8:05 ` [PATCH v7 0/6] Add translation support to generic PciHostBridge Ard Biesheuvel
2018-03-15  8:17   ` You, Benjamin [this message]
2018-03-15 16:02     ` Ard Biesheuvel
2018-03-15 20:11       ` Laszlo Ersek

Reply instructions:

You may reply publicly to this message via plain-text email
using any one of the following methods:

* Save the following mbox file, import it into your mail client,
  and reply-to-list from there: mbox

  Avoid top-posting and favor interleaved quoting:
  https://en.wikipedia.org/wiki/Posting_style#Interleaved_style

* Reply using the --to, --cc, and --in-reply-to
  switches of git-send-email(1):

  git send-email \
    --in-reply-to=E748835C6D8DB54B8E8AF33091ECC57C621705F5@SHSMSX103.ccr.corp.intel.com \
    --to=devel@edk2.groups.io \
    /path/to/YOUR_REPLY

  https://kernel.org/pub/software/scm/git/docs/git-send-email.html

* If your mail client supports setting the In-Reply-To header
  via mailto: links, try the mailto: link
Be sure your reply has a Subject: header at the top and a blank line before the message body.
This is a public inbox, see mirroring instructions
for how to clone and mirror all data and code used for this inbox