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Sun, 10 Feb 2019 17:01:14 -0800 Received: from shsmsx105.ccr.corp.intel.com (10.239.4.158) by FMSMSX114.amr.corp.intel.com (10.18.116.8) with Microsoft SMTP Server (TLS) id 14.3.408.0; Sun, 10 Feb 2019 17:01:13 -0800 Received: from shsmsx103.ccr.corp.intel.com ([169.254.4.194]) by SHSMSX105.ccr.corp.intel.com ([169.254.11.253]) with mapi id 14.03.0415.000; Mon, 11 Feb 2019 09:01:12 +0800 From: "You, Benjamin" To: Antoine Coeur , "edk2-devel@lists.01.org" Thread-Topic: [edk2] [PATCH] CorebootModulePkg: Fix various typos Thread-Index: AQHUvjzUXX64r+B4R0S7GNR05D5Ue6XZzgLg Date: Mon, 11 Feb 2019 01:01:11 +0000 Message-ID: References: In-Reply-To: Accept-Language: en-US X-MS-Has-Attach: X-MS-TNEF-Correlator: x-ctpclassification: CTP_NT x-titus-metadata-40: eyJDYXRlZ29yeUxhYmVscyI6IiIsIk1ldGFkYXRhIjp7Im5zIjoiaHR0cDpcL1wvd3d3LnRpdHVzLmNvbVwvbnNcL0ludGVsMyIsImlkIjoiYWI2YzExNzItNGE0NS00NzkwLWI5NmItNTY1ZTg1MzMxYTE1IiwicHJvcHMiOlt7Im4iOiJDVFBDbGFzc2lmaWNhdGlvbiIsInZhbHMiOlt7InZhbHVlIjoiQ1RQX05UIn1dfV19LCJTdWJqZWN0TGFiZWxzIjpbXSwiVE1DVmVyc2lvbiI6IjE3LjEwLjE4MDQuNDkiLCJUcnVzdGVkTGFiZWxIYXNoIjoiM21sXC9FcGY1Uit5UE5SSmRqU2xYRHFNdG95cmc2M2F4TTFvS3JOQ1R0WVdrRThHZWVpalZSV3l6ZFFYZWIwMDAifQ== dlp-product: dlpe-windows dlp-version: 11.0.400.15 dlp-reaction: no-action x-originating-ip: [10.239.127.40] MIME-Version: 1.0 Subject: Re: [PATCH] CorebootModulePkg: Fix various typos X-BeenThere: edk2-devel@lists.01.org X-Mailman-Version: 2.1.29 Precedence: list List-Id: EDK II Development List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , X-List-Received-Date: Mon, 11 Feb 2019 01:01:16 -0000 Content-Language: en-US Content-Type: text/plain; charset="us-ascii" Content-Transfer-Encoding: quoted-printable Reviewed-by: Benjamin You > -----Original Message----- > From: edk2-devel [mailto:edk2-devel-bounces@lists.01.org] On Behalf Of > Antoine Coeur > Sent: Thursday, February 7, 2019 12:47 AM > To: edk2-devel@lists.01.org > Subject: [edk2] [PATCH] CorebootModulePkg: Fix various typos >=20 > Fix various typos in CorebootModulePkg. >=20 > Contributed-under: TianoCore Contribution Agreement 1.1 > Signed-off-by: Coeur > --- > .../Include/Library/CbParseLib.h | 36 +++++++++---------- > .../BaseSerialPortLib16550.c | 12 +++---- > .../Library/CbParseLib/CbParseLib.c | 6 ++-- > .../SataControllerDxe/SataController.h | 2 +- > CorebootModulePkg/SecCore/FindPeiCore.c | 2 +- > CorebootModulePkg/SecCore/Ia32/Stack.S | 18 +++++----- > CorebootModulePkg/SecCore/Ia32/Stack.asm | 18 +++++----- > CorebootModulePkg/SecCore/Ia32/Stack.nasm | 2 +- > CorebootModulePkg/SecCore/SecMain.c | 14 ++++---- > CorebootModulePkg/SecCore/SecMain.h | 4 +-- > 10 files changed, 57 insertions(+), 57 deletions(-) >=20 > diff --git a/CorebootModulePkg/Include/Library/CbParseLib.h > b/CorebootModulePkg/Include/Library/CbParseLib.h > index 12dd4fa979..be39bd0923 100644 > --- a/CorebootModulePkg/Include/Library/CbParseLib.h > +++ b/CorebootModulePkg/Include/Library/CbParseLib.h > @@ -25,7 +25,7 @@ typedef RETURN_STATUS \ > @param Tag The tag id to be found >=20 > @retval NULL The Tag is not found. > - @retval Others The poiter to the record found. > + @retval Others The pointer to the record found. >=20 > **/ > VOID * > @@ -51,7 +51,7 @@ CbParseMemoryInfo ( > IN CB_MEM_INFO_CALLBACK MemInfoCallback, > IN VOID *pParam > ); > - > + > /** > Acquire the coreboot memory table with the given table id >=20 > @@ -67,11 +67,11 @@ CbParseMemoryInfo ( > RETURN_STATUS > EFIAPI > CbParseCbMemTable ( > - IN UINT32 TableId, > + IN UINT32 TableId, > IN VOID** pMemTable, > IN UINT32* pMemTableSize > ); > - > + > /** > Acquire the acpi table from coreboot >=20 > @@ -89,7 +89,7 @@ CbParseAcpiTable ( > IN VOID** pMemTable, > IN UINT32* pMemTableSize > ); > - > + > /** > Acquire the smbios table from coreboot >=20 > @@ -107,14 +107,14 @@ CbParseSmbiosTable ( > IN VOID** pMemTable, > IN UINT32* pMemTableSize > ); > - > + > /** > Find the required fadt information >=20 > @param pPmCtrlReg Pointer to the address of power management > control register > @param pPmTimerReg Pointer to the address of power management > timer register > @param pResetReg Pointer to the address of system reset regi= ster > - @param pResetValue Pointer to the value to be writen to the sy= stem > reset register > + @param pResetValue Pointer to the value to be written to the s= ystem > reset register > @param pPmEvtReg Pointer to the address of power management = event > register > @param pPmGpeEnReg Pointer to the address of power management = GPE > enable register >=20 > @@ -132,16 +132,16 @@ CbParseFadtInfo ( > IN UINTN* pPmEvtReg, > IN UINTN* pPmGpeEnReg > ); > - > + > /** > Find the serial port information >=20 > @param pRegBase Pointer to the base address of serial port = registers > @param pRegAccessType Pointer to the access type of serial port r= egisters > - @param pRegWidth Pointer to the register width in bytes > + @param pRegWidth Pointer to the register width in bytes > @param pBaudrate Pointer to the serial port baudrate > - @param pInputHertz Pointer to the input clock frequency > - @param pUartPciAddr Pointer to the UART PCI bus, dev and func a= ddress > + @param pInputHertz Pointer to the input clock frequency > + @param pUartPciAddr Pointer to the UART PCI bus, dev and func a= ddress >=20 > @retval RETURN_SUCCESS Successfully find the serial port informati= on. > @retval RETURN_NOT_FOUND Failed to find the serial port information = . > @@ -150,12 +150,12 @@ CbParseFadtInfo ( > RETURN_STATUS > EFIAPI > CbParseSerialInfo ( > - OUT UINT32 *pRegBase, > - OUT UINT32 *pRegAccessType, > - OUT UINT32 *pRegWidth, > - OUT UINT32 *pBaudrate, > - OUT UINT32 *pInputHertz, > - OUT UINT32 *pUartPciAddr > + OUT UINT32 *pRegBase, > + OUT UINT32 *pRegAccessType, > + OUT UINT32 *pRegWidth, > + OUT UINT32 *pBaudrate, > + OUT UINT32 *pInputHertz, > + OUT UINT32 *pUartPciAddr > ); >=20 > /** > @@ -174,7 +174,7 @@ CbParseGetCbHeader ( > IN UINTN Level, > IN VOID** HeaderPtr > ); > - > + > /** > Find the video frame buffer information >=20 > diff --git > a/CorebootModulePkg/Library/BaseSerialPortLib16550/BaseSerialPortLib16550= . > c > b/CorebootModulePkg/Library/BaseSerialPortLib16550/BaseSerialPortLib16550= . > c > index ca6db2306a..92514bb3a7 100644 > --- > a/CorebootModulePkg/Library/BaseSerialPortLib16550/BaseSerialPortLib16550= . > c > +++ > b/CorebootModulePkg/Library/BaseSerialPortLib16550/BaseSerialPortLib16550= . > c > @@ -23,7 +23,7 @@ > #include >=20 > // > -// PCI Defintions. > +// PCI Definitions. > // > #define PCI_BRIDGE_32_BIT_IO_SPACE 0x01 >=20 > @@ -451,7 +451,7 @@ SerialPortWritable ( > // 0 0 No cable connected. Transmit > // 0 1 No cable connected. Transmit > // 1 0 Cable connected, but not clear to send. Wait > - // 1 1 Cable connected, and clar to send. Transmit > + // 1 1 Cable connected, and clear to send. Transmit > // > return (BOOLEAN) ((SerialPortReadRegister (SerialRegisterBase, > R_UART_MSR) & (B_UART_MSR_DSR | B_UART_MSR_CTS)) !=3D > (B_UART_MSR_DSR)); > } > @@ -722,7 +722,7 @@ SerialPortRead ( > /** > Polls a serial device to see if there is any data waiting to be read. >=20 > - Polls aserial device to see if there is any data waiting to be read. > + Polls a serial device to see if there is any data waiting to be read. > If there is data waiting to be read from the serial device, then TRUE = is returned. > If there is no data waiting to be read from the serial device, then FA= LSE is > returned. >=20 > @@ -903,13 +903,13 @@ SerialPortGetControl ( > } >=20 > /** > - Sets the baud rate, receive FIFO depth, transmit/receice time out, par= ity, > + Sets the baud rate, receive FIFO depth, transmit/receive time out, par= ity, > data bits, and stop bits on a serial device. >=20 > @param BaudRate The requested baud rate. A BaudRate value of= 0 will > use the > device's default interface speed. > On output, the value actually set. > - @param ReveiveFifoDepth The requested depth of the FIFO on the recei= ve > side of the > + @param ReceiveFifoDepth The requested depth of the FIFO on the recei= ve > side of the > serial interface. A ReceiveFifoDepth value o= f 0 will use > the device's default FIFO depth. > On output, the value actually set. > @@ -922,7 +922,7 @@ SerialPortGetControl ( > DefaultParity will use the device's default = parity value. > On output, the value actually set. > @param DataBits The number of data bits to use on the serial= device. A > DataBits > - vaule of 0 will use the device's default dat= a bit setting. > + value of 0 will use the device's default dat= a bit setting. > On output, the value actually set. > @param StopBits The number of stop bits to use on this seria= l device. A > StopBits > value of DefaultStopBits will use the device= 's default number of > diff --git a/CorebootModulePkg/Library/CbParseLib/CbParseLib.c > b/CorebootModulePkg/Library/CbParseLib/CbParseLib.c > index da227dea5e..24eb2f5297 100644 > --- a/CorebootModulePkg/Library/CbParseLib/CbParseLib.c > +++ b/CorebootModulePkg/Library/CbParseLib/CbParseLib.c > @@ -31,7 +31,7 @@ >=20 > @param val The pointer to packed data. >=20 > - @return the UNIT64 value after convertion. > + @return the UNIT64 value after conversion. >=20 > **/ > UINT64 > @@ -91,7 +91,7 @@ CbCheckSum16 ( > @param Tag The tag id to be found >=20 > @retval NULL The Tag is not found. > - @retval Others The poiter to the record found. > + @retval Others The pointer to the record found. >=20 > **/ > VOID * > @@ -384,7 +384,7 @@ CbParseSmbiosTable ( > @param pPmCtrlReg Pointer to the address of power management > control register > @param pPmTimerReg Pointer to the address of power management > timer register > @param pResetReg Pointer to the address of system reset regi= ster > - @param pResetValue Pointer to the value to be writen to the sy= stem > reset register > + @param pResetValue Pointer to the value to be written to the s= ystem > reset register > @param pPmEvtReg Pointer to the address of power management = event > register > @param pPmGpeEnReg Pointer to the address of power management = GPE > enable register >=20 > diff --git a/CorebootModulePkg/SataControllerDxe/SataController.h > b/CorebootModulePkg/SataControllerDxe/SataController.h > index e76df748d7..9e555fb9e7 100644 > --- a/CorebootModulePkg/SataControllerDxe/SataController.h > +++ b/CorebootModulePkg/SataControllerDxe/SataController.h > @@ -91,7 +91,7 @@ typedef struct _EFI_SATA_CONTROLLER_PRIVATE_DATA { > UINT8 DeviceCount; >=20 > // > - // The highest disqulified mode for each attached device, > + // The highest disqualified mode for each attached device, > // From ATA/ATAPI spec, if a mode is not supported, > // the modes higher than it is also not supported > // > diff --git a/CorebootModulePkg/SecCore/FindPeiCore.c > b/CorebootModulePkg/SecCore/FindPeiCore.c > index 4ce032e72d..1d49168c24 100644 > --- a/CorebootModulePkg/SecCore/FindPeiCore.c > +++ b/CorebootModulePkg/SecCore/FindPeiCore.c > @@ -146,7 +146,7 @@ FindImageBase ( > /** > Find and return Pei Core entry point. >=20 > - It also find SEC and PEI Core file debug inforamtion. It will report t= hem if > + It also find SEC and PEI Core file debug information. It will report t= hem if > remote debug is enabled. >=20 > @param BootFirmwareVolumePtr Point to the boot firmware volume. > diff --git a/CorebootModulePkg/SecCore/Ia32/Stack.S > b/CorebootModulePkg/SecCore/Ia32/Stack.S > index cd492404a0..f3bd847f0c 100644 > --- a/CorebootModulePkg/SecCore/Ia32/Stack.S > +++ b/CorebootModulePkg/SecCore/Ia32/Stack.S > @@ -11,7 +11,7 @@ > # > # Abstract: > # > -# Switch the stack from temporary memory to permenent memory. > +# Switch the stack from temporary memory to permanent memory. > # > #-----------------------------------------------------------------------= ------- >=20 > @@ -36,20 +36,20 @@ ASM_PFX(SecSwitchStack): >=20 > # > # !!CAUTION!! this function address's is pushed into stack after > - # migration of whole temporary memory, so need save it to permenent > + # migration of whole temporary memory, so need save it to permanent > # memory at first! > # > movl 20(%esp), %ebx # Save the first parameter > movl 24(%esp), %ecx # Save the second parameter >=20 > # > - # Save this function's return address into permenent memory at first= . > - # Then, Fixup the esp point to permenent memory > + # Save this function's return address into permanent memory at first= . > + # Then, Fixup the esp point to permanent memory > # > movl %esp, %eax > subl %ebx, %eax > addl %ecx, %eax > - movl 0(%esp), %edx # copy pushed register's value to perme= nent > memory > + movl 0(%esp), %edx # copy pushed register's value to perma= nent > memory > movl %edx, 0(%eax) > movl 4(%esp), %edx > movl %edx, 4(%eax) > @@ -57,17 +57,17 @@ ASM_PFX(SecSwitchStack): > movl %edx, 8(%eax) > movl 12(%esp), %edx > movl %edx, 12(%eax) > - movl 16(%esp), %edx # Update this function's return address = into > permenent memory > + movl 16(%esp), %edx # Update this function's return address = into > permanent memory > movl %edx, 16(%eax) > - movl %eax, %esp # From now, esp is pointed to permenent = memory > + movl %eax, %esp # From now, esp is pointed to permanent = memory >=20 > # > - # Fixup the ebp point to permenent memory > + # Fixup the ebp point to permanent memory > # > movl %ebp, %eax > subl %ebx, %eax > addl %ecx, %eax > - movl %eax, %ebp # From now, ebp is pointed to permenent = memory > + movl %eax, %ebp # From now, ebp is pointed to permanent = memory >=20 > popl %edx > popl %ecx > diff --git a/CorebootModulePkg/SecCore/Ia32/Stack.asm > b/CorebootModulePkg/SecCore/Ia32/Stack.asm > index 9d1ed153e1..cdddc5433f 100644 > --- a/CorebootModulePkg/SecCore/Ia32/Stack.asm > +++ b/CorebootModulePkg/SecCore/Ia32/Stack.asm > @@ -11,7 +11,7 @@ > ; > ; Abstract: > ; > -; Switch the stack from temporary memory to permenent memory. > +; Switch the stack from temporary memory to permanent memory. > ; > ;-----------------------------------------------------------------------= ------- >=20 > @@ -38,7 +38,7 @@ SecSwitchStack PROC >=20 > ; > ; !!CAUTION!! this function address's is pushed into stack after > - ; migration of whole temporary memory, so need save it to permenent > + ; migration of whole temporary memory, so need save it to permanent > ; memory at first! > ; >=20 > @@ -46,13 +46,13 @@ SecSwitchStack PROC > mov ecx, [esp + 24] ; Save the second parameter >=20 > ; > - ; Save this function's return address into permenent memory at first= . > - ; Then, Fixup the esp point to permenent memory > + ; Save this function's return address into permanent memory at first= . > + ; Then, Fixup the esp point to permanent memory > ; > mov eax, esp > sub eax, ebx > add eax, ecx > - mov edx, dword ptr [esp] ; copy pushed register's value to= permenent > memory > + mov edx, dword ptr [esp] ; copy pushed register's value to= permanent > memory > mov dword ptr [eax], edx > mov edx, dword ptr [esp + 4] > mov dword ptr [eax + 4], edx > @@ -60,17 +60,17 @@ SecSwitchStack PROC > mov dword ptr [eax + 8], edx > mov edx, dword ptr [esp + 12] > mov dword ptr [eax + 12], edx > - mov edx, dword ptr [esp + 16] ; Update this function's return a= ddress into > permenent memory > + mov edx, dword ptr [esp + 16] ; Update this function's return a= ddress into > permanent memory > mov dword ptr [eax + 16], edx > - mov esp, eax ; From now, esp is pointed to per= menent memory > + mov esp, eax ; From now, esp is pointed to per= manent memory >=20 > ; > - ; Fixup the ebp point to permenent memory > + ; Fixup the ebp point to permanent memory > ; > mov eax, ebp > sub eax, ebx > add eax, ecx > - mov ebp, eax ; From now, ebp is pointed to permenen= t memory > + mov ebp, eax ; From now, ebp is pointed to permanen= t memory >=20 > pop edx > pop ecx > diff --git a/CorebootModulePkg/SecCore/Ia32/Stack.nasm > b/CorebootModulePkg/SecCore/Ia32/Stack.nasm > index f3362f6045..c04d2e08ac 100644 > --- a/CorebootModulePkg/SecCore/Ia32/Stack.nasm > +++ b/CorebootModulePkg/SecCore/Ia32/Stack.nasm > @@ -64,7 +64,7 @@ ASM_PFX(SecSwitchStack): > mov esp, eax ; From now, esp is pointed to perman= ent memory >=20 > ; > - ; Fixup the ebp point to permenent memory > + ; Fixup the ebp point to permanent memory > ; > mov eax, ebp > sub eax, ebx > diff --git a/CorebootModulePkg/SecCore/SecMain.c > b/CorebootModulePkg/SecCore/SecMain.c > index 7ce0463d98..8d27a8f37b 100644 > --- a/CorebootModulePkg/SecCore/SecMain.c > +++ b/CorebootModulePkg/SecCore/SecMain.c > @@ -1,5 +1,5 @@ > /** @file > - C funtions in SEC > + C functions in SEC >=20 > Copyright (c) 2013, Intel Corporation. All rights reserved.
> This program and the accompanying materials > @@ -57,7 +57,7 @@ SecStartupPhase2( >=20 >=20 > @param SizeOfRam Size of the temporary memory available for = use. > - @param TempRamBase Base address of tempory ram > + @param TempRamBase Base address of temporary ram > @param BootFirmwareVolume Base address of the Boot Firmware Volume. > **/ > VOID > @@ -100,7 +100,7 @@ SecStartup ( > // |-------------------|----> > // | | > // | | > - // | Heap | PeiTemporayRamSize > + // | Heap | PeiTemporaryRamSize > // | | > // | | > // |-------------------|----> TempRamBase > @@ -219,11 +219,11 @@ SecTemporaryRamSupport ( > // |-------------------|----> > // | Stack | PeiStackSize > // |-------------------|----> > - // | Heap | PeiTemporayRamSize > + // | Heap | PeiTemporaryRamSize > // |-------------------|----> TempRamBase > // > // |-------------------|----> > - // | Heap | PeiTemporayRamSize > + // | Heap | PeiTemporaryRamSize > // |-------------------|----> > // | Stack | PeiStackSize > // |-------------------|----> PermanentMemoryBase > @@ -276,8 +276,8 @@ SecTemporaryRamSupport ( >=20 > // > // SecSwitchStack function must be invoked after the memory migration > - // immediatly, also we need fixup the stack change caused by new call = into > - // permenent memory. > + // immediately, also we need fixup the stack change caused by new call= into > + // permanent memory. > // > SecSwitchStack ( > (UINT32) (UINTN) OldStack, > diff --git a/CorebootModulePkg/SecCore/SecMain.h > b/CorebootModulePkg/SecCore/SecMain.h > index 7bc991ab5f..77036b29ca 100644 > --- a/CorebootModulePkg/SecCore/SecMain.h > +++ b/CorebootModulePkg/SecCore/SecMain.h > @@ -91,7 +91,7 @@ SecTemporaryRamSupport ( > the control is transferred to this function. >=20 > @param SizeOfRam Size of the temporary memory available for = use. > - @param TempRamBase Base address of tempory ram > + @param TempRamBase Base address of temporary ram > @param BootFirmwareVolume Base address of the Boot Firmware Volume. > **/ > VOID > @@ -105,7 +105,7 @@ SecStartup ( > /** > Find and return Pei Core entry point. >=20 > - It also find SEC and PEI Core file debug inforamtion. It will report t= hem if > + It also find SEC and PEI Core file debug information. It will report t= hem if > remote debug is enabled. >=20 > @param BootFirmwareVolumePtr Point to the boot firmware volume. > -- > 2.17.2 (Apple Git-113) >=20 > _______________________________________________ > edk2-devel mailing list > edk2-devel@lists.01.org > https://lists.01.org/mailman/listinfo/edk2-devel