From mboxrd@z Thu Jan 1 00:00:00 1970 Received: from loongson.cn (loongson.cn [114.242.206.163]) by mx.groups.io with SMTP id smtpd.web08.5016.1663917704004412735 for ; Fri, 23 Sep 2022 00:21:45 -0700 Authentication-Results: mx.groups.io; dkim=missing; spf=pass (domain: loongson.cn, ip: 114.242.206.163, mailfrom: lichao@loongson.cn) Received: from lichao-PC (unknown [10.40.24.149]) by localhost.localdomain (Coremail) with SMTP id AQAAf8CxT+CGXi1jj4sgAA--.57645S2; Fri, 23 Sep 2022 15:21:42 +0800 (CST) Date: Fri, 23 Sep 2022 15:21:42 +0800 From: "Chao Li" To: Michael D Kinney , Liming Gao , Zhiguang Liu , Baoqi Zhang Cc: "=?utf-8?Q?devel=40edk2.groups.io?=" Message-ID: In-Reply-To: <20220914094144.3697283-1-lichao@loongson.cn> References: <20220914094144.3697283-1-lichao@loongson.cn> Subject: Re: [PATCH v2 28/34] MdePkg/BaseSynchronizationLib: LoongArch cache related code. X-Mailer: Mailspring MIME-Version: 1.0 X-CM-TRANSID: AQAAf8CxT+CGXi1jj4sgAA--.57645S2 X-Coremail-Antispam: 1UD129KBjvJXoWxKrW8uF4xXFyDWF13Cw4Uurg_yoW3tw1rpr WxtrWkKan2gw45GFy8J395GF1rAws2gw4UKFZYyw10k3s0qrykZrsYqr48Kr48Zw17Ww18 WFy3KF4rua1UAFJanT9S1TB71UUUUUUqnTZGkaVYY2UrUUUUjbIjqfuFe4nvWSU5nxnvy2 9KBjDU0xBIdaVrnRJUUUBlb7Iv0xC_Kw4lb4IE77IF4wAFF20E14v26r1j6r4UM7CY07I2 0VC2zVCF04k26cxKx2IYs7xG6rWj6s0DM7CIcVAFz4kK6r1j6r18M28lY4IEw2IIxxk0rw A2F7IY1VAKz4vEj48ve4kI8wA2z4x0Y4vE2Ix0cI8IcVAFwI0_Xr0_Ar1l84ACjcxK6xII jxv20xvEc7CjxVAFwI0_Cr0_Gr1UM28EF7xvwVC2z280aVAFwI0_Cr1j6rxdM28EF7xvwV C2z280aVCY1x0267AKxVW0oVCq3wAS0I0E0xvYzxvE52x082IY62kv0487Mc02F40Eb7x2 x7xS6r1j6r4UMc02F40EFcxC0VAKzVAqx4xG6I80ewAqx4xG64kEw2xG04xIwI0_Gr0_Xr 1lYx0E2Ix0cI8IcVAFwI0_JF0_Jw1lYx0Ex4A2jsIE14v26r4j6F4UMcvjeVCFs4IE7xkE bVWUJVW8JwACjcxG0xvY0x0EwIxGrwCjr7xvwVCIw2I0I7xG6c02F41lc2xSY4AK6svPMx AIw28IcxkI7VAKI48JMxC20s026xCaFVCjc4AY6r1j6r4UMI8I3I0E5I8CrVAFwI0_JrI_ JrWlx2IqxVCjr7xvwVAFwI0_JrI_JrWlx4CE17CEb7AF67AKxVWUAVWUtwCIc40Y0x0EwI xGrwCI42IY6xIIjxv20xvE14v26r1I6r4UMIIF0xvE2Ix0cI8IcVCY1x0267AKxVW8JVWx JwCI42IY6xAIw20EY4v20xvaj40_Jr0_JF4lIxAIcVC2z280aVAFwI0_Gr0_Cr1lIxAIcV C2z280aVCY1x0267AKxVW8JVW8JrUvcSsGvfC2KfnxnUUI43ZEXa7IU5ZL07UUUUU== X-CM-SenderInfo: xolfxt3r6o00pqjv00gofq/1tbiAQASCGMsUF0TtQAgsf Content-Type: multipart/alternative; boundary="632d5e86_3687602_dbe1" --632d5e86_3687602_dbe1 Content-Type: text/plain; charset="utf-8" Content-Transfer-Encoding: quoted-printable Content-Disposition: inline Hi Mike, Liming and Zhiguang, This patch has not been reviewed, would you please review it=3F Thanks, Chao -------- On 9=E6=9C=88 14 2022, at 5:41 =E4=B8=8B=E5=8D=88, Chao Li wrote: > RE=46: https://bugzilla.tianocore.org/show=5Fbug.cgi=3Fid=3D4053 > > Support LoongArch cache related functions. > Cc: Michael D Kinney > Cc: Liming Gao > Cc: Zhiguang Liu > > Signed-off-by: Chao Li > Co-authored-by: Baoqi Zhang > --- > .../BaseSynchronizationLib.inf =7C 5 + > .../LoongArch64/Synchronization.c =7C 246 ++++++++++++++++++ > 2 files changed, 251 insertions(+) > create mode 100644 MdePkg/Library/BaseSynchronizationLib/LoongArch64/Sy= nchronization.c > > diff --git a/MdePkg/Library/BaseSynchronizationLib/BaseSynchronizationL= ib.inf b/MdePkg/Library/BaseSynchronizationLib/BaseSynchronizationLib.inf= > index 02ba12961a..10021f3352 100755 > --- a/MdePkg/Library/BaseSynchronizationLib/BaseSynchronizationLib.inf > +++ b/MdePkg/Library/BaseSynchronizationLib/BaseSynchronizationLib.inf > =40=40 -4,6 +4,7 =40=40 > =23 Copyright (c) 2007 - 2018, Intel Corporation. All rights reserved.<= BR> > > =23 Portions copyright (c) 2008 - 2009, Apple Inc. All rights reserved.=
> =23 Copyright (c) 2020, Hewlett Packard Enterprise Development LP. All = rights reserved.
> +=23 Copyright (c) 2022, Loongson Technology Corporation Limited. All r= ights reserved.
> =23 > =23 SPDX-License-Identifier: BSD-2-Clause-Patent > =23 > =40=40 -82,6 +83,10 =40=40 > Synchronization.c > > RiscV64/Synchronization.S > > > +=5BSources.LOONGARCH64=5D > + Synchronization.c > + LoongArch64/Synchronization.c > + > =5BPackages=5D > MdePkg/MdePkg.dec > > > diff --git a/MdePkg/Library/BaseSynchronizationLib/LoongArch64/Synchron= ization.c b/MdePkg/Library/BaseSynchronizationLib/LoongArch64/Synchroniza= tion.c > new file mode 100644 > index 0000000000..b7789f3212 > --- /dev/null > +++ b/MdePkg/Library/BaseSynchronizationLib/LoongArch64/Synchronization= .c > =40=40 -0,0 +1,246 =40=40 > +/** =40file > > + LoongArch synchronization functions. > + > + Copyright (c) 2022, Loongson Technology Corporation Limited. All righ= ts reserved.
> + > + SPDX-License-Identifier: BSD-2-Clause-Patent > + > +**/ > + > +=23include > + > +/** > + Performs an atomic compare exchange operation on a 16-bit > + unsigned integer. > + > + Performs an atomic compare exchange operation on the 16-bit > + unsigned integer specified by Value. If Value is equal to > + CompareValue, then Value is set to ExchangeValue and > + CompareValue is returned. If Value is not equal to > + CompareValue, then Value is returned. The compare exchange > + operation must be performed using MP safe mechanisms. > + > + =40param=5Bin=5D Value A pointer to the 16-bit value for the > + compare exchange operation. > + =40param=5Bin=5D CompareValue 16-bit value used in compare operation.= > + =40param=5Bin=5D ExchangeValue 16-bit value used in exchange operatio= n. > + > + =40return The original *Value before exchange. > + > +**/ > +UINT16 > +E=46IAPI > +InternalSyncCompareExchange16 ( > + IN volatile UINT16 *Value, > + IN UINT16 CompareValue, > + IN UINT16 ExchangeValue > + ) > +=7B > + UINT32 RetValue; > + UINT32 Temp; > + UINT32 Shift; > + UINT64 Mask; > + UINT64 LocalCompareValue; > + UINT64 LocalExchangeValue; > + volatile UINT32 *Ptr32; > + > + /* Check that ptr is naturally aligned */ > + ASSERT (=21((UINT64)Value & (sizeof (Value) - 1))); > + > + /* Mask inputs to the correct size. */ > + Mask =3D (((=7E0UL) - (1UL << (0)) + 1) & (=7E0UL >> (64 - 1 - ((size= of (UINT16) * 8) - 1)))); > + LocalCompareValue =3D ((UINT64)CompareValue) & Mask; > + LocalExchangeValue =3D ((UINT64)ExchangeValue) & Mask; > + > + /* > + * Calculate a shift & mask that correspond to the value we wish to > + * compare & exchange within the naturally aligned 4 byte integer > + * that includes it. > + */ > + Shift =3D (UINT64)Value & 0x3; > + Shift *=3D 8; /* BITS=5FPER=5FBYTE */ > + LocalCompareValue <<=3D Shift; > + LocalExchangeValue <<=3D Shift; > + Mask <<=3D Shift; > + > + /* > + * Calculate a pointer to the naturally aligned 4 byte integer that > + * includes our byte of interest, and load its value. > + */ > + Ptr32 =3D (UINT32 *)((UINT64)Value & =7E0x3); > + > + =5F=5Fasm=5F=5F =5F=5Fvolatile=5F=5F ( > + =221: =5Cn=22 > + =22ll.w %0, %3 =5Cn=22 > + =22and %1, %0, %4 =5Cn=22 > + =22bne %1, %5, 2f =5Cn=22 > + =22andn %1, %0, %4 =5Cn=22 > + =22or %1, %1, %6 =5Cn=22 > + =22sc.w %1, %2 =5Cn=22 > + =22beqz %1, 1b =5Cn=22 > + =22b 3f =5Cn=22 > + =222: =5Cn=22 > + =22dbar 0 =5Cn=22 > + =223: =5Cn=22 > + : =22=3D&r=22 (RetValue), =22=3D&r=22 (Temp), =22=3D=22 =22ZC=22 (*Pt= r32) > + : =22ZC=22 (*Ptr32), =22Jr=22 (Mask), =22Jr=22 (LocalCompareValue), =22= Jr=22 (LocalExchangeValue) > + : =22memory=22 > + ); > + > + return (RetValue & Mask) >> Shift; > +=7D > + > +/** > + Performs an atomic compare exchange operation on a 32-bit > + unsigned integer. > + > + Performs an atomic compare exchange operation on the 32-bit > + unsigned integer specified by Value. If Value is equal to > + CompareValue, then Value is set to ExchangeValue and > + CompareValue is returned. If Value is not equal to > + CompareValue, then Value is returned. The compare exchange > + operation must be performed using MP safe mechanisms. > + > + =40param=5Bin=5D Value A pointer to the 32-bit value for the > + compare exchange operation. > + =40param=5Bin=5D CompareValue 32-bit value used in compare operation.= > + =40param=5Bin=5D ExchangeValue 32-bit value used in exchange operatio= n. > + > + =40return The original *Value before exchange. > + > +**/ > +UINT32 > +E=46IAPI > +InternalSyncCompareExchange32 ( > + IN volatile UINT32 *Value, > + IN UINT32 CompareValue, > + IN UINT32 ExchangeValue > + ) > +=7B > + UINT32 RetValue; > + > + =5F=5Fasm=5F=5F =5F=5Fvolatile=5F=5F ( > + =221: =5Cn=22 > + =22ll.w %0, %2 =5Cn=22 > + =22bne %0, %3, 2f =5Cn=22 > + =22move %0, %4 =5Cn=22 > + =22sc.w %0, %1 =5Cn=22 > + =22beqz %0, 1b =5Cn=22 > + =22b 3f =5Cn=22 > + =222: =5Cn=22 > + =22dbar 0 =5Cn=22 > + =223: =5Cn=22 > + : =22=3D&r=22 (RetValue), =22=3D=22 =22ZC=22 (*Value) > + : =22ZC=22 (*Value), =22Jr=22 (CompareValue), =22Jr=22 (ExchangeValue= ) > + : =22memory=22 > + ); > + return RetValue; > +=7D > + > +/** > + Performs an atomic compare exchange operation on a 64-bit unsigned in= teger. > + > + Performs an atomic compare exchange operation on the 64-bit unsigned = integer specified > + by Value. If Value is equal to CompareValue, then Value is set to Exc= hangeValue and > + CompareValue is returned. If Value is not equal to CompareValue, then= Value is returned. > + The compare exchange operation must be performed using MP safe mechan= isms. > + > + =40param=5Bin=5D Value A pointer to the 64-bit value for the compare = exchange > + operation. > + =40param=5Bin=5D CompareValue 64-bit value used in compare operation.= > + =40param=5Bin=5D ExchangeValue 64-bit value used in exchange operatio= n. > + > + =40return The original *Value before exchange. > + > +**/ > +UINT64 > +E=46IAPI > +InternalSyncCompareExchange64 ( > + IN volatile UINT64 *Value, > + IN UINT64 CompareValue, > + IN UINT64 ExchangeValue > + ) > +=7B > + UINT64 RetValue; > + > + =5F=5Fasm=5F=5F =5F=5Fvolatile=5F=5F ( > + =221: =5Cn=22 > + =22ll.d %0, %2 =5Cn=22 > + =22bne %0, %3, 2f =5Cn=22 > + =22move %0, %4 =5Cn=22 > + =22sc.d %0, %1 =5Cn=22 > + =22beqz %0, 1b =5Cn=22 > + =22b 3f =5Cn=22 > + =222: =5Cn=22 > + =22dbar 0 =5Cn=22 > + =223: =5Cn=22 > + : =22=3D&r=22 (RetValue), =22=3D=22 =22ZC=22 (*Value) > + : =22ZC=22 (*Value), =22Jr=22 (CompareValue), =22Jr=22 (ExchangeValue= ) > + : =22memory=22 > + ); > + return RetValue; > +=7D > + > +/** > + Performs an atomic increment of an 32-bit unsigned integer. > + > + Performs an atomic increment of the 32-bit unsigned integer specified= by > + Value and returns the incremented value. The increment operation must= be > + performed using MP safe mechanisms. The state of the return value is = not > + guaranteed to be MP safe. > + > + =40param=5Bin=5D Value A pointer to the 32-bit value to increment. > + > + =40return The incremented value. > + > +**/ > +UINT32 > +E=46IAPI > +InternalSyncIncrement ( > + IN volatile UINT32 *Value > + ) > +=7B > + UINT32 Temp; > + > + Temp =3D *Value; > + =5F=5Fasm=5F=5F =5F=5Fvolatile=5F=5F ( > + =22dbar 0 =5Cn=22 > + =22amadd.w %1, %2, %0 =5Cn=22 > + : =22+ZB=22 (*Value), =22=3D&r=22 (Temp) > + : =22r=22 (1) > + : =22memory=22 > + ); > + return *Value; > +=7D > + > +/** > + Performs an atomic decrement of an 32-bit unsigned integer. > + > + Performs an atomic decrement of the 32-bit unsigned integer specified= by > + Value and returns the decrement value. The decrement operation must b= e > + performed using MP safe mechanisms. The state of the return value is = not > + guaranteed to be MP safe. > + > + =40param=5Bin=5D Value A pointer to the 32-bit value to decrement. > + > + =40return The decrement value. > + > +**/ > +UINT32 > +E=46IAPI > +InternalSyncDecrement ( > + IN volatile UINT32 *Value > + ) > +=7B > + UINT32 Temp; > + > + Temp =3D *Value; > + =5F=5Fasm=5F=5F =5F=5Fvolatile=5F=5F ( > + =22dbar 0 =5Cn=22 > + =22amadd.w %1, %2, %0 =5Cn=22 > + : =22+ZB=22 (*Value), =22=3D&r=22 (Temp) > + : =22r=22 (-1) > + : =22memory=22 > + ); > + return *Value; > +=7D > -- > 2.27.0 > --632d5e86_3687602_dbe1 Content-Type: text/html; charset="utf-8" Content-Transfer-Encoding: quoted-printable Content-Disposition: inline
Hi Mike, Liming and Zhiguang,
This patch has not been reviewed, would you= please review it=3F


Thanks,<= br>Chao
--------

On 9=E6=9C=88 14 2022, at 5:41 =E4=B8=8B=E5=8D=88,= Chao Li <lichao=40loongson.cn> wrote:
R= E=46: https://bugzilla.tianocore.org/show=5Fbug.cgi=3Fid=3D4053

=
Support LoongArch cache related functions.

Cc: Michael= D Kinney <michael.d.kinney=40intel.com>
Cc: Liming Gao &= lt;gaoliming=40byosoft.com.cn>
Cc: Zhiguang Liu <zhiguang= .liu=40intel.com>

Signed-off-by: Chao Li <lichao=40lo= ongson.cn>
Co-authored-by: Baoqi Zhang <zhangbaoqi=40loon= gson.cn>
---
.../BaseSynchronizationLib.inf =7C 5 = +
.../LoongArch64/Synchronization.c =7C 246 ++++++++++++++++++<= /div>
2 files changed, 251 insertions(+)
create mode 100644= MdePkg/Library/BaseSynchronizationLib/LoongArch64/Synchronization.c
diff --git a/MdePkg/Library/BaseSynchronizationLib/BaseSynchron= izationLib.inf b/MdePkg/Library/BaseSynchronizationLib/BaseSynchronizatio= nLib.inf
index 02ba12961a..10021f3352 100755
--- a/Md= ePkg/Library/BaseSynchronizationLib/BaseSynchronizationLib.inf
= +++ b/MdePkg/Library/BaseSynchronizationLib/BaseSynchronizationLib.inf
=40=40 -4,6 +4,7 =40=40
=23 Copyright (c) 2007 - 2018, = Intel Corporation. All rights reserved.<BR>

=23 Porti= ons copyright (c) 2008 - 2009, Apple Inc. All rights reserved.<BR><= /div>
=23 Copyright (c) 2020, Hewlett Packard Enterprise Developm= ent LP. All rights reserved.<BR>

+=23 Copyright (c) 2= 022, Loongson Technology Corporation Limited. All rights reserved.<BR&= gt;

=23

=23 SPDX-License-Identifier: BSD-2-Cl= ause-Patent

=23

=40=40 -82,6 +83,10 =40=40
Synchronization.c

RiscV64/Synchronization.S


+=5BSources.LOONGARCH64=5D

+ Synchronization= .c

+ LoongArch64/Synchronization.c

+
=5BPackages=5D

MdePkg/MdePkg.dec



diff --git a/MdePkg/Library/BaseSynchronizationLib/LoongArch64/Synchron= ization.c b/MdePkg/Library/BaseSynchronizationLib/LoongArch64/Synchroniza= tion.c
new file mode 100644
index 0000000000..b7789f3= 212
--- /dev/null
+++ b/MdePkg/Library/BaseSynchroniz= ationLib/LoongArch64/Synchronization.c
=40=40 -0,0 +1,246 =40=40=
+/** =40file

+ LoongArch synchronization functio= ns.

+

+ Copyright (c) 2022, Loongson Technolo= gy Corporation Limited. All rights reserved.<BR>

+
+ SPDX-License-Identifier: BSD-2-Clause-Patent

= +

+**/

+

+=23include <Librar= y/DebugLib.h>

+

+/**

+ Perfo= rms an atomic compare exchange operation on a 16-bit

+ unsi= gned integer.

+

+ Performs an atomic compare = exchange operation on the 16-bit

+ unsigned integer specifi= ed by Value. If Value is equal to

+ CompareValue, then Valu= e is set to ExchangeValue and

+ CompareValue is returned. I= f Value is not equal to

+ CompareValue, then Value is retur= ned. The compare exchange

+ operation must be performed usi= ng MP safe mechanisms.

+

+ =40param=5Bin=5D V= alue A pointer to the 16-bit value for the

+ compare exchan= ge operation.

+ =40param=5Bin=5D CompareValue 16-bit value = used in compare operation.

+ =40param=5Bin=5D ExchangeValue= 16-bit value used in exchange operation.

+

+= =40return The original *Value before exchange.

+

=
+**/

+UINT16

+E=46IAPI

+In= ternalSyncCompareExchange16 (

+ IN volatile UINT16 *Value,<= /div>
+ IN UINT16 CompareValue,

+ IN UINT16 Exchang= eValue

+ )

+=7B

+ UINT32 RetVal= ue;

+ UINT32 Temp;

+ UINT32 Shift;

<= div>+ UINT64 Mask;

+ UINT64 LocalCompareValue;

+ UINT64 LocalExchangeValue;

+ volatile UINT32 *Ptr32;
+

+ /* Check that ptr is naturally aligned */
+ ASSERT (=21((UINT64)Value & (sizeof (Value) - 1)));
+

+ /* Mask inputs to the correct size. */
+ Mask =3D (((=7E0UL) - (1UL << (0)) + 1) & (=7E0UL &= gt;> (64 - 1 - ((sizeof (UINT16) * 8) - 1))));

+ LocalCo= mpareValue =3D ((UINT64)CompareValue) & Mask;

+ LocalEx= changeValue =3D ((UINT64)ExchangeValue) & Mask;

+
=
+ /*

+ * Calculate a shift & mask that corresp= ond to the value we wish to

+ * compare & exchange with= in the naturally aligned 4 byte integer

+ * that includes i= t.

+ */

+ Shift =3D (UINT64)Value & 0x3;<= /div>
+ Shift *=3D 8; /* BITS=5FPER=5FBYTE */

+ Loc= alCompareValue <<=3D Shift;

+ LocalExchangeValue <= <=3D Shift;

+ Mask <<=3D Shift;

+
+ /*

+ * Calculate a pointer to the naturally a= ligned 4 byte integer that

+ * includes our byte of interes= t, and load its value.

+ */

+ Ptr32 =3D (UINT= 32 *)((UINT64)Value & =7E0x3);

+

+ =5F=5F= asm=5F=5F =5F=5Fvolatile=5F=5F (

+ =221: =5Cn=22

<= div>+ =22ll.w %0, %3 =5Cn=22

+ =22and %1, %0, %4 =5Cn=22
+ =22bne %1, %5, 2f =5Cn=22

+ =22andn %1, %0, %= 4 =5Cn=22

+ =22or %1, %1, %6 =5Cn=22

+ =22sc.= w %1, %2 =5Cn=22

+ =22beqz %1, 1b =5Cn=22

+ =22= b 3f =5Cn=22

+ =222: =5Cn=22

+ =22dbar 0 =5Cn= =22

+ =223: =5Cn=22

+ : =22=3D&r=22 (RetV= alue), =22=3D&r=22 (Temp), =22=3D=22 =22ZC=22 (*Ptr32)

= + : =22ZC=22 (*Ptr32), =22Jr=22 (Mask), =22Jr=22 (LocalCompareValue), =22= Jr=22 (LocalExchangeValue)

+ : =22memory=22

+= );

+

+ return (RetValue & Mask) >>= Shift;

+=7D

+

+/**

+ Performs an atomic compare exchange operation on a 32-bit

<= div>+ unsigned integer.

+

+ Performs an atomi= c compare exchange operation on the 32-bit

+ unsigned integ= er specified by Value. If Value is equal to

+ CompareValue,= then Value is set to ExchangeValue and

+ CompareValue is r= eturned. If Value is not equal to

+ CompareValue, then Valu= e is returned. The compare exchange

+ operation must be per= formed using MP safe mechanisms.

+

+ =40param= =5Bin=5D Value A pointer to the 32-bit value for the

+ comp= are exchange operation.

+ =40param=5Bin=5D CompareValue 32-= bit value used in compare operation.

+ =40param=5Bin=5D Exc= hangeValue 32-bit value used in exchange operation.

+
=
+ =40return The original *Value before exchange.

+=

+**/

+UINT32

+E=46IAPI
+InternalSyncCompareExchange32 (

+ IN volatile UINT3= 2 *Value,

+ IN UINT32 CompareValue,

+ IN UINT= 32 ExchangeValue

+ )

+=7B

+ UIN= T32 RetValue;

+

+ =5F=5Fasm=5F=5F =5F=5Fvolat= ile=5F=5F (

+ =221: =5Cn=22

+ =22ll.w %0, %2 = =5Cn=22

+ =22bne %0, %3, 2f =5Cn=22

+ =22move= %0, %4 =5Cn=22

+ =22sc.w %0, %1 =5Cn=22

+ =22= beqz %0, 1b =5Cn=22

+ =22b 3f =5Cn=22

+ =222:= =5Cn=22

+ =22dbar 0 =5Cn=22

+ =223: =5Cn=22<= /div>
+ : =22=3D&r=22 (RetValue), =22=3D=22 =22ZC=22 (*Value)=

+ : =22ZC=22 (*Value), =22Jr=22 (CompareValue), =22Jr=22 (= ExchangeValue)

+ : =22memory=22

+ );
+ return RetValue;

+=7D

+

+/**

+ Performs an atomic compare exchange operation on a = 64-bit unsigned integer.

+

+ Performs an atom= ic compare exchange operation on the 64-bit unsigned integer specified
+ by Value. If Value is equal to CompareValue, then Value is = set to ExchangeValue and

+ CompareValue is returned. If Val= ue is not equal to CompareValue, then Value is returned.

+ = The compare exchange operation must be performed using MP safe mechanisms= .

+

+ =40param=5Bin=5D Value A pointer to the= 64-bit value for the compare exchange

+ operation.
+ =40param=5Bin=5D CompareValue 64-bit value used in compare opera= tion.

+ =40param=5Bin=5D ExchangeValue 64-bit value used in= exchange operation.

+

+ =40return The origin= al *Value before exchange.

+

+**/

+UINT64

+E=46IAPI

+InternalSyncCompareExch= ange64 (

+ IN volatile UINT64 *Value,

+ IN UI= NT64 CompareValue,

+ IN UINT64 ExchangeValue

= + )

+=7B

+ UINT64 RetValue;

+
+ =5F=5Fasm=5F=5F =5F=5Fvolatile=5F=5F (

+ =22= 1: =5Cn=22

+ =22ll.d %0, %2 =5Cn=22

+ =22bne = %0, %3, 2f =5Cn=22

+ =22move %0, %4 =5Cn=22

+= =22sc.d %0, %1 =5Cn=22

+ =22beqz %0, 1b =5Cn=22

<= div>+ =22b 3f =5Cn=22

+ =222: =5Cn=22

+ =22db= ar 0 =5Cn=22

+ =223: =5Cn=22

+ : =22=3D&r= =22 (RetValue), =22=3D=22 =22ZC=22 (*Value)

+ : =22ZC=22 (*= Value), =22Jr=22 (CompareValue), =22Jr=22 (ExchangeValue)

+= : =22memory=22

+ );

+ return RetValue;
=
+=7D

+

+/**

+ Performs= an atomic increment of an 32-bit unsigned integer.

+
=
+ Performs an atomic increment of the 32-bit unsigned integer sp= ecified by

+ Value and returns the incremented value. The i= ncrement operation must be

+ performed using MP safe mechan= isms. The state of the return value is not

+ guaranteed to = be MP safe.

+

+ =40param=5Bin=5D Value A poin= ter to the 32-bit value to increment.

+

+ =40= return The incremented value.

+

+**/
+UINT32

+E=46IAPI

+InternalSyncIncremen= t (

+ IN volatile UINT32 *Value

+ )

=
+=7B

+ UINT32 Temp;

+

+ Te= mp =3D *Value;

+ =5F=5Fasm=5F=5F =5F=5Fvolatile=5F=5F (
+ =22dbar 0 =5Cn=22

+ =22amadd.w %1, %2, %0 =5Cn= =22

+ : =22+ZB=22 (*Value), =22=3D&r=22 (Temp)
+ : =22r=22 (1)

+ : =22memory=22

+ );
+ return *Value;

+=7D

+
+/**

+ Performs an atomic decrement of an 32-bit unsi= gned integer.

+

+ Performs an atomic decremen= t of the 32-bit unsigned integer specified by

+ Value and r= eturns the decrement value. The decrement operation must be

+ performed using MP safe mechanisms. The state of the return value is n= ot

+ guaranteed to be MP safe.

+

+ =40param=5Bin=5D Value A pointer to the 32-bit value to decrement.
+

+ =40return The decrement value.

+

+**/

+UINT32

+E=46IAPI
+InternalSyncDecrement (

+ IN volatile UINT32 *Va= lue

+ )

+=7B

+ UINT32 Temp;
+

+ Temp =3D *Value;

+ =5F=5Fasm=5F= =5F =5F=5Fvolatile=5F=5F (

+ =22dbar 0 =5Cn=22

+ =22amadd.w %1, %2, %0 =5Cn=22

+ : =22+ZB=22 (*Value), =22= =3D&r=22 (Temp)

+ : =22r=22 (-1)

+ : =22m= emory=22

+ );

+ return *Value;

= +=7D

--
2.27.0
--632d5e86_3687602_dbe1--