From mboxrd@z Thu Jan 1 00:00:00 1970 Return-Path: Received-SPF: Pass (sender SPF authorized) identity=mailfrom; client-ip=192.55.52.88; helo=mga01.intel.com; envelope-from=jiewen.yao@intel.com; receiver=edk2-devel@lists.01.org Received: from mga01.intel.com (mga01.intel.com [192.55.52.88]) (using TLSv1.2 with cipher ECDHE-RSA-AES256-GCM-SHA384 (256/256 bits)) (No client certificate requested) by ml01.01.org (Postfix) with ESMTPS id C66E321175052 for ; Tue, 5 Jun 2018 06:21:24 -0700 (PDT) X-Amp-Result: SKIPPED(no attachment in message) X-Amp-File-Uploaded: False Received: from fmsmga007.fm.intel.com ([10.253.24.52]) by fmsmga101.fm.intel.com with ESMTP/TLS/DHE-RSA-AES256-GCM-SHA384; 05 Jun 2018 06:21:24 -0700 X-ExtLoop1: 1 X-IronPort-AV: E=Sophos;i="5.49,478,1520924400"; d="scan'208";a="44795030" Received: from fmsmsx108.amr.corp.intel.com ([10.18.124.206]) by fmsmga007.fm.intel.com with ESMTP; 05 Jun 2018 06:21:23 -0700 Received: from fmsmsx116.amr.corp.intel.com (10.18.116.20) by FMSMSX108.amr.corp.intel.com (10.18.124.206) with Microsoft SMTP Server (TLS) id 14.3.319.2; Tue, 5 Jun 2018 06:21:23 -0700 Received: from shsmsx152.ccr.corp.intel.com (10.239.6.52) by fmsmsx116.amr.corp.intel.com (10.18.116.20) with Microsoft SMTP Server (TLS) id 14.3.319.2; Tue, 5 Jun 2018 06:21:23 -0700 Received: from shsmsx102.ccr.corp.intel.com ([169.254.2.223]) by SHSMSX152.ccr.corp.intel.com ([169.254.6.70]) with mapi id 14.03.0319.002; Tue, 5 Jun 2018 21:21:21 +0800 From: "Yao, Jiewen" To: "Zeng, Star" CC: "edk2-devel@lists.01.org" Thread-Topic: [PATCH] IntelSiliconPkg IntelVTdDxe: Fix incorrect code to clear VTd error Thread-Index: AQHT/KRC63U3fCB7z0uyovht3Ay0zqRRpujl Date: Tue, 5 Jun 2018 13:21:21 +0000 Message-ID: References: <1528186006-55192-1-git-send-email-star.zeng@intel.com> In-Reply-To: <1528186006-55192-1-git-send-email-star.zeng@intel.com> Accept-Language: zh-CN, en-US X-MS-Has-Attach: X-MS-TNEF-Correlator: MIME-Version: 1.0 Subject: Re: [PATCH] IntelSiliconPkg IntelVTdDxe: Fix incorrect code to clear VTd error X-BeenThere: edk2-devel@lists.01.org X-Mailman-Version: 2.1.26 Precedence: list List-Id: EDK II Development List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , X-List-Received-Date: Tue, 05 Jun 2018 13:21:25 -0000 Content-Language: zh-CN Content-Type: text/plain; charset="iso-2022-jp" Content-Transfer-Encoding: quoted-printable Thanks to fix it. Reviewed by: jiewen.yao@intel.com thank you! Yao, Jiewen > =1B$B:_=1B(B 2018=1B$BG/=1B(B6=1B$B7n=1B(B5=1B$BF|!$>e8a=1B(B1:07=1B$B!$= =1B(BZeng, Star =1B$B=20 > According to VTd spec, Software writes the value read from this > field (F) to Clear it. But current code is using 0 to clear the > field, that is incorrect. >=20 > And R_FSTS_REG register value clearing should be not in the for loop. >=20 > Cc: Jiewen Yao > Contributed-under: TianoCore Contribution Agreement 1.1 > Signed-off-by: Star Zeng > --- > IntelSiliconPkg/Feature/VTd/IntelVTdDxe/VtdReg.c | 6 ++++-- > 1 file changed, 4 insertions(+), 2 deletions(-) >=20 > diff --git a/IntelSiliconPkg/Feature/VTd/IntelVTdDxe/VtdReg.c b/IntelSili= conPkg/Feature/VTd/IntelVTdDxe/VtdReg.c > index 8dbc83fa2d67..e564d373c756 100644 > --- a/IntelSiliconPkg/Feature/VTd/IntelVTdDxe/VtdReg.c > +++ b/IntelSiliconPkg/Feature/VTd/IntelVTdDxe/VtdReg.c > @@ -554,11 +554,13 @@ DumpVtdIfError ( > for (Index =3D 0; Index < (UINTN)CapReg.Bits.NFR + 1; Index++) { > FrcdReg.Uint64[1] =3D MmioRead64 (mVtdUnitInformation[Num].VtdUni= tBaseAddress + ((CapReg.Bits.FRO * 16) + (Index * 16) + R_FRCD_REG + sizeof= (UINT64))); > if (FrcdReg.Bits.F !=3D 0) { > - FrcdReg.Bits.F =3D 0; > + // > + // Software writes the value read from this field (F) to Clear= it. > + // > MmioWrite64 (mVtdUnitInformation[Num].VtdUnitBaseAddress + ((Ca= pReg.Bits.FRO * 16) + (Index * 16) + R_FRCD_REG + sizeof(UINT64)), FrcdReg.= Uint64[1]); > } > - MmioWrite32 (mVtdUnitInformation[Num].VtdUnitBaseAddress + R_FST= S_REG, MmioRead32 (mVtdUnitInformation[Num].VtdUnitBaseAddress + R_FSTS_REG= )); > } > + MmioWrite32 (mVtdUnitInformation[Num].VtdUnitBaseAddress + R_FSTS_= REG, MmioRead32 (mVtdUnitInformation[Num].VtdUnitBaseAddress + R_FSTS_REG))= ; > } > } > } > --=20 > 2.7.0.windows.1 >=20