From mboxrd@z Thu Jan 1 00:00:00 1970 Return-Path: Received: from mga04.intel.com (mga04.intel.com [192.55.52.120]) (using TLSv1 with cipher CAMELLIA256-SHA (256/256 bits)) (No client certificate requested) by ml01.01.org (Postfix) with ESMTPS id A47E21A1E29 for ; Sun, 16 Oct 2016 21:10:49 -0700 (PDT) Received: from fmsmga002.fm.intel.com ([10.253.24.26]) by fmsmga104.fm.intel.com with ESMTP; 16 Oct 2016 21:10:49 -0700 X-ExtLoop1: 1 X-IronPort-AV: E=Sophos;i="5.31,356,1473145200"; d="scan'208";a="1071328640" Received: from orsmsx108.amr.corp.intel.com ([10.22.240.6]) by fmsmga002.fm.intel.com with ESMTP; 16 Oct 2016 21:10:49 -0700 Received: from orsmsx113.amr.corp.intel.com ([169.254.9.161]) by ORSMSX108.amr.corp.intel.com ([169.254.2.106]) with mapi id 14.03.0248.002; Sun, 16 Oct 2016 21:10:48 -0700 From: "Kinney, Michael D" To: "Gao, Liming" , Bhupesh Sharma , "edk2-devel@ml01.01.org" , "Kinney, Michael D" Thread-Topic: [edk2] [PATCH 1/1] MdePkg/IoLib: Add support for big-endian MMIO Thread-Index: AQHSJf8uaA8m/52Gm0GECrAA2fKiMKCscUEA//+YTEA= Date: Mon, 17 Oct 2016 04:10:47 +0000 Message-ID: References: <1476437615-29534-1-git-send-email-bhupesh.sharma@nxp.com> <4A89E2EF3DFEDB4C8BFDE51014F606A14B49505E@shsmsx102.ccr.corp.intel.com> In-Reply-To: <4A89E2EF3DFEDB4C8BFDE51014F606A14B49505E@shsmsx102.ccr.corp.intel.com> Accept-Language: en-US X-MS-Has-Attach: X-MS-TNEF-Correlator: x-ctpclassification: CTP_IC x-titus-metadata-40: eyJDYXRlZ29yeUxhYmVscyI6IiIsIk1ldGFkYXRhIjp7Im5zIjoiaHR0cDpcL1wvd3d3LnRpdHVzLmNvbVwvbnNcL0ludGVsMyIsImlkIjoiMTJhODA5NGUtYTk1Mi00MDEwLTk3MTEtYTIyZDViMWI4ZWQ2IiwicHJvcHMiOlt7Im4iOiJDVFBDbGFzc2lmaWNhdGlvbiIsInZhbHMiOlt7InZhbHVlIjoiQ1RQX0lDIn1dfV19LCJTdWJqZWN0TGFiZWxzIjpbXSwiVE1DVmVyc2lvbiI6IjE1LjkuNi42IiwiVHJ1c3RlZExhYmVsSGFzaCI6IkhEQ3pNMlhVOHIwUFZ1UVNJZVBwNmtUaUMxaVU1ek1xSllWd2pqNDl3YUE9In0= x-originating-ip: [10.22.254.140] MIME-Version: 1.0 Subject: Re: [PATCH 1/1] MdePkg/IoLib: Add support for big-endian MMIO X-BeenThere: edk2-devel@lists.01.org X-Mailman-Version: 2.1.21 Precedence: list List-Id: EDK II Development List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , X-List-Received-Date: Mon, 17 Oct 2016 04:10:49 -0000 Content-Language: en-US Content-Type: text/plain; charset="us-ascii" Content-Transfer-Encoding: quoted-printable Bhupesh, It is also possible to add an ARM specific PCD to select endianness and upd= ate MdePkg/Library/BaseIoLibIntrinsic/IoLibArm.c to use that PCD in MmioRead/Wr= ite()=20 APIs in that file to support both endian types. You can use the SwapBytesx= x() functions from BaseLib(as Laszlo suggested) based on the setting of this AR= M=20 specific PCD. Modules that link against this lib can select endianness by setting PCD in = the=20 scope of that module. The IPF version of IoLib uses an IPF specific PCD to translate I/O port acc= esses to MMIO accesses. So there is already an example of an arch specific PCD i= n this lib instance. Mike > -----Original Message----- > From: edk2-devel [mailto:edk2-devel-bounces@lists.01.org] On Behalf Of Ga= o, Liming > Sent: Monday, October 17, 2016 11:10 AM > To: Bhupesh Sharma ; edk2-devel@ml01.01.org > Subject: Re: [edk2] [PATCH 1/1] MdePkg/IoLib: Add support for big-endian = MMIO >=20 > Bhupesh: > In this patch, five class APIs are new added. They are > MmioReadBe16(),MmioWriteBe16(),MmioClearSetBe16(),MmioSetBitsBe16(),MmioC= learBitsBe16 > (). In fact, they can map to the existing MMIO APIs. Below is their mappi= ng. And, I > understand some hardware uses little-endian MMIO interfaces, other hardwa= re use big- > endian MMIO interfaces. But, there are no hardware to require little-endi= an and big- > endian at the same time. If so, we don't need to expose MmioRead16() and > MmioReadBe16() API both in the same library instances. For your case, I s= uggest to > add new IoLib library instance that implement the existing MMIO APIs with= the big- > endian way. This library instance can be placed into ARM device package. >=20 > MmioReadBe16() --> MmioRead16() > MmioWriteBe16() --> MmioWrite16() > MmioClearSetBe16() --> MmioAndThenOr16() > MmioSetBitsBe16() --> MmioOr16() > MmioClearBitsBe16() --> MmioAnd16() >=20 > Thanks > Liming > > -----Original Message----- > > From: edk2-devel [mailto:edk2-devel-bounces@lists.01.org] On Behalf Of > > Bhupesh Sharma > > Sent: Friday, October 14, 2016 5:34 PM > > To: edk2-devel@ml01.01.org > > Subject: [edk2] [PATCH 1/1] MdePkg/IoLib: Add support for big-endian > > MMIO > > > > Various IPs on NXP/FSL SoCs having ARM64 cores have big-endian > > MMIO interfaces. > > > > This implies that a byte-swap operation is needed to read/write > > such BE MMIO registers from the LE ARM64 cores. > > > > This patch adds the support for the same. > > > > Contributed-under: TianoCore Contribution Agreement 1.0 > > Signed-off-by: Meenakshi Aggarwal > > Signed-off-by: Bhupesh Sharma > > --- > > MdePkg/Include/Library/IoLib.h | 364 +++++++++++++++++++= + > > MdePkg/Library/BaseIoLibIntrinsic/IoLibArm.c | 479 > > +++++++++++++++++++++++++++ > > 2 files changed, 843 insertions(+) > > > > diff --git a/MdePkg/Include/Library/IoLib.h > > b/MdePkg/Include/Library/IoLib.h > > index a0dd16b..f5842e6 100644 > > --- a/MdePkg/Include/Library/IoLib.h > > +++ b/MdePkg/Include/Library/IoLib.h > > @@ -2658,6 +2658,370 @@ MmioWriteBuffer64 ( > > IN CONST UINT64 *Buffer > > ); > > > > +/** > > + Reads a 16-bit MMIO register in Big Endian format. > > + > > + Reads the 16-bit MMIO register specified by Address. The 16-bit read= value > > is > > + returned. This function must guarantee that all MMIO read and write > > + operations are serialized. > > + > > + If 16-bit MMIO register operations are not supported, then ASSERT(). > > + > > + @param Address The MMIO register to read. > > + > > + @return The value read. > > + > > +**/ > > +UINT16 > > +EFIAPI > > +MmioReadBe16 ( > > + IN UINTN Address > > + ); > > + > > +/** > > + Writes a 16-bit MMIO register in Big Endian format. > > + > > + Writes the 16-bit MMIO register specified by Address with the value > > specified > > + by Value and returns Value. This function must guarantee that all MM= IO > > read > > + and write operations are serialized. > > + > > + If 16-bit MMIO register operations are not supported, then ASSERT(). > > + > > + @param Address The MMIO register to write. > > + @param Value The value to write to the MMIO register. > > + > > +**/ > > +UINT16 > > +EFIAPI > > +MmioWriteBe16 ( > > + IN UINTN Address, > > + IN UINT16 Value > > + ); > > + > > +/** > > + Reads a 32-bit MMIO register in Big Endian format. > > + > > + Reads the 32-bit MMIO register specified by Address. The 32-bit read= value > > is > > + returned. This function must guarantee that all MMIO read and write > > + operations are serialized. > > + > > + If 32-bit MMIO register operations are not supported, then ASSERT(). > > + > > + @param Address The MMIO register to read. > > + > > + @return The value read. > > + > > +**/ > > +UINT32 > > +EFIAPI > > +MmioReadBe32 ( > > + IN UINTN Address > > + ); > > + > > +/** > > + Writes a 32-bit MMIO register in Big Endian format. > > + > > + Writes the 32-bit MMIO register specified by Address with the value > > specified > > + by Value and returns Value. This function must guarantee that all MM= IO > > read > > + and write operations are serialized. > > + > > + If 32-bit MMIO register operations are not supported, then ASSERT(). > > + > > + @param Address The MMIO register to write. > > + @param Value The value to write to the MMIO register. > > + > > +**/ > > +UINT32 > > +EFIAPI > > +MmioWriteBe32 ( > > + IN UINTN Address, > > + IN UINT32 Value > > + ); > > + > > + > > +/** > > + Reads a 64-bit MMIO register in Big Endian format. > > + > > + Reads the 64-bit MMIO register specified by Address. The 64-bit read= value > > is > > + returned. This function must guarantee that all MMIO read and write > > + operations are serialized. > > + > > + If 64-bit MMIO register operations are not supported, then ASSERT(). > > + > > + @param Address The MMIO register to read. > > + > > + @return The value read. > > + > > +**/ > > +UINT64 > > +EFIAPI > > +MmioReadBe64 ( > > + IN UINTN Address > > + ); > > + > > + > > +/** > > + Writes a 64-bit MMIO register in Big Endian format. > > + > > + Writes the 64-bit MMIO register specified by Address with the value > > specified > > + by Value and returns Value. This function must guarantee that all MM= IO > > read > > + and write operations are serialized. > > + > > + If 64-bit MMIO register operations are not supported, then ASSERT(). > > + > > + @param Address The MMIO register to write. > > + @param Value The value to write to the MMIO register. > > + > > +**/ > > +UINT64 > > +EFIAPI > > +MmioWriteBe64 ( > > + IN UINTN Address, > > + IN UINT64 Value > > + ); > > + > > +/** > > + Clear and set a 8-bit MMIO register. > > + > > + Mask the 8-bit MMIO register specified by Address with the mask > > specified > > + by Mask and then Writes the 8-bit MMIO register specified by Address > > with > > + the value specified by Value and returns current value on register. = This > > + function must guarantee that all MMIO read and write operations are > > serialized. > > + > > + @param Address The MMIO register to write. > > + @param Mask The Mask to clear the MMIO register. > > + @param Value The value to write to the MMIO register. > > + > > +**/ > > +UINT8 > > +EFIAPI > > +MmioClearSet8 ( > > + IN UINTN Address, > > + IN UINT8 Mask, > > + IN UINT8 Value > > + ); > > + > > +/** > > + Clear and set a 16-bit MMIO register in Big Endian format. > > + > > + Mask the 16-bit MMIO register specified by Address with the mask > > specified > > + by Mask and then Writes the 16-bit MMIO register specified by Addres= s > > with > > + the value specified by Value and returns current value on register. = This > > + function must guarantee that all MMIO read and write operations are > > serialized. > > + > > + If 16-bit MMIO register operations are not supported, then ASSERT(). > > + > > + @param Address The MMIO register to write. > > + @param Mask The Mask to clear the MMIO register. > > + @param Value The value to write to the MMIO register. > > + > > +**/ > > +UINT16 > > +EFIAPI > > +MmioClearSetBe16 ( > > + IN UINTN Address, > > + IN UINT16 Mask, > > + IN UINT16 Value > > + ); > > + > > +/** > > + Clear and set a 32-bit MMIO register in Big Endian format. > > + > > + Mask the 32-bit MMIO register specified by Address with the mask > > specified > > + by Mask and then Writes the 32-bit MMIO register specified by Addres= s > > with > > + the value specified by Value and returns current value on register. = This > > + function must guarantee that all MMIO read and write operations are > > serialized. > > + > > + > > + If 32-bit MMIO register operations are not supported, then ASSERT(). > > + > > + @param Address The MMIO register to write. > > + @param Mask The Mask to clear the MMIO register. > > + @param Value The value to write to the MMIO register. > > + > > +**/ > > +UINT32 > > +EFIAPI > > +MmioClearSetBe32 ( > > + IN UINTN Address, > > + IN UINT32 Mask, > > + IN UINT32 Value > > + ); > > + > > +/** > > + Clear and set a 64-bit MMIO register in Big Endian format. > > + > > + Mask the 64-bit MMIO register specified by Address with the mask > > specified > > + by Mask and then Writes the 64-bit MMIO register specified by Addres= s > > with > > + the value specified by Value and returns current value on register. = This > > + function must guarantee that all MMIO read and write operations are > > serialized. > > + > > + If 64-bit MMIO register operations are not supported, then ASSERT(). > > + > > + @param Address The MMIO register to write. > > + @param Mask The Mask to clear the MMIO register. > > + @param Value The value to write to the MMIO register. > > + > > +**/ > > +UINT64 > > +EFIAPI > > +MmioClearSetBe64 ( > > + IN UINTN Address, > > + IN UINT64 Mask, > > + IN UINT64 Value > > + ); > > + > > +/** > > + Set a 8-bit MMIO register in Big Endian format. > > + > > + Set bits of the 8-bit MMIO register specified by Address with the Bi= ts > > + specified by Bits and returns register content. This function must > > + guarantee that all MMIO read and write operations are serialized. > > + > > + If 8-bit MMIO register operations are not supported, then ASSERT(). > > + > > + @param Address The MMIO register to write. > > + @param Bits The Bits to set in MMIO register. > > + > > +**/ > > +UINT8 > > +EFIAPI > > +MmioSetBits8 ( > > + IN UINTN Address, > > + IN UINT8 Bits > > + ); > > + > > +/** > > + Set a 16-bit MMIO register in Big Endian format. > > + > > + Set bits of the 16-bit MMIO register specified by Address with the B= its > > + specified by Bits and returns register content. This function must > > + guarantee that all MMIO read and write operations are serialized. > > + > > + If 16-bit MMIO register operations are not supported, then ASSERT(). > > + > > + @param Address The MMIO register to write. > > + @param Bits The Bits to set in MMIO register. > > + > > +**/ > > +UINT16 > > +EFIAPI > > +MmioSetBitsBe16 ( > > + IN UINTN Address, > > + IN UINT16 Bits > > + ); > > + > > +/** > > + Set a 32-bit MMIO register in Big Endian format. > > + > > + Set bits of the 32-bit MMIO register specified by Address with the B= its > > + specified by Bits and returns register content. This function must > > + guarantee that all MMIO read and write operations are serialized. > > + > > + If 32-bit MMIO register operations are not supported, then ASSERT(). > > + > > + @param Address The MMIO register to write. > > + @param Bits The Bits to set in MMIO register. > > + > > +**/ > > +UINT32 > > +EFIAPI > > +MmioSetBitsBe32 ( > > + IN UINTN Address, > > + IN UINT32 Bits > > + ); > > + > > +/** > > + Set a 64-bit MMIO register in Big Endian format. > > + > > + Set bits of the 64-bit MMIO register specified by Address with the B= its > > + specified by Bits and returns register content. This function must > > + guarantee that all MMIO read and write operations are serialized. > > + > > + If 64-bit MMIO register operations are not supported, then ASSERT(). > > + > > + @param Address The MMIO register to write. > > + @param Bits The Bits to set in MMIO register. > > + > > +**/ > > +UINT64 > > +EFIAPI > > +MmioSetBitsBe64 ( > > + IN UINTN Address, > > + IN UINT64 Bits > > + ); > > + > > +/** > > + Clear bits of the 8-bit MMIO register specified by Address with the = Mask > > + specified by Mask and returns register content. This function must > > + guarantee that all MMIO read and write operations are serialized. > > + > > + If 8-bit MMIO register operations are not supported, then ASSERT(). > > + > > + @param Address The MMIO register to write. > > + @param Mask The Bits to clear in MMIO register. > > + > > +**/ > > +UINT8 > > +EFIAPI > > +MmioClearBits8 ( > > + IN UINTN Address, > > + IN UINT8 Mask > > + ); > > + > > +/** > > + Clear bits of the 16-bit MMIO register specified by Address with the= Mask > > + specified by Mask and returns register content. This function must > > + guarantee that all MMIO read and write operations are serialized. > > + > > + If 16-bit MMIO register operations are not supported, then ASSERT(). > > + > > + @param Address The MMIO register to write. > > + @param Mask The Bits to clear in MMIO register. > > + > > +**/ > > +UINT16 > > +EFIAPI > > +MmioClearBitsBe16 ( > > + IN UINTN Address, > > + IN UINT16 Mask > > + ); > > + > > +/** > > + Clear bits of the 32-bit MMIO register specified by Address with the= Mask > > + specified by Mask and returns register content. This function must > > + guarantee that all MMIO read and write operations are serialized. > > + > > + If 32-bit MMIO register operations are not supported, then ASSERT(). > > + > > + @param Address The MMIO register to write. > > + @param Mask The Bits to clear in MMIO register. > > + > > +**/ > > +UINT32 > > +EFIAPI > > +MmioClearBitsBe32 ( > > + IN UINTN Address, > > + IN UINT32 Mask > > + ); > > + > > +/** > > + Clear bits of the 64-bit MMIO register specified by Address with the= Mask > > + specified by Mask and returns register content. This function must > > + guarantee that all MMIO read and write operations are serialized. > > + > > + If 64-bit MMIO register operations are not supported, then ASSERT(). > > + > > + @param Address The MMIO register to write. > > + @param Mask The Bits to clear in MMIO register. > > + > > +**/ > > +UINT64 > > +EFIAPI > > +MmioClearBitsBe64 ( > > + IN UINTN Address, > > + IN UINT64 Mask > > + ); > > > > #endif > > > > diff --git a/MdePkg/Library/BaseIoLibIntrinsic/IoLibArm.c > > b/MdePkg/Library/BaseIoLibIntrinsic/IoLibArm.c > > index b9f4c5e..f2179d1 100644 > > --- a/MdePkg/Library/BaseIoLibIntrinsic/IoLibArm.c > > +++ b/MdePkg/Library/BaseIoLibIntrinsic/IoLibArm.c > > @@ -19,6 +19,26 @@ > > // > > #include "BaseIoLibIntrinsicInternal.h" > > > > + > > +#define Uswap16(X) \ > > + ((((X) & 0xff00) >> 8) | \ > > + (((X) & 0x00ff) << 8)) > > +#define Uswap32(X) \ > > + ((((X) & 0xff000000) >> 24) | \ > > + (((X) & 0x00ff0000) >> 8) | \ > > + (((X) & 0x0000ff00) << 8) | \ > > + (((X) & 0x000000ff) << 24)) > > +#define Uswap64(X) \ > > + ((((X) & 0xff00000000000000) >> 56) | \ > > + (((X) & 0x00ff000000000000) >> 40) | \ > > + (((X) & 0x0000ff0000000000) >> 24) | \ > > + (((X) & 0x000000ff00000000) >> 8) | \ > > + (((X) & 0x00000000ff000000) << 8) | \ > > + (((X) & 0x0000000000ff0000) << 24) | \ > > + (((X) & 0x000000000000ff00) << 40) | \ > > + (((X) & 0x00000000000000ff) << 56)) > > + > > + > > /** > > Reads an 8-bit I/O port. > > > > @@ -428,3 +448,462 @@ MmioWrite64 ( > > return Value; > > } > > > > + > > +/** > > + Reads a 16-bit MMIO register in Big Endian format. > > + > > + Reads the 16-bit MMIO register specified by Address. The 16-bit read= value > > is > > + returned. This function must guarantee that all MMIO read and write > > + operations are serialized. > > + > > + If 16-bit MMIO register operations are not supported, then ASSERT(). > > + > > + @param Address The MMIO register to read. > > + > > + @return The value read. > > + > > +**/ > > +UINT16 > > +EFIAPI > > +MmioReadBe16 ( > > + IN UINTN Address > > + ) > > +{ > > + UINT16 Value; > > + > > + ASSERT ((Address & 1) =3D=3D 0); > > + Value =3D *(volatile UINT16*)Address; > > + return Uswap16(Value); > > +} > > + > > +/** > > + Writes a 16-bit MMIO register in Big Endian format. > > + > > + Writes the 16-bit MMIO register specified by Address with the value > > specified > > + by Value and returns Value. This function must guarantee that all MM= IO > > read > > + and write operations are serialized. > > + > > + If 16-bit MMIO register operations are not supported, then ASSERT(). > > + > > + @param Address The MMIO register to write. > > + @param Value The value to write to the MMIO register. > > + > > +**/ > > +UINT16 > > +EFIAPI > > +MmioWriteBe16 ( > > + IN UINTN Address, > > + IN UINT16 Value > > + ) > > +{ > > + ASSERT ((Address & 1) =3D=3D 0); > > + *(volatile UINT16*)Address =3D Uswap16(Value); > > + return Value; > > +} > > + > > +/** > > + Reads a 32-bit MMIO register in Big Endian format. > > + > > + Reads the 32-bit MMIO register specified by Address. The 32-bit read= value > > is > > + returned. This function must guarantee that all MMIO read and write > > + operations are serialized. > > + > > + If 32-bit MMIO register operations are not supported, then ASSERT(). > > + > > + @param Address The MMIO register to read. > > + > > + @return The value read. > > + > > +**/ > > +UINT32 > > +EFIAPI > > +MmioReadBe32 ( > > + IN UINTN Address > > + ) > > +{ > > + UINT32 Value; > > + > > + ASSERT ((Address & 3) =3D=3D 0); > > + Value =3D *(volatile UINT32*)Address; > > + return Uswap32(Value); > > +} > > + > > +/** > > + Writes a 32-bit MMIO register in Big Endian format. > > + > > + Writes the 32-bit MMIO register specified by Address with the value > > specified > > + by Value and returns Value. This function must guarantee that all MM= IO > > read > > + and write operations are serialized. > > + > > + If 32-bit MMIO register operations are not supported, then ASSERT(). > > + > > + @param Address The MMIO register to write. > > + @param Value The value to write to the MMIO register. > > + > > +**/ > > +UINT32 > > +EFIAPI > > +MmioWriteBe32 ( > > + IN UINTN Address, > > + IN UINT32 Value > > + ) > > +{ > > + ASSERT ((Address & 3) =3D=3D 0); > > + *(volatile UINT32*)Address =3D Uswap32(Value); > > + return Value; > > +} > > + > > +/** > > + Reads a 64-bit MMIO register in Big Endian format. > > + > > + Reads the 64-bit MMIO register specified by Address. The 64-bit read= value > > is > > + returned. This function must guarantee that all MMIO read and write > > + operations are serialized. > > + > > + If 64-bit MMIO register operations are not supported, then ASSERT(). > > + > > + @param Address The MMIO register to read. > > + > > + @return The value read. > > + > > +**/ > > +UINT64 > > +EFIAPI > > +MmioReadBe64 ( > > + IN UINTN Address > > + ) > > +{ > > + UINT64 Value; > > + > > + ASSERT ((Address & 7) =3D=3D 0); > > + Value =3D *(volatile UINT64*)Address; > > + return Uswap64(Value); > > +} > > + > > +/** > > + Writes a 64-bit MMIO register in Big Endian format. > > + > > + Writes the 64-bit MMIO register specified by Address with the value > > specified > > + by Value and returns Value. This function must guarantee that all MM= IO > > read > > + and write operations are serialized. > > + > > + If 64-bit MMIO register operations are not supported, then ASSERT(). > > + > > + @param Address The MMIO register to write. > > + @param Value The value to write to the MMIO register. > > + > > +**/ > > +UINT64 > > +EFIAPI > > +MmioWriteBe64 ( > > + IN UINTN Address, > > + IN UINT64 Value > > + ) > > +{ > > + ASSERT ((Address & 7) =3D=3D 0); > > + *(volatile UINT64*)Address =3D Uswap64(Value); > > + return Value; > > +} > > + > > +/** > > + Clear and set a 8-bit MMIO register. > > + > > + Mask the 8-bit MMIO register specified by Address with the mask > > specified > > + by Mask and then Writes the 8-bit MMIO register specified by Address > > with > > + the value specified by Value and returns current value on register. = This > > + function must guarantee that all MMIO read and write operations are > > serialized. > > + > > + @param Address The MMIO register to write. > > + @param Mask The Mask to clear the MMIO register. > > + @param Value The value to write to the MMIO register. > > + > > +**/ > > +UINT8 > > +EFIAPI > > +MmioClearSet8 ( > > + IN UINTN Address, > > + IN UINT8 Mask, > > + IN UINT8 Value > > + ) > > +{ > > + *(volatile UINT8*)Address =3D (*(volatile UINT8*)Address & ~Mask) | = Value; > > + return *(volatile UINT8*)Address; > > +} > > + > > +/** > > + Clear and set a 16-bit MMIO register in Big Endian format. > > + > > + Mask the 16-bit MMIO register specified by Address with the mask > > specified > > + by Mask and then Writes the 16-bit MMIO register specified by Addres= s > > with > > + the value specified by Value and returns current value on register. = This > > + function must guarantee that all MMIO read and write operations are > > serialized. > > + > > + If 16-bit MMIO register operations are not supported, then ASSERT(). > > + > > + @param Address The MMIO register to write. > > + @param Mask The Mask to clear the MMIO register. > > + @param Value The value to write to the MMIO register. > > + > > +**/ > > +UINT16 > > +EFIAPI > > +MmioClearSetBe16 ( > > + IN UINTN Address, > > + IN UINT16 Mask, > > + IN UINT16 Value > > + ) > > +{ > > + ASSERT ((Address & 1) =3D=3D 0); > > + *(volatile UINT16*)Address =3D (*(volatile UINT16*)Address & > > Uswap16(~Mask)) > > + | > > Uswap16(Value); > > + return *(volatile UINT16*)Address; > > +} > > + > > +/** > > + Clear and set a 32-bit MMIO register in Big Endian format. > > + > > + Mask the 32-bit MMIO register specified by Address with the mask > > specified > > + by Mask and then Writes the 32-bit MMIO register specified by Addres= s > > with > > + the value specified by Value and returns current value on register. = This > > + function must guarantee that all MMIO read and write operations are > > serialized. > > + > > + > > + If 32-bit MMIO register operations are not supported, then ASSERT(). > > + > > + @param Address The MMIO register to write. > > + @param Mask The Mask to clear the MMIO register. > > + @param Value The value to write to the MMIO register. > > + > > +**/ > > +UINT32 > > +EFIAPI > > +MmioClearSetBe32 ( > > + IN UINTN Address, > > + IN UINT32 Mask, > > + IN UINT32 Value > > + ) > > +{ > > + ASSERT ((Address & 3) =3D=3D 0); > > + *(volatile UINT32*)Address =3D (*(volatile UINT32*)Address & > > Uswap32(~Mask)) > > + | > > Uswap32(Value); > > + return *(volatile UINT32*)Address; > > +} > > + > > +/** > > + Clear and set a 64-bit MMIO register in Big Endian format. > > + > > + Mask the 64-bit MMIO register specified by Address with the mask > > specified > > + by Mask and then Writes the 64-bit MMIO register specified by Addres= s > > with > > + the value specified by Value and returns current value on register. = This > > + function must guarantee that all MMIO read and write operations are > > serialized. > > + > > + If 64-bit MMIO register operations are not supported, then ASSERT(). > > + > > + @param Address The MMIO register to write. > > + @param Mask The Mask to clear the MMIO register. > > + @param Value The value to write to the MMIO register. > > + > > +**/ > > +UINT64 > > +EFIAPI > > +MmioClearSetBe64 ( > > + IN UINTN Address, > > + IN UINT64 Mask, > > + IN UINT64 Value > > + ) > > +{ > > + ASSERT ((Address & 7) =3D=3D 0); > > + *(volatile UINT64*)Address =3D (*(volatile UINT64*)Address & > > Uswap64(~Mask)) > > + | > > Uswap64(Value); > > + return *(volatile UINT64*)Address; > > +} > > + > > +/** > > + Set a 8-bit MMIO register in Big Endian format. > > + > > + Set bits of the 8-bit MMIO register specified by Address with the Bi= ts > > + specified by Bits and returns register content. This function must > > + guarantee that all MMIO read and write operations are serialized. > > + > > + If 8-bit MMIO register operations are not supported, then ASSERT(). > > + > > + @param Address The MMIO register to write. > > + @param Bits The Bits to set in MMIO register. > > + > > +**/ > > +UINT8 > > +EFIAPI > > +MmioSetBits8 ( > > + IN UINTN Address, > > + IN UINT8 Bits > > + ) > > +{ > > + *(volatile UINT8*)Address =3D *(volatile UINT8*)Address | Bits; > > + return *(volatile UINT8*)Address; > > +} > > + > > +/** > > + Set a 16-bit MMIO register in Big Endian format. > > + > > + Set bits of the 16-bit MMIO register specified by Address with the B= its > > + specified by Bits and returns register content. This function must > > + guarantee that all MMIO read and write operations are serialized. > > + > > + If 16-bit MMIO register operations are not supported, then ASSERT(). > > + > > + @param Address The MMIO register to write. > > + @param Bits The Bits to set in MMIO register. > > + > > +**/ > > +UINT16 > > +EFIAPI > > +MmioSetBitsBe16 ( > > + IN UINTN Address, > > + IN UINT16 Bits > > + ) > > +{ > > + ASSERT ((Address & 1) =3D=3D 0); > > + *(volatile UINT16*)Address =3D *(volatile UINT16*)Address | Uswap16(= Bits); > > + return *(volatile UINT16*)Address; > > +} > > + > > +/** > > + Set a 32-bit MMIO register in Big Endian format. > > + > > + Set bits of the 32-bit MMIO register specified by Address with the B= its > > + specified by Bits and returns register content. This function must > > + guarantee that all MMIO read and write operations are serialized. > > + > > + If 32-bit MMIO register operations are not supported, then ASSERT(). > > + > > + @param Address The MMIO register to write. > > + @param Bits The Bits to set in MMIO register. > > + > > +**/ > > +UINT32 > > +EFIAPI > > +MmioSetBitsBe32 ( > > + IN UINTN Address, > > + IN UINT32 Bits > > + ) > > +{ > > + ASSERT ((Address & 3) =3D=3D 0); > > + *(volatile UINT32*)Address =3D *(volatile UINT32*)Address | Uswap32(= Bits); > > + return *(volatile UINT32*)Address; > > +} > > + > > +/** > > + Set a 64-bit MMIO register in Big Endian format. > > + > > + Set bits of the 64-bit MMIO register specified by Address with the B= its > > + specified by Bits and returns register content. This function must > > + guarantee that all MMIO read and write operations are serialized. > > + > > + If 64-bit MMIO register operations are not supported, then ASSERT(). > > + > > + @param Address The MMIO register to write. > > + @param Bits The Bits to set in MMIO register. > > + > > +**/ > > +UINT64 > > +EFIAPI > > +MmioSetBitsBe64 ( > > + IN UINTN Address, > > + IN UINT64 Bits > > + ) > > +{ > > + ASSERT ((Address & 7) =3D=3D 0); > > + *(volatile UINT64*)Address =3D *(volatile UINT64*)Address | Uswap64(= Bits); > > + return *(volatile UINT64*)Address; > > +} > > + > > +/** > > + Clear bits of the 8-bit MMIO register specified by Address with the = Mask > > + specified by Mask and returns register content. This function must > > + guarantee that all MMIO read and write operations are serialized. > > + > > + If 8-bit MMIO register operations are not supported, then ASSERT(). > > + > > + @param Address The MMIO register to write. > > + @param Mask The Bits to clear in MMIO register. > > + > > +**/ > > +UINT8 > > +EFIAPI > > +MmioClearBits8 ( > > + IN UINTN Address, > > + IN UINT8 Mask > > + ) > > +{ > > + *(volatile UINT8*)Address =3D *(volatile UINT8*)Address & (~Mask); > > + return *(volatile UINT8*)Address; > > +} > > + > > +/** > > + Clear bits of the 16-bit MMIO register specified by Address with the= Mask > > + specified by Mask and returns register content. This function must > > + guarantee that all MMIO read and write operations are serialized. > > + > > + If 16-bit MMIO register operations are not supported, then ASSERT(). > > + > > + @param Address The MMIO register to write. > > + @param Mask The Bits to clear in MMIO register. > > + > > +**/ > > +UINT16 > > +EFIAPI > > +MmioClearBitsBe16 ( > > + IN UINTN Address, > > + IN UINT16 Mask > > + ) > > +{ > > + ASSERT ((Address & 1) =3D=3D 0); > > + *(volatile UINT16*)Address =3D *(volatile UINT16*)Address & > > Uswap16(~Mask); > > + return *(volatile UINT16*)Address; > > +} > > + > > +/** > > + Clear bits of the 32-bit MMIO register specified by Address with the= Mask > > + specified by Mask and returns register content. This function must > > + guarantee that all MMIO read and write operations are serialized. > > + > > + If 32-bit MMIO register operations are not supported, then ASSERT(). > > + > > + @param Address The MMIO register to write. > > + @param Mask The Bits to clear in MMIO register. > > + > > +**/ > > +UINT32 > > +EFIAPI > > +MmioClearBitsBe32 ( > > + IN UINTN Address, > > + IN UINT32 Mask > > + ) > > +{ > > + ASSERT ((Address & 3) =3D=3D 0); > > + *(volatile UINT32*)Address =3D *(volatile UINT32*)Address & > > Uswap32(~Mask); > > + return *(volatile UINT32*)Address; > > +} > > + > > +/** > > + Clear bits of the 64-bit MMIO register specified by Address with the= Mask > > + specified by Mask and returns register content. This function must > > + guarantee that all MMIO read and write operations are serialized. > > + > > + If 64-bit MMIO register operations are not supported, then ASSERT(). > > + > > + @param Address The MMIO register to write. > > + @param Mask The Bits to clear in MMIO register. > > + > > +**/ > > +UINT64 > > +EFIAPI > > +MmioClearBitsBe64 ( > > + IN UINTN Address, > > + IN UINT64 Mask > > + ) > > +{ > > + ASSERT ((Address & 7) =3D=3D 0); > > + *(volatile UINT64*)Address =3D *(volatile UINT64*)Address & > > Uswap64(~Mask); > > + return *(volatile UINT64*)Address; > > +} > > -- > > 1.9.1 > > > > > > _______________________________________________ > > edk2-devel mailing list > > edk2-devel@lists.01.org > > https://lists.01.org/mailman/listinfo/edk2-devel > _______________________________________________ > edk2-devel mailing list > edk2-devel@lists.01.org > https://lists.01.org/mailman/listinfo/edk2-devel