From: "Kinney, Michael D" <michael.d.kinney@intel.com>
To: "Wu, Hao A" <hao.a.wu@intel.com>,
"edk2-devel@lists.01.org" <edk2-devel@lists.01.org>,
"Kinney, Michael D" <michael.d.kinney@intel.com>
Cc: "Fan, Jeff" <jeff.fan@intel.com>
Subject: Re: [PATCH 0/4] Update CPUID & MSR header files with SDM (Sep.2016)
Date: Thu, 15 Dec 2016 18:16:21 +0000 [thread overview]
Message-ID: <E92EE9817A31E24EB0585FDF735412F56487B6BB@ORSMSX113.amr.corp.intel.com> (raw)
In-Reply-To: <1481704400-12044-1-git-send-email-hao.a.wu@intel.com>
Series
Reviewed-by: Michael Kinney <michael.d.kinney@intel.com>
Mike
> -----Original Message-----
> From: Wu, Hao A
> Sent: Wednesday, December 14, 2016 12:33 AM
> To: edk2-devel@lists.01.org
> Cc: Wu, Hao A <hao.a.wu@intel.com>; Kinney, Michael D <michael.d.kinney@intel.com>;
> Fan, Jeff <jeff.fan@intel.com>
> Subject: [PATCH 0/4] Update CPUID & MSR header files with SDM (Sep.2016)
>
> https://bugzilla.tianocore.org/show_bug.cgi?id=176
>
> According to the latest version (Sep.'16) of Intel(R) 64 and IA-32
> Architectures Software Developer's Manual (SDM), this patch series will
> update the MSR and CPUID related definitions in .h files under
> UefiCpuPkg/Include/Register.
>
> Cc: Michael Kinney <michael.d.kinney@intel.com>
> Cc: Jeff Fan <jeff.fan@intel.com>
>
> Hao Wu (4):
> UefiCpuPkg/Include: Update MSR header files with SDM (Sep.2016)
> UefiCpuPkg/Include: Update Skylake MSR header file with SDM (Sep.2016)
> UefiCpuPkg/Include: Add Goldmont MSR header file with SDM (Sep.2016)
> UefiCpuPkg/Cpuid.h: Update CPUID definitions with SDM (Sep.2016)
>
> UefiCpuPkg/Application/Cpuid/Cpuid.c | 115 +-
> UefiCpuPkg/Include/Register/ArchitecturalMsr.h | 159 +-
> UefiCpuPkg/Include/Register/Cpuid.h | 363 +++-
> UefiCpuPkg/Include/Register/Msr.h | 3 +-
> UefiCpuPkg/Include/Register/Msr/AtomMsr.h | 167 +-
> UefiCpuPkg/Include/Register/Msr/BroadwellMsr.h | 43 +-
> UefiCpuPkg/Include/Register/Msr/Core2Msr.h | 286 +--
> UefiCpuPkg/Include/Register/Msr/CoreMsr.h | 64 +-
> UefiCpuPkg/Include/Register/Msr/GoldmontMsr.h | 2515 ++++++++++++++++++++++
> UefiCpuPkg/Include/Register/Msr/HaswellEMsr.h | 451 ++--
> UefiCpuPkg/Include/Register/Msr/HaswellMsr.h | 62 +-
> UefiCpuPkg/Include/Register/Msr/IvyBridgeMsr.h | 416 ++--
> UefiCpuPkg/Include/Register/Msr/NehalemMsr.h | 340 +--
> UefiCpuPkg/Include/Register/Msr/P6Msr.h | 6 +-
> UefiCpuPkg/Include/Register/Msr/Pentium4Msr.h | 146 +-
> UefiCpuPkg/Include/Register/Msr/PentiumMMsr.h | 26 +-
> UefiCpuPkg/Include/Register/Msr/PentiumMsr.h | 8 +-
> UefiCpuPkg/Include/Register/Msr/SandyBridgeMsr.h | 537 ++---
> UefiCpuPkg/Include/Register/Msr/SilvermontMsr.h | 411 ++--
> UefiCpuPkg/Include/Register/Msr/SkylakeMsr.h | 1189 +++++++++-
> UefiCpuPkg/Include/Register/Msr/Xeon5600Msr.h | 2 +-
> UefiCpuPkg/Include/Register/Msr/XeonDMsr.h | 456 +---
> UefiCpuPkg/Include/Register/Msr/XeonE7Msr.h | 74 +-
> UefiCpuPkg/Include/Register/Msr/XeonPhiMsr.h | 314 +--
> 24 files changed, 5323 insertions(+), 2830 deletions(-)
> create mode 100644 UefiCpuPkg/Include/Register/Msr/GoldmontMsr.h
>
> --
> 1.9.5.msysgit.0
prev parent reply other threads:[~2016-12-15 18:16 UTC|newest]
Thread overview: 6+ messages / expand[flat|nested] mbox.gz Atom feed top
2016-12-14 8:33 [PATCH 0/4] Update CPUID & MSR header files with SDM (Sep.2016) Hao Wu
2016-12-14 8:33 ` [PATCH 1/4] UefiCpuPkg/Include: Update " Hao Wu
2016-12-14 8:33 ` [PATCH 2/4] UefiCpuPkg/Include: Update Skylake MSR header file " Hao Wu
2016-12-14 8:33 ` [PATCH 3/4] UefiCpuPkg/Include: Add Goldmont " Hao Wu
2016-12-14 8:33 ` [PATCH 4/4] UefiCpuPkg/Cpuid.h: Update CPUID definitions " Hao Wu
2016-12-15 18:16 ` Kinney, Michael D [this message]
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