From: "Kinney, Michael D" <michael.d.kinney@intel.com>
To: "Gao, Liming" <liming.gao@intel.com>,
"edk2-devel@lists.01.org" <edk2-devel@lists.01.org>,
"Kinney, Michael D" <michael.d.kinney@intel.com>
Cc: Andrew Fish <afish@apple.com>,
"Yao, Jiewen" <jiewen.yao@intel.com>,
"Dong, Eric" <eric.dong@intel.com>,
Laszlo Ersek <lersek@redhat.com>
Subject: Re: [Patch 4/7] UefiCpuPkg: Update CpuExceptionHandlerLib pass XCODE5 tool chain
Date: Wed, 10 Jan 2018 19:21:40 +0000 [thread overview]
Message-ID: <E92EE9817A31E24EB0585FDF735412F5B88AAD59@ORSMSX113.amr.corp.intel.com> (raw)
In-Reply-To: <20180110152432.15964-5-liming.gao@intel.com>
Liming,
Can we use NASM syntax for instructions instead of db bytes?
If you put the label for the fixup after the instruction, you
can patch by subtracting the size of the patch value from the
label.
For example, instead of:
> + db 0x48, 0xB8
> +JmpAbsoluteAddress:
> + dq 0 ; mov rax, HookAfterStubHeaderEnd
Use:
movq rax, 0
JmpAbsoluteAddress:
And in the patch loop:
mov qword [rcx + (JmpAbsoluteAddress - 8 - HookAfterStubHeaderBegin)], rax
If this works, then please use this technique to remove
use of db for instructions throughout this series.
Mike
> -----Original Message-----
> From: Gao, Liming
> Sent: Wednesday, January 10, 2018 7:24 AM
> To: edk2-devel@lists.01.org
> Cc: Andrew Fish <afish@apple.com>; Yao, Jiewen
> <jiewen.yao@intel.com>; Dong, Eric <eric.dong@intel.com>;
> Laszlo Ersek <lersek@redhat.com>; Kinney, Michael D
> <michael.d.kinney@intel.com>
> Subject: [Patch 4/7] UefiCpuPkg: Update
> CpuExceptionHandlerLib pass XCODE5 tool chain
>
> Use the dummy address as jmp destination, and add the
> logic to fix up
> the address to the absolute address at boot time.
>
> Contributed-under: TianoCore Contribution Agreement 1.1
> Signed-off-by: Liming Gao <liming.gao@intel.com>
> Cc: Andrew Fish <afish@apple.com>
> Cc: Jiewen Yao <jiewen.yao@intel.com>
> Cc: Eric Dong <eric.dong@intel.com>
> Cc: Laszlo Ersek <lersek@redhat.com>
> Cc: Michael Kinney <michael.d.kinney@intel.com>
> ---
> .../X64/ExceptionHandlerAsm.nasm | 29
> ++++++++++++++++------
> 1 file changed, 22 insertions(+), 7 deletions(-)
>
> diff --git
> a/UefiCpuPkg/Library/CpuExceptionHandlerLib/X64/Exception
> HandlerAsm.nasm
> b/UefiCpuPkg/Library/CpuExceptionHandlerLib/X64/Exception
> HandlerAsm.nasm
> index ba8993d84b..a5fde0a875 100644
> ---
> a/UefiCpuPkg/Library/CpuExceptionHandlerLib/X64/Exception
> HandlerAsm.nasm
> +++
> b/UefiCpuPkg/Library/CpuExceptionHandlerLib/X64/Exception
> HandlerAsm.nasm
> @@ -1,5 +1,5 @@
> ;-------------------------------------------------------
> ----------------------- ;
> -; Copyright (c) 2012 - 2014, Intel Corporation. All
> rights reserved.<BR>
> +; Copyright (c) 2012 - 2018, Intel Corporation. All
> rights reserved.<BR>
> ; This program and the accompanying materials
> ; are licensed and made available under the terms and
> conditions of the BSD License
> ; which accompanies this distribution. The full text of
> the license may be found at
> @@ -40,7 +40,8 @@ AsmIdtVectorBegin:
> db 0x6a ; push #VectorNum
> db ($ - AsmIdtVectorBegin) / ((AsmIdtVectorEnd
> - AsmIdtVectorBegin) / 32) ; VectorNum
> push rax
> - mov rax, ASM_PFX(CommonInterruptEntry)
> + db 0x48, 0xB8
> + dq 0 ; mov rax,
> ASM_PFX(CommonInterruptEntry)
> jmp rax
> %endrep
> AsmIdtVectorEnd:
> @@ -50,7 +51,9 @@ HookAfterStubHeaderBegin:
> @VectorNum:
> db 0 ; 0 will be fixed
> push rax
> - mov rax, HookAfterStubHeaderEnd
> + db 0x48, 0xB8
> +JmpAbsoluteAddress:
> + dq 0 ; mov rax, HookAfterStubHeaderEnd
> jmp rax
> HookAfterStubHeaderEnd:
> mov rax, rsp
> @@ -260,8 +263,7 @@ HasErrorCode:
> ; and make sure RSP is 16-byte aligned
> ;
> sub rsp, 4 * 8 + 8
> - mov rax, ASM_PFX(CommonExceptionHandler)
> - call rax
> + call ASM_PFX(CommonExceptionHandler)
> add rsp, 4 * 8 + 8
>
> cli
> @@ -369,11 +371,24 @@ DoIret:
> ; comments here for definition of address map
> global ASM_PFX(AsmGetTemplateAddressMap)
> ASM_PFX(AsmGetTemplateAddressMap):
> - mov rax, AsmIdtVectorBegin
> + lea rax, [AsmIdtVectorBegin]
> mov qword [rcx], rax
> mov qword [rcx + 0x8], (AsmIdtVectorEnd -
> AsmIdtVectorBegin) / 32
> - mov rax, HookAfterStubHeaderBegin
> + lea rax, [HookAfterStubHeaderBegin]
> mov qword [rcx + 0x10], rax
> +
> +; Fix up CommonInterruptEntry address
> + lea rax, [ASM_PFX(CommonInterruptEntry)]
> + lea rcx, [AsmIdtVectorBegin]
> +%rep 32
> + mov qword [rcx + (JmpAbsoluteAddress -
> HookAfterStubHeaderBegin)], rax
> + add rcx, (AsmIdtVectorEnd - AsmIdtVectorBegin) /
> 32
> +%endrep
> +; Fix up HookAfterStubHeaderEnd
> + lea rax, [HookAfterStubHeaderEnd]
> + lea rcx, [JmpAbsoluteAddress]
> + mov qword [rcx], rax
> +
> ret
>
> ;-------------------------------------------------------
> ------------------------------
> --
> 2.11.0.windows.1
next prev parent reply other threads:[~2018-01-10 19:16 UTC|newest]
Thread overview: 18+ messages / expand[flat|nested] mbox.gz Atom feed top
2018-01-10 15:24 [Patch 0/7] EDK2: Enable XCODE5 tool chain with NASM source Liming Gao
2018-01-10 15:24 ` [Patch 1/7] BaseTools: Disable -Wno-unused-const-variable in XCODE5 RELEASE target Liming Gao
2018-01-16 8:22 ` Zhu, Yonghong
2018-01-10 15:24 ` [Patch 2/7] BaseTools: Use nasm as the preferred assembly source files for XCODE5 tool Liming Gao
2018-01-16 8:24 ` Zhu, Yonghong
2018-01-10 15:24 ` [Patch 3/7] MdeModulePkg: Update DebugSupportDxe to pass XCODE5 build Liming Gao
2018-01-11 2:31 ` Zeng, Star
2018-01-10 15:24 ` [Patch 4/7] UefiCpuPkg: Update CpuExceptionHandlerLib pass XCODE5 tool chain Liming Gao
2018-01-10 19:21 ` Kinney, Michael D [this message]
2018-01-10 21:57 ` Kinney, Michael D
2018-01-11 2:21 ` Gao, Liming
2018-01-10 15:24 ` [Patch 5/7] UefiCpuPkg: Update SmmCpuFeatureLib " Liming Gao
2018-01-10 15:24 ` [Patch 6/7] UefiCpuPkg: Update PiSmmCpuDxeSmm " Liming Gao
2018-01-10 15:24 ` [Patch 7/7] OvmfPkg: Don't add -mno-mmx -mno-sse option for " Liming Gao
2018-01-10 18:22 ` Laszlo Ersek
2018-01-11 9:54 ` [Patch 0/7] EDK2: Enable XCODE5 tool chain with NASM source Laszlo Ersek
2018-01-11 10:02 ` Laszlo Ersek
2018-01-12 2:15 ` Gao, Liming
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