Re: [Patch 4/7] UefiCpuPkg: Update CpuExceptionHandlerLib pass XCODE5 tool chain

["Kinney, Michael D" <michael.d.kinney@intel.com>]

Liming,

Here is a previous patch email series that demonstrates 
this technique.

https://lists.01.org/pipermail/edk2-devel/2017-September/015109.html

https://github.com/tianocore/edk2/commit/4c34a8ea191155f438901e635bd87810072b19a4#diff-5d3b0f5982124c722c30f6d0e6b8711d

Thanks,

Mike

> -----Original Message-----
> From: Kinney, Michael D
> Sent: Wednesday, January 10, 2018 11:22 AM
> To: Gao, Liming <liming.gao@intel.com>; edk2-
> devel@lists.01.org; Kinney, Michael D
> <michael.d.kinney@intel.com>
> Cc: Andrew Fish <afish@apple.com>; Yao, Jiewen
> <jiewen.yao@intel.com>; Dong, Eric <eric.dong@intel.com>;
> Laszlo Ersek <lersek@redhat.com>
> Subject: RE: [Patch 4/7] UefiCpuPkg: Update
> CpuExceptionHandlerLib pass XCODE5 tool chain
> 
> Liming,
> 
> Can we use NASM syntax for instructions instead of db
> bytes?
> 
> If you put the label for the fixup after the instruction,
> you
> can patch by subtracting the size of the patch value from
> the
> label.
> 
> For example, instead of:
> 
> > +    db      0x48, 0xB8
> > +JmpAbsoluteAddress:
> > +    dq      0 ;     mov     rax,
> HookAfterStubHeaderEnd
> 
> Use:
> 
> 	movq	rax, 0
> JmpAbsoluteAddress:
> 
> And in the patch loop:
> 
>     mov    qword [rcx + (JmpAbsoluteAddress - 8 -
> HookAfterStubHeaderBegin)], rax
> 
> 
> If this works, then please use this technique to remove
> use of db for instructions throughout this series.
> 
> Mike
> 
> > -----Original Message-----
> > From: Gao, Liming
> > Sent: Wednesday, January 10, 2018 7:24 AM
> > To: edk2-devel@lists.01.org
> > Cc: Andrew Fish <afish@apple.com>; Yao, Jiewen
> > <jiewen.yao@intel.com>; Dong, Eric
> <eric.dong@intel.com>;
> > Laszlo Ersek <lersek@redhat.com>; Kinney, Michael D
> > <michael.d.kinney@intel.com>
> > Subject: [Patch 4/7] UefiCpuPkg: Update
> > CpuExceptionHandlerLib pass XCODE5 tool chain
> >
> > Use the dummy address as jmp destination, and add the
> > logic to fix up
> > the address to the absolute address at boot time.
> >
> > Contributed-under: TianoCore Contribution Agreement 1.1
> > Signed-off-by: Liming Gao <liming.gao@intel.com>
> > Cc: Andrew Fish <afish@apple.com>
> > Cc: Jiewen Yao <jiewen.yao@intel.com>
> > Cc: Eric Dong <eric.dong@intel.com>
> > Cc: Laszlo Ersek <lersek@redhat.com>
> > Cc: Michael Kinney <michael.d.kinney@intel.com>
> > ---
> >  .../X64/ExceptionHandlerAsm.nasm                   |
> 29
> > ++++++++++++++++------
> >  1 file changed, 22 insertions(+), 7 deletions(-)
> >
> > diff --git
> >
> a/UefiCpuPkg/Library/CpuExceptionHandlerLib/X64/Exception
> > HandlerAsm.nasm
> >
> b/UefiCpuPkg/Library/CpuExceptionHandlerLib/X64/Exception
> > HandlerAsm.nasm
> > index ba8993d84b..a5fde0a875 100644
> > ---
> >
> a/UefiCpuPkg/Library/CpuExceptionHandlerLib/X64/Exception
> > HandlerAsm.nasm
> > +++
> >
> b/UefiCpuPkg/Library/CpuExceptionHandlerLib/X64/Exception
> > HandlerAsm.nasm
> > @@ -1,5 +1,5 @@
> >  ;-----------------------------------------------------
> --
> > ----------------------- ;
> > -; Copyright (c) 2012 - 2014, Intel Corporation. All
> > rights reserved.<BR>
> > +; Copyright (c) 2012 - 2018, Intel Corporation. All
> > rights reserved.<BR>
> >  ; This program and the accompanying materials
> >  ; are licensed and made available under the terms and
> > conditions of the BSD License
> >  ; which accompanies this distribution.  The full text
> of
> > the license may be found at
> > @@ -40,7 +40,8 @@ AsmIdtVectorBegin:
> >      db      0x6a        ; push  #VectorNum
> >      db      ($ - AsmIdtVectorBegin) /
> ((AsmIdtVectorEnd
> > - AsmIdtVectorBegin) / 32) ; VectorNum
> >      push    rax
> > -    mov     rax, ASM_PFX(CommonInterruptEntry)
> > +    db      0x48, 0xB8
> > +    dq      0 ;     mov     rax,
> > ASM_PFX(CommonInterruptEntry)
> >      jmp     rax
> >  %endrep
> >  AsmIdtVectorEnd:
> > @@ -50,7 +51,9 @@ HookAfterStubHeaderBegin:
> >  @VectorNum:
> >      db      0          ; 0 will be fixed
> >      push    rax
> > -    mov     rax, HookAfterStubHeaderEnd
> > +    db      0x48, 0xB8
> > +JmpAbsoluteAddress:
> > +    dq      0 ;     mov     rax,
> HookAfterStubHeaderEnd
> >      jmp     rax
> >  HookAfterStubHeaderEnd:
> >      mov     rax, rsp
> > @@ -260,8 +263,7 @@ HasErrorCode:
> >      ; and make sure RSP is 16-byte aligned
> >      ;
> >      sub     rsp, 4 * 8 + 8
> > -    mov     rax, ASM_PFX(CommonExceptionHandler)
> > -    call    rax
> > +    call    ASM_PFX(CommonExceptionHandler)
> >      add     rsp, 4 * 8 + 8
> >
> >      cli
> > @@ -369,11 +371,24 @@ DoIret:
> >  ; comments here for definition of address map
> >  global ASM_PFX(AsmGetTemplateAddressMap)
> >  ASM_PFX(AsmGetTemplateAddressMap):
> > -    mov     rax, AsmIdtVectorBegin
> > +    lea     rax, [AsmIdtVectorBegin]
> >      mov     qword [rcx], rax
> >      mov     qword [rcx + 0x8],  (AsmIdtVectorEnd -
> > AsmIdtVectorBegin) / 32
> > -    mov     rax, HookAfterStubHeaderBegin
> > +    lea     rax, [HookAfterStubHeaderBegin]
> >      mov     qword [rcx + 0x10], rax
> > +
> > +; Fix up CommonInterruptEntry address
> > +    lea    rax, [ASM_PFX(CommonInterruptEntry)]
> > +    lea    rcx, [AsmIdtVectorBegin]
> > +%rep  32
> > +    mov    qword [rcx + (JmpAbsoluteAddress -
> > HookAfterStubHeaderBegin)], rax
> > +    add    rcx, (AsmIdtVectorEnd - AsmIdtVectorBegin)
> /
> > 32
> > +%endrep
> > +; Fix up HookAfterStubHeaderEnd
> > +    lea    rax, [HookAfterStubHeaderEnd]
> > +    lea    rcx, [JmpAbsoluteAddress]
> > +    mov    qword [rcx], rax
> > +
> >      ret
> >
> >  ;-----------------------------------------------------
> --
> > ------------------------------
> > --
> > 2.11.0.windows.1