From mboxrd@z Thu Jan 1 00:00:00 1970 Authentication-Results: mx.groups.io; dkim=missing; spf=pass (domain: intel.com, ip: 192.55.52.88, mailfrom: michael.d.kinney@intel.com) Received: from mga01.intel.com (mga01.intel.com [192.55.52.88]) by groups.io with SMTP; Thu, 08 Aug 2019 10:29:55 -0700 X-Amp-Result: SKIPPED(no attachment in message) X-Amp-File-Uploaded: False Received: from fmsmga006.fm.intel.com ([10.253.24.20]) by fmsmga101.fm.intel.com with ESMTP/TLS/DHE-RSA-AES256-GCM-SHA384; 08 Aug 2019 10:29:55 -0700 X-ExtLoop1: 1 X-IronPort-AV: E=Sophos;i="5.64,362,1559545200"; d="scan'208";a="374928503" Received: from orsmsx103.amr.corp.intel.com ([10.22.225.130]) by fmsmga006.fm.intel.com with ESMTP; 08 Aug 2019 10:29:54 -0700 Received: from orsmsx115.amr.corp.intel.com (10.22.240.11) by ORSMSX103.amr.corp.intel.com (10.22.225.130) with Microsoft SMTP Server (TLS) id 14.3.439.0; Thu, 8 Aug 2019 10:29:54 -0700 Received: from orsmsx113.amr.corp.intel.com ([169.254.9.177]) by ORSMSX115.amr.corp.intel.com ([169.254.4.240]) with mapi id 14.03.0439.000; Thu, 8 Aug 2019 10:29:54 -0700 From: "Michael D Kinney" To: Leif Lindholm , "Loh, Tien Hock" , "Kinney, Michael D" CC: "devel@edk2.groups.io" , "thloh85@gmail.com" , Ard Biesheuvel Subject: Re: [[edk2-platforms]PATCH v5 1/1] Platform: Intel: Add Stratix 10 platform support Thread-Topic: [[edk2-platforms]PATCH v5 1/1] Platform: Intel: Add Stratix 10 platform support Thread-Index: AQHVO7yK8MIJOE2Y6kqJoqcWs8Tt9KbSa2oAgB86guA= Date: Thu, 8 Aug 2019 17:29:54 +0000 Message-ID: References: <20190716095431.154700-1-tien.hock.loh@intel.com> <20190719133504.GV2712@bivouac.eciton.net> In-Reply-To: <20190719133504.GV2712@bivouac.eciton.net> Accept-Language: en-US X-MS-Has-Attach: X-MS-TNEF-Correlator: dlp-product: dlpe-windows dlp-version: 11.2.0.6 dlp-reaction: no-action x-originating-ip: [10.22.254.138] MIME-Version: 1.0 Return-Path: michael.d.kinney@intel.com Content-Language: en-US Content-Type: text/plain; charset="us-ascii" Content-Transfer-Encoding: quoted-printable Leif, Please add you and I as Maintainers and Tien Hock as a Reviewer. Mike > -----Original Message----- > From: Leif Lindholm [mailto:leif.lindholm@linaro.org] > Sent: Friday, July 19, 2019 6:35 AM > To: Loh, Tien Hock > Cc: devel@edk2.groups.io; thloh85@gmail.com; Ard > Biesheuvel ; Kinney, Michael > D > Subject: Re: [[edk2-platforms]PATCH v5 1/1] Platform: > Intel: Add Stratix 10 platform support >=20 > For this patch: > Reviewed-by: Leif Lindholm >=20 > Mike - what do you want to do here, maintainership > wise? >=20 > This is an ARM-based Intel platform. It makes sense to > me that I > should help look after it, with Loh as a designated > reviewer. >=20 > I intend to send out a patch converting *this* > Maintainers.txt to the > new format once the GetMaintainer.py script is merged. >=20 > Best Regards, >=20 > Leif >=20 > On Tue, Jul 16, 2019 at 05:54:31PM +0800, > tien.hock.loh@intel.com wrote: > > From: "Tien Hock, Loh" > > > > Adds support for Intel Stratix 10 Platform. > > > > Signed-off-by: "Tien Hock, Loh" > > > Contributed-under: TianoCore Contribution Agreement > 1.1 > > Cc: Ard Biesheuvel > > Cc: Leif Lindholm > > Cc: Michael D Kinney > > --- > > > Platform/Intel/Stratix10/Drivers/IntelPlatformDxe/Intel > PlatformDxe.c | 43 ++ > > > Platform/Intel/Stratix10/Drivers/IntelPlatformDxe/Intel > PlatformDxe.inf | 48 ++ > > > Platform/Intel/Stratix10/Library/IntelPlatformLib/AArch > 64/ArmPlatformHelper.S | 51 ++ > > > Platform/Intel/Stratix10/Library/IntelPlatformLib/Intel > PlatformLib.inf | 49 ++ > > > Platform/Intel/Stratix10/Library/IntelPlatformLib/Strat > ix10Mmu.c | 155 ++++++ > > > Platform/Intel/Stratix10/Library/IntelPlatformLib/Strat > ix10PlatformLib.c | 153 ++++++ > > Platform/Intel/Stratix10/Readme.md > | 61 +++ > > Platform/Intel/Stratix10/Stratix10SoCPkg.dec > | 22 + > > Platform/Intel/Stratix10/Stratix10SoCPkg.dsc > | 500 ++++++++++++++++++++ > > Platform/Intel/Stratix10/Stratix10SoCPkg.fdf > | 253 ++++++++++ > > Readme.md > | 3 + > > 11 files changed, 1338 insertions(+) > > > > diff --git > a/Platform/Intel/Stratix10/Drivers/IntelPlatformDxe/Int > elPlatformDxe.c > b/Platform/Intel/Stratix10/Drivers/IntelPlatformDxe/Int > elPlatformDxe.c > > new file mode 100644 > > index 000000000000..144b4c54ef55 > > --- /dev/null > > +++ > b/Platform/Intel/Stratix10/Drivers/IntelPlatformDxe/Int > elPlatformDxe.c > > @@ -0,0 +1,43 @@ > > +/** @file > > +* > > +* Copyright (c) 2019, Intel All rights reserved. > > +* > > +* This program and the accompanying materials > > +* are licensed and made available under the terms > and conditions of the BSD License > > +* which accompanies this distribution. The full > text of the license may be found at > > +* http://opensource.org/licenses/bsd-license.php > > +* > > +* THE PROGRAM IS DISTRIBUTED UNDER THE BSD LICENSE > ON AN "AS IS" BASIS, > > +* WITHOUT WARRANTIES OR REPRESENTATIONS OF ANY > KIND, EITHER EXPRESS OR IMPLIED. > > +* > > +**/ > > + > > + > > +#include > > +#include > > +#include > > +#include > > +#include > > +#include > > +#include > > +#include > > +#include > > +#include > > +#include > > +#include > > +#include > > +#include > > +#include > > + > > +EFI_STATUS > > +EFIAPI > > +IntelPlatformDxeEntryPoint ( > > + IN EFI_HANDLE ImageHandle, > > + IN EFI_SYSTEM_TABLE *SystemTable > > + ) > > +{ > > + EFI_STATUS Status =3D 0; > > + > > + return Status; > > +} > > + > > diff --git > a/Platform/Intel/Stratix10/Drivers/IntelPlatformDxe/Int > elPlatformDxe.inf > b/Platform/Intel/Stratix10/Drivers/IntelPlatformDxe/Int > elPlatformDxe.inf > > new file mode 100644 > > index 000000000000..64b398969f1e > > --- /dev/null > > +++ > b/Platform/Intel/Stratix10/Drivers/IntelPlatformDxe/Int > elPlatformDxe.inf > > @@ -0,0 +1,48 @@ > > +#/** @file > > +# > > +# Copyright (c) 2019, Intel All rights reserved. > > +# > > +# This program and the accompanying materials > > +# are licensed and made available under the terms > and conditions of the BSD License > > +# which accompanies this distribution. The full > text of the license may be found at > > +# http://opensource.org/licenses/bsd-license.php > > +# > > +# THE PROGRAM IS DISTRIBUTED UNDER THE BSD LICENSE > ON AN "AS IS" BASIS, > > +# WITHOUT WARRANTIES OR REPRESENTATIONS OF ANY > KIND, EITHER EXPRESS OR IMPLIED. > > +# > > +# > > +#**/ > > + > > +[Defines] > > + INF_VERSION =3D 0x0001001B > > + BASE_NAME =3D IntelPlatformDxe > > + FILE_GUID =3D AB87E291-1689- > 4c7b-B613-FB54A0E38CEA > > + MODULE_TYPE =3D DXE_DRIVER > > + VERSION_STRING =3D 1.0 > > + ENTRY_POINT =3D > IntelPlatformDxeEntryPoint > > + > > +[Sources.common] > > + IntelPlatformDxe.c > > + > > +[Packages] > > + ArmPkg/ArmPkg.dec > > + ArmPlatformPkg/ArmPlatformPkg.dec > > + EmbeddedPkg/EmbeddedPkg.dec > > + MdePkg/MdePkg.dec > > + > > +[LibraryClasses] > > + ArmLib > > + BaseMemoryLib > > + DebugLib > > + DxeServicesTableLib > > + PcdLib > > + PrintLib > > + SerialPortLib > > + UefiBootServicesTableLib > > + UefiRuntimeServicesTableLib > > + UefiLib > > + UefiDriverEntryPoint > > + > > +[Depex] > > + # We depend on these protocols to create the > default boot entries > > + gEfiVariableArchProtocolGuid AND > gEfiVariableWriteArchProtocolGuid > > diff --git > a/Platform/Intel/Stratix10/Library/IntelPlatformLib/AAr > ch64/ArmPlatformHelper.S > b/Platform/Intel/Stratix10/Library/IntelPlatformLib/AAr > ch64/ArmPlatformHelper.S > > new file mode 100644 > > index 000000000000..2f4cf95cbf13 > > --- /dev/null > > +++ > b/Platform/Intel/Stratix10/Library/IntelPlatformLib/AAr > ch64/ArmPlatformHelper.S > > @@ -0,0 +1,51 @@ > > +// > > +// Copyright (c) 2012-2013, ARM Limited. All rights > reserved. > > +// > > +// This program and the accompanying materials > > +// are licensed and made available under the terms > and conditions of the BSD License > > +// which accompanies this distribution. The full > text of the license may be found at > > +// http://opensource.org/licenses/bsd-license.php > > +// > > +// THE PROGRAM IS DISTRIBUTED UNDER THE BSD LICENSE > ON AN "AS IS" BASIS, > > +// WITHOUT WARRANTIES OR REPRESENTATIONS OF ANY > KIND, EITHER EXPRESS OR IMPLIED. > > +// > > +// > > + > > +#include > > +#include > > + > > +ASM_FUNC(ArmPlatformPeiBootAction) > > + ret > > + > > +//UINTN > > +//ArmPlatformGetCorePosition ( > > +// IN UINTN MpId > > +// ); > > +// With this function: CorePos =3D (ClusterId * 4) + > CoreId > > +ASM_FUNC(ArmPlatformGetCorePosition) > > + and x1, x0, #ARM_CORE_MASK > > + and x0, x0, #ARM_CLUSTER_MASK > > + add x0, x1, x0, LSR #6 > > + ret > > + > > +//UINTN > > +//ArmPlatformGetPrimaryCoreMpId ( > > +// VOID > > +// ); > > +ASM_FUNC(ArmPlatformGetPrimaryCoreMpId) > > + MOV32 (w0, FixedPcdGet32 (PcdArmPrimaryCore)) > > + ret > > + > > +//UINTN > > +//ArmPlatformIsPrimaryCore ( > > +// IN UINTN MpId > > +// ); > > +ASM_FUNC(ArmPlatformIsPrimaryCore) > > + MOV32 (w1, FixedPcdGet32 (PcdArmPrimaryCoreMask)) > > + and x0, x0, x1 > > + MOV32 (w1, FixedPcdGet32 (PcdArmPrimaryCore)) > > + cmp w0, w1 > > + mov x0, #1 > > + mov x1, #0 > > + csel x0, x0, x1, eq > > + ret > > diff --git > a/Platform/Intel/Stratix10/Library/IntelPlatformLib/Int > elPlatformLib.inf > b/Platform/Intel/Stratix10/Library/IntelPlatformLib/Int > elPlatformLib.inf > > new file mode 100644 > > index 000000000000..ef5c06aede7f > > --- /dev/null > > +++ > b/Platform/Intel/Stratix10/Library/IntelPlatformLib/Int > elPlatformLib.inf > > @@ -0,0 +1,49 @@ > > +/** @file > > +* > > +* Stratix 10 Platform Library > > +* > > +* Copyright (c) 2019, Intel Corporations All rights > reserved. > > +* > > +* This program and the accompanying materials > > +* are licensed and made available under the terms > and conditions of the BSD License > > +* which accompanies this distribution. The full > text of the license may be found at > > +* http://opensource.org/licenses/bsd-license.php > > +* > > +* THE PROGRAM IS DISTRIBUTED UNDER THE BSD LICENSE > ON AN "AS IS" BASIS, > > +* WITHOUT WARRANTIES OR REPRESENTATIONS OF ANY > KIND, EITHER EXPRESS OR IMPLIED. > > +* > > +**/ > > + > > +[Defines] > > + INF_VERSION =3D 0x0001001B > > + BASE_NAME =3D > Stratix10PlatformLib > > + FILE_GUID =3D 99E236C7-D5FD- > 42A0-B520-60C85C4870B8 > > + MODULE_TYPE =3D BASE > > + VERSION_STRING =3D 1.0 > > + LIBRARY_CLASS =3D ArmPlatformLib > > + > > +[Packages] > > + ArmPlatformPkg/ArmPlatformPkg.dec > > + ArmPkg/ArmPkg.dec > > + MdeModulePkg/MdeModulePkg.dec > > + MdePkg/MdePkg.dec > > + Platform/Intel/Stratix10/Stratix10SoCPkg.dec > > + > > +[LibraryClasses] > > + ArmLib > > + ArmMmuLib > > + DebugLib > > + IoLib > > + PcdLib > > + > > +[Sources.common] > > + Stratix10PlatformLib.c > > + Stratix10Mmu.c > > + > > +[Sources.AArch64] > > + AArch64/ArmPlatformHelper.S > > + > > +[FixedPcd] > > + gArmTokenSpaceGuid.PcdArmPrimaryCoreMask > > + gArmTokenSpaceGuid.PcdArmPrimaryCore > > + > > diff --git > a/Platform/Intel/Stratix10/Library/IntelPlatformLib/Str > atix10Mmu.c > b/Platform/Intel/Stratix10/Library/IntelPlatformLib/Str > atix10Mmu.c > > new file mode 100644 > > index 000000000000..892387bf5d07 > > --- /dev/null > > +++ > b/Platform/Intel/Stratix10/Library/IntelPlatformLib/Str > atix10Mmu.c > > @@ -0,0 +1,155 @@ > > +/** @file > > +* > > +* Stratix 10 Mmu configuration > > +* > > +* Copyright (c) 2019, Intel Corporations All rights > reserved. > > +* > > +* This program and the accompanying materials > > +* are licensed and made available under the terms > and conditions of the BSD License > > +* which accompanies this distribution. The full > text of the license may be found at > > +* http://opensource.org/licenses/bsd-license.php > > +* > > +* THE PROGRAM IS DISTRIBUTED UNDER THE BSD LICENSE > ON AN "AS IS" BASIS, > > +* WITHOUT WARRANTIES OR REPRESENTATIONS OF ANY > KIND, EITHER EXPRESS OR IMPLIED. > > +* > > +**/ > > + > > +#include > > +#include > > +#include > > +#include > > +#include > > +#include > > +#include > > +#include > > +#include > > + > > +// The total number of descriptors, including the > final "end-of-table" descriptor. > > +#define MAX_VIRTUAL_MEMORY_MAP_DESCRIPTORS 16 > > +ARM_MEMORY_REGION_DESCRIPTOR > gVirtualMemoryTable[MAX_VIRTUAL_MEMORY_MAP_DESCRIPTORS] > ; > > + > > +// DDR attributes > > +#define DDR_ATTRIBUTES_CACHED > ARM_MEMORY_REGION_ATTRIBUTE_WRITE_BACK > > +#define DDR_ATTRIBUTES_UNCACHED > ARM_MEMORY_REGION_ATTRIBUTE_UNCACHED_UNBUFFERED > > + > > +#define DRAM_BASE 0x0 > > +#define DRAM_SIZE 0x40000000 > > + > > +#define FPGA_SLAVES_BASE 0x80000000 > > +#define FPGA_SLAVES_SIZE 0x60000000 > > + > > +#define PERIPHERAL_BASE 0xF7000000 > > +#define PERIPHERAL_SIZE 0x08E00000 > > + > > +#define OCRAM_BASE 0xFFE00000 > > +#define OCRAM_SIZE 0x00100000 > > + > > +#define GIC_BASE 0xFFFC0000 > > +#define GIC_SIZE 0x00008000 > > + > > +#define MEM64_BASE 0x0100000000 > > +#define MEM64_SIZE 0x1F00000000 > > + > > +#define DEVICE64_BASE 0x2000000000 > > +#define DEVICE64_SIZE 0x0100000000 > > +/** > > + Return the Virtual Memory Map of your platform > > + > > + This Virtual Memory Map is used to initialize the > MMU for DXE Phase. > > + > > + @param[out] VirtualMemoryMap Array of > ARM_MEMORY_REGION_DESCRIPTOR describing a Physical-to- > > + Virtual Memory > mapping. This array must be ended by a zero-filled > > + entry > > + > > +**/ > > +VOID > > +EFIAPI > > +ArmPlatformGetVirtualMemoryMap ( > > + IN ARM_MEMORY_REGION_DESCRIPTOR** VirtualMemoryMap > > + ) > > +{ > > + ARM_MEMORY_REGION_DESCRIPTOR *VirtualMemoryTable; > > + ARM_MEMORY_REGION_ATTRIBUTES CacheAttributes; > > + UINTN Index =3D 0; > > + > > + VirtualMemoryTable =3D &gVirtualMemoryTable[0]; > > + > > + CacheAttributes =3D DDR_ATTRIBUTES_CACHED; > > + > > + // Start create the Virtual Memory Map table > > + // Our goal is to a simple 1:1 mapping where > virtual=3D=3Dphysical address > > + > > + // DDR SDRAM > > + VirtualMemoryTable[Index].PhysicalBase =3D > DRAM_BASE; > > + VirtualMemoryTable[Index].VirtualBase =3D > VirtualMemoryTable[Index].PhysicalBase; > > + VirtualMemoryTable[Index].Length =3D > DRAM_SIZE; > > + VirtualMemoryTable[Index++].Attributes =3D > CacheAttributes; > > + > > + // FPGA > > + VirtualMemoryTable[Index].PhysicalBase =3D > FPGA_SLAVES_BASE; > > + VirtualMemoryTable[Index].VirtualBase =3D > VirtualMemoryTable[Index].PhysicalBase; > > + VirtualMemoryTable[Index].Length =3D > FPGA_SLAVES_SIZE; > > + VirtualMemoryTable[Index++].Attributes =3D > ARM_MEMORY_REGION_ATTRIBUTE_DEVICE; > > + > > + // DEVICE 142MB > > + VirtualMemoryTable[Index].PhysicalBase =3D > PERIPHERAL_BASE; > > + VirtualMemoryTable[Index].VirtualBase =3D > VirtualMemoryTable[Index].PhysicalBase; > > + VirtualMemoryTable[Index].Length =3D > PERIPHERAL_SIZE; > > + VirtualMemoryTable[Index++].Attributes =3D > ARM_MEMORY_REGION_ATTRIBUTE_DEVICE; > > + > > + // OCRAM 1MB but available 256KB > > + VirtualMemoryTable[Index].PhysicalBase =3D > OCRAM_BASE; > > + VirtualMemoryTable[Index].VirtualBase =3D > VirtualMemoryTable[Index].PhysicalBase; > > + VirtualMemoryTable[Index].Length =3D > OCRAM_SIZE; > > + VirtualMemoryTable[Index++].Attributes =3D > CacheAttributes; > > + > > + // DEVICE 32KB > > + VirtualMemoryTable[Index].PhysicalBase =3D GIC_BASE; > > + VirtualMemoryTable[Index].VirtualBase =3D > VirtualMemoryTable[Index].PhysicalBase; > > + VirtualMemoryTable[Index].Length =3D GIC_SIZE; > > + VirtualMemoryTable[Index++].Attributes =3D > ARM_MEMORY_REGION_ATTRIBUTE_DEVICE; > > + > > + // MEM 124GB > > + VirtualMemoryTable[Index].PhysicalBase =3D > MEM64_BASE; > > + VirtualMemoryTable[Index].VirtualBase =3D > VirtualMemoryTable[Index].PhysicalBase; > > + VirtualMemoryTable[Index].Length =3D > MEM64_SIZE; > > + VirtualMemoryTable[Index++].Attributes =3D > CacheAttributes; > > + > > + // DEVICE 4GB > > + VirtualMemoryTable[Index].PhysicalBase =3D > DEVICE64_BASE; > > + VirtualMemoryTable[Index].VirtualBase =3D > VirtualMemoryTable[Index].PhysicalBase; > > + VirtualMemoryTable[Index].Length =3D > DEVICE64_SIZE; > > + VirtualMemoryTable[Index++].Attributes =3D > ARM_MEMORY_REGION_ATTRIBUTE_DEVICE; > > + > > + // End of Table > > + VirtualMemoryTable[Index].PhysicalBase =3D 0; > > + VirtualMemoryTable[Index].VirtualBase =3D 0; > > + VirtualMemoryTable[Index].Length =3D 0; > > + VirtualMemoryTable[Index++].Attributes =3D > (ARM_MEMORY_REGION_ATTRIBUTES)0; > > + > > + ASSERT((Index) <=3D > MAX_VIRTUAL_MEMORY_MAP_DESCRIPTORS); > > + > > + *VirtualMemoryMap =3D VirtualMemoryTable; > > +} > > + > > + > > +VOID > > +EFIAPI > > +InitMmu ( > > + VOID > > + ) > > +{ > > + ARM_MEMORY_REGION_DESCRIPTOR *MemoryTable; > > + VOID > *TranslationTableBase; > > + UINTN > TranslationTableSize; > > + RETURN_STATUS Status; > > + // Construct a Virtual Memory Map for this > platform > > + ArmPlatformGetVirtualMemoryMap (&MemoryTable); > > + > > + // Configure the MMU > > + Status =3D ArmConfigureMmu (MemoryTable, > &TranslationTableBase, &TranslationTableSize); > > + if (EFI_ERROR (Status)) { > > + DEBUG ((DEBUG_ERROR, "Error: Failed to enable > MMU\n")); > > + } > > +} > > + > > diff --git > a/Platform/Intel/Stratix10/Library/IntelPlatformLib/Str > atix10PlatformLib.c > b/Platform/Intel/Stratix10/Library/IntelPlatformLib/Str > atix10PlatformLib.c > > new file mode 100644 > > index 000000000000..8ac30559362d > > --- /dev/null > > +++ > b/Platform/Intel/Stratix10/Library/IntelPlatformLib/Str > atix10PlatformLib.c > > @@ -0,0 +1,153 @@ > > +/** @file > > +* > > +* Stratix 10 Platform Library > > +* > > +* Copyright (c) 2019, Intel Corporations All rights > reserved. > > +* > > +* This program and the accompanying materials > > +* are licensed and made available under the terms > and conditions of the BSD License > > +* which accompanies this distribution. The full > text of the license may be found at > > +* http://opensource.org/licenses/bsd-license.php > > +* > > +* THE PROGRAM IS DISTRIBUTED UNDER THE BSD LICENSE > ON AN "AS IS" BASIS, > > +* WITHOUT WARRANTIES OR REPRESENTATIONS OF ANY > KIND, EITHER EXPRESS OR IMPLIED. > > +* > > +**/ > > + > > +#include > > +#include > > +#include > > +#include > > +#include > > +#include > > +#include > > + > > +#define ALT_RSTMGR_OFST > 0xffd11000 > > +#define ALT_RSTMGR_PER1MODRST_OFST > 0x28 > > +#define ALT_RSTMGR_PER1MODRST_WATCHDOG0_SET_MSK > 0x00000001 > > +#define ALT_RSTMGR_PER1MODRST_L4SYSTIMER0_CLR_MSK > 0xffffffef > > + > > +STATIC EFI_GUID mArmMpCoreInfoPpiGuid =3D > ARM_MP_CORE_INFO_PPI_GUID; > > +// This Table will be consume by Hob init code to > publish it into HOB as MPCore Info > > +// Hob init code will retrieve it by calling > PrePeiCoreGetMpCoreInfo via Ppi > > +STATIC ARM_CORE_INFO > mArmPlatformNullMpCoreInfoTable[] =3D { > > + { > > + // Cluster 0, Core 0 > > + 0x0, 0x0, > > + > > + // MP Core MailBox Set/Get/Clear Addresses and > Clear Value > > + (EFI_PHYSICAL_ADDRESS)0, > > + (EFI_PHYSICAL_ADDRESS)0, > > + (EFI_PHYSICAL_ADDRESS)0, > > + (UINT64)0xFFFFFFFF > > + }, > > + { > > + // Cluster 0, Core 1 > > + 0x0, 0x1, > > + > > + // MP Core MailBox Set/Get/Clear Addresses and > Clear Value > > + (EFI_PHYSICAL_ADDRESS)0, > > + (EFI_PHYSICAL_ADDRESS)0, > > + (EFI_PHYSICAL_ADDRESS)0, > > + (UINT64)0xFFFFFFFF > > + }, > > + { > > + // Cluster 0, Core 2 > > + 0x0, 0x2, > > + > > + // MP Core MailBox Set/Get/Clear Addresses and > Clear Value > > + (EFI_PHYSICAL_ADDRESS)0, > > + (EFI_PHYSICAL_ADDRESS)0, > > + (EFI_PHYSICAL_ADDRESS)0, > > + (UINT64)0xFFFFFFFF > > + }, > > + { > > + // Cluster 0, Core 3 > > + 0x0, 0x3, > > + > > + // MP Core MailBox Set/Get/Clear Addresses and > Clear Value > > + (EFI_PHYSICAL_ADDRESS)0, > > + (EFI_PHYSICAL_ADDRESS)0, > > + (EFI_PHYSICAL_ADDRESS)0, > > + (UINT64)0xFFFFFFFF > > + } > > +}; > > + > > +STATIC > > +VOID > > +AssertWatchDogTimerZeroReset ( > > + VOID > > + ) > > +{ > > + // Assert the Reset signal of Watchdog Timer 0 > which may have been enabled by BootROM > > + MmioOr32 (ALT_RSTMGR_OFST + > > + ALT_RSTMGR_PER1MODRST_OFST, > > + > ALT_RSTMGR_PER1MODRST_WATCHDOG0_SET_MSK); > > +} > > + > > +/** > > + * Return the current Boot Mode > > + * > > + * This function returns the boot reason on the > platform > > + * > > + * **/ > > +EFI_BOOT_MODE > > +ArmPlatformGetBootMode ( > > + VOID > > + ) > > +{ > > + return BOOT_WITH_FULL_CONFIGURATION; > > +} > > + > > + > > +/** > > + Initialize controllers that must setup before > entering PEI MAIN > > +**/ > > +RETURN_STATUS > > +ArmPlatformInitialize ( > > + IN UINTN MpId > > + ) > > +{ > > + AssertWatchDogTimerZeroReset(); > > + return EFI_SUCCESS; > > +} > > + > > +//-------------------------------------------------- > --------------------------------------- > > +// BEGIN ARM CPU RELATED CODE > > +//-------------------------------------------------- > --------------------------------------- > > + > > +EFI_STATUS > > +PrePeiCoreGetMpCoreInfo ( > > + OUT UINTN *CoreCount, > > + OUT ARM_CORE_INFO **ArmCoreTable > > + ) > > +{ > > + *CoreCount =3D > ARRAY_SIZE(mArmPlatformNullMpCoreInfoTable); > > + *ArmCoreTable =3D mArmPlatformNullMpCoreInfoTable; > > + return EFI_SUCCESS; > > +} > > + > > +ARM_MP_CORE_INFO_PPI mMpCoreInfoPpi =3D { > PrePeiCoreGetMpCoreInfo }; > > + > > +EFI_PEI_PPI_DESCRIPTOR gPlatformPpiTable[] =3D { > > + { > > + EFI_PEI_PPI_DESCRIPTOR_PPI, > > + &mArmMpCoreInfoPpiGuid, > > + &mMpCoreInfoPpi > > + } > > +}; > > + > > +VOID > > +ArmPlatformGetPlatformPpiList ( > > + OUT UINTN *PpiListSize, > > + OUT EFI_PEI_PPI_DESCRIPTOR **PpiList > > + ) > > +{ > > + *PpiListSize =3D sizeof(gPlatformPpiTable); > > + *PpiList =3D gPlatformPpiTable; > > +} > > + > > +//-------------------------------------------------- > --------------------------------------- > > +// END ARM CPU RELATED CODE > > +//-------------------------------------------------- > --------------------------------------- > > + > > diff --git a/Platform/Intel/Stratix10/Readme.md > b/Platform/Intel/Stratix10/Readme.md > > new file mode 100644 > > index 000000000000..f0348332e106 > > --- /dev/null > > +++ b/Platform/Intel/Stratix10/Readme.md > > @@ -0,0 +1,61 @@ > > +Intel Stratix 10 Platform > > +=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D= =3D=3D > > + > > +# Summary > > + > > +This is a port of 64-bit Tiano Core UEFI for the > Intel Stratix 10 platform > > +based on Stratix 10 SX development board. > > + > > +This UEFI port works with ATF + UEFI implementation > for Intel Stratix 10 board, and > > +will boot to Linux port of Stratix 10. > > + > > +# Status > > + > > +This firmware has been validated to boot to Linux > for Stratix 10 that can be obtained from > > +https://github.com/altera-opensource/linux-socfpga. > > + > > +The default boot is the UEFI shell. The UEFI > > +shell will run startup.nsh by default, and you may > change the startup.nsh to run commands on boot. > > + > > +# Building the firmware > > + > > +- Fetch the ATF, edk2, and edk2-platforms > repositories into local host. > > + Make all the repositories in the same > ${BUILD\_PATH}. > > + > > +- Install the AARCH64 GNU 4.8 toolchain. > > + > > +- Build UEFI using Stratix 10 platform as > configuration > > + > > + . edksetup.sh > > + > > + build -a AARCH64 -p > Platform/Intel/Stratix10/Stratix10SoCPkg.dsc -t GCC5 -b > RELEASE -y report.log -j build.log -Y PCD -Y LIBRARY -Y > FLASH -Y DEPEX -Y BUILD_FLAGS -Y FIXED_ADDRESS > > + > > +Note: Refer to build instructions from the top level > edk2-platforms Readme.md for further details > > + > > +- Build ATF for Stratix 10 platform (commit > id:2cbeee4d519bac0d79da98faae969fae9f9558f9 is tested > and known working) > > + > > + make CROSS_COMPILE=3Daarch64-linux-gnu- > device=3Ds10 > > + > > +- Build atf providing the previously generated UEFI > as the BL33 image > > + > > + make CROSS_COMPILE=3Daarch64-linux-gnu- bl2 fip > PLAT=3Dstratix10 > > + BL33=3DPEI.ROM > > + > > +Install Procedure > > +----------------- > > + > > +- dd fip.bin to a A2 partition on the MMC drive to > be booted in Stratix 10 > > + board. > > + > > +- Generate a SOF containing bl2 > > + > > +.. code:: bash > > + aarch64-linux-gnu-objcopy -I binary -O ihex > --change-addresses 0xffe00000 bl2.bin bl2.hex > > + quartus_cpf --bootloader bl2.hex > > > + > > +- Configure SOF to board > > + > > +.. code:: bash > > + nios2-configure-sof > > + > > + > > diff --git > a/Platform/Intel/Stratix10/Stratix10SoCPkg.dec > b/Platform/Intel/Stratix10/Stratix10SoCPkg.dec > > new file mode 100755 > > index 000000000000..7c44670d591d > > --- /dev/null > > +++ b/Platform/Intel/Stratix10/Stratix10SoCPkg.dec > > @@ -0,0 +1,22 @@ > > +# > > +# Copyright (c) 2013-2018, Intel All rights > reserved. > > +# > > +# SPDX-License-Identifier: BSD-2-Clause-Patent > > +# > > + > > +[Defines] > > + DEC_SPECIFICATION =3D 0x0001001B > > + PACKAGE_NAME =3D Stratix10SocPkg > > + PACKAGE_GUID =3D 45533DD0-C41F- > 4ab6-A5DF-65B52684AC60 > > + PACKAGE_VERSION =3D 0.1 > > + > > +[Includes.common] > > + > > +[Guids.common] > > + gStratix10SocFpgaTokenSpaceGuid =3D { 0x0fe272eb, > 0xb2cf, 0x4390, { 0xa5, 0xc4, 0x60, 0x13, 0x2c, 0x6b, > 0xd0, 0x34 } } > > + > > +[PcdsFeatureFlag.common] > > + > > +[PcdsFixedAtBuild.common] > > + > > + > > diff --git > a/Platform/Intel/Stratix10/Stratix10SoCPkg.dsc > b/Platform/Intel/Stratix10/Stratix10SoCPkg.dsc > > new file mode 100755 > > index 000000000000..17d0c5baadc6 > > --- /dev/null > > +++ b/Platform/Intel/Stratix10/Stratix10SoCPkg.dsc > > @@ -0,0 +1,500 @@ > > +# > > +# Copyright (c) 2013-2018, Intel All rights > reserved. > > +# > > +# SPDX-License-Identifier: BSD-2-Clause-Patent > > +# > > + > > > +###################################################### > ########################## > > +# > > +# Defines Section - statements that will be > processed to create a Makefile. > > +# > > > +###################################################### > ########################## > > +[Defines] > > + PLATFORM_NAME =3D Intel Stratix 10 > SoC Development Board > > + PLATFORM_GUID =3D A2D10D02-7C36- > 4de8-831B-EFBFC2092D1B > > + PLATFORM_VERSION =3D 0.1 > > + FIRMWARE_VERSION =3D 1.0 > > + DSC_SPECIFICATION =3D 0x0001001C > > + SUPPORTED_ARCHITECTURES =3D AARCH64 > > + BUILD_TARGETS =3D > DEBUG|RELEASE|NOOPT > > + SKUID_IDENTIFIER =3D DEFAULT > > + FLASH_DEFINITION =3D > Platform/Intel/Stratix10/Stratix10SoCPkg.fdf > > + OUTPUT_DIRECTORY =3D > Build/Stratix10SoCPkg > > + SECURE_BOOT_ENABLE =3D FALSE > > + > > > +###################################################### > ########################## > > +# > > +# Pcd Section - list of all EDK II PCD Entries > defined by this Platform > > +# > > > +###################################################### > ########################## > > + > > +[PcdsFixedAtBuild.common] > > + > gEfiMdeModulePkgTokenSpaceGuid.PcdEmuVariableNvModeEnab > le|TRUE > > + gArmPlatformTokenSpaceGuid.PcdCoreCount|1 > > + > > + # Stacks for MPCores in PEI Phase > > + > gArmPlatformTokenSpaceGuid.PcdCPUCoresStackBase|0x6d000 > > + > gArmPlatformTokenSpaceGuid.PcdCPUCorePrimaryStackSize|0 > x30000 > > + > > + # ARM L2x0 PCDs > > + > gArmTokenSpaceGuid.PcdL2x0ControllerBase|0xFFFFF000 > > + > > + # ARM GIC > > + > gArmTokenSpaceGuid.PcdGicDistributorBase|0xFFFC1000 > > + > gArmTokenSpaceGuid.PcdGicInterruptInterfaceBase|0xFFFC2 > 000 > > + > > + # ARM Floating Point architecture (VFP) > > + gArmTokenSpaceGuid.PcdVFPEnabled|1 > > + > > + # System Memory (1GB, minus reserved memory for > Linux PSCI calls) > > + gArmTokenSpaceGuid.PcdSystemMemoryBase|0x01000000 > > + gArmTokenSpaceGuid.PcdSystemMemorySize|0x3f000000 > > + > > + # Arm Architectural Timer > > + > gArmTokenSpaceGuid.PcdArmArchTimerFreqInHz|400000000 > > + > > + # Trustzone Enable > > + gArmTokenSpaceGuid.PcdTrustzoneSupport|TRUE > > + > > + #------------------------------- > > + # gEfiMdeModulePkgTokenSpaceGuid > > + #------------------------------- > > + > gEfiMdeModulePkgTokenSpaceGuid.PcdFirmwareVersionString > |L"$(FIRMWARE_VERSION)" > > + > > + #------------------------------- > > + # gEfiMdePkgTokenSpaceGuid > > + #------------------------------- > > + > gEfiMdePkgTokenSpaceGuid.PcdMaximumUnicodeStringLength| > 1000000 > > + > gEfiMdePkgTokenSpaceGuid.PcdMaximumAsciiStringLength|10 > 00000 > > + > gEfiMdePkgTokenSpaceGuid.PcdMaximumLinkedListLength|100 > 0000 > > + > gEfiMdePkgTokenSpaceGuid.PcdSpinLockTimeout|10000000 > > + > gEfiMdePkgTokenSpaceGuid.PcdDebugClearMemoryValue|0xAF > > + > gEfiMdePkgTokenSpaceGuid.PcdPerformanceLibraryPropertyM > ask|0 > > + gEfiMdePkgTokenSpaceGuid.PcdPostCodePropertyMask|0 > > + > gEfiMdePkgTokenSpaceGuid.PcdUefiLibMaxPrintBufferSize|3 > 20 > > + > > + # DEBUG_ASSERT_ENABLED 0x01 > > + # DEBUG_PRINT_ENABLED 0x02 > > + # DEBUG_CODE_ENABLED 0x04 > > + # CLEAR_MEMORY_ENABLED 0x08 > > + # ASSERT_BREAKPOINT_ENABLED 0x10 > > + # ASSERT_DEADLOOP_ENABLED 0x20 > > +!if $(TARGET) =3D=3D RELEASE > > + gEfiMdePkgTokenSpaceGuid.PcdDebugPropertyMask|0x2f > > +!else > > + gEfiMdePkgTokenSpaceGuid.PcdDebugPropertyMask|0x2f > > +!endif > > + > > + # DEBUG_INIT 0x00000001 // Initialization > > + # DEBUG_WARN 0x00000002 // Warnings > > + # DEBUG_LOAD 0x00000004 // Load events > > + # DEBUG_FS 0x00000008 // EFI File system > > + # DEBUG_POOL 0x00000010 // Alloc & Free's > > + # DEBUG_PAGE 0x00000020 // Alloc & Free's > > + # DEBUG_INFO 0x00000040 // Verbose > > + # DEBUG_DISPATCH 0x00000080 // PEI/DXE > Dispatchers > > + # DEBUG_VARIABLE 0x00000100 // Variable > > + # DEBUG_BM 0x00000400 // Boot Manager > > + # DEBUG_BLKIO 0x00001000 // BlkIo Driver > > + # DEBUG_NET 0x00004000 // SNI Driver > > + # DEBUG_UNDI 0x00010000 // UNDI Driver > > + # DEBUG_LOADFILE 0x00020000 // UNDI Driver > > + # DEBUG_EVENT 0x00080000 // Event messages > > + # DEBUG_GCD 0x00100000 // Global Coherency > Database changes > > + # DEBUG_CACHE 0x00200000 // Memory range > cachability changes > > + # DEBUG_ERROR 0x80000000 // Error > > +# > gEfiMdePkgTokenSpaceGuid.PcdDebugPrintErrorLevel|0x8030 > 10CF > > + > gEfiMdePkgTokenSpaceGuid.PcdDebugPrintErrorLevel|0x8000 > 000F > > + > > + > gEfiMdePkgTokenSpaceGuid.PcdReportStatusCodePropertyMas > k|0x00 > > + > > + #------------------------------- > > + # gEmbeddedTokenSpaceGuid > > + #------------------------------- > > + > > + # MMC > > + > gEmbeddedTokenSpaceGuid.PcdDwEmmcDxeBaseAddress|0xff808 > 000 > > + > gEmbeddedTokenSpaceGuid.PcdDwEmmcDxeClockFrequencyInHz| > 50000000 > > + > gEmbeddedTokenSpaceGuid.PcdDwEmmcDxeMaxClockFreqInHz|25 > 000000 > > + > > + # > > + # Optional feature to help prevent EFI memory map > fragments > > + # Turned on and off via: > PcdPrePiProduceMemoryTypeInformationHob > > + # Values are in EFI Pages (4K). DXE Core will make > sure that > > + # at least this much of each type of memory can be > allocated > > + # from a single memory range. This way you only > end up with > > + # maximum of two fragements for each type in the > memory map > > + # (the memory used, and the free memory that was > prereserved > > + # but not used). > > + # > > + > gEmbeddedTokenSpaceGuid.PcdMemoryTypeEfiACPIReclaimMemo > ry|0 > > + > gEmbeddedTokenSpaceGuid.PcdMemoryTypeEfiACPIMemoryNVS|0 > > + > gEmbeddedTokenSpaceGuid.PcdMemoryTypeEfiReservedMemoryT > ype|8192 > > + > gEmbeddedTokenSpaceGuid.PcdMemoryTypeEfiRuntimeServices > Data|80 > > + > gEmbeddedTokenSpaceGuid.PcdMemoryTypeEfiRuntimeServices > Code|65 > > + > gEmbeddedTokenSpaceGuid.PcdMemoryTypeEfiBootServicesCod > e|400 > > + > gEmbeddedTokenSpaceGuid.PcdMemoryTypeEfiBootServicesDat > a|20000 > > + > gEmbeddedTokenSpaceGuid.PcdMemoryTypeEfiLoaderCode|20 > > + > gEmbeddedTokenSpaceGuid.PcdMemoryTypeEfiLoaderData|0 > > + > > + # We want to use the Shell Libraries but don't > want it to initialise > > + # automatically. We initialise the libraries when > the command is called by the > > + # Shell. > > + > gEfiShellPkgTokenSpaceGuid.PcdShellLibAutoInitialize|FA > LSE > > + > > + # Pcd Settings - UART Serial Terminal > > + # Intel Stratix10 SoCFPGA HPS UART0 is 0xFFC02000. > > + # Intel Stratix10 SoCFPGA HPS UART1 is 0xFFC02100. > > + > gEfiMdeModulePkgTokenSpaceGuid.PcdSerialUseMmio|TRUE > > + > gEfiMdeModulePkgTokenSpaceGuid.PcdSerialRegisterAccessW > idth|32 > > + > gEfiMdeModulePkgTokenSpaceGuid.PcdSerialRegisterBase|0x > FFC02000 > > + > gEfiMdeModulePkgTokenSpaceGuid.PcdSerialClockRate|10000 > 0000 > > + > gEfiMdeModulePkgTokenSpaceGuid.PcdSerialPciDeviceInfo|{ > 0xFF, 0xFF, 0xFF, 0xFF, 0xFF} > > + > gEfiMdeModulePkgTokenSpaceGuid.PcdSerialBaudRate|115200 > > + > gEfiMdeModulePkgTokenSpaceGuid.PcdSerialLineControl|0x0 > 3 > > + > gEfiMdeModulePkgTokenSpaceGuid.PcdSerialRegisterStride| > 4 > > + > > + gEfiMdePkgTokenSpaceGuid.PcdDefaultTerminalType|4 > > + > > + gEfiMdePkgTokenSpaceGuid.PcdPlatformBootTimeOut|5 > > + > > + # RunAxf support via Dynamic Shell Command > protocol > > + # We want to use the Shell Libraries but don't > want it to initialise > > + # automatically. We initialise the libraries when > the command is called by the > > + # Shell. > > + > gEfiShellPkgTokenSpaceGuid.PcdShellLibAutoInitialize|FA > LSE > > + > > + > gEfiMdeModulePkgTokenSpaceGuid.PcdBootManagerMenuFile|{ > 0x21, 0xaa, 0x2c, 0x46, 0x14, 0x76, 0x03, 0x45, 0x83, > 0x6e, 0x8a, 0xb6, 0xf4, 0x66, 0x23, 0x31 } > > + > > +!if $(USE_ARM_BDS) =3D=3D FALSE > > + > gEfiMdeModulePkgTokenSpaceGuid.PcdResetOnMemoryTypeInfo > rmationChange|FALSE > > +!endif > > + > > +[PcdsFeatureFlag.common] > > + > gEfiMdeModulePkgTokenSpaceGuid.PcdHiiOsRuntimeSupport|F > ALSE > > + > > + # Use the Vector Table location in CpuDxe. We will > not copy the Vector Table at PcdCpuVectorBaseAddress > > + gArmTokenSpaceGuid.PcdRelocateVectorTable|FALSE > > + > > + > gEfiMdeModulePkgTokenSpaceGuid.PcdTurnOffUsbLegacySuppo > rt|TRUE > > + # If TRUE, Graphics Output Protocol will be > installed on virtual handle created by ConsplitterDxe. > > + # Set FALSE to save size. > > + > gEfiMdeModulePkgTokenSpaceGuid.PcdConOutGopSupport|FALS > E > > + > > + #------------------------------- > > + # gEfiMdePkgTokenSpaceGuid > > + #------------------------------- > > + > gEfiMdePkgTokenSpaceGuid.PcdComponentNameDisable|TRUE > > + > gEfiMdePkgTokenSpaceGuid.PcdDriverDiagnosticsDisable|TR > UE > > + > gEfiMdePkgTokenSpaceGuid.PcdComponentName2Disable|TRUE > > + > gEfiMdePkgTokenSpaceGuid.PcdDriverDiagnostics2Disable|T > RUE > > + > > +[LibraryClasses.common] > > + ArmLib|ArmPkg/Library/ArmLib/ArmBaseLib.inf > > + > ArmGenericTimerCounterLib|ArmPkg/Library/ArmGenericTime > rPhyCounterLib/ArmGenericTimerPhyCounterLib.inf > > + AcpiLib|EmbeddedPkg/Library/AcpiLib/AcpiLib.inf > > + > ArmDisassemblerLib|ArmPkg/Library/ArmDisassemblerLib/Ar > mDisassemblerLib.inf > > + ArmGicLib|ArmPkg/Drivers/ArmGic/ArmGicLib.inf > > + > ArmPlatformLib|Platform/Intel/Stratix10/Library/IntelPl > atformLib/IntelPlatformLib.inf > > + > > + > ReportStatusCodeLib|MdeModulePkg/Library/DxeReportStatu > sCodeLib/DxeReportStatusCodeLib.inf > > + > FileExplorerLib|MdeModulePkg/Library/FileExplorerLib/Fi > leExplorerLib.inf > > + > DxeServicesLib|MdePkg/Library/DxeServicesLib/DxeService > sLib.inf > > + > > + > ArmMmuLib|ArmPkg/Library/ArmMmuLib/ArmMmuBaseLib.inf > > + > ArmPlatformStackLib|ArmPlatformPkg/Library/ArmPlatformS > tackLib/ArmPlatformStackLib.inf > > + ArmSmcLib|ArmPkg/Library/ArmSmcLib/ArmSmcLib.inf > > + BaseLib|MdePkg/Library/BaseLib/BaseLib.inf > > + > BaseMemoryLib|MdePkg/Library/BaseMemoryLib/BaseMemoryLi > b.inf > > + > CacheMaintenanceLib|ArmPkg/Library/ArmCacheMaintenanceL > ib/ArmCacheMaintenanceLib.inf > > + > CpuExceptionHandlerLib|ArmPkg/Library/ArmExceptionLib/A > rmExceptionLib.inf > > + PrePiLib|EmbeddedPkg/Library/PrePiLib/PrePiLib.inf > > + CpuLib|MdePkg/Library/BaseCpuLib/BaseCpuLib.inf > > + > DefaultExceptionHandlerLib|ArmPkg/Library/DefaultExcept > ionHandlerLib/DefaultExceptionHandlerLib.inf > > + > DevicePathLib|MdePkg/Library/UefiDevicePathLib/UefiDevi > cePathLib.inf > > + > DxeServicesTableLib|MdePkg/Library/DxeServicesTableLib/ > DxeServicesTableLib.inf > > + FdtLib|EmbeddedPkg/Library/FdtLib/FdtLib.inf > > + > HiiLib|MdeModulePkg/Library/UefiHiiLib/UefiHiiLib.inf > > + HobLib|MdePkg/Library/DxeHobLib/DxeHobLib.inf > > + > IoLib|MdePkg/Library/BaseIoLibIntrinsic/BaseIoLibIntrin > sic.inf > > + PcdLib|MdePkg/Library/DxePcdLib/DxePcdLib.inf > > + > PeCoffGetEntryPointLib|MdePkg/Library/BasePeCoffGetEntr > yPointLib/BasePeCoffGetEntryPointLib.inf > > + > PeCoffLib|MdePkg/Library/BasePeCoffLib/BasePeCoffLib.in > f > > + > PerformanceLib|MdePkg/Library/BasePerformanceLibNull/Ba > sePerformanceLibNull.inf > > + > PrintLib|MdePkg/Library/BasePrintLib/BasePrintLib.inf > > + > RealTimeClockLib|EmbeddedPkg/Library/VirtualRealTimeClo > ckLib/VirtualRealTimeClockLib.inf > > + > TimeBaseLib|EmbeddedPkg/Library/TimeBaseLib/TimeBaseLib > .inf > > + > SemihostLib|ArmPkg/Library/SemihostLib/SemihostLib.inf > > + > > + > SerialPortLib|MdeModulePkg/Library/BaseSerialPortLib165 > 50/BaseSerialPortLib16550.inf > > + > PlatformHookLib|MdeModulePkg/Library/BasePlatformHookLi > bNull/BasePlatformHookLibNull.inf > > + > > + > SynchronizationLib|MdePkg/Library/BaseSynchronizationLi > b/BaseSynchronizationLib.inf > > + > UefiBootManagerLib|MdeModulePkg/Library/UefiBootManager > Lib/UefiBootManagerLib.inf > > + > PlatformBootManagerLib|ArmPkg/Library/PlatformBootManag > erLib/PlatformBootManagerLib.inf > > + > BootLogoLib|MdeModulePkg/Library/BootLogoLib/BootLogoLi > b.inf > > + > > + > TimerLib|ArmPkg/Library/ArmArchTimerLib/ArmArchTimerLib > .inf > > + > > + > UefiApplicationEntryPoint|MdePkg/Library/UefiApplicatio > nEntryPoint/UefiApplicationEntryPoint.inf > > + > UefiBootServicesTableLib|MdePkg/Library/UefiBootService > sTableLib/UefiBootServicesTableLib.inf > > + > UefiDecompressLib|MdePkg/Library/BaseUefiDecompressLib/ > BaseUefiDecompressLib.inf > > + > UefiDriverEntryPoint|MdePkg/Library/UefiDriverEntryPoin > t/UefiDriverEntryPoint.inf > > + > UefiHiiServicesLib|MdeModulePkg/Library/UefiHiiServices > Lib/UefiHiiServicesLib.inf > > + UefiLib|MdePkg/Library/UefiLib/UefiLib.inf > > + > UefiRuntimeLib|MdePkg/Library/UefiRuntimeLib/UefiRuntim > eLib.inf > > + > UefiRuntimeServicesTableLib|MdePkg/Library/UefiRuntimeS > ervicesTableLib/UefiRuntimeServicesTableLib.inf > > + > > + > DxeServicesLib|MdePkg/Library/DxeServicesLib/DxeService > sLib.inf > > + > ReportStatusCodeLib|MdeModulePkg/Library/DxeReportStatu > sCodeLib/DxeReportStatusCodeLib.inf > > + > PciLib|MdePkg/Library/BasePciLibPciExpress/BasePciLibPc > iExpress.inf > > + > PciExpressLib|MdePkg/Library/BasePciExpressLib/BasePciE > xpressLib.inf > > + > > + > CapsuleLib|MdeModulePkg/Library/DxeCapsuleLibNull/DxeCa > psuleLibNull.inf > > +# > GenericBdsLib|IntelFrameworkModulePkg/Library/GenericBd > sLib/GenericBdsLib.inf > > + > CustomizedDisplayLib|MdeModulePkg/Library/CustomizedDis > playLib/CustomizedDisplayLib.inf > > + > > + # > > + # Secure Boot dependencies > > + # > > +!if $(SECURE_BOOT_ENABLE) =3D=3D TRUE > > + > IntrinsicLib|CryptoPkg/Library/IntrinsicLib/IntrinsicLi > b.inf > > + > OpensslLib|CryptoPkg/Library/OpensslLib/OpensslLib.inf > > + > TpmMeasurementLib|SecurityPkg/Library/DxeTpmMeasurement > Lib/DxeTpmMeasurementLib.inf > > + > AuthVariableLib|SecurityPkg/Library/AuthVariableLib/Aut > hVariableLib.inf > > + > BaseCryptLib|CryptoPkg/Library/BaseCryptLib/BaseCryptLi > b.inf > > + > > + # re-use the UserPhysicalPresent() dummy > implementation from the ovmf tree > > + > PlatformSecureLib|OvmfPkg/Library/PlatformSecureLib/Pla > tformSecureLib.inf > > +!else > > + > TpmMeasurementLib|MdeModulePkg/Library/TpmMeasurementLi > bNull/TpmMeasurementLibNull.inf > > + > AuthVariableLib|MdeModulePkg/Library/AuthVariableLibNul > l/AuthVariableLibNull.inf > > +!endif > > + > VarCheckLib|MdeModulePkg/Library/VarCheckLib/VarCheckLi > b.inf > > + > > + #------------------------------- > > + # These libraries are used by the dynamic EFI > Shell commands > > + #------------------------------- > > + > ShellLib|ShellPkg/Library/UefiShellLib/UefiShellLib.inf > > + > FileHandleLib|MdePkg/Library/UefiFileHandleLib/UefiFile > HandleLib.inf > > + > SortLib|MdeModulePkg/Library/UefiSortLib/UefiSortLib.in > f > > + > > + #------------------------------- > > + # Build Debug / Release > > + #------------------------------- > > +!if $(TARGET) =3D=3D RELEASE > > + > DebugLib|MdePkg/Library/BaseDebugLibNull/BaseDebugLibNu > ll.inf > > +!else > > + > DebugLib|MdePkg/Library/BaseDebugLibSerialPort/BaseDebu > gLibSerialPort.inf > > +!endif > > + > > + > DebugAgentLib|MdeModulePkg/Library/DebugAgentLibNull/De > bugAgentLibNull.inf > > + > DebugAgentTimerLib|EmbeddedPkg/Library/DebugAgentTimerL > ibNull/DebugAgentTimerLibNull.inf > > + > DebugPrintErrorLevelLib|MdePkg/Library/BaseDebugPrintEr > rorLevelLib/BaseDebugPrintErrorLevelLib.inf > > + > PeCoffExtraActionLib|ArmPkg/Library/DebugPeCoffExtraAct > ionLib/DebugPeCoffExtraActionLib.inf > > + > > +[LibraryClasses.common.SEC, > LibraryClasses.common.PEI_CORE] > > + ArmLib|ArmPkg/Library/ArmLib/ArmBaseLib.inf > > + > ArmMmuLib|ArmPkg/Library/ArmMmuLib/ArmMmuBaseLib.inf > > + > ReportStatusCodeLib|MdeModulePkg/Library/DxeReportStatu > sCodeLib/DxeReportStatusCodeLib.inf > > + > UefiDecompressLib|MdePkg/Library/BaseUefiDecompressLib/ > BaseUefiDecompressLib.inf > > + > ExtractGuidedSectionLib|EmbeddedPkg/Library/PrePiExtrac > tGuidedSectionLib/PrePiExtractGuidedSectionLib.inf > > + > LzmaDecompressLib|MdeModulePkg/Library/LzmaCustomDecomp > ressLib/LzmaCustomDecompressLib.inf > > + > > + > PeCoffLib|MdePkg/Library/BasePeCoffLib/BasePeCoffLib.in > f > > + > > + > HobLib|EmbeddedPkg/Library/PrePiHobLib/PrePiHobLib.inf > > + > PrePiHobListPointerLib|ArmPlatformPkg/Library/PrePiHobL > istPointerLib/PrePiHobListPointerLib.inf > > + > MemoryAllocationLib|EmbeddedPkg/Library/PrePiMemoryAllo > cationLib/PrePiMemoryAllocationLib.inf > > + > PerformanceLib|MdeModulePkg/Library/PeiPerformanceLib/P > eiPerformanceLib.inf > > + > PlatformPeiLib|ArmPlatformPkg/PlatformPei/PlatformPeiLi > b.inf > > + > MemoryInitPeiLib|ArmPlatformPkg/MemoryInitPei/MemoryIni > tPeiLib.inf > > + > > +[LibraryClasses.common.DXE_DRIVER, > LibraryClasses.common.UEFI_APPLICATION, > LibraryClasses.common.UEFI_DRIVER] > > + > ReportStatusCodeLib|MdeModulePkg/Library/DxeReportStatu > sCodeLib/DxeReportStatusCodeLib.inf > > + > ArmGicArchLib|ArmPkg/Library/ArmGicArchLib/ArmGicArchLi > b.inf > > + > > +[LibraryClasses.common.PEI_CORE] > > + > ExtractGuidedSectionLib|EmbeddedPkg/Library/PrePiExtrac > tGuidedSectionLib/PrePiExtractGuidedSectionLib.inf > > + > HobLib|EmbeddedPkg/Library/PrePiHobLib/PrePiHobLib.inf > > + > LzmaDecompressLib|MdeModulePkg/Library/LzmaCustomDecomp > ressLib/LzmaCustomDecompressLib.inf > > + > MemoryAllocationLib|MdePkg/Library/PeiMemoryAllocationL > ib/PeiMemoryAllocationLib.inf > > + > OemHookStatusCodeLib|MdeModulePkg/Library/OemHookStatus > CodeLibNull/OemHookStatusCodeLibNull.inf > > + > PeCoffGetEntryPointLib|MdePkg/Library/BasePeCoffGetEntr > yPointLib/BasePeCoffGetEntryPointLib.inf > > + > PeiCoreEntryPoint|MdePkg/Library/PeiCoreEntryPoint/PeiC > oreEntryPoint.inf > > + > PeiServicesLib|MdePkg/Library/PeiServicesLib/PeiService > sLib.inf > > + > PerformanceLib|MdeModulePkg/Library/PeiPerformanceLib/P > eiPerformanceLib.inf > > + > PrePiHobListPointerLib|ArmPlatformPkg/Library/PrePiHobL > istPointerLib/PrePiHobListPointerLib.inf > > + PrePiLib|EmbeddedPkg/Library/PrePiLib/PrePiLib.inf > > + > ReportStatusCodeLib|MdeModulePkg/Library/DxeReportStatu > sCodeLib/DxeReportStatusCodeLib.inf > > + > UefiDecompressLib|MdePkg/Library/BaseUefiDecompressLib/ > BaseUefiDecompressLib.inf > > + > PeiCrc32GuidedSectionExtractLib|MdeModulePkg/Library/Pe > iCrc32GuidedSectionExtractLib/PeiCrc32GuidedSectionExtr > actLib.inf > > + > > +[LibraryClasses.common.DXE_CORE] > > + > PcdLib|MdePkg/Library/BasePcdLibNull/BasePcdLibNull.inf > > + > DxeCoreEntryPoint|MdePkg/Library/DxeCoreEntryPoint/DxeC > oreEntryPoint.inf > > + > DxeServicesLib|MdePkg/Library/DxeServicesLib/DxeService > sLib.inf > > + > ExtractGuidedSectionLib|MdePkg/Library/DxeExtractGuided > SectionLib/DxeExtractGuidedSectionLib.inf > > + > HobLib|MdePkg/Library/DxeCoreHobLib/DxeCoreHobLib.inf > > + > MemoryAllocationLib|MdeModulePkg/Library/DxeCoreMemoryA > llocationLib/DxeCoreMemoryAllocationLib.inf > > + > PerformanceLib|MdeModulePkg/Library/DxeCorePerformanceL > ib/DxeCorePerformanceLib.inf > > + > ReportStatusCodeLib|MdeModulePkg/Library/DxeReportStatu > sCodeLib/DxeReportStatusCodeLib.inf > > + > UefiDecompressLib|MdePkg/Library/BaseUefiDecompressLib/ > BaseUefiDecompressLib.inf > > + > > +[LibraryClasses.common.DXE_DRIVER] > > + > DxeServicesLib|MdePkg/Library/DxeServicesLib/DxeService > sLib.inf > > + > MemoryAllocationLib|MdePkg/Library/UefiMemoryAllocation > Lib/UefiMemoryAllocationLib.inf > > + > SecurityManagementLib|MdeModulePkg/Library/DxeSecurityM > anagementLib/DxeSecurityManagementLib.inf > > + > PerformanceLib|MdeModulePkg/Library/DxePerformanceLib/D > xePerformanceLib.inf > > + > ReportStatusCodeLib|MdeModulePkg/Library/DxeReportStatu > sCodeLib/DxeReportStatusCodeLib.inf > > + > > +[LibraryClasses.common.UEFI_APPLICATION] > > + > HiiLib|MdeModulePkg/Library/UefiHiiLib/UefiHiiLib.inf > > + > MemoryAllocationLib|MdePkg/Library/UefiMemoryAllocation > Lib/UefiMemoryAllocationLib.inf > > + > PerformanceLib|MdeModulePkg/Library/DxePerformanceLib/D > xePerformanceLib.inf > > + > UefiDecompressLib|MdePkg/Library/BaseUefiDecompressLib/ > BaseUefiDecompressLib.inf > > + > > +[LibraryClasses.common.UEFI_DRIVER] > > + > DxeServicesLib|MdePkg/Library/DxeServicesLib/DxeService > sLib.inf > > + > ExtractGuidedSectionLib|MdePkg/Library/DxeExtractGuided > SectionLib/DxeExtractGuidedSectionLib.inf > > + > MemoryAllocationLib|MdePkg/Library/UefiMemoryAllocation > Lib/UefiMemoryAllocationLib.inf > > + > PerformanceLib|MdeModulePkg/Library/DxePerformanceLib/D > xePerformanceLib.inf > > + > ReportStatusCodeLib|MdeModulePkg/Library/DxeReportStatu > sCodeLib/DxeReportStatusCodeLib.inf > > + > UefiDecompressLib|MdePkg/Library/BaseUefiDecompressLib/ > BaseUefiDecompressLib.inf > > + > > +[LibraryClasses.common.DXE_RUNTIME_DRIVER] > > +!if $(SECURE_BOOT_ENABLE) =3D=3D TRUE > > + > BaseCryptLib|CryptoPkg/Library/BaseCryptLib/RuntimeCryp > tLib.inf > > +!endif > > + > CapsuleLib|MdeModulePkg/Library/DxeCapsuleLibNull/DxeCa > psuleLibNull.inf > > + HobLib|MdePkg/Library/DxeHobLib/DxeHobLib.inf > > + > MemoryAllocationLib|MdePkg/Library/UefiMemoryAllocation > Lib/UefiMemoryAllocationLib.inf > > + > ReportStatusCodeLib|MdeModulePkg/Library/DxeReportStatu > sCodeLib/DxeReportStatusCodeLib.inf > > + > > +[LibraryClasses.AARCH64.DXE_RUNTIME_DRIVER] > > + # > > + # PSCI support in EL3 may not be available if we > are not running under a PSCI > > + # compliant secure firmware, but since the default > VExpress EfiResetSystemLib > > + # cannot be supported at runtime (due to the fact > that the syscfg MMIO registers > > + # cannot be runtime remapped), it is our best bet > to get ResetSystem functionality > > + # on these platforms. > > + # > > + > EfiResetSystemLib|ArmPkg/Library/ArmPsciResetSystemLib/ > ArmPsciResetSystemLib.inf > > + > > +[LibraryClasses.ARM, LibraryClasses.AARCH64] > > + # It is not possible to prevent the ARM compiler > for generic intrinsic functions. > > + # This library provides the instrinsic functions > generate by a given compiler. > > + # [LibraryClasses.ARM] and NULL mean link this > library into all ARM images. > > + # > > + > NULL|ArmPkg/Library/CompilerIntrinsicsLib/CompilerIntri > nsicsLib.inf > > + > > + # Add support for GCC stack protector > > + > NULL|MdePkg/Library/BaseStackCheckLib/BaseStackCheckLib > .inf > > + > > > +###################################################### > ########################## > > +# > > +# Components Section - list of all EDK II Modules > needed by this Platform > > +# > > > +###################################################### > ########################## > > +[Components.common] > > + MdeModulePkg/Universal/PCD/Dxe/Pcd.inf { > > + > > + > PcdLib|MdePkg/Library/BasePcdLibNull/BasePcdLibNull.inf > > + } > > + > > + > EmbeddedPkg/SimpleTextInOutSerial/SimpleTextInOutSerial > .inf > > + > > + ArmPlatformPkg/PrePi/PeiUniCore.inf { > > + > > + > PcdLib|MdePkg/Library/BasePcdLibNull/BasePcdLibNull.inf > > + } > > + > > + # > > + # DXE > > + # > > + MdeModulePkg/Core/Dxe/DxeMain.inf { > > + > > + > #PcdLib|MdePkg/Library/BasePcdLibNull/BasePcdLibNull.in > f > > + > NULL|MdeModulePkg/Library/DxeCrc32GuidedSectionExtractL > ib/DxeCrc32GuidedSectionExtractLib.inf > > + } > > + > > + > MdeModulePkg/Universal/DevicePathDxe/DevicePathDxe.inf > > + > MdeModulePkg/Universal/HiiDatabaseDxe/HiiDatabaseDxe.in > f > > + > MdeModulePkg/Universal/SetupBrowserDxe/SetupBrowserDxe. > inf > > + > MdeModulePkg/Universal/DisplayEngineDxe/DisplayEngineDx > e.inf > > + MdeModulePkg/Universal/BdsDxe/BdsDxe.inf > > + MdeModulePkg/Application/UiApp/UiApp.inf { > > + > > + > NULL|MdeModulePkg/Library/DeviceManagerUiLib/DeviceMana > gerUiLib.inf > > + > NULL|MdeModulePkg/Library/BootManagerUiLib/BootManagerU > iLib.inf > > + > NULL|MdeModulePkg/Library/BootMaintenanceManagerUiLib/B > ootMaintenanceManagerUiLib.inf > > + } > > + > > + ArmPkg/Drivers/TimerDxe/TimerDxe.inf > > + ArmPkg/Drivers/ArmGic/ArmGicDxe.inf > > + ArmPkg/Drivers/CpuDxe/CpuDxe.inf > > + ArmPkg/Filesystem/SemihostFs/SemihostFs.inf > > + > > + FatPkg/EnhancedFatDxe/Fat.inf > > + > > + EmbeddedPkg/MetronomeDxe/MetronomeDxe.inf > > + > EmbeddedPkg/RealTimeClockRuntimeDxe/RealTimeClockRuntim > eDxe.inf > > + EmbeddedPkg/ResetRuntimeDxe/ResetRuntimeDxe.inf > > + MdeModulePkg/Universal/SerialDxe/SerialDxe.inf > > + > > + MdeModulePkg/Core/RuntimeDxe/RuntimeDxe.inf > > + > MdeModulePkg/Universal/CapsuleRuntimeDxe/CapsuleRuntime > Dxe.inf > > + > MdeModulePkg/Universal/Console/ConPlatformDxe/ConPlatfo > rmDxe.inf > > + > MdeModulePkg/Universal/Console/ConSplitterDxe/ConSplitt > erDxe.inf > > + > MdeModulePkg/Universal/Console/GraphicsConsoleDxe/Graph > icsConsoleDxe.inf > > + > MdeModulePkg/Universal/Console/TerminalDxe/TerminalDxe. > inf > > + > MdeModulePkg/Universal/Disk/DiskIoDxe/DiskIoDxe.inf > > + > MdeModulePkg/Universal/Disk/PartitionDxe/PartitionDxe.i > nf > > + > MdeModulePkg/Universal/Disk/UnicodeCollation/EnglishDxe > /EnglishDxe.inf > > + > MdeModulePkg/Universal/FaultTolerantWriteDxe/FaultToler > antWriteDxe.inf > > + > MdeModulePkg/Universal/FvSimpleFileSystemDxe/FvSimpleFi > leSystemDxe.inf > > + > MdeModulePkg/Universal/MonotonicCounterRuntimeDxe/Monot > onicCounterRuntimeDxe.inf > > + > MdeModulePkg/Universal/SecurityStubDxe/SecurityStubDxe. > inf > > + > MdeModulePkg/Universal/Variable/RuntimeDxe/VariableRunt > imeDxe.inf { > > + > > + > NULL|MdeModulePkg/Library/VarCheckUefiLib/VarCheckUefiL > ib.inf > > + } > > + > MdeModulePkg/Universal/WatchdogTimerDxe/WatchdogTimer.i > nf > > + > > + # Multimedia Card Interface > > + EmbeddedPkg/Universal/MmcDxe/MmcDxe.inf > > + EmbeddedPkg/Drivers/DwEmmcDxe/DwEmmcDxe.inf > > + > > + # Shell > > + ShellPkg/Application/Shell/Shell.inf { > > + > > + > ShellCommandLib|ShellPkg/Library/UefiShellCommandLib/Ue > fiShellCommandLib.inf > > + > NULL|ShellPkg/Library/UefiShellLevel2CommandsLib/UefiSh > ellLevel2CommandsLib.inf > > + > NULL|ShellPkg/Library/UefiShellLevel1CommandsLib/UefiSh > ellLevel1CommandsLib.inf > > + > NULL|ShellPkg/Library/UefiShellLevel3CommandsLib/UefiSh > ellLevel3CommandsLib.inf > > + > NULL|ShellPkg/Library/UefiShellDriver1CommandsLib/UefiS > hellDriver1CommandsLib.inf > > + > NULL|ShellPkg/Library/UefiShellDebug1CommandsLib/UefiSh > ellDebug1CommandsLib.inf > > + > NULL|ShellPkg/Library/UefiShellInstall1CommandsLib/Uefi > ShellInstall1CommandsLib.inf > > +# > NULL|ShellPkg/Library/UefiShellNetwork1CommandsLib/Uefi > ShellNetwork1CommandsLib.inf > > + > HandleParsingLib|ShellPkg/Library/UefiHandleParsingLib/ > UefiHandleParsingLib.inf > > + > PrintLib|MdePkg/Library/BasePrintLib/BasePrintLib.inf > > + > BcfgCommandLib|ShellPkg/Library/UefiShellBcfgCommandLib > /UefiShellBcfgCommandLib.inf > > + > > + > > + > gEfiMdePkgTokenSpaceGuid.PcdDebugPropertyMask|0xFF > > + > gEfiShellPkgTokenSpaceGuid.PcdShellLibAutoInitialize|FA > LSE > > + > gEfiMdePkgTokenSpaceGuid.PcdUefiLibMaxPrintBufferSize|8 > 000 > > + } > > + > > + # > > + # Platform Specific Init for DXE phase > > + # > > + > Platform/Intel/Stratix10/Drivers/IntelPlatformDxe/Intel > PlatformDxe.inf > > + > > +[BuildOptions] > > + #------------------------------- > > + # Common > > + #------------------------------- > > + GCC:RELEASE_*_*_CC_FLAGS =3D -DMDEPKG_NDEBUG > > + GCC:RELEASE_*_*_DLINK_FLAGS =3D -z noexecstack -z > relro -z now > > + > > diff --git > a/Platform/Intel/Stratix10/Stratix10SoCPkg.fdf > b/Platform/Intel/Stratix10/Stratix10SoCPkg.fdf > > new file mode 100755 > > index 000000000000..2c4e5ee887ca > > --- /dev/null > > +++ b/Platform/Intel/Stratix10/Stratix10SoCPkg.fdf > > @@ -0,0 +1,253 @@ > > +# > > +# Copyright (c) 2019, Intel All rights reserved. > > +# > > +# SPDX-License-Identifier: BSD-2-Clause-Patent > > +# > > + > > > +###################################################### > ########################## > > +# > > +# FD Section > > +# The [FD] Section is made up of the definition > statements and a > > +# description of what goes into the Flash Device > Image. Each FD section > > +# defines one flash "device" image. A flash device > image may be one of > > +# the following: Removable media bootable image > (like a boot floppy > > +# image,) an Option ROM image (that would be > "flashed" into an add-in > > +# card,) a System "Flash" image (that would be > burned into a system's > > +# flash) or an Update ("Capsule") image that will be > used to update and > > +# existing system flash. > > +# > > > +###################################################### > ########################## > > + > > +[FD.IntelStratix10_EFI] > > +BaseAddress =3D > 0x0050000|gArmTokenSpaceGuid.PcdFdBaseAddress # The > base address of the Firmware in remapped DRAM. > > +Size =3D > 0x00100000|gArmTokenSpaceGuid.PcdFdSize # The > size in bytes > > +ErasePolarity =3D 1 > > +BlockSize =3D 0x00000001 > > +NumBlocks =3D 0x00100000 > > + > > > +###################################################### > ########################## > > +# > > +# FD Region layout > > +# > > +# A Layout Region start with a eight digit hex > offset (leading "0x" required) > > +# followed by the pipe "|" character, > > +# followed by the size of the region, also in hex > with the leading "0x" characters. > > +# Must be defined in ascending order and may not > overlap. > > +# Like: > > +# Offset|Size > > +# PcdOffsetCName|PcdSizeCName > > +# RegionType > > +# > > > +###################################################### > ########################## > > +0x00000000|0x00100000 > > > +gArmTokenSpaceGuid.PcdFvBaseAddress|gArmTokenSpaceGuid > .PcdFvSize > > +FV =3D FV_PEIDXE > > + > > +[FV.FV_PEIDXE] > > +FvAlignment =3D 8 > > +ERASE_POLARITY =3D 1 > > +MEMORY_MAPPED =3D TRUE > > +STICKY_WRITE =3D TRUE > > +LOCK_CAP =3D TRUE > > +LOCK_STATUS =3D TRUE > > +WRITE_DISABLED_CAP =3D TRUE > > +WRITE_ENABLED_CAP =3D TRUE > > +WRITE_STATUS =3D TRUE > > +WRITE_LOCK_CAP =3D TRUE > > +WRITE_LOCK_STATUS =3D TRUE > > +READ_DISABLED_CAP =3D TRUE > > +READ_ENABLED_CAP =3D TRUE > > +READ_STATUS =3D TRUE > > +READ_LOCK_CAP =3D TRUE > > +READ_LOCK_STATUS =3D TRUE > > + > > + INF ArmPlatformPkg/PrePi/PeiUniCore.inf > > + > > + FILE FV_IMAGE =3D 9E21FD93-9C72-4c15-8C4B- > E77F1DB2D792 { > > + SECTION GUIDED EE4E5898-3914-4259-9D6E- > DC7BD79403CF PROCESSING_REQUIRED =3D TRUE { > > + SECTION FV_IMAGE =3D FV_DXE > > + } > > + } > > + > > +[FV.FV_DXE] > > +BlockSize =3D 0x00000001 > > +NumBlocks =3D 0 # This FV gets > compressed so make it just big enough > > +FvAlignment =3D 8 # FV alignment and FV > attributes setting. > > +ERASE_POLARITY =3D 1 > > +MEMORY_MAPPED =3D TRUE > > +STICKY_WRITE =3D TRUE > > +LOCK_CAP =3D TRUE > > +LOCK_STATUS =3D TRUE > > +WRITE_DISABLED_CAP =3D TRUE > > +WRITE_ENABLED_CAP =3D TRUE > > +WRITE_STATUS =3D TRUE > > +WRITE_LOCK_CAP =3D TRUE > > +WRITE_LOCK_STATUS =3D TRUE > > +READ_DISABLED_CAP =3D TRUE > > +READ_ENABLED_CAP =3D TRUE > > +READ_STATUS =3D TRUE > > +READ_LOCK_CAP =3D TRUE > > +READ_LOCK_STATUS =3D TRUE > > +FvNameGuid =3D 5eda4200-2c5f-43cb-9da3- > 0baf74b1b30c > > + > > + INF MdeModulePkg/Core/Dxe/DxeMain.inf > > + INF MdeModulePkg/Universal/PCD/Dxe/Pcd.inf > > + INF > EmbeddedPkg/RealTimeClockRuntimeDxe/RealTimeClockRuntim > eDxe.inf > > + > > + # > > + # PI DXE Drivers producing Architectural Protocols > (EFI Services) > > + # > > + INF ArmPkg/Drivers/CpuDxe/CpuDxe.inf > > + INF MdeModulePkg/Core/RuntimeDxe/RuntimeDxe.inf > > + INF > MdeModulePkg/Universal/SecurityStubDxe/SecurityStubDxe. > inf > > + INF > MdeModulePkg/Universal/CapsuleRuntimeDxe/CapsuleRuntime > Dxe.inf > > + INF > MdeModulePkg/Universal/Variable/RuntimeDxe/VariableRunt > imeDxe.inf > > + INF > MdeModulePkg/Universal/FaultTolerantWriteDxe/FaultToler > antWriteDxe.inf > > + INF > MdeModulePkg/Universal/MonotonicCounterRuntimeDxe/Monot > onicCounterRuntimeDxe.inf > > + INF > EmbeddedPkg/ResetRuntimeDxe/ResetRuntimeDxe.inf > > + INF EmbeddedPkg/MetronomeDxe/MetronomeDxe.inf > > + INF > EmbeddedPkg/SimpleTextInOutSerial/SimpleTextInOutSerial > .inf > > + > > + # Multiple Console IO support > > + INF > MdeModulePkg/Universal/Console/ConPlatformDxe/ConPlatfo > rmDxe.inf > > + INF > MdeModulePkg/Universal/Console/ConSplitterDxe/ConSplitt > erDxe.inf > > + INF > MdeModulePkg/Universal/Console/TerminalDxe/TerminalDxe. > inf > > + INF MdeModulePkg/Universal/SerialDxe/SerialDxe.inf > > + INF > MdeModulePkg/Universal/HiiDatabaseDxe/HiiDatabaseDxe.in > f > > + > > + # ARM packages > > + INF ArmPkg/Drivers/ArmGic/ArmGicDxe.inf > > + INF ArmPkg/Drivers/TimerDxe/TimerDxe.inf > > + INF > MdeModulePkg/Universal/WatchdogTimerDxe/WatchdogTimer.i > nf > > + > > + # FAT filesystem + GPT/MBR partitioning > > + INF > MdeModulePkg/Universal/Disk/DiskIoDxe/DiskIoDxe.inf > > + INF > MdeModulePkg/Universal/Disk/PartitionDxe/PartitionDxe.i > nf > > + INF FatPkg/EnhancedFatDxe/Fat.inf > > + INF > MdeModulePkg/Universal/Disk/UnicodeCollation/EnglishDxe > /EnglishDxe.inf > > + > > + # Multimedia Card Interface > > + INF EmbeddedPkg/Universal/MmcDxe/MmcDxe.inf > > + INF EmbeddedPkg/Drivers/DwEmmcDxe/DwEmmcDxe.inf > > + > > + # Platform Specific Init for DXE phase > > + INF > Platform/Intel/Stratix10/Drivers/IntelPlatformDxe/Intel > PlatformDxe.inf > > + > > + # UEFI application (Shell Embedded Boot Loader) > > + INF ShellPkg/Application/Shell/Shell.inf > > + > > + # Bds > > + INF > MdeModulePkg/Universal/DevicePathDxe/DevicePathDxe.inf > > + INF MdeModulePkg/Universal/BdsDxe/BdsDxe.inf > > + INF MdeModulePkg/Application/UiApp/UiApp.inf > > + INF > MdeModulePkg/Universal/DisplayEngineDxe/DisplayEngineDx > e.inf > > + INF > MdeModulePkg/Universal/SetupBrowserDxe/SetupBrowserDxe. > inf > > + > > + # FV Filesystem > > + INF > MdeModulePkg/Universal/FvSimpleFileSystemDxe/FvSimpleFi > leSystemDxe.inf > > + > > > +###################################################### > ########################## > > +# > > +# Rules are use with the [FV] section's module INF > type to define > > +# how an FFS file is created for a given INF file. > The following Rule are the default > > +# rules for the different module type. User can add > the customized rules to define the > > +# content of the FFS file. > > +# > > > +###################################################### > ########################## > > + > > + > > > +###################################################### > ###################### > > +# Example of a DXE_DRIVER FFS file with a Checksum > encapsulation section # > > > +###################################################### > ###################### > > +# > > +#[Rule.Common.DXE_DRIVER] > > +# FILE DRIVER =3D $(NAMED_GUID) { > > +# DXE_DEPEX DXE_DEPEX Optional > $(INF_OUTPUT)/$(MODULE_NAME).depex > > +# COMPRESS PI_STD { > > +# GUIDED { > > +# PE32 PE32 > $(INF_OUTPUT)/$(MODULE_NAME).efi > > +# UI STRING=3D"$(MODULE_NAME)" Optional > > +# VERSION STRING=3D"$(INF_VERSION)" Optional > BUILD_NUM=3D$(BUILD_NUMBER) > > +# } > > +# } > > +# } > > +# > > > +###################################################### > ###################### > > + > > +[Rule.Common.SEC] > > + FILE SEC =3D $(NAMED_GUID) RELOCS_STRIPPED FIXED { > > + TE TE Align =3D Auto > $(INF_OUTPUT)/$(MODULE_NAME).efi > > + } > > + > > +[Rule.Common.PEI_CORE] > > + FILE PEI_CORE =3D $(NAMED_GUID) FIXED { > > + TE TE Align =3D Auto > $(INF_OUTPUT)/$(MODULE_NAME).efi > > + UI STRING =3D"$(MODULE_NAME)" Optional > > + } > > + > > +[Rule.Common.PEIM] > > + FILE PEIM =3D $(NAMED_GUID) FIXED { > > + PEI_DEPEX PEI_DEPEX Optional > $(INF_OUTPUT)/$(MODULE_NAME).depex > > + TE TE Align =3D Auto > $(INF_OUTPUT)/$(MODULE_NAME).efi > > + UI STRING=3D"$(MODULE_NAME)" Optional > > + } > > + > > +[Rule.Common.PEIM.TIANOCOMPRESSED] > > + FILE PEIM =3D $(NAMED_GUID) DEBUG_MYTOOLS_IA32 { > > + PEI_DEPEX PEI_DEPEX Optional > $(INF_OUTPUT)/$(MODULE_NAME).depex > > + GUIDED A31280AD-481E-41B6-95E8-127F4C984779 > PROCESSING_REQUIRED =3D TRUE { > > + PE32 PE32 > $(INF_OUTPUT)/$(MODULE_NAME).efi > > + UI STRING=3D"$(MODULE_NAME)" Optional > > + } > > + } > > + > > +[Rule.Common.DXE_CORE] > > + FILE DXE_CORE =3D $(NAMED_GUID) { > > + PE32 PE32 > $(INF_OUTPUT)/$(MODULE_NAME).efi > > + UI STRING=3D"$(MODULE_NAME)" Optional > > + } > > + > > +[Rule.Common.UEFI_DRIVER] > > + FILE DRIVER =3D $(NAMED_GUID) { > > + DXE_DEPEX DXE_DEPEX Optional > $(INF_OUTPUT)/$(MODULE_NAME).depex > > + PE32 PE32 > $(INF_OUTPUT)/$(MODULE_NAME).efi > > + UI STRING=3D"$(MODULE_NAME)" Optional > > + } > > + > > +[Rule.Common.DXE_DRIVER] > > + FILE DRIVER =3D $(NAMED_GUID) { > > + DXE_DEPEX DXE_DEPEX Optional > $(INF_OUTPUT)/$(MODULE_NAME).depex > > + PE32 PE32 > $(INF_OUTPUT)/$(MODULE_NAME).efi > > + UI STRING=3D"$(MODULE_NAME)" Optional > > + } > > + > > +[Rule.Common.DXE_RUNTIME_DRIVER] > > + FILE DRIVER =3D $(NAMED_GUID) { > > + DXE_DEPEX DXE_DEPEX Optional > $(INF_OUTPUT)/$(MODULE_NAME).depex > > + PE32 PE32 > $(INF_OUTPUT)/$(MODULE_NAME).efi > > + UI STRING=3D"$(MODULE_NAME)" Optional > > + } > > + > > +[Rule.Common.UEFI_APPLICATION] > > + FILE APPLICATION =3D $(NAMED_GUID) { > > + UI STRING =3D"$(MODULE_NAME)" Optional > > + PE32 PE32 > $(INF_OUTPUT)/$(MODULE_NAME).efi > > + } > > + > > +[Rule.Common.UEFI_DRIVER.BINARY] > > + FILE DRIVER =3D $(NAMED_GUID) { > > + DXE_DEPEX DXE_DEPEX Optional |.depex > > + PE32 PE32 |.efi > > + UI STRING=3D"$(MODULE_NAME)" Optional > > + VERSION STRING=3D"$(INF_VERSION)" Optional > BUILD_NUM=3D$(BUILD_NUMBER) > > + } > > + > > +[Rule.Common.UEFI_APPLICATION.BINARY] > > + FILE APPLICATION =3D $(NAMED_GUID) { > > + PE32 PE32 |.efi > > + UI STRING=3D"$(MODULE_NAME)" Optional > > + VERSION STRING=3D"$(INF_VERSION)" Optional > BUILD_NUM=3D$(BUILD_NUMBER) > > + } > > + > > + > > + > > diff --git a/Readme.md b/Readme.md > > index 63e59f60b416..833c1757c025 100644 > > --- a/Readme.md > > +++ b/Readme.md > > @@ -229,6 +229,9 @@ they will be documented with the > platform. > > * [Kaby Lake](Platform/Intel/KabylakeOpenBoardPkg) > > * [Purley](Platform/Intel/PurleyOpenBoardPkg) > > > > +### SoCFPGA Platforms > > +* [Stratix10](Platform/Intel/Stratix10) > > + > > For more information, see the > > [EDK II Minimum Platform > Specification](https://edk2-docs.gitbooks.io/edk-ii- > minimum-platform-specification). > > ### Other Platforms > > -- > > 2.19.0 > >