From mboxrd@z Thu Jan 1 00:00:00 1970 Return-Path: Received: from mga04.intel.com (mga04.intel.com [192.55.52.120]) (using TLSv1.2 with cipher ECDHE-RSA-AES256-GCM-SHA384 (256/256 bits)) (No client certificate requested) by ml01.01.org (Postfix) with ESMTPS id A2BD621A0BA99 for ; Thu, 11 May 2017 00:54:08 -0700 (PDT) Received: from orsmga004.jf.intel.com ([10.7.209.38]) by fmsmga104.fm.intel.com with ESMTP/TLS/DHE-RSA-AES256-GCM-SHA384; 11 May 2017 00:54:07 -0700 X-ExtLoop1: 1 X-IronPort-AV: E=Sophos;i="5.38,323,1491289200"; d="scan'208";a="86331118" Received: from fmsmsx108.amr.corp.intel.com ([10.18.124.206]) by orsmga004.jf.intel.com with ESMTP; 11 May 2017 00:54:07 -0700 Received: from fmsmsx123.amr.corp.intel.com (10.18.125.38) by FMSMSX108.amr.corp.intel.com (10.18.124.206) with Microsoft SMTP Server (TLS) id 14.3.319.2; Thu, 11 May 2017 00:54:07 -0700 Received: from shsmsx151.ccr.corp.intel.com (10.239.6.50) by fmsmsx123.amr.corp.intel.com (10.18.125.38) with Microsoft SMTP Server (TLS) id 14.3.319.2; Thu, 11 May 2017 00:54:07 -0700 Received: from shsmsx101.ccr.corp.intel.com ([169.254.1.193]) by SHSMSX151.ccr.corp.intel.com ([169.254.3.224]) with mapi id 14.03.0319.002; Thu, 11 May 2017 15:54:04 +0800 From: "Dong, Eric" To: "Fan, Jeff" , "edk2-devel@lists.01.org" CC: "Yao, Jiewen" Thread-Topic: [PATCH] UefiCpuPkg/PiSmmCpuDxeSmm: Check ProcessorId == INVALID_APIC_ID Thread-Index: AQHSyWg7Is7D3eC1T028YuPrnjWxN6HuxJpA Date: Thu, 11 May 2017 07:54:04 +0000 Message-ID: References: <20170510083413.12844-1-jeff.fan@intel.com> In-Reply-To: <20170510083413.12844-1-jeff.fan@intel.com> Accept-Language: en-US X-MS-Has-Attach: X-MS-TNEF-Correlator: x-originating-ip: [10.239.127.40] MIME-Version: 1.0 Subject: Re: [PATCH] UefiCpuPkg/PiSmmCpuDxeSmm: Check ProcessorId == INVALID_APIC_ID X-BeenThere: edk2-devel@lists.01.org X-Mailman-Version: 2.1.22 Precedence: list List-Id: EDK II Development List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , X-List-Received-Date: Thu, 11 May 2017 07:54:08 -0000 Content-Language: en-US Content-Type: text/plain; charset="us-ascii" Content-Transfer-Encoding: quoted-printable Reviewed-by: Eric Dong -----Original Message----- From: Fan, Jeff=20 Sent: Wednesday, May 10, 2017 4:34 PM To: edk2-devel@lists.01.org Cc: Yao, Jiewen; Dong, Eric Subject: [PATCH] UefiCpuPkg/PiSmmCpuDxeSmm: Check ProcessorId =3D=3D INVALI= D_APIC_ID If PcdCpuHotPlugSupport is TRUE, gSmst->NumberOfCpus will be the PcdCpuMaxL= ogicalProcessorNumber. If gSmst->SmmStartupThisAp() is invoked for those un= -existed processors, ASSERT() happened in ConfigSmmCodeAccessCheck(). This fix is to check if ProcessorId is valid before invoke gSmst->SmmStartupThisAp() in ConfigSmmCodeAccessCheck() and to check if ProcessorId is valid in InternalSmmStartupThisAp() to avoid unexpected DEBU= G error message displayed. Cc: Jiewen Yao Cc: Eric Dong Contributed-under: TianoCore Contribution Agreement 1.0 Signed-off-by: Jeff Fan --- UefiCpuPkg/PiSmmCpuDxeSmm/MpService.c | 3 +++ UefiCpuPkg/PiSmmCpuDxeSmm/PiSmmCpuDxeSmm.c | 7 ++++++- 2 files changed, 9 insertions(+), 1 deletion(-) diff --git a/UefiCpuPkg/PiSmmCpuDxeSmm/MpService.c b/UefiCpuPkg/PiSmmCpuDxe= Smm/MpService.c index e03f1e0..4ac5e8e 100644 --- a/UefiCpuPkg/PiSmmCpuDxeSmm/MpService.c +++ b/UefiCpuPkg/PiSmmCpuDxeSmm/MpService.c @@ -860,6 +860,9 @@ InternalSmmStartupThisAp ( DEBUG((DEBUG_ERROR, "CpuIndex(%d) =3D=3D gSmmCpuPrivate->SmmCoreEntryC= ontext.CurrentlyExecutingCpu\n", CpuIndex)); return EFI_INVALID_PARAMETER; } + if (gSmmCpuPrivate->ProcessorInfo[CpuIndex].ProcessorId =3D=3D INVALID_A= PIC_ID) { + return EFI_INVALID_PARAMETER; + } if (!(*(mSmmMpSyncData->CpuData[CpuIndex].Present))) { if (mSmmMpSyncData->EffectiveSyncMode =3D=3D SmmCpuSyncModeTradition) = { DEBUG((DEBUG_ERROR, "!mSmmMpSyncData->CpuData[%d].Present\n", CpuInd= ex)); diff --git a/UefiCpuPkg/PiSmmCpuDxeSmm/PiSmmCpuDxeSmm.c b/UefiCpuPkg/= PiSmmCpuDxeSmm/PiSmmCpuDxeSmm.c index 2d6b572..8e79642 100755 --- a/UefiCpuPkg/PiSmmCpuDxeSmm/PiSmmCpuDxeSmm.c +++ b/UefiCpuPkg/PiSmmCpuDxeSmm/PiSmmCpuDxeSmm.c @@ -1117,7 +1117,12 @@ ConfigSmmCodeAccessCheck ( // for (Index =3D 0; Index < gSmst->NumberOfCpus; Index++) { if (Index !=3D gSmmCpuPrivate->SmmCoreEntryContext.CurrentlyExecutingC= pu) { - + if (gSmmCpuPrivate->ProcessorInfo[Index].ProcessorId =3D=3D INVALID_= APIC_ID) { + // + // If this processor does not exist + // + continue; + } // // Acquire Config SMM Code Access Check spin lock. The AP will rele= ase the // spin lock when it is done executing ConfigSmmCodeAccessCheckOnCur= rentProcessor(). -- 2.9.3.windows.2