From mboxrd@z Thu Jan 1 00:00:00 1970 Return-Path: Received-SPF: Pass (sender SPF authorized) identity=mailfrom; client-ip=134.134.136.24; helo=mga09.intel.com; envelope-from=eric.dong@intel.com; receiver=edk2-devel@lists.01.org Received: from mga09.intel.com (mga09.intel.com [134.134.136.24]) (using TLSv1.2 with cipher ECDHE-RSA-AES256-GCM-SHA384 (256/256 bits)) (No client certificate requested) by ml01.01.org (Postfix) with ESMTPS id 6A91C2205B93E for ; Thu, 18 Jan 2018 04:17:52 -0800 (PST) X-Amp-Result: SKIPPED(no attachment in message) X-Amp-File-Uploaded: False Received: from orsmga007.jf.intel.com ([10.7.209.58]) by orsmga102.jf.intel.com with ESMTP/TLS/DHE-RSA-AES256-GCM-SHA384; 18 Jan 2018 04:23:13 -0800 X-ExtLoop1: 1 X-IronPort-AV: E=Sophos;i="5.46,377,1511856000"; d="scan'208";a="10718896" Received: from fmsmsx108.amr.corp.intel.com ([10.18.124.206]) by orsmga007.jf.intel.com with ESMTP; 18 Jan 2018 04:23:13 -0800 Received: from fmsmsx120.amr.corp.intel.com (10.18.124.208) by FMSMSX108.amr.corp.intel.com (10.18.124.206) with Microsoft SMTP Server (TLS) id 14.3.319.2; Thu, 18 Jan 2018 04:23:12 -0800 Received: from shsmsx101.ccr.corp.intel.com (10.239.4.153) by fmsmsx120.amr.corp.intel.com (10.18.124.208) with Microsoft SMTP Server (TLS) id 14.3.319.2; Thu, 18 Jan 2018 04:23:12 -0800 Received: from shsmsx102.ccr.corp.intel.com ([169.254.2.189]) by SHSMSX101.ccr.corp.intel.com ([169.254.1.159]) with mapi id 14.03.0319.002; Thu, 18 Jan 2018 20:23:11 +0800 From: "Dong, Eric" To: "Wang, Jian J" , "edk2-devel@lists.01.org" CC: Laszlo Ersek Thread-Topic: [PATCH] UefiCpuPkg/CpuDxe: fix bad boot performance Thread-Index: AQHTkC9oQx0zTqHR+EWCE+ZIIGBOoaN5jcNg Date: Thu, 18 Jan 2018 12:23:10 +0000 Message-ID: References: <20180118073857.19448-1-jian.j.wang@intel.com> In-Reply-To: <20180118073857.19448-1-jian.j.wang@intel.com> Accept-Language: en-US X-MS-Has-Attach: X-MS-TNEF-Correlator: x-originating-ip: [10.239.127.40] MIME-Version: 1.0 Subject: Re: [PATCH] UefiCpuPkg/CpuDxe: fix bad boot performance X-BeenThere: edk2-devel@lists.01.org X-Mailman-Version: 2.1.23 Precedence: list List-Id: EDK II Development List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , X-List-Received-Date: Thu, 18 Jan 2018 12:17:52 -0000 Content-Language: en-US Content-Type: text/plain; charset="us-ascii" Content-Transfer-Encoding: quoted-printable Reviewed-by: Eric Dong -----Original Message----- From: Wang, Jian J=20 Sent: Thursday, January 18, 2018 3:39 PM To: edk2-devel@lists.01.org Cc: Dong, Eric ; Laszlo Ersek Subject: [PATCH] UefiCpuPkg/CpuDxe: fix bad boot performance If features like memory profile, protection and heap guard are enabled, a l= ot of more memory page attributes update actions will happen than usual. An= unnecessary sync of CR0.WP setting among APs will then cause worse perform= ance in memory allocation action. Removing the calling of SyncMemoryPageAttributesAp() in function DisableReadOnlyPageWriteProtect an= d EnableReadOnlyPageWriteProtect can fix this problem. In DEBUG build case,= the boot performance can be boosted from 11 minute to 6 minute. Cc: Eric Dong Cc: Laszlo Ersek Contributed-under: TianoCore Contribution Agreement 1.1 Signed-off-by: Jian J Wang --- UefiCpuPkg/CpuDxe/CpuPageTable.c | 2 -- 1 file changed, 2 deletions(-) diff --git a/UefiCpuPkg/CpuDxe/CpuPageTable.c b/UefiCpuPkg/CpuDxe/CpuPageTa= ble.c index a9c9bc9d5e..b97a444c09 100644 --- a/UefiCpuPkg/CpuDxe/CpuPageTable.c +++ b/UefiCpuPkg/CpuDxe/CpuPageTable.c @@ -597,7 +597,6 @@ DisableReadOnlyPageWriteProtect ( ) { AsmWriteCr0 (AsmReadCr0() & ~BIT16); - SyncMemoryPageAttributesAp (SyncCpuDisableWriteProtection); } =20 /** @@ -609,7 +608,6 @@ EnableReadOnlyPageWriteProtect ( ) { AsmWriteCr0 (AsmReadCr0() | BIT16); - SyncMemoryPageAttributesAp (SyncCpuEnableWriteProtection); } =20 /** -- 2.15.1.windows.2