From mboxrd@z Thu Jan 1 00:00:00 1970 Return-Path: Received-SPF: Pass (sender SPF authorized) identity=mailfrom; client-ip=134.134.136.20; helo=mga02.intel.com; envelope-from=eric.dong@intel.com; receiver=edk2-devel@lists.01.org Received: from mga02.intel.com (mga02.intel.com [134.134.136.20]) (using TLSv1.2 with cipher ECDHE-RSA-AES256-GCM-SHA384 (256/256 bits)) (No client certificate requested) by ml01.01.org (Postfix) with ESMTPS id DF64720971745 for ; Sun, 27 May 2018 23:30:06 -0700 (PDT) X-Amp-Result: SKIPPED(no attachment in message) X-Amp-File-Uploaded: False Received: from orsmga006.jf.intel.com ([10.7.209.51]) by orsmga101.jf.intel.com with ESMTP/TLS/DHE-RSA-AES256-GCM-SHA384; 27 May 2018 23:30:06 -0700 X-ExtLoop1: 1 X-IronPort-AV: E=Sophos;i="5.49,451,1520924400"; d="scan'208";a="45285126" Received: from fmsmsx103.amr.corp.intel.com ([10.18.124.201]) by orsmga006.jf.intel.com with ESMTP; 27 May 2018 23:30:06 -0700 Received: from fmsmsx111.amr.corp.intel.com (10.18.116.5) by FMSMSX103.amr.corp.intel.com (10.18.124.201) with Microsoft SMTP Server (TLS) id 14.3.319.2; Sun, 27 May 2018 23:29:55 -0700 Received: from shsmsx151.ccr.corp.intel.com (10.239.6.50) by fmsmsx111.amr.corp.intel.com (10.18.116.5) with Microsoft SMTP Server (TLS) id 14.3.319.2; Sun, 27 May 2018 23:29:51 -0700 Received: from shsmsx101.ccr.corp.intel.com ([169.254.1.82]) by SHSMSX151.ccr.corp.intel.com ([169.254.3.116]) with mapi id 14.03.0319.002; Mon, 28 May 2018 14:29:48 +0800 From: "Dong, Eric" To: "Ni, Ruiyu" , "edk2-devel@lists.01.org" CC: "Shao, Ming" Thread-Topic: [PATCH] UefiCpuPkg/CpuCommonFeatures: Follow SDM for MAX CPUID feature detect Thread-Index: AQHT9AbrbujsGvVVeEiAxghQLIzknqREr2uQ Date: Mon, 28 May 2018 06:29:47 +0000 Message-ID: References: <20180525090057.392796-1-ruiyu.ni@intel.com> In-Reply-To: <20180525090057.392796-1-ruiyu.ni@intel.com> Accept-Language: en-US X-MS-Has-Attach: X-MS-TNEF-Correlator: x-originating-ip: [10.239.127.40] MIME-Version: 1.0 Subject: Re: [PATCH] UefiCpuPkg/CpuCommonFeatures: Follow SDM for MAX CPUID feature detect X-BeenThere: edk2-devel@lists.01.org X-Mailman-Version: 2.1.26 Precedence: list List-Id: EDK II Development List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , X-List-Received-Date: Mon, 28 May 2018 06:30:07 -0000 Content-Language: en-US Content-Type: text/plain; charset="us-ascii" Content-Transfer-Encoding: quoted-printable Reviewed-by: Eric Dong -----Original Message----- From: Ni, Ruiyu=20 Sent: Friday, May 25, 2018 5:01 PM To: edk2-devel@lists.01.org Cc: Dong, Eric ; Shao, Ming Subject: [PATCH] UefiCpuPkg/CpuCommonFeatures: Follow SDM for MAX CPUID fea= ture detect According to IA manual: "Before setting this bit (MSR_IA32_MISC_ENABLE[22]) , BIOS must execute the= CPUID.0H and examine the maximum value returned in EAX[7:0]. If the maximu= m value is greater than 2, this bit is supported." We need to fix our current detection logic to compare against 2. Contributed-under: TianoCore Contribution Agreement 1.1 Signed-off-by: Ruiyu Ni Cc: Eric Dong Cc: Ming Shao --- UefiCpuPkg/Library/CpuCommonFeaturesLib/LimitCpuIdMaxval.c | 4 ++-- 1 file changed, 2 insertions(+), 2 deletions(-) diff --git a/UefiCpuPkg/Library/CpuCommonFeaturesLib/LimitCpuIdMaxval.c b/U= efiCpuPkg/Library/CpuCommonFeaturesLib/LimitCpuIdMaxval.c index 40cc9d5fe0..3d41efe9e9 100644 --- a/UefiCpuPkg/Library/CpuCommonFeaturesLib/LimitCpuIdMaxval.c +++ b/UefiCpuPkg/Library/CpuCommonFeaturesLib/LimitCpuIdMaxval.c @@ -1,7 +1,7 @@ /** @file LimitCpuidMaxval Feature. =20 - Copyright (c) 2017, Intel Corporation. All rights reserved.
+ Copyright (c) 2017 - 2018, Intel Corporation. All rights=20 + reserved.
This program and the accompanying materials are licensed and made available under the terms and conditions of the BS= D License which accompanies this distribution. The full text of the license may b= e found at @@ -41,7 +41,7 @@ LimitCpuidMaxvalSupport ( UINT32 Eax; =20 AsmCpuid (CPUID_SIGNATURE, &Eax, NULL, NULL, NULL); - return (Eax > 3); + return (Eax > 2); } =20 /** -- 2.16.1.windows.1