From mboxrd@z Thu Jan 1 00:00:00 1970 Return-Path: Received-SPF: Pass (sender SPF authorized) identity=mailfrom; client-ip=192.55.52.43; helo=mga05.intel.com; envelope-from=eric.dong@intel.com; receiver=edk2-devel@lists.01.org Received: from mga05.intel.com (mga05.intel.com [192.55.52.43]) (using TLSv1.2 with cipher ECDHE-RSA-AES256-GCM-SHA384 (256/256 bits)) (No client certificate requested) by ml01.01.org (Postfix) with ESMTPS id EE2DD203B99B5 for ; Thu, 12 Jul 2018 03:30:37 -0700 (PDT) X-Amp-Result: SKIPPED(no attachment in message) X-Amp-File-Uploaded: False Received: from fmsmga008.fm.intel.com ([10.253.24.58]) by fmsmga105.fm.intel.com with ESMTP/TLS/DHE-RSA-AES256-GCM-SHA384; 12 Jul 2018 03:30:37 -0700 X-ExtLoop1: 1 X-IronPort-AV: E=Sophos;i="5.51,342,1526367600"; d="scan'208";a="54481491" Received: from fmsmsx106.amr.corp.intel.com ([10.18.124.204]) by fmsmga008.fm.intel.com with ESMTP; 12 Jul 2018 03:30:35 -0700 Received: from fmsmsx154.amr.corp.intel.com (10.18.116.70) by FMSMSX106.amr.corp.intel.com (10.18.124.204) with Microsoft SMTP Server (TLS) id 14.3.319.2; Thu, 12 Jul 2018 03:30:35 -0700 Received: from shsmsx152.ccr.corp.intel.com (10.239.6.52) by FMSMSX154.amr.corp.intel.com (10.18.116.70) with Microsoft SMTP Server (TLS) id 14.3.319.2; Thu, 12 Jul 2018 03:30:34 -0700 Received: from shsmsx101.ccr.corp.intel.com ([169.254.1.57]) by SHSMSX152.ccr.corp.intel.com ([169.254.6.173]) with mapi id 14.03.0319.002; Thu, 12 Jul 2018 18:30:33 +0800 From: "Dong, Eric" To: Laszlo Ersek , "edk2-devel@lists.01.org" CC: "Ni, Ruiyu" Thread-Topic: [edk2] [Patch 2/3] UefiCpuPkg/MpInitLib: Use BSP uCode for APs if possible. Thread-Index: AQHUGQdnNCCQ0paoJ06t9X+h+JnHuqSK0RCAgACSmzA= Date: Thu, 12 Jul 2018 10:30:32 +0000 Message-ID: References: <20180711110729.12604-1-eric.dong@intel.com> <20180711110729.12604-3-eric.dong@intel.com> <02391bab-78f9-e443-3187-e8cef86da2f4@redhat.com> In-Reply-To: <02391bab-78f9-e443-3187-e8cef86da2f4@redhat.com> Accept-Language: en-US X-MS-Has-Attach: X-MS-TNEF-Correlator: x-originating-ip: [10.239.127.40] MIME-Version: 1.0 Subject: Re: [Patch 2/3] UefiCpuPkg/MpInitLib: Use BSP uCode for APs if possible. X-BeenThere: edk2-devel@lists.01.org X-Mailman-Version: 2.1.27 Precedence: list List-Id: EDK II Development List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , X-List-Received-Date: Thu, 12 Jul 2018 10:30:38 -0000 Content-Language: en-US Content-Type: text/plain; charset="us-ascii" Content-Transfer-Encoding: quoted-printable Hi Laszlo, > -----Original Message----- > From: edk2-devel [mailto:edk2-devel-bounces@lists.01.org] On Behalf Of > Laszlo Ersek > Sent: Thursday, July 12, 2018 5:42 PM > To: Dong, Eric ; edk2-devel@lists.01.org > Cc: Ni, Ruiyu > Subject: Re: [edk2] [Patch 2/3] UefiCpuPkg/MpInitLib: Use BSP uCode for A= Ps > if possible. >=20 > On 07/11/18 13:07, Eric Dong wrote: > > Search uCode costs much time, if AP has same processor type with BSP, > > AP can use BSP saved uCode info to get better performance. > > > > This change enables this solution. > > > > Cc: Laszlo Ersek > > Cc: Ruiyu Ni > > Contributed-under: TianoCore Contribution Agreement 1.1 > > Signed-off-by: Eric Dong > > --- > > UefiCpuPkg/Library/MpInitLib/Microcode.c | 34 > +++++++++++++++++++++++++++++--- > > UefiCpuPkg/Library/MpInitLib/MpLib.c | 4 ++-- > > UefiCpuPkg/Library/MpInitLib/MpLib.h | 11 +++++++++-- > > 3 files changed, 42 insertions(+), 7 deletions(-) > > > > diff --git a/UefiCpuPkg/Library/MpInitLib/Microcode.c > > b/UefiCpuPkg/Library/MpInitLib/Microcode.c > > index e47f9f4f8f..351975e2a2 100644 > > --- a/UefiCpuPkg/Library/MpInitLib/Microcode.c > > +++ b/UefiCpuPkg/Library/MpInitLib/Microcode.c > > @@ -35,11 +35,13 @@ GetCurrentMicrocodeSignature ( > > /** > > Detect whether specified processor can find matching microcode patch > and load it. > > > > - @param[in] CpuMpData The pointer to CPU MP Data structure. > > + @param[in] CpuMpData The pointer to CPU MP Data structure. > > + @param[in] IsBspCallIn Indicate whether the caller is BSP or not. > > **/ > > VOID > > MicrocodeDetect ( > > - IN CPU_MP_DATA *CpuMpData > > + IN CPU_MP_DATA *CpuMpData, > > + IN BOOLEAN IsBspCallIn > > ) > > { > > UINT32 ExtendedTableLength; > > @@ -58,6 +60,7 @@ MicrocodeDetect ( > > BOOLEAN CorrectMicrocode; > > VOID *MicrocodeData; > > MSR_IA32_PLATFORM_ID_REGISTER PlatformIdMsr; > > + UINT32 ProcessorFlags; > > > > if (CpuMpData->MicrocodePatchRegionSize =3D=3D 0) { > > // > > @@ -67,7 +70,7 @@ MicrocodeDetect ( > > } > > > > CurrentRevision =3D GetCurrentMicrocodeSignature (); > > - if (CurrentRevision !=3D 0) { > > + if (CurrentRevision !=3D 0 && !IsBspCallIn) { > > // > > // Skip loading microcode if it has been loaded successfully > > // > > @@ -87,6 +90,19 @@ MicrocodeDetect ( > > PlatformIdMsr.Uint64 =3D AsmReadMsr64 (MSR_IA32_PLATFORM_ID); > > PlatformId =3D (UINT8) PlatformIdMsr.Bits.PlatformId; > > > > + // > > + // Check whether AP has same processor with BSP. > > + // If yes, direct use microcode info saved by BSP. > > + // > > + if (!IsBspCallIn) { > > + if ((CpuMpData->ProcessorSignature =3D=3D Eax.Uint32) && > > + (CpuMpData->ProcessorFlags & (1 << PlatformId)) !=3D 0) { >=20 > Here I have only one comment. (The reason for that is that, on OVMF, > MicrocodePatchRegionSize is zero, so MicrocodeDetect() will exit > immediately, on both the APs and the BSP.) >=20 > My comment is that the expression >=20 > (1 << PlatformId) >=20 > may invoke undefined behavior (and rightfully trigger build breakage with= e.g. > clang) if PlatformId is larger than 31. >=20 > Now, I do see the comment >=20 > // > // The index of platform information resides in bits 50:52 of MSR > IA32_PLATFORM_ID > // >=20 > so I wanted to suggest adding: >=20 > ASSERT (PlatformId < 8)? >=20 > but then I saw that the same left-shift was already used in two other pla= ces. >=20 > So, with or without the ASSERT: >=20 > Acked-by: Laszlo Ersek PlatformId get from below code:=20 PlatformId =3D (UINT8) PlatformIdMsr.Bits.PlatformId; PlatformIdMsr.Bits.PlatformId is a three bits value, so it has limit the Pl= atformId value < 8. So I will not add the ASSERT code. >=20 > Thanks > Laszlo >=20 >=20 >=20 > > + MicrocodeData =3D (VOID *)(UINTN) CpuMpData- > >MicrocodeDataAddress; > > + LatestRevision =3D CpuMpData->MicrocodeRevision; > > + goto Done; > > + } > > + } > > + > > LatestRevision =3D 0; > > MicrocodeData =3D NULL; > > MicrocodeEnd =3D (UINTN) (CpuMpData->MicrocodePatchAddress + > > CpuMpData->MicrocodePatchRegionSize); > > @@ -117,6 +133,7 @@ MicrocodeDetect ( > > } > > if (CheckSum32 =3D=3D 0) { > > CorrectMicrocode =3D TRUE; > > + ProcessorFlags =3D MicrocodeEntryPoint->ProcessorFlags; > > } > > } else if ((MicrocodeEntryPoint->DataSize !=3D 0) && > > (MicrocodeEntryPoint->UpdateRevision > > > LatestRevision)) { @@ -151,6 +168,7 @@ MicrocodeDetect ( > > // Find one > > // > > CorrectMicrocode =3D TRUE; > > + ProcessorFlags =3D ExtendedTable->ProcessorFlag; > > break; > > } > > } > > @@ -188,6 +206,7 @@ MicrocodeDetect ( > > MicrocodeEntryPoint =3D (CPU_MICROCODE_HEADER *) (((UINTN) > MicrocodeEntryPoint) + TotalSize); > > } while (((UINTN) MicrocodeEntryPoint < MicrocodeEnd)); > > > > +Done: > > if (LatestRevision > CurrentRevision) { > > // > > // BIOS only authenticate updates that contain a numerically > > larger revision @@ -211,4 +230,13 @@ MicrocodeDetect ( > > ReleaseSpinLock(&CpuMpData->MpLock); > > } > > } > > + > > + if (IsBspCallIn && (LatestRevision !=3D 0)) { > > + CpuMpData->ProcessorSignature =3D Eax.Uint32; > > + CpuMpData->ProcessorFlags =3D ProcessorFlags; > > + CpuMpData->MicrocodeDataAddress =3D (UINTN) MicrocodeData; > > + CpuMpData->MicrocodeRevision =3D LatestRevision; > > + DEBUG ((DEBUG_INFO, "BSP Microcode:: signature [0x%08x], > ProcessorFlags [0x%08x], \ > > + MicroData [0x%08x], Revision [0x%08x]\n", Eax.Uint32, > > + ProcessorFlags, (UINTN) MicrocodeData, LatestRevision)); } > > } > > diff --git a/UefiCpuPkg/Library/MpInitLib/MpLib.c > > b/UefiCpuPkg/Library/MpInitLib/MpLib.c > > index 8b458a4a3a..9179f9ae6d 100644 > > --- a/UefiCpuPkg/Library/MpInitLib/MpLib.c > > +++ b/UefiCpuPkg/Library/MpInitLib/MpLib.c > > @@ -410,7 +410,7 @@ ApInitializeSync ( > > // > > // Load microcode on AP > > // > > - MicrocodeDetect (CpuMpData); > > + MicrocodeDetect (CpuMpData, FALSE); > > // > > // Sync BSP's MTRR table to AP > > // > > @@ -1601,7 +1601,7 @@ MpInitLibInitialize ( > > // > > // Load Microcode on BSP > > // > > - MicrocodeDetect (CpuMpData); > > + MicrocodeDetect (CpuMpData, TRUE); > > // > > // Store BSP's MTRR setting > > // > > diff --git a/UefiCpuPkg/Library/MpInitLib/MpLib.h > > b/UefiCpuPkg/Library/MpInitLib/MpLib.h > > index 73e689d969..d897497b77 100644 > > --- a/UefiCpuPkg/Library/MpInitLib/MpLib.h > > +++ b/UefiCpuPkg/Library/MpInitLib/MpLib.h > > @@ -246,6 +246,11 @@ struct _CPU_MP_DATA { > > BOOLEAN TimerInterruptState; > > UINT64 MicrocodePatchAddress; > > UINT64 MicrocodePatchRegionSize; > > + > > + UINT32 ProcessorSignature; > > + UINT32 ProcessorFlags; > > + UINT64 MicrocodeDataAddress; > > + UINT32 MicrocodeRevision; > > }; > > > > extern EFI_GUID mCpuInitMpLibHobGuid; @@ -547,11 +552,13 @@ > > CheckAndUpdateApsStatus ( > > /** > > Detect whether specified processor can find matching microcode patch > and load it. > > > > - @param[in] CpuMpData The pointer to CPU MP Data structure. > > + @param[in] CpuMpData The pointer to CPU MP Data structure. > > + @param[in] IsBspCallIn Indicate whether the caller is BSP or not. > > **/ > > VOID > > MicrocodeDetect ( > > - IN CPU_MP_DATA *CpuMpData > > + IN CPU_MP_DATA *CpuMpData, > > + IN BOOLEAN IsBspCallIn > > ); > > > > /** > > >=20 > _______________________________________________ > edk2-devel mailing list > edk2-devel@lists.01.org > https://lists.01.org/mailman/listinfo/edk2-devel