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From: "Dong, Eric" <eric.dong@intel.com>
To: Laszlo Ersek <lersek@redhat.com>,
	"Ni, Ruiyu" <ruiyu.ni@intel.com>,
	"edk2-devel@lists.01.org" <edk2-devel@lists.01.org>
Cc: "Kinney, Michael D" <michael.d.kinney@intel.com>
Subject: Re: [Patch v2 08/14] UefiCpuPkg/Include/Register/ArchitecturalMsr.h: Change structure definition.
Date: Tue, 25 Sep 2018 02:08:50 +0000	[thread overview]
Message-ID: <ED077930C258884BBCB450DB737E66224ACCFA26@shsmsx102.ccr.corp.intel.com> (raw)
In-Reply-To: <53768691-df03-b8d8-66c1-938a37fe3d77@redhat.com>

Hi Ruiyu & Laszlo,

Thanks for your comments. I will update V3 patches.

Thanks,
Eric

> -----Original Message-----
> From: Laszlo Ersek [mailto:lersek@redhat.com]
> Sent: Friday, September 21, 2018 5:42 PM
> To: Ni, Ruiyu <ruiyu.ni@intel.com>; Dong, Eric <eric.dong@intel.com>; edk2-
> devel@lists.01.org
> Cc: Kinney, Michael D <michael.d.kinney@intel.com>
> Subject: Re: [Patch v2 08/14]
> UefiCpuPkg/Include/Register/ArchitecturalMsr.h: Change structure
> definition.
> 
> On 09/21/18 10:44, Ni, Ruiyu wrote:
> > On 9/21/2018 3:41 PM, Eric Dong wrote:
> >>       UINT32  User:1;
> >> -    UINT32  Reserved1:2;
> >> +    ///
> >> +    /// [Bit 4] PwrEvtEn.
> >> +    ///
> >> +    UINT32  PwrEvtEn:1;
> >> +    ///
> >> +    /// [Bit 5] FUPonPTW.
> >> +    ///
> >> +    UINT32  FUPonPTW:1;
> >>       ///
> >>       /// [Bit 6] FabricEn. If (CPUID.(EAX=07H, ECX=0):ECX[3] = 1).
> >>       ///
> >> @@ -4672,7 +4679,10 @@ typedef union {
> >>       /// [Bit 11] DisRETC.
> >>       ///
> >>       UINT32  DisRETC:1;
> >> -    UINT32  Reserved2:1;
> >> +    ///
> >> +    /// [Bit 12] PTWEn.
> >> +    ///
> >> +    UINT32  PTWEn:1;
> >>       ///
> >>       /// [Bit 13] BranchEn.
> >>       ///
> >> @@ -4681,17 +4691,17 @@ typedef union {
> >>       /// [Bits 17:14] MTCFreq. If (CPUID.(EAX=07H, ECX=0):EBX[3] = 1).
> >>       ///
> >>       UINT32  MTCFreq:4;
> >> -    UINT32  Reserved3:1;
> >> +    UINT32  Reserved7:1;
> >
> > I prefer to not change this field name since the bit range for this
> > Reserved6 is not changed.
> >
> >>       ///
> >>       /// [Bits 22:19] CYCThresh. If (CPUID.(EAX=07H, ECX=0):EBX[1] = 1).
> >>       ///
> >>       UINT32  CYCThresh:4;
> >> -    UINT32  Reserved4:1;
> >> +    UINT32  Reserved8:1;
> >
> > I prefer to not change this field name since the bit range for this
> > Reserved6 is not changed.
> >
> >>       ///
> >>       /// [Bits 27:24] PSBFreq. If (CPUID.(EAX=07H, ECX=0):EBX[1] = 1).
> >>       ///
> >>       UINT32  PSBFreq:4;
> >> -    UINT32  Reserved5:4;
> >> +    UINT32  Reserved9:4;
> >
> > I prefer to not change this field name since the bit range for this
> > Reserved6 is not changed.
> >
> >>       ///
> >>       /// [Bits 35:32] ADDR0_CFG. If (CPUID.(EAX=07H, ECX=1):EAX[2:0]
> >> > 0).
> >>       ///
> >> @@ -4708,7 +4718,7 @@ typedef union {
> >>       /// [Bits 47:44] ADDR3_CFG. If (CPUID.(EAX=07H, ECX=1):EAX[2:0]
> >> > 3).
> >>       ///
> >>       UINT32  ADDR3_CFG:4;
> >> -    UINT32  Reserved6:16;
> >> +    UINT32  Reserved10:16;
> >
> > I prefer to not change this field name since the bit range for this
> > Reserved6 is not changed.
> >
> >>     } Bits;
> >
> >
> > Eric,
> > As comments above, I suggest we keep the original Reserved## name if
> > the bit range for that field doesn't change. We can only update the
> > Reserved## name if the bit range changes.
> >
> > In this way, we can maximally avoid build failure and also avoid
> > silent failure.
> >
> > In general, the Reserved## name is updated when the bit range changes.
> > The ## is updated to
> > 1 + MAX (all numbers used by Reserved## in this structure).
> >
> >
> > Laszlo,
> > What's your opinion?
> >
> 
> I agree with your suggestion.
> 
> Thanks
> Laszlo

  reply	other threads:[~2018-09-25  2:15 UTC|newest]

Thread overview: 19+ messages / expand[flat|nested]  mbox.gz  Atom feed  top
2018-09-21  7:41 [Patch v2 00/14] Update MSR definitions Eric Dong
2018-09-21  7:41 ` [Patch v2 01/14] UefiCpuPkg/Include/Register/Msr: Update reference spec info Eric Dong
2018-09-21  7:41 ` [Patch v2 02/14] UefiCpuPkg/Include/Register/Msr/GoldmontPlusMsr.h: Add new MSR file for goldmont plus microarchitecture Eric Dong
2018-09-21  7:41 ` [Patch v2 03/14] UefiCpuPkg/Include/Register/Msr/SilvermontMsr.h: Add new MSR Eric Dong
2018-09-21  7:41 ` [Patch v2 04/14] UefiCpuPkg/Include/Register/Msr/*.h: " Eric Dong
2018-09-21  7:41 ` [Patch v2 05/14] UefiCpuPkg/Include/Register/Msr/XeonPhiMsr.h: " Eric Dong
2018-09-21  7:41 ` [Patch v2 06/14] UefiCpuPkg/Include/Register/Msr/SkylakeMsr.h: Add new MSRs Eric Dong
2018-09-21  7:41 ` [Patch v2 07/14] UefiCpuPkg/Include/Register/ArchitecturalMsr.h: Add new MSR Eric Dong
2018-09-21  7:41 ` [Patch v2 08/14] UefiCpuPkg/Include/Register/ArchitecturalMsr.h: Change structure definition Eric Dong
2018-09-21  8:44   ` Ni, Ruiyu
2018-09-21  9:41     ` Laszlo Ersek
2018-09-25  2:08       ` Dong, Eric [this message]
2018-09-21  7:41 ` [Patch v2 09/14] UefiCpuPkg/Include/Register/Msr/Core2Msr.h: Remove old MSR Eric Dong
2018-09-21  7:41 ` [Patch v2 10/14] UefiCpuPkg/Include/Register/Msr/P6Msr.h: " Eric Dong
2018-09-21  7:41 ` [Patch v2 11/14] UefiCpuPkg/Include/Register/Msr/CoreMsr.h: " Eric Dong
2018-09-21  7:41 ` [Patch v2 12/14] UefiCpuPkg/Include/Register/Msr/SkylakeMsr.h: Add new MSR name and keep old one Eric Dong
2018-09-21  7:41 ` [Patch v2 13/14] UefiCpuPkg/Include/Register/Msr/GoldmontMsr.h: " Eric Dong
2018-09-21  7:41 ` [Patch v2 14/14] UefiCpuPkg/Include/Register/Msr/XeonPhiMsr.h: Change structure definition Eric Dong
2018-09-21  8:46   ` Ni, Ruiyu

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