From mboxrd@z Thu Jan 1 00:00:00 1970 Return-Path: Received-SPF: Pass (sender SPF authorized) identity=mailfrom; client-ip=192.55.52.88; helo=mga01.intel.com; envelope-from=eric.dong@intel.com; receiver=edk2-devel@lists.01.org Received: from mga01.intel.com (mga01.intel.com [192.55.52.88]) (using TLSv1.2 with cipher ECDHE-RSA-AES256-GCM-SHA384 (256/256 bits)) (No client certificate requested) by ml01.01.org (Postfix) with ESMTPS id 893DD21184ABB for ; Tue, 6 Nov 2018 18:20:21 -0800 (PST) X-Amp-Result: SKIPPED(no attachment in message) X-Amp-File-Uploaded: False Received: from fmsmga006.fm.intel.com ([10.253.24.20]) by fmsmga101.fm.intel.com with ESMTP/TLS/DHE-RSA-AES256-GCM-SHA384; 06 Nov 2018 18:20:20 -0800 X-ExtLoop1: 1 X-IronPort-AV: E=Sophos;i="5.54,474,1534834800"; d="scan'208";a="278936842" Received: from fmsmsx107.amr.corp.intel.com ([10.18.124.205]) by fmsmga006.fm.intel.com with ESMTP; 06 Nov 2018 18:20:19 -0800 Received: from FMSMSX109.amr.corp.intel.com (10.18.116.9) by fmsmsx107.amr.corp.intel.com (10.18.124.205) with Microsoft SMTP Server (TLS) id 14.3.408.0; Tue, 6 Nov 2018 18:20:17 -0800 Received: from shsmsx152.ccr.corp.intel.com (10.239.6.52) by fmsmsx109.amr.corp.intel.com (10.18.116.9) with Microsoft SMTP Server (TLS) id 14.3.408.0; Tue, 6 Nov 2018 18:20:15 -0800 Received: from shsmsx102.ccr.corp.intel.com ([169.254.2.84]) by SHSMSX152.ccr.corp.intel.com ([169.254.6.214]) with mapi id 14.03.0415.000; Wed, 7 Nov 2018 10:19:41 +0800 From: "Dong, Eric" To: "Ni, Ruiyu" , "edk2-devel@lists.01.org" CC: Laszlo Ersek Thread-Topic: [PATCH] UefiCpuPkg/CommonFeature: Skip locking when the feature is disabled Thread-Index: AQHUda/Ouq4yN/VzG0SmHzX2d2Cfy6VDlMAw Date: Wed, 7 Nov 2018 02:19:41 +0000 Message-ID: References: <20181106090620.126784-1-ruiyu.ni@intel.com> In-Reply-To: <20181106090620.126784-1-ruiyu.ni@intel.com> Accept-Language: en-US X-MS-Has-Attach: X-MS-TNEF-Correlator: x-originating-ip: [10.239.127.40] MIME-Version: 1.0 Subject: Re: [PATCH] UefiCpuPkg/CommonFeature: Skip locking when the feature is disabled X-BeenThere: edk2-devel@lists.01.org X-Mailman-Version: 2.1.29 Precedence: list List-Id: EDK II Development List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , X-List-Received-Date: Wed, 07 Nov 2018 02:20:22 -0000 Content-Language: en-US Content-Type: text/plain; charset="us-ascii" Content-Transfer-Encoding: quoted-printable Hi Ray, I think we should add comments to mention that if the Lock bit is already s= et, driver can't disable it. So driver can directly return success if state= is FALSE. With that comments, Reviewed-by: Eric Dong Thanks, Eric > -----Original Message----- > From: Ni, Ruiyu > Sent: Tuesday, November 6, 2018 5:06 PM > To: edk2-devel@lists.01.org > Cc: Dong, Eric ; Laszlo Ersek > Subject: [PATCH] UefiCpuPkg/CommonFeature: Skip locking when the > feature is disabled >=20 > Today's code unconditionally sets the IA32_FEATURE_CONTROL.Lock to 1 no > matter the feature is enabled or not. >=20 > The patch fixes this issue by only setting the Lock bit to 1 when the fea= ture is > enabled. >=20 > Contributed-under: TianoCore Contribution Agreement 1.1 > Signed-off-by: Ruiyu Ni > Cc: Eric Dong > Cc: Laszlo Ersek > --- > UefiCpuPkg/Library/CpuCommonFeaturesLib/FeatureControl.c | 10 > +++++++++- > 1 file changed, 9 insertions(+), 1 deletion(-) >=20 > diff --git a/UefiCpuPkg/Library/CpuCommonFeaturesLib/FeatureControl.c > b/UefiCpuPkg/Library/CpuCommonFeaturesLib/FeatureControl.c > index 8c1eb5eb4f..0b85f25f90 100644 > --- a/UefiCpuPkg/Library/CpuCommonFeaturesLib/FeatureControl.c > +++ b/UefiCpuPkg/Library/CpuCommonFeaturesLib/FeatureControl.c > @@ -1,7 +1,7 @@ > /** @file > Features in MSR_IA32_FEATURE_CONTROL register. >=20 > - Copyright (c) 2017, Intel Corporation. All rights reserved.
> + Copyright (c) 2017 - 2018, Intel Corporation. All rights > + reserved.
> This program and the accompanying materials > are licensed and made available under the terms and conditions of the = BSD > License > which accompanies this distribution. The full text of the license may= be > found at @@ -184,6 +184,14 @@ LockFeatureControlRegisterInitialize ( { > MSR_IA32_FEATURE_CONTROL_REGISTER *MsrRegister; >=20 > + // > + // When Lock Feature Control Register feature is disabled, // just > + skip the MSR lock bit setting. > + // > + if (!State) { > + return RETURN_SUCCESS; > + } > + > // > // The scope of Lock bit in the MSR_IA32_FEATURE_CONTROL is core for > // below processor type, only program MSR_IA32_FEATURE_CONTROL for > thread 0 in each > -- > 2.16.1.windows.1