From: eric.dong@intel.com
To: "Ni, Ray" <ray.ni@intel.com>,
"devel@edk2.groups.io" <devel@edk2.groups.io>
Cc: "Zeng, Star" <star.zeng@intel.com>,
"Qin, Zhiqiang" <zhiqiang.qin@intel.com>
Subject: Re: [PATCH v2 1/2] UefiCpuPkg/Cpuid.h: Remove duplicated struct definition for leaf 1FH
Date: Thu, 4 Apr 2019 06:23:58 +0000 [thread overview]
Message-ID: <ED077930C258884BBCB450DB737E662259DFB02C@shsmsx102.ccr.corp.intel.com> (raw)
In-Reply-To: <20190404060306.168500-2-ray.ni@intel.com>
Reviewed-by: Eric Dong <eric.dong@intel.com>
> -----Original Message-----
> From: Ni, Ray
> Sent: Thursday, April 4, 2019 2:03 PM
> To: devel@edk2.groups.io
> Cc: Dong, Eric <eric.dong@intel.com>; Zeng, Star <star.zeng@intel.com>; Qin,
> Zhiqiang <zhiqiang.qin@intel.com>
> Subject: [PATCH v2 1/2] UefiCpuPkg/Cpuid.h: Remove duplicated struct
> definition for leaf 1FH
>
> Per SDM CPUID.0BH and CPUID.1FH outputs the same format of data in
> EAX/EBX/ECX/EDX except CPUID.1FH reports more level types such as
> module, tile, die.
>
> The patch removes the unnecessary duplicated structure definitions for
> CPUID.1FH because when the structure definitions for CPUID.0BH can be
> used for CPUID.1FH.
>
> Contributed-under: TianoCore Contribution Agreement 1.1
> Signed-off-by: Ray Ni <ray.ni@intel.com>
> Cc: Eric Dong <eric.dong@intel.com>
> Cc: Star Zeng <star.zeng@intel.com>
> Cc: Zhiqiang Qin <zhiqiang.qin@intel.com>
> ---
> UefiCpuPkg/Application/Cpuid/Cpuid.c | 24 ++---
> UefiCpuPkg/Include/Register/Cpuid.h | 126 ++-------------------------
> 2 files changed, 20 insertions(+), 130 deletions(-)
>
> diff --git a/UefiCpuPkg/Application/Cpuid/Cpuid.c
> b/UefiCpuPkg/Application/Cpuid/Cpuid.c
> index 67cacf2714..d229ac8e7b 100644
> --- a/UefiCpuPkg/Application/Cpuid/Cpuid.c
> +++ b/UefiCpuPkg/Application/Cpuid/Cpuid.c
> @@ -1,7 +1,7 @@
> /** @file
> UEFI Application to display CPUID leaf information.
>
> - Copyright (c) 2016 - 2018, Intel Corporation. All rights reserved.<BR>
> + Copyright (c) 2016 - 2019, Intel Corporation. All rights
> + reserved.<BR>
> This program and the accompanying materials
> are licensed and made available under the terms and conditions of the BSD
> License
> which accompanies this distribution. The full text of the license may be
> found at @@ -1394,26 +1394,26 @@ CpuidV2ExtendedTopologyEnumeration
> (
> VOID
> )
> {
> - CPUID_V2_EXTENDED_TOPOLOGY_ENUMERATION_EAX Eax;
> - CPUID_V2_EXTENDED_TOPOLOGY_ENUMERATION_EBX Ebx;
> - CPUID_V2_EXTENDED_TOPOLOGY_ENUMERATION_ECX Ecx;
> - UINT32 Edx;
> + CPUID_EXTENDED_TOPOLOGY_EAX Eax;
> + CPUID_EXTENDED_TOPOLOGY_EBX Ebx;
> + CPUID_EXTENDED_TOPOLOGY_ECX Ecx;
> + UINT32 Edx;
>
> - if (CPUID_V2_EXTENDED_TOPOLOGY_ENUMERATION >
> gMaximumBasicFunction) {
> + if (CPUID_V2_EXTENDED_TOPOLOGY > gMaximumBasicFunction) {
> return;
> }
>
> AsmCpuidEx (
> - CPUID_V2_EXTENDED_TOPOLOGY_ENUMERATION,
> - CPUID_V2_EXTENDED_TOPOLOGY_ENUMERATION_MAIN_LEAF,
> + CPUID_V2_EXTENDED_TOPOLOGY,
> + 0,
> &Eax.Uint32, &Ebx.Uint32, &Ecx.Uint32, &Edx
> );
> - Print (L"CPUID_V2_EXTENDED_TOPOLOGY_ENUMERATION (Leaf %08x,
> Sub-Leaf %08x)\n", CPUID_V2_EXTENDED_TOPOLOGY_ENUMERATION,
> CPUID_V2_EXTENDED_TOPOLOGY_ENUMERATION_MAIN_LEAF);
> + Print (L"CPUID_V2_EXTENDED_TOPOLOGY (Leaf %08x, Sub-Leaf %08x)\n",
> + CPUID_V2_EXTENDED_TOPOLOGY, 0);
> Print (L" EAX:%08x EBX:%08x ECX:%08x EDX:%08x\n", Eax.Uint32,
> Ebx.Uint32, Ecx.Uint32, Edx);
>
> - PRINT_BIT_FIELD (Eax, BitsNum);
> - PRINT_BIT_FIELD (Ebx, ProcessorsNum);
> - PRINT_BIT_FIELD (Ecx, LevelNum);
> + PRINT_BIT_FIELD (Eax, ApicIdShift);
> + PRINT_BIT_FIELD (Ebx, LogicalProcessors); PRINT_BIT_FIELD (Ecx,
> + LevelNumber);
> PRINT_BIT_FIELD (Ecx, LevelType);
> PRINT_VALUE (Edx, x2APICID);
> }
> diff --git a/UefiCpuPkg/Include/Register/Cpuid.h
> b/UefiCpuPkg/Include/Register/Cpuid.h
> index fab199b6e2..e0f4f968f4 100644
> --- a/UefiCpuPkg/Include/Register/Cpuid.h
> +++ b/UefiCpuPkg/Include/Register/Cpuid.h
> @@ -6,7 +6,7 @@
> If a register returned is a single 32-bit value, then a data structure is
> not provided for that register.
>
> - Copyright (c) 2015 - 2018, Intel Corporation. All rights reserved.<BR>
> + Copyright (c) 2015 - 2019, Intel Corporation. All rights
> + reserved.<BR>
> This program and the accompanying materials are licensed and made
> available under
> the terms and conditions of the BSD License which accompanies this
> distribution.
> The full text of the license may be found at @@ -3620,130 +3620,20 @@
> typedef union {
> number of logical processors available to BIOS/OS/Applications may be
> different from the
> value of EBX[15:0], depending on software and platform hardware
> configurations.
>
> - @param EAX CPUID_V2_EXTENDED_TOPOLOGY_ENUMERATION
> (0x1F)
> - @param ECX
> CPUID_V2_EXTENDED_TOPOLOGY_ENUMERATION_MAIN_LEAF (0x0)
> -
> -**/
> -#define CPUID_V2_EXTENDED_TOPOLOGY_ENUMERATION
> 0x1F
> -
> -/**
> - CPUID V2 Extended Topology Enumeration Leaf
> -
> - @param EAX CPUID_V2_EXTENDED_TOPOLOGY_ENUMERATION
> (0x1F)
> - @param ECX
> CPUID_V2_EXTENDED_TOPOLOGY_ENUMERATION_MAIN_LEAF (0x00)
> -
> - @retval EAX Returns V2 Extended Topology Enumeration Leaf described
> by
> - the type CPUID_V2_EXTENDED_TOPOLOGY_ENUMERATION_EAX.
> - @retval EBX Returns V2 Extended Topology Enumeration Leaf described
> by
> - the type CPUID_V2_EXTENDED_TOPOLOGY_ENUMERATION_EBX.
> - @retval ECX Returns V2 Extended Topology Enumeration Leaf described
> by
> - the type CPUID_V2_EXTENDED_TOPOLOGY_ENUMERATION_ECX.
> - @retval EDX Returns x2APIC ID the current logical processor.
> -
> - <b>Example usage</b>
> - @code
> - CPUID_V2_EXTENDED_TOPOLOGY_ENUMERATION_EAX Eax;
> - CPUID_V2_EXTENDED_TOPOLOGY_ENUMERATION_EBX Ebx;
> - CPUID_V2_EXTENDED_TOPOLOGY_ENUMERATION_ECX Ecx;
> - UINT32 Edx;
> -
> - AsmCpuidEx (
> - CPUID_V2_EXTENDED_TOPOLOGY_ENUMERATION,
> - CPUID_V2_EXTENDED_TOPOLOGY_ENUMERATION_MAIN_LEAF,
> - &Eax.Uint32, &Ebx.Uint32, &Ecx.Uint32, &Edx
> - );
> - @endcode
> -**/
> -#define CPUID_V2_EXTENDED_TOPOLOGY_ENUMERATION_MAIN_LEAF
> 0x00
> -
> -/**
> - CPUID V2 Extended Topology Enumeration Leaf EAX for CPUID leafs.
> -**/
> -typedef union {
> - ///
> - /// Individual bit fields
> - ///
> - struct {
> - ///
> - /// [Bits 4:0] Number of bits to shift right on x2APIC ID to get a unique
> - /// topology ID of the next level type. All logical processors with the
> - /// same next level ID share current level.
> - ///
> - UINT32 BitsNum:5;
> - ///
> - /// [Bits 31:5] Reserved.
> - ///
> - UINT32 Reserved:27;
> - } Bits;
> - ///
> - /// All bit fields as a 32-bit value
> - ///
> - UINT32 Uint32;
> -} CPUID_V2_EXTENDED_TOPOLOGY_ENUMERATION_EAX;
> -
> -/**
> - CPUID V2 Extended Topology Enumeration Leaf EBX for CPUID leafs.
> -**/
> -typedef union {
> - ///
> - /// Individual bit fields
> - ///
> - struct {
> - ///
> - /// [Bits 15:0] Number of logical processors at this level type. The number
> - /// reflects configuration as shipped by Intel.
> - ///
> - UINT32 ProcessorsNum:16;
> - ///
> - /// [Bits 31:5] Reserved.
> - ///
> - UINT32 Reserved:16;
> - } Bits;
> - ///
> - /// All bit fields as a 32-bit value
> - ///
> - UINT32 Uint32;
> -} CPUID_V2_EXTENDED_TOPOLOGY_ENUMERATION_EBX;
> + @param EAX CPUID_V2_EXTENDED_TOPOLOGY (0x1F)
> + @param ECX Level number
>
> -/**
> - CPUID V2 Extended Topology Enumeration Leaf ECX for CPUID leafs.
> **/
> -typedef union {
> - ///
> - /// Individual bit fields
> - ///
> - struct {
> - ///
> - /// [Bits 7:0] Level number. Same value in ECX input.
> - ///
> - UINT32 LevelNum:8;
> - ///
> - /// [Bits 7:0] Level type.
> - ///
> - UINT32 LevelType:8;
> -
> - ///
> - /// [Bits 31:5] Reserved.
> - ///
> - UINT32 Reserved:16;
> - } Bits;
> - ///
> - /// All bit fields as a 32-bit value
> - ///
> - UINT32 Uint32;
> -} CPUID_V2_EXTENDED_TOPOLOGY_ENUMERATION_ECX;
> +#define CPUID_V2_EXTENDED_TOPOLOGY 0x1F
>
> ///
> -/// @{ Define value for
> CPUID_V2_EXTENDED_TOPOLOGY_ENUMERATION_ECX.LevelType
> +/// @{ Define value for CPUID_EXTENDED_TOPOLOGY_ECX.LevelType
> /// The value of the "level type" field is not related to level numbers in ///
> any way, higher "level type" values do not mean higher levels.
> ///
> -#define
> CPUID_V2_EXTENDED_TOPOLOGY_ENUMERATION_LEVEL_TYPE_INVALID
> 0x00
> -#define
> CPUID_V2_EXTENDED_TOPOLOGY_ENUMERATION_LEVEL_TYPE_SMT
> 0x01
> -#define
> CPUID_V2_EXTENDED_TOPOLOGY_ENUMERATION_LEVEL_TYPE_CORE
> 0x02
> -#define
> CPUID_V2_EXTENDED_TOPOLOGY_ENUMERATION_LEVEL_TYPE_MODULE
> 0x03
> -#define
> CPUID_V2_EXTENDED_TOPOLOGY_ENUMERATION_LEVEL_TYPE_TILE
> 0x04
> -#define
> CPUID_V2_EXTENDED_TOPOLOGY_ENUMERATION_LEVEL_TYPE_DIE
> 0x05
> +#define CPUID_V2_EXTENDED_TOPOLOGY_LEVEL_TYPE_MODULE
> 0x03
> +#define CPUID_V2_EXTENDED_TOPOLOGY_LEVEL_TYPE_TILE
> 0x04
> +#define CPUID_V2_EXTENDED_TOPOLOGY_LEVEL_TYPE_DIE
> 0x05
> ///
> /// @}
> ///
> --
> 2.21.0.windows.1
next prev parent reply other threads:[~2019-04-04 6:24 UTC|newest]
Thread overview: 5+ messages / expand[flat|nested] mbox.gz Atom feed top
2019-04-04 6:03 [PATCH v2 0/2] Dump CPUID.1FH information correctly Ni, Ray
2019-04-04 6:03 ` [PATCH v2 1/2] UefiCpuPkg/Cpuid.h: Remove duplicated struct definition for leaf 1FH Ni, Ray
2019-04-04 6:23 ` eric.dong [this message]
2019-04-04 6:03 ` [PATCH v2 2/2] UefiCpuPkg/Cpuid: Dump leaf 1FH information correctly Ni, Ray
2019-04-04 6:24 ` [edk2-devel] " Dong, Eric
Reply instructions:
You may reply publicly to this message via plain-text email
using any one of the following methods:
* Save the following mbox file, import it into your mail client,
and reply-to-list from there: mbox
Avoid top-posting and favor interleaved quoting:
https://en.wikipedia.org/wiki/Posting_style#Interleaved_style
* Reply using the --to, --cc, and --in-reply-to
switches of git-send-email(1):
git send-email \
--in-reply-to=ED077930C258884BBCB450DB737E662259DFB02C@shsmsx102.ccr.corp.intel.com \
--to=devel@edk2.groups.io \
/path/to/YOUR_REPLY
https://kernel.org/pub/software/scm/git/docs/git-send-email.html
* If your mail client supports setting the In-Reply-To header
via mailto: links, try the mailto: link
Be sure your reply has a Subject: header at the top and a blank line
before the message body.
This is a public inbox, see mirroring instructions
for how to clone and mirror all data and code used for this inbox