From mboxrd@z Thu Jan 1 00:00:00 1970 Authentication-Results: mx.groups.io; dkim=missing; spf=pass (domain: intel.com, ip: 134.134.136.31, mailfrom: eric.dong@intel.com) Received: from mga06.intel.com (mga06.intel.com [134.134.136.31]) by groups.io with SMTP; Tue, 25 Jun 2019 17:48:09 -0700 X-Amp-Result: SKIPPED(no attachment in message) X-Amp-File-Uploaded: False Received: from fmsmga006.fm.intel.com ([10.253.24.20]) by orsmga104.jf.intel.com with ESMTP/TLS/DHE-RSA-AES256-GCM-SHA384; 25 Jun 2019 17:48:08 -0700 X-ExtLoop1: 1 X-IronPort-AV: E=Sophos;i="5.63,417,1557212400"; d="scan'208";a="360572098" Received: from fmsmsx105.amr.corp.intel.com ([10.18.124.203]) by fmsmga006.fm.intel.com with ESMTP; 25 Jun 2019 17:48:08 -0700 Received: from fmsmsx117.amr.corp.intel.com (10.18.116.17) by FMSMSX105.amr.corp.intel.com (10.18.124.203) with Microsoft SMTP Server (TLS) id 14.3.439.0; Tue, 25 Jun 2019 17:48:08 -0700 Received: from shsmsx108.ccr.corp.intel.com (10.239.4.97) by fmsmsx117.amr.corp.intel.com (10.18.116.17) with Microsoft SMTP Server (TLS) id 14.3.439.0; Tue, 25 Jun 2019 17:48:08 -0700 Received: from shsmsx102.ccr.corp.intel.com ([169.254.2.33]) by SHSMSX108.ccr.corp.intel.com ([169.254.8.236]) with mapi id 14.03.0439.000; Wed, 26 Jun 2019 08:48:06 +0800 From: "Dong, Eric" To: "Gao, Zhichao" , "devel@edk2.groups.io" CC: "Ni, Ray" , Laszlo Ersek , "Gao, Liming" Subject: Re: [PATCH V2] UefiCpuPkg/MpInitLib: MicrocodeDetect: Ensure checked range is valid Thread-Topic: [PATCH V2] UefiCpuPkg/MpInitLib: MicrocodeDetect: Ensure checked range is valid Thread-Index: AQHVK2jjULqZ9GU+TEaeyNUWtHhRiaatGhPg Date: Wed, 26 Jun 2019 00:48:05 +0000 Message-ID: References: <20190625151541.28632-1-zhichao.gao@intel.com> In-Reply-To: <20190625151541.28632-1-zhichao.gao@intel.com> Accept-Language: en-US X-MS-Has-Attach: X-MS-TNEF-Correlator: x-originating-ip: [10.239.127.40] MIME-Version: 1.0 Return-Path: eric.dong@intel.com Content-Language: en-US Content-Type: text/plain; charset="us-ascii" Content-Transfer-Encoding: quoted-printable Hi Zhichao, Reviewed-by: Eric Dong It's better to add some comments in the code to explain the change which ma= ke the code easy to be understood. Thanks, Eric > -----Original Message----- > From: Gao, Zhichao > Sent: Tuesday, June 25, 2019 11:16 PM > To: devel@edk2.groups.io > Cc: Dong, Eric ; Ni, Ray ; Laszlo > Ersek ; Gao, Liming > Subject: [PATCH V2] UefiCpuPkg/MpInitLib: MicrocodeDetect: Ensure > checked range is valid >=20 > REF: https://bugzilla.tianocore.org/show_bug.cgi?id=3D1934 >=20 > V1: > Originally, the checksum part would done before verfiy the microcode data= . > Which meas the checksum would be done for a meaningless data. > It would cause a incorrect TotalSize (the size of microcode data), then > incorrect checksum and incorrect pointer increasing would happen. > To fix this, move the checksum part 1 section in 'if (MicrocodeEntryPoint= - > >HeaderVersion =3D=3D 0x1)' section for a valid microcode data. >=20 > V2: > 'if (MicrocodeEntryPoint->HeaderVersion =3D=3D 0x1)' condition doesn't ma= ke > sure the entry data is a valid microcode. So abandon it. Instead, make su= re > the checked data is in the microcode data range. Because the DataSize of = non > microcde data may make (MicrocodeEntryPoint + TotalSize) larger than > 0xffffffff. For PEI driver, UINTN is 32bit and the result is overflow and= it may > be a very small value. That means the checksum check would be done out of > the microcode range. >=20 > Cc: Eric Dong > Cc: Ray Ni > Cc: Laszlo Ersek > Cc: Liming Gao > Signed-off-by: Zhichao Gao > --- > UefiCpuPkg/Library/MpInitLib/Microcode.c | 3 ++- > 1 file changed, 2 insertions(+), 1 deletion(-) >=20 > diff --git a/UefiCpuPkg/Library/MpInitLib/Microcode.c > b/UefiCpuPkg/Library/MpInitLib/Microcode.c > index 4763dcfebe..6c0995cb0d 100644 > --- a/UefiCpuPkg/Library/MpInitLib/Microcode.c > +++ b/UefiCpuPkg/Library/MpInitLib/Microcode.c > @@ -1,7 +1,7 @@ > /** @file > Implementation of loading microcode on processors. >=20 > - Copyright (c) 2015 - 2018, Intel Corporation. All rights reserved.
> + Copyright (c) 2015 - 2019, Intel Corporation. All rights > + reserved.
> SPDX-License-Identifier: BSD-2-Clause-Patent >=20 > **/ > @@ -170,6 +170,7 @@ MicrocodeDetect ( > /// Check overflow and whether TotalSize is aligned with 4 bytes. > /// > if ( ((UINTN)MicrocodeEntryPoint + TotalSize) > MicrocodeEnd || > + ((UINTN)MicrocodeEntryPoint + TotalSize) < (UINTN) > + CpuMpData->MicrocodePatchAddress || > (TotalSize & 0x3) !=3D 0 > ) { > MicrocodeEntryPoint =3D (CPU_MICROCODE_HEADER *) (((UINTN) > MicrocodeEntryPoint) + SIZE_1KB); > -- > 2.21.0.windows.1