From mboxrd@z Thu Jan 1 00:00:00 1970 Authentication-Results: mx.groups.io; dkim=missing; spf=pass (domain: intel.com, ip: 192.55.52.88, mailfrom: eric.dong@intel.com) Received: from mga01.intel.com (mga01.intel.com [192.55.52.88]) by groups.io with SMTP; Mon, 08 Jul 2019 18:04:44 -0700 X-Amp-Result: SKIPPED(no attachment in message) X-Amp-File-Uploaded: False Received: from fmsmga005.fm.intel.com ([10.253.24.32]) by fmsmga101.fm.intel.com with ESMTP/TLS/DHE-RSA-AES256-GCM-SHA384; 08 Jul 2019 18:04:44 -0700 X-ExtLoop1: 1 X-IronPort-AV: E=Sophos;i="5.63,468,1557212400"; d="scan'208";a="363976527" Received: from fmsmsx107.amr.corp.intel.com ([10.18.124.205]) by fmsmga005.fm.intel.com with ESMTP; 08 Jul 2019 18:04:44 -0700 Received: from fmsmsx113.amr.corp.intel.com (10.18.116.7) by fmsmsx107.amr.corp.intel.com (10.18.124.205) with Microsoft SMTP Server (TLS) id 14.3.439.0; Mon, 8 Jul 2019 18:04:44 -0700 Received: from shsmsx107.ccr.corp.intel.com (10.239.4.96) by FMSMSX113.amr.corp.intel.com (10.18.116.7) with Microsoft SMTP Server (TLS) id 14.3.439.0; Mon, 8 Jul 2019 18:04:43 -0700 Received: from shsmsx102.ccr.corp.intel.com ([169.254.2.3]) by SHSMSX107.ccr.corp.intel.com ([169.254.9.162]) with mapi id 14.03.0439.000; Tue, 9 Jul 2019 09:04:42 +0800 From: "Dong, Eric" To: "Ni, Ray" , "devel@edk2.groups.io" CC: Laszlo Ersek Subject: Re: [PATCH v2 2/3] MdePkg/BaseLib.h: Update IA32_CR4 structure for 5-level paging Thread-Topic: [PATCH v2 2/3] MdePkg/BaseLib.h: Update IA32_CR4 structure for 5-level paging Thread-Index: AQHVMWw7Y8JzUPbuwEeuz+s6JMI35qbBgacw Date: Tue, 9 Jul 2019 01:04:41 +0000 Message-ID: References: <20190703065416.116816-1-ray.ni@intel.com> <20190703065416.116816-3-ray.ni@intel.com> In-Reply-To: <20190703065416.116816-3-ray.ni@intel.com> Accept-Language: en-US X-MS-Has-Attach: X-MS-TNEF-Correlator: x-originating-ip: [10.239.127.40] MIME-Version: 1.0 Return-Path: eric.dong@intel.com Content-Language: en-US Content-Type: text/plain; charset="us-ascii" Content-Transfer-Encoding: quoted-printable Reviewed-by: Eric Dong > -----Original Message----- > From: Ni, Ray > Sent: Wednesday, July 3, 2019 2:54 PM > To: devel@edk2.groups.io > Cc: Dong, Eric ; Laszlo Ersek > Subject: [PATCH v2 2/3] MdePkg/BaseLib.h: Update IA32_CR4 structure for > 5-level paging >=20 > 5-level paging is documented in white paper: > https://software.intel.com/sites/default/files/managed/2b/80/5- > level_paging_white_paper.pdf >=20 > Commit f8113e25001e715390127f23e2197252cbd6d1a2 > changed Cpuid.h already. >=20 > This patch updates IA32_CR4 structure to include LA57 field. >=20 > Signed-off-by: Ray Ni > Cc: Eric Dong > Regression-tested-by: Laszlo Ersek > --- > MdePkg/Include/Library/BaseLib.h | 3 ++- > 1 file changed, 2 insertions(+), 1 deletion(-) >=20 > diff --git a/MdePkg/Include/Library/BaseLib.h > b/MdePkg/Include/Library/BaseLib.h > index ebd7dd274c..a22bfc9fad 100644 > --- a/MdePkg/Include/Library/BaseLib.h > +++ b/MdePkg/Include/Library/BaseLib.h > @@ -5324,7 +5324,8 @@ typedef union { > UINT32 OSXMMEXCPT:1; ///< Operating System Support for > ///< Unmasked SIMD Floating Point > ///< Exceptions. > - UINT32 Reserved_0:2; ///< Reserved. > + UINT32 Reserved_2:1; ///< Reserved. > + UINT32 LA57:1; ///< Linear Address 57bit. > UINT32 VMXE:1; ///< VMX Enable > UINT32 Reserved_1:18; ///< Reserved. > } Bits; > -- > 2.21.0.windows.1