From mboxrd@z Thu Jan 1 00:00:00 1970 Authentication-Results: mx.groups.io; dkim=missing; spf=pass (domain: intel.com, ip: 192.55.52.136, mailfrom: eric.dong@intel.com) Received: from mga12.intel.com (mga12.intel.com [192.55.52.136]) by groups.io with SMTP; Mon, 29 Jul 2019 04:33:09 -0700 X-Amp-Result: SKIPPED(no attachment in message) X-Amp-File-Uploaded: False Received: from fmsmga007.fm.intel.com ([10.253.24.52]) by fmsmga106.fm.intel.com with ESMTP/TLS/DHE-RSA-AES256-GCM-SHA384; 29 Jul 2019 04:33:09 -0700 X-ExtLoop1: 1 X-IronPort-AV: E=Sophos;i="5.64,322,1559545200"; d="scan'208";a="173200162" Received: from fmsmsx107.amr.corp.intel.com ([10.18.124.205]) by fmsmga007.fm.intel.com with ESMTP; 29 Jul 2019 04:33:09 -0700 Received: from fmsmsx607.amr.corp.intel.com (10.18.126.87) by fmsmsx107.amr.corp.intel.com (10.18.124.205) with Microsoft SMTP Server (TLS) id 14.3.439.0; Mon, 29 Jul 2019 04:33:09 -0700 Received: from fmsmsx607.amr.corp.intel.com (10.18.126.87) by fmsmsx607.amr.corp.intel.com (10.18.126.87) with Microsoft SMTP Server (version=TLS1_2, cipher=TLS_ECDHE_RSA_WITH_AES_128_GCM_SHA256) id 15.1.1713.5; Mon, 29 Jul 2019 04:33:08 -0700 Received: from shsmsx151.ccr.corp.intel.com (10.239.6.50) by fmsmsx607.amr.corp.intel.com (10.18.126.87) with Microsoft SMTP Server (version=TLS1_2, cipher=TLS_ECDHE_RSA_WITH_AES_128_CBC_SHA256) id 15.1.1713.5 via Frontend Transport; Mon, 29 Jul 2019 04:33:08 -0700 Received: from shsmsx102.ccr.corp.intel.com ([169.254.2.19]) by SHSMSX151.ccr.corp.intel.com ([169.254.3.250]) with mapi id 14.03.0439.000; Mon, 29 Jul 2019 19:33:06 +0800 From: "Dong, Eric" To: "devel@edk2.groups.io" , "Ni, Ray" CC: Laszlo Ersek Subject: Re: [edk2-devel] [PATCH 1/3] UefiCpuPkg/PiSmmCpu: Add Internal function IsStaticPageTableEnabled Thread-Topic: [edk2-devel] [PATCH 1/3] UefiCpuPkg/PiSmmCpu: Add Internal function IsStaticPageTableEnabled Thread-Index: AQHVRCuE2cihgJUOokW6kc7gOQgo9qbhekbQ Date: Mon, 29 Jul 2019 11:33:06 +0000 Message-ID: References: <20190727032850.337840-1-ray.ni@intel.com> <20190727032850.337840-2-ray.ni@intel.com> In-Reply-To: <20190727032850.337840-2-ray.ni@intel.com> Accept-Language: en-US X-MS-Has-Attach: X-MS-TNEF-Correlator: x-originating-ip: [10.239.127.40] MIME-Version: 1.0 Return-Path: eric.dong@intel.com Content-Language: en-US Content-Type: text/plain; charset="us-ascii" Content-Transfer-Encoding: quoted-printable Reviewed-by: Eric Dong > -----Original Message----- > From: devel@edk2.groups.io [mailto:devel@edk2.groups.io] On Behalf Of Ni= , > Ray > Sent: Saturday, July 27, 2019 11:29 AM > To: devel@edk2.groups.io > Cc: Laszlo Ersek > Subject: [edk2-devel] [PATCH 1/3] UefiCpuPkg/PiSmmCpu: Add Internal > function IsStaticPageTableEnabled >=20 > The internal function reflects the status whether static page table is e= nabled. >=20 > Signed-off-by: Ray Ni > Cc: Laszlo Ersek > Cc: Eric Dong --- > UefiCpuPkg/PiSmmCpuDxeSmm/Ia32/PageTbl.c | 16 ++++++++++++++++ > UefiCpuPkg/PiSmmCpuDxeSmm/PiSmmCpuDxeSmm.h | 15 > +++++++++++++++ > UefiCpuPkg/PiSmmCpuDxeSmm/X64/PageTbl.c | 16 ++++++++++++++++ > 3 files changed, 47 insertions(+) >=20 > diff --git a/UefiCpuPkg/PiSmmCpuDxeSmm/Ia32/PageTbl.c > b/UefiCpuPkg/PiSmmCpuDxeSmm/Ia32/PageTbl.c > index 05fb455936..2a9af4b77d 100644 > --- a/UefiCpuPkg/PiSmmCpuDxeSmm/Ia32/PageTbl.c > +++ b/UefiCpuPkg/PiSmmCpuDxeSmm/Ia32/PageTbl.c > @@ -28,6 +28,22 @@ EnableCet ( > VOID > ); >=20 > +/** > + Return whether Static Page Table is enabled. > + > + Note: Static Page Table is always disabled for IA32 build. > + > + @retval TRUE Static Page Table is enabled. > + @retval FALSE Static Page Table is disabled. > +**/ > +BOOLEAN > +IsStaticPageTableEnabled ( > + VOID > + ) > +{ > + return FALSE; > +} > + > /** > Create PageTable for SMM use. >=20 > diff --git a/UefiCpuPkg/PiSmmCpuDxeSmm/PiSmmCpuDxeSmm.h > b/UefiCpuPkg/PiSmmCpuDxeSmm/PiSmmCpuDxeSmm.h > index 186809f431..14b7676c16 100644 > --- a/UefiCpuPkg/PiSmmCpuDxeSmm/PiSmmCpuDxeSmm.h > +++ b/UefiCpuPkg/PiSmmCpuDxeSmm/PiSmmCpuDxeSmm.h > @@ -1267,6 +1267,21 @@ EFIAPI > PiSmmCpuSmiEntryFixupAddress ( > ); >=20 > + > +/** > + Return whether Static Page Table is enabled. > + > + Note: Static Page Table is always disabled for IA32 build. > + > + @retval TRUE Static Page Table is enabled. > + @retval FALSE Static Page Table is disabled. > +**/ > +BOOLEAN > +IsStaticPageTableEnabled ( > + VOID > + ) > +; > + > /** > This function reads CR2 register when on-demand paging is enabled > for 64 bit and no action for 32 bit. > diff --git a/UefiCpuPkg/PiSmmCpuDxeSmm/X64/PageTbl.c > b/UefiCpuPkg/PiSmmCpuDxeSmm/X64/PageTbl.c > index a3b62f7787..18e3f9e08d 100644 > --- a/UefiCpuPkg/PiSmmCpuDxeSmm/X64/PageTbl.c > +++ b/UefiCpuPkg/PiSmmCpuDxeSmm/X64/PageTbl.c > @@ -37,6 +37,22 @@ EnableCet ( > VOID > ); >=20 > +/** > + Return whether Static Page Table is enabled. > + > + Note: Static Page Table is always disabled for IA32 build. > + > + @retval TRUE Static Page Table is enabled. > + @retval FALSE Static Page Table is disabled. > +**/ > +BOOLEAN > +IsStaticPageTableEnabled ( > + VOID > + ) > +{ > + return mCpuSmmStaticPageTable; > +} > + > /** > Check if 1-GByte pages is supported by processor or not. >=20 > -- > 2.21.0.windows.1 >=20 >=20 >=20