From mboxrd@z Thu Jan 1 00:00:00 1970 Authentication-Results: mx.groups.io; dkim=missing; spf=pass (domain: intel.com, ip: 134.134.136.100, mailfrom: eric.dong@intel.com) Received: from mga07.intel.com (mga07.intel.com [134.134.136.100]) by groups.io with SMTP; Mon, 29 Jul 2019 06:15:04 -0700 X-Amp-Result: SKIPPED(no attachment in message) X-Amp-File-Uploaded: False Received: from fmsmga007.fm.intel.com ([10.253.24.52]) by orsmga105.jf.intel.com with ESMTP/TLS/DHE-RSA-AES256-GCM-SHA384; 29 Jul 2019 04:33:43 -0700 X-ExtLoop1: 1 X-IronPort-AV: E=Sophos;i="5.64,322,1559545200"; d="scan'208";a="173200235" Received: from fmsmsx103.amr.corp.intel.com ([10.18.124.201]) by fmsmga007.fm.intel.com with ESMTP; 29 Jul 2019 04:33:43 -0700 Received: from fmsmsx102.amr.corp.intel.com (10.18.124.200) by FMSMSX103.amr.corp.intel.com (10.18.124.201) with Microsoft SMTP Server (TLS) id 14.3.439.0; Mon, 29 Jul 2019 04:33:43 -0700 Received: from shsmsx104.ccr.corp.intel.com (10.239.4.70) by FMSMSX102.amr.corp.intel.com (10.18.124.200) with Microsoft SMTP Server (TLS) id 14.3.439.0; Mon, 29 Jul 2019 04:33:42 -0700 Received: from shsmsx102.ccr.corp.intel.com ([169.254.2.19]) by SHSMSX104.ccr.corp.intel.com ([169.254.5.112]) with mapi id 14.03.0439.000; Mon, 29 Jul 2019 19:33:41 +0800 From: "Dong, Eric" To: "Ni, Ray" , "devel@edk2.groups.io" CC: Laszlo Ersek , "Vanguput, Narendra K" Subject: Re: [PATCH 2/3] UefiCpuPkg/PiSmmCpu: Refine CR2 save/restore logic Thread-Topic: [PATCH 2/3] UefiCpuPkg/PiSmmCpu: Refine CR2 save/restore logic Thread-Index: AQHVRCuCS2dnDordyEKB5MD/iO5mpqbhepSg Date: Mon, 29 Jul 2019 11:33:40 +0000 Message-ID: References: <20190727032850.337840-1-ray.ni@intel.com> <20190727032850.337840-3-ray.ni@intel.com> In-Reply-To: <20190727032850.337840-3-ray.ni@intel.com> Accept-Language: en-US X-MS-Has-Attach: X-MS-TNEF-Correlator: x-originating-ip: [10.239.127.40] MIME-Version: 1.0 Return-Path: eric.dong@intel.com Content-Language: en-US Content-Type: text/plain; charset="us-ascii" Content-Transfer-Encoding: quoted-printable Reviewed-by: Eric Dong > -----Original Message----- > From: Ni, Ray > Sent: Saturday, July 27, 2019 11:29 AM > To: devel@edk2.groups.io > Cc: Dong, Eric ; Laszlo Ersek ; > Vanguput, Narendra K > Subject: [PATCH 2/3] UefiCpuPkg/PiSmmCpu: Refine CR2 save/restore logic >=20 > Because IsStaticPageTableEnabled() is added for both IA32 and x64 build, = the > CR2 save/restore logic can be refined: > 1. Remove arch specific SaveCr2() / RestoreCr2() implementation; 2. > Conditionally save and restore CR2 in SmiRendezvous(). >=20 > Signed-off-by: Ray Ni > Cc: Eric Dong > Cc: Laszlo Ersek > Cc: Vanguput Narendra K > --- > UefiCpuPkg/PiSmmCpuDxeSmm/Ia32/PageTbl.c | 25 ------------------- > UefiCpuPkg/PiSmmCpuDxeSmm/MpService.c | 8 ++++-- > UefiCpuPkg/PiSmmCpuDxeSmm/PiSmmCpuDxeSmm.h | 22 ---------------- > UefiCpuPkg/PiSmmCpuDxeSmm/X64/PageTbl.c | 29 ---------------------- > 4 files changed, 6 insertions(+), 78 deletions(-) >=20 > diff --git a/UefiCpuPkg/PiSmmCpuDxeSmm/Ia32/PageTbl.c > b/UefiCpuPkg/PiSmmCpuDxeSmm/Ia32/PageTbl.c > index 2a9af4b77d..cae23d6d1d 100644 > --- a/UefiCpuPkg/PiSmmCpuDxeSmm/Ia32/PageTbl.c > +++ b/UefiCpuPkg/PiSmmCpuDxeSmm/Ia32/PageTbl.c > @@ -327,28 +327,3 @@ SetPageTableAttributes ( > return ; > } >=20 > -/** > - This function returns with no action for 32 bit. > - > - @param[out] *Cr2 Pointer to variable to hold CR2 register value. > -**/ > -VOID > -SaveCr2 ( > - OUT UINTN *Cr2 > - ) > -{ > - return ; > -} > - > -/** > - This function returns with no action for 32 bit. > - > - @param[in] Cr2 Value to write into CR2 register. > -**/ > -VOID > -RestoreCr2 ( > - IN UINTN Cr2 > - ) > -{ > - return ; > -} > diff --git a/UefiCpuPkg/PiSmmCpuDxeSmm/MpService.c > b/UefiCpuPkg/PiSmmCpuDxeSmm/MpService.c > index ef16997547..5d0124b368 100644 > --- a/UefiCpuPkg/PiSmmCpuDxeSmm/MpService.c > +++ b/UefiCpuPkg/PiSmmCpuDxeSmm/MpService.c > @@ -1575,7 +1575,9 @@ SmiRendezvous ( > // when using on-demand paging for above 4G memory. > // > Cr2 =3D 0; > - SaveCr2 (&Cr2); > + if (!IsStaticPageTableEnabled ()) { > + Cr2 =3D AsmReadCr2 (); > + } >=20 > // > // Call the user register Startup function first. > @@ -1725,7 +1727,9 @@ Exit: > // > // Restore Cr2 > // > - RestoreCr2 (Cr2); > + if (!IsStaticPageTableEnabled ()) { > + AsmWriteCr2 (Cr2); > + } > } >=20 > /** > diff --git a/UefiCpuPkg/PiSmmCpuDxeSmm/PiSmmCpuDxeSmm.h > b/UefiCpuPkg/PiSmmCpuDxeSmm/PiSmmCpuDxeSmm.h > index 14b7676c16..5a97733def 100644 > --- a/UefiCpuPkg/PiSmmCpuDxeSmm/PiSmmCpuDxeSmm.h > +++ b/UefiCpuPkg/PiSmmCpuDxeSmm/PiSmmCpuDxeSmm.h > @@ -1282,28 +1282,6 @@ IsStaticPageTableEnabled ( > ) > ; >=20 > -/** > - This function reads CR2 register when on-demand paging is enabled > - for 64 bit and no action for 32 bit. > - > - @param[out] *Cr2 Pointer to variable to hold CR2 register value. > -**/ > -VOID > -SaveCr2 ( > - OUT UINTN *Cr2 > - ); > - > -/** > - This function writes into CR2 register when on-demand paging is enable= d > - for 64 bit and no action for 32 bit. > - > - @param[in] Cr2 Value to write into CR2 register. > -**/ > -VOID > -RestoreCr2 ( > - IN UINTN Cr2 > - ); > - > /** > Schedule a procedure to run on the specified CPU. >=20 > diff --git a/UefiCpuPkg/PiSmmCpuDxeSmm/X64/PageTbl.c > b/UefiCpuPkg/PiSmmCpuDxeSmm/X64/PageTbl.c > index 18e3f9e08d..8259b01a95 100644 > --- a/UefiCpuPkg/PiSmmCpuDxeSmm/X64/PageTbl.c > +++ b/UefiCpuPkg/PiSmmCpuDxeSmm/X64/PageTbl.c > @@ -1209,32 +1209,3 @@ SetPageTableAttributes ( > return ; > } >=20 > -/** > - This function reads CR2 register when on-demand paging is enabled. > - > - @param[out] *Cr2 Pointer to variable to hold CR2 register value. > -**/ > -VOID > -SaveCr2 ( > - OUT UINTN *Cr2 > - ) > -{ > - if (!mCpuSmmStaticPageTable) { > - *Cr2 =3D AsmReadCr2 (); > - } > -} > - > -/** > - This function restores CR2 register when on-demand paging is enabled. > - > - @param[in] Cr2 Value to write into CR2 register. > -**/ > -VOID > -RestoreCr2 ( > - IN UINTN Cr2 > - ) > -{ > - if (!mCpuSmmStaticPageTable) { > - AsmWriteCr2 (Cr2); > - } > -} > -- > 2.21.0.windows.1