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From: "Dong, Eric" <eric.dong@intel.com>
To: "devel@edk2.groups.io" <devel@edk2.groups.io>,
	"lersek@redhat.com" <lersek@redhat.com>
Cc: "Ni, Ray" <ray.ni@intel.com>
Subject: Re: [edk2-devel] [Patch v2 0/6] Add "test then write" mechanism.
Date: Tue, 13 Aug 2019 02:29:21 +0000	[thread overview]
Message-ID: <ED077930C258884BBCB450DB737E662259EC1106@shsmsx102.ccr.corp.intel.com> (raw)
In-Reply-To: <3d4a7318-f955-f05f-e7a2-b189b2a02246@redhat.com>

Hi Laszlo,

Yes, I already checked IA32 build.

As Ray is leaving these days, can you help to review this serial?

Thanks,
Eric

> -----Original Message-----
> From: devel@edk2.groups.io [mailto:devel@edk2.groups.io] On Behalf Of
> Laszlo Ersek
> Sent: Monday, August 12, 2019 10:15 PM
> To: Dong, Eric <eric.dong@intel.com>; devel@edk2.groups.io
> Cc: Ni, Ray <ray.ni@intel.com>
> Subject: Re: [edk2-devel] [Patch v2 0/6] Add "test then write" mechanism.
> 
> On 08/12/19 12:31, Eric Dong wrote:
> > V2 changes:
> > 1. Split CR read/write action in to one discrete patch 2. Keep the old
> > logic which continue the process if error found.
> >
> > Below code is current implementation:
> >   if (MsrRegister[ProcessorNumber].Bits.Lock == 0) {
> >     CPU_REGISTER_TABLE_WRITE_FIELD (
> >       ProcessorNumber,
> >       Msr,
> >       MSR_IA32_FEATURE_CONTROL,
> >       MSR_IA32_FEATURE_CONTROL_REGISTER,
> >       Bits.Lock,
> >       1
> >     );
> >   }
> >
> > With below steps, the Bits.Lock bit will lose its value:
> > 1. Trig normal boot, the Bits.Lock is 0. 1 will be added
> >    into the register table and then will set to the MSR.
> > 2. Trig warm reboot, MSR value preserves. After normal boot phase,
> >    the Bits.Lock is 1, so it will not be added into the register
> >    table during the warm reboot phase.
> > 3. Trig S3 then resume, the Bits.Lock change to 0 and Bits.Lock is
> >    not added in register table during normal boot phase. so it's
> >    still 0 after resume.
> > This is not an expect behavior. The expect result is the value should
> > always 1 after booting or resuming from S3.
> >
> > The root cause for this issue is
> > 1. driver bases on current value to insert the "set value action" to
> >    the register table.
> > 2. Some MSRs may reserve their value during warm reboot. So the insert
> >    action may be skip after warm reboot.
> >
> > The solution for this issue is:
> > 1. Always add "Test then Set" action for above referred MSRs.
> > 2. Detect current value before set new value. Only set new value when
> >    current value not same as new value.
> >
> > Cc: Ray Ni <ray.ni@intel.com>
> > Cc: Laszlo Ersek <lersek@redhat.com>
> >
> > Eric Dong (6):
> >   UefiCpuPkg/RegisterCpuFeaturesLib: Add "Test Then Write" Macros.
> >   UefiCpuPkg/PiSmmCpuDxeSmm: Combine CR read/write action in one
> >     function.
> >   UefiCpuPkg/PiSmmCpuDxeSmm: Supports test then write new value logic.
> >   UefiCpuPkg/RegisterCpuFeaturesLib: Combine CR read/write action in
> one
> >     function.
> >   UefiCpuPkg/RegisterCpuFeaturesLib: Supports test then write new value
> >     logic.
> >   UefiCpuPkg/CpuCommonFeaturesLib: Use new macros.
> >
> >  UefiCpuPkg/Include/AcpiCpuData.h              |   1 +
> >  .../Include/Library/RegisterCpuFeaturesLib.h  |  77 +++++++++-
> > .../CpuCommonFeaturesLib/CpuCommonFeatures.h  |  15 --
> >  .../CpuCommonFeaturesLib.c                    |   8 +-
> >  .../CpuCommonFeaturesLib/FeatureControl.c     | 141 ++++++------------
> >  .../CpuCommonFeaturesLib/MachineCheck.c       |  23 ++-
> >  .../CpuFeaturesInitialize.c                   | 141 ++++++++++++------
> >  .../RegisterCpuFeaturesLib.c                  |  14 +-
> >  UefiCpuPkg/PiSmmCpuDxeSmm/CpuS3.c             | 135 +++++++++++------
> >  9 files changed, 323 insertions(+), 232 deletions(-)
> >
> 
> Please don't forget to build-test this series for IA32 too.
> 
> Thanks
> Laszlo
> 
> 


  reply	other threads:[~2019-08-13  2:29 UTC|newest]

Thread overview: 17+ messages / expand[flat|nested]  mbox.gz  Atom feed  top
2019-08-12 10:31 [Patch v2 0/6] Add "test then write" mechanism Dong, Eric
2019-08-12 10:31 ` [Patch v2 1/6] UefiCpuPkg/RegisterCpuFeaturesLib: Add "Test Then Write" Macros Dong, Eric
2019-08-13 10:27   ` [edk2-devel] " Laszlo Ersek
2019-08-12 10:31 ` [Patch v2 2/6] UefiCpuPkg/PiSmmCpuDxeSmm: Combine CR read/write action in one function Dong, Eric
2019-08-12 14:07   ` Laszlo Ersek
2019-08-12 10:31 ` [Patch v2 3/6] UefiCpuPkg/PiSmmCpuDxeSmm: Supports test then write new value logic Dong, Eric
2019-08-12 14:13   ` Laszlo Ersek
2019-08-12 10:31 ` [Patch v2 4/6] UefiCpuPkg/RegisterCpuFeaturesLib: Combine CR read/write action in one function Dong, Eric
2019-08-13 10:28   ` [edk2-devel] " Laszlo Ersek
2019-08-12 10:31 ` [Patch v2 5/6] UefiCpuPkg/RegisterCpuFeaturesLib: Supports test then write new value logic Dong, Eric
2019-08-13 10:28   ` [edk2-devel] " Laszlo Ersek
2019-08-12 10:31 ` [Patch v2 6/6] UefiCpuPkg/CpuCommonFeaturesLib: Use new macros Dong, Eric
2019-08-13 10:28   ` [edk2-devel] " Laszlo Ersek
2019-08-12 14:15 ` [Patch v2 0/6] Add "test then write" mechanism Laszlo Ersek
2019-08-13  2:29   ` Dong, Eric [this message]
2019-08-14  7:27     ` [edk2-devel] " Liming Gao
2019-08-14  7:31       ` Dong, Eric

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