From mboxrd@z Thu Jan 1 00:00:00 1970 Received: from mga05.intel.com (mga05.intel.com [192.55.52.43]) by mx.groups.io with SMTP id smtpd.web12.987.1573627864122082791 for ; Tue, 12 Nov 2019 22:51:04 -0800 Authentication-Results: mx.groups.io; dkim=missing; spf=pass (domain: intel.com, ip: 192.55.52.43, mailfrom: eric.dong@intel.com) X-Amp-Result: SKIPPED(no attachment in message) X-Amp-File-Uploaded: False Received: from orsmga002.jf.intel.com ([10.7.209.21]) by fmsmga105.fm.intel.com with ESMTP/TLS/DHE-RSA-AES256-GCM-SHA384; 12 Nov 2019 22:51:03 -0800 X-ExtLoop1: 1 X-IronPort-AV: E=Sophos;i="5.68,299,1569308400"; d="scan'208";a="216294912" Received: from fmsmsx108.amr.corp.intel.com ([10.18.124.206]) by orsmga002.jf.intel.com with ESMTP; 12 Nov 2019 22:51:02 -0800 Received: from fmsmsx111.amr.corp.intel.com (10.18.116.5) by FMSMSX108.amr.corp.intel.com (10.18.124.206) with Microsoft SMTP Server (TLS) id 14.3.439.0; Tue, 12 Nov 2019 22:51:02 -0800 Received: from shsmsx152.ccr.corp.intel.com (10.239.6.52) by fmsmsx111.amr.corp.intel.com (10.18.116.5) with Microsoft SMTP Server (TLS) id 14.3.439.0; Tue, 12 Nov 2019 22:51:02 -0800 Received: from shsmsx102.ccr.corp.intel.com ([169.254.2.108]) by SHSMSX152.ccr.corp.intel.com ([169.254.6.2]) with mapi id 14.03.0439.000; Wed, 13 Nov 2019 14:51:00 +0800 From: "Dong, Eric" To: "Ni, Ray" , "devel@edk2.groups.io" CC: Laszlo Ersek Subject: Re: [PATCH 1/2] UefiCpuPkg/CpuCommonFeaturesLib: Remove XD enable/disable logic Thread-Topic: [PATCH 1/2] UefiCpuPkg/CpuCommonFeaturesLib: Remove XD enable/disable logic Thread-Index: AQHVmFH7FK8crfKZGEqG1ceyBPMclKeIrL5w Date: Wed, 13 Nov 2019 06:50:59 +0000 Message-ID: References: <20191111053515.261224-1-ray.ni@intel.com> <20191111053515.261224-2-ray.ni@intel.com> In-Reply-To: <20191111053515.261224-2-ray.ni@intel.com> Accept-Language: en-US X-MS-Has-Attach: X-MS-TNEF-Correlator: x-titus-metadata-40: eyJDYXRlZ29yeUxhYmVscyI6IiIsIk1ldGFkYXRhIjp7Im5zIjoiaHR0cDpcL1wvd3d3LnRpdHVzLmNvbVwvbnNcL0ludGVsMyIsImlkIjoiYWY0NTc4YmItMjBmMS00NTliLWJjNzMtOTNiNWYwZDc3MThlIiwicHJvcHMiOlt7Im4iOiJDVFBDbGFzc2lmaWNhdGlvbiIsInZhbHMiOlt7InZhbHVlIjoiQ1RQX05UIn1dfV19LCJTdWJqZWN0TGFiZWxzIjpbXSwiVE1DVmVyc2lvbiI6IjE3LjEwLjE4MDQuNDkiLCJUcnVzdGVkTGFiZWxIYXNoIjoiNkRoODBtbG9LNlZRaVIrcGhqeWRMcUszVFY3UCthMFpzd1NGeTJuQkhiaWNNWldmN3VsaUZxNU1wNmhPeGV1NCJ9 x-ctpclassification: CTP_NT dlp-product: dlpe-windows dlp-version: 11.2.0.6 dlp-reaction: no-action x-originating-ip: [10.239.127.40] MIME-Version: 1.0 Return-Path: eric.dong@intel.com Content-Language: en-US Content-Type: text/plain; charset="us-ascii" Content-Transfer-Encoding: quoted-printable Reviewed-by: Eric Dong > -----Original Message----- > From: Ni, Ray > Sent: Monday, November 11, 2019 11:05 AM > To: devel@edk2.groups.io > Cc: Dong, Eric ; Laszlo Ersek > Subject: [PATCH 1/2] UefiCpuPkg/CpuCommonFeaturesLib: Remove XD > enable/disable logic >=20 > REF: https://bugzilla.tianocore.org/show_bug.cgi?id=3D2329 >=20 > XD (ExecutionDisable) feature, when turned on, allows page table entry > BIT63 set to 1 indicating the memory pointed by the page table is disallo= wed > to execute. > DxeIpl::CreateIdentityMappingPageTables() enables the XD when CPU > supports it. > Later DxeCore modifies the page table to set the BIT63 to protect the > stack/heap to disallow code execution in stack/heap. >=20 > UefiCpuPkg/CpuCommonFeaturesLib enables/disables the XD feature > according to PcdCpuFeaturesSetting. > When XD is disabled, GP fault is generated immediately because some page > entries have BIT63 set. >=20 > To fix this issue, this patch removes the XD feature logic from > UefiCpuPkg/CpuCommonFeaturesLib so the XD feature is only taken care of > by DxeIpl. >=20 > Signed-off-by: Ray Ni > Cc: Eric Dong > Cc: Laszlo Ersek > --- > .../CpuCommonFeaturesLib.c | 11 --- > .../CpuCommonFeaturesLib.inf | 3 +- > .../CpuCommonFeaturesLib/ExecuteDisable.c | 95 ------------------- > 3 files changed, 1 insertion(+), 108 deletions(-) delete mode 100644 > UefiCpuPkg/Library/CpuCommonFeaturesLib/ExecuteDisable.c >=20 > diff --git > a/UefiCpuPkg/Library/CpuCommonFeaturesLib/CpuCommonFeaturesLib.c > b/UefiCpuPkg/Library/CpuCommonFeaturesLib/CpuCommonFeaturesLib.c > index 238632f88a..3ebd9392a9 100644 > --- > a/UefiCpuPkg/Library/CpuCommonFeaturesLib/CpuCommonFeaturesLib.c > +++ > b/UefiCpuPkg/Library/CpuCommonFeaturesLib/CpuCommonFeaturesLib.c > @@ -66,17 +66,6 @@ CpuCommonFeaturesLibConstructor ( > ); > ASSERT_EFI_ERROR (Status); > } > - if (IsCpuFeatureSupported (CPU_FEATURE_XD)) { > - Status =3D RegisterCpuFeature ( > - "Execute Disable", > - NULL, > - ExecuteDisableSupport, > - ExecuteDisableInitialize, > - CPU_FEATURE_XD, > - CPU_FEATURE_END > - ); > - ASSERT_EFI_ERROR (Status); > - } > if (IsCpuFeatureSupported (CPU_FEATURE_FASTSTRINGS)) { > Status =3D RegisterCpuFeature ( > "FastStrings", > diff --git > a/UefiCpuPkg/Library/CpuCommonFeaturesLib/CpuCommonFeaturesLib.inf > b/UefiCpuPkg/Library/CpuCommonFeaturesLib/CpuCommonFeaturesLib.inf > index 6347c8997d..7fbcd8da0e 100644 > --- > a/UefiCpuPkg/Library/CpuCommonFeaturesLib/CpuCommonFeaturesLib.inf > +++ > b/UefiCpuPkg/Library/CpuCommonFeaturesLib/CpuCommonFeaturesLib.inf > @@ -4,7 +4,7 @@ > # This library registers CPU features defined in Intel(R) 64 and IA-32 = # > Architectures Software Developer's Manual. > # > -# Copyright (c) 2017 - 2018, Intel Corporation. All rights reserved.
> +# Copyright (c) 2017 - 2019, Intel Corporation. All rights > +reserved.
> # > # SPDX-License-Identifier: BSD-2-Clause-Patent # @@ -34,7 +34,6 @@ > [Sources] > C1e.c > ClockModulation.c > Eist.c > - ExecuteDisable.c > FastStrings.c > FeatureControl.c > LimitCpuIdMaxval.c > diff --git a/UefiCpuPkg/Library/CpuCommonFeaturesLib/ExecuteDisable.c > b/UefiCpuPkg/Library/CpuCommonFeaturesLib/ExecuteDisable.c > deleted file mode 100644 > index 75ea16309d..0000000000 > --- a/UefiCpuPkg/Library/CpuCommonFeaturesLib/ExecuteDisable.c > +++ /dev/null > @@ -1,95 +0,0 @@ > -/** @file > - Execute Disable feature. > - > - Copyright (c) 2017, Intel Corporation. All rights reserved.
> - SPDX-License-Identifier: BSD-2-Clause-Patent > - > -**/ > - > -#include "CpuCommonFeatures.h" > - > -/** > - Detects if Execute Disable feature supported on current processor. > - > - @param[in] ProcessorNumber The index of the CPU executing this > function. > - @param[in] CpuInfo A pointer to the > REGISTER_CPU_FEATURE_INFORMATION > - structure for the CPU executing this > function. > - @param[in] ConfigData A pointer to the configuration buffer > returned > - by > CPU_FEATURE_GET_CONFIG_DATA. NULL if > - CPU_FEATURE_GET_CONFIG_DATA > was not provided in > - RegisterCpuFeature(). > - > - @retval TRUE Execute Disable feature is supported. > - @retval FALSE Execute Disable feature is not supported. > - > - @note This service could be called by BSP/APs. > -**/ > -BOOLEAN > -EFIAPI > -ExecuteDisableSupport ( > - IN UINTN ProcessorNumber, > - IN REGISTER_CPU_FEATURE_INFORMATION *CpuInfo, > - IN VOID *ConfigData OPTIONAL > - ) > -{ > - UINT32 Eax; > - CPUID_EXTENDED_CPU_SIG_EDX Edx; > - > - AsmCpuid (CPUID_EXTENDED_FUNCTION, &Eax, NULL, NULL, NULL); > - if (Eax <=3D CPUID_EXTENDED_FUNCTION) { > - // > - // Extended CPUID functions are not supported on this processor. > - // > - return FALSE; > - } > - > - AsmCpuid (CPUID_EXTENDED_CPU_SIG, NULL, NULL, NULL, > &Edx.Uint32); > - return (Edx.Bits.NX !=3D 0); > -} > - > -/** > - Initializes Execute Disable feature to specific state. > - > - @param[in] ProcessorNumber The index of the CPU executing this > function. > - @param[in] CpuInfo A pointer to the > REGISTER_CPU_FEATURE_INFORMATION > - structure for the CPU executing this > function. > - @param[in] ConfigData A pointer to the configuration buffer > returned > - by > CPU_FEATURE_GET_CONFIG_DATA. NULL if > - CPU_FEATURE_GET_CONFIG_DATA > was not provided in > - RegisterCpuFeature(). > - @param[in] State If TRUE, then the Execute Disable > feature must be enabled. > - If FALSE, then the Execute Disable > feature must be disabled. > - > - @retval RETURN_SUCCESS Execute Disable feature is initialized. > - > - @note This service could be called by BSP only. > -**/ > -RETURN_STATUS > -EFIAPI > -ExecuteDisableInitialize ( > - IN UINTN ProcessorNumber, > - IN REGISTER_CPU_FEATURE_INFORMATION *CpuInfo, > - IN VOID *ConfigData, OPTIONAL > - IN BOOLEAN State > - ) > -{ > - // > - // The scope of the MSR_IA32_EFER is core for below processor type, > only program > - // MSR_IA32_EFER for thread 0 in each core. > - // > - if (IS_SILVERMONT_PROCESSOR (CpuInfo->DisplayFamily, > CpuInfo->DisplayModel)) { > - if (CpuInfo->ProcessorInfo.Location.Thread !=3D 0) { > - return RETURN_SUCCESS; > - } > - } > - > - CPU_REGISTER_TABLE_WRITE_FIELD ( > - ProcessorNumber, > - Msr, > - MSR_IA32_EFER, > - MSR_IA32_EFER_REGISTER, > - Bits.NXE, > - (State) ? 1 : 0 > - ); > - return RETURN_SUCCESS; > -} > -- > 2.21.0.windows.1