From mboxrd@z Thu Jan 1 00:00:00 1970 Received: from mga01.intel.com (mga01.intel.com [192.55.52.88]) by mx.groups.io with SMTP id smtpd.web11.7370.1581042864308168172 for ; Thu, 06 Feb 2020 18:34:24 -0800 Authentication-Results: mx.groups.io; dkim=missing; spf=pass (domain: intel.com, ip: 192.55.52.88, mailfrom: eric.dong@intel.com) X-Amp-Result: SKIPPED(no attachment in message) X-Amp-File-Uploaded: False Received: from orsmga008.jf.intel.com ([10.7.209.65]) by fmsmga101.fm.intel.com with ESMTP/TLS/DHE-RSA-AES256-GCM-SHA384; 06 Feb 2020 18:34:23 -0800 X-ExtLoop1: 1 X-IronPort-AV: E=Sophos;i="5.70,411,1574150400"; d="scan'208";a="225234380" Received: from fmsmsx106.amr.corp.intel.com ([10.18.124.204]) by orsmga008.jf.intel.com with ESMTP; 06 Feb 2020 18:34:23 -0800 Received: from fmsmsx602.amr.corp.intel.com (10.18.126.82) by FMSMSX106.amr.corp.intel.com (10.18.124.204) with Microsoft SMTP Server (TLS) id 14.3.439.0; Thu, 6 Feb 2020 18:34:23 -0800 Received: from fmsmsx602.amr.corp.intel.com (10.18.126.82) by fmsmsx602.amr.corp.intel.com (10.18.126.82) with Microsoft SMTP Server (version=TLS1_2, cipher=TLS_ECDHE_RSA_WITH_AES_128_GCM_SHA256) id 15.1.1713.5; Thu, 6 Feb 2020 18:34:22 -0800 Received: from shsmsx105.ccr.corp.intel.com (10.239.4.158) by fmsmsx602.amr.corp.intel.com (10.18.126.82) with Microsoft SMTP Server (version=TLS1_2, cipher=TLS_ECDHE_RSA_WITH_AES_128_CBC_SHA256) id 15.1.1713.5 via Frontend Transport; Thu, 6 Feb 2020 18:34:22 -0800 Received: from shsmsx102.ccr.corp.intel.com ([169.254.2.126]) by SHSMSX105.ccr.corp.intel.com ([169.254.11.138]) with mapi id 14.03.0439.000; Fri, 7 Feb 2020 10:34:20 +0800 From: "Dong, Eric" To: "Wu, Hao A" , "devel@edk2.groups.io" CC: "Kubacki, Michael A" , "Kinney, Michael D" , "Ni, Ray" , Laszlo Ersek Subject: Re: [PATCH v1 1/2] Revert UefiCpuPkg/MpInitLib: Relocate microcode patch fields in CPU_MP_DATA Thread-Topic: [PATCH v1 1/2] Revert UefiCpuPkg/MpInitLib: Relocate microcode patch fields in CPU_MP_DATA Thread-Index: AQHV3K2nPo4hAyOQ4k6OuOlnmduUiagPBLgg Date: Fri, 7 Feb 2020 02:34:19 +0000 Message-ID: References: <20200206052356.3672-1-hao.a.wu@intel.com> <20200206052356.3672-2-hao.a.wu@intel.com> In-Reply-To: <20200206052356.3672-2-hao.a.wu@intel.com> Accept-Language: en-US X-MS-Has-Attach: X-MS-TNEF-Correlator: x-titus-metadata-40: eyJDYXRlZ29yeUxhYmVscyI6IiIsIk1ldGFkYXRhIjp7Im5zIjoiaHR0cDpcL1wvd3d3LnRpdHVzLmNvbVwvbnNcL0ludGVsMyIsImlkIjoiYmQ0YTNhMDEtZWY0Yi00MzRhLWExM2QtNGFiN2FmYTA4YjVkIiwicHJvcHMiOlt7Im4iOiJDVFBDbGFzc2lmaWNhdGlvbiIsInZhbHMiOlt7InZhbHVlIjoiQ1RQX05UIn1dfV19LCJTdWJqZWN0TGFiZWxzIjpbXSwiVE1DVmVyc2lvbiI6IjE3LjEwLjE4MDQuNDkiLCJUcnVzdGVkTGFiZWxIYXNoIjoiMkJQNjlrZkxhWTNwNTdhbkdTSHN6a3VaQTB4emJDQVNTN0pTY1lSXC9RVFBmQ3RmaW53THp0dUVOSXBtMzBjYkgifQ== x-ctpclassification: CTP_NT dlp-product: dlpe-windows dlp-version: 11.2.0.6 dlp-reaction: no-action x-originating-ip: [10.239.127.40] MIME-Version: 1.0 Return-Path: eric.dong@intel.com Content-Language: en-US Content-Type: text/plain; charset="us-ascii" Content-Transfer-Encoding: quoted-printable Reviewed-by: Eric Dong -----Original Message----- From: Wu, Hao A =20 Sent: Thursday, February 6, 2020 1:24 PM To: devel@edk2.groups.io Cc: Wu, Hao A ; Kubacki, Michael A ; Kinney, Michael D ; Dong, Eric ; Ni, Ray ; Laszlo Ersek Subject: [PATCH v1 1/2] Revert UefiCpuPkg/MpInitLib: Relocate microcode pat= ch fields in CPU_MP_DATA This reverts commit 88bd06616617ef2569f093f7b51893c11ad78e26. REF:https://bugzilla.tianocore.org/show_bug.cgi?id=3D2465 Commit 88bd0661661 relocates the 'MicrocodePatchAddress' and 'MicrocodePatc= hRegionSize' fields in structure CPU_MP_DATA to ensure that they can be pro= perly passed between different architectures. However, such change is not backward compatible with the scenario like pre-= existing binaries such as FSP. These binaries are built when the code base = has a different version of the CPU_MP_DATA structure definition. This may c= ause issues when accessing the 'MicrocodePatchAddress' and 'MicrocodePatchR= egionSize' fields, since their offsets are different (between PEI phase in = the FSP binaries and DXE phase in current code implementation). Cc: Michael Kubacki Cc: Michael D Kinney Cc: Eric Dong Cc: Ray Ni Cc: Laszlo Ersek Signed-off-by: Hao A Wu --- UefiCpuPkg/Library/MpInitLib/MpLib.h | 4 ++-- 1 file changed, 2 insertions(+), 2 deletions(-) diff --git a/UefiCpuPkg/Library/MpInitLib/MpLib.h b/UefiCpuPkg/Library/MpIn= itLib/MpLib.h index 7c62d75acc..d7e20f0b74 100644 --- a/UefiCpuPkg/Library/MpInitLib/MpLib.h +++ b/UefiCpuPkg/Library/MpInitLib/MpLib.h @@ -219,8 +219,6 @@ struct _CPU_MP_DATA { UINT64 CpuInfoInHob; UINT32 CpuCount; UINT32 BspNumber; - UINT64 MicrocodePatchAddress; - UINT64 MicrocodePatchRegionSize; // // The above fields data will be passed from PEI to DXE // Please make sure the fields offset same in the different @@ -264,6 +2= 62,8 @@ struct _CPU_MP_DATA { UINT8 Vector; BOOLEAN PeriodicMode; BOOLEAN TimerInterruptState; + UINT64 MicrocodePatchAddress; + UINT64 MicrocodePatchRegionSize; =20 // // Whether need to use Init-Sipi-Sipi to wake up the APs. -- 2.12.0.windows.1