From mboxrd@z Thu Jan 1 00:00:00 1970 Authentication-Results: mx.groups.io; dkim=missing; spf=pass (domain: intel.com, ip: 134.134.136.65, mailfrom: tien.hock.loh@intel.com) Received: from mga03.intel.com (mga03.intel.com [134.134.136.65]) by groups.io with SMTP; Thu, 02 May 2019 19:21:43 -0700 X-Amp-Result: SKIPPED(no attachment in message) X-Amp-File-Uploaded: False Received: from orsmga006.jf.intel.com ([10.7.209.51]) by orsmga103.jf.intel.com with ESMTP/TLS/DHE-RSA-AES256-GCM-SHA384; 02 May 2019 19:21:42 -0700 X-ExtLoop1: 1 X-IronPort-AV: E=Sophos;i="5.60,424,1549958400"; d="scan'208";a="140854896" Received: from pgsmsx112.gar.corp.intel.com ([10.108.55.201]) by orsmga006.jf.intel.com with ESMTP; 02 May 2019 19:21:40 -0700 Received: from pgsmsx110.gar.corp.intel.com ([169.254.13.159]) by PGSMSX112.gar.corp.intel.com ([169.254.3.40]) with mapi id 14.03.0415.000; Fri, 3 May 2019 10:20:57 +0800 From: "Loh, Tien Hock" To: Leif Lindholm CC: "devel@edk2.groups.io" , "thloh85@gmail.com" , Ard Biesheuvel , "Kinney, Michael D" Subject: Re: [[edk2-platforms] PATCH v3 1/1] Platform/Intel/Stratix10: Add Stratix 10 platform support Thread-Topic: [[edk2-platforms] PATCH v3 1/1] Platform/Intel/Stratix10: Add Stratix 10 platform support Thread-Index: AQHVAJgoJi2YOcN9CU6iM40oaDX7AaZXpBEAgAEDjqA= Date: Fri, 3 May 2019 02:20:57 +0000 Message-ID: References: <1556768099-39210-1-git-send-email-tien.hock.loh@intel.com> <20190502183432.5lxilcloi557zlr2@bivouac.eciton.net> In-Reply-To: <20190502183432.5lxilcloi557zlr2@bivouac.eciton.net> Accept-Language: en-US X-MS-Has-Attach: X-MS-TNEF-Correlator: dlp-product: dlpe-windows dlp-version: 11.0.600.7 dlp-reaction: no-action x-ctpclassification: CTP_NT x-titus-metadata-40: eyJDYXRlZ29yeUxhYmVscyI6IiIsIk1ldGFkYXRhIjp7Im5zIjoiaHR0cDpcL1wvd3d3LnRpdHVzLmNvbVwvbnNcL0ludGVsMyIsImlkIjoiY2NkNGQ4OGQtZjVhYi00ZjVlLTllMDQtYWY2ODY0MTJmYzM2IiwicHJvcHMiOlt7Im4iOiJDVFBDbGFzc2lmaWNhdGlvbiIsInZhbHMiOlt7InZhbHVlIjoiQ1RQX05UIn1dfV19LCJTdWJqZWN0TGFiZWxzIjpbXSwiVE1DVmVyc2lvbiI6IjE3LjEwLjE4MDQuNDkiLCJUcnVzdGVkTGFiZWxIYXNoIjoiSU1mYkYxYUNhYVFRTGhBWUxiWXBaKzJGenhDUEVpQ1pQMVdmQUdXWHFtd1ZJS0NwMFBLK09PSnBRZ0NUOHR1SiJ9 x-originating-ip: [172.30.20.205] MIME-Version: 1.0 Content-Language: en-US Content-Type: text/plain; charset="us-ascii" Content-Transfer-Encoding: quoted-printable > -----Original Message----- > From: Leif Lindholm > Sent: Friday, May 3, 2019 2:35 AM > To: Loh, Tien Hock > Cc: devel@edk2.groups.io; thloh85@gmail.com; Ard Biesheuvel > ; Kinney, Michael D > > Subject: Re: [[edk2-platforms] PATCH v3 1/1] Platform/Intel/Stratix10: Ad= d > Stratix 10 platform support >=20 > Hi Tien Hock, >=20 > On Thu, May 02, 2019 at 11:34:59AM +0800, tien.hock.loh@intel.com wrote: > > From: "Tien Hock, Loh" > > > > Adds support for Intel Stratix 10 Platform. > > > > Signed-off-by: "Tien Hock, Loh" >=20 > We have not yet transitioned to BSD+Patent license for edk2-platforms, > so we still need the Contributed-under: tag for contributions. OK noted. Will do that.=20 >=20 > > Cc: Ard Biesheuvel > > Cc: Leif Lindholm > > Cc: Michael D Kinney > > > > -- > > v3 > > - Updated Pcd with updated name > > v2 > > - Updates ShellBinPkg with ShellPkg > > --- > > .../Drivers/IntelPlatformDxe/IntelPlatformDxe.c | 43 ++ > > .../Drivers/IntelPlatformDxe/IntelPlatformDxe.inf | 49 ++ > > .../IntelPlatformLib/AArch64/ArmPlatformHelper.S | 51 ++ > > .../IntelPlatformLib/Arm/ArmPlatformHelper.S | 63 +++ > > .../IntelPlatformLib/Arm/ArmPlatformHelper.asm | 72 +++ > > .../Library/IntelPlatformLib/IntelPlatformLib.inf | 53 ++ > > .../Library/IntelPlatformLib/Stratix10Mmu.c | 155 ++++++ > > .../IntelPlatformLib/Stratix10PlatformLib.c | 167 +++++++ > > Platform/Intel/Stratix10/Readme.md | 61 +++ > > Platform/Intel/Stratix10/ShellScript/startup.nsh | 2 + > > Platform/Intel/Stratix10/Stratix10SoCPkg.dec | 30 ++ > > Platform/Intel/Stratix10/Stratix10SoCPkg.dsc | 547 > +++++++++++++++++++++ > > Platform/Intel/Stratix10/Stratix10SoCPkg.fdf | 270 ++++++++++ > > 13 files changed, 1563 insertions(+) >=20 > Can you please regenerate this patch following the instructions at > https://github.com/tianocore/tianocore.github.io/wiki/Laszlo%27s-unkempt- > git-guide-for-edk2-contributors-and-maintainers > ? >=20 > Specifically the sort order and --stat options would help with > reviewing this patch. OK. >=20 > When respinning, could you in the .dsc add NOOPT to BUILD_TARGETS? OK >=20 > Additionally, edk2 StdLib has just been broken out into a separate > repository, so the build fails against only edk2. > However, the build also doesn't seem to actually need it, so could you > drop the line > LibC|StdLib/LibC/LibC.inf > from the .dsc? OK noted. I'll remove it if it is no longer needed. >=20 > Finally, this patch contains > Platform/Intel/Stratix10/Library/IntelPlatformLib/Arm/, but > SUPPORTED_ARCHITECTURES only lists AARCH64. If this platform can > indeed run in either, please add ARM to SUPPORTED_ARCHITECURES. > If not, please drop the IntelPlatformLib/Arm/ implementation. I'll remove the ARM as SUPPORTED_ARCHITECTURES since currently we do not te= st against ARM but only AARCH64.=20 >=20 > Best Regards, >=20 > Leif >=20 > > create mode 100644 > Platform/Intel/Stratix10/Drivers/IntelPlatformDxe/IntelPlatformDxe.c > > create mode 100644 > Platform/Intel/Stratix10/Drivers/IntelPlatformDxe/IntelPlatformDxe.inf > > create mode 100644 > Platform/Intel/Stratix10/Library/IntelPlatformLib/AArch64/ArmPlatformHelp > er.S > > create mode 100644 > Platform/Intel/Stratix10/Library/IntelPlatformLib/Arm/ArmPlatformHelper.S > > create mode 100644 > Platform/Intel/Stratix10/Library/IntelPlatformLib/Arm/ArmPlatformHelper.a > sm > > create mode 100644 > Platform/Intel/Stratix10/Library/IntelPlatformLib/IntelPlatformLib.inf > > create mode 100644 > Platform/Intel/Stratix10/Library/IntelPlatformLib/Stratix10Mmu.c > > create mode 100644 > Platform/Intel/Stratix10/Library/IntelPlatformLib/Stratix10PlatformLib.c > > create mode 100644 Platform/Intel/Stratix10/Readme.md > > create mode 100644 Platform/Intel/Stratix10/ShellScript/startup.nsh > > create mode 100755 Platform/Intel/Stratix10/Stratix10SoCPkg.dec > > create mode 100755 Platform/Intel/Stratix10/Stratix10SoCPkg.dsc > > create mode 100755 Platform/Intel/Stratix10/Stratix10SoCPkg.fdf > > > > diff --git > a/Platform/Intel/Stratix10/Drivers/IntelPlatformDxe/IntelPlatformDxe.c > b/Platform/Intel/Stratix10/Drivers/IntelPlatformDxe/IntelPlatformDxe.c > > new file mode 100644 > > index 000000000000..144b4c54ef55 > > --- /dev/null > > +++ > b/Platform/Intel/Stratix10/Drivers/IntelPlatformDxe/IntelPlatformDxe.c > > @@ -0,0 +1,43 @@ > > +/** @file > > +* > > +* Copyright (c) 2019, Intel All rights reserved. > > +* > > +* This program and the accompanying materials > > +* are licensed and made available under the terms and conditions of t= he > BSD License > > +* which accompanies this distribution. The full text of the license = may be > found at > > +* http://opensource.org/licenses/bsd-license.php > > +* > > +* THE PROGRAM IS DISTRIBUTED UNDER THE BSD LICENSE ON AN "AS IS" > BASIS, > > +* WITHOUT WARRANTIES OR REPRESENTATIONS OF ANY KIND, EITHER > EXPRESS OR IMPLIED. > > +* > > +**/ > > + > > + > > +#include > > +#include > > +#include > > +#include > > +#include > > +#include > > +#include > > +#include > > +#include > > +#include > > +#include > > +#include > > +#include > > +#include > > +#include > > + > > +EFI_STATUS > > +EFIAPI > > +IntelPlatformDxeEntryPoint ( > > + IN EFI_HANDLE ImageHandle, > > + IN EFI_SYSTEM_TABLE *SystemTable > > + ) > > +{ > > + EFI_STATUS Status =3D 0; > > + > > + return Status; > > +} > > + > > diff --git > a/Platform/Intel/Stratix10/Drivers/IntelPlatformDxe/IntelPlatformDxe.inf > b/Platform/Intel/Stratix10/Drivers/IntelPlatformDxe/IntelPlatformDxe.inf > > new file mode 100644 > > index 000000000000..c3c0d7242082 > > --- /dev/null > > +++ > b/Platform/Intel/Stratix10/Drivers/IntelPlatformDxe/IntelPlatformDxe.inf > > @@ -0,0 +1,49 @@ > > +#/** @file > > +# > > +# Copyright (c) 2019, Intel All rights reserved. > > +# > > +# This program and the accompanying materials > > +# are licensed and made available under the terms and conditions of t= he > BSD License > > +# which accompanies this distribution. The full text of the license = may be > found at > > +# http://opensource.org/licenses/bsd-license.php > > +# > > +# THE PROGRAM IS DISTRIBUTED UNDER THE BSD LICENSE ON AN "AS IS" > BASIS, > > +# WITHOUT WARRANTIES OR REPRESENTATIONS OF ANY KIND, EITHER > EXPRESS OR IMPLIED. > > +# > > +# > > +#**/ > > + > > +[Defines] > > + INF_VERSION =3D 0x00010005 > > + BASE_NAME =3D IntelPlatformDxe > > + FILE_GUID =3D AB87E291-1689-4c7b-B613-FB54A0E38= CEA > > + MODULE_TYPE =3D DXE_DRIVER > > + VERSION_STRING =3D 1.0 > > + ENTRY_POINT =3D IntelPlatformDxeEntryPoint > > + > > +[Sources.common] > > + IntelPlatformDxe.c > > + > > +[Packages] > > + ArmPkg/ArmPkg.dec > > + ArmPlatformPkg/ArmPlatformPkg.dec > > + MdePkg/MdePkg.dec > > + EmbeddedPkg/EmbeddedPkg.dec > > + > > +[LibraryClasses] > > + ArmLib > > + BaseMemoryLib > > + DebugLib > > + DxeServicesTableLib > > + PcdLib > > + PrintLib > > + SerialPortLib > > + UefiBootServicesTableLib > > + UefiRuntimeServicesTableLib > > + UefiLib > > + UefiDriverEntryPoint > > + > > + > > +[Depex] > > + # We depend on these protocols to create the default boot entries > > + gEfiVariableArchProtocolGuid AND gEfiVariableWriteArchProtocolGuid > > diff --git > a/Platform/Intel/Stratix10/Library/IntelPlatformLib/AArch64/ArmPlatformHe > lper.S > b/Platform/Intel/Stratix10/Library/IntelPlatformLib/AArch64/ArmPlatformHe > lper.S > > new file mode 100644 > > index 000000000000..2f4cf95cbf13 > > --- /dev/null > > +++ > b/Platform/Intel/Stratix10/Library/IntelPlatformLib/AArch64/ArmPlatformHe > lper.S > > @@ -0,0 +1,51 @@ > > +// > > +// Copyright (c) 2012-2013, ARM Limited. All rights reserved. > > +// > > +// This program and the accompanying materials > > +// are licensed and made available under the terms and conditions of = the > BSD License > > +// which accompanies this distribution. The full text of the license= may be > found at > > +// http://opensource.org/licenses/bsd-license.php > > +// > > +// THE PROGRAM IS DISTRIBUTED UNDER THE BSD LICENSE ON AN "AS IS" > BASIS, > > +// WITHOUT WARRANTIES OR REPRESENTATIONS OF ANY KIND, EITHER > EXPRESS OR IMPLIED. > > +// > > +// > > + > > +#include > > +#include > > + > > +ASM_FUNC(ArmPlatformPeiBootAction) > > + ret > > + > > +//UINTN > > +//ArmPlatformGetCorePosition ( > > +// IN UINTN MpId > > +// ); > > +// With this function: CorePos =3D (ClusterId * 4) + CoreId > > +ASM_FUNC(ArmPlatformGetCorePosition) > > + and x1, x0, #ARM_CORE_MASK > > + and x0, x0, #ARM_CLUSTER_MASK > > + add x0, x1, x0, LSR #6 > > + ret > > + > > +//UINTN > > +//ArmPlatformGetPrimaryCoreMpId ( > > +// VOID > > +// ); > > +ASM_FUNC(ArmPlatformGetPrimaryCoreMpId) > > + MOV32 (w0, FixedPcdGet32 (PcdArmPrimaryCore)) > > + ret > > + > > +//UINTN > > +//ArmPlatformIsPrimaryCore ( > > +// IN UINTN MpId > > +// ); > > +ASM_FUNC(ArmPlatformIsPrimaryCore) > > + MOV32 (w1, FixedPcdGet32 (PcdArmPrimaryCoreMask)) > > + and x0, x0, x1 > > + MOV32 (w1, FixedPcdGet32 (PcdArmPrimaryCore)) > > + cmp w0, w1 > > + mov x0, #1 > > + mov x1, #0 > > + csel x0, x0, x1, eq > > + ret > > diff --git > a/Platform/Intel/Stratix10/Library/IntelPlatformLib/Arm/ArmPlatformHelper > .S > b/Platform/Intel/Stratix10/Library/IntelPlatformLib/Arm/ArmPlatformHelper > .S > > new file mode 100644 > > index 000000000000..e52ea5afa2cb > > --- /dev/null > > +++ > b/Platform/Intel/Stratix10/Library/IntelPlatformLib/Arm/ArmPlatformHelper > .S > > @@ -0,0 +1,63 @@ > > +// > > +// Copyright (c) 2012-2013, ARM Limited. All rights reserved. > > +// > > +// This program and the accompanying materials > > +// are licensed and made available under the terms and conditions of = the > BSD License > > +// which accompanies this distribution. The full text of the license= may be > found at > > +// http://opensource.org/licenses/bsd-license.php > > +// > > +// THE PROGRAM IS DISTRIBUTED UNDER THE BSD LICENSE ON AN "AS IS" > BASIS, > > +// WITHOUT WARRANTIES OR REPRESENTATIONS OF ANY KIND, EITHER > EXPRESS OR IMPLIED. > > +// > > +// > > + > > +#include > > +#include > > + > > +.text > > +.align 2 > > + > > +GCC_ASM_EXPORT(ArmPlatformPeiBootAction) > > +GCC_ASM_EXPORT(ArmPlatformGetCorePosition) > > +GCC_ASM_EXPORT(ArmPlatformGetPrimaryCoreMpId) > > +GCC_ASM_EXPORT(ArmPlatformIsPrimaryCore) > > + > > +GCC_ASM_IMPORT(_gPcd_FixedAtBuild_PcdArmPrimaryCore) > > +GCC_ASM_IMPORT(_gPcd_FixedAtBuild_PcdArmPrimaryCoreMask) > > + > > +ASM_PFX(ArmPlatformPeiBootAction): > > + bx lr > > + > > +//UINTN > > +//ArmPlatformGetCorePosition ( > > +// IN UINTN MpId > > +// ); > > +ASM_PFX(ArmPlatformGetCorePosition): > > + and r1, r0, #ARM_CORE_MASK > > + and r0, r0, #ARM_CLUSTER_MASK > > + add r0, r1, r0, LSR #7 > > + bx lr > > + > > +//UINTN > > +//ArmPlatformGetPrimaryCoreMpId ( > > +// VOID > > +// ); > > +ASM_PFX(ArmPlatformGetPrimaryCoreMpId): > > + LoadConstantToReg (_gPcd_FixedAtBuild_PcdArmPrimaryCore, r0) > > + ldr r0, [r0] > > + bx lr > > + > > +//UINTN > > +//ArmPlatformIsPrimaryCore ( > > +// IN UINTN MpId > > +// ); > > +ASM_PFX(ArmPlatformIsPrimaryCore): > > + LoadConstantToReg (_gPcd_FixedAtBuild_PcdArmPrimaryCoreMask, r1) > > + ldr r1, [r1] > > + and r0, r0, r1 > > + LoadConstantToReg (_gPcd_FixedAtBuild_PcdArmPrimaryCore, r1) > > + ldr r1, [r1] > > + cmp r0, r1 > > + moveq r0, #1 > > + movne r0, #0 > > + bx lr > > diff --git > a/Platform/Intel/Stratix10/Library/IntelPlatformLib/Arm/ArmPlatformHelper > .asm > b/Platform/Intel/Stratix10/Library/IntelPlatformLib/Arm/ArmPlatformHelper > .asm > > new file mode 100644 > > index 000000000000..95704c100a7a > > --- /dev/null > > +++ > b/Platform/Intel/Stratix10/Library/IntelPlatformLib/Arm/ArmPlatformHelper > .asm > > @@ -0,0 +1,72 @@ > > +// > > +// Copyright (c) 2012-2013, ARM Limited. All rights reserved. > > +// > > +// This program and the accompanying materials > > +// are licensed and made available under the terms and conditions of = the > BSD License > > +// which accompanies this distribution. The full text of the license= may be > found at > > +// http://opensource.org/licenses/bsd-license.php > > +// > > +// THE PROGRAM IS DISTRIBUTED UNDER THE BSD LICENSE ON AN "AS IS" > BASIS, > > +// WITHOUT WARRANTIES OR REPRESENTATIONS OF ANY KIND, EITHER > EXPRESS OR IMPLIED. > > +// > > +// > > + > > +#include > > +#include > > + > > + INCLUDE AsmMacroIoLib.inc > > + > > + EXPORT ArmPlatformPeiBootAction > > + EXPORT ArmPlatformGetCorePosition > > + EXPORT ArmPlatformGetPrimaryCoreMpId > > + EXPORT ArmPlatformIsPrimaryCore > > + > > + IMPORT _gPcd_FixedAtBuild_PcdArmPrimaryCore > > + IMPORT _gPcd_FixedAtBuild_PcdArmPrimaryCoreMask > > + > > + PRESERVE8 > > + AREA ArmPlatformNullHelper, CODE, READONLY > > + > > +ArmPlatformPeiBootAction FUNCTION > > + bx lr > > + ENDFUNC > > + > > +//UINTN > > +//ArmPlatformGetCorePosition ( > > +// IN UINTN MpId > > +// ); > > +ArmPlatformGetCorePosition FUNCTION > > + and r1, r0, #ARM_CORE_MASK > > + and r0, r0, #ARM_CLUSTER_MASK > > + add r0, r1, r0, LSR #7 > > + bx lr > > + ENDFUNC > > + > > +//UINTN > > +//ArmPlatformGetPrimaryCoreMpId ( > > +// VOID > > +// ); > > +ArmPlatformGetPrimaryCoreMpId FUNCTION > > + LoadConstantToReg (_gPcd_FixedAtBuild_PcdArmPrimaryCore, r0) > > + ldr r0, [r0] > > + bx lr > > + ENDFUNC > > + > > +//UINTN > > +//ArmPlatformIsPrimaryCore ( > > +// IN UINTN MpId > > +// ); > > +ArmPlatformIsPrimaryCore FUNCTION > > + LoadConstantToReg (_gPcd_FixedAtBuild_PcdArmPrimaryCoreMask, r1) > > + ldr r1, [r1] > > + and r0, r0, r1 > > + LoadConstantToReg (_gPcd_FixedAtBuild_PcdArmPrimaryCore, r1) > > + ldr r1, [r1] > > + cmp r0, r1 > > + moveq r0, #1 > > + movne r0, #0 > > + bx lr > > + ENDFUNC > > + > > + END > > + > > diff --git > a/Platform/Intel/Stratix10/Library/IntelPlatformLib/IntelPlatformLib.inf > b/Platform/Intel/Stratix10/Library/IntelPlatformLib/IntelPlatformLib.inf > > new file mode 100644 > > index 000000000000..2b6256e1ec56 > > --- /dev/null > > +++ b/Platform/Intel/Stratix10/Library/IntelPlatformLib/IntelPlatformLi= b.inf > > @@ -0,0 +1,53 @@ > > +/** @file > > +* > > +* Stratix 10 Platform Library > > +* > > +* Copyright (c) 2019, Intel Corporations All rights reserved. > > +* > > +* This program and the accompanying materials > > +* are licensed and made available under the terms and conditions of t= he > BSD License > > +* which accompanies this distribution. The full text of the license = may be > found at > > +* http://opensource.org/licenses/bsd-license.php > > +* > > +* THE PROGRAM IS DISTRIBUTED UNDER THE BSD LICENSE ON AN "AS IS" > BASIS, > > +* WITHOUT WARRANTIES OR REPRESENTATIONS OF ANY KIND, EITHER > EXPRESS OR IMPLIED. > > +* > > +**/ > > + > > +[Defines] > > + INF_VERSION =3D 0x00010005 > > + BASE_NAME =3D Stratix10PlatformLib > > + FILE_GUID =3D 99E236C7-D5FD-42A0-B520-60C85C487= 0B8 > > + MODULE_TYPE =3D BASE > > + VERSION_STRING =3D 1.0 > > + LIBRARY_CLASS =3D ArmPlatformLib > > + > > +[Packages] > > + ArmPlatformPkg/ArmPlatformPkg.dec > > + ArmPkg/ArmPkg.dec > > + MdeModulePkg/MdeModulePkg.dec > > + MdePkg/MdePkg.dec > > + Platform/Intel/Stratix10/Stratix10SoCPkg.dec > > + > > +[LibraryClasses] > > + ArmLib > > + ArmMmuLib > > + DebugLib > > + IoLib > > + PcdLib > > + > > +[Sources.common] > > + Stratix10PlatformLib.c > > + Stratix10Mmu.c > > + > > +[Sources.Arm] > > + Arm/ArmPlatformHelper.S | GCC > > + Arm/ArmPlatformHelper.asm | RVCT > > + > > +[Sources.AArch64] > > + AArch64/ArmPlatformHelper.S > > + > > +[FixedPcd] > > + gArmTokenSpaceGuid.PcdArmPrimaryCoreMask > > + gArmTokenSpaceGuid.PcdArmPrimaryCore > > + > > diff --git > a/Platform/Intel/Stratix10/Library/IntelPlatformLib/Stratix10Mmu.c > b/Platform/Intel/Stratix10/Library/IntelPlatformLib/Stratix10Mmu.c > > new file mode 100644 > > index 000000000000..ed4aa2bdb12a > > --- /dev/null > > +++ b/Platform/Intel/Stratix10/Library/IntelPlatformLib/Stratix10Mmu.c > > @@ -0,0 +1,155 @@ > > +/** @file > > +* > > +* Stratix 10 Mmu configuration > > +* > > +* Copyright (c) 2019, Intel Corporations All rights reserved. > > +* > > +* This program and the accompanying materials > > +* are licensed and made available under the terms and conditions of t= he > BSD License > > +* which accompanies this distribution. The full text of the license = may be > found at > > +* http://opensource.org/licenses/bsd-license.php > > +* > > +* THE PROGRAM IS DISTRIBUTED UNDER THE BSD LICENSE ON AN "AS IS" > BASIS, > > +* WITHOUT WARRANTIES OR REPRESENTATIONS OF ANY KIND, EITHER > EXPRESS OR IMPLIED. > > +* > > +**/ > > + > > +#include > > +#include > > +#include > > +#include > > +#include > > +#include > > +#include > > +#include > > +#include > > + > > +// The total number of descriptors, including the final "end-of-table" > descriptor. > > +#define MAX_VIRTUAL_MEMORY_MAP_DESCRIPTORS 16 > > +ARM_MEMORY_REGION_DESCRIPTOR > gVirtualMemoryTable[MAX_VIRTUAL_MEMORY_MAP_DESCRIPTORS]; > > + > > +// DDR attributes > > +#define DDR_ATTRIBUTES_CACHED > ARM_MEMORY_REGION_ATTRIBUTE_WRITE_BACK > > +#define DDR_ATTRIBUTES_UNCACHED > ARM_MEMORY_REGION_ATTRIBUTE_UNCACHED_UNBUFFERED > > + > > +#define DRAM_BASE 0x0 > > +#define DRAM_SIZE 0x40000000 > > + > > +#define FPGA_SLAVES_BASE 0x80000000 > > +#define FPGA_SLAVES_SIZE 0x60000000 > > + > > +#define PERIPHERAL_BASE 0xF7000000 > > +#define PERIPHERAL_SIZE 0x08E00000 > > + > > +#define OCRAM_BASE 0xFFE00000 > > +#define OCRAM_SIZE 0x00100000 > > + > > +#define GIC_BASE 0xFFFC0000 > > +#define GIC_SIZE 0x00008000 > > + > > +#define MEM64_BASE 0x0100000000 > > +#define MEM64_SIZE 0x1F00000000 > > + > > +#define DEVICE64_BASE 0x2000000000 > > +#define DEVICE64_SIZE 0x0100000000 > > +/** > > + Return the Virtual Memory Map of your platform > > + > > + This Virtual Memory Map is used to initialize the MMU for DXE Phase. > > + > > + @param[out] VirtualMemoryMap Array of > ARM_MEMORY_REGION_DESCRIPTOR describing a Physical-to- > > + Virtual Memory mapping. This array= must be ended > by a zero-filled > > + entry > > + > > +**/ > > +VOID > > +EFIAPI > > +ArmPlatformGetVirtualMemoryMap ( > > + IN ARM_MEMORY_REGION_DESCRIPTOR** VirtualMemoryMap > > + ) > > +{ > > + ARM_MEMORY_REGION_DESCRIPTOR *VirtualMemoryTable; > > + ARM_MEMORY_REGION_ATTRIBUTES CacheAttributes; > > + UINTN Index =3D 0; > > + > > + VirtualMemoryTable =3D &gVirtualMemoryTable[0]; > > + > > + CacheAttributes =3D DDR_ATTRIBUTES_CACHED; > > + > > + // Start create the Virtual Memory Map table > > + // Our goal is to a simple 1:1 mapping where virtual=3D=3Dphysical a= ddress > > + > > + // DDR SDRAM > > + VirtualMemoryTable[Index].PhysicalBase =3D DRAM_BASE; > > + VirtualMemoryTable[Index].VirtualBase =3D > VirtualMemoryTable[Index].PhysicalBase; > > + VirtualMemoryTable[Index].Length =3D DRAM_SIZE; > > + VirtualMemoryTable[Index++].Attributes =3D CacheAttributes; > > + > > + // FPGA > > + VirtualMemoryTable[Index].PhysicalBase =3D FPGA_SLAVES_BASE; > > + VirtualMemoryTable[Index].VirtualBase =3D > VirtualMemoryTable[Index].PhysicalBase; > > + VirtualMemoryTable[Index].Length =3D FPGA_SLAVES_SIZE; > > + VirtualMemoryTable[Index++].Attributes =3D > ARM_MEMORY_REGION_ATTRIBUTE_DEVICE; > > + > > + // DEVICE 142MB > > + VirtualMemoryTable[Index].PhysicalBase =3D PERIPHERAL_BASE; > > + VirtualMemoryTable[Index].VirtualBase =3D > VirtualMemoryTable[Index].PhysicalBase; > > + VirtualMemoryTable[Index].Length =3D PERIPHERAL_SIZE; > > + VirtualMemoryTable[Index++].Attributes =3D > ARM_MEMORY_REGION_ATTRIBUTE_DEVICE; > > + > > + // OCRAM 1MB but available 256KB > > + VirtualMemoryTable[Index].PhysicalBase =3D OCRAM_BASE; > > + VirtualMemoryTable[Index].VirtualBase =3D > VirtualMemoryTable[Index].PhysicalBase; > > + VirtualMemoryTable[Index].Length =3D OCRAM_SIZE; > > + VirtualMemoryTable[Index++].Attributes =3D CacheAttributes; > > + > > + // DEVICE 32KB > > + VirtualMemoryTable[Index].PhysicalBase =3D GIC_BASE; > > + VirtualMemoryTable[Index].VirtualBase =3D > VirtualMemoryTable[Index].PhysicalBase; > > + VirtualMemoryTable[Index].Length =3D GIC_SIZE; > > + VirtualMemoryTable[Index++].Attributes =3D > ARM_MEMORY_REGION_ATTRIBUTE_DEVICE; > > + > > + // MEM 124GB > > + VirtualMemoryTable[Index].PhysicalBase =3D MEM64_BASE; > > + VirtualMemoryTable[Index].VirtualBase =3D > VirtualMemoryTable[Index].PhysicalBase; > > + VirtualMemoryTable[Index].Length =3D MEM64_SIZE; > > + VirtualMemoryTable[Index++].Attributes =3D CacheAttributes; > > + > > + // DEVICE 4GB > > + VirtualMemoryTable[Index].PhysicalBase =3D DEVICE64_BASE; > > + VirtualMemoryTable[Index].VirtualBase =3D > VirtualMemoryTable[Index].PhysicalBase; > > + VirtualMemoryTable[Index].Length =3D DEVICE64_SIZE; > > + VirtualMemoryTable[Index++].Attributes =3D > ARM_MEMORY_REGION_ATTRIBUTE_DEVICE; > > + > > + // End of Table > > + VirtualMemoryTable[Index].PhysicalBase =3D 0; > > + VirtualMemoryTable[Index].VirtualBase =3D 0; > > + VirtualMemoryTable[Index].Length =3D 0; > > + VirtualMemoryTable[Index++].Attributes =3D > (ARM_MEMORY_REGION_ATTRIBUTES)0; > > + > > + ASSERT((Index) <=3D MAX_VIRTUAL_MEMORY_MAP_DESCRIPTORS); > > + > > + *VirtualMemoryMap =3D VirtualMemoryTable; > > +} > > + > > + > > +VOID > > +EFIAPI > > +InitMmu ( > > + VOID > > + ) > > +{ > > + ARM_MEMORY_REGION_DESCRIPTOR *MemoryTable; > > + VOID *TranslationTableBase; > > + UINTN TranslationTableSize; > > + RETURN_STATUS Status; > > + // Construct a Virtual Memory Map for this platform > > + ArmPlatformGetVirtualMemoryMap (&MemoryTable); > > + > > + // Configure the MMU > > + Status =3D ArmConfigureMmu (MemoryTable, &TranslationTableBase, > &TranslationTableSize); > > + if (EFI_ERROR (Status)) { > > + DEBUG ((DEBUG_ERROR, "Error: Failed to enable MMU\n")); > > + } > > +} > > + > > diff --git > a/Platform/Intel/Stratix10/Library/IntelPlatformLib/Stratix10PlatformLib.= c > b/Platform/Intel/Stratix10/Library/IntelPlatformLib/Stratix10PlatformLib.= c > > new file mode 100644 > > index 000000000000..6bee4d5d43e8 > > --- /dev/null > > +++ > b/Platform/Intel/Stratix10/Library/IntelPlatformLib/Stratix10PlatformLib.= c > > @@ -0,0 +1,167 @@ > > +/** @file > > +* > > +* Stratix 10 Platform Library > > +* > > +* Copyright (c) 2019, Intel Corporations All rights reserved. > > +* > > +* This program and the accompanying materials > > +* are licensed and made available under the terms and conditions of t= he > BSD License > > +* which accompanies this distribution. The full text of the license = may be > found at > > +* http://opensource.org/licenses/bsd-license.php > > +* > > +* THE PROGRAM IS DISTRIBUTED UNDER THE BSD LICENSE ON AN "AS IS" > BASIS, > > +* WITHOUT WARRANTIES OR REPRESENTATIONS OF ANY KIND, EITHER > EXPRESS OR IMPLIED. > > +* > > +**/ > > + > > +#include > > +#include > > +#include > > +#include > > +#include > > +#include > > +#include > > + > > +#define ALT_RSTMGR_OFST 0xffd11000 > > +#define ALT_RSTMGR_PER1MODRST_OFST 0x28 > > +#define ALT_RSTMGR_PER1MODRST_WATCHDOG0_SET_MSK > 0x00000001 > > +#define ALT_RSTMGR_PER1MODRST_L4SYSTIMER0_CLR_MSK 0xffffffef > > + > > + > > +VOID > > +AssertWatchDogTimerZeroReset ( > > + VOID > > + ) > > +{ > > + // Assert the Reset signal of Watchdog Timer 0 which may have been > enabled by BootROM > > + MmioOr32 (ALT_RSTMGR_OFST + > > + ALT_RSTMGR_PER1MODRST_OFST, > > + ALT_RSTMGR_PER1MODRST_WATCHDOG0_SET_MSK); > > +} > > + > > +VOID > > +DeassertSystemTimerZeroReset ( > > + VOID > > + ) > > +{ > > + // Assert the Reset signal of Watchdog Timer 0 which may have been > enabled by BootROM > > + MmioAnd32 (ALT_RSTMGR_OFST + > > + ALT_RSTMGR_PER1MODRST_OFST, > > + ALT_RSTMGR_PER1MODRST_L4SYSTIMER0_CLR_MSK); > > +} > > + > > + > > +/** > > + * Return the current Boot Mode > > + * > > + * This function returns the boot reason on the platform > > + * > > + * **/ > > +EFI_BOOT_MODE > > +ArmPlatformGetBootMode ( > > + VOID > > + ) > > +{ > > + return BOOT_WITH_FULL_CONFIGURATION; > > +} > > + > > + > > +/** > > + Initialize controllers that must setup before entering PEI MAIN > > +**/ > > +RETURN_STATUS > > +ArmPlatformInitialize ( > > + IN UINTN MpId > > + ) > > +{ > > + AssertWatchDogTimerZeroReset(); > > + return EFI_SUCCESS; > > +} > > + > > +//--------------------------------------------------------------------= --------------------- > > +// BEGIN ARM CPU RELATED CODE > > +//--------------------------------------------------------------------= --------------------- > > + > > +// This Table will be consume by Hob init code to publish it into HOB = as > MPCore Info > > +// Hob init code will retrieve it by calling PrePeiCoreGetMpCoreInfo v= ia Ppi > > +ARM_CORE_INFO mArmPlatformNullMpCoreInfoTable[] =3D { > > + { > > + // Cluster 0, Core 0 > > + 0x0, 0x0, > > + > > + // MP Core MailBox Set/Get/Clear Addresses and Clear Value > > + (EFI_PHYSICAL_ADDRESS)0, > > + (EFI_PHYSICAL_ADDRESS)0, > > + (EFI_PHYSICAL_ADDRESS)0, > > + (UINT64)0xFFFFFFFF > > + }, > > + { > > + // Cluster 0, Core 1 > > + 0x0, 0x1, > > + > > + // MP Core MailBox Set/Get/Clear Addresses and Clear Value > > + (EFI_PHYSICAL_ADDRESS)0, > > + (EFI_PHYSICAL_ADDRESS)0, > > + (EFI_PHYSICAL_ADDRESS)0, > > + (UINT64)0xFFFFFFFF > > + }, > > + { > > + // Cluster 0, Core 2 > > + 0x0, 0x2, > > + > > + // MP Core MailBox Set/Get/Clear Addresses and Clear Value > > + (EFI_PHYSICAL_ADDRESS)0, > > + (EFI_PHYSICAL_ADDRESS)0, > > + (EFI_PHYSICAL_ADDRESS)0, > > + (UINT64)0xFFFFFFFF > > + }, > > + { > > + // Cluster 0, Core 3 > > + 0x0, 0x3, > > + > > + // MP Core MailBox Set/Get/Clear Addresses and Clear Value > > + (EFI_PHYSICAL_ADDRESS)0, > > + (EFI_PHYSICAL_ADDRESS)0, > > + (EFI_PHYSICAL_ADDRESS)0, > > + (UINT64)0xFFFFFFFF > > + } > > +}; > > + > > +EFI_STATUS > > +PrePeiCoreGetMpCoreInfo ( > > + OUT UINTN *CoreCount, > > + OUT ARM_CORE_INFO **ArmCoreTable > > + ) > > +{ > > + *CoreCount =3D sizeof(mArmPlatformNullMpCoreInfoTable) / > sizeof(ARM_CORE_INFO); > > + *ArmCoreTable =3D mArmPlatformNullMpCoreInfoTable; > > + return EFI_SUCCESS; > > +} > > + > > +// This will be consume by PrePeiCore to install Ppi > > +// Needs to be declared in the file. Otherwise gArmMpCoreInfoPpiGuid i= s > undefined in the contect of PrePeiCore > > +EFI_GUID mArmMpCoreInfoPpiGuid =3D ARM_MP_CORE_INFO_PPI_GUID; > > +ARM_MP_CORE_INFO_PPI mMpCoreInfoPpi =3D { > PrePeiCoreGetMpCoreInfo }; > > + > > +EFI_PEI_PPI_DESCRIPTOR gPlatformPpiTable[] =3D { > > + { > > + EFI_PEI_PPI_DESCRIPTOR_PPI, > > + &mArmMpCoreInfoPpiGuid, > > + &mMpCoreInfoPpi > > + } > > +}; > > + > > +VOID > > +ArmPlatformGetPlatformPpiList ( > > + OUT UINTN *PpiListSize, > > + OUT EFI_PEI_PPI_DESCRIPTOR **PpiList > > + ) > > +{ > > + *PpiListSize =3D sizeof(gPlatformPpiTable); > > + *PpiList =3D gPlatformPpiTable; > > +} > > + > > +//--------------------------------------------------------------------= --------------------- > > +// END ARM CPU RELATED CODE > > +//--------------------------------------------------------------------= --------------------- > > + > > diff --git a/Platform/Intel/Stratix10/Readme.md > b/Platform/Intel/Stratix10/Readme.md > > new file mode 100644 > > index 000000000000..334439fa9a47 > > --- /dev/null > > +++ b/Platform/Intel/Stratix10/Readme.md > > @@ -0,0 +1,61 @@ > > +Intel Stratix 10 Platform > > +=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D= =3D=3D > > + > > +# Summary > > + > > +This is a port of 64-bit Tiano Core UEFI for the Intel Stratix 10 plat= form > > +based on Stratix 10 SX development board. > > + > > +This UEFI port works with ATF + UEFI implementation for Intel Stratix = 10 > board, and > > +will boot to Linux port of Stratix 10. > > + > > +# Status > > + > > +This firmware has been validated to boot to Linux for Stratix 10 that = can > be obtained from > > +https://github.com/altera-opensource/linux-socfpga. > > + > > +The default boot is the UEFI shell. The UEFI > > +shell will run startup.nsh by default, and you may change the startup.= nsh > to run commands on boot. > > + > > +# Building the firmware > > + > > +- Fetch the ATF, edk2, and edk2-platforms repositories into local hos= t. > > + Make all the repositories in the same ${BUILD\_PATH}. > > + > > +- Install the AARCH64 GNU 4.8 toolchain. > > + > > +- Build UEFI using Stratix 10 platform as configuration > > + > > + . edksetup.sh > > + > > + build -a AARCH64 -p Platform/Intel/Stratix10/Stratix10SoCPkg.ds= c -t > GCC48 -b RELEASE -y report.log -j build.log -Y PCD -Y LIBRARY -Y FLASH -Y > DEPEX -Y BUILD_FLAGS -Y FIXED_ADDRESS > > + > > +Note: Refer to build instructions from the top level edk2-platforms > Readme.md for further details > > + > > +- Build ATF for Stratix 10 platform > > + > > + make CROSS_COMPILE=3Daarch64-linux-gnu- device=3Ds10 > > + > > +- Build atf providing the previously generated UEFI as the BL33 image > > + > > + make CROSS_COMPILE=3Daarch64-linux-gnu- bl2 fip PLAT=3Dstratix1= 0 > > + BL33=3DPEI.ROM > > + > > +Install Procedure > > +----------------- > > + > > +- dd fip.bin to a A2 partition on the MMC drive to be booted in Strati= x 10 > > + board. > > + > > +- Generate a SOF containing bl2 > > + > > +.. code:: bash > > + aarch64-linux-gnu-objcopy -I binary -O ihex --change-addresses > 0xffe00000 bl2.bin bl2.hex > > + quartus_cpf --bootloader bl2.hex > > > + > > +- Configure SOF to board > > + > > +.. code:: bash > > + nios2-configure-sof > > + > > + > > diff --git a/Platform/Intel/Stratix10/ShellScript/startup.nsh > b/Platform/Intel/Stratix10/ShellScript/startup.nsh > > new file mode 100644 > > index 000000000000..8c4067972c5b > > --- /dev/null > > +++ b/Platform/Intel/Stratix10/ShellScript/startup.nsh > > @@ -0,0 +1,2 @@ > > +Image dtb=3Dsocfpga_stratix10_socdk.dtb console=3DttyS0,115200 > root=3D/dev/mmcblk0p2 rw rootwait > > + > > diff --git a/Platform/Intel/Stratix10/Stratix10SoCPkg.dec > b/Platform/Intel/Stratix10/Stratix10SoCPkg.dec > > new file mode 100755 > > index 000000000000..5677ac7676d5 > > --- /dev/null > > +++ b/Platform/Intel/Stratix10/Stratix10SoCPkg.dec > > @@ -0,0 +1,30 @@ > > +#/** @file > > +# Intel Stratix 10 SoC FPGA Package > > +# > > +# Copyright (c) 2019, Intel All rights reserved. > > +# > > +# This program and the accompanying materials are licensed and made > available under > > +# the terms and conditions of the BSD License which accompanies thi= s > distribution. > > +# The full text of the license may be found at > > +# http://opensource.org/licenses/bsd-license.php > > +# > > +# THE PROGRAM IS DISTRIBUTED UNDER THE BSD LICENSE ON AN "AS IS" > BASIS, > > +# WITHOUT WARRANTIES OR REPRESENTATIONS OF ANY KIND, EITHER > EXPRESS OR IMPLIED. > > +# > > +#**/ > > + > > +[Defines] > > + DEC_SPECIFICATION =3D 0x00010005 > > + PACKAGE_NAME =3D IntelSoCFpgaPkg > > + PACKAGE_GUID =3D 45533DD0-C41F-4ab6-A5DF-65B52684A= C60 > > + PACKAGE_VERSION =3D 0.1 > > + > > +[Includes.common] > > + > > +[Guids.common] > > + gIntelSocFpgaTokenSpaceGuid =3D { 0xb89b8744, 0x4a1c, 0x4cd6, { 0xb= a, > 0xa, 0x69, 0xb3, 0xfe, 0xe6, 0x91, 0x6b } } > > +[PcdsFeatureFlag.common] > > + > > +[PcdsFixedAtBuild.common] > > + > > + > > diff --git a/Platform/Intel/Stratix10/Stratix10SoCPkg.dsc > b/Platform/Intel/Stratix10/Stratix10SoCPkg.dsc > > new file mode 100755 > > index 000000000000..dc9f41f05ab3 > > --- /dev/null > > +++ b/Platform/Intel/Stratix10/Stratix10SoCPkg.dsc > > @@ -0,0 +1,547 @@ > > +#/** @file > > +# Intel Stratix 10 SoC FPGA Package > > +# > > +# Copyright (c) 2019, Intel All rights reserved. > > +# > > +# This program and the accompanying materials are licensed and made > available under > > +# the terms and conditions of the BSD License which accompanies thi= s > distribution. > > +# The full text of the license may be found at > > +# http://opensource.org/licenses/bsd-license.php > > +# > > +# THE PROGRAM IS DISTRIBUTED UNDER THE BSD LICENSE ON AN "AS IS" > BASIS, > > +# WITHOUT WARRANTIES OR REPRESENTATIONS OF ANY KIND, EITHER > EXPRESS OR IMPLIED. > > +# > > +#**/ > > + > > + > > > +############################################################### > ################# > > +# > > +# Defines Section - statements that will be processed to create a Make= file. > > +# > > > +############################################################### > ################# > > +[Defines] > > + PLATFORM_NAME =3D Intel Stratix 10 SoC Development = Board > > + PLATFORM_GUID =3D A2D10D02-7C36-4de8-831B-EFBFC2092= D1B > > + PLATFORM_VERSION =3D 0.1 > > + FIRMWARE_VERSION =3D 1.0 > > + DSC_SPECIFICATION =3D 0x00010005 > > + SUPPORTED_ARCHITECTURES =3D AARCH64 > > + BUILD_TARGETS =3D DEBUG|RELEASE > > + SKUID_IDENTIFIER =3D DEFAULT > > + FLASH_DEFINITION =3D > Platform/Intel/Stratix10/Stratix10SoCPkg.fdf > > + OUTPUT_DIRECTORY =3D Build/Stratix10SoCPkg > > + USE_ARM_BDS =3D FALSE > > + SECURE_BOOT_ENABLE =3D FALSE > > + > > > +############################################################### > ################# > > +# > > +# Pcd Section - list of all EDK II PCD Entries defined by this Platfor= m > > +# > > > +############################################################### > ################# > > + > > +[PcdsFixedAtBuild.common] > > + > gEfiMdeModulePkgTokenSpaceGuid.PcdEmuVariableNvModeEnable|TRUE > > + gArmPlatformTokenSpaceGuid.PcdCoreCount|1 > > + > > + # Stacks for MPCores in PEI Phase > > + gArmPlatformTokenSpaceGuid.PcdCPUCoresStackBase|0x6d000 > > + gArmPlatformTokenSpaceGuid.PcdCPUCorePrimaryStackSize|0x30000 > > + > > + # ARM L2x0 PCDs > > + gArmTokenSpaceGuid.PcdL2x0ControllerBase|0xFFFFF000 > > + > > + # ARM GIC > > + gArmTokenSpaceGuid.PcdGicDistributorBase|0xFFFC1000 > > + gArmTokenSpaceGuid.PcdGicInterruptInterfaceBase|0xFFFC2000 > > + > > + # ARM Floating Point architecture (VFP) > > + gArmTokenSpaceGuid.PcdVFPEnabled|1 > > + > > + # System Memory (1GB, minus reserved memory for Linux PSCI calls) > > + gArmTokenSpaceGuid.PcdSystemMemoryBase|0x01000000 > > + gArmTokenSpaceGuid.PcdSystemMemorySize|0x3f000000 > > + > > + # Arm Architectural Timer > > + gArmTokenSpaceGuid.PcdArmArchTimerFreqInHz|400000000 > > + > > + # Trustzone Enable > > + gArmTokenSpaceGuid.PcdTrustzoneSupport|TRUE > > + > > + #------------------------------- > > + # gEfiMdeModulePkgTokenSpaceGuid > > + #------------------------------- > > + > gEfiMdeModulePkgTokenSpaceGuid.PcdFirmwareVersionString|L"$(FIRMWA > RE_VERSION)" > > + > > + #------------------------------- > > + # gEfiMdePkgTokenSpaceGuid > > + #------------------------------- > > + gEfiMdePkgTokenSpaceGuid.PcdMaximumUnicodeStringLength|1000000 > > + gEfiMdePkgTokenSpaceGuid.PcdMaximumAsciiStringLength|1000000 > > + gEfiMdePkgTokenSpaceGuid.PcdMaximumLinkedListLength|1000000 > > + gEfiMdePkgTokenSpaceGuid.PcdSpinLockTimeout|10000000 > > + gEfiMdePkgTokenSpaceGuid.PcdDebugClearMemoryValue|0xAF > > + gEfiMdePkgTokenSpaceGuid.PcdPerformanceLibraryPropertyMask|0 > > + gEfiMdePkgTokenSpaceGuid.PcdPostCodePropertyMask|0 > > + gEfiMdePkgTokenSpaceGuid.PcdUefiLibMaxPrintBufferSize|320 > > + > > + # DEBUG_ASSERT_ENABLED 0x01 > > + # DEBUG_PRINT_ENABLED 0x02 > > + # DEBUG_CODE_ENABLED 0x04 > > + # CLEAR_MEMORY_ENABLED 0x08 > > + # ASSERT_BREAKPOINT_ENABLED 0x10 > > + # ASSERT_DEADLOOP_ENABLED 0x20 > > +!if $(TARGET) =3D=3D RELEASE > > + gEfiMdePkgTokenSpaceGuid.PcdDebugPropertyMask|0x2f > > +!else > > + gEfiMdePkgTokenSpaceGuid.PcdDebugPropertyMask|0x2f > > +!endif > > + > > + # DEBUG_INIT 0x00000001 // Initialization > > + # DEBUG_WARN 0x00000002 // Warnings > > + # DEBUG_LOAD 0x00000004 // Load events > > + # DEBUG_FS 0x00000008 // EFI File system > > + # DEBUG_POOL 0x00000010 // Alloc & Free's > > + # DEBUG_PAGE 0x00000020 // Alloc & Free's > > + # DEBUG_INFO 0x00000040 // Verbose > > + # DEBUG_DISPATCH 0x00000080 // PEI/DXE Dispatchers > > + # DEBUG_VARIABLE 0x00000100 // Variable > > + # DEBUG_BM 0x00000400 // Boot Manager > > + # DEBUG_BLKIO 0x00001000 // BlkIo Driver > > + # DEBUG_NET 0x00004000 // SNI Driver > > + # DEBUG_UNDI 0x00010000 // UNDI Driver > > + # DEBUG_LOADFILE 0x00020000 // UNDI Driver > > + # DEBUG_EVENT 0x00080000 // Event messages > > + # DEBUG_GCD 0x00100000 // Global Coherency Database changes > > + # DEBUG_CACHE 0x00200000 // Memory range cachability changes > > + # DEBUG_ERROR 0x80000000 // Error > > +# gEfiMdePkgTokenSpaceGuid.PcdDebugPrintErrorLevel|0x803010CF > > + gEfiMdePkgTokenSpaceGuid.PcdDebugPrintErrorLevel|0x8000000F > > + > > + gEfiMdePkgTokenSpaceGuid.PcdReportStatusCodePropertyMask|0x00 > > + > > + #------------------------------- > > + # gEmbeddedTokenSpaceGuid > > + #------------------------------- > > + > > + # MMC > > + gEmbeddedTokenSpaceGuid.PcdDwEmmcDxeBaseAddress|0xff808000 > > + > gEmbeddedTokenSpaceGuid.PcdDwEmmcDxeClockFrequencyInHz|50000000 > > + > gEmbeddedTokenSpaceGuid.PcdDwEmmcDxeMaxClockFreqInHz|25000000 > > + > > + # > > + # Optional feature to help prevent EFI memory map fragments > > + # Turned on and off via: PcdPrePiProduceMemoryTypeInformationHob > > + # Values are in EFI Pages (4K). DXE Core will make sure that > > + # at least this much of each type of memory can be allocated > > + # from a single memory range. This way you only end up with > > + # maximum of two fragements for each type in the memory map > > + # (the memory used, and the free memory that was prereserved > > + # but not used). > > + # > > + gEmbeddedTokenSpaceGuid.PcdMemoryTypeEfiACPIReclaimMemory|0 > > + gEmbeddedTokenSpaceGuid.PcdMemoryTypeEfiACPIMemoryNVS|0 > > + > gEmbeddedTokenSpaceGuid.PcdMemoryTypeEfiReservedMemoryType|8192 > > + > gEmbeddedTokenSpaceGuid.PcdMemoryTypeEfiRuntimeServicesData|80 > > + > gEmbeddedTokenSpaceGuid.PcdMemoryTypeEfiRuntimeServicesCode|65 > > + gEmbeddedTokenSpaceGuid.PcdMemoryTypeEfiBootServicesCode|400 > > + gEmbeddedTokenSpaceGuid.PcdMemoryTypeEfiBootServicesData|20000 > > + gEmbeddedTokenSpaceGuid.PcdMemoryTypeEfiLoaderCode|20 > > + gEmbeddedTokenSpaceGuid.PcdMemoryTypeEfiLoaderData|0 > > + > > + # We want to use the Shell Libraries but don't want it to initialise > > + # automatically. We initialise the libraries when the command is cal= led by > the > > + # Shell. > > + gEfiShellPkgTokenSpaceGuid.PcdShellLibAutoInitialize|FALSE > > + > > + # Pcd Settings - UART Serial Terminal > > + # Intel Stratix10 SoCFPGA HPS UART0 is 0xFFC02000. > > + # Intel Stratix10 SoCFPGA HPS UART1 is 0xFFC02100. > > + gEfiMdeModulePkgTokenSpaceGuid.PcdSerialUseMmio|TRUE > > + gEfiMdeModulePkgTokenSpaceGuid.PcdSerialRegisterAccessWidth|32 > > + gEfiMdeModulePkgTokenSpaceGuid.PcdSerialRegisterBase|0xFFC02000 > > + gEfiMdeModulePkgTokenSpaceGuid.PcdSerialClockRate|100000000 > > + gEfiMdeModulePkgTokenSpaceGuid.PcdSerialPciDeviceInfo|{0xFF, 0xFF, > 0xFF, 0xFF, 0xFF} > > + gEfiMdeModulePkgTokenSpaceGuid.PcdSerialBaudRate|115200 > > + gEfiMdeModulePkgTokenSpaceGuid.PcdSerialLineControl|0x03 > > + gEfiMdeModulePkgTokenSpaceGuid.PcdSerialRegisterStride|4 > > + > > + gEfiMdePkgTokenSpaceGuid.PcdDefaultTerminalType|4 > > + > > + # ConColumn/Row > > + > #gEfiMdeModulePkgTokenSpaceGuid.PcdConOutColumn|L"ConOutSetupVar > "|gArmGlobalVariableGuid|0x0|132 > > + > #gEfiMdeModulePkgTokenSpaceGuid.PcdConOutRow|L"ConOutSetupVar"|g > ArmGlobalVariableGuid|0x4|43 > > + > > + gEfiMdePkgTokenSpaceGuid.PcdPlatformBootTimeOut|5 > > + > > + # RunAxf support via Dynamic Shell Command protocol > > + # We want to use the Shell Libraries but don't want it to initialise > > + # automatically. We initialise the libraries when the command is cal= led by > the > > + # Shell. > > + gEfiShellPkgTokenSpaceGuid.PcdShellLibAutoInitialize|FALSE > > + > > + > > + gEfiMdeModulePkgTokenSpaceGuid.PcdBootManagerMenuFile|{ 0x21, > 0xaa, 0x2c, 0x46, 0x14, 0x76, 0x03, 0x45, 0x83, 0x6e, 0x8a, 0xb6, 0xf4, 0= x66, > 0x23, 0x31 } > > + > > +!if $(USE_ARM_BDS) =3D=3D FALSE > > + > gEfiMdeModulePkgTokenSpaceGuid.PcdResetOnMemoryTypeInformationCh > ange|FALSE > > +!endif > > + > > +# TODO: Add suppot for secure boot > > +!if $(SECURE_BOOT_ENABLE) =3D=3D TRUE > > + # override the default values from SecurityPkg to ensure images from= all > sources are verified in secure boot > > + > gEfiSecurityPkgTokenSpaceGuid.PcdOptionRomImageVerificationPolicy|0x04 > > + > gEfiSecurityPkgTokenSpaceGuid.PcdFixedMediaImageVerificationPolicy|0x04 > > + > gEfiSecurityPkgTokenSpaceGuid.PcdRemovableMediaImageVerificationPolicy > |0x04 > > +!endif > > + > > + > > +[PcdsFeatureFlag.common] > > + gEfiMdeModulePkgTokenSpaceGuid.PcdHiiOsRuntimeSupport|FALSE > > + > > + > > + # Use the Vector Table location in CpuDxe. We will not copy the Vect= or > Table at PcdCpuVectorBaseAddress > > + gArmTokenSpaceGuid.PcdRelocateVectorTable|FALSE > > + > > + gEfiMdeModulePkgTokenSpaceGuid.PcdTurnOffUsbLegacySupport|TRUE > > + # If TRUE, Graphics Output Protocol will be installed on virtual han= dle > created by ConsplitterDxe. > > + # Set FALSE to save size. > > + gEfiMdeModulePkgTokenSpaceGuid.PcdConOutGopSupport|FALSE > > + > > + #------------------------------- > > + # gEfiMdePkgTokenSpaceGuid > > + #------------------------------- > > + gEfiMdePkgTokenSpaceGuid.PcdComponentNameDisable|TRUE > > + gEfiMdePkgTokenSpaceGuid.PcdDriverDiagnosticsDisable|TRUE > > + gEfiMdePkgTokenSpaceGuid.PcdComponentName2Disable|TRUE > > + gEfiMdePkgTokenSpaceGuid.PcdDriverDiagnostics2Disable|TRUE > > + > > + > > +[LibraryClasses.common] > > + ArmLib|ArmPkg/Library/ArmLib/ArmBaseLib.inf > > + > ArmGenericTimerCounterLib|ArmPkg/Library/ArmGenericTimerPhyCounterL > ib/ArmGenericTimerPhyCounterLib.inf > > + AcpiLib|EmbeddedPkg/Library/AcpiLib/AcpiLib.inf > > + > ArmDisassemblerLib|ArmPkg/Library/ArmDisassemblerLib/ArmDisassembler > Lib.inf > > + ArmGicLib|ArmPkg/Drivers/ArmGic/ArmGicLib.inf > > + > ArmPlatformLib|Platform/Intel/Stratix10/Library/IntelPlatformLib/IntelPla= tfo > rmLib.inf > > + > > + > ReportStatusCodeLib|MdeModulePkg/Library/DxeReportStatusCodeLib/Dxe > ReportStatusCodeLib.inf > > + > FileExplorerLib|MdeModulePkg/Library/FileExplorerLib/FileExplorerLib.inf > > + DxeServicesLib|MdePkg/Library/DxeServicesLib/DxeServicesLib.inf > > + > > + > > + ArmMmuLib|ArmPkg/Library/ArmMmuLib/ArmMmuBaseLib.inf > > + > > + > ArmPlatformStackLib|ArmPlatformPkg/Library/ArmPlatformStackLib/ArmPlat > formStackLib.inf > > + ArmSmcLib|ArmPkg/Library/ArmSmcLib/ArmSmcLib.inf > > + BaseLib|MdePkg/Library/BaseLib/BaseLib.inf > > + BaseMemoryLib|MdePkg/Library/BaseMemoryLib/BaseMemoryLib.inf > > + > CacheMaintenanceLib|ArmPkg/Library/ArmCacheMaintenanceLib/ArmCache > MaintenanceLib.inf > > + > CpuExceptionHandlerLib|ArmPkg/Library/ArmExceptionLib/ArmExceptionLib > .inf > > + PrePiLib|EmbeddedPkg/Library/PrePiLib/PrePiLib.inf > > + CpuLib|MdePkg/Library/BaseCpuLib/BaseCpuLib.inf > > + > DefaultExceptionHandlerLib|ArmPkg/Library/DefaultExceptionHandlerLib/De > faultExceptionHandlerLib.inf > > + DevicePathLib|MdePkg/Library/UefiDevicePathLib/UefiDevicePathLib.inf > > + > DxeServicesTableLib|MdePkg/Library/DxeServicesTableLib/DxeServicesTable > Lib.inf > > + FdtLib|EmbeddedPkg/Library/FdtLib/FdtLib.inf > > + HiiLib|MdeModulePkg/Library/UefiHiiLib/UefiHiiLib.inf > > + HobLib|MdePkg/Library/DxeHobLib/DxeHobLib.inf > > + IoLib|MdePkg/Library/BaseIoLibIntrinsic/BaseIoLibIntrinsic.inf > > + PcdLib|MdePkg/Library/DxePcdLib/DxePcdLib.inf > > + > PeCoffGetEntryPointLib|MdePkg/Library/BasePeCoffGetEntryPointLib/BaseP > eCoffGetEntryPointLib.inf > > + PeCoffLib|MdePkg/Library/BasePeCoffLib/BasePeCoffLib.inf > > + > PerformanceLib|MdePkg/Library/BasePerformanceLibNull/BasePerformance > LibNull.inf > > + PrintLib|MdePkg/Library/BasePrintLib/BasePrintLib.inf > > + > RealTimeClockLib|EmbeddedPkg/Library/VirtualRealTimeClockLib/VirtualRea > lTimeClockLib.inf > > + TimeBaseLib|EmbeddedPkg/Library/TimeBaseLib/TimeBaseLib.inf > > + SemihostLib|ArmPkg/Library/SemihostLib/SemihostLib.inf > > + > > + > SerialPortLib|MdeModulePkg/Library/BaseSerialPortLib16550/BaseSerialPort > Lib16550.inf > > + > PlatformHookLib|MdeModulePkg/Library/BasePlatformHookLibNull/BasePla > tformHookLibNull.inf > > + > > + > SynchronizationLib|MdePkg/Library/BaseSynchronizationLib/BaseSynchroniz > ationLib.inf > > + > UefiBootManagerLib|MdeModulePkg/Library/UefiBootManagerLib/UefiBoot > ManagerLib.inf > > + > PlatformBootManagerLib|ArmPkg/Library/PlatformBootManagerLib/Platfor > mBootManagerLib.inf #thloh > > + BootLogoLib|MdeModulePkg/Library/BootLogoLib/BootLogoLib.inf > #thloh > > + > > + TimerLib|ArmPkg/Library/ArmArchTimerLib/ArmArchTimerLib.inf > > + > > + > UefiApplicationEntryPoint|MdePkg/Library/UefiApplicationEntryPoint/UefiAp > plicationEntryPoint.inf > > + > UefiBootServicesTableLib|MdePkg/Library/UefiBootServicesTableLib/UefiBoo > tServicesTableLib.inf > > + > UefiDecompressLib|MdePkg/Library/BaseUefiDecompressLib/BaseUefiDeco > mpressLib.inf > > + > UefiDriverEntryPoint|MdePkg/Library/UefiDriverEntryPoint/UefiDriverEntryP > oint.inf > > + > UefiHiiServicesLib|MdeModulePkg/Library/UefiHiiServicesLib/UefiHiiService= s > Lib.inf > > + UefiLib|MdePkg/Library/UefiLib/UefiLib.inf > > + UefiRuntimeLib|MdePkg/Library/UefiRuntimeLib/UefiRuntimeLib.inf > > + > UefiRuntimeServicesTableLib|MdePkg/Library/UefiRuntimeServicesTableLib/ > UefiRuntimeServicesTableLib.inf > > + > > + DxeServicesLib|MdePkg/Library/DxeServicesLib/DxeServicesLib.inf > > + > ReportStatusCodeLib|MdeModulePkg/Library/DxeReportStatusCodeLib/Dxe > ReportStatusCodeLib.inf > > + PciLib|MdePkg/Library/BasePciLibPciExpress/BasePciLibPciExpress.inf > > + PciExpressLib|MdePkg/Library/BasePciExpressLib/BasePciExpressLib.inf > > + # > > + # Secure Boot dependencies > > + # > > +!if $(SECURE_BOOT_ENABLE) =3D=3D TRUE > > + IntrinsicLib|CryptoPkg/Library/IntrinsicLib/IntrinsicLib.inf > > + OpensslLib|CryptoPkg/Library/OpensslLib/OpensslLib.inf > > + > TpmMeasurementLib|SecurityPkg/Library/DxeTpmMeasurementLib/DxeTp > mMeasurementLib.inf > > + > AuthVariableLib|SecurityPkg/Library/AuthVariableLib/AuthVariableLib.inf > > + BaseCryptLib|CryptoPkg/Library/BaseCryptLib/BaseCryptLib.inf > > + > > + # re-use the UserPhysicalPresent() dummy implementation from the > ovmf tree > > + > PlatformSecureLib|OvmfPkg/Library/PlatformSecureLib/PlatformSecureLib.in > f > > +!else > > + > TpmMeasurementLib|MdeModulePkg/Library/TpmMeasurementLibNull/Tp > mMeasurementLibNull.inf > > + > AuthVariableLib|MdeModulePkg/Library/AuthVariableLibNull/AuthVariableL > ibNull.inf > > +!endif > > + VarCheckLib|MdeModulePkg/Library/VarCheckLib/VarCheckLib.inf > > + > > +!if $(USE_ARM_BDS) =3D=3D FALSE > > + > CapsuleLib|MdeModulePkg/Library/DxeCapsuleLibNull/DxeCapsuleLibNull.in > f > > + > GenericBdsLib|IntelFrameworkModulePkg/Library/GenericBdsLib/GenericBd > sLib.inf > > + > CustomizedDisplayLib|MdeModulePkg/Library/CustomizedDisplayLib/Custo > mizedDisplayLib.inf > > +!endif > > + > > + #------------------------------- > > + # Networking Requirements > > + #------------------------------- > > + DpcLib|MdeModulePkg/Library/DxeDpcLib/DxeDpcLib.inf > > + IpIoLib|MdeModulePkg/Library/DxeIpIoLib/DxeIpIoLib.inf > > + NetLib|MdeModulePkg/Library/DxeNetLib/DxeNetLib.inf > > + UdpIoLib|MdeModulePkg/Library/DxeUdpIoLib/DxeUdpIoLib.inf > > + > > + #------------------------------- > > + # These libraries are used by the dynamic EFI Shell commands > > + #------------------------------- > > + ShellLib|ShellPkg/Library/UefiShellLib/UefiShellLib.inf > > + FileHandleLib|MdePkg/Library/UefiFileHandleLib/UefiFileHandleLib.inf > > + SortLib|MdeModulePkg/Library/UefiSortLib/UefiSortLib.inf > > + LibC|StdLib/LibC/LibC.inf > > + > > + #------------------------------- > > + # Build Debug / Release > > + #------------------------------- > > +!if $(TARGET) =3D=3D RELEASE > > + DebugLib|MdePkg/Library/BaseDebugLibNull/BaseDebugLibNull.inf > > +!else > > + > DebugLib|MdePkg/Library/BaseDebugLibSerialPort/BaseDebugLibSerialPort.i > nf > > +!endif > > + > > + > DebugAgentLib|MdeModulePkg/Library/DebugAgentLibNull/DebugAgentLib > Null.inf > > + > DebugAgentTimerLib|EmbeddedPkg/Library/DebugAgentTimerLibNull/Debu > gAgentTimerLibNull.inf > > + > DebugPrintErrorLevelLib|MdePkg/Library/BaseDebugPrintErrorLevelLib/Base > DebugPrintErrorLevelLib.inf > > + > PeCoffExtraActionLib|ArmPkg/Library/DebugPeCoffExtraActionLib/DebugPeC > offExtraActionLib.inf > > + > > +[LibraryClasses.common.SEC, LibraryClasses.common.PEI_CORE] > > + ArmLib|ArmPkg/Library/ArmLib/ArmBaseLib.inf > > + ArmMmuLib|ArmPkg/Library/ArmMmuLib/ArmMmuBaseLib.inf > > + > ReportStatusCodeLib|MdeModulePkg/Library/DxeReportStatusCodeLib/Dxe > ReportStatusCodeLib.inf > > + > UefiDecompressLib|MdePkg/Library/BaseUefiDecompressLib/BaseUefiDeco > mpressLib.inf > > + > ExtractGuidedSectionLib|EmbeddedPkg/Library/PrePiExtractGuidedSectionLi > b/PrePiExtractGuidedSectionLib.inf > > + > LzmaDecompressLib|MdeModulePkg/Library/LzmaCustomDecompressLib/Lz > maCustomDecompressLib.inf > > + > > + PeCoffLib|MdePkg/Library/BasePeCoffLib/BasePeCoffLib.inf > > + > > + HobLib|EmbeddedPkg/Library/PrePiHobLib/PrePiHobLib.inf > > + > PrePiHobListPointerLib|ArmPlatformPkg/Library/PrePiHobListPointerLib/PreP > iHobListPointerLib.inf > > + > MemoryAllocationLib|EmbeddedPkg/Library/PrePiMemoryAllocationLib/Pre > PiMemoryAllocationLib.inf > > + > PerformanceLib|MdeModulePkg/Library/PeiPerformanceLib/PeiPerformance > Lib.inf > > + PlatformPeiLib|ArmPlatformPkg/PlatformPei/PlatformPeiLib.inf > > + MemoryInitPeiLib|ArmPlatformPkg/MemoryInitPei/MemoryInitPeiLib.inf > > + > > +[LibraryClasses.common.DXE_DRIVER, > LibraryClasses.common.UEFI_APPLICATION, > LibraryClasses.common.UEFI_DRIVER] > > + > ReportStatusCodeLib|MdeModulePkg/Library/DxeReportStatusCodeLib/Dxe > ReportStatusCodeLib.inf > > + ArmGicArchLib|ArmPkg/Library/ArmGicArchLib/ArmGicArchLib.inf > > + > > +[LibraryClasses.common.PEI_CORE] > > + > ExtractGuidedSectionLib|EmbeddedPkg/Library/PrePiExtractGuidedSectionLi > b/PrePiExtractGuidedSectionLib.inf > > + HobLib|EmbeddedPkg/Library/PrePiHobLib/PrePiHobLib.inf > > + > LzmaDecompressLib|MdeModulePkg/Library/LzmaCustomDecompressLib/Lz > maCustomDecompressLib.inf > > + > MemoryAllocationLib|MdePkg/Library/PeiMemoryAllocationLib/PeiMemory > AllocationLib.inf > > + > OemHookStatusCodeLib|MdeModulePkg/Library/OemHookStatusCodeLibNu > ll/OemHookStatusCodeLibNull.inf > > + > PeCoffGetEntryPointLib|MdePkg/Library/BasePeCoffGetEntryPointLib/BaseP > eCoffGetEntryPointLib.inf > > + > PeiCoreEntryPoint|MdePkg/Library/PeiCoreEntryPoint/PeiCoreEntryPoint.inf > > + PeiServicesLib|MdePkg/Library/PeiServicesLib/PeiServicesLib.inf > > + > PerformanceLib|MdeModulePkg/Library/PeiPerformanceLib/PeiPerformance > Lib.inf > > + > PrePiHobListPointerLib|ArmPlatformPkg/Library/PrePiHobListPointerLib/PreP > iHobListPointerLib.inf > > + PrePiLib|EmbeddedPkg/Library/PrePiLib/PrePiLib.inf > > + #thloh > ReportStatusCodeLib|MdeModulePkg/Library/PeiReportStatusCodeLib/PeiRe > portStatusCodeLib.inf > > + > ReportStatusCodeLib|MdeModulePkg/Library/DxeReportStatusCodeLib/Dxe > ReportStatusCodeLib.inf > > + > UefiDecompressLib|MdePkg/Library/BaseUefiDecompressLib/BaseUefiDeco > mpressLib.inf > > + > PeiCrc32GuidedSectionExtractLib|MdeModulePkg/Library/PeiCrc32GuidedSe > ctionExtractLib/PeiCrc32GuidedSectionExtractLib.inf > > + > > +[LibraryClasses.common.DXE_CORE] > > + PcdLib|MdePkg/Library/BasePcdLibNull/BasePcdLibNull.inf > > + > DxeCoreEntryPoint|MdePkg/Library/DxeCoreEntryPoint/DxeCoreEntryPoint.i > nf > > + DxeServicesLib|MdePkg/Library/DxeServicesLib/DxeServicesLib.inf > > + > ExtractGuidedSectionLib|MdePkg/Library/DxeExtractGuidedSectionLib/DxeE > xtractGuidedSectionLib.inf > > + HobLib|MdePkg/Library/DxeCoreHobLib/DxeCoreHobLib.inf > > + > MemoryAllocationLib|MdeModulePkg/Library/DxeCoreMemoryAllocationLib > /DxeCoreMemoryAllocationLib.inf > > + > PerformanceLib|MdeModulePkg/Library/DxeCorePerformanceLib/DxeCoreP > erformanceLib.inf > > + # thloh > ReportStatusCodeLib|IntelFrameworkModulePkg/Library/DxeReportStatusC > odeLibFramework/DxeReportStatusCodeLib.inf > > + > ReportStatusCodeLib|MdeModulePkg/Library/DxeReportStatusCodeLib/Dxe > ReportStatusCodeLib.inf > > + > UefiDecompressLib|MdePkg/Library/BaseUefiDecompressLib/BaseUefiDeco > mpressLib.inf > > + > > +[LibraryClasses.common.DXE_DRIVER] > > + DxeServicesLib|MdePkg/Library/DxeServicesLib/DxeServicesLib.inf > > + > MemoryAllocationLib|MdePkg/Library/UefiMemoryAllocationLib/UefiMemor > yAllocationLib.inf > > + > SecurityManagementLib|MdeModulePkg/Library/DxeSecurityManagementLi > b/DxeSecurityManagementLib.inf > > + > PerformanceLib|MdeModulePkg/Library/DxePerformanceLib/DxePerforman > ceLib.inf > > + > ReportStatusCodeLib|IntelFrameworkModulePkg/Library/DxeReportStatusC > odeLibFramework/DxeReportStatusCodeLib.inf > > + > > +[LibraryClasses.common.UEFI_APPLICATION] > > + HiiLib|MdeModulePkg/Library/UefiHiiLib/UefiHiiLib.inf > > + > MemoryAllocationLib|MdePkg/Library/UefiMemoryAllocationLib/UefiMemor > yAllocationLib.inf > > + > PerformanceLib|MdeModulePkg/Library/DxePerformanceLib/DxePerforman > ceLib.inf > > + > UefiDecompressLib|MdePkg/Library/BaseUefiDecompressLib/BaseUefiDeco > mpressLib.inf > > + > > +[LibraryClasses.common.UEFI_DRIVER] > > + DxeServicesLib|MdePkg/Library/DxeServicesLib/DxeServicesLib.inf > > + > ExtractGuidedSectionLib|MdePkg/Library/DxeExtractGuidedSectionLib/DxeE > xtractGuidedSectionLib.inf > > + > MemoryAllocationLib|MdePkg/Library/UefiMemoryAllocationLib/UefiMemor > yAllocationLib.inf > > + > PerformanceLib|MdeModulePkg/Library/DxePerformanceLib/DxePerforman > ceLib.inf > > + > ReportStatusCodeLib|IntelFrameworkModulePkg/Library/DxeReportStatusC > odeLibFramework/DxeReportStatusCodeLib.inf > > + > UefiDecompressLib|MdePkg/Library/BaseUefiDecompressLib/BaseUefiDeco > mpressLib.inf > > + > > +[LibraryClasses.common.DXE_RUNTIME_DRIVER] > > +!if $(SECURE_BOOT_ENABLE) =3D=3D TRUE > > + BaseCryptLib|CryptoPkg/Library/BaseCryptLib/RuntimeCryptLib.inf > > +!endif > > + > CapsuleLib|MdeModulePkg/Library/DxeCapsuleLibNull/DxeCapsuleLibNull.in > f > > + HobLib|MdePkg/Library/DxeHobLib/DxeHobLib.inf > > + > MemoryAllocationLib|MdePkg/Library/UefiMemoryAllocationLib/UefiMemor > yAllocationLib.inf > > + > ReportStatusCodeLib|MdeModulePkg/Library/DxeReportStatusCodeLib/Dxe > ReportStatusCodeLib.inf > > + > > +[LibraryClasses.AARCH64.DXE_RUNTIME_DRIVER] > > + # > > + # PSCI support in EL3 may not be available if we are not running und= er a > PSCI > > + # compliant secure firmware, but since the default VExpress > EfiResetSystemLib > > + # cannot be supported at runtime (due to the fact that the syscfg MM= IO > registers > > + # cannot be runtime remapped), it is our best bet to get ResetSystem > functionality > > + # on these platforms. > > + # > > + > EfiResetSystemLib|ArmPkg/Library/ArmPsciResetSystemLib/ArmPsciResetSys > temLib.inf > > + > > +[LibraryClasses.ARM, LibraryClasses.AARCH64] > > + # It is not possible to prevent the ARM compiler for generic intrins= ic > functions. > > + # This library provides the instrinsic functions generate by a given > compiler. > > + # [LibraryClasses.ARM] and NULL mean link this library into all ARM > images. > > + # > > + NULL|ArmPkg/Library/CompilerIntrinsicsLib/CompilerIntrinsicsLib.inf > > + > > + # Add support for GCC stack protector > > + NULL|MdePkg/Library/BaseStackCheckLib/BaseStackCheckLib.inf > > + > > > +############################################################### > ################# > > +# > > +# Components Section - list of all EDK II Modules needed by this Platf= orm > > +# > > > +############################################################### > ################# > > +[Components.common] > > + MdeModulePkg/Universal/PCD/Dxe/Pcd.inf { > > + > > + PcdLib|MdePkg/Library/BasePcdLibNull/BasePcdLibNull.inf > > + } > > + > > + EmbeddedPkg/SimpleTextInOutSerial/SimpleTextInOutSerial.inf > > + > > + ArmPlatformPkg/PrePi/PeiUniCore.inf { > > + > > + PcdLib|MdePkg/Library/BasePcdLibNull/BasePcdLibNull.inf > > + } > > + > > + # > > + # DXE > > + # > > + MdeModulePkg/Core/Dxe/DxeMain.inf { > > + > > + #PcdLib|MdePkg/Library/BasePcdLibNull/BasePcdLibNull.inf > > + > NULL|MdeModulePkg/Library/DxeCrc32GuidedSectionExtractLib/DxeCrc32G > uidedSectionExtractLib.inf > > + } > > + > > + MdeModulePkg/Universal/DevicePathDxe/DevicePathDxe.inf > > + MdeModulePkg/Universal/HiiDatabaseDxe/HiiDatabaseDxe.inf > > + MdeModulePkg/Universal/SetupBrowserDxe/SetupBrowserDxe.inf > > + MdeModulePkg/Universal/DisplayEngineDxe/DisplayEngineDxe.inf > > + MdeModulePkg/Universal/BdsDxe/BdsDxe.inf > > + MdeModulePkg/Application/UiApp/UiApp.inf { > > + > > + > NULL|MdeModulePkg/Library/DeviceManagerUiLib/DeviceManagerUiLib.inf > > + > NULL|MdeModulePkg/Library/BootManagerUiLib/BootManagerUiLib.inf > > + > NULL|MdeModulePkg/Library/BootMaintenanceManagerUiLib/BootMainten > anceManagerUiLib.inf > > + } > > + > > + ArmPkg/Drivers/TimerDxe/TimerDxe.inf > > + ArmPkg/Drivers/ArmGic/ArmGicDxe.inf > > + ArmPkg/Drivers/CpuDxe/CpuDxe.inf > > + ArmPkg/Filesystem/SemihostFs/SemihostFs.inf > > + > > + FatPkg/EnhancedFatDxe/Fat.inf > > + > > + EmbeddedPkg/MetronomeDxe/MetronomeDxe.inf > > + EmbeddedPkg/RealTimeClockRuntimeDxe/RealTimeClockRuntimeDxe.inf > > + EmbeddedPkg/ResetRuntimeDxe/ResetRuntimeDxe.inf > > + MdeModulePkg/Universal/SerialDxe/SerialDxe.inf > > + > > + MdeModulePkg/Core/RuntimeDxe/RuntimeDxe.inf > > + MdeModulePkg/Universal/CapsuleRuntimeDxe/CapsuleRuntimeDxe.inf > > + MdeModulePkg/Universal/Console/ConPlatformDxe/ConPlatformDxe.inf > > + MdeModulePkg/Universal/Console/ConSplitterDxe/ConSplitterDxe.inf > > + > MdeModulePkg/Universal/Console/GraphicsConsoleDxe/GraphicsConsoleDx > e.inf > > + MdeModulePkg/Universal/Console/TerminalDxe/TerminalDxe.inf > > + MdeModulePkg/Universal/Disk/DiskIoDxe/DiskIoDxe.inf > > + MdeModulePkg/Universal/Disk/PartitionDxe/PartitionDxe.inf > > + > MdeModulePkg/Universal/Disk/UnicodeCollation/EnglishDxe/EnglishDxe.inf > > + > MdeModulePkg/Universal/FaultTolerantWriteDxe/FaultTolerantWriteDxe.inf > > + > MdeModulePkg/Universal/FvSimpleFileSystemDxe/FvSimpleFileSystemDxe.in > f > > + > MdeModulePkg/Universal/MonotonicCounterRuntimeDxe/MonotonicCount > erRuntimeDxe.inf > > + MdeModulePkg/Universal/SecurityStubDxe/SecurityStubDxe.inf > > + > MdeModulePkg/Universal/Variable/RuntimeDxe/VariableRuntimeDxe.inf { > > + > > + NULL|MdeModulePkg/Library/VarCheckUefiLib/VarCheckUefiLib.inf > > + } > > + MdeModulePkg/Universal/WatchdogTimerDxe/WatchdogTimer.inf > > + > > + # Multimedia Card Interface > > + EmbeddedPkg/Universal/MmcDxe/MmcDxe.inf > > + EmbeddedPkg/Drivers/DwEmmcDxe/DwEmmcDxe.inf > > + > > + # Shell > > + ShellPkg/Application/Shell/Shell.inf { > > + > > + > ShellCommandLib|ShellPkg/Library/UefiShellCommandLib/UefiShellComman > dLib.inf > > + > NULL|ShellPkg/Library/UefiShellLevel2CommandsLib/UefiShellLevel2Comma > ndsLib.inf > > + > NULL|ShellPkg/Library/UefiShellLevel1CommandsLib/UefiShellLevel1Comma > ndsLib.inf > > + > NULL|ShellPkg/Library/UefiShellLevel3CommandsLib/UefiShellLevel3Comma > ndsLib.inf > > + > NULL|ShellPkg/Library/UefiShellDriver1CommandsLib/UefiShellDriver1Comm > andsLib.inf > > + > NULL|ShellPkg/Library/UefiShellDebug1CommandsLib/UefiShellDebug1Com > mandsLib.inf > > + > NULL|ShellPkg/Library/UefiShellInstall1CommandsLib/UefiShellInstall1Comm > andsLib.inf > > + > NULL|ShellPkg/Library/UefiShellNetwork1CommandsLib/UefiShellNetwork1C > ommandsLib.inf > > + > HandleParsingLib|ShellPkg/Library/UefiHandleParsingLib/UefiHandleParsingL > ib.inf > > + PrintLib|MdePkg/Library/BasePrintLib/BasePrintLib.inf > > + > BcfgCommandLib|ShellPkg/Library/UefiShellBcfgCommandLib/UefiShellBcfgC > ommandLib.inf > > + > > + > > + gEfiMdePkgTokenSpaceGuid.PcdDebugPropertyMask|0xFF > > + gEfiShellPkgTokenSpaceGuid.PcdShellLibAutoInitialize|FALSE > > + gEfiMdePkgTokenSpaceGuid.PcdUefiLibMaxPrintBufferSize|8000 > > + } > > + > > + # > > + # Platform Specific Init for DXE phase > > + # > > + Platform/Intel/Stratix10/Drivers/IntelPlatformDxe/IntelPlatformDxe.i= nf > > + > > +[BuildOptions] > > + #------------------------------- > > + # Common > > + #------------------------------- > > + GCC:RELEASE_*_*_CC_FLAGS =3D -DMDEPKG_NDEBUG -fstack-protector - > O2 -D_FORTIFY_SOURCE=3D2 -Wformat -Wformat-security > > + GCC:RELEASE_*_*_DLINK_FLAGS =3D -z noexecstack -z relro -z now > > + > > + #------------------------------- > > + # IntelPlatformPkg/... > > + #------------------------------- > > + GCC:DEBUG_*_AARCH64_PLATFORM_FLAGS =3D - > I$(WORKSPACE)/Platform/Intel/Stratix10/Include - > I$(WORKSPACE)/Platform/Intel/Stratix10/Include -O0 -Wno-unused-but-set- > variable #-mstrict-align > > + GCC:RELEASE_*_AARCH64_PLATFORM_FLAGS =3D - > I$(WORKSPACE)/Platform/Intel/Stratix10/Include - > I$(WORKSPACE)/Platform/Intel/Stratix10/Include -O0 -DMDEPKG_NDEBUG - > DMDEPKG_NDEBUG # -mstrict-align > > + > > diff --git a/Platform/Intel/Stratix10/Stratix10SoCPkg.fdf > b/Platform/Intel/Stratix10/Stratix10SoCPkg.fdf > > new file mode 100755 > > index 000000000000..cab6536b5350 > > --- /dev/null > > +++ b/Platform/Intel/Stratix10/Stratix10SoCPkg.fdf > > @@ -0,0 +1,270 @@ > > +#/** @file > > +# Intel SoC FPGA Package > > +# > > +# Copyright (c) 2019, Intel All rights reserved. > > +# > > +# This program and the accompanying materials are licensed and made > available under > > +# the terms and conditions of the BSD License which accompanies thi= s > distribution. > > +# The full text of the license may be found at > > +# http://opensource.org/licenses/bsd-license.php > > +# > > +# THE PROGRAM IS DISTRIBUTED UNDER THE BSD LICENSE ON AN "AS IS" > BASIS, > > +# WITHOUT WARRANTIES OR REPRESENTATIONS OF ANY KIND, EITHER > EXPRESS OR IMPLIED. > > +# > > +#**/ > > + > > > +############################################################### > ################# > > +# > > +# FD Section > > +# The [FD] Section is made up of the definition statements and a > > +# description of what goes into the Flash Device Image. Each FD sect= ion > > +# defines one flash "device" image. A flash device image may be one o= f > > +# the following: Removable media bootable image (like a boot floppy > > +# image,) an Option ROM image (that would be "flashed" into an add-in > > +# card,) a System "Flash" image (that would be burned into a system's > > +# flash) or an Update ("Capsule") image that will be used to update an= d > > +# existing system flash. > > +# > > > +############################################################### > ################# > > + > > +[FD.IntelStratix10_EFI] > > +BaseAddress =3D 0x0050000|gArmTokenSpaceGuid.PcdFdBaseAddress # > The base address of the Firmware in remapped DRAM. > > +Size =3D 0x00400000|gArmTokenSpaceGuid.PcdFdSize # Th= e size in > bytes > > +ErasePolarity =3D 1 > > +BlockSize =3D 0x00000001 > > +NumBlocks =3D 0x00400000 > > + > > > +############################################################### > ################# > > +# > > +# FD Region layout > > +# > > +# A Layout Region start with a eight digit hex offset (leading "0x" re= quired) > > +# followed by the pipe "|" character, > > +# followed by the size of the region, also in hex with the leading "0x= " > characters. > > +# Must be defined in ascending order and may not overlap. > > +# Like: > > +# Offset|Size > > +# PcdOffsetCName|PcdSizeCName > > +# RegionType > > +# > > > +############################################################### > ################# > > +0x00000000|0x00400000 > > > +gArmTokenSpaceGuid.PcdFvBaseAddress|gArmTokenSpaceGuid.PcdFvSize > > +FV =3D FV_PEIDXE > > + > > +[FV.FV_PEIDXE] > > +FvAlignment =3D 8 > > +ERASE_POLARITY =3D 1 > > +MEMORY_MAPPED =3D TRUE > > +STICKY_WRITE =3D TRUE > > +LOCK_CAP =3D TRUE > > +LOCK_STATUS =3D TRUE > > +WRITE_DISABLED_CAP =3D TRUE > > +WRITE_ENABLED_CAP =3D TRUE > > +WRITE_STATUS =3D TRUE > > +WRITE_LOCK_CAP =3D TRUE > > +WRITE_LOCK_STATUS =3D TRUE > > +READ_DISABLED_CAP =3D TRUE > > +READ_ENABLED_CAP =3D TRUE > > +READ_STATUS =3D TRUE > > +READ_LOCK_CAP =3D TRUE > > +READ_LOCK_STATUS =3D TRUE > > + > > + INF ArmPlatformPkg/PrePi/PeiUniCore.inf > > + > > + FILE FV_IMAGE =3D 9E21FD93-9C72-4c15-8C4B-E77F1DB2D792 { > > + SECTION GUIDED EE4E5898-3914-4259-9D6E-DC7BD79403CF > PROCESSING_REQUIRED =3D TRUE { > > + SECTION FV_IMAGE =3D FV_DXE > > + } > > + } > > + > > +[FV.FV_DXE] > > +BlockSize =3D 0x00000001 > > +NumBlocks =3D 0 # This FV gets compressed so make it = just big > enough > > +FvAlignment =3D 8 # FV alignment and FV attributes sett= ing. > > +ERASE_POLARITY =3D 1 > > +MEMORY_MAPPED =3D TRUE > > +STICKY_WRITE =3D TRUE > > +LOCK_CAP =3D TRUE > > +LOCK_STATUS =3D TRUE > > +WRITE_DISABLED_CAP =3D TRUE > > +WRITE_ENABLED_CAP =3D TRUE > > +WRITE_STATUS =3D TRUE > > +WRITE_LOCK_CAP =3D TRUE > > +WRITE_LOCK_STATUS =3D TRUE > > +READ_DISABLED_CAP =3D TRUE > > +READ_ENABLED_CAP =3D TRUE > > +READ_STATUS =3D TRUE > > +READ_LOCK_CAP =3D TRUE > > +READ_LOCK_STATUS =3D TRUE > > +FvNameGuid =3D 5eda4200-2c5f-43cb-9da3-0baf74b1b30c > > + > > + INF MdeModulePkg/Core/Dxe/DxeMain.inf > > + INF MdeModulePkg/Universal/PCD/Dxe/Pcd.inf > > + INF > EmbeddedPkg/RealTimeClockRuntimeDxe/RealTimeClockRuntimeDxe.inf > > + > > + # > > + # PI DXE Drivers producing Architectural Protocols (EFI Services) > > + # > > + INF ArmPkg/Drivers/CpuDxe/CpuDxe.inf > > + INF MdeModulePkg/Core/RuntimeDxe/RuntimeDxe.inf > > + INF MdeModulePkg/Universal/SecurityStubDxe/SecurityStubDxe.inf > > + INF > MdeModulePkg/Universal/CapsuleRuntimeDxe/CapsuleRuntimeDxe.inf > > + INF > MdeModulePkg/Universal/Variable/RuntimeDxe/VariableRuntimeDxe.inf > > + INF > MdeModulePkg/Universal/FaultTolerantWriteDxe/FaultTolerantWriteDxe.inf > > + INF > MdeModulePkg/Universal/MonotonicCounterRuntimeDxe/MonotonicCount > erRuntimeDxe.inf > > + INF EmbeddedPkg/ResetRuntimeDxe/ResetRuntimeDxe.inf > > + INF EmbeddedPkg/MetronomeDxe/MetronomeDxe.inf > > + INF EmbeddedPkg/SimpleTextInOutSerial/SimpleTextInOutSerial.inf > > + > > + # Multiple Console IO support > > + INF > MdeModulePkg/Universal/Console/ConPlatformDxe/ConPlatformDxe.inf > > + INF > MdeModulePkg/Universal/Console/ConSplitterDxe/ConSplitterDxe.inf > > + INF MdeModulePkg/Universal/Console/TerminalDxe/TerminalDxe.inf > > + INF MdeModulePkg/Universal/SerialDxe/SerialDxe.inf > > + INF MdeModulePkg/Universal/HiiDatabaseDxe/HiiDatabaseDxe.inf > > + > > + # ARM packages > > + INF ArmPkg/Drivers/ArmGic/ArmGicDxe.inf > > + INF ArmPkg/Drivers/TimerDxe/TimerDxe.inf > > + INF MdeModulePkg/Universal/WatchdogTimerDxe/WatchdogTimer.inf > > + > > + # FAT filesystem + GPT/MBR partitioning > > + INF MdeModulePkg/Universal/Disk/DiskIoDxe/DiskIoDxe.inf > > + INF MdeModulePkg/Universal/Disk/PartitionDxe/PartitionDxe.inf > > + INF FatPkg/EnhancedFatDxe/Fat.inf > > + INF > MdeModulePkg/Universal/Disk/UnicodeCollation/EnglishDxe/EnglishDxe.inf > > + > > + # Multimedia Card Interface > > + INF EmbeddedPkg/Universal/MmcDxe/MmcDxe.inf > > + INF EmbeddedPkg/Drivers/DwEmmcDxe/DwEmmcDxe.inf > > + > > + # Platform Specific Init for DXE phase > > + INF > Platform/Intel/Stratix10/Drivers/IntelPlatformDxe/IntelPlatformDxe.inf > > + > > + # UEFI application (Shell Embedded Boot Loader) > > + INF ShellPkg/Application/Shell/Shell.inf > > + > > + # Bds > > + INF MdeModulePkg/Universal/DevicePathDxe/DevicePathDxe.inf > > + INF MdeModulePkg/Universal/BdsDxe/BdsDxe.inf > > + INF MdeModulePkg/Application/UiApp/UiApp.inf > > + INF MdeModulePkg/Universal/DisplayEngineDxe/DisplayEngineDxe.inf > > + INF MdeModulePkg/Universal/SetupBrowserDxe/SetupBrowserDxe.inf > > + > > + # FV Filesystem > > + INF > MdeModulePkg/Universal/FvSimpleFileSystemDxe/FvSimpleFileSystemDxe.in > f > > + > > + # Include UEFI Shell Start Up Script > > + FILE FREEFORM =3D AF3F9E26-DDB5-4e85-B4D7-AC60A2772BC2 { > > + SECTION RAW =3D Platform/Intel/Stratix10/ShellScript/startup.nsh > > + SECTION UI =3D "startup.nsh" > > + } > > + > > + > > + > > > +############################################################### > ################# > > +# > > +# Rules are use with the [FV] section's module INF type to define > > +# how an FFS file is created for a given INF file. The following Rule = are the > default > > +# rules for the different module type. User can add the customized rul= es > to define the > > +# content of the FFS file. > > +# > > > +############################################################### > ################# > > + > > + > > > +############################################################### > ############# > > +# Example of a DXE_DRIVER FFS file with a Checksum encapsulation > section # > > > +############################################################### > ############# > > +# > > +#[Rule.Common.DXE_DRIVER] > > +# FILE DRIVER =3D $(NAMED_GUID) { > > +# DXE_DEPEX DXE_DEPEX Optional > $(INF_OUTPUT)/$(MODULE_NAME).depex > > +# COMPRESS PI_STD { > > +# GUIDED { > > +# PE32 PE32 $(INF_OUTPUT)/$(MODULE_NAME)= .efi > > +# UI STRING=3D"$(MODULE_NAME)" Optional > > +# VERSION STRING=3D"$(INF_VERSION)" Optional > BUILD_NUM=3D$(BUILD_NUMBER) > > +# } > > +# } > > +# } > > +# > > > +############################################################### > ############# > > + > > +[Rule.Common.SEC] > > + FILE SEC =3D $(NAMED_GUID) RELOCS_STRIPPED FIXED { > > + TE TE Align =3D Auto $(INF_OUTPUT)/$(MODULE_NAME)= .efi > > + } > > + > > +[Rule.Common.PEI_CORE] > > + FILE PEI_CORE =3D $(NAMED_GUID) FIXED { > > + TE TE Align =3D Auto $(INF_OUTPUT)/$(MODULE_NAME)= .efi > > + UI STRING =3D"$(MODULE_NAME)" Optional > > + } > > + > > +[Rule.Common.PEIM] > > + FILE PEIM =3D $(NAMED_GUID) FIXED { > > + PEI_DEPEX PEI_DEPEX Optional > $(INF_OUTPUT)/$(MODULE_NAME).depex > > + TE TE Align =3D Auto $(INF_OUTPUT)/$(MODULE_NAME)= .efi > > + UI STRING=3D"$(MODULE_NAME)" Optional > > + } > > + > > +[Rule.Common.PEIM.TIANOCOMPRESSED] > > + FILE PEIM =3D $(NAMED_GUID) DEBUG_MYTOOLS_IA32 { > > + PEI_DEPEX PEI_DEPEX Optional > $(INF_OUTPUT)/$(MODULE_NAME).depex > > + GUIDED A31280AD-481E-41B6-95E8-127F4C984779 > PROCESSING_REQUIRED =3D TRUE { > > + PE32 PE32 $(INF_OUTPUT)/$(MODULE_NAME).e= fi > > + UI STRING=3D"$(MODULE_NAME)" Optional > > + } > > + } > > + > > +[Rule.Common.DXE_CORE] > > + FILE DXE_CORE =3D $(NAMED_GUID) { > > + PE32 PE32 $(INF_OUTPUT)/$(MODULE_NAME).e= fi > > + UI STRING=3D"$(MODULE_NAME)" Optional > > + } > > + > > +[Rule.Common.UEFI_DRIVER] > > + FILE DRIVER =3D $(NAMED_GUID) { > > + DXE_DEPEX DXE_DEPEX Optional > $(INF_OUTPUT)/$(MODULE_NAME).depex > > + PE32 PE32 $(INF_OUTPUT)/$(MODULE_NAME).e= fi > > + UI STRING=3D"$(MODULE_NAME)" Optional > > + } > > + > > +[Rule.Common.DXE_DRIVER] > > + FILE DRIVER =3D $(NAMED_GUID) { > > + DXE_DEPEX DXE_DEPEX Optional > $(INF_OUTPUT)/$(MODULE_NAME).depex > > + PE32 PE32 $(INF_OUTPUT)/$(MODULE_NAME).e= fi > > + UI STRING=3D"$(MODULE_NAME)" Optional > > + } > > + > > +[Rule.Common.DXE_RUNTIME_DRIVER] > > + FILE DRIVER =3D $(NAMED_GUID) { > > + DXE_DEPEX DXE_DEPEX Optional > $(INF_OUTPUT)/$(MODULE_NAME).depex > > + PE32 PE32 $(INF_OUTPUT)/$(MODULE_NAME).e= fi > > + UI STRING=3D"$(MODULE_NAME)" Optional > > + } > > + > > +[Rule.Common.UEFI_APPLICATION] > > + FILE APPLICATION =3D $(NAMED_GUID) { > > + UI STRING =3D"$(MODULE_NAME)" Optional > > + PE32 PE32 $(INF_OUTPUT)/$(MODULE_NAME).e= fi > > + } > > + > > +[Rule.Common.UEFI_DRIVER.BINARY] > > + FILE DRIVER =3D $(NAMED_GUID) { > > + DXE_DEPEX DXE_DEPEX Optional |.depex > > + PE32 PE32 |.efi > > + UI STRING=3D"$(MODULE_NAME)" Optional > > + VERSION STRING=3D"$(INF_VERSION)" Optional > BUILD_NUM=3D$(BUILD_NUMBER) > > + } > > + > > +[Rule.Common.UEFI_APPLICATION.BINARY] > > + FILE APPLICATION =3D $(NAMED_GUID) { > > + PE32 PE32 |.efi > > + UI STRING=3D"$(MODULE_NAME)" Optional > > + VERSION STRING=3D"$(INF_VERSION)" Optional > BUILD_NUM=3D$(BUILD_NUMBER) > > + } > > + > > + > > + > > -- > > 2.2.2 > >