From mboxrd@z Thu Jan 1 00:00:00 1970 Received: from loongson.cn (loongson.cn [114.242.206.163]) by mx.groups.io with SMTP id smtpd.web11.3743.1668159833543310644 for ; Fri, 11 Nov 2022 01:43:55 -0800 Authentication-Results: mx.groups.io; dkim=missing; spf=pass (domain: loongson.cn, ip: 114.242.206.163, mailfrom: lichao@loongson.cn) Received: from loongson.cn (unknown [10.40.24.149]) by gateway (Coremail) with SMTP id _____8BxbbZYGW5jMRYGAA--.7362S3; Fri, 11 Nov 2022 17:43:52 +0800 (CST) Received: from lichao-PC (unknown [10.40.24.149]) by localhost.localdomain (Coremail) with SMTP id AQAAf8Dx_eFWGW5j2dIQAA--.45735S2; Fri, 11 Nov 2022 17:43:50 +0800 (CST) Date: Fri, 11 Nov 2022 17:43:50 +0800 From: "Chao Li" To: "=?utf-8?Q?devel=40edk2.groups.io?=" , "=?utf-8?Q?lixianglai=40loongson.cn?=" Cc: "=?utf-8?Q?devel=40edk2.groups.io?=" , Bibo Mao , Leif Lindholm , Liming Gao , Michael D Kinney Message-ID: In-Reply-To: References: Subject: Re: [edk2-devel] [edk2-platforms][PATCH V5 07/15] Platform/Loongson: Support PEI phase. X-Mailer: Mailspring MIME-Version: 1.0 X-CM-TRANSID: AQAAf8Dx_eFWGW5j2dIQAA--.45735S2 X-CM-SenderInfo: xolfxt3r6o00pqjv00gofq/1tbiAQAHCGNs6eQZ0AAbse X-Coremail-Antispam: 1Uk129KBjvAXoWfAw1ktFyftF13KF1rKryUZFb_yoW5XF13Go W8JF92kw4UGr4rXw1UG3ZxtrWIv3WYqa1Yqr1rZa4UAFs0yr13tF98J3s7Gr15AFn8Awn8 G3yfGaykJFW2q3s5n29KB7ZKAUJUUUUk529EdanIXcx71UUUUU7KY7ZEXasCq-sGcSsGvf J3Ec02F40Eb7x2x7xS6r1j6r4UMc02F40EFcxC0VAKzVAqx4xG6I80ewAqx4xG64kEw2xG 04xIwI0_Xr0_WrUv73VFW2AGmfu7bjvjm3AaLaJ3UjIYCTnIWjp_UUUOf7kC6x804xWl14 x267AKxVWUJVW8JwAFc2x0x2IEx4CE42xK8VAvwI8IcIk0rVWrJVCq3wAFIxvE14AKwVWU JVWUGwA2ocxC64kIII0Yj41l84x0c7CEw4AK67xGY2AK021l84ACjcxK6xIIjxv20xvE14 v26ryj6F1UM28EF7xvwVC0I7IYx2IY6xkF7I0E14v26r4j6F4UM28EF7xvwVC2z280aVAF wI0_Cr1j6rxdM28EF7xvwVC2z280aVCY1x0267AKxVWxJr0_GcWln4kS14v26r1q6r43M2 AIxVAIcxkEcVAq07x20xvEncxIr21l57IF6xkI12xvs2x26I8E6xACxx1l5I8CrVAYj202 j2C_Jr0_Gr1l5I8CrVACY4xI64kE6c02F40Ex7xfMc02F40Ew4AK048IF2xKxVW5JVWrJw Av7VC0I7IYx2IY67AKxVWUtVWrXwAv7VC2z280aVAFwI0_Gr0_Cr1lOx8S6xCaFVCjc4AY 6r1j6r4UM4x0Y48IcxkI7VAKI48JMx8GjcxK6IxK0xIIj40E5I8CrwCY1x0262kKe7AKxV WUtVW8ZwCF04k20xvY0x0EwIxGrwCFx2IqxVCFs4IE7xkEbVWUJVW8JwC20s026c02F40E 14v26r106r1rMI8I3I0E7480Y4vE14v26r106r1rMI8E67AF67kF1VAFwI0_JF0_Jw1lIx kGc2Ij64vIr41lIxAIcVC0I7IYx2IY67AKxVW5JVW7JwCI42IY6xIIjxv20xvEc7CjxVAF wI0_Gr0_Cr1lIxAIcVCF04k26cxKx2IYs7xG6r1j6r1xMIIF0xvEx4A2jsIE14v26r4j6F 4UMIIF0xvEx4A2jsIEc7CjxVAFwI0_Gr0_Gr1UYxBIdaVFxhVjvjDU0xZFpf9x07jIiihU UUUU= Content-Type: multipart/alternative; boundary="636e1956_1c0332a9_1e57b" --636e1956_1c0332a9_1e57b Content-Type: text/plain; charset="utf-8" Content-Transfer-Encoding: quoted-printable Content-Disposition: inline Reviewed-by: Chao Li Thanks, Chao -------- On 11=E6=9C=88 11 2022, at 5:12 =E4=B8=8B=E5=8D=88, =22xianglai=22 wrote: > Platform PEI module for LoongArch platform initialization. > > > > RE=46: https://bugzilla.tianocore.org/show=5Fbug.cgi=3Fid=3D4054 > > > Cc: Bibo Mao > Cc: Chao Li > Cc: Leif Lindholm > Cc: Liming Gao > Cc: Michael D Kinney > Signed-off-by: xianglai li > --- > .../Loongson/LoongArchQemuPkg/Loongson.dec =7C 23 ++ > .../Loongson/LoongArchQemuPkg/Loongson.dsc =7C 64 +++++ > .../Loongson/LoongArchQemuPkg/Loongson.fdf =7C 51 ++++ > .../LoongArchQemuPkg/PlatformPei/=46v.c =7C 58 ++++ > .../LoongArchQemuPkg/PlatformPei/MemDetect.c =7C 104 +++++++ > .../LoongArchQemuPkg/PlatformPei/Platform.c =7C 261 ++++++++++++++++++ > .../LoongArchQemuPkg/PlatformPei/Platform.h =7C 86 ++++++ > .../PlatformPei/PlatformPei.inf =7C 72 +++++ > 8 files changed, 719 insertions(+) > create mode 100644 Platform/Loongson/LoongArchQemuPkg/PlatformPei/=46v.= c > create mode 100644 Platform/Loongson/LoongArchQemuPkg/PlatformPei/MemDe= tect.c > create mode 100644 Platform/Loongson/LoongArchQemuPkg/PlatformPei/Platf= orm.c > create mode 100644 Platform/Loongson/LoongArchQemuPkg/PlatformPei/Platf= orm.h > create mode 100644 Platform/Loongson/LoongArchQemuPkg/PlatformPei/Platf= ormPei.inf > > > diff --git a/Platform/Loongson/LoongArchQemuPkg/Loongson.dec b/Platform= /Loongson/LoongArchQemuPkg/Loongson.dec > index 61f600b20d..aeae75a678 100644 > --- a/Platform/Loongson/LoongArchQemuPkg/Loongson.dec > +++ b/Platform/Loongson/LoongArchQemuPkg/Loongson.dec > =40=40 -32,7 +32,30 =40=40 > =5BPcds=46ixedAtBuild, PcdsDynamic=5D > gLoongArchQemuPkgTokenSpaceGuid.Pcd=46lashPei=46vBase=7C0x0=7CUINT64=7C= 0x00000000 > gLoongArchQemuPkgTokenSpaceGuid.Pcd=46lashPei=46vSize=7C0x0=7CUINT32=7C= 0x00000001 > + gLoongArchQemuPkgTokenSpaceGuid.Pcd=46lashDxe=46vBase=7C0x0=7CUINT64=7C= 0x00000003 > + gLoongArchQemuPkgTokenSpaceGuid.Pcd=46lashDxe=46vSize=7C0x0=7CUINT32=7C= 0x00000004 > + gLoongArchQemuPkgTokenSpaceGuid.PcdDeviceTreeBase=7C0x0=7CUINT64=7C0x= 00000009 > + gLoongArchQemuPkgTokenSpaceGuid.PcdDeviceTreePadding=7C256=7CUINT32=7C= 0x0000000a > + > gLoongArchQemuPkgTokenSpaceGuid.PcdSecPeiTempRamBase=7C0=7CUINT64=7C0x0= 000000b > gLoongArchQemuPkgTokenSpaceGuid.PcdSecPeiTempRamSize=7C0=7CUINT32=7C0x0= 000000c > + gLoongArchQemuPkgTokenSpaceGuid.PcdUefiRamTop=7C0x0=7CUINT64=7C0x0000= 000d > + gLoongArchQemuPkgTokenSpaceGuid.PcdRamRegionsBottom=7C0x0=7CUINT64=7C= 0x0000000e > gLoongArchQemuPkgTokenSpaceGuid.Pcd=46lashSec=46vBase=7C0x0=7CUINT64=7C= 0x0000000f > gLoongArchQemuPkgTokenSpaceGuid.Pcd=46lashSec=46vSize=7C0x0=7CUINT32=7C= 0x00000010 > + > +=23=23 In the Pcds=46ixedAtBuild.LOONGARCH64 area, numbers start at 0x= 10000. > +=5BPcds=46ixedAtBuild.LOONGARCH64=5D > + gEmbeddedTokenSpaceGuid.PcdPrePiCpuMemorySize=7C32=7CUINT8=7C0x000100= 00 > + gEmbeddedTokenSpaceGuid.PcdPrePiCpuIoSize=7C0=7CUINT8=7C0x00010001 > + > +=23=23 In the PcdsDynamic area, numbers start at 0x20000. > +=5BPcdsDynamic=5D > + gLoongArchQemuPkgTokenSpaceGuid.PcdRamSize=7C0x40000000=7CUINT64=7C0x= 00020000 > + gLoongArchQemuPkgTokenSpaceGuid.Pcd=46wCfgSelectorAddress=7C0x0=7CUIN= T64=7C0x00020001 > + gLoongArchQemuPkgTokenSpaceGuid.Pcd=46wCfgDataAddress=7C0x0=7CUINT64=7C= 0x00020002 > + gLoongArchQemuPkgTokenSpaceGuid.PcdSwapPageDir=7C0x0=7CUINT64=7C0x000= 20003 > + gLoongArchQemuPkgTokenSpaceGuid.PcdInvalidPgd=7C0x0=7CUINT64=7C0x0002= 0004 > + gLoongArchQemuPkgTokenSpaceGuid.PcdInvalidPud=7C0x0=7CUINT64=7C0x0002= 0005 > + gLoongArchQemuPkgTokenSpaceGuid.PcdInvalidPmd=7C0x0=7CUINT64=7C0x0002= 0006 > + gLoongArchQemuPkgTokenSpaceGuid.PcdInvalidPte=7C0x0=7CUINT64=7C0x0002= 0007 > diff --git a/Platform/Loongson/LoongArchQemuPkg/Loongson.dsc b/Platform= /Loongson/LoongArchQemuPkg/Loongson.dsc > index b506f70625..b78a7e3b49 100644 > --- a/Platform/Loongson/LoongArchQemuPkg/Loongson.dsc > +++ b/Platform/Loongson/LoongArchQemuPkg/Loongson.dsc > =40=40 -56,16 +56,53 =40=40 > > > =5BLibraryClasses.common=5D > PcdLib =7C MdePkg/Library/BasePcdLibNull/BasePcdLibNull.inf > + TimerLib =7C Platform/Loongson/LoongArchQemuPkg/Library/StableTimerLi= b/TimerLib.inf > PrintLib =7C MdePkg/Library/BasePrintLib/BasePrintLib.inf > BaseMemoryLib =7C MdePkg/Library/BaseMemoryLib/BaseMemoryLib.inf > BaseLib =7C MdePkg/Library/BaseLib/BaseLib.inf > + PerformanceLib =7C MdePkg/Library/BasePerformanceLibNull/BasePerforma= nceLibNull.inf > PeCoffLib =7C MdePkg/Library/BasePeCoffLib/BasePeCoffLib.inf > + CacheMaintenanceLib =7C MdePkg/Library/BaseCacheMaintenanceLib/BaseCa= cheMaintenanceLib.inf > + UefiDecompressLib =7C MdePkg/Library/BaseUefiDecompressLib/BaseUefiDe= compressLib.inf > PeCoffGetEntryPointLib =7C MdePkg/Library/BasePeCoffGetEntryPointLib/Ba= sePeCoffGetEntryPointLib.inf > IoLib =7C MdePkg/Library/BaseIoLibIntrinsic/BaseIoLibIntrinsic.inf > SerialPortLib =7C Platform/Loongson/LoongArchQemuPkg/Library/SerialPort= Lib/SerialPortLib.inf > DebugPrintErrorLevelLib =7C MdePkg/Library/BaseDebugPrintErrorLevelLib/= BaseDebugPrintErrorLevelLib.inf > + =46dtLib =7C EmbeddedPkg/Library/=46dtLib/=46dtLib.inf > PeCoffExtraActionLib =7C MdePkg/Library/BasePeCoffExtraActionLibNull/Ba= sePeCoffExtraActionLibNull.inf > DebugAgentLib =7C MdeModulePkg/Library/DebugAgentLibNull/DebugAgentLibN= ull.inf > + PeiServicesLib =7C MdePkg/Library/PeiServicesLib/PeiServicesLib.inf > + > +=5BLibraryClasses.common.SEC=5D > + ReportStatusCodeLib =7C MdeModulePkg/Library/PeiReportStatusCodeLib/P= eiReportStatusCodeLib.inf > + HobLib =7C MdePkg/Library/PeiHobLib/PeiHobLib.inf > + MemoryAllocationLib =7C MdePkg/Library/PeiMemoryAllocationLib/PeiMemo= ryAllocationLib.inf > + > +=5BLibraryClasses.common.PEI=5FCORE=5D > + HobLib =7C MdePkg/Library/PeiHobLib/PeiHobLib.inf > + PeiServicesTablePointerLib =7C Platform/Loongson/LoongArchQemuPkg/Lib= rary/PeiServicesTablePointerLib/PeiServicesTablePointerLib.inf > + MemoryAllocationLib =7C MdePkg/Library/PeiMemoryAllocationLib/PeiMemo= ryAllocationLib.inf > + PeiCoreEntryPoint =7C MdePkg/Library/PeiCoreEntryPoint/PeiCoreEntryPo= int.inf > + ReportStatusCodeLib =7C MdeModulePkg/Library/PeiReportStatusCodeLib/P= eiReportStatusCodeLib.inf > + OemHookStatusCodeLib =7C MdeModulePkg/Library/OemHookStatusCodeLibNul= l/OemHookStatusCodeLibNull.inf > + PeCoffGetEntryPointLib =7C MdePkg/Library/BasePeCoffGetEntryPointLib/= BasePeCoffGetEntryPointLib.inf > + Qemu=46wCfgLib =7C Platform/Loongson/LoongArchQemuPkg/Library/Qemu=46= wCfgLib/Qemu=46wCfgPeiLib.inf > + MmuLib =7C Platform/Loongson/LoongArchQemuPkg/Library/MmuLib/MmuBaseL= ibPei.inf > + > +=5BLibraryClasses.common.PEIM=5D > + HobLib =7C MdePkg/Library/PeiHobLib/PeiHobLib.inf > + PeiServicesTablePointerLib =7C Platform/Loongson/LoongArchQemuPkg/Lib= rary/PeiServicesTablePointerLib/PeiServicesTablePointerLib.inf > + MemoryAllocationLib =7C MdePkg/Library/PeiMemoryAllocationLib/PeiMemo= ryAllocationLib.inf > + PeimEntryPoint =7C MdePkg/Library/PeimEntryPoint/PeimEntryPoint.inf > + ReportStatusCodeLib =7C MdeModulePkg/Library/PeiReportStatusCodeLib/P= eiReportStatusCodeLib.inf > + OemHookStatusCodeLib =7C MdeModulePkg/Library/OemHookStatusCodeLibNul= l/OemHookStatusCodeLibNull.inf > + PeCoffGetEntryPointLib =7C MdePkg/Library/BasePeCoffGetEntryPointLib/= BasePeCoffGetEntryPointLib.inf > + PeiResourcePublicationLib =7C MdePkg/Library/PeiResourcePublicationLi= b/PeiResourcePublicationLib.inf > + ExtractGuidedSectionLib =7C MdePkg/Library/PeiExtractGuidedSectionLib= /PeiExtractGuidedSectionLib.inf > + PcdLib =7C MdePkg/Library/PeiPcdLib/PeiPcdLib.inf > + Qemu=46wCfgS3Lib =7C OvmfPkg/Library/Qemu=46wCfgS3Lib/PeiQemu=46wCfgS= 3Lib=46wCfg.inf > + Qemu=46wCfgLib =7C Platform/Loongson/LoongArchQemuPkg/Library/Qemu=46= wCfgLib/Qemu=46wCfgPeiLib.inf > + MmuLib =7C Platform/Loongson/LoongArchQemuPkg/Library/MmuLib/MmuBaseL= ibPei.inf > > > =23=23=23=23=23=23=23=23=23=23=23=23=23=23=23=23=23=23=23=23=23=23=23=23= =23=23=23=23=23=23=23=23=23=23=23=23=23=23=23=23=23=23=23=23=23=23=23=23=23= =23=23=23=23=23=23=23=23=23=23=23=23=23=23=23=23=23=23=23=23=23=23=23=23=23= =23=23=23=23=23=23 > =23 > =40=40 -111,8 +148,16 =40=40 > =23 ASSERT=5FBREAKPOINT=5FENABLED 0x10 > =23 ASSERT=5FDEADLOOP=5FENABLED 0x20 > > > +=23=23=23=23=23=23=23=23=23=23=23=23=23=23=23=23=23=23=23=23=23=23=23=23= =23=23=23=23=23=23=23=23=23=23=23=23=23=23=23=23=23=23=23=23=23=23=23=23=23= =23=23=23=23=23=23=23=23=23=23=23=23=23=23=23=23=23=23=23=23=23=23=23=23=23= =23=23=23=23=23=23=23=23=23=23=23=23=23 > gLoongArchQemuPkgTokenSpaceGuid.PcdSecPeiTempRamBase =7C 0x10000 > gLoongArchQemuPkgTokenSpaceGuid.PcdSecPeiTempRamSize =7C 0x10000 > + gLoongArchQemuPkgTokenSpaceGuid.PcdDeviceTreeBase =7C 0x200000 > + =23 > + =23 minimal memory for uefi bios should be 512M > + =23 0x00000000 - 0x10000000 > + =23 0x90000000 - 0xA0000000 > + =23 > + gLoongArchQemuPkgTokenSpaceGuid.PcdUefiRamTop =7C 0x10000000 > > > =5BComponents=5D > > > =40=40 -120,3 +165,22 =40=40 > =23 SEC Phase modules > =23 > Platform/Loongson/LoongArchQemuPkg/Sec/SecMain.inf > + > + =23 > + =23 PEI Phase modules > + =23 > + MdeModulePkg/Core/Pei/PeiMain.inf > + MdeModulePkg/Universal/PCD/Pei/Pcd.inf =7B > + > + PcdLib=7CMdePkg/Library/BasePcdLibNull/BasePcdLibNull.inf > + =7D > + MdePkg/Library/PeiExtractGuidedSectionLib/PeiExtractGuidedSectionLib.= inf > + MdeModulePkg/Core/DxeIplPeim/DxeIpl.inf =7B > + > + NULL=7CMdeModulePkg/Library/LzmaCustomDecompressLib/LzmaCustomDecompr= essLib.inf > + =7D > + > + Platform/Loongson/LoongArchQemuPkg/PlatformPei/PlatformPei.inf =7B > + > + PcdLib=7CMdePkg/Library/PeiPcdLib/PeiPcdLib.inf > + =7D > diff --git a/Platform/Loongson/LoongArchQemuPkg/Loongson.fdf b/Platform= /Loongson/LoongArchQemuPkg/Loongson.fdf > index 9685795cda..8e257f2392 100644 > --- a/Platform/Loongson/LoongArchQemuPkg/Loongson.fdf > +++ b/Platform/Loongson/LoongArchQemuPkg/Loongson.fdf > =40=40 -45,9 +45,60 =40=40 READ=5FLOCK=5FSTATUS =3D TRUE > > > IN=46 Platform/Loongson/LoongArchQemuPkg/Sec/SecMain.inf > > > +=23=23=23=23=23=23=23=23=23=23=23=23=23=23=23=23=23=23=23=23=23=23=23=23= =23=23=23=23=23=23=23=23=23=23=23=23=23=23=23=23=23=23=23=23=23=23=23=23=23= =23=23=23=23=23=23=23=23=23=23=23=23=23=23=23=23=23=23=23=23=23=23=23=23=23= =23=23=23=23=23=23=23=23=23=23=23=23=23=23=23=23=23=23=23=23=23=23=23=23=23= =23=23 > +=5B=46V.PEI=46V=5D > +=46vNameGuid =3D 6f856a84-de7d-4af9-93a3-342b4ecb46eb > +BlockSize =3D =24(BLOCK=5FSIZE) > +=46vAlignment =3D 16 > +ERASE=5FPOLARITY =3D 1 > +MEMORY=5FMAPPED =3D TRUE > +STICKY=5FWRITE =3D TRUE > +LOCK=5FCAP =3D TRUE > +LOCK=5FSTATUS =3D TRUE > +READ=5FDISABLED=5FCAP =3D TRUE > +READ=5FENABLED=5FCAP =3D TRUE > +READ=5FSTATUS =3D TRUE > +READ=5FLOCK=5FCAP =3D TRUE > +READ=5FLOCK=5FSTATUS =3D TRUE > +WRITE=5FDISABLED=5FCAP =3D TRUE > +WRITE=5FENABLED=5FCAP =3D TRUE > +WRITE=5FSTATUS =3D TRUE > +WRITE=5FLOCK=5FCAP =3D TRUE > +WRITE=5FLOCK=5FSTATUS =3D TRUE > + > +APRIORI PEI =7B > + IN=46 MdeModulePkg/Universal/PCD/Pei/Pcd.inf > +=7D > + > +=23 > +=23 PEI Phase modules > +=23 > + > +IN=46 MdeModulePkg/Core/Pei/PeiMain.inf > +IN=46 MdeModulePkg/Universal/PCD/Pei/Pcd.inf > +IN=46 MdeModulePkg/Core/DxeIplPeim/DxeIpl.inf > +IN=46 Platform/Loongson/LoongArchQemuPkg/PlatformPei/PlatformPei.inf > + > =23=23=23=23=23=23=23=23=23=23=23=23=23=23=23=23=23=23=23=23=23=23=23=23= =23=23=23=23=23=23=23=23=23=23=23=23=23=23=23=23=23=23=23=23=23=23=23=23=23= =23=23=23=23=23=23=23=23=23=23=23=23=23=23=23=23=23=23=23=23=23=23=23=23=23= =23=23=23=23=23=23=23=23=23=23=23=23=23=23=23=23=23=23=23=23=23=23=23=23=23= =23=23 > =5BRule.Common.SEC=5D > =46ILE SEC =3D =24(NAMED=5FGUID) =7B > TE TE Align =3D Auto =24(IN=46=5FOUTPUT)/=24(MODULE=5FNAME).efi > UI STRING =3D=22=24(MODULE=5FNAME)=22 Optional > =7D > + > +=23=23=23=23=23=23=23=23=23=23=23=23=23=23=23=23=23=23=23=23=23=23=23=23= =23=23=23=23=23=23=23=23=23=23=23=23=23=23=23=23=23=23=23=23=23=23=23=23=23= =23=23=23=23=23=23=23=23=23=23=23=23=23=23=23=23=23=23=23=23=23=23=23=23=23= =23=23=23=23=23=23=23=23=23=23=23=23=23=23=23=23=23=23=23=23=23=23=23=23=23= =23=23 > +=5BRule.Common.PEI=5FCORE=5D > + =46ILE PEI=5FCORE =3D =24(NAMED=5FGUID) =7B > + TE TE Align=3DAuto =24(IN=46=5FOUTPUT)/=24(MODULE=5FNAME).efi > + UI STRING =3D=22=24(MODULE=5FNAME)=22 Optional > + =7D > + > +=23=23=23=23=23=23=23=23=23=23=23=23=23=23=23=23=23=23=23=23=23=23=23=23= =23=23=23=23=23=23=23=23=23=23=23=23=23=23=23=23=23=23=23=23=23=23=23=23=23= =23=23=23=23=23=23=23=23=23=23=23=23=23=23=23=23=23=23=23=23=23=23=23=23=23= =23=23=23=23=23=23=23=23=23=23=23=23=23=23=23=23=23=23=23=23=23=23=23=23=23= =23=23 > +=5BRule.Common.PEIM=5D > + =46ILE PEIM =3D =24(NAMED=5FGUID) =7B > + PEI=5FDEPEX PEI=5FDEPEX Optional =24(IN=46=5FOUTPUT)/=24(MODULE=5FNAM= E).depex > + PE32 PE32 Align=3DAuto =24(IN=46=5FOUTPUT)/=24(MODULE=5FNAME).efi > + UI STRING=3D=22=24(MODULE=5FNAME)=22 Optional > + =7D > + > +=23=23=23=23=23=23=23=23=23=23=23=23=23=23=23=23=23=23=23=23=23=23=23=23= =23=23=23=23=23=23=23=23=23=23=23=23=23=23=23=23=23=23=23=23=23=23=23=23=23= =23=23=23=23=23=23=23=23=23=23=23=23=23=23=23=23=23=23=23=23=23=23=23=23=23= =23=23=23=23=23=23=23=23=23=23=23=23=23=23=23=23=23=23=23=23=23=23=23=23=23= =23=23 > diff --git a/Platform/Loongson/LoongArchQemuPkg/PlatformPei/=46v.c b/Pl= atform/Loongson/LoongArchQemuPkg/PlatformPei/=46v.c > new file mode 100644 > index 0000000000..06b2807d6c > --- /dev/null > +++ b/Platform/Loongson/LoongArchQemuPkg/PlatformPei/=46v.c > =40=40 -0,0 +1,58 =40=40 > +/** =40file > + Build =46V related hobs for platform. > + > + Copyright (c) 2022 Loongson Technology Corporation Limited. All right= s reserved.
> + > + SPDX-License-Identifier: BSD-2-Clause-Patent > + > +**/ > + > +=23include =22PiPei.h=22 > +=23include =22Platform.h=22 > +=23include > +=23include > +=23include > +=23include > + > +/** > + Publish PEI & DXE (Decompressed) Memory based =46Vs to let PEI > + and DXE know about them. > + > + =40retval E=46I=5FSUCCESS Platform PEI =46Vs were initialized success= fully. > +**/ > +E=46I=5FSTATUS > +Pei=46vInitialization ( > + VOID > + ) > +=7B > + DEBUG ((DEBUG=5FIN=46O, =22Platform PEI =46irmware Volume Initializat= ion=5Cn=22)); > + > + // > + // Create a memory allocation HOB for the PEI =46V. > + // > + BuildMemoryAllocationHob ( > + PcdGet64 (PcdSecPeiTempRamBase), > + PcdGet32 (PcdSecPeiTempRamSize), > + EfiBootServicesData > + ); > + > + // > + // Let DXE know about the DXE =46V > + // > + Build=46vHob (PcdGet64 (Pcd=46lashDxe=46vBase), PcdGet32 (Pcd=46lashD= xe=46vSize)); > + > + // > + // Let PEI know about the DXE =46V so it can find the DXE Core > + // > + DEBUG ((DEBUG=5FIN=46O, =22DXE=46V base:%p size:%x=5Cn=22, (VOID *) (= UINTN)PcdGet64 (Pcd=46lashDxe=46vBase), > + PcdGet32 (Pcd=46lashDxe=46vSize))); > + PeiServicesInstall=46vInfoPpi ( > + NULL, > + (VOID *) (UINTN)PcdGet64 (Pcd=46lashDxe=46vBase), > + PcdGet32 (Pcd=46lashDxe=46vSize), > + NULL, > + NULL > + ); > + > + return E=46I=5FSUCCESS; > +=7D > diff --git a/Platform/Loongson/LoongArchQemuPkg/PlatformPei/MemDetect.c= b/Platform/Loongson/LoongArchQemuPkg/PlatformPei/MemDetect.c > new file mode 100644 > index 0000000000..fad4cff8d8 > --- /dev/null > +++ b/Platform/Loongson/LoongArchQemuPkg/PlatformPei/MemDetect.c > =40=40 -0,0 +1,104 =40=40 > +/** =40file > + Memory Detection for Virtual Machines. > + > + Copyright (c) 2022 Loongson Technology Corporation Limited. All right= s reserved.
> + > + SPDX-License-Identifier: BSD-2-Clause-Patent > + > +**/ > + > +// > +// The package level header files this module uses > +// > +=23include > + > +// > +// The Library classes this module consumes > +// > +=23include > +=23include > +=23include > +=23include > +=23include > +=23include > +=23include > +=23include > +=23include > +=23include =22Platform.h=22 > + > +/** > + Publish PEI core memory > + > + =40return E=46I=5FSUCCESS The PEIM initialized successfully. > +**/ > +E=46I=5FSTATUS > +PublishPeiMemory ( > + VOID > + ) > +=7B > + E=46I=5FSTATUS Status; > + UINT64 Base; > + UINT64 Size; > + UINT64 RamTop; > + > + // > + // Determine the range of memory to use during PEI > + // > + Base =3D PcdGet64 (PcdSecPeiTempRamBase) + PcdGet32 (PcdSecPeiTempRam= Size); > + RamTop =3D PcdGet64 (PcdUefiRamTop); > + Size =3D RamTop - Base; > + > + // > + // Publish this memory to the PEI Core > + // > + Status =3D PublishSystemMemory (Base, Size); > + ASSERT=5FE=46I=5FERROR (Status); > + > + DEBUG ((DEBUG=5FIN=46O, =22Publish Memory Initialize done.=5Cn=22)); > + return Status; > +=7D > + > +/** > + Peform Memory Detection > + Publish system RAM and reserve memory regions > +**/ > +VOID > +InitializeRamRegions ( > + VOID > + ) > +=7B > + E=46I=5FSTATUS Status; > + =46IRMWARE=5FCON=46IG=5FITEM =46wCfgItem; > + UINTN =46wCfgSize; > + LOONGARCH=5FMEMMAP=5FENTRY MemoryMapEntry; > + LOONGARCH=5FMEMMAP=5FENTRY *StartEntry; > + LOONGARCH=5FMEMMAP=5FENTRY *pEntry; > + UINTN Processed; > + > + Status =3D Qemu=46wCfg=46ind=46ile (=22etc/memmap=22, &=46wCfgItem, &= =46wCfgSize); > + if (E=46I=5FERROR (Status)) =7B > + DEBUG ((DEBUG=5FERROR, =22%a %d read etc/memmap error Status %d =5Cn=22= , =5F=5Ffunc=5F=5F, =5F=5FLINE=5F=5F, Status)); > + return ; > + =7D > + if (=46wCfgSize % sizeof MemoryMapEntry =21=3D 0) =7B > + DEBUG ((DEBUG=5FERROR, =22no MemoryMapEntry =46wCfgSize:%d=5Cn=22, =46= wCfgSize)); > + return ; > + =7D > + > + Qemu=46wCfgSelectItem (=46wCfgItem); > + StartEntry =3D AllocatePages (E=46I=5FSIZE=5FTO=5FPAGES (=46wCfgSize)= ); > + Qemu=46wCfgReadBytes (=46wCfgSize, StartEntry); > + for (Processed =3D 0; Processed < (=46wCfgSize / sizeof MemoryMapEntr= y); Processed++) =7B > + pEntry =3D StartEntry + Processed; > + if (pEntry->Length =3D=3D 0) =7B > + continue; > + =7D > + > + DEBUG ((DEBUG=5FIN=46O, =22MemmapEntry Base %p length %p type %d=5Cn=22= , pEntry->BaseAddr, pEntry->Length, pEntry->Type)); > + if (pEntry->Type =21=3D EfiAcpiAddressRangeMemory) =7B > + continue; > + =7D > + > + AddMemoryRangeHob ( pEntry->BaseAddr, pEntry->BaseAddr + pEntry->Leng= th); > + =7D > +=7D > diff --git a/Platform/Loongson/LoongArchQemuPkg/PlatformPei/Platform.c = b/Platform/Loongson/LoongArchQemuPkg/PlatformPei/Platform.c > new file mode 100644 > index 0000000000..262e2750e4 > --- /dev/null > +++ b/Platform/Loongson/LoongArchQemuPkg/PlatformPei/Platform.c > =40=40 -0,0 +1,261 =40=40 > +/** =40file > + Platform PEI driver > + > + Copyright (c) 2022 Loongson Technology Corporation Limited. All right= s reserved.
> + > + SPDX-License-Identifier: BSD-2-Clause-Patent > + > + =40par Glossary: > + - Mem - Memory > +**/ > + > +// > +// The package level header files this module uses > +// > +=23include > +// > +// The Library classes this module consumes > +// > +=23include > +=23include > +=23include > +=23include > +=23include > +=23include > +=23include > +=23include > +=23include > +=23include > +=23include > +=23include > +=23include > +=23include > +=23include > + > +=23include =22Platform.h=22 > + > +/* TODO */ > +E=46I=5FMEMORY=5FTYPE=5FIN=46ORMATION mDefaultMemoryTypeInformation=5B= =5D =3D =7B > + =7B EfiReservedMemoryType, 0x004 =7D, > + =7B EfiRuntimeServicesData, 0x024 =7D, > + =7B EfiRuntimeServicesCode, 0x030 =7D, > + =7B EfiBootServicesCode, 0x180 =7D, > + =7B EfiBootServicesData, 0x=4600 =7D, > + =7B EfiMaxMemoryType, 0x000 =7D > +=7D; > + > +// > +// Module globals > +// > +CONST E=46I=5FPEI=5FPPI=5FDESCRIPTOR mPpiListBootMode =3D =7B > + (E=46I=5FPEI=5FPPI=5FDESCRIPTOR=5FPPI =7C E=46I=5FPEI=5FPPI=5FDESCRIP= TOR=5FTERMINATE=5FLIST), > + &gEfiPeiMasterBootModePpiGuid, > + NULL > +=7D; > + > +/** > + Create Reserved type memory range hand off block. > + > + =40param MemoryBase memory base address. > + =40param MemoryLimit memory length. > + > + =40return VOID > +**/ > +VOID > +AddReservedMemoryBaseSizeHob ( > + E=46I=5FPHYSICAL=5FADDRESS MemoryBase, > + UINT64 MemorySize > + ) > +=7B > + BuildResourceDescriptorHob ( > + E=46I=5FRESOURCE=5FMEMORY=5FRESERVED, > + E=46I=5FRESOURCE=5FATTRIBUTE=5FPRESENT =7C > + E=46I=5FRESOURCE=5FATTRIBUTE=5FINITIALIZED =7C > + E=46I=5FRESOURCE=5FATTRIBUTE=5FUNCACHEABLE =7C > + E=46I=5FRESOURCE=5FATTRIBUTE=5FTESTED, > + MemoryBase, > + MemorySize > + ); > +=7D > +/** > + Create system type memory range hand off block. > + > + =40param MemoryBase memory base address. > + =40param MemoryLimit memory length. > + > + =40return VOID > +**/ > +VOID > +AddMemoryBaseSizeHob ( > + E=46I=5FPHYSICAL=5FADDRESS MemoryBase, > + UINT64 MemorySize > + ) > +=7B > + BuildResourceDescriptorHob ( > + E=46I=5FRESOURCE=5FSYSTEM=5FMEMORY, > + E=46I=5FRESOURCE=5FATTRIBUTE=5FPRESENT =7C > + E=46I=5FRESOURCE=5FATTRIBUTE=5FINITIALIZED =7C > + E=46I=5FRESOURCE=5FATTRIBUTE=5FUNCACHEABLE =7C > + E=46I=5FRESOURCE=5FATTRIBUTE=5FWRITE=5FCOMBINEABLE =7C > + E=46I=5FRESOURCE=5FATTRIBUTE=5FWRITE=5FTHROUGH=5FCACHEABLE =7C > + E=46I=5FRESOURCE=5FATTRIBUTE=5FWRITE=5FBACK=5FCACHEABLE =7C > + E=46I=5FRESOURCE=5FATTRIBUTE=5FTESTED, > + MemoryBase, > + MemorySize > + ); > +=7D > + > +/** > + Create memory range hand off block. > + > + =40param MemoryBase memory base address. > + =40param MemoryLimit memory length. > + > + =40return VOID > +**/ > +VOID > +AddMemoryRangeHob ( > + E=46I=5FPHYSICAL=5FADDRESS MemoryBase, > + E=46I=5FPHYSICAL=5FADDRESS MemoryLimit > + ) > +=7B > + AddMemoryBaseSizeHob (MemoryBase, (UINT64) (MemoryLimit - MemoryBase)= ); > +=7D > +/** > + Create memory type information hand off block. > + > + =40param VOID > + > + =40return VOID > +**/ > +VOID > +MemMapInitialization ( > + VOID > + ) > +=7B > + DEBUG ((DEBUG=5FIN=46O, =22=3D=3D%a=3D=3D=5Cn=22, =5F=5Ffunc=5F=5F));= > + // > + // Create Memory Type Information HOB > + // > + BuildGuidDataHob ( > + &gEfiMemoryTypeInformationGuid, > + mDefaultMemoryTypeInformation, > + sizeof (mDefaultMemoryTypeInformation) > + ); > +=7D > + > +/** > + Misc Initialization. > + > + =40param VOID > + > + =40return VOID > +**/ > +VOID > +MiscInitialization ( > + VOID > + ) > +=7B > + DEBUG ((DEBUG=5FIN=46O, =22=3D=3D%a=3D=3D=5Cn=22, =5F=5Ffunc=5F=5F));= > + // > + // Creat CPU HOBs. > + // > + BuildCpuHob (PcdGet8 (PcdPrePiCpuMemorySize), PcdGet8 (PcdPrePiCpuIoS= ize)); > +=7D > +/** > + add fdt hand off block. > + > + =40param VOID > + > + =40return VOID > +**/ > +VOID > +Add=46dtHob (VOID) > +=7B > + VOID *Base; > + VOID *NewBase; > + UINTN =46dtSize; > + UINTN =46dtPages; > + UINT64 *=46dtHobData; > + > + Base =3D (VOID*)(UINTN)PcdGet64 (PcdDeviceTreeBase); > + ASSERT (Base =21=3D NULL); > + > + =46dtSize =3D fdt=5Ftotalsize (Base) + PcdGet32 (PcdDeviceTreePadding= ); > + =46dtPages =3D E=46I=5FSIZE=5FTO=5FPAGES (=46dtSize); > + NewBase =3D AllocatePages (=46dtPages); > + ASSERT (NewBase =21=3D NULL); > + fdt=5Fopen=5Finto (Base, NewBase, E=46I=5FPAGES=5FTO=5FSIZE (=46dtPag= es)); > + > + =46dtHobData =3D BuildGuidHob (&g=46dtHobGuid, sizeof *=46dtHobData);= > + ASSERT (=46dtHobData =21=3D NULL); > + *=46dtHobData =3D (UINTN)NewBase; > +=7D > + > +/** > + =46etch the size of system memory from QEMU. > + > + =40param VOID > + > + =40return VOID > +**/ > +VOID > +SystemMemorySizeInitialization ( > + VOID > + ) > +=7B > + UINT64 RamSize; > + RETURN=5FSTATUS PcdStatus; > + > + Qemu=46wCfgSelectItem (Qemu=46wCfgItemRamSize); > + RamSize=3D Qemu=46wCfgRead64 (); > + DEBUG ((DEBUG=5FIN=46O, =22%a: QEMU reports %dM system memory=5Cn=22,= =5F=5F=46UNCTION=5F=5F, > + RamSize/1024/1024)); > + > + // > + // If the fw=5Fcfg key or fw=5Fcfg entirely is unavailable, no change= to PCD. > + // > + if (RamSize =3D=3D 0) =7B > + return; > + =7D > + > + // > + // Otherwise, set RamSize to PCD. > + // > + PcdStatus =3D PcdSet64S (PcdRamSize, RamSize); > + ASSERT=5FRETURN=5FERROR (PcdStatus); > +=7D > + > +/** > + Perform Platform PEI initialization. > + > + =40param =46ileHandle Handle of the file being invoked. > + =40param PeiServices Describes the list of possible PEI Services. > + > + =40return E=46I=5FSUCCESS The PEIM initialized successfully. > +**/ > +E=46I=5FSTATUS > +E=46IAPI > +InitializePlatform ( > + IN E=46I=5FPEI=5F=46ILE=5FHANDLE =46ileHandle, > + IN CONST E=46I=5FPEI=5FSERVICES **PeiServices > + ) > +=7B > + E=46I=5FSTATUS Status; > + > + DEBUG ((DEBUG=5FIN=46O, =22Platform PEIM Loaded=5Cn=22)); > + > + Status =3D PeiServicesInstallPpi (&mPpiListBootMode); > + ASSERT=5FE=46I=5FERROR (Status); > + > + SystemMemorySizeInitialization (); > + PublishPeiMemory (); > + Pei=46vInitialization (); > + InitializeRamRegions (); > + MemMapInitialization (); > + MiscInitialization (); > + Add=46dtHob (); > + ConfigureMmu (); > + > + return E=46I=5FSUCCESS; > +=7D > diff --git a/Platform/Loongson/LoongArchQemuPkg/PlatformPei/Platform.h = b/Platform/Loongson/LoongArchQemuPkg/PlatformPei/Platform.h > new file mode 100644 > index 0000000000..38d358b335 > --- /dev/null > +++ b/Platform/Loongson/LoongArchQemuPkg/PlatformPei/Platform.h > =40=40 -0,0 +1,86 =40=40 > +/** =40file > + Platform PEI module include file. > + > + Copyright (c) 2022 Loongson Technology Corporation Limited. All right= s reserved.
> + > + SPDX-License-Identifier: BSD-2-Clause-Patent > + > +**/ > + > +=23ifndef PLAT=46ORM=5FH=5F > +=23define PLAT=46ORM=5FH=5F > + > +=23include > + > +/** > + Create system type memory range hand off block. > + > + =40param MemoryBase memory base address. > + =40param MemoryLimit memory length. > + > + =40return VOID > +**/ > +VOID > +AddMemoryBaseSizeHob ( > + E=46I=5FPHYSICAL=5FADDRESS MemoryBase, > + UINT64 MemorySize > + ); > + > +/** > + Create memory range hand off block. > + > + =40param MemoryBase memory base address. > + =40param MemoryLimit memory length. > + > + =40return VOID > +**/ > +VOID > +AddMemoryRangeHob ( > + E=46I=5FPHYSICAL=5FADDRESS MemoryBase, > + E=46I=5FPHYSICAL=5FADDRESS MemoryLimit > + ); > + > +/** > + Create Reserved type memory range hand off block. > + > + =40param MemoryBase memory base address. > + =40param MemoryLimit memory length. > + > + =40return VOID > +**/ > +VOID > +AddReservedMemoryBaseSizeHob ( > + E=46I=5FPHYSICAL=5FADDRESS MemoryBase, > + UINT64 MemorySize > + ); > +/** > + Publish PEI core memory > + > + =40return E=46I=5FSUCCESS The PEIM initialized successfully. > +**/ > +E=46I=5FSTATUS > +PublishPeiMemory ( > + VOID > + ); > +/** > + Publish system RAM and reserve memory regions > + > + =40return VOID > +**/ > +VOID > +InitializeRamRegions ( > + VOID > + ); > + > +/** > + Publish PEI & DXE (Decompressed) Memory based =46Vs to let PEI > + and DXE know about them. > + > + =40retval E=46I=5FSUCCESS Platform PEI =46Vs were initialized success= fully. > +**/ > +E=46I=5FSTATUS > +Pei=46vInitialization ( > + VOID > + ); > + > +=23endif // PLAT=46ORM=5FH=5F > diff --git a/Platform/Loongson/LoongArchQemuPkg/PlatformPei/PlatformPei= .inf b/Platform/Loongson/LoongArchQemuPkg/PlatformPei/PlatformPei.inf > new file mode 100644 > index 0000000000..417c5e586a > --- /dev/null > +++ b/Platform/Loongson/LoongArchQemuPkg/PlatformPei/PlatformPei.inf > =40=40 -0,0 +1,72 =40=40 > +=23=23 =40file > +=23 Platform PEI driver > +=23 > +=23 Copyright (c) 2022 Loongson Technology Corporation Limited. All ri= ghts reserved.
> +=23 > +=23 SPDX-License-Identifier: BSD-2-Clause-Patent > +=23 > +=23=23 > + > +=5BDefines=5D > + IN=46=5FVERSION =3D 0x00010005 > + BASE=5FNAME =3D PlatformPei > + =46ILE=5FGUID =3D 4c0e81e5-e8e3-4eef-b24b-19b686e9ab53 > + MODULE=5FTYPE =3D PEIM > + VERSION=5FSTRING =3D 1.0 > + ENTRY=5FPOINT =3D InitializePlatform > + > +=23 > +=23 VALID=5FARCHITECTURES =3D LOONGARCH64 > +=23 > + > +=5BSources=5D > + =46v.c > + MemDetect.c > + Platform.c > + > +=5BPackages=5D > + MdePkg/MdePkg.dec > + MdeModulePkg/MdeModulePkg.dec > + EmbeddedPkg/EmbeddedPkg.dec > + Platform/Loongson/LoongArchQemuPkg/Loongson.dec > + OvmfPkg/OvmfPkg.dec > + > +=5BPpis=5D > + gEfiPeiMasterBootModePpiGuid > + > +=5BGuids=5D > + gEfiMemoryTypeInformationGuid > + g=46dtHobGuid > + > +=5BLibraryClasses=5D > + DebugLib > + BaseMemoryLib > + HobLib > + IoLib > + PeiResourcePublicationLib > + PeiServicesLib > + PeiServicesTablePointerLib > + PeimEntryPoint > + Qemu=46wCfgLib > + PcdLib > + TimerLib > + MmuLib > + MemoryAllocationLib > + > +=5BPcd=5D > + gLoongArchQemuPkgTokenSpaceGuid.PcdRamSize > + gLoongArchQemuPkgTokenSpaceGuid.PcdDeviceTreeBase > + gLoongArchQemuPkgTokenSpaceGuid.PcdDeviceTreePadding > + > +=5B=46ixedPcd=5D > + gLoongArchQemuPkgTokenSpaceGuid.Pcd=46lashDxe=46vBase > + gLoongArchQemuPkgTokenSpaceGuid.Pcd=46lashDxe=46vSize > + gLoongArchQemuPkgTokenSpaceGuid.PcdRamRegionsBottom > + gLoongArchQemuPkgTokenSpaceGuid.PcdUefiRamTop > + gLoongArchQemuPkgTokenSpaceGuid.PcdSecPeiTempRamBase > + gLoongArchQemuPkgTokenSpaceGuid.PcdSecPeiTempRamSize > + gEmbeddedTokenSpaceGuid.PcdPrePiCpuMemorySize > + gEmbeddedTokenSpaceGuid.PcdPrePiCpuIoSize > + > +=5BDepex=5D > + TRUE > -- > 2.31.1 > > > > > > - - - - - - > Groups.io Links: You receive all messages sent to this group. > View/Reply Online (=2396277): https://edk2.groups.io/g/devel/message/96= 277 > Mute This Topic: https://groups.io/mt/94955174/6496846 > Group Owner: devel+owner=40edk2.groups.io > Unsubscribe: https://edk2.groups.io/g/devel/unsub =5Blichao=40loongson.= cn=5D > - - - - - - > --636e1956_1c0332a9_1e57b Content-Type: text/html; charset="utf-8" Content-Transfer-Encoding: quoted-printable Content-Disposition: inline
Reviewed-by: Chao Li  <lichao=40loongson.cn>


Thanks,
Chao
--------

On 11=E6=9C=88 11 2= 022, at 5:12 =E4=B8=8B=E5=8D=88, =22xianglai=22 <lixianglai=40loongson= .cn> wrote:
Platform PEI module for LoongAr= ch platform initialization.



RE=46: https://bugzilla= .tianocore.org/show=5Fbug.cgi=3Fid=3D4054



Cc: Bibo = Mao <maobibo=40loongson.cn>

Cc: Chao Li <lichao=40= loongson.cn>

Cc: Leif Lindholm <quic=5Fllindhol=40qui= cinc.com>

Cc: Liming Gao <gaoliming=40byosoft.com.cn&= gt;

Cc: Michael D Kinney <michael.d.kinney=40intel.com&g= t;

Signed-off-by: xianglai li <lixianglai=40loongson.cn&= gt;

---

.../Loongson/LoongArchQemuPkg/Loongso= n.dec =7C 23 ++

.../Loongson/LoongArchQemuPkg/Loongson.dsc = =7C 64 +++++

.../Loongson/LoongArchQemuPkg/Loongson.fdf =7C= 51 ++++

.../LoongArchQemuPkg/PlatformPei/=46v.c =7C 58 +++= +

.../LoongArchQemuPkg/PlatformPei/MemDetect.c =7C 104 ++++= +++

.../LoongArchQemuPkg/PlatformPei/Platform.c =7C 261 +++= +++++++++++++++

.../LoongArchQemuPkg/PlatformPei/Platform.h= =7C 86 ++++++

.../PlatformPei/PlatformPei.inf =7C 72 +++++=

8 files changed, 719 insertions(+)

create mo= de 100644 Platform/Loongson/LoongArchQemuPkg/PlatformPei/=46v.c

=
create mode 100644 Platform/Loongson/LoongArchQemuPkg/PlatformPei/Me= mDetect.c

create mode 100644 Platform/Loongson/LoongArchQem= uPkg/PlatformPei/Platform.c

create mode 100644 Platform/Loo= ngson/LoongArchQemuPkg/PlatformPei/Platform.h

create mode 1= 00644 Platform/Loongson/LoongArchQemuPkg/PlatformPei/PlatformPei.inf


diff --git a/Platform/Loongson/LoongArchQemuPkg/Loongso= n.dec b/Platform/Loongson/LoongArchQemuPkg/Loongson.dec

ind= ex 61f600b20d..aeae75a678 100644

--- a/Platform/Loongson/Lo= ongArchQemuPkg/Loongson.dec

+++ b/Platform/Loongson/LoongAr= chQemuPkg/Loongson.dec

=40=40 -32,7 +32,30 =40=40

=
=5BPcds=46ixedAtBuild, PcdsDynamic=5D

gLoongArchQemuPk= gTokenSpaceGuid.Pcd=46lashPei=46vBase=7C0x0=7CUINT64=7C0x00000000
gLoongArchQemuPkgTokenSpaceGuid.Pcd=46lashPei=46vSize=7C0x0=7CUINT= 32=7C0x00000001

+ gLoongArchQemuPkgTokenSpaceGuid.Pcd=46las= hDxe=46vBase=7C0x0=7CUINT64=7C0x00000003

+ gLoongArchQemuPk= gTokenSpaceGuid.Pcd=46lashDxe=46vSize=7C0x0=7CUINT32=7C0x00000004
+ gLoongArchQemuPkgTokenSpaceGuid.PcdDeviceTreeBase=7C0x0=7CUINT64= =7C0x00000009

+ gLoongArchQemuPkgTokenSpaceGuid.PcdDeviceTr= eePadding=7C256=7CUINT32=7C0x0000000a

+

gLoon= gArchQemuPkgTokenSpaceGuid.PcdSecPeiTempRamBase=7C0=7CUINT64=7C0x0000000b=

gLoongArchQemuPkgTokenSpaceGuid.PcdSecPeiTempRamSize=7C0=7C= UINT32=7C0x0000000c

+ gLoongArchQemuPkgTokenSpaceGuid.PcdUe= fiRamTop=7C0x0=7CUINT64=7C0x0000000d

+ gLoongArchQemuPkgTok= enSpaceGuid.PcdRamRegionsBottom=7C0x0=7CUINT64=7C0x0000000e

gLoongArchQemuPkgTokenSpaceGuid.Pcd=46lashSec=46vBase=7C0x0=7CUINT64=7C0= x0000000f

gLoongArchQemuPkgTokenSpaceGuid.Pcd=46lashSec=46v= Size=7C0x0=7CUINT32=7C0x00000010

+

+=23=23 In= the Pcds=46ixedAtBuild.LOONGARCH64 area, numbers start at 0x10000.
=
+=5BPcds=46ixedAtBuild.LOONGARCH64=5D

+ gEmbeddedT= okenSpaceGuid.PcdPrePiCpuMemorySize=7C32=7CUINT8=7C0x00010000

+ gEmbeddedTokenSpaceGuid.PcdPrePiCpuIoSize=7C0=7CUINT8=7C0x00010001
+

+=23=23 In the PcdsDynamic area, numbers sta= rt at 0x20000.

+=5BPcdsDynamic=5D

+ gLoongArc= hQemuPkgTokenSpaceGuid.PcdRamSize=7C0x40000000=7CUINT64=7C0x00020000
+ gLoongArchQemuPkgTokenSpaceGuid.Pcd=46wCfgSelectorAddress=7C0= x0=7CUINT64=7C0x00020001

+ gLoongArchQemuPkgTokenSpaceGuid.= Pcd=46wCfgDataAddress=7C0x0=7CUINT64=7C0x00020002

+ gLoongA= rchQemuPkgTokenSpaceGuid.PcdSwapPageDir=7C0x0=7CUINT64=7C0x00020003
=
+ gLoongArchQemuPkgTokenSpaceGuid.PcdInvalidPgd=7C0x0=7CUINT64=7C= 0x00020004

+ gLoongArchQemuPkgTokenSpaceGuid.PcdInvalidPud=7C= 0x0=7CUINT64=7C0x00020005

+ gLoongArchQemuPkgTokenSpaceGuid= .PcdInvalidPmd=7C0x0=7CUINT64=7C0x00020006

+ gLoongArchQemu= PkgTokenSpaceGuid.PcdInvalidPte=7C0x0=7CUINT64=7C0x00020007

diff --git a/Platform/Loongson/LoongArchQemuPkg/Loongson.dsc b/Platform/= Loongson/LoongArchQemuPkg/Loongson.dsc

index b506f70625..b7= 8a7e3b49 100644

--- a/Platform/Loongson/LoongArchQemuPkg/Lo= ongson.dsc

+++ b/Platform/Loongson/LoongArchQemuPkg/Loongso= n.dsc

=40=40 -56,16 +56,53 =40=40



=5B= LibraryClasses.common=5D

PcdLib =7C MdePkg/Library/BasePcdL= ibNull/BasePcdLibNull.inf

+ TimerLib =7C Platform/Loongson/= LoongArchQemuPkg/Library/StableTimerLib/TimerLib.inf

PrintL= ib =7C MdePkg/Library/BasePrintLib/BasePrintLib.inf

BaseMem= oryLib =7C MdePkg/Library/BaseMemoryLib/BaseMemoryLib.inf

B= aseLib =7C MdePkg/Library/BaseLib/BaseLib.inf

+ Performance= Lib =7C MdePkg/Library/BasePerformanceLibNull/BasePerformanceLibNull.inf<= /div>
PeCoffLib =7C MdePkg/Library/BasePeCoffLib/BasePeCoffLib.in= f

+ CacheMaintenanceLib =7C MdePkg/Library/BaseCacheMainten= anceLib/BaseCacheMaintenanceLib.inf

+ UefiDecompressLib =7C= MdePkg/Library/BaseUefiDecompressLib/BaseUefiDecompressLib.inf

=
PeCoffGetEntryPointLib =7C MdePkg/Library/BasePeCoffGetEntryPointLib= /BasePeCoffGetEntryPointLib.inf

IoLib =7C MdePkg/Library/Ba= seIoLibIntrinsic/BaseIoLibIntrinsic.inf

SerialPortLib =7C P= latform/Loongson/LoongArchQemuPkg/Library/SerialPortLib/SerialPortLib.inf=

DebugPrintErrorLevelLib =7C MdePkg/Library/BaseDebugPrintE= rrorLevelLib/BaseDebugPrintErrorLevelLib.inf

+ =46dtLib =7C= EmbeddedPkg/Library/=46dtLib/=46dtLib.inf

PeCoffExtraActio= nLib =7C MdePkg/Library/BasePeCoffExtraActionLibNull/BasePeCoffExtraActio= nLibNull.inf

DebugAgentLib =7C MdeModulePkg/Library/DebugAg= entLibNull/DebugAgentLibNull.inf

+ PeiServicesLib =7C MdePk= g/Library/PeiServicesLib/PeiServicesLib.inf

+

+=5BLibraryClasses.common.SEC=5D

+ ReportStatusCodeLib =7C= MdeModulePkg/Library/PeiReportStatusCodeLib/PeiReportStatusCodeLib.inf
+ HobLib =7C MdePkg/Library/PeiHobLib/PeiHobLib.inf
+ MemoryAllocationLib =7C MdePkg/Library/PeiMemoryAllocationLib/Pei= MemoryAllocationLib.inf

+

+=5BLibraryClasses.= common.PEI=5FCORE=5D

+ HobLib =7C MdePkg/Library/PeiHobLib/= PeiHobLib.inf

+ PeiServicesTablePointerLib =7C Platform/Loo= ngson/LoongArchQemuPkg/Library/PeiServicesTablePointerLib/PeiServicesTabl= ePointerLib.inf

+ MemoryAllocationLib =7C MdePkg/Library/Pe= iMemoryAllocationLib/PeiMemoryAllocationLib.inf

+ PeiCoreEn= tryPoint =7C MdePkg/Library/PeiCoreEntryPoint/PeiCoreEntryPoint.inf
=
+ ReportStatusCodeLib =7C MdeModulePkg/Library/PeiReportStatusCo= deLib/PeiReportStatusCodeLib.inf

+ OemHookStatusCodeLib =7C= MdeModulePkg/Library/OemHookStatusCodeLibNull/OemHookStatusCodeLibNull.i= nf

+ PeCoffGetEntryPointLib =7C MdePkg/Library/BasePeCoffGe= tEntryPointLib/BasePeCoffGetEntryPointLib.inf

+ Qemu=46wCfg= Lib =7C Platform/Loongson/LoongArchQemuPkg/Library/Qemu=46wCfgLib/Qemu=46= wCfgPeiLib.inf

+ MmuLib =7C Platform/Loongson/LoongArchQemu= Pkg/Library/MmuLib/MmuBaseLibPei.inf

+

+=5BLi= braryClasses.common.PEIM=5D

+ HobLib =7C MdePkg/Library/Pei= HobLib/PeiHobLib.inf

+ PeiServicesTablePointerLib =7C Platf= orm/Loongson/LoongArchQemuPkg/Library/PeiServicesTablePointerLib/PeiServi= cesTablePointerLib.inf

+ MemoryAllocationLib =7C MdePkg/Lib= rary/PeiMemoryAllocationLib/PeiMemoryAllocationLib.inf

+ Pe= imEntryPoint =7C MdePkg/Library/PeimEntryPoint/PeimEntryPoint.inf
+ ReportStatusCodeLib =7C MdeModulePkg/Library/PeiReportStatusCode= Lib/PeiReportStatusCodeLib.inf

+ OemHookStatusCodeLib =7C M= deModulePkg/Library/OemHookStatusCodeLibNull/OemHookStatusCodeLibNull.inf=

+ PeCoffGetEntryPointLib =7C MdePkg/Library/BasePeCoffGetE= ntryPointLib/BasePeCoffGetEntryPointLib.inf

+ PeiResourcePu= blicationLib =7C MdePkg/Library/PeiResourcePublicationLib/PeiResourcePubl= icationLib.inf

+ ExtractGuidedSectionLib =7C MdePkg/Library= /PeiExtractGuidedSectionLib/PeiExtractGuidedSectionLib.inf

= + PcdLib =7C MdePkg/Library/PeiPcdLib/PeiPcdLib.inf

+ Qemu=46= wCfgS3Lib =7C OvmfPkg/Library/Qemu=46wCfgS3Lib/PeiQemu=46wCfgS3Lib=46wCfg= .inf

+ Qemu=46wCfgLib =7C Platform/Loongson/LoongArchQemuPk= g/Library/Qemu=46wCfgLib/Qemu=46wCfgPeiLib.inf

+ MmuLib =7C= Platform/Loongson/LoongArchQemuPkg/Library/MmuLib/MmuBaseLibPei.inf


=23=23=23=23=23=23=23=23=23=23=23=23=23=23=23=23=23=23=23= =23=23=23=23=23=23=23=23=23=23=23=23=23=23=23=23=23=23=23=23=23=23=23=23=23= =23=23=23=23=23=23=23=23=23=23=23=23=23=23=23=23=23=23=23=23=23=23=23=23=23= =23=23=23=23=23=23=23=23=23=23=23

=23

=40=40 = -111,8 +148,16 =40=40

=23 ASSERT=5FBREAKPOINT=5FENABLED 0x1= 0

=23 ASSERT=5FDEADLOOP=5FENABLED 0x20



+=23=23=23=23=23=23=23=23=23=23=23=23=23=23=23=23=23=23=23=23=23=23=23=23= =23=23=23=23=23=23=23=23=23=23=23=23=23=23=23=23=23=23=23=23=23=23=23=23=23= =23=23=23=23=23=23=23=23=23=23=23=23=23=23=23=23=23=23=23=23=23=23=23=23=23= =23=23=23=23=23=23=23=23=23=23=23=23=23

gLoongArchQemuPkgTo= kenSpaceGuid.PcdSecPeiTempRamBase =7C 0x10000

gLoongArchQem= uPkgTokenSpaceGuid.PcdSecPeiTempRamSize =7C 0x10000

+ gLoon= gArchQemuPkgTokenSpaceGuid.PcdDeviceTreeBase =7C 0x200000

+= =23

+ =23 minimal memory for uefi bios should be 512M
+ =23 0x00000000 - 0x10000000

+ =23 0x90000000 - = 0xA0000000

+ =23

+ gLoongArchQemuPkgTokenSpac= eGuid.PcdUefiRamTop =7C 0x10000000



=5BComponents=5D=



=40=40 -120,3 +165,22 =40=40

=23 SEC= Phase modules

=23

Platform/Loongson/LoongArc= hQemuPkg/Sec/SecMain.inf

+

+ =23

+ =23 PEI Phase modules

+ =23

+ MdeModulePk= g/Core/Pei/PeiMain.inf

+ MdeModulePkg/Universal/PCD/Pei/Pcd= .inf =7B

+ <LibraryClasses>

+ PcdLib=7C= MdePkg/Library/BasePcdLibNull/BasePcdLibNull.inf

+ =7D
+ MdePkg/Library/PeiExtractGuidedSectionLib/PeiExtractGuidedSec= tionLib.inf

+ MdeModulePkg/Core/DxeIplPeim/DxeIpl.inf =7B
+ <LibraryClasses>

+ NULL=7CMdeModulePkg= /Library/LzmaCustomDecompressLib/LzmaCustomDecompressLib.inf

+ =7D

+

+ Platform/Loongson/LoongArchQemuPk= g/PlatformPei/PlatformPei.inf =7B

+ <LibraryClasses><= /div>
+ PcdLib=7CMdePkg/Library/PeiPcdLib/PeiPcdLib.inf

=
+ =7D

diff --git a/Platform/Loongson/LoongArchQemuPkg/= Loongson.fdf b/Platform/Loongson/LoongArchQemuPkg/Loongson.fdf

<= div>index 9685795cda..8e257f2392 100644

--- a/Platform/Loon= gson/LoongArchQemuPkg/Loongson.fdf

+++ b/Platform/Loongson/= LoongArchQemuPkg/Loongson.fdf

=40=40 -45,9 +45,60 =40=40 RE= AD=5FLOCK=5FSTATUS =3D TRUE



IN=46 Platform/Loongson= /LoongArchQemuPkg/Sec/SecMain.inf



+=23=23=23=23=23=23= =23=23=23=23=23=23=23=23=23=23=23=23=23=23=23=23=23=23=23=23=23=23=23=23=23= =23=23=23=23=23=23=23=23=23=23=23=23=23=23=23=23=23=23=23=23=23=23=23=23=23= =23=23=23=23=23=23=23=23=23=23=23=23=23=23=23=23=23=23=23=23=23=23=23=23=23= =23=23=23=23=23=23=23=23=23=23=23=23=23=23=23=23=23=23=23=23

+=5B=46V.PEI=46V=5D

+=46vNameGuid =3D 6f856a84-de7d-4af9-= 93a3-342b4ecb46eb

+BlockSize =3D =24(BLOCK=5FSIZE)
+=46vAlignment =3D 16

+ERASE=5FPOLARITY =3D 1
+MEMORY=5FMAPPED =3D TRUE

+STICKY=5FWRITE =3D TRUE
+LOCK=5FCAP =3D TRUE

+LOCK=5FSTATUS =3D TRUE
+READ=5FDISABLED=5FCAP =3D TRUE

+READ=5FENABLE= D=5FCAP =3D TRUE

+READ=5FSTATUS =3D TRUE

+REA= D=5FLOCK=5FCAP =3D TRUE

+READ=5FLOCK=5FSTATUS =3D TRUE
+WRITE=5FDISABLED=5FCAP =3D TRUE

+WRITE=5FENABLED= =5FCAP =3D TRUE

+WRITE=5FSTATUS =3D TRUE

+WRI= TE=5FLOCK=5FCAP =3D TRUE

+WRITE=5FLOCK=5FSTATUS =3D TRUE
+

+APRIORI PEI =7B

+ IN=46 MdeMod= ulePkg/Universal/PCD/Pei/Pcd.inf

+=7D

+
=
+=23

+=23 PEI Phase modules

+=23
+

+IN=46 MdeModulePkg/Core/Pei/PeiMain.inf
=
+IN=46 MdeModulePkg/Universal/PCD/Pei/Pcd.inf

+IN=46= MdeModulePkg/Core/DxeIplPeim/DxeIpl.inf

+IN=46 Platform/Lo= ongson/LoongArchQemuPkg/PlatformPei/PlatformPei.inf

+
=
=23=23=23=23=23=23=23=23=23=23=23=23=23=23=23=23=23=23=23=23=23=23= =23=23=23=23=23=23=23=23=23=23=23=23=23=23=23=23=23=23=23=23=23=23=23=23=23= =23=23=23=23=23=23=23=23=23=23=23=23=23=23=23=23=23=23=23=23=23=23=23=23=23= =23=23=23=23=23=23=23=23=23=23=23=23=23=23=23=23=23=23=23=23=23=23=23=23=23= =23=23=23=23

=5BRule.Common.SEC=5D

=46ILE SEC= =3D =24(NAMED=5FGUID) =7B

TE TE Align =3D Auto =24(IN=46=5F= OUTPUT)/=24(MODULE=5FNAME).efi

UI STRING =3D=22=24(MODULE=5F= NAME)=22 Optional

=7D

+

+=23=23= =23=23=23=23=23=23=23=23=23=23=23=23=23=23=23=23=23=23=23=23=23=23=23=23=23= =23=23=23=23=23=23=23=23=23=23=23=23=23=23=23=23=23=23=23=23=23=23=23=23=23= =23=23=23=23=23=23=23=23=23=23=23=23=23=23=23=23=23=23=23=23=23=23=23=23=23= =23=23=23=23=23=23=23=23=23=23=23=23=23=23=23=23=23=23=23=23=23=23=23=23<= /div>
+=5BRule.Common.PEI=5FCORE=5D

+ =46ILE PEI=5F= CORE =3D =24(NAMED=5FGUID) =7B

+ TE TE Align=3DAuto =24(IN=46= =5FOUTPUT)/=24(MODULE=5FNAME).efi

+ UI STRING =3D=22=24(MOD= ULE=5FNAME)=22 Optional

+ =7D

+

+=23=23=23=23=23=23=23=23=23=23=23=23=23=23=23=23=23=23=23=23=23=23=23=23= =23=23=23=23=23=23=23=23=23=23=23=23=23=23=23=23=23=23=23=23=23=23=23=23=23= =23=23=23=23=23=23=23=23=23=23=23=23=23=23=23=23=23=23=23=23=23=23=23=23=23= =23=23=23=23=23=23=23=23=23=23=23=23=23=23=23=23=23=23=23=23=23=23=23=23=23= =23=23

+=5BRule.Common.PEIM=5D

+ =46ILE PEIM = =3D =24(NAMED=5FGUID) =7B

+ PEI=5FDEPEX PEI=5FDEPEX Optiona= l =24(IN=46=5FOUTPUT)/=24(MODULE=5FNAME).depex

+ PE32 PE32 = Align=3DAuto =24(IN=46=5FOUTPUT)/=24(MODULE=5FNAME).efi

+ U= I STRING=3D=22=24(MODULE=5FNAME)=22 Optional

+ =7D
+

+=23=23=23=23=23=23=23=23=23=23=23=23=23=23=23=23=23= =23=23=23=23=23=23=23=23=23=23=23=23=23=23=23=23=23=23=23=23=23=23=23=23=23= =23=23=23=23=23=23=23=23=23=23=23=23=23=23=23=23=23=23=23=23=23=23=23=23=23= =23=23=23=23=23=23=23=23=23=23=23=23=23=23=23=23=23=23=23=23=23=23=23=23=23= =23=23=23=23=23=23=23=23=23

diff --git a/Platform/Loongson/= LoongArchQemuPkg/PlatformPei/=46v.c b/Platform/Loongson/LoongArchQemuPkg/= PlatformPei/=46v.c

new file mode 100644

index= 0000000000..06b2807d6c

--- /dev/null

+++ b/P= latform/Loongson/LoongArchQemuPkg/PlatformPei/=46v.c

=40=40= -0,0 +1,58 =40=40

+/** =40file

+ Build =46V = related hobs for platform.

+

+ Copyright (c) = 2022 Loongson Technology Corporation Limited. All rights reserved.<BR&= gt;

+

+ SPDX-License-Identifier: BSD-2-Clause= -Patent

+

+**/

+

= +=23include =22PiPei.h=22

+=23include =22Platform.h=22
+=23include <Library/DebugLib.h>

+=23includ= e <Library/HobLib.h>

+=23include <Library/PeiServi= cesLib.h>

+=23include <Library/PcdLib.h>

=
+

+/**

+ Publish PEI & DXE (Decompre= ssed) Memory based =46Vs to let PEI

+ and DXE know about th= em.

+

+ =40retval E=46I=5FSUCCESS Platform PE= I =46Vs were initialized successfully.

+**/

+= E=46I=5FSTATUS

+Pei=46vInitialization (

+ VOI= D

+ )

+=7B

+ DEBUG ((DEBUG=5FIN= =46O, =22Platform PEI =46irmware Volume Initialization=5Cn=22));
+

+ //

+ // Create a memory allocation = HOB for the PEI =46V.

+ //

+ BuildMemoryAlloc= ationHob (

+ PcdGet64 (PcdSecPeiTempRamBase),

+ PcdGet32 (PcdSecPeiTempRamSize),

+ EfiBootServicesData
+ );

+

+ //

+ // L= et DXE know about the DXE =46V

+ //

+ Build=46= vHob (PcdGet64 (Pcd=46lashDxe=46vBase), PcdGet32 (Pcd=46lashDxe=46vSize))= ;

+

+ //

+ // Let PEI know abou= t the DXE =46V so it can find the DXE Core

+ //

+ DEBUG ((DEBUG=5FIN=46O, =22DXE=46V base:%p size:%x=5Cn=22, (VOID *) = (UINTN)PcdGet64 (Pcd=46lashDxe=46vBase),

+ PcdGet32 (Pcd=46= lashDxe=46vSize)));

+ PeiServicesInstall=46vInfoPpi (
=
+ NULL,

+ (VOID *) (UINTN)PcdGet64 (Pcd=46lashDxe=46= vBase),

+ PcdGet32 (Pcd=46lashDxe=46vSize),

+= NULL,

+ NULL

+ );

+

<= div>+ return E=46I=5FSUCCESS;

+=7D

diff --git= a/Platform/Loongson/LoongArchQemuPkg/PlatformPei/MemDetect.c b/Platform/= Loongson/LoongArchQemuPkg/PlatformPei/MemDetect.c

new file = mode 100644

index 0000000000..fad4cff8d8

--- = /dev/null

+++ b/Platform/Loongson/LoongArchQemuPkg/Platform= Pei/MemDetect.c

=40=40 -0,0 +1,104 =40=40

+/*= * =40file

+ Memory Detection for Virtual Machines.
+

+ Copyright (c) 2022 Loongson Technology Corporatio= n Limited. All rights reserved.<BR>

+

+= SPDX-License-Identifier: BSD-2-Clause-Patent

+

+**/

+

+//

+// The package l= evel header files this module uses

+//

+=23in= clude <PiPei.h>

+

+//

+//= The Library classes this module consumes

+//

+=23include <Library/BaseMemoryLib.h>

+=23include &l= t;Library/MemoryAllocationLib.h>

+=23include <Library= /DebugLib.h>

+=23include <Library/HobLib.h>
<= br>
+=23include <Library/IoLib.h>

+=23include <= ;Library/PcdLib.h>

+=23include <Library/PeimEntryPoin= t.h>

+=23include <Library/ResourcePublicationLib.h>= ;

+=23include <Library/Qemu=46wCfgLib.h>

+=23include =22Platform.h=22

+

+/**
+ Publish PEI core memory

+

+ =40retur= n E=46I=5FSUCCESS The PEIM initialized successfully.

+**/
+E=46I=5FSTATUS

+PublishPeiMemory (

<= div>+ VOID

+ )

+=7B

+ E=46I=5FS= TATUS Status;

+ UINT64 Base;

+ UINT64 Size;
+ UINT64 RamTop;

+

+ //
+ // Determine the range of memory to use during PEI

= + //

+ Base =3D PcdGet64 (PcdSecPeiTempRamBase) + PcdGet32 = (PcdSecPeiTempRamSize);

+ RamTop =3D PcdGet64 (PcdUefiRamTo= p);

+ Size =3D RamTop - Base;

+

+ //

+ // Publish this memory to the PEI Core

+ //

+ Status =3D PublishSystemMemory (Base, Size);
=
+ ASSERT=5FE=46I=5FERROR (Status);

+

+ DEBUG ((DEBUG=5FIN=46O, =22Publish Memory Initialize done.=5Cn=22));
+ return Status;

+=7D

+
+/**

+ Peform Memory Detection

+ Publis= h system RAM and reserve memory regions

+**/

= +VOID

+InitializeRamRegions (

+ VOID
+ )

+=7B

+ E=46I=5FSTATUS Status;
=
+ =46IRMWARE=5FCON=46IG=5FITEM =46wCfgItem;

+ UINT= N =46wCfgSize;

+ LOONGARCH=5FMEMMAP=5FENTRY MemoryMapEntry;=

+ LOONGARCH=5FMEMMAP=5FENTRY *StartEntry;

+ = LOONGARCH=5FMEMMAP=5FENTRY *pEntry;

+ UINTN Processed;
+

+ Status =3D Qemu=46wCfg=46ind=46ile (=22etc/me= mmap=22, &=46wCfgItem, &=46wCfgSize);

+ if (E=46I=5F= ERROR (Status)) =7B

+ DEBUG ((DEBUG=5FERROR, =22%a %d read = etc/memmap error Status %d =5Cn=22, =5F=5Ffunc=5F=5F, =5F=5FLINE=5F=5F, S= tatus));

+ return ;

+ =7D

+ if = (=46wCfgSize % sizeof MemoryMapEntry =21=3D 0) =7B

+ DEBUG = ((DEBUG=5FERROR, =22no MemoryMapEntry =46wCfgSize:%d=5Cn=22, =46wCfgSize)= );

+ return ;

+ =7D

+

=
+ Qemu=46wCfgSelectItem (=46wCfgItem);

+ StartEntry =3D= AllocatePages (E=46I=5FSIZE=5FTO=5FPAGES (=46wCfgSize));

+= Qemu=46wCfgReadBytes (=46wCfgSize, StartEntry);

+ for (Pro= cessed =3D 0; Processed < (=46wCfgSize / sizeof MemoryMapEntry); Proce= ssed++) =7B

+ pEntry =3D StartEntry + Processed;

<= div>+ if (pEntry->Length =3D=3D 0) =7B

+ continue;
=
+ =7D

+

+ DEBUG ((DEBUG=5FIN=46O, =22= MemmapEntry Base %p length %p type %d=5Cn=22, pEntry->BaseAddr, pEntry= ->Length, pEntry->Type));

+ if (pEntry->Type =21=3D= EfiAcpiAddressRangeMemory) =7B

+ continue;

+= =7D

+

+ AddMemoryRangeHob ( pEntry->BaseA= ddr, pEntry->BaseAddr + pEntry->Length);

+ =7D
<= br>
+=7D

diff --git a/Platform/Loongson/LoongArchQemuPk= g/PlatformPei/Platform.c b/Platform/Loongson/LoongArchQemuPkg/PlatformPei= /Platform.c

new file mode 100644

index 000000= 0000..262e2750e4

--- /dev/null

+++ b/Platform= /Loongson/LoongArchQemuPkg/PlatformPei/Platform.c

=40=40 -0= ,0 +1,261 =40=40

+/** =40file

+ Platform PEI = driver

+

+ Copyright (c) 2022 Loongson Techno= logy Corporation Limited. All rights reserved.<BR>

+<= /div>
+ SPDX-License-Identifier: BSD-2-Clause-Patent

+

+ =40par Glossary:

+ - Mem - Memory
=
+**/

+

+//

+// The pac= kage level header files this module uses

+//

= +=23include <PiPei.h>

+//

+// The Libra= ry classes this module consumes

+//

+=23inclu= de <Library/DebugLib.h>

+=23include <Library/HobLi= b.h>

+=23include <Library/IoLib.h>

+= =23include <Library/MemoryAllocationLib.h>

+=23includ= e <Library/BaseMemoryLib.h>

+=23include <Library/P= cdLib.h>

+=23include <Library/PeimEntryPoint.h>
+=23include <Library/PeiServicesLib.h>

+=23= include <Library/ResourcePublicationLib.h>

+=23includ= e <Guid/MemoryTypeInformation.h>

+=23include <Libr= ary/Qemu=46wCfgLib.h>

+=23include <Library/MmuLib.h&g= t;

+=23include <Guid/=46dtHob.h>

+=23in= clude <libfdt.h>

+=23include <Ppi/MasterBootMode.h= >

+

+=23include =22Platform.h=22

=
+

+/* TODO */

+E=46I=5FMEMORY=5FTYPE=5FI= N=46ORMATION mDefaultMemoryTypeInformation=5B=5D =3D =7B

+ = =7B EfiReservedMemoryType, 0x004 =7D,

+ =7B EfiRuntimeServi= cesData, 0x024 =7D,

+ =7B EfiRuntimeServicesCode, 0x030 =7D= ,

+ =7B EfiBootServicesCode, 0x180 =7D,

+ =7B= EfiBootServicesData, 0x=4600 =7D,

+ =7B EfiMaxMemoryType, = 0x000 =7D

+=7D;

+

+//

=
+// Module globals

+//

+CONST E=46I=5FPE= I=5FPPI=5FDESCRIPTOR mPpiListBootMode =3D =7B

+ (E=46I=5FPE= I=5FPPI=5FDESCRIPTOR=5FPPI =7C E=46I=5FPEI=5FPPI=5FDESCRIPTOR=5FTERMINATE= =5FLIST),

+ &gEfiPeiMasterBootModePpiGuid,

+ NULL

+=7D;

+

+/**

=
+ Create Reserved type memory range hand off block.

+<= /div>
+ =40param MemoryBase memory base address.

+ = =40param MemoryLimit memory length.

+

+ =40re= turn VOID

+**/

+VOID

+AddReserv= edMemoryBaseSizeHob (

+ E=46I=5FPHYSICAL=5FADDRESS MemoryBa= se,

+ UINT64 MemorySize

+ )

+=7B=

+ BuildResourceDescriptorHob (

+ E=46I=5FRES= OURCE=5FMEMORY=5FRESERVED,

+ E=46I=5FRESOURCE=5FATTRIBUTE=5F= PRESENT =7C

+ E=46I=5FRESOURCE=5FATTRIBUTE=5FINITIALIZED =7C=

+ E=46I=5FRESOURCE=5FATTRIBUTE=5FUNCACHEABLE =7C

=
+ E=46I=5FRESOURCE=5FATTRIBUTE=5FTESTED,

+ MemoryBase,=

+ MemorySize

+ );

+=7D
+/**

+ Create system type memory range hand off bloc= k.

+

+ =40param MemoryBase memory base addres= s.

+ =40param MemoryLimit memory length.

+
+ =40return VOID

+**/

+VOID
=
+AddMemoryBaseSizeHob (

+ E=46I=5FPHYSICAL=5FADDRE= SS MemoryBase,

+ UINT64 MemorySize

+ )
<= br>
+=7B

+ BuildResourceDescriptorHob (

+= E=46I=5FRESOURCE=5FSYSTEM=5FMEMORY,

+ E=46I=5FRESOURCE=5FA= TTRIBUTE=5FPRESENT =7C

+ E=46I=5FRESOURCE=5FATTRIBUTE=5FINI= TIALIZED =7C

+ E=46I=5FRESOURCE=5FATTRIBUTE=5FUNCACHEABLE =7C=

+ E=46I=5FRESOURCE=5FATTRIBUTE=5FWRITE=5FCOMBINEABLE =7C
+ E=46I=5FRESOURCE=5FATTRIBUTE=5FWRITE=5FTHROUGH=5FCACHEABLE= =7C

+ E=46I=5FRESOURCE=5FATTRIBUTE=5FWRITE=5FBACK=5FCACHEA= BLE =7C

+ E=46I=5FRESOURCE=5FATTRIBUTE=5FTESTED,

<= div>+ MemoryBase,

+ MemorySize

+ );

=
+=7D

+

+/**

+ Create memor= y range hand off block.

+

+ =40param MemoryBa= se memory base address.

+ =40param MemoryLimit memory lengt= h.

+

+ =40return VOID

+**/
+VOID

+AddMemoryRangeHob (

+ E=46I=5F= PHYSICAL=5FADDRESS MemoryBase,

+ E=46I=5FPHYSICAL=5FADDRESS= MemoryLimit

+ )

+=7B

+ AddMemo= ryBaseSizeHob (MemoryBase, (UINT64) (MemoryLimit - MemoryBase));
+=7D

+/**

+ Create memory type informat= ion hand off block.

+

+ =40param VOID
+

+ =40return VOID

+**/

= +VOID

+MemMapInitialization (

+ VOID
+ )

+=7B

+ DEBUG ((DEBUG=5FIN=46O, =22=3D= =3D%a=3D=3D=5Cn=22, =5F=5Ffunc=5F=5F));

+ //

= + // Create Memory Type Information HOB

+ //

= + BuildGuidDataHob (

+ &gEfiMemoryTypeInformationGuid,<= /div>
+ mDefaultMemoryTypeInformation,

+ sizeof (mD= efaultMemoryTypeInformation)

+ );

+=7D
<= br>
+

+/**

+ Misc Initialization.
+

+ =40param VOID

+

+ =40= return VOID

+**/

+VOID

+MiscIni= tialization (

+ VOID

+ )

+=7B
+ DEBUG ((DEBUG=5FIN=46O, =22=3D=3D%a=3D=3D=5Cn=22, =5F=5Ffu= nc=5F=5F));

+ //

+ // Creat CPU HOBs.
+ //

+ BuildCpuHob (PcdGet8 (PcdPrePiCpuMemorySize),= PcdGet8 (PcdPrePiCpuIoSize));

+=7D

+/**
+ add fdt hand off block.

+

+ =40pa= ram VOID

+

+ =40return VOID

+**= /

+VOID

+Add=46dtHob (VOID)

+=7B=

+ VOID *Base;

+ VOID *NewBase;

+ UINTN =46dtSize;

+ UINTN =46dtPages;

+ UIN= T64 *=46dtHobData;

+

+ Base =3D (VOID*)(UINTN= )PcdGet64 (PcdDeviceTreeBase);

+ ASSERT (Base =21=3D NULL);=

+

+ =46dtSize =3D fdt=5Ftotalsize (Base) + P= cdGet32 (PcdDeviceTreePadding);

+ =46dtPages =3D E=46I=5FSI= ZE=5FTO=5FPAGES (=46dtSize);

+ NewBase =3D AllocatePages (=46= dtPages);

+ ASSERT (NewBase =21=3D NULL);

+ f= dt=5Fopen=5Finto (Base, NewBase, E=46I=5FPAGES=5FTO=5FSIZE (=46dtPages));=

+

+ =46dtHobData =3D BuildGuidHob (&g=46= dtHobGuid, sizeof *=46dtHobData);

+ ASSERT (=46dtHobData =21= =3D NULL);

+ *=46dtHobData =3D (UINTN)NewBase;

+=7D

+

+/**

+ =46etch the siz= e of system memory from QEMU.

+

+ =40param VO= ID

+

+ =40return VOID

+**/
+VOID

+SystemMemorySizeInitialization (

=
+ VOID

+ )

+=7B

+ UINT64 R= amSize;

+ RETURN=5FSTATUS PcdStatus;

+
<= br>
+ Qemu=46wCfgSelectItem (Qemu=46wCfgItemRamSize);

+= RamSize=3D Qemu=46wCfgRead64 ();

+ DEBUG ((DEBUG=5FIN=46O,= =22%a: QEMU reports %dM system memory=5Cn=22, =5F=5F=46UNCTION=5F=5F,
+ RamSize/1024/1024));

+

+ //
+ // If the fw=5Fcfg key or fw=5Fcfg entirely is unavailable, = no change to PCD.

+ //

+ if (RamSize =3D=3D 0= ) =7B

+ return;

+ =7D

+
+ //

+ // Otherwise, set RamSize to PCD.

+ //

+ PcdStatus =3D PcdSet64S (PcdRamSize, RamSize);
+ ASSERT=5FRETURN=5FERROR (PcdStatus);

+=7D
+

+/**

+ Perform Platform PEI init= ialization.

+

+ =40param =46ileHandle Handle = of the file being invoked.

+ =40param PeiServices Describes= the list of possible PEI Services.

+

+ =40re= turn E=46I=5FSUCCESS The PEIM initialized successfully.

+**= /

+E=46I=5FSTATUS

+E=46IAPI

+In= itializePlatform (

+ IN E=46I=5FPEI=5F=46ILE=5FHANDLE =46il= eHandle,

+ IN CONST E=46I=5FPEI=5FSERVICES **PeiServices
+ )

+=7B

+ E=46I=5FSTATUS Status;=

+

+ DEBUG ((DEBUG=5FIN=46O, =22Platform PEIM= Loaded=5Cn=22));

+

+ Status =3D PeiServicesI= nstallPpi (&mPpiListBootMode);

+ ASSERT=5FE=46I=5FERROR= (Status);

+

+ SystemMemorySizeInitialization= ();

+ PublishPeiMemory ();

+ Pei=46vInitiali= zation ();

+ InitializeRamRegions ();

+ MemMa= pInitialization ();

+ MiscInitialization ();

= + Add=46dtHob ();

+ ConfigureMmu ();

+
<= br>
+ return E=46I=5FSUCCESS;

+=7D

diff -= -git a/Platform/Loongson/LoongArchQemuPkg/PlatformPei/Platform.h b/Platfo= rm/Loongson/LoongArchQemuPkg/PlatformPei/Platform.h

new fil= e mode 100644

index 0000000000..38d358b335

--= - /dev/null

+++ b/Platform/Loongson/LoongArchQemuPkg/Platfo= rmPei/Platform.h

=40=40 -0,0 +1,86 =40=40

+/*= * =40file

+ Platform PEI module include file.

+

+ Copyright (c) 2022 Loongson Technology Corporation Lim= ited. All rights reserved.<BR>

+

+ SPDX= -License-Identifier: BSD-2-Clause-Patent

+

+*= */

+

+=23ifndef PLAT=46ORM=5FH=5F

+=23define PLAT=46ORM=5FH=5F

+

+=23include= <IndustryStandard/Pci22.h>

+

+/**
+ Create system type memory range hand off block.

+

+ =40param MemoryBase memory base address.

+ =40param MemoryLimit memory length.

+

+ =40= return VOID

+**/

+VOID

+AddMemo= ryBaseSizeHob (

+ E=46I=5FPHYSICAL=5FADDRESS MemoryBase,
+ UINT64 MemorySize

+ );

+
<= br>
+/**

+ Create memory range hand off block.
+

+ =40param MemoryBase memory base address.
+ =40param MemoryLimit memory length.

+

+ =40return VOID

+**/

+VOID

+A= ddMemoryRangeHob (

+ E=46I=5FPHYSICAL=5FADDRESS MemoryBase,=

+ E=46I=5FPHYSICAL=5FADDRESS MemoryLimit

+ )= ;

+

+/**

+ Create Reserved type= memory range hand off block.

+

+ =40param Me= moryBase memory base address.

+ =40param MemoryLimit memory= length.

+

+ =40return VOID

+**= /

+VOID

+AddReservedMemoryBaseSizeHob (
=
+ E=46I=5FPHYSICAL=5FADDRESS MemoryBase,

+ UINT64 = MemorySize

+ );

+/**

+ Publish = PEI core memory

+

+ =40return E=46I=5FSUCCESS= The PEIM initialized successfully.

+**/

+E=46= I=5FSTATUS

+PublishPeiMemory (

+ VOID
+ );

+/**

+ Publish system RAM and res= erve memory regions

+

+ =40return VOID
<= br>
+**/

+VOID

+InitializeRamRegions (
+ VOID

+ );

+

+/**<= /div>
+ Publish PEI & DXE (Decompressed) Memory based =46Vs t= o let PEI

+ and DXE know about them.

+
<= br>
+ =40retval E=46I=5FSUCCESS Platform PEI =46Vs were initialized s= uccessfully.

+**/

+E=46I=5FSTATUS

+Pei=46vInitialization (

+ VOID

+ );
=
+

+=23endif // PLAT=46ORM=5FH=5F

dif= f --git a/Platform/Loongson/LoongArchQemuPkg/PlatformPei/PlatformPei.inf = b/Platform/Loongson/LoongArchQemuPkg/PlatformPei/PlatformPei.inf
new file mode 100644

index 0000000000..417c5e586a
--- /dev/null

+++ b/Platform/Loongson/LoongArchQ= emuPkg/PlatformPei/PlatformPei.inf

=40=40 -0,0 +1,72 =40=40=

+=23=23 =40file

+=23 Platform PEI driver
+=23

+=23 Copyright (c) 2022 Loongson Technology= Corporation Limited. All rights reserved.<BR>

+=23
+=23 SPDX-License-Identifier: BSD-2-Clause-Patent

<= div>+=23

+=23=23

+

+=5BDefines=5D=

+ IN=46=5FVERSION =3D 0x00010005

+ BASE=5FNA= ME =3D PlatformPei

+ =46ILE=5FGUID =3D 4c0e81e5-e8e3-4eef-b= 24b-19b686e9ab53

+ MODULE=5FTYPE =3D PEIM

+ V= ERSION=5FSTRING =3D 1.0

+ ENTRY=5FPOINT =3D InitializePlatf= orm

+

+=23

+=23 VALID=5FARCHITE= CTURES =3D LOONGARCH64

+=23

+

+= =5BSources=5D

+ =46v.c

+ MemDetect.c
+ Platform.c

+

+=5BPackages=5D
+ MdePkg/MdePkg.dec

+ MdeModulePkg/MdeModulePkg.dec
+ EmbeddedPkg/EmbeddedPkg.dec

+ Platform/Loong= son/LoongArchQemuPkg/Loongson.dec

+ OvmfPkg/OvmfPkg.dec
+

+=5BPpis=5D

+ gEfiPeiMasterBootM= odePpiGuid

+

+=5BGuids=5D

+ gEf= iMemoryTypeInformationGuid

+ g=46dtHobGuid

+<= /div>
+=5BLibraryClasses=5D

+ DebugLib

+ BaseMemoryLib

+ HobLib

+ IoLib

<= div>+ PeiResourcePublicationLib

+ PeiServicesLib

<= div>+ PeiServicesTablePointerLib

+ PeimEntryPoint

=
+ Qemu=46wCfgLib

+ PcdLib

+ TimerLib
+ MmuLib

+ MemoryAllocationLib

+
+=5BPcd=5D

+ gLoongArchQemuPkgTokenSpaceGuid.P= cdRamSize

+ gLoongArchQemuPkgTokenSpaceGuid.PcdDeviceTreeBa= se

+ gLoongArchQemuPkgTokenSpaceGuid.PcdDeviceTreePadding
+

+=5B=46ixedPcd=5D

+ gLoongArch= QemuPkgTokenSpaceGuid.Pcd=46lashDxe=46vBase

+ gLoongArchQem= uPkgTokenSpaceGuid.Pcd=46lashDxe=46vSize

+ gLoongArchQemuPk= gTokenSpaceGuid.PcdRamRegionsBottom

+ gLoongArchQemuPkgToke= nSpaceGuid.PcdUefiRamTop

+ gLoongArchQemuPkgTokenSpaceGuid.= PcdSecPeiTempRamBase

+ gLoongArchQemuPkgTokenSpaceGuid.PcdS= ecPeiTempRamSize

+ gEmbeddedTokenSpaceGuid.PcdPrePiCpuMemor= ySize

+ gEmbeddedTokenSpaceGuid.PcdPrePiCpuIoSize

=
+

+=5BDepex=5D

+ TRUE

--
2.31.1






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