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Or IA32 and X64 both? >=20 >=20 > Theoretically the instruction is available on both IA32 and X64 but its > used only in X64. AMD SEV, SEV-ES and SEV-SNP support is available for > X64 arch only. I was not sure if the EDK2 community is okay with the > dead-code. Do you think it still makes sense to add the IA32 API for it = ? >=20 If this is only implemented for MDE_CPU_X64 should it be only defined in B= aseLIib.h for MDE_CPU_X64? vs. "#endif // defined (MDE_CPU_IA32) || defined= (MDE_CPU_X64)=E2=80=9D? I think today we may only have types in MDE_CPU_X64 only and all the lib f= unctions are in "#if defined (MDE_CPU_IA32) || defined (MDE_CPU_X64)=E2=80= =9D. So we should think about adding an IA32 function implementation or no= t defining the function to exist for MDE_CPU_IA32 in BaseLib.h? What do other people think? Thanks, Andrew Fish >=20 >>=20 >> Thanks >> Liming >>> -----=E9=82=AE=E4=BB=B6=E5=8E=9F=E4=BB=B6----- >>> =E5=8F=91=E4=BB=B6=E4=BA=BA: devel@edk2.groups.io =E4=BB=A3=E8=A1=A8 Brijesh Singh >>> =E5=8F=91=E9=80=81=E6=97=B6=E9=97=B4: 2021=E5=B9=B43=E6=9C=8824=E6=97= =A5 23:32 >>> =E6=94=B6=E4=BB=B6=E4=BA=BA: devel@edk2.groups.io >>> =E6=8A=84=E9=80=81: Brijesh Singh ; James Botto= mley >>> ; Min Xu ; Jiewen Yao >>> ; Tom Lendacky ; >>> Jordan Justen ; Ard Biesheuvel >>> ; Laszlo Ersek >>> =E4=B8=BB=E9=A2=98: [edk2-devel] [RFC PATCH 09/19] MdePkg: Add AsmPval= idate() support >>>=20 >>> BZ: https://nam11.safelinks.protection.outlook.com/?url=3Dhttps%3A%2F%= 2Fbugzilla.tianocore.org%2Fshow_bug.cgi%3Fid%3D3275&data=3D04%7C01%7Cbr= ijesh.singh%40amd.com%7C125d11ea64cf4f4ecd2108d8ef38a8e7%7C3dd8961fe4884e60= 8e11a82d994e183d%7C0%7C0%7C637522373939810930%7CUnknown%7CTWFpbGZsb3d8eyJWI= joiMC4wLjAwMDAiLCJQIjoiV2luMzIiLCJBTiI6Ik1haWwiLCJXVCI6Mn0%3D%7C1000&sd= ata=3Df3fM%2Fnw3X1lHhf7SPKTxDOLo0GcnU465yvyf0IIyD80%3D&reserved=3D0 >>>=20 >>> The PVALIDATE instruction validates or rescinds validation of a guest >>> page RMP entry. Upon completion, a return code is stored in EAX, rFLAG= S >>> bits OF, ZF, AF, PF and SF are set based on this return code. If the >>> instruction completed succesfully, the rFLAGS bit CF indicates if the >>> contents of the RMP entry were changed or not. >>>=20 >>> For more information about the instruction see AMD APM volume 3. >>>=20 >>> Cc: James Bottomley > >>> Cc: Min Xu > >>> Cc: Jiewen Yao > >>> Cc: Tom Lendacky > >>> Cc: Jordan Justen > >>> Cc: Ard Biesheuvel > >>> Cc: Laszlo Ersek > >>> Signed-off-by: Brijesh Singh > >>> --- >>> MdePkg/Include/Library/BaseLib.h | 37 +++++++++++++++++ >>> MdePkg/Library/BaseLib/BaseLib.inf | 1 + >>> MdePkg/Library/BaseLib/X64/Pvalidate.nasm | 43 ++++++++++++++++++++ >>> 3 files changed, 81 insertions(+) >>>=20 >>> diff --git a/MdePkg/Include/Library/BaseLib.h >>> b/MdePkg/Include/Library/BaseLib.h >>> index 1171a0ffb5..fee27e9a1b 100644 >>> --- a/MdePkg/Include/Library/BaseLib.h >>> +++ b/MdePkg/Include/Library/BaseLib.h >>> @@ -7495,5 +7495,42 @@ PatchInstructionX86 ( >>> IN UINTN ValueSize >>> ); >>>=20 >>> +/** >>> + Execute a PVALIDATE instruction to validate or rescnids validation o= f a >> guest >>> + page's RMP entry. >>> + >>> + Upon completion, in addition to the return value the instruction als= o >>> updates >>> + the eFlags. A caller must check both the return code as well as eFla= gs >> to >>> + determine if the RMP entry has been updated. >>> + >>> + The function is available on x64. >>> + >>> + @param[in] Address The guest virtual address to validate. >>> + @param[in] PageSize The page size to use. >>> + @param[i] Validate Validate or rescinds. >>> + @param[out] Eflags The value of Eflags after PVALIDATE >>> completion. >>> + >>> + @retval PvalidateRetValue The return value from the PVALIDATE >>> instruction. >>> +**/ >>> +typedef enum { >>> + PVALIDATE_PAGE_SIZE_4K =3D 0, >>> + PVALIDATE_PAGE_SIZE_2M, >>> +} PvalidatePageSize; >>> + >>> +typedef enum { >>> + PVALIDATE_RET_SUCCESS =3D 0, >>> + PVALIDATE_RET_FAIL_INPUT =3D 1, >>> + PVALIDATE_RET_FAIL_SIZEMISMATCH =3D 6, >>> +} PvalidateRetValue; >>> + >>> +PvalidateRetValue >>> +EFIAPI >>> +AsmPvalidate ( >>> + IN PvalidatePageSize PageSize, >>> + IN BOOLEAN Validate, >>> + IN UINTN Address, >>> + OUT IA32_EFLAGS32 *Eflags >>> + ); >>> + >>> #endif // defined (MDE_CPU_IA32) || defined (MDE_CPU_X64) >>> #endif // !defined (__BASE_LIB__) >>> diff --git a/MdePkg/Library/BaseLib/BaseLib.inf >>> b/MdePkg/Library/BaseLib/BaseLib.inf >>> index 3b85c56c3c..01aa5cc7a4 100644 >>> --- a/MdePkg/Library/BaseLib/BaseLib.inf >>> +++ b/MdePkg/Library/BaseLib/BaseLib.inf >>> @@ -319,6 +319,7 @@ >>> X64/RdRand.nasm >>> X64/XGetBv.nasm >>> X64/VmgExit.nasm >>> + X64/Pvalidate.nasm >>> ChkStkGcc.c | GCC >>>=20 >>> [Sources.EBC] >>> diff --git a/MdePkg/Library/BaseLib/X64/Pvalidate.nasm >>> b/MdePkg/Library/BaseLib/X64/Pvalidate.nasm >>> new file mode 100644 >>> index 0000000000..f2aba114ac >>> --- /dev/null >>> +++ b/MdePkg/Library/BaseLib/X64/Pvalidate.nasm >>> @@ -0,0 +1,43 @@ >>>=20 >> +;---------------------------------------------------------------------= ----- >> --- >>> +; >>> +; Copyright (c) 2020-2021, AMD. All rights reserved.
>>> +; SPDX-License-Identifier: BSD-2-Clause-Patent >>> +; >>> +; Module Name: >>> +; >>> +; Pvalidate.Asm >>> +; >>> +; Abstract: >>> +; >>> +; AsmPvalidate function >>> +; >>> +; Notes: >>> +; >>>=20 >> +;---------------------------------------------------------------------= ----- >> --- >>> + >>> + SECTION .text >>> + >>>=20 >> +;---------------------------------------------------------------------= ----- >> --- >>> +; PvalidateRetValue >>> +; EFIAPI >>> +; AsmPvalidate ( >>> +; IN UINT32 RmpPageSize >>> +; IN UINT32 Validate, >>> +; IN UINTN Address, >>> +; OUT UINTN *Eflags, >>> +; ) >>>=20 >> +;---------------------------------------------------------------------= ----- >> --- >>> +global ASM_PFX(AsmPvalidate) >>> +ASM_PFX(AsmPvalidate): >>> + mov rax, r8 >>> + >>> + ; PVALIDATE instruction opcode >>> + DB 0xF2, 0x0F, 0x01, 0xFF >>> + >>> + ; Read the Eflags >>> + pushfq >>> + pop r8 >>> + mov [r9], r8 >>> + >>> + ; The PVALIDATE instruction returns the status in rax register. >>> + ret >>> -- >>> 2.17.1 >>>=20 >>>=20 >>>=20 >>>=20 >>>=20 >>=20 >>=20 >=20 >=20 >=20 --Apple-Mail=_9D9AB40A-51C4-4BC7-BBF4-ED60450282A7 Content-Transfer-Encoding: quoted-printable Content-Type: text/html; charset=utf-8

On Mar 25, 2= 021, at 3:54 AM, Brijesh Singh <brijesh.singh@amd.com> wrote:

On 3/24/21 9:49 PM, gaoliming wrote:
Is this API X64 only? Or IA32 and X64 both?


Theoretically the instruction is avai= lable on both IA32 and X64 but its
used only in X64. AMD SEV, SEV-ES and SEV-SNP support is avai= lable for
X64 arch only= . I was not sure if the EDK2 community is okay with the
dead-code. Do you think it still makes sen= se to add the IA32 API for it ?


If this is only implemented for MDE_CPU_X64 should i= t be only defined in BaseLIib.h for MDE_CPU_X64? vs. "#endif // defined (MD= E_CPU_IA32) || defined (MDE_CPU_X64)=E2=80=9D?

I think today we may only have types in MDE_CPU_X64 only and all th= e lib functions are in "#if defined (MDE_CPU_IA32) || defined (MDE_CPU_X64)= = =E2=80=9D. So we should think about adding an IA32 function implementation= or not defining the function to exist for MDE_CPU_IA32 in BaseLib.h?
=

What do other people think?

Thanks,

Andrew Fish=

<= br style=3D"caret-color: rgb(0, 0, 0); font-family: Helvetica; font-size: 1= 2px; font-style: normal; font-variant-caps: normal; font-weight: normal; le= tter-spacing: normal; text-align: start; text-indent: 0px; text-transform: = none; white-space: normal; word-spacing: 0px; -webkit-text-stroke-width: 0p= x; text-decoration: none;" class=3D"">

Th= anks
Liming
-----=E9=82=AE=E4=BB=B6=E5=8E=9F=E4=BB=B6-----
=E5=8F=91=E4= = =BB=B6=E4=BA=BA: devel@= edk2.groups.io <d= evel@edk2.groups.io> =E4=BB=A3=E8=A1=A8 Brijesh Singh
= = =E5=8F=91=E9=80=81=E6=97=B6=E9=97=B4: 2021=E5=B9=B43=E6=9C=8824=E6=97=A5 2= 3:32
=E6=94=B6=E4=BB=B6=E4=BA=BA: devel@edk2.groups.io
=E6=8A=84=E9= = =80=81: Brijesh Singh <brijesh.singh@amd.com>; James Bottomley
<jejb@linux.ibm.com>; M= in Xu <min.m.xu@intel.c= om>; Jiewen Yao
<jiewen.yao@intel.com>; Tom Lendacky <thomas.lendacky@amd.com>;=
Jordan Justen <jordan.l.justen@intel.com>; Ard Biesheuvel
<ardb+tianoco= re@kernel.org>; Laszlo Ersek <lersek@redhat.com>
=E4=B8=BB=E9=A2=98: [e= dk2-devel] [RFC PATCH 09/19] MdePkg: Add AsmPvalidate() support

BZ: https://nam11.safelinks.protection.outlook.com/?url=3Dh= ttps%3A%2F%2Fbugzilla.tianocore.org%2Fshow_bug.cgi%3Fid%3D3275&amp;data= = =3D04%7C01%7Cbrijesh.singh%40amd.com%7C125d11ea64cf4f4ecd2108d8ef38a8e7%7C= 3dd8961fe4884e608e11a82d994e183d%7C0%7C0%7C637522373939810930%7CUnknown%7CT= WFpbGZsb3d8eyJWIjoiMC4wLjAwMDAiLCJQIjoiV2luMzIiLCJBTiI6Ik1haWwiLCJXVCI6Mn0%= 3D%7C1000&amp;sdata=3Df3fM%2Fnw3X1lHhf7SPKTxDOLo0GcnU465yvyf0IIyD80%3D&= amp;amp;reserved=3D0

The PVALIDATE instruc= tion validates or rescinds validation of a guest
page RMP ent= ry. Upon completion, a return code is stored in EAX, rFLAGS
b= its OF, ZF, AF, PF and SF are set based on this return code. If the
instruction completed succesfully, the rFLAGS bit CF indicates if th= e
contents of the RMP entry were changed or not.

For more information about the instruction see AMD APM vol= ume 3.

Cc: James Bottomley <jejb@linux.ibm.com>
= Cc: Min Xu <min.m.xu@in= tel.com>
Cc: Jiewen Yao <jiewen.yao@intel.com>
Cc: Tom= Lendacky <thomas.= lendacky@amd.com>
Cc: Jordan Justen <jordan.l.justen@intel.com>=
Cc: Ard Biesheuvel <ardb+tianocore@kernel.org>
Cc: Lasz= lo Ersek <lersek@redhat.= com>
Signed-off-by: Brijesh Singh <brijesh.singh@amd.com>
---
MdePkg/Include/Library/BaseLib.h    = ;      | 37 +++++++++++++++++
M= dePkg/Library/BaseLib/BaseLib.inf        = ;|  1 +
MdePkg/Library/BaseLib/X64/Pvalidate.nasm | 43 += +++++++++++++++++++
3 files changed, 81 insertions(+)

diff --git a/MdePkg/Include/Library/BaseLib.h
b/MdePkg/Include/Library/BaseLib.h
index 1171a0ffb5..f= ee27e9a1b 100644
--- a/MdePkg/Include/Library/BaseLib.h
+++ b/MdePkg/Include/Library/BaseLib.h
@@ -7495,5 +7= 495,42 @@ PatchInstructionX86 (
  IN  UINTN &n= bsp;            = ;      ValueSize
  );=

+/**
+ Execute a PVALIDATE inst= ruction to validate or rescnids validation of a
= guest
+ page's RMP entry= .
+
+ Upon completion, in addition to the retur= n value the instruction also
updates
+ the eFla= gs. A caller must check both the return code as well as eFlags
to
+ dete= rmine if the RMP entry has been updated.
+
+ Th= e function is available on x64.
+
+ @param[in] =    Address        The gue= st virtual address to validate.
+ @param[in]   &nbs= p;PageSize       The page size to use.
+ @param[i]     Validate    &nbs= p;  Validate or rescinds.
+ @param[out]   = ;Eflags         The value of Eflags= after PVALIDATE
completion.
+
+ = @retval       PvalidateRetValue  The ret= urn value from the PVALIDATE
instruction.
+**/<= br class=3D"">+typedef enum {
+  PVALIDATE_PAGE_SIZE_4K = = =3D 0,
+  PVALIDATE_PAGE_SIZE_2M,
+} Pval= idatePageSize;
+
+typedef enum {
= +  PVALIDATE_RET_SUCCESS =3D 0,
+  PVALIDATE_RET_FA= IL_INPUT =3D 1,
+  PVALIDATE_RET_FAIL_SIZEMISMATCH =3D 6= ,
+} PvalidateRetValue;
+
+Pvalid= ateRetValue
+EFIAPI
+AsmPvalidate (
+  IN   PvalidatePageSize      &= nbsp;PageSize,
+  IN   BOOLEAN   &nb= sp;            =  Validate,
+  IN   UINTN   &nbs= p;            &= nbsp;  Address,
+  OUT  IA32_EFLAGS32 &nb= sp;         *Eflags
+  );
+
#endif // defined (MDE_CPU_= IA32) || defined (MDE_CPU_X64)
#endif // !defined (__BASE_LIB= __)
diff --git a/MdePkg/Library/BaseLib/BaseLib.inf
b/MdePkg/Library/BaseLib/BaseLib.inf
index 3b85c56c3c.= .01aa5cc7a4 100644
--- a/MdePkg/Library/BaseLib/BaseLib.inf+++ b/MdePkg/Library/BaseLib/BaseLib.inf
@@ -319= ,6 +319,7 @@
  X64/RdRand.nasm
 =  X64/XGetBv.nasm
  X64/VmgExit.nasm
+  X64/Pvalidate.nasm
  ChkStkGcc.c &nb= sp;| GCC

[Sources.EBC]
diff --gi= t a/MdePkg/Library/BaseLib/X64/Pvalidate.nasm
b/MdePkg/Librar= y/BaseLib/X64/Pvalidate.nasm
new file mode 100644
index 0000000000..f2aba114ac
--- /dev/null
+= ++ b/MdePkg/Library/BaseLib/X64/Pvalidate.nasm
@@ -0,0 +1,43 = @@

+;----------------------------= ----------------------------------------------
---
+;
+; Copyright (= c) 2020-2021, AMD. All rights reserved.<BR>
+; SPDX-Lic= ense-Identifier: BSD-2-Clause-Patent
+;
+; Modu= le Name:
+;
+;   Pvalidate.Asm
+;
+; Abstract:
+;
+; &nb= sp; AsmPvalidate function
+;
+; Notes:
+;

+;-----------------= ---------------------------------------------------------
---=
+
+  = ;  SECTION .text
+

+;---------------------------------------------------------------= -----------
---
+;  PvalidateRetValue
+;  EFIAPI
+;  AsmPvalidate (
+;    IN  &nbs= p;UINT32  RmpPageSize
+;    IN  &nbs= p;UINT32  Validate,
+;    IN   = UINTN   Address,
+;    OUT  UIN= TN  *Eflags,
+;    )

+;---------------------------------------------------= -----------------------
---
+global ASM_PFX(AsmPvalidate)
+ASM_PFX(AsmP= validate):
+  mov     rax, r8
+
+  ; PVALIDATE instruction opcode
+  DB      0xF2, 0x0F, 0x01, 0xFF
+
+  ; Read the Eflags
+  push= fq
+  pop     r8
+ &nb= sp;mov     [r9], r8
+
+ &nb= sp;; The PVALIDATE instruction returns the status in rax register.
+  ret
--
2.17.1









=

--Apple-Mail=_9D9AB40A-51C4-4BC7-BBF4-ED60450282A7--