From mboxrd@z Thu Jan 1 00:00:00 1970 Authentication-Results: mx.groups.io; dkim=missing; spf=pass (domain: intel.com, ip: 192.55.52.120, mailfrom: donald.kuo@intel.com) Received: from mga04.intel.com (mga04.intel.com [192.55.52.120]) by groups.io with SMTP; Wed, 14 Aug 2019 21:40:32 -0700 X-Amp-Result: SKIPPED(no attachment in message) X-Amp-File-Uploaded: False Received: from fmsmga001.fm.intel.com ([10.253.24.23]) by fmsmga104.fm.intel.com with ESMTP/TLS/DHE-RSA-AES256-GCM-SHA384; 14 Aug 2019 21:40:31 -0700 X-ExtLoop1: 1 X-IronPort-AV: E=Sophos;i="5.64,387,1559545200"; d="scan'208";a="194691750" Received: from fmsmsx103.amr.corp.intel.com ([10.18.124.201]) by fmsmga001.fm.intel.com with ESMTP; 14 Aug 2019 21:40:31 -0700 Received: from fmsmsx157.amr.corp.intel.com (10.18.116.73) by FMSMSX103.amr.corp.intel.com (10.18.124.201) with Microsoft SMTP Server (TLS) id 14.3.439.0; Wed, 14 Aug 2019 21:40:31 -0700 Received: from shsmsx101.ccr.corp.intel.com (10.239.4.153) by FMSMSX157.amr.corp.intel.com (10.18.116.73) with Microsoft SMTP Server (TLS) id 14.3.439.0; Wed, 14 Aug 2019 21:40:31 -0700 Received: from shsmsx108.ccr.corp.intel.com ([169.254.8.163]) by SHSMSX101.ccr.corp.intel.com ([169.254.1.80]) with mapi id 14.03.0439.000; Thu, 15 Aug 2019 12:40:27 +0800 From: "Donald Kuo" To: "Gao, Liming" , "Dong, Eric" , "devel@edk2.groups.io" CC: "Ni, Ray" , "Zeng, Star" , "Chan, Amy" , "Chaganty, Rangasai V" , "Lai, Luke" , "Li, Kevin Y" , "Laszlo Ersek (lersek@redhat.com)" , "leif.lindholm@linaro.org" , "afish@apple.com" , "Kinney, Michael D" Subject: Re: [edk2-devel] [PATCH] UefiCpuPkg: Adding a new TSC library by using CPUID(0x15) TSC leaf Thread-Topic: [edk2-devel] [PATCH] UefiCpuPkg: Adding a new TSC library by using CPUID(0x15) TSC leaf Thread-Index: AQHVUcVZCm3GdlbNj0yDbGEaEq9XIKb7g3SwgAAAyPD//46ugIAAkCLA Date: Thu, 15 Aug 2019 04:40:27 +0000 Message-ID: References: <20190813105312.14836-1-donald.kuo@intel.com> <4A89E2EF3DFEDB4C8BFDE51014F606A14E4D15C2@SHSMSX104.ccr.corp.intel.com> In-Reply-To: <4A89E2EF3DFEDB4C8BFDE51014F606A14E4D15C2@SHSMSX104.ccr.corp.intel.com> Accept-Language: zh-TW, en-US X-MS-Has-Attach: yes X-MS-TNEF-Correlator: x-titus-metadata-40: eyJDYXRlZ29yeUxhYmVscyI6IiIsIk1ldGFkYXRhIjp7Im5zIjoiaHR0cDpcL1wvd3d3LnRpdHVzLmNvbVwvbnNcL0ludGVsMyIsImlkIjoiYTI2NDIwNTQtYzVjZC00OTYxLWI0Y2UtN2Q4Y2QwMTc4ZDM0IiwicHJvcHMiOlt7Im4iOiJDVFBDbGFzc2lmaWNhdGlvbiIsInZhbHMiOlt7InZhbHVlIjoiQ1RQX05UIn1dfV19LCJTdWJqZWN0TGFiZWxzIjpbXSwiVE1DVmVyc2lvbiI6IjE3LjEwLjE4MDQuNDkiLCJUcnVzdGVkTGFiZWxIYXNoIjoiVGZpbVlveVhLSmtKeWJxUVZuU3M0SXQ5eW43NVBxSW5JNWdFWXdNMUdscWFLVTZ4aFF3UVwveVFDalNHQlA2RGEifQ== x-ctpclassification: CTP_NT dlp-product: dlpe-windows dlp-version: 11.2.0.6 dlp-reaction: no-action x-originating-ip: [10.239.127.40] MIME-Version: 1.0 Return-Path: donald.kuo@intel.com X-Groupsio-MsgNum: 45683 Content-Language: en-US Content-Type: multipart/mixed; boundary="_002_FDA095DBC50560498153B1BF30526B9FA14EF7D9SHSMSX108ccrcor_" --_002_FDA095DBC50560498153B1BF30526B9FA14EF7D9SHSMSX108ccrcor_ Content-Type: text/plain; charset="us-ascii" Content-Transfer-Encoding: quoted-printable Thanks Liming for review. Update UefiCpuPkg.uni for review again. Thanks, Donald > -----Original Message----- > From: Gao, Liming > Sent: Thursday, August 15, 2019 12:03 PM > To: Kuo, Donald ; Dong, Eric > ; devel@edk2.groups.io > Cc: Ni, Ray ; Zeng, Star ; Chan, > Amy ; Chaganty, Rangasai V > ; Lai, Luke ; Li, Kev= in > Y ; Laszlo Ersek (lersek@redhat.com) > ; leif.lindholm@linaro.org; afish@apple.com; Kinney, > Michael D > Subject: RE: [edk2-devel] [PATCH] UefiCpuPkg: Adding a new TSC library b= y > using CPUID(0x15) TSC leaf >=20 > Donald: > This change is a new feature. Now, it is not in edk2 feature planning = list. If > you want to catch it into 201908 stable tag, please get approve from > Stewards first. I have cc this mail to all Stewards. >=20 > For this patch, I have one minor comment. You add one PCD in UefiCpuPk= g > DEC. Please also add this PCD into UefiCpuPkg.uni. >=20 > Thanks > Liming > > -----Original Message----- > > From: Kuo, Donald > > Sent: Thursday, August 15, 2019 11:02 AM > > To: Dong, Eric ; devel@edk2.groups.io; Gao, > > Liming > > Cc: Ni, Ray ; Zeng, Star ; > > Chan, Amy ; Chaganty, Rangasai V > > ; Lai, Luke ; Li, > > Kevin Y > > Subject: RE: [edk2-devel] [PATCH] UefiCpuPkg: Adding a new TSC library > > by using CPUID(0x15) TSC leaf > > > > Hi Liming, > > > > As we plan to add new TimerLib to use CPUID Leaf 0x15 (CPU XTAL clock > > frequency) to calculate TSC to resolve performance value unreliable > concern. > > > > As the code review had got approved and planning into 201908 stable > > tag. Please help to review whether any concern for 201908 stable tag. > > > > Thanks, > > Donald > > > > > -----Original Message----- > > > From: Dong, Eric > > > Sent: Thursday, August 15, 2019 10:46 AM > > > To: devel@edk2.groups.io; Kuo, Donald > > > Cc: Ni, Ray ; Zeng, Star ; > > > Chan, Amy ; Chaganty, Rangasai V > > > > > > Subject: RE: [edk2-devel] [PATCH] UefiCpuPkg: Adding a new TSC > > > library by using CPUID(0x15) TSC leaf > > > > > > Reviewed-by: Eric Dong > > > > > > > -----Original Message----- > > > > From: devel@edk2.groups.io [mailto:devel@edk2.groups.io] On Behalf > > > > Of Donald Kuo > > > > Sent: Tuesday, August 13, 2019 6:53 PM > > > > To: devel@edk2.groups.io > > > > Cc: Ni, Ray ; Zeng, Star ; > > > > Dong, Eric ; Chan, Amy ; > > > > Chaganty, Rangasai V > > > > Subject: [edk2-devel] [PATCH] UefiCpuPkg: Adding a new TSC library > > > > by using > > > > CPUID(0x15) TSC leaf > > > > > > > > REF: https://bugzilla.tianocore.org/show_bug.cgi?id=3D1909 > > > > > > > > Cc: Ray Ni > > > > Cc: Star Zeng > > > > Cc: Eric Dong > > > > Cc: Amy Chan > > > > Cc: Rangasai V Chaganty > > > > Signed-off-by: Donald Kuo > > > > --- > > > > UefiCpuPkg/Library/CpuTimerLib/BaseCpuTimerLib.c | 41 +++ > > > > UefiCpuPkg/Library/CpuTimerLib/BaseCpuTimerLib.inf | 35 +++ > > > > UefiCpuPkg/Library/CpuTimerLib/BaseCpuTimerLib.uni | 17 ++ > > > > UefiCpuPkg/Library/CpuTimerLib/CpuTimerLib.c | 274 > > > > +++++++++++++++++++++ > > > > UefiCpuPkg/Library/CpuTimerLib/DxeCpuTimerLib.c | 81 ++++++ > > > > UefiCpuPkg/Library/CpuTimerLib/DxeCpuTimerLib.inf | 37 +++ > > > > UefiCpuPkg/Library/CpuTimerLib/DxeCpuTimerLib.uni | 17 ++ > > > > UefiCpuPkg/Library/CpuTimerLib/PeiCpuTimerLib.c | 58 +++++ > > > > UefiCpuPkg/Library/CpuTimerLib/PeiCpuTimerLib.inf | 36 +++ > > > > UefiCpuPkg/Library/CpuTimerLib/PeiCpuTimerLib.uni | 17 ++ > > > > UefiCpuPkg/UefiCpuPkg.dec | 8 + > > > > UefiCpuPkg/UefiCpuPkg.dsc | 3 + > > > > 12 files changed, 624 insertions(+) create mode 100644 > > > > UefiCpuPkg/Library/CpuTimerLib/BaseCpuTimerLib.c > > > > create mode 100644 > > > UefiCpuPkg/Library/CpuTimerLib/BaseCpuTimerLib.inf > > > > create mode 100644 > > > UefiCpuPkg/Library/CpuTimerLib/BaseCpuTimerLib.uni > > > > create mode 100644 UefiCpuPkg/Library/CpuTimerLib/CpuTimerLib.c > > > > create mode 100644 > > > > UefiCpuPkg/Library/CpuTimerLib/DxeCpuTimerLib.c > > > > create mode 100644 > > > > UefiCpuPkg/Library/CpuTimerLib/DxeCpuTimerLib.inf > > > > create mode 100644 > > > UefiCpuPkg/Library/CpuTimerLib/DxeCpuTimerLib.uni > > > > create mode 100644 > > > > UefiCpuPkg/Library/CpuTimerLib/PeiCpuTimerLib.c > > > > create mode 100644 > > > > UefiCpuPkg/Library/CpuTimerLib/PeiCpuTimerLib.inf > > > > create mode 100644 > > > > UefiCpuPkg/Library/CpuTimerLib/PeiCpuTimerLib.uni > > > > > > > > diff --git a/UefiCpuPkg/Library/CpuTimerLib/BaseCpuTimerLib.c > > > > b/UefiCpuPkg/Library/CpuTimerLib/BaseCpuTimerLib.c > > > > new file mode 100644 > > > > index 0000000000..6ddf917bad > > > > --- /dev/null > > > > +++ b/UefiCpuPkg/Library/CpuTimerLib/BaseCpuTimerLib.c > > > > @@ -0,0 +1,41 @@ > > > > +/** @file > > > > + CPUID Leaf 0x15 for Core Crystal Clock frequency instance as > > > > +Base Timer > > > > Library. > > > > + > > > > + Copyright (c) 2019 Intel Corporation. All rights reserved.
> > > > + SPDX-License-Identifier: BSD-2-Clause-Patent > > > > + > > > > +**/ > > > > + > > > > +#include > > > > +#include > > > > +#include > > > > + > > > > +/** > > > > + CPUID Leaf 0x15 for Core Crystal Clock Frequency. > > > > + > > > > + The TSC counting frequency is determined by using CPUID leaf 0x= 15. > > > > Frequency in MHz =3D Core XTAL frequency * EBX/EAX. > > > > + In newer flavors of the CPU, core xtal frequency is returned in > > > > + ECX or 0 if > > > > not supported. > > > > + @return The number of TSC counts per second. > > > > + > > > > +**/ > > > > +UINT64 > > > > +CpuidCoreClockCalculateTscFrequency ( > > > > + VOID > > > > + ); > > > > + > > > > +/** > > > > + Internal function to retrieves the 64-bit frequency in Hz. > > > > + > > > > + Internal function to retrieves the 64-bit frequency in Hz. > > > > + > > > > + @return The frequency in Hz. > > > > + > > > > +**/ > > > > +UINT64 > > > > +InternalGetPerformanceCounterFrequency ( > > > > + VOID > > > > + ) > > > > +{ > > > > + return CpuidCoreClockCalculateTscFrequency (); } > > > > + > > > > diff --git a/UefiCpuPkg/Library/CpuTimerLib/BaseCpuTimerLib.inf > > > > b/UefiCpuPkg/Library/CpuTimerLib/BaseCpuTimerLib.inf > > > > new file mode 100644 > > > > index 0000000000..fd93adc5f1 > > > > --- /dev/null > > > > +++ b/UefiCpuPkg/Library/CpuTimerLib/BaseCpuTimerLib.inf > > > > @@ -0,0 +1,35 @@ > > > > +## @file > > > > +# Base CPU Timer Library > > > > +# > > > > +# Provides basic timer support using CPUID Leaf 0x15 XTAL freque= ncy. > > > > +The performance # counter features are provided by the > > > > +processors time > > > > stamp counter. > > > > +# > > > > +# Copyright (c) 2019, Intel Corporation. All rights > > > > +reserved.
# > > > > +SPDX-License-Identifier: BSD-2-Clause-Patent # ## > > > > + > > > > +[Defines] > > > > + INF_VERSION =3D 0x00010005 > > > > + BASE_NAME =3D BaseCpuTimerLib > > > > + FILE_GUID =3D F10B5B91-D15A-496C-B044-B523= 5721AA08 > > > > + MODULE_TYPE =3D BASE > > > > + VERSION_STRING =3D 1.0 > > > > + LIBRARY_CLASS =3D TimerLib|SEC PEI_CORE PEIM > > > > + MODULE_UNI_FILE =3D BaseCpuTimerLib.uni > > > > + > > > > +[Sources] > > > > + CpuTimerLib.c > > > > + BaseCpuTimerLib.c > > > > + > > > > +[Packages] > > > > + MdePkg/MdePkg.dec > > > > + UefiCpuPkg/UefiCpuPkg.dec > > > > + > > > > +[LibraryClasses] > > > > + BaseLib > > > > + PcdLib > > > > + DebugLib > > > > + > > > > +[Pcd] > > > > + gUefiCpuPkgTokenSpaceGuid.PcdCpuCoreCrystalClockFrequency ## > > > > +CONSUMES > > > > diff --git a/UefiCpuPkg/Library/CpuTimerLib/BaseCpuTimerLib.uni > > > > b/UefiCpuPkg/Library/CpuTimerLib/BaseCpuTimerLib.uni > > > > new file mode 100644 > > > > index 0000000000..fcf2b0fbcb > > > > --- /dev/null > > > > +++ b/UefiCpuPkg/Library/CpuTimerLib/BaseCpuTimerLib.uni > > > > @@ -0,0 +1,17 @@ > > > > +// /** @file > > > > +// Base CPU Timer Library > > > > +// > > > > +// Provides basic timer support using CPUID Leaf 0x15 XTAL freque= ncy. > > > > +The performance // counter features are provided by the > > > > +processors time > > > > stamp counter. > > > > +// > > > > +// Copyright (c) 2019, Intel Corporation. All rights > > > > +reserved.
// // SPDX-License-Identifier: BSD-2-Clause-Patent > > > > +// // **/ > > > > + > > > > + > > > > +#string STR_MODULE_ABSTRACT #language en-US "CPU Time= r > > > > Library" > > > > + > > > > +#string STR_MODULE_DESCRIPTION #language en-US "Provides > > > basic > > > > timer support using CPUID Leaf 0x15 XTAL frequency." > > > > + > > > > diff --git a/UefiCpuPkg/Library/CpuTimerLib/CpuTimerLib.c > > > > b/UefiCpuPkg/Library/CpuTimerLib/CpuTimerLib.c > > > > new file mode 100644 > > > > index 0000000000..0b9e9384f5 > > > > --- /dev/null > > > > +++ b/UefiCpuPkg/Library/CpuTimerLib/CpuTimerLib.c > > > > @@ -0,0 +1,274 @@ > > > > +/** @file > > > > + CPUID Leaf 0x15 for Core Crystal Clock frequency instance of > > > > +Timer > > > Library. > > > > + > > > > + Copyright (c) 2019 Intel Corporation. All rights reserved.
> > > > + SPDX-License-Identifier: BSD-2-Clause-Patent > > > > + > > > > +**/ > > > > + > > > > +#include > > > > +#include > > > > +#include > > > > +#include > > > > +#include > > > > +#include > > > > + > > > > +GUID mCpuCrystalFrequencyHobGuid =3D { 0xe1ec5ad0, 0x8569, 0x46bd= , > > > > +{ 0x8d, 0xcd, 0x3b, 0x9f, 0x6f, 0x45, 0x82, 0x7a } }; > > > > + > > > > +/** > > > > + Internal function to retrieves the 64-bit frequency in Hz. > > > > + > > > > + Internal function to retrieves the 64-bit frequency in Hz. > > > > + > > > > + @return The frequency in Hz. > > > > + > > > > +**/ > > > > +UINT64 > > > > +InternalGetPerformanceCounterFrequency ( > > > > + VOID > > > > + ); > > > > + > > > > +/** > > > > + CPUID Leaf 0x15 for Core Crystal Clock Frequency. > > > > + > > > > + The TSC counting frequency is determined by using CPUID leaf 0x= 15. > > > > Frequency in MHz =3D Core XTAL frequency * EBX/EAX. > > > > + In newer flavors of the CPU, core xtal frequency is returned in > > > > + ECX or 0 if > > > > not supported. > > > > + @return The number of TSC counts per second. > > > > + > > > > +**/ > > > > +UINT64 > > > > +CpuidCoreClockCalculateTscFrequency ( > > > > + VOID > > > > + ) > > > > +{ > > > > + UINT64 TscFrequency; > > > > + UINT64 CoreXtalFrequency; > > > > + UINT32 RegEax; > > > > + UINT32 RegEbx; > > > > + UINT32 RegEcx; > > > > + > > > > + // > > > > + // Use CPUID leaf 0x15 Time Stamp Counter and Nominal Core > > > > + Crystal Clock Information // EBX returns 0 if not supported. > > > > + ECX, if non zero, > > > > provides Core Xtal Frequency in hertz. > > > > + // TSC frequency =3D (ECX, Core Xtal Frequency) * EBX/EAX. > > > > + // > > > > + AsmCpuid (CPUID_TIME_STAMP_COUNTER, &RegEax, &RegEbx, > > > &RegEcx, > > > > NULL); > > > > + > > > > + // > > > > + // If EBX returns 0, the XTAL ratio is not enumerated. > > > > + // > > > > + ASSERT (RegEbx !=3D 0); > > > > + // > > > > + // If ECX returns 0, the XTAL frequency is not enumerated. > > > > + // > > > > + if (RegEcx =3D=3D 0) { > > > > + CoreXtalFrequency =3D PcdGet64 > > > > + (PcdCpuCoreCrystalClockFrequency); > > > > + } else { > > > > + CoreXtalFrequency =3D (UINT64) RegEcx; } > > > > + > > > > + // > > > > + // Calculate TSC frequency =3D (ECX, Core Xtal Frequency) * > > > > + EBX/EAX // TscFrequency =3D DivU64x32 (MultU64x32 > > > > + (CoreXtalFrequency, RegEbx) > > > > + + (UINT64)(RegEax >> 1), RegEax); > > > > + > > > > + return TscFrequency; > > > > +} > > > > + > > > > +/** > > > > + Stalls the CPU for at least the given number of ticks. > > > > + > > > > + Stalls the CPU for at least the given number of ticks. It's > > > > + invoked by > > > > + MicroSecondDelay() and NanoSecondDelay(). > > > > + > > > > + @param Delay A period of time to delay in ticks. > > > > + > > > > +**/ > > > > +VOID > > > > +InternalCpuDelay ( > > > > + IN UINT64 Delay > > > > + ) > > > > +{ > > > > + UINT64 Ticks; > > > > + > > > > + // > > > > + // The target timer count is calculated here // Ticks =3D > > > > + AsmReadTsc() + Delay; > > > > + > > > > + // > > > > + // Wait until time out > > > > + // Timer wrap-arounds are NOT handled correctly by this functio= n. > > > > + // Thus, this function must be called within 10 years of reset > > > > +since > > > > + // Intel guarantees a minimum of 10 years before the TSC wraps. > > > > + // > > > > + while (AsmReadTsc() <=3D Ticks) { > > > > + CpuPause(); > > > > + } > > > > +} > > > > + > > > > +/** > > > > + Stalls the CPU for at least the given number of microseconds. > > > > + > > > > + Stalls the CPU for the number of microseconds specified by > > > MicroSeconds. > > > > + > > > > + @param[in] MicroSeconds The minimum number of microseconds > to > > > > delay. > > > > + > > > > + @return MicroSeconds > > > > + > > > > +**/ > > > > +UINTN > > > > +EFIAPI > > > > +MicroSecondDelay ( > > > > + IN UINTN MicroSeconds > > > > + ) > > > > +{ > > > > + > > > > + InternalCpuDelay ( > > > > + DivU64x32 ( > > > > + MultU64x64 ( > > > > + MicroSeconds, > > > > + InternalGetPerformanceCounterFrequency () > > > > + ), > > > > + 1000000u > > > > + ) > > > > + ); > > > > + > > > > + return MicroSeconds; > > > > +} > > > > + > > > > +/** > > > > + Stalls the CPU for at least the given number of nanoseconds. > > > > + > > > > + Stalls the CPU for the number of nanoseconds specified by > NanoSeconds. > > > > + > > > > + @param NanoSeconds The minimum number of nanoseconds to > delay. > > > > + > > > > + @return NanoSeconds > > > > + > > > > +**/ > > > > +UINTN > > > > +EFIAPI > > > > +NanoSecondDelay ( > > > > + IN UINTN NanoSeconds > > > > + ) > > > > +{ > > > > + > > > > + InternalCpuDelay ( > > > > + DivU64x32 ( > > > > + MultU64x64 ( > > > > + NanoSeconds, > > > > + InternalGetPerformanceCounterFrequency () > > > > + ), > > > > + 1000000000u > > > > + ) > > > > + ); > > > > + > > > > + return NanoSeconds; > > > > +} > > > > + > > > > +/** > > > > + Retrieves the current value of a 64-bit free running performanc= e > counter. > > > > + > > > > + Retrieves the current value of a 64-bit free running > > > > + performance counter. The counter can either count up by 1 or co= unt > down by 1. > > > > + If the physical performance counter counts by a larger > > > > + increment, then the counter values must be translated. The > > > > + properties of the counter can be retrieved from > GetPerformanceCounterProperties(). > > > > + > > > > + @return The current value of the free running performance count= er. > > > > + > > > > +**/ > > > > +UINT64 > > > > +EFIAPI > > > > +GetPerformanceCounter ( > > > > + VOID > > > > + ) > > > > +{ > > > > + return AsmReadTsc (); > > > > +} > > > > + > > > > +/** > > > > + Retrieves the 64-bit frequency in Hz and the range of > > > > +performance counter > > > > + values. > > > > + > > > > + If StartValue is not NULL, then the value that the performance > > > > + counter starts with immediately after is it rolls over is > > > > + returned in StartValue. If EndValue is not NULL, then the value > > > > + that the performance counter end with immediately before it > > > > + rolls over is returned in EndValue. The 64-bit frequency of the > > > > + performance counter in Hz is always returned. If StartValue is > > > > + less than EndValue, then the performance counter counts up. If > > > > + StartValue is greater than EndValue, then the performance > > > > + counter counts down. For example, a 64-bit free running counter > > > > + that counts up would have a StartValue of > > > > + 0 and an EndValue of 0xFFFFFFFFFFFFFFFF. A 24-bit free running > > > > + counter > > > > that counts down would have a StartValue of 0xFFFFFF and an > > > > EndValue of > > > 0. > > > > + > > > > + @param StartValue The value the performance counter starts > > > > + with when > > > > it > > > > + rolls over. > > > > + @param EndValue The value that the performance counter ends > with > > > > before > > > > + it rolls over. > > > > + > > > > + @return The frequency in Hz. > > > > + > > > > +**/ > > > > +UINT64 > > > > +EFIAPI > > > > +GetPerformanceCounterProperties ( > > > > + OUT UINT64 *StartValue, OPTIONAL > > > > + OUT UINT64 *EndValue OPTIONAL > > > > + ) > > > > +{ > > > > + if (StartValue !=3D NULL) { > > > > + *StartValue =3D 0; > > > > + } > > > > + > > > > + if (EndValue !=3D NULL) { > > > > + *EndValue =3D 0xffffffffffffffffULL; } return > > > > + InternalGetPerformanceCounterFrequency (); } > > > > + > > > > +/** > > > > + Converts elapsed ticks of performance counter to time in > nanoseconds. > > > > + > > > > + This function converts the elapsed ticks of running performance > > > > + counter to time value in unit of nanoseconds. > > > > + > > > > + @param Ticks The number of elapsed ticks of running > performance > > > > counter. > > > > + > > > > + @return The elapsed time in nanoseconds. > > > > + > > > > +**/ > > > > +UINT64 > > > > +EFIAPI > > > > +GetTimeInNanoSecond ( > > > > + IN UINT64 Ticks > > > > + ) > > > > +{ > > > > + UINT64 Frequency; > > > > + UINT64 NanoSeconds; > > > > + UINT64 Remainder; > > > > + INTN Shift; > > > > + > > > > + Frequency =3D GetPerformanceCounterProperties (NULL, NULL); > > > > + > > > > + // > > > > + // Ticks > > > > + // Time =3D --------- x 1,000,000,000 > > > > + // Frequency > > > > + // > > > > + NanoSeconds =3D MultU64x32 (DivU64x64Remainder (Ticks, Frequenc= y, > > > > + &Remainder), 1000000000u); > > > > + > > > > + // > > > > + // Ensure (Remainder * 1,000,000,000) will not overflow 64-bit. > > > > + // Since 2^29 < 1,000,000,000 =3D 0x3B9ACA00 < 2^30, Remainder > > > > + should < > > > > + 2^(64-30) =3D 2^34, // i.e. highest bit set in Remainder should= <=3D 33. > > > > + // > > > > + Shift =3D MAX (0, HighBitSet64 (Remainder) - 33); Remainder = =3D > > > > + RShiftU64 (Remainder, (UINTN) Shift); Frequency =3D RShiftU64 > > > > + (Frequency, (UINTN) Shift); NanoSeconds +=3D DivU64x64Remainder > > > > + (MultU64x32 (Remainder, 1000000000u), Frequency, NULL); > > > > + > > > > + return NanoSeconds; > > > > +} > > > > + > > > > diff --git a/UefiCpuPkg/Library/CpuTimerLib/DxeCpuTimerLib.c > > > > b/UefiCpuPkg/Library/CpuTimerLib/DxeCpuTimerLib.c > > > > new file mode 100644 > > > > index 0000000000..2d0ef6ab07 > > > > --- /dev/null > > > > +++ b/UefiCpuPkg/Library/CpuTimerLib/DxeCpuTimerLib.c > > > > @@ -0,0 +1,81 @@ > > > > +/** @file > > > > + CPUID Leaf 0x15 for Core Crystal Clock frequency instance of > > > > +Timer > > > Library. > > > > + > > > > + Copyright (c) 2019 Intel Corporation. All rights reserved.
> > > > + SPDX-License-Identifier: BSD-2-Clause-Patent > > > > + > > > > +**/ > > > > + > > > > +#include > > > > +#include > > > > +#include > > > > +#include > > > > + > > > > +extern GUID mCpuCrystalFrequencyHobGuid; > > > > + > > > > +/** > > > > + CPUID Leaf 0x15 for Core Crystal Clock Frequency. > > > > + > > > > + The TSC counting frequency is determined by using CPUID leaf 0x= 15. > > > > Frequency in MHz =3D Core XTAL frequency * EBX/EAX. > > > > + In newer flavors of the CPU, core xtal frequency is returned in > > > > + ECX or 0 if > > > > not supported. > > > > + @return The number of TSC counts per second. > > > > + > > > > +**/ > > > > +UINT64 > > > > +CpuidCoreClockCalculateTscFrequency ( > > > > + VOID > > > > + ); > > > > + > > > > +// > > > > +// Cached CPU Crystal counter frequency // > > > > +UINT64 mCpuCrystalCounterFrequency =3D 0; > > > > + > > > > + > > > > +/** > > > > + Internal function to retrieves the 64-bit frequency in Hz. > > > > + > > > > + Internal function to retrieves the 64-bit frequency in Hz. > > > > + > > > > + @return The frequency in Hz. > > > > + > > > > +**/ > > > > +UINT64 > > > > +InternalGetPerformanceCounterFrequency ( > > > > + VOID > > > > + ) > > > > +{ > > > > + return mCpuCrystalCounterFrequency; } > > > > + > > > > +/** > > > > + The constructor function is to initialize CpuCrystalCounterFreq= uency. > > > > + > > > > + @param ImageHandle The firmware allocated handle for the EFI > image. > > > > + @param SystemTable A pointer to the EFI System Table. > > > > + > > > > + @retval EFI_SUCCESS The constructor always returns > > > RETURN_SUCCESS. > > > > + > > > > +**/ > > > > +EFI_STATUS > > > > +EFIAPI > > > > +DxeCpuTimerLibConstructor ( > > > > + IN EFI_HANDLE ImageHandle, > > > > + IN EFI_SYSTEM_TABLE *SystemTable > > > > + ) > > > > +{ > > > > + EFI_HOB_GUID_TYPE *GuidHob; > > > > + > > > > + // > > > > + // Initialize CpuCrystalCounterFrequency // GuidHob =3D > > > > + GetFirstGuidHob (&mCpuCrystalFrequencyHobGuid); if (GuidHob != =3D > > > > + NULL) { > > > > + mCpuCrystalCounterFrequency =3D *(UINT64*)GET_GUID_HOB_DATA > > > > + (GuidHob); } else { > > > > + mCpuCrystalCounterFrequency =3D > > > CpuidCoreClockCalculateTscFrequency > > > > + (); } > > > > + > > > > + return EFI_SUCCESS; > > > > +} > > > > + > > > > diff --git a/UefiCpuPkg/Library/CpuTimerLib/DxeCpuTimerLib.inf > > > > b/UefiCpuPkg/Library/CpuTimerLib/DxeCpuTimerLib.inf > > > > new file mode 100644 > > > > index 0000000000..6c83549c87 > > > > --- /dev/null > > > > +++ b/UefiCpuPkg/Library/CpuTimerLib/DxeCpuTimerLib.inf > > > > @@ -0,0 +1,37 @@ > > > > +## @file > > > > +# DXE CPU Timer Library > > > > +# > > > > +# Provides basic timer support using CPUID Leaf 0x15 XTAL freque= ncy. > > > > +The performance # counter features are provided by the > > > > +processors time > > > > stamp counter. > > > > +# > > > > +# Copyright (c) 2019, Intel Corporation. All rights > > > > +reserved.
# > > > > +SPDX-License-Identifier: BSD-2-Clause-Patent # ## > > > > + > > > > +[Defines] > > > > + INF_VERSION =3D 0x00010005 > > > > + BASE_NAME =3D DxeCpuTimerLib > > > > + FILE_GUID =3D F22CC0DA-E7DB-4E4D-ABE2-A608= 188233A2 > > > > + MODULE_TYPE =3D DXE_DRIVER > > > > + VERSION_STRING =3D 1.0 > > > > + LIBRARY_CLASS =3D TimerLib|DXE_CORE DXE_DRIVER > > > > DXE_RUNTIME_DRIVER DXE_SMM_DRIVER UEFI_APPLICATION > > > UEFI_DRIVER > > > > SMM_CORE > > > > + CONSTRUCTOR =3D DxeCpuTimerLibConstructor > > > > + MODULE_UNI_FILE =3D DxeCpuTimerLib.uni > > > > + > > > > +[Sources] > > > > + CpuTimerLib.c > > > > + DxeCpuTimerLib.c > > > > + > > > > +[Packages] > > > > + MdePkg/MdePkg.dec > > > > + UefiCpuPkg/UefiCpuPkg.dec > > > > + > > > > +[LibraryClasses] > > > > + BaseLib > > > > + PcdLib > > > > + DebugLib > > > > + HobLib > > > > + > > > > +[Pcd] > > > > + gUefiCpuPkgTokenSpaceGuid.PcdCpuCoreCrystalClockFrequency ## > > > > +CONSUMES > > > > diff --git a/UefiCpuPkg/Library/CpuTimerLib/DxeCpuTimerLib.uni > > > > b/UefiCpuPkg/Library/CpuTimerLib/DxeCpuTimerLib.uni > > > > new file mode 100644 > > > > index 0000000000..f55b92abac > > > > --- /dev/null > > > > +++ b/UefiCpuPkg/Library/CpuTimerLib/DxeCpuTimerLib.uni > > > > @@ -0,0 +1,17 @@ > > > > +// /** @file > > > > +// DXE CPU Timer Library > > > > +// > > > > +// Provides basic timer support using CPUID Leaf 0x15 XTAL freque= ncy. > > > > +The performance // counter features are provided by the > > > > +processors time > > > > stamp counter. > > > > +// > > > > +// Copyright (c) 2019, Intel Corporation. All rights > > > > +reserved.
// // SPDX-License-Identifier: BSD-2-Clause-Patent > > > > +// // **/ > > > > + > > > > + > > > > +#string STR_MODULE_ABSTRACT #language en-US "CPU Time= r > > > > Library" > > > > + > > > > +#string STR_MODULE_DESCRIPTION #language en-US "Provides > > > basic > > > > timer support using CPUID Leaf 0x15 XTAL frequency." > > > > + > > > > diff --git a/UefiCpuPkg/Library/CpuTimerLib/PeiCpuTimerLib.c > > > > b/UefiCpuPkg/Library/CpuTimerLib/PeiCpuTimerLib.c > > > > new file mode 100644 > > > > index 0000000000..91a7212056 > > > > --- /dev/null > > > > +++ b/UefiCpuPkg/Library/CpuTimerLib/PeiCpuTimerLib.c > > > > @@ -0,0 +1,58 @@ > > > > +/** @file > > > > + CPUID Leaf 0x15 for Core Crystal Clock frequency instance as > > > > +PEI Timer > > > > Library. > > > > + > > > > + Copyright (c) 2019 Intel Corporation. All rights reserved.
> > > > + SPDX-License-Identifier: BSD-2-Clause-Patent > > > > + > > > > +**/ > > > > + > > > > +#include > > > > +#include > > > > +#include > > > > +#include > > > > +#include > > > > + > > > > +extern GUID mCpuCrystalFrequencyHobGuid; > > > > + > > > > +/** > > > > + CPUID Leaf 0x15 for Core Crystal Clock Frequency. > > > > + > > > > + The TSC counting frequency is determined by using CPUID leaf 0x= 15. > > > > Frequency in MHz =3D Core XTAL frequency * EBX/EAX. > > > > + In newer flavors of the CPU, core xtal frequency is returned in > > > > + ECX or 0 if > > > > not supported. > > > > + @return The number of TSC counts per second. > > > > + > > > > +**/ > > > > +UINT64 > > > > +CpuidCoreClockCalculateTscFrequency ( > > > > + VOID > > > > + ); > > > > + > > > > +/** > > > > + Internal function to retrieves the 64-bit frequency in Hz. > > > > + > > > > + Internal function to retrieves the 64-bit frequency in Hz. > > > > + > > > > + @return The frequency in Hz. > > > > + > > > > +**/ > > > > +UINT64 > > > > +InternalGetPerformanceCounterFrequency ( > > > > + VOID > > > > + ) > > > > +{ > > > > + UINT64 *CpuCrystalCounterFrequency; > > > > + EFI_HOB_GUID_TYPE *GuidHob; > > > > + > > > > + CpuCrystalCounterFrequency =3D NULL; GuidHob =3D GetFirstGuidH= ob > > > > + (&mCpuCrystalFrequencyHobGuid); if (GuidHob =3D=3D NULL) { > > > > + CpuCrystalCounterFrequency =3D > > > > (UINT64*)BuildGuidHob(&mCpuCrystalFrequencyHobGuid, sizeof > > > > (*CpuCrystalCounterFrequency)); > > > > + ASSERT (CpuCrystalCounterFrequency !=3D NULL); > > > > + *CpuCrystalCounterFrequency =3D > > > > + CpuidCoreClockCalculateTscFrequency > > > > + (); } else { > > > > + CpuCrystalCounterFrequency =3D (UINT64*)GET_GUID_HOB_DATA > > > > (GuidHob); > > > > + } > > > > + > > > > + return *CpuCrystalCounterFrequency; } > > > > + > > > > diff --git a/UefiCpuPkg/Library/CpuTimerLib/PeiCpuTimerLib.inf > > > > b/UefiCpuPkg/Library/CpuTimerLib/PeiCpuTimerLib.inf > > > > new file mode 100644 > > > > index 0000000000..7af0fc44a6 > > > > --- /dev/null > > > > +++ b/UefiCpuPkg/Library/CpuTimerLib/PeiCpuTimerLib.inf > > > > @@ -0,0 +1,36 @@ > > > > +## @file > > > > +# PEI CPU Timer Library > > > > +# > > > > +# Provides basic timer support using CPUID Leaf 0x15 XTAL freque= ncy. > > > > +The performance # counter features are provided by the > > > > +processors time > > > > stamp counter. > > > > +# > > > > +# Copyright (c) 2019, Intel Corporation. All rights > > > > +reserved.
# > > > > +SPDX-License-Identifier: BSD-2-Clause-Patent # ## > > > > + > > > > +[Defines] > > > > + INF_VERSION =3D 0x00010005 > > > > + BASE_NAME =3D PeiCpuTimerLib > > > > + FILE_GUID =3D 2B13DE00-1A5F-4DD7-A298-01B0= 8AF1015A > > > > + MODULE_TYPE =3D BASE > > > > + VERSION_STRING =3D 1.0 > > > > + LIBRARY_CLASS =3D TimerLib|PEI_CORE PEIM > > > > + MODULE_UNI_FILE =3D PeiCpuTimerLib.uni > > > > + > > > > +[Sources] > > > > + CpuTimerLib.c > > > > + PeiCpuTimerLib.c > > > > + > > > > +[Packages] > > > > + MdePkg/MdePkg.dec > > > > + UefiCpuPkg/UefiCpuPkg.dec > > > > + > > > > +[LibraryClasses] > > > > + BaseLib > > > > + PcdLib > > > > + DebugLib > > > > + HobLib > > > > + > > > > +[Pcd] > > > > + gUefiCpuPkgTokenSpaceGuid.PcdCpuCoreCrystalClockFrequency ## > > > > +CONSUMES > > > > diff --git a/UefiCpuPkg/Library/CpuTimerLib/PeiCpuTimerLib.uni > > > > b/UefiCpuPkg/Library/CpuTimerLib/PeiCpuTimerLib.uni > > > > new file mode 100644 > > > > index 0000000000..49beb44908 > > > > --- /dev/null > > > > +++ b/UefiCpuPkg/Library/CpuTimerLib/PeiCpuTimerLib.uni > > > > @@ -0,0 +1,17 @@ > > > > +// /** @file > > > > +// PEI CPU Timer Library > > > > +// > > > > +// Provides basic timer support using CPUID Leaf 0x15 XTAL freque= ncy. > > > > +The performance // counter features are provided by the > > > > +processors time > > > > stamp counter. > > > > +// > > > > +// Copyright (c) 2019, Intel Corporation. All rights > > > > +reserved.
// // SPDX-License-Identifier: BSD-2-Clause-Patent > > > > +// // **/ > > > > + > > > > + > > > > +#string STR_MODULE_ABSTRACT #language en-US "CPU Time= r > > > > Library" > > > > + > > > > +#string STR_MODULE_DESCRIPTION #language en-US "Provides > > > basic > > > > timer support using CPUID Leaf 0x15 XTAL frequency." > > > > + > > > > diff --git a/UefiCpuPkg/UefiCpuPkg.dec b/UefiCpuPkg/UefiCpuPkg.dec > > > > index 14ddaa8633..a94bd2ea30 100644 > > > > --- a/UefiCpuPkg/UefiCpuPkg.dec > > > > +++ b/UefiCpuPkg/UefiCpuPkg.dec > > > > @@ -211,6 +211,14 @@ > > > > # @Prompt If CPU features will be initialized during S3 resume. > > > > > > > > > gUefiCpuPkgTokenSpaceGuid.PcdCpuFeaturesInitOnS3Resume|FALSE|BOO > > > > LEAN|0x0000001D > > > > > > > > + ## Specifies CPUID Leaf 0x15 Time Stamp Counter and Nominal > > > > + Core > > > > Crystal Clock Frequency. > > > > + # TSC Frequency =3D ECX (core crystal clock frequency) * EBX/EA= X. > > > > + # Intel Xeon Processor Scalable Family with CPUID signature 0= 6_55H > =3D > > > > 25000000 (25MHz) > > > > + # 6th and 7th generation Intel Core processors and Intel Xeon= W > > > > Processor Family =3D 24000000 (24MHz) > > > > + # Intel Atom processors based on Goldmont Microarchitecture w= ith > > > > CPUID signature 06_5CH =3D 19200000 (19.2MHz) > > > > + # @Prompt Core Crystal Clock Frequency is for CPUID Leaf > > > > + 0x15.ECX > > > > + > > > > + > > > > > > > > gUefiCpuPkgTokenSpaceGuid.PcdCpuCoreCrystalClockFrequency|24000000| > > > > UIN > > > > + T64|0x32132113 > > > > + > > > > [PcdsFixedAtBuild, PcdsPatchableInModule, PcdsDynamic, > PcdsDynamicEx] > > > > ## Specifies max supported number of Logical Processors. > > > > # @Prompt Configure max supported number of Logical Processors > > > > diff --git a/UefiCpuPkg/UefiCpuPkg.dsc b/UefiCpuPkg/UefiCpuPkg.dsc > > > > index bf690d3978..e7dfe30eda 100644 > > > > --- a/UefiCpuPkg/UefiCpuPkg.dsc > > > > +++ b/UefiCpuPkg/UefiCpuPkg.dsc > > > > @@ -101,6 +101,9 @@ > > > > UefiCpuPkg/CpuIoPei/CpuIoPei.inf > > > > > > > > > > > > UefiCpuPkg/Library/SecPeiDxeTimerLibUefiCpu/SecPeiDxeTimerLibUefiCpu > > > .i > > > > nf > > > > UefiCpuPkg/Application/Cpuid/Cpuid.inf > > > > + UefiCpuPkg/Library/CpuTimerLib/BaseCpuTimerLib.inf > > > > + UefiCpuPkg/Library/CpuTimerLib/DxeCpuTimerLib.inf > > > > + UefiCpuPkg/Library/CpuTimerLib/PeiCpuTimerLib.inf > > > > > > > > [Components.IA32, Components.X64] > > > > UefiCpuPkg/CpuDxe/CpuDxe.inf > > > > -- > > > > 2.14.2.windows.3 > > > > > > > > > > > >=20 --_002_FDA095DBC50560498153B1BF30526B9FA14EF7D9SHSMSX108ccrcor_ Content-Type: message/rfc822 Content-Disposition: attachment; creation-date="Thu, 15 Aug 2019 04:40:27 GMT"; modification-date="Thu, 15 Aug 2019 04:40:27 GMT" Received: from fmsmsx106.amr.corp.intel.com (10.18.124.204) by SHSMSX101.ccr.corp.intel.com (10.239.4.153) with Microsoft SMTP Server (TLS) id 14.3.439.0; Thu, 15 Aug 2019 12:38:01 +0800 Received: from orsmga004.jf.intel.com (10.7.209.38) by FMSMSX106.amr.corp.intel.com (10.18.124.204) with Microsoft SMTP Server (TLS) id 14.3.439.0; Wed, 14 Aug 2019 21:38:01 -0700 Received: from orsmga102-1.jf.intel.com (HELO mga09.intel.com) ([10.7.208.27]) by orsmga004-1.jf.intel.com with ESMTP; 14 Aug 2019 21:37:57 -0700 Received: from web01.groups.io ([66.175.222.12]) by mga09.intel.com with ESMTP/TLS/AES256-SHA; 14 Aug 2019 21:37:55 -0700 From: "Kuo, Donald" To: "devel@edk2.groups.io" CC: "Ni, Ray" , "Zeng, Star" , "Dong, Eric" , "Chan, Amy" , "Chaganty, Rangasai V" Subject: [edk2-devel] [PATCH] UefiCpuPkg: Adding a new TSC library by using CPUID(0x15) TSC leaf Thread-Topic: [edk2-devel] [PATCH] UefiCpuPkg: Adding a new TSC library by using CPUID(0x15) TSC leaf Thread-Index: AQHVUyM4A40TChX210SBADnSoBTtZA== Sender: "devel@edk2.groups.io" Date: Thu, 15 Aug 2019 04:37:48 +0000 Message-ID: <15BAFEB54B2C61CD.23161@groups.io> List-Unsubscribe: Reply-To: "devel@edk2.groups.io" , "Kuo, Donald" Content-Language: zh-TW X-MS-Exchange-Organization-AuthSource: FMSMSX106.amr.corp.intel.com X-MS-Has-Attach: X-Auto-Response-Suppress: All X-MS-TNEF-Correlator: x-extloop1: 1 x-ironport-av: E=Sophos;i="5.64,387,1559545200"; d="scan'208";a="205779415" Content-Type: text/plain; charset="iso-8859-1" Content-Transfer-Encoding: quoted-printable MIME-Version: 1.0 REF: https://bugzilla.tianocore.org/show_bug.cgi?id=3D1909 Cc: Ray Ni Cc: Star Zeng Cc: Eric Dong Cc: Amy Chan Cc: Rangasai V Chaganty Signed-off-by: Donald Kuo --- UefiCpuPkg/Library/CpuTimerLib/BaseCpuTimerLib.c | 41 +++ UefiCpuPkg/Library/CpuTimerLib/BaseCpuTimerLib.inf | 35 +++ UefiCpuPkg/Library/CpuTimerLib/BaseCpuTimerLib.uni | 17 ++ UefiCpuPkg/Library/CpuTimerLib/CpuTimerLib.c | 274 +++++++++++++++++= ++++ UefiCpuPkg/Library/CpuTimerLib/DxeCpuTimerLib.c | 81 ++++++ UefiCpuPkg/Library/CpuTimerLib/DxeCpuTimerLib.inf | 37 +++ UefiCpuPkg/Library/CpuTimerLib/DxeCpuTimerLib.uni | 17 ++ UefiCpuPkg/Library/CpuTimerLib/PeiCpuTimerLib.c | 58 +++++ UefiCpuPkg/Library/CpuTimerLib/PeiCpuTimerLib.inf | 36 +++ UefiCpuPkg/Library/CpuTimerLib/PeiCpuTimerLib.uni | 17 ++ UefiCpuPkg/UefiCpuPkg.dec | 8 + UefiCpuPkg/UefiCpuPkg.dsc | 3 + UefiCpuPkg/UefiCpuPkg.uni | 10 + 13 files changed, 634 insertions(+) create mode 100644 UefiCpuPkg/Library/CpuTimerLib/BaseCpuTimerLib.c create mode 100644 UefiCpuPkg/Library/CpuTimerLib/BaseCpuTimerLib.inf create mode 100644 UefiCpuPkg/Library/CpuTimerLib/BaseCpuTimerLib.uni create mode 100644 UefiCpuPkg/Library/CpuTimerLib/CpuTimerLib.c create mode 100644 UefiCpuPkg/Library/CpuTimerLib/DxeCpuTimerLib.c create mode 100644 UefiCpuPkg/Library/CpuTimerLib/DxeCpuTimerLib.inf create mode 100644 UefiCpuPkg/Library/CpuTimerLib/DxeCpuTimerLib.uni create mode 100644 UefiCpuPkg/Library/CpuTimerLib/PeiCpuTimerLib.c create mode 100644 UefiCpuPkg/Library/CpuTimerLib/PeiCpuTimerLib.inf create mode 100644 UefiCpuPkg/Library/CpuTimerLib/PeiCpuTimerLib.uni diff --git a/UefiCpuPkg/Library/CpuTimerLib/BaseCpuTimerLib.c b/UefiCpuPkg/= Library/CpuTimerLib/BaseCpuTimerLib.c new file mode 100644 index 0000000000..6ddf917bad --- /dev/null +++ b/UefiCpuPkg/Library/CpuTimerLib/BaseCpuTimerLib.c @@ -0,0 +1,41 @@ +/** @file + CPUID Leaf 0x15 for Core Crystal Clock frequency instance as Base Timer = Library. + + Copyright (c) 2019 Intel Corporation. All rights reserved.
+ SPDX-License-Identifier: BSD-2-Clause-Patent + +**/ + +#include +#include +#include + +/** + CPUID Leaf 0x15 for Core Crystal Clock Frequency. + + The TSC counting frequency is determined by using CPUID leaf 0x15. Frequ= ency in MHz =3D Core XTAL frequency * EBX/EAX. + In newer flavors of the CPU, core xtal frequency is returned in ECX or 0= if not supported. + @return The number of TSC counts per second. + +**/ +UINT64 +CpuidCoreClockCalculateTscFrequency ( + VOID + ); + +/** + Internal function to retrieves the 64-bit frequency in Hz. + + Internal function to retrieves the 64-bit frequency in Hz. + + @return The frequency in Hz. + +**/ +UINT64 +InternalGetPerformanceCounterFrequency ( + VOID + ) +{ + return CpuidCoreClockCalculateTscFrequency (); +} + diff --git a/UefiCpuPkg/Library/CpuTimerLib/BaseCpuTimerLib.inf b/UefiCpuPk= g/Library/CpuTimerLib/BaseCpuTimerLib.inf new file mode 100644 index 0000000000..fd93adc5f1 --- /dev/null +++ b/UefiCpuPkg/Library/CpuTimerLib/BaseCpuTimerLib.inf @@ -0,0 +1,35 @@ +## @file +# Base CPU Timer Library +# +# Provides basic timer support using CPUID Leaf 0x15 XTAL frequency. The = performance +# counter features are provided by the processors time stamp counter. +# +# Copyright (c) 2019, Intel Corporation. All rights reserved.
+# SPDX-License-Identifier: BSD-2-Clause-Patent +# +## + +[Defines] + INF_VERSION =3D 0x00010005 + BASE_NAME =3D BaseCpuTimerLib + FILE_GUID =3D F10B5B91-D15A-496C-B044-B5235721AA08 + MODULE_TYPE =3D BASE + VERSION_STRING =3D 1.0 + LIBRARY_CLASS =3D TimerLib|SEC PEI_CORE PEIM + MODULE_UNI_FILE =3D BaseCpuTimerLib.uni + +[Sources] + CpuTimerLib.c + BaseCpuTimerLib.c + +[Packages] + MdePkg/MdePkg.dec + UefiCpuPkg/UefiCpuPkg.dec + +[LibraryClasses] + BaseLib + PcdLib + DebugLib + +[Pcd] + gUefiCpuPkgTokenSpaceGuid.PcdCpuCoreCrystalClockFrequency ## CONSUMES diff --git a/UefiCpuPkg/Library/CpuTimerLib/BaseCpuTimerLib.uni b/UefiCpuPk= g/Library/CpuTimerLib/BaseCpuTimerLib.uni new file mode 100644 index 0000000000..fcf2b0fbcb --- /dev/null +++ b/UefiCpuPkg/Library/CpuTimerLib/BaseCpuTimerLib.uni @@ -0,0 +1,17 @@ +// /** @file +// Base CPU Timer Library +// +// Provides basic timer support using CPUID Leaf 0x15 XTAL frequency. The= performance +// counter features are provided by the processors time stamp counter. +// +// Copyright (c) 2019, Intel Corporation. All rights reserved.
+// +// SPDX-License-Identifier: BSD-2-Clause-Patent +// +// **/ + + +#string STR_MODULE_ABSTRACT #language en-US "CPU Timer Library= " + +#string STR_MODULE_DESCRIPTION #language en-US "Provides basic ti= mer support using CPUID Leaf 0x15 XTAL frequency." + diff --git a/UefiCpuPkg/Library/CpuTimerLib/CpuTimerLib.c b/UefiCpuPkg/Libr= ary/CpuTimerLib/CpuTimerLib.c new file mode 100644 index 0000000000..0b9e9384f5 --- /dev/null +++ b/UefiCpuPkg/Library/CpuTimerLib/CpuTimerLib.c @@ -0,0 +1,274 @@ +/** @file + CPUID Leaf 0x15 for Core Crystal Clock frequency instance of Timer Libra= ry. + + Copyright (c) 2019 Intel Corporation. All rights reserved.
+ SPDX-License-Identifier: BSD-2-Clause-Patent + +**/ + +#include +#include +#include +#include +#include +#include + +GUID mCpuCrystalFrequencyHobGuid =3D { 0xe1ec5ad0, 0x8569, 0x46bd, { 0x8d,= 0xcd, 0x3b, 0x9f, 0x6f, 0x45, 0x82, 0x7a } }; + +/** + Internal function to retrieves the 64-bit frequency in Hz. + + Internal function to retrieves the 64-bit frequency in Hz. + + @return The frequency in Hz. + +**/ +UINT64 +InternalGetPerformanceCounterFrequency ( + VOID + ); + +/** + CPUID Leaf 0x15 for Core Crystal Clock Frequency. + + The TSC counting frequency is determined by using CPUID leaf 0x15. Frequ= ency in MHz =3D Core XTAL frequency * EBX/EAX. + In newer flavors of the CPU, core xtal frequency is returned in ECX or 0= if not supported. + @return The number of TSC counts per second. + +**/ +UINT64 +CpuidCoreClockCalculateTscFrequency ( + VOID + ) +{ + UINT64 TscFrequency; + UINT64 CoreXtalFrequency; + UINT32 RegEax; + UINT32 RegEbx; + UINT32 RegEcx; + + // + // Use CPUID leaf 0x15 Time Stamp Counter and Nominal Core Crystal Clock= Information + // EBX returns 0 if not supported. ECX, if non zero, provides Core Xtal = Frequency in hertz. + // TSC frequency =3D (ECX, Core Xtal Frequency) * EBX/EAX. + // + AsmCpuid (CPUID_TIME_STAMP_COUNTER, &RegEax, &RegEbx, &RegEcx, NULL); + + // + // If EBX returns 0, the XTAL ratio is not enumerated. + // + ASSERT (RegEbx !=3D 0); + // + // If ECX returns 0, the XTAL frequency is not enumerated. + // + if (RegEcx =3D=3D 0) { + CoreXtalFrequency =3D PcdGet64 (PcdCpuCoreCrystalClockFrequency); + } else { + CoreXtalFrequency =3D (UINT64) RegEcx; + } + + // + // Calculate TSC frequency =3D (ECX, Core Xtal Frequency) * EBX/EAX + // + TscFrequency =3D DivU64x32 (MultU64x32 (CoreXtalFrequency, RegEbx) + (UI= NT64)(RegEax >> 1), RegEax); + + return TscFrequency; +} + +/** + Stalls the CPU for at least the given number of ticks. + + Stalls the CPU for at least the given number of ticks. It's invoked by + MicroSecondDelay() and NanoSecondDelay(). + + @param Delay A period of time to delay in ticks. + +**/ +VOID +InternalCpuDelay ( + IN UINT64 Delay + ) +{ + UINT64 Ticks; + + // + // The target timer count is calculated here + // + Ticks =3D AsmReadTsc() + Delay; + + // + // Wait until time out + // Timer wrap-arounds are NOT handled correctly by this function. + // Thus, this function must be called within 10 years of reset since + // Intel guarantees a minimum of 10 years before the TSC wraps. + // + while (AsmReadTsc() <=3D Ticks) { + CpuPause(); + } +} + +/** + Stalls the CPU for at least the given number of microseconds. + + Stalls the CPU for the number of microseconds specified by MicroSeconds. + + @param[in] MicroSeconds The minimum number of microseconds to delay. + + @return MicroSeconds + +**/ +UINTN +EFIAPI +MicroSecondDelay ( + IN UINTN MicroSeconds + ) +{ + + InternalCpuDelay ( + DivU64x32 ( + MultU64x64 ( + MicroSeconds, + InternalGetPerformanceCounterFrequency () + ), + 1000000u + ) + ); + + return MicroSeconds; +} + +/** + Stalls the CPU for at least the given number of nanoseconds. + + Stalls the CPU for the number of nanoseconds specified by NanoSeconds. + + @param NanoSeconds The minimum number of nanoseconds to delay. + + @return NanoSeconds + +**/ +UINTN +EFIAPI +NanoSecondDelay ( + IN UINTN NanoSeconds + ) +{ + + InternalCpuDelay ( + DivU64x32 ( + MultU64x64 ( + NanoSeconds, + InternalGetPerformanceCounterFrequency () + ), + 1000000000u + ) + ); + + return NanoSeconds; +} + +/** + Retrieves the current value of a 64-bit free running performance counter= . + + Retrieves the current value of a 64-bit free running performance counter= . The + counter can either count up by 1 or count down by 1. If the physical + performance counter counts by a larger increment, then the counter value= s + must be translated. The properties of the counter can be retrieved from + GetPerformanceCounterProperties(). + + @return The current value of the free running performance counter. + +**/ +UINT64 +EFIAPI +GetPerformanceCounter ( + VOID + ) +{ + return AsmReadTsc (); +} + +/** + Retrieves the 64-bit frequency in Hz and the range of performance counte= r + values. + + If StartValue is not NULL, then the value that the performance counter s= tarts + with immediately after is it rolls over is returned in StartValue. If + EndValue is not NULL, then the value that the performance counter end wi= th + immediately before it rolls over is returned in EndValue. The 64-bit + frequency of the performance counter in Hz is always returned. If StartV= alue + is less than EndValue, then the performance counter counts up. If StartV= alue + is greater than EndValue, then the performance counter counts down. For + example, a 64-bit free running counter that counts up would have a Start= Value + of 0 and an EndValue of 0xFFFFFFFFFFFFFFFF. A 24-bit free running counte= r + that counts down would have a StartValue of 0xFFFFFF and an EndValue of = 0. + + @param StartValue The value the performance counter starts with when i= t + rolls over. + @param EndValue The value that the performance counter ends with bef= ore + it rolls over. + + @return The frequency in Hz. + +**/ +UINT64 +EFIAPI +GetPerformanceCounterProperties ( + OUT UINT64 *StartValue, OPTIONAL + OUT UINT64 *EndValue OPTIONAL + ) +{ + if (StartValue !=3D NULL) { + *StartValue =3D 0; + } + + if (EndValue !=3D NULL) { + *EndValue =3D 0xffffffffffffffffULL; + } + return InternalGetPerformanceCounterFrequency (); +} + +/** + Converts elapsed ticks of performance counter to time in nanoseconds. + + This function converts the elapsed ticks of running performance counter = to + time value in unit of nanoseconds. + + @param Ticks The number of elapsed ticks of running performance cou= nter. + + @return The elapsed time in nanoseconds. + +**/ +UINT64 +EFIAPI +GetTimeInNanoSecond ( + IN UINT64 Ticks + ) +{ + UINT64 Frequency; + UINT64 NanoSeconds; + UINT64 Remainder; + INTN Shift; + + Frequency =3D GetPerformanceCounterProperties (NULL, NULL); + + // + // Ticks + // Time =3D --------- x 1,000,000,000 + // Frequency + // + NanoSeconds =3D MultU64x32 (DivU64x64Remainder (Ticks, Frequency, &Remai= nder), 1000000000u); + + // + // Ensure (Remainder * 1,000,000,000) will not overflow 64-bit. + // Since 2^29 < 1,000,000,000 =3D 0x3B9ACA00 < 2^30, Remainder should < = 2^(64-30) =3D 2^34, + // i.e. highest bit set in Remainder should <=3D 33. + // + Shift =3D MAX (0, HighBitSet64 (Remainder) - 33); + Remainder =3D RShiftU64 (Remainder, (UINTN) Shift); + Frequency =3D RShiftU64 (Frequency, (UINTN) Shift); + NanoSeconds +=3D DivU64x64Remainder (MultU64x32 (Remainder, 1000000000u)= , Frequency, NULL); + + return NanoSeconds; +} + diff --git a/UefiCpuPkg/Library/CpuTimerLib/DxeCpuTimerLib.c b/UefiCpuPkg/L= ibrary/CpuTimerLib/DxeCpuTimerLib.c new file mode 100644 index 0000000000..2d0ef6ab07 --- /dev/null +++ b/UefiCpuPkg/Library/CpuTimerLib/DxeCpuTimerLib.c @@ -0,0 +1,81 @@ +/** @file + CPUID Leaf 0x15 for Core Crystal Clock frequency instance of Timer Libra= ry. + + Copyright (c) 2019 Intel Corporation. All rights reserved.
+ SPDX-License-Identifier: BSD-2-Clause-Patent + +**/ + +#include +#include +#include +#include + +extern GUID mCpuCrystalFrequencyHobGuid; + +/** + CPUID Leaf 0x15 for Core Crystal Clock Frequency. + + The TSC counting frequency is determined by using CPUID leaf 0x15. Frequ= ency in MHz =3D Core XTAL frequency * EBX/EAX. + In newer flavors of the CPU, core xtal frequency is returned in ECX or 0= if not supported. + @return The number of TSC counts per second. + +**/ +UINT64 +CpuidCoreClockCalculateTscFrequency ( + VOID + ); + +// +// Cached CPU Crystal counter frequency +// +UINT64 mCpuCrystalCounterFrequency =3D 0; + + +/** + Internal function to retrieves the 64-bit frequency in Hz. + + Internal function to retrieves the 64-bit frequency in Hz. + + @return The frequency in Hz. + +**/ +UINT64 +InternalGetPerformanceCounterFrequency ( + VOID + ) +{ + return mCpuCrystalCounterFrequency; +} + +/** + The constructor function is to initialize CpuCrystalCounterFrequency. + + @param ImageHandle The firmware allocated handle for the EFI image. + @param SystemTable A pointer to the EFI System Table. + + @retval EFI_SUCCESS The constructor always returns RETURN_SUCCESS. + +**/ +EFI_STATUS +EFIAPI +DxeCpuTimerLibConstructor ( + IN EFI_HANDLE ImageHandle, + IN EFI_SYSTEM_TABLE *SystemTable + ) +{ + EFI_HOB_GUID_TYPE *GuidHob; + + // + // Initialize CpuCrystalCounterFrequency + // + GuidHob =3D GetFirstGuidHob (&mCpuCrystalFrequencyHobGuid); + if (GuidHob !=3D NULL) { + mCpuCrystalCounterFrequency =3D *(UINT64*)GET_GUID_HOB_DATA (GuidHob); + } else { + mCpuCrystalCounterFrequency =3D CpuidCoreClockCalculateTscFrequency ()= ; + } + + return EFI_SUCCESS; +} + diff --git a/UefiCpuPkg/Library/CpuTimerLib/DxeCpuTimerLib.inf b/UefiCpuPkg= /Library/CpuTimerLib/DxeCpuTimerLib.inf new file mode 100644 index 0000000000..6c83549c87 --- /dev/null +++ b/UefiCpuPkg/Library/CpuTimerLib/DxeCpuTimerLib.inf @@ -0,0 +1,37 @@ +## @file +# DXE CPU Timer Library +# +# Provides basic timer support using CPUID Leaf 0x15 XTAL frequency. The = performance +# counter features are provided by the processors time stamp counter. +# +# Copyright (c) 2019, Intel Corporation. All rights reserved.
+# SPDX-License-Identifier: BSD-2-Clause-Patent +# +## + +[Defines] + INF_VERSION =3D 0x00010005 + BASE_NAME =3D DxeCpuTimerLib + FILE_GUID =3D F22CC0DA-E7DB-4E4D-ABE2-A608188233A2 + MODULE_TYPE =3D DXE_DRIVER + VERSION_STRING =3D 1.0 + LIBRARY_CLASS =3D TimerLib|DXE_CORE DXE_DRIVER DXE_RUNT= IME_DRIVER DXE_SMM_DRIVER UEFI_APPLICATION UEFI_DRIVER SMM_CORE + CONSTRUCTOR =3D DxeCpuTimerLibConstructor + MODULE_UNI_FILE =3D DxeCpuTimerLib.uni + +[Sources] + CpuTimerLib.c + DxeCpuTimerLib.c + +[Packages] + MdePkg/MdePkg.dec + UefiCpuPkg/UefiCpuPkg.dec + +[LibraryClasses] + BaseLib + PcdLib + DebugLib + HobLib + +[Pcd] + gUefiCpuPkgTokenSpaceGuid.PcdCpuCoreCrystalClockFrequency ## CONSUMES diff --git a/UefiCpuPkg/Library/CpuTimerLib/DxeCpuTimerLib.uni b/UefiCpuPkg= /Library/CpuTimerLib/DxeCpuTimerLib.uni new file mode 100644 index 0000000000..f55b92abac --- /dev/null +++ b/UefiCpuPkg/Library/CpuTimerLib/DxeCpuTimerLib.uni @@ -0,0 +1,17 @@ +// /** @file +// DXE CPU Timer Library +// +// Provides basic timer support using CPUID Leaf 0x15 XTAL frequency. The= performance +// counter features are provided by the processors time stamp counter. +// +// Copyright (c) 2019, Intel Corporation. All rights reserved.
+// +// SPDX-License-Identifier: BSD-2-Clause-Patent +// +// **/ + + +#string STR_MODULE_ABSTRACT #language en-US "CPU Timer Library= " + +#string STR_MODULE_DESCRIPTION #language en-US "Provides basic ti= mer support using CPUID Leaf 0x15 XTAL frequency." + diff --git a/UefiCpuPkg/Library/CpuTimerLib/PeiCpuTimerLib.c b/UefiCpuPkg/L= ibrary/CpuTimerLib/PeiCpuTimerLib.c new file mode 100644 index 0000000000..91a7212056 --- /dev/null +++ b/UefiCpuPkg/Library/CpuTimerLib/PeiCpuTimerLib.c @@ -0,0 +1,58 @@ +/** @file + CPUID Leaf 0x15 for Core Crystal Clock frequency instance as PEI Timer L= ibrary. + + Copyright (c) 2019 Intel Corporation. All rights reserved.
+ SPDX-License-Identifier: BSD-2-Clause-Patent + +**/ + +#include +#include +#include +#include +#include + +extern GUID mCpuCrystalFrequencyHobGuid; + +/** + CPUID Leaf 0x15 for Core Crystal Clock Frequency. + + The TSC counting frequency is determined by using CPUID leaf 0x15. Frequ= ency in MHz =3D Core XTAL frequency * EBX/EAX. + In newer flavors of the CPU, core xtal frequency is returned in ECX or 0= if not supported. + @return The number of TSC counts per second. + +**/ +UINT64 +CpuidCoreClockCalculateTscFrequency ( + VOID + ); + +/** + Internal function to retrieves the 64-bit frequency in Hz. + + Internal function to retrieves the 64-bit frequency in Hz. + + @return The frequency in Hz. + +**/ +UINT64 +InternalGetPerformanceCounterFrequency ( + VOID + ) +{ + UINT64 *CpuCrystalCounterFrequency; + EFI_HOB_GUID_TYPE *GuidHob; + + CpuCrystalCounterFrequency =3D NULL; + GuidHob =3D GetFirstGuidHob (&mCpuCrystalFrequencyHobGuid); + if (GuidHob =3D=3D NULL) { + CpuCrystalCounterFrequency =3D (UINT64*)BuildGuidHob(&mCpuCrystalFreq= uencyHobGuid, sizeof (*CpuCrystalCounterFrequency)); + ASSERT (CpuCrystalCounterFrequency !=3D NULL); + *CpuCrystalCounterFrequency =3D CpuidCoreClockCalculateTscFrequency ()= ; + } else { + CpuCrystalCounterFrequency =3D (UINT64*)GET_GUID_HOB_DATA (GuidHob); + } + + return *CpuCrystalCounterFrequency; +} + diff --git a/UefiCpuPkg/Library/CpuTimerLib/PeiCpuTimerLib.inf b/UefiCpuPkg= /Library/CpuTimerLib/PeiCpuTimerLib.inf new file mode 100644 index 0000000000..7af0fc44a6 --- /dev/null +++ b/UefiCpuPkg/Library/CpuTimerLib/PeiCpuTimerLib.inf @@ -0,0 +1,36 @@ +## @file +# PEI CPU Timer Library +# +# Provides basic timer support using CPUID Leaf 0x15 XTAL frequency. The = performance +# counter features are provided by the processors time stamp counter. +# +# Copyright (c) 2019, Intel Corporation. All rights reserved.
+# SPDX-License-Identifier: BSD-2-Clause-Patent +# +## + +[Defines] + INF_VERSION =3D 0x00010005 + BASE_NAME =3D PeiCpuTimerLib + FILE_GUID =3D 2B13DE00-1A5F-4DD7-A298-01B08AF1015A + MODULE_TYPE =3D BASE + VERSION_STRING =3D 1.0 + LIBRARY_CLASS =3D TimerLib|PEI_CORE PEIM + MODULE_UNI_FILE =3D PeiCpuTimerLib.uni + +[Sources] + CpuTimerLib.c + PeiCpuTimerLib.c + +[Packages] + MdePkg/MdePkg.dec + UefiCpuPkg/UefiCpuPkg.dec + +[LibraryClasses] + BaseLib + PcdLib + DebugLib + HobLib + +[Pcd] + gUefiCpuPkgTokenSpaceGuid.PcdCpuCoreCrystalClockFrequency ## CONSUMES diff --git a/UefiCpuPkg/Library/CpuTimerLib/PeiCpuTimerLib.uni b/UefiCpuPkg= /Library/CpuTimerLib/PeiCpuTimerLib.uni new file mode 100644 index 0000000000..49beb44908 --- /dev/null +++ b/UefiCpuPkg/Library/CpuTimerLib/PeiCpuTimerLib.uni @@ -0,0 +1,17 @@ +// /** @file +// PEI CPU Timer Library +// +// Provides basic timer support using CPUID Leaf 0x15 XTAL frequency. The= performance +// counter features are provided by the processors time stamp counter. +// +// Copyright (c) 2019, Intel Corporation. All rights reserved.
+// +// SPDX-License-Identifier: BSD-2-Clause-Patent +// +// **/ + + +#string STR_MODULE_ABSTRACT #language en-US "CPU Timer Library= " + +#string STR_MODULE_DESCRIPTION #language en-US "Provides basic ti= mer support using CPUID Leaf 0x15 XTAL frequency." + diff --git a/UefiCpuPkg/UefiCpuPkg.dec b/UefiCpuPkg/UefiCpuPkg.dec index 14ddaa8633..86ad61f64b 100644 --- a/UefiCpuPkg/UefiCpuPkg.dec +++ b/UefiCpuPkg/UefiCpuPkg.dec @@ -211,6 +211,14 @@ # @Prompt If CPU features will be initialized during S3 resume. gUefiCpuPkgTokenSpaceGuid.PcdCpuFeaturesInitOnS3Resume|FALSE|BOOLEAN|0x0= 000001D + ## Specifies CPUID Leaf 0x15 Time Stamp Counter and Nominal Core Crystal= Clock Frequency. + # TSC Frequency =3D ECX (core crystal clock frequency) * EBX/EAX. + # Intel Xeon Processor Scalable Family with CPUID signature 06_55H =3D= 25000000 (25MHz) + # 6th and 7th generation Intel Core processors and Intel Xeon W Proces= sor Family =3D 24000000 (24MHz) + # Intel Atom processors based on Goldmont Microarchitecture with CPUID= signature 06_5CH =3D 19200000 (19.2MHz) + # @Prompt This PCD is the nominal frequency of the core crystal clock in= Hz as is CPUID Leaf 0x15:ECX + gUefiCpuPkgTokenSpaceGuid.PcdCpuCoreCrystalClockFrequency|24000000|UINT6= 4|0x32132113 + [PcdsFixedAtBuild, PcdsPatchableInModule, PcdsDynamic, PcdsDynamicEx] ## Specifies max supported number of Logical Processors. # @Prompt Configure max supported number of Logical Processors diff --git a/UefiCpuPkg/UefiCpuPkg.dsc b/UefiCpuPkg/UefiCpuPkg.dsc index bf690d3978..e7dfe30eda 100644 --- a/UefiCpuPkg/UefiCpuPkg.dsc +++ b/UefiCpuPkg/UefiCpuPkg.dsc @@ -101,6 +101,9 @@ UefiCpuPkg/CpuIoPei/CpuIoPei.inf UefiCpuPkg/Library/SecPeiDxeTimerLibUefiCpu/SecPeiDxeTimerLibUefiCpu.inf UefiCpuPkg/Application/Cpuid/Cpuid.inf + UefiCpuPkg/Library/CpuTimerLib/BaseCpuTimerLib.inf + UefiCpuPkg/Library/CpuTimerLib/DxeCpuTimerLib.inf + UefiCpuPkg/Library/CpuTimerLib/PeiCpuTimerLib.inf [Components.IA32, Components.X64] UefiCpuPkg/CpuDxe/CpuDxe.inf diff --git a/UefiCpuPkg/UefiCpuPkg.uni b/UefiCpuPkg/UefiCpuPkg.uni index 80af4fc1d2..fbf7680726 100644 --- a/UefiCpuPkg/UefiCpuPkg.uni +++ b/UefiCpuPkg/UefiCpuPkg.uni @@ -242,3 +242,13 @@ #string STR_gUefiCpuPkgTokenSpaceGuid_PcdCpuKnownGoodStackSize_HELP #lang= uage en-US "Size of good stack for an exception.\n" = "This PCD will only take into effect if PcdCpuStackGuard is enab= led.\n" +#string STR_gUefiCpuPkgTokenSpaceGuid_PcdCpuCoreCrystalClockFrequency_PROM= PT #language en-US "Specifies CPUID Leaf 0x15 Time Stamp Counter and Nomin= al Core Crystal Clock Frequency." + +#string STR_gUefiCpuPkgTokenSpaceGuid_PcdCpuCoreCrystalClockFrequency_HELP= #language en-US "Specifies CPUID Leaf 0x15 Time Stamp Counter and Nominal= Core Crystal Clock Frequency.

\n" + = "TSC Frequency =3D ECX (core crystal clock frequency) * E= BX/EAX.

\n" + = "This PCD is the nominal frequency of the core crystal cl= ock in Hz as is CPUID Leaf 0x15:ECX.

\n" + = "Default value is 24000000 for 6th and 7th generation Int= el Core processors and Intel Xeon W Processor Family.
\n" + = "25000000 - Intel Xeon Processor Scalable Family with C= PUID signature 06_55H(25MHz).
\n" + = "24000000 - 6th and 7th generation Intel Core processor= s and Intel Xeon W Processor Family(24MHz).
\n" + = "19200000 - Intel Atom processors based on Goldmont Mic= roarchitecture with CPUID signature 06_5CH(19.2MHz).
\n" + -- 2.14.2.windows.3 -=3D-=3D-=3D-=3D-=3D-=3D-=3D-=3D-=3D-=3D-=3D- Groups.io Links: You receive all messages sent to this group. View/Reply Online (#45682): https://edk2.groups.io/g/devel/message/45682 Mute This Topic: https://groups.io/mt/32839184/1887560 Group Owner: devel+owner@edk2.groups.io Unsubscribe: https://edk2.groups.io/g/devel/unsub [donald.kuo@intel.com] -=3D-=3D-=3D-=3D-=3D-=3D-=3D-=3D-=3D-=3D-=3D- --_002_FDA095DBC50560498153B1BF30526B9FA14EF7D9SHSMSX108ccrcor_--