* [PATCH 0/2] [platforms/dynamictables] Platform support for Dynamic Tables Framework
@ 2018-03-19 15:21 Sami Mujawar
2018-03-19 15:21 ` [PATCH 1/2][platforms/dynamictables] Platform/ARM: Dynamic Tables support for Juno Sami Mujawar
` (2 more replies)
0 siblings, 3 replies; 6+ messages in thread
From: Sami Mujawar @ 2018-03-19 15:21 UTC (permalink / raw)
To: edk2-devel
Cc: Arvind Chauhan, Daniil Egranov, Thomas Panakamattam Abraham,
evan.lloyd, leif.lindholm, Matteo.Carlini, Stephanie.Hughes-Fitt,
nd
The Dynamic Tables Framework is a prototyped as a solution for
automatically generating the firmware tables based on hardware
description. The Dynamic Tables Framework core code is present
in the dynamictables branch in the edk2-staging repository at
https://github.com/tianocore/edk2-staging/tree/dynamictables
This patchset implements the platform specific modules for the
Juno and FVP platform, and the sources can be seen at:
https://github.com/samimujawar/edk2-platforms/tree/187_dynamictables_v1
Sami Mujawar (2):
Platform/ARM: Dynamic Tables support for Juno
Platform/ARM: Dynamic Tables support for FVP
Platform/ARM/JunoPkg/ArmJuno.dsc | 16 +-
Platform/ARM/JunoPkg/ArmJuno.fdf | 14 +-
Platform/ARM/JunoPkg/ConfigurationManager/ConfigurationManager.dsc.inc | 29 +
Platform/ARM/JunoPkg/ConfigurationManager/ConfigurationManagerDxe/ConfigurationManager.c | 589 +++++++++++++++++++
Platform/ARM/JunoPkg/ConfigurationManager/ConfigurationManagerDxe/ConfigurationManager.h | 156 +++++
Platform/ARM/JunoPkg/ConfigurationManager/ConfigurationManagerDxe/ConfigurationManagerDxe.inf | 85 +++
Platform/ARM/JunoPkg/ConfigurationManager/ConfigurationManagerDxe/Platform.h | 65 +++
Platform/ARM/JunoPkg/ConfigurationManager/PlatformASLTablesLib/Dsdt.asl | 306 ++++++++++
Platform/ARM/JunoPkg/ConfigurationManager/PlatformASLTablesLib/PlatformASLTablesLib.inf | 44 ++
Platform/ARM/JunoPkg/ConfigurationManager/PlatformASLTablesLib/SsdtJunoUsb.asl | 122 ++++
Platform/ARM/JunoPkg/ConfigurationManager/PlatformASLTablesLib/SsdtPci.asl | 218 +++++++
Platform/ARM/JunoPkg/ConfigurationManager/PlatformASLTablesLib/SsdtUart.asl | 48 ++
Platform/ARM/JunoPkg/Drivers/ArmJunoDxe/ArmJunoDxe.c | 9 +-
Platform/ARM/VExpressPkg/ArmVExpress-FVP-AArch64.dsc | 15 +
Platform/ARM/VExpressPkg/ArmVExpress-FVP-AArch64.fdf | 16 +-
Platform/ARM/VExpressPkg/ConfigurationManager/ConfigurationManager.dsc.inc | 31 +
Platform/ARM/VExpressPkg/ConfigurationManager/ConfigurationManagerDxe/ConfigurationManager.c | 607 ++++++++++++++++++++
Platform/ARM/VExpressPkg/ConfigurationManager/ConfigurationManagerDxe/ConfigurationManager.h | 172 ++++++
Platform/ARM/VExpressPkg/ConfigurationManager/ConfigurationManagerDxe/ConfigurationManagerDxe.inf | 78 +++
Platform/ARM/VExpressPkg/ConfigurationManager/ConfigurationManagerDxe/Platform.h | 91 +++
Platform/ARM/VExpressPkg/ConfigurationManager/PlatformASLTablesLib/Dsdt.asl | 77 +++
Platform/ARM/VExpressPkg/ConfigurationManager/PlatformASLTablesLib/PlatformASLTablesLib.inf | 34 ++
22 files changed, 2816 insertions(+), 6 deletions(-)
create mode 100644 Platform/ARM/JunoPkg/ConfigurationManager/ConfigurationManager.dsc.inc
create mode 100644 Platform/ARM/JunoPkg/ConfigurationManager/ConfigurationManagerDxe/ConfigurationManager.c
create mode 100644 Platform/ARM/JunoPkg/ConfigurationManager/ConfigurationManagerDxe/ConfigurationManager.h
create mode 100644 Platform/ARM/JunoPkg/ConfigurationManager/ConfigurationManagerDxe/ConfigurationManagerDxe.inf
create mode 100644 Platform/ARM/JunoPkg/ConfigurationManager/ConfigurationManagerDxe/Platform.h
create mode 100644 Platform/ARM/JunoPkg/ConfigurationManager/PlatformASLTablesLib/Dsdt.asl
create mode 100644 Platform/ARM/JunoPkg/ConfigurationManager/PlatformASLTablesLib/PlatformASLTablesLib.inf
create mode 100644 Platform/ARM/JunoPkg/ConfigurationManager/PlatformASLTablesLib/SsdtJunoUsb.asl
create mode 100644 Platform/ARM/JunoPkg/ConfigurationManager/PlatformASLTablesLib/SsdtPci.asl
create mode 100644 Platform/ARM/JunoPkg/ConfigurationManager/PlatformASLTablesLib/SsdtUart.asl
create mode 100644 Platform/ARM/VExpressPkg/ConfigurationManager/ConfigurationManager.dsc.inc
create mode 100644 Platform/ARM/VExpressPkg/ConfigurationManager/ConfigurationManagerDxe/ConfigurationManager.c
create mode 100644 Platform/ARM/VExpressPkg/ConfigurationManager/ConfigurationManagerDxe/ConfigurationManager.h
create mode 100644 Platform/ARM/VExpressPkg/ConfigurationManager/ConfigurationManagerDxe/ConfigurationManagerDxe.inf
create mode 100644 Platform/ARM/VExpressPkg/ConfigurationManager/ConfigurationManagerDxe/Platform.h
create mode 100644 Platform/ARM/VExpressPkg/ConfigurationManager/PlatformASLTablesLib/Dsdt.asl
create mode 100644 Platform/ARM/VExpressPkg/ConfigurationManager/PlatformASLTablesLib/PlatformASLTablesLib.inf
--
'Guid(CE165669-3EF3-493F-B85D-6190EE5B9759)'
^ permalink raw reply [flat|nested] 6+ messages in thread
* [PATCH 1/2][platforms/dynamictables] Platform/ARM: Dynamic Tables support for Juno
2018-03-19 15:21 [PATCH 0/2] [platforms/dynamictables] Platform support for Dynamic Tables Framework Sami Mujawar
@ 2018-03-19 15:21 ` Sami Mujawar
2018-03-19 16:13 ` Evan Lloyd
2018-03-19 15:21 ` [PATCH 2/2][platforms/dynamictables] Platform/ARM: Dynamic Tables support for FVP Sami Mujawar
2018-03-21 3:49 ` [PATCH 0/2] [platforms/dynamictables] Platform support for Dynamic Tables Framework Leif Lindholm
2 siblings, 1 reply; 6+ messages in thread
From: Sami Mujawar @ 2018-03-19 15:21 UTC (permalink / raw)
To: edk2-devel
Cc: Arvind Chauhan, Daniil Egranov, Thomas Panakamattam Abraham,
evan.lloyd, leif.lindholm, Matteo.Carlini, Stephanie.Hughes-Fitt,
nd
The dynamic tables framework utilizes the configuration manager
protocol to get the platform specific information required for
building the firmware tables.
The configuration manager is a platform specific component that
collates the platform hardware information and builds an abstract
platform configuration repository. The configuration manager also
implements the configuration manager protocol which returns the
hardware information requested by the table generators.
This patch implements the configuration manager support for the
Juno platform.
The dynamic tables framework support is configurable and can be
enabled using the DYNAMIC_TABLES_FRAMEWORK build option.
When DYNAMIC_TABLES_FRAMEWORK is defined, ACPI tables are generated
and installed by the dynamic table framework. Therefore installation
of ACPI tables from the Firmware Volume (FV) is disabled by this
option.
Contributed-under: TianoCore Contribution Agreement 1.1
Signed-off-by: Sami Mujawar <sami.mujawar@arm.com>
---
Platform/ARM/JunoPkg/ArmJuno.dsc | 16 +-
Platform/ARM/JunoPkg/ArmJuno.fdf | 14 +-
Platform/ARM/JunoPkg/ConfigurationManager/ConfigurationManager.dsc.inc | 29 +
Platform/ARM/JunoPkg/ConfigurationManager/ConfigurationManagerDxe/ConfigurationManager.c | 589 ++++++++++++++++++++
Platform/ARM/JunoPkg/ConfigurationManager/ConfigurationManagerDxe/ConfigurationManager.h | 156 ++++++
Platform/ARM/JunoPkg/ConfigurationManager/ConfigurationManagerDxe/ConfigurationManagerDxe.inf | 85 +++
Platform/ARM/JunoPkg/ConfigurationManager/ConfigurationManagerDxe/Platform.h | 65 +++
Platform/ARM/JunoPkg/ConfigurationManager/PlatformASLTablesLib/Dsdt.asl | 306 ++++++++++
Platform/ARM/JunoPkg/ConfigurationManager/PlatformASLTablesLib/PlatformASLTablesLib.inf | 44 ++
Platform/ARM/JunoPkg/ConfigurationManager/PlatformASLTablesLib/SsdtJunoUsb.asl | 122 ++++
Platform/ARM/JunoPkg/ConfigurationManager/PlatformASLTablesLib/SsdtPci.asl | 218 ++++++++
Platform/ARM/JunoPkg/ConfigurationManager/PlatformASLTablesLib/SsdtUart.asl | 48 ++
Platform/ARM/JunoPkg/Drivers/ArmJunoDxe/ArmJunoDxe.c | 9 +-
13 files changed, 1697 insertions(+), 4 deletions(-)
diff --git a/Platform/ARM/JunoPkg/ArmJuno.dsc b/Platform/ARM/JunoPkg/ArmJuno.dsc
index 9d7317683ef39ab47429234b98d94c04953b41cb..e75b4848345b83e73aaaabea9f5f1dacea5895f6 100644
--- a/Platform/ARM/JunoPkg/ArmJuno.dsc
+++ b/Platform/ARM/JunoPkg/ArmJuno.dsc
@@ -33,6 +33,11 @@ [Defines]
# On RTSM, most peripherals are VExpress Motherboard peripherals
!include Platform/ARM/VExpressPkg/ArmVExpress.dsc.inc
+!ifdef DYNAMIC_TABLES_FRAMEWORK
+!include DynamicTablesPkg/DynamicTables.dsc.inc
+!include Platform/ARM/JunoPkg/ConfigurationManager/ConfigurationManager.dsc.inc
+!endif
+
[LibraryClasses.common]
ArmLib|ArmPkg/Library/ArmLib/ArmBaseLib.inf
ArmMmuLib|ArmPkg/Library/ArmMmuLib/ArmMmuBaseLib.inf
@@ -71,6 +76,14 @@ [LibraryClasses.common.UEFI_DRIVER, LibraryClasses.common.UEFI_APPLICATION, Libr
[BuildOptions]
GCC:*_*_ARM_PLATFORM_FLAGS = -march=armv8-a
+!ifdef DYNAMIC_TABLES_FRAMEWORK
+ *_*_*_PLATFORM_FLAGS = -DDYNAMIC_TABLES_FRAMEWORK
+!endif
+
+!ifdef DISABLE_LPI
+ *_*_*_ASLPP_FLAGS = -DDISABLE_LPI
+!endif
+
################################################################################
#
# Pcd Section - list of all EDK II PCD Entries defined by this Platform
@@ -242,8 +255,9 @@ [Components.common]
# ACPI Support
#
MdeModulePkg/Universal/Acpi/AcpiTableDxe/AcpiTableDxe.inf
+!ifndef DYNAMIC_TABLES_FRAMEWORK
Platform/ARM/JunoPkg/AcpiTables/AcpiTables.inf
-
+!endif
MdeModulePkg/Universal/HiiDatabaseDxe/HiiDatabaseDxe.inf
ArmPkg/Drivers/ArmGic/ArmGicDxe.inf
diff --git a/Platform/ARM/JunoPkg/ArmJuno.fdf b/Platform/ARM/JunoPkg/ArmJuno.fdf
index ee9d0e7f4f6e6ac99ded6a14e88eb2c7854dd473..e35a43e9b64d8141c5aaebd1e78446178ec42545 100644
--- a/Platform/ARM/JunoPkg/ArmJuno.fdf
+++ b/Platform/ARM/JunoPkg/ArmJuno.fdf
@@ -1,5 +1,5 @@
#
-# Copyright (c) 2013-2015, ARM Limited. All rights reserved.
+# Copyright (c) 2013-2018, ARM Limited. All rights reserved.
#
# This program and the accompanying materials
# are licensed and made available under the terms and conditions of the BSD License
@@ -114,7 +114,17 @@ [FV.FvMain]
# ACPI Support
#
INF MdeModulePkg/Universal/Acpi/AcpiTableDxe/AcpiTableDxe.inf
+!ifndef DYNAMIC_TABLES_FRAMEWORK
INF RuleOverride=ACPITABLE Platform/ARM/JunoPkg/AcpiTables/AcpiTables.inf
+!else
+ # Configuration Manager
+ INF Platform/ARM/JunoPkg/ConfigurationManager/ConfigurationManagerDxe/ConfigurationManagerDxe.inf
+
+ #
+ # Dynamic Table fdf
+ #
+ !include DynamicTablesPkg/DynamicTables.fdf.inc
+!endif
INF MdeModulePkg/Universal/HiiDatabaseDxe/HiiDatabaseDxe.inf
@@ -368,8 +378,10 @@ [Rule.Common.UEFI_APPLICATION.BINARY]
VERSION STRING="$(INF_VERSION)" Optional BUILD_NUM=$(BUILD_NUMBER)
}
+!ifndef DYNAMIC_TABLES_FRAMEWORK
[Rule.Common.USER_DEFINED.ACPITABLE]
FILE FREEFORM = $(NAMED_GUID) {
RAW ACPI |.acpi
RAW ASL |.aml
}
+!endif
diff --git a/Platform/ARM/JunoPkg/ConfigurationManager/ConfigurationManager.dsc.inc b/Platform/ARM/JunoPkg/ConfigurationManager/ConfigurationManager.dsc.inc
new file mode 100644
index 0000000000000000000000000000000000000000..d811556603cbdd157cfcfe2c61976b469ea15e29
--- /dev/null
+++ b/Platform/ARM/JunoPkg/ConfigurationManager/ConfigurationManager.dsc.inc
@@ -0,0 +1,29 @@
+## @file
+#
+# Copyright (c) 2017, ARM Limited. All rights reserved.
+#
+# This program and the accompanying materials
+# are licensed and made available under the terms and conditions of the BSD License
+# which accompanies this distribution. The full text of the license may be found at
+# http://opensource.org/licenses/bsd-license.php
+#
+# THE PROGRAM IS DISTRIBUTED UNDER THE BSD LICENSE ON AN "AS IS" BASIS,
+# WITHOUT WARRANTIES OR REPRESENTATIONS OF ANY KIND, EITHER EXPRESS OR IMPLIED.
+##
+
+[Defines]
+# [BuildOptions.common.EDKII.DXE_RUNTIME_DRIVER]
+
+[BuildOptions]
+
+[LibraryClasses.common]
+
+[Components.common]
+ # Configuration Manager
+ Platform/ARM/JunoPkg/ConfigurationManager/ConfigurationManagerDxe/ConfigurationManagerDxe.inf {
+ <LibraryClasses>
+ # Platform ASL Tables
+ PlatformAslTablesLib|Platform/ARM/JunoPkg/ConfigurationManager/PlatformASLTablesLib/PlatformASLTablesLib.inf
+ <BuildOptions>
+ *_*_*_PLATFORM_FLAGS = -I$(BIN_DIR)/Platform/ARM/JunoPkg/ConfigurationManager/PlatformASLTablesLib/PlatformASLTablesLib/OUTPUT
+ }
diff --git a/Platform/ARM/JunoPkg/ConfigurationManager/ConfigurationManagerDxe/ConfigurationManager.c b/Platform/ARM/JunoPkg/ConfigurationManager/ConfigurationManagerDxe/ConfigurationManager.c
new file mode 100644
index 0000000000000000000000000000000000000000..0e67dfa1f47cc3004b775ec43d02e07754675e26
--- /dev/null
+++ b/Platform/ARM/JunoPkg/ConfigurationManager/ConfigurationManagerDxe/ConfigurationManager.c
@@ -0,0 +1,589 @@
+/** @file
+ Configuration Manager Dxe
+
+ Copyright (c) 2017 - 2018, ARM Limited. All rights reserved.
+
+ This program and the accompanying materials
+ are licensed and made available under the terms and conditions of the BSD License
+ which accompanies this distribution. The full text of the license may be found at
+ http://opensource.org/licenses/bsd-license.php
+
+ THE PROGRAM IS DISTRIBUTED UNDER THE BSD LICENSE ON AN "AS IS" BASIS,
+ WITHOUT WARRANTIES OR REPRESENTATIONS OF ANY KIND, EITHER EXPRESS OR IMPLIED.
+
+ @par Glossary:
+ - Cm or CM - Configuration Manager
+ - Obj or OBJ - Object
+**/
+
+#include <IndustryStandard/DebugPort2Table.h>
+#include <Library/IoLib.h>
+#include <Library/UefiBootServicesTableLib.h>
+#include <Library/ArmLib.h>
+#include <Library/DebugLib.h>
+#include <Library/PcdLib.h>
+#include <Protocol/AcpiTable.h>
+
+#include <ArmPlatform.h>
+#include <AcpiTableGenerator.h>
+#include <Protocol/ConfigurationManagerProtocol.h>
+
+#include "ConfigurationManager.h"
+#include "Platform.h"
+
+// AML Code Include files generated by iASL Compiler
+#include <Dsdt.hex>
+#include <SsdtJunoUsb.hex>
+#include <SsdtUart.hex>
+#include <SsdtPci.hex>
+
+/** The platform configuration repository information.
+*/
+STATIC
+EFI_PLATFORM_REPOSITORY_INFO ArmJunoPlatformRepositoryInfo = {
+ /// Configuration Manager information
+ { CONFIGURATION_MANAGER_REVISION, CFG_MGR_OEM_ID },
+
+ // ACPI Table List
+ {
+ // FADT Table
+ {
+ EFI_ACPI_6_2_FIXED_ACPI_DESCRIPTION_TABLE_SIGNATURE,
+ CREATE_STD_ACPI_TABLE_GEN_ID (ESTD_ACPI_TABLE_ID_FADT),
+ NULL
+ },
+ // GTDT Table
+ {
+ EFI_ACPI_6_2_GENERIC_TIMER_DESCRIPTION_TABLE_SIGNATURE,
+ CREATE_STD_ACPI_TABLE_GEN_ID (ESTD_ACPI_TABLE_ID_GTDT),
+ NULL
+ },
+ // MADT Table
+ {
+ EFI_ACPI_6_2_MULTIPLE_APIC_DESCRIPTION_TABLE_SIGNATURE,
+ CREATE_STD_ACPI_TABLE_GEN_ID (ESTD_ACPI_TABLE_ID_MADT),
+ NULL
+ },
+ // SPCR Table
+ {
+ EFI_ACPI_6_2_SERIAL_PORT_CONSOLE_REDIRECTION_TABLE_SIGNATURE,
+ CREATE_STD_ACPI_TABLE_GEN_ID (ESTD_ACPI_TABLE_ID_SPCR),
+ NULL
+ },
+ // DSDT Table
+ {
+ EFI_ACPI_6_2_DIFFERENTIATED_SYSTEM_DESCRIPTION_TABLE_SIGNATURE,
+ CREATE_STD_ACPI_TABLE_GEN_ID (ESTD_ACPI_TABLE_ID_DSDT),
+ (EFI_ACPI_DESCRIPTION_HEADER*)dsdt_AmlCode
+ },
+ // DBG2 Table
+ {
+ EFI_ACPI_6_2_DEBUG_PORT_2_TABLE_SIGNATURE,
+ CREATE_STD_ACPI_TABLE_GEN_ID (ESTD_ACPI_TABLE_ID_DBG2),
+ NULL
+ },
+ // SSDT Table describing the Juno USB
+ {
+ EFI_ACPI_6_2_SECONDARY_SYSTEM_DESCRIPTION_TABLE_SIGNATURE,
+ CREATE_STD_ACPI_TABLE_GEN_ID (ESTD_ACPI_TABLE_ID_SSDT),
+ (EFI_ACPI_DESCRIPTION_HEADER*)ssdtjunousb_AmlCode
+ },
+ // SSDT table describing the PL011 UART
+ {
+ EFI_ACPI_6_2_SECONDARY_SYSTEM_DESCRIPTION_TABLE_SIGNATURE,
+ CREATE_STD_ACPI_TABLE_GEN_ID (ESTD_ACPI_TABLE_ID_SSDT),
+ (EFI_ACPI_DESCRIPTION_HEADER*)ssdtuart_AmlCode
+ },
+
+ /* PCI MCFG Table
+ PCIe is only available on Juno R1 and R2.
+ Add the PCI table entries at the end of the table so that
+ we can easily disable PCIe for Juno R0
+ */
+ {
+ EFI_ACPI_6_2_PCI_EXPRESS_MEMORY_MAPPED_CONFIGURATION_SPACE_BASE_ADDRESS_DESCRIPTION_TABLE_SIGNATURE,
+ CREATE_STD_ACPI_TABLE_GEN_ID (ESTD_ACPI_TABLE_ID_MCFG),
+ NULL
+ },
+ // SSDT table describing the PCI root complex
+ {
+ EFI_ACPI_6_2_SECONDARY_SYSTEM_DESCRIPTION_TABLE_SIGNATURE,
+ CREATE_STD_ACPI_TABLE_GEN_ID (ESTD_ACPI_TABLE_ID_SSDT),
+ (EFI_ACPI_DESCRIPTION_HEADER*)ssdtpci_AmlCode
+ }
+ },
+
+ // Boot architecture information
+ { EFI_ACPI_6_2_ARM_PSCI_COMPLIANT }, // BootArchFlags
+
+ // Power management profile information
+ { EFI_ACPI_6_2_PM_PROFILE_MOBILE }, // PowerManagement Profile
+
+ /* GIC CPU Interface information
+ GIC_ENTRY (CPUInterfaceNumber, Mpidr, PmuIrq, VGicIrq, EnergyEfficiency)
+ */
+ {
+ GICC_ENTRY (2, GET_MPID (1, 0), 50, 25, 0),
+ GICC_ENTRY (3, GET_MPID (1, 1), 54, 25, 0),
+ GICC_ENTRY (4, GET_MPID (1, 2), 58, 25, 0),
+ GICC_ENTRY (5, GET_MPID (1, 3), 62, 25, 0),
+
+ GICC_ENTRY (0, GET_MPID (0, 0), 34, 25, 1),
+ GICC_ENTRY (1, GET_MPID (0, 1), 38, 25, 1)
+ },
+
+ // GIC Distributor Info
+ {
+ 0, // UINT32 GicId
+ FixedPcdGet64 (PcdGicDistributorBase), // UINT64 PhysicalBaseAddress
+ 0, // UINT32 SystemVectorBase
+ 2 // UINT8 GicVersion
+ },
+
+ // Generic Timer Info
+ {
+ // The physical base address for the counter control frame
+ SYSTEM_COUNTER_BASE_ADDRESS,
+ // The physical base address for the counter read frame
+ SYSTEM_COUNTER_READ_BASE,
+ // The secure PL1 timer interrupt
+ FixedPcdGet32 (PcdArmArchTimerSecIntrNum),
+ // The secure PL1 timer flags
+ GTDT_GTIMER_FLAGS,
+ // The non-secure PL1 timer interrupt
+ FixedPcdGet32 (PcdArmArchTimerIntrNum),
+ // The non-secure PL1 timer flags
+ GTDT_GTIMER_FLAGS,
+ // The virtual timer interrupt
+ FixedPcdGet32 (PcdArmArchTimerVirtIntrNum),
+ // The virtual timer flags
+ GTDT_GTIMER_FLAGS,
+ // The non-secure PL2 timer interrupt
+ FixedPcdGet32 (PcdArmArchTimerHypIntrNum),
+ // The non-secure PL2 timer flags
+ GTDT_GTIMER_FLAGS
+ },
+
+ // Watchdog Info
+ {
+ // The physical base address of the SBSA Watchdog control frame
+ FixedPcdGet64 (PcdGenericWatchdogControlBase),
+ // The physical base address of the SBSA Watchdog refresh frame
+ FixedPcdGet64 (PcdGenericWatchdogRefreshBase),
+ // The watchdog interrupt
+ FixedPcdGet32 (PcdGenericWatchdogEl2IntrNum),
+ // The watchdog flags
+ SBSA_WATCHDOG_FLAGS
+ },
+
+ // SPCR Serial Port
+ {
+ FixedPcdGet64 (PcdSerialRegisterBase), // UINT64 BaseAddress
+ FixedPcdGet32 (PL011UartInterrupt), // UINT32 Interrupt
+ FixedPcdGet64 (PcdUartDefaultBaudRate), // UINT64 BaudRate
+ FixedPcdGet32 (PL011UartClkInHz), // UINT32 Clock
+ EFI_ACPI_DBG2_PORT_SUBTYPE_SERIAL_ARM_PL011_UART // UINT16 Port subtype
+ },
+ // Debug Serial Port
+ {
+ FixedPcdGet64 (PcdSerialDbgRegisterBase), // UINT64 BaseAddress
+ 38, // UINT32 Interrupt
+ FixedPcdGet64 (PcdSerialDbgUartBaudRate), // UINT64 BaudRate
+ FixedPcdGet32 (PcdSerialDbgUartClkInHz), // UINT32 Clock
+ EFI_ACPI_DBG2_PORT_SUBTYPE_SERIAL_ARM_PL011_UART // UINT16 Port subtype
+ },
+
+ // PCI Configuration Space Info
+ {
+ // The physical base address for the PCI segment
+ FixedPcdGet64 (PcdPciConfigurationSpaceBaseAddress),
+ // The PCI segment group number
+ 0,
+ // The start bus number
+ FixedPcdGet32 (PcdPciBusMin),
+ // The end bus number
+ FixedPcdGet32 (PcdPciBusMax)
+ },
+
+ // GIC Msi Frame Info
+ {
+ // The GIC MSI Frame ID
+ 0,
+ // The Physical base address for the MSI Frame.
+ ARM_JUNO_GIV2M_MSI_BASE,
+ /* The GIC MSI Frame flags
+ as described by the GIC MSI frame
+ structure in the ACPI Specification.
+ */
+ 0,
+ // SPI Count used by this frame.
+ 127,
+ // SPI Base used by this frame.
+ 224
+ }
+};
+
+/** Initialize the platform configuration repository.
+
+ @param [in] This Pointer to the Configuration Manager Protocol.
+
+ @retval EFI_SUCCESS Success
+*/
+STATIC
+EFI_STATUS
+EFIAPI
+InitializePlatformRepository (
+ IN CONST EFI_CONFIGURATION_MANAGER_PROTOCOL * CONST This
+ )
+{
+ EFI_PLATFORM_REPOSITORY_INFO * PlatformRepo;
+
+ PlatformRepo = This->PlatRepoInfo;
+
+ GetJunoRevision (PlatformRepo->JunoRevision);
+ DEBUG ((DEBUG_INFO, "Juno Rev = 0x%x\n", PlatformRepo->JunoRevision));
+ return EFI_SUCCESS;
+}
+
+/** Return a standard namespace object.
+
+ @param [in] This Pointer to the Configuration Manager Protocol.
+ @param [in] CmObjectId The Configuration Manager Object ID.
+ @param [in] Token An optional token identifying the object. If
+ unused this must be CM_NULL_TOKEN.
+ @param [out] CmObject Pointer to the Configuration Manager Object
+ descriptor describing the requested Object.
+
+ @retval EFI_SUCCESS Success.
+ @retval EFI_INVALID_PARAMETER A parameter is invalid.
+ @retval EFI_NOT_FOUND The required object information is not found.
+*/
+EFI_STATUS
+EFIAPI
+GetStandardNameSpaceObject (
+ IN CONST EFI_CONFIGURATION_MANAGER_PROTOCOL * CONST This,
+ IN CONST CM_OBJECT_ID CmObjectId,
+ IN CONST CM_OBJECT_TOKEN Token OPTIONAL,
+ IN OUT CM_OBJ_DESCRIPTOR * CONST CmObject
+ )
+{
+ EFI_STATUS Status = EFI_SUCCESS;
+ EFI_PLATFORM_REPOSITORY_INFO * PlatformRepo;
+
+ if ((This == NULL) || (CmObject == NULL)) {
+ ASSERT (This != NULL);
+ ASSERT (CmObject != NULL);
+ return EFI_INVALID_PARAMETER;
+ }
+ PlatformRepo = This->PlatRepoInfo;
+
+ switch (GET_CM_OBJECT_ID (CmObjectId)) {
+ HANDLE_CM_OBJECT (EStdObjCfgMgrInfo, PlatformRepo->CmInfo);
+
+ case EStdObjAcpiTableList:
+ if (PlatformRepo->JunoRevision != JUNO_REVISION_R0) {
+ CmObject->Size = sizeof (PlatformRepo->CmAcpiTableList);
+ } else {
+ UINT32 TableCount = sizeof (PlatformRepo->CmAcpiTableList) /
+ sizeof (PlatformRepo->CmAcpiTableList[0]);
+ /* The last 2 tables in the ACPI table list enable PCIe support.
+ Reduce the CmObject size so that the PCIe specific ACPI
+ tables are not installed on Juno R0
+ */
+ CmObject->Size = sizeof (PlatformRepo->CmAcpiTableList[0]) *
+ (TableCount -2);
+ }
+ CmObject->Data = (VOID*)&PlatformRepo->CmAcpiTableList;
+ DEBUG ((
+ DEBUG_INFO,
+ "EStdObjAcpiTableList: Ptr = 0x%p. Size = %d\n",
+ CmObject->Data,
+ CmObject->Size
+ ));
+ break;
+
+ default: {
+ Status = EFI_NOT_FOUND;
+ DEBUG ((
+ DEBUG_ERROR,
+ "ERROR: Object 0x%x. Status = %r\n",
+ CmObjectId,
+ Status
+ ));
+ break;
+ }
+ }
+
+ return Status;
+}
+
+/** Return an ARM namespace object.
+
+ @param [in] This Pointer to the Configuration Manager Protocol.
+ @param [in] CmObjectId The Configuration Manager Object ID.
+ @param [in] Token An optional token identifying the object. If
+ unused this must be CM_NULL_TOKEN.
+ @param [out] CmObject Pointer to the Configuration Manager Object
+ descriptor describing the requested Object.
+
+ @retval EFI_SUCCESS Success.
+ @retval EFI_INVALID_PARAMETER A parameter is invalid.
+ @retval EFI_NOT_FOUND The required object information is not found.
+*/
+EFI_STATUS
+EFIAPI
+GetArmNameSpaceObject (
+ IN CONST EFI_CONFIGURATION_MANAGER_PROTOCOL * CONST This,
+ IN CONST CM_OBJECT_ID CmObjectId,
+ IN CONST CM_OBJECT_TOKEN Token OPTIONAL,
+ IN OUT CM_OBJ_DESCRIPTOR * CONST CmObject
+ )
+{
+ EFI_STATUS Status = EFI_SUCCESS;
+ EFI_PLATFORM_REPOSITORY_INFO * PlatformRepo;
+
+ if ((This == NULL) || (CmObject == NULL)) {
+ ASSERT (This != NULL);
+ ASSERT (CmObject != NULL);
+ return EFI_INVALID_PARAMETER;
+ }
+ PlatformRepo = This->PlatRepoInfo;
+
+ switch (GET_CM_OBJECT_ID (CmObjectId)) {
+ HANDLE_CM_OBJECT (EArmObjBootArchInfo, PlatformRepo->BootArchInfo);
+ HANDLE_CM_OBJECT (
+ EArmObjPowerManagementProfileInfo,
+ PlatformRepo->PmProfileInfo
+ );
+ HANDLE_CM_OBJECT (EArmObjGenericTimerInfo, PlatformRepo->GenericTimerInfo);
+ HANDLE_CM_OBJECT (
+ EArmObjPlatformGenericWatchdogInfo,
+ PlatformRepo->Watchdog
+ );
+ HANDLE_CM_OBJECT (EArmObjGicCInfo, PlatformRepo->GicCInfo);
+ HANDLE_CM_OBJECT (EArmObjGicDInfo, PlatformRepo->GicDInfo);
+ HANDLE_CM_OBJECT (
+ EArmObjSerialConsolePortInfo,
+ PlatformRepo->SpcrSerialPort
+ );
+ HANDLE_CM_OBJECT (EArmObjSerialDebugPortInfo, PlatformRepo->DbgSerialPort);
+ HANDLE_CM_OBJECT (EArmObjGicMsiFrameInfo, PlatformRepo->GicMsiFrameInfo);
+
+ case EArmObjPciConfigSpaceInfo:
+ if (PlatformRepo->JunoRevision != JUNO_REVISION_R0) {
+ CmObject->Size = sizeof (PlatformRepo->PciConfigInfo);
+ CmObject->Data = (VOID*)&PlatformRepo->PciConfigInfo;
+ DEBUG ((
+ DEBUG_INFO,
+ "EArmObjPciConfigSpaceInfo: Ptr = 0x%p, Size = %d\n",
+ CmObject->Data,
+ CmObject->Size
+ ));
+ }
+ break;
+
+ default: {
+ Status = EFI_NOT_FOUND;
+ DEBUG ((
+ DEBUG_INFO,
+ "INFO: Object 0x%x. Status = %r\n",
+ CmObjectId,
+ Status
+ ));
+ break;
+ }
+ }//switch
+
+ return Status;
+}
+
+/** Return an OEM namespace object.
+
+ @param [in] This Pointer to the Configuration Manager Protocol.
+ @param [in] CmObjectId The Configuration Manager Object ID.
+ @param [in] Token An optional token identifying the object. If
+ unused this must be CM_NULL_TOKEN.
+ @param [out] CmObject Pointer to the Configuration Manager Object
+ descriptor describing the requested Object.
+
+ @retval EFI_SUCCESS Success.
+ @retval EFI_INVALID_PARAMETER A parameter is invalid.
+ @retval EFI_NOT_FOUND The required object information is not found.
+*/
+EFI_STATUS
+EFIAPI
+GetOemNameSpaceObject (
+ IN CONST EFI_CONFIGURATION_MANAGER_PROTOCOL * CONST This,
+ IN CONST CM_OBJECT_ID CmObjectId,
+ IN CONST CM_OBJECT_TOKEN Token OPTIONAL,
+ IN OUT CM_OBJ_DESCRIPTOR * CONST CmObject
+ )
+{
+ EFI_STATUS Status = EFI_SUCCESS;
+
+ if ((This == NULL) || (CmObject == NULL)) {
+ ASSERT (This != NULL);
+ ASSERT (CmObject != NULL);
+ return EFI_INVALID_PARAMETER;
+ }
+
+ switch (GET_CM_OBJECT_ID (CmObjectId)) {
+ default: {
+ Status = EFI_NOT_FOUND;
+ DEBUG ((
+ DEBUG_ERROR,
+ "ERROR: Object 0x%x. Status = %r\n",
+ CmObjectId,
+ Status
+ ));
+ break;
+ }
+ }
+
+ return Status;
+}
+
+/** The GetObject function defines the interface implemented by the
+ Configuration Manager Protocol for returning the Configuration
+ Manager Objects.
+
+ @param [in] This Pointer to the Configuration Manager Protocol.
+ @param [in] CmObjectId The Configuration Manager Object ID.
+ @param [in] Token An optional token identifying the object. If
+ unused this must be CM_NULL_TOKEN.
+ @param [out] CmObject Pointer to the Configuration Manager Object
+ descriptor describing the requested Object.
+
+ @retval EFI_SUCCESS Success.
+ @retval EFI_INVALID_PARAMETER A parameter is invalid.
+ @retval EFI_NOT_FOUND The required object information is not found.
+*/
+EFI_STATUS
+EFIAPI
+ArmJunoPlatformGetObject (
+ IN CONST EFI_CONFIGURATION_MANAGER_PROTOCOL * CONST This,
+ IN CONST CM_OBJECT_ID CmObjectId,
+ IN CONST CM_OBJECT_TOKEN Token OPTIONAL,
+ IN OUT CM_OBJ_DESCRIPTOR * CONST CmObject
+ )
+{
+ EFI_STATUS Status;
+
+ if ((This == NULL) || (CmObject == NULL)) {
+ ASSERT (This != NULL);
+ ASSERT (CmObject != NULL);
+ return EFI_INVALID_PARAMETER;
+ }
+
+ switch (GET_CM_NAMESPACE_ID (CmObjectId)) {
+ case EObjNameSpaceStandard:
+ Status = GetStandardNameSpaceObject (This, CmObjectId, Token, CmObject);
+ break;
+ case EObjNameSpaceArm:
+ Status = GetArmNameSpaceObject (This, CmObjectId, Token, CmObject);
+ break;
+ case EObjNameSpaceOem:
+ Status = GetOemNameSpaceObject (This, CmObjectId, Token, CmObject);
+ break;
+ default: {
+ Status = EFI_INVALID_PARAMETER;
+ DEBUG ((
+ DEBUG_ERROR,
+ "ERROR: Unknown Namespace Object = 0x%x. Status = %r\n",
+ CmObjectId,
+ Status
+ ));
+ break;
+ }
+ }
+
+ return Status;
+}
+
+/** The SetObject function defines the interface implemented by the
+ Configuration Manager Protocol for updating the Configuration
+ Manager Objects.
+
+ @param [in] This Pointer to the Configuration Manager Protocol.
+ @param [in] CmObjectId The Configuration Manager Object ID.
+ @param [in] Token An optional token identifying the object. If
+ unused this must be CM_NULL_TOKEN.
+ @param [out] CmObject Pointer to the Configuration Manager Object
+ descriptor describing the Object.
+
+ @retval EFI_UNSUPPORTED This operation is not supported.
+*/
+EFI_STATUS
+EFIAPI
+ArmJunoPlatformSetObject (
+ IN CONST EFI_CONFIGURATION_MANAGER_PROTOCOL * CONST This,
+ IN CONST CM_OBJECT_ID CmObjectId,
+ IN CONST CM_OBJECT_TOKEN Token OPTIONAL,
+ IN CM_OBJ_DESCRIPTOR * CONST CmObject
+ )
+{
+ return EFI_UNSUPPORTED;
+}
+
+/** A structure describing the configuration manager protocol interface.
+*/
+STATIC
+CONST
+EFI_CONFIGURATION_MANAGER_PROTOCOL ArmJunoPlatformConfigManagerProtocol = {
+ CREATE_REVISION (1, 0),
+ ArmJunoPlatformGetObject,
+ ArmJunoPlatformSetObject,
+ &ArmJunoPlatformRepositoryInfo
+};
+
+/**
+ Entrypoint of Configuration Manager Dxe.
+
+ @param ImageHandle
+ @param SystemTable
+
+ @return EFI_SUCCESS
+ @return EFI_LOAD_ERROR
+ @return EFI_OUT_OF_RESOURCES
+
+**/
+EFI_STATUS
+EFIAPI
+ConfigurationManagerDxeInitialize (
+ IN EFI_HANDLE ImageHandle,
+ IN EFI_SYSTEM_TABLE * SystemTable
+ )
+{
+ EFI_STATUS Status;
+
+ Status = gBS->InstallProtocolInterface (
+ &ImageHandle,
+ &gEfiConfigurationManagerProtocolGuid,
+ EFI_NATIVE_INTERFACE,
+ (VOID*)&ArmJunoPlatformConfigManagerProtocol
+ );
+ if (EFI_ERROR (Status)) {
+ DEBUG ((
+ DEBUG_ERROR,
+ "ERROR: Failed to get Install Configuration Manager Protocol." \
+ " Status = %r\n",
+ Status
+ ));
+ goto error_handler;
+ }
+
+ Status = InitializePlatformRepository (
+ &ArmJunoPlatformConfigManagerProtocol
+ );
+ if (EFI_ERROR (Status)) {
+ DEBUG ((
+ DEBUG_ERROR,
+ "ERROR: Failed to initialize the Platform Configuration Repository." \
+ " Status = %r\n",
+ Status
+ ));
+ }
+
+error_handler:
+ return Status;
+}
diff --git a/Platform/ARM/JunoPkg/ConfigurationManager/ConfigurationManagerDxe/ConfigurationManager.h b/Platform/ARM/JunoPkg/ConfigurationManager/ConfigurationManagerDxe/ConfigurationManager.h
new file mode 100644
index 0000000000000000000000000000000000000000..438b701e4303877f2095dad0c76c6ccf6d2101d8
--- /dev/null
+++ b/Platform/ARM/JunoPkg/ConfigurationManager/ConfigurationManagerDxe/ConfigurationManager.h
@@ -0,0 +1,156 @@
+/** @file
+
+ Copyright (c) 2017 - 2018, ARM Limited. All rights reserved.
+
+ This program and the accompanying materials
+ are licensed and made available under the terms and conditions of the BSD License
+ which accompanies this distribution. The full text of the license may be found at
+ http://opensource.org/licenses/bsd-license.php
+
+ THE PROGRAM IS DISTRIBUTED UNDER THE BSD LICENSE ON AN "AS IS" BASIS,
+ WITHOUT WARRANTIES OR REPRESENTATIONS OF ANY KIND, EITHER EXPRESS OR IMPLIED.
+
+ @par Glossary:
+ - Cm or CM - Configuration Manager
+ - Obj or OBJ - Object
+**/
+
+#ifndef CONFIGURATION_MANAGER_H__
+#define CONFIGURATION_MANAGER_H__
+
+/** The configuration manager version
+*/
+#define CONFIGURATION_MANAGER_REVISION CREATE_REVISION (1, 0)
+
+/** The OEM ID
+*/
+#define CFG_MGR_OEM_ID { 'A', 'R', 'M', 'L', 'T', 'D' }
+
+/** A helper macro for populating the GIC CPU information
+*/
+#define GICC_ENTRY( \
+ CPUInterfaceNumber, \
+ Mpidr, \
+ PmuIrq, \
+ VGicIrq, \
+ EnergyEfficiency \
+ ) { \
+ CPUInterfaceNumber, /* UINT32 CPUInterfaceNumber */ \
+ CPUInterfaceNumber, /* UINT32 AcpiProcessorUid */ \
+ EFI_ACPI_6_2_GIC_ENABLED, /* UINT32 Flags */ \
+ 0, /* UINT32 ParkingProtocolVersion */ \
+ PmuIrq, /* UINT32 PerformanceInterruptGsiv */ \
+ 0, /* UINT64 ParkedAddress */ \
+ FixedPcdGet64 ( \
+ PcdGicInterruptInterfaceBase \
+ ), /* UINT64 PhysicalBaseAddress */ \
+ 0, /* UINT64 GICV */ \
+ 0, /* UINT64 GICH */ \
+ VGicIrq, /* UINT32 VGICMaintenanceInterrupt */ \
+ 0, /* UINT64 GICRBaseAddress */ \
+ Mpidr, /* UINT64 MPIDR */ \
+ EnergyEfficiency /* UINT8 ProcessorPowerEfficiencyClass*/ \
+ }
+
+/** A helper macro for returning configuration manager objects
+*/
+#define HANDLE_CM_OBJECT(CmObjectId, Object) \
+ case CmObjectId: { \
+ CmObject->Size = sizeof (Object); \
+ CmObject->Data = (VOID*)&Object; \
+ DEBUG (( \
+ DEBUG_INFO, \
+ #CmObjectId ": Ptr = 0x%p, Size = %d\n", \
+ CmObject->Data, \
+ CmObject->Size \
+ )); \
+ break; \
+ }
+
+/** A helper macro for returning configuration manager objects
+ referenced by token
+*/
+#define HANDLE_CM_OBJECT_REF_BY_TOKEN( \
+ CmObjectId, \
+ Object, \
+ Token, \
+ HandlerProc \
+ ) \
+ case CmObjectId: { \
+ if (Token == CM_NULL_TOKEN) { \
+ CmObject->Size = sizeof (Object); \
+ CmObject->Data = (VOID*)&Object; \
+ DEBUG (( \
+ DEBUG_INFO, \
+ #CmObjectId ": Ptr = 0x%p, Size = %d\n", \
+ CmObject->Data, \
+ CmObject->Size \
+ )); \
+ } else { \
+ Status = HandlerProc (This, CmObjectId, Token, CmObject); \
+ DEBUG (( \
+ DEBUG_INFO, \
+ #CmObjectId ": Token = 0x%p, Ptr = 0x%p, Size = %d\n", \
+ (VOID*)Token, \
+ CmObject->Data, \
+ CmObject->Size \
+ )); \
+ } \
+ break; \
+ }
+
+/** The number of CPUs
+*/
+#define PLAT_CPU_COUNT 6
+
+/** The number of ACPI tables to install
+*/
+#define PLAT_ACPI_TABLE_COUNT 10
+
+/** A structure describing the platform configuration
+ manager repository information
+*/
+typedef struct PlatformRepositoryInfo {
+ /// Configuration Manager Information
+ CM_STD_OBJ_CONFIGURATION_MANAGER_INFO CmInfo;
+
+ /// List of ACPI tables
+ CM_STD_OBJ_ACPI_TABLE_INFO CmAcpiTableList[PLAT_ACPI_TABLE_COUNT];
+
+ /// Boot architecture information
+ CM_ARM_BOOT_ARCH_INFO BootArchInfo;
+
+ /// Power management profile information
+ CM_ARM_POWER_MANAGEMENT_PROFILE_INFO PmProfileInfo;
+
+ /// GIC CPU interface information
+ CM_ARM_GICC_INFO GicCInfo[PLAT_CPU_COUNT];
+
+ /// GIC distributor information
+ CM_ARM_GICD_INFO GicDInfo;
+
+ /// Generic timer information
+ CM_ARM_GENERIC_TIMER_INFO GenericTimerInfo;
+
+ /// Watchdog information
+ CM_ARM_GENERIC_WATCHDOG_INFO Watchdog;
+
+ /** Serial port information for the
+ serial port console redirection port
+ */
+ CM_ARM_SERIAL_PORT_INFO SpcrSerialPort;
+
+ /// Serial port information for the DBG2 UART port
+ CM_ARM_SERIAL_PORT_INFO DbgSerialPort;
+
+ /// PCI configuration space information
+ CM_ARM_PCI_CONFIG_SPACE_INFO PciConfigInfo;
+
+ /// GIC MSI Frame information
+ CM_ARM_GIC_MSI_FRAME_INFO GicMsiFrameInfo;
+
+ /// Juno Board Revision
+ UINT32 JunoRevision;
+} EFI_PLATFORM_REPOSITORY_INFO;
+
+#endif // CONFIGURATION_MANAGER_H__
diff --git a/Platform/ARM/JunoPkg/ConfigurationManager/ConfigurationManagerDxe/ConfigurationManagerDxe.inf b/Platform/ARM/JunoPkg/ConfigurationManager/ConfigurationManagerDxe/ConfigurationManagerDxe.inf
new file mode 100644
index 0000000000000000000000000000000000000000..c1bd6de9a2fb9fbe592d91ee77c6107580a3fb5a
--- /dev/null
+++ b/Platform/ARM/JunoPkg/ConfigurationManager/ConfigurationManagerDxe/ConfigurationManagerDxe.inf
@@ -0,0 +1,85 @@
+## @file
+#
+# Copyright (c) 2017 - 2018, ARM Limited. All rights reserved.
+#
+# This program and the accompanying materials
+# are licensed and made available under the terms and conditions of the BSD License
+# which accompanies this distribution. The full text of the license may be found at
+# http://opensource.org/licenses/bsd-license.php
+#
+# THE PROGRAM IS DISTRIBUTED UNDER THE BSD LICENSE ON AN "AS IS" BASIS,
+# WITHOUT WARRANTIES OR REPRESENTATIONS OF ANY KIND, EITHER EXPRESS OR IMPLIED.
+##
+
+[Defines]
+ INF_VERSION = 0x00010019
+ BASE_NAME = ConfigurationManagerDxe
+ FILE_GUID = A97F70AC-3BB4-4596-B4D2-9F948EC12D17
+ MODULE_TYPE = DXE_DRIVER
+ VERSION_STRING = 1.0
+ ENTRY_POINT = ConfigurationManagerDxeInitialize
+
+#
+# The following information is for reference only and not required by the build tools.
+#
+# VALID_ARCHITECTURES = ARM AARCH64
+#
+
+[Sources]
+ ConfigurationManager.c
+
+[Packages]
+ ArmPkg/ArmPkg.dec
+ ArmPlatformPkg/ArmPlatformPkg.dec
+ MdePkg/MdePkg.dec
+ MdeModulePkg/MdeModulePkg.dec
+ Platform/ARM/JunoPkg/ArmJuno.dec
+ DynamicTablesPkg/DynamicTablesPkg.dec
+
+[LibraryClasses]
+ ArmPlatformLib
+ PlatformAslTablesLib
+ PrintLib
+ UefiBootServicesTableLib
+ UefiDriverEntryPoint
+ UefiRuntimeServicesTableLib
+
+[Protocols]
+ gEfiConfigurationManagerProtocolGuid
+
+[FixedPcd]
+ gArmTokenSpaceGuid.PcdArmArchTimerSecIntrNum
+ gArmTokenSpaceGuid.PcdArmArchTimerIntrNum
+ gArmTokenSpaceGuid.PcdArmArchTimerVirtIntrNum
+ gArmTokenSpaceGuid.PcdArmArchTimerHypIntrNum
+
+ gArmTokenSpaceGuid.PcdGicDistributorBase
+ gArmTokenSpaceGuid.PcdGicInterruptInterfaceBase
+ gArmTokenSpaceGuid.PcdGicRedistributorsBase
+
+ gEfiMdeModulePkgTokenSpaceGuid.PcdSerialRegisterBase
+ gEfiMdePkgTokenSpaceGuid.PcdUartDefaultBaudRate
+ gArmPlatformTokenSpaceGuid.PL011UartClkInHz
+ gArmPlatformTokenSpaceGuid.PL011UartInterrupt
+
+ ## PL011 Serial Debug UART
+ gArmPlatformTokenSpaceGuid.PcdSerialDbgRegisterBase
+ gArmPlatformTokenSpaceGuid.PcdSerialDbgUartBaudRate
+ gArmPlatformTokenSpaceGuid.PcdSerialDbgUartClkInHz
+
+ # SBSA Generic Watchdog
+ gArmTokenSpaceGuid.PcdGenericWatchdogControlBase
+ gArmTokenSpaceGuid.PcdGenericWatchdogRefreshBase
+ gArmTokenSpaceGuid.PcdGenericWatchdogEl2IntrNum
+
+ # PCI Root complex specific PCDs
+ gArmJunoTokenSpaceGuid.PcdPciConfigurationSpaceBaseAddress
+ gArmJunoTokenSpaceGuid.PcdPciConfigurationSpaceSize
+
+ gArmTokenSpaceGuid.PcdPciBusMin
+ gArmTokenSpaceGuid.PcdPciBusMax
+
+[Pcd]
+
+[Depex]
+ TRUE
diff --git a/Platform/ARM/JunoPkg/ConfigurationManager/ConfigurationManagerDxe/Platform.h b/Platform/ARM/JunoPkg/ConfigurationManager/ConfigurationManagerDxe/Platform.h
new file mode 100644
index 0000000000000000000000000000000000000000..d549370cf49ac493b46c574768dd03f0016a5cac
--- /dev/null
+++ b/Platform/ARM/JunoPkg/ConfigurationManager/ConfigurationManagerDxe/Platform.h
@@ -0,0 +1,65 @@
+/** @file
+
+ Copyright (c) 2017, ARM Limited. All rights reserved.
+
+ This program and the accompanying materials
+ are licensed and made available under the terms and conditions of the BSD License
+ which accompanies this distribution. The full text of the license may be found at
+ http://opensource.org/licenses/bsd-license.php
+
+ THE PROGRAM IS DISTRIBUTED UNDER THE BSD LICENSE ON AN "AS IS" BASIS,
+ WITHOUT WARRANTIES OR REPRESENTATIONS OF ANY KIND, EITHER EXPRESS OR IMPLIED.
+
+**/
+
+#ifndef PLATFORM_H__
+#define PLATFORM_H__
+
+#define GTDT_GLOBAL_FLAGS_MAPPED \
+ EFI_ACPI_6_2_GTDT_GLOBAL_FLAG_MEMORY_MAPPED_BLOCK_PRESENT
+#define GTDT_GLOBAL_FLAGS_NOT_MAPPED 0
+#define GTDT_GLOBAL_FLAGS_EDGE \
+ EFI_ACPI_6_2_GTDT_GLOBAL_FLAG_INTERRUPT_MODE
+#define GTDT_GLOBAL_FLAGS_LEVEL 0
+
+/*
+ Note: We could have a build flag that switches between memory
+ mapped/non-memory mapped timer
+*/
+#ifdef SYSTEM_COUNTER_BASE_ADDRESS
+#define GTDT_GLOBAL_FLAGS (GTDT_GLOBAL_FLAGS_MAPPED | \
+ GTDT_GLOBAL_FLAGS_LEVEL)
+#else
+#define GTDT_GLOBAL_FLAGS (GTDT_GLOBAL_FLAGS_NOT_MAPPED | \
+ GTDT_GLOBAL_FLAGS_LEVEL)
+#define SYSTEM_COUNTER_BASE_ADDRESS 0xFFFFFFFFFFFFFFFF
+#define SYSTEM_COUNTER_READ_BASE 0xFFFFFFFFFFFFFFFF
+#endif
+
+#define GTDT_TIMER_EDGE_TRIGGERED \
+ EFI_ACPI_6_2_GTDT_TIMER_FLAG_TIMER_INTERRUPT_MODE
+#define GTDT_TIMER_LEVEL_TRIGGERED 0
+#define GTDT_TIMER_ACTIVE_LOW \
+ EFI_ACPI_6_2_GTDT_TIMER_FLAG_TIMER_INTERRUPT_POLARITY
+#define GTDT_TIMER_ACTIVE_HIGH 0
+
+#define GTDT_GTIMER_FLAGS (GTDT_TIMER_ACTIVE_LOW | \
+ GTDT_TIMER_LEVEL_TRIGGERED)
+
+// Watchdog
+#define SBSA_WATCHDOG_EDGE_TRIGGERED \
+ EFI_ACPI_6_2_GTDT_SBSA_GENERIC_WATCHDOG_FLAG_TIMER_INTERRUPT_MODE
+#define SBSA_WATCHDOG_LEVEL_TRIGGERED 0
+#define SBSA_WATCHDOG_ACTIVE_LOW \
+ EFI_ACPI_6_2_GTDT_SBSA_GENERIC_WATCHDOG_FLAG_TIMER_INTERRUPT_POLARITY
+#define SBSA_WATCHDOG_ACTIVE_HIGH 0
+#define SBSA_WATCHDOG_SECURE \
+ EFI_ACPI_6_2_GTDT_SBSA_GENERIC_WATCHDOG_FLAG_SECURE_TIMER
+#define SBSA_WATCHDOG_NON_SECURE 0
+
+#define SBSA_WATCHDOG_FLAGS (SBSA_WATCHDOG_NON_SECURE | \
+ SBSA_WATCHDOG_ACTIVE_HIGH | \
+ SBSA_WATCHDOG_EDGE_TRIGGERED)
+
+#endif // PLATFORM_H__
+
diff --git a/Platform/ARM/JunoPkg/ConfigurationManager/PlatformASLTablesLib/Dsdt.asl b/Platform/ARM/JunoPkg/ConfigurationManager/PlatformASLTablesLib/Dsdt.asl
new file mode 100644
index 0000000000000000000000000000000000000000..b057689fc61fd4a4097c41b0eec35b1e08224d64
--- /dev/null
+++ b/Platform/ARM/JunoPkg/ConfigurationManager/PlatformASLTablesLib/Dsdt.asl
@@ -0,0 +1,306 @@
+/** @file
+ Differentiated System Description Table Fields (DSDT)
+
+ Copyright (c) 2014-2017, ARM Ltd. All rights reserved.<BR>
+ This program and the accompanying materials
+ are licensed and made available under the terms and conditions of the BSD License
+ which accompanies this distribution. The full text of the license may be found at
+ http://opensource.org/licenses/bsd-license.php
+
+ THE PROGRAM IS DISTRIBUTED UNDER THE BSD LICENSE ON AN "AS IS" BASIS,
+ WITHOUT WARRANTIES OR REPRESENTATIONS OF ANY KIND, EITHER EXPRESS OR IMPLIED.
+
+**/
+
+#include "ArmPlatform.h"
+
+DefinitionBlock("DsdtTable.aml", "DSDT", 1, "ARMLTD", "ARM-JUNO", EFI_ACPI_ARM_OEM_REVISION) {
+ Scope(_SB) {
+#ifdef DISABLE_LPI
+ //
+ // Processor
+ //
+ Device(CPU0) {
+ Name(_HID, "ACPI0007")
+ Name(_UID, Zero)
+ }
+ Device(CPU1) {
+ Name(_HID, "ACPI0007")
+ Name(_UID, One)
+ }
+ Device(CPU2) {
+ Name(_HID, "ACPI0007")
+ Name(_UID, 2)
+ }
+ Device(CPU3) {
+ Name(_HID, "ACPI0007")
+ Name(_UID, 3)
+ }
+ Device(CPU4) {
+ Name(_HID, "ACPI0007")
+ Name(_UID, 4)
+ }
+ Device(CPU5) {
+ Name(_HID, "ACPI0007")
+ Name(_UID, 5)
+ }
+#else
+ //
+ // A57x2-A53x4 Processor declaration
+ //
+ Method (_OSC, 4, Serialized) { // _OSC: Operating System Capabilities
+ CreateDWordField (Arg3, 0x00, STS0)
+ CreateDWordField (Arg3, 0x04, CAP0)
+ If ((Arg0 == ToUUID ("0811b06e-4a27-44f9-8d60-3cbbc22e7b48") /* Platform-wide Capabilities */)) {
+ If (!(Arg1 == One)) {
+ STS0 &= ~0x1F
+ STS0 |= 0x0A
+ } Else {
+ If ((CAP0 & 0x100)) {
+ CAP0 &= ~0x100 /* No support for OS Initiated LPI */
+ STS0 &= ~0x1F
+ STS0 |= 0x12
+ }
+ }
+ } Else {
+ STS0 &= ~0x1F
+ STS0 |= 0x06
+ }
+ Return (Arg3)
+ }
+ Device (CLU0) { // Cluster0 state
+ Name(_HID, "ACPI0010")
+ Name(_UID, 1)
+ Name (_LPI, Package() {
+ 0, // Version
+ 0, // Level Index
+ 1, // Count
+ Package() { // Power Gating state for Cluster
+ 2500, // Min residency (uS)
+ 1150, // Wake latency (uS)
+ 1, // Flags
+ 1, // Arch Context Flags
+ 100, //Residency Counter Frequency
+ 0, // No Parent State
+ 0x01000000, // Integer Entry method
+ ResourceTemplate() { // Null Residency Counter
+ Register (SystemMemory, 0, 0, 0, 0)
+ },
+ ResourceTemplate() { // Null Usage Counter
+ Register (SystemMemory, 0, 0, 0, 0)
+ },
+ "CluPwrDn"
+ },
+ })
+ Name(PLPI, Package() {
+ 0, // Version
+ 1, // Level Index
+ 2, // Count
+ Package() { // WFI for CPU
+ 1, // Min residency (uS)
+ 1, // Wake latency (uS)
+ 1, // Flags
+ 0, // Arch Context Flags
+ 100, //Residency Counter Frequency
+ 0, // No parent state
+ ResourceTemplate () {
+ // Register Entry method
+ Register (FFixedHW,
+ 0x20, // Bit Width
+ 0x00, // Bit Offset
+ 0xFFFFFFFF, // Address
+ 0x03, // Access Size
+ )
+ },
+ ResourceTemplate() { // Null Residency Counter
+ Register (SystemMemory, 0, 0, 0, 0)
+ },
+ ResourceTemplate() { // Null Usage Counter
+ Register (SystemMemory, 0, 0, 0, 0)
+ },
+ "WFI",
+ },
+ Package() { // Power Gating state for CPU
+ 150, // Min residency (uS)
+ 350, // Wake latency (uS)
+ 1, // Flags
+ 1, // Arch Context Flags
+ 100, //Residency Counter Frequency
+ 1, // Parent node can be in any state
+ ResourceTemplate () {
+ // Register Entry method
+ Register (FFixedHW,
+ 0x20, // Bit Width
+ 0x00, // Bit Offset
+ 0x00010000, // Address
+ 0x03, // Access Size
+ )
+ },
+ ResourceTemplate() { // Null Residency Counter
+ Register (SystemMemory, 0, 0, 0, 0)
+ },
+ ResourceTemplate() { // Null Usage Counter
+ Register (SystemMemory, 0, 0, 0, 0)
+ },
+ "CorePwrDn"
+ },
+ })
+ Device(CPU0) { // A57-0: Cluster 0, Cpu 0
+ Name(_HID, "ACPI0007")
+ Name(_UID, 4)
+ Method (_LPI, 0, NotSerialized) {
+ return(PLPI)
+ }
+ }
+ Device(CPU1) { // A57-1: Cluster 0, Cpu 1
+ Name(_HID, "ACPI0007")
+ Name(_UID, 5)
+ Method (_LPI, 0, NotSerialized) {
+ return(PLPI)
+ }
+ }
+ }
+ Device (CLU1) { // Cluster1 state
+ Name(_HID, "ACPI0010")
+ Name(_UID, 2)
+ Name (_LPI, Package() {
+ 0, // Version
+ 0, // Level Index
+ 1, // Count
+ Package() { // Power Gating state for Cluster
+ 2500, // Min residency (uS)
+ 1150, // Wake latency (uS)
+ 1, // Flags
+ 1, // Arch Context Flags
+ 100, //Residency Counter Frequency
+ 0, // No Parent State
+ 0x01000000, // Integer Entry method
+ ResourceTemplate() { // Null Residency Counter
+ Register (SystemMemory, 0, 0, 0, 0)
+ },
+ ResourceTemplate() { // Null Usage Counter
+ Register (SystemMemory, 0, 0, 0, 0)
+ },
+ "CluPwrDn"
+ },
+ })
+ Name(PLPI, Package() {
+ 0, // Version
+ 1, // Level Index
+ 2, // Count
+ Package() { // WFI for CPU
+ 1, // Min residency (uS)
+ 1, // Wake latency (uS)
+ 1, // Flags
+ 0, // Arch Context Flags
+ 100, //Residency Counter Frequency
+ 0, // No parent state
+ ResourceTemplate () {
+ // Register Entry method
+ Register (FFixedHW,
+ 0x20, // Bit Width
+ 0x00, // Bit Offset
+ 0xFFFFFFFF, // Address
+ 0x03, // Access Size
+ )
+ },
+ ResourceTemplate() { // Null Residency Counter
+ Register (SystemMemory, 0, 0, 0, 0)
+ },
+ ResourceTemplate() { // Null Usage Counter
+ Register (SystemMemory, 0, 0, 0, 0)
+ },
+ "WFI",
+ },
+ Package() { // Power Gating state for CPU
+ 150, // Min residency (uS)
+ 350, // Wake latency (uS)
+ 1, // Flags
+ 1, // Arch Context Flags
+ 100, //Residency Counter Frequency
+ 1, // Parent node can be in any state
+ ResourceTemplate () {
+ // Register Entry method
+ Register (FFixedHW,
+ 0x20, // Bit Width
+ 0x00, // Bit Offset
+ 0x00010000, // Address
+ 0x03, // Access Size
+ )
+ },
+ ResourceTemplate() { // Null Residency Counter
+ Register (SystemMemory, 0, 0, 0, 0)
+ },
+ ResourceTemplate() { // Null Usage Counter
+ Register (SystemMemory, 0, 0, 0, 0)
+ },
+ "CorePwrDn"
+ },
+ })
+ Device(CPU2) { // A53-0: Cluster 1, Cpu 0
+ Name(_HID, "ACPI0007")
+ Name(_UID, 0)
+ Method (_LPI, 0, NotSerialized) {
+ return(PLPI)
+ }
+ }
+ Device(CPU3) { // A53-1: Cluster 1, Cpu 1
+ Name(_HID, "ACPI0007")
+ Name(_UID, 1)
+ Method (_LPI, 0, NotSerialized) {
+ return(PLPI)
+ }
+ }
+ Device(CPU4) { // A53-2: Cluster 1, Cpu 2
+ Name(_HID, "ACPI0007")
+ Name(_UID, 2)
+ Method (_LPI, 0, NotSerialized) {
+ return(PLPI)
+ }
+ }
+ Device(CPU5) { // A53-3: Cluster 1, Cpu 3
+ Name(_HID, "ACPI0007")
+ Name(_UID, 3)
+ Method (_LPI, 0, NotSerialized) {
+ return(PLPI)
+ }
+ }
+ }
+#endif
+
+ //
+ // Keyboard and Mouse
+ //
+ Device(KMI0) {
+ Name(_HID, "ARMH0501")
+ Name(_CID, "PL050_KBD")
+ Name(_CRS, ResourceTemplate() {
+ Memory32Fixed(ReadWrite, 0x1C060008, 0x4)
+ Memory32Fixed(ReadWrite, 0x1C060000, 0x4)
+ Memory32Fixed(ReadOnly, 0x1C060004, 0x4)
+ Interrupt(ResourceConsumer, Level, ActiveHigh, Exclusive) { 197 }
+ })
+ }
+
+ //
+ // LAN9118 Ethernet
+ //
+ Device(ETH0) {
+ Name(_HID, "ARMH9118")
+ Name(_UID, Zero)
+ Name(_CRS, ResourceTemplate() {
+ Memory32Fixed(ReadWrite, 0x18000000, 0x1000)
+ Interrupt(ResourceConsumer, Level, ActiveHigh, Exclusive) { 192 }
+ })
+ Name(_DSD, Package() {
+ ToUUID("daffd814-6eba-4d8c-8a91-bc9bbf4aa301"),
+ Package() {
+ Package(2) {"phy-mode", "mii"},
+ Package(2) {"reg-io-width", 4 },
+ Package(2) {"smsc,irq-active-high",1},
+ Package(2) {"smsc,irq-push-pull",1}
+ }
+ }) // _DSD()
+ }
+ } // Scope(_SB)
+}
diff --git a/Platform/ARM/JunoPkg/ConfigurationManager/PlatformASLTablesLib/PlatformASLTablesLib.inf b/Platform/ARM/JunoPkg/ConfigurationManager/PlatformASLTablesLib/PlatformASLTablesLib.inf
new file mode 100644
index 0000000000000000000000000000000000000000..4b6e48d3efcd3ceb094c4b291eaa4c3060e93b92
--- /dev/null
+++ b/Platform/ARM/JunoPkg/ConfigurationManager/PlatformASLTablesLib/PlatformASLTablesLib.inf
@@ -0,0 +1,44 @@
+## @file
+#
+# Copyright (c) 2017 - 2018, ARM Limited. All rights reserved.
+#
+# This program and the accompanying materials
+# are licensed and made available under the terms and conditions of the BSD License
+# which accompanies this distribution. The full text of the license may be found at
+# http://opensource.org/licenses/bsd-license.php
+#
+# THE PROGRAM IS DISTRIBUTED UNDER THE BSD LICENSE ON AN "AS IS" BASIS,
+# WITHOUT WARRANTIES OR REPRESENTATIONS OF ANY KIND, EITHER EXPRESS OR IMPLIED.
+##
+
+[Defines]
+ INF_VERSION = 0x00010019
+ BASE_NAME = JunoAslTablesLib
+ FILE_GUID = 557004DB-DF45-426B-9E5E-1E8ABAA2EE2C
+ MODULE_TYPE = DXE_DRIVER
+ VERSION_STRING = 1.0
+ LIBRARY_CLASS = PlatformAslTablesLib|DXE_DRIVER
+
+#
+# The following information is for reference only and not required by the build tools.
+#
+# VALID_ARCHITECTURES = ARM AARCH64
+#
+
+[Sources]
+ Dsdt.asl
+ SsdtJunoUsb.asl
+ SsdtPci.asl
+ SsdtUart.asl
+
+[Packages]
+ ArmPkg/ArmPkg.dec
+ ArmPlatformPkg/ArmPlatformPkg.dec
+ MdePkg/MdePkg.dec
+ MdeModulePkg/MdeModulePkg.dec
+ Platform/ARM/JunoPkg/ArmJuno.dec
+ Platform/ARM/VExpressPkg/ArmVExpressPkg.dec
+
+[FixedPcd]
+ gEfiMdeModulePkgTokenSpaceGuid.PcdSerialRegisterBase
+ gArmPlatformTokenSpaceGuid.PL011UartInterrupt
diff --git a/Platform/ARM/JunoPkg/ConfigurationManager/PlatformASLTablesLib/SsdtJunoUsb.asl b/Platform/ARM/JunoPkg/ConfigurationManager/PlatformASLTablesLib/SsdtJunoUsb.asl
new file mode 100644
index 0000000000000000000000000000000000000000..b5dfb07dfbbff26967e099f3acd61d3bcb179e2f
--- /dev/null
+++ b/Platform/ARM/JunoPkg/ConfigurationManager/PlatformASLTablesLib/SsdtJunoUsb.asl
@@ -0,0 +1,122 @@
+/** @file
+ SSDT for Juno USB
+
+ Copyright (c) 2014-2017, ARM Ltd. All rights reserved.<BR>
+ This program and the accompanying materials
+ are licensed and made available under the terms and conditions of the BSD License
+ which accompanies this distribution. The full text of the license may be found at
+ http://opensource.org/licenses/bsd-license.php
+
+ THE PROGRAM IS DISTRIBUTED UNDER THE BSD LICENSE ON AN "AS IS" BASIS,
+ WITHOUT WARRANTIES OR REPRESENTATIONS OF ANY KIND, EITHER EXPRESS OR IMPLIED.
+
+**/
+
+#include "ArmPlatform.h"
+
+DefinitionBlock("SsdtJunoUSB.aml", "SSDT", 1, "ARMLTD", "ARM-JUNO", EFI_ACPI_ARM_OEM_REVISION) {
+ Scope(_SB) {
+
+ //
+ // USB EHCI Host Controller
+ //
+ Device(USB0) {
+ Name(_HID, "ARMH0D20")
+ Name(_CID, "PNP0D20")
+ Name(_UID, 2)
+
+ Name(_CCA, ZERO) // Cache-incoherent bus-master
+
+ Method(_CRS, 0x0, Serialized){
+ Name(RBUF, ResourceTemplate(){
+ Memory32Fixed(ReadWrite, 0x7FFC0000, 0x000000B0) // 0x7FFC0000 is the Juno SoC USB EHCI controller base address
+ Interrupt(ResourceConsumer, Level, ActiveHigh, Exclusive) {149} // INT ID=149 GIC IRQ ID=117 for Juno SoC USB EHCI Controller
+ })
+ Return(RBUF)
+ }
+
+ //
+ // Root Hub
+ //
+ Device(RHUB) {
+ Name(_ADR, Zero) // Address of Root Hub should be 0 as per ACPI 5.0 spec
+
+ //
+ // Ports connected to Root Hub
+ //
+ Device(HUB1) {
+ Name(_ADR, One)
+ Name(_UPC, Package(){
+ Zero, // Port is NOT connectable
+ 0xFF, // Don't care
+ Zero, // Reserved 0 must be zero
+ Zero // Reserved 1 must be zero
+ })
+
+ Device(PRT1) {
+ Name(_ADR, One)
+ Name(_UPC, Package(){
+ 0xFF, // Port is connectable
+ Zero, // Port connector is A
+ Zero,
+ Zero
+ })
+ Name(_PLD, Package(One) {
+ Buffer(0x10){
+ 0x81, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00,
+ 0x31, 0x1C, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00
+ }
+ })
+ } // USB0_RHUB_HUB1_PRT1
+ Device(PRT2) {
+ Name(_ADR, 0x00000002)
+ Name(_UPC, Package() {
+ 0xFF, // Port is connectable
+ Zero, // Port connector is A
+ Zero,
+ Zero
+ })
+ Name(_PLD, Package(One) {
+ Buffer(0x10){
+ 0x81, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00,
+ 0x31, 0x1C, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00
+ }
+ })
+ } // USB0_RHUB_HUB1_PRT2
+
+ Device(PRT3) {
+ Name(_ADR, 0x00000003)
+ Name(_UPC, Package() {
+ 0xFF, // Port is connectable
+ Zero, // Port connector is A
+ Zero,
+ Zero
+ })
+ Name(_PLD, Package(One) {
+ Buffer(0x10){
+ 0x81, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00,
+ 0x31, 0x1C, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00
+ }
+ })
+ } // USB0_RHUB_HUB1_PRT3
+
+ Device(PRT4) {
+ Name(_ADR, 0x00000004)
+ Name(_UPC, Package(){
+ 0xFF, // Port is connectable
+ Zero, // Port connector is A
+ Zero,
+ Zero
+ })
+ Name(_PLD, Package(One) {
+ Buffer(0x10){
+ 0x81, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00,
+ 0x31, 0x1C, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00
+ }
+ })
+ } // USB0_RHUB_HUB1_PRT4
+ } // USB0_RHUB_HUB1
+ } // USB0_RHUB
+ } // USB0
+ }
+}
diff --git a/Platform/ARM/JunoPkg/ConfigurationManager/PlatformASLTablesLib/SsdtPci.asl b/Platform/ARM/JunoPkg/ConfigurationManager/PlatformASLTablesLib/SsdtPci.asl
new file mode 100644
index 0000000000000000000000000000000000000000..2d47b4dfc013a9830b9e1d8fc51c9794f24ad379
--- /dev/null
+++ b/Platform/ARM/JunoPkg/ConfigurationManager/PlatformASLTablesLib/SsdtPci.asl
@@ -0,0 +1,218 @@
+/** @file
+ SSDT for Juno PCIe
+
+ Copyright (c) 2014-2017, ARM Ltd. All rights reserved.<BR>
+ This program and the accompanying materials
+ are licensed and made available under the terms and conditions of the BSD License
+ which accompanies this distribution. The full text of the license may be found at
+ http://opensource.org/licenses/bsd-license.php
+
+ THE PROGRAM IS DISTRIBUTED UNDER THE BSD LICENSE ON AN "AS IS" BASIS,
+ WITHOUT WARRANTIES OR REPRESENTATIONS OF ANY KIND, EITHER EXPRESS OR IMPLIED.
+
+**/
+
+#include "ArmPlatform.h"
+
+/*
+ See ACPI 6.1 Section 6.2.13
+
+ There are two ways that _PRT can be used. ...
+
+ In the first model, a PCI Link device is used to provide additional
+ configuration information such as whether the interrupt is Level or
+ Edge triggered, it is active High or Low, Shared or Exclusive, etc.
+
+ In the second model, the PCI interrupts are hardwired to specific
+ interrupt inputs on the interrupt controller and are not
+ configurable. In this case, the Source field in _PRT does not
+ reference a device, but instead contains the value zero, and the
+ Source Index field contains the global system interrupt to which the
+ PCI interrupt is hardwired.
+
+ We use the first model with link indirection to set the correct
+ interrupt type as PCI defaults (Level Triggered, Active Low) are not
+ compatible with GICv2.
+*/
+#define LNK_DEVICE(Unique_Id, Link_Name, irq) \
+ Device(Link_Name) { \
+ Name(_HID, EISAID("PNP0C0F")) \
+ Name(_UID, Unique_Id) \
+ Name(_PRS, ResourceTemplate() { \
+ Interrupt(ResourceProducer, Level, ActiveHigh, Exclusive) { irq } \
+ }) \
+ Method (_CRS, 0) { Return (_PRS) } \
+ Method (_SRS, 1) { } \
+ Method (_DIS) { } \
+ }
+
+#define PRT_ENTRY(Address, Pin, Link) \
+ Package (4) { \
+ Address, /* uses the same format as _ADR */ \
+ Pin, /* The PCI pin number of the device (0-INTA, 1-INTB, 2-INTC, 3-INTD). */ \
+ Link, /* Interrupt allocated via Link device. */ \
+ Zero /* global system interrupt number (no used) */ \
+ }
+
+/*
+ See Reference [1] 6.1.1
+ "High word–Device #, Low word–Function #. (for example, device 3, function 2 is
+ 0x00030002). To refer to all the functions on a device #, use a function number of FFFF)."
+*/
+#define ROOT_PRT_ENTRY(Pin, Link) PRT_ENTRY(0x0000FFFF, Pin, Link)
+ // Device 0 for Bridge.
+
+DefinitionBlock("SsdtPci.aml", "SSDT", 1, "ARMLTD", "ARM-JUNO", EFI_ACPI_ARM_OEM_REVISION) {
+ Scope(_SB) {
+ //
+ // PCI Root Complex
+ //
+ LNK_DEVICE(1, LNKA, 168)
+ LNK_DEVICE(2, LNKB, 169)
+ LNK_DEVICE(3, LNKC, 170)
+ LNK_DEVICE(4, LNKD, 171)
+
+ Device(PCI0)
+ {
+ Name(_HID, EISAID("PNP0A08")) // PCI Express Root Bridge
+ Name(_CID, EISAID("PNP0A03")) // Compatible PCI Root Bridge
+ Name(_SEG, Zero) // PCI Segment Group number
+ Name(_BBN, Zero) // PCI Base Bus Number
+ Name(_CCA, 1) // Initially mark the PCI coherent (for JunoR1)
+
+ // Root Complex 0
+ Device (RP0) {
+ Name(_ADR, 0xF0000000) // Dev 0, Func 0
+ }
+
+ // PCI Routing Table
+ Name(_PRT, Package() {
+ ROOT_PRT_ENTRY(0, LNKA), // INTA
+ ROOT_PRT_ENTRY(1, LNKB), // INTB
+ ROOT_PRT_ENTRY(2, LNKC), // INTC
+ ROOT_PRT_ENTRY(3, LNKD), // INTD
+ })
+ // Root complex resources
+ Method (_CRS, 0, Serialized) {
+ Name (RBUF, ResourceTemplate () {
+ WordBusNumber ( // Bus numbers assigned to this root
+ ResourceProducer,
+ MinFixed, MaxFixed, PosDecode,
+ 0, // AddressGranularity
+ 0, // AddressMinimum - Minimum Bus Number
+ 255, // AddressMaximum - Maximum Bus Number
+ 0, // AddressTranslation - Set to 0
+ 256 // RangeLength - Number of Busses
+ )
+
+ DWordMemory ( // 32-bit BAR Windows
+ ResourceProducer, PosDecode,
+ MinFixed, MaxFixed,
+ Cacheable, ReadWrite,
+ 0x00000000, // Granularity
+ 0x50000000, // Min Base Address
+ 0x57FFFFFF, // Max Base Address
+ 0x00000000, // Translate
+ 0x08000000 // Length
+ )
+
+ QWordMemory ( // 64-bit BAR Windows
+ ResourceProducer, PosDecode,
+ MinFixed, MaxFixed,
+ Cacheable, ReadWrite,
+ 0x00000000, // Granularity
+ 0x4000000000, // Min Base Address
+ 0x40FFFFFFFF, // Max Base Address
+ 0x00000000, // Translate
+ 0x100000000 // Length
+ )
+
+ DWordIo ( // IO window
+ ResourceProducer,
+ MinFixed,
+ MaxFixed,
+ PosDecode,
+ EntireRange,
+ 0x00000000, // Granularity
+ 0x00000000, // Min Base Address
+ 0x007fffff, // Max Base Address
+ 0x5f800000, // Translate
+ 0x00800000, // Length
+ ,,,TypeTranslation
+ )
+ }) // Name(RBUF)
+
+ Return (RBUF)
+ } // Method(_CRS)
+
+ //
+ // OS Control Handoff
+ //
+ Name(SUPP, Zero) // PCI _OSC Support Field value
+ Name(CTRL, Zero) // PCI _OSC Control Field value
+
+ /*
+ See [1] 6.2.10, [2] 4.5
+ */
+ Method(_OSC,4) {
+ // Check for proper UUID
+ If(LEqual(Arg0,ToUUID("33DB4D5B-1FF7-401C-9657-7441C03DD766"))) {
+ // Create DWord-adressable fields from the Capabilities Buffer
+ CreateDWordField(Arg3,0,CDW1)
+ CreateDWordField(Arg3,4,CDW2)
+ CreateDWordField(Arg3,8,CDW3)
+
+ // Save Capabilities DWord2 & 3
+ Store(CDW2,SUPP)
+ Store(CDW3,CTRL)
+
+ // Only allow native hot plug control if OS supports:
+ // * ASPM
+ // * Clock PM
+ // * MSI/MSI-X
+ If(LNotEqual(And(SUPP, 0x16), 0x16)) {
+ And(CTRL,0x1E,CTRL) // Mask bit 0 (and undefined bits)
+ }
+
+ // Always allow native PME, AER (no dependencies)
+
+ // Never allow SHPC (no SHPC controller in this system)
+ And(CTRL,0x1D,CTRL)
+
+#if 0
+ If(LNot(And(CDW1,1))) { // Query flag clear?
+ // Disable GPEs for features granted native control.
+ If(And(CTRL,0x01)) { // Hot plug control granted?
+ Store(0,HPCE) // clear the hot plug SCI enable bit
+ Store(1,HPCS) // clear the hot plug SCI status bit
+ }
+ If(And(CTRL,0x04)) { // PME control granted?
+ Store(0,PMCE) // clear the PME SCI enable bit
+ Store(1,PMCS) // clear the PME SCI status bit
+ }
+ If(And(CTRL,0x10)) { // OS restoring PCIe cap structure?
+ // Set status to not restore PCIe cap structure
+ // upon resume from S3
+ Store(1,S3CR)
+ }
+ }
+#endif
+
+ If(LNotEqual(Arg1,One)) { // Unknown revision
+ Or(CDW1,0x08,CDW1)
+ }
+
+ If(LNotEqual(CDW3,CTRL)) { // Capabilities bits were masked
+ Or(CDW1,0x10,CDW1)
+ }
+ // Update DWORD3 in the buffer
+ Store(CTRL,CDW3)
+ Return(Arg3)
+ } Else {
+ Or(CDW1,4,CDW1) // Unrecognized UUID
+ Return(Arg3)
+ }
+ } // End _OSC
+ } // PCI0
+ }
+}
diff --git a/Platform/ARM/JunoPkg/ConfigurationManager/PlatformASLTablesLib/SsdtUart.asl b/Platform/ARM/JunoPkg/ConfigurationManager/PlatformASLTablesLib/SsdtUart.asl
new file mode 100644
index 0000000000000000000000000000000000000000..d3932f272d1b8a81e77dc5c339ab75ada0e9d3ea
--- /dev/null
+++ b/Platform/ARM/JunoPkg/ConfigurationManager/PlatformASLTablesLib/SsdtUart.asl
@@ -0,0 +1,48 @@
+/** @file
+ SSDT for UART
+
+ Copyright (c) 2014-2017, ARM Ltd. All rights reserved.<BR>
+ This program and the accompanying materials
+ are licensed and made available under the terms and conditions of the BSD License
+ which accompanies this distribution. The full text of the license may be found at
+ http://opensource.org/licenses/bsd-license.php
+
+ THE PROGRAM IS DISTRIBUTED UNDER THE BSD LICENSE ON AN "AS IS" BASIS,
+ WITHOUT WARRANTIES OR REPRESENTATIONS OF ANY KIND, EITHER EXPRESS OR IMPLIED.
+
+**/
+#include "ArmPlatform.h"
+
+DefinitionBlock("SsdtUart.aml", "SSDT", 1, "ARMLTD", "ARM-JUNO", EFI_ACPI_ARM_OEM_REVISION) {
+ Scope(_SB) {
+ // UART PL011
+ Device(COM2) {
+ Name(_HID, "ARMH0011")
+ Name(_CID, "PL011")
+ Name(_UID, Zero)
+
+ Method(_STA) {
+ Return(0xF)
+ }
+
+ Method(_CRS, 0x0, NotSerialized) {
+ Name(RBUF, ResourceTemplate() {
+ Memory32Fixed(
+ ReadWrite,
+ FixedPcdGet64 (PcdSerialRegisterBase),
+ 0x1000
+ )
+ Interrupt(
+ ResourceConsumer,
+ Level,
+ ActiveHigh,
+ Exclusive
+ ) {
+ FixedPcdGet32 (PL011UartInterrupt)
+ }
+ })
+ Return (RBUF)
+ }
+ }
+ }
+}
diff --git a/Platform/ARM/JunoPkg/Drivers/ArmJunoDxe/ArmJunoDxe.c b/Platform/ARM/JunoPkg/Drivers/ArmJunoDxe/ArmJunoDxe.c
index 18491c7378523f365644658c270de95e711c5ac1..0a42d21d4e9b60824f1d313a4d5ad9e4bc6db3aa 100644
--- a/Platform/ARM/JunoPkg/Drivers/ArmJunoDxe/ArmJunoDxe.c
+++ b/Platform/ARM/JunoPkg/Drivers/ArmJunoDxe/ArmJunoDxe.c
@@ -1,6 +1,6 @@
/** @file
*
-* Copyright (c) 2013-2015, ARM Limited. All rights reserved.
+* Copyright (c) 2013-2017, ARM Limited. All rights reserved.
*
* This program and the accompanying materials
* are licensed and made available under the terms and conditions of the BSD License
@@ -33,9 +33,10 @@
#include <Library/IoLib.h>
#include <Library/PrintLib.h>
-
+#ifndef DYNAMIC_TABLES_FRAMEWORK
// This GUID must match the FILE_GUID in ArmPlatformPkg/ArmJunoPkg/AcpiTables/AcpiTables.inf
STATIC CONST EFI_GUID mJunoAcpiTableFile = { 0xa1dd808e, 0x1e95, 0x4399, { 0xab, 0xc0, 0x65, 0x3c, 0x82, 0xe8, 0x53, 0x0c } };
+#endif
typedef struct {
ACPI_HID_DEVICE_PATH AcpiDevicePath;
@@ -487,11 +488,13 @@ ArmJunoEntryPoint (
GetJunoRevision(JunoRevision);
+#ifndef DYNAMIC_TABLES_FRAMEWORK
//
// Try to install the ACPI Tables
//
Status = LocateAndInstallAcpiFromFv (&mJunoAcpiTableFile);
ASSERT_EFI_ERROR (Status);
+#endif
//
// Setup R1/R2 options if not already done.
@@ -516,6 +519,7 @@ ArmJunoEntryPoint (
&EndOfDxeEvent
);
+#ifndef DYNAMIC_TABLES_FRAMEWORK
// Declare the related ACPI Tables
EfiCreateProtocolNotifyEvent (
&gEfiAcpiTableProtocolGuid,
@@ -524,6 +528,7 @@ ArmJunoEntryPoint (
NULL,
&mAcpiRegistration
);
+#endif
}
//
--
'Guid(CE165669-3EF3-493F-B85D-6190EE5B9759)'
^ permalink raw reply related [flat|nested] 6+ messages in thread
* [PATCH 2/2][platforms/dynamictables] Platform/ARM: Dynamic Tables support for FVP
2018-03-19 15:21 [PATCH 0/2] [platforms/dynamictables] Platform support for Dynamic Tables Framework Sami Mujawar
2018-03-19 15:21 ` [PATCH 1/2][platforms/dynamictables] Platform/ARM: Dynamic Tables support for Juno Sami Mujawar
@ 2018-03-19 15:21 ` Sami Mujawar
2018-03-19 16:13 ` Evan Lloyd
2018-03-21 3:49 ` [PATCH 0/2] [platforms/dynamictables] Platform support for Dynamic Tables Framework Leif Lindholm
2 siblings, 1 reply; 6+ messages in thread
From: Sami Mujawar @ 2018-03-19 15:21 UTC (permalink / raw)
To: edk2-devel
Cc: Arvind Chauhan, Daniil Egranov, Thomas Panakamattam Abraham,
evan.lloyd, leif.lindholm, Matteo.Carlini, Stephanie.Hughes-Fitt,
nd
The dynamic tables framework utilizes the configuration manager
protocol to get the platform specific information required for
building the firmware tables.
The configuration manager is a platform specific component that
collates the platform hardware information and builds an abstract
platform configuration repository. The configuration manager also
implements the configuration manager protocol which returns the
hardware information requested by the table generators.
This patch implements the configuration manager support for the
FVP platform.
The dynamic tables framework support is configurable and can be
enabled using the DYNAMIC_TABLES_FRAMEWORK build option.
Contributed-under: TianoCore Contribution Agreement 1.1
Signed-off-by: Sami Mujawar <sami.mujawar@arm.com>
---
Platform/ARM/VExpressPkg/ArmVExpress-FVP-AArch64.dsc | 15 +
Platform/ARM/VExpressPkg/ArmVExpress-FVP-AArch64.fdf | 16 +-
Platform/ARM/VExpressPkg/ConfigurationManager/ConfigurationManager.dsc.inc | 31 +
Platform/ARM/VExpressPkg/ConfigurationManager/ConfigurationManagerDxe/ConfigurationManager.c | 607 ++++++++++++++++++++
Platform/ARM/VExpressPkg/ConfigurationManager/ConfigurationManagerDxe/ConfigurationManager.h | 172 ++++++
Platform/ARM/VExpressPkg/ConfigurationManager/ConfigurationManagerDxe/ConfigurationManagerDxe.inf | 78 +++
Platform/ARM/VExpressPkg/ConfigurationManager/ConfigurationManagerDxe/Platform.h | 91 +++
Platform/ARM/VExpressPkg/ConfigurationManager/PlatformASLTablesLib/Dsdt.asl | 77 +++
Platform/ARM/VExpressPkg/ConfigurationManager/PlatformASLTablesLib/PlatformASLTablesLib.inf | 34 ++
9 files changed, 1119 insertions(+), 2 deletions(-)
diff --git a/Platform/ARM/VExpressPkg/ArmVExpress-FVP-AArch64.dsc b/Platform/ARM/VExpressPkg/ArmVExpress-FVP-AArch64.dsc
index cdf9e2d49784d542701dc84eb511f592e77ec106..ed1a16b7b35d9854847e3898f8061abb5261e134 100644
--- a/Platform/ARM/VExpressPkg/ArmVExpress-FVP-AArch64.dsc
+++ b/Platform/ARM/VExpressPkg/ArmVExpress-FVP-AArch64.dsc
@@ -38,6 +38,10 @@ [Defines]
DT_SUPPORT = FALSE
!include Platform/ARM/VExpressPkg/ArmVExpress.dsc.inc
+!ifdef DYNAMIC_TABLES_FRAMEWORK
+ !include DynamicTablesPkg/DynamicTables.dsc.inc
+ !include Platform/ARM/VExpressPkg/ConfigurationManager/ConfigurationManager.dsc.inc
+!endif
[LibraryClasses.common]
ArmLib|ArmPkg/Library/ArmLib/ArmBaseLib.inf
@@ -128,6 +132,15 @@ [PcdsFixedAtBuild.common]
gEfiMdeModulePkgTokenSpaceGuid.PcdSerialRegisterBase|0x1c090000
gEfiMdePkgTokenSpaceGuid.PcdUartDefaultBaudRate|115200
gEfiMdePkgTokenSpaceGuid.PcdUartDefaultReceiveFifoDepth|0
+ gArmPlatformTokenSpaceGuid.PL011UartInterrupt|0x25
+
+ ## PL011 Serial Debug UART
+ gArmPlatformTokenSpaceGuid.PcdSerialDbgRegisterBase|0x1c0a0000
+ gArmPlatformTokenSpaceGuid.PcdSerialDbgUartBaudRate|115200
+ gArmPlatformTokenSpaceGuid.PcdSerialDbgUartClkInHz|24000000
+
+ # SBSA Generic Watchdog
+ gArmTokenSpaceGuid.PcdGenericWatchdogEl2IntrNum|59
## PL031 RealTimeClock
gArmPlatformTokenSpaceGuid.PcdPL031RtcBase|0x1C170000
@@ -255,8 +268,10 @@ [Components.common]
!endif
}
+!ifndef DYNAMIC_TABLES_FRAMEWORK
MdeModulePkg/Universal/Acpi/AcpiPlatformDxe/AcpiPlatformDxe.inf
Platform/ARM/VExpressPkg/AcpiTables/AcpiTables.inf
+!endif
ArmPkg/Drivers/ArmGic/ArmGicDxe.inf
ArmPlatformPkg/Drivers/NorFlashDxe/NorFlashDxe.inf
diff --git a/Platform/ARM/VExpressPkg/ArmVExpress-FVP-AArch64.fdf b/Platform/ARM/VExpressPkg/ArmVExpress-FVP-AArch64.fdf
index 305e661a2bdc3ade2c16232c77769df5fc6f0c32..db164be9641cf6e3153023752f60f95909ce803c 100644
--- a/Platform/ARM/VExpressPkg/ArmVExpress-FVP-AArch64.fdf
+++ b/Platform/ARM/VExpressPkg/ArmVExpress-FVP-AArch64.fdf
@@ -1,5 +1,5 @@
#
-# Copyright (c) 2011 - 2015, ARM Limited. All rights reserved.
+# Copyright (c) 2011 - 2018, ARM Limited. All rights reserved.
#
# This program and the accompanying materials
# are licensed and made available under the terms and conditions of the BSD License
@@ -97,9 +97,19 @@ [FV.FvMain]
# ACPI Support
#
- INF MdeModulePkg/Universal/Acpi/AcpiPlatformDxe/AcpiPlatformDxe.inf
INF MdeModulePkg/Universal/Acpi/AcpiTableDxe/AcpiTableDxe.inf
+!ifndef DYNAMIC_TABLES_FRAMEWORK
+ INF MdeModulePkg/Universal/Acpi/AcpiPlatformDxe/AcpiPlatformDxe.inf
INF RuleOverride=ACPITABLE Platform/ARM/VExpressPkg/AcpiTables/AcpiTables.inf
+!else
+ # Configuration Manager
+ INF Platform/ARM/VExpressPkg/ConfigurationManager/ConfigurationManagerDxe/ConfigurationManagerDxe.inf
+
+ #
+ # Dynamic Table fdf
+ #
+ !include DynamicTablesPkg/DynamicTables.fdf.inc
+!endif
#
# Multiple Console IO support
@@ -319,8 +329,10 @@ [Rule.Common.UEFI_APPLICATION.BINARY]
VERSION STRING="$(INF_VERSION)" Optional BUILD_NUM=$(BUILD_NUMBER)
}
+!ifndef DYNAMIC_TABLES_FRAMEWORK
[Rule.Common.USER_DEFINED.ACPITABLE]
FILE FREEFORM = $(NAMED_GUID) {
RAW ACPI |.acpi
RAW ASL |.aml
}
+!endif
diff --git a/Platform/ARM/VExpressPkg/ConfigurationManager/ConfigurationManager.dsc.inc b/Platform/ARM/VExpressPkg/ConfigurationManager/ConfigurationManager.dsc.inc
new file mode 100644
index 0000000000000000000000000000000000000000..8402742ebb0249d8b585d2315e24bba2f5ecf480
--- /dev/null
+++ b/Platform/ARM/VExpressPkg/ConfigurationManager/ConfigurationManager.dsc.inc
@@ -0,0 +1,31 @@
+## @file
+#
+# Copyright (c) 2017, ARM Limited. All rights reserved.
+#
+# This program and the accompanying materials
+# are licensed and made available under the terms and conditions of the BSD License
+# which accompanies this distribution. The full text of the license may be found at
+# http://opensource.org/licenses/bsd-license.php
+#
+# THE PROGRAM IS DISTRIBUTED UNDER THE BSD LICENSE ON AN "AS IS" BASIS,
+# WITHOUT WARRANTIES OR REPRESENTATIONS OF ANY KIND, EITHER EXPRESS OR IMPLIED.
+##
+
+[Defines]
+# [BuildOptions.common.EDKII.DXE_RUNTIME_DRIVER]
+
+[BuildOptions]
+# Required for pre-processing ASL files that include ArmPlatform.h
+ *_*_*_ASLPP_FLAGS = $(PLATFORM_FLAGS)
+
+[LibraryClasses.common]
+
+[Components.common]
+ # Configuration Manager
+ Platform/ARM/VExpressPkg/ConfigurationManager/ConfigurationManagerDxe/ConfigurationManagerDxe.inf {
+ <LibraryClasses>
+ # Platform ASL Tables
+ PlatformAslTablesLib|Platform/ARM/VExpressPkg/ConfigurationManager/PlatformASLTablesLib/PlatformASLTablesLib.inf
+ <BuildOptions>
+ *_*_*_PLATFORM_FLAGS = -I$(BIN_DIR)/Platform/ARM/VExpressPkg/ConfigurationManager/PlatformASLTablesLib/PlatformASLTablesLib/OUTPUT
+ }
diff --git a/Platform/ARM/VExpressPkg/ConfigurationManager/ConfigurationManagerDxe/ConfigurationManager.c b/Platform/ARM/VExpressPkg/ConfigurationManager/ConfigurationManagerDxe/ConfigurationManager.c
new file mode 100644
index 0000000000000000000000000000000000000000..d45528813e2db9f44e1745392dfd35ffe05f1dca
--- /dev/null
+++ b/Platform/ARM/VExpressPkg/ConfigurationManager/ConfigurationManagerDxe/ConfigurationManager.c
@@ -0,0 +1,607 @@
+/** @file
+ Configuration Manager Dxe
+
+ Copyright (c) 2017 - 2018, ARM Limited. All rights reserved.
+
+ This program and the accompanying materials
+ are licensed and made available under the terms and conditions of the BSD License
+ which accompanies this distribution. The full text of the license may be found at
+ http://opensource.org/licenses/bsd-license.php
+
+ THE PROGRAM IS DISTRIBUTED UNDER THE BSD LICENSE ON AN "AS IS" BASIS,
+ WITHOUT WARRANTIES OR REPRESENTATIONS OF ANY KIND, EITHER EXPRESS OR IMPLIED.
+
+ @par Glossary:
+ - Cm or CM - Configuration Manager
+ - Obj or OBJ - Object
+**/
+
+#include <IndustryStandard/DebugPort2Table.h>
+#include <Library/IoLib.h>
+#include <Library/UefiBootServicesTableLib.h>
+#include <Library/ArmLib.h>
+#include <Library/DebugLib.h>
+#include <Library/PcdLib.h>
+#include <Protocol/AcpiTable.h>
+
+#include <ArmPlatform.h>
+#include <AcpiTableGenerator.h>
+#include <Protocol/ConfigurationManagerProtocol.h>
+
+#include "ConfigurationManager.h"
+#include "Platform.h"
+
+// AML Code Include files generated by iASL Compiler
+#include <Dsdt.hex>
+
+/** The platform configuration repository information.
+*/
+STATIC
+EFI_PLATFORM_REPOSITORY_INFO VExpressPlatRepositoryInfo = {
+ /// Configuration Manager information
+ { CONFIGURATION_MANAGER_REVISION, CFG_MGR_OEM_ID },
+
+ // ACPI Table List
+ {
+ // FADT Table
+ {
+ EFI_ACPI_6_2_FIXED_ACPI_DESCRIPTION_TABLE_SIGNATURE,
+ CREATE_STD_ACPI_TABLE_GEN_ID (ESTD_ACPI_TABLE_ID_FADT),
+ NULL
+ },
+ // GTDT Table
+ {
+ EFI_ACPI_6_2_GENERIC_TIMER_DESCRIPTION_TABLE_SIGNATURE,
+ CREATE_STD_ACPI_TABLE_GEN_ID (ESTD_ACPI_TABLE_ID_GTDT),
+ NULL
+ },
+ // MADT Table
+ {
+ EFI_ACPI_6_2_MULTIPLE_APIC_DESCRIPTION_TABLE_SIGNATURE,
+ CREATE_STD_ACPI_TABLE_GEN_ID (ESTD_ACPI_TABLE_ID_MADT),
+ NULL
+ },
+ // SPCR Table
+ {
+ EFI_ACPI_6_2_SERIAL_PORT_CONSOLE_REDIRECTION_TABLE_SIGNATURE,
+ CREATE_STD_ACPI_TABLE_GEN_ID (ESTD_ACPI_TABLE_ID_SPCR),
+ NULL
+ },
+ // DSDT Table
+ {
+ EFI_ACPI_6_2_DIFFERENTIATED_SYSTEM_DESCRIPTION_TABLE_SIGNATURE,
+ CREATE_STD_ACPI_TABLE_GEN_ID (ESTD_ACPI_TABLE_ID_DSDT),
+ (EFI_ACPI_DESCRIPTION_HEADER*)dsdt_AmlCode
+ },
+ // DBG2 Table
+ {
+ EFI_ACPI_6_2_DEBUG_PORT_2_TABLE_SIGNATURE,
+ CREATE_STD_ACPI_TABLE_GEN_ID (ESTD_ACPI_TABLE_ID_DBG2),
+ NULL
+ }
+ },
+
+ // Boot architecture information
+ { EFI_ACPI_6_2_ARM_PSCI_COMPLIANT }, // BootArchFlags
+
+#ifdef HEADLESS_PLATFORM
+ // Fixed feature flag information
+ { EFI_ACPI_6_2_HEADLESS }, // Fixed feature flags
+#endif
+
+ // Power management profile information
+ { EFI_ACPI_6_2_PM_PROFILE_ENTERPRISE_SERVER }, // PowerManagement Profile
+
+ /* GIC CPU Interface information
+ GIC_ENTRY (CPUInterfaceNumber, Mpidr, PmuIrq, VGicIrq, EnergyEfficiency)
+ */
+ {
+ GICC_ENTRY (0, GET_MPID (0, 0), 92, 25, 0),
+ GICC_ENTRY (1, GET_MPID (0, 1), 93, 25, 0),
+ GICC_ENTRY (2, GET_MPID (0, 2), 94, 25, 0),
+ GICC_ENTRY (3, GET_MPID (0, 3), 95, 25, 0),
+
+ GICC_ENTRY (4, GET_MPID (1, 0), 96, 25, 0),
+ GICC_ENTRY (5, GET_MPID (1, 1), 97, 25, 0),
+ GICC_ENTRY (6, GET_MPID (1, 2), 98, 25, 0),
+ GICC_ENTRY (7, GET_MPID (1, 3), 99, 25, 0)
+ },
+
+ // GIC Distributor Info
+ {
+ 0, // UINT32 GicId
+ FixedPcdGet64 (PcdGicDistributorBase), // UINT64 PhysicalBaseAddress
+ 0, // UINT32 SystemVectorBase
+ 3 // UINT8 GicVersion
+ },
+
+ /// GIC Re-Distributor Info
+ {
+ // UINT64 DiscoveryRangeBaseAddress
+ FixedPcdGet64 (PcdGicRedistributorsBase),
+ // UINT32 DiscoveryRangeLength
+ 0x00200000
+ },
+
+ // Generic Timer Info
+ {
+ // The physical base address for the counter control frame
+ FVP_SYSTEM_TIMER_BASE_ADDRESS,
+ // The physical base address for the counter read frame
+ FVP_CNT_READ_BASE_ADDRESS,
+ // The secure PL1 timer interrupt
+ FixedPcdGet32 (PcdArmArchTimerSecIntrNum),
+ // The secure PL1 timer flags
+ FVP_GTDT_GTIMER_FLAGS,
+ // The non-secure PL1 timer interrupt
+ FixedPcdGet32 (PcdArmArchTimerIntrNum),
+ // The non-secure PL1 timer flags
+ FVP_GTDT_GTIMER_FLAGS,
+ // The virtual timer interrupt
+ FixedPcdGet32 (PcdArmArchTimerVirtIntrNum),
+ // The virtual timer flags
+ FVP_GTDT_GTIMER_FLAGS,
+ // The non-secure PL2 timer interrupt
+ FixedPcdGet32 (PcdArmArchTimerHypIntrNum),
+ // The non-secure PL2 timer flags
+ FVP_GTDT_GTIMER_FLAGS
+ },
+
+ // Generic Timer Block Information
+ {
+ {
+ // The physical base address for the GT Block Timer structure
+ FVP_GT_BLOCK_CTL_BASE,
+ // The number of timer frames implemented in the GT Block
+ FVP_TIMER_FRAMES_COUNT,
+ // Reference token for the GT Block timer frame list
+ (CM_OBJECT_TOKEN)((UINT8*)&VExpressPlatRepositoryInfo +
+ OFFSET_OF (EFI_PLATFORM_REPOSITORY_INFO, GTBlock0TimerInfo))
+ }
+ },
+
+ // GT Block Timer Frames
+ {
+ // Frame 0
+ {
+ 0, // UINT8 FrameNumber
+ FVP_GT_BLOCK_FRAME0_CTL_BASE, // UINT64 PhysicalAddressCntBase
+ FVP_GT_BLOCK_FRAME0_CTL_EL0_BASE, // UINT64 PhysicalAddressCntEL0Base
+ FVP_GT_BLOCK_FRAME0_GSIV, // UINT32 PhysicalTimerGSIV
+ FVP_GTX_TIMER_FLAGS, // UINT32 PhysicalTimerFlags
+ 0, // UINT32 VirtualTimerGSIV
+ 0, // UINT32 VirtualTimerFlags
+ FVP_GTX_COMMON_FLAGS // UINT32 CommonFlags
+ },
+ // Frame 1
+ {
+ 1, // UINT8 FrameNumber
+ FVP_GT_BLOCK_FRAME1_CTL_BASE, // UINT64 PhysicalAddressCntBase
+ FVP_GT_BLOCK_FRAME1_CTL_EL0_BASE, // UINT64 PhysicalAddressCntEL0Base
+ FVP_GT_BLOCK_FRAME1_GSIV, // UINT32 PhysicalTimerGSIV
+ FVP_GTX_TIMER_FLAGS, // UINT32 PhysicalTimerFlags
+ 0, // UINT32 VirtualTimerGSIV
+ 0, // UINT32 VirtualTimerFlags
+ FVP_GTX_COMMON_FLAGS // UINT32 CommonFlags
+ },
+ },
+
+ // Watchdog Info
+ {
+ // The physical base address of the SBSA Watchdog control frame
+ FixedPcdGet64 (PcdGenericWatchdogControlBase),
+ // The physical base address of the SBSA Watchdog refresh frame
+ FixedPcdGet64 (PcdGenericWatchdogRefreshBase),
+ // The watchdog interrupt
+ FixedPcdGet32 (PcdGenericWatchdogEl2IntrNum),
+ // The watchdog flags
+ FVP_SBSA_WATCHDOG_FLAGS
+ },
+
+ // SPCR Serial Port
+ {
+ FixedPcdGet64 (PcdSerialRegisterBase), // UINT64 BaseAddress
+ FixedPcdGet32 (PL011UartInterrupt), // UINT32 Interrupt
+ FixedPcdGet64 (PcdUartDefaultBaudRate), // UINT64 BaudRate
+ FixedPcdGet32 (PL011UartClkInHz), // UINT32 Clock
+ EFI_ACPI_DBG2_PORT_SUBTYPE_SERIAL_ARM_PL011_UART // UINT16 Port subtype
+ },
+ // Debug Serial Port
+ {
+ FixedPcdGet64 (PcdSerialDbgRegisterBase), // UINT64 BaseAddress
+ 38, // UINT32 Interrupt
+ FixedPcdGet64 (PcdSerialDbgUartBaudRate), // UINT64 BaudRate
+ FixedPcdGet32 (PcdSerialDbgUartClkInHz), // UINT32 Clock
+ EFI_ACPI_DBG2_PORT_SUBTYPE_SERIAL_ARM_PL011_UART // UINT16 Port subtype
+ },
+
+ // GIC ITS
+ {
+ // The GIC ITS ID.
+ 0,
+ // The physical address for the Interrupt Translation Service
+ 0x2f020000
+ }
+};
+
+/** Initialize the platform configuration repository.
+
+ @param [in] This Pointer to the Configuration Manager Protocol.
+
+ @retval
+ EFI_SUCCESS Success
+*/
+STATIC
+EFI_STATUS
+EFIAPI
+InitializePlatformRepository (
+ IN CONST EFI_CONFIGURATION_MANAGER_PROTOCOL * CONST This
+ )
+{
+ return EFI_SUCCESS;
+}
+
+/** Return a GT Block timer frame info list.
+
+ @param [in] This Pointer to the Configuration Manager Protocol.
+ @param [in] CmObjectId The Configuration Manager Object ID.
+ @param [in] Token A token for identifying the object
+ @param [out] CmObject Pointer to the Configuration Manager Object
+ descriptor describing the requested Object.
+
+ @retval EFI_SUCCESS Success.
+ @retval EFI_INVALID_PARAMETER A parameter is invalid.
+ @retval EFI_NOT_FOUND The required object information is not found.
+*/
+EFI_STATUS
+EFIAPI
+GetGTBlockTimerFrameInfo (
+ IN CONST EFI_CONFIGURATION_MANAGER_PROTOCOL * CONST This,
+ IN CONST CM_OBJECT_ID CmObjectId,
+ IN CONST CM_OBJECT_TOKEN Token,
+ IN OUT CM_OBJ_DESCRIPTOR * CONST CmObject
+ )
+{
+ EFI_PLATFORM_REPOSITORY_INFO * PlatformRepo;
+
+ if ((This == NULL) || (CmObject == NULL)) {
+ ASSERT (This != NULL);
+ ASSERT (CmObject != NULL);
+ return EFI_INVALID_PARAMETER;
+ }
+
+ PlatformRepo = This->PlatRepoInfo;
+
+ if (Token != (CM_OBJECT_TOKEN)&PlatformRepo->GTBlock0TimerInfo) {
+ return EFI_NOT_FOUND;
+ }
+
+ CmObject->Size = sizeof (PlatformRepo->GTBlock0TimerInfo);
+ CmObject->Data = (VOID*)&PlatformRepo->GTBlock0TimerInfo;
+ return EFI_SUCCESS;
+}
+
+/** Return a standard namespace object.
+
+ @param [in] This Pointer to the Configuration Manager Protocol.
+ @param [in] CmObjectId The Configuration Manager Object ID.
+ @param [in] Token An optional token identifying the object. If
+ unused this must be CM_NULL_TOKEN.
+ @param [out] CmObject Pointer to the Configuration Manager Object
+ descriptor describing the requested Object.
+
+ @retval EFI_SUCCESS Success.
+ @retval EFI_INVALID_PARAMETER A parameter is invalid.
+ @retval EFI_NOT_FOUND The required object information is not found.
+*/
+EFI_STATUS
+EFIAPI
+GetStandardNameSpaceObject (
+ IN CONST EFI_CONFIGURATION_MANAGER_PROTOCOL * CONST This,
+ IN CONST CM_OBJECT_ID CmObjectId,
+ IN CONST CM_OBJECT_TOKEN Token OPTIONAL,
+ IN OUT CM_OBJ_DESCRIPTOR * CONST CmObject
+ )
+{
+ EFI_STATUS Status = EFI_SUCCESS;
+ EFI_PLATFORM_REPOSITORY_INFO * PlatformRepo;
+
+ if ((This == NULL) || (CmObject == NULL)) {
+ ASSERT (This != NULL);
+ ASSERT (CmObject != NULL);
+ return EFI_INVALID_PARAMETER;
+ }
+ PlatformRepo = This->PlatRepoInfo;
+
+ switch (GET_CM_OBJECT_ID (CmObjectId)) {
+ HANDLE_CM_OBJECT (EStdObjCfgMgrInfo, PlatformRepo->CmInfo);
+ HANDLE_CM_OBJECT (EStdObjAcpiTableList, PlatformRepo->CmAcpiTableList);
+ default: {
+ Status = EFI_NOT_FOUND;
+ DEBUG ((
+ DEBUG_ERROR,
+ "ERROR: Object 0x%x. Status = %r\n",
+ CmObjectId,
+ Status
+ ));
+ break;
+ }
+ }
+
+ return Status;
+}
+
+/** Return an ARM namespace object.
+
+ @param [in] This Pointer to the Configuration Manager Protocol.
+ @param [in] CmObjectId The Configuration Manager Object ID.
+ @param [in] Token An optional token identifying the object. If
+ unused this must be CM_NULL_TOKEN.
+ @param [out] CmObject Pointer to the Configuration Manager Object
+ descriptor describing the requested Object.
+
+ @retval EFI_SUCCESS Success.
+ @retval EFI_INVALID_PARAMETER A parameter is invalid.
+ @retval EFI_NOT_FOUND The required object information is not found.
+*/
+EFI_STATUS
+EFIAPI
+GetArmNameSpaceObject (
+ IN CONST EFI_CONFIGURATION_MANAGER_PROTOCOL * CONST This,
+ IN CONST CM_OBJECT_ID CmObjectId,
+ IN CONST CM_OBJECT_TOKEN Token OPTIONAL,
+ IN OUT CM_OBJ_DESCRIPTOR * CONST CmObject
+ )
+{
+ EFI_STATUS Status = EFI_SUCCESS;
+ EFI_PLATFORM_REPOSITORY_INFO * PlatformRepo;
+
+ if ((This == NULL) || (CmObject == NULL)) {
+ ASSERT (This != NULL);
+ ASSERT (CmObject != NULL);
+ return EFI_INVALID_PARAMETER;
+ }
+ PlatformRepo = This->PlatRepoInfo;
+
+ switch (GET_CM_OBJECT_ID (CmObjectId)) {
+ HANDLE_CM_OBJECT (EArmObjBootArchInfo, PlatformRepo->BootArchInfo);
+#ifdef HEADLESS_PLATFORM
+ HANDLE_CM_OBJECT (
+ EArmObjFixedFeatureFlags,
+ PlatformRepo->FixedFeatureFlags
+ );
+#endif
+ HANDLE_CM_OBJECT (
+ EArmObjPowerManagementProfileInfo,
+ PlatformRepo->PmProfileInfo
+ );
+ HANDLE_CM_OBJECT (EArmObjGenericTimerInfo, PlatformRepo->GenericTimerInfo);
+ HANDLE_CM_OBJECT (
+ EArmObjPlatformGenericWatchdogInfo,
+ PlatformRepo->Watchdog
+ );
+ HANDLE_CM_OBJECT (EArmObjPlatformGTBlockInfo, PlatformRepo->GTBlockInfo);
+ HANDLE_CM_OBJECT_REF_BY_TOKEN (
+ EArmObjGTBlockTimerFrameInfo,
+ PlatformRepo->GTBlock0TimerInfo,
+ Token,
+ GetGTBlockTimerFrameInfo
+ );
+ HANDLE_CM_OBJECT (EArmObjGicCInfo, PlatformRepo->GicCInfo);
+ HANDLE_CM_OBJECT (EArmObjGicDInfo, PlatformRepo->GicDInfo);
+ HANDLE_CM_OBJECT (EArmObjGicRedistributorInfo, PlatformRepo->GicRedistInfo);
+ HANDLE_CM_OBJECT (
+ EArmObjSerialConsolePortInfo,
+ PlatformRepo->SpcrSerialPort
+ );
+ HANDLE_CM_OBJECT (EArmObjSerialDebugPortInfo, PlatformRepo->DbgSerialPort);
+ HANDLE_CM_OBJECT (EArmObjGicItsInfo, PlatformRepo->GicItsInfo);
+
+ default: {
+ Status = EFI_NOT_FOUND;
+ DEBUG ((
+ DEBUG_INFO,
+ "INFO: Object 0x%x. Status = %r\n",
+ CmObjectId,
+ Status
+ ));
+ break;
+ }
+ }//switch
+
+ return Status;
+}
+
+/** Return an OEM namespace object.
+
+ @param [in] This Pointer to the Configuration Manager Protocol.
+ @param [in] CmObjectId The Configuration Manager Object ID.
+ @param [in] Token An optional token identifying the object. If
+ unused this must be CM_NULL_TOKEN.
+ @param [out] CmObject Pointer to the Configuration Manager Object
+ descriptor describing the requested Object.
+
+ @retval EFI_SUCCESS Success.
+ @retval EFI_INVALID_PARAMETER A parameter is invalid.
+ @retval EFI_NOT_FOUND The required object information is not found.
+ @retval EFI_BAD_BUFFER_SIZE The size returned by the Configuration Manager
+ is less than the Object size for the requested
+ object.
+*/
+EFI_STATUS
+EFIAPI
+GetOemNameSpaceObject (
+ IN CONST EFI_CONFIGURATION_MANAGER_PROTOCOL * CONST This,
+ IN CONST CM_OBJECT_ID CmObjectId,
+ IN CONST CM_OBJECT_TOKEN Token OPTIONAL,
+ IN OUT CM_OBJ_DESCRIPTOR * CONST CmObject
+ )
+{
+ EFI_STATUS Status = EFI_SUCCESS;
+
+ if ((This == NULL) || (CmObject == NULL)) {
+ ASSERT (This != NULL);
+ ASSERT (CmObject != NULL);
+ return EFI_INVALID_PARAMETER;
+ }
+
+ switch (GET_CM_OBJECT_ID (CmObjectId)) {
+ default: {
+ Status = EFI_NOT_FOUND;
+ DEBUG ((
+ DEBUG_ERROR,
+ "ERROR: Object 0x%x. Status = %r\n",
+ CmObjectId,
+ Status
+ ));
+ break;
+ }
+ }
+
+ return Status;
+}
+
+/** The GetObject function defines the interface implemented by the
+ Configuration Manager Protocol for returning the Configuration
+ Manager Objects.
+
+ @param [in] This Pointer to the Configuration Manager Protocol.
+ @param [in] CmObjectId The Configuration Manager Object ID.
+ @param [in] Token An optional token identifying the object. If
+ unused this must be CM_NULL_TOKEN.
+ @param [out] CmObject Pointer to the Configuration Manager Object
+ descriptor describing the requested Object.
+
+ @retval EFI_SUCCESS Success.
+ @retval EFI_INVALID_PARAMETER A parameter is invalid.
+ @retval EFI_NOT_FOUND The required object information is not found.
+*/
+EFI_STATUS
+EFIAPI
+ArmVExpressPlatformGetObject (
+ IN CONST EFI_CONFIGURATION_MANAGER_PROTOCOL * CONST This,
+ IN CONST CM_OBJECT_ID CmObjectId,
+ IN CONST CM_OBJECT_TOKEN Token OPTIONAL,
+ IN OUT CM_OBJ_DESCRIPTOR * CONST CmObject
+ )
+{
+ EFI_STATUS Status;
+
+ if ((This == NULL) || (CmObject == NULL)) {
+ ASSERT (This != NULL);
+ ASSERT (CmObject != NULL);
+ return EFI_INVALID_PARAMETER;
+ }
+
+ switch (GET_CM_NAMESPACE_ID (CmObjectId)) {
+ case EObjNameSpaceStandard:
+ Status = GetStandardNameSpaceObject (This, CmObjectId, Token, CmObject);
+ break;
+ case EObjNameSpaceArm:
+ Status = GetArmNameSpaceObject (This, CmObjectId, Token, CmObject);
+ break;
+ case EObjNameSpaceOem:
+ Status = GetOemNameSpaceObject (This, CmObjectId, Token, CmObject);
+ break;
+ default: {
+ Status = EFI_INVALID_PARAMETER;
+ DEBUG ((
+ DEBUG_ERROR,
+ "ERROR: Unknown Namespace Object = 0x%x. Status = %r\n",
+ CmObjectId,
+ Status
+ ));
+ break;
+ }
+ }
+
+ return Status;
+}
+
+/** The SetObject function defines the interface implemented by the
+ Configuration Manager Protocol for updating the Configuration
+ Manager Objects.
+
+ @param [in] This Pointer to the Configuration Manager Protocol.
+ @param [in] CmObjectId The Configuration Manager Object ID.
+ @param [in] Token An optional token identifying the object. If
+ unused this must be CM_NULL_TOKEN.
+ @param [out] CmObject Pointer to the Configuration Manager Object
+ descriptor describing the Object.
+
+ @retval EFI_UNSUPPORTED This operation is not supported.
+*/
+EFI_STATUS
+EFIAPI
+ArmVExpressPlatformSetObject (
+ IN CONST EFI_CONFIGURATION_MANAGER_PROTOCOL * CONST This,
+ IN CONST CM_OBJECT_ID CmObjectId,
+ IN CONST CM_OBJECT_TOKEN Token OPTIONAL,
+ IN CM_OBJ_DESCRIPTOR * CONST CmObject
+ )
+{
+ return EFI_UNSUPPORTED;
+}
+
+/** A structure describing the configuration manager protocol interface.
+*/
+STATIC
+CONST
+EFI_CONFIGURATION_MANAGER_PROTOCOL VExpressPlatformConfigManagerProtocol = {
+ CREATE_REVISION(1,0),
+ ArmVExpressPlatformGetObject,
+ ArmVExpressPlatformSetObject,
+ &VExpressPlatRepositoryInfo
+};
+
+/**
+ Entrypoint of Configuration Manager Dxe.
+
+ @param ImageHandle
+ @param SystemTable
+
+ @return EFI_SUCCESS
+ @return EFI_LOAD_ERROR
+ @return EFI_OUT_OF_RESOURCES
+
+**/
+EFI_STATUS
+EFIAPI
+ConfigurationManagerDxeInitialize (
+ IN EFI_HANDLE ImageHandle,
+ IN EFI_SYSTEM_TABLE * SystemTable
+ )
+{
+ EFI_STATUS Status;
+
+ Status = gBS->InstallProtocolInterface (
+ &ImageHandle,
+ &gEfiConfigurationManagerProtocolGuid,
+ EFI_NATIVE_INTERFACE,
+ (VOID*)&VExpressPlatformConfigManagerProtocol
+ );
+ if (EFI_ERROR (Status)) {
+ DEBUG ((
+ DEBUG_ERROR,
+ "ERROR: Failed to get Install Configuration Manager Protocol." \
+ " Status = %r\n",
+ Status
+ ));
+ goto error_handler;
+ }
+
+ Status = InitializePlatformRepository (
+ &VExpressPlatformConfigManagerProtocol
+ );
+ if (EFI_ERROR (Status)) {
+ DEBUG ((
+ DEBUG_ERROR,
+ "ERROR: Failed to initialize the Platform Configuration Repository." \
+ " Status = %r\n",
+ Status
+ ));
+ }
+
+error_handler:
+ return Status;
+}
diff --git a/Platform/ARM/VExpressPkg/ConfigurationManager/ConfigurationManagerDxe/ConfigurationManager.h b/Platform/ARM/VExpressPkg/ConfigurationManager/ConfigurationManagerDxe/ConfigurationManager.h
new file mode 100644
index 0000000000000000000000000000000000000000..2d852b2d0466e5a87c0b2c33b6041faab47cbea7
--- /dev/null
+++ b/Platform/ARM/VExpressPkg/ConfigurationManager/ConfigurationManagerDxe/ConfigurationManager.h
@@ -0,0 +1,172 @@
+/** @file
+
+ Copyright (c) 2017 - 2018, ARM Limited. All rights reserved.
+
+ This program and the accompanying materials
+ are licensed and made available under the terms and conditions of the BSD License
+ which accompanies this distribution. The full text of the license may be found at
+ http://opensource.org/licenses/bsd-license.php
+
+ THE PROGRAM IS DISTRIBUTED UNDER THE BSD LICENSE ON AN "AS IS" BASIS,
+ WITHOUT WARRANTIES OR REPRESENTATIONS OF ANY KIND, EITHER EXPRESS OR IMPLIED.
+
+ @par Glossary:
+ - Cm or CM - Configuration Manager
+ - Obj or OBJ - Object
+**/
+
+#ifndef CONFIGURATION_MANAGER_H__
+#define CONFIGURATION_MANAGER_H__
+
+/** The configuration manager version.
+*/
+#define CONFIGURATION_MANAGER_REVISION CREATE_REVISION (1, 0)
+
+/** The OEM ID
+*/
+#define CFG_MGR_OEM_ID { 'A', 'R', 'M', 'L', 'T', 'D' }
+
+/** A helper macro for populating the GIC CPU information
+*/
+#define GICC_ENTRY( \
+ CPUInterfaceNumber, \
+ Mpidr, \
+ PmuIrq, \
+ VGicIrq, \
+ EnergyEfficiency \
+ ) { \
+ CPUInterfaceNumber, /* UINT32 CPUInterfaceNumber */ \
+ CPUInterfaceNumber, /* UINT32 AcpiProcessorUid */ \
+ EFI_ACPI_6_2_GIC_ENABLED, /* UINT32 Flags */ \
+ 0, /* UINT32 ParkingProtocolVersion */ \
+ PmuIrq, /* UINT32 PerformanceInterruptGsiv */ \
+ 0, /* UINT64 ParkedAddress */ \
+ FixedPcdGet64 ( \
+ PcdGicInterruptInterfaceBase \
+ ), /* UINT64 PhysicalBaseAddress */ \
+ 0, /* UINT64 GICV */ \
+ 0, /* UINT64 GICH */ \
+ VGicIrq, /* UINT32 VGICMaintenanceInterrupt */ \
+ 0, /* UINT64 GICRBaseAddress */ \
+ Mpidr, /* UINT64 MPIDR */ \
+ EnergyEfficiency /* UINT8 ProcessorPowerEfficiencyClass*/ \
+ }
+
+/** A helper macro for returning configuration manager objects
+*/
+#define HANDLE_CM_OBJECT(CmObjectId, Object) \
+ case CmObjectId: { \
+ CmObject->Size = sizeof (Object); \
+ CmObject->Data = (VOID*)&Object; \
+ DEBUG (( \
+ DEBUG_INFO, \
+ #CmObjectId ": Ptr = 0x%p, Size = %d\n", \
+ CmObject->Data, \
+ CmObject->Size \
+ )); \
+ break; \
+ }
+
+/** A helper macro for returning configuration manager objects
+ referenced by token
+*/
+#define HANDLE_CM_OBJECT_REF_BY_TOKEN( \
+ CmObjectId, \
+ Object, \
+ Token, \
+ HandlerProc \
+ ) \
+ case CmObjectId: { \
+ if (Token == CM_NULL_TOKEN) { \
+ CmObject->Size = sizeof (Object); \
+ CmObject->Data = (VOID*)&Object; \
+ DEBUG (( \
+ DEBUG_INFO, \
+ #CmObjectId ": Ptr = 0x%p, Size = %d\n", \
+ CmObject->Data, \
+ CmObject->Size \
+ )); \
+ } else { \
+ Status = HandlerProc (This, CmObjectId, Token, CmObject); \
+ DEBUG (( \
+ DEBUG_INFO, \
+ #CmObjectId ": Token = 0x%p, Ptr = 0x%p, Size = %d\n", \
+ (VOID*)Token, \
+ CmObject->Data, \
+ CmObject->Size \
+ )); \
+ } \
+ break; \
+ }
+
+/** The number of CPUs
+*/
+#define PLAT_CPU_COUNT 8
+
+/** The number of ACPI tables to install
+*/
+#define PLAT_ACPI_TABLE_COUNT 6
+
+/** The number of platform generic timer blocks
+*/
+#define PLAT_GTBLOCK_COUNT 1
+
+/** The number of timer frames per generic timer block
+*/
+#define PLAT_GTFRAME_COUNT 2
+
+/** A structure describing the platform configuration
+ manager repository information
+*/
+typedef struct PlatformRepositoryInfo {
+ /// Configuration Manager Information
+ CM_STD_OBJ_CONFIGURATION_MANAGER_INFO CmInfo;
+
+ /// List of ACPI tables
+ CM_STD_OBJ_ACPI_TABLE_INFO CmAcpiTableList[PLAT_ACPI_TABLE_COUNT];
+
+ /// Boot architecture information
+ CM_ARM_BOOT_ARCH_INFO BootArchInfo;
+
+#ifdef HEADLESS_PLATFORM
+ /// Fixed feature flag information
+ CM_ARM_FIXED_FEATURE_FLAGS FixedFeatureFlags;
+#endif
+
+ /// Power management profile information
+ CM_ARM_POWER_MANAGEMENT_PROFILE_INFO PmProfileInfo;
+
+ /// GIC CPU interface information
+ CM_ARM_GICC_INFO GicCInfo[PLAT_CPU_COUNT];
+
+ /// GIC distributor information
+ CM_ARM_GICD_INFO GicDInfo;
+
+ /// GIC Redistributor information
+ CM_ARM_GIC_REDIST_INFO GicRedistInfo;
+
+ /// Generic timer information
+ CM_ARM_GENERIC_TIMER_INFO GenericTimerInfo;
+
+ /// Generic timer block information
+ CM_ARM_GTBLOCK_INFO GTBlockInfo[PLAT_GTBLOCK_COUNT];
+
+ /// Generic timer frame information
+ CM_ARM_GTBLOCK_TIMER_FRAME_INFO GTBlock0TimerInfo[PLAT_GTFRAME_COUNT];
+
+ /// Watchdog information
+ CM_ARM_GENERIC_WATCHDOG_INFO Watchdog;
+
+ /** Serial port information for the
+ serial port console redirection port
+ */
+ CM_ARM_SERIAL_PORT_INFO SpcrSerialPort;
+
+ /// Serial port information for the DBG2 UART port
+ CM_ARM_SERIAL_PORT_INFO DbgSerialPort;
+
+ /// GIC ITS information
+ CM_ARM_GIC_ITS_INFO GicItsInfo;
+} EFI_PLATFORM_REPOSITORY_INFO;
+
+#endif // CONFIGURATION_MANAGER_H__
diff --git a/Platform/ARM/VExpressPkg/ConfigurationManager/ConfigurationManagerDxe/ConfigurationManagerDxe.inf b/Platform/ARM/VExpressPkg/ConfigurationManager/ConfigurationManagerDxe/ConfigurationManagerDxe.inf
new file mode 100644
index 0000000000000000000000000000000000000000..ff61763f661289e2f86911b5f68576ac657a400c
--- /dev/null
+++ b/Platform/ARM/VExpressPkg/ConfigurationManager/ConfigurationManagerDxe/ConfigurationManagerDxe.inf
@@ -0,0 +1,78 @@
+## @file
+#
+# Copyright (c) 2017 - 2018, ARM Limited. All rights reserved.
+#
+# This program and the accompanying materials
+# are licensed and made available under the terms and conditions of the BSD License
+# which accompanies this distribution. The full text of the license may be found at
+# http://opensource.org/licenses/bsd-license.php
+#
+# THE PROGRAM IS DISTRIBUTED UNDER THE BSD LICENSE ON AN "AS IS" BASIS,
+# WITHOUT WARRANTIES OR REPRESENTATIONS OF ANY KIND, EITHER EXPRESS OR IMPLIED.
+##
+
+[Defines]
+ INF_VERSION = 0x00010019
+ BASE_NAME = ConfigurationManagerDxe
+ FILE_GUID = 29F45677-1920-4454-94A6-CF119C9491DB
+ MODULE_TYPE = DXE_DRIVER
+ VERSION_STRING = 1.0
+ ENTRY_POINT = ConfigurationManagerDxeInitialize
+
+#
+# The following information is for reference only and not required by the build tools.
+#
+# VALID_ARCHITECTURES = ARM AARCH64
+#
+
+[Sources]
+ ConfigurationManager.c
+
+[Packages]
+ ArmPkg/ArmPkg.dec
+ ArmPlatformPkg/ArmPlatformPkg.dec
+ DynamicTablesPkg/DynamicTablesPkg.dec
+ MdePkg/MdePkg.dec
+ MdeModulePkg/MdeModulePkg.dec
+ Platform/ARM/VExpressPkg/ArmVExpressPkg.dec
+
+[LibraryClasses]
+ ArmPlatformLib
+ PlatformAslTablesLib
+ PrintLib
+ UefiBootServicesTableLib
+ UefiDriverEntryPoint
+ UefiRuntimeServicesTableLib
+
+[Protocols]
+ gEfiConfigurationManagerProtocolGuid
+
+[FixedPcd]
+ gArmTokenSpaceGuid.PcdArmArchTimerSecIntrNum
+ gArmTokenSpaceGuid.PcdArmArchTimerIntrNum
+ gArmTokenSpaceGuid.PcdArmArchTimerVirtIntrNum
+ gArmTokenSpaceGuid.PcdArmArchTimerHypIntrNum
+
+ gArmTokenSpaceGuid.PcdGicDistributorBase
+ gArmTokenSpaceGuid.PcdGicInterruptInterfaceBase
+ gArmTokenSpaceGuid.PcdGicRedistributorsBase
+
+ gEfiMdeModulePkgTokenSpaceGuid.PcdSerialRegisterBase
+ gEfiMdePkgTokenSpaceGuid.PcdUartDefaultBaudRate
+ gArmPlatformTokenSpaceGuid.PL011UartClkInHz
+ gArmPlatformTokenSpaceGuid.PL011UartInterrupt
+
+ ## PL011 Serial Debug UART
+ gArmPlatformTokenSpaceGuid.PcdSerialDbgRegisterBase
+ gArmPlatformTokenSpaceGuid.PcdSerialDbgUartBaudRate
+ gArmPlatformTokenSpaceGuid.PcdSerialDbgUartClkInHz
+
+ # SBSA Generic Watchdog
+ gArmTokenSpaceGuid.PcdGenericWatchdogControlBase
+ gArmTokenSpaceGuid.PcdGenericWatchdogRefreshBase
+ gArmTokenSpaceGuid.PcdGenericWatchdogEl2IntrNum
+
+[Pcd]
+
+[Depex]
+ TRUE
diff --git a/Platform/ARM/VExpressPkg/ConfigurationManager/ConfigurationManagerDxe/Platform.h b/Platform/ARM/VExpressPkg/ConfigurationManager/ConfigurationManagerDxe/Platform.h
new file mode 100644
index 0000000000000000000000000000000000000000..8ba32717704af8cc65d23e93affcc2922add0346
--- /dev/null
+++ b/Platform/ARM/VExpressPkg/ConfigurationManager/ConfigurationManagerDxe/Platform.h
@@ -0,0 +1,91 @@
+/** @file
+
+ Copyright (c) 2017, ARM Limited. All rights reserved.
+
+ This program and the accompanying materials
+ are licensed and made available under the terms and conditions of the BSD License
+ which accompanies this distribution. The full text of the license may be found at
+ http://opensource.org/licenses/bsd-license.php
+
+ THE PROGRAM IS DISTRIBUTED UNDER THE BSD LICENSE ON AN "AS IS" BASIS,
+ WITHOUT WARRANTIES OR REPRESENTATIONS OF ANY KIND, EITHER EXPRESS OR IMPLIED.
+
+**/
+
+#ifndef PLATFORM_H__
+#define PLATFORM_H__
+
+#define ENABLE_MEM_MAPPED_TIMER
+
+#ifdef ENABLE_MEM_MAPPED_TIMER
+#define FVP_SYSTEM_TIMER_BASE_ADDRESS 0x2A430000
+#define FVP_CNT_READ_BASE_ADDRESS 0x2A800000
+#else
+#define FVP_SYSTEM_TIMER_BASE_ADDRESS 0xFFFFFFFFFFFFFFFF
+#define FVP_CNT_READ_BASE_ADDRESS 0xFFFFFFFFFFFFFFFF
+#endif
+
+// GT Block Timer
+#define FVP_GT_BLOCK_CTL_BASE 0x2A810000
+#define FVP_TIMER_FRAMES_COUNT 2
+
+// GT Block Timer Frames
+#define FVP_GT_BLOCK_FRAME0_CTL_BASE 0x2A820000
+#define FVP_GT_BLOCK_FRAME0_CTL_EL0_BASE 0xFFFFFFFFFFFFFFFF
+#define FVP_GT_BLOCK_FRAME0_GSIV 57
+
+#define FVP_GT_BLOCK_FRAME1_CTL_BASE 0x2A830000
+#define FVP_GT_BLOCK_FRAME1_CTL_EL0_BASE 0xFFFFFFFFFFFFFFFF
+#define FVP_GT_BLOCK_FRAME1_GSIV 58
+
+#define GTDT_TIMER_EDGE_TRIGGERED \
+ EFI_ACPI_6_2_GTDT_TIMER_FLAG_TIMER_INTERRUPT_MODE
+#define GTDT_TIMER_LEVEL_TRIGGERED 0
+#define GTDT_TIMER_ACTIVE_LOW \
+ EFI_ACPI_6_2_GTDT_TIMER_FLAG_TIMER_INTERRUPT_POLARITY
+#define GTDT_TIMER_ACTIVE_HIGH 0
+#define GTDT_TIMER_SAVE_CONTEXT \
+ EFI_ACPI_6_2_GTDT_TIMER_FLAG_ALWAYS_ON_CAPABILITY
+#define GTDT_TIMER_LOSE_CONTEXT 0
+
+#define FVP_GTDT_GTIMER_FLAGS (GTDT_TIMER_LOSE_CONTEXT | \
+ GTDT_TIMER_ACTIVE_LOW | \
+ GTDT_TIMER_LEVEL_TRIGGERED)
+
+// GT Block Timer Flags
+#define GTX_TIMER_EDGE_TRIGGERED \
+ EFI_ACPI_6_2_GTDT_GT_BLOCK_TIMER_FLAG_TIMER_INTERRUPT_MODE
+#define GTX_TIMER_LEVEL_TRIGGERED 0
+#define GTX_TIMER_ACTIVE_LOW \
+ EFI_ACPI_6_2_GTDT_GT_BLOCK_TIMER_FLAG_TIMER_INTERRUPT_POLARITY
+#define GTX_TIMER_ACTIVE_HIGH 0
+
+#define FVP_GTX_TIMER_FLAGS (GTX_TIMER_ACTIVE_HIGH | \
+ GTX_TIMER_LEVEL_TRIGGERED)
+
+#define GTX_TIMER_SECURE \
+ EFI_ACPI_6_2_GTDT_GT_BLOCK_COMMON_FLAG_SECURE_TIMER
+#define GTX_TIMER_NON_SECURE 0
+#define GTX_TIMER_SAVE_CONTEXT \
+ EFI_ACPI_6_2_GTDT_GT_BLOCK_COMMON_FLAG_ALWAYS_ON_CAPABILITY
+#define GTX_TIMER_LOSE_CONTEXT 0
+
+#define FVP_GTX_COMMON_FLAGS (GTX_TIMER_SAVE_CONTEXT | GTX_TIMER_SECURE)
+
+// Watchdog
+#define SBSA_WATCHDOG_EDGE_TRIGGERED \
+ EFI_ACPI_6_2_GTDT_SBSA_GENERIC_WATCHDOG_FLAG_TIMER_INTERRUPT_MODE
+#define SBSA_WATCHDOG_LEVEL_TRIGGERED 0
+#define SBSA_WATCHDOG_ACTIVE_LOW \
+ EFI_ACPI_6_2_GTDT_SBSA_GENERIC_WATCHDOG_FLAG_TIMER_INTERRUPT_POLARITY
+#define SBSA_WATCHDOG_ACTIVE_HIGH 0
+#define SBSA_WATCHDOG_SECURE \
+ EFI_ACPI_6_2_GTDT_SBSA_GENERIC_WATCHDOG_FLAG_SECURE_TIMER
+#define SBSA_WATCHDOG_NON_SECURE 0
+
+#define FVP_SBSA_WATCHDOG_FLAGS (SBSA_WATCHDOG_NON_SECURE | \
+ SBSA_WATCHDOG_ACTIVE_HIGH | \
+ SBSA_WATCHDOG_LEVEL_TRIGGERED)
+
+#endif // PLATFORM_H__
+
diff --git a/Platform/ARM/VExpressPkg/ConfigurationManager/PlatformASLTablesLib/Dsdt.asl b/Platform/ARM/VExpressPkg/ConfigurationManager/PlatformASLTablesLib/Dsdt.asl
new file mode 100644
index 0000000000000000000000000000000000000000..15ce7c020045d42f08cf92ad76644b07f0a1e25e
--- /dev/null
+++ b/Platform/ARM/VExpressPkg/ConfigurationManager/PlatformASLTablesLib/Dsdt.asl
@@ -0,0 +1,77 @@
+/** @file
+ Differentiated System Description Table Fields (DSDT)
+
+ Copyright (c) 2014-2017, ARM Ltd. All rights reserved.<BR>
+ This program and the accompanying materials
+ are licensed and made available under the terms and conditions of the BSD License
+ which accompanies this distribution. The full text of the license may be found at
+ http://opensource.org/licenses/bsd-license.php
+
+ THE PROGRAM IS DISTRIBUTED UNDER THE BSD LICENSE ON AN "AS IS" BASIS,
+ WITHOUT WARRANTIES OR REPRESENTATIONS OF ANY KIND, EITHER EXPRESS OR IMPLIED.
+
+**/
+
+DefinitionBlock("DsdtTable.aml", "DSDT", 1, "ARMLTD", "ARM-VEXPRESS", 1) {
+ Scope(_SB) {
+ //
+ // Processor
+ //
+ Device(CPU0) {
+ Name(_HID, "ACPI0007")
+ Name(_UID, Zero)
+ }
+ Device(CPU1) {
+ Name(_HID, "ACPI0007")
+ Name(_UID, One)
+ }
+ Device(CPU2) {
+ Name(_HID, "ACPI0007")
+ Name(_UID, 2)
+ }
+ Device(CPU3) {
+ Name(_HID, "ACPI0007")
+ Name(_UID, 3)
+ }
+ Device(CPU4) {
+ Name(_HID, "ACPI0007")
+ Name(_UID, 4)
+ }
+ Device(CPU5) {
+ Name(_HID, "ACPI0007")
+ Name(_UID, 5)
+ }
+ Device(CPU6) {
+ Name(_HID, "ACPI0007")
+ Name(_UID, 6)
+ }
+ Device(CPU7) {
+ Name(_HID, "ACPI0007")
+ Name(_UID, 7)
+ }
+
+ // UART PL011
+ Device(COM2) {
+ Name(_HID, "ARMH0011")
+ Name(_CID, "PL011")
+ Name(_UID, Zero)
+
+ Method(_STA) {
+ Return(0xF)
+ }
+
+ Method(_CRS, 0x0, NotSerialized) {
+ Name(RBUF, ResourceTemplate() {
+ // UART1
+ Memory32Fixed(ReadWrite, 0x1c090000, 0x1000)
+ Interrupt(ResourceConsumer, Level, ActiveHigh, Exclusive) { 0x25 }
+ // UART3
+ // Memory32Fixed(ReadWrite, 0x1c0B0000, 0x1000)
+ // Interrupt(ResourceConsumer, Level, ActiveHigh, Exclusive) { 0x27 }
+ })
+ Return (RBUF)
+ }
+ }
+
+ } // Scope(_SB)
+}
diff --git a/Platform/ARM/VExpressPkg/ConfigurationManager/PlatformASLTablesLib/PlatformASLTablesLib.inf b/Platform/ARM/VExpressPkg/ConfigurationManager/PlatformASLTablesLib/PlatformASLTablesLib.inf
new file mode 100644
index 0000000000000000000000000000000000000000..28426e18f32dc25af6faf51826e11d5e09fe105d
--- /dev/null
+++ b/Platform/ARM/VExpressPkg/ConfigurationManager/PlatformASLTablesLib/PlatformASLTablesLib.inf
@@ -0,0 +1,34 @@
+## @file
+#
+# Copyright (c) 2017 - 2018, ARM Limited. All rights reserved.
+#
+# This program and the accompanying materials
+# are licensed and made available under the terms and conditions of the BSD License
+# which accompanies this distribution. The full text of the license may be found at
+# http://opensource.org/licenses/bsd-license.php
+#
+# THE PROGRAM IS DISTRIBUTED UNDER THE BSD LICENSE ON AN "AS IS" BASIS,
+# WITHOUT WARRANTIES OR REPRESENTATIONS OF ANY KIND, EITHER EXPRESS OR IMPLIED.
+##
+
+[Defines]
+ INF_VERSION = 0x00010019
+ BASE_NAME = PlatformAslTablesLib
+ FILE_GUID = 4000AEAB-C6D3-4F67-ADE3-D4B504FC164B
+ MODULE_TYPE = DXE_DRIVER
+ VERSION_STRING = 1.0
+ LIBRARY_CLASS = PlatformAslTablesLib|DXE_DRIVER
+
+#
+# The following information is for reference only and not required by the build tools.
+#
+# VALID_ARCHITECTURES = ARM AARCH64
+#
+
+[Sources]
+ Dsdt.asl
+
+[Packages]
+ ArmPlatformPkg/ArmPlatformPkg.dec
+ MdePkg/MdePkg.dec
+ Platform/ARM/VExpressPkg/ArmVExpressPkg.dec
--
'Guid(CE165669-3EF3-493F-B85D-6190EE5B9759)'
^ permalink raw reply related [flat|nested] 6+ messages in thread
* Re: [PATCH 1/2][platforms/dynamictables] Platform/ARM: Dynamic Tables support for Juno
2018-03-19 15:21 ` [PATCH 1/2][platforms/dynamictables] Platform/ARM: Dynamic Tables support for Juno Sami Mujawar
@ 2018-03-19 16:13 ` Evan Lloyd
0 siblings, 0 replies; 6+ messages in thread
From: Evan Lloyd @ 2018-03-19 16:13 UTC (permalink / raw)
To: Sami Mujawar, edk2-devel@lists.01.org
Cc: Arvind Chauhan, Daniil Egranov, Thomas Abraham,
leif.lindholm@linaro.org, Matteo Carlini, Stephanie Hughes-Fitt,
nd
> -----Original Message-----
> From: Sami Mujawar [mailto:sami.mujawar@arm.com]
> Sent: 19 March 2018 15:22
> To: edk2-devel@lists.01.org
> Cc: Arvind Chauhan <Arvind.Chauhan@arm.com>; Daniil Egranov
> <Daniil.Egranov@arm.com>; Thomas Abraham
> <thomas.abraham@arm.com>; Evan Lloyd <Evan.Lloyd@arm.com>;
> leif.lindholm@linaro.org; Matteo Carlini <Matteo.Carlini@arm.com>;
> Stephanie Hughes-Fitt <Stephanie.Hughes-Fitt@arm.com>; nd
> <nd@arm.com>
> Subject: [PATCH 1/2][platforms/dynamictables] Platform/ARM: Dynamic
> Tables support for Juno
>
> The dynamic tables framework utilizes the configuration manager
> protocol to get the platform specific information required for
> building the firmware tables.
>
> The configuration manager is a platform specific component that
> collates the platform hardware information and builds an abstract
> platform configuration repository. The configuration manager also
> implements the configuration manager protocol which returns the
> hardware information requested by the table generators.
>
> This patch implements the configuration manager support for the
> Juno platform.
>
> The dynamic tables framework support is configurable and can be
> enabled using the DYNAMIC_TABLES_FRAMEWORK build option.
>
> When DYNAMIC_TABLES_FRAMEWORK is defined, ACPI tables are
> generated
> and installed by the dynamic table framework. Therefore installation
> of ACPI tables from the Firmware Volume (FV) is disabled by this
> option.
>
> Contributed-under: TianoCore Contribution Agreement 1.1
> Signed-off-by: Sami Mujawar <sami.mujawar@arm.com>
Reviewed-by: Evan Lloyd <evan.lloyd@arm.com>
> ---
> Platform/ARM/JunoPkg/ArmJuno.dsc |
> 16 +-
> Platform/ARM/JunoPkg/ArmJuno.fdf |
> 14 +-
>
> Platform/ARM/JunoPkg/ConfigurationManager/ConfigurationManager.dsc.i
> nc | 29 +
>
> Platform/ARM/JunoPkg/ConfigurationManager/ConfigurationManagerDxe/
> ConfigurationManager.c | 589 ++++++++++++++++++++
>
> Platform/ARM/JunoPkg/ConfigurationManager/ConfigurationManagerDxe/
> ConfigurationManager.h | 156 ++++++
>
> Platform/ARM/JunoPkg/ConfigurationManager/ConfigurationManagerDxe/
> ConfigurationManagerDxe.inf | 85 +++
>
> Platform/ARM/JunoPkg/ConfigurationManager/ConfigurationManagerDxe/
> Platform.h | 65 +++
>
> Platform/ARM/JunoPkg/ConfigurationManager/PlatformASLTablesLib/Dsdt
> .asl | 306 ++++++++++
>
> Platform/ARM/JunoPkg/ConfigurationManager/PlatformASLTablesLib/Platf
> ormASLTablesLib.inf | 44 ++
>
> Platform/ARM/JunoPkg/ConfigurationManager/PlatformASLTablesLib/SsdtJ
> unoUsb.asl | 122 ++++
>
> Platform/ARM/JunoPkg/ConfigurationManager/PlatformASLTablesLib/Ssdt
> Pci.asl | 218 ++++++++
>
> Platform/ARM/JunoPkg/ConfigurationManager/PlatformASLTablesLib/Ssdt
> Uart.asl | 48 ++
> Platform/ARM/JunoPkg/Drivers/ArmJunoDxe/ArmJunoDxe.c
> | 9 +-
> 13 files changed, 1697 insertions(+), 4 deletions(-)
>
> diff --git a/Platform/ARM/JunoPkg/ArmJuno.dsc
> b/Platform/ARM/JunoPkg/ArmJuno.dsc
> index
> 9d7317683ef39ab47429234b98d94c04953b41cb..e75b4848345b83e73aa
> aabea9f5f1dacea5895f6 100644
> --- a/Platform/ARM/JunoPkg/ArmJuno.dsc
> +++ b/Platform/ARM/JunoPkg/ArmJuno.dsc
> @@ -33,6 +33,11 @@ [Defines]
> # On RTSM, most peripherals are VExpress Motherboard peripherals
> !include Platform/ARM/VExpressPkg/ArmVExpress.dsc.inc
>
> +!ifdef DYNAMIC_TABLES_FRAMEWORK
> +!include DynamicTablesPkg/DynamicTables.dsc.inc
> +!include
> Platform/ARM/JunoPkg/ConfigurationManager/ConfigurationManager.dsc.i
> nc
> +!endif
> +
> [LibraryClasses.common]
> ArmLib|ArmPkg/Library/ArmLib/ArmBaseLib.inf
> ArmMmuLib|ArmPkg/Library/ArmMmuLib/ArmMmuBaseLib.inf
> @@ -71,6 +76,14 @@ [LibraryClasses.common.UEFI_DRIVER,
> LibraryClasses.common.UEFI_APPLICATION, Libr
> [BuildOptions]
> GCC:*_*_ARM_PLATFORM_FLAGS = -march=armv8-a
>
> +!ifdef DYNAMIC_TABLES_FRAMEWORK
> + *_*_*_PLATFORM_FLAGS = -DDYNAMIC_TABLES_FRAMEWORK
> +!endif
> +
> +!ifdef DISABLE_LPI
> + *_*_*_ASLPP_FLAGS = -DDISABLE_LPI
> +!endif
> +
>
> ##########################################################
> ######################
> #
> # Pcd Section - list of all EDK II PCD Entries defined by this Platform
> @@ -242,8 +255,9 @@ [Components.common]
> # ACPI Support
> #
> MdeModulePkg/Universal/Acpi/AcpiTableDxe/AcpiTableDxe.inf
> +!ifndef DYNAMIC_TABLES_FRAMEWORK
> Platform/ARM/JunoPkg/AcpiTables/AcpiTables.inf
> -
> +!endif
> MdeModulePkg/Universal/HiiDatabaseDxe/HiiDatabaseDxe.inf
>
> ArmPkg/Drivers/ArmGic/ArmGicDxe.inf
> diff --git a/Platform/ARM/JunoPkg/ArmJuno.fdf
> b/Platform/ARM/JunoPkg/ArmJuno.fdf
> index
> ee9d0e7f4f6e6ac99ded6a14e88eb2c7854dd473..e35a43e9b64d8141c5aae
> bd1e78446178ec42545 100644
> --- a/Platform/ARM/JunoPkg/ArmJuno.fdf
> +++ b/Platform/ARM/JunoPkg/ArmJuno.fdf
> @@ -1,5 +1,5 @@
> #
> -# Copyright (c) 2013-2015, ARM Limited. All rights reserved.
> +# Copyright (c) 2013-2018, ARM Limited. All rights reserved.
> #
> # This program and the accompanying materials
> # are licensed and made available under the terms and conditions of the
> BSD License
> @@ -114,7 +114,17 @@ [FV.FvMain]
> # ACPI Support
> #
> INF MdeModulePkg/Universal/Acpi/AcpiTableDxe/AcpiTableDxe.inf
> +!ifndef DYNAMIC_TABLES_FRAMEWORK
> INF RuleOverride=ACPITABLE
> Platform/ARM/JunoPkg/AcpiTables/AcpiTables.inf
> +!else
> + # Configuration Manager
> + INF
> Platform/ARM/JunoPkg/ConfigurationManager/ConfigurationManagerDxe/
> ConfigurationManagerDxe.inf
> +
> + #
> + # Dynamic Table fdf
> + #
> + !include DynamicTablesPkg/DynamicTables.fdf.inc
> +!endif
>
> INF MdeModulePkg/Universal/HiiDatabaseDxe/HiiDatabaseDxe.inf
>
> @@ -368,8 +378,10 @@ [Rule.Common.UEFI_APPLICATION.BINARY]
> VERSION STRING="$(INF_VERSION)" Optional
> BUILD_NUM=$(BUILD_NUMBER)
> }
>
> +!ifndef DYNAMIC_TABLES_FRAMEWORK
> [Rule.Common.USER_DEFINED.ACPITABLE]
> FILE FREEFORM = $(NAMED_GUID) {
> RAW ACPI |.acpi
> RAW ASL |.aml
> }
> +!endif
> diff --git
> a/Platform/ARM/JunoPkg/ConfigurationManager/ConfigurationManager.ds
> c.inc
> b/Platform/ARM/JunoPkg/ConfigurationManager/ConfigurationManager.d
> sc.inc
> new file mode 100644
> index
> 0000000000000000000000000000000000000000..d811556603cbdd157c
> fcfe2c61976b469ea15e29
> --- /dev/null
> +++
> b/Platform/ARM/JunoPkg/ConfigurationManager/ConfigurationManager.d
> sc.inc
> @@ -0,0 +1,29 @@
> +## @file
> +#
> +# Copyright (c) 2017, ARM Limited. All rights reserved.
> +#
> +# This program and the accompanying materials
> +# are licensed and made available under the terms and conditions of the
> BSD License
> +# which accompanies this distribution. The full text of the license may be
> found at
> +# http://opensource.org/licenses/bsd-license.php
> +#
> +# THE PROGRAM IS DISTRIBUTED UNDER THE BSD LICENSE ON AN "AS IS"
> BASIS,
> +# WITHOUT WARRANTIES OR REPRESENTATIONS OF ANY KIND, EITHER
> EXPRESS OR IMPLIED.
> +##
> +
> +[Defines]
> +# [BuildOptions.common.EDKII.DXE_RUNTIME_DRIVER]
> +
> +[BuildOptions]
> +
> +[LibraryClasses.common]
> +
> +[Components.common]
> + # Configuration Manager
> +
> Platform/ARM/JunoPkg/ConfigurationManager/ConfigurationManagerDxe/
> ConfigurationManagerDxe.inf {
> + <LibraryClasses>
> + # Platform ASL Tables
> +
> PlatformAslTablesLib|Platform/ARM/JunoPkg/ConfigurationManager/Platf
> ormASLTablesLib/PlatformASLTablesLib.inf
> + <BuildOptions>
> + *_*_*_PLATFORM_FLAGS = -
> I$(BIN_DIR)/Platform/ARM/JunoPkg/ConfigurationManager/PlatformASLTa
> blesLib/PlatformASLTablesLib/OUTPUT
> + }
> diff --git
> a/Platform/ARM/JunoPkg/ConfigurationManager/ConfigurationManagerDx
> e/ConfigurationManager.c
> b/Platform/ARM/JunoPkg/ConfigurationManager/ConfigurationManagerDx
> e/ConfigurationManager.c
> new file mode 100644
> index
> 0000000000000000000000000000000000000000..0e67dfa1f47cc3004b7
> 75ec43d02e07754675e26
> --- /dev/null
> +++
> b/Platform/ARM/JunoPkg/ConfigurationManager/ConfigurationManagerDx
> e/ConfigurationManager.c
> @@ -0,0 +1,589 @@
> +/** @file
> + Configuration Manager Dxe
> +
> + Copyright (c) 2017 - 2018, ARM Limited. All rights reserved.
> +
> + This program and the accompanying materials
> + are licensed and made available under the terms and conditions of the
> BSD License
> + which accompanies this distribution. The full text of the license may be
> found at
> + http://opensource.org/licenses/bsd-license.php
> +
> + THE PROGRAM IS DISTRIBUTED UNDER THE BSD LICENSE ON AN "AS IS"
> BASIS,
> + WITHOUT WARRANTIES OR REPRESENTATIONS OF ANY KIND, EITHER
> EXPRESS OR IMPLIED.
> +
> + @par Glossary:
> + - Cm or CM - Configuration Manager
> + - Obj or OBJ - Object
> +**/
> +
> +#include <IndustryStandard/DebugPort2Table.h>
> +#include <Library/IoLib.h>
> +#include <Library/UefiBootServicesTableLib.h>
> +#include <Library/ArmLib.h>
> +#include <Library/DebugLib.h>
> +#include <Library/PcdLib.h>
> +#include <Protocol/AcpiTable.h>
> +
> +#include <ArmPlatform.h>
> +#include <AcpiTableGenerator.h>
> +#include <Protocol/ConfigurationManagerProtocol.h>
> +
> +#include "ConfigurationManager.h"
> +#include "Platform.h"
> +
> +// AML Code Include files generated by iASL Compiler
> +#include <Dsdt.hex>
> +#include <SsdtJunoUsb.hex>
> +#include <SsdtUart.hex>
> +#include <SsdtPci.hex>
> +
> +/** The platform configuration repository information.
> +*/
> +STATIC
> +EFI_PLATFORM_REPOSITORY_INFO ArmJunoPlatformRepositoryInfo = {
> + /// Configuration Manager information
> + { CONFIGURATION_MANAGER_REVISION, CFG_MGR_OEM_ID },
> +
> + // ACPI Table List
> + {
> + // FADT Table
> + {
> + EFI_ACPI_6_2_FIXED_ACPI_DESCRIPTION_TABLE_SIGNATURE,
> + CREATE_STD_ACPI_TABLE_GEN_ID (ESTD_ACPI_TABLE_ID_FADT),
> + NULL
> + },
> + // GTDT Table
> + {
> + EFI_ACPI_6_2_GENERIC_TIMER_DESCRIPTION_TABLE_SIGNATURE,
> + CREATE_STD_ACPI_TABLE_GEN_ID (ESTD_ACPI_TABLE_ID_GTDT),
> + NULL
> + },
> + // MADT Table
> + {
> + EFI_ACPI_6_2_MULTIPLE_APIC_DESCRIPTION_TABLE_SIGNATURE,
> + CREATE_STD_ACPI_TABLE_GEN_ID (ESTD_ACPI_TABLE_ID_MADT),
> + NULL
> + },
> + // SPCR Table
> + {
> +
> EFI_ACPI_6_2_SERIAL_PORT_CONSOLE_REDIRECTION_TABLE_SIGNATURE,
> + CREATE_STD_ACPI_TABLE_GEN_ID (ESTD_ACPI_TABLE_ID_SPCR),
> + NULL
> + },
> + // DSDT Table
> + {
> +
> EFI_ACPI_6_2_DIFFERENTIATED_SYSTEM_DESCRIPTION_TABLE_SIGNATURE,
> + CREATE_STD_ACPI_TABLE_GEN_ID (ESTD_ACPI_TABLE_ID_DSDT),
> + (EFI_ACPI_DESCRIPTION_HEADER*)dsdt_AmlCode
> + },
> + // DBG2 Table
> + {
> + EFI_ACPI_6_2_DEBUG_PORT_2_TABLE_SIGNATURE,
> + CREATE_STD_ACPI_TABLE_GEN_ID (ESTD_ACPI_TABLE_ID_DBG2),
> + NULL
> + },
> + // SSDT Table describing the Juno USB
> + {
> + EFI_ACPI_6_2_SECONDARY_SYSTEM_DESCRIPTION_TABLE_SIGNATURE,
> + CREATE_STD_ACPI_TABLE_GEN_ID (ESTD_ACPI_TABLE_ID_SSDT),
> + (EFI_ACPI_DESCRIPTION_HEADER*)ssdtjunousb_AmlCode
> + },
> + // SSDT table describing the PL011 UART
> + {
> + EFI_ACPI_6_2_SECONDARY_SYSTEM_DESCRIPTION_TABLE_SIGNATURE,
> + CREATE_STD_ACPI_TABLE_GEN_ID (ESTD_ACPI_TABLE_ID_SSDT),
> + (EFI_ACPI_DESCRIPTION_HEADER*)ssdtuart_AmlCode
> + },
> +
> + /* PCI MCFG Table
> + PCIe is only available on Juno R1 and R2.
> + Add the PCI table entries at the end of the table so that
> + we can easily disable PCIe for Juno R0
> + */
> + {
> +
> EFI_ACPI_6_2_PCI_EXPRESS_MEMORY_MAPPED_CONFIGURATION_SPACE
> _BASE_ADDRESS_DESCRIPTION_TABLE_SIGNATURE,
> + CREATE_STD_ACPI_TABLE_GEN_ID (ESTD_ACPI_TABLE_ID_MCFG),
> + NULL
> + },
> + // SSDT table describing the PCI root complex
> + {
> + EFI_ACPI_6_2_SECONDARY_SYSTEM_DESCRIPTION_TABLE_SIGNATURE,
> + CREATE_STD_ACPI_TABLE_GEN_ID (ESTD_ACPI_TABLE_ID_SSDT),
> + (EFI_ACPI_DESCRIPTION_HEADER*)ssdtpci_AmlCode
> + }
> + },
> +
> + // Boot architecture information
> + { EFI_ACPI_6_2_ARM_PSCI_COMPLIANT }, // BootArchFlags
> +
> + // Power management profile information
> + { EFI_ACPI_6_2_PM_PROFILE_MOBILE }, // PowerManagement Profile
> +
> + /* GIC CPU Interface information
> + GIC_ENTRY (CPUInterfaceNumber, Mpidr, PmuIrq, VGicIrq,
> EnergyEfficiency)
> + */
> + {
> + GICC_ENTRY (2, GET_MPID (1, 0), 50, 25, 0),
> + GICC_ENTRY (3, GET_MPID (1, 1), 54, 25, 0),
> + GICC_ENTRY (4, GET_MPID (1, 2), 58, 25, 0),
> + GICC_ENTRY (5, GET_MPID (1, 3), 62, 25, 0),
> +
> + GICC_ENTRY (0, GET_MPID (0, 0), 34, 25, 1),
> + GICC_ENTRY (1, GET_MPID (0, 1), 38, 25, 1)
> + },
> +
> + // GIC Distributor Info
> + {
> + 0, // UINT32 GicId
> + FixedPcdGet64 (PcdGicDistributorBase), // UINT64
> PhysicalBaseAddress
> + 0, // UINT32 SystemVectorBase
> + 2 // UINT8 GicVersion
> + },
> +
> + // Generic Timer Info
> + {
> + // The physical base address for the counter control frame
> + SYSTEM_COUNTER_BASE_ADDRESS,
> + // The physical base address for the counter read frame
> + SYSTEM_COUNTER_READ_BASE,
> + // The secure PL1 timer interrupt
> + FixedPcdGet32 (PcdArmArchTimerSecIntrNum),
> + // The secure PL1 timer flags
> + GTDT_GTIMER_FLAGS,
> + // The non-secure PL1 timer interrupt
> + FixedPcdGet32 (PcdArmArchTimerIntrNum),
> + // The non-secure PL1 timer flags
> + GTDT_GTIMER_FLAGS,
> + // The virtual timer interrupt
> + FixedPcdGet32 (PcdArmArchTimerVirtIntrNum),
> + // The virtual timer flags
> + GTDT_GTIMER_FLAGS,
> + // The non-secure PL2 timer interrupt
> + FixedPcdGet32 (PcdArmArchTimerHypIntrNum),
> + // The non-secure PL2 timer flags
> + GTDT_GTIMER_FLAGS
> + },
> +
> + // Watchdog Info
> + {
> + // The physical base address of the SBSA Watchdog control frame
> + FixedPcdGet64 (PcdGenericWatchdogControlBase),
> + // The physical base address of the SBSA Watchdog refresh frame
> + FixedPcdGet64 (PcdGenericWatchdogRefreshBase),
> + // The watchdog interrupt
> + FixedPcdGet32 (PcdGenericWatchdogEl2IntrNum),
> + // The watchdog flags
> + SBSA_WATCHDOG_FLAGS
> + },
> +
> + // SPCR Serial Port
> + {
> + FixedPcdGet64 (PcdSerialRegisterBase), // UINT64 BaseAddress
> + FixedPcdGet32 (PL011UartInterrupt), // UINT32 Interrupt
> + FixedPcdGet64 (PcdUartDefaultBaudRate), // UINT64 BaudRate
> + FixedPcdGet32 (PL011UartClkInHz), // UINT32 Clock
> + EFI_ACPI_DBG2_PORT_SUBTYPE_SERIAL_ARM_PL011_UART // UINT16
> Port subtype
> + },
> + // Debug Serial Port
> + {
> + FixedPcdGet64 (PcdSerialDbgRegisterBase), // UINT64 BaseAddress
> + 38, // UINT32 Interrupt
> + FixedPcdGet64 (PcdSerialDbgUartBaudRate), // UINT64 BaudRate
> + FixedPcdGet32 (PcdSerialDbgUartClkInHz), // UINT32 Clock
> + EFI_ACPI_DBG2_PORT_SUBTYPE_SERIAL_ARM_PL011_UART // UINT16
> Port subtype
> + },
> +
> + // PCI Configuration Space Info
> + {
> + // The physical base address for the PCI segment
> + FixedPcdGet64 (PcdPciConfigurationSpaceBaseAddress),
> + // The PCI segment group number
> + 0,
> + // The start bus number
> + FixedPcdGet32 (PcdPciBusMin),
> + // The end bus number
> + FixedPcdGet32 (PcdPciBusMax)
> + },
> +
> + // GIC Msi Frame Info
> + {
> + // The GIC MSI Frame ID
> + 0,
> + // The Physical base address for the MSI Frame.
> + ARM_JUNO_GIV2M_MSI_BASE,
> + /* The GIC MSI Frame flags
> + as described by the GIC MSI frame
> + structure in the ACPI Specification.
> + */
> + 0,
> + // SPI Count used by this frame.
> + 127,
> + // SPI Base used by this frame.
> + 224
> + }
> +};
> +
> +/** Initialize the platform configuration repository.
> +
> + @param [in] This Pointer to the Configuration Manager Protocol.
> +
> + @retval EFI_SUCCESS Success
> +*/
> +STATIC
> +EFI_STATUS
> +EFIAPI
> +InitializePlatformRepository (
> + IN CONST EFI_CONFIGURATION_MANAGER_PROTOCOL * CONST This
> + )
> +{
> + EFI_PLATFORM_REPOSITORY_INFO * PlatformRepo;
> +
> + PlatformRepo = This->PlatRepoInfo;
> +
> + GetJunoRevision (PlatformRepo->JunoRevision);
> + DEBUG ((DEBUG_INFO, "Juno Rev = 0x%x\n", PlatformRepo-
> >JunoRevision));
> + return EFI_SUCCESS;
> +}
> +
> +/** Return a standard namespace object.
> +
> + @param [in] This Pointer to the Configuration Manager Protocol.
> + @param [in] CmObjectId The Configuration Manager Object ID.
> + @param [in] Token An optional token identifying the object. If
> + unused this must be CM_NULL_TOKEN.
> + @param [out] CmObject Pointer to the Configuration Manager Object
> + descriptor describing the requested Object.
> +
> + @retval EFI_SUCCESS Success.
> + @retval EFI_INVALID_PARAMETER A parameter is invalid.
> + @retval EFI_NOT_FOUND The required object information is not
> found.
> +*/
> +EFI_STATUS
> +EFIAPI
> +GetStandardNameSpaceObject (
> + IN CONST EFI_CONFIGURATION_MANAGER_PROTOCOL * CONST This,
> + IN CONST CM_OBJECT_ID CmObjectId,
> + IN CONST CM_OBJECT_TOKEN Token OPTIONAL,
> + IN OUT CM_OBJ_DESCRIPTOR * CONST CmObject
> + )
> +{
> + EFI_STATUS Status = EFI_SUCCESS;
> + EFI_PLATFORM_REPOSITORY_INFO * PlatformRepo;
> +
> + if ((This == NULL) || (CmObject == NULL)) {
> + ASSERT (This != NULL);
> + ASSERT (CmObject != NULL);
> + return EFI_INVALID_PARAMETER;
> + }
> + PlatformRepo = This->PlatRepoInfo;
> +
> + switch (GET_CM_OBJECT_ID (CmObjectId)) {
> + HANDLE_CM_OBJECT (EStdObjCfgMgrInfo, PlatformRepo->CmInfo);
> +
> + case EStdObjAcpiTableList:
> + if (PlatformRepo->JunoRevision != JUNO_REVISION_R0) {
> + CmObject->Size = sizeof (PlatformRepo->CmAcpiTableList);
> + } else {
> + UINT32 TableCount = sizeof (PlatformRepo->CmAcpiTableList) /
> + sizeof (PlatformRepo->CmAcpiTableList[0]);
> + /* The last 2 tables in the ACPI table list enable PCIe support.
> + Reduce the CmObject size so that the PCIe specific ACPI
> + tables are not installed on Juno R0
> + */
> + CmObject->Size = sizeof (PlatformRepo->CmAcpiTableList[0]) *
> + (TableCount -2);
> + }
> + CmObject->Data = (VOID*)&PlatformRepo->CmAcpiTableList;
> + DEBUG ((
> + DEBUG_INFO,
> + "EStdObjAcpiTableList: Ptr = 0x%p. Size = %d\n",
> + CmObject->Data,
> + CmObject->Size
> + ));
> + break;
> +
> + default: {
> + Status = EFI_NOT_FOUND;
> + DEBUG ((
> + DEBUG_ERROR,
> + "ERROR: Object 0x%x. Status = %r\n",
> + CmObjectId,
> + Status
> + ));
> + break;
> + }
> + }
> +
> + return Status;
> +}
> +
> +/** Return an ARM namespace object.
> +
> + @param [in] This Pointer to the Configuration Manager Protocol.
> + @param [in] CmObjectId The Configuration Manager Object ID.
> + @param [in] Token An optional token identifying the object. If
> + unused this must be CM_NULL_TOKEN.
> + @param [out] CmObject Pointer to the Configuration Manager Object
> + descriptor describing the requested Object.
> +
> + @retval EFI_SUCCESS Success.
> + @retval EFI_INVALID_PARAMETER A parameter is invalid.
> + @retval EFI_NOT_FOUND The required object information is not
> found.
> +*/
> +EFI_STATUS
> +EFIAPI
> +GetArmNameSpaceObject (
> + IN CONST EFI_CONFIGURATION_MANAGER_PROTOCOL * CONST This,
> + IN CONST CM_OBJECT_ID CmObjectId,
> + IN CONST CM_OBJECT_TOKEN Token OPTIONAL,
> + IN OUT CM_OBJ_DESCRIPTOR * CONST CmObject
> + )
> +{
> + EFI_STATUS Status = EFI_SUCCESS;
> + EFI_PLATFORM_REPOSITORY_INFO * PlatformRepo;
> +
> + if ((This == NULL) || (CmObject == NULL)) {
> + ASSERT (This != NULL);
> + ASSERT (CmObject != NULL);
> + return EFI_INVALID_PARAMETER;
> + }
> + PlatformRepo = This->PlatRepoInfo;
> +
> + switch (GET_CM_OBJECT_ID (CmObjectId)) {
> + HANDLE_CM_OBJECT (EArmObjBootArchInfo, PlatformRepo-
> >BootArchInfo);
> + HANDLE_CM_OBJECT (
> + EArmObjPowerManagementProfileInfo,
> + PlatformRepo->PmProfileInfo
> + );
> + HANDLE_CM_OBJECT (EArmObjGenericTimerInfo, PlatformRepo-
> >GenericTimerInfo);
> + HANDLE_CM_OBJECT (
> + EArmObjPlatformGenericWatchdogInfo,
> + PlatformRepo->Watchdog
> + );
> + HANDLE_CM_OBJECT (EArmObjGicCInfo, PlatformRepo->GicCInfo);
> + HANDLE_CM_OBJECT (EArmObjGicDInfo, PlatformRepo->GicDInfo);
> + HANDLE_CM_OBJECT (
> + EArmObjSerialConsolePortInfo,
> + PlatformRepo->SpcrSerialPort
> + );
> + HANDLE_CM_OBJECT (EArmObjSerialDebugPortInfo, PlatformRepo-
> >DbgSerialPort);
> + HANDLE_CM_OBJECT (EArmObjGicMsiFrameInfo, PlatformRepo-
> >GicMsiFrameInfo);
> +
> + case EArmObjPciConfigSpaceInfo:
> + if (PlatformRepo->JunoRevision != JUNO_REVISION_R0) {
> + CmObject->Size = sizeof (PlatformRepo->PciConfigInfo);
> + CmObject->Data = (VOID*)&PlatformRepo->PciConfigInfo;
> + DEBUG ((
> + DEBUG_INFO,
> + "EArmObjPciConfigSpaceInfo: Ptr = 0x%p, Size = %d\n",
> + CmObject->Data,
> + CmObject->Size
> + ));
> + }
> + break;
> +
> + default: {
> + Status = EFI_NOT_FOUND;
> + DEBUG ((
> + DEBUG_INFO,
> + "INFO: Object 0x%x. Status = %r\n",
> + CmObjectId,
> + Status
> + ));
> + break;
> + }
> + }//switch
> +
> + return Status;
> +}
> +
> +/** Return an OEM namespace object.
> +
> + @param [in] This Pointer to the Configuration Manager Protocol.
> + @param [in] CmObjectId The Configuration Manager Object ID.
> + @param [in] Token An optional token identifying the object. If
> + unused this must be CM_NULL_TOKEN.
> + @param [out] CmObject Pointer to the Configuration Manager Object
> + descriptor describing the requested Object.
> +
> + @retval EFI_SUCCESS Success.
> + @retval EFI_INVALID_PARAMETER A parameter is invalid.
> + @retval EFI_NOT_FOUND The required object information is not
> found.
> +*/
> +EFI_STATUS
> +EFIAPI
> +GetOemNameSpaceObject (
> + IN CONST EFI_CONFIGURATION_MANAGER_PROTOCOL * CONST This,
> + IN CONST CM_OBJECT_ID CmObjectId,
> + IN CONST CM_OBJECT_TOKEN Token OPTIONAL,
> + IN OUT CM_OBJ_DESCRIPTOR * CONST CmObject
> + )
> +{
> + EFI_STATUS Status = EFI_SUCCESS;
> +
> + if ((This == NULL) || (CmObject == NULL)) {
> + ASSERT (This != NULL);
> + ASSERT (CmObject != NULL);
> + return EFI_INVALID_PARAMETER;
> + }
> +
> + switch (GET_CM_OBJECT_ID (CmObjectId)) {
> + default: {
> + Status = EFI_NOT_FOUND;
> + DEBUG ((
> + DEBUG_ERROR,
> + "ERROR: Object 0x%x. Status = %r\n",
> + CmObjectId,
> + Status
> + ));
> + break;
> + }
> + }
> +
> + return Status;
> +}
> +
> +/** The GetObject function defines the interface implemented by the
> + Configuration Manager Protocol for returning the Configuration
> + Manager Objects.
> +
> + @param [in] This Pointer to the Configuration Manager Protocol.
> + @param [in] CmObjectId The Configuration Manager Object ID.
> + @param [in] Token An optional token identifying the object. If
> + unused this must be CM_NULL_TOKEN.
> + @param [out] CmObject Pointer to the Configuration Manager Object
> + descriptor describing the requested Object.
> +
> + @retval EFI_SUCCESS Success.
> + @retval EFI_INVALID_PARAMETER A parameter is invalid.
> + @retval EFI_NOT_FOUND The required object information is not
> found.
> +*/
> +EFI_STATUS
> +EFIAPI
> +ArmJunoPlatformGetObject (
> + IN CONST EFI_CONFIGURATION_MANAGER_PROTOCOL * CONST This,
> + IN CONST CM_OBJECT_ID CmObjectId,
> + IN CONST CM_OBJECT_TOKEN Token OPTIONAL,
> + IN OUT CM_OBJ_DESCRIPTOR * CONST CmObject
> + )
> +{
> + EFI_STATUS Status;
> +
> + if ((This == NULL) || (CmObject == NULL)) {
> + ASSERT (This != NULL);
> + ASSERT (CmObject != NULL);
> + return EFI_INVALID_PARAMETER;
> + }
> +
> + switch (GET_CM_NAMESPACE_ID (CmObjectId)) {
> + case EObjNameSpaceStandard:
> + Status = GetStandardNameSpaceObject (This, CmObjectId, Token,
> CmObject);
> + break;
> + case EObjNameSpaceArm:
> + Status = GetArmNameSpaceObject (This, CmObjectId, Token,
> CmObject);
> + break;
> + case EObjNameSpaceOem:
> + Status = GetOemNameSpaceObject (This, CmObjectId, Token,
> CmObject);
> + break;
> + default: {
> + Status = EFI_INVALID_PARAMETER;
> + DEBUG ((
> + DEBUG_ERROR,
> + "ERROR: Unknown Namespace Object = 0x%x. Status = %r\n",
> + CmObjectId,
> + Status
> + ));
> + break;
> + }
> + }
> +
> + return Status;
> +}
> +
> +/** The SetObject function defines the interface implemented by the
> + Configuration Manager Protocol for updating the Configuration
> + Manager Objects.
> +
> + @param [in] This Pointer to the Configuration Manager Protocol.
> + @param [in] CmObjectId The Configuration Manager Object ID.
> + @param [in] Token An optional token identifying the object. If
> + unused this must be CM_NULL_TOKEN.
> + @param [out] CmObject Pointer to the Configuration Manager Object
> + descriptor describing the Object.
> +
> + @retval EFI_UNSUPPORTED This operation is not supported.
> +*/
> +EFI_STATUS
> +EFIAPI
> +ArmJunoPlatformSetObject (
> + IN CONST EFI_CONFIGURATION_MANAGER_PROTOCOL * CONST This,
> + IN CONST CM_OBJECT_ID CmObjectId,
> + IN CONST CM_OBJECT_TOKEN Token OPTIONAL,
> + IN CM_OBJ_DESCRIPTOR * CONST CmObject
> + )
> +{
> + return EFI_UNSUPPORTED;
> +}
> +
> +/** A structure describing the configuration manager protocol interface.
> +*/
> +STATIC
> +CONST
> +EFI_CONFIGURATION_MANAGER_PROTOCOL
> ArmJunoPlatformConfigManagerProtocol = {
> + CREATE_REVISION (1, 0),
> + ArmJunoPlatformGetObject,
> + ArmJunoPlatformSetObject,
> + &ArmJunoPlatformRepositoryInfo
> +};
> +
> +/**
> + Entrypoint of Configuration Manager Dxe.
> +
> + @param ImageHandle
> + @param SystemTable
> +
> + @return EFI_SUCCESS
> + @return EFI_LOAD_ERROR
> + @return EFI_OUT_OF_RESOURCES
> +
> +**/
> +EFI_STATUS
> +EFIAPI
> +ConfigurationManagerDxeInitialize (
> + IN EFI_HANDLE ImageHandle,
> + IN EFI_SYSTEM_TABLE * SystemTable
> + )
> +{
> + EFI_STATUS Status;
> +
> + Status = gBS->InstallProtocolInterface (
> + &ImageHandle,
> + &gEfiConfigurationManagerProtocolGuid,
> + EFI_NATIVE_INTERFACE,
> + (VOID*)&ArmJunoPlatformConfigManagerProtocol
> + );
> + if (EFI_ERROR (Status)) {
> + DEBUG ((
> + DEBUG_ERROR,
> + "ERROR: Failed to get Install Configuration Manager Protocol." \
> + " Status = %r\n",
> + Status
> + ));
> + goto error_handler;
> + }
> +
> + Status = InitializePlatformRepository (
> + &ArmJunoPlatformConfigManagerProtocol
> + );
> + if (EFI_ERROR (Status)) {
> + DEBUG ((
> + DEBUG_ERROR,
> + "ERROR: Failed to initialize the Platform Configuration Repository." \
> + " Status = %r\n",
> + Status
> + ));
> + }
> +
> +error_handler:
> + return Status;
> +}
> diff --git
> a/Platform/ARM/JunoPkg/ConfigurationManager/ConfigurationManagerDx
> e/ConfigurationManager.h
> b/Platform/ARM/JunoPkg/ConfigurationManager/ConfigurationManagerDx
> e/ConfigurationManager.h
> new file mode 100644
> index
> 0000000000000000000000000000000000000000..438b701e4303877f20
> 95dad0c76c6ccf6d2101d8
> --- /dev/null
> +++
> b/Platform/ARM/JunoPkg/ConfigurationManager/ConfigurationManagerDx
> e/ConfigurationManager.h
> @@ -0,0 +1,156 @@
> +/** @file
> +
> + Copyright (c) 2017 - 2018, ARM Limited. All rights reserved.
> +
> + This program and the accompanying materials
> + are licensed and made available under the terms and conditions of the
> BSD License
> + which accompanies this distribution. The full text of the license may be
> found at
> + http://opensource.org/licenses/bsd-license.php
> +
> + THE PROGRAM IS DISTRIBUTED UNDER THE BSD LICENSE ON AN "AS IS"
> BASIS,
> + WITHOUT WARRANTIES OR REPRESENTATIONS OF ANY KIND, EITHER
> EXPRESS OR IMPLIED.
> +
> + @par Glossary:
> + - Cm or CM - Configuration Manager
> + - Obj or OBJ - Object
> +**/
> +
> +#ifndef CONFIGURATION_MANAGER_H__
> +#define CONFIGURATION_MANAGER_H__
> +
> +/** The configuration manager version
> +*/
> +#define CONFIGURATION_MANAGER_REVISION CREATE_REVISION (1, 0)
> +
> +/** The OEM ID
> +*/
> +#define CFG_MGR_OEM_ID { 'A', 'R', 'M', 'L', 'T', 'D' }
> +
> +/** A helper macro for populating the GIC CPU information
> +*/
> +#define GICC_ENTRY( \
> + CPUInterfaceNumber, \
> + Mpidr, \
> + PmuIrq, \
> + VGicIrq, \
> + EnergyEfficiency \
> + ) { \
> + CPUInterfaceNumber, /* UINT32 CPUInterfaceNumber */ \
> + CPUInterfaceNumber, /* UINT32 AcpiProcessorUid */ \
> + EFI_ACPI_6_2_GIC_ENABLED, /* UINT32 Flags */ \
> + 0, /* UINT32 ParkingProtocolVersion */ \
> + PmuIrq, /* UINT32 PerformanceInterruptGsiv */ \
> + 0, /* UINT64 ParkedAddress */ \
> + FixedPcdGet64 ( \
> + PcdGicInterruptInterfaceBase \
> + ), /* UINT64 PhysicalBaseAddress */ \
> + 0, /* UINT64 GICV */ \
> + 0, /* UINT64 GICH */ \
> + VGicIrq, /* UINT32 VGICMaintenanceInterrupt */ \
> + 0, /* UINT64 GICRBaseAddress */ \
> + Mpidr, /* UINT64 MPIDR */ \
> + EnergyEfficiency /* UINT8 ProcessorPowerEfficiencyClass*/ \
> + }
> +
> +/** A helper macro for returning configuration manager objects
> +*/
> +#define HANDLE_CM_OBJECT(CmObjectId, Object) \
> + case CmObjectId: { \
> + CmObject->Size = sizeof (Object); \
> + CmObject->Data = (VOID*)&Object; \
> + DEBUG (( \
> + DEBUG_INFO, \
> + #CmObjectId ": Ptr = 0x%p, Size = %d\n", \
> + CmObject->Data, \
> + CmObject->Size \
> + )); \
> + break; \
> + }
> +
> +/** A helper macro for returning configuration manager objects
> + referenced by token
> +*/
> +#define HANDLE_CM_OBJECT_REF_BY_TOKEN( \
> + CmObjectId, \
> + Object, \
> + Token, \
> + HandlerProc \
> + ) \
> + case CmObjectId: { \
> + if (Token == CM_NULL_TOKEN) { \
> + CmObject->Size = sizeof (Object); \
> + CmObject->Data = (VOID*)&Object; \
> + DEBUG (( \
> + DEBUG_INFO, \
> + #CmObjectId ": Ptr = 0x%p, Size = %d\n", \
> + CmObject->Data, \
> + CmObject->Size \
> + )); \
> + } else { \
> + Status = HandlerProc (This, CmObjectId, Token, CmObject); \
> + DEBUG (( \
> + DEBUG_INFO, \
> + #CmObjectId ": Token = 0x%p, Ptr = 0x%p, Size = %d\n", \
> + (VOID*)Token, \
> + CmObject->Data, \
> + CmObject->Size \
> + )); \
> + } \
> + break; \
> + }
> +
> +/** The number of CPUs
> +*/
> +#define PLAT_CPU_COUNT 6
> +
> +/** The number of ACPI tables to install
> +*/
> +#define PLAT_ACPI_TABLE_COUNT 10
> +
> +/** A structure describing the platform configuration
> + manager repository information
> +*/
> +typedef struct PlatformRepositoryInfo {
> + /// Configuration Manager Information
> + CM_STD_OBJ_CONFIGURATION_MANAGER_INFO CmInfo;
> +
> + /// List of ACPI tables
> + CM_STD_OBJ_ACPI_TABLE_INFO
> CmAcpiTableList[PLAT_ACPI_TABLE_COUNT];
> +
> + /// Boot architecture information
> + CM_ARM_BOOT_ARCH_INFO BootArchInfo;
> +
> + /// Power management profile information
> + CM_ARM_POWER_MANAGEMENT_PROFILE_INFO PmProfileInfo;
> +
> + /// GIC CPU interface information
> + CM_ARM_GICC_INFO GicCInfo[PLAT_CPU_COUNT];
> +
> + /// GIC distributor information
> + CM_ARM_GICD_INFO GicDInfo;
> +
> + /// Generic timer information
> + CM_ARM_GENERIC_TIMER_INFO GenericTimerInfo;
> +
> + /// Watchdog information
> + CM_ARM_GENERIC_WATCHDOG_INFO Watchdog;
> +
> + /** Serial port information for the
> + serial port console redirection port
> + */
> + CM_ARM_SERIAL_PORT_INFO SpcrSerialPort;
> +
> + /// Serial port information for the DBG2 UART port
> + CM_ARM_SERIAL_PORT_INFO DbgSerialPort;
> +
> + /// PCI configuration space information
> + CM_ARM_PCI_CONFIG_SPACE_INFO PciConfigInfo;
> +
> + /// GIC MSI Frame information
> + CM_ARM_GIC_MSI_FRAME_INFO GicMsiFrameInfo;
> +
> + /// Juno Board Revision
> + UINT32 JunoRevision;
> +} EFI_PLATFORM_REPOSITORY_INFO;
> +
> +#endif // CONFIGURATION_MANAGER_H__
> diff --git
> a/Platform/ARM/JunoPkg/ConfigurationManager/ConfigurationManagerDx
> e/ConfigurationManagerDxe.inf
> b/Platform/ARM/JunoPkg/ConfigurationManager/ConfigurationManagerDx
> e/ConfigurationManagerDxe.inf
> new file mode 100644
> index
> 0000000000000000000000000000000000000000..c1bd6de9a2fb9fbe592
> d91ee77c6107580a3fb5a
> --- /dev/null
> +++
> b/Platform/ARM/JunoPkg/ConfigurationManager/ConfigurationManagerDx
> e/ConfigurationManagerDxe.inf
> @@ -0,0 +1,85 @@
> +## @file
> +#
> +# Copyright (c) 2017 - 2018, ARM Limited. All rights reserved.
> +#
> +# This program and the accompanying materials
> +# are licensed and made available under the terms and conditions of the
> BSD License
> +# which accompanies this distribution. The full text of the license may be
> found at
> +# http://opensource.org/licenses/bsd-license.php
> +#
> +# THE PROGRAM IS DISTRIBUTED UNDER THE BSD LICENSE ON AN "AS IS"
> BASIS,
> +# WITHOUT WARRANTIES OR REPRESENTATIONS OF ANY KIND, EITHER
> EXPRESS OR IMPLIED.
> +##
> +
> +[Defines]
> + INF_VERSION = 0x00010019
> + BASE_NAME = ConfigurationManagerDxe
> + FILE_GUID = A97F70AC-3BB4-4596-B4D2-9F948EC12D17
> + MODULE_TYPE = DXE_DRIVER
> + VERSION_STRING = 1.0
> + ENTRY_POINT = ConfigurationManagerDxeInitialize
> +
> +#
> +# The following information is for reference only and not required by the
> build tools.
> +#
> +# VALID_ARCHITECTURES = ARM AARCH64
> +#
> +
> +[Sources]
> + ConfigurationManager.c
> +
> +[Packages]
> + ArmPkg/ArmPkg.dec
> + ArmPlatformPkg/ArmPlatformPkg.dec
> + MdePkg/MdePkg.dec
> + MdeModulePkg/MdeModulePkg.dec
> + Platform/ARM/JunoPkg/ArmJuno.dec
> + DynamicTablesPkg/DynamicTablesPkg.dec
> +
> +[LibraryClasses]
> + ArmPlatformLib
> + PlatformAslTablesLib
> + PrintLib
> + UefiBootServicesTableLib
> + UefiDriverEntryPoint
> + UefiRuntimeServicesTableLib
> +
> +[Protocols]
> + gEfiConfigurationManagerProtocolGuid
> +
> +[FixedPcd]
> + gArmTokenSpaceGuid.PcdArmArchTimerSecIntrNum
> + gArmTokenSpaceGuid.PcdArmArchTimerIntrNum
> + gArmTokenSpaceGuid.PcdArmArchTimerVirtIntrNum
> + gArmTokenSpaceGuid.PcdArmArchTimerHypIntrNum
> +
> + gArmTokenSpaceGuid.PcdGicDistributorBase
> + gArmTokenSpaceGuid.PcdGicInterruptInterfaceBase
> + gArmTokenSpaceGuid.PcdGicRedistributorsBase
> +
> + gEfiMdeModulePkgTokenSpaceGuid.PcdSerialRegisterBase
> + gEfiMdePkgTokenSpaceGuid.PcdUartDefaultBaudRate
> + gArmPlatformTokenSpaceGuid.PL011UartClkInHz
> + gArmPlatformTokenSpaceGuid.PL011UartInterrupt
> +
> + ## PL011 Serial Debug UART
> + gArmPlatformTokenSpaceGuid.PcdSerialDbgRegisterBase
> + gArmPlatformTokenSpaceGuid.PcdSerialDbgUartBaudRate
> + gArmPlatformTokenSpaceGuid.PcdSerialDbgUartClkInHz
> +
> + # SBSA Generic Watchdog
> + gArmTokenSpaceGuid.PcdGenericWatchdogControlBase
> + gArmTokenSpaceGuid.PcdGenericWatchdogRefreshBase
> + gArmTokenSpaceGuid.PcdGenericWatchdogEl2IntrNum
> +
> + # PCI Root complex specific PCDs
> + gArmJunoTokenSpaceGuid.PcdPciConfigurationSpaceBaseAddress
> + gArmJunoTokenSpaceGuid.PcdPciConfigurationSpaceSize
> +
> + gArmTokenSpaceGuid.PcdPciBusMin
> + gArmTokenSpaceGuid.PcdPciBusMax
> +
> +[Pcd]
> +
> +[Depex]
> + TRUE
> diff --git
> a/Platform/ARM/JunoPkg/ConfigurationManager/ConfigurationManagerDx
> e/Platform.h
> b/Platform/ARM/JunoPkg/ConfigurationManager/ConfigurationManagerDx
> e/Platform.h
> new file mode 100644
> index
> 0000000000000000000000000000000000000000..d549370cf49ac493b4
> 6c574768dd03f0016a5cac
> --- /dev/null
> +++
> b/Platform/ARM/JunoPkg/ConfigurationManager/ConfigurationManagerDx
> e/Platform.h
> @@ -0,0 +1,65 @@
> +/** @file
> +
> + Copyright (c) 2017, ARM Limited. All rights reserved.
> +
> + This program and the accompanying materials
> + are licensed and made available under the terms and conditions of the
> BSD License
> + which accompanies this distribution. The full text of the license may be
> found at
> + http://opensource.org/licenses/bsd-license.php
> +
> + THE PROGRAM IS DISTRIBUTED UNDER THE BSD LICENSE ON AN "AS IS"
> BASIS,
> + WITHOUT WARRANTIES OR REPRESENTATIONS OF ANY KIND, EITHER
> EXPRESS OR IMPLIED.
> +
> +**/
> +
> +#ifndef PLATFORM_H__
> +#define PLATFORM_H__
> +
> +#define GTDT_GLOBAL_FLAGS_MAPPED \
> +
> EFI_ACPI_6_2_GTDT_GLOBAL_FLAG_MEMORY_MAPPED_BLOCK_PRESENT
> +#define GTDT_GLOBAL_FLAGS_NOT_MAPPED 0
> +#define GTDT_GLOBAL_FLAGS_EDGE \
> + EFI_ACPI_6_2_GTDT_GLOBAL_FLAG_INTERRUPT_MODE
> +#define GTDT_GLOBAL_FLAGS_LEVEL 0
> +
> +/*
> + Note: We could have a build flag that switches between memory
> + mapped/non-memory mapped timer
> +*/
> +#ifdef SYSTEM_COUNTER_BASE_ADDRESS
> +#define GTDT_GLOBAL_FLAGS (GTDT_GLOBAL_FLAGS_MAPPED | \
> + GTDT_GLOBAL_FLAGS_LEVEL)
> +#else
> +#define GTDT_GLOBAL_FLAGS
> (GTDT_GLOBAL_FLAGS_NOT_MAPPED | \
> + GTDT_GLOBAL_FLAGS_LEVEL)
> +#define SYSTEM_COUNTER_BASE_ADDRESS 0xFFFFFFFFFFFFFFFF
> +#define SYSTEM_COUNTER_READ_BASE 0xFFFFFFFFFFFFFFFF
> +#endif
> +
> +#define GTDT_TIMER_EDGE_TRIGGERED \
> + EFI_ACPI_6_2_GTDT_TIMER_FLAG_TIMER_INTERRUPT_MODE
> +#define GTDT_TIMER_LEVEL_TRIGGERED 0
> +#define GTDT_TIMER_ACTIVE_LOW \
> + EFI_ACPI_6_2_GTDT_TIMER_FLAG_TIMER_INTERRUPT_POLARITY
> +#define GTDT_TIMER_ACTIVE_HIGH 0
> +
> +#define GTDT_GTIMER_FLAGS (GTDT_TIMER_ACTIVE_LOW | \
> + GTDT_TIMER_LEVEL_TRIGGERED)
> +
> +// Watchdog
> +#define SBSA_WATCHDOG_EDGE_TRIGGERED \
> +
> EFI_ACPI_6_2_GTDT_SBSA_GENERIC_WATCHDOG_FLAG_TIMER_INTERRUP
> T_MODE
> +#define SBSA_WATCHDOG_LEVEL_TRIGGERED 0
> +#define SBSA_WATCHDOG_ACTIVE_LOW \
> +
> EFI_ACPI_6_2_GTDT_SBSA_GENERIC_WATCHDOG_FLAG_TIMER_INTERRUP
> T_POLARITY
> +#define SBSA_WATCHDOG_ACTIVE_HIGH 0
> +#define SBSA_WATCHDOG_SECURE \
> +
> EFI_ACPI_6_2_GTDT_SBSA_GENERIC_WATCHDOG_FLAG_SECURE_TIMER
> +#define SBSA_WATCHDOG_NON_SECURE 0
> +
> +#define SBSA_WATCHDOG_FLAGS
> (SBSA_WATCHDOG_NON_SECURE | \
> + SBSA_WATCHDOG_ACTIVE_HIGH | \
> + SBSA_WATCHDOG_EDGE_TRIGGERED)
> +
> +#endif // PLATFORM_H__
> +
> diff --git
> a/Platform/ARM/JunoPkg/ConfigurationManager/PlatformASLTablesLib/Ds
> dt.asl
> b/Platform/ARM/JunoPkg/ConfigurationManager/PlatformASLTablesLib/Ds
> dt.asl
> new file mode 100644
> index
> 0000000000000000000000000000000000000000..b057689fc61fd4a4097
> c41b0eec35b1e08224d64
> --- /dev/null
> +++
> b/Platform/ARM/JunoPkg/ConfigurationManager/PlatformASLTablesLib/Ds
> dt.asl
> @@ -0,0 +1,306 @@
> +/** @file
> + Differentiated System Description Table Fields (DSDT)
> +
> + Copyright (c) 2014-2017, ARM Ltd. All rights reserved.<BR>
> + This program and the accompanying materials
> + are licensed and made available under the terms and conditions of the
> BSD License
> + which accompanies this distribution. The full text of the license may be
> found at
> + http://opensource.org/licenses/bsd-license.php
> +
> + THE PROGRAM IS DISTRIBUTED UNDER THE BSD LICENSE ON AN "AS IS"
> BASIS,
> + WITHOUT WARRANTIES OR REPRESENTATIONS OF ANY KIND, EITHER
> EXPRESS OR IMPLIED.
> +
> +**/
> +
> +#include "ArmPlatform.h"
> +
> +DefinitionBlock("DsdtTable.aml", "DSDT", 1, "ARMLTD", "ARM-JUNO",
> EFI_ACPI_ARM_OEM_REVISION) {
> + Scope(_SB) {
> +#ifdef DISABLE_LPI
> + //
> + // Processor
> + //
> + Device(CPU0) {
> + Name(_HID, "ACPI0007")
> + Name(_UID, Zero)
> + }
> + Device(CPU1) {
> + Name(_HID, "ACPI0007")
> + Name(_UID, One)
> + }
> + Device(CPU2) {
> + Name(_HID, "ACPI0007")
> + Name(_UID, 2)
> + }
> + Device(CPU3) {
> + Name(_HID, "ACPI0007")
> + Name(_UID, 3)
> + }
> + Device(CPU4) {
> + Name(_HID, "ACPI0007")
> + Name(_UID, 4)
> + }
> + Device(CPU5) {
> + Name(_HID, "ACPI0007")
> + Name(_UID, 5)
> + }
> +#else
> + //
> + // A57x2-A53x4 Processor declaration
> + //
> + Method (_OSC, 4, Serialized) { // _OSC: Operating System Capabilities
> + CreateDWordField (Arg3, 0x00, STS0)
> + CreateDWordField (Arg3, 0x04, CAP0)
> + If ((Arg0 == ToUUID ("0811b06e-4a27-44f9-8d60-3cbbc22e7b48") /*
> Platform-wide Capabilities */)) {
> + If (!(Arg1 == One)) {
> + STS0 &= ~0x1F
> + STS0 |= 0x0A
> + } Else {
> + If ((CAP0 & 0x100)) {
> + CAP0 &= ~0x100 /* No support for OS Initiated LPI */
> + STS0 &= ~0x1F
> + STS0 |= 0x12
> + }
> + }
> + } Else {
> + STS0 &= ~0x1F
> + STS0 |= 0x06
> + }
> + Return (Arg3)
> + }
> + Device (CLU0) { // Cluster0 state
> + Name(_HID, "ACPI0010")
> + Name(_UID, 1)
> + Name (_LPI, Package() {
> + 0, // Version
> + 0, // Level Index
> + 1, // Count
> + Package() { // Power Gating state for Cluster
> + 2500, // Min residency (uS)
> + 1150, // Wake latency (uS)
> + 1, // Flags
> + 1, // Arch Context Flags
> + 100, //Residency Counter Frequency
> + 0, // No Parent State
> + 0x01000000, // Integer Entry method
> + ResourceTemplate() { // Null Residency Counter
> + Register (SystemMemory, 0, 0, 0, 0)
> + },
> + ResourceTemplate() { // Null Usage Counter
> + Register (SystemMemory, 0, 0, 0, 0)
> + },
> + "CluPwrDn"
> + },
> + })
> + Name(PLPI, Package() {
> + 0, // Version
> + 1, // Level Index
> + 2, // Count
> + Package() { // WFI for CPU
> + 1, // Min residency (uS)
> + 1, // Wake latency (uS)
> + 1, // Flags
> + 0, // Arch Context Flags
> + 100, //Residency Counter Frequency
> + 0, // No parent state
> + ResourceTemplate () {
> + // Register Entry method
> + Register (FFixedHW,
> + 0x20, // Bit Width
> + 0x00, // Bit Offset
> + 0xFFFFFFFF, // Address
> + 0x03, // Access Size
> + )
> + },
> + ResourceTemplate() { // Null Residency Counter
> + Register (SystemMemory, 0, 0, 0, 0)
> + },
> + ResourceTemplate() { // Null Usage Counter
> + Register (SystemMemory, 0, 0, 0, 0)
> + },
> + "WFI",
> + },
> + Package() { // Power Gating state for CPU
> + 150, // Min residency (uS)
> + 350, // Wake latency (uS)
> + 1, // Flags
> + 1, // Arch Context Flags
> + 100, //Residency Counter Frequency
> + 1, // Parent node can be in any state
> + ResourceTemplate () {
> + // Register Entry method
> + Register (FFixedHW,
> + 0x20, // Bit Width
> + 0x00, // Bit Offset
> + 0x00010000, // Address
> + 0x03, // Access Size
> + )
> + },
> + ResourceTemplate() { // Null Residency Counter
> + Register (SystemMemory, 0, 0, 0, 0)
> + },
> + ResourceTemplate() { // Null Usage Counter
> + Register (SystemMemory, 0, 0, 0, 0)
> + },
> + "CorePwrDn"
> + },
> + })
> + Device(CPU0) { // A57-0: Cluster 0, Cpu 0
> + Name(_HID, "ACPI0007")
> + Name(_UID, 4)
> + Method (_LPI, 0, NotSerialized) {
> + return(PLPI)
> + }
> + }
> + Device(CPU1) { // A57-1: Cluster 0, Cpu 1
> + Name(_HID, "ACPI0007")
> + Name(_UID, 5)
> + Method (_LPI, 0, NotSerialized) {
> + return(PLPI)
> + }
> + }
> + }
> + Device (CLU1) { // Cluster1 state
> + Name(_HID, "ACPI0010")
> + Name(_UID, 2)
> + Name (_LPI, Package() {
> + 0, // Version
> + 0, // Level Index
> + 1, // Count
> + Package() { // Power Gating state for Cluster
> + 2500, // Min residency (uS)
> + 1150, // Wake latency (uS)
> + 1, // Flags
> + 1, // Arch Context Flags
> + 100, //Residency Counter Frequency
> + 0, // No Parent State
> + 0x01000000, // Integer Entry method
> + ResourceTemplate() { // Null Residency Counter
> + Register (SystemMemory, 0, 0, 0, 0)
> + },
> + ResourceTemplate() { // Null Usage Counter
> + Register (SystemMemory, 0, 0, 0, 0)
> + },
> + "CluPwrDn"
> + },
> + })
> + Name(PLPI, Package() {
> + 0, // Version
> + 1, // Level Index
> + 2, // Count
> + Package() { // WFI for CPU
> + 1, // Min residency (uS)
> + 1, // Wake latency (uS)
> + 1, // Flags
> + 0, // Arch Context Flags
> + 100, //Residency Counter Frequency
> + 0, // No parent state
> + ResourceTemplate () {
> + // Register Entry method
> + Register (FFixedHW,
> + 0x20, // Bit Width
> + 0x00, // Bit Offset
> + 0xFFFFFFFF, // Address
> + 0x03, // Access Size
> + )
> + },
> + ResourceTemplate() { // Null Residency Counter
> + Register (SystemMemory, 0, 0, 0, 0)
> + },
> + ResourceTemplate() { // Null Usage Counter
> + Register (SystemMemory, 0, 0, 0, 0)
> + },
> + "WFI",
> + },
> + Package() { // Power Gating state for CPU
> + 150, // Min residency (uS)
> + 350, // Wake latency (uS)
> + 1, // Flags
> + 1, // Arch Context Flags
> + 100, //Residency Counter Frequency
> + 1, // Parent node can be in any state
> + ResourceTemplate () {
> + // Register Entry method
> + Register (FFixedHW,
> + 0x20, // Bit Width
> + 0x00, // Bit Offset
> + 0x00010000, // Address
> + 0x03, // Access Size
> + )
> + },
> + ResourceTemplate() { // Null Residency Counter
> + Register (SystemMemory, 0, 0, 0, 0)
> + },
> + ResourceTemplate() { // Null Usage Counter
> + Register (SystemMemory, 0, 0, 0, 0)
> + },
> + "CorePwrDn"
> + },
> + })
> + Device(CPU2) { // A53-0: Cluster 1, Cpu 0
> + Name(_HID, "ACPI0007")
> + Name(_UID, 0)
> + Method (_LPI, 0, NotSerialized) {
> + return(PLPI)
> + }
> + }
> + Device(CPU3) { // A53-1: Cluster 1, Cpu 1
> + Name(_HID, "ACPI0007")
> + Name(_UID, 1)
> + Method (_LPI, 0, NotSerialized) {
> + return(PLPI)
> + }
> + }
> + Device(CPU4) { // A53-2: Cluster 1, Cpu 2
> + Name(_HID, "ACPI0007")
> + Name(_UID, 2)
> + Method (_LPI, 0, NotSerialized) {
> + return(PLPI)
> + }
> + }
> + Device(CPU5) { // A53-3: Cluster 1, Cpu 3
> + Name(_HID, "ACPI0007")
> + Name(_UID, 3)
> + Method (_LPI, 0, NotSerialized) {
> + return(PLPI)
> + }
> + }
> + }
> +#endif
> +
> + //
> + // Keyboard and Mouse
> + //
> + Device(KMI0) {
> + Name(_HID, "ARMH0501")
> + Name(_CID, "PL050_KBD")
> + Name(_CRS, ResourceTemplate() {
> + Memory32Fixed(ReadWrite, 0x1C060008, 0x4)
> + Memory32Fixed(ReadWrite, 0x1C060000, 0x4)
> + Memory32Fixed(ReadOnly, 0x1C060004, 0x4)
> + Interrupt(ResourceConsumer, Level, ActiveHigh, Exclusive) { 197 }
> + })
> + }
> +
> + //
> + // LAN9118 Ethernet
> + //
> + Device(ETH0) {
> + Name(_HID, "ARMH9118")
> + Name(_UID, Zero)
> + Name(_CRS, ResourceTemplate() {
> + Memory32Fixed(ReadWrite, 0x18000000, 0x1000)
> + Interrupt(ResourceConsumer, Level, ActiveHigh, Exclusive) { 192 }
> + })
> + Name(_DSD, Package() {
> + ToUUID("daffd814-6eba-4d8c-8a91-bc9bbf4aa301"),
> + Package() {
> + Package(2) {"phy-mode", "mii"},
> + Package(2) {"reg-io-width", 4 },
> + Package(2) {"smsc,irq-active-high",1},
> + Package(2) {"smsc,irq-push-pull",1}
> + }
> + }) // _DSD()
> + }
> + } // Scope(_SB)
> +}
> diff --git
> a/Platform/ARM/JunoPkg/ConfigurationManager/PlatformASLTablesLib/Pl
> atformASLTablesLib.inf
> b/Platform/ARM/JunoPkg/ConfigurationManager/PlatformASLTablesLib/Pl
> atformASLTablesLib.inf
> new file mode 100644
> index
> 0000000000000000000000000000000000000000..4b6e48d3efcd3ceb094
> c4b291eaa4c3060e93b92
> --- /dev/null
> +++
> b/Platform/ARM/JunoPkg/ConfigurationManager/PlatformASLTablesLib/Pl
> atformASLTablesLib.inf
> @@ -0,0 +1,44 @@
> +## @file
> +#
> +# Copyright (c) 2017 - 2018, ARM Limited. All rights reserved.
> +#
> +# This program and the accompanying materials
> +# are licensed and made available under the terms and conditions of the
> BSD License
> +# which accompanies this distribution. The full text of the license may be
> found at
> +# http://opensource.org/licenses/bsd-license.php
> +#
> +# THE PROGRAM IS DISTRIBUTED UNDER THE BSD LICENSE ON AN "AS IS"
> BASIS,
> +# WITHOUT WARRANTIES OR REPRESENTATIONS OF ANY KIND, EITHER
> EXPRESS OR IMPLIED.
> +##
> +
> +[Defines]
> + INF_VERSION = 0x00010019
> + BASE_NAME = JunoAslTablesLib
> + FILE_GUID = 557004DB-DF45-426B-9E5E-1E8ABAA2EE2C
> + MODULE_TYPE = DXE_DRIVER
> + VERSION_STRING = 1.0
> + LIBRARY_CLASS = PlatformAslTablesLib|DXE_DRIVER
> +
> +#
> +# The following information is for reference only and not required by the
> build tools.
> +#
> +# VALID_ARCHITECTURES = ARM AARCH64
> +#
> +
> +[Sources]
> + Dsdt.asl
> + SsdtJunoUsb.asl
> + SsdtPci.asl
> + SsdtUart.asl
> +
> +[Packages]
> + ArmPkg/ArmPkg.dec
> + ArmPlatformPkg/ArmPlatformPkg.dec
> + MdePkg/MdePkg.dec
> + MdeModulePkg/MdeModulePkg.dec
> + Platform/ARM/JunoPkg/ArmJuno.dec
> + Platform/ARM/VExpressPkg/ArmVExpressPkg.dec
> +
> +[FixedPcd]
> + gEfiMdeModulePkgTokenSpaceGuid.PcdSerialRegisterBase
> + gArmPlatformTokenSpaceGuid.PL011UartInterrupt
> diff --git
> a/Platform/ARM/JunoPkg/ConfigurationManager/PlatformASLTablesLib/Ss
> dtJunoUsb.asl
> b/Platform/ARM/JunoPkg/ConfigurationManager/PlatformASLTablesLib/Ss
> dtJunoUsb.asl
> new file mode 100644
> index
> 0000000000000000000000000000000000000000..b5dfb07dfbbff26967e
> 099f3acd61d3bcb179e2f
> --- /dev/null
> +++
> b/Platform/ARM/JunoPkg/ConfigurationManager/PlatformASLTablesLib/Ss
> dtJunoUsb.asl
> @@ -0,0 +1,122 @@
> +/** @file
> + SSDT for Juno USB
> +
> + Copyright (c) 2014-2017, ARM Ltd. All rights reserved.<BR>
> + This program and the accompanying materials
> + are licensed and made available under the terms and conditions of the
> BSD License
> + which accompanies this distribution. The full text of the license may be
> found at
> + http://opensource.org/licenses/bsd-license.php
> +
> + THE PROGRAM IS DISTRIBUTED UNDER THE BSD LICENSE ON AN "AS IS"
> BASIS,
> + WITHOUT WARRANTIES OR REPRESENTATIONS OF ANY KIND, EITHER
> EXPRESS OR IMPLIED.
> +
> +**/
> +
> +#include "ArmPlatform.h"
> +
> +DefinitionBlock("SsdtJunoUSB.aml", "SSDT", 1, "ARMLTD", "ARM-JUNO",
> EFI_ACPI_ARM_OEM_REVISION) {
> + Scope(_SB) {
> +
> + //
> + // USB EHCI Host Controller
> + //
> + Device(USB0) {
> + Name(_HID, "ARMH0D20")
> + Name(_CID, "PNP0D20")
> + Name(_UID, 2)
> +
> + Name(_CCA, ZERO) // Cache-incoherent bus-master
> +
> + Method(_CRS, 0x0, Serialized){
> + Name(RBUF, ResourceTemplate(){
> + Memory32Fixed(ReadWrite, 0x7FFC0000, 0x000000B0) //
> 0x7FFC0000 is the Juno SoC USB EHCI controller base address
> + Interrupt(ResourceConsumer, Level, ActiveHigh, Exclusive) {149} //
> INT ID=149 GIC IRQ ID=117 for Juno SoC USB EHCI Controller
> + })
> + Return(RBUF)
> + }
> +
> + //
> + // Root Hub
> + //
> + Device(RHUB) {
> + Name(_ADR, Zero) // Address of Root Hub should be 0 as per ACPI
> 5.0 spec
> +
> + //
> + // Ports connected to Root Hub
> + //
> + Device(HUB1) {
> + Name(_ADR, One)
> + Name(_UPC, Package(){
> + Zero, // Port is NOT connectable
> + 0xFF, // Don't care
> + Zero, // Reserved 0 must be zero
> + Zero // Reserved 1 must be zero
> + })
> +
> + Device(PRT1) {
> + Name(_ADR, One)
> + Name(_UPC, Package(){
> + 0xFF, // Port is connectable
> + Zero, // Port connector is A
> + Zero,
> + Zero
> + })
> + Name(_PLD, Package(One) {
> + Buffer(0x10){
> + 0x81, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00,
> + 0x31, 0x1C, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00
> + }
> + })
> + } // USB0_RHUB_HUB1_PRT1
> + Device(PRT2) {
> + Name(_ADR, 0x00000002)
> + Name(_UPC, Package() {
> + 0xFF, // Port is connectable
> + Zero, // Port connector is A
> + Zero,
> + Zero
> + })
> + Name(_PLD, Package(One) {
> + Buffer(0x10){
> + 0x81, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00,
> + 0x31, 0x1C, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00
> + }
> + })
> + } // USB0_RHUB_HUB1_PRT2
> +
> + Device(PRT3) {
> + Name(_ADR, 0x00000003)
> + Name(_UPC, Package() {
> + 0xFF, // Port is connectable
> + Zero, // Port connector is A
> + Zero,
> + Zero
> + })
> + Name(_PLD, Package(One) {
> + Buffer(0x10){
> + 0x81, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00,
> + 0x31, 0x1C, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00
> + }
> + })
> + } // USB0_RHUB_HUB1_PRT3
> +
> + Device(PRT4) {
> + Name(_ADR, 0x00000004)
> + Name(_UPC, Package(){
> + 0xFF, // Port is connectable
> + Zero, // Port connector is A
> + Zero,
> + Zero
> + })
> + Name(_PLD, Package(One) {
> + Buffer(0x10){
> + 0x81, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00,
> + 0x31, 0x1C, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00
> + }
> + })
> + } // USB0_RHUB_HUB1_PRT4
> + } // USB0_RHUB_HUB1
> + } // USB0_RHUB
> + } // USB0
> + }
> +}
> diff --git
> a/Platform/ARM/JunoPkg/ConfigurationManager/PlatformASLTablesLib/Ss
> dtPci.asl
> b/Platform/ARM/JunoPkg/ConfigurationManager/PlatformASLTablesLib/Ss
> dtPci.asl
> new file mode 100644
> index
> 0000000000000000000000000000000000000000..2d47b4dfc013a9830b
> 9e1d8fc51c9794f24ad379
> --- /dev/null
> +++
> b/Platform/ARM/JunoPkg/ConfigurationManager/PlatformASLTablesLib/Ss
> dtPci.asl
> @@ -0,0 +1,218 @@
> +/** @file
> + SSDT for Juno PCIe
> +
> + Copyright (c) 2014-2017, ARM Ltd. All rights reserved.<BR>
> + This program and the accompanying materials
> + are licensed and made available under the terms and conditions of the
> BSD License
> + which accompanies this distribution. The full text of the license may be
> found at
> + http://opensource.org/licenses/bsd-license.php
> +
> + THE PROGRAM IS DISTRIBUTED UNDER THE BSD LICENSE ON AN "AS IS"
> BASIS,
> + WITHOUT WARRANTIES OR REPRESENTATIONS OF ANY KIND, EITHER
> EXPRESS OR IMPLIED.
> +
> +**/
> +
> +#include "ArmPlatform.h"
> +
> +/*
> + See ACPI 6.1 Section 6.2.13
> +
> + There are two ways that _PRT can be used. ...
> +
> + In the first model, a PCI Link device is used to provide additional
> + configuration information such as whether the interrupt is Level or
> + Edge triggered, it is active High or Low, Shared or Exclusive, etc.
> +
> + In the second model, the PCI interrupts are hardwired to specific
> + interrupt inputs on the interrupt controller and are not
> + configurable. In this case, the Source field in _PRT does not
> + reference a device, but instead contains the value zero, and the
> + Source Index field contains the global system interrupt to which the
> + PCI interrupt is hardwired.
> +
> + We use the first model with link indirection to set the correct
> + interrupt type as PCI defaults (Level Triggered, Active Low) are not
> + compatible with GICv2.
> +*/
> +#define LNK_DEVICE(Unique_Id, Link_Name, irq)
> \
> + Device(Link_Name) { \
> + Name(_HID, EISAID("PNP0C0F")) \
> + Name(_UID, Unique_Id) \
> + Name(_PRS, ResourceTemplate() { \
> + Interrupt(ResourceProducer, Level, ActiveHigh, Exclusive) { irq }
> \
> + }) \
> + Method (_CRS, 0) { Return (_PRS) } \
> + Method (_SRS, 1) { } \
> + Method (_DIS) { } \
> + }
> +
> +#define PRT_ENTRY(Address, Pin, Link) \
> + Package (4) { \
> + Address, /* uses the same format as _ADR */
> \
> + Pin, /* The PCI pin number of the device (0-INTA, 1-INTB, 2-INTC,
> 3-INTD). */ \
> + Link, /* Interrupt allocated via Link device. */
> \
> + Zero /* global system interrupt number (no used) */
> \
> + }
> +
> +/*
> + See Reference [1] 6.1.1
> + "High word–Device #, Low word–Function #. (for example, device 3,
> function 2 is
> + 0x00030002). To refer to all the functions on a device #, use a function
> number of FFFF)."
> +*/
> +#define ROOT_PRT_ENTRY(Pin, Link) PRT_ENTRY(0x0000FFFF, Pin, Link)
> + // Device 0 for Bridge.
> +
> +DefinitionBlock("SsdtPci.aml", "SSDT", 1, "ARMLTD", "ARM-JUNO",
> EFI_ACPI_ARM_OEM_REVISION) {
> + Scope(_SB) {
> + //
> + // PCI Root Complex
> + //
> + LNK_DEVICE(1, LNKA, 168)
> + LNK_DEVICE(2, LNKB, 169)
> + LNK_DEVICE(3, LNKC, 170)
> + LNK_DEVICE(4, LNKD, 171)
> +
> + Device(PCI0)
> + {
> + Name(_HID, EISAID("PNP0A08")) // PCI Express Root Bridge
> + Name(_CID, EISAID("PNP0A03")) // Compatible PCI Root Bridge
> + Name(_SEG, Zero) // PCI Segment Group number
> + Name(_BBN, Zero) // PCI Base Bus Number
> + Name(_CCA, 1) // Initially mark the PCI coherent (for JunoR1)
> +
> + // Root Complex 0
> + Device (RP0) {
> + Name(_ADR, 0xF0000000) // Dev 0, Func 0
> + }
> +
> + // PCI Routing Table
> + Name(_PRT, Package() {
> + ROOT_PRT_ENTRY(0, LNKA), // INTA
> + ROOT_PRT_ENTRY(1, LNKB), // INTB
> + ROOT_PRT_ENTRY(2, LNKC), // INTC
> + ROOT_PRT_ENTRY(3, LNKD), // INTD
> + })
> + // Root complex resources
> + Method (_CRS, 0, Serialized) {
> + Name (RBUF, ResourceTemplate () {
> + WordBusNumber ( // Bus numbers assigned to this root
> + ResourceProducer,
> + MinFixed, MaxFixed, PosDecode,
> + 0, // AddressGranularity
> + 0, // AddressMinimum - Minimum Bus Number
> + 255, // AddressMaximum - Maximum Bus Number
> + 0, // AddressTranslation - Set to 0
> + 256 // RangeLength - Number of Busses
> + )
> +
> + DWordMemory ( // 32-bit BAR Windows
> + ResourceProducer, PosDecode,
> + MinFixed, MaxFixed,
> + Cacheable, ReadWrite,
> + 0x00000000, //
> Granularity
> + 0x50000000, //
> Min Base Address
> + 0x57FFFFFF, //
> Max Base Address
> + 0x00000000, //
> Translate
> + 0x08000000 //
> Length
> + )
> +
> + QWordMemory ( // 64-bit BAR Windows
> + ResourceProducer, PosDecode,
> + MinFixed, MaxFixed,
> + Cacheable, ReadWrite,
> + 0x00000000, //
> Granularity
> + 0x4000000000, //
> Min Base Address
> + 0x40FFFFFFFF, //
> Max Base Address
> + 0x00000000, //
> Translate
> + 0x100000000
> // Length
> + )
> +
> + DWordIo ( // IO window
> + ResourceProducer,
> + MinFixed,
> + MaxFixed,
> + PosDecode,
> + EntireRange,
> + 0x00000000, //
> Granularity
> + 0x00000000, //
> Min Base Address
> + 0x007fffff, // Max
> Base Address
> + 0x5f800000, //
> Translate
> + 0x00800000, //
> Length
> + ,,,TypeTranslation
> + )
> + }) // Name(RBUF)
> +
> + Return (RBUF)
> + } // Method(_CRS)
> +
> + //
> + // OS Control Handoff
> + //
> + Name(SUPP, Zero) // PCI _OSC Support Field value
> + Name(CTRL, Zero) // PCI _OSC Control Field value
> +
> + /*
> + See [1] 6.2.10, [2] 4.5
> + */
> + Method(_OSC,4) {
> + // Check for proper UUID
> + If(LEqual(Arg0,ToUUID("33DB4D5B-1FF7-401C-9657-
> 7441C03DD766"))) {
> + // Create DWord-adressable fields from the Capabilities
> Buffer
> + CreateDWordField(Arg3,0,CDW1)
> + CreateDWordField(Arg3,4,CDW2)
> + CreateDWordField(Arg3,8,CDW3)
> +
> + // Save Capabilities DWord2 & 3
> + Store(CDW2,SUPP)
> + Store(CDW3,CTRL)
> +
> + // Only allow native hot plug control if OS supports:
> + // * ASPM
> + // * Clock PM
> + // * MSI/MSI-X
> + If(LNotEqual(And(SUPP, 0x16), 0x16)) {
> + And(CTRL,0x1E,CTRL) // Mask bit 0 (and undefined
> bits)
> + }
> +
> + // Always allow native PME, AER (no dependencies)
> +
> + // Never allow SHPC (no SHPC controller in this system)
> + And(CTRL,0x1D,CTRL)
> +
> +#if 0
> + If(LNot(And(CDW1,1))) { // Query flag clear?
> + // Disable GPEs for features granted native control.
> + If(And(CTRL,0x01)) { // Hot plug control granted?
> + Store(0,HPCE) // clear the hot plug SCI
> enable bit
> + Store(1,HPCS) // clear the hot plug SCI
> status bit
> + }
> + If(And(CTRL,0x04)) { // PME control granted?
> + Store(0,PMCE) // clear the PME SCI
> enable bit
> + Store(1,PMCS) // clear the PME SCI
> status bit
> + }
> + If(And(CTRL,0x10)) { // OS restoring PCIe cap
> structure?
> + // Set status to not restore PCIe cap structure
> + // upon resume from S3
> + Store(1,S3CR)
> + }
> + }
> +#endif
> +
> + If(LNotEqual(Arg1,One)) { // Unknown revision
> + Or(CDW1,0x08,CDW1)
> + }
> +
> + If(LNotEqual(CDW3,CTRL)) { // Capabilities bits were
> masked
> + Or(CDW1,0x10,CDW1)
> + }
> + // Update DWORD3 in the buffer
> + Store(CTRL,CDW3)
> + Return(Arg3)
> + } Else {
> + Or(CDW1,4,CDW1) // Unrecognized UUID
> + Return(Arg3)
> + }
> + } // End _OSC
> + } // PCI0
> + }
> +}
> diff --git
> a/Platform/ARM/JunoPkg/ConfigurationManager/PlatformASLTablesLib/Ss
> dtUart.asl
> b/Platform/ARM/JunoPkg/ConfigurationManager/PlatformASLTablesLib/Ss
> dtUart.asl
> new file mode 100644
> index
> 0000000000000000000000000000000000000000..d3932f272d1b8a81e7
> 7dc5c339ab75ada0e9d3ea
> --- /dev/null
> +++
> b/Platform/ARM/JunoPkg/ConfigurationManager/PlatformASLTablesLib/Ss
> dtUart.asl
> @@ -0,0 +1,48 @@
> +/** @file
> + SSDT for UART
> +
> + Copyright (c) 2014-2017, ARM Ltd. All rights reserved.<BR>
> + This program and the accompanying materials
> + are licensed and made available under the terms and conditions of the
> BSD License
> + which accompanies this distribution. The full text of the license may be
> found at
> + http://opensource.org/licenses/bsd-license.php
> +
> + THE PROGRAM IS DISTRIBUTED UNDER THE BSD LICENSE ON AN "AS IS"
> BASIS,
> + WITHOUT WARRANTIES OR REPRESENTATIONS OF ANY KIND, EITHER
> EXPRESS OR IMPLIED.
> +
> +**/
> +#include "ArmPlatform.h"
> +
> +DefinitionBlock("SsdtUart.aml", "SSDT", 1, "ARMLTD", "ARM-JUNO",
> EFI_ACPI_ARM_OEM_REVISION) {
> + Scope(_SB) {
> + // UART PL011
> + Device(COM2) {
> + Name(_HID, "ARMH0011")
> + Name(_CID, "PL011")
> + Name(_UID, Zero)
> +
> + Method(_STA) {
> + Return(0xF)
> + }
> +
> + Method(_CRS, 0x0, NotSerialized) {
> + Name(RBUF, ResourceTemplate() {
> + Memory32Fixed(
> + ReadWrite,
> + FixedPcdGet64 (PcdSerialRegisterBase),
> + 0x1000
> + )
> + Interrupt(
> + ResourceConsumer,
> + Level,
> + ActiveHigh,
> + Exclusive
> + ) {
> + FixedPcdGet32 (PL011UartInterrupt)
> + }
> + })
> + Return (RBUF)
> + }
> + }
> + }
> +}
> diff --git a/Platform/ARM/JunoPkg/Drivers/ArmJunoDxe/ArmJunoDxe.c
> b/Platform/ARM/JunoPkg/Drivers/ArmJunoDxe/ArmJunoDxe.c
> index
> 18491c7378523f365644658c270de95e711c5ac1..0a42d21d4e9b60824f1d
> 313a4d5ad9e4bc6db3aa 100644
> --- a/Platform/ARM/JunoPkg/Drivers/ArmJunoDxe/ArmJunoDxe.c
> +++ b/Platform/ARM/JunoPkg/Drivers/ArmJunoDxe/ArmJunoDxe.c
> @@ -1,6 +1,6 @@
> /** @file
> *
> -* Copyright (c) 2013-2015, ARM Limited. All rights reserved.
> +* Copyright (c) 2013-2017, ARM Limited. All rights reserved.
> *
> * This program and the accompanying materials
> * are licensed and made available under the terms and conditions of the
> BSD License
> @@ -33,9 +33,10 @@
> #include <Library/IoLib.h>
> #include <Library/PrintLib.h>
>
> -
> +#ifndef DYNAMIC_TABLES_FRAMEWORK
> // This GUID must match the FILE_GUID in
> ArmPlatformPkg/ArmJunoPkg/AcpiTables/AcpiTables.inf
> STATIC CONST EFI_GUID mJunoAcpiTableFile = { 0xa1dd808e, 0x1e95,
> 0x4399, { 0xab, 0xc0, 0x65, 0x3c, 0x82, 0xe8, 0x53, 0x0c } };
> +#endif
>
> typedef struct {
> ACPI_HID_DEVICE_PATH AcpiDevicePath;
> @@ -487,11 +488,13 @@ ArmJunoEntryPoint (
>
> GetJunoRevision(JunoRevision);
>
> +#ifndef DYNAMIC_TABLES_FRAMEWORK
> //
> // Try to install the ACPI Tables
> //
> Status = LocateAndInstallAcpiFromFv (&mJunoAcpiTableFile);
> ASSERT_EFI_ERROR (Status);
> +#endif
>
> //
> // Setup R1/R2 options if not already done.
> @@ -516,6 +519,7 @@ ArmJunoEntryPoint (
> &EndOfDxeEvent
> );
>
> +#ifndef DYNAMIC_TABLES_FRAMEWORK
> // Declare the related ACPI Tables
> EfiCreateProtocolNotifyEvent (
> &gEfiAcpiTableProtocolGuid,
> @@ -524,6 +528,7 @@ ArmJunoEntryPoint (
> NULL,
> &mAcpiRegistration
> );
> +#endif
> }
>
> //
> --
> 'Guid(CE165669-3EF3-493F-B85D-6190EE5B9759)'
>
^ permalink raw reply [flat|nested] 6+ messages in thread
* Re: [PATCH 2/2][platforms/dynamictables] Platform/ARM: Dynamic Tables support for FVP
2018-03-19 15:21 ` [PATCH 2/2][platforms/dynamictables] Platform/ARM: Dynamic Tables support for FVP Sami Mujawar
@ 2018-03-19 16:13 ` Evan Lloyd
0 siblings, 0 replies; 6+ messages in thread
From: Evan Lloyd @ 2018-03-19 16:13 UTC (permalink / raw)
To: Sami Mujawar, edk2-devel@lists.01.org
Cc: Arvind Chauhan, Daniil Egranov, Thomas Abraham,
leif.lindholm@linaro.org, Matteo Carlini, Stephanie Hughes-Fitt,
nd
> -----Original Message-----
> From: Sami Mujawar [mailto:sami.mujawar@arm.com]
> Sent: 19 March 2018 15:22
> To: edk2-devel@lists.01.org
> Cc: Arvind Chauhan <Arvind.Chauhan@arm.com>; Daniil Egranov
> <Daniil.Egranov@arm.com>; Thomas Abraham
> <thomas.abraham@arm.com>; Evan Lloyd <Evan.Lloyd@arm.com>;
> leif.lindholm@linaro.org; Matteo Carlini <Matteo.Carlini@arm.com>;
> Stephanie Hughes-Fitt <Stephanie.Hughes-Fitt@arm.com>; nd
> <nd@arm.com>
> Subject: [PATCH 2/2][platforms/dynamictables] Platform/ARM: Dynamic
> Tables support for FVP
>
> The dynamic tables framework utilizes the configuration manager protocol
> to get the platform specific information required for building the firmware
> tables.
>
> The configuration manager is a platform specific component that collates
> the platform hardware information and builds an abstract platform
> configuration repository. The configuration manager also implements the
> configuration manager protocol which returns the hardware information
> requested by the table generators.
>
> This patch implements the configuration manager support for the FVP
> platform.
>
> The dynamic tables framework support is configurable and can be enabled
> using the DYNAMIC_TABLES_FRAMEWORK build option.
>
> Contributed-under: TianoCore Contribution Agreement 1.1
> Signed-off-by: Sami Mujawar <sami.mujawar@arm.com>
Reviewed-by: Evan Lloyd <evan.lloyd@arm.com>
> ---
> Platform/ARM/VExpressPkg/ArmVExpress-FVP-AArch64.dsc
> | 15 +
> Platform/ARM/VExpressPkg/ArmVExpress-FVP-AArch64.fdf
> | 16 +-
>
> Platform/ARM/VExpressPkg/ConfigurationManager/ConfigurationManager.
> dsc.inc | 31 +
>
> Platform/ARM/VExpressPkg/ConfigurationManager/ConfigurationManager
> Dxe/ConfigurationManager.c | 607 ++++++++++++++++++++
>
> Platform/ARM/VExpressPkg/ConfigurationManager/ConfigurationManager
> Dxe/ConfigurationManager.h | 172 ++++++
>
> Platform/ARM/VExpressPkg/ConfigurationManager/ConfigurationManager
> Dxe/ConfigurationManagerDxe.inf | 78 +++
>
> Platform/ARM/VExpressPkg/ConfigurationManager/ConfigurationManager
> Dxe/Platform.h | 91 +++
>
> Platform/ARM/VExpressPkg/ConfigurationManager/PlatformASLTablesLib/
> Dsdt.asl | 77 +++
>
> Platform/ARM/VExpressPkg/ConfigurationManager/PlatformASLTablesLib/
> PlatformASLTablesLib.inf | 34 ++
> 9 files changed, 1119 insertions(+), 2 deletions(-)
>
> diff --git a/Platform/ARM/VExpressPkg/ArmVExpress-FVP-AArch64.dsc
> b/Platform/ARM/VExpressPkg/ArmVExpress-FVP-AArch64.dsc
> index
> cdf9e2d49784d542701dc84eb511f592e77ec106..ed1a16b7b35d9854847e
> 3898f8061abb5261e134 100644
> --- a/Platform/ARM/VExpressPkg/ArmVExpress-FVP-AArch64.dsc
> +++ b/Platform/ARM/VExpressPkg/ArmVExpress-FVP-AArch64.dsc
> @@ -38,6 +38,10 @@ [Defines]
> DT_SUPPORT = FALSE
>
> !include Platform/ARM/VExpressPkg/ArmVExpress.dsc.inc
> +!ifdef DYNAMIC_TABLES_FRAMEWORK
> + !include DynamicTablesPkg/DynamicTables.dsc.inc
> + !include
> +Platform/ARM/VExpressPkg/ConfigurationManager/ConfigurationManage
> r.dsc.
> +inc
> +!endif
>
> [LibraryClasses.common]
> ArmLib|ArmPkg/Library/ArmLib/ArmBaseLib.inf
> @@ -128,6 +132,15 @@ [PcdsFixedAtBuild.common]
> gEfiMdeModulePkgTokenSpaceGuid.PcdSerialRegisterBase|0x1c090000
> gEfiMdePkgTokenSpaceGuid.PcdUartDefaultBaudRate|115200
> gEfiMdePkgTokenSpaceGuid.PcdUartDefaultReceiveFifoDepth|0
> + gArmPlatformTokenSpaceGuid.PL011UartInterrupt|0x25
> +
> + ## PL011 Serial Debug UART
> + gArmPlatformTokenSpaceGuid.PcdSerialDbgRegisterBase|0x1c0a0000
> + gArmPlatformTokenSpaceGuid.PcdSerialDbgUartBaudRate|115200
> + gArmPlatformTokenSpaceGuid.PcdSerialDbgUartClkInHz|24000000
> +
> + # SBSA Generic Watchdog
> + gArmTokenSpaceGuid.PcdGenericWatchdogEl2IntrNum|59
>
> ## PL031 RealTimeClock
> gArmPlatformTokenSpaceGuid.PcdPL031RtcBase|0x1C170000
> @@ -255,8 +268,10 @@ [Components.common] !endif
> }
>
> +!ifndef DYNAMIC_TABLES_FRAMEWORK
> MdeModulePkg/Universal/Acpi/AcpiPlatformDxe/AcpiPlatformDxe.inf
> Platform/ARM/VExpressPkg/AcpiTables/AcpiTables.inf
> +!endif
>
> ArmPkg/Drivers/ArmGic/ArmGicDxe.inf
> ArmPlatformPkg/Drivers/NorFlashDxe/NorFlashDxe.inf
> diff --git a/Platform/ARM/VExpressPkg/ArmVExpress-FVP-AArch64.fdf
> b/Platform/ARM/VExpressPkg/ArmVExpress-FVP-AArch64.fdf
> index
> 305e661a2bdc3ade2c16232c77769df5fc6f0c32..db164be9641cf6e315302
> 3752f60f95909ce803c 100644
> --- a/Platform/ARM/VExpressPkg/ArmVExpress-FVP-AArch64.fdf
> +++ b/Platform/ARM/VExpressPkg/ArmVExpress-FVP-AArch64.fdf
> @@ -1,5 +1,5 @@
> #
> -# Copyright (c) 2011 - 2015, ARM Limited. All rights reserved.
> +# Copyright (c) 2011 - 2018, ARM Limited. All rights reserved.
> #
> # This program and the accompanying materials # are licensed and made
> available under the terms and conditions of the BSD License @@ -97,9
> +97,19 @@ [FV.FvMain]
>
> # ACPI Support
> #
> - INF MdeModulePkg/Universal/Acpi/AcpiPlatformDxe/AcpiPlatformDxe.inf
> INF MdeModulePkg/Universal/Acpi/AcpiTableDxe/AcpiTableDxe.inf
> +!ifndef DYNAMIC_TABLES_FRAMEWORK
> + INF
> MdeModulePkg/Universal/Acpi/AcpiPlatformDxe/AcpiPlatformDxe.inf
> INF RuleOverride=ACPITABLE
> Platform/ARM/VExpressPkg/AcpiTables/AcpiTables.inf
> +!else
> + # Configuration Manager
> + INF
> +Platform/ARM/VExpressPkg/ConfigurationManager/ConfigurationManage
> rDxe/C
> +onfigurationManagerDxe.inf
> +
> + #
> + # Dynamic Table fdf
> + #
> + !include DynamicTablesPkg/DynamicTables.fdf.inc
> +!endif
>
> #
> # Multiple Console IO support
> @@ -319,8 +329,10 @@ [Rule.Common.UEFI_APPLICATION.BINARY]
> VERSION STRING="$(INF_VERSION)" Optional
> BUILD_NUM=$(BUILD_NUMBER)
> }
>
> +!ifndef DYNAMIC_TABLES_FRAMEWORK
> [Rule.Common.USER_DEFINED.ACPITABLE]
> FILE FREEFORM = $(NAMED_GUID) {
> RAW ACPI |.acpi
> RAW ASL |.aml
> }
> +!endif
> diff --git
> a/Platform/ARM/VExpressPkg/ConfigurationManager/ConfigurationManag
> er.dsc.inc
> b/Platform/ARM/VExpressPkg/ConfigurationManager/ConfigurationManag
> er.dsc.inc
> new file mode 100644
> index
> 0000000000000000000000000000000000000000..8402742ebb0249d8b5
> 85d2315e24bba2f5ecf480
> --- /dev/null
> +++
> b/Platform/ARM/VExpressPkg/ConfigurationManager/ConfigurationManag
> er
> +++ .dsc.inc
> @@ -0,0 +1,31 @@
> +## @file
> +#
> +# Copyright (c) 2017, ARM Limited. All rights reserved.
> +#
> +# This program and the accompanying materials # are licensed and made
> +available under the terms and conditions of the BSD License # which
> +accompanies this distribution. The full text of the license may be
> +found at # http://opensource.org/licenses/bsd-license.php
> +#
> +# THE PROGRAM IS DISTRIBUTED UNDER THE BSD LICENSE ON AN "AS IS"
> +BASIS, # WITHOUT WARRANTIES OR REPRESENTATIONS OF ANY KIND,
> EITHER EXPRESS OR IMPLIED.
> +##
> +
> +[Defines]
> +# [BuildOptions.common.EDKII.DXE_RUNTIME_DRIVER]
> +
> +[BuildOptions]
> +# Required for pre-processing ASL files that include ArmPlatform.h
> + *_*_*_ASLPP_FLAGS = $(PLATFORM_FLAGS)
> +
> +[LibraryClasses.common]
> +
> +[Components.common]
> + # Configuration Manager
> +
> Platform/ARM/VExpressPkg/ConfigurationManager/ConfigurationManager
> Dxe/ConfigurationManagerDxe.inf {
> + <LibraryClasses>
> + # Platform ASL Tables
> +
> +PlatformAslTablesLib|Platform/ARM/VExpressPkg/ConfigurationManager
> /Plat
> +formASLTablesLib/PlatformASLTablesLib.inf
> + <BuildOptions>
> + *_*_*_PLATFORM_FLAGS =
> +-
> I$(BIN_DIR)/Platform/ARM/VExpressPkg/ConfigurationManager/PlatformA
> SLT
> +ablesLib/PlatformASLTablesLib/OUTPUT
> + }
> diff --git
> a/Platform/ARM/VExpressPkg/ConfigurationManager/ConfigurationManag
> erDxe/ConfigurationManager.c
> b/Platform/ARM/VExpressPkg/ConfigurationManager/ConfigurationManag
> erDxe/ConfigurationManager.c
> new file mode 100644
> index
> 0000000000000000000000000000000000000000..d45528813e2db9f44e
> 1745392dfd35ffe05f1dca
> --- /dev/null
> +++
> b/Platform/ARM/VExpressPkg/ConfigurationManager/ConfigurationManag
> er
> +++ Dxe/ConfigurationManager.c
> @@ -0,0 +1,607 @@
> +/** @file
> + Configuration Manager Dxe
> +
> + Copyright (c) 2017 - 2018, ARM Limited. All rights reserved.
> +
> + This program and the accompanying materials are licensed and made
> + available under the terms and conditions of the BSD License which
> + accompanies this distribution. The full text of the license may be
> + found at http://opensource.org/licenses/bsd-license.php
> +
> + THE PROGRAM IS DISTRIBUTED UNDER THE BSD LICENSE ON AN "AS IS"
> BASIS,
> + WITHOUT WARRANTIES OR REPRESENTATIONS OF ANY KIND, EITHER
> EXPRESS OR IMPLIED.
> +
> + @par Glossary:
> + - Cm or CM - Configuration Manager
> + - Obj or OBJ - Object
> +**/
> +
> +#include <IndustryStandard/DebugPort2Table.h>
> +#include <Library/IoLib.h>
> +#include <Library/UefiBootServicesTableLib.h>
> +#include <Library/ArmLib.h>
> +#include <Library/DebugLib.h>
> +#include <Library/PcdLib.h>
> +#include <Protocol/AcpiTable.h>
> +
> +#include <ArmPlatform.h>
> +#include <AcpiTableGenerator.h>
> +#include <Protocol/ConfigurationManagerProtocol.h>
> +
> +#include "ConfigurationManager.h"
> +#include "Platform.h"
> +
> +// AML Code Include files generated by iASL Compiler #include
> +<Dsdt.hex>
> +
> +/** The platform configuration repository information.
> +*/
> +STATIC
> +EFI_PLATFORM_REPOSITORY_INFO VExpressPlatRepositoryInfo = {
> + /// Configuration Manager information
> + { CONFIGURATION_MANAGER_REVISION, CFG_MGR_OEM_ID },
> +
> + // ACPI Table List
> + {
> + // FADT Table
> + {
> + EFI_ACPI_6_2_FIXED_ACPI_DESCRIPTION_TABLE_SIGNATURE,
> + CREATE_STD_ACPI_TABLE_GEN_ID (ESTD_ACPI_TABLE_ID_FADT),
> + NULL
> + },
> + // GTDT Table
> + {
> + EFI_ACPI_6_2_GENERIC_TIMER_DESCRIPTION_TABLE_SIGNATURE,
> + CREATE_STD_ACPI_TABLE_GEN_ID (ESTD_ACPI_TABLE_ID_GTDT),
> + NULL
> + },
> + // MADT Table
> + {
> + EFI_ACPI_6_2_MULTIPLE_APIC_DESCRIPTION_TABLE_SIGNATURE,
> + CREATE_STD_ACPI_TABLE_GEN_ID (ESTD_ACPI_TABLE_ID_MADT),
> + NULL
> + },
> + // SPCR Table
> + {
> +
> EFI_ACPI_6_2_SERIAL_PORT_CONSOLE_REDIRECTION_TABLE_SIGNATURE,
> + CREATE_STD_ACPI_TABLE_GEN_ID (ESTD_ACPI_TABLE_ID_SPCR),
> + NULL
> + },
> + // DSDT Table
> + {
> +
> EFI_ACPI_6_2_DIFFERENTIATED_SYSTEM_DESCRIPTION_TABLE_SIGNATURE,
> + CREATE_STD_ACPI_TABLE_GEN_ID (ESTD_ACPI_TABLE_ID_DSDT),
> + (EFI_ACPI_DESCRIPTION_HEADER*)dsdt_AmlCode
> + },
> + // DBG2 Table
> + {
> + EFI_ACPI_6_2_DEBUG_PORT_2_TABLE_SIGNATURE,
> + CREATE_STD_ACPI_TABLE_GEN_ID (ESTD_ACPI_TABLE_ID_DBG2),
> + NULL
> + }
> + },
> +
> + // Boot architecture information
> + { EFI_ACPI_6_2_ARM_PSCI_COMPLIANT }, // BootArchFlags
> +
> +#ifdef HEADLESS_PLATFORM
> + // Fixed feature flag information
> + { EFI_ACPI_6_2_HEADLESS }, // Fixed feature flags
> +#endif
> +
> + // Power management profile information
> + { EFI_ACPI_6_2_PM_PROFILE_ENTERPRISE_SERVER }, //
> PowerManagement Profile
> +
> + /* GIC CPU Interface information
> + GIC_ENTRY (CPUInterfaceNumber, Mpidr, PmuIrq, VGicIrq,
> + EnergyEfficiency) */ {
> + GICC_ENTRY (0, GET_MPID (0, 0), 92, 25, 0),
> + GICC_ENTRY (1, GET_MPID (0, 1), 93, 25, 0),
> + GICC_ENTRY (2, GET_MPID (0, 2), 94, 25, 0),
> + GICC_ENTRY (3, GET_MPID (0, 3), 95, 25, 0),
> +
> + GICC_ENTRY (4, GET_MPID (1, 0), 96, 25, 0),
> + GICC_ENTRY (5, GET_MPID (1, 1), 97, 25, 0),
> + GICC_ENTRY (6, GET_MPID (1, 2), 98, 25, 0),
> + GICC_ENTRY (7, GET_MPID (1, 3), 99, 25, 0) },
> +
> + // GIC Distributor Info
> + {
> + 0, // UINT32 GicId
> + FixedPcdGet64 (PcdGicDistributorBase), // UINT64
> PhysicalBaseAddress
> + 0, // UINT32 SystemVectorBase
> + 3 // UINT8 GicVersion
> + },
> +
> + /// GIC Re-Distributor Info
> + {
> + // UINT64 DiscoveryRangeBaseAddress
> + FixedPcdGet64 (PcdGicRedistributorsBase),
> + // UINT32 DiscoveryRangeLength
> + 0x00200000
> + },
> +
> + // Generic Timer Info
> + {
> + // The physical base address for the counter control frame
> + FVP_SYSTEM_TIMER_BASE_ADDRESS,
> + // The physical base address for the counter read frame
> + FVP_CNT_READ_BASE_ADDRESS,
> + // The secure PL1 timer interrupt
> + FixedPcdGet32 (PcdArmArchTimerSecIntrNum),
> + // The secure PL1 timer flags
> + FVP_GTDT_GTIMER_FLAGS,
> + // The non-secure PL1 timer interrupt
> + FixedPcdGet32 (PcdArmArchTimerIntrNum),
> + // The non-secure PL1 timer flags
> + FVP_GTDT_GTIMER_FLAGS,
> + // The virtual timer interrupt
> + FixedPcdGet32 (PcdArmArchTimerVirtIntrNum),
> + // The virtual timer flags
> + FVP_GTDT_GTIMER_FLAGS,
> + // The non-secure PL2 timer interrupt
> + FixedPcdGet32 (PcdArmArchTimerHypIntrNum),
> + // The non-secure PL2 timer flags
> + FVP_GTDT_GTIMER_FLAGS
> + },
> +
> + // Generic Timer Block Information
> + {
> + {
> + // The physical base address for the GT Block Timer structure
> + FVP_GT_BLOCK_CTL_BASE,
> + // The number of timer frames implemented in the GT Block
> + FVP_TIMER_FRAMES_COUNT,
> + // Reference token for the GT Block timer frame list
> + (CM_OBJECT_TOKEN)((UINT8*)&VExpressPlatRepositoryInfo +
> + OFFSET_OF (EFI_PLATFORM_REPOSITORY_INFO, GTBlock0TimerInfo))
> + }
> + },
> +
> + // GT Block Timer Frames
> + {
> + // Frame 0
> + {
> + 0, // UINT8 FrameNumber
> + FVP_GT_BLOCK_FRAME0_CTL_BASE, // UINT64
> PhysicalAddressCntBase
> + FVP_GT_BLOCK_FRAME0_CTL_EL0_BASE, // UINT64
> PhysicalAddressCntEL0Base
> + FVP_GT_BLOCK_FRAME0_GSIV, // UINT32 PhysicalTimerGSIV
> + FVP_GTX_TIMER_FLAGS, // UINT32 PhysicalTimerFlags
> + 0, // UINT32 VirtualTimerGSIV
> + 0, // UINT32 VirtualTimerFlags
> + FVP_GTX_COMMON_FLAGS // UINT32 CommonFlags
> + },
> + // Frame 1
> + {
> + 1, // UINT8 FrameNumber
> + FVP_GT_BLOCK_FRAME1_CTL_BASE, // UINT64
> PhysicalAddressCntBase
> + FVP_GT_BLOCK_FRAME1_CTL_EL0_BASE, // UINT64
> PhysicalAddressCntEL0Base
> + FVP_GT_BLOCK_FRAME1_GSIV, // UINT32 PhysicalTimerGSIV
> + FVP_GTX_TIMER_FLAGS, // UINT32 PhysicalTimerFlags
> + 0, // UINT32 VirtualTimerGSIV
> + 0, // UINT32 VirtualTimerFlags
> + FVP_GTX_COMMON_FLAGS // UINT32 CommonFlags
> + },
> + },
> +
> + // Watchdog Info
> + {
> + // The physical base address of the SBSA Watchdog control frame
> + FixedPcdGet64 (PcdGenericWatchdogControlBase),
> + // The physical base address of the SBSA Watchdog refresh frame
> + FixedPcdGet64 (PcdGenericWatchdogRefreshBase),
> + // The watchdog interrupt
> + FixedPcdGet32 (PcdGenericWatchdogEl2IntrNum),
> + // The watchdog flags
> + FVP_SBSA_WATCHDOG_FLAGS
> + },
> +
> + // SPCR Serial Port
> + {
> + FixedPcdGet64 (PcdSerialRegisterBase), // UINT64 BaseAddress
> + FixedPcdGet32 (PL011UartInterrupt), // UINT32 Interrupt
> + FixedPcdGet64 (PcdUartDefaultBaudRate), // UINT64 BaudRate
> + FixedPcdGet32 (PL011UartClkInHz), // UINT32 Clock
> + EFI_ACPI_DBG2_PORT_SUBTYPE_SERIAL_ARM_PL011_UART // UINT16
> Port
> + subtype }, // Debug Serial Port {
> + FixedPcdGet64 (PcdSerialDbgRegisterBase), // UINT64 BaseAddress
> + 38, // UINT32 Interrupt
> + FixedPcdGet64 (PcdSerialDbgUartBaudRate), // UINT64 BaudRate
> + FixedPcdGet32 (PcdSerialDbgUartClkInHz), // UINT32 Clock
> + EFI_ACPI_DBG2_PORT_SUBTYPE_SERIAL_ARM_PL011_UART // UINT16
> Port
> + subtype },
> +
> + // GIC ITS
> + {
> + // The GIC ITS ID.
> + 0,
> + // The physical address for the Interrupt Translation Service
> + 0x2f020000
> + }
> +};
> +
> +/** Initialize the platform configuration repository.
> +
> + @param [in] This Pointer to the Configuration Manager Protocol.
> +
> + @retval
> + EFI_SUCCESS Success
> +*/
> +STATIC
> +EFI_STATUS
> +EFIAPI
> +InitializePlatformRepository (
> + IN CONST EFI_CONFIGURATION_MANAGER_PROTOCOL * CONST This
> + )
> +{
> + return EFI_SUCCESS;
> +}
> +
> +/** Return a GT Block timer frame info list.
> +
> + @param [in] This Pointer to the Configuration Manager Protocol.
> + @param [in] CmObjectId The Configuration Manager Object ID.
> + @param [in] Token A token for identifying the object
> + @param [out] CmObject Pointer to the Configuration Manager Object
> + descriptor describing the requested Object.
> +
> + @retval EFI_SUCCESS Success.
> + @retval EFI_INVALID_PARAMETER A parameter is invalid.
> + @retval EFI_NOT_FOUND The required object information is not
> found.
> +*/
> +EFI_STATUS
> +EFIAPI
> +GetGTBlockTimerFrameInfo (
> + IN CONST EFI_CONFIGURATION_MANAGER_PROTOCOL * CONST This,
> + IN CONST CM_OBJECT_ID CmObjectId,
> + IN CONST CM_OBJECT_TOKEN Token,
> + IN OUT CM_OBJ_DESCRIPTOR * CONST CmObject
> + )
> +{
> + EFI_PLATFORM_REPOSITORY_INFO * PlatformRepo;
> +
> + if ((This == NULL) || (CmObject == NULL)) {
> + ASSERT (This != NULL);
> + ASSERT (CmObject != NULL);
> + return EFI_INVALID_PARAMETER;
> + }
> +
> + PlatformRepo = This->PlatRepoInfo;
> +
> + if (Token != (CM_OBJECT_TOKEN)&PlatformRepo->GTBlock0TimerInfo) {
> + return EFI_NOT_FOUND;
> + }
> +
> + CmObject->Size = sizeof (PlatformRepo->GTBlock0TimerInfo);
> + CmObject->Data = (VOID*)&PlatformRepo->GTBlock0TimerInfo;
> + return EFI_SUCCESS;
> +}
> +
> +/** Return a standard namespace object.
> +
> + @param [in] This Pointer to the Configuration Manager Protocol.
> + @param [in] CmObjectId The Configuration Manager Object ID.
> + @param [in] Token An optional token identifying the object. If
> + unused this must be CM_NULL_TOKEN.
> + @param [out] CmObject Pointer to the Configuration Manager Object
> + descriptor describing the requested Object.
> +
> + @retval EFI_SUCCESS Success.
> + @retval EFI_INVALID_PARAMETER A parameter is invalid.
> + @retval EFI_NOT_FOUND The required object information is not
> found.
> +*/
> +EFI_STATUS
> +EFIAPI
> +GetStandardNameSpaceObject (
> + IN CONST EFI_CONFIGURATION_MANAGER_PROTOCOL * CONST This,
> + IN CONST CM_OBJECT_ID CmObjectId,
> + IN CONST CM_OBJECT_TOKEN Token OPTIONAL,
> + IN OUT CM_OBJ_DESCRIPTOR * CONST CmObject
> + )
> +{
> + EFI_STATUS Status = EFI_SUCCESS;
> + EFI_PLATFORM_REPOSITORY_INFO * PlatformRepo;
> +
> + if ((This == NULL) || (CmObject == NULL)) {
> + ASSERT (This != NULL);
> + ASSERT (CmObject != NULL);
> + return EFI_INVALID_PARAMETER;
> + }
> + PlatformRepo = This->PlatRepoInfo;
> +
> + switch (GET_CM_OBJECT_ID (CmObjectId)) {
> + HANDLE_CM_OBJECT (EStdObjCfgMgrInfo, PlatformRepo->CmInfo);
> + HANDLE_CM_OBJECT (EStdObjAcpiTableList, PlatformRepo-
> >CmAcpiTableList);
> + default: {
> + Status = EFI_NOT_FOUND;
> + DEBUG ((
> + DEBUG_ERROR,
> + "ERROR: Object 0x%x. Status = %r\n",
> + CmObjectId,
> + Status
> + ));
> + break;
> + }
> + }
> +
> + return Status;
> +}
> +
> +/** Return an ARM namespace object.
> +
> + @param [in] This Pointer to the Configuration Manager Protocol.
> + @param [in] CmObjectId The Configuration Manager Object ID.
> + @param [in] Token An optional token identifying the object. If
> + unused this must be CM_NULL_TOKEN.
> + @param [out] CmObject Pointer to the Configuration Manager Object
> + descriptor describing the requested Object.
> +
> + @retval EFI_SUCCESS Success.
> + @retval EFI_INVALID_PARAMETER A parameter is invalid.
> + @retval EFI_NOT_FOUND The required object information is not
> found.
> +*/
> +EFI_STATUS
> +EFIAPI
> +GetArmNameSpaceObject (
> + IN CONST EFI_CONFIGURATION_MANAGER_PROTOCOL * CONST This,
> + IN CONST CM_OBJECT_ID CmObjectId,
> + IN CONST CM_OBJECT_TOKEN Token OPTIONAL,
> + IN OUT CM_OBJ_DESCRIPTOR * CONST CmObject
> + )
> +{
> + EFI_STATUS Status = EFI_SUCCESS;
> + EFI_PLATFORM_REPOSITORY_INFO * PlatformRepo;
> +
> + if ((This == NULL) || (CmObject == NULL)) {
> + ASSERT (This != NULL);
> + ASSERT (CmObject != NULL);
> + return EFI_INVALID_PARAMETER;
> + }
> + PlatformRepo = This->PlatRepoInfo;
> +
> + switch (GET_CM_OBJECT_ID (CmObjectId)) {
> + HANDLE_CM_OBJECT (EArmObjBootArchInfo, PlatformRepo-
> >BootArchInfo);
> +#ifdef HEADLESS_PLATFORM
> + HANDLE_CM_OBJECT (
> + EArmObjFixedFeatureFlags,
> + PlatformRepo->FixedFeatureFlags
> + );
> +#endif
> + HANDLE_CM_OBJECT (
> + EArmObjPowerManagementProfileInfo,
> + PlatformRepo->PmProfileInfo
> + );
> + HANDLE_CM_OBJECT (EArmObjGenericTimerInfo, PlatformRepo-
> >GenericTimerInfo);
> + HANDLE_CM_OBJECT (
> + EArmObjPlatformGenericWatchdogInfo,
> + PlatformRepo->Watchdog
> + );
> + HANDLE_CM_OBJECT (EArmObjPlatformGTBlockInfo, PlatformRepo-
> >GTBlockInfo);
> + HANDLE_CM_OBJECT_REF_BY_TOKEN (
> + EArmObjGTBlockTimerFrameInfo,
> + PlatformRepo->GTBlock0TimerInfo,
> + Token,
> + GetGTBlockTimerFrameInfo
> + );
> + HANDLE_CM_OBJECT (EArmObjGicCInfo, PlatformRepo->GicCInfo);
> + HANDLE_CM_OBJECT (EArmObjGicDInfo, PlatformRepo->GicDInfo);
> + HANDLE_CM_OBJECT (EArmObjGicRedistributorInfo, PlatformRepo-
> >GicRedistInfo);
> + HANDLE_CM_OBJECT (
> + EArmObjSerialConsolePortInfo,
> + PlatformRepo->SpcrSerialPort
> + );
> + HANDLE_CM_OBJECT (EArmObjSerialDebugPortInfo, PlatformRepo-
> >DbgSerialPort);
> + HANDLE_CM_OBJECT (EArmObjGicItsInfo, PlatformRepo->GicItsInfo);
> +
> + default: {
> + Status = EFI_NOT_FOUND;
> + DEBUG ((
> + DEBUG_INFO,
> + "INFO: Object 0x%x. Status = %r\n",
> + CmObjectId,
> + Status
> + ));
> + break;
> + }
> + }//switch
> +
> + return Status;
> +}
> +
> +/** Return an OEM namespace object.
> +
> + @param [in] This Pointer to the Configuration Manager Protocol.
> + @param [in] CmObjectId The Configuration Manager Object ID.
> + @param [in] Token An optional token identifying the object. If
> + unused this must be CM_NULL_TOKEN.
> + @param [out] CmObject Pointer to the Configuration Manager Object
> + descriptor describing the requested Object.
> +
> + @retval EFI_SUCCESS Success.
> + @retval EFI_INVALID_PARAMETER A parameter is invalid.
> + @retval EFI_NOT_FOUND The required object information is not
> found.
> + @retval EFI_BAD_BUFFER_SIZE The size returned by the Configuration
> Manager
> + is less than the Object size for the requested
> + object.
> +*/
> +EFI_STATUS
> +EFIAPI
> +GetOemNameSpaceObject (
> + IN CONST EFI_CONFIGURATION_MANAGER_PROTOCOL * CONST This,
> + IN CONST CM_OBJECT_ID CmObjectId,
> + IN CONST CM_OBJECT_TOKEN Token OPTIONAL,
> + IN OUT CM_OBJ_DESCRIPTOR * CONST CmObject
> + )
> +{
> + EFI_STATUS Status = EFI_SUCCESS;
> +
> + if ((This == NULL) || (CmObject == NULL)) {
> + ASSERT (This != NULL);
> + ASSERT (CmObject != NULL);
> + return EFI_INVALID_PARAMETER;
> + }
> +
> + switch (GET_CM_OBJECT_ID (CmObjectId)) {
> + default: {
> + Status = EFI_NOT_FOUND;
> + DEBUG ((
> + DEBUG_ERROR,
> + "ERROR: Object 0x%x. Status = %r\n",
> + CmObjectId,
> + Status
> + ));
> + break;
> + }
> + }
> +
> + return Status;
> +}
> +
> +/** The GetObject function defines the interface implemented by the
> + Configuration Manager Protocol for returning the Configuration
> + Manager Objects.
> +
> + @param [in] This Pointer to the Configuration Manager Protocol.
> + @param [in] CmObjectId The Configuration Manager Object ID.
> + @param [in] Token An optional token identifying the object. If
> + unused this must be CM_NULL_TOKEN.
> + @param [out] CmObject Pointer to the Configuration Manager Object
> + descriptor describing the requested Object.
> +
> + @retval EFI_SUCCESS Success.
> + @retval EFI_INVALID_PARAMETER A parameter is invalid.
> + @retval EFI_NOT_FOUND The required object information is not
> found.
> +*/
> +EFI_STATUS
> +EFIAPI
> +ArmVExpressPlatformGetObject (
> + IN CONST EFI_CONFIGURATION_MANAGER_PROTOCOL * CONST This,
> + IN CONST CM_OBJECT_ID CmObjectId,
> + IN CONST CM_OBJECT_TOKEN Token OPTIONAL,
> + IN OUT CM_OBJ_DESCRIPTOR * CONST CmObject
> + )
> +{
> + EFI_STATUS Status;
> +
> + if ((This == NULL) || (CmObject == NULL)) {
> + ASSERT (This != NULL);
> + ASSERT (CmObject != NULL);
> + return EFI_INVALID_PARAMETER;
> + }
> +
> + switch (GET_CM_NAMESPACE_ID (CmObjectId)) {
> + case EObjNameSpaceStandard:
> + Status = GetStandardNameSpaceObject (This, CmObjectId, Token,
> CmObject);
> + break;
> + case EObjNameSpaceArm:
> + Status = GetArmNameSpaceObject (This, CmObjectId, Token,
> CmObject);
> + break;
> + case EObjNameSpaceOem:
> + Status = GetOemNameSpaceObject (This, CmObjectId, Token,
> CmObject);
> + break;
> + default: {
> + Status = EFI_INVALID_PARAMETER;
> + DEBUG ((
> + DEBUG_ERROR,
> + "ERROR: Unknown Namespace Object = 0x%x. Status = %r\n",
> + CmObjectId,
> + Status
> + ));
> + break;
> + }
> + }
> +
> + return Status;
> +}
> +
> +/** The SetObject function defines the interface implemented by the
> + Configuration Manager Protocol for updating the Configuration
> + Manager Objects.
> +
> + @param [in] This Pointer to the Configuration Manager Protocol.
> + @param [in] CmObjectId The Configuration Manager Object ID.
> + @param [in] Token An optional token identifying the object. If
> + unused this must be CM_NULL_TOKEN.
> + @param [out] CmObject Pointer to the Configuration Manager Object
> + descriptor describing the Object.
> +
> + @retval EFI_UNSUPPORTED This operation is not supported.
> +*/
> +EFI_STATUS
> +EFIAPI
> +ArmVExpressPlatformSetObject (
> + IN CONST EFI_CONFIGURATION_MANAGER_PROTOCOL * CONST This,
> + IN CONST CM_OBJECT_ID CmObjectId,
> + IN CONST CM_OBJECT_TOKEN Token OPTIONAL,
> + IN CM_OBJ_DESCRIPTOR * CONST CmObject
> + )
> +{
> + return EFI_UNSUPPORTED;
> +}
> +
> +/** A structure describing the configuration manager protocol interface.
> +*/
> +STATIC
> +CONST
> +EFI_CONFIGURATION_MANAGER_PROTOCOL
> +VExpressPlatformConfigManagerProtocol = {
> + CREATE_REVISION(1,0),
> + ArmVExpressPlatformGetObject,
> + ArmVExpressPlatformSetObject,
> + &VExpressPlatRepositoryInfo
> +};
> +
> +/**
> + Entrypoint of Configuration Manager Dxe.
> +
> + @param ImageHandle
> + @param SystemTable
> +
> + @return EFI_SUCCESS
> + @return EFI_LOAD_ERROR
> + @return EFI_OUT_OF_RESOURCES
> +
> +**/
> +EFI_STATUS
> +EFIAPI
> +ConfigurationManagerDxeInitialize (
> + IN EFI_HANDLE ImageHandle,
> + IN EFI_SYSTEM_TABLE * SystemTable
> + )
> +{
> + EFI_STATUS Status;
> +
> + Status = gBS->InstallProtocolInterface (
> + &ImageHandle,
> + &gEfiConfigurationManagerProtocolGuid,
> + EFI_NATIVE_INTERFACE,
> + (VOID*)&VExpressPlatformConfigManagerProtocol
> + );
> + if (EFI_ERROR (Status)) {
> + DEBUG ((
> + DEBUG_ERROR,
> + "ERROR: Failed to get Install Configuration Manager Protocol." \
> + " Status = %r\n",
> + Status
> + ));
> + goto error_handler;
> + }
> +
> + Status = InitializePlatformRepository (
> + &VExpressPlatformConfigManagerProtocol
> + );
> + if (EFI_ERROR (Status)) {
> + DEBUG ((
> + DEBUG_ERROR,
> + "ERROR: Failed to initialize the Platform Configuration Repository." \
> + " Status = %r\n",
> + Status
> + ));
> + }
> +
> +error_handler:
> + return Status;
> +}
> diff --git
> a/Platform/ARM/VExpressPkg/ConfigurationManager/ConfigurationManag
> erDxe/ConfigurationManager.h
> b/Platform/ARM/VExpressPkg/ConfigurationManager/ConfigurationManag
> erDxe/ConfigurationManager.h
> new file mode 100644
> index
> 0000000000000000000000000000000000000000..2d852b2d0466e5a87c
> 0b2c33b6041faab47cbea7
> --- /dev/null
> +++
> b/Platform/ARM/VExpressPkg/ConfigurationManager/ConfigurationManag
> er
> +++ Dxe/ConfigurationManager.h
> @@ -0,0 +1,172 @@
> +/** @file
> +
> + Copyright (c) 2017 - 2018, ARM Limited. All rights reserved.
> +
> + This program and the accompanying materials are licensed and made
> + available under the terms and conditions of the BSD License which
> + accompanies this distribution. The full text of the license may be
> + found at http://opensource.org/licenses/bsd-license.php
> +
> + THE PROGRAM IS DISTRIBUTED UNDER THE BSD LICENSE ON AN "AS IS"
> BASIS,
> + WITHOUT WARRANTIES OR REPRESENTATIONS OF ANY KIND, EITHER
> EXPRESS OR IMPLIED.
> +
> + @par Glossary:
> + - Cm or CM - Configuration Manager
> + - Obj or OBJ - Object
> +**/
> +
> +#ifndef CONFIGURATION_MANAGER_H__
> +#define CONFIGURATION_MANAGER_H__
> +
> +/** The configuration manager version.
> +*/
> +#define CONFIGURATION_MANAGER_REVISION CREATE_REVISION (1, 0)
> +
> +/** The OEM ID
> +*/
> +#define CFG_MGR_OEM_ID { 'A', 'R', 'M', 'L', 'T', 'D' }
> +
> +/** A helper macro for populating the GIC CPU information */
> +#define GICC_ENTRY( \
> + CPUInterfaceNumber, \
> + Mpidr, \
> + PmuIrq, \
> + VGicIrq, \
> + EnergyEfficiency \
> + ) { \
> + CPUInterfaceNumber, /* UINT32 CPUInterfaceNumber */ \
> + CPUInterfaceNumber, /* UINT32 AcpiProcessorUid */ \
> + EFI_ACPI_6_2_GIC_ENABLED, /* UINT32 Flags */ \
> + 0, /* UINT32 ParkingProtocolVersion */ \
> + PmuIrq, /* UINT32 PerformanceInterruptGsiv */ \
> + 0, /* UINT64 ParkedAddress */ \
> + FixedPcdGet64 ( \
> + PcdGicInterruptInterfaceBase \
> + ), /* UINT64 PhysicalBaseAddress */ \
> + 0, /* UINT64 GICV */ \
> + 0, /* UINT64 GICH */ \
> + VGicIrq, /* UINT32 VGICMaintenanceInterrupt */ \
> + 0, /* UINT64 GICRBaseAddress */ \
> + Mpidr, /* UINT64 MPIDR */ \
> + EnergyEfficiency /* UINT8 ProcessorPowerEfficiencyClass*/ \
> + }
> +
> +/** A helper macro for returning configuration manager objects */
> +#define HANDLE_CM_OBJECT(CmObjectId, Object) \
> + case CmObjectId: { \
> + CmObject->Size = sizeof (Object); \
> + CmObject->Data = (VOID*)&Object; \
> + DEBUG (( \
> + DEBUG_INFO, \
> + #CmObjectId ": Ptr = 0x%p, Size = %d\n", \
> + CmObject->Data, \
> + CmObject->Size \
> + )); \
> + break; \
> + }
> +
> +/** A helper macro for returning configuration manager objects
> + referenced by token
> +*/
> +#define HANDLE_CM_OBJECT_REF_BY_TOKEN( \
> + CmObjectId, \
> + Object, \
> + Token, \
> + HandlerProc \
> + ) \
> + case CmObjectId: { \
> + if (Token == CM_NULL_TOKEN) { \
> + CmObject->Size = sizeof (Object); \
> + CmObject->Data = (VOID*)&Object; \
> + DEBUG (( \
> + DEBUG_INFO, \
> + #CmObjectId ": Ptr = 0x%p, Size = %d\n", \
> + CmObject->Data, \
> + CmObject->Size \
> + )); \
> + } else { \
> + Status = HandlerProc (This, CmObjectId, Token, CmObject); \
> + DEBUG (( \
> + DEBUG_INFO, \
> + #CmObjectId ": Token = 0x%p, Ptr = 0x%p, Size = %d\n", \
> + (VOID*)Token, \
> + CmObject->Data, \
> + CmObject->Size \
> + )); \
> + } \
> + break; \
> + }
> +
> +/** The number of CPUs
> +*/
> +#define PLAT_CPU_COUNT 8
> +
> +/** The number of ACPI tables to install */
> +#define PLAT_ACPI_TABLE_COUNT 6
> +
> +/** The number of platform generic timer blocks */
> +#define PLAT_GTBLOCK_COUNT 1
> +
> +/** The number of timer frames per generic timer block */
> +#define PLAT_GTFRAME_COUNT 2
> +
> +/** A structure describing the platform configuration
> + manager repository information
> +*/
> +typedef struct PlatformRepositoryInfo {
> + /// Configuration Manager Information
> + CM_STD_OBJ_CONFIGURATION_MANAGER_INFO CmInfo;
> +
> + /// List of ACPI tables
> + CM_STD_OBJ_ACPI_TABLE_INFO
> CmAcpiTableList[PLAT_ACPI_TABLE_COUNT];
> +
> + /// Boot architecture information
> + CM_ARM_BOOT_ARCH_INFO BootArchInfo;
> +
> +#ifdef HEADLESS_PLATFORM
> + /// Fixed feature flag information
> + CM_ARM_FIXED_FEATURE_FLAGS FixedFeatureFlags;
> +#endif
> +
> + /// Power management profile information
> + CM_ARM_POWER_MANAGEMENT_PROFILE_INFO PmProfileInfo;
> +
> + /// GIC CPU interface information
> + CM_ARM_GICC_INFO GicCInfo[PLAT_CPU_COUNT];
> +
> + /// GIC distributor information
> + CM_ARM_GICD_INFO GicDInfo;
> +
> + /// GIC Redistributor information
> + CM_ARM_GIC_REDIST_INFO GicRedistInfo;
> +
> + /// Generic timer information
> + CM_ARM_GENERIC_TIMER_INFO GenericTimerInfo;
> +
> + /// Generic timer block information
> + CM_ARM_GTBLOCK_INFO
> GTBlockInfo[PLAT_GTBLOCK_COUNT];
> +
> + /// Generic timer frame information
> + CM_ARM_GTBLOCK_TIMER_FRAME_INFO
> GTBlock0TimerInfo[PLAT_GTFRAME_COUNT];
> +
> + /// Watchdog information
> + CM_ARM_GENERIC_WATCHDOG_INFO Watchdog;
> +
> + /** Serial port information for the
> + serial port console redirection port */
> + CM_ARM_SERIAL_PORT_INFO SpcrSerialPort;
> +
> + /// Serial port information for the DBG2 UART port
> + CM_ARM_SERIAL_PORT_INFO DbgSerialPort;
> +
> + /// GIC ITS information
> + CM_ARM_GIC_ITS_INFO GicItsInfo;
> +} EFI_PLATFORM_REPOSITORY_INFO;
> +
> +#endif // CONFIGURATION_MANAGER_H__
> diff --git
> a/Platform/ARM/VExpressPkg/ConfigurationManager/ConfigurationManag
> erDxe/ConfigurationManagerDxe.inf
> b/Platform/ARM/VExpressPkg/ConfigurationManager/ConfigurationManag
> erDxe/ConfigurationManagerDxe.inf
> new file mode 100644
> index
> 0000000000000000000000000000000000000000..ff61763f661289e2f86
> 911b5f68576ac657a400c
> --- /dev/null
> +++
> b/Platform/ARM/VExpressPkg/ConfigurationManager/ConfigurationManag
> er
> +++ Dxe/ConfigurationManagerDxe.inf
> @@ -0,0 +1,78 @@
> +## @file
> +#
> +# Copyright (c) 2017 - 2018, ARM Limited. All rights reserved.
> +#
> +# This program and the accompanying materials # are licensed and made
> +available under the terms and conditions of the BSD License # which
> +accompanies this distribution. The full text of the license may be
> +found at # http://opensource.org/licenses/bsd-license.php
> +#
> +# THE PROGRAM IS DISTRIBUTED UNDER THE BSD LICENSE ON AN "AS IS"
> +BASIS, # WITHOUT WARRANTIES OR REPRESENTATIONS OF ANY KIND,
> EITHER EXPRESS OR IMPLIED.
> +##
> +
> +[Defines]
> + INF_VERSION = 0x00010019
> + BASE_NAME = ConfigurationManagerDxe
> + FILE_GUID = 29F45677-1920-4454-94A6-CF119C9491DB
> + MODULE_TYPE = DXE_DRIVER
> + VERSION_STRING = 1.0
> + ENTRY_POINT = ConfigurationManagerDxeInitialize
> +
> +#
> +# The following information is for reference only and not required by the
> build tools.
> +#
> +# VALID_ARCHITECTURES = ARM AARCH64
> +#
> +
> +[Sources]
> + ConfigurationManager.c
> +
> +[Packages]
> + ArmPkg/ArmPkg.dec
> + ArmPlatformPkg/ArmPlatformPkg.dec
> + DynamicTablesPkg/DynamicTablesPkg.dec
> + MdePkg/MdePkg.dec
> + MdeModulePkg/MdeModulePkg.dec
> + Platform/ARM/VExpressPkg/ArmVExpressPkg.dec
> +
> +[LibraryClasses]
> + ArmPlatformLib
> + PlatformAslTablesLib
> + PrintLib
> + UefiBootServicesTableLib
> + UefiDriverEntryPoint
> + UefiRuntimeServicesTableLib
> +
> +[Protocols]
> + gEfiConfigurationManagerProtocolGuid
> +
> +[FixedPcd]
> + gArmTokenSpaceGuid.PcdArmArchTimerSecIntrNum
> + gArmTokenSpaceGuid.PcdArmArchTimerIntrNum
> + gArmTokenSpaceGuid.PcdArmArchTimerVirtIntrNum
> + gArmTokenSpaceGuid.PcdArmArchTimerHypIntrNum
> +
> + gArmTokenSpaceGuid.PcdGicDistributorBase
> + gArmTokenSpaceGuid.PcdGicInterruptInterfaceBase
> + gArmTokenSpaceGuid.PcdGicRedistributorsBase
> +
> + gEfiMdeModulePkgTokenSpaceGuid.PcdSerialRegisterBase
> + gEfiMdePkgTokenSpaceGuid.PcdUartDefaultBaudRate
> + gArmPlatformTokenSpaceGuid.PL011UartClkInHz
> + gArmPlatformTokenSpaceGuid.PL011UartInterrupt
> +
> + ## PL011 Serial Debug UART
> + gArmPlatformTokenSpaceGuid.PcdSerialDbgRegisterBase
> + gArmPlatformTokenSpaceGuid.PcdSerialDbgUartBaudRate
> + gArmPlatformTokenSpaceGuid.PcdSerialDbgUartClkInHz
> +
> + # SBSA Generic Watchdog
> + gArmTokenSpaceGuid.PcdGenericWatchdogControlBase
> + gArmTokenSpaceGuid.PcdGenericWatchdogRefreshBase
> + gArmTokenSpaceGuid.PcdGenericWatchdogEl2IntrNum
> +
> +[Pcd]
> +
> +[Depex]
> + TRUE
> diff --git
> a/Platform/ARM/VExpressPkg/ConfigurationManager/ConfigurationManag
> erDxe/Platform.h
> b/Platform/ARM/VExpressPkg/ConfigurationManager/ConfigurationManag
> erDxe/Platform.h
> new file mode 100644
> index
> 0000000000000000000000000000000000000000..8ba32717704af8cc65d
> 23e93affcc2922add0346
> --- /dev/null
> +++
> b/Platform/ARM/VExpressPkg/ConfigurationManager/ConfigurationManag
> er
> +++ Dxe/Platform.h
> @@ -0,0 +1,91 @@
> +/** @file
> +
> + Copyright (c) 2017, ARM Limited. All rights reserved.
> +
> + This program and the accompanying materials are licensed and made
> + available under the terms and conditions of the BSD License which
> + accompanies this distribution. The full text of the license may be
> + found at http://opensource.org/licenses/bsd-license.php
> +
> + THE PROGRAM IS DISTRIBUTED UNDER THE BSD LICENSE ON AN "AS IS"
> BASIS,
> + WITHOUT WARRANTIES OR REPRESENTATIONS OF ANY KIND, EITHER
> EXPRESS OR IMPLIED.
> +
> +**/
> +
> +#ifndef PLATFORM_H__
> +#define PLATFORM_H__
> +
> +#define ENABLE_MEM_MAPPED_TIMER
> +
> +#ifdef ENABLE_MEM_MAPPED_TIMER
> +#define FVP_SYSTEM_TIMER_BASE_ADDRESS 0x2A430000
> +#define FVP_CNT_READ_BASE_ADDRESS 0x2A800000
> +#else
> +#define FVP_SYSTEM_TIMER_BASE_ADDRESS 0xFFFFFFFFFFFFFFFF
> +#define FVP_CNT_READ_BASE_ADDRESS 0xFFFFFFFFFFFFFFFF
> +#endif
> +
> +// GT Block Timer
> +#define FVP_GT_BLOCK_CTL_BASE 0x2A810000
> +#define FVP_TIMER_FRAMES_COUNT 2
> +
> +// GT Block Timer Frames
> +#define FVP_GT_BLOCK_FRAME0_CTL_BASE 0x2A820000
> +#define FVP_GT_BLOCK_FRAME0_CTL_EL0_BASE 0xFFFFFFFFFFFFFFFF
> +#define FVP_GT_BLOCK_FRAME0_GSIV 57
> +
> +#define FVP_GT_BLOCK_FRAME1_CTL_BASE 0x2A830000
> +#define FVP_GT_BLOCK_FRAME1_CTL_EL0_BASE 0xFFFFFFFFFFFFFFFF
> +#define FVP_GT_BLOCK_FRAME1_GSIV 58
> +
> +#define GTDT_TIMER_EDGE_TRIGGERED \
> + EFI_ACPI_6_2_GTDT_TIMER_FLAG_TIMER_INTERRUPT_MODE
> +#define GTDT_TIMER_LEVEL_TRIGGERED 0
> +#define GTDT_TIMER_ACTIVE_LOW \
> + EFI_ACPI_6_2_GTDT_TIMER_FLAG_TIMER_INTERRUPT_POLARITY
> +#define GTDT_TIMER_ACTIVE_HIGH 0
> +#define GTDT_TIMER_SAVE_CONTEXT \
> + EFI_ACPI_6_2_GTDT_TIMER_FLAG_ALWAYS_ON_CAPABILITY
> +#define GTDT_TIMER_LOSE_CONTEXT 0
> +
> +#define FVP_GTDT_GTIMER_FLAGS (GTDT_TIMER_LOSE_CONTEXT | \
> + GTDT_TIMER_ACTIVE_LOW | \
> + GTDT_TIMER_LEVEL_TRIGGERED)
> +
> +// GT Block Timer Flags
> +#define GTX_TIMER_EDGE_TRIGGERED \
> +
> EFI_ACPI_6_2_GTDT_GT_BLOCK_TIMER_FLAG_TIMER_INTERRUPT_MODE
> +#define GTX_TIMER_LEVEL_TRIGGERED 0
> +#define GTX_TIMER_ACTIVE_LOW \
> +
> EFI_ACPI_6_2_GTDT_GT_BLOCK_TIMER_FLAG_TIMER_INTERRUPT_POLARIT
> Y
> +#define GTX_TIMER_ACTIVE_HIGH 0
> +
> +#define FVP_GTX_TIMER_FLAGS (GTX_TIMER_ACTIVE_HIGH | \
> + GTX_TIMER_LEVEL_TRIGGERED)
> +
> +#define GTX_TIMER_SECURE \
> + EFI_ACPI_6_2_GTDT_GT_BLOCK_COMMON_FLAG_SECURE_TIMER
> +#define GTX_TIMER_NON_SECURE 0
> +#define GTX_TIMER_SAVE_CONTEXT \
> +
> EFI_ACPI_6_2_GTDT_GT_BLOCK_COMMON_FLAG_ALWAYS_ON_CAPABILIT
> Y
> +#define GTX_TIMER_LOSE_CONTEXT 0
> +
> +#define FVP_GTX_COMMON_FLAGS (GTX_TIMER_SAVE_CONTEXT |
> GTX_TIMER_SECURE)
> +
> +// Watchdog
> +#define SBSA_WATCHDOG_EDGE_TRIGGERED \
> +
> +EFI_ACPI_6_2_GTDT_SBSA_GENERIC_WATCHDOG_FLAG_TIMER_INTERRU
> PT_MODE
> +#define SBSA_WATCHDOG_LEVEL_TRIGGERED 0
> +#define SBSA_WATCHDOG_ACTIVE_LOW \
> +
> EFI_ACPI_6_2_GTDT_SBSA_GENERIC_WATCHDOG_FLAG_TIMER_INTERRUP
> T_POLARITY
> +#define SBSA_WATCHDOG_ACTIVE_HIGH 0
> +#define SBSA_WATCHDOG_SECURE \
> +
> EFI_ACPI_6_2_GTDT_SBSA_GENERIC_WATCHDOG_FLAG_SECURE_TIMER
> +#define SBSA_WATCHDOG_NON_SECURE 0
> +
> +#define FVP_SBSA_WATCHDOG_FLAGS
> (SBSA_WATCHDOG_NON_SECURE | \
> + SBSA_WATCHDOG_ACTIVE_HIGH | \
> +
> +SBSA_WATCHDOG_LEVEL_TRIGGERED)
> +
> +#endif // PLATFORM_H__
> +
> diff --git
> a/Platform/ARM/VExpressPkg/ConfigurationManager/PlatformASLTablesLi
> b/Dsdt.asl
> b/Platform/ARM/VExpressPkg/ConfigurationManager/PlatformASLTablesLi
> b/Dsdt.asl
> new file mode 100644
> index
> 0000000000000000000000000000000000000000..15ce7c020045d42f08c
> f92ad76644b07f0a1e25e
> --- /dev/null
> +++
> b/Platform/ARM/VExpressPkg/ConfigurationManager/PlatformASLTablesLi
> b
> +++ /Dsdt.asl
> @@ -0,0 +1,77 @@
> +/** @file
> + Differentiated System Description Table Fields (DSDT)
> +
> + Copyright (c) 2014-2017, ARM Ltd. All rights reserved.<BR>
> + This program and the accompanying materials are licensed and made
> + available under the terms and conditions of the BSD License which
> + accompanies this distribution. The full text of the license may be
> + found at http://opensource.org/licenses/bsd-license.php
> +
> + THE PROGRAM IS DISTRIBUTED UNDER THE BSD LICENSE ON AN "AS IS"
> BASIS,
> + WITHOUT WARRANTIES OR REPRESENTATIONS OF ANY KIND, EITHER
> EXPRESS OR IMPLIED.
> +
> +**/
> +
> +DefinitionBlock("DsdtTable.aml", "DSDT", 1, "ARMLTD", "ARM-VEXPRESS",
> +1) {
> + Scope(_SB) {
> + //
> + // Processor
> + //
> + Device(CPU0) {
> + Name(_HID, "ACPI0007")
> + Name(_UID, Zero)
> + }
> + Device(CPU1) {
> + Name(_HID, "ACPI0007")
> + Name(_UID, One)
> + }
> + Device(CPU2) {
> + Name(_HID, "ACPI0007")
> + Name(_UID, 2)
> + }
> + Device(CPU3) {
> + Name(_HID, "ACPI0007")
> + Name(_UID, 3)
> + }
> + Device(CPU4) {
> + Name(_HID, "ACPI0007")
> + Name(_UID, 4)
> + }
> + Device(CPU5) {
> + Name(_HID, "ACPI0007")
> + Name(_UID, 5)
> + }
> + Device(CPU6) {
> + Name(_HID, "ACPI0007")
> + Name(_UID, 6)
> + }
> + Device(CPU7) {
> + Name(_HID, "ACPI0007")
> + Name(_UID, 7)
> + }
> +
> + // UART PL011
> + Device(COM2) {
> + Name(_HID, "ARMH0011")
> + Name(_CID, "PL011")
> + Name(_UID, Zero)
> +
> + Method(_STA) {
> + Return(0xF)
> + }
> +
> + Method(_CRS, 0x0, NotSerialized) {
> + Name(RBUF, ResourceTemplate() {
> + // UART1
> + Memory32Fixed(ReadWrite, 0x1c090000, 0x1000)
> + Interrupt(ResourceConsumer, Level, ActiveHigh, Exclusive) { 0x25 }
> + // UART3
> + // Memory32Fixed(ReadWrite, 0x1c0B0000, 0x1000)
> + // Interrupt(ResourceConsumer, Level, ActiveHigh, Exclusive) { 0x27 }
> + })
> + Return (RBUF)
> + }
> + }
> +
> + } // Scope(_SB)
> +}
> diff --git
> a/Platform/ARM/VExpressPkg/ConfigurationManager/PlatformASLTablesLi
> b/PlatformASLTablesLib.inf
> b/Platform/ARM/VExpressPkg/ConfigurationManager/PlatformASLTablesLi
> b/PlatformASLTablesLib.inf
> new file mode 100644
> index
> 0000000000000000000000000000000000000000..28426e18f32dc25af6f
> af51826e11d5e09fe105d
> --- /dev/null
> +++
> b/Platform/ARM/VExpressPkg/ConfigurationManager/PlatformASLTablesLi
> b
> +++ /PlatformASLTablesLib.inf
> @@ -0,0 +1,34 @@
> +## @file
> +#
> +# Copyright (c) 2017 - 2018, ARM Limited. All rights reserved.
> +#
> +# This program and the accompanying materials # are licensed and made
> +available under the terms and conditions of the BSD License # which
> +accompanies this distribution. The full text of the license may be
> +found at # http://opensource.org/licenses/bsd-license.php
> +#
> +# THE PROGRAM IS DISTRIBUTED UNDER THE BSD LICENSE ON AN "AS IS"
> +BASIS, # WITHOUT WARRANTIES OR REPRESENTATIONS OF ANY KIND,
> EITHER EXPRESS OR IMPLIED.
> +##
> +
> +[Defines]
> + INF_VERSION = 0x00010019
> + BASE_NAME = PlatformAslTablesLib
> + FILE_GUID = 4000AEAB-C6D3-4F67-ADE3-D4B504FC164B
> + MODULE_TYPE = DXE_DRIVER
> + VERSION_STRING = 1.0
> + LIBRARY_CLASS = PlatformAslTablesLib|DXE_DRIVER
> +
> +#
> +# The following information is for reference only and not required by the
> build tools.
> +#
> +# VALID_ARCHITECTURES = ARM AARCH64
> +#
> +
> +[Sources]
> + Dsdt.asl
> +
> +[Packages]
> + ArmPlatformPkg/ArmPlatformPkg.dec
> + MdePkg/MdePkg.dec
> + Platform/ARM/VExpressPkg/ArmVExpressPkg.dec
> --
> 'Guid(CE165669-3EF3-493F-B85D-6190EE5B9759)'
>
^ permalink raw reply [flat|nested] 6+ messages in thread
* Re: [PATCH 0/2] [platforms/dynamictables] Platform support for Dynamic Tables Framework
2018-03-19 15:21 [PATCH 0/2] [platforms/dynamictables] Platform support for Dynamic Tables Framework Sami Mujawar
2018-03-19 15:21 ` [PATCH 1/2][platforms/dynamictables] Platform/ARM: Dynamic Tables support for Juno Sami Mujawar
2018-03-19 15:21 ` [PATCH 2/2][platforms/dynamictables] Platform/ARM: Dynamic Tables support for FVP Sami Mujawar
@ 2018-03-21 3:49 ` Leif Lindholm
2 siblings, 0 replies; 6+ messages in thread
From: Leif Lindholm @ 2018-03-21 3:49 UTC (permalink / raw)
To: Sami Mujawar
Cc: edk2-devel, Arvind Chauhan, Daniil Egranov,
Thomas Panakamattam Abraham, evan.lloyd, Matteo.Carlini,
Stephanie.Hughes-Fitt, nd
Note: the branch name (for the subject line) is
platforms/devel-dynamictables, not platforms/dynamictables.
With Evan's reviewed-by, series pushed as
345b8b2992..e28edfba42.
On Mon, Mar 19, 2018 at 03:21:51PM +0000, Sami Mujawar wrote:
> The Dynamic Tables Framework is a prototyped as a solution for
> automatically generating the firmware tables based on hardware
> description. The Dynamic Tables Framework core code is present
> in the dynamictables branch in the edk2-staging repository at
> https://github.com/tianocore/edk2-staging/tree/dynamictables
>
> This patchset implements the platform specific modules for the
> Juno and FVP platform, and the sources can be seen at:
> https://github.com/samimujawar/edk2-platforms/tree/187_dynamictables_v1
>
> Sami Mujawar (2):
> Platform/ARM: Dynamic Tables support for Juno
> Platform/ARM: Dynamic Tables support for FVP
>
> Platform/ARM/JunoPkg/ArmJuno.dsc | 16 +-
> Platform/ARM/JunoPkg/ArmJuno.fdf | 14 +-
> Platform/ARM/JunoPkg/ConfigurationManager/ConfigurationManager.dsc.inc | 29 +
> Platform/ARM/JunoPkg/ConfigurationManager/ConfigurationManagerDxe/ConfigurationManager.c | 589 +++++++++++++++++++
> Platform/ARM/JunoPkg/ConfigurationManager/ConfigurationManagerDxe/ConfigurationManager.h | 156 +++++
> Platform/ARM/JunoPkg/ConfigurationManager/ConfigurationManagerDxe/ConfigurationManagerDxe.inf | 85 +++
> Platform/ARM/JunoPkg/ConfigurationManager/ConfigurationManagerDxe/Platform.h | 65 +++
> Platform/ARM/JunoPkg/ConfigurationManager/PlatformASLTablesLib/Dsdt.asl | 306 ++++++++++
> Platform/ARM/JunoPkg/ConfigurationManager/PlatformASLTablesLib/PlatformASLTablesLib.inf | 44 ++
> Platform/ARM/JunoPkg/ConfigurationManager/PlatformASLTablesLib/SsdtJunoUsb.asl | 122 ++++
> Platform/ARM/JunoPkg/ConfigurationManager/PlatformASLTablesLib/SsdtPci.asl | 218 +++++++
> Platform/ARM/JunoPkg/ConfigurationManager/PlatformASLTablesLib/SsdtUart.asl | 48 ++
> Platform/ARM/JunoPkg/Drivers/ArmJunoDxe/ArmJunoDxe.c | 9 +-
> Platform/ARM/VExpressPkg/ArmVExpress-FVP-AArch64.dsc | 15 +
> Platform/ARM/VExpressPkg/ArmVExpress-FVP-AArch64.fdf | 16 +-
> Platform/ARM/VExpressPkg/ConfigurationManager/ConfigurationManager.dsc.inc | 31 +
> Platform/ARM/VExpressPkg/ConfigurationManager/ConfigurationManagerDxe/ConfigurationManager.c | 607 ++++++++++++++++++++
> Platform/ARM/VExpressPkg/ConfigurationManager/ConfigurationManagerDxe/ConfigurationManager.h | 172 ++++++
> Platform/ARM/VExpressPkg/ConfigurationManager/ConfigurationManagerDxe/ConfigurationManagerDxe.inf | 78 +++
> Platform/ARM/VExpressPkg/ConfigurationManager/ConfigurationManagerDxe/Platform.h | 91 +++
> Platform/ARM/VExpressPkg/ConfigurationManager/PlatformASLTablesLib/Dsdt.asl | 77 +++
> Platform/ARM/VExpressPkg/ConfigurationManager/PlatformASLTablesLib/PlatformASLTablesLib.inf | 34 ++
> 22 files changed, 2816 insertions(+), 6 deletions(-)
> create mode 100644 Platform/ARM/JunoPkg/ConfigurationManager/ConfigurationManager.dsc.inc
> create mode 100644 Platform/ARM/JunoPkg/ConfigurationManager/ConfigurationManagerDxe/ConfigurationManager.c
> create mode 100644 Platform/ARM/JunoPkg/ConfigurationManager/ConfigurationManagerDxe/ConfigurationManager.h
> create mode 100644 Platform/ARM/JunoPkg/ConfigurationManager/ConfigurationManagerDxe/ConfigurationManagerDxe.inf
> create mode 100644 Platform/ARM/JunoPkg/ConfigurationManager/ConfigurationManagerDxe/Platform.h
> create mode 100644 Platform/ARM/JunoPkg/ConfigurationManager/PlatformASLTablesLib/Dsdt.asl
> create mode 100644 Platform/ARM/JunoPkg/ConfigurationManager/PlatformASLTablesLib/PlatformASLTablesLib.inf
> create mode 100644 Platform/ARM/JunoPkg/ConfigurationManager/PlatformASLTablesLib/SsdtJunoUsb.asl
> create mode 100644 Platform/ARM/JunoPkg/ConfigurationManager/PlatformASLTablesLib/SsdtPci.asl
> create mode 100644 Platform/ARM/JunoPkg/ConfigurationManager/PlatformASLTablesLib/SsdtUart.asl
> create mode 100644 Platform/ARM/VExpressPkg/ConfigurationManager/ConfigurationManager.dsc.inc
> create mode 100644 Platform/ARM/VExpressPkg/ConfigurationManager/ConfigurationManagerDxe/ConfigurationManager.c
> create mode 100644 Platform/ARM/VExpressPkg/ConfigurationManager/ConfigurationManagerDxe/ConfigurationManager.h
> create mode 100644 Platform/ARM/VExpressPkg/ConfigurationManager/ConfigurationManagerDxe/ConfigurationManagerDxe.inf
> create mode 100644 Platform/ARM/VExpressPkg/ConfigurationManager/ConfigurationManagerDxe/Platform.h
> create mode 100644 Platform/ARM/VExpressPkg/ConfigurationManager/PlatformASLTablesLib/Dsdt.asl
> create mode 100644 Platform/ARM/VExpressPkg/ConfigurationManager/PlatformASLTablesLib/PlatformASLTablesLib.inf
>
> --
> 'Guid(CE165669-3EF3-493F-B85D-6190EE5B9759)'
>
>
^ permalink raw reply [flat|nested] 6+ messages in thread
end of thread, other threads:[~2018-03-21 3:43 UTC | newest]
Thread overview: 6+ messages (download: mbox.gz follow: Atom feed
-- links below jump to the message on this page --
2018-03-19 15:21 [PATCH 0/2] [platforms/dynamictables] Platform support for Dynamic Tables Framework Sami Mujawar
2018-03-19 15:21 ` [PATCH 1/2][platforms/dynamictables] Platform/ARM: Dynamic Tables support for Juno Sami Mujawar
2018-03-19 16:13 ` Evan Lloyd
2018-03-19 15:21 ` [PATCH 2/2][platforms/dynamictables] Platform/ARM: Dynamic Tables support for FVP Sami Mujawar
2018-03-19 16:13 ` Evan Lloyd
2018-03-21 3:49 ` [PATCH 0/2] [platforms/dynamictables] Platform support for Dynamic Tables Framework Leif Lindholm
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