Re: [edk2-devel] [PATCH 07/33] AMD/VanGoghBoard: Check in PciPlatform

["Chang, Abner via groups.io" <abner.chang=amd.com@groups.io>]

[AMD Official Use Only - General]

> -----Original Message-----
> From: duke.zhai@amd.com <duke.zhai@amd.com>
> Sent: Thursday, January 18, 2024 2:50 PM
> To: devel@edk2.groups.io
> Cc: Xing, Eric <Eric.Xing@amd.com>; Yao, Ken <Ken.Yao@amd.com>; Fu,
> Igniculus <Igniculus.Fu@amd.com>; Chang, Abner <Abner.Chang@amd.com>
> Subject: [PATCH 07/33] AMD/VanGoghBoard: Check in PciPlatform
>
> From: Duke Zhai <Duke.Zhai@amd.com>
>
>
> BZ #:4640
>
> BIOS detects current IGPU device ID and install corresponding VBIOS.
>
> Inital PciPlatform module to load VBIOS and to provide interface for
>
> other option ROMs if necessary.
>
>
>
> Signed-off-by: Duke Zhai <duke.zhai@amd.com>
>
> Cc: Eric Xing <eric.xing@amd.com>
>
> Cc: Ken Yao <ken.yao@amd.com>
>
> Cc: Igniculus Fu <igniculus.fu@amd.com>
>
> Cc: Abner Chang <abner.chang@amd.com>
>
> ---
>
>  .../Include/Protocol/GlobalNvsArea.h          |  70 ++++++
>
>  .../PciPlatform/CommonHeader.h                |  43 ++++
>
>  .../PciPlatform/PciPlatform.c                 | 199 ++++++++++++++++++
>
>  .../PciPlatform/PciPlatform.h                 | 105 +++++++++
>
>  .../PciPlatform/PciPlatform.inf               |  66 ++++++
>
>  5 files changed, 483 insertions(+)
>
>  create mode 100644
> Platform/AMD/VanGoghBoard/ChachaniBoardPkg/Include/Protocol/GlobalN
> vsArea.h
>
>  create mode 100644
> Platform/AMD/VanGoghBoard/ChachaniBoardPkg/PciPlatform/CommonHea
> der.h
>
>  create mode 100644
> Platform/AMD/VanGoghBoard/ChachaniBoardPkg/PciPlatform/PciPlatform.c
>
>  create mode 100644
> Platform/AMD/VanGoghBoard/ChachaniBoardPkg/PciPlatform/PciPlatform.h
>
>  create mode 100644
> Platform/AMD/VanGoghBoard/ChachaniBoardPkg/PciPlatform/PciPlatform.in
> f
>
>
>
> diff --git
> a/Platform/AMD/VanGoghBoard/ChachaniBoardPkg/Include/Protocol/Global
> NvsArea.h
> b/Platform/AMD/VanGoghBoard/ChachaniBoardPkg/Include/Protocol/Global
> NvsArea.h
>
> new file mode 100644
>
> index 0000000000..0c5077f417
>
> --- /dev/null
>
> +++
> b/Platform/AMD/VanGoghBoard/ChachaniBoardPkg/Include/Protocol/Global
> NvsArea.h
>
> @@ -0,0 +1,70 @@
>
> +/** @file
>
> +  GlobalNvsArea.h
>
> +
>
> +  Copyright (C) 2024 Advanced Micro Devices, Inc. All rights reserved.<BR>
>
> +  SPDX-License-Identifier: BSD-2-Clause-Patent
>
> +**/
>
> +/* This file includes code originally published under the following license. */
>
> +
>
> +/** @file
>
> +Definition of the global NVS area protocol.  This protocol
>
> +publishes the address and format of a global ACPI NVS buffer
>
> +used as a communications buffer between SMM code and ASL code.
>
> +The format is derived from the ACPI reference code, version 0.95.
>
> +Note:  Data structures defined in this protocol are not naturally aligned.
>
> +
>
> +Copyright (c) 2013-2015 Intel Corporation.
>
> +
>
> +SPDX-License-Identifier: BSD-2-Clause-Patent
>
> +
>
> +**/
>
> +
>
> +#ifndef _GLOBAL_NVS_AREA_H_


GLOBAL_NVS_AREA_H__


>
> +#define _GLOBAL_NVS_AREA_H_
>
> +
>
> +//
>
> +// Includes
>
> +//
>
> +#define GLOBAL_NVS_DEVICE_ENABLE   1
>
> +#define GLOBAL_NVS_DEVICE_DISABLE  0
>
> +
>
> +//
>
> +// Global NVS Area Protocol GUID
>
> +//
>
> +#define EFI_GLOBAL_NVS_AREA_PROTOCOL_GUID \
>
> +{ 0x74e1e48, 0x8132, 0x47a1, {0x8c, 0x2c, 0x3f, 0x14, 0xad, 0x9a, 0x66,
> 0xdc} }
>
> +
>
> +//
>
> +// Revision id - Added TPM related fields
>
> +//
>
> +#define GLOBAL_NVS_AREA_RIVISION_1  1
>
> +
>
> +//
>
> +// Extern the GUID for protocol users.
>
> +//
>
> +extern EFI_GUID  gEfiGlobalNvsAreaProtocolGuid;
>
> +
>
> +//
>
> +// Global NVS Area definition
>
> +//
>
> +#pragma pack (1)
>
> +typedef struct {
>
> +  //
>
> +  // Miscellaneous Dynamic Values, the definitions below need to be matched
>
> +  // GNVS definitions in Platform.ASL
>
> +  //
>
> +  UINT32    TopOfMem;               // TOPM
>
> +  UINT8     NbIoApic;               // NAPC
>
> +  UINT32    PcieBaseAddress;        // PCBA
>
> +  UINT32    PcieBaseLimit;          // PCBL
>
> +} EFI_GLOBAL_NVS_AREA;
>
> +#pragma pack ()
>
> +
>
> +//
>
> +// Global NVS Area Protocol
>
> +//
>
> +typedef struct _EFI_GLOBAL_NVS_AREA_PROTOCOL {
>
> +  EFI_GLOBAL_NVS_AREA    *Area;
>
> +} EFI_GLOBAL_NVS_AREA_PROTOCOL;
>
> +
>
> +#endif
>
> diff --git
> a/Platform/AMD/VanGoghBoard/ChachaniBoardPkg/PciPlatform/CommonHe
> ader.h
> b/Platform/AMD/VanGoghBoard/ChachaniBoardPkg/PciPlatform/CommonH
> eader.h
>
> new file mode 100644
>
> index 0000000000..430d9f51dc
>
> --- /dev/null
>
> +++
> b/Platform/AMD/VanGoghBoard/ChachaniBoardPkg/PciPlatform/CommonH
> eader.h
>
> @@ -0,0 +1,43 @@
>
> +/** @file
>
> +  Implements CommonHeader.h
>
> +
>
> +  Copyright (C) 2024 Advanced Micro Devices, Inc. All rights reserved.<BR>
>
> +  SPDX-License-Identifier: BSD-2-Clause-Patent
>
> +
>
> +**/
>
> +
>
> +/* This file includes code originally published under the following license. */
>
> +
>
> +/** @file
>
> +Common header file shared by all source files.
>
> +
>
> +This file includes package header files, library classes and protocol, PPI &
> GUID definitions.

Remove below copyright, put Intel's above or under AMD copyright.



>
> +
>
> +Copyright (c) 2013-2015 Intel Corporation.
>
> +
>
> +This  program and the accompanying materials
>
> +are licensed and made available under the terms and conditions of the BSD
> License
>
> +which accompanies this distribution.  The full text of the license may be
> found at
>
> +http://opensource.org/licenses/bsd-license.php
>
> +
>
> +THE PROGRAM IS DISTRIBUTED UNDER THE BSD LICENSE ON AN "AS IS"
> BASIS,
>
> +WITHOUT WARRANTIES OR REPRESENTATIONS OF ANY KIND, EITHER
> EXPRESS OR IMPLIED.
>
> +**/
>
> +
>
> +#ifndef __COMMON_HEADER_H_
>
> +#define __COMMON_HEADER_H_
Change above to COMMON_HEADER_H__ for the consistency.

Please review the rest of content in this patch.

Thanks
Abner


>
> +
>
> +#include <PiDxe.h>
>
> +
>
> +#include <Protocol/PciPlatform.h>
>
> +#include <Protocol/PciIo.h>
>
> +
>
> +#include <Library/DxeServicesLib.h>
>
> +#include <Library/UefiDriverEntryPoint.h>
>
> +#include <Library/UefiBootServicesTableLib.h>
>
> +#include <Library/UefiRuntimeServicesTableLib.h>
>
> +#include <Library/DebugLib.h>
>
> +#include <Library/IoLib.h>
>
> +#include <Library/PciLib.h>
>
> +
>
> +#endif
>
> diff --git
> a/Platform/AMD/VanGoghBoard/ChachaniBoardPkg/PciPlatform/PciPlatform.
> c
> b/Platform/AMD/VanGoghBoard/ChachaniBoardPkg/PciPlatform/PciPlatform
> .c
>
> new file mode 100644
>
> index 0000000000..733d334075
>
> --- /dev/null
>
> +++
> b/Platform/AMD/VanGoghBoard/ChachaniBoardPkg/PciPlatform/PciPlatform
> .c
>
> @@ -0,0 +1,199 @@
>
> +/** @file
>
> +  Implements PciPlatform.c
>
> +
>
> +  Copyright (C) 2024 Advanced Micro Devices, Inc. All rights reserved.<BR>
>
> +  SPDX-License-Identifier: BSD-2-Clause-Patent
>
> +
>
> +**/
>
> +
>
> +/* This file includes code originally published under the following license. */
>
> +
>
> +/** @file
>
> +Registers onboard PCI ROMs with PCI.IO
>
> +
>
> +Copyright (c) 2013-2015 Intel Corporation.
>
> +
>
> +This program and the accompanying materials
>
> +are licensed and made available under the terms and conditions of the BSD
> License
>
> +which accompanies this distribution.  The full text of the license may be
> found at
>
> +http://opensource.org/licenses/bsd-license.php
>
> +
>
> +THE PROGRAM IS DISTRIBUTED UNDER THE BSD LICENSE ON AN "AS IS"
> BASIS,
>
> +WITHOUT WARRANTIES OR REPRESENTATIONS OF ANY KIND, EITHER
> EXPRESS OR IMPLIED.
>
> +
>
> +
>
> +**/
>
> +
>
> +#include "CommonHeader.h"
>
> +
>
> +#include "PciPlatform.h"
>
> +
>
> +PCI_OPTION_ROM_TABLE  mPciOptionRomTable[] = {
>
> +  { ONBOARD_SPH_VIDEO_OPTION_ROM_FILE_GUID, 0x1002, 0x1435 },
>
> +  { NULL_ROM_FILE_GUID,                     0xffff, 0xffff }
>
> +};
>
> +
>
> +EFI_PCI_PLATFORM_PROTOCOL  mPciPlatform = {
>
> +  PhaseNotify,
>
> +  PlatformPrepController,
>
> +  GetPlatformPolicy,
>
> +  GetPciRom
>
> +};
>
> +
>
> +EFI_HANDLE  mPciPlatformHandle = NULL;
>
> +EFI_HANDLE  mImageHandle       = NULL;
>
> +
>
> +EFI_STATUS
>
> +EFIAPI
>
> +PhaseNotify (
>
> +  IN EFI_PCI_PLATFORM_PROTOCOL                      *This,
>
> +  IN EFI_HANDLE                                     HostBridge,
>
> +  IN EFI_PCI_HOST_BRIDGE_RESOURCE_ALLOCATION_PHASE  Phase,
>
> +  IN EFI_PCI_CHIPSET_EXECUTION_PHASE                ChipsetPhase
>
> +  )
>
> +{
>
> +  return EFI_UNSUPPORTED;
>
> +}
>
> +
>
> +EFI_STATUS
>
> +EFIAPI
>
> +PlatformPrepController (
>
> +  IN  EFI_PCI_PLATFORM_PROTOCOL                     *This,
>
> +  IN  EFI_HANDLE                                    HostBridge,
>
> +  IN  EFI_HANDLE                                    RootBridge,
>
> +  IN  EFI_PCI_ROOT_BRIDGE_IO_PROTOCOL_PCI_ADDRESS   PciAddress,
>
> +  IN  EFI_PCI_CONTROLLER_RESOURCE_ALLOCATION_PHASE  Phase,
>
> +  IN  EFI_PCI_CHIPSET_EXECUTION_PHASE               ChipsetPhase
>
> +  )
>
> +{
>
> +  return EFI_UNSUPPORTED;
>
> +}
>
> +
>
> +/**
>
> +  Get PlatformPolicy for VGA IO ALIAS
>
> +
>
> +  @param This       Protocol instance pointer.
>
> +  @param PciPolicy  PCI Platform Policy.
>
> +
>
> +  @retval EFI_SUCCESS
>
> +
>
> +**/
>
> +EFI_STATUS
>
> +EFIAPI
>
> +GetPlatformPolicy (
>
> +  IN  CONST EFI_PCI_PLATFORM_PROTOCOL  *This,
>
> +  OUT       EFI_PCI_PLATFORM_POLICY    *PciPolicy
>
> +  )
>
> +{
>
> +  *PciPolicy |= EFI_RESERVE_VGA_IO_ALIAS;
>
> +  return EFI_SUCCESS;
>
> +}
>
> +
>
> +/**
>
> +  Return a PCI ROM image for the onboard device represented by PciHandle
>
> +
>
> +  @param This       Protocol instance pointer.
>
> +  @param PciHandle  PCI device to return the ROM image for.
>
> +  @param RomImage   PCI Rom Image for onboard device
>
> +  @param RomSize    Size of RomImage in bytes
>
> +
>
> +  @retval EFI_SUCCESS   - RomImage is valid
>
> +  @retval EFI_NOT_FOUND - No RomImage
>
> +
>
> +**/
>
> +EFI_STATUS
>
> +EFIAPI
>
> +GetPciRom (
>
> +  IN  CONST EFI_PCI_PLATFORM_PROTOCOL  *This,
>
> +  IN        EFI_HANDLE                 PciHandle,
>
> +  OUT       VOID                       **RomImage,
>
> +  OUT       UINTN                      *RomSize
>
> +  )
>
> +{
>
> +  EFI_STATUS           Status;
>
> +  EFI_PCI_IO_PROTOCOL  *PciIo;
>
> +  UINTN                Segment;
>
> +  UINTN                Bus;
>
> +  UINTN                Device;
>
> +  UINTN                Function;
>
> +  UINT16               VendorId;
>
> +  UINT16               DeviceId;
>
> +  UINTN                TableIndex;
>
> +
>
> +  Status = gBS->HandleProtocol (
>
> +                  PciHandle,
>
> +                  &gEfiPciIoProtocolGuid,
>
> +                  (VOID **)&PciIo
>
> +                  );
>
> +  if (EFI_ERROR (Status)) {
>
> +    return EFI_NOT_FOUND;
>
> +  }
>
> +
>
> +  PciIo->GetLocation (PciIo, &Segment, &Bus, &Device, &Function);
>
> +
>
> +  PciIo->Pci.Read (PciIo, EfiPciIoWidthUint16, 0, 1, &VendorId);
>
> +
>
> +  PciIo->Pci.Read (PciIo, EfiPciIoWidthUint16, 2, 1, &DeviceId);
>
> +
>
> +  //
>
> +  // Loop through table of video option rom descriptions
>
> +  //
>
> +  for (TableIndex = 0; mPciOptionRomTable[TableIndex].VendorId != 0xffff;
> TableIndex++) {
>
> +    //
>
> +    // See if the PCI device specified by PciHandle matches at device in
> mPciOptionRomTable
>
> +    //
>
> +    if ((VendorId != mPciOptionRomTable[TableIndex].VendorId) ||
>
> +        (DeviceId != mPciOptionRomTable[TableIndex].DeviceId))
>
> +    {
>
> +      continue;
>
> +    }
>
> +
>
> +    Status = GetSectionFromAnyFv (
>
> +               &mPciOptionRomTable[TableIndex].FileName,
>
> +               EFI_SECTION_RAW,
>
> +               0,
>
> +               RomImage,
>
> +               RomSize
>
> +               );
>
> +
>
> +    if (EFI_ERROR (Status)) {
>
> +      continue;
>
> +    }
>
> +
>
> +    return EFI_SUCCESS;
>
> +  }
>
> +
>
> +  return EFI_NOT_FOUND;
>
> +}
>
> +
>
> +/**
>
> +
>
> +  @param  ImageHandle  Handle of driver image.
>
> +  @param  SystemTable  Pointer to system table.
>
> +
>
> +  @retval EFI_STATUS return status of InstallProtocolInterface.
>
> +
>
> +**/
>
> +EFI_STATUS
>
> +EFIAPI
>
> +PciPlatformDriverEntry (
>
> +  IN EFI_HANDLE        ImageHandle,
>
> +  IN EFI_SYSTEM_TABLE  *SystemTable
>
> +  )
>
> +{
>
> +  EFI_STATUS  Status;
>
> +
>
> +  mImageHandle = ImageHandle;
>
> +
>
> +  //
>
> +  // Install on a new handle
>
> +  //
>
> +  Status = gBS->InstallProtocolInterface (
>
> +                  &mPciPlatformHandle,
>
> +                  &gEfiPciPlatformProtocolGuid,
>
> +                  EFI_NATIVE_INTERFACE,
>
> +                  &mPciPlatform
>
> +                  );
>
> +
>
> +  return Status;
>
> +}
>
> diff --git
> a/Platform/AMD/VanGoghBoard/ChachaniBoardPkg/PciPlatform/PciPlatform.
> h
> b/Platform/AMD/VanGoghBoard/ChachaniBoardPkg/PciPlatform/PciPlatform
> .h
>
> new file mode 100644
>
> index 0000000000..95a3e8816c
>
> --- /dev/null
>
> +++
> b/Platform/AMD/VanGoghBoard/ChachaniBoardPkg/PciPlatform/PciPlatform
> .h
>
> @@ -0,0 +1,105 @@
>
> +/** @file
>
> +  Implements PciPlatform.h
>
> +
>
> +  Copyright (C) 2024 Advanced Micro Devices, Inc. All rights reserved.<BR>
>
> +  SPDX-License-Identifier: BSD-2-Clause-Patent
>
> +
>
> +**/
>
> +
>
> +/* This file includes code originally published under the following license. */
>
> +
>
> +/** @file
>
> +This code supports a the private implementation
>
> +of the Legacy BIOS Platform protocol
>
> +
>
> +Copyright (c) 2013-2015 Intel Corporation.
>
> +
>
> +This  program and the accompanying materials
>
> +are licensed and made available under the terms and conditions of the BSD
> License
>
> +which accompanies this distribution.  The full text of the license may be
> found at
>
> +http://opensource.org/licenses/bsd-license.php
>
> +
>
> +THE PROGRAM IS DISTRIBUTED UNDER THE BSD LICENSE ON AN "AS IS"
> BASIS,
>
> +WITHOUT WARRANTIES OR REPRESENTATIONS OF ANY KIND, EITHER
> EXPRESS OR IMPLIED.
>
> +
>
> +
>
> +**/
>
> +
>
> +#ifndef PCI_PLATFORM_H_
>
> +#define PCI_PLATFORM_H_
>
> +
>
> +#include <IndustryStandard/Pci.h>
>
> +#include <Library/PcdLib.h>
>
> +//
>
> +// Global variables for Option ROMs
>
> +//
>
> +#define NULL_ROM_FILE_GUID \
>
> +{ 0x00000000, 0x0000, 0x0000, {0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00,
> 0x00 }}
>
> +
>
> +#define ONBOARD_SPH_VIDEO_OPTION_ROM_FILE_GUID \
>
> +{ 0xE7D31EB4, 0x90F3, 0x4A14, {0x8A, 0x28, 0x48, 0xD0, 0x47, 0x42, 0xF8,
> 0xE1 }}
>
> +
>
> +typedef struct {
>
> +  EFI_GUID    FileName;
>
> +  UINT16      VendorId;
>
> +  UINT16      DeviceId;
>
> +} PCI_OPTION_ROM_TABLE;
>
> +
>
> +EFI_STATUS
>
> +EFIAPI
>
> +PhaseNotify (
>
> +  IN EFI_PCI_PLATFORM_PROTOCOL                      *This,
>
> +  IN EFI_HANDLE                                     HostBridge,
>
> +  IN EFI_PCI_HOST_BRIDGE_RESOURCE_ALLOCATION_PHASE  Phase,
>
> +  IN EFI_PCI_CHIPSET_EXECUTION_PHASE                ChipsetPhase
>
> +  );
>
> +
>
> +EFI_STATUS
>
> +EFIAPI
>
> +PlatformPrepController (
>
> +  IN  EFI_PCI_PLATFORM_PROTOCOL                     *This,
>
> +  IN  EFI_HANDLE                                    HostBridge,
>
> +  IN  EFI_HANDLE                                    RootBridge,
>
> +  IN  EFI_PCI_ROOT_BRIDGE_IO_PROTOCOL_PCI_ADDRESS   PciAddress,
>
> +  IN  EFI_PCI_CONTROLLER_RESOURCE_ALLOCATION_PHASE  Phase,
>
> +  IN  EFI_PCI_CHIPSET_EXECUTION_PHASE               ChipsetPhase
>
> +  );
>
> +
>
> +/**
>
> +  Get PlatformPolicy for VGA IO ALIAS
>
> +
>
> +  @param This       Protocol instance pointer.
>
> +  @param PciPolicy  PCI Platform Policy.
>
> +
>
> +  @retval EFI_SUCCESS
>
> +
>
> +**/
>
> +EFI_STATUS
>
> +EFIAPI
>
> +GetPlatformPolicy (
>
> +  IN  CONST EFI_PCI_PLATFORM_PROTOCOL  *This,
>
> +  OUT       EFI_PCI_PLATFORM_POLICY    *PciPolicy
>
> +  );
>
> +
>
> +/**
>
> +  Return a PCI ROM image for the onboard device represented by PciHandle
>
> +
>
> +  @param This       Protocol instance pointer.
>
> +  @param PciHandle  PCI device to return the ROM image for.
>
> +  @param RomImage   PCI Rom Image for onboard device
>
> +  @param RomSize    Size of RomImage in bytes
>
> +
>
> +  @retval EFI_SUCCESS   - RomImage is valid
>
> +  @retval EFI_NOT_FOUND - No RomImage
>
> +
>
> +**/
>
> +EFI_STATUS
>
> +EFIAPI
>
> +GetPciRom (
>
> +  IN CONST EFI_PCI_PLATFORM_PROTOCOL  *This,
>
> +  IN       EFI_HANDLE                 PciHandle,
>
> +  OUT      VOID                       **RomImage,
>
> +  OUT      UINTN                      *RomSize
>
> +  );
>
> +
>
> +#endif
>
> diff --git
> a/Platform/AMD/VanGoghBoard/ChachaniBoardPkg/PciPlatform/PciPlatform.
> inf
> b/Platform/AMD/VanGoghBoard/ChachaniBoardPkg/PciPlatform/PciPlatform
> .inf
>
> new file mode 100644
>
> index 0000000000..16d46f638a
>
> --- /dev/null
>
> +++
> b/Platform/AMD/VanGoghBoard/ChachaniBoardPkg/PciPlatform/PciPlatform
> .inf
>
> @@ -0,0 +1,66 @@
>
> +## @file
>
> +#  PCI Platform  INF file
>
> +#
>
> +# Copyright (C) 2024 Advanced Micro Devices, Inc. All rights reserved.<BR>
>
> +# SPDX-License-Identifier: BSD-2-Clause-Patent
>
> +#
>
> +##
>
> +
>
> +# This file includes code originally published under the following license.
>
> +## @file
>
> +# Component description file for PciPlatform module.
>
> +#
>
> +# This driver installs pciplatform protocol to provide access interfaces to the
> onboard pci roms.
>
> +# Copyright (c) 2013-2015 Intel Corporation.
>
> +#
>
> +# This  program and the accompanying materials
>
> +# are licensed and made available under the terms and conditions of the BSD
> License
>
> +# which accompanies this distribution.  The full text of the license may be
> found at
>
> +# http://opensource.org/licenses/bsd-license.php
>
> +#
>
> +# THE PROGRAM IS DISTRIBUTED UNDER THE BSD LICENSE ON AN "AS IS"
> BASIS,
>
> +# WITHOUT WARRANTIES OR REPRESENTATIONS OF ANY KIND, EITHER
> EXPRESS OR IMPLIED.
>
> +#
>
> +##
>
> +
>
> +[Defines]
>
> +  INF_VERSION                    = 0x00010005
>
> +  BASE_NAME                      = PciPlatform
>
> +  FILE_GUID                      = E78AE2BF-D5E8-4846-9B0A-2D54AEC3BAF9
>
> +  MODULE_TYPE                    = DXE_DRIVER
>
> +  VERSION_STRING                 = 1.0
>
> +  ENTRY_POINT                    = PciPlatformDriverEntry
>
> +
>
> +#
>
> +# The following information is for reference only and not required by the build
> tools.
>
> +#
>
> +#  VALID_ARCHITECTURES           = IA32 X64 IPF EBC
>
> +#
>
> +
>
> +[Sources]
>
> +  PciPlatform.c
>
> +  PciPlatform.h
>
> +  CommonHeader.h
>
> +
>
> +[Packages]
>
> +  MdePkg/MdePkg.dec
>
> +
>
> +[LibraryClasses]
>
> +  PciLib
>
> +  PcdLib
>
> +  DebugLib
>
> +  UefiRuntimeServicesTableLib
>
> +  UefiBootServicesTableLib
>
> +  UefiDriverEntryPoint
>
> +  DxeServicesLib
>
> +
>
> +[Guids]
>
> +
>
> +[Protocols]
>
> +  gEfiPciIoProtocolGuid                         # PROTOCOL ALWAYS_CONSUMED
>
> +  gEfiPciPlatformProtocolGuid                   # PROTOCOL ALWAYS_PRODUCED
>
> +
>
> +[Pcd]
>
> +
>
> +[Depex]
>
> +  TRUE
>
> --
>
> 2.31.1
>
>



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