From: "Chang, Abner via groups.io" <abner.chang=amd.com@groups.io>
To: "Attar, AbdulLateef (Abdul Lateef)" <AbdulLateef.Attar@amd.com>,
"devel@edk2.groups.io" <devel@edk2.groups.io>
Cc: "Attar, AbdulLateef (Abdul Lateef)" <AbdulLateef.Attar@amd.com>,
"Grimes, Paul" <Paul.Grimes@amd.com>
Subject: Re: [edk2-devel] [edk2-platforms RESEND v2 3/5] AmdMinBoardPkg: Implement BoardInitLib for PEI phase
Date: Mon, 20 May 2024 13:54:13 +0000 [thread overview]
Message-ID: <LV8PR12MB9452C6216659B68E37AAFF2BEAE92@LV8PR12MB9452.namprd12.prod.outlook.com> (raw)
In-Reply-To: <cf7b09805b904a210a0f70498f8a72d2ed5ea06b.1716212901.git.AbdulLateef.Attar@amd.com>
[AMD Official Use Only - AMD Internal Distribution Only]
Reviewed-by: Abner Chang <abner.chang@amd.com>
> -----Original Message-----
> From: Abdul Lateef Attar <AbdulLateef.Attar@amd.com>
> Sent: Monday, May 20, 2024 9:50 PM
> To: devel@edk2.groups.io
> Cc: Attar, AbdulLateef (Abdul Lateef) <AbdulLateef.Attar@amd.com>; Chang,
> Abner <Abner.Chang@amd.com>; Grimes, Paul <Paul.Grimes@amd.com>
> Subject: [edk2-platforms RESEND v2 3/5] AmdMinBoardPkg: Implement
> BoardInitLib for PEI phase
>
> PeiBoardInitPreMemLib library provides board-specific
> initialization functions for the PEI phase.
>
> Cc: Abner Chang <abner.chang@amd.com>
> Cc: Paul Grimes <paul.grimes@amd.com>
> Signed-off-by: Abdul Lateef Attar <AbdulLateef.Attar@amd.com>
> ---
> .../AMD/AmdMinBoardPkg/AmdMinBoardPkg.dec | 8 +
> .../AMD/AmdMinBoardPkg/AmdMinBoardPkg.dsc | 5 +
> .../PeiBoardInitPreMemLib/AmdMemoryInfoHob.h | 50 ++++
> .../PeiBoardInitPreMemLib.c | 229 ++++++++++++++++++
> .../PeiBoardInitPreMemLib.inf | 45 ++++
> .../PeiBoardInitPreMemLib/PeiMemoryInit.c | 198 +++++++++++++++
> .../PeiBoardInitPreMemLib/PeiMemoryInit.h | 50 ++++
> 7 files changed, 585 insertions(+)
> create mode 100644
> Platform/AMD/AmdMinBoardPkg/Library/PeiBoardInitPreMemLib/AmdMem
> oryInfoHob.h
> create mode 100644
> Platform/AMD/AmdMinBoardPkg/Library/PeiBoardInitPreMemLib/PeiBoardI
> nitPreMemLib.c
> create mode 100644
> Platform/AMD/AmdMinBoardPkg/Library/PeiBoardInitPreMemLib/PeiBoardI
> nitPreMemLib.inf
> create mode 100644
> Platform/AMD/AmdMinBoardPkg/Library/PeiBoardInitPreMemLib/PeiMemor
> yInit.c
> create mode 100644
> Platform/AMD/AmdMinBoardPkg/Library/PeiBoardInitPreMemLib/PeiMemor
> yInit.h
>
> diff --git a/Platform/AMD/AmdMinBoardPkg/AmdMinBoardPkg.dec
> b/Platform/AMD/AmdMinBoardPkg/AmdMinBoardPkg.dec
> index 03d1d77c34..98768af210 100644
> --- a/Platform/AMD/AmdMinBoardPkg/AmdMinBoardPkg.dec
> +++ b/Platform/AMD/AmdMinBoardPkg/AmdMinBoardPkg.dec
> @@ -19,6 +19,10 @@
>
> [Guids]
> gAmdMinBoardPkgTokenSpaceGuid = {0xd4d23d79, 0x73bf, 0x460a, {0xa1,
> 0xc7, 0x85, 0xa3, 0xca, 0x71, 0xb9, 0x4c}}
> + gAmdMemoryInfoHobGuid = { 0x1bce3d14, 0xa5fe, 0x4a0b, { 0x9a,
> 0x8d, 0x69, 0xca, 0x5d, 0x98, 0x38, 0xd3}}
> +
> +[Ppis]
> + gAmdMemoryInfoHobPpiGuid = { 0xba16e587, 0x1d66, 0x41b7, { 0x9b,
> 0x52, 0xca, 0x4f, 0x2c, 0xad, 0x0d, 0xc8}}
>
> [PcdsFixedAtBuild, PcdsPatchableInModule, PcdsDynamic, PcdsDynamicEx]
> #
> @@ -41,3 +45,7 @@
> gAmdMinBoardPkgTokenSpaceGuid.PcdAmdFlashFvAdvancedSecuritySize
> |0x00000000|UINT32|0x10000008
> gAmdMinBoardPkgTokenSpaceGuid.PcdAmdFlashFvAdvancedSecurityOffset
> |0x00000000|UINT32|0x10000009
>
> + # SMRAM size
> + # Holds the SMRAM area size, which is reserved for SMRAM operation
> + # default value 128MB
> + gAmdMinBoardPkgTokenSpaceGuid.PcdAmdSmramAreaSize
> |0x08000000|UINT64|0x20000100
> diff --git a/Platform/AMD/AmdMinBoardPkg/AmdMinBoardPkg.dsc
> b/Platform/AMD/AmdMinBoardPkg/AmdMinBoardPkg.dsc
> index be33089a45..7e356a2a67 100644
> --- a/Platform/AMD/AmdMinBoardPkg/AmdMinBoardPkg.dsc
> +++ b/Platform/AMD/AmdMinBoardPkg/AmdMinBoardPkg.dsc
> @@ -22,6 +22,9 @@
> MinPlatformPkg/MinPlatformPkg.dec
> UefiCpuPkg/UefiCpuPkg.dec
>
> +[PcdsDynamicDefault]
> + gEfiMdePkgTokenSpaceGuid.PcdPciExpressBaseSize|0x10000000
> +
> [LibraryClasses]
> SpcrDeviceLib|AmdMinBoardPkg/Library/SpcrDeviceLib/SpcrDeviceLib.inf
> ReportFvLib|AmdMinBoardPkg/Library/PeiReportFvLib/PeiReportFvLib.inf
> @@ -38,6 +41,7 @@
>
> [LibraryClasses.common.PEIM]
>
> SetCacheMtrrLib|AmdMinBoardPkg/Library/SetCacheMtrrLib/SetCacheMtrrLi
> b.inf
> +
> BoardInitLib|AmdMinBoardPkg/Library/PeiBoardInitPreMemLib/PeiBoardInit
> PreMemLib.inf
>
> [Components]
> AmdMinBoardPkg/Library/SpcrDeviceLib/SpcrDeviceLib.inf
> @@ -45,6 +49,7 @@
> [Components.IA32]
> AmdMinBoardPkg/Library/SetCacheMtrrLib/SetCacheMtrrLib.inf
> AmdMinBoardPkg/Library/PeiReportFvLib/PeiReportFvLib.inf
> +
> AmdMinBoardPkg/Library/PeiBoardInitPreMemLib/PeiBoardInitPreMemLib.in
> f
>
> [Components.X64]
> AmdMinBoardPkg/PciHotPlug/PciHotPlugInit.inf
> diff --git
> a/Platform/AMD/AmdMinBoardPkg/Library/PeiBoardInitPreMemLib/AmdMe
> moryInfoHob.h
> b/Platform/AMD/AmdMinBoardPkg/Library/PeiBoardInitPreMemLib/AmdMe
> moryInfoHob.h
> new file mode 100644
> index 0000000000..b596b3bdf3
> --- /dev/null
> +++
> b/Platform/AMD/AmdMinBoardPkg/Library/PeiBoardInitPreMemLib/AmdMe
> moryInfoHob.h
> @@ -0,0 +1,50 @@
> +/** @file
> + Defines AMD memory info hob.
> +
> + Copyright (C) 2023 - 2024 Advanced Micro Devices, Inc. All rights reserved.
> + SPDX-License-Identifier: BSD-2-Clause-Patent
> +
> +**/
> +
> +#ifndef AMD_MEMORY_INFO_HOB_H_
> +#define AMD_MEMORY_INFO_HOB_H_
> +
> +#pragma pack (push, 1)
> +
> +/// Memory descriptor structure for each memory range
> +typedef struct {
> + UINT64 Base; ///< Base address of memory rang
> + UINT64 Size; ///< Size of memory rang
> + UINT32 Attribute; ///< Attribute of memory rang
> + UINT32 Reserved; ///< For alignment purpose
> +} AMD_MEMORY_RANGE_DESCRIPTOR;
> +
> +/// Memory info HOB structure
> +typedef struct {
> + UINT32 Version; ///< Version of HOB structure
> + BOOLEAN Reserved1;
> + UINT16 Reserved2;
> + BOOLEAN Reserved3;
> + UINT8 Reserved4;
> + BOOLEAN Reserved5;
> + UINT32 Reserved6;
> + UINT32 Reserved7;
> + UINT32 NumberOfDescriptor; ///< Number of memory range
> descriptor
> + AMD_MEMORY_RANGE_DESCRIPTOR Ranges[1]; ///< Memory
> ranges array
> +} AMD_MEMORY_INFO_HOB;
> +
> +#pragma pack (pop)
> +
> +/// Memory attribute in the memory range descriptor = AVAILABLE
> +#define AMD_MEMORY_ATTRIBUTE_AVAILABLE 0x1
> +
> +/// Memory attribute in the memory range descriptor = UMA
> +#define AMD_MEMORY_ATTRIBUTE_UMA 0x2
> +
> +/// Memory attribute in the memory range descriptor = MMIO
> +#define AMD_MEMORY_ATTRIBUTE_MMIO 0x3
> +
> +/// Memory attribute in the memory range descriptor = RESERVED
> +#define AMD_MEMORY_ATTRIBUTE_RESERVED 0x4
> +
> +#endif
> diff --git
> a/Platform/AMD/AmdMinBoardPkg/Library/PeiBoardInitPreMemLib/PeiBoar
> dInitPreMemLib.c
> b/Platform/AMD/AmdMinBoardPkg/Library/PeiBoardInitPreMemLib/PeiBoar
> dInitPreMemLib.c
> new file mode 100644
> index 0000000000..af96969471
> --- /dev/null
> +++
> b/Platform/AMD/AmdMinBoardPkg/Library/PeiBoardInitPreMemLib/PeiBoar
> dInitPreMemLib.c
> @@ -0,0 +1,229 @@
> +/** @file
> + BoardInitLib library implementation for pre-mem PEI phase.
> +
> +Copyright (C) 2023 - 2024 Advanced Micro Devices, Inc. All rights reserved
> +SPDX-License-Identifier: BSD-2-Clause-Patent
> +
> +**/
> +
> +#include <Library/BoardInitLib.h>
> +#include <Library/PeiServicesLib.h>
> +#include <Library/DebugLib.h>
> +#include <Library/PcdLib.h>
> +#include "PeiMemoryInit.h"
> +
> +EFI_PEI_NOTIFY_DESCRIPTOR mNotifyList = {
> + (EFI_PEI_PPI_DESCRIPTOR_NOTIFY_DISPATCH |
> EFI_PEI_PPI_DESCRIPTOR_TERMINATE_LIST),
> + &gAmdMemoryInfoHobPpiGuid,
> + EndofAmdMemoryInfoHobPpiGuidCallBack
> +};
> +
> +/**
> + Get Pcie base address from MSR and set PcdPciExpressBaseSize
> +
> + @retval EFI_SUCCESS PcdPciExpressBaseSize value set successfully.
> +**/
> +EFI_STATUS
> +EFIAPI
> +SetPcieBaseSize (
> + VOID
> + )
> +{
> + EFI_STATUS Status;
> + UINT64 PcieBaseSize;
> + UINT8 BusRange;
> +
> + Status = EFI_SUCCESS;
> +
> + // Gather the value of PcdPciExpressBaseSize from MSR
> + BusRange = RShiftU64 (AsmReadMsr64 (0xC0010058), 2) & 0xF;
> + PcieBaseSize = MultU64x64 (LShiftU64 (1, BusRange), SIZE_1MB);
> + PcdSet64S (PcdPciExpressBaseSize, (UINT64)PcieBaseSize);
> + return Status;
> +}
> +
> +/**
> + This board service detects the board type.
> +
> + @retval EFI_SUCCESS The board was detected successfully.
> + @retval EFI_NOT_FOUND The board could not be detected.
> +**/
> +EFI_STATUS
> +EFIAPI
> +BoardDetect (
> + VOID
> + )
> +{
> + return EFI_SUCCESS;
> +}
> +
> +/**
> + This board service initializes board-specific debug devices.
> +
> + @retval EFI_SUCCESS Board-specific debug initialization was successful.
> + @retval EFI_NOT_READY The board has not been detected yet.
> +**/
> +EFI_STATUS
> +EFIAPI
> +BoardDebugInit (
> + VOID
> + )
> +{
> + return EFI_SUCCESS;
> +}
> +
> +/**
> + This board service detects the boot mode.
> +
> + @retval EFI_BOOT_MODE The boot mode.
> + @retval EFI_NOT_READY The board has not been detected yet.
> +**/
> +EFI_BOOT_MODE
> +EFIAPI
> +BoardBootModeDetect (
> + VOID
> + )
> +{
> + return BOOT_WITH_FULL_CONFIGURATION;
> +}
> +
> +/**
> + A hook for board-specific initialization prior to memory initialization.
> +
> + @retval EFI_SUCCESS The board initialization was successful.
> + @retval EFI_NOT_READY The board has not been detected yet.
> +**/
> +EFI_STATUS
> +EFIAPI
> +BoardInitBeforeMemoryInit (
> + VOID
> + )
> +{
> + EFI_STATUS Status;
> +
> + Status = PeiServicesNotifyPpi (&mNotifyList);
> + ASSERT_EFI_ERROR (Status);
> + Status = SetPcieBaseSize ();
> + ASSERT_EFI_ERROR (Status);
> + return (Status);
> +}
> +
> +/**
> + A hook for board-specific initialization after memory initialization.
> +
> + @retval EFI_SUCCESS The board initialization was successful.
> + @retval EFI_NOT_READY The board has not been detected yet.
> +**/
> +EFI_STATUS
> +EFIAPI
> +BoardInitAfterMemoryInit (
> + VOID
> + )
> +{
> + return EFI_SUCCESS;
> +}
> +
> +/**
> + A hook for board-specific initialization prior to disabling temporary RAM.
> +
> + @retval EFI_SUCCESS The board initialization was successful.
> + @retval EFI_NOT_READY The board has not been detected yet.
> +**/
> +EFI_STATUS
> +EFIAPI
> +BoardInitBeforeTempRamExit (
> + VOID
> + )
> +{
> + return EFI_SUCCESS;
> +}
> +
> +/**
> + A hook for board-specific initialization after disabling temporary RAM.
> +
> + @retval EFI_SUCCESS The board initialization was successful.
> + @retval EFI_NOT_READY The board has not been detected yet.
> +**/
> +EFI_STATUS
> +EFIAPI
> +BoardInitAfterTempRamExit (
> + VOID
> + )
> +{
> + return EFI_SUCCESS;
> +}
> +
> +/**
> + A hook for board-specific initialization prior to silicon initialization.
> +
> + @retval EFI_SUCCESS The board initialization was successful.
> + @retval EFI_NOT_READY The board has not been detected yet.
> +**/
> +EFI_STATUS
> +EFIAPI
> +BoardInitBeforeSiliconInit (
> + VOID
> + )
> +{
> + return EFI_SUCCESS;
> +}
> +
> +/**
> + A hook for board-specific initialization after silicon initialization.
> +
> + @retval EFI_SUCCESS The board initialization was successful.
> + @retval EFI_NOT_READY The board has not been detected yet.
> +**/
> +EFI_STATUS
> +EFIAPI
> +BoardInitAfterSiliconInit (
> + VOID
> + )
> +{
> + return EFI_SUCCESS;
> +}
> +
> +/**
> + A hook for board-specific initialization after PCI enumeration.
> +
> + @retval EFI_SUCCESS The board initialization was successful.
> + @retval EFI_NOT_READY The board has not been detected yet.
> +**/
> +EFI_STATUS
> +EFIAPI
> +BoardInitAfterPciEnumeration (
> + VOID
> + )
> +{
> + return EFI_SUCCESS;
> +}
> +
> +/**
> + A hook for board-specific functionality for the ReadyToBoot event.
> +
> + @retval EFI_SUCCESS The board initialization was successful.
> + @retval EFI_NOT_READY The board has not been detected yet.
> +**/
> +EFI_STATUS
> +EFIAPI
> +BoardInitReadyToBoot (
> + VOID
> + )
> +{
> + return EFI_SUCCESS;
> +}
> +
> +/**
> + A hook for board-specific functionality for the ExitBootServices event.
> +
> + @retval EFI_SUCCESS The board initialization was successful.
> + @retval EFI_NOT_READY The board has not been detected yet.
> +**/
> +EFI_STATUS
> +EFIAPI
> +BoardInitEndOfFirmware (
> + VOID
> + )
> +{
> + return EFI_SUCCESS;
> +}
> diff --git
> a/Platform/AMD/AmdMinBoardPkg/Library/PeiBoardInitPreMemLib/PeiBoar
> dInitPreMemLib.inf
> b/Platform/AMD/AmdMinBoardPkg/Library/PeiBoardInitPreMemLib/PeiBoar
> dInitPreMemLib.inf
> new file mode 100644
> index 0000000000..9f3cfd47c4
> --- /dev/null
> +++
> b/Platform/AMD/AmdMinBoardPkg/Library/PeiBoardInitPreMemLib/PeiBoar
> dInitPreMemLib.inf
> @@ -0,0 +1,45 @@
> +## @file
> +# Board Init Library for AMD Platforms.
> +#
> +# Copyright (C) 2023 - 2024 Advanced Micro Devices, Inc. All rights reserved
> +#
> +# SPDX-License-Identifier: BSD-2-Clause-Patent
> +#
> +##
> +
> +[Defines]
> + INF_VERSION = 1.29
> + BASE_NAME = PeiBoardInitPreMemLib
> + FILE_GUID = A394D6BE-4433-4564-8FEB-2C90DD9ECE5B
> + MODULE_TYPE = BASE
> + VERSION_STRING = 1.0
> + LIBRARY_CLASS = BoardInitLib
> +
> +[LibraryClasses]
> + BaseLib
> + DebugLib
> + HobLib
> + PcdLib
> +
> +[Packages]
> + AmdMinBoardPkg/AmdMinBoardPkg.dec
> + MdePkg/MdePkg.dec
> + MinPlatformPkg/MinPlatformPkg.dec
> +
> +[Sources]
> + AmdMemoryInfoHob.h
> + PeiMemoryInit.h
> + PeiBoardInitPreMemLib.c
> + PeiMemoryInit.c
> +
> +[Guids]
> + gAmdMemoryInfoHobGuid
> + gEfiSmmSmramMemoryGuid
> +
> +[Ppis]
> + gAmdMemoryInfoHobPpiGuid ## CONSUMES
> + gPeiPlatformMemorySizePpiGuid ## CONSUMES
> +
> +[Pcd]
> + gAmdMinBoardPkgTokenSpaceGuid.PcdAmdSmramAreaSize
> + gEfiMdePkgTokenSpaceGuid.PcdPciExpressBaseSize ## CONSUMES
> diff --git
> a/Platform/AMD/AmdMinBoardPkg/Library/PeiBoardInitPreMemLib/PeiMem
> oryInit.c
> b/Platform/AMD/AmdMinBoardPkg/Library/PeiBoardInitPreMemLib/PeiMem
> oryInit.c
> new file mode 100644
> index 0000000000..03f08214e2
> --- /dev/null
> +++
> b/Platform/AMD/AmdMinBoardPkg/Library/PeiBoardInitPreMemLib/PeiMem
> oryInit.c
> @@ -0,0 +1,198 @@
> +/** @file
> +
> +Copyright (C) 2023 - 2024 Advanced Micro Devices, Inc. All rights reserved
> +SPDX-License-Identifier: BSD-2-Clause-Patent
> +
> +**/
> +
> +#include "PeiMemoryInit.h"
> +#include "AmdMemoryInfoHob.h"
> +
> +/**
> + A Callback routine only AmdMemoryInfoHob is ready.
> +
> + @param[in] PeiServices General purpose services available to every
> PEIM.
> + @param[in] NotifyDescriptor The descriptor for the notification event.
> + @param[in] Ppi The context of the notification.
> +
> + @retval EFI_SUCCESS Platform Pre Memory initialization is successful.
> + EFI_STATUS Various failure from underlying routine calls.
> +**/
> +EFI_STATUS
> +EFIAPI
> +EndofAmdMemoryInfoHobPpiGuidCallBack (
> + IN EFI_PEI_SERVICES **PeiServices,
> + IN EFI_PEI_NOTIFY_DESCRIPTOR *NotifyDescriptor,
> + IN VOID *Ppi
> + )
> +{
> + PEI_PLATFORM_MEMORY_SIZE_PPI *PlatformMemorySizePpi;
> + EFI_STATUS Status;
> + UINT64 MemorySize;
> + AMD_MEMORY_INFO_HOB *AmdMemoryInfoHob;
> + AMD_MEMORY_RANGE_DESCRIPTOR *AmdMemoryInfoRange;
> + EFI_HOB_GUID_TYPE *GuidHob;
> + EFI_PEI_HOB_POINTERS Hob;
> + UINTN Index;
> + EFI_SMRAM_HOB_DESCRIPTOR_BLOCK *SmramHobDescriptorBlock;
> + EFI_PHYSICAL_ADDRESS SmramBaseAddress;
> + UINT8 SmramRanges;
> + UINTN DataSize;
> +
> + SmramBaseAddress = 0;
> + SmramRanges = 0;
> +
> + // Locate AMD_MEMORY_INFO_HOB Guided HOB and retrieve data
> + AmdMemoryInfoHob = NULL;
> + GuidHob = GetFirstGuidHob (&gAmdMemoryInfoHobGuid);
> + if (GuidHob != NULL) {
> + AmdMemoryInfoHob = GET_GUID_HOB_DATA (GuidHob);
> + }
> +
> + if (AmdMemoryInfoHob == NULL) {
> + DEBUG ((DEBUG_ERROR, "Error: Could not locate
> AMD_MEMORY_INFO_HOB.\n"));
> + return EFI_OUT_OF_RESOURCES;
> + }
> +
> + DEBUG ((DEBUG_INFO, "AMD_MEMORY_INFO_HOB at 0x%X\n",
> AmdMemoryInfoHob));
> + DEBUG ((DEBUG_INFO, " Version: 0x%X\n", AmdMemoryInfoHob-
> >Version));
> + DEBUG ((DEBUG_INFO, " NumberOfDescriptor: 0x%X\n",
> AmdMemoryInfoHob->NumberOfDescriptor));
> +
> + //
> + // Build Descriptors
> + //
> + DEBUG ((DEBUG_INFO, "\nAMD HOB Descriptors:"));
> + for (Index = 0; Index < AmdMemoryInfoHob->NumberOfDescriptor;
> Index++) {
> + AmdMemoryInfoRange = (AMD_MEMORY_RANGE_DESCRIPTOR
> *)&(AmdMemoryInfoHob->Ranges[Index]);
> +
> + DEBUG ((DEBUG_INFO, "\n Index: %d\n", Index));
> + DEBUG ((DEBUG_INFO, " Base: 0x%lX\n", AmdMemoryInfoRange-
> >Base));
> + DEBUG ((DEBUG_INFO, " Size: 0x%lX\n", AmdMemoryInfoRange->Size));
> + DEBUG ((DEBUG_INFO, " Attribute: 0x%X\n", AmdMemoryInfoRange-
> >Attribute));
> +
> + switch (AmdMemoryInfoRange->Attribute) {
> + case AMD_MEMORY_ATTRIBUTE_AVAILABLE:
> + if (AmdMemoryInfoRange->Base < SIZE_4GB) {
> + SmramRanges = 1u;
> + // Set SMRAM base at heighest range below 4GB
> + SmramBaseAddress = AmdMemoryInfoRange->Base +
> AmdMemoryInfoRange->Size - FixedPcdGet32 (PcdAmdSmramAreaSize);
> + BuildResourceDescriptorHob (
> + EFI_RESOURCE_MEMORY_RESERVED,
> + (EFI_RESOURCE_ATTRIBUTE_WRITE_BACK_CACHEABLE |
> EFI_RESOURCE_ATTRIBUTE_UNCACHEABLE),
> + SmramBaseAddress,
> + FixedPcdGet32 (PcdAmdSmramAreaSize)
> + );
> + DEBUG ((
> + DEBUG_INFO,
> + "SMRAM RESERVED_MEMORY: Base = 0x%lX, Size = 0x%lX\n",
> + SmramBaseAddress,
> + FixedPcdGet32 (PcdAmdSmramAreaSize)
> + ));
> +
> + AmdMemoryInfoRange->Size -= FixedPcdGet32
> (PcdAmdSmramAreaSize);
> + }
> +
> + if (AmdMemoryInfoRange->Size) {
> + BuildResourceDescriptorHob (
> + EFI_RESOURCE_SYSTEM_MEMORY,
> + SYSTEM_MEMORY_ATTRIBUTES,
> + AmdMemoryInfoRange->Base,
> + AmdMemoryInfoRange->Size
> + );
> +
> + DEBUG ((
> + DEBUG_INFO,
> + "SYSTEM_MEMORY: Base = 0x%lX, Size = 0x%lX\n",
> + AmdMemoryInfoRange->Base,
> + AmdMemoryInfoRange->Size
> + ));
> + }
> +
> + break;
> +
> + case AMD_MEMORY_ATTRIBUTE_MMIO:
> + BuildResourceDescriptorHob (
> + EFI_RESOURCE_MEMORY_MAPPED_IO,
> + MEMORY_MAPPED_IO_ATTRIBUTES,
> + AmdMemoryInfoRange->Base,
> + AmdMemoryInfoRange->Size
> + );
> +
> + DEBUG ((
> + DEBUG_INFO,
> + "MMIO: Base = 0x%lX, Size = 0x%lX\n",
> + AmdMemoryInfoRange->Base,
> + AmdMemoryInfoRange->Size
> + ));
> + break;
> +
> + case AMD_MEMORY_ATTRIBUTE_RESERVED:
> + case AMD_MEMORY_ATTRIBUTE_UMA:
> + default:
> + BuildResourceDescriptorHob (
> + EFI_RESOURCE_MEMORY_RESERVED,
> + 0,
> + AmdMemoryInfoRange->Base,
> + AmdMemoryInfoRange->Size
> + );
> +
> + DEBUG ((
> + DEBUG_INFO,
> + "RESERVED_MEMORY: Base = 0x%lX, Size = 0x%lX\n",
> + AmdMemoryInfoRange->Base,
> + AmdMemoryInfoRange->Size
> + ));
> + break;
> + }
> + }
> +
> + ASSERT (SmramRanges > 0);
> + DataSize = sizeof (EFI_SMRAM_HOB_DESCRIPTOR_BLOCK);
> + DataSize += ((SmramRanges - 1) * sizeof (EFI_SMRAM_DESCRIPTOR));
> +
> + Hob.Raw = BuildGuidHob (
> + &gEfiSmmSmramMemoryGuid,
> + DataSize
> + );
> + ASSERT (Hob.Raw);
> +
> + SmramHobDescriptorBlock =
> (EFI_SMRAM_HOB_DESCRIPTOR_BLOCK *)(Hob.Raw);
> + SmramHobDescriptorBlock->NumberOfSmmReservedRegions =
> SmramRanges;
> + SmramHobDescriptorBlock->Descriptor[0].PhysicalStart =
> SmramBaseAddress;
> + SmramHobDescriptorBlock->Descriptor[0].CpuStart =
> SmramBaseAddress;
> + SmramHobDescriptorBlock->Descriptor[0].PhysicalSize = FixedPcdGet32
> (PcdAmdSmramAreaSize);
> + SmramHobDescriptorBlock->Descriptor[0].RegionState =
> EFI_SMRAM_CLOSED | EFI_CACHEABLE;
> +
> + Status = PeiServicesLocatePpi (
> + &gPeiPlatformMemorySizePpiGuid,
> + 0,
> + NULL,
> + (VOID **)&PlatformMemorySizePpi
> + );
> + ASSERT_EFI_ERROR (Status);
> +
> + Status = PlatformMemorySizePpi->GetPlatformMemorySize (
> + PeiServices,
> + PlatformMemorySizePpi,
> + &MemorySize
> + );
> + if (EFI_ERROR (Status)) {
> + DEBUG ((
> + DEBUG_ERROR,
> + "%a: Error(%r) in getting Platform Memory size.\n",
> + __func__,
> + Status
> + ));
> + return Status;
> + }
> +
> + DEBUG ((
> + DEBUG_INFO,
> + "Installing PeiMemory, BaseAddress = 0x%x, Size = 0x%x\n",
> + 0,
> + MemorySize
> + ));
> + Status = PeiServicesInstallPeiMemory (0, MemorySize);
> + ASSERT_EFI_ERROR (Status);
> + return Status;
> +}
> diff --git
> a/Platform/AMD/AmdMinBoardPkg/Library/PeiBoardInitPreMemLib/PeiMem
> oryInit.h
> b/Platform/AMD/AmdMinBoardPkg/Library/PeiBoardInitPreMemLib/PeiMem
> oryInit.h
> new file mode 100644
> index 0000000000..726db25543
> --- /dev/null
> +++
> b/Platform/AMD/AmdMinBoardPkg/Library/PeiBoardInitPreMemLib/PeiMem
> oryInit.h
> @@ -0,0 +1,50 @@
> +/** @file
> + This file contains definitions required for memory initialization in PEI phase.
> +
> + Copyright (C) 2024 Advanced Micro Devices, Inc. All rights reserved.
> + SPDX-License-Identifier: BSD-2-Clause-Patent
> +**/
> +
> +#ifndef PEI_MEMORY_INIT_PEI_H_
> +#define PEI_MEMORY_INIT_PEI_H_
> +
> +#include <Uefi/UefiBaseType.h>
> +#include <Pi/PiPeiCis.h>
> +#include <Library/PeiServicesLib.h>
> +#include <Ppi/PlatformMemorySize.h>
> +#include <Guid/SmramMemoryReserve.h>
> +#include <Library/HobLib.h>
> +#include <Library/DebugLib.h>
> +
> +#define SYSTEM_MEMORY_ATTRIBUTES ( \
> + EFI_RESOURCE_ATTRIBUTE_PRESENT | \
> + EFI_RESOURCE_ATTRIBUTE_INITIALIZED | \
> + EFI_RESOURCE_ATTRIBUTE_TESTED | \
> + EFI_RESOURCE_ATTRIBUTE_UNCACHEABLE | \
> + EFI_RESOURCE_ATTRIBUTE_WRITE_COMBINEABLE | \
> + EFI_RESOURCE_ATTRIBUTE_WRITE_THROUGH_CACHEABLE | \
> + EFI_RESOURCE_ATTRIBUTE_WRITE_BACK_CACHEABLE \
> + )
> +
> +#define MEMORY_MAPPED_IO_ATTRIBUTES ( \
> + EFI_RESOURCE_ATTRIBUTE_PRESENT | \
> + EFI_RESOURCE_ATTRIBUTE_INITIALIZED | \
> + EFI_RESOURCE_ATTRIBUTE_TESTED | \
> + EFI_RESOURCE_ATTRIBUTE_UNCACHEABLE \
> + )
> +
> +/**
> + A Callback routine only AmdMemoryInfoHob is ready.
> +
> + @retval EFI_SUCCESS Platform Pre Memory initialization is successfull.
> + EFI_STATUS Various failure from underlying routine calls.
> +**/
> +EFI_STATUS
> +EFIAPI
> +EndofAmdMemoryInfoHobPpiGuidCallBack (
> + IN EFI_PEI_SERVICES **PeiServices,
> + IN EFI_PEI_NOTIFY_DESCRIPTOR *NotifyDescriptor,
> + IN VOID *Ppi
> + );
> +
> +#endif // PEI_MEMORY_INIT_PEI_H_
> --
> 2.34.1
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prev parent reply other threads:[~2024-05-20 13:54 UTC|newest]
Thread overview: 2+ messages / expand[flat|nested] mbox.gz Atom feed top
[not found] <c27559a99b68dc7a6abf881c7a17d09b6f469a31.1716212901.git.AbdulLateef.Attar@amd.com>
2024-05-20 13:49 ` [edk2-devel] [edk2-platforms RESEND v2 3/5] AmdMinBoardPkg: Implement BoardInitLib for PEI phase Abdul Lateef Attar via groups.io
2024-05-20 13:54 ` Chang, Abner via groups.io [this message]
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